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authorArnaud Patard (Rtp) <arnaud.patard@rtp-net.org>2011-02-17 09:31:28 -0500
committerSascha Hauer <s.hauer@pengutronix.de>2011-02-18 04:56:38 -0500
commit7ac18a3845145f4f48e611640e33918ae450f955 (patch)
tree98fa07be45f359471c46c00cc1dafb5c18b74d9f /arch
parent15808182ae8044a064286445bcecaee6105cd718 (diff)
Introduce EFIKA_COMMON
The Genesi EFIKA MX and EFIKA Smartbook are sharing a lot of things so it makes sense to create a common file for both devices and a specific file for each. No functionnal change except dropping uart 1 & 2. Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-mx5/Kconfig8
-rw-r--r--arch/arm/mach-mx5/Makefile1
-rw-r--r--arch/arm/mach-mx5/board-mx51_efikamx.c129
-rw-r--r--arch/arm/mach-mx5/efika.h6
-rw-r--r--arch/arm/mach-mx5/mx51_efika.c175
5 files changed, 191 insertions, 128 deletions
diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig
index 10b600800fa9..aa20a38ccc8a 100644
--- a/arch/arm/mach-mx5/Kconfig
+++ b/arch/arm/mach-mx5/Kconfig
@@ -113,12 +113,16 @@ config MACH_EUKREA_MBIMXSD51_BASEBOARD
113 113
114endchoice 114endchoice
115 115
116config MACH_MX51_EFIKAMX 116config MX51_EFIKA_COMMON
117 bool "Support MX51 Genesi Efika MX nettop" 117 bool
118 select SOC_IMX51 118 select SOC_IMX51
119 select IMX_HAVE_PLATFORM_IMX_UART 119 select IMX_HAVE_PLATFORM_IMX_UART
120 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX 120 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
121 select IMX_HAVE_PLATFORM_SPI_IMX 121 select IMX_HAVE_PLATFORM_SPI_IMX
122
123config MACH_MX51_EFIKAMX
124 bool "Support MX51 Genesi Efika MX nettop"
125 select MX51_EFIKA_COMMON
122 help 126 help
123 Include support for Genesi Efika MX nettop. This includes specific 127 Include support for Genesi Efika MX nettop. This includes specific
124 configurations for the board and its peripherals. 128 configurations for the board and its peripherals.
diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile
index dc2728823fdd..64f6b0df64c2 100644
--- a/arch/arm/mach-mx5/Makefile
+++ b/arch/arm/mach-mx5/Makefile
@@ -16,5 +16,6 @@ obj-$(CONFIG_MACH_EUKREA_CPUIMX51) += board-cpuimx51.o
16obj-$(CONFIG_MACH_EUKREA_MBIMX51_BASEBOARD) += eukrea_mbimx51-baseboard.o 16obj-$(CONFIG_MACH_EUKREA_MBIMX51_BASEBOARD) += eukrea_mbimx51-baseboard.o
17obj-$(CONFIG_MACH_EUKREA_CPUIMX51SD) += board-cpuimx51sd.o 17obj-$(CONFIG_MACH_EUKREA_CPUIMX51SD) += board-cpuimx51sd.o
18obj-$(CONFIG_MACH_EUKREA_MBIMXSD51_BASEBOARD) += eukrea_mbimxsd-baseboard.o 18obj-$(CONFIG_MACH_EUKREA_MBIMXSD51_BASEBOARD) += eukrea_mbimxsd-baseboard.o
19obj-$(CONFIG_MX51_EFIKA_COMMON) += mx51_efika.o
19obj-$(CONFIG_MACH_MX51_EFIKAMX) += board-mx51_efikamx.o 20obj-$(CONFIG_MACH_MX51_EFIKAMX) += board-mx51_efikamx.o
20obj-$(CONFIG_MACH_MX50_RDP) += board-mx50_rdp.o 21obj-$(CONFIG_MACH_MX50_RDP) += board-mx50_rdp.o
diff --git a/arch/arm/mach-mx5/board-mx51_efikamx.c b/arch/arm/mach-mx5/board-mx51_efikamx.c
index c4094fa5794f..272de6e883e7 100644
--- a/arch/arm/mach-mx5/board-mx51_efikamx.c
+++ b/arch/arm/mach-mx5/board-mx51_efikamx.c
@@ -40,8 +40,7 @@
40 40
41#include "devices-imx51.h" 41#include "devices-imx51.h"
42#include "devices.h" 42#include "devices.h"
43 43#include "efika.h"
44#define MX51_USB_PLL_DIV_24_MHZ 0x01
45 44
46#define EFIKAMX_PCBID0 IMX_GPIO_NR(3, 16) 45#define EFIKAMX_PCBID0 IMX_GPIO_NR(3, 16)
47#define EFIKAMX_PCBID1 IMX_GPIO_NR(3, 17) 46#define EFIKAMX_PCBID1 IMX_GPIO_NR(3, 17)
@@ -53,9 +52,6 @@
53 52
54#define EFIKAMX_POWER_KEY IMX_GPIO_NR(2, 31) 53#define EFIKAMX_POWER_KEY IMX_GPIO_NR(2, 31)
55 54
56#define EFIKAMX_SPI_CS0 IMX_GPIO_NR(4, 24)
57#define EFIKAMX_SPI_CS1 IMX_GPIO_NR(4, 25)
58
59/* board 1.1 doesn't have same reset gpio */ 55/* board 1.1 doesn't have same reset gpio */
60#define EFIKAMX_RESET1_1 IMX_GPIO_NR(3, 2) 56#define EFIKAMX_RESET1_1 IMX_GPIO_NR(3, 2)
61#define EFIKAMX_RESET IMX_GPIO_NR(1, 4) 57#define EFIKAMX_RESET IMX_GPIO_NR(1, 4)
@@ -67,38 +63,11 @@
67#define MX51_PAD_PWRKEY IOMUX_PAD(0x48c, 0x0f8, 1, 0x0, 0, PAD_CTL_PUS_100K_UP | PAD_CTL_PKE) 63#define MX51_PAD_PWRKEY IOMUX_PAD(0x48c, 0x0f8, 1, 0x0, 0, PAD_CTL_PUS_100K_UP | PAD_CTL_PKE)
68 64
69static iomux_v3_cfg_t mx51efikamx_pads[] = { 65static iomux_v3_cfg_t mx51efikamx_pads[] = {
70 /* UART1 */
71 MX51_PAD_UART1_RXD__UART1_RXD,
72 MX51_PAD_UART1_TXD__UART1_TXD,
73 MX51_PAD_UART1_RTS__UART1_RTS,
74 MX51_PAD_UART1_CTS__UART1_CTS,
75 /* board id */ 66 /* board id */
76 MX51_PAD_PCBID0, 67 MX51_PAD_PCBID0,
77 MX51_PAD_PCBID1, 68 MX51_PAD_PCBID1,
78 MX51_PAD_PCBID2, 69 MX51_PAD_PCBID2,
79 70
80 /* SD 1 */
81 MX51_PAD_SD1_CMD__SD1_CMD,
82 MX51_PAD_SD1_CLK__SD1_CLK,
83 MX51_PAD_SD1_DATA0__SD1_DATA0,
84 MX51_PAD_SD1_DATA1__SD1_DATA1,
85 MX51_PAD_SD1_DATA2__SD1_DATA2,
86 MX51_PAD_SD1_DATA3__SD1_DATA3,
87
88 /* SD 2 */
89 MX51_PAD_SD2_CMD__SD2_CMD,
90 MX51_PAD_SD2_CLK__SD2_CLK,
91 MX51_PAD_SD2_DATA0__SD2_DATA0,
92 MX51_PAD_SD2_DATA1__SD2_DATA1,
93 MX51_PAD_SD2_DATA2__SD2_DATA2,
94 MX51_PAD_SD2_DATA3__SD2_DATA3,
95
96 /* SD/MMC WP/CD */
97 MX51_PAD_GPIO1_0__SD1_CD,
98 MX51_PAD_GPIO1_1__SD1_WP,
99 MX51_PAD_GPIO1_7__SD2_WP,
100 MX51_PAD_GPIO1_8__SD2_CD,
101
102 /* leds */ 71 /* leds */
103 MX51_PAD_CSI1_D9__GPIO3_13, 72 MX51_PAD_CSI1_D9__GPIO3_13,
104 MX51_PAD_CSI1_VSYNC__GPIO3_14, 73 MX51_PAD_CSI1_VSYNC__GPIO3_14,
@@ -107,55 +76,11 @@ static iomux_v3_cfg_t mx51efikamx_pads[] = {
107 /* power key */ 76 /* power key */
108 MX51_PAD_PWRKEY, 77 MX51_PAD_PWRKEY,
109 78
110 /* spi */
111 MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI,
112 MX51_PAD_CSPI1_MISO__ECSPI1_MISO,
113 MX51_PAD_CSPI1_SS0__GPIO4_24,
114 MX51_PAD_CSPI1_SS1__GPIO4_25,
115 MX51_PAD_CSPI1_RDY__ECSPI1_RDY,
116 MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK,
117
118 /* reset */ 79 /* reset */
119 MX51_PAD_DI1_PIN13__GPIO3_2, 80 MX51_PAD_DI1_PIN13__GPIO3_2,
120 MX51_PAD_GPIO1_4__GPIO1_4, 81 MX51_PAD_GPIO1_4__GPIO1_4,
121}; 82};
122 83
123/* Serial ports */
124static const struct imxuart_platform_data uart_pdata = {
125 .flags = IMXUART_HAVE_RTSCTS,
126};
127
128/* This function is board specific as the bit mask for the plldiv will also
129 * be different for other Freescale SoCs, thus a common bitmask is not
130 * possible and cannot get place in /plat-mxc/ehci.c.
131 */
132static int initialize_otg_port(struct platform_device *pdev)
133{
134 u32 v;
135 void __iomem *usb_base;
136 void __iomem *usbother_base;
137 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
138 if (!usb_base)
139 return -ENOMEM;
140 usbother_base = (void __iomem *)(usb_base + MX5_USBOTHER_REGS_OFFSET);
141
142 /* Set the PHY clock to 19.2MHz */
143 v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
144 v &= ~MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK;
145 v |= MX51_USB_PLL_DIV_24_MHZ;
146 __raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
147 iounmap(usb_base);
148
149 mdelay(10);
150
151 return mx51_initialize_usb_hw(0, MXC_EHCI_INTERNAL_PHY);
152}
153
154static struct mxc_usbh_platform_data dr_utmi_config = {
155 .init = initialize_otg_port,
156 .portsc = MXC_EHCI_UTMI_16BIT,
157};
158
159/* PCBID2 PCBID1 PCBID0 STATE 84/* PCBID2 PCBID1 PCBID0 STATE
160 1 1 1 ER1:rev1.1 85 1 1 1 ER1:rev1.1
161 1 1 0 ER2:rev1.2 86 1 1 0 ER2:rev1.2
@@ -254,47 +179,6 @@ static const struct gpio_keys_platform_data mx51_efikamx_powerkey_data __initcon
254 .nbuttons = ARRAY_SIZE(mx51_efikamx_powerkey), 179 .nbuttons = ARRAY_SIZE(mx51_efikamx_powerkey),
255}; 180};
256 181
257static struct mtd_partition mx51_efikamx_spi_nor_partitions[] = {
258 {
259 .name = "u-boot",
260 .offset = 0,
261 .size = SZ_256K,
262 },
263 {
264 .name = "config",
265 .offset = MTDPART_OFS_APPEND,
266 .size = SZ_64K,
267 },
268};
269
270static struct flash_platform_data mx51_efikamx_spi_flash_data = {
271 .name = "spi_flash",
272 .parts = mx51_efikamx_spi_nor_partitions,
273 .nr_parts = ARRAY_SIZE(mx51_efikamx_spi_nor_partitions),
274 .type = "sst25vf032b",
275};
276
277static struct spi_board_info mx51_efikamx_spi_board_info[] __initdata = {
278 {
279 .modalias = "m25p80",
280 .max_speed_hz = 25000000,
281 .bus_num = 0,
282 .chip_select = 1,
283 .platform_data = &mx51_efikamx_spi_flash_data,
284 .irq = -1,
285 },
286};
287
288static int mx51_efikamx_spi_cs[] = {
289 EFIKAMX_SPI_CS0,
290 EFIKAMX_SPI_CS1,
291};
292
293static const struct spi_imx_master mx51_efikamx_spi_pdata __initconst = {
294 .chipselect = mx51_efikamx_spi_cs,
295 .num_chipselect = ARRAY_SIZE(mx51_efikamx_spi_cs),
296};
297
298void mx51_efikamx_reset(void) 182void mx51_efikamx_reset(void)
299{ 183{
300 if (system_rev == 0x11) 184 if (system_rev == 0x11)
@@ -307,12 +191,9 @@ static void __init mx51_efikamx_init(void)
307{ 191{
308 mxc_iomux_v3_setup_multiple_pads(mx51efikamx_pads, 192 mxc_iomux_v3_setup_multiple_pads(mx51efikamx_pads,
309 ARRAY_SIZE(mx51efikamx_pads)); 193 ARRAY_SIZE(mx51efikamx_pads));
194 efika_board_common_init();
195
310 mx51_efikamx_board_id(); 196 mx51_efikamx_board_id();
311 mxc_register_device(&mxc_usbdr_host_device, &dr_utmi_config);
312 imx51_add_imx_uart(0, &uart_pdata);
313 imx51_add_imx_uart(1, &uart_pdata);
314 imx51_add_imx_uart(2, &uart_pdata);
315 imx51_add_sdhci_esdhc_imx(0, NULL);
316 197
317 /* on < 1.2 boards both SD controllers are used */ 198 /* on < 1.2 boards both SD controllers are used */
318 if (system_rev < 0x12) { 199 if (system_rev < 0x12) {
@@ -323,10 +204,6 @@ static void __init mx51_efikamx_init(void)
323 platform_device_register(&mx51_efikamx_leds_device); 204 platform_device_register(&mx51_efikamx_leds_device);
324 imx51_add_gpio_keys(&mx51_efikamx_powerkey_data); 205 imx51_add_gpio_keys(&mx51_efikamx_powerkey_data);
325 206
326 spi_register_board_info(mx51_efikamx_spi_board_info,
327 ARRAY_SIZE(mx51_efikamx_spi_board_info));
328 imx51_add_ecspi(0, &mx51_efikamx_spi_pdata);
329
330 if (system_rev == 0x11) { 207 if (system_rev == 0x11) {
331 gpio_request(EFIKAMX_RESET1_1, "reset"); 208 gpio_request(EFIKAMX_RESET1_1, "reset");
332 gpio_direction_output(EFIKAMX_RESET1_1, 1); 209 gpio_direction_output(EFIKAMX_RESET1_1, 1);
diff --git a/arch/arm/mach-mx5/efika.h b/arch/arm/mach-mx5/efika.h
new file mode 100644
index 000000000000..c8280435934a
--- /dev/null
+++ b/arch/arm/mach-mx5/efika.h
@@ -0,0 +1,6 @@
1#ifndef _EFIKA_H
2#define _EFIKA_H
3
4void __init efika_board_common_init(void);
5
6#endif
diff --git a/arch/arm/mach-mx5/mx51_efika.c b/arch/arm/mach-mx5/mx51_efika.c
new file mode 100644
index 000000000000..a249ca3c4138
--- /dev/null
+++ b/arch/arm/mach-mx5/mx51_efika.c
@@ -0,0 +1,175 @@
1/*
2 * based on code from the following
3 * Copyright 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
4 * Copyright 2009-2010 Pegatron Corporation. All Rights Reserved.
5 * Copyright 2009-2010 Genesi USA, Inc. All Rights Reserved.
6 *
7 * The code contained herein is licensed under the GNU General Public
8 * License. You may obtain a copy of the GNU General Public License
9 * Version 2 or later at the following locations:
10 *
11 * http://www.opensource.org/licenses/gpl-license.html
12 * http://www.gnu.org/copyleft/gpl.html
13 */
14
15#include <linux/init.h>
16#include <linux/platform_device.h>
17#include <linux/i2c.h>
18#include <linux/gpio.h>
19#include <linux/leds.h>
20#include <linux/input.h>
21#include <linux/delay.h>
22#include <linux/io.h>
23#include <linux/fsl_devices.h>
24#include <linux/spi/flash.h>
25#include <linux/spi/spi.h>
26
27#include <mach/common.h>
28#include <mach/hardware.h>
29#include <mach/iomux-mx51.h>
30#include <mach/i2c.h>
31#include <mach/mxc_ehci.h>
32
33#include <asm/irq.h>
34#include <asm/setup.h>
35#include <asm/mach-types.h>
36#include <asm/mach/arch.h>
37#include <asm/mach/time.h>
38
39#include "devices-imx51.h"
40#include "devices.h"
41#include "efika.h"
42
43#define MX51_USB_PLL_DIV_24_MHZ 0x01
44
45#define EFIKAMX_SPI_CS0 IMX_GPIO_NR(4, 24)
46#define EFIKAMX_SPI_CS1 IMX_GPIO_NR(4, 25)
47
48static iomux_v3_cfg_t mx51efika_pads[] = {
49 /* UART1 */
50 MX51_PAD_UART1_RXD__UART1_RXD,
51 MX51_PAD_UART1_TXD__UART1_TXD,
52 MX51_PAD_UART1_RTS__UART1_RTS,
53 MX51_PAD_UART1_CTS__UART1_CTS,
54
55 /* SD 1 */
56 MX51_PAD_SD1_CMD__SD1_CMD,
57 MX51_PAD_SD1_CLK__SD1_CLK,
58 MX51_PAD_SD1_DATA0__SD1_DATA0,
59 MX51_PAD_SD1_DATA1__SD1_DATA1,
60 MX51_PAD_SD1_DATA2__SD1_DATA2,
61 MX51_PAD_SD1_DATA3__SD1_DATA3,
62
63 /* SD 2 */
64 MX51_PAD_SD2_CMD__SD2_CMD,
65 MX51_PAD_SD2_CLK__SD2_CLK,
66 MX51_PAD_SD2_DATA0__SD2_DATA0,
67 MX51_PAD_SD2_DATA1__SD2_DATA1,
68 MX51_PAD_SD2_DATA2__SD2_DATA2,
69 MX51_PAD_SD2_DATA3__SD2_DATA3,
70
71 /* SD/MMC WP/CD */
72 MX51_PAD_GPIO1_0__SD1_CD,
73 MX51_PAD_GPIO1_1__SD1_WP,
74 MX51_PAD_GPIO1_7__SD2_WP,
75 MX51_PAD_GPIO1_8__SD2_CD,
76
77 /* spi */
78 MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI,
79 MX51_PAD_CSPI1_MISO__ECSPI1_MISO,
80 MX51_PAD_CSPI1_SS0__GPIO4_24,
81 MX51_PAD_CSPI1_SS1__GPIO4_25,
82 MX51_PAD_CSPI1_RDY__ECSPI1_RDY,
83 MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK,
84};
85
86/* Serial ports */
87static const struct imxuart_platform_data uart_pdata = {
88 .flags = IMXUART_HAVE_RTSCTS,
89};
90
91/* This function is board specific as the bit mask for the plldiv will also
92 * be different for other Freescale SoCs, thus a common bitmask is not
93 * possible and cannot get place in /plat-mxc/ehci.c.
94 */
95static int initialize_otg_port(struct platform_device *pdev)
96{
97 u32 v;
98 void __iomem *usb_base;
99 void __iomem *usbother_base;
100 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
101 if (!usb_base)
102 return -ENOMEM;
103 usbother_base = (void __iomem *)(usb_base + MX5_USBOTHER_REGS_OFFSET);
104
105 /* Set the PHY clock to 19.2MHz */
106 v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
107 v &= ~MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK;
108 v |= MX51_USB_PLL_DIV_24_MHZ;
109 __raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
110 iounmap(usb_base);
111
112 mdelay(10);
113
114 return mx51_initialize_usb_hw(0, MXC_EHCI_INTERNAL_PHY);
115}
116
117static struct mxc_usbh_platform_data dr_utmi_config = {
118 .init = initialize_otg_port,
119 .portsc = MXC_EHCI_UTMI_16BIT,
120};
121
122static struct mtd_partition mx51_efika_spi_nor_partitions[] = {
123 {
124 .name = "u-boot",
125 .offset = 0,
126 .size = SZ_256K,
127 },
128 {
129 .name = "config",
130 .offset = MTDPART_OFS_APPEND,
131 .size = SZ_64K,
132 },
133};
134
135static struct flash_platform_data mx51_efika_spi_flash_data = {
136 .name = "spi_flash",
137 .parts = mx51_efika_spi_nor_partitions,
138 .nr_parts = ARRAY_SIZE(mx51_efika_spi_nor_partitions),
139 .type = "sst25vf032b",
140};
141
142static struct spi_board_info mx51_efika_spi_board_info[] __initdata = {
143 {
144 .modalias = "m25p80",
145 .max_speed_hz = 25000000,
146 .bus_num = 0,
147 .chip_select = 1,
148 .platform_data = &mx51_efika_spi_flash_data,
149 .irq = -1,
150 },
151};
152
153static int mx51_efika_spi_cs[] = {
154 EFIKAMX_SPI_CS0,
155 EFIKAMX_SPI_CS1,
156};
157
158static const struct spi_imx_master mx51_efika_spi_pdata __initconst = {
159 .chipselect = mx51_efika_spi_cs,
160 .num_chipselect = ARRAY_SIZE(mx51_efika_spi_cs),
161};
162
163void __init efika_board_common_init(void)
164{
165 mxc_iomux_v3_setup_multiple_pads(mx51efika_pads,
166 ARRAY_SIZE(mx51efika_pads));
167 mxc_register_device(&mxc_usbdr_host_device, &dr_utmi_config);
168 imx51_add_imx_uart(0, &uart_pdata);
169 imx51_add_sdhci_esdhc_imx(0, NULL);
170
171 spi_register_board_info(mx51_efika_spi_board_info,
172 ARRAY_SIZE(mx51_efika_spi_board_info));
173 imx51_add_ecspi(0, &mx51_efika_spi_pdata);
174}
175