aboutsummaryrefslogtreecommitdiffstats
path: root/arch
diff options
context:
space:
mode:
authorUwe Kleine-König <u.kleine-koenig@pengutronix.de>2010-10-20 11:44:30 -0400
committerSascha Hauer <s.hauer@pengutronix.de>2010-10-21 15:52:01 -0400
commit662a74b4b2b7b471417b3778485332a93d07e409 (patch)
tree038db4bb2d7d022919b2df2db17fbee0c8a04637 /arch
parentf1de1613da54f754d5d2bbf79fcacbd5ed965537 (diff)
ARM: mx3: fix build failure concerning MXC_INT_MMC_SDHC2
Commit c074512 (imx-esdhc: update devices registration) renamed MX35_INT_MMC_SDHC2 to MX35_INT_ESDHC2 which broke expansion of the MXC_INT_MMC_SDHC2 macro. As (the only user of MXC_INT_MMC_SDHC2) is only used on mx31 use the MX31 prefixed symbol to define its resources. Moreover to reduce further confusion mxcsdhc_device0 is fixed accordingly and the MXC prefixed symbols are removed. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-mx3/devices.c16
-rw-r--r--arch/arm/plat-mxc/include/mach/mx31.h1
-rw-r--r--arch/arm/plat-mxc/include/mach/mx35.h2
3 files changed, 8 insertions, 11 deletions
diff --git a/arch/arm/mach-mx3/devices.c b/arch/arm/mach-mx3/devices.c
index f4dff11aaee7..d4da9496089a 100644
--- a/arch/arm/mach-mx3/devices.c
+++ b/arch/arm/mach-mx3/devices.c
@@ -72,24 +72,24 @@ struct platform_device mxc_w1_master_device = {
72#ifdef CONFIG_ARCH_MX31 72#ifdef CONFIG_ARCH_MX31
73static struct resource mxcsdhc0_resources[] = { 73static struct resource mxcsdhc0_resources[] = {
74 { 74 {
75 .start = MMC_SDHC1_BASE_ADDR, 75 .start = MX31_MMC_SDHC1_BASE_ADDR,
76 .end = MMC_SDHC1_BASE_ADDR + SZ_16K - 1, 76 .end = MX31_MMC_SDHC1_BASE_ADDR + SZ_16K - 1,
77 .flags = IORESOURCE_MEM, 77 .flags = IORESOURCE_MEM,
78 }, { 78 }, {
79 .start = MXC_INT_MMC_SDHC1, 79 .start = MX31_INT_MMC_SDHC1,
80 .end = MXC_INT_MMC_SDHC1, 80 .end = MX31_INT_MMC_SDHC1,
81 .flags = IORESOURCE_IRQ, 81 .flags = IORESOURCE_IRQ,
82 }, 82 },
83}; 83};
84 84
85static struct resource mxcsdhc1_resources[] = { 85static struct resource mxcsdhc1_resources[] = {
86 { 86 {
87 .start = MMC_SDHC2_BASE_ADDR, 87 .start = MX31_MMC_SDHC2_BASE_ADDR,
88 .end = MMC_SDHC2_BASE_ADDR + SZ_16K - 1, 88 .end = MX31_MMC_SDHC2_BASE_ADDR + SZ_16K - 1,
89 .flags = IORESOURCE_MEM, 89 .flags = IORESOURCE_MEM,
90 }, { 90 }, {
91 .start = MXC_INT_MMC_SDHC2, 91 .start = MX31_INT_MMC_SDHC2,
92 .end = MXC_INT_MMC_SDHC2, 92 .end = MX31_INT_MMC_SDHC2,
93 .flags = IORESOURCE_IRQ, 93 .flags = IORESOURCE_IRQ,
94 }, 94 },
95}; 95};
diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/plat-mxc/include/mach/mx31.h
index 03e2afabc9fc..61cfe827498b 100644
--- a/arch/arm/plat-mxc/include/mach/mx31.h
+++ b/arch/arm/plat-mxc/include/mach/mx31.h
@@ -240,7 +240,6 @@ static inline void mx31_setup_weimcs(size_t cs,
240#define MPEG4_ENC_BASE_ADDR MX31_MPEG4_ENC_BASE_ADDR 240#define MPEG4_ENC_BASE_ADDR MX31_MPEG4_ENC_BASE_ADDR
241#define MXC_INT_MPEG4_ENCODER MX31_INT_MPEG4_ENCODER 241#define MXC_INT_MPEG4_ENCODER MX31_INT_MPEG4_ENCODER
242#define MXC_INT_FIRI MX31_INT_FIRI 242#define MXC_INT_FIRI MX31_INT_FIRI
243#define MXC_INT_MMC_SDHC1 MX31_INT_MMC_SDHC1
244#define MXC_INT_MBX MX31_INT_MBX 243#define MXC_INT_MBX MX31_INT_MBX
245#define MXC_INT_CSPI3 MX31_INT_CSPI3 244#define MXC_INT_CSPI3 MX31_INT_CSPI3
246#define MXC_INT_SIM2 MX31_INT_SIM2 245#define MXC_INT_SIM2 MX31_INT_SIM2
diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/plat-mxc/include/mach/mx35.h
index ff905cb32458..6267cff6035d 100644
--- a/arch/arm/plat-mxc/include/mach/mx35.h
+++ b/arch/arm/plat-mxc/include/mach/mx35.h
@@ -197,8 +197,6 @@
197/* these should go away */ 197/* these should go away */
198#define MXC_FEC_BASE_ADDR MX35_FEC_BASE_ADDR 198#define MXC_FEC_BASE_ADDR MX35_FEC_BASE_ADDR
199#define MXC_INT_OWIRE MX35_INT_OWIRE 199#define MXC_INT_OWIRE MX35_INT_OWIRE
200#define MXC_INT_MMC_SDHC2 MX35_INT_MMC_SDHC2
201#define MXC_INT_MMC_SDHC3 MX35_INT_MMC_SDHC3
202#define MXC_INT_GPU2D MX35_INT_GPU2D 200#define MXC_INT_GPU2D MX35_INT_GPU2D
203#define MXC_INT_ASRC MX35_INT_ASRC 201#define MXC_INT_ASRC MX35_INT_ASRC
204#define MXC_INT_USBHS MX35_INT_USBHS 202#define MXC_INT_USBHS MX35_INT_USBHS