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authorUwe Kleine-König <u.kleine-koenig@pengutronix.de>2010-06-30 06:16:24 -0400
committerUwe Kleine-König <u.kleine-koenig@pengutronix.de>2010-07-26 08:27:25 -0400
commit2dcf78c0eeae3bd07082821557014f25f02ca2e9 (patch)
tree8ca5c4c7f35c9a9ab07fcd9732124c905e609aa1 /arch
parent6b6322676add0fa2713d0ec89a28390fd4d907f5 (diff)
parent5109a4597f7e758b8d20694392d0361a0b4c43b1 (diff)
Merge branch 'imx/for-2.6.36' of git://git.pengutronix.de/git/ukl/linux-2.6 into HEAD
There are some more conflicts than detected by git, namely support for the newly added cpuimx machines needed to be converted to dynamic device registration. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Conflicts: arch/arm/mach-imx/Makefile arch/arm/mach-imx/devices.c arch/arm/mach-imx/devices.h arch/arm/mach-imx/eukrea_mbimx27-baseboard.c arch/arm/mach-mx2/Kconfig arch/arm/mach-mx25/Makefile arch/arm/mach-mx25/devices.c arch/arm/plat-mxc/include/mach/mx25.h arch/arm/plat-mxc/include/mach/mxc_nand.h
Diffstat (limited to 'arch')
-rw-r--r--arch/alpha/Kconfig3
-rw-r--r--arch/alpha/include/asm/scatterlist.h19
-rw-r--r--arch/alpha/math-emu/sfp-util.h5
-rw-r--r--arch/arm/Makefile4
-rw-r--r--arch/arm/configs/s3c2410_defconfig99
-rw-r--r--arch/arm/configs/s3c6400_defconfig419
-rw-r--r--arch/arm/configs/s5p6440_defconfig29
-rw-r--r--arch/arm/configs/s5p6442_defconfig24
-rw-r--r--arch/arm/configs/s5pc100_defconfig233
-rw-r--r--arch/arm/configs/s5pc110_defconfig30
-rw-r--r--arch/arm/configs/s5pv210_defconfig33
-rw-r--r--arch/arm/include/asm/scatterlist.h3
-rw-r--r--arch/arm/mach-davinci/board-da850-evm.c19
-rw-r--r--arch/arm/mach-davinci/include/mach/mmc.h3
-rw-r--r--arch/arm/mach-imx/Kconfig (renamed from arch/arm/mach-mx2/Kconfig)93
-rw-r--r--arch/arm/mach-imx/Makefile (renamed from arch/arm/mach-mx2/Makefile)18
-rw-r--r--arch/arm/mach-imx/Makefile.boot (renamed from arch/arm/mach-mx2/Makefile.boot)4
-rw-r--r--arch/arm/mach-imx/clock-imx1.c (renamed from arch/arm/mach-mx1/clock.c)50
-rw-r--r--arch/arm/mach-imx/clock-imx21.c (renamed from arch/arm/mach-mx2/clock_imx21.c)0
-rw-r--r--arch/arm/mach-imx/clock-imx27.c (renamed from arch/arm/mach-mx2/clock_imx27.c)0
-rw-r--r--arch/arm/mach-imx/cpu-imx27.c (renamed from arch/arm/mach-mx2/cpu_imx27.c)0
-rw-r--r--arch/arm/mach-imx/devices-imx1.h18
-rw-r--r--arch/arm/mach-imx/devices-imx21.h30
-rw-r--r--arch/arm/mach-imx/devices-imx27.h38
-rw-r--r--arch/arm/mach-imx/devices.c (renamed from arch/arm/mach-mx2/devices.c)259
-rw-r--r--arch/arm/mach-imx/devices.h (renamed from arch/arm/mach-mx2/devices.h)30
-rw-r--r--arch/arm/mach-imx/dma-v1.c (renamed from arch/arm/plat-mxc/dma-mx1-mx2.c)4
-rw-r--r--arch/arm/mach-imx/eukrea_mbimx27-baseboard.c (renamed from arch/arm/mach-mx2/eukrea_mbimx27-baseboard.c)24
-rw-r--r--arch/arm/mach-imx/include/mach/dma-mx1-mx2.h10
-rw-r--r--arch/arm/mach-imx/include/mach/dma-v1.h (renamed from arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h)10
-rw-r--r--arch/arm/mach-imx/mach-cpuimx27.c (renamed from arch/arm/mach-mx2/mach-cpuimx27.c)25
-rw-r--r--arch/arm/mach-imx/mach-imx27lite.c (renamed from arch/arm/mach-mx2/mach-imx27lite.c)11
-rw-r--r--arch/arm/mach-imx/mach-mx1ads.c (renamed from arch/arm/mach-mx1/mach-mx1ads.c)34
-rw-r--r--arch/arm/mach-imx/mach-mx21ads.c (renamed from arch/arm/mach-mx2/mach-mx21ads.c)58
-rw-r--r--arch/arm/mach-imx/mach-mx27_3ds.c (renamed from arch/arm/mach-mx2/mach-mx27_3ds.c)17
-rw-r--r--arch/arm/mach-imx/mach-mx27ads.c (renamed from arch/arm/mach-mx2/mach-mx27ads.c)76
-rw-r--r--arch/arm/mach-imx/mach-mxt_td60.c (renamed from arch/arm/mach-mx2/mach-mxt_td60.c)36
-rw-r--r--arch/arm/mach-imx/mach-pca100.c (renamed from arch/arm/mach-mx2/mach-pca100.c)23
-rw-r--r--arch/arm/mach-imx/mach-pcm038.c (renamed from arch/arm/mach-mx2/mach-pcm038.c)33
-rw-r--r--arch/arm/mach-imx/mach-scb9328.c (renamed from arch/arm/mach-mx1/mach-scb9328.c)21
-rw-r--r--arch/arm/mach-imx/mm-imx1.c (renamed from arch/arm/mach-mx1/generic.c)23
-rw-r--r--arch/arm/mach-imx/mm-imx21.c (renamed from arch/arm/mach-mx2/mm-imx21.c)5
-rw-r--r--arch/arm/mach-imx/mm-imx27.c (renamed from arch/arm/mach-mx2/mm-imx27.c)5
-rw-r--r--arch/arm/mach-imx/mx1-camera-fiq-ksym.c (renamed from arch/arm/mach-mx1/ksym_mx1.c)0
-rw-r--r--arch/arm/mach-imx/mx1-camera-fiq.S (renamed from arch/arm/mach-mx1/mx1_camera_fiq.S)0
-rw-r--r--arch/arm/mach-imx/pcm970-baseboard.c (renamed from arch/arm/mach-mx2/pcm970-baseboard.c)0
-rw-r--r--arch/arm/mach-imx/pm-imx27.c (renamed from arch/arm/mach-mx2/pm-imx27.c)0
-rw-r--r--arch/arm/mach-mx1/Kconfig19
-rw-r--r--arch/arm/mach-mx1/Makefile15
-rw-r--r--arch/arm/mach-mx1/Makefile.boot4
-rw-r--r--arch/arm/mach-mx1/crm_regs.h55
-rw-r--r--arch/arm/mach-mx1/devices.c242
-rw-r--r--arch/arm/mach-mx1/devices.h7
-rw-r--r--arch/arm/mach-mx2/serial.c141
-rw-r--r--arch/arm/mach-mx25/Kconfig5
-rw-r--r--arch/arm/mach-mx25/Makefile2
-rw-r--r--arch/arm/mach-mx25/devices-imx25.h38
-rw-r--r--arch/arm/mach-mx25/devices.c231
-rw-r--r--arch/arm/mach-mx25/devices.h12
-rw-r--r--arch/arm/mach-mx25/eukrea_mbimxsd-baseboard.c5
-rw-r--r--arch/arm/mach-mx25/mach-cpuimx25.c19
-rw-r--r--arch/arm/mach-mx25/mach-mx25_3ds.c (renamed from arch/arm/mach-mx25/mach-mx25pdk.c)21
-rw-r--r--arch/arm/mach-mx25/mm.c7
-rw-r--r--arch/arm/mach-mx3/Kconfig29
-rw-r--r--arch/arm/mach-mx3/Makefile2
-rw-r--r--arch/arm/mach-mx3/devices-imx31.h38
-rw-r--r--arch/arm/mach-mx3/devices-imx35.h32
-rw-r--r--arch/arm/mach-mx3/devices.c247
-rw-r--r--arch/arm/mach-mx3/devices.h13
-rw-r--r--arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c5
-rw-r--r--arch/arm/mach-mx3/mach-armadillo5x0.c17
-rw-r--r--arch/arm/mach-mx3/mach-cpuimx35.c17
-rw-r--r--arch/arm/mach-mx3/mach-kzm_arm11_01.c31
-rw-r--r--arch/arm/mach-mx3/mach-mx31_3ds.c64
-rw-r--r--arch/arm/mach-mx3/mach-mx31ads.c55
-rw-r--r--arch/arm/mach-mx3/mach-mx31lilly.c14
-rw-r--r--arch/arm/mach-mx3/mach-mx31lite.c17
-rw-r--r--arch/arm/mach-mx3/mach-mx31moboard.c95
-rw-r--r--arch/arm/mach-mx3/mach-mx35_3ds.c (renamed from arch/arm/mach-mx3/mach-mx35pdk.c)16
-rw-r--r--arch/arm/mach-mx3/mach-pcm037.c31
-rw-r--r--arch/arm/mach-mx3/mach-pcm037_eet.c7
-rw-r--r--arch/arm/mach-mx3/mach-pcm043.c25
-rw-r--r--arch/arm/mach-mx3/mach-qong.c16
-rw-r--r--arch/arm/mach-mx3/mm.c7
-rw-r--r--arch/arm/mach-mx3/mx31lilly-db.c14
-rw-r--r--arch/arm/mach-mx3/mx31lite-db.c15
-rw-r--r--arch/arm/mach-mx3/mx31moboard-devboard.c10
-rw-r--r--arch/arm/mach-mx3/mx31moboard-marxbot.c4
-rw-r--r--arch/arm/mach-mx3/mx31moboard-smartbot.c11
-rw-r--r--arch/arm/mach-mx5/devices.c2
-rw-r--r--arch/arm/mach-mx5/mm.c3
-rw-r--r--arch/arm/mach-mxc91231/crm_regs.h5
-rw-r--r--arch/arm/mach-mxc91231/devices.c2
-rw-r--r--arch/arm/mach-mxc91231/mm.c8
-rw-r--r--arch/arm/mach-omap2/board-3430sdp.c4
-rw-r--r--arch/arm/mach-omap2/board-ldp.c3
-rw-r--r--arch/arm/mach-omap2/board-omap3evm.c4
-rw-r--r--arch/arm/mach-omap2/board-omap3pandora.c4
-rw-r--r--arch/arm/mach-omap2/board-omap3touchbook.c3
-rw-r--r--arch/arm/mach-orion5x/dns323-setup.c22
-rw-r--r--arch/arm/mach-s3c2440/mach-gta02.c76
-rw-r--r--arch/arm/mach-s3c64xx/clock.c6
-rw-r--r--arch/arm/mach-s5p6440/include/mach/irqs.h9
-rw-r--r--arch/arm/mach-s5p6442/include/mach/irqs.h5
-rw-r--r--arch/arm/mach-s5pc100/include/mach/irqs.h3
-rw-r--r--arch/arm/mach-s5pc100/include/mach/regs-gpio.h7
-rw-r--r--arch/arm/mach-s5pv210/include/mach/irqs.h14
-rw-r--r--arch/arm/mach-s5pv210/include/mach/regs-gpio.h14
-rw-r--r--arch/arm/mach-u300/i2c.c57
-rw-r--r--arch/arm/mach-u300/include/mach/irqs.h7
-rw-r--r--arch/arm/mach-ux500/board-mop500.c2
-rw-r--r--arch/arm/mach-ux500/clock.c2
-rw-r--r--arch/arm/mach-ux500/cpu-db8500.c4
-rw-r--r--arch/arm/mach-ux500/devices-db8500.c109
-rw-r--r--arch/arm/mach-ux500/include/mach/db8500-regs.h12
-rw-r--r--arch/arm/mach-ux500/include/mach/devices.h3
-rw-r--r--arch/arm/mach-ux500/ste-dma40-db8500.h154
-rw-r--r--arch/arm/plat-mxc/Kconfig10
-rw-r--r--arch/arm/plat-mxc/Makefile4
-rw-r--r--arch/arm/plat-mxc/audmux-v1.c4
-rw-r--r--arch/arm/plat-mxc/audmux-v2.c4
-rw-r--r--arch/arm/plat-mxc/devices.c33
-rw-r--r--arch/arm/plat-mxc/devices/Kconfig11
-rw-r--r--arch/arm/plat-mxc/devices/Makefile4
-rw-r--r--arch/arm/plat-mxc/devices/platform-imx-i2c.c29
-rw-r--r--arch/arm/plat-mxc/devices/platform-imx-uart.c60
-rw-r--r--arch/arm/plat-mxc/devices/platform-mxc_nand.c44
-rw-r--r--arch/arm/plat-mxc/devices/platform-spi_imx.c30
-rw-r--r--arch/arm/plat-mxc/ehci.c4
-rw-r--r--arch/arm/plat-mxc/include/mach/board-armadillo5x0.h15
-rw-r--r--arch/arm/plat-mxc/include/mach/board-eukrea_cpuimx27.h2
-rw-r--r--arch/arm/plat-mxc/include/mach/board-kzmarm11.h39
-rw-r--r--arch/arm/plat-mxc/include/mach/board-mx21ads.h52
-rw-r--r--arch/arm/plat-mxc/include/mach/board-mx27ads.h344
-rw-r--r--arch/arm/plat-mxc/include/mach/board-mx27lite.h14
-rw-r--r--arch/arm/plat-mxc/include/mach/board-mx27pdk.h14
-rw-r--r--arch/arm/plat-mxc/include/mach/board-mx31_3ds.h59
-rw-r--r--arch/arm/plat-mxc/include/mach/board-mx31ads.h117
-rw-r--r--arch/arm/plat-mxc/include/mach/board-mx31lilly.h2
-rw-r--r--arch/arm/plat-mxc/include/mach/board-mx31lite.h2
-rw-r--r--arch/arm/plat-mxc/include/mach/board-mx31moboard.h2
-rw-r--r--arch/arm/plat-mxc/include/mach/board-mx35pdk.h22
-rw-r--r--arch/arm/plat-mxc/include/mach/board-pcm037.h22
-rw-r--r--arch/arm/plat-mxc/include/mach/board-pcm038.h2
-rw-r--r--arch/arm/plat-mxc/include/mach/board-pcm043.h22
-rw-r--r--arch/arm/plat-mxc/include/mach/board-qong.h17
-rw-r--r--arch/arm/plat-mxc/include/mach/devices-common.h42
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-mxc91231.h4
-rw-r--r--arch/arm/plat-mxc/include/mach/mx1.h28
-rw-r--r--arch/arm/plat-mxc/include/mach/mx25.h36
-rw-r--r--arch/arm/plat-mxc/include/mach/mx27.h4
-rw-r--r--arch/arm/plat-mxc/include/mach/mx31.h4
-rw-r--r--arch/arm/plat-mxc/include/mach/mx35.h4
-rw-r--r--arch/arm/plat-mxc/include/mach/mx3_camera.h4
-rw-r--r--arch/arm/plat-mxc/include/mach/mxc91231.h4
-rw-r--r--arch/arm/plat-mxc/include/mach/mxc_nand.h6
-rw-r--r--arch/arm/plat-mxc/include/mach/system.h4
-rw-r--r--arch/arm/plat-mxc/include/mach/timex.h4
-rw-r--r--arch/arm/plat-mxc/include/mach/uncompress.h4
-rw-r--r--arch/arm/plat-mxc/include/mach/vmalloc.h4
-rw-r--r--arch/arm/plat-mxc/irq.c3
-rw-r--r--arch/arm/plat-mxc/system.c4
-rw-r--r--arch/arm/plat-mxc/tzic.c2
-rw-r--r--arch/arm/plat-omap/gpio.c104
-rw-r--r--arch/arm/plat-s5p/Kconfig1
-rw-r--r--arch/arm/plat-s5p/clock.c1
-rw-r--r--arch/arm/plat-s5p/include/plat/irqs.h7
-rw-r--r--arch/arm/plat-s5p/irq-eint.c15
-rw-r--r--arch/arm/plat-samsung/include/plat/gpio-cfg.h23
-rw-r--r--arch/avr32/include/asm/scatterlist.h20
-rw-r--r--arch/blackfin/include/asm/scatterlist.h22
-rw-r--r--arch/blackfin/kernel/ptrace.c33
-rw-r--r--arch/cris/include/asm/scatterlist.h17
-rw-r--r--arch/frv/include/asm/cache.h2
-rw-r--r--arch/frv/include/asm/mem-layout.h4
-rw-r--r--arch/frv/include/asm/scatterlist.h40
-rw-r--r--arch/frv/kernel/ptrace.c20
-rw-r--r--arch/frv/kernel/sysctl.c18
-rw-r--r--arch/h8300/include/asm/scatterlist.h12
-rw-r--r--arch/ia64/Kconfig11
-rw-r--r--arch/ia64/include/asm/acpi.h1
-rw-r--r--arch/ia64/include/asm/scatterlist.h4
-rw-r--r--arch/ia64/include/asm/topology.h5
-rw-r--r--arch/ia64/kernel/pci-swiotlb.c2
-rw-r--r--arch/ia64/kernel/ptrace.c4
-rw-r--r--arch/ia64/kernel/smpboot.c11
-rw-r--r--arch/ia64/pci/pci.c5
-rw-r--r--arch/m32r/include/asm/scatterlist.h15
-rw-r--r--arch/m68k/Kconfig1
-rw-r--r--arch/m68k/amiga/config.c174
-rw-r--r--arch/m68k/amiga/platform.c116
-rw-r--r--arch/m68k/include/asm/amigayle.h6
-rw-r--r--arch/m68k/include/asm/atomic.h2
-rw-r--r--arch/m68k/include/asm/cache.h2
-rw-r--r--arch/m68k/include/asm/scatterlist.h16
-rw-r--r--arch/microblaze/include/asm/scatterlist.h2
-rw-r--r--arch/mips/include/asm/scatterlist.h22
-rw-r--r--arch/mn10300/include/asm/scatterlist.h39
-rw-r--r--arch/parisc/Kconfig3
-rw-r--r--arch/parisc/include/asm/cacheflush.h16
-rw-r--r--arch/parisc/include/asm/scatterlist.h20
-rw-r--r--arch/parisc/kernel/asm-offsets.c15
-rw-r--r--arch/parisc/kernel/entry.S52
-rw-r--r--arch/parisc/kernel/syscall.S32
-rw-r--r--arch/parisc/math-emu/decode_exc.c1
-rw-r--r--arch/parisc/mm/fault.c7
-rw-r--r--arch/powerpc/Kconfig3
-rw-r--r--arch/powerpc/include/asm/scatterlist.h28
-rw-r--r--arch/powerpc/include/asm/sfp-machine.h6
-rw-r--r--arch/powerpc/kernel/dma-swiotlb.c4
-rw-r--r--arch/powerpc/kernel/dma.c12
-rw-r--r--arch/powerpc/platforms/cell/spufs/file.c3
-rw-r--r--arch/powerpc/platforms/cell/spufs/inode.c2
-rw-r--r--arch/powerpc/platforms/pseries/hvCall_inst.c10
-rw-r--r--arch/powerpc/sysdev/fsl_rio.c376
-rw-r--r--arch/s390/Kconfig8
-rw-r--r--arch/s390/boot/compressed/Makefile5
-rw-r--r--arch/s390/boot/compressed/misc.c4
-rw-r--r--arch/s390/include/asm/atomic.h19
-rw-r--r--arch/s390/include/asm/ccwdev.h10
-rw-r--r--arch/s390/include/asm/scatterlist.h2
-rw-r--r--arch/s390/include/asm/sfp-util.h2
-rw-r--r--arch/s390/kernel/asm-offsets.c4
-rw-r--r--arch/s390/kernel/entry64.S2
-rw-r--r--arch/s390/kernel/kprobes.c3
-rw-r--r--arch/s390/kernel/setup.c2
-rw-r--r--arch/s390/kernel/smp.c6
-rw-r--r--arch/s390/kvm/Kconfig11
-rw-r--r--arch/s390/kvm/sie64a.S4
-rw-r--r--arch/s390/mm/cmm.c109
-rw-r--r--arch/score/include/asm/scatterlist.h2
-rw-r--r--arch/sh/Kconfig3
-rw-r--r--arch/sh/kernel/ptrace_32.c23
-rw-r--r--arch/sh/math-emu/sfp-util.h4
-rw-r--r--arch/sparc/Kconfig3
-rw-r--r--arch/sparc/include/asm/scatterlist.h5
-rw-r--r--arch/sparc/kernel/perf_event.c108
-rw-r--r--arch/sparc/math-emu/sfp-util_32.h6
-rw-r--r--arch/sparc/math-emu/sfp-util_64.h6
-rw-r--r--arch/x86/Kconfig7
-rw-r--r--arch/x86/boot/compressed/relocs.c4
-rw-r--r--arch/x86/include/asm/acpi.h2
-rw-r--r--arch/x86/include/asm/cpufeature.h7
-rw-r--r--arch/x86/include/asm/mce.h8
-rw-r--r--arch/x86/include/asm/perf_event_p4.h3
-rw-r--r--arch/x86/include/asm/rdc321x_defs.h12
-rw-r--r--arch/x86/include/asm/scatterlist.h5
-rw-r--r--arch/x86/include/asm/thread_info.h4
-rw-r--r--arch/x86/include/asm/topology.h26
-rw-r--r--arch/x86/kernel/acpi/boot.c19
-rw-r--r--arch/x86/kernel/acpi/sleep.c2
-rw-r--r--arch/x86/kernel/apic/apic.c41
-rw-r--r--arch/x86/kernel/cpu/common.c6
-rw-r--r--arch/x86/kernel/cpu/cpufreq/powernow-k8.c6
-rw-r--r--arch/x86/kernel/cpu/mcheck/Makefile2
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce-apei.c138
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce-internal.h23
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce.c79
-rw-r--r--arch/x86/kernel/cpu/mcheck/therm_throt.c2
-rw-r--r--arch/x86/kernel/cpu/perf_event.c6
-rw-r--r--arch/x86/kernel/cpu/perf_event_p4.c41
-rw-r--r--arch/x86/kernel/cpuid.c2
-rw-r--r--arch/x86/kernel/msr.c2
-rw-r--r--arch/x86/kernel/pci-swiotlb.c2
-rw-r--r--arch/x86/kernel/setup.c11
-rw-r--r--arch/x86/kernel/setup_percpu.c4
-rw-r--r--arch/x86/kernel/smpboot.c26
-rw-r--r--arch/x86/lguest/boot.c1
-rw-r--r--arch/x86/mm/numa_64.c9
-rw-r--r--arch/x86/mm/pat.c10
-rw-r--r--arch/x86/mm/pat_internal.h6
-rw-r--r--arch/x86/mm/pat_rbtree.c7
-rw-r--r--arch/x86/mm/pf_in.c2
-rw-r--r--arch/x86/mm/pgtable_32.c1
-rw-r--r--arch/x86/pci/acpi.c8
-rw-r--r--arch/xtensa/include/asm/scatterlist.h23
276 files changed, 3880 insertions, 3617 deletions
diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig
index 24efdfe277fc..3e2e540a0f2a 100644
--- a/arch/alpha/Kconfig
+++ b/arch/alpha/Kconfig
@@ -61,6 +61,9 @@ config ZONE_DMA
61config NEED_DMA_MAP_STATE 61config NEED_DMA_MAP_STATE
62 def_bool y 62 def_bool y
63 63
64config NEED_SG_DMA_LENGTH
65 def_bool y
66
64config GENERIC_ISA_DMA 67config GENERIC_ISA_DMA
65 bool 68 bool
66 default y 69 default y
diff --git a/arch/alpha/include/asm/scatterlist.h b/arch/alpha/include/asm/scatterlist.h
index 440747ca6349..5728c52a7412 100644
--- a/arch/alpha/include/asm/scatterlist.h
+++ b/arch/alpha/include/asm/scatterlist.h
@@ -1,24 +1,7 @@
1#ifndef _ALPHA_SCATTERLIST_H 1#ifndef _ALPHA_SCATTERLIST_H
2#define _ALPHA_SCATTERLIST_H 2#define _ALPHA_SCATTERLIST_H
3 3
4#include <asm/page.h> 4#include <asm-generic/scatterlist.h>
5#include <asm/types.h>
6
7struct scatterlist {
8#ifdef CONFIG_DEBUG_SG
9 unsigned long sg_magic;
10#endif
11 unsigned long page_link;
12 unsigned int offset;
13
14 unsigned int length;
15
16 dma_addr_t dma_address;
17 __u32 dma_length;
18};
19
20#define sg_dma_address(sg) ((sg)->dma_address)
21#define sg_dma_len(sg) ((sg)->dma_length)
22 5
23#define ISA_DMA_THRESHOLD (~0UL) 6#define ISA_DMA_THRESHOLD (~0UL)
24 7
diff --git a/arch/alpha/math-emu/sfp-util.h b/arch/alpha/math-emu/sfp-util.h
index d4c6ae7fee47..f53707f77455 100644
--- a/arch/alpha/math-emu/sfp-util.h
+++ b/arch/alpha/math-emu/sfp-util.h
@@ -28,3 +28,8 @@ extern unsigned long __udiv_qrnnd (unsigned long *, unsigned long,
28#define UDIV_NEEDS_NORMALIZATION 1 28#define UDIV_NEEDS_NORMALIZATION 1
29 29
30#define abort() goto bad_insn 30#define abort() goto bad_insn
31
32#ifndef __LITTLE_ENDIAN
33#define __LITTLE_ENDIAN -1
34#endif
35#define __BYTE_ORDER __LITTLE_ENDIAN
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 64ba313724d2..ad81ece7f826 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -145,8 +145,8 @@ machine-$(CONFIG_ARCH_LOKI) := loki
145machine-$(CONFIG_ARCH_MMP) := mmp 145machine-$(CONFIG_ARCH_MMP) := mmp
146machine-$(CONFIG_ARCH_MSM) := msm 146machine-$(CONFIG_ARCH_MSM) := msm
147machine-$(CONFIG_ARCH_MV78XX0) := mv78xx0 147machine-$(CONFIG_ARCH_MV78XX0) := mv78xx0
148machine-$(CONFIG_ARCH_MX1) := mx1 148machine-$(CONFIG_ARCH_MX1) := imx
149machine-$(CONFIG_ARCH_MX2) := mx2 149machine-$(CONFIG_ARCH_MX2) := imx
150machine-$(CONFIG_ARCH_MX25) := mx25 150machine-$(CONFIG_ARCH_MX25) := mx25
151machine-$(CONFIG_ARCH_MX3) := mx3 151machine-$(CONFIG_ARCH_MX3) := mx3
152machine-$(CONFIG_ARCH_MX5) := mx5 152machine-$(CONFIG_ARCH_MX5) := mx5
diff --git a/arch/arm/configs/s3c2410_defconfig b/arch/arm/configs/s3c2410_defconfig
index 9236475e7131..44cea2ddd22b 100644
--- a/arch/arm/configs/s3c2410_defconfig
+++ b/arch/arm/configs/s3c2410_defconfig
@@ -1,12 +1,14 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.34 3# Linux kernel version: 2.6.34
4# Sat May 22 03:17:31 2010 4# Fri May 28 19:15:48 2010
5# 5#
6CONFIG_ARM=y 6CONFIG_ARM=y
7CONFIG_HAVE_PWM=y 7CONFIG_HAVE_PWM=y
8CONFIG_SYS_SUPPORTS_APM_EMULATION=y 8CONFIG_SYS_SUPPORTS_APM_EMULATION=y
9CONFIG_GENERIC_GPIO=y 9CONFIG_GENERIC_GPIO=y
10CONFIG_GENERIC_TIME=y
11CONFIG_ARCH_USES_GETTIMEOFFSET=y
10CONFIG_HAVE_PROC_CPU=y 12CONFIG_HAVE_PROC_CPU=y
11CONFIG_NO_IOPORT=y 13CONFIG_NO_IOPORT=y
12CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
@@ -35,6 +37,7 @@ CONFIG_INIT_ENV_ARG_LIMIT=32
35CONFIG_LOCALVERSION="" 37CONFIG_LOCALVERSION=""
36CONFIG_LOCALVERSION_AUTO=y 38CONFIG_LOCALVERSION_AUTO=y
37CONFIG_HAVE_KERNEL_GZIP=y 39CONFIG_HAVE_KERNEL_GZIP=y
40CONFIG_HAVE_KERNEL_LZMA=y
38CONFIG_HAVE_KERNEL_LZO=y 41CONFIG_HAVE_KERNEL_LZO=y
39CONFIG_KERNEL_GZIP=y 42CONFIG_KERNEL_GZIP=y
40# CONFIG_KERNEL_BZIP2 is not set 43# CONFIG_KERNEL_BZIP2 is not set
@@ -186,9 +189,11 @@ CONFIG_MMU=y
186# CONFIG_ARCH_INTEGRATOR is not set 189# CONFIG_ARCH_INTEGRATOR is not set
187# CONFIG_ARCH_REALVIEW is not set 190# CONFIG_ARCH_REALVIEW is not set
188# CONFIG_ARCH_VERSATILE is not set 191# CONFIG_ARCH_VERSATILE is not set
192# CONFIG_ARCH_VEXPRESS is not set
189# CONFIG_ARCH_AT91 is not set 193# CONFIG_ARCH_AT91 is not set
190# CONFIG_ARCH_BCMRING is not set 194# CONFIG_ARCH_BCMRING is not set
191# CONFIG_ARCH_CLPS711X is not set 195# CONFIG_ARCH_CLPS711X is not set
196# CONFIG_ARCH_CNS3XXX is not set
192# CONFIG_ARCH_GEMINI is not set 197# CONFIG_ARCH_GEMINI is not set
193# CONFIG_ARCH_EBSA110 is not set 198# CONFIG_ARCH_EBSA110 is not set
194# CONFIG_ARCH_EP93XX is not set 199# CONFIG_ARCH_EP93XX is not set
@@ -224,7 +229,7 @@ CONFIG_ARCH_S3C2410=y
224# CONFIG_ARCH_S3C64XX is not set 229# CONFIG_ARCH_S3C64XX is not set
225# CONFIG_ARCH_S5P6440 is not set 230# CONFIG_ARCH_S5P6440 is not set
226# CONFIG_ARCH_S5P6442 is not set 231# CONFIG_ARCH_S5P6442 is not set
227# CONFIG_ARCH_S5PC1XX is not set 232# CONFIG_ARCH_S5PC100 is not set
228# CONFIG_ARCH_S5PV210 is not set 233# CONFIG_ARCH_S5PV210 is not set
229# CONFIG_ARCH_SHARK is not set 234# CONFIG_ARCH_SHARK is not set
230# CONFIG_ARCH_LH7A40X is not set 235# CONFIG_ARCH_LH7A40X is not set
@@ -233,6 +238,7 @@ CONFIG_ARCH_S3C2410=y
233# CONFIG_ARCH_NOMADIK is not set 238# CONFIG_ARCH_NOMADIK is not set
234# CONFIG_ARCH_DAVINCI is not set 239# CONFIG_ARCH_DAVINCI is not set
235# CONFIG_ARCH_OMAP is not set 240# CONFIG_ARCH_OMAP is not set
241# CONFIG_PLAT_SPEAR is not set
236CONFIG_PLAT_SAMSUNG=y 242CONFIG_PLAT_SAMSUNG=y
237 243
238# 244#
@@ -243,11 +249,18 @@ CONFIG_S3C_BOOT_ERROR_RESET=y
243CONFIG_S3C_BOOT_UART_FORCE_FIFO=y 249CONFIG_S3C_BOOT_UART_FORCE_FIFO=y
244CONFIG_S3C_LOWLEVEL_UART_PORT=0 250CONFIG_S3C_LOWLEVEL_UART_PORT=0
245CONFIG_SAMSUNG_CLKSRC=y 251CONFIG_SAMSUNG_CLKSRC=y
252CONFIG_S3C_GPIO_CFG_S3C24XX=y
253CONFIG_S3C_GPIO_PULL_UPDOWN=y
254CONFIG_S3C_GPIO_PULL_UP=y
246CONFIG_SAMSUNG_GPIO_EXTRA=0 255CONFIG_SAMSUNG_GPIO_EXTRA=0
247CONFIG_S3C_GPIO_SPACE=0 256CONFIG_S3C_GPIO_SPACE=0
248CONFIG_S3C_ADC=y 257CONFIG_S3C_ADC=y
249CONFIG_S3C_DEV_HSMMC=y 258CONFIG_S3C_DEV_HSMMC=y
259CONFIG_S3C_DEV_HSMMC1=y
260CONFIG_S3C_DEV_HWMON=y
261CONFIG_S3C_DEV_FB=y
250CONFIG_S3C_DEV_USB_HOST=y 262CONFIG_S3C_DEV_USB_HOST=y
263CONFIG_S3C_DEV_WDT=y
251CONFIG_S3C_DEV_NAND=y 264CONFIG_S3C_DEV_NAND=y
252CONFIG_S3C_DMA=y 265CONFIG_S3C_DMA=y
253 266
@@ -260,6 +273,7 @@ CONFIG_PLAT_S3C24XX=y
260CONFIG_CPU_LLSERIAL_S3C2410=y 273CONFIG_CPU_LLSERIAL_S3C2410=y
261CONFIG_CPU_LLSERIAL_S3C2440=y 274CONFIG_CPU_LLSERIAL_S3C2440=y
262CONFIG_S3C2410_CLOCK=y 275CONFIG_S3C2410_CLOCK=y
276CONFIG_S3C2443_CLOCK=y
263CONFIG_S3C24XX_DCLK=y 277CONFIG_S3C24XX_DCLK=y
264CONFIG_S3C24XX_PWM=y 278CONFIG_S3C24XX_PWM=y
265CONFIG_S3C24XX_GPIO_EXTRA=128 279CONFIG_S3C24XX_GPIO_EXTRA=128
@@ -270,6 +284,7 @@ CONFIG_S3C2410_DMA=y
270# CONFIG_S3C2410_DMA_DEBUG is not set 284# CONFIG_S3C2410_DMA_DEBUG is not set
271CONFIG_MACH_SMDK=y 285CONFIG_MACH_SMDK=y
272CONFIG_S3C24XX_SIMTEC_AUDIO=y 286CONFIG_S3C24XX_SIMTEC_AUDIO=y
287CONFIG_S3C2410_SETUP_TS=y
273 288
274# 289#
275# S3C2400 Machines 290# S3C2400 Machines
@@ -289,6 +304,7 @@ CONFIG_ARCH_H1940=y
289# CONFIG_H1940BT is not set 304# CONFIG_H1940BT is not set
290CONFIG_PM_H1940=y 305CONFIG_PM_H1940=y
291CONFIG_MACH_N30=y 306CONFIG_MACH_N30=y
307CONFIG_MACH_N35=y
292CONFIG_ARCH_BAST=y 308CONFIG_ARCH_BAST=y
293CONFIG_MACH_OTOM=y 309CONFIG_MACH_OTOM=y
294CONFIG_MACH_AML_M5900=y 310CONFIG_MACH_AML_M5900=y
@@ -309,6 +325,13 @@ CONFIG_MACH_SMDK2413=y
309CONFIG_MACH_S3C2413=y 325CONFIG_MACH_S3C2413=y
310CONFIG_MACH_SMDK2412=y 326CONFIG_MACH_SMDK2412=y
311CONFIG_MACH_VSTMS=y 327CONFIG_MACH_VSTMS=y
328CONFIG_CPU_S3C2416=y
329CONFIG_S3C2416_DMA=y
330
331#
332# S3C2416 Machines
333#
334CONFIG_MACH_SMDK2416=y
312CONFIG_CPU_S3C2440=y 335CONFIG_CPU_S3C2440=y
313CONFIG_CPU_S3C2442=y 336CONFIG_CPU_S3C2442=y
314CONFIG_CPU_S3C244X=y 337CONFIG_CPU_S3C244X=y
@@ -320,9 +343,9 @@ CONFIG_S3C2440_DMA=y
320# S3C2440 and S3C2442 Machines 343# S3C2440 and S3C2442 Machines
321# 344#
322CONFIG_MACH_ANUBIS=y 345CONFIG_MACH_ANUBIS=y
323# CONFIG_MACH_NEO1973_GTA02 is not set 346CONFIG_MACH_NEO1973_GTA02=y
324CONFIG_MACH_OSIRIS=y 347CONFIG_MACH_OSIRIS=y
325# CONFIG_MACH_OSIRIS_DVS is not set 348CONFIG_MACH_OSIRIS_DVS=m
326CONFIG_MACH_RX3715=y 349CONFIG_MACH_RX3715=y
327CONFIG_ARCH_S3C2440=y 350CONFIG_ARCH_S3C2440=y
328CONFIG_MACH_NEXCODER_2440=y 351CONFIG_MACH_NEXCODER_2440=y
@@ -330,6 +353,7 @@ CONFIG_SMDK2440_CPU2440=y
330CONFIG_SMDK2440_CPU2442=y 353CONFIG_SMDK2440_CPU2442=y
331CONFIG_MACH_AT2440EVB=y 354CONFIG_MACH_AT2440EVB=y
332CONFIG_MACH_MINI2440=y 355CONFIG_MACH_MINI2440=y
356CONFIG_MACH_RX1950=y
333CONFIG_CPU_S3C2443=y 357CONFIG_CPU_S3C2443=y
334CONFIG_S3C2443_DMA=y 358CONFIG_S3C2443_DMA=y
335 359
@@ -410,6 +434,7 @@ CONFIG_ALIGNMENT_TRAP=y
410CONFIG_ZBOOT_ROM_TEXT=0x0 434CONFIG_ZBOOT_ROM_TEXT=0x0
411CONFIG_ZBOOT_ROM_BSS=0x0 435CONFIG_ZBOOT_ROM_BSS=0x0
412CONFIG_CMDLINE="root=/dev/hda1 ro init=/bin/bash console=ttySAC0" 436CONFIG_CMDLINE="root=/dev/hda1 ro init=/bin/bash console=ttySAC0"
437# CONFIG_CMDLINE_FORCE is not set
413# CONFIG_XIP_KERNEL is not set 438# CONFIG_XIP_KERNEL is not set
414# CONFIG_KEXEC is not set 439# CONFIG_KEXEC is not set
415 440
@@ -509,7 +534,9 @@ CONFIG_TCP_CONG_ILLINOIS=m
509# CONFIG_DEFAULT_BIC is not set 534# CONFIG_DEFAULT_BIC is not set
510CONFIG_DEFAULT_CUBIC=y 535CONFIG_DEFAULT_CUBIC=y
511# CONFIG_DEFAULT_HTCP is not set 536# CONFIG_DEFAULT_HTCP is not set
537# CONFIG_DEFAULT_HYBLA is not set
512# CONFIG_DEFAULT_VEGAS is not set 538# CONFIG_DEFAULT_VEGAS is not set
539# CONFIG_DEFAULT_VENO is not set
513# CONFIG_DEFAULT_WESTWOOD is not set 540# CONFIG_DEFAULT_WESTWOOD is not set
514# CONFIG_DEFAULT_RENO is not set 541# CONFIG_DEFAULT_RENO is not set
515CONFIG_DEFAULT_TCP_CONG="cubic" 542CONFIG_DEFAULT_TCP_CONG="cubic"
@@ -566,6 +593,16 @@ CONFIG_NF_CONNTRACK_TFTP=m
566CONFIG_NF_CT_NETLINK=m 593CONFIG_NF_CT_NETLINK=m
567# CONFIG_NETFILTER_TPROXY is not set 594# CONFIG_NETFILTER_TPROXY is not set
568CONFIG_NETFILTER_XTABLES=m 595CONFIG_NETFILTER_XTABLES=m
596
597#
598# Xtables combined modules
599#
600CONFIG_NETFILTER_XT_MARK=m
601CONFIG_NETFILTER_XT_CONNMARK=m
602
603#
604# Xtables targets
605#
569CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m 606CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
570CONFIG_NETFILTER_XT_TARGET_CONNMARK=m 607CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
571# CONFIG_NETFILTER_XT_TARGET_CT is not set 608# CONFIG_NETFILTER_XT_TARGET_CT is not set
@@ -577,9 +614,14 @@ CONFIG_NETFILTER_XT_TARGET_NFLOG=m
577CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m 614CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
578# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set 615# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set
579CONFIG_NETFILTER_XT_TARGET_RATEEST=m 616CONFIG_NETFILTER_XT_TARGET_RATEEST=m
617# CONFIG_NETFILTER_XT_TARGET_TEE is not set
580# CONFIG_NETFILTER_XT_TARGET_TRACE is not set 618# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
581CONFIG_NETFILTER_XT_TARGET_TCPMSS=m 619CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
582# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set 620# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set
621
622#
623# Xtables matches
624#
583CONFIG_NETFILTER_XT_MATCH_CLUSTER=m 625CONFIG_NETFILTER_XT_MATCH_CLUSTER=m
584CONFIG_NETFILTER_XT_MATCH_COMMENT=m 626CONFIG_NETFILTER_XT_MATCH_COMMENT=m
585CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m 627CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
@@ -598,6 +640,7 @@ CONFIG_NETFILTER_XT_MATCH_LIMIT=m
598CONFIG_NETFILTER_XT_MATCH_MAC=m 640CONFIG_NETFILTER_XT_MATCH_MAC=m
599CONFIG_NETFILTER_XT_MATCH_MARK=m 641CONFIG_NETFILTER_XT_MATCH_MARK=m
600CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m 642CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
643# CONFIG_NETFILTER_XT_MATCH_OSF is not set
601CONFIG_NETFILTER_XT_MATCH_OWNER=m 644CONFIG_NETFILTER_XT_MATCH_OWNER=m
602CONFIG_NETFILTER_XT_MATCH_POLICY=m 645CONFIG_NETFILTER_XT_MATCH_POLICY=m
603CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m 646CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
@@ -605,7 +648,6 @@ CONFIG_NETFILTER_XT_MATCH_QUOTA=m
605CONFIG_NETFILTER_XT_MATCH_RATEEST=m 648CONFIG_NETFILTER_XT_MATCH_RATEEST=m
606CONFIG_NETFILTER_XT_MATCH_REALM=m 649CONFIG_NETFILTER_XT_MATCH_REALM=m
607CONFIG_NETFILTER_XT_MATCH_RECENT=m 650CONFIG_NETFILTER_XT_MATCH_RECENT=m
608# CONFIG_NETFILTER_XT_MATCH_RECENT_PROC_COMPAT is not set
609CONFIG_NETFILTER_XT_MATCH_SCTP=m 651CONFIG_NETFILTER_XT_MATCH_SCTP=m
610CONFIG_NETFILTER_XT_MATCH_STATE=m 652CONFIG_NETFILTER_XT_MATCH_STATE=m
611CONFIG_NETFILTER_XT_MATCH_STATISTIC=m 653CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
@@ -613,7 +655,6 @@ CONFIG_NETFILTER_XT_MATCH_STRING=m
613CONFIG_NETFILTER_XT_MATCH_TCPMSS=m 655CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
614CONFIG_NETFILTER_XT_MATCH_TIME=m 656CONFIG_NETFILTER_XT_MATCH_TIME=m
615CONFIG_NETFILTER_XT_MATCH_U32=m 657CONFIG_NETFILTER_XT_MATCH_U32=m
616# CONFIG_NETFILTER_XT_MATCH_OSF is not set
617CONFIG_IP_VS=m 658CONFIG_IP_VS=m
618# CONFIG_IP_VS_IPV6 is not set 659# CONFIG_IP_VS_IPV6 is not set
619# CONFIG_IP_VS_DEBUG is not set 660# CONFIG_IP_VS_DEBUG is not set
@@ -713,6 +754,7 @@ CONFIG_IP6_NF_RAW=m
713# CONFIG_RDS is not set 754# CONFIG_RDS is not set
714# CONFIG_TIPC is not set 755# CONFIG_TIPC is not set
715# CONFIG_ATM is not set 756# CONFIG_ATM is not set
757# CONFIG_L2TP is not set
716# CONFIG_BRIDGE is not set 758# CONFIG_BRIDGE is not set
717# CONFIG_NET_DSA is not set 759# CONFIG_NET_DSA is not set
718# CONFIG_VLAN_8021Q is not set 760# CONFIG_VLAN_8021Q is not set
@@ -739,6 +781,7 @@ CONFIG_NET_CLS_ROUTE=y
739# CONFIG_IRDA is not set 781# CONFIG_IRDA is not set
740CONFIG_BT=m 782CONFIG_BT=m
741CONFIG_BT_L2CAP=m 783CONFIG_BT_L2CAP=m
784# CONFIG_BT_L2CAP_EXT_FEATURES is not set
742CONFIG_BT_SCO=m 785CONFIG_BT_SCO=m
743CONFIG_BT_RFCOMM=m 786CONFIG_BT_RFCOMM=m
744CONFIG_BT_RFCOMM_TTY=y 787CONFIG_BT_RFCOMM_TTY=y
@@ -775,6 +818,7 @@ CONFIG_CFG80211_WEXT=y
775CONFIG_WIRELESS_EXT_SYSFS=y 818CONFIG_WIRELESS_EXT_SYSFS=y
776# CONFIG_LIB80211 is not set 819# CONFIG_LIB80211 is not set
777CONFIG_MAC80211=m 820CONFIG_MAC80211=m
821CONFIG_MAC80211_HAS_RC=y
778CONFIG_MAC80211_RC_MINSTREL=y 822CONFIG_MAC80211_RC_MINSTREL=y
779# CONFIG_MAC80211_RC_DEFAULT_PID is not set 823# CONFIG_MAC80211_RC_DEFAULT_PID is not set
780CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y 824CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
@@ -785,6 +829,7 @@ CONFIG_MAC80211_LEDS=y
785# CONFIG_WIMAX is not set 829# CONFIG_WIMAX is not set
786# CONFIG_RFKILL is not set 830# CONFIG_RFKILL is not set
787# CONFIG_NET_9P is not set 831# CONFIG_NET_9P is not set
832# CONFIG_CAIF is not set
788 833
789# 834#
790# Device Drivers 835# Device Drivers
@@ -828,6 +873,7 @@ CONFIG_MTD_BLOCK=y
828# CONFIG_INFTL is not set 873# CONFIG_INFTL is not set
829# CONFIG_RFD_FTL is not set 874# CONFIG_RFD_FTL is not set
830# CONFIG_SSFDC is not set 875# CONFIG_SSFDC is not set
876# CONFIG_SM_FTL is not set
831# CONFIG_MTD_OOPS is not set 877# CONFIG_MTD_OOPS is not set
832 878
833# 879#
@@ -882,9 +928,12 @@ CONFIG_MTD_ROM=y
882# CONFIG_MTD_DOC2001 is not set 928# CONFIG_MTD_DOC2001 is not set
883# CONFIG_MTD_DOC2001PLUS is not set 929# CONFIG_MTD_DOC2001PLUS is not set
884CONFIG_MTD_NAND=y 930CONFIG_MTD_NAND=y
885# CONFIG_MTD_NAND_VERIFY_WRITE is not set 931CONFIG_MTD_NAND_ECC=y
886# CONFIG_MTD_NAND_ECC_SMC is not set 932# CONFIG_MTD_NAND_ECC_SMC is not set
933# CONFIG_MTD_NAND_VERIFY_WRITE is not set
934# CONFIG_MTD_SM_COMMON is not set
887# CONFIG_MTD_NAND_MUSEUM_IDS is not set 935# CONFIG_MTD_NAND_MUSEUM_IDS is not set
936CONFIG_MTD_NAND_DENALI_SCRATCH_REG_ADDR=0xFF108018
888# CONFIG_MTD_NAND_GPIO is not set 937# CONFIG_MTD_NAND_GPIO is not set
889CONFIG_MTD_NAND_IDS=y 938CONFIG_MTD_NAND_IDS=y
890CONFIG_MTD_NAND_S3C2410=y 939CONFIG_MTD_NAND_S3C2410=y
@@ -1149,6 +1198,7 @@ CONFIG_KEYBOARD_ATKBD=y
1149# CONFIG_QT2160 is not set 1198# CONFIG_QT2160 is not set
1150# CONFIG_KEYBOARD_LKKBD is not set 1199# CONFIG_KEYBOARD_LKKBD is not set
1151# CONFIG_KEYBOARD_GPIO is not set 1200# CONFIG_KEYBOARD_GPIO is not set
1201# CONFIG_KEYBOARD_TCA6416 is not set
1152# CONFIG_KEYBOARD_MATRIX is not set 1202# CONFIG_KEYBOARD_MATRIX is not set
1153# CONFIG_KEYBOARD_LM8323 is not set 1203# CONFIG_KEYBOARD_LM8323 is not set
1154# CONFIG_KEYBOARD_MAX7359 is not set 1204# CONFIG_KEYBOARD_MAX7359 is not set
@@ -1212,6 +1262,7 @@ CONFIG_INPUT_TOUCHSCREEN=y
1212# CONFIG_TOUCHSCREEN_AD7879_SPI is not set 1262# CONFIG_TOUCHSCREEN_AD7879_SPI is not set
1213# CONFIG_TOUCHSCREEN_AD7879 is not set 1263# CONFIG_TOUCHSCREEN_AD7879 is not set
1214# CONFIG_TOUCHSCREEN_DYNAPRO is not set 1264# CONFIG_TOUCHSCREEN_DYNAPRO is not set
1265# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set
1215# CONFIG_TOUCHSCREEN_EETI is not set 1266# CONFIG_TOUCHSCREEN_EETI is not set
1216# CONFIG_TOUCHSCREEN_FUJITSU is not set 1267# CONFIG_TOUCHSCREEN_FUJITSU is not set
1217# CONFIG_TOUCHSCREEN_S3C2410 is not set 1268# CONFIG_TOUCHSCREEN_S3C2410 is not set
@@ -1248,6 +1299,7 @@ CONFIG_TOUCHSCREEN_USB_NEXIO=y
1248# CONFIG_TOUCHSCREEN_TSC2007 is not set 1299# CONFIG_TOUCHSCREEN_TSC2007 is not set
1249# CONFIG_TOUCHSCREEN_W90X900 is not set 1300# CONFIG_TOUCHSCREEN_W90X900 is not set
1250CONFIG_INPUT_MISC=y 1301CONFIG_INPUT_MISC=y
1302# CONFIG_INPUT_AD714X is not set
1251CONFIG_INPUT_ATI_REMOTE=m 1303CONFIG_INPUT_ATI_REMOTE=m
1252CONFIG_INPUT_ATI_REMOTE2=m 1304CONFIG_INPUT_ATI_REMOTE2=m
1253CONFIG_INPUT_KEYSPAN_REMOTE=m 1305CONFIG_INPUT_KEYSPAN_REMOTE=m
@@ -1255,6 +1307,8 @@ CONFIG_INPUT_POWERMATE=m
1255CONFIG_INPUT_YEALINK=m 1307CONFIG_INPUT_YEALINK=m
1256CONFIG_INPUT_CM109=m 1308CONFIG_INPUT_CM109=m
1257CONFIG_INPUT_UINPUT=m 1309CONFIG_INPUT_UINPUT=m
1310# CONFIG_INPUT_PCF50633_PMU is not set
1311# CONFIG_INPUT_PCF8574 is not set
1258CONFIG_INPUT_GPIO_ROTARY_ENCODER=m 1312CONFIG_INPUT_GPIO_ROTARY_ENCODER=m
1259 1313
1260# 1314#
@@ -1287,6 +1341,7 @@ CONFIG_SERIAL_NONSTANDARD=y
1287# CONFIG_MOXA_INTELLIO is not set 1341# CONFIG_MOXA_INTELLIO is not set
1288# CONFIG_MOXA_SMARTIO is not set 1342# CONFIG_MOXA_SMARTIO is not set
1289# CONFIG_N_HDLC is not set 1343# CONFIG_N_HDLC is not set
1344# CONFIG_N_GSM is not set
1290# CONFIG_RISCOM8 is not set 1345# CONFIG_RISCOM8 is not set
1291# CONFIG_SPECIALIX is not set 1346# CONFIG_SPECIALIX is not set
1292# CONFIG_STALDRV is not set 1347# CONFIG_STALDRV is not set
@@ -1324,6 +1379,8 @@ CONFIG_SERIAL_S3C2440=y
1324CONFIG_SERIAL_CORE=y 1379CONFIG_SERIAL_CORE=y
1325CONFIG_SERIAL_CORE_CONSOLE=y 1380CONFIG_SERIAL_CORE_CONSOLE=y
1326# CONFIG_SERIAL_TIMBERDALE is not set 1381# CONFIG_SERIAL_TIMBERDALE is not set
1382# CONFIG_SERIAL_ALTERA_JTAGUART is not set
1383# CONFIG_SERIAL_ALTERA_UART is not set
1327CONFIG_UNIX98_PTYS=y 1384CONFIG_UNIX98_PTYS=y
1328# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 1385# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
1329CONFIG_LEGACY_PTYS=y 1386CONFIG_LEGACY_PTYS=y
@@ -1439,7 +1496,16 @@ CONFIG_GPIOLIB=y
1439# AC97 GPIO expanders: 1496# AC97 GPIO expanders:
1440# 1497#
1441# CONFIG_W1 is not set 1498# CONFIG_W1 is not set
1442# CONFIG_POWER_SUPPLY is not set 1499CONFIG_POWER_SUPPLY=y
1500# CONFIG_POWER_SUPPLY_DEBUG is not set
1501# CONFIG_PDA_POWER is not set
1502# CONFIG_APM_POWER is not set
1503# CONFIG_TEST_POWER is not set
1504# CONFIG_BATTERY_DS2760 is not set
1505# CONFIG_BATTERY_DS2782 is not set
1506# CONFIG_BATTERY_BQ27x00 is not set
1507# CONFIG_BATTERY_MAX17040 is not set
1508# CONFIG_CHARGER_PCF50633 is not set
1443CONFIG_HWMON=y 1509CONFIG_HWMON=y
1444CONFIG_HWMON_VID=m 1510CONFIG_HWMON_VID=m
1445# CONFIG_HWMON_DEBUG_CHIP is not set 1511# CONFIG_HWMON_DEBUG_CHIP is not set
@@ -1499,6 +1565,7 @@ CONFIG_SENSORS_LM85=m
1499# CONFIG_SENSORS_SMSC47M192 is not set 1565# CONFIG_SENSORS_SMSC47M192 is not set
1500# CONFIG_SENSORS_SMSC47B397 is not set 1566# CONFIG_SENSORS_SMSC47B397 is not set
1501# CONFIG_SENSORS_ADS7828 is not set 1567# CONFIG_SENSORS_ADS7828 is not set
1568# CONFIG_SENSORS_ADS7871 is not set
1502# CONFIG_SENSORS_AMC6821 is not set 1569# CONFIG_SENSORS_AMC6821 is not set
1503# CONFIG_SENSORS_THMC50 is not set 1570# CONFIG_SENSORS_THMC50 is not set
1504# CONFIG_SENSORS_TMP401 is not set 1571# CONFIG_SENSORS_TMP401 is not set
@@ -1555,7 +1622,7 @@ CONFIG_MFD_SM501=y
1555# CONFIG_HTC_PASIC3 is not set 1622# CONFIG_HTC_PASIC3 is not set
1556# CONFIG_HTC_I2CPLD is not set 1623# CONFIG_HTC_I2CPLD is not set
1557# CONFIG_UCB1400_CORE is not set 1624# CONFIG_UCB1400_CORE is not set
1558# CONFIG_TPS65010 is not set 1625CONFIG_TPS65010=m
1559# CONFIG_TWL4030_CORE is not set 1626# CONFIG_TWL4030_CORE is not set
1560# CONFIG_MFD_TMIO is not set 1627# CONFIG_MFD_TMIO is not set
1561# CONFIG_MFD_T7L66XB is not set 1628# CONFIG_MFD_T7L66XB is not set
@@ -1568,8 +1635,10 @@ CONFIG_MFD_SM501=y
1568# CONFIG_MFD_WM831X is not set 1635# CONFIG_MFD_WM831X is not set
1569# CONFIG_MFD_WM8350_I2C is not set 1636# CONFIG_MFD_WM8350_I2C is not set
1570# CONFIG_MFD_WM8994 is not set 1637# CONFIG_MFD_WM8994 is not set
1571# CONFIG_MFD_PCF50633 is not set 1638CONFIG_MFD_PCF50633=y
1572# CONFIG_MFD_MC13783 is not set 1639# CONFIG_MFD_MC13783 is not set
1640# CONFIG_PCF50633_ADC is not set
1641CONFIG_PCF50633_GPIO=y
1573# CONFIG_AB3100_CORE is not set 1642# CONFIG_AB3100_CORE is not set
1574# CONFIG_EZX_PCAP is not set 1643# CONFIG_EZX_PCAP is not set
1575# CONFIG_AB4500_CORE is not set 1644# CONFIG_AB4500_CORE is not set
@@ -1685,6 +1754,7 @@ CONFIG_SND_S3C24XX_SOC_I2S=y
1685CONFIG_SND_S3C_I2SV2_SOC=m 1754CONFIG_SND_S3C_I2SV2_SOC=m
1686CONFIG_SND_S3C2412_SOC_I2S=m 1755CONFIG_SND_S3C2412_SOC_I2S=m
1687CONFIG_SND_S3C_SOC_AC97=m 1756CONFIG_SND_S3C_SOC_AC97=m
1757# CONFIG_SND_S3C24XX_SOC_NEO1973_GTA02_WM8753 is not set
1688CONFIG_SND_S3C24XX_SOC_JIVE_WM8750=m 1758CONFIG_SND_S3C24XX_SOC_JIVE_WM8750=m
1689CONFIG_SND_S3C24XX_SOC_SMDK2443_WM9710=m 1759CONFIG_SND_S3C24XX_SOC_SMDK2443_WM9710=m
1690CONFIG_SND_S3C24XX_SOC_LN2440SBC_ALC650=m 1760CONFIG_SND_S3C24XX_SOC_LN2440SBC_ALC650=m
@@ -1836,10 +1906,12 @@ CONFIG_USB_SERIAL_PL2303=y
1836# CONFIG_USB_SERIAL_TI is not set 1906# CONFIG_USB_SERIAL_TI is not set
1837# CONFIG_USB_SERIAL_CYBERJACK is not set 1907# CONFIG_USB_SERIAL_CYBERJACK is not set
1838# CONFIG_USB_SERIAL_XIRCOM is not set 1908# CONFIG_USB_SERIAL_XIRCOM is not set
1909CONFIG_USB_SERIAL_WWAN=m
1839CONFIG_USB_SERIAL_OPTION=m 1910CONFIG_USB_SERIAL_OPTION=m
1840# CONFIG_USB_SERIAL_OMNINET is not set 1911# CONFIG_USB_SERIAL_OMNINET is not set
1841# CONFIG_USB_SERIAL_OPTICON is not set 1912# CONFIG_USB_SERIAL_OPTICON is not set
1842# CONFIG_USB_SERIAL_VIVOPAY_SERIAL is not set 1913# CONFIG_USB_SERIAL_VIVOPAY_SERIAL is not set
1914# CONFIG_USB_SERIAL_ZIO is not set
1843# CONFIG_USB_SERIAL_DEBUG is not set 1915# CONFIG_USB_SERIAL_DEBUG is not set
1844 1916
1845# 1917#
@@ -1991,6 +2063,7 @@ CONFIG_RTC_INTF_DEV=y
1991# CONFIG_RTC_DRV_BQ4802 is not set 2063# CONFIG_RTC_DRV_BQ4802 is not set
1992# CONFIG_RTC_DRV_RP5C01 is not set 2064# CONFIG_RTC_DRV_RP5C01 is not set
1993# CONFIG_RTC_DRV_V3020 is not set 2065# CONFIG_RTC_DRV_V3020 is not set
2066# CONFIG_RTC_DRV_PCF50633 is not set
1994 2067
1995# 2068#
1996# on-CPU RTC drivers 2069# on-CPU RTC drivers
@@ -1999,10 +2072,6 @@ CONFIG_RTC_DRV_S3C=y
1999# CONFIG_DMADEVICES is not set 2072# CONFIG_DMADEVICES is not set
2000# CONFIG_AUXDISPLAY is not set 2073# CONFIG_AUXDISPLAY is not set
2001# CONFIG_UIO is not set 2074# CONFIG_UIO is not set
2002
2003#
2004# TI VLYNQ
2005#
2006# CONFIG_STAGING is not set 2075# CONFIG_STAGING is not set
2007 2076
2008# 2077#
@@ -2274,6 +2343,7 @@ CONFIG_HAVE_FUNCTION_TRACER=y
2274CONFIG_TRACING_SUPPORT=y 2343CONFIG_TRACING_SUPPORT=y
2275CONFIG_FTRACE=y 2344CONFIG_FTRACE=y
2276# CONFIG_FUNCTION_TRACER is not set 2345# CONFIG_FUNCTION_TRACER is not set
2346# CONFIG_IRQSOFF_TRACER is not set
2277# CONFIG_SCHED_TRACER is not set 2347# CONFIG_SCHED_TRACER is not set
2278# CONFIG_ENABLE_DEFAULT_TRACERS is not set 2348# CONFIG_ENABLE_DEFAULT_TRACERS is not set
2279# CONFIG_BOOT_TRACER is not set 2349# CONFIG_BOOT_TRACER is not set
@@ -2284,6 +2354,7 @@ CONFIG_BRANCH_PROFILE_NONE=y
2284# CONFIG_KMEMTRACE is not set 2354# CONFIG_KMEMTRACE is not set
2285# CONFIG_WORKQUEUE_TRACER is not set 2355# CONFIG_WORKQUEUE_TRACER is not set
2286# CONFIG_BLK_DEV_IO_TRACE is not set 2356# CONFIG_BLK_DEV_IO_TRACE is not set
2357# CONFIG_ATOMIC64_SELFTEST is not set
2287# CONFIG_SAMPLES is not set 2358# CONFIG_SAMPLES is not set
2288CONFIG_HAVE_ARCH_KGDB=y 2359CONFIG_HAVE_ARCH_KGDB=y
2289# CONFIG_KGDB is not set 2360# CONFIG_KGDB is not set
diff --git a/arch/arm/configs/s3c6400_defconfig b/arch/arm/configs/s3c6400_defconfig
index a3a9993e5cd0..2b642386f030 100644
--- a/arch/arm/configs/s3c6400_defconfig
+++ b/arch/arm/configs/s3c6400_defconfig
@@ -1,11 +1,14 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.34 3# Linux kernel version: 2.6.34
4# Sat May 22 03:17:32 2010 4# Fri May 28 19:05:39 2010
5# 5#
6CONFIG_ARM=y 6CONFIG_ARM=y
7CONFIG_HAVE_PWM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y 8CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y 9CONFIG_GENERIC_GPIO=y
10CONFIG_GENERIC_TIME=y
11CONFIG_ARCH_USES_GETTIMEOFFSET=y
9CONFIG_HAVE_PROC_CPU=y 12CONFIG_HAVE_PROC_CPU=y
10CONFIG_NO_IOPORT=y 13CONFIG_NO_IOPORT=y
11CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
@@ -34,6 +37,7 @@ CONFIG_INIT_ENV_ARG_LIMIT=32
34CONFIG_LOCALVERSION="" 37CONFIG_LOCALVERSION=""
35CONFIG_LOCALVERSION_AUTO=y 38CONFIG_LOCALVERSION_AUTO=y
36CONFIG_HAVE_KERNEL_GZIP=y 39CONFIG_HAVE_KERNEL_GZIP=y
40CONFIG_HAVE_KERNEL_LZMA=y
37CONFIG_HAVE_KERNEL_LZO=y 41CONFIG_HAVE_KERNEL_LZO=y
38CONFIG_KERNEL_GZIP=y 42CONFIG_KERNEL_GZIP=y
39# CONFIG_KERNEL_BZIP2 is not set 43# CONFIG_KERNEL_BZIP2 is not set
@@ -179,9 +183,11 @@ CONFIG_MMU=y
179# CONFIG_ARCH_INTEGRATOR is not set 183# CONFIG_ARCH_INTEGRATOR is not set
180# CONFIG_ARCH_REALVIEW is not set 184# CONFIG_ARCH_REALVIEW is not set
181# CONFIG_ARCH_VERSATILE is not set 185# CONFIG_ARCH_VERSATILE is not set
186# CONFIG_ARCH_VEXPRESS is not set
182# CONFIG_ARCH_AT91 is not set 187# CONFIG_ARCH_AT91 is not set
183# CONFIG_ARCH_BCMRING is not set 188# CONFIG_ARCH_BCMRING is not set
184# CONFIG_ARCH_CLPS711X is not set 189# CONFIG_ARCH_CLPS711X is not set
190# CONFIG_ARCH_CNS3XXX is not set
185# CONFIG_ARCH_GEMINI is not set 191# CONFIG_ARCH_GEMINI is not set
186# CONFIG_ARCH_EBSA110 is not set 192# CONFIG_ARCH_EBSA110 is not set
187# CONFIG_ARCH_EP93XX is not set 193# CONFIG_ARCH_EP93XX is not set
@@ -217,7 +223,7 @@ CONFIG_MMU=y
217CONFIG_ARCH_S3C64XX=y 223CONFIG_ARCH_S3C64XX=y
218# CONFIG_ARCH_S5P6440 is not set 224# CONFIG_ARCH_S5P6440 is not set
219# CONFIG_ARCH_S5P6442 is not set 225# CONFIG_ARCH_S5P6442 is not set
220# CONFIG_ARCH_S5PC1XX is not set 226# CONFIG_ARCH_S5PC100 is not set
221# CONFIG_ARCH_S5PV210 is not set 227# CONFIG_ARCH_S5PV210 is not set
222# CONFIG_ARCH_SHARK is not set 228# CONFIG_ARCH_SHARK is not set
223# CONFIG_ARCH_LH7A40X is not set 229# CONFIG_ARCH_LH7A40X is not set
@@ -226,6 +232,7 @@ CONFIG_ARCH_S3C64XX=y
226# CONFIG_ARCH_NOMADIK is not set 232# CONFIG_ARCH_NOMADIK is not set
227# CONFIG_ARCH_DAVINCI is not set 233# CONFIG_ARCH_DAVINCI is not set
228# CONFIG_ARCH_OMAP is not set 234# CONFIG_ARCH_OMAP is not set
235# CONFIG_PLAT_SPEAR is not set
229CONFIG_PLAT_SAMSUNG=y 236CONFIG_PLAT_SAMSUNG=y
230 237
231# 238#
@@ -247,11 +254,17 @@ CONFIG_S3C_GPIO_TRACK=y
247# CONFIG_S3C_ADC is not set 254# CONFIG_S3C_ADC is not set
248CONFIG_S3C_DEV_HSMMC=y 255CONFIG_S3C_DEV_HSMMC=y
249CONFIG_S3C_DEV_HSMMC1=y 256CONFIG_S3C_DEV_HSMMC1=y
257CONFIG_S3C_DEV_HSMMC2=y
258CONFIG_S3C_DEV_HWMON=y
250CONFIG_S3C_DEV_I2C1=y 259CONFIG_S3C_DEV_I2C1=y
251CONFIG_S3C_DEV_FB=y 260CONFIG_S3C_DEV_FB=y
252CONFIG_S3C_DEV_USB_HOST=y 261CONFIG_S3C_DEV_USB_HOST=y
253CONFIG_S3C_DEV_USB_HSOTG=y 262CONFIG_S3C_DEV_USB_HSOTG=y
263CONFIG_S3C_DEV_WDT=y
254CONFIG_S3C_DEV_NAND=y 264CONFIG_S3C_DEV_NAND=y
265CONFIG_S3C_DEV_RTC=y
266CONFIG_SAMSUNG_DEV_ADC=y
267CONFIG_SAMSUNG_DEV_TS=y
255CONFIG_S3C_DMA=y 268CONFIG_S3C_DMA=y
256 269
257# 270#
@@ -260,7 +273,9 @@ CONFIG_S3C_DMA=y
260# CONFIG_SAMSUNG_PM_DEBUG is not set 273# CONFIG_SAMSUNG_PM_DEBUG is not set
261# CONFIG_S3C_PM_DEBUG_LED_SMDK is not set 274# CONFIG_S3C_PM_DEBUG_LED_SMDK is not set
262# CONFIG_SAMSUNG_PM_CHECK is not set 275# CONFIG_SAMSUNG_PM_CHECK is not set
276CONFIG_SAMSUNG_WAKEMASK=y
263CONFIG_PLAT_S3C64XX=y 277CONFIG_PLAT_S3C64XX=y
278CONFIG_CPU_S3C6400=y
264CONFIG_CPU_S3C6410=y 279CONFIG_CPU_S3C6410=y
265CONFIG_S3C64XX_DMA=y 280CONFIG_S3C64XX_DMA=y
266CONFIG_S3C64XX_SETUP_SDHCI=y 281CONFIG_S3C64XX_SETUP_SDHCI=y
@@ -268,15 +283,18 @@ CONFIG_S3C64XX_SETUP_I2C0=y
268CONFIG_S3C64XX_SETUP_I2C1=y 283CONFIG_S3C64XX_SETUP_I2C1=y
269CONFIG_S3C64XX_SETUP_FB_24BPP=y 284CONFIG_S3C64XX_SETUP_FB_24BPP=y
270CONFIG_S3C64XX_SETUP_SDHCI_GPIO=y 285CONFIG_S3C64XX_SETUP_SDHCI_GPIO=y
271# CONFIG_MACH_SMDK6400 is not set 286CONFIG_MACH_SMDK6400=y
272# CONFIG_MACH_ANW6410 is not set 287CONFIG_MACH_ANW6410=y
273CONFIG_MACH_SMDK6410=y 288CONFIG_MACH_SMDK6410=y
274CONFIG_SMDK6410_SD_CH0=y 289CONFIG_SMDK6410_SD_CH0=y
275# CONFIG_SMDK6410_SD_CH1 is not set 290# CONFIG_SMDK6410_SD_CH1 is not set
276# CONFIG_SMDK6410_WM1190_EV1 is not set 291# CONFIG_SMDK6410_WM1190_EV1 is not set
277# CONFIG_SMDK6410_WM1192_EV1 is not set 292# CONFIG_SMDK6410_WM1192_EV1 is not set
278# CONFIG_MACH_NCP is not set 293CONFIG_MACH_NCP=y
279# CONFIG_MACH_HMT is not set 294CONFIG_MACH_HMT=y
295CONFIG_MACH_SMARTQ=y
296CONFIG_MACH_SMARTQ5=y
297CONFIG_MACH_SMARTQ7=y
280 298
281# 299#
282# Processor Type 300# Processor Type
@@ -302,6 +320,7 @@ CONFIG_ARM_THUMB=y
302# CONFIG_CPU_DCACHE_DISABLE is not set 320# CONFIG_CPU_DCACHE_DISABLE is not set
303# CONFIG_CPU_BPREDICT_DISABLE is not set 321# CONFIG_CPU_BPREDICT_DISABLE is not set
304CONFIG_ARM_L1_CACHE_SHIFT=5 322CONFIG_ARM_L1_CACHE_SHIFT=5
323CONFIG_ARM_DMA_MEM_BUFFERABLE=y
305CONFIG_CPU_HAS_PMU=y 324CONFIG_CPU_HAS_PMU=y
306# CONFIG_ARM_ERRATA_411920 is not set 325# CONFIG_ARM_ERRATA_411920 is not set
307CONFIG_ARM_VIC=y 326CONFIG_ARM_VIC=y
@@ -352,6 +371,7 @@ CONFIG_ALIGNMENT_TRAP=y
352CONFIG_ZBOOT_ROM_TEXT=0 371CONFIG_ZBOOT_ROM_TEXT=0
353CONFIG_ZBOOT_ROM_BSS=0 372CONFIG_ZBOOT_ROM_BSS=0
354CONFIG_CMDLINE="console=ttySAC0,115200 root=/dev/ram init=/linuxrc initrd=0x51000000,6M ramdisk_size=6144" 373CONFIG_CMDLINE="console=ttySAC0,115200 root=/dev/ram init=/linuxrc initrd=0x51000000,6M ramdisk_size=6144"
374# CONFIG_CMDLINE_FORCE is not set
355# CONFIG_XIP_KERNEL is not set 375# CONFIG_XIP_KERNEL is not set
356# CONFIG_KEXEC is not set 376# CONFIG_KEXEC is not set
357 377
@@ -430,6 +450,7 @@ CONFIG_MTD=y
430# CONFIG_INFTL is not set 450# CONFIG_INFTL is not set
431# CONFIG_RFD_FTL is not set 451# CONFIG_RFD_FTL is not set
432# CONFIG_SSFDC is not set 452# CONFIG_SSFDC is not set
453# CONFIG_SM_FTL is not set
433# CONFIG_MTD_OOPS is not set 454# CONFIG_MTD_OOPS is not set
434 455
435# 456#
@@ -460,6 +481,9 @@ CONFIG_MTD_CFI_I2=y
460# 481#
461# Self-contained MTD device drivers 482# Self-contained MTD device drivers
462# 483#
484# CONFIG_MTD_DATAFLASH is not set
485# CONFIG_MTD_M25P80 is not set
486# CONFIG_MTD_SST25L is not set
463# CONFIG_MTD_SLRAM is not set 487# CONFIG_MTD_SLRAM is not set
464# CONFIG_MTD_PHRAM is not set 488# CONFIG_MTD_PHRAM is not set
465# CONFIG_MTD_MTDRAM is not set 489# CONFIG_MTD_MTDRAM is not set
@@ -472,9 +496,12 @@ CONFIG_MTD_CFI_I2=y
472# CONFIG_MTD_DOC2001 is not set 496# CONFIG_MTD_DOC2001 is not set
473# CONFIG_MTD_DOC2001PLUS is not set 497# CONFIG_MTD_DOC2001PLUS is not set
474CONFIG_MTD_NAND=y 498CONFIG_MTD_NAND=y
475# CONFIG_MTD_NAND_VERIFY_WRITE is not set 499CONFIG_MTD_NAND_ECC=y
476# CONFIG_MTD_NAND_ECC_SMC is not set 500# CONFIG_MTD_NAND_ECC_SMC is not set
501# CONFIG_MTD_NAND_VERIFY_WRITE is not set
502# CONFIG_MTD_SM_COMMON is not set
477# CONFIG_MTD_NAND_MUSEUM_IDS is not set 503# CONFIG_MTD_NAND_MUSEUM_IDS is not set
504CONFIG_MTD_NAND_DENALI_SCRATCH_REG_ADDR=0xFF108018
478# CONFIG_MTD_NAND_GPIO is not set 505# CONFIG_MTD_NAND_GPIO is not set
479CONFIG_MTD_NAND_IDS=y 506CONFIG_MTD_NAND_IDS=y
480CONFIG_MTD_NAND_S3C2410=y 507CONFIG_MTD_NAND_S3C2410=y
@@ -483,6 +510,7 @@ CONFIG_MTD_NAND_S3C2410=y
483# CONFIG_MTD_NAND_S3C2410_CLKSTOP is not set 510# CONFIG_MTD_NAND_S3C2410_CLKSTOP is not set
484# CONFIG_MTD_NAND_DISKONCHIP is not set 511# CONFIG_MTD_NAND_DISKONCHIP is not set
485# CONFIG_MTD_NAND_PLATFORM is not set 512# CONFIG_MTD_NAND_PLATFORM is not set
513# CONFIG_MTD_ALAUDA is not set
486# CONFIG_MTD_ONENAND is not set 514# CONFIG_MTD_ONENAND is not set
487 515
488# 516#
@@ -503,6 +531,7 @@ CONFIG_BLK_DEV_LOOP=y
503# 531#
504# DRBD disabled because PROC_FS, INET or CONNECTOR not selected 532# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
505# 533#
534# CONFIG_BLK_DEV_UB is not set
506CONFIG_BLK_DEV_RAM=y 535CONFIG_BLK_DEV_RAM=y
507CONFIG_BLK_DEV_RAM_COUNT=16 536CONFIG_BLK_DEV_RAM_COUNT=16
508CONFIG_BLK_DEV_RAM_SIZE=4096 537CONFIG_BLK_DEV_RAM_SIZE=4096
@@ -516,12 +545,14 @@ CONFIG_MISC_DEVICES=y
516# CONFIG_ISL29003 is not set 545# CONFIG_ISL29003 is not set
517# CONFIG_SENSORS_TSL2550 is not set 546# CONFIG_SENSORS_TSL2550 is not set
518# CONFIG_DS1682 is not set 547# CONFIG_DS1682 is not set
548# CONFIG_TI_DAC7512 is not set
519# CONFIG_C2PORT is not set 549# CONFIG_C2PORT is not set
520 550
521# 551#
522# EEPROM support 552# EEPROM support
523# 553#
524CONFIG_EEPROM_AT24=y 554CONFIG_EEPROM_AT24=y
555# CONFIG_EEPROM_AT25 is not set
525# CONFIG_EEPROM_LEGACY is not set 556# CONFIG_EEPROM_LEGACY is not set
526# CONFIG_EEPROM_MAX6875 is not set 557# CONFIG_EEPROM_MAX6875 is not set
527# CONFIG_EEPROM_93CX6 is not set 558# CONFIG_EEPROM_93CX6 is not set
@@ -569,6 +600,7 @@ CONFIG_KEYBOARD_ATKBD=y
569# CONFIG_QT2160 is not set 600# CONFIG_QT2160 is not set
570# CONFIG_KEYBOARD_LKKBD is not set 601# CONFIG_KEYBOARD_LKKBD is not set
571# CONFIG_KEYBOARD_GPIO is not set 602# CONFIG_KEYBOARD_GPIO is not set
603# CONFIG_KEYBOARD_TCA6416 is not set
572# CONFIG_KEYBOARD_MATRIX is not set 604# CONFIG_KEYBOARD_MATRIX is not set
573# CONFIG_KEYBOARD_MAX7359 is not set 605# CONFIG_KEYBOARD_MAX7359 is not set
574# CONFIG_KEYBOARD_NEWTON is not set 606# CONFIG_KEYBOARD_NEWTON is not set
@@ -635,9 +667,12 @@ CONFIG_SERIAL_SAMSUNG_UARTS=4
635# CONFIG_SERIAL_SAMSUNG_DEBUG is not set 667# CONFIG_SERIAL_SAMSUNG_DEBUG is not set
636CONFIG_SERIAL_SAMSUNG_CONSOLE=y 668CONFIG_SERIAL_SAMSUNG_CONSOLE=y
637CONFIG_SERIAL_S3C6400=y 669CONFIG_SERIAL_S3C6400=y
670# CONFIG_SERIAL_MAX3100 is not set
638CONFIG_SERIAL_CORE=y 671CONFIG_SERIAL_CORE=y
639CONFIG_SERIAL_CORE_CONSOLE=y 672CONFIG_SERIAL_CORE_CONSOLE=y
640# CONFIG_SERIAL_TIMBERDALE is not set 673# CONFIG_SERIAL_TIMBERDALE is not set
674# CONFIG_SERIAL_ALTERA_JTAGUART is not set
675# CONFIG_SERIAL_ALTERA_UART is not set
641CONFIG_UNIX98_PTYS=y 676CONFIG_UNIX98_PTYS=y
642# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 677# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
643CONFIG_LEGACY_PTYS=y 678CONFIG_LEGACY_PTYS=y
@@ -673,6 +708,7 @@ CONFIG_I2C_S3C2410=y
673# 708#
674# CONFIG_I2C_PARPORT_LIGHT is not set 709# CONFIG_I2C_PARPORT_LIGHT is not set
675# CONFIG_I2C_TAOS_EVM is not set 710# CONFIG_I2C_TAOS_EVM is not set
711# CONFIG_I2C_TINY_USB is not set
676 712
677# 713#
678# Other I2C/SMBus bus drivers 714# Other I2C/SMBus bus drivers
@@ -682,7 +718,24 @@ CONFIG_I2C_S3C2410=y
682# CONFIG_I2C_DEBUG_CORE is not set 718# CONFIG_I2C_DEBUG_CORE is not set
683# CONFIG_I2C_DEBUG_ALGO is not set 719# CONFIG_I2C_DEBUG_ALGO is not set
684# CONFIG_I2C_DEBUG_BUS is not set 720# CONFIG_I2C_DEBUG_BUS is not set
685# CONFIG_SPI is not set 721CONFIG_SPI=y
722# CONFIG_SPI_DEBUG is not set
723CONFIG_SPI_MASTER=y
724
725#
726# SPI Master Controller Drivers
727#
728CONFIG_SPI_BITBANG=m
729CONFIG_SPI_GPIO=m
730CONFIG_SPI_S3C64XX=m
731# CONFIG_SPI_XILINX is not set
732# CONFIG_SPI_DESIGNWARE is not set
733
734#
735# SPI Protocol Masters
736#
737# CONFIG_SPI_SPIDEV is not set
738# CONFIG_SPI_TLE62X0 is not set
686 739
687# 740#
688# PPS support 741# PPS support
@@ -714,6 +767,9 @@ CONFIG_GPIOLIB=y
714# 767#
715# SPI GPIO expanders: 768# SPI GPIO expanders:
716# 769#
770# CONFIG_GPIO_MAX7301 is not set
771# CONFIG_GPIO_MCP23S08 is not set
772# CONFIG_GPIO_MC33880 is not set
717 773
718# 774#
719# AC97 GPIO expanders: 775# AC97 GPIO expanders:
@@ -729,6 +785,7 @@ CONFIG_HWMON=y
729# 785#
730# CONFIG_SENSORS_AD7414 is not set 786# CONFIG_SENSORS_AD7414 is not set
731# CONFIG_SENSORS_AD7418 is not set 787# CONFIG_SENSORS_AD7418 is not set
788# CONFIG_SENSORS_ADCXX is not set
732# CONFIG_SENSORS_ADM1021 is not set 789# CONFIG_SENSORS_ADM1021 is not set
733# CONFIG_SENSORS_ADM1025 is not set 790# CONFIG_SENSORS_ADM1025 is not set
734# CONFIG_SENSORS_ADM1026 is not set 791# CONFIG_SENSORS_ADM1026 is not set
@@ -750,6 +807,7 @@ CONFIG_HWMON=y
750# CONFIG_SENSORS_GL520SM is not set 807# CONFIG_SENSORS_GL520SM is not set
751# CONFIG_SENSORS_IT87 is not set 808# CONFIG_SENSORS_IT87 is not set
752# CONFIG_SENSORS_LM63 is not set 809# CONFIG_SENSORS_LM63 is not set
810# CONFIG_SENSORS_LM70 is not set
753# CONFIG_SENSORS_LM73 is not set 811# CONFIG_SENSORS_LM73 is not set
754# CONFIG_SENSORS_LM75 is not set 812# CONFIG_SENSORS_LM75 is not set
755# CONFIG_SENSORS_LM77 is not set 813# CONFIG_SENSORS_LM77 is not set
@@ -764,6 +822,7 @@ CONFIG_HWMON=y
764# CONFIG_SENSORS_LTC4215 is not set 822# CONFIG_SENSORS_LTC4215 is not set
765# CONFIG_SENSORS_LTC4245 is not set 823# CONFIG_SENSORS_LTC4245 is not set
766# CONFIG_SENSORS_LM95241 is not set 824# CONFIG_SENSORS_LM95241 is not set
825# CONFIG_SENSORS_MAX1111 is not set
767# CONFIG_SENSORS_MAX1619 is not set 826# CONFIG_SENSORS_MAX1619 is not set
768# CONFIG_SENSORS_MAX6650 is not set 827# CONFIG_SENSORS_MAX6650 is not set
769# CONFIG_SENSORS_PC87360 is not set 828# CONFIG_SENSORS_PC87360 is not set
@@ -775,6 +834,7 @@ CONFIG_HWMON=y
775# CONFIG_SENSORS_SMSC47M192 is not set 834# CONFIG_SENSORS_SMSC47M192 is not set
776# CONFIG_SENSORS_SMSC47B397 is not set 835# CONFIG_SENSORS_SMSC47B397 is not set
777# CONFIG_SENSORS_ADS7828 is not set 836# CONFIG_SENSORS_ADS7828 is not set
837# CONFIG_SENSORS_ADS7871 is not set
778# CONFIG_SENSORS_AMC6821 is not set 838# CONFIG_SENSORS_AMC6821 is not set
779# CONFIG_SENSORS_THMC50 is not set 839# CONFIG_SENSORS_THMC50 is not set
780# CONFIG_SENSORS_TMP401 is not set 840# CONFIG_SENSORS_TMP401 is not set
@@ -788,9 +848,11 @@ CONFIG_HWMON=y
788# CONFIG_SENSORS_W83L786NG is not set 848# CONFIG_SENSORS_W83L786NG is not set
789# CONFIG_SENSORS_W83627HF is not set 849# CONFIG_SENSORS_W83627HF is not set
790# CONFIG_SENSORS_W83627EHF is not set 850# CONFIG_SENSORS_W83627EHF is not set
851# CONFIG_SENSORS_LIS3_SPI is not set
791# CONFIG_SENSORS_LIS3_I2C is not set 852# CONFIG_SENSORS_LIS3_I2C is not set
792# CONFIG_THERMAL is not set 853# CONFIG_THERMAL is not set
793# CONFIG_WATCHDOG is not set 854# CONFIG_WATCHDOG is not set
855CONFIG_HAVE_S3C2410_WATCHDOG=y
794CONFIG_SSB_POSSIBLE=y 856CONFIG_SSB_POSSIBLE=y
795 857
796# 858#
@@ -823,7 +885,10 @@ CONFIG_SSB_POSSIBLE=y
823# CONFIG_MFD_WM8350_I2C is not set 885# CONFIG_MFD_WM8350_I2C is not set
824# CONFIG_MFD_WM8994 is not set 886# CONFIG_MFD_WM8994 is not set
825# CONFIG_MFD_PCF50633 is not set 887# CONFIG_MFD_PCF50633 is not set
888# CONFIG_MFD_MC13783 is not set
826# CONFIG_AB3100_CORE is not set 889# CONFIG_AB3100_CORE is not set
890# CONFIG_EZX_PCAP is not set
891# CONFIG_AB4500_CORE is not set
827# CONFIG_REGULATOR is not set 892# CONFIG_REGULATOR is not set
828# CONFIG_MEDIA_SUPPORT is not set 893# CONFIG_MEDIA_SUPPORT is not set
829 894
@@ -832,8 +897,47 @@ CONFIG_SSB_POSSIBLE=y
832# 897#
833# CONFIG_VGASTATE is not set 898# CONFIG_VGASTATE is not set
834# CONFIG_VIDEO_OUTPUT_CONTROL is not set 899# CONFIG_VIDEO_OUTPUT_CONTROL is not set
835# CONFIG_FB is not set 900CONFIG_FB=y
836# CONFIG_BACKLIGHT_LCD_SUPPORT is not set 901# CONFIG_FIRMWARE_EDID is not set
902# CONFIG_FB_DDC is not set
903# CONFIG_FB_BOOT_VESA_SUPPORT is not set
904CONFIG_FB_CFB_FILLRECT=y
905CONFIG_FB_CFB_COPYAREA=y
906CONFIG_FB_CFB_IMAGEBLIT=y
907# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
908# CONFIG_FB_SYS_FILLRECT is not set
909# CONFIG_FB_SYS_COPYAREA is not set
910# CONFIG_FB_SYS_IMAGEBLIT is not set
911# CONFIG_FB_FOREIGN_ENDIAN is not set
912# CONFIG_FB_SYS_FOPS is not set
913# CONFIG_FB_SVGALIB is not set
914# CONFIG_FB_MACMODES is not set
915# CONFIG_FB_BACKLIGHT is not set
916# CONFIG_FB_MODE_HELPERS is not set
917# CONFIG_FB_TILEBLITTING is not set
918
919#
920# Frame buffer hardware drivers
921#
922# CONFIG_FB_S1D13XXX is not set
923CONFIG_FB_S3C=y
924# CONFIG_FB_S3C_DEBUG_REGWRITE is not set
925# CONFIG_FB_VIRTUAL is not set
926# CONFIG_FB_METRONOME is not set
927# CONFIG_FB_MB862XX is not set
928# CONFIG_FB_BROADSHEET is not set
929CONFIG_BACKLIGHT_LCD_SUPPORT=y
930CONFIG_LCD_CLASS_DEVICE=y
931# CONFIG_LCD_L4F00242T03 is not set
932# CONFIG_LCD_LMS283GF05 is not set
933CONFIG_LCD_LTV350QV=y
934# CONFIG_LCD_ILI9320 is not set
935# CONFIG_LCD_TDO24M is not set
936# CONFIG_LCD_VGG2432A4 is not set
937# CONFIG_LCD_PLATFORM is not set
938CONFIG_BACKLIGHT_CLASS_DEVICE=y
939CONFIG_BACKLIGHT_GENERIC=y
940CONFIG_BACKLIGHT_PWM=y
837 941
838# 942#
839# Display device support 943# Display device support
@@ -845,6 +949,8 @@ CONFIG_SSB_POSSIBLE=y
845# 949#
846# CONFIG_VGA_CONSOLE is not set 950# CONFIG_VGA_CONSOLE is not set
847CONFIG_DUMMY_CONSOLE=y 951CONFIG_DUMMY_CONSOLE=y
952# CONFIG_FRAMEBUFFER_CONSOLE is not set
953# CONFIG_LOGO is not set
848CONFIG_SOUND=y 954CONFIG_SOUND=y
849CONFIG_SOUND_OSS_CORE=y 955CONFIG_SOUND_OSS_CORE=y
850CONFIG_SOUND_OSS_CORE_PRECLAIM=y 956CONFIG_SOUND_OSS_CORE_PRECLAIM=y
@@ -873,10 +979,16 @@ CONFIG_SND_DRIVERS=y
873# CONFIG_SND_SERIAL_U16550 is not set 979# CONFIG_SND_SERIAL_U16550 is not set
874# CONFIG_SND_MPU401 is not set 980# CONFIG_SND_MPU401 is not set
875CONFIG_SND_ARM=y 981CONFIG_SND_ARM=y
982CONFIG_SND_SPI=y
983CONFIG_SND_USB=y
984# CONFIG_SND_USB_AUDIO is not set
985# CONFIG_SND_USB_UA101 is not set
986# CONFIG_SND_USB_CAIAQ is not set
876CONFIG_SND_SOC=m 987CONFIG_SND_SOC=m
877CONFIG_SND_SOC_AC97_BUS=y 988CONFIG_SND_SOC_AC97_BUS=y
878CONFIG_SND_S3C24XX_SOC=m 989CONFIG_SND_S3C24XX_SOC=m
879CONFIG_SND_S3C_SOC_AC97=m 990CONFIG_SND_S3C_SOC_AC97=m
991# CONFIG_SND_S3C64XX_SOC_WM8580 is not set
880CONFIG_SND_SOC_SMDK_WM9713=m 992CONFIG_SND_SOC_SMDK_WM9713=m
881CONFIG_SND_SOC_I2C_AND_SPI=m 993CONFIG_SND_SOC_I2C_AND_SPI=m
882# CONFIG_SND_SOC_ALL_CODECS is not set 994# CONFIG_SND_SOC_ALL_CODECS is not set
@@ -886,29 +998,197 @@ CONFIG_AC97_BUS=m
886CONFIG_HID_SUPPORT=y 998CONFIG_HID_SUPPORT=y
887CONFIG_HID=y 999CONFIG_HID=y
888# CONFIG_HIDRAW is not set 1000# CONFIG_HIDRAW is not set
1001
1002#
1003# USB Input Devices
1004#
1005CONFIG_USB_HID=y
889# CONFIG_HID_PID is not set 1006# CONFIG_HID_PID is not set
1007# CONFIG_USB_HIDDEV is not set
890 1008
891# 1009#
892# Special HID drivers 1010# Special HID drivers
893# 1011#
1012# CONFIG_HID_3M_PCT is not set
1013CONFIG_HID_A4TECH=y
1014CONFIG_HID_APPLE=y
1015CONFIG_HID_BELKIN=y
1016# CONFIG_HID_CANDO is not set
1017CONFIG_HID_CHERRY=y
1018CONFIG_HID_CHICONY=y
1019# CONFIG_HID_PRODIKEYS is not set
1020CONFIG_HID_CYPRESS=y
1021# CONFIG_HID_DRAGONRISE is not set
1022# CONFIG_HID_EGALAX is not set
1023CONFIG_HID_EZKEY=y
1024CONFIG_HID_KYE=y
1025# CONFIG_HID_GYRATION is not set
1026# CONFIG_HID_TWINHAN is not set
1027CONFIG_HID_KENSINGTON=y
1028CONFIG_HID_LOGITECH=y
1029# CONFIG_LOGITECH_FF is not set
1030# CONFIG_LOGIRUMBLEPAD2_FF is not set
1031# CONFIG_LOGIG940_FF is not set
1032CONFIG_HID_MICROSOFT=y
1033# CONFIG_HID_MOSART is not set
1034CONFIG_HID_MONTEREY=y
1035# CONFIG_HID_NTRIG is not set
1036# CONFIG_HID_ORTEK is not set
1037# CONFIG_HID_PANTHERLORD is not set
1038# CONFIG_HID_PETALYNX is not set
1039# CONFIG_HID_PICOLCD is not set
1040# CONFIG_HID_QUANTA is not set
1041# CONFIG_HID_ROCCAT_KONE is not set
1042# CONFIG_HID_SAMSUNG is not set
1043# CONFIG_HID_SONY is not set
1044# CONFIG_HID_STANTUM is not set
1045# CONFIG_HID_SUNPLUS is not set
1046# CONFIG_HID_GREENASIA is not set
1047# CONFIG_HID_SMARTJOYPLUS is not set
1048# CONFIG_HID_TOPSEED is not set
1049# CONFIG_HID_THRUSTMASTER is not set
1050# CONFIG_HID_ZEROPLUS is not set
1051# CONFIG_HID_ZYDACRON is not set
894CONFIG_USB_SUPPORT=y 1052CONFIG_USB_SUPPORT=y
895CONFIG_USB_ARCH_HAS_HCD=y 1053CONFIG_USB_ARCH_HAS_HCD=y
896CONFIG_USB_ARCH_HAS_OHCI=y 1054CONFIG_USB_ARCH_HAS_OHCI=y
897# CONFIG_USB_ARCH_HAS_EHCI is not set 1055# CONFIG_USB_ARCH_HAS_EHCI is not set
898# CONFIG_USB is not set 1056CONFIG_USB=y
1057# CONFIG_USB_DEBUG is not set
1058CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
899 1059
900# 1060#
901# Enable Host or Gadget support to see Inventra options 1061# Miscellaneous USB options
902# 1062#
1063CONFIG_USB_DEVICEFS=y
1064CONFIG_USB_DEVICE_CLASS=y
1065# CONFIG_USB_DYNAMIC_MINORS is not set
1066# CONFIG_USB_MON is not set
1067# CONFIG_USB_WUSB is not set
1068# CONFIG_USB_WUSB_CBAF is not set
1069
1070#
1071# USB Host Controller Drivers
1072#
1073# CONFIG_USB_C67X00_HCD is not set
1074# CONFIG_USB_OXU210HP_HCD is not set
1075# CONFIG_USB_ISP116X_HCD is not set
1076# CONFIG_USB_ISP1760_HCD is not set
1077# CONFIG_USB_ISP1362_HCD is not set
1078CONFIG_USB_OHCI_HCD=y
1079# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
1080# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
1081CONFIG_USB_OHCI_LITTLE_ENDIAN=y
1082# CONFIG_USB_SL811_HCD is not set
1083# CONFIG_USB_R8A66597_HCD is not set
1084# CONFIG_USB_HWA_HCD is not set
1085# CONFIG_USB_MUSB_HDRC is not set
1086
1087#
1088# USB Device Class drivers
1089#
1090CONFIG_USB_ACM=m
1091CONFIG_USB_PRINTER=m
1092# CONFIG_USB_WDM is not set
1093# CONFIG_USB_TMC is not set
903 1094
904# 1095#
905# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may 1096# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
906# 1097#
1098
1099#
1100# also be needed; see USB_STORAGE Help for more info
1101#
1102# CONFIG_USB_LIBUSUAL is not set
1103
1104#
1105# USB Imaging devices
1106#
1107# CONFIG_USB_MDC800 is not set
1108
1109#
1110# USB port drivers
1111#
1112CONFIG_USB_SERIAL=m
1113# CONFIG_USB_EZUSB is not set
1114CONFIG_USB_SERIAL_GENERIC=y
1115# CONFIG_USB_SERIAL_AIRCABLE is not set
1116# CONFIG_USB_SERIAL_ARK3116 is not set
1117# CONFIG_USB_SERIAL_BELKIN is not set
1118# CONFIG_USB_SERIAL_CH341 is not set
1119# CONFIG_USB_SERIAL_WHITEHEAT is not set
1120# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
1121# CONFIG_USB_SERIAL_CP210X is not set
1122# CONFIG_USB_SERIAL_CYPRESS_M8 is not set
1123CONFIG_USB_SERIAL_EMPEG=m
1124CONFIG_USB_SERIAL_FTDI_SIO=m
1125# CONFIG_USB_SERIAL_FUNSOFT is not set
1126# CONFIG_USB_SERIAL_VISOR is not set
1127# CONFIG_USB_SERIAL_IPAQ is not set
1128# CONFIG_USB_SERIAL_IR is not set
1129# CONFIG_USB_SERIAL_EDGEPORT is not set
1130# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
1131# CONFIG_USB_SERIAL_GARMIN is not set
1132# CONFIG_USB_SERIAL_IPW is not set
1133# CONFIG_USB_SERIAL_IUU is not set
1134# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
1135# CONFIG_USB_SERIAL_KEYSPAN is not set
1136# CONFIG_USB_SERIAL_KLSI is not set
1137# CONFIG_USB_SERIAL_KOBIL_SCT is not set
1138# CONFIG_USB_SERIAL_MCT_U232 is not set
1139# CONFIG_USB_SERIAL_MOS7720 is not set
1140# CONFIG_USB_SERIAL_MOS7840 is not set
1141# CONFIG_USB_SERIAL_MOTOROLA is not set
1142# CONFIG_USB_SERIAL_NAVMAN is not set
1143CONFIG_USB_SERIAL_PL2303=m
1144# CONFIG_USB_SERIAL_OTI6858 is not set
1145# CONFIG_USB_SERIAL_QCAUX is not set
1146# CONFIG_USB_SERIAL_QUALCOMM is not set
1147# CONFIG_USB_SERIAL_SPCP8X5 is not set
1148# CONFIG_USB_SERIAL_HP4X is not set
1149# CONFIG_USB_SERIAL_SAFE is not set
1150# CONFIG_USB_SERIAL_SIEMENS_MPI is not set
1151# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set
1152# CONFIG_USB_SERIAL_SYMBOL is not set
1153# CONFIG_USB_SERIAL_TI is not set
1154# CONFIG_USB_SERIAL_CYBERJACK is not set
1155# CONFIG_USB_SERIAL_XIRCOM is not set
1156# CONFIG_USB_SERIAL_OPTION is not set
1157# CONFIG_USB_SERIAL_OMNINET is not set
1158# CONFIG_USB_SERIAL_OPTICON is not set
1159# CONFIG_USB_SERIAL_VIVOPAY_SERIAL is not set
1160# CONFIG_USB_SERIAL_ZIO is not set
1161# CONFIG_USB_SERIAL_DEBUG is not set
1162
1163#
1164# USB Miscellaneous drivers
1165#
1166# CONFIG_USB_EMI62 is not set
1167# CONFIG_USB_EMI26 is not set
1168# CONFIG_USB_ADUTUX is not set
1169# CONFIG_USB_SEVSEG is not set
1170# CONFIG_USB_RIO500 is not set
1171# CONFIG_USB_LEGOTOWER is not set
1172# CONFIG_USB_LCD is not set
1173# CONFIG_USB_LED is not set
1174# CONFIG_USB_CYPRESS_CY7C63 is not set
1175# CONFIG_USB_CYTHERM is not set
1176# CONFIG_USB_IDMOUSE is not set
1177# CONFIG_USB_FTDI_ELAN is not set
1178# CONFIG_USB_APPLEDISPLAY is not set
1179# CONFIG_USB_LD is not set
1180# CONFIG_USB_TRANCEVIBRATOR is not set
1181# CONFIG_USB_IOWARRIOR is not set
1182# CONFIG_USB_TEST is not set
1183# CONFIG_USB_ISIGHTFW is not set
907# CONFIG_USB_GADGET is not set 1184# CONFIG_USB_GADGET is not set
908 1185
909# 1186#
910# OTG and related infrastructure 1187# OTG and related infrastructure
911# 1188#
1189# CONFIG_USB_GPIO_VBUS is not set
1190# CONFIG_USB_ULPI is not set
1191# CONFIG_NOP_USB_XCEIV is not set
912CONFIG_MMC=y 1192CONFIG_MMC=y
913CONFIG_MMC_DEBUG=y 1193CONFIG_MMC_DEBUG=y
914CONFIG_MMC_UNSAFE_RESUME=y 1194CONFIG_MMC_UNSAFE_RESUME=y
@@ -928,18 +1208,80 @@ CONFIG_MMC_SDHCI=y
928# CONFIG_MMC_SDHCI_PLTFM is not set 1208# CONFIG_MMC_SDHCI_PLTFM is not set
929CONFIG_MMC_SDHCI_S3C=y 1209CONFIG_MMC_SDHCI_S3C=y
930# CONFIG_MMC_SDHCI_S3C_DMA is not set 1210# CONFIG_MMC_SDHCI_S3C_DMA is not set
1211# CONFIG_MMC_SPI is not set
931# CONFIG_MEMSTICK is not set 1212# CONFIG_MEMSTICK is not set
932# CONFIG_NEW_LEDS is not set 1213# CONFIG_NEW_LEDS is not set
933# CONFIG_ACCESSIBILITY is not set 1214# CONFIG_ACCESSIBILITY is not set
934CONFIG_RTC_LIB=y 1215CONFIG_RTC_LIB=y
935# CONFIG_RTC_CLASS is not set 1216CONFIG_RTC_CLASS=y
1217CONFIG_RTC_HCTOSYS=y
1218CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
1219# CONFIG_RTC_DEBUG is not set
1220
1221#
1222# RTC interfaces
1223#
1224CONFIG_RTC_INTF_SYSFS=y
1225CONFIG_RTC_INTF_PROC=y
1226CONFIG_RTC_INTF_DEV=y
1227# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1228# CONFIG_RTC_DRV_TEST is not set
1229
1230#
1231# I2C RTC drivers
1232#
1233# CONFIG_RTC_DRV_DS1307 is not set
1234# CONFIG_RTC_DRV_DS1374 is not set
1235# CONFIG_RTC_DRV_DS1672 is not set
1236# CONFIG_RTC_DRV_MAX6900 is not set
1237# CONFIG_RTC_DRV_RS5C372 is not set
1238# CONFIG_RTC_DRV_ISL1208 is not set
1239# CONFIG_RTC_DRV_X1205 is not set
1240# CONFIG_RTC_DRV_PCF8563 is not set
1241# CONFIG_RTC_DRV_PCF8583 is not set
1242# CONFIG_RTC_DRV_M41T80 is not set
1243# CONFIG_RTC_DRV_BQ32K is not set
1244# CONFIG_RTC_DRV_S35390A is not set
1245# CONFIG_RTC_DRV_FM3130 is not set
1246# CONFIG_RTC_DRV_RX8581 is not set
1247# CONFIG_RTC_DRV_RX8025 is not set
1248
1249#
1250# SPI RTC drivers
1251#
1252# CONFIG_RTC_DRV_M41T94 is not set
1253# CONFIG_RTC_DRV_DS1305 is not set
1254# CONFIG_RTC_DRV_DS1390 is not set
1255# CONFIG_RTC_DRV_MAX6902 is not set
1256# CONFIG_RTC_DRV_R9701 is not set
1257# CONFIG_RTC_DRV_RS5C348 is not set
1258# CONFIG_RTC_DRV_DS3234 is not set
1259# CONFIG_RTC_DRV_PCF2123 is not set
1260
1261#
1262# Platform RTC drivers
1263#
1264# CONFIG_RTC_DRV_CMOS is not set
1265# CONFIG_RTC_DRV_DS1286 is not set
1266# CONFIG_RTC_DRV_DS1511 is not set
1267# CONFIG_RTC_DRV_DS1553 is not set
1268# CONFIG_RTC_DRV_DS1742 is not set
1269# CONFIG_RTC_DRV_STK17TA8 is not set
1270# CONFIG_RTC_DRV_M48T86 is not set
1271# CONFIG_RTC_DRV_M48T35 is not set
1272# CONFIG_RTC_DRV_M48T59 is not set
1273# CONFIG_RTC_DRV_MSM6242 is not set
1274# CONFIG_RTC_DRV_BQ4802 is not set
1275# CONFIG_RTC_DRV_RP5C01 is not set
1276# CONFIG_RTC_DRV_V3020 is not set
1277
1278#
1279# on-CPU RTC drivers
1280#
1281CONFIG_RTC_DRV_S3C=y
936# CONFIG_DMADEVICES is not set 1282# CONFIG_DMADEVICES is not set
937# CONFIG_AUXDISPLAY is not set 1283# CONFIG_AUXDISPLAY is not set
938# CONFIG_UIO is not set 1284# CONFIG_UIO is not set
939
940#
941# TI VLYNQ
942#
943# CONFIG_STAGING is not set 1285# CONFIG_STAGING is not set
944 1286
945# 1287#
@@ -1033,7 +1375,46 @@ CONFIG_ROMFS_ON_BLOCK=y
1033# 1375#
1034# CONFIG_PARTITION_ADVANCED is not set 1376# CONFIG_PARTITION_ADVANCED is not set
1035CONFIG_MSDOS_PARTITION=y 1377CONFIG_MSDOS_PARTITION=y
1036# CONFIG_NLS is not set 1378CONFIG_NLS=y
1379CONFIG_NLS_DEFAULT="iso8859-1"
1380# CONFIG_NLS_CODEPAGE_437 is not set
1381# CONFIG_NLS_CODEPAGE_737 is not set
1382# CONFIG_NLS_CODEPAGE_775 is not set
1383# CONFIG_NLS_CODEPAGE_850 is not set
1384# CONFIG_NLS_CODEPAGE_852 is not set
1385# CONFIG_NLS_CODEPAGE_855 is not set
1386# CONFIG_NLS_CODEPAGE_857 is not set
1387# CONFIG_NLS_CODEPAGE_860 is not set
1388# CONFIG_NLS_CODEPAGE_861 is not set
1389# CONFIG_NLS_CODEPAGE_862 is not set
1390# CONFIG_NLS_CODEPAGE_863 is not set
1391# CONFIG_NLS_CODEPAGE_864 is not set
1392# CONFIG_NLS_CODEPAGE_865 is not set
1393# CONFIG_NLS_CODEPAGE_866 is not set
1394# CONFIG_NLS_CODEPAGE_869 is not set
1395# CONFIG_NLS_CODEPAGE_936 is not set
1396# CONFIG_NLS_CODEPAGE_950 is not set
1397# CONFIG_NLS_CODEPAGE_932 is not set
1398# CONFIG_NLS_CODEPAGE_949 is not set
1399# CONFIG_NLS_CODEPAGE_874 is not set
1400# CONFIG_NLS_ISO8859_8 is not set
1401# CONFIG_NLS_CODEPAGE_1250 is not set
1402# CONFIG_NLS_CODEPAGE_1251 is not set
1403# CONFIG_NLS_ASCII is not set
1404# CONFIG_NLS_ISO8859_1 is not set
1405# CONFIG_NLS_ISO8859_2 is not set
1406# CONFIG_NLS_ISO8859_3 is not set
1407# CONFIG_NLS_ISO8859_4 is not set
1408# CONFIG_NLS_ISO8859_5 is not set
1409# CONFIG_NLS_ISO8859_6 is not set
1410# CONFIG_NLS_ISO8859_7 is not set
1411# CONFIG_NLS_ISO8859_9 is not set
1412# CONFIG_NLS_ISO8859_13 is not set
1413# CONFIG_NLS_ISO8859_14 is not set
1414# CONFIG_NLS_ISO8859_15 is not set
1415# CONFIG_NLS_KOI8_R is not set
1416# CONFIG_NLS_KOI8_U is not set
1417# CONFIG_NLS_UTF8 is not set
1037 1418
1038# 1419#
1039# Kernel hacking 1420# Kernel hacking
@@ -1096,6 +1477,7 @@ CONFIG_HAVE_FUNCTION_TRACER=y
1096CONFIG_TRACING_SUPPORT=y 1477CONFIG_TRACING_SUPPORT=y
1097CONFIG_FTRACE=y 1478CONFIG_FTRACE=y
1098# CONFIG_FUNCTION_TRACER is not set 1479# CONFIG_FUNCTION_TRACER is not set
1480# CONFIG_IRQSOFF_TRACER is not set
1099# CONFIG_SCHED_TRACER is not set 1481# CONFIG_SCHED_TRACER is not set
1100# CONFIG_ENABLE_DEFAULT_TRACERS is not set 1482# CONFIG_ENABLE_DEFAULT_TRACERS is not set
1101# CONFIG_BOOT_TRACER is not set 1483# CONFIG_BOOT_TRACER is not set
@@ -1106,6 +1488,7 @@ CONFIG_BRANCH_PROFILE_NONE=y
1106# CONFIG_KMEMTRACE is not set 1488# CONFIG_KMEMTRACE is not set
1107# CONFIG_WORKQUEUE_TRACER is not set 1489# CONFIG_WORKQUEUE_TRACER is not set
1108# CONFIG_BLK_DEV_IO_TRACE is not set 1490# CONFIG_BLK_DEV_IO_TRACE is not set
1491# CONFIG_ATOMIC64_SELFTEST is not set
1109# CONFIG_SAMPLES is not set 1492# CONFIG_SAMPLES is not set
1110CONFIG_HAVE_ARCH_KGDB=y 1493CONFIG_HAVE_ARCH_KGDB=y
1111# CONFIG_KGDB is not set 1494# CONFIG_KGDB is not set
diff --git a/arch/arm/configs/s5p6440_defconfig b/arch/arm/configs/s5p6440_defconfig
index 619bfab3ab39..532e987beb4d 100644
--- a/arch/arm/configs/s5p6440_defconfig
+++ b/arch/arm/configs/s5p6440_defconfig
@@ -1,11 +1,13 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.34 3# Linux kernel version: 2.6.34
4# Sat May 22 03:18:18 2010 4# Wed May 26 19:04:32 2010
5# 5#
6CONFIG_ARM=y 6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y 7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y 8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y
10CONFIG_ARCH_USES_GETTIMEOFFSET=y
9CONFIG_HAVE_PROC_CPU=y 11CONFIG_HAVE_PROC_CPU=y
10CONFIG_NO_IOPORT=y 12CONFIG_NO_IOPORT=y
11CONFIG_GENERIC_HARDIRQS=y 13CONFIG_GENERIC_HARDIRQS=y
@@ -33,6 +35,7 @@ CONFIG_INIT_ENV_ARG_LIMIT=32
33CONFIG_LOCALVERSION="" 35CONFIG_LOCALVERSION=""
34CONFIG_LOCALVERSION_AUTO=y 36CONFIG_LOCALVERSION_AUTO=y
35CONFIG_HAVE_KERNEL_GZIP=y 37CONFIG_HAVE_KERNEL_GZIP=y
38CONFIG_HAVE_KERNEL_LZMA=y
36CONFIG_HAVE_KERNEL_LZO=y 39CONFIG_HAVE_KERNEL_LZO=y
37CONFIG_KERNEL_GZIP=y 40CONFIG_KERNEL_GZIP=y
38# CONFIG_KERNEL_BZIP2 is not set 41# CONFIG_KERNEL_BZIP2 is not set
@@ -178,9 +181,11 @@ CONFIG_MMU=y
178# CONFIG_ARCH_INTEGRATOR is not set 181# CONFIG_ARCH_INTEGRATOR is not set
179# CONFIG_ARCH_REALVIEW is not set 182# CONFIG_ARCH_REALVIEW is not set
180# CONFIG_ARCH_VERSATILE is not set 183# CONFIG_ARCH_VERSATILE is not set
184# CONFIG_ARCH_VEXPRESS is not set
181# CONFIG_ARCH_AT91 is not set 185# CONFIG_ARCH_AT91 is not set
182# CONFIG_ARCH_BCMRING is not set 186# CONFIG_ARCH_BCMRING is not set
183# CONFIG_ARCH_CLPS711X is not set 187# CONFIG_ARCH_CLPS711X is not set
188# CONFIG_ARCH_CNS3XXX is not set
184# CONFIG_ARCH_GEMINI is not set 189# CONFIG_ARCH_GEMINI is not set
185# CONFIG_ARCH_EBSA110 is not set 190# CONFIG_ARCH_EBSA110 is not set
186# CONFIG_ARCH_EP93XX is not set 191# CONFIG_ARCH_EP93XX is not set
@@ -216,7 +221,7 @@ CONFIG_MMU=y
216# CONFIG_ARCH_S3C64XX is not set 221# CONFIG_ARCH_S3C64XX is not set
217CONFIG_ARCH_S5P6440=y 222CONFIG_ARCH_S5P6440=y
218# CONFIG_ARCH_S5P6442 is not set 223# CONFIG_ARCH_S5P6442 is not set
219# CONFIG_ARCH_S5PC1XX is not set 224# CONFIG_ARCH_S5PC100 is not set
220# CONFIG_ARCH_S5PV210 is not set 225# CONFIG_ARCH_S5PV210 is not set
221# CONFIG_ARCH_SHARK is not set 226# CONFIG_ARCH_SHARK is not set
222# CONFIG_ARCH_LH7A40X is not set 227# CONFIG_ARCH_LH7A40X is not set
@@ -225,6 +230,7 @@ CONFIG_ARCH_S5P6440=y
225# CONFIG_ARCH_NOMADIK is not set 230# CONFIG_ARCH_NOMADIK is not set
226# CONFIG_ARCH_DAVINCI is not set 231# CONFIG_ARCH_DAVINCI is not set
227# CONFIG_ARCH_OMAP is not set 232# CONFIG_ARCH_OMAP is not set
233# CONFIG_PLAT_SPEAR is not set
228CONFIG_PLAT_SAMSUNG=y 234CONFIG_PLAT_SAMSUNG=y
229 235
230# 236#
@@ -240,10 +246,15 @@ CONFIG_SAMSUNG_GPIOLIB_4BIT=y
240CONFIG_S3C_GPIO_CFG_S3C24XX=y 246CONFIG_S3C_GPIO_CFG_S3C24XX=y
241CONFIG_S3C_GPIO_CFG_S3C64XX=y 247CONFIG_S3C_GPIO_CFG_S3C64XX=y
242CONFIG_S3C_GPIO_PULL_UPDOWN=y 248CONFIG_S3C_GPIO_PULL_UPDOWN=y
249CONFIG_S5P_GPIO_DRVSTR=y
243CONFIG_SAMSUNG_GPIO_EXTRA=0 250CONFIG_SAMSUNG_GPIO_EXTRA=0
244CONFIG_S3C_GPIO_SPACE=0 251CONFIG_S3C_GPIO_SPACE=0
245CONFIG_S3C_GPIO_TRACK=y 252CONFIG_S3C_GPIO_TRACK=y
246# CONFIG_S3C_ADC is not set 253# CONFIG_S3C_ADC is not set
254CONFIG_S3C_DEV_WDT=y
255CONFIG_SAMSUNG_DEV_ADC=y
256CONFIG_SAMSUNG_DEV_TS=y
257CONFIG_S3C_PL330_DMA=y
247 258
248# 259#
249# Power management 260# Power management
@@ -276,10 +287,12 @@ CONFIG_ARM_THUMB=y
276# CONFIG_CPU_DCACHE_DISABLE is not set 287# CONFIG_CPU_DCACHE_DISABLE is not set
277# CONFIG_CPU_BPREDICT_DISABLE is not set 288# CONFIG_CPU_BPREDICT_DISABLE is not set
278CONFIG_ARM_L1_CACHE_SHIFT=5 289CONFIG_ARM_L1_CACHE_SHIFT=5
290CONFIG_ARM_DMA_MEM_BUFFERABLE=y
279CONFIG_CPU_HAS_PMU=y 291CONFIG_CPU_HAS_PMU=y
280# CONFIG_ARM_ERRATA_411920 is not set 292# CONFIG_ARM_ERRATA_411920 is not set
281CONFIG_ARM_VIC=y 293CONFIG_ARM_VIC=y
282CONFIG_ARM_VIC_NR=2 294CONFIG_ARM_VIC_NR=2
295CONFIG_PL330=y
283 296
284# 297#
285# Bus support 298# Bus support
@@ -326,6 +339,7 @@ CONFIG_ALIGNMENT_TRAP=y
326CONFIG_ZBOOT_ROM_TEXT=0 339CONFIG_ZBOOT_ROM_TEXT=0
327CONFIG_ZBOOT_ROM_BSS=0 340CONFIG_ZBOOT_ROM_BSS=0
328CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc" 341CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc"
342# CONFIG_CMDLINE_FORCE is not set
329# CONFIG_XIP_KERNEL is not set 343# CONFIG_XIP_KERNEL is not set
330# CONFIG_KEXEC is not set 344# CONFIG_KEXEC is not set
331 345
@@ -490,7 +504,9 @@ CONFIG_MOUSE_PS2_TRACKPOINT=y
490CONFIG_INPUT_TOUCHSCREEN=y 504CONFIG_INPUT_TOUCHSCREEN=y
491# CONFIG_TOUCHSCREEN_AD7879 is not set 505# CONFIG_TOUCHSCREEN_AD7879 is not set
492# CONFIG_TOUCHSCREEN_DYNAPRO is not set 506# CONFIG_TOUCHSCREEN_DYNAPRO is not set
507# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set
493# CONFIG_TOUCHSCREEN_FUJITSU is not set 508# CONFIG_TOUCHSCREEN_FUJITSU is not set
509# CONFIG_TOUCHSCREEN_S3C2410 is not set
494# CONFIG_TOUCHSCREEN_GUNZE is not set 510# CONFIG_TOUCHSCREEN_GUNZE is not set
495# CONFIG_TOUCHSCREEN_ELO is not set 511# CONFIG_TOUCHSCREEN_ELO is not set
496# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set 512# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
@@ -546,6 +562,8 @@ CONFIG_SERIAL_S3C6400=y
546CONFIG_SERIAL_CORE=y 562CONFIG_SERIAL_CORE=y
547CONFIG_SERIAL_CORE_CONSOLE=y 563CONFIG_SERIAL_CORE_CONSOLE=y
548# CONFIG_SERIAL_TIMBERDALE is not set 564# CONFIG_SERIAL_TIMBERDALE is not set
565# CONFIG_SERIAL_ALTERA_JTAGUART is not set
566# CONFIG_SERIAL_ALTERA_UART is not set
549CONFIG_UNIX98_PTYS=y 567CONFIG_UNIX98_PTYS=y
550# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 568# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
551CONFIG_LEGACY_PTYS=y 569CONFIG_LEGACY_PTYS=y
@@ -593,6 +611,7 @@ CONFIG_GPIOLIB=y
593# CONFIG_HWMON is not set 611# CONFIG_HWMON is not set
594# CONFIG_THERMAL is not set 612# CONFIG_THERMAL is not set
595# CONFIG_WATCHDOG is not set 613# CONFIG_WATCHDOG is not set
614CONFIG_HAVE_S3C2410_WATCHDOG=y
596CONFIG_SSB_POSSIBLE=y 615CONFIG_SSB_POSSIBLE=y
597 616
598# 617#
@@ -649,10 +668,6 @@ CONFIG_RTC_LIB=y
649# CONFIG_DMADEVICES is not set 668# CONFIG_DMADEVICES is not set
650# CONFIG_AUXDISPLAY is not set 669# CONFIG_AUXDISPLAY is not set
651# CONFIG_UIO is not set 670# CONFIG_UIO is not set
652
653#
654# TI VLYNQ
655#
656# CONFIG_STAGING is not set 671# CONFIG_STAGING is not set
657 672
658# 673#
@@ -850,6 +865,7 @@ CONFIG_HAVE_FUNCTION_TRACER=y
850CONFIG_TRACING_SUPPORT=y 865CONFIG_TRACING_SUPPORT=y
851CONFIG_FTRACE=y 866CONFIG_FTRACE=y
852# CONFIG_FUNCTION_TRACER is not set 867# CONFIG_FUNCTION_TRACER is not set
868# CONFIG_IRQSOFF_TRACER is not set
853# CONFIG_SCHED_TRACER is not set 869# CONFIG_SCHED_TRACER is not set
854# CONFIG_ENABLE_DEFAULT_TRACERS is not set 870# CONFIG_ENABLE_DEFAULT_TRACERS is not set
855# CONFIG_BOOT_TRACER is not set 871# CONFIG_BOOT_TRACER is not set
@@ -860,6 +876,7 @@ CONFIG_BRANCH_PROFILE_NONE=y
860# CONFIG_KMEMTRACE is not set 876# CONFIG_KMEMTRACE is not set
861# CONFIG_WORKQUEUE_TRACER is not set 877# CONFIG_WORKQUEUE_TRACER is not set
862# CONFIG_BLK_DEV_IO_TRACE is not set 878# CONFIG_BLK_DEV_IO_TRACE is not set
879# CONFIG_ATOMIC64_SELFTEST is not set
863# CONFIG_SAMPLES is not set 880# CONFIG_SAMPLES is not set
864CONFIG_HAVE_ARCH_KGDB=y 881CONFIG_HAVE_ARCH_KGDB=y
865# CONFIG_KGDB is not set 882# CONFIG_KGDB is not set
diff --git a/arch/arm/configs/s5p6442_defconfig b/arch/arm/configs/s5p6442_defconfig
index d7ea27509cf4..068219b360f5 100644
--- a/arch/arm/configs/s5p6442_defconfig
+++ b/arch/arm/configs/s5p6442_defconfig
@@ -1,11 +1,13 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.34 3# Linux kernel version: 2.6.34
4# Sat May 22 03:18:19 2010 4# Wed May 26 19:04:34 2010
5# 5#
6CONFIG_ARM=y 6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y 7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y 8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y
10CONFIG_ARCH_USES_GETTIMEOFFSET=y
9CONFIG_HAVE_PROC_CPU=y 11CONFIG_HAVE_PROC_CPU=y
10CONFIG_NO_IOPORT=y 12CONFIG_NO_IOPORT=y
11CONFIG_GENERIC_HARDIRQS=y 13CONFIG_GENERIC_HARDIRQS=y
@@ -33,6 +35,7 @@ CONFIG_INIT_ENV_ARG_LIMIT=32
33CONFIG_LOCALVERSION="" 35CONFIG_LOCALVERSION=""
34CONFIG_LOCALVERSION_AUTO=y 36CONFIG_LOCALVERSION_AUTO=y
35CONFIG_HAVE_KERNEL_GZIP=y 37CONFIG_HAVE_KERNEL_GZIP=y
38CONFIG_HAVE_KERNEL_LZMA=y
36CONFIG_HAVE_KERNEL_LZO=y 39CONFIG_HAVE_KERNEL_LZO=y
37CONFIG_KERNEL_GZIP=y 40CONFIG_KERNEL_GZIP=y
38# CONFIG_KERNEL_BZIP2 is not set 41# CONFIG_KERNEL_BZIP2 is not set
@@ -178,9 +181,11 @@ CONFIG_MMU=y
178# CONFIG_ARCH_INTEGRATOR is not set 181# CONFIG_ARCH_INTEGRATOR is not set
179# CONFIG_ARCH_REALVIEW is not set 182# CONFIG_ARCH_REALVIEW is not set
180# CONFIG_ARCH_VERSATILE is not set 183# CONFIG_ARCH_VERSATILE is not set
184# CONFIG_ARCH_VEXPRESS is not set
181# CONFIG_ARCH_AT91 is not set 185# CONFIG_ARCH_AT91 is not set
182# CONFIG_ARCH_BCMRING is not set 186# CONFIG_ARCH_BCMRING is not set
183# CONFIG_ARCH_CLPS711X is not set 187# CONFIG_ARCH_CLPS711X is not set
188# CONFIG_ARCH_CNS3XXX is not set
184# CONFIG_ARCH_GEMINI is not set 189# CONFIG_ARCH_GEMINI is not set
185# CONFIG_ARCH_EBSA110 is not set 190# CONFIG_ARCH_EBSA110 is not set
186# CONFIG_ARCH_EP93XX is not set 191# CONFIG_ARCH_EP93XX is not set
@@ -216,7 +221,7 @@ CONFIG_MMU=y
216# CONFIG_ARCH_S3C64XX is not set 221# CONFIG_ARCH_S3C64XX is not set
217# CONFIG_ARCH_S5P6440 is not set 222# CONFIG_ARCH_S5P6440 is not set
218CONFIG_ARCH_S5P6442=y 223CONFIG_ARCH_S5P6442=y
219# CONFIG_ARCH_S5PC1XX is not set 224# CONFIG_ARCH_S5PC100 is not set
220# CONFIG_ARCH_S5PV210 is not set 225# CONFIG_ARCH_S5PV210 is not set
221# CONFIG_ARCH_SHARK is not set 226# CONFIG_ARCH_SHARK is not set
222# CONFIG_ARCH_LH7A40X is not set 227# CONFIG_ARCH_LH7A40X is not set
@@ -225,6 +230,7 @@ CONFIG_ARCH_S5P6442=y
225# CONFIG_ARCH_NOMADIK is not set 230# CONFIG_ARCH_NOMADIK is not set
226# CONFIG_ARCH_DAVINCI is not set 231# CONFIG_ARCH_DAVINCI is not set
227# CONFIG_ARCH_OMAP is not set 232# CONFIG_ARCH_OMAP is not set
233# CONFIG_PLAT_SPEAR is not set
228CONFIG_PLAT_SAMSUNG=y 234CONFIG_PLAT_SAMSUNG=y
229 235
230# 236#
@@ -240,10 +246,12 @@ CONFIG_SAMSUNG_GPIOLIB_4BIT=y
240CONFIG_S3C_GPIO_CFG_S3C24XX=y 246CONFIG_S3C_GPIO_CFG_S3C24XX=y
241CONFIG_S3C_GPIO_CFG_S3C64XX=y 247CONFIG_S3C_GPIO_CFG_S3C64XX=y
242CONFIG_S3C_GPIO_PULL_UPDOWN=y 248CONFIG_S3C_GPIO_PULL_UPDOWN=y
249CONFIG_S5P_GPIO_DRVSTR=y
243CONFIG_SAMSUNG_GPIO_EXTRA=0 250CONFIG_SAMSUNG_GPIO_EXTRA=0
244CONFIG_S3C_GPIO_SPACE=0 251CONFIG_S3C_GPIO_SPACE=0
245CONFIG_S3C_GPIO_TRACK=y 252CONFIG_S3C_GPIO_TRACK=y
246# CONFIG_S3C_ADC is not set 253# CONFIG_S3C_ADC is not set
254CONFIG_S3C_PL330_DMA=y
247 255
248# 256#
249# Power management 257# Power management
@@ -276,10 +284,12 @@ CONFIG_ARM_THUMB=y
276# CONFIG_CPU_DCACHE_DISABLE is not set 284# CONFIG_CPU_DCACHE_DISABLE is not set
277# CONFIG_CPU_BPREDICT_DISABLE is not set 285# CONFIG_CPU_BPREDICT_DISABLE is not set
278CONFIG_ARM_L1_CACHE_SHIFT=5 286CONFIG_ARM_L1_CACHE_SHIFT=5
287CONFIG_ARM_DMA_MEM_BUFFERABLE=y
279CONFIG_CPU_HAS_PMU=y 288CONFIG_CPU_HAS_PMU=y
280# CONFIG_ARM_ERRATA_411920 is not set 289# CONFIG_ARM_ERRATA_411920 is not set
281CONFIG_ARM_VIC=y 290CONFIG_ARM_VIC=y
282CONFIG_ARM_VIC_NR=2 291CONFIG_ARM_VIC_NR=2
292CONFIG_PL330=y
283 293
284# 294#
285# Bus support 295# Bus support
@@ -326,6 +336,7 @@ CONFIG_ALIGNMENT_TRAP=y
326CONFIG_ZBOOT_ROM_TEXT=0 336CONFIG_ZBOOT_ROM_TEXT=0
327CONFIG_ZBOOT_ROM_BSS=0 337CONFIG_ZBOOT_ROM_BSS=0
328CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc" 338CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc"
339# CONFIG_CMDLINE_FORCE is not set
329# CONFIG_XIP_KERNEL is not set 340# CONFIG_XIP_KERNEL is not set
330# CONFIG_KEXEC is not set 341# CONFIG_KEXEC is not set
331 342
@@ -471,6 +482,7 @@ CONFIG_INPUT_EVDEV=y
471CONFIG_INPUT_TOUCHSCREEN=y 482CONFIG_INPUT_TOUCHSCREEN=y
472# CONFIG_TOUCHSCREEN_AD7879 is not set 483# CONFIG_TOUCHSCREEN_AD7879 is not set
473# CONFIG_TOUCHSCREEN_DYNAPRO is not set 484# CONFIG_TOUCHSCREEN_DYNAPRO is not set
485# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set
474# CONFIG_TOUCHSCREEN_FUJITSU is not set 486# CONFIG_TOUCHSCREEN_FUJITSU is not set
475# CONFIG_TOUCHSCREEN_GUNZE is not set 487# CONFIG_TOUCHSCREEN_GUNZE is not set
476# CONFIG_TOUCHSCREEN_ELO is not set 488# CONFIG_TOUCHSCREEN_ELO is not set
@@ -525,6 +537,8 @@ CONFIG_SERIAL_S5PV210=y
525CONFIG_SERIAL_CORE=y 537CONFIG_SERIAL_CORE=y
526CONFIG_SERIAL_CORE_CONSOLE=y 538CONFIG_SERIAL_CORE_CONSOLE=y
527# CONFIG_SERIAL_TIMBERDALE is not set 539# CONFIG_SERIAL_TIMBERDALE is not set
540# CONFIG_SERIAL_ALTERA_JTAGUART is not set
541# CONFIG_SERIAL_ALTERA_UART is not set
528CONFIG_UNIX98_PTYS=y 542CONFIG_UNIX98_PTYS=y
529# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 543# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
530CONFIG_LEGACY_PTYS=y 544CONFIG_LEGACY_PTYS=y
@@ -624,10 +638,6 @@ CONFIG_RTC_LIB=y
624# CONFIG_DMADEVICES is not set 638# CONFIG_DMADEVICES is not set
625# CONFIG_AUXDISPLAY is not set 639# CONFIG_AUXDISPLAY is not set
626# CONFIG_UIO is not set 640# CONFIG_UIO is not set
627
628#
629# TI VLYNQ
630#
631# CONFIG_STAGING is not set 641# CONFIG_STAGING is not set
632 642
633# 643#
@@ -836,6 +846,7 @@ CONFIG_HAVE_FUNCTION_TRACER=y
836CONFIG_TRACING_SUPPORT=y 846CONFIG_TRACING_SUPPORT=y
837CONFIG_FTRACE=y 847CONFIG_FTRACE=y
838# CONFIG_FUNCTION_TRACER is not set 848# CONFIG_FUNCTION_TRACER is not set
849# CONFIG_IRQSOFF_TRACER is not set
839# CONFIG_SCHED_TRACER is not set 850# CONFIG_SCHED_TRACER is not set
840# CONFIG_ENABLE_DEFAULT_TRACERS is not set 851# CONFIG_ENABLE_DEFAULT_TRACERS is not set
841# CONFIG_BOOT_TRACER is not set 852# CONFIG_BOOT_TRACER is not set
@@ -846,6 +857,7 @@ CONFIG_BRANCH_PROFILE_NONE=y
846# CONFIG_KMEMTRACE is not set 857# CONFIG_KMEMTRACE is not set
847# CONFIG_WORKQUEUE_TRACER is not set 858# CONFIG_WORKQUEUE_TRACER is not set
848# CONFIG_BLK_DEV_IO_TRACE is not set 859# CONFIG_BLK_DEV_IO_TRACE is not set
860# CONFIG_ATOMIC64_SELFTEST is not set
849# CONFIG_SAMPLES is not set 861# CONFIG_SAMPLES is not set
850CONFIG_HAVE_ARCH_KGDB=y 862CONFIG_HAVE_ARCH_KGDB=y
851# CONFIG_KGDB is not set 863# CONFIG_KGDB is not set
diff --git a/arch/arm/configs/s5pc100_defconfig b/arch/arm/configs/s5pc100_defconfig
index 2053be6c9af1..ebc6245b9fca 100644
--- a/arch/arm/configs/s5pc100_defconfig
+++ b/arch/arm/configs/s5pc100_defconfig
@@ -1,12 +1,14 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.30 3# Linux kernel version: 2.6.34
4# Wed Jul 1 15:53:07 2009 4# Wed May 26 19:04:35 2010
5# 5#
6CONFIG_ARM=y 6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y 7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y 8CONFIG_GENERIC_GPIO=y
9CONFIG_MMU=y 9CONFIG_GENERIC_TIME=y
10CONFIG_ARCH_USES_GETTIMEOFFSET=y
11CONFIG_HAVE_PROC_CPU=y
10CONFIG_NO_IOPORT=y 12CONFIG_NO_IOPORT=y
11CONFIG_GENERIC_HARDIRQS=y 13CONFIG_GENERIC_HARDIRQS=y
12CONFIG_STACKTRACE_SUPPORT=y 14CONFIG_STACKTRACE_SUPPORT=y
@@ -18,7 +20,9 @@ CONFIG_GENERIC_IRQ_PROBE=y
18CONFIG_RWSEM_GENERIC_SPINLOCK=y 20CONFIG_RWSEM_GENERIC_SPINLOCK=y
19CONFIG_GENERIC_HWEIGHT=y 21CONFIG_GENERIC_HWEIGHT=y
20CONFIG_GENERIC_CALIBRATE_DELAY=y 22CONFIG_GENERIC_CALIBRATE_DELAY=y
23CONFIG_NEED_DMA_MAP_STATE=y
21CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 24CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
25CONFIG_ARM_L1_CACHE_SHIFT_6=y
22CONFIG_VECTORS_BASE=0xffff0000 26CONFIG_VECTORS_BASE=0xffff0000
23CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 27CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
24CONFIG_CONSTRUCTORS=y 28CONFIG_CONSTRUCTORS=y
@@ -31,6 +35,13 @@ CONFIG_BROKEN_ON_SMP=y
31CONFIG_INIT_ENV_ARG_LIMIT=32 35CONFIG_INIT_ENV_ARG_LIMIT=32
32CONFIG_LOCALVERSION="" 36CONFIG_LOCALVERSION=""
33CONFIG_LOCALVERSION_AUTO=y 37CONFIG_LOCALVERSION_AUTO=y
38CONFIG_HAVE_KERNEL_GZIP=y
39CONFIG_HAVE_KERNEL_LZMA=y
40CONFIG_HAVE_KERNEL_LZO=y
41CONFIG_KERNEL_GZIP=y
42# CONFIG_KERNEL_BZIP2 is not set
43# CONFIG_KERNEL_LZMA is not set
44# CONFIG_KERNEL_LZO is not set
34CONFIG_SWAP=y 45CONFIG_SWAP=y
35# CONFIG_SYSVIPC is not set 46# CONFIG_SYSVIPC is not set
36# CONFIG_BSD_PROCESS_ACCT is not set 47# CONFIG_BSD_PROCESS_ACCT is not set
@@ -38,14 +49,15 @@ CONFIG_SWAP=y
38# 49#
39# RCU Subsystem 50# RCU Subsystem
40# 51#
41CONFIG_CLASSIC_RCU=y 52CONFIG_TREE_RCU=y
42# CONFIG_TREE_RCU is not set 53# CONFIG_TREE_PREEMPT_RCU is not set
43# CONFIG_PREEMPT_RCU is not set 54# CONFIG_TINY_RCU is not set
55# CONFIG_RCU_TRACE is not set
56CONFIG_RCU_FANOUT=32
57# CONFIG_RCU_FANOUT_EXACT is not set
44# CONFIG_TREE_RCU_TRACE is not set 58# CONFIG_TREE_RCU_TRACE is not set
45# CONFIG_PREEMPT_RCU_TRACE is not set
46# CONFIG_IKCONFIG is not set 59# CONFIG_IKCONFIG is not set
47CONFIG_LOG_BUF_SHIFT=17 60CONFIG_LOG_BUF_SHIFT=17
48# CONFIG_GROUP_SCHED is not set
49# CONFIG_CGROUPS is not set 61# CONFIG_CGROUPS is not set
50CONFIG_SYSFS_DEPRECATED=y 62CONFIG_SYSFS_DEPRECATED=y
51CONFIG_SYSFS_DEPRECATED_V2=y 63CONFIG_SYSFS_DEPRECATED_V2=y
@@ -59,6 +71,7 @@ CONFIG_INITRAMFS_SOURCE=""
59CONFIG_RD_GZIP=y 71CONFIG_RD_GZIP=y
60CONFIG_RD_BZIP2=y 72CONFIG_RD_BZIP2=y
61CONFIG_RD_LZMA=y 73CONFIG_RD_LZMA=y
74CONFIG_RD_LZO=y
62CONFIG_CC_OPTIMIZE_FOR_SIZE=y 75CONFIG_CC_OPTIMIZE_FOR_SIZE=y
63CONFIG_SYSCTL=y 76CONFIG_SYSCTL=y
64CONFIG_ANON_INODES=y 77CONFIG_ANON_INODES=y
@@ -80,19 +93,21 @@ CONFIG_TIMERFD=y
80CONFIG_EVENTFD=y 93CONFIG_EVENTFD=y
81CONFIG_SHMEM=y 94CONFIG_SHMEM=y
82CONFIG_AIO=y 95CONFIG_AIO=y
96CONFIG_HAVE_PERF_EVENTS=y
97CONFIG_PERF_USE_VMALLOC=y
83 98
84# 99#
85# Performance Counters 100# Kernel Performance Events And Counters
86# 101#
102# CONFIG_PERF_EVENTS is not set
103# CONFIG_PERF_COUNTERS is not set
87CONFIG_VM_EVENT_COUNTERS=y 104CONFIG_VM_EVENT_COUNTERS=y
88CONFIG_SLUB_DEBUG=y 105CONFIG_SLUB_DEBUG=y
89# CONFIG_STRIP_ASM_SYMS is not set
90CONFIG_COMPAT_BRK=y 106CONFIG_COMPAT_BRK=y
91# CONFIG_SLAB is not set 107# CONFIG_SLAB is not set
92CONFIG_SLUB=y 108CONFIG_SLUB=y
93# CONFIG_SLOB is not set 109# CONFIG_SLOB is not set
94# CONFIG_PROFILING is not set 110# CONFIG_PROFILING is not set
95# CONFIG_MARKERS is not set
96CONFIG_HAVE_OPROFILE=y 111CONFIG_HAVE_OPROFILE=y
97# CONFIG_KPROBES is not set 112# CONFIG_KPROBES is not set
98CONFIG_HAVE_KPROBES=y 113CONFIG_HAVE_KPROBES=y
@@ -122,25 +137,56 @@ CONFIG_LBDAF=y
122# IO Schedulers 137# IO Schedulers
123# 138#
124CONFIG_IOSCHED_NOOP=y 139CONFIG_IOSCHED_NOOP=y
125CONFIG_IOSCHED_AS=y
126CONFIG_IOSCHED_DEADLINE=y 140CONFIG_IOSCHED_DEADLINE=y
127CONFIG_IOSCHED_CFQ=y 141CONFIG_IOSCHED_CFQ=y
128# CONFIG_DEFAULT_AS is not set
129# CONFIG_DEFAULT_DEADLINE is not set 142# CONFIG_DEFAULT_DEADLINE is not set
130CONFIG_DEFAULT_CFQ=y 143CONFIG_DEFAULT_CFQ=y
131# CONFIG_DEFAULT_NOOP is not set 144# CONFIG_DEFAULT_NOOP is not set
132CONFIG_DEFAULT_IOSCHED="cfq" 145CONFIG_DEFAULT_IOSCHED="cfq"
146# CONFIG_INLINE_SPIN_TRYLOCK is not set
147# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
148# CONFIG_INLINE_SPIN_LOCK is not set
149# CONFIG_INLINE_SPIN_LOCK_BH is not set
150# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
151# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
152# CONFIG_INLINE_SPIN_UNLOCK is not set
153# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
154# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
155# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
156# CONFIG_INLINE_READ_TRYLOCK is not set
157# CONFIG_INLINE_READ_LOCK is not set
158# CONFIG_INLINE_READ_LOCK_BH is not set
159# CONFIG_INLINE_READ_LOCK_IRQ is not set
160# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
161# CONFIG_INLINE_READ_UNLOCK is not set
162# CONFIG_INLINE_READ_UNLOCK_BH is not set
163# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
164# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
165# CONFIG_INLINE_WRITE_TRYLOCK is not set
166# CONFIG_INLINE_WRITE_LOCK is not set
167# CONFIG_INLINE_WRITE_LOCK_BH is not set
168# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
169# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
170# CONFIG_INLINE_WRITE_UNLOCK is not set
171# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
172# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
173# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
174# CONFIG_MUTEX_SPIN_ON_OWNER is not set
133# CONFIG_FREEZER is not set 175# CONFIG_FREEZER is not set
134 176
135# 177#
136# System Type 178# System Type
137# 179#
180CONFIG_MMU=y
138# CONFIG_ARCH_AAEC2000 is not set 181# CONFIG_ARCH_AAEC2000 is not set
139# CONFIG_ARCH_INTEGRATOR is not set 182# CONFIG_ARCH_INTEGRATOR is not set
140# CONFIG_ARCH_REALVIEW is not set 183# CONFIG_ARCH_REALVIEW is not set
141# CONFIG_ARCH_VERSATILE is not set 184# CONFIG_ARCH_VERSATILE is not set
185# CONFIG_ARCH_VEXPRESS is not set
142# CONFIG_ARCH_AT91 is not set 186# CONFIG_ARCH_AT91 is not set
187# CONFIG_ARCH_BCMRING is not set
143# CONFIG_ARCH_CLPS711X is not set 188# CONFIG_ARCH_CLPS711X is not set
189# CONFIG_ARCH_CNS3XXX is not set
144# CONFIG_ARCH_GEMINI is not set 190# CONFIG_ARCH_GEMINI is not set
145# CONFIG_ARCH_EBSA110 is not set 191# CONFIG_ARCH_EBSA110 is not set
146# CONFIG_ARCH_EP93XX is not set 192# CONFIG_ARCH_EP93XX is not set
@@ -156,6 +202,7 @@ CONFIG_DEFAULT_IOSCHED="cfq"
156# CONFIG_ARCH_IXP2000 is not set 202# CONFIG_ARCH_IXP2000 is not set
157# CONFIG_ARCH_IXP4XX is not set 203# CONFIG_ARCH_IXP4XX is not set
158# CONFIG_ARCH_L7200 is not set 204# CONFIG_ARCH_L7200 is not set
205# CONFIG_ARCH_DOVE is not set
159# CONFIG_ARCH_KIRKWOOD is not set 206# CONFIG_ARCH_KIRKWOOD is not set
160# CONFIG_ARCH_LOKI is not set 207# CONFIG_ARCH_LOKI is not set
161# CONFIG_ARCH_MV78XX0 is not set 208# CONFIG_ARCH_MV78XX0 is not set
@@ -164,39 +211,64 @@ CONFIG_DEFAULT_IOSCHED="cfq"
164# CONFIG_ARCH_KS8695 is not set 211# CONFIG_ARCH_KS8695 is not set
165# CONFIG_ARCH_NS9XXX is not set 212# CONFIG_ARCH_NS9XXX is not set
166# CONFIG_ARCH_W90X900 is not set 213# CONFIG_ARCH_W90X900 is not set
214# CONFIG_ARCH_NUC93X is not set
167# CONFIG_ARCH_PNX4008 is not set 215# CONFIG_ARCH_PNX4008 is not set
168# CONFIG_ARCH_PXA is not set 216# CONFIG_ARCH_PXA is not set
169# CONFIG_ARCH_MSM is not set 217# CONFIG_ARCH_MSM is not set
218# CONFIG_ARCH_SHMOBILE is not set
170# CONFIG_ARCH_RPC is not set 219# CONFIG_ARCH_RPC is not set
171# CONFIG_ARCH_SA1100 is not set 220# CONFIG_ARCH_SA1100 is not set
172# CONFIG_ARCH_S3C2410 is not set 221# CONFIG_ARCH_S3C2410 is not set
173# CONFIG_ARCH_S3C64XX is not set 222# CONFIG_ARCH_S3C64XX is not set
223# CONFIG_ARCH_S5P6440 is not set
224# CONFIG_ARCH_S5P6442 is not set
174CONFIG_ARCH_S5PC100=y 225CONFIG_ARCH_S5PC100=y
226# CONFIG_ARCH_S5PV210 is not set
175# CONFIG_ARCH_SHARK is not set 227# CONFIG_ARCH_SHARK is not set
176# CONFIG_ARCH_LH7A40X is not set 228# CONFIG_ARCH_LH7A40X is not set
177# CONFIG_ARCH_U300 is not set 229# CONFIG_ARCH_U300 is not set
230# CONFIG_ARCH_U8500 is not set
231# CONFIG_ARCH_NOMADIK is not set
178# CONFIG_ARCH_DAVINCI is not set 232# CONFIG_ARCH_DAVINCI is not set
179# CONFIG_ARCH_OMAP is not set 233# CONFIG_ARCH_OMAP is not set
180CONFIG_PLAT_S3C=y 234# CONFIG_PLAT_SPEAR is not set
235CONFIG_PLAT_SAMSUNG=y
181 236
182# 237#
183# Boot options 238# Boot options
184# 239#
185# CONFIG_S3C_BOOT_ERROR_RESET is not set 240# CONFIG_S3C_BOOT_ERROR_RESET is not set
186CONFIG_S3C_BOOT_UART_FORCE_FIFO=y 241CONFIG_S3C_BOOT_UART_FORCE_FIFO=y
242CONFIG_S3C_LOWLEVEL_UART_PORT=0
243CONFIG_SAMSUNG_CLKSRC=y
244CONFIG_SAMSUNG_IRQ_VIC_TIMER=y
245CONFIG_SAMSUNG_IRQ_UART=y
246CONFIG_SAMSUNG_GPIOLIB_4BIT=y
247CONFIG_S3C_GPIO_CFG_S3C24XX=y
248CONFIG_S3C_GPIO_CFG_S3C64XX=y
249CONFIG_S3C_GPIO_PULL_UPDOWN=y
250CONFIG_S5P_GPIO_DRVSTR=y
251CONFIG_SAMSUNG_GPIO_EXTRA=0
252CONFIG_S3C_GPIO_SPACE=0
253CONFIG_S3C_GPIO_TRACK=y
254# CONFIG_S3C_ADC is not set
255CONFIG_S3C_DEV_HSMMC=y
256CONFIG_S3C_DEV_HSMMC1=y
257CONFIG_S3C_DEV_HSMMC2=y
258CONFIG_S3C_DEV_I2C1=y
259CONFIG_S3C_DEV_FB=y
260CONFIG_S3C_PL330_DMA=y
187 261
188# 262#
189# Power management 263# Power management
190# 264#
191CONFIG_S3C_LOWLEVEL_UART_PORT=0 265CONFIG_PLAT_S5P=y
192CONFIG_S3C_GPIO_SPACE=0 266CONFIG_S5P_EXT_INT=y
193CONFIG_S3C_GPIO_TRACK=y
194CONFIG_S3C_GPIO_PULL_UPDOWN=y
195CONFIG_PLAT_S5PC1XX=y
196CONFIG_CPU_S5PC100_INIT=y
197CONFIG_CPU_S5PC100_CLOCK=y
198CONFIG_S5PC100_SETUP_I2C0=y
199CONFIG_CPU_S5PC100=y 267CONFIG_CPU_S5PC100=y
268CONFIG_S5PC100_SETUP_FB_24BPP=y
269CONFIG_S5PC100_SETUP_I2C1=y
270CONFIG_S5PC100_SETUP_SDHCI=y
271CONFIG_S5PC100_SETUP_SDHCI_GPIO=y
200CONFIG_MACH_SMDKC100=y 272CONFIG_MACH_SMDKC100=y
201 273
202# 274#
@@ -206,7 +278,7 @@ CONFIG_CPU_32v6K=y
206CONFIG_CPU_V7=y 278CONFIG_CPU_V7=y
207CONFIG_CPU_32v7=y 279CONFIG_CPU_32v7=y
208CONFIG_CPU_ABRT_EV7=y 280CONFIG_CPU_ABRT_EV7=y
209CONFIG_CPU_PABRT_IFAR=y 281CONFIG_CPU_PABRT_V7=y
210CONFIG_CPU_CACHE_V7=y 282CONFIG_CPU_CACHE_V7=y
211CONFIG_CPU_CACHE_VIPT=y 283CONFIG_CPU_CACHE_VIPT=y
212CONFIG_CPU_COPY_V6=y 284CONFIG_CPU_COPY_V6=y
@@ -224,11 +296,15 @@ CONFIG_ARM_THUMB=y
224# CONFIG_CPU_DCACHE_DISABLE is not set 296# CONFIG_CPU_DCACHE_DISABLE is not set
225# CONFIG_CPU_BPREDICT_DISABLE is not set 297# CONFIG_CPU_BPREDICT_DISABLE is not set
226CONFIG_HAS_TLS_REG=y 298CONFIG_HAS_TLS_REG=y
299CONFIG_ARM_L1_CACHE_SHIFT=6
300CONFIG_ARM_DMA_MEM_BUFFERABLE=y
301CONFIG_CPU_HAS_PMU=y
227# CONFIG_ARM_ERRATA_430973 is not set 302# CONFIG_ARM_ERRATA_430973 is not set
228# CONFIG_ARM_ERRATA_458693 is not set 303# CONFIG_ARM_ERRATA_458693 is not set
229# CONFIG_ARM_ERRATA_460075 is not set 304# CONFIG_ARM_ERRATA_460075 is not set
230CONFIG_ARM_VIC=y 305CONFIG_ARM_VIC=y
231CONFIG_ARM_VIC_NR=2 306CONFIG_ARM_VIC_NR=2
307CONFIG_PL330=y
232 308
233# 309#
234# Bus support 310# Bus support
@@ -244,8 +320,11 @@ CONFIG_VMSPLIT_3G=y
244# CONFIG_VMSPLIT_2G is not set 320# CONFIG_VMSPLIT_2G is not set
245# CONFIG_VMSPLIT_1G is not set 321# CONFIG_VMSPLIT_1G is not set
246CONFIG_PAGE_OFFSET=0xC0000000 322CONFIG_PAGE_OFFSET=0xC0000000
323CONFIG_PREEMPT_NONE=y
324# CONFIG_PREEMPT_VOLUNTARY is not set
247# CONFIG_PREEMPT is not set 325# CONFIG_PREEMPT is not set
248CONFIG_HZ=100 326CONFIG_HZ=100
327# CONFIG_THUMB2_KERNEL is not set
249CONFIG_AEABI=y 328CONFIG_AEABI=y
250CONFIG_OABI_COMPAT=y 329CONFIG_OABI_COMPAT=y
251# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set 330# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
@@ -258,12 +337,11 @@ CONFIG_FLATMEM_MANUAL=y
258CONFIG_FLATMEM=y 337CONFIG_FLATMEM=y
259CONFIG_FLAT_NODE_MEM_MAP=y 338CONFIG_FLAT_NODE_MEM_MAP=y
260CONFIG_PAGEFLAGS_EXTENDED=y 339CONFIG_PAGEFLAGS_EXTENDED=y
261CONFIG_SPLIT_PTLOCK_CPUS=4 340CONFIG_SPLIT_PTLOCK_CPUS=999999
262# CONFIG_PHYS_ADDR_T_64BIT is not set 341# CONFIG_PHYS_ADDR_T_64BIT is not set
263CONFIG_ZONE_DMA_FLAG=0 342CONFIG_ZONE_DMA_FLAG=0
264CONFIG_VIRT_TO_BUS=y 343CONFIG_VIRT_TO_BUS=y
265CONFIG_HAVE_MLOCK=y 344# CONFIG_KSM is not set
266CONFIG_HAVE_MLOCKED_PAGE_BIT=y
267CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 345CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
268CONFIG_ALIGNMENT_TRAP=y 346CONFIG_ALIGNMENT_TRAP=y
269# CONFIG_UACCESS_WITH_MEMCPY is not set 347# CONFIG_UACCESS_WITH_MEMCPY is not set
@@ -274,6 +352,7 @@ CONFIG_ALIGNMENT_TRAP=y
274CONFIG_ZBOOT_ROM_TEXT=0 352CONFIG_ZBOOT_ROM_TEXT=0
275CONFIG_ZBOOT_ROM_BSS=0 353CONFIG_ZBOOT_ROM_BSS=0
276CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=cramfs init=/linuxrc console=ttySAC2,115200 mem=128M" 354CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=cramfs init=/linuxrc console=ttySAC2,115200 mem=128M"
355# CONFIG_CMDLINE_FORCE is not set
277# CONFIG_XIP_KERNEL is not set 356# CONFIG_XIP_KERNEL is not set
278# CONFIG_KEXEC is not set 357# CONFIG_KEXEC is not set
279 358
@@ -317,6 +396,7 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y
317# Generic Driver Options 396# Generic Driver Options
318# 397#
319CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 398CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
399# CONFIG_DEVTMPFS is not set
320CONFIG_STANDALONE=y 400CONFIG_STANDALONE=y
321CONFIG_PREVENT_FIRMWARE_BUILD=y 401CONFIG_PREVENT_FIRMWARE_BUILD=y
322CONFIG_FW_LOADER=y 402CONFIG_FW_LOADER=y
@@ -331,6 +411,10 @@ CONFIG_BLK_DEV=y
331# CONFIG_BLK_DEV_COW_COMMON is not set 411# CONFIG_BLK_DEV_COW_COMMON is not set
332CONFIG_BLK_DEV_LOOP=y 412CONFIG_BLK_DEV_LOOP=y
333# CONFIG_BLK_DEV_CRYPTOLOOP is not set 413# CONFIG_BLK_DEV_CRYPTOLOOP is not set
414
415#
416# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
417#
334CONFIG_BLK_DEV_RAM=y 418CONFIG_BLK_DEV_RAM=y
335CONFIG_BLK_DEV_RAM_COUNT=16 419CONFIG_BLK_DEV_RAM_COUNT=16
336CONFIG_BLK_DEV_RAM_SIZE=8192 420CONFIG_BLK_DEV_RAM_SIZE=8192
@@ -338,9 +422,12 @@ CONFIG_BLK_DEV_RAM_SIZE=8192
338# CONFIG_CDROM_PKTCDVD is not set 422# CONFIG_CDROM_PKTCDVD is not set
339# CONFIG_MG_DISK is not set 423# CONFIG_MG_DISK is not set
340CONFIG_MISC_DEVICES=y 424CONFIG_MISC_DEVICES=y
425# CONFIG_AD525X_DPOT is not set
341# CONFIG_ICS932S401 is not set 426# CONFIG_ICS932S401 is not set
342# CONFIG_ENCLOSURE_SERVICES is not set 427# CONFIG_ENCLOSURE_SERVICES is not set
343# CONFIG_ISL29003 is not set 428# CONFIG_ISL29003 is not set
429# CONFIG_SENSORS_TSL2550 is not set
430# CONFIG_DS1682 is not set
344# CONFIG_C2PORT is not set 431# CONFIG_C2PORT is not set
345 432
346# 433#
@@ -350,18 +437,21 @@ CONFIG_EEPROM_AT24=y
350# CONFIG_EEPROM_LEGACY is not set 437# CONFIG_EEPROM_LEGACY is not set
351# CONFIG_EEPROM_MAX6875 is not set 438# CONFIG_EEPROM_MAX6875 is not set
352# CONFIG_EEPROM_93CX6 is not set 439# CONFIG_EEPROM_93CX6 is not set
440# CONFIG_IWMC3200TOP is not set
353CONFIG_HAVE_IDE=y 441CONFIG_HAVE_IDE=y
354# CONFIG_IDE is not set 442# CONFIG_IDE is not set
355 443
356# 444#
357# SCSI device support 445# SCSI device support
358# 446#
447CONFIG_SCSI_MOD=y
359# CONFIG_RAID_ATTRS is not set 448# CONFIG_RAID_ATTRS is not set
360# CONFIG_SCSI is not set 449# CONFIG_SCSI is not set
361# CONFIG_SCSI_DMA is not set 450# CONFIG_SCSI_DMA is not set
362# CONFIG_SCSI_NETLINK is not set 451# CONFIG_SCSI_NETLINK is not set
363# CONFIG_ATA is not set 452# CONFIG_ATA is not set
364# CONFIG_MD is not set 453# CONFIG_MD is not set
454# CONFIG_PHONE is not set
365 455
366# 456#
367# Input device support 457# Input device support
@@ -369,6 +459,7 @@ CONFIG_HAVE_IDE=y
369CONFIG_INPUT=y 459CONFIG_INPUT=y
370# CONFIG_INPUT_FF_MEMLESS is not set 460# CONFIG_INPUT_FF_MEMLESS is not set
371# CONFIG_INPUT_POLLDEV is not set 461# CONFIG_INPUT_POLLDEV is not set
462# CONFIG_INPUT_SPARSEKMAP is not set
372 463
373# 464#
374# Userland interfaces 465# Userland interfaces
@@ -385,13 +476,19 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
385# Input Device Drivers 476# Input Device Drivers
386# 477#
387CONFIG_INPUT_KEYBOARD=y 478CONFIG_INPUT_KEYBOARD=y
479# CONFIG_KEYBOARD_ADP5588 is not set
388CONFIG_KEYBOARD_ATKBD=y 480CONFIG_KEYBOARD_ATKBD=y
389# CONFIG_KEYBOARD_SUNKBD is not set 481# CONFIG_QT2160 is not set
390# CONFIG_KEYBOARD_LKKBD is not set 482# CONFIG_KEYBOARD_LKKBD is not set
391# CONFIG_KEYBOARD_XTKBD is not set 483# CONFIG_KEYBOARD_GPIO is not set
484# CONFIG_KEYBOARD_TCA6416 is not set
485# CONFIG_KEYBOARD_MATRIX is not set
486# CONFIG_KEYBOARD_MAX7359 is not set
392# CONFIG_KEYBOARD_NEWTON is not set 487# CONFIG_KEYBOARD_NEWTON is not set
488# CONFIG_KEYBOARD_OPENCORES is not set
393# CONFIG_KEYBOARD_STOWAWAY is not set 489# CONFIG_KEYBOARD_STOWAWAY is not set
394# CONFIG_KEYBOARD_GPIO is not set 490# CONFIG_KEYBOARD_SUNKBD is not set
491# CONFIG_KEYBOARD_XTKBD is not set
395CONFIG_INPUT_MOUSE=y 492CONFIG_INPUT_MOUSE=y
396CONFIG_MOUSE_PS2=y 493CONFIG_MOUSE_PS2=y
397CONFIG_MOUSE_PS2_ALPS=y 494CONFIG_MOUSE_PS2_ALPS=y
@@ -399,6 +496,7 @@ CONFIG_MOUSE_PS2_LOGIPS2PP=y
399CONFIG_MOUSE_PS2_SYNAPTICS=y 496CONFIG_MOUSE_PS2_SYNAPTICS=y
400CONFIG_MOUSE_PS2_TRACKPOINT=y 497CONFIG_MOUSE_PS2_TRACKPOINT=y
401# CONFIG_MOUSE_PS2_ELANTECH is not set 498# CONFIG_MOUSE_PS2_ELANTECH is not set
499# CONFIG_MOUSE_PS2_SENTELIC is not set
402# CONFIG_MOUSE_PS2_TOUCHKIT is not set 500# CONFIG_MOUSE_PS2_TOUCHKIT is not set
403# CONFIG_MOUSE_SERIAL is not set 501# CONFIG_MOUSE_SERIAL is not set
404# CONFIG_MOUSE_APPLETOUCH is not set 502# CONFIG_MOUSE_APPLETOUCH is not set
@@ -418,6 +516,7 @@ CONFIG_SERIO=y
418CONFIG_SERIO_SERPORT=y 516CONFIG_SERIO_SERPORT=y
419CONFIG_SERIO_LIBPS2=y 517CONFIG_SERIO_LIBPS2=y
420# CONFIG_SERIO_RAW is not set 518# CONFIG_SERIO_RAW is not set
519# CONFIG_SERIO_ALTERA_PS2 is not set
421# CONFIG_GAMEPORT is not set 520# CONFIG_GAMEPORT is not set
422 521
423# 522#
@@ -444,11 +543,16 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=4
444# Non-8250 serial port support 543# Non-8250 serial port support
445# 544#
446CONFIG_SERIAL_SAMSUNG=y 545CONFIG_SERIAL_SAMSUNG=y
447CONFIG_SERIAL_SAMSUNG_UARTS=3 546CONFIG_SERIAL_SAMSUNG_UARTS_4=y
547CONFIG_SERIAL_SAMSUNG_UARTS=4
448# CONFIG_SERIAL_SAMSUNG_DEBUG is not set 548# CONFIG_SERIAL_SAMSUNG_DEBUG is not set
449CONFIG_SERIAL_SAMSUNG_CONSOLE=y 549CONFIG_SERIAL_SAMSUNG_CONSOLE=y
550CONFIG_SERIAL_S3C6400=y
450CONFIG_SERIAL_CORE=y 551CONFIG_SERIAL_CORE=y
451CONFIG_SERIAL_CORE_CONSOLE=y 552CONFIG_SERIAL_CORE_CONSOLE=y
553# CONFIG_SERIAL_TIMBERDALE is not set
554# CONFIG_SERIAL_ALTERA_JTAGUART is not set
555# CONFIG_SERIAL_ALTERA_UART is not set
452CONFIG_UNIX98_PTYS=y 556CONFIG_UNIX98_PTYS=y
453# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 557# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
454CONFIG_LEGACY_PTYS=y 558CONFIG_LEGACY_PTYS=y
@@ -461,6 +565,7 @@ CONFIG_HW_RANDOM=y
461# CONFIG_TCG_TPM is not set 565# CONFIG_TCG_TPM is not set
462CONFIG_I2C=y 566CONFIG_I2C=y
463CONFIG_I2C_BOARDINFO=y 567CONFIG_I2C_BOARDINFO=y
568CONFIG_I2C_COMPAT=y
464CONFIG_I2C_CHARDEV=y 569CONFIG_I2C_CHARDEV=y
465CONFIG_I2C_HELPER_AUTO=y 570CONFIG_I2C_HELPER_AUTO=y
466 571
@@ -471,9 +576,11 @@ CONFIG_I2C_HELPER_AUTO=y
471# 576#
472# I2C system bus drivers (mostly embedded / system-on-chip) 577# I2C system bus drivers (mostly embedded / system-on-chip)
473# 578#
579# CONFIG_I2C_DESIGNWARE is not set
474# CONFIG_I2C_GPIO is not set 580# CONFIG_I2C_GPIO is not set
475# CONFIG_I2C_OCORES is not set 581# CONFIG_I2C_OCORES is not set
476# CONFIG_I2C_SIMTEC is not set 582# CONFIG_I2C_SIMTEC is not set
583# CONFIG_I2C_XILINX is not set
477 584
478# 585#
479# External I2C/SMBus adapter drivers 586# External I2C/SMBus adapter drivers
@@ -486,20 +593,15 @@ CONFIG_I2C_HELPER_AUTO=y
486# 593#
487# CONFIG_I2C_PCA_PLATFORM is not set 594# CONFIG_I2C_PCA_PLATFORM is not set
488# CONFIG_I2C_STUB is not set 595# CONFIG_I2C_STUB is not set
489
490#
491# Miscellaneous I2C Chip support
492#
493# CONFIG_DS1682 is not set
494# CONFIG_SENSORS_PCF8574 is not set
495# CONFIG_PCF8575 is not set
496# CONFIG_SENSORS_PCA9539 is not set
497# CONFIG_SENSORS_TSL2550 is not set
498# CONFIG_I2C_DEBUG_CORE is not set 596# CONFIG_I2C_DEBUG_CORE is not set
499# CONFIG_I2C_DEBUG_ALGO is not set 597# CONFIG_I2C_DEBUG_ALGO is not set
500# CONFIG_I2C_DEBUG_BUS is not set 598# CONFIG_I2C_DEBUG_BUS is not set
501# CONFIG_I2C_DEBUG_CHIP is not set
502# CONFIG_SPI is not set 599# CONFIG_SPI is not set
600
601#
602# PPS support
603#
604# CONFIG_PPS is not set
503CONFIG_ARCH_REQUIRE_GPIOLIB=y 605CONFIG_ARCH_REQUIRE_GPIOLIB=y
504CONFIG_GPIOLIB=y 606CONFIG_GPIOLIB=y
505# CONFIG_DEBUG_GPIO is not set 607# CONFIG_DEBUG_GPIO is not set
@@ -508,13 +610,16 @@ CONFIG_GPIOLIB=y
508# 610#
509# Memory mapped GPIO expanders: 611# Memory mapped GPIO expanders:
510# 612#
613# CONFIG_GPIO_IT8761E is not set
511 614
512# 615#
513# I2C GPIO expanders: 616# I2C GPIO expanders:
514# 617#
618# CONFIG_GPIO_MAX7300 is not set
515# CONFIG_GPIO_MAX732X is not set 619# CONFIG_GPIO_MAX732X is not set
516# CONFIG_GPIO_PCA953X is not set 620# CONFIG_GPIO_PCA953X is not set
517# CONFIG_GPIO_PCF857X is not set 621# CONFIG_GPIO_PCF857X is not set
622# CONFIG_GPIO_ADP5588 is not set
518 623
519# 624#
520# PCI GPIO expanders: 625# PCI GPIO expanders:
@@ -523,10 +628,19 @@ CONFIG_GPIOLIB=y
523# 628#
524# SPI GPIO expanders: 629# SPI GPIO expanders:
525# 630#
631
632#
633# AC97 GPIO expanders:
634#
526# CONFIG_W1 is not set 635# CONFIG_W1 is not set
527# CONFIG_POWER_SUPPLY is not set 636# CONFIG_POWER_SUPPLY is not set
528CONFIG_HWMON=y 637CONFIG_HWMON=y
529# CONFIG_HWMON_VID is not set 638# CONFIG_HWMON_VID is not set
639# CONFIG_HWMON_DEBUG_CHIP is not set
640
641#
642# Native drivers
643#
530# CONFIG_SENSORS_AD7414 is not set 644# CONFIG_SENSORS_AD7414 is not set
531# CONFIG_SENSORS_AD7418 is not set 645# CONFIG_SENSORS_AD7418 is not set
532# CONFIG_SENSORS_ADM1021 is not set 646# CONFIG_SENSORS_ADM1021 is not set
@@ -535,10 +649,11 @@ CONFIG_HWMON=y
535# CONFIG_SENSORS_ADM1029 is not set 649# CONFIG_SENSORS_ADM1029 is not set
536# CONFIG_SENSORS_ADM1031 is not set 650# CONFIG_SENSORS_ADM1031 is not set
537# CONFIG_SENSORS_ADM9240 is not set 651# CONFIG_SENSORS_ADM9240 is not set
652# CONFIG_SENSORS_ADT7411 is not set
538# CONFIG_SENSORS_ADT7462 is not set 653# CONFIG_SENSORS_ADT7462 is not set
539# CONFIG_SENSORS_ADT7470 is not set 654# CONFIG_SENSORS_ADT7470 is not set
540# CONFIG_SENSORS_ADT7473 is not set
541# CONFIG_SENSORS_ADT7475 is not set 655# CONFIG_SENSORS_ADT7475 is not set
656# CONFIG_SENSORS_ASC7621 is not set
542# CONFIG_SENSORS_ATXP1 is not set 657# CONFIG_SENSORS_ATXP1 is not set
543# CONFIG_SENSORS_DS1621 is not set 658# CONFIG_SENSORS_DS1621 is not set
544# CONFIG_SENSORS_F71805F is not set 659# CONFIG_SENSORS_F71805F is not set
@@ -549,6 +664,7 @@ CONFIG_HWMON=y
549# CONFIG_SENSORS_GL520SM is not set 664# CONFIG_SENSORS_GL520SM is not set
550# CONFIG_SENSORS_IT87 is not set 665# CONFIG_SENSORS_IT87 is not set
551# CONFIG_SENSORS_LM63 is not set 666# CONFIG_SENSORS_LM63 is not set
667# CONFIG_SENSORS_LM73 is not set
552# CONFIG_SENSORS_LM75 is not set 668# CONFIG_SENSORS_LM75 is not set
553# CONFIG_SENSORS_LM77 is not set 669# CONFIG_SENSORS_LM77 is not set
554# CONFIG_SENSORS_LM78 is not set 670# CONFIG_SENSORS_LM78 is not set
@@ -573,8 +689,10 @@ CONFIG_HWMON=y
573# CONFIG_SENSORS_SMSC47M192 is not set 689# CONFIG_SENSORS_SMSC47M192 is not set
574# CONFIG_SENSORS_SMSC47B397 is not set 690# CONFIG_SENSORS_SMSC47B397 is not set
575# CONFIG_SENSORS_ADS7828 is not set 691# CONFIG_SENSORS_ADS7828 is not set
692# CONFIG_SENSORS_AMC6821 is not set
576# CONFIG_SENSORS_THMC50 is not set 693# CONFIG_SENSORS_THMC50 is not set
577# CONFIG_SENSORS_TMP401 is not set 694# CONFIG_SENSORS_TMP401 is not set
695# CONFIG_SENSORS_TMP421 is not set
578# CONFIG_SENSORS_VT1211 is not set 696# CONFIG_SENSORS_VT1211 is not set
579# CONFIG_SENSORS_W83781D is not set 697# CONFIG_SENSORS_W83781D is not set
580# CONFIG_SENSORS_W83791D is not set 698# CONFIG_SENSORS_W83791D is not set
@@ -584,9 +702,8 @@ CONFIG_HWMON=y
584# CONFIG_SENSORS_W83L786NG is not set 702# CONFIG_SENSORS_W83L786NG is not set
585# CONFIG_SENSORS_W83627HF is not set 703# CONFIG_SENSORS_W83627HF is not set
586# CONFIG_SENSORS_W83627EHF is not set 704# CONFIG_SENSORS_W83627EHF is not set
587# CONFIG_HWMON_DEBUG_CHIP is not set 705# CONFIG_SENSORS_LIS3_I2C is not set
588# CONFIG_THERMAL is not set 706# CONFIG_THERMAL is not set
589# CONFIG_THERMAL_HWMON is not set
590# CONFIG_WATCHDOG is not set 707# CONFIG_WATCHDOG is not set
591CONFIG_SSB_POSSIBLE=y 708CONFIG_SSB_POSSIBLE=y
592 709
@@ -599,10 +716,12 @@ CONFIG_SSB_POSSIBLE=y
599# Multifunction device drivers 716# Multifunction device drivers
600# 717#
601# CONFIG_MFD_CORE is not set 718# CONFIG_MFD_CORE is not set
719# CONFIG_MFD_88PM860X is not set
602# CONFIG_MFD_SM501 is not set 720# CONFIG_MFD_SM501 is not set
603# CONFIG_MFD_ASIC3 is not set 721# CONFIG_MFD_ASIC3 is not set
604# CONFIG_HTC_EGPIO is not set 722# CONFIG_HTC_EGPIO is not set
605# CONFIG_HTC_PASIC3 is not set 723# CONFIG_HTC_PASIC3 is not set
724# CONFIG_HTC_I2CPLD is not set
606# CONFIG_TPS65010 is not set 725# CONFIG_TPS65010 is not set
607# CONFIG_TWL4030_CORE is not set 726# CONFIG_TWL4030_CORE is not set
608# CONFIG_MFD_TMIO is not set 727# CONFIG_MFD_TMIO is not set
@@ -610,10 +729,15 @@ CONFIG_SSB_POSSIBLE=y
610# CONFIG_MFD_TC6387XB is not set 729# CONFIG_MFD_TC6387XB is not set
611# CONFIG_MFD_TC6393XB is not set 730# CONFIG_MFD_TC6393XB is not set
612# CONFIG_PMIC_DA903X is not set 731# CONFIG_PMIC_DA903X is not set
732# CONFIG_PMIC_ADP5520 is not set
733# CONFIG_MFD_MAX8925 is not set
613# CONFIG_MFD_WM8400 is not set 734# CONFIG_MFD_WM8400 is not set
735# CONFIG_MFD_WM831X is not set
614# CONFIG_MFD_WM8350_I2C is not set 736# CONFIG_MFD_WM8350_I2C is not set
737# CONFIG_MFD_WM8994 is not set
615# CONFIG_MFD_PCF50633 is not set 738# CONFIG_MFD_PCF50633 is not set
616# CONFIG_AB3100_CORE is not set 739# CONFIG_AB3100_CORE is not set
740# CONFIG_REGULATOR is not set
617# CONFIG_MEDIA_SUPPORT is not set 741# CONFIG_MEDIA_SUPPORT is not set
618 742
619# 743#
@@ -637,7 +761,6 @@ CONFIG_DUMMY_CONSOLE=y
637# CONFIG_SOUND is not set 761# CONFIG_SOUND is not set
638CONFIG_HID_SUPPORT=y 762CONFIG_HID_SUPPORT=y
639CONFIG_HID=y 763CONFIG_HID=y
640CONFIG_HID_DEBUG=y
641# CONFIG_HIDRAW is not set 764# CONFIG_HIDRAW is not set
642# CONFIG_HID_PID is not set 765# CONFIG_HID_PID is not set
643 766
@@ -680,13 +803,12 @@ CONFIG_SDIO_UART=y
680CONFIG_MMC_SDHCI=y 803CONFIG_MMC_SDHCI=y
681# CONFIG_MMC_SDHCI_PLTFM is not set 804# CONFIG_MMC_SDHCI_PLTFM is not set
682# CONFIG_MEMSTICK is not set 805# CONFIG_MEMSTICK is not set
683# CONFIG_ACCESSIBILITY is not set
684# CONFIG_NEW_LEDS is not set 806# CONFIG_NEW_LEDS is not set
807# CONFIG_ACCESSIBILITY is not set
685CONFIG_RTC_LIB=y 808CONFIG_RTC_LIB=y
686# CONFIG_RTC_CLASS is not set 809# CONFIG_RTC_CLASS is not set
687# CONFIG_DMADEVICES is not set 810# CONFIG_DMADEVICES is not set
688# CONFIG_AUXDISPLAY is not set 811# CONFIG_AUXDISPLAY is not set
689# CONFIG_REGULATOR is not set
690# CONFIG_UIO is not set 812# CONFIG_UIO is not set
691# CONFIG_STAGING is not set 813# CONFIG_STAGING is not set
692 814
@@ -710,6 +832,7 @@ CONFIG_FS_POSIX_ACL=y
710# CONFIG_XFS_FS is not set 832# CONFIG_XFS_FS is not set
711# CONFIG_GFS2_FS is not set 833# CONFIG_GFS2_FS is not set
712# CONFIG_BTRFS_FS is not set 834# CONFIG_BTRFS_FS is not set
835# CONFIG_NILFS2_FS is not set
713CONFIG_FILE_LOCKING=y 836CONFIG_FILE_LOCKING=y
714CONFIG_FSNOTIFY=y 837CONFIG_FSNOTIFY=y
715CONFIG_DNOTIFY=y 838CONFIG_DNOTIFY=y
@@ -758,6 +881,7 @@ CONFIG_MISC_FILESYSTEMS=y
758# CONFIG_BEFS_FS is not set 881# CONFIG_BEFS_FS is not set
759# CONFIG_BFS_FS is not set 882# CONFIG_BFS_FS is not set
760# CONFIG_EFS_FS is not set 883# CONFIG_EFS_FS is not set
884# CONFIG_LOGFS is not set
761CONFIG_CRAMFS=y 885CONFIG_CRAMFS=y
762# CONFIG_SQUASHFS is not set 886# CONFIG_SQUASHFS is not set
763# CONFIG_VXFS_FS is not set 887# CONFIG_VXFS_FS is not set
@@ -772,7 +896,6 @@ CONFIG_ROMFS_BACKED_BY_BLOCK=y
772CONFIG_ROMFS_ON_BLOCK=y 896CONFIG_ROMFS_ON_BLOCK=y
773# CONFIG_SYSV_FS is not set 897# CONFIG_SYSV_FS is not set
774# CONFIG_UFS_FS is not set 898# CONFIG_UFS_FS is not set
775# CONFIG_NILFS2_FS is not set
776 899
777# 900#
778# Partition Types 901# Partition Types
@@ -789,6 +912,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
789CONFIG_ENABLE_MUST_CHECK=y 912CONFIG_ENABLE_MUST_CHECK=y
790CONFIG_FRAME_WARN=1024 913CONFIG_FRAME_WARN=1024
791CONFIG_MAGIC_SYSRQ=y 914CONFIG_MAGIC_SYSRQ=y
915# CONFIG_STRIP_ASM_SYMS is not set
792# CONFIG_UNUSED_SYMBOLS is not set 916# CONFIG_UNUSED_SYMBOLS is not set
793# CONFIG_DEBUG_FS is not set 917# CONFIG_DEBUG_FS is not set
794# CONFIG_HEADERS_CHECK is not set 918# CONFIG_HEADERS_CHECK is not set
@@ -826,11 +950,13 @@ CONFIG_DEBUG_MEMORY_INIT=y
826# CONFIG_DEBUG_LIST is not set 950# CONFIG_DEBUG_LIST is not set
827# CONFIG_DEBUG_SG is not set 951# CONFIG_DEBUG_SG is not set
828# CONFIG_DEBUG_NOTIFIERS is not set 952# CONFIG_DEBUG_NOTIFIERS is not set
953# CONFIG_DEBUG_CREDENTIALS is not set
829# CONFIG_BOOT_PRINTK_DELAY is not set 954# CONFIG_BOOT_PRINTK_DELAY is not set
830# CONFIG_RCU_TORTURE_TEST is not set 955# CONFIG_RCU_TORTURE_TEST is not set
831# CONFIG_RCU_CPU_STALL_DETECTOR is not set 956# CONFIG_RCU_CPU_STALL_DETECTOR is not set
832# CONFIG_BACKTRACE_SELF_TEST is not set 957# CONFIG_BACKTRACE_SELF_TEST is not set
833# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set 958# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
959# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
834# CONFIG_FAULT_INJECTION is not set 960# CONFIG_FAULT_INJECTION is not set
835# CONFIG_LATENCYTOP is not set 961# CONFIG_LATENCYTOP is not set
836CONFIG_SYSCTL_SYSCALL_CHECK=y 962CONFIG_SYSCTL_SYSCALL_CHECK=y
@@ -839,6 +965,7 @@ CONFIG_HAVE_FUNCTION_TRACER=y
839CONFIG_TRACING_SUPPORT=y 965CONFIG_TRACING_SUPPORT=y
840CONFIG_FTRACE=y 966CONFIG_FTRACE=y
841# CONFIG_FUNCTION_TRACER is not set 967# CONFIG_FUNCTION_TRACER is not set
968# CONFIG_IRQSOFF_TRACER is not set
842# CONFIG_SCHED_TRACER is not set 969# CONFIG_SCHED_TRACER is not set
843# CONFIG_ENABLE_DEFAULT_TRACERS is not set 970# CONFIG_ENABLE_DEFAULT_TRACERS is not set
844# CONFIG_BOOT_TRACER is not set 971# CONFIG_BOOT_TRACER is not set
@@ -849,6 +976,7 @@ CONFIG_BRANCH_PROFILE_NONE=y
849# CONFIG_KMEMTRACE is not set 976# CONFIG_KMEMTRACE is not set
850# CONFIG_WORKQUEUE_TRACER is not set 977# CONFIG_WORKQUEUE_TRACER is not set
851# CONFIG_BLK_DEV_IO_TRACE is not set 978# CONFIG_BLK_DEV_IO_TRACE is not set
979# CONFIG_ATOMIC64_SELFTEST is not set
852# CONFIG_SAMPLES is not set 980# CONFIG_SAMPLES is not set
853CONFIG_HAVE_ARCH_KGDB=y 981CONFIG_HAVE_ARCH_KGDB=y
854# CONFIG_KGDB is not set 982# CONFIG_KGDB is not set
@@ -857,8 +985,9 @@ CONFIG_DEBUG_USER=y
857CONFIG_DEBUG_ERRORS=y 985CONFIG_DEBUG_ERRORS=y
858# CONFIG_DEBUG_STACK_USAGE is not set 986# CONFIG_DEBUG_STACK_USAGE is not set
859CONFIG_DEBUG_LL=y 987CONFIG_DEBUG_LL=y
988# CONFIG_EARLY_PRINTK is not set
860# CONFIG_DEBUG_ICEDCC is not set 989# CONFIG_DEBUG_ICEDCC is not set
861CONFIG_DEBUG_S3C_PORT=y 990# CONFIG_OC_ETM is not set
862CONFIG_DEBUG_S3C_UART=0 991CONFIG_DEBUG_S3C_UART=0
863 992
864# 993#
@@ -867,7 +996,11 @@ CONFIG_DEBUG_S3C_UART=0
867# CONFIG_KEYS is not set 996# CONFIG_KEYS is not set
868# CONFIG_SECURITY is not set 997# CONFIG_SECURITY is not set
869# CONFIG_SECURITYFS is not set 998# CONFIG_SECURITYFS is not set
870# CONFIG_SECURITY_FILE_CAPABILITIES is not set 999# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1000# CONFIG_DEFAULT_SECURITY_SMACK is not set
1001# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1002CONFIG_DEFAULT_SECURITY_DAC=y
1003CONFIG_DEFAULT_SECURITY=""
871# CONFIG_CRYPTO is not set 1004# CONFIG_CRYPTO is not set
872# CONFIG_BINARY_PRINTF is not set 1005# CONFIG_BINARY_PRINTF is not set
873 1006
@@ -884,8 +1017,10 @@ CONFIG_CRC32=y
884# CONFIG_CRC7 is not set 1017# CONFIG_CRC7 is not set
885# CONFIG_LIBCRC32C is not set 1018# CONFIG_LIBCRC32C is not set
886CONFIG_ZLIB_INFLATE=y 1019CONFIG_ZLIB_INFLATE=y
1020CONFIG_LZO_DECOMPRESS=y
887CONFIG_DECOMPRESS_GZIP=y 1021CONFIG_DECOMPRESS_GZIP=y
888CONFIG_DECOMPRESS_BZIP2=y 1022CONFIG_DECOMPRESS_BZIP2=y
889CONFIG_DECOMPRESS_LZMA=y 1023CONFIG_DECOMPRESS_LZMA=y
1024CONFIG_DECOMPRESS_LZO=y
890CONFIG_HAS_IOMEM=y 1025CONFIG_HAS_IOMEM=y
891CONFIG_HAS_DMA=y 1026CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/s5pc110_defconfig b/arch/arm/configs/s5pc110_defconfig
index 796cb78498c3..c4de360b0f69 100644
--- a/arch/arm/configs/s5pc110_defconfig
+++ b/arch/arm/configs/s5pc110_defconfig
@@ -1,11 +1,13 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.34 3# Linux kernel version: 2.6.34
4# Sat May 22 03:18:21 2010 4# Wed May 26 19:04:37 2010
5# 5#
6CONFIG_ARM=y 6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y 7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y 8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y
10CONFIG_ARCH_USES_GETTIMEOFFSET=y
9CONFIG_HAVE_PROC_CPU=y 11CONFIG_HAVE_PROC_CPU=y
10CONFIG_NO_IOPORT=y 12CONFIG_NO_IOPORT=y
11CONFIG_GENERIC_HARDIRQS=y 13CONFIG_GENERIC_HARDIRQS=y
@@ -35,6 +37,7 @@ CONFIG_INIT_ENV_ARG_LIMIT=32
35CONFIG_LOCALVERSION="" 37CONFIG_LOCALVERSION=""
36CONFIG_LOCALVERSION_AUTO=y 38CONFIG_LOCALVERSION_AUTO=y
37CONFIG_HAVE_KERNEL_GZIP=y 39CONFIG_HAVE_KERNEL_GZIP=y
40CONFIG_HAVE_KERNEL_LZMA=y
38CONFIG_HAVE_KERNEL_LZO=y 41CONFIG_HAVE_KERNEL_LZO=y
39CONFIG_KERNEL_GZIP=y 42CONFIG_KERNEL_GZIP=y
40# CONFIG_KERNEL_BZIP2 is not set 43# CONFIG_KERNEL_BZIP2 is not set
@@ -180,9 +183,11 @@ CONFIG_MMU=y
180# CONFIG_ARCH_INTEGRATOR is not set 183# CONFIG_ARCH_INTEGRATOR is not set
181# CONFIG_ARCH_REALVIEW is not set 184# CONFIG_ARCH_REALVIEW is not set
182# CONFIG_ARCH_VERSATILE is not set 185# CONFIG_ARCH_VERSATILE is not set
186# CONFIG_ARCH_VEXPRESS is not set
183# CONFIG_ARCH_AT91 is not set 187# CONFIG_ARCH_AT91 is not set
184# CONFIG_ARCH_BCMRING is not set 188# CONFIG_ARCH_BCMRING is not set
185# CONFIG_ARCH_CLPS711X is not set 189# CONFIG_ARCH_CLPS711X is not set
190# CONFIG_ARCH_CNS3XXX is not set
186# CONFIG_ARCH_GEMINI is not set 191# CONFIG_ARCH_GEMINI is not set
187# CONFIG_ARCH_EBSA110 is not set 192# CONFIG_ARCH_EBSA110 is not set
188# CONFIG_ARCH_EP93XX is not set 193# CONFIG_ARCH_EP93XX is not set
@@ -218,7 +223,7 @@ CONFIG_MMU=y
218# CONFIG_ARCH_S3C64XX is not set 223# CONFIG_ARCH_S3C64XX is not set
219# CONFIG_ARCH_S5P6440 is not set 224# CONFIG_ARCH_S5P6440 is not set
220# CONFIG_ARCH_S5P6442 is not set 225# CONFIG_ARCH_S5P6442 is not set
221# CONFIG_ARCH_S5PC1XX is not set 226# CONFIG_ARCH_S5PC100 is not set
222CONFIG_ARCH_S5PV210=y 227CONFIG_ARCH_S5PV210=y
223# CONFIG_ARCH_SHARK is not set 228# CONFIG_ARCH_SHARK is not set
224# CONFIG_ARCH_LH7A40X is not set 229# CONFIG_ARCH_LH7A40X is not set
@@ -227,6 +232,7 @@ CONFIG_ARCH_S5PV210=y
227# CONFIG_ARCH_NOMADIK is not set 232# CONFIG_ARCH_NOMADIK is not set
228# CONFIG_ARCH_DAVINCI is not set 233# CONFIG_ARCH_DAVINCI is not set
229# CONFIG_ARCH_OMAP is not set 234# CONFIG_ARCH_OMAP is not set
235# CONFIG_PLAT_SPEAR is not set
230CONFIG_PLAT_SAMSUNG=y 236CONFIG_PLAT_SAMSUNG=y
231 237
232# 238#
@@ -242,16 +248,22 @@ CONFIG_SAMSUNG_GPIOLIB_4BIT=y
242CONFIG_S3C_GPIO_CFG_S3C24XX=y 248CONFIG_S3C_GPIO_CFG_S3C24XX=y
243CONFIG_S3C_GPIO_CFG_S3C64XX=y 249CONFIG_S3C_GPIO_CFG_S3C64XX=y
244CONFIG_S3C_GPIO_PULL_UPDOWN=y 250CONFIG_S3C_GPIO_PULL_UPDOWN=y
251CONFIG_S5P_GPIO_DRVSTR=y
245CONFIG_SAMSUNG_GPIO_EXTRA=0 252CONFIG_SAMSUNG_GPIO_EXTRA=0
246CONFIG_S3C_GPIO_SPACE=0 253CONFIG_S3C_GPIO_SPACE=0
247CONFIG_S3C_GPIO_TRACK=y 254CONFIG_S3C_GPIO_TRACK=y
248# CONFIG_S3C_ADC is not set 255# CONFIG_S3C_ADC is not set
256CONFIG_S3C_DEV_WDT=y
257CONFIG_S3C_PL330_DMA=y
249 258
250# 259#
251# Power management 260# Power management
252# 261#
253CONFIG_PLAT_S5P=y 262CONFIG_PLAT_S5P=y
263CONFIG_S5P_EXT_INT=y
254CONFIG_CPU_S5PV210=y 264CONFIG_CPU_S5PV210=y
265# CONFIG_MACH_AQUILA is not set
266# CONFIG_MACH_GONI is not set
255# CONFIG_MACH_SMDKV210 is not set 267# CONFIG_MACH_SMDKV210 is not set
256CONFIG_MACH_SMDKC110=y 268CONFIG_MACH_SMDKC110=y
257 269
@@ -281,12 +293,14 @@ CONFIG_ARM_THUMB=y
281# CONFIG_CPU_BPREDICT_DISABLE is not set 293# CONFIG_CPU_BPREDICT_DISABLE is not set
282CONFIG_HAS_TLS_REG=y 294CONFIG_HAS_TLS_REG=y
283CONFIG_ARM_L1_CACHE_SHIFT=6 295CONFIG_ARM_L1_CACHE_SHIFT=6
296CONFIG_ARM_DMA_MEM_BUFFERABLE=y
284CONFIG_CPU_HAS_PMU=y 297CONFIG_CPU_HAS_PMU=y
285# CONFIG_ARM_ERRATA_430973 is not set 298# CONFIG_ARM_ERRATA_430973 is not set
286# CONFIG_ARM_ERRATA_458693 is not set 299# CONFIG_ARM_ERRATA_458693 is not set
287# CONFIG_ARM_ERRATA_460075 is not set 300# CONFIG_ARM_ERRATA_460075 is not set
288CONFIG_ARM_VIC=y 301CONFIG_ARM_VIC=y
289CONFIG_ARM_VIC_NR=2 302CONFIG_ARM_VIC_NR=2
303CONFIG_PL330=y
290 304
291# 305#
292# Bus support 306# Bus support
@@ -335,6 +349,7 @@ CONFIG_ALIGNMENT_TRAP=y
335CONFIG_ZBOOT_ROM_TEXT=0 349CONFIG_ZBOOT_ROM_TEXT=0
336CONFIG_ZBOOT_ROM_BSS=0 350CONFIG_ZBOOT_ROM_BSS=0
337CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc" 351CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc"
352# CONFIG_CMDLINE_FORCE is not set
338# CONFIG_XIP_KERNEL is not set 353# CONFIG_XIP_KERNEL is not set
339# CONFIG_KEXEC is not set 354# CONFIG_KEXEC is not set
340 355
@@ -481,6 +496,7 @@ CONFIG_INPUT_EVDEV=y
481CONFIG_INPUT_TOUCHSCREEN=y 496CONFIG_INPUT_TOUCHSCREEN=y
482# CONFIG_TOUCHSCREEN_AD7879 is not set 497# CONFIG_TOUCHSCREEN_AD7879 is not set
483# CONFIG_TOUCHSCREEN_DYNAPRO is not set 498# CONFIG_TOUCHSCREEN_DYNAPRO is not set
499# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set
484# CONFIG_TOUCHSCREEN_FUJITSU is not set 500# CONFIG_TOUCHSCREEN_FUJITSU is not set
485# CONFIG_TOUCHSCREEN_GUNZE is not set 501# CONFIG_TOUCHSCREEN_GUNZE is not set
486# CONFIG_TOUCHSCREEN_ELO is not set 502# CONFIG_TOUCHSCREEN_ELO is not set
@@ -536,6 +552,8 @@ CONFIG_SERIAL_S5PV210=y
536CONFIG_SERIAL_CORE=y 552CONFIG_SERIAL_CORE=y
537CONFIG_SERIAL_CORE_CONSOLE=y 553CONFIG_SERIAL_CORE_CONSOLE=y
538# CONFIG_SERIAL_TIMBERDALE is not set 554# CONFIG_SERIAL_TIMBERDALE is not set
555# CONFIG_SERIAL_ALTERA_JTAGUART is not set
556# CONFIG_SERIAL_ALTERA_UART is not set
539CONFIG_UNIX98_PTYS=y 557CONFIG_UNIX98_PTYS=y
540# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 558# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
541CONFIG_LEGACY_PTYS=y 559CONFIG_LEGACY_PTYS=y
@@ -583,6 +601,7 @@ CONFIG_GPIOLIB=y
583# CONFIG_HWMON is not set 601# CONFIG_HWMON is not set
584# CONFIG_THERMAL is not set 602# CONFIG_THERMAL is not set
585# CONFIG_WATCHDOG is not set 603# CONFIG_WATCHDOG is not set
604CONFIG_HAVE_S3C2410_WATCHDOG=y
586CONFIG_SSB_POSSIBLE=y 605CONFIG_SSB_POSSIBLE=y
587 606
588# 607#
@@ -635,10 +654,6 @@ CONFIG_RTC_LIB=y
635# CONFIG_DMADEVICES is not set 654# CONFIG_DMADEVICES is not set
636# CONFIG_AUXDISPLAY is not set 655# CONFIG_AUXDISPLAY is not set
637# CONFIG_UIO is not set 656# CONFIG_UIO is not set
638
639#
640# TI VLYNQ
641#
642# CONFIG_STAGING is not set 657# CONFIG_STAGING is not set
643 658
644# 659#
@@ -847,6 +862,8 @@ CONFIG_HAVE_FUNCTION_TRACER=y
847CONFIG_TRACING_SUPPORT=y 862CONFIG_TRACING_SUPPORT=y
848CONFIG_FTRACE=y 863CONFIG_FTRACE=y
849# CONFIG_FUNCTION_TRACER is not set 864# CONFIG_FUNCTION_TRACER is not set
865# CONFIG_IRQSOFF_TRACER is not set
866# CONFIG_PREEMPT_TRACER is not set
850# CONFIG_SCHED_TRACER is not set 867# CONFIG_SCHED_TRACER is not set
851# CONFIG_ENABLE_DEFAULT_TRACERS is not set 868# CONFIG_ENABLE_DEFAULT_TRACERS is not set
852# CONFIG_BOOT_TRACER is not set 869# CONFIG_BOOT_TRACER is not set
@@ -857,6 +874,7 @@ CONFIG_BRANCH_PROFILE_NONE=y
857# CONFIG_KMEMTRACE is not set 874# CONFIG_KMEMTRACE is not set
858# CONFIG_WORKQUEUE_TRACER is not set 875# CONFIG_WORKQUEUE_TRACER is not set
859# CONFIG_BLK_DEV_IO_TRACE is not set 876# CONFIG_BLK_DEV_IO_TRACE is not set
877# CONFIG_ATOMIC64_SELFTEST is not set
860# CONFIG_SAMPLES is not set 878# CONFIG_SAMPLES is not set
861CONFIG_HAVE_ARCH_KGDB=y 879CONFIG_HAVE_ARCH_KGDB=y
862# CONFIG_KGDB is not set 880# CONFIG_KGDB is not set
diff --git a/arch/arm/configs/s5pv210_defconfig b/arch/arm/configs/s5pv210_defconfig
index 6831dab97d96..e2f5bce29828 100644
--- a/arch/arm/configs/s5pv210_defconfig
+++ b/arch/arm/configs/s5pv210_defconfig
@@ -1,11 +1,13 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.34 3# Linux kernel version: 2.6.34
4# Sat May 22 03:18:22 2010 4# Wed May 26 19:04:39 2010
5# 5#
6CONFIG_ARM=y 6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y 7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y 8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y
10CONFIG_ARCH_USES_GETTIMEOFFSET=y
9CONFIG_HAVE_PROC_CPU=y 11CONFIG_HAVE_PROC_CPU=y
10CONFIG_NO_IOPORT=y 12CONFIG_NO_IOPORT=y
11CONFIG_GENERIC_HARDIRQS=y 13CONFIG_GENERIC_HARDIRQS=y
@@ -35,6 +37,7 @@ CONFIG_INIT_ENV_ARG_LIMIT=32
35CONFIG_LOCALVERSION="" 37CONFIG_LOCALVERSION=""
36CONFIG_LOCALVERSION_AUTO=y 38CONFIG_LOCALVERSION_AUTO=y
37CONFIG_HAVE_KERNEL_GZIP=y 39CONFIG_HAVE_KERNEL_GZIP=y
40CONFIG_HAVE_KERNEL_LZMA=y
38CONFIG_HAVE_KERNEL_LZO=y 41CONFIG_HAVE_KERNEL_LZO=y
39CONFIG_KERNEL_GZIP=y 42CONFIG_KERNEL_GZIP=y
40# CONFIG_KERNEL_BZIP2 is not set 43# CONFIG_KERNEL_BZIP2 is not set
@@ -180,9 +183,11 @@ CONFIG_MMU=y
180# CONFIG_ARCH_INTEGRATOR is not set 183# CONFIG_ARCH_INTEGRATOR is not set
181# CONFIG_ARCH_REALVIEW is not set 184# CONFIG_ARCH_REALVIEW is not set
182# CONFIG_ARCH_VERSATILE is not set 185# CONFIG_ARCH_VERSATILE is not set
186# CONFIG_ARCH_VEXPRESS is not set
183# CONFIG_ARCH_AT91 is not set 187# CONFIG_ARCH_AT91 is not set
184# CONFIG_ARCH_BCMRING is not set 188# CONFIG_ARCH_BCMRING is not set
185# CONFIG_ARCH_CLPS711X is not set 189# CONFIG_ARCH_CLPS711X is not set
190# CONFIG_ARCH_CNS3XXX is not set
186# CONFIG_ARCH_GEMINI is not set 191# CONFIG_ARCH_GEMINI is not set
187# CONFIG_ARCH_EBSA110 is not set 192# CONFIG_ARCH_EBSA110 is not set
188# CONFIG_ARCH_EP93XX is not set 193# CONFIG_ARCH_EP93XX is not set
@@ -218,7 +223,7 @@ CONFIG_MMU=y
218# CONFIG_ARCH_S3C64XX is not set 223# CONFIG_ARCH_S3C64XX is not set
219# CONFIG_ARCH_S5P6440 is not set 224# CONFIG_ARCH_S5P6440 is not set
220# CONFIG_ARCH_S5P6442 is not set 225# CONFIG_ARCH_S5P6442 is not set
221# CONFIG_ARCH_S5PC1XX is not set 226# CONFIG_ARCH_S5PC100 is not set
222CONFIG_ARCH_S5PV210=y 227CONFIG_ARCH_S5PV210=y
223# CONFIG_ARCH_SHARK is not set 228# CONFIG_ARCH_SHARK is not set
224# CONFIG_ARCH_LH7A40X is not set 229# CONFIG_ARCH_LH7A40X is not set
@@ -227,6 +232,7 @@ CONFIG_ARCH_S5PV210=y
227# CONFIG_ARCH_NOMADIK is not set 232# CONFIG_ARCH_NOMADIK is not set
228# CONFIG_ARCH_DAVINCI is not set 233# CONFIG_ARCH_DAVINCI is not set
229# CONFIG_ARCH_OMAP is not set 234# CONFIG_ARCH_OMAP is not set
235# CONFIG_PLAT_SPEAR is not set
230CONFIG_PLAT_SAMSUNG=y 236CONFIG_PLAT_SAMSUNG=y
231 237
232# 238#
@@ -242,16 +248,24 @@ CONFIG_SAMSUNG_GPIOLIB_4BIT=y
242CONFIG_S3C_GPIO_CFG_S3C24XX=y 248CONFIG_S3C_GPIO_CFG_S3C24XX=y
243CONFIG_S3C_GPIO_CFG_S3C64XX=y 249CONFIG_S3C_GPIO_CFG_S3C64XX=y
244CONFIG_S3C_GPIO_PULL_UPDOWN=y 250CONFIG_S3C_GPIO_PULL_UPDOWN=y
251CONFIG_S5P_GPIO_DRVSTR=y
245CONFIG_SAMSUNG_GPIO_EXTRA=0 252CONFIG_SAMSUNG_GPIO_EXTRA=0
246CONFIG_S3C_GPIO_SPACE=0 253CONFIG_S3C_GPIO_SPACE=0
247CONFIG_S3C_GPIO_TRACK=y 254CONFIG_S3C_GPIO_TRACK=y
248# CONFIG_S3C_ADC is not set 255# CONFIG_S3C_ADC is not set
256CONFIG_S3C_DEV_WDT=y
257CONFIG_SAMSUNG_DEV_ADC=y
258CONFIG_SAMSUNG_DEV_TS=y
259CONFIG_S3C_PL330_DMA=y
249 260
250# 261#
251# Power management 262# Power management
252# 263#
253CONFIG_PLAT_S5P=y 264CONFIG_PLAT_S5P=y
265CONFIG_S5P_EXT_INT=y
254CONFIG_CPU_S5PV210=y 266CONFIG_CPU_S5PV210=y
267# CONFIG_MACH_AQUILA is not set
268# CONFIG_MACH_GONI is not set
255CONFIG_MACH_SMDKV210=y 269CONFIG_MACH_SMDKV210=y
256# CONFIG_MACH_SMDKC110 is not set 270# CONFIG_MACH_SMDKC110 is not set
257 271
@@ -281,12 +295,14 @@ CONFIG_ARM_THUMB=y
281# CONFIG_CPU_BPREDICT_DISABLE is not set 295# CONFIG_CPU_BPREDICT_DISABLE is not set
282CONFIG_HAS_TLS_REG=y 296CONFIG_HAS_TLS_REG=y
283CONFIG_ARM_L1_CACHE_SHIFT=6 297CONFIG_ARM_L1_CACHE_SHIFT=6
298CONFIG_ARM_DMA_MEM_BUFFERABLE=y
284CONFIG_CPU_HAS_PMU=y 299CONFIG_CPU_HAS_PMU=y
285# CONFIG_ARM_ERRATA_430973 is not set 300# CONFIG_ARM_ERRATA_430973 is not set
286# CONFIG_ARM_ERRATA_458693 is not set 301# CONFIG_ARM_ERRATA_458693 is not set
287# CONFIG_ARM_ERRATA_460075 is not set 302# CONFIG_ARM_ERRATA_460075 is not set
288CONFIG_ARM_VIC=y 303CONFIG_ARM_VIC=y
289CONFIG_ARM_VIC_NR=2 304CONFIG_ARM_VIC_NR=2
305CONFIG_PL330=y
290 306
291# 307#
292# Bus support 308# Bus support
@@ -335,6 +351,7 @@ CONFIG_ALIGNMENT_TRAP=y
335CONFIG_ZBOOT_ROM_TEXT=0 351CONFIG_ZBOOT_ROM_TEXT=0
336CONFIG_ZBOOT_ROM_BSS=0 352CONFIG_ZBOOT_ROM_BSS=0
337CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc" 353CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc"
354# CONFIG_CMDLINE_FORCE is not set
338# CONFIG_XIP_KERNEL is not set 355# CONFIG_XIP_KERNEL is not set
339# CONFIG_KEXEC is not set 356# CONFIG_KEXEC is not set
340 357
@@ -481,7 +498,9 @@ CONFIG_INPUT_EVDEV=y
481CONFIG_INPUT_TOUCHSCREEN=y 498CONFIG_INPUT_TOUCHSCREEN=y
482# CONFIG_TOUCHSCREEN_AD7879 is not set 499# CONFIG_TOUCHSCREEN_AD7879 is not set
483# CONFIG_TOUCHSCREEN_DYNAPRO is not set 500# CONFIG_TOUCHSCREEN_DYNAPRO is not set
501# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set
484# CONFIG_TOUCHSCREEN_FUJITSU is not set 502# CONFIG_TOUCHSCREEN_FUJITSU is not set
503# CONFIG_TOUCHSCREEN_S3C2410 is not set
485# CONFIG_TOUCHSCREEN_GUNZE is not set 504# CONFIG_TOUCHSCREEN_GUNZE is not set
486# CONFIG_TOUCHSCREEN_ELO is not set 505# CONFIG_TOUCHSCREEN_ELO is not set
487# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set 506# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
@@ -536,6 +555,8 @@ CONFIG_SERIAL_S5PV210=y
536CONFIG_SERIAL_CORE=y 555CONFIG_SERIAL_CORE=y
537CONFIG_SERIAL_CORE_CONSOLE=y 556CONFIG_SERIAL_CORE_CONSOLE=y
538# CONFIG_SERIAL_TIMBERDALE is not set 557# CONFIG_SERIAL_TIMBERDALE is not set
558# CONFIG_SERIAL_ALTERA_JTAGUART is not set
559# CONFIG_SERIAL_ALTERA_UART is not set
539CONFIG_UNIX98_PTYS=y 560CONFIG_UNIX98_PTYS=y
540# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 561# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
541CONFIG_LEGACY_PTYS=y 562CONFIG_LEGACY_PTYS=y
@@ -583,6 +604,7 @@ CONFIG_GPIOLIB=y
583# CONFIG_HWMON is not set 604# CONFIG_HWMON is not set
584# CONFIG_THERMAL is not set 605# CONFIG_THERMAL is not set
585# CONFIG_WATCHDOG is not set 606# CONFIG_WATCHDOG is not set
607CONFIG_HAVE_S3C2410_WATCHDOG=y
586CONFIG_SSB_POSSIBLE=y 608CONFIG_SSB_POSSIBLE=y
587 609
588# 610#
@@ -635,10 +657,6 @@ CONFIG_RTC_LIB=y
635# CONFIG_DMADEVICES is not set 657# CONFIG_DMADEVICES is not set
636# CONFIG_AUXDISPLAY is not set 658# CONFIG_AUXDISPLAY is not set
637# CONFIG_UIO is not set 659# CONFIG_UIO is not set
638
639#
640# TI VLYNQ
641#
642# CONFIG_STAGING is not set 660# CONFIG_STAGING is not set
643 661
644# 662#
@@ -847,6 +865,8 @@ CONFIG_HAVE_FUNCTION_TRACER=y
847CONFIG_TRACING_SUPPORT=y 865CONFIG_TRACING_SUPPORT=y
848CONFIG_FTRACE=y 866CONFIG_FTRACE=y
849# CONFIG_FUNCTION_TRACER is not set 867# CONFIG_FUNCTION_TRACER is not set
868# CONFIG_IRQSOFF_TRACER is not set
869# CONFIG_PREEMPT_TRACER is not set
850# CONFIG_SCHED_TRACER is not set 870# CONFIG_SCHED_TRACER is not set
851# CONFIG_ENABLE_DEFAULT_TRACERS is not set 871# CONFIG_ENABLE_DEFAULT_TRACERS is not set
852# CONFIG_BOOT_TRACER is not set 872# CONFIG_BOOT_TRACER is not set
@@ -857,6 +877,7 @@ CONFIG_BRANCH_PROFILE_NONE=y
857# CONFIG_KMEMTRACE is not set 877# CONFIG_KMEMTRACE is not set
858# CONFIG_WORKQUEUE_TRACER is not set 878# CONFIG_WORKQUEUE_TRACER is not set
859# CONFIG_BLK_DEV_IO_TRACE is not set 879# CONFIG_BLK_DEV_IO_TRACE is not set
880# CONFIG_ATOMIC64_SELFTEST is not set
860# CONFIG_SAMPLES is not set 881# CONFIG_SAMPLES is not set
861CONFIG_HAVE_ARCH_KGDB=y 882CONFIG_HAVE_ARCH_KGDB=y
862# CONFIG_KGDB is not set 883# CONFIG_KGDB is not set
diff --git a/arch/arm/include/asm/scatterlist.h b/arch/arm/include/asm/scatterlist.h
index bcda59f39941..2f87870d9347 100644
--- a/arch/arm/include/asm/scatterlist.h
+++ b/arch/arm/include/asm/scatterlist.h
@@ -3,9 +3,6 @@
3 3
4#include <asm/memory.h> 4#include <asm/memory.h>
5#include <asm/types.h> 5#include <asm/types.h>
6
7#include <asm-generic/scatterlist.h> 6#include <asm-generic/scatterlist.h>
8 7
9#undef ARCH_HAS_SG_CHAIN
10
11#endif /* _ASMARM_SCATTERLIST_H */ 8#endif /* _ASMARM_SCATTERLIST_H */
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index abd04932917b..2ec3095ffb7b 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -17,6 +17,7 @@
17#include <linux/i2c.h> 17#include <linux/i2c.h>
18#include <linux/i2c/at24.h> 18#include <linux/i2c/at24.h>
19#include <linux/i2c/pca953x.h> 19#include <linux/i2c/pca953x.h>
20#include <linux/mfd/tps6507x.h>
20#include <linux/gpio.h> 21#include <linux/gpio.h>
21#include <linux/platform_device.h> 22#include <linux/platform_device.h>
22#include <linux/mtd/mtd.h> 23#include <linux/mtd/mtd.h>
@@ -24,6 +25,8 @@
24#include <linux/mtd/partitions.h> 25#include <linux/mtd/partitions.h>
25#include <linux/mtd/physmap.h> 26#include <linux/mtd/physmap.h>
26#include <linux/regulator/machine.h> 27#include <linux/regulator/machine.h>
28#include <linux/mfd/tps6507x.h>
29#include <linux/input/tps6507x-ts.h>
27 30
28#include <asm/mach-types.h> 31#include <asm/mach-types.h>
29#include <asm/mach/arch.h> 32#include <asm/mach/arch.h>
@@ -533,10 +536,24 @@ struct regulator_init_data tps65070_regulator_data[] = {
533 }, 536 },
534}; 537};
535 538
539static struct touchscreen_init_data tps6507x_touchscreen_data = {
540 .poll_period = 30, /* ms between touch samples */
541 .min_pressure = 0x30, /* minimum pressure to trigger touch */
542 .vref = 0, /* turn off vref when not using A/D */
543 .vendor = 0, /* /sys/class/input/input?/id/vendor */
544 .product = 65070, /* /sys/class/input/input?/id/product */
545 .version = 0x100, /* /sys/class/input/input?/id/version */
546};
547
548static struct tps6507x_board tps_board = {
549 .tps6507x_pmic_init_data = &tps65070_regulator_data[0],
550 .tps6507x_ts_init_data = &tps6507x_touchscreen_data,
551};
552
536static struct i2c_board_info __initdata da850evm_tps65070_info[] = { 553static struct i2c_board_info __initdata da850evm_tps65070_info[] = {
537 { 554 {
538 I2C_BOARD_INFO("tps6507x", 0x48), 555 I2C_BOARD_INFO("tps6507x", 0x48),
539 .platform_data = &tps65070_regulator_data[0], 556 .platform_data = &tps_board,
540 }, 557 },
541}; 558};
542 559
diff --git a/arch/arm/mach-davinci/include/mach/mmc.h b/arch/arm/mach-davinci/include/mach/mmc.h
index 5a85e24f3673..d4f1e9675069 100644
--- a/arch/arm/mach-davinci/include/mach/mmc.h
+++ b/arch/arm/mach-davinci/include/mach/mmc.h
@@ -22,6 +22,9 @@ struct davinci_mmc_config {
22 22
23 /* Version of the MMC/SD controller */ 23 /* Version of the MMC/SD controller */
24 u8 version; 24 u8 version;
25
26 /* Number of sg segments */
27 u8 nr_sg;
25}; 28};
26void davinci_setup_mmc(int module, struct davinci_mmc_config *config); 29void davinci_setup_mmc(int module, struct davinci_mmc_config *config);
27 30
diff --git a/arch/arm/mach-mx2/Kconfig b/arch/arm/mach-imx/Kconfig
index 3f756f4ad050..c5c0369bb481 100644
--- a/arch/arm/mach-mx2/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -1,42 +1,103 @@
1config IMX_HAVE_DMA_V1
2 bool
3
4if ARCH_MX1
5
6config SOC_IMX1
7 select CPU_ARM920T
8 select IMX_HAVE_DMA_V1
9 select IMX_HAVE_IOMUX_V1
10 bool
11
12comment "MX1 platforms:"
13config MACH_MXLADS
14 bool
15
16config ARCH_MX1ADS
17 bool "MX1ADS platform"
18 select MACH_MXLADS
19 select IMX_HAVE_PLATFORM_IMX_I2C
20 select IMX_HAVE_PLATFORM_IMX_UART
21 help
22 Say Y here if you are using Motorola MX1ADS/MXLADS boards
23
24config MACH_SCB9328
25 bool "Synertronixx scb9328"
26 select IMX_HAVE_PLATFORM_IMX_UART
27 help
28 Say Y here if you are using a Synertronixx scb9328 board
29
30endif
31
1if ARCH_MX2 32if ARCH_MX2
2 33
34config SOC_IMX21
35 select CPU_ARM926T
36 select ARCH_MXC_AUDMUX_V1
37 select IMX_HAVE_DMA_V1
38 select IMX_HAVE_IOMUX_V1
39 bool
40
41config SOC_IMX27
42 select CPU_ARM926T
43 select ARCH_MXC_AUDMUX_V1
44 select IMX_HAVE_DMA_V1
45 select IMX_HAVE_IOMUX_V1
46 bool
47
3choice 48choice
4 prompt "CPUs:" 49 prompt "CPUs:"
5 default MACH_MX21 50 default MACH_MX21
6 51
7config MACH_MX21 52config MACH_MX21
8 bool "i.MX21 support" 53 bool "i.MX21 support"
9 select ARCH_MXC_AUDMUX_V1 54 select SOC_IMX21
10 help 55 help
11 This enables support for Freescale's MX2 based i.MX21 processor. 56 This enables support for Freescale's MX2 based i.MX21 processor.
12 57
13config MACH_MX27 58config MACH_MX27
14 bool "i.MX27 support" 59 bool "i.MX27 support"
15 select ARCH_MXC_AUDMUX_V1 60 select SOC_IMX27
16 help 61 help
17 This enables support for Freescale's MX2 based i.MX27 processor. 62 This enables support for Freescale's MX2 based i.MX27 processor.
18 63
19endchoice 64endchoice
20 65
21comment "MX2 platforms:" 66endif
67
68if MACH_MX21
69
70comment "MX21 platforms:"
22 71
23config MACH_MX21ADS 72config MACH_MX21ADS
24 bool "MX21ADS platform" 73 bool "MX21ADS platform"
25 depends on MACH_MX21 74 select IMX_HAVE_PLATFORM_IMX_UART
75 select IMX_HAVE_PLATFORM_MXC_NAND
26 help 76 help
27 Include support for MX21ADS platform. This includes specific 77 Include support for MX21ADS platform. This includes specific
28 configurations for the board and its peripherals. 78 configurations for the board and its peripherals.
29 79
80endif
81
82if MACH_MX27
83
84comment "MX27 platforms:"
85
30config MACH_MX27ADS 86config MACH_MX27ADS
31 bool "MX27ADS platform" 87 bool "MX27ADS platform"
32 depends on MACH_MX27 88 select IMX_HAVE_PLATFORM_IMX_I2C
89 select IMX_HAVE_PLATFORM_IMX_UART
90 select IMX_HAVE_PLATFORM_MXC_NAND
33 help 91 help
34 Include support for MX27ADS platform. This includes specific 92 Include support for MX27ADS platform. This includes specific
35 configurations for the board and its peripherals. 93 configurations for the board and its peripherals.
36 94
37config MACH_PCM038 95config MACH_PCM038
38 bool "Phytec phyCORE-i.MX27 CPU module (pcm038)" 96 bool "Phytec phyCORE-i.MX27 CPU module (pcm038)"
39 depends on MACH_MX27 97 select IMX_HAVE_PLATFORM_IMX_I2C
98 select IMX_HAVE_PLATFORM_IMX_UART
99 select IMX_HAVE_PLATFORM_MXC_NAND
100 select IMX_HAVE_PLATFORM_SPI_IMX
40 select MXC_ULPI if USB_ULPI 101 select MXC_ULPI if USB_ULPI
41 help 102 help
42 Include support for phyCORE-i.MX27 (aka pcm038) platform. This 103 Include support for phyCORE-i.MX27 (aka pcm038) platform. This
@@ -58,8 +119,9 @@ endchoice
58 119
59config MACH_CPUIMX27 120config MACH_CPUIMX27
60 bool "Eukrea CPUIMX27 module" 121 bool "Eukrea CPUIMX27 module"
61 depends on MACH_MX27 122 select IMX_HAVE_PLATFORM_IMX_I2C
62 select MXC_ULPI if USB_ULPI 123 select IMX_HAVE_PLATFORM_IMX_UART
124 select IMX_HAVE_PLATFORM_MXC_NAND
63 help 125 help
64 Include support for Eukrea CPUIMX27 platform. This includes 126 Include support for Eukrea CPUIMX27 platform. This includes
65 specific configurations for the module and its peripherals. 127 specific configurations for the module and its peripherals.
@@ -86,6 +148,8 @@ choice
86config MACH_EUKREA_MBIMX27_BASEBOARD 148config MACH_EUKREA_MBIMX27_BASEBOARD
87 prompt "Eukrea MBIMX27 development board" 149 prompt "Eukrea MBIMX27 development board"
88 bool 150 bool
151 select IMX_HAVE_PLATFORM_IMX_UART
152 select IMX_HAVE_PLATFORM_SPI_IMX
89 help 153 help
90 This adds board specific devices that can be found on Eukrea's 154 This adds board specific devices that can be found on Eukrea's
91 MBIMX27 evaluation board. 155 MBIMX27 evaluation board.
@@ -94,21 +158,24 @@ endchoice
94 158
95config MACH_MX27_3DS 159config MACH_MX27_3DS
96 bool "MX27PDK platform" 160 bool "MX27PDK platform"
97 depends on MACH_MX27 161 select IMX_HAVE_PLATFORM_IMX_UART
98 help 162 help
99 Include support for MX27PDK platform. This includes specific 163 Include support for MX27PDK platform. This includes specific
100 configurations for the board and its peripherals. 164 configurations for the board and its peripherals.
101 165
102config MACH_IMX27LITE 166config MACH_IMX27LITE
103 bool "LogicPD MX27 LITEKIT platform" 167 bool "LogicPD MX27 LITEKIT platform"
104 depends on MACH_MX27 168 select IMX_HAVE_PLATFORM_IMX_UART
105 help 169 help
106 Include support for MX27 LITEKIT platform. This includes specific 170 Include support for MX27 LITEKIT platform. This includes specific
107 configurations for the board and its peripherals. 171 configurations for the board and its peripherals.
108 172
109config MACH_PCA100 173config MACH_PCA100
110 bool "Phytec phyCARD-s (pca100)" 174 bool "Phytec phyCARD-s (pca100)"
111 depends on MACH_MX27 175 select IMX_HAVE_PLATFORM_IMX_I2C
176 select IMX_HAVE_PLATFORM_IMX_UART
177 select IMX_HAVE_PLATFORM_MXC_NAND
178 select IMX_HAVE_PLATFORM_SPI_IMX
112 select MXC_ULPI if USB_ULPI 179 select MXC_ULPI if USB_ULPI
113 help 180 help
114 Include support for phyCARD-s (aka pca100) platform. This 181 Include support for phyCARD-s (aka pca100) platform. This
@@ -116,7 +183,9 @@ config MACH_PCA100
116 183
117config MACH_MXT_TD60 184config MACH_MXT_TD60
118 bool "Maxtrack i-MXT TD60" 185 bool "Maxtrack i-MXT TD60"
119 depends on MACH_MX27 186 select IMX_HAVE_PLATFORM_IMX_I2C
187 select IMX_HAVE_PLATFORM_IMX_UART
188 select IMX_HAVE_PLATFORM_MXC_NAND
120 help 189 help
121 Include support for i-MXT (aka td60) platform. This 190 Include support for i-MXT (aka td60) platform. This
122 includes specific configurations for the module and its peripherals. 191 includes specific configurations for the module and its peripherals.
diff --git a/arch/arm/mach-mx2/Makefile b/arch/arm/mach-imx/Makefile
index 27d496c3e5cb..46a9fdfbbd15 100644
--- a/arch/arm/mach-mx2/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -4,14 +4,24 @@
4 4
5# Object file lists. 5# Object file lists.
6 6
7obj-y := devices.o serial.o 7obj-y := devices.o
8 8
9obj-$(CONFIG_MACH_MX21) += clock_imx21.o mm-imx21.o 9obj-$(CONFIG_IMX_HAVE_DMA_V1) += dma-v1.o
10 10
11obj-$(CONFIG_MACH_MX27) += cpu_imx27.o pm-imx27.o 11obj-$(CONFIG_ARCH_MX1) += clock-imx1.o mm-imx1.o
12obj-$(CONFIG_MACH_MX27) += clock_imx27.o mm-imx27.o 12obj-$(CONFIG_MACH_MX21) += clock-imx21.o mm-imx21.o
13
14obj-$(CONFIG_MACH_MX27) += cpu-imx27.o pm-imx27.o
15obj-$(CONFIG_MACH_MX27) += clock-imx27.o mm-imx27.o
16
17# Support for CMOS sensor interface
18obj-$(CONFIG_MX1_VIDEO) += mx1-camera-fiq.o mx1-camera-fiq-ksym.o
19
20obj-$(CONFIG_ARCH_MX1ADS) += mach-mx1ads.o
21obj-$(CONFIG_MACH_SCB9328) += mach-scb9328.o
13 22
14obj-$(CONFIG_MACH_MX21ADS) += mach-mx21ads.o 23obj-$(CONFIG_MACH_MX21ADS) += mach-mx21ads.o
24
15obj-$(CONFIG_MACH_MX27ADS) += mach-mx27ads.o 25obj-$(CONFIG_MACH_MX27ADS) += mach-mx27ads.o
16obj-$(CONFIG_MACH_PCM038) += mach-pcm038.o 26obj-$(CONFIG_MACH_PCM038) += mach-pcm038.o
17obj-$(CONFIG_MACH_PCM970_BASEBOARD) += pcm970-baseboard.o 27obj-$(CONFIG_MACH_PCM970_BASEBOARD) += pcm970-baseboard.o
diff --git a/arch/arm/mach-mx2/Makefile.boot b/arch/arm/mach-imx/Makefile.boot
index e867398a8fdb..7988a85cf07d 100644
--- a/arch/arm/mach-mx2/Makefile.boot
+++ b/arch/arm/mach-imx/Makefile.boot
@@ -1,3 +1,7 @@
1zreladdr-$(CONFIG_ARCH_MX1) := 0x08008000
2params_phys-$(CONFIG_ARCH_MX1) := 0x08000100
3initrd_phys-$(CONFIG_ARCH_MX1) := 0x08800000
4
1zreladdr-$(CONFIG_MACH_MX21) := 0xC0008000 5zreladdr-$(CONFIG_MACH_MX21) := 0xC0008000
2params_phys-$(CONFIG_MACH_MX21) := 0xC0000100 6params_phys-$(CONFIG_MACH_MX21) := 0xC0000100
3initrd_phys-$(CONFIG_MACH_MX21) := 0xC0800000 7initrd_phys-$(CONFIG_MACH_MX21) := 0xC0800000
diff --git a/arch/arm/mach-mx1/clock.c b/arch/arm/mach-imx/clock-imx1.c
index 6cf2d4a7511d..c05096c38301 100644
--- a/arch/arm/mach-mx1/clock.c
+++ b/arch/arm/mach-imx/clock-imx1.c
@@ -2,18 +2,17 @@
2 * Copyright (C) 2008 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix 2 * Copyright (C) 2008 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
3 * 3 *
4 * This program is free software; you can redistribute it and/or modify 4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by 5 * it under the terms of the GNU General Public License version 2 as
6 * the Free Software Foundation; either version 2 of the License, or 6 * published by the Free Software Foundation.
7 * (at your option) any later version.
8 * 7 *
9 * This program is distributed in the hope that it will be useful, 8 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details. 11 * GNU General Public License for more details.
13 * 12 *
14 * You should have received a copy of the GNU General Public License 13 * You should have received a copy of the GNU General Public License along
15 * along with this program; if not, write to the Free Software 14 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 15 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
17 */ 16 */
18 17
19#include <linux/kernel.h> 18#include <linux/kernel.h>
@@ -29,7 +28,41 @@
29#include <mach/clock.h> 28#include <mach/clock.h>
30#include <mach/hardware.h> 29#include <mach/hardware.h>
31#include <mach/common.h> 30#include <mach/common.h>
32#include "crm_regs.h" 31
32#define IO_ADDR_CCM(off) (MX1_IO_ADDRESS(MX1_CCM_BASE_ADDR + (off)))
33
34/* CCM register addresses */
35#define CCM_CSCR IO_ADDR_CCM(0x0)
36#define CCM_MPCTL0 IO_ADDR_CCM(0x4)
37#define CCM_SPCTL0 IO_ADDR_CCM(0xc)
38#define CCM_PCDR IO_ADDR_CCM(0x20)
39
40#define CCM_CSCR_CLKO_OFFSET 29
41#define CCM_CSCR_CLKO_MASK (0x7 << 29)
42#define CCM_CSCR_USB_OFFSET 26
43#define CCM_CSCR_USB_MASK (0x7 << 26)
44#define CCM_CSCR_OSC_EN_SHIFT 17
45#define CCM_CSCR_SYSTEM_SEL (1 << 16)
46#define CCM_CSCR_BCLK_OFFSET 10
47#define CCM_CSCR_BCLK_MASK (0xf << 10)
48#define CCM_CSCR_PRESC (1 << 15)
49
50#define CCM_PCDR_PCLK3_OFFSET 16
51#define CCM_PCDR_PCLK3_MASK (0x7f << 16)
52#define CCM_PCDR_PCLK2_OFFSET 4
53#define CCM_PCDR_PCLK2_MASK (0xf << 4)
54#define CCM_PCDR_PCLK1_OFFSET 0
55#define CCM_PCDR_PCLK1_MASK 0xf
56
57#define IO_ADDR_SCM(off) (MX1_IO_ADDRESS(MX1_SCM_BASE_ADDR + (off)))
58
59/* SCM register addresses */
60#define SCM_GCCR IO_ADDR_SCM(0xc)
61
62#define SCM_GCCR_DMA_CLK_EN_OFFSET 3
63#define SCM_GCCR_CSI_CLK_EN_OFFSET 2
64#define SCM_GCCR_MMA_CLK_EN_OFFSET 1
65#define SCM_GCCR_USBD_CLK_EN_OFFSET 0
33 66
34static int _clk_enable(struct clk *clk) 67static int _clk_enable(struct clk *clk)
35{ 68{
@@ -596,7 +629,8 @@ int __init mx1_clocks_init(unsigned long fref)
596 clk_enable(&hclk); 629 clk_enable(&hclk);
597 clk_enable(&fclk); 630 clk_enable(&fclk);
598 631
599 mxc_timer_init(&gpt_clk, IO_ADDRESS(TIM1_BASE_ADDR), TIM1_INT); 632 mxc_timer_init(&gpt_clk, MX1_IO_ADDRESS(MX1_TIM1_BASE_ADDR),
633 MX1_TIM1_INT);
600 634
601 return 0; 635 return 0;
602} 636}
diff --git a/arch/arm/mach-mx2/clock_imx21.c b/arch/arm/mach-imx/clock-imx21.c
index bb419ef4d133..bb419ef4d133 100644
--- a/arch/arm/mach-mx2/clock_imx21.c
+++ b/arch/arm/mach-imx/clock-imx21.c
diff --git a/arch/arm/mach-mx2/clock_imx27.c b/arch/arm/mach-imx/clock-imx27.c
index 5a1aa15c8a16..5a1aa15c8a16 100644
--- a/arch/arm/mach-mx2/clock_imx27.c
+++ b/arch/arm/mach-imx/clock-imx27.c
diff --git a/arch/arm/mach-mx2/cpu_imx27.c b/arch/arm/mach-imx/cpu-imx27.c
index d8d3b2d84dc5..d8d3b2d84dc5 100644
--- a/arch/arm/mach-mx2/cpu_imx27.c
+++ b/arch/arm/mach-imx/cpu-imx27.c
diff --git a/arch/arm/mach-imx/devices-imx1.h b/arch/arm/mach-imx/devices-imx1.h
new file mode 100644
index 000000000000..a8d94f078196
--- /dev/null
+++ b/arch/arm/mach-imx/devices-imx1.h
@@ -0,0 +1,18 @@
1/*
2 * Copyright (C) 2010 Pengutronix
3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it under
6 * the terms of the GNU General Public License version 2 as published by the
7 * Free Software Foundation.
8 */
9#include <mach/mx1.h>
10#include <mach/devices-common.h>
11
12#define imx1_add_i2c_imx(pdata) \
13 imx_add_imx_i2c(0, MX1_I2C_BASE_ADDR, SZ_4K, MX1_INT_I2C, pdata)
14
15#define imx1_add_imx_uart0(pdata) \
16 imx_add_imx_uart_3irq(0, MX1_UART1_BASE_ADDR, 0xd0, MX1_INT_UART1RX, MX1_INT_UART1TX, MX1_INT_UART1RTS, pdata)
17#define imx1_add_imx_uart1(pdata) \
18 imx_add_imx_uart_3irq(0, MX1_UART2_BASE_ADDR, 0xd0, MX1_INT_UART2RX, MX1_INT_UART2TX, MX1_INT_UART2RTS, pdata)
diff --git a/arch/arm/mach-imx/devices-imx21.h b/arch/arm/mach-imx/devices-imx21.h
new file mode 100644
index 000000000000..42788e99d127
--- /dev/null
+++ b/arch/arm/mach-imx/devices-imx21.h
@@ -0,0 +1,30 @@
1/*
2 * Copyright (C) 2010 Pengutronix
3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it under
6 * the terms of the GNU General Public License version 2 as published by the
7 * Free Software Foundation.
8 */
9#include <mach/mx21.h>
10#include <mach/devices-common.h>
11
12#define imx21_add_i2c_imx(pdata) \
13 imx_add_imx_i2c(0, MX2x_I2C_BASE_ADDR, SZ_4K, MX2x_INT_I2C, pdata)
14
15#define imx21_add_imx_uart0(pdata) \
16 imx_add_imx_uart_1irq(0, MX21_UART1_BASE_ADDR, SZ_4K, MX21_INT_UART1, pdata)
17#define imx21_add_imx_uart1(pdata) \
18 imx_add_imx_uart_1irq(1, MX21_UART2_BASE_ADDR, SZ_4K, MX21_INT_UART2, pdata)
19#define imx21_add_imx_uart2(pdata) \
20 imx_add_imx_uart_1irq(2, MX21_UART3_BASE_ADDR, SZ_4K, MX21_INT_UART3, pdata)
21#define imx21_add_imx_uart3(pdata) \
22 imx_add_imx_uart_1irq(3, MX21_UART4_BASE_ADDR, SZ_4K, MX21_INT_UART4, pdata)
23
24#define imx21_add_mxc_nand(pdata) \
25 imx_add_mxc_nand_v1(MX21_NFC_BASE_ADDR, MX21_INT_NANDFC, pdata)
26
27#define imx21_add_spi_imx0(pdata) \
28 imx_add_spi_imx(0, MX21_CSPI1_BASE_ADDR, SZ_4K, MX21_INT_CSPI1, pdata)
29#define imx21_add_spi_imx1(pdata) \
30 imx_add_spi_imx(1, MX21_CSPI2_BASE_ADDR, SZ_4K, MX21_INT_CSPI2, pdata)
diff --git a/arch/arm/mach-imx/devices-imx27.h b/arch/arm/mach-imx/devices-imx27.h
new file mode 100644
index 000000000000..65e7bb7ec2e8
--- /dev/null
+++ b/arch/arm/mach-imx/devices-imx27.h
@@ -0,0 +1,38 @@
1/*
2 * Copyright (C) 2010 Pengutronix
3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it under
6 * the terms of the GNU General Public License version 2 as published by the
7 * Free Software Foundation.
8 */
9#include <mach/mx27.h>
10#include <mach/devices-common.h>
11
12#define imx27_add_i2c_imx0(pdata) \
13 imx_add_imx_i2c(0, MX27_I2C1_BASE_ADDR, SZ_4K, MX27_INT_I2C1, pdata)
14#define imx27_add_i2c_imx1(pdata) \
15 imx_add_imx_i2c(1, MX27_I2C2_BASE_ADDR, SZ_4K, MX27_INT_I2C2, pdata)
16
17#define imx27_add_imx_uart0(pdata) \
18 imx_add_imx_uart_1irq(0, MX27_UART1_BASE_ADDR, SZ_4K, MX27_INT_UART1, pdata)
19#define imx27_add_imx_uart1(pdata) \
20 imx_add_imx_uart_1irq(1, MX27_UART2_BASE_ADDR, SZ_4K, MX27_INT_UART2, pdata)
21#define imx27_add_imx_uart2(pdata) \
22 imx_add_imx_uart_1irq(2, MX27_UART3_BASE_ADDR, SZ_4K, MX27_INT_UART3, pdata)
23#define imx27_add_imx_uart3(pdata) \
24 imx_add_imx_uart_1irq(3, MX27_UART4_BASE_ADDR, SZ_4K, MX27_INT_UART4, pdata)
25#define imx27_add_imx_uart4(pdata) \
26 imx_add_imx_uart_1irq(4, MX27_UART5_BASE_ADDR, SZ_4K, MX27_INT_UART5, pdata)
27#define imx27_add_imx_uart5(pdata) \
28 imx_add_imx_uart_1irq(5, MX27_UART6_BASE_ADDR, SZ_4K, MX27_INT_UART6, pdata)
29
30#define imx27_add_mxc_nand(pdata) \
31 imx_add_mxc_nand_v1(MX27_NFC_BASE_ADDR, MX27_INT_NANDFC, pdata)
32
33#define imx27_add_spi_imx0(pdata) \
34 imx_add_spi_imx(0, MX27_CSPI1_BASE_ADDR, SZ_4K, MX27_INT_CSPI1, pdata)
35#define imx27_add_spi_imx1(pdata) \
36 imx_add_spi_imx(1, MX27_CSPI2_BASE_ADDR, SZ_4K, MX27_INT_CSPI2, pdata)
37#define imx27_add_spi_imx2(pdata) \
38 imx_add_spi_imx(2, MX27_CSPI3_BASE_ADDR, SZ_4K, MX27_INT_CSPI3, pdata)
diff --git a/arch/arm/mach-mx2/devices.c b/arch/arm/mach-imx/devices.c
index 28caa21cb56e..9c271a752b84 100644
--- a/arch/arm/mach-mx2/devices.c
+++ b/arch/arm/mach-imx/devices.c
@@ -11,6 +11,9 @@
11 * 11 *
12 * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved. 12 * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
13 * Copyright 2008 Juergen Beisert, kernel@pengutronix.de 13 * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
14 * Copyright 2008 Sascha Hauer, kernel@pengutronix.de
15 * Copyright (c) 2008 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
16 * Copyright (c) 2008 Darius Augulis <darius.augulis@teltonika.lt>
14 * 17 *
15 * This program is free software; you can redistribute it and/or 18 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License 19 * modify it under the terms of the GNU General Public License
@@ -32,6 +35,7 @@
32#include <linux/platform_device.h> 35#include <linux/platform_device.h>
33#include <linux/gpio.h> 36#include <linux/gpio.h>
34#include <linux/dma-mapping.h> 37#include <linux/dma-mapping.h>
38#include <linux/serial.h>
35 39
36#include <mach/irqs.h> 40#include <mach/irqs.h>
37#include <mach/hardware.h> 41#include <mach/hardware.h>
@@ -40,6 +44,150 @@
40 44
41#include "devices.h" 45#include "devices.h"
42 46
47#if defined(CONFIG_ARCH_MX1)
48static struct resource imx1_camera_resources[] = {
49 {
50 .start = 0x00224000,
51 .end = 0x00224010,
52 .flags = IORESOURCE_MEM,
53 }, {
54 .start = MX1_CSI_INT,
55 .end = MX1_CSI_INT,
56 .flags = IORESOURCE_IRQ,
57 },
58};
59
60static u64 imx1_camera_dmamask = DMA_BIT_MASK(32);
61
62struct platform_device imx1_camera_device = {
63 .name = "mx1-camera",
64 .id = 0, /* This is used to put cameras on this interface */
65 .dev = {
66 .dma_mask = &imx1_camera_dmamask,
67 .coherent_dma_mask = DMA_BIT_MASK(32),
68 },
69 .resource = imx1_camera_resources,
70 .num_resources = ARRAY_SIZE(imx1_camera_resources),
71};
72
73static struct resource imx_rtc_resources[] = {
74 {
75 .start = 0x00204000,
76 .end = 0x00204024,
77 .flags = IORESOURCE_MEM,
78 }, {
79 .start = MX1_RTC_INT,
80 .end = MX1_RTC_INT,
81 .flags = IORESOURCE_IRQ,
82 }, {
83 .start = MX1_RTC_SAMINT,
84 .end = MX1_RTC_SAMINT,
85 .flags = IORESOURCE_IRQ,
86 },
87};
88
89struct platform_device imx_rtc_device = {
90 .name = "rtc-imx",
91 .id = 0,
92 .resource = imx_rtc_resources,
93 .num_resources = ARRAY_SIZE(imx_rtc_resources),
94};
95
96static struct resource imx_wdt_resources[] = {
97 {
98 .start = 0x00201000,
99 .end = 0x00201008,
100 .flags = IORESOURCE_MEM,
101 }, {
102 .start = MX1_WDT_INT,
103 .end = MX1_WDT_INT,
104 .flags = IORESOURCE_IRQ,
105 },
106};
107
108struct platform_device imx_wdt_device = {
109 .name = "imx-wdt",
110 .id = 0,
111 .resource = imx_wdt_resources,
112 .num_resources = ARRAY_SIZE(imx_wdt_resources),
113};
114
115static struct resource imx_usb_resources[] = {
116 {
117 .start = 0x00212000,
118 .end = 0x00212148,
119 .flags = IORESOURCE_MEM,
120 }, {
121 .start = MX1_USBD_INT0,
122 .end = MX1_USBD_INT0,
123 .flags = IORESOURCE_IRQ,
124 }, {
125 .start = MX1_USBD_INT1,
126 .end = MX1_USBD_INT1,
127 .flags = IORESOURCE_IRQ,
128 }, {
129 .start = MX1_USBD_INT2,
130 .end = MX1_USBD_INT2,
131 .flags = IORESOURCE_IRQ,
132 }, {
133 .start = MX1_USBD_INT3,
134 .end = MX1_USBD_INT3,
135 .flags = IORESOURCE_IRQ,
136 }, {
137 .start = MX1_USBD_INT4,
138 .end = MX1_USBD_INT4,
139 .flags = IORESOURCE_IRQ,
140 }, {
141 .start = MX1_USBD_INT5,
142 .end = MX1_USBD_INT5,
143 .flags = IORESOURCE_IRQ,
144 }, {
145 .start = MX1_USBD_INT6,
146 .end = MX1_USBD_INT6,
147 .flags = IORESOURCE_IRQ,
148 },
149};
150
151struct platform_device imx_usb_device = {
152 .name = "imx_udc",
153 .id = 0,
154 .num_resources = ARRAY_SIZE(imx_usb_resources),
155 .resource = imx_usb_resources,
156};
157
158/* GPIO port description */
159static struct mxc_gpio_port imx_gpio_ports[] = {
160 {
161 .chip.label = "gpio-0",
162 .base = (void __iomem *)MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR),
163 .irq = MX1_GPIO_INT_PORTA,
164 .virtual_irq_start = MXC_GPIO_IRQ_START,
165 }, {
166 .chip.label = "gpio-1",
167 .base = (void __iomem *)MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR + 0x100),
168 .irq = MX1_GPIO_INT_PORTB,
169 .virtual_irq_start = MXC_GPIO_IRQ_START + 32,
170 }, {
171 .chip.label = "gpio-2",
172 .base = (void __iomem *)MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR + 0x200),
173 .irq = MX1_GPIO_INT_PORTC,
174 .virtual_irq_start = MXC_GPIO_IRQ_START + 64,
175 }, {
176 .chip.label = "gpio-3",
177 .base = (void __iomem *)MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR + 0x300),
178 .irq = MX1_GPIO_INT_PORTD,
179 .virtual_irq_start = MXC_GPIO_IRQ_START + 96,
180 }
181};
182
183int __init imx1_register_gpios(void)
184{
185 return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
186}
187#endif
188
189#if defined(CONFIG_MACH_MX21) || defined(CONFIG_MACH_MX27)
190
43#ifdef CONFIG_MACH_MX27 191#ifdef CONFIG_MACH_MX27
44static struct resource mx27_camera_resources[] = { 192static struct resource mx27_camera_resources[] = {
45 { 193 {
@@ -72,40 +220,6 @@ struct platform_device mx27_camera_device = {
72#endif 220#endif
73 221
74/* 222/*
75 * SPI master controller
76 *
77 * - i.MX1: 2 channel (slighly different register setting)
78 * - i.MX21: 2 channel
79 * - i.MX27: 3 channel
80 */
81#define DEFINE_IMX_SPI_DEVICE(n, baseaddr, irq) \
82 static struct resource mxc_spi_resources ## n[] = { \
83 { \
84 .start = baseaddr, \
85 .end = baseaddr + SZ_4K - 1, \
86 .flags = IORESOURCE_MEM, \
87 }, { \
88 .start = irq, \
89 .end = irq, \
90 .flags = IORESOURCE_IRQ, \
91 }, \
92 }; \
93 \
94 struct platform_device mxc_spi_device ## n = { \
95 .name = "spi_imx", \
96 .id = n, \
97 .num_resources = ARRAY_SIZE(mxc_spi_resources ## n), \
98 .resource = mxc_spi_resources ## n, \
99 }
100
101DEFINE_IMX_SPI_DEVICE(0, MX2x_CSPI1_BASE_ADDR, MX2x_INT_CSPI1);
102DEFINE_IMX_SPI_DEVICE(1, MX2x_CSPI2_BASE_ADDR, MX2x_INT_CSPI2);
103
104#ifdef CONFIG_MACH_MX27
105DEFINE_IMX_SPI_DEVICE(2, MX27_CSPI3_BASE_ADDR, MX27_INT_CSPI3);
106#endif
107
108/*
109 * General Purpose Timer 223 * General Purpose Timer
110 * - i.MX21: 3 timers 224 * - i.MX21: 3 timers
111 * - i.MX27: 6 timers 225 * - i.MX27: 6 timers
@@ -171,34 +285,6 @@ struct platform_device mxc_w1_master_device = {
171 .resource = mxc_w1_master_resources, 285 .resource = mxc_w1_master_resources,
172}; 286};
173 287
174#define DEFINE_MXC_NAND_DEVICE(pfx, baseaddr, irq) \
175 static struct resource pfx ## _nand_resources[] = { \
176 { \
177 .start = baseaddr, \
178 .end = baseaddr + SZ_4K - 1, \
179 .flags = IORESOURCE_MEM, \
180 }, { \
181 .start = irq, \
182 .end = irq, \
183 .flags = IORESOURCE_IRQ, \
184 }, \
185 }; \
186 \
187 struct platform_device pfx ## _nand_device = { \
188 .name = "mxc_nand", \
189 .id = 0, \
190 .num_resources = ARRAY_SIZE(pfx ## _nand_resources), \
191 .resource = pfx ## _nand_resources, \
192 }
193
194#ifdef CONFIG_MACH_MX21
195DEFINE_MXC_NAND_DEVICE(imx21, MX21_NFC_BASE_ADDR, MX21_INT_NANDFC);
196#endif
197
198#ifdef CONFIG_MACH_MX27
199DEFINE_MXC_NAND_DEVICE(imx27, MX27_NFC_BASE_ADDR, MX27_INT_NANDFC);
200#endif
201
202/* 288/*
203 * lcdc: 289 * lcdc:
204 * - i.MX1: the basic controller 290 * - i.MX1: the basic controller
@@ -249,32 +335,6 @@ struct platform_device mxc_fec_device = {
249}; 335};
250#endif 336#endif
251 337
252#define DEFINE_IMX_I2C_DEVICE(n, baseaddr, irq) \
253 static struct resource mxc_i2c_resources ## n[] = { \
254 { \
255 .start = baseaddr, \
256 .end = baseaddr + SZ_4K - 1, \
257 .flags = IORESOURCE_MEM, \
258 }, { \
259 .start = irq, \
260 .end = irq, \
261 .flags = IORESOURCE_IRQ, \
262 } \
263 }; \
264 \
265 struct platform_device mxc_i2c_device ## n = { \
266 .name = "imx-i2c", \
267 .id = n, \
268 .num_resources = ARRAY_SIZE(mxc_i2c_resources ## n), \
269 .resource = mxc_i2c_resources ## n, \
270 }
271
272DEFINE_IMX_I2C_DEVICE(0, MX2x_I2C_BASE_ADDR, MX2x_INT_I2C);
273
274#ifdef CONFIG_MACH_MX27
275DEFINE_IMX_I2C_DEVICE(1, MX27_I2C2_BASE_ADDR, MX27_INT_I2C2);
276#endif
277
278static struct resource mxc_pwm_resources[] = { 338static struct resource mxc_pwm_resources[] = {
279 { 339 {
280 .start = MX2x_PWM_BASE_ADDR, 340 .start = MX2x_PWM_BASE_ADDR,
@@ -485,26 +545,21 @@ DEFINE_IMX_SSI_DEVICE(1, 2, MX2x_SSI1_BASE_ADDR, MX2x_INT_SSI1);
485 545
486#ifdef CONFIG_MACH_MX21 546#ifdef CONFIG_MACH_MX21
487DEFINE_MXC_GPIO_PORTS(MX21, imx21); 547DEFINE_MXC_GPIO_PORTS(MX21, imx21);
548
549int __init imx21_register_gpios(void)
550{
551 return mxc_gpio_init(imx21_gpio_ports, ARRAY_SIZE(imx21_gpio_ports));
552}
488#endif 553#endif
489 554
490#ifdef CONFIG_MACH_MX27 555#ifdef CONFIG_MACH_MX27
491DEFINE_MXC_GPIO_PORTS(MX27, imx27); 556DEFINE_MXC_GPIO_PORTS(MX27, imx27);
492#endif
493 557
494int __init mxc_register_gpios(void) 558int __init imx27_register_gpios(void)
495{ 559{
496#ifdef CONFIG_MACH_MX21 560 return mxc_gpio_init(imx27_gpio_ports, ARRAY_SIZE(imx27_gpio_ports));
497 if (cpu_is_mx21())
498 return mxc_gpio_init(imx21_gpio_ports, ARRAY_SIZE(imx21_gpio_ports));
499 else
500#endif
501#ifdef CONFIG_MACH_MX27
502 if (cpu_is_mx27())
503 return mxc_gpio_init(imx27_gpio_ports, ARRAY_SIZE(imx27_gpio_ports));
504 else
505#endif
506 return 0;
507} 561}
562#endif
508 563
509#ifdef CONFIG_MACH_MX21 564#ifdef CONFIG_MACH_MX21
510static struct resource mx21_usbhc_resources[] = { 565static struct resource mx21_usbhc_resources[] = {
@@ -550,3 +605,5 @@ struct platform_device imx_kpp_device = {
550 .num_resources = ARRAY_SIZE(imx_kpp_resources), 605 .num_resources = ARRAY_SIZE(imx_kpp_resources),
551 .resource = imx_kpp_resources, 606 .resource = imx_kpp_resources,
552}; 607};
608
609#endif
diff --git a/arch/arm/mach-mx2/devices.h b/arch/arm/mach-imx/devices.h
index aefc87a7609e..efd4527506a5 100644
--- a/arch/arm/mach-mx2/devices.h
+++ b/arch/arm/mach-imx/devices.h
@@ -1,3 +1,11 @@
1#ifdef CONFIG_ARCH_MX1
2extern struct platform_device imx1_camera_device;
3extern struct platform_device imx_rtc_device;
4extern struct platform_device imx_wdt_device;
5extern struct platform_device imx_usb_device;
6#endif
7
8#if defined(CONFIG_MACH_MX21) || defined(CONFIG_MACH_MX27)
1extern struct platform_device mxc_gpt1; 9extern struct platform_device mxc_gpt1;
2extern struct platform_device mxc_gpt2; 10extern struct platform_device mxc_gpt2;
3#ifdef CONFIG_MACH_MX27 11#ifdef CONFIG_MACH_MX27
@@ -6,26 +14,10 @@ extern struct platform_device mxc_gpt4;
6extern struct platform_device mxc_gpt5; 14extern struct platform_device mxc_gpt5;
7#endif 15#endif
8extern struct platform_device mxc_wdt; 16extern struct platform_device mxc_wdt;
9extern struct platform_device mxc_uart_device0;
10extern struct platform_device mxc_uart_device1;
11extern struct platform_device mxc_uart_device2;
12extern struct platform_device mxc_uart_device3;
13extern struct platform_device mxc_uart_device4;
14extern struct platform_device mxc_uart_device5;
15extern struct platform_device mxc_w1_master_device; 17extern struct platform_device mxc_w1_master_device;
16#ifdef CONFIG_MACH_MX21
17extern struct platform_device imx21_nand_device;
18#endif
19#ifdef CONFIG_MACH_MX27
20extern struct platform_device imx27_nand_device;
21#endif
22extern struct platform_device mxc_fb_device; 18extern struct platform_device mxc_fb_device;
23extern struct platform_device mxc_fec_device; 19extern struct platform_device mxc_fec_device;
24extern struct platform_device mxc_pwm_device; 20extern struct platform_device mxc_pwm_device;
25extern struct platform_device mxc_i2c_device0;
26#ifdef CONFIG_MACH_MX27
27extern struct platform_device mxc_i2c_device1;
28#endif
29extern struct platform_device mxc_sdhc_device0; 21extern struct platform_device mxc_sdhc_device0;
30extern struct platform_device mxc_sdhc_device1; 22extern struct platform_device mxc_sdhc_device1;
31extern struct platform_device mxc_otg_udc_device; 23extern struct platform_device mxc_otg_udc_device;
@@ -33,12 +25,8 @@ extern struct platform_device mx27_camera_device;
33extern struct platform_device mxc_otg_host; 25extern struct platform_device mxc_otg_host;
34extern struct platform_device mxc_usbh1; 26extern struct platform_device mxc_usbh1;
35extern struct platform_device mxc_usbh2; 27extern struct platform_device mxc_usbh2;
36extern struct platform_device mxc_spi_device0;
37extern struct platform_device mxc_spi_device1;
38#ifdef CONFIG_MACH_MX27
39extern struct platform_device mxc_spi_device2;
40#endif
41extern struct platform_device mx21_usbhc_device; 28extern struct platform_device mx21_usbhc_device;
42extern struct platform_device imx_ssi_device0; 29extern struct platform_device imx_ssi_device0;
43extern struct platform_device imx_ssi_device1; 30extern struct platform_device imx_ssi_device1;
44extern struct platform_device imx_kpp_device; 31extern struct platform_device imx_kpp_device;
32#endif
diff --git a/arch/arm/plat-mxc/dma-mx1-mx2.c b/arch/arm/mach-imx/dma-v1.c
index e16014b0d13c..fd1d9197d06e 100644
--- a/arch/arm/plat-mxc/dma-mx1-mx2.c
+++ b/arch/arm/mach-imx/dma-v1.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/plat-mxc/dma-mx1-mx2.c 2 * linux/arch/arm/plat-mxc/dma-v1.c
3 * 3 *
4 * i.MX DMA registration and IRQ dispatching 4 * i.MX DMA registration and IRQ dispatching
5 * 5 *
@@ -34,7 +34,7 @@
34#include <asm/system.h> 34#include <asm/system.h>
35#include <asm/irq.h> 35#include <asm/irq.h>
36#include <mach/hardware.h> 36#include <mach/hardware.h>
37#include <mach/dma-mx1-mx2.h> 37#include <mach/dma-v1.h>
38 38
39#define DMA_DCR 0x00 /* Control Register */ 39#define DMA_DCR 0x00 /* Control Register */
40#define DMA_DISR 0x04 /* Interrupt status Register */ 40#define DMA_DISR 0x04 /* Interrupt status Register */
diff --git a/arch/arm/mach-mx2/eukrea_mbimx27-baseboard.c b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c
index d66a6c439583..27e7226ec9d4 100644
--- a/arch/arm/mach-mx2/eukrea_mbimx27-baseboard.c
+++ b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c
@@ -35,11 +35,11 @@
35#include <mach/imxfb.h> 35#include <mach/imxfb.h>
36#include <mach/hardware.h> 36#include <mach/hardware.h>
37#include <mach/mmc.h> 37#include <mach/mmc.h>
38#include <mach/imx-uart.h>
39#include <mach/spi.h> 38#include <mach/spi.h>
40#include <mach/ssi.h> 39#include <mach/ssi.h>
41#include <mach/audmux.h> 40#include <mach/audmux.h>
42 41
42#include "devices-imx27.h"
43#include "devices.h" 43#include "devices.h"
44 44
45static int eukrea_mbimx27_pins[] = { 45static int eukrea_mbimx27_pins[] = {
@@ -247,16 +247,8 @@ static struct platform_device eukrea_mbimx27_lcd_powerdev = {
247 .dev.platform_data = &eukrea_mbimx27_lcd_power_data, 247 .dev.platform_data = &eukrea_mbimx27_lcd_power_data,
248}; 248};
249 249
250static struct imxuart_platform_data uart_pdata[] = { 250static const struct imxuart_platform_data uart_pdata __initconst = {
251 { 251 .flags = IMXUART_HAVE_RTSCTS,
252 .flags = IMXUART_HAVE_RTSCTS,
253 },
254 {
255 .flags = IMXUART_HAVE_RTSCTS,
256 },
257 {
258 .flags = IMXUART_HAVE_RTSCTS,
259 },
260}; 252};
261 253
262#if defined(CONFIG_TOUCHSCREEN_ADS7846) \ 254#if defined(CONFIG_TOUCHSCREEN_ADS7846) \
@@ -305,7 +297,7 @@ static struct i2c_board_info eukrea_mbimx27_i2c_devices[] = {
305 297
306static int eukrea_mbimx27_spi_cs[] = {GPIO_PORTD | 28}; 298static int eukrea_mbimx27_spi_cs[] = {GPIO_PORTD | 28};
307 299
308static struct spi_imx_master eukrea_mbimx27_spi_0_data = { 300static const struct spi_imx_master eukrea_mbimx27_spi0_data __initconst = {
309 .chipselect = eukrea_mbimx27_spi_cs, 301 .chipselect = eukrea_mbimx27_spi_cs,
310 .num_chipselect = ARRAY_SIZE(eukrea_mbimx27_spi_cs), 302 .num_chipselect = ARRAY_SIZE(eukrea_mbimx27_spi_cs),
311}; 303};
@@ -353,10 +345,10 @@ void __init eukrea_mbimx27_baseboard_init(void)
353 ); 345 );
354#endif 346#endif
355 347
356 mxc_register_device(&mxc_uart_device1, &uart_pdata[0]); 348 imx27_add_imx_uart1(&uart_pdata);
357 mxc_register_device(&mxc_uart_device2, &uart_pdata[1]); 349 imx27_add_imx_uart2(&uart_pdata);
358#if !defined(MACH_EUKREA_CPUIMX27_USEUART4) 350#if !defined(MACH_EUKREA_CPUIMX27_USEUART4)
359 mxc_register_device(&mxc_uart_device3, &uart_pdata[2]); 351 imx27_add_imx_uart3(&uart_pdata);
360#endif 352#endif
361 353
362 mxc_register_device(&mxc_fb_device, &eukrea_mbimx27_fb_data); 354 mxc_register_device(&mxc_fb_device, &eukrea_mbimx27_fb_data);
@@ -377,7 +369,7 @@ void __init eukrea_mbimx27_baseboard_init(void)
377#if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE) 369#if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE)
378 /* SPI_CS0 init */ 370 /* SPI_CS0 init */
379 mxc_gpio_mode(GPIO_PORTD | 28 | GPIO_GPIO | GPIO_OUT); 371 mxc_gpio_mode(GPIO_PORTD | 28 | GPIO_GPIO | GPIO_OUT);
380 mxc_register_device(&mxc_spi_device0, &eukrea_mbimx27_spi_0_data); 372 imx27_add_spi_imx0(&eukrea_mbimx27_spi0_data);
381 spi_register_board_info(eukrea_mbimx27_spi_board_info, 373 spi_register_board_info(eukrea_mbimx27_spi_board_info,
382 ARRAY_SIZE(eukrea_mbimx27_spi_board_info)); 374 ARRAY_SIZE(eukrea_mbimx27_spi_board_info));
383#endif 375#endif
diff --git a/arch/arm/mach-imx/include/mach/dma-mx1-mx2.h b/arch/arm/mach-imx/include/mach/dma-mx1-mx2.h
new file mode 100644
index 000000000000..df5f522da6b3
--- /dev/null
+++ b/arch/arm/mach-imx/include/mach/dma-mx1-mx2.h
@@ -0,0 +1,10 @@
1#ifndef __MACH_DMA_MX1_MX2_H__
2#define __MACH_DMA_MX1_MX2_H__
3/*
4 * Don't use this header in new code, it will go away when all users are
5 * converted to mach/dma-v1.h
6 */
7
8#include <mach/dma-v1.h>
9
10#endif /* ifndef __MACH_DMA_MX1_MX2_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h b/arch/arm/mach-imx/include/mach/dma-v1.h
index 7c4870bd5a21..287431cc13e5 100644
--- a/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h
+++ b/arch/arm/mach-imx/include/mach/dma-v1.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h 2 * linux/arch/arm/mach-imx/include/mach/dma-v1.h
3 * 3 *
4 * i.MX DMA registration and IRQ dispatching 4 * i.MX DMA registration and IRQ dispatching
5 * 5 *
@@ -22,8 +22,10 @@
22 * MA 02110-1301, USA. 22 * MA 02110-1301, USA.
23 */ 23 */
24 24
25#ifndef __ASM_ARCH_MXC_DMA_H 25#ifndef __MACH_DMA_V1_H__
26#define __ASM_ARCH_MXC_DMA_H 26#define __MACH_DMA_V1_H__
27
28#define imx_has_dma_v1() (cpu_is_mx1() || cpu_is_mx21() || cpu_is_mx27())
27 29
28#define IMX_DMA_CHANNELS 16 30#define IMX_DMA_CHANNELS 16
29 31
@@ -102,4 +104,4 @@ enum imx_dma_prio {
102 104
103int imx_dma_request_by_prio(const char *name, enum imx_dma_prio prio); 105int imx_dma_request_by_prio(const char *name, enum imx_dma_prio prio);
104 106
105#endif /* _ASM_ARCH_MXC_DMA_H */ 107#endif /* __MACH_DMA_V1_H__ */
diff --git a/arch/arm/mach-mx2/mach-cpuimx27.c b/arch/arm/mach-imx/mach-cpuimx27.c
index 55291787d5d1..2a135449e52c 100644
--- a/arch/arm/mach-mx2/mach-cpuimx27.c
+++ b/arch/arm/mach-imx/mach-cpuimx27.c
@@ -38,13 +38,12 @@
38#include <mach/board-eukrea_cpuimx27.h> 38#include <mach/board-eukrea_cpuimx27.h>
39#include <mach/common.h> 39#include <mach/common.h>
40#include <mach/hardware.h> 40#include <mach/hardware.h>
41#include <mach/i2c.h>
42#include <mach/iomux-mx27.h> 41#include <mach/iomux-mx27.h>
43#include <mach/imx-uart.h>
44#include <mach/mxc_nand.h> 42#include <mach/mxc_nand.h>
45#include <mach/mxc_ehci.h> 43#include <mach/mxc_ehci.h>
46#include <mach/ulpi.h> 44#include <mach/ulpi.h>
47 45
46#include "devices-imx27.h"
48#include "devices.h" 47#include "devices.h"
49 48
50static int eukrea_cpuimx27_pins[] = { 49static int eukrea_cpuimx27_pins[] = {
@@ -146,15 +145,12 @@ static struct platform_device eukrea_cpuimx27_nor_mtd_device = {
146 .resource = &eukrea_cpuimx27_flash_resource, 145 .resource = &eukrea_cpuimx27_flash_resource,
147}; 146};
148 147
149static struct imxuart_platform_data uart_pdata[] = { 148static const struct imxuart_platform_data uart_pdata __initconst = {
150 { 149 .flags = IMXUART_HAVE_RTSCTS,
151 .flags = IMXUART_HAVE_RTSCTS,
152 }, {
153 .flags = IMXUART_HAVE_RTSCTS,
154 },
155}; 150};
156 151
157static struct mxc_nand_platform_data eukrea_cpuimx27_nand_board_info = { 152static const struct mxc_nand_platform_data
153cpuimx27_nand_board_info __initconst = {
158 .width = 1, 154 .width = 1,
159 .hw_ecc = 1, 155 .hw_ecc = 1,
160}; 156};
@@ -166,7 +162,7 @@ static struct platform_device *platform_devices[] __initdata = {
166 &mxc_w1_master_device, 162 &mxc_w1_master_device,
167}; 163};
168 164
169static struct imxi2c_platform_data eukrea_cpuimx27_i2c_1_data = { 165static const struct imxi2c_platform_data cpuimx27_i2c1_data __initconst = {
170 .bitrate = 100000, 166 .bitrate = 100000,
171}; 167};
172 168
@@ -256,15 +252,14 @@ static void __init eukrea_cpuimx27_init(void)
256 mxc_gpio_setup_multiple_pins(eukrea_cpuimx27_pins, 252 mxc_gpio_setup_multiple_pins(eukrea_cpuimx27_pins,
257 ARRAY_SIZE(eukrea_cpuimx27_pins), "CPUIMX27"); 253 ARRAY_SIZE(eukrea_cpuimx27_pins), "CPUIMX27");
258 254
259 mxc_register_device(&mxc_uart_device0, &uart_pdata[0]); 255 imx27_add_imx_uart0(&uart_pdata);
260 256
261 mxc_register_device(&imx27_nand_device, 257 imx27_add_mxc_nand(&cpuimx27_nand_board_info);
262 &eukrea_cpuimx27_nand_board_info);
263 258
264 i2c_register_board_info(0, eukrea_cpuimx27_i2c_devices, 259 i2c_register_board_info(0, eukrea_cpuimx27_i2c_devices,
265 ARRAY_SIZE(eukrea_cpuimx27_i2c_devices)); 260 ARRAY_SIZE(eukrea_cpuimx27_i2c_devices));
266 261
267 mxc_register_device(&mxc_i2c_device0, &eukrea_cpuimx27_i2c_1_data); 262 imx27_add_i2c_imx1(&cpuimx27_i2c1_data);
268 263
269 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); 264 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
270 265
@@ -274,7 +269,7 @@ static void __init eukrea_cpuimx27_init(void)
274#endif 269#endif
275#if defined(MACH_EUKREA_CPUIMX27_USEUART4) 270#if defined(MACH_EUKREA_CPUIMX27_USEUART4)
276 /* in which case UART4 is also used for Bluetooth */ 271 /* in which case UART4 is also used for Bluetooth */
277 mxc_register_device(&mxc_uart_device3, &uart_pdata[1]); 272 imx27_add_imx_uart3(&uart_pdata);
278#endif 273#endif
279 274
280#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE) 275#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
diff --git a/arch/arm/mach-mx2/mach-imx27lite.c b/arch/arm/mach-imx/mach-imx27lite.c
index b5710bf18b96..22a2b5d91213 100644
--- a/arch/arm/mach-mx2/mach-imx27lite.c
+++ b/arch/arm/mach-imx/mach-imx27lite.c
@@ -12,10 +12,6 @@
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details. 14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */ 15 */
20 16
21#include <linux/platform_device.h> 17#include <linux/platform_device.h>
@@ -26,10 +22,9 @@
26#include <asm/mach/map.h> 22#include <asm/mach/map.h>
27#include <mach/hardware.h> 23#include <mach/hardware.h>
28#include <mach/common.h> 24#include <mach/common.h>
29#include <mach/imx-uart.h>
30#include <mach/iomux-mx27.h> 25#include <mach/iomux-mx27.h>
31#include <mach/board-mx27lite.h>
32 26
27#include "devices-imx27.h"
33#include "devices.h" 28#include "devices.h"
34 29
35static unsigned int mx27lite_pins[] = { 30static unsigned int mx27lite_pins[] = {
@@ -59,7 +54,7 @@ static unsigned int mx27lite_pins[] = {
59 PF23_AIN_FEC_TX_EN, 54 PF23_AIN_FEC_TX_EN,
60}; 55};
61 56
62static struct imxuart_platform_data uart_pdata = { 57static const struct imxuart_platform_data uart_pdata __initconst = {
63 .flags = IMXUART_HAVE_RTSCTS, 58 .flags = IMXUART_HAVE_RTSCTS,
64}; 59};
65 60
@@ -71,7 +66,7 @@ static void __init mx27lite_init(void)
71{ 66{
72 mxc_gpio_setup_multiple_pins(mx27lite_pins, ARRAY_SIZE(mx27lite_pins), 67 mxc_gpio_setup_multiple_pins(mx27lite_pins, ARRAY_SIZE(mx27lite_pins),
73 "imx27lite"); 68 "imx27lite");
74 mxc_register_device(&mxc_uart_device0, &uart_pdata); 69 imx27_add_imx_uart0(&uart_pdata);
75 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); 70 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
76} 71}
77 72
diff --git a/arch/arm/mach-mx1/mach-mx1ads.c b/arch/arm/mach-imx/mach-mx1ads.c
index 51f3cfd83db2..77a760cfadc0 100644
--- a/arch/arm/mach-mx1/mach-mx1ads.c
+++ b/arch/arm/mach-imx/mach-mx1ads.c
@@ -26,10 +26,10 @@
26#include <mach/common.h> 26#include <mach/common.h>
27#include <mach/hardware.h> 27#include <mach/hardware.h>
28#include <mach/i2c.h> 28#include <mach/i2c.h>
29#include <mach/imx-uart.h>
30#include <mach/iomux-mx1.h> 29#include <mach/iomux-mx1.h>
31#include <mach/irqs.h> 30#include <mach/irqs.h>
32 31
32#include "devices-imx1.h"
33#include "devices.h" 33#include "devices.h"
34 34
35static int mx1ads_pins[] = { 35static int mx1ads_pins[] = {
@@ -58,12 +58,12 @@ static int mx1ads_pins[] = {
58 * UARTs platform data 58 * UARTs platform data
59 */ 59 */
60 60
61static struct imxuart_platform_data uart_pdata[] = { 61static const struct imxuart_platform_data uart0_pdata __initconst = {
62 { 62 .flags = IMXUART_HAVE_RTSCTS,
63 .flags = IMXUART_HAVE_RTSCTS, 63};
64 }, { 64
65 .flags = IMXUART_HAVE_RTSCTS, 65static const struct imxuart_platform_data uart1_pdata __initconst = {
66 }, 66 .flags = IMXUART_HAVE_RTSCTS,
67}; 67};
68 68
69/* 69/*
@@ -75,8 +75,8 @@ static struct physmap_flash_data mx1ads_flash_data = {
75}; 75};
76 76
77static struct resource flash_resource = { 77static struct resource flash_resource = {
78 .start = IMX_CS0_PHYS, 78 .start = MX1_CS0_PHYS,
79 .end = IMX_CS0_PHYS + SZ_32M - 1, 79 .end = MX1_CS0_PHYS + SZ_32M - 1,
80 .flags = IORESOURCE_MEM, 80 .flags = IORESOURCE_MEM,
81}; 81};
82 82
@@ -98,7 +98,7 @@ static struct pcf857x_platform_data pcf857x_data[] = {
98 } 98 }
99}; 99};
100 100
101static struct imxi2c_platform_data mx1ads_i2c_data = { 101static const struct imxi2c_platform_data mx1ads_i2c_data __initconst = {
102 .bitrate = 100000, 102 .bitrate = 100000,
103}; 103};
104 104
@@ -121,8 +121,8 @@ static void __init mx1ads_init(void)
121 ARRAY_SIZE(mx1ads_pins), "mx1ads"); 121 ARRAY_SIZE(mx1ads_pins), "mx1ads");
122 122
123 /* UART */ 123 /* UART */
124 mxc_register_device(&imx_uart1_device, &uart_pdata[0]); 124 imx1_add_imx_uart0(&uart0_pdata);
125 mxc_register_device(&imx_uart2_device, &uart_pdata[1]); 125 imx1_add_imx_uart1(&uart1_pdata);
126 126
127 /* Physmap flash */ 127 /* Physmap flash */
128 mxc_register_device(&flash_device, &mx1ads_flash_data); 128 mxc_register_device(&flash_device, &mx1ads_flash_data);
@@ -131,7 +131,7 @@ static void __init mx1ads_init(void)
131 i2c_register_board_info(0, mx1ads_i2c_devices, 131 i2c_register_board_info(0, mx1ads_i2c_devices,
132 ARRAY_SIZE(mx1ads_i2c_devices)); 132 ARRAY_SIZE(mx1ads_i2c_devices));
133 133
134 mxc_register_device(&imx_i2c_device, &mx1ads_i2c_data); 134 imx1_add_i2c_imx(&mx1ads_i2c_data);
135} 135}
136 136
137static void __init mx1ads_timer_init(void) 137static void __init mx1ads_timer_init(void)
@@ -145,8 +145,8 @@ struct sys_timer mx1ads_timer = {
145 145
146MACHINE_START(MX1ADS, "Freescale MX1ADS") 146MACHINE_START(MX1ADS, "Freescale MX1ADS")
147 /* Maintainer: Sascha Hauer, Pengutronix */ 147 /* Maintainer: Sascha Hauer, Pengutronix */
148 .phys_io = IMX_IO_PHYS, 148 .phys_io = MX1_IO_BASE_ADDR,
149 .io_pg_offst = (IMX_IO_BASE >> 18) & 0xfffc, 149 .io_pg_offst = (MX1_IO_BASE_ADDR_VIRT >> 18) & 0xfffc,
150 .boot_params = MX1_PHYS_OFFSET + 0x100, 150 .boot_params = MX1_PHYS_OFFSET + 0x100,
151 .map_io = mx1_map_io, 151 .map_io = mx1_map_io,
152 .init_irq = mx1_init_irq, 152 .init_irq = mx1_init_irq,
@@ -155,8 +155,8 @@ MACHINE_START(MX1ADS, "Freescale MX1ADS")
155MACHINE_END 155MACHINE_END
156 156
157MACHINE_START(MXLADS, "Freescale MXLADS") 157MACHINE_START(MXLADS, "Freescale MXLADS")
158 .phys_io = IMX_IO_PHYS, 158 .phys_io = MX1_IO_BASE_ADDR,
159 .io_pg_offst = (IMX_IO_BASE >> 18) & 0xfffc, 159 .io_pg_offst = (MX1_IO_BASE_ADDR_VIRT >> 18) & 0xfffc,
160 .boot_params = MX1_PHYS_OFFSET + 0x100, 160 .boot_params = MX1_PHYS_OFFSET + 0x100,
161 .map_io = mx1_map_io, 161 .map_io = mx1_map_io,
162 .init_irq = mx1_init_irq, 162 .init_irq = mx1_init_irq,
diff --git a/arch/arm/mach-mx2/mach-mx21ads.c b/arch/arm/mach-imx/mach-mx21ads.c
index 113e58d7cb40..96d7f8189f32 100644
--- a/arch/arm/mach-mx2/mach-mx21ads.c
+++ b/arch/arm/mach-imx/mach-mx21ads.c
@@ -12,10 +12,6 @@
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details. 14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */ 15 */
20 16
21#include <linux/platform_device.h> 17#include <linux/platform_device.h>
@@ -28,15 +24,49 @@
28#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
29#include <asm/mach/time.h> 25#include <asm/mach/time.h>
30#include <asm/mach/map.h> 26#include <asm/mach/map.h>
31#include <mach/imx-uart.h>
32#include <mach/imxfb.h> 27#include <mach/imxfb.h>
33#include <mach/iomux-mx21.h> 28#include <mach/iomux-mx21.h>
34#include <mach/mxc_nand.h> 29#include <mach/mxc_nand.h>
35#include <mach/mmc.h> 30#include <mach/mmc.h>
36#include <mach/board-mx21ads.h>
37 31
32#include "devices-imx21.h"
38#include "devices.h" 33#include "devices.h"
39 34
35/*
36 * Memory-mapped I/O on MX21ADS base board
37 */
38#define MX21ADS_MMIO_BASE_ADDR 0xf5000000
39#define MX21ADS_MMIO_SIZE SZ_16M
40
41#define MX21ADS_REG_ADDR(offset) (void __force __iomem *) \
42 (MX21ADS_MMIO_BASE_ADDR + (offset))
43
44#define MX21ADS_CS8900A_IRQ IRQ_GPIOE(11)
45#define MX21ADS_CS8900A_IOBASE_REG MX21ADS_REG_ADDR(0x000000)
46#define MX21ADS_ST16C255_IOBASE_REG MX21ADS_REG_ADDR(0x200000)
47#define MX21ADS_VERSION_REG MX21ADS_REG_ADDR(0x400000)
48#define MX21ADS_IO_REG MX21ADS_REG_ADDR(0x800000)
49
50/* MX21ADS_IO_REG bit definitions */
51#define MX21ADS_IO_SD_WP 0x0001 /* read */
52#define MX21ADS_IO_TP6 0x0001 /* write */
53#define MX21ADS_IO_SW_SEL 0x0002 /* read */
54#define MX21ADS_IO_TP7 0x0002 /* write */
55#define MX21ADS_IO_RESET_E_UART 0x0004
56#define MX21ADS_IO_RESET_BASE 0x0008
57#define MX21ADS_IO_CSI_CTL2 0x0010
58#define MX21ADS_IO_CSI_CTL1 0x0020
59#define MX21ADS_IO_CSI_CTL0 0x0040
60#define MX21ADS_IO_UART1_EN 0x0080
61#define MX21ADS_IO_UART4_EN 0x0100
62#define MX21ADS_IO_LCDON 0x0200
63#define MX21ADS_IO_IRDA_EN 0x0400
64#define MX21ADS_IO_IRDA_FIR_SEL 0x0800
65#define MX21ADS_IO_IRDA_MD0_B 0x1000
66#define MX21ADS_IO_IRDA_MD1 0x2000
67#define MX21ADS_IO_LED4_ON 0x4000
68#define MX21ADS_IO_LED3_ON 0x8000
69
40static unsigned int mx21ads_pins[] = { 70static unsigned int mx21ads_pins[] = {
41 71
42 /* CS8900A */ 72 /* CS8900A */
@@ -133,14 +163,13 @@ static struct platform_device mx21ads_nor_mtd_device = {
133 .resource = &mx21ads_flash_resource, 163 .resource = &mx21ads_flash_resource,
134}; 164};
135 165
136static struct imxuart_platform_data uart_pdata = { 166static const struct imxuart_platform_data uart_pdata_rts __initconst = {
137 .flags = IMXUART_HAVE_RTSCTS, 167 .flags = IMXUART_HAVE_RTSCTS,
138}; 168};
139 169
140static struct imxuart_platform_data uart_norts_pdata = { 170static const struct imxuart_platform_data uart_pdata_norts __initconst = {
141}; 171};
142 172
143
144static int mx21ads_fb_init(struct platform_device *pdev) 173static int mx21ads_fb_init(struct platform_device *pdev)
145{ 174{
146 u16 tmp; 175 u16 tmp;
@@ -227,7 +256,8 @@ static struct imxmmc_platform_data mx21ads_sdhc_pdata = {
227 .exit = mx21ads_sdhc_exit, 256 .exit = mx21ads_sdhc_exit,
228}; 257};
229 258
230static struct mxc_nand_platform_data mx21ads_nand_board_info = { 259static const struct mxc_nand_platform_data
260mx21ads_nand_board_info __initconst = {
231 .width = 1, 261 .width = 1,
232 .hw_ecc = 1, 262 .hw_ecc = 1,
233}; 263};
@@ -263,12 +293,12 @@ static void __init mx21ads_board_init(void)
263 mxc_gpio_setup_multiple_pins(mx21ads_pins, ARRAY_SIZE(mx21ads_pins), 293 mxc_gpio_setup_multiple_pins(mx21ads_pins, ARRAY_SIZE(mx21ads_pins),
264 "mx21ads"); 294 "mx21ads");
265 295
266 mxc_register_device(&mxc_uart_device0, &uart_pdata); 296 imx21_add_imx_uart0(&uart_pdata_rts);
267 mxc_register_device(&mxc_uart_device2, &uart_norts_pdata); 297 imx21_add_imx_uart2(&uart_pdata_norts);
268 mxc_register_device(&mxc_uart_device3, &uart_pdata); 298 imx21_add_imx_uart3(&uart_pdata_rts);
269 mxc_register_device(&mxc_fb_device, &mx21ads_fb_data); 299 mxc_register_device(&mxc_fb_device, &mx21ads_fb_data);
270 mxc_register_device(&mxc_sdhc_device0, &mx21ads_sdhc_pdata); 300 mxc_register_device(&mxc_sdhc_device0, &mx21ads_sdhc_pdata);
271 mxc_register_device(&imx21_nand_device, &mx21ads_nand_board_info); 301 imx21_add_mxc_nand(&mx21ads_nand_board_info);
272 302
273 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); 303 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
274} 304}
diff --git a/arch/arm/mach-mx2/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c
index b2f4e0db3fb3..e2a82bab012b 100644
--- a/arch/arm/mach-mx2/mach-mx27_3ds.c
+++ b/arch/arm/mach-imx/mach-mx27_3ds.c
@@ -12,10 +12,12 @@
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details. 14 * GNU General Public License for more details.
15 * 15 */
16 * You should have received a copy of the GNU General Public License 16
17 * along with this program; if not, write to the Free Software 17/*
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 18 * This machine is known as:
19 * - i.MX27 3-Stack Development System
20 * - i.MX27 Platform Development Kit (i.MX27 PDK)
19 */ 21 */
20 22
21#include <linux/platform_device.h> 23#include <linux/platform_device.h>
@@ -25,10 +27,9 @@
25#include <asm/mach/time.h> 27#include <asm/mach/time.h>
26#include <mach/hardware.h> 28#include <mach/hardware.h>
27#include <mach/common.h> 29#include <mach/common.h>
28#include <mach/imx-uart.h>
29#include <mach/iomux-mx27.h> 30#include <mach/iomux-mx27.h>
30#include <mach/board-mx27pdk.h>
31 31
32#include "devices-imx27.h"
32#include "devices.h" 33#include "devices.h"
33 34
34static unsigned int mx27pdk_pins[] = { 35static unsigned int mx27pdk_pins[] = {
@@ -58,7 +59,7 @@ static unsigned int mx27pdk_pins[] = {
58 PF23_AIN_FEC_TX_EN, 59 PF23_AIN_FEC_TX_EN,
59}; 60};
60 61
61static struct imxuart_platform_data uart_pdata = { 62static const struct imxuart_platform_data uart_pdata __initconst = {
62 .flags = IMXUART_HAVE_RTSCTS, 63 .flags = IMXUART_HAVE_RTSCTS,
63}; 64};
64 65
@@ -70,7 +71,7 @@ static void __init mx27pdk_init(void)
70{ 71{
71 mxc_gpio_setup_multiple_pins(mx27pdk_pins, ARRAY_SIZE(mx27pdk_pins), 72 mxc_gpio_setup_multiple_pins(mx27pdk_pins, ARRAY_SIZE(mx27pdk_pins),
72 "mx27pdk"); 73 "mx27pdk");
73 mxc_register_device(&mxc_uart_device0, &uart_pdata); 74 imx27_add_imx_uart0(&uart_pdata);
74 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); 75 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
75} 76}
76 77
diff --git a/arch/arm/mach-mx2/mach-mx27ads.c b/arch/arm/mach-imx/mach-mx27ads.c
index 6ce323669e58..9c77da98a10e 100644
--- a/arch/arm/mach-mx2/mach-mx27ads.c
+++ b/arch/arm/mach-imx/mach-mx27ads.c
@@ -12,10 +12,6 @@
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details. 14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */ 15 */
20 16
21#include <linux/platform_device.h> 17#include <linux/platform_device.h>
@@ -32,16 +28,44 @@
32#include <asm/mach/time.h> 28#include <asm/mach/time.h>
33#include <asm/mach/map.h> 29#include <asm/mach/map.h>
34#include <mach/gpio.h> 30#include <mach/gpio.h>
35#include <mach/imx-uart.h>
36#include <mach/iomux-mx27.h> 31#include <mach/iomux-mx27.h>
37#include <mach/board-mx27ads.h>
38#include <mach/mxc_nand.h> 32#include <mach/mxc_nand.h>
39#include <mach/i2c.h>
40#include <mach/imxfb.h> 33#include <mach/imxfb.h>
41#include <mach/mmc.h> 34#include <mach/mmc.h>
42 35
36#include "devices-imx27.h"
43#include "devices.h" 37#include "devices.h"
44 38
39/*
40 * Base address of PBC controller, CS4
41 */
42#define PBC_BASE_ADDRESS 0xf4300000
43#define PBC_REG_ADDR(offset) (void __force __iomem *) \
44 (PBC_BASE_ADDRESS + (offset))
45
46/* When the PBC address connection is fixed in h/w, defined as 1 */
47#define PBC_ADDR_SH 0
48
49/* Offsets for the PBC Controller register */
50/*
51 * PBC Board version register offset
52 */
53#define PBC_VERSION_REG PBC_REG_ADDR(0x00000 >> PBC_ADDR_SH)
54/*
55 * PBC Board control register 1 set address.
56 */
57#define PBC_BCTRL1_SET_REG PBC_REG_ADDR(0x00008 >> PBC_ADDR_SH)
58/*
59 * PBC Board control register 1 clear address.
60 */
61#define PBC_BCTRL1_CLEAR_REG PBC_REG_ADDR(0x0000C >> PBC_ADDR_SH)
62
63/* PBC Board Control Register 1 bit definitions */
64#define PBC_BCTRL1_LCDON 0x0800 /* Enable the LCD */
65
66/* to determine the correct external crystal reference */
67#define CKIH_27MHZ_BIT_SET (1 << 3)
68
45static unsigned int mx27ads_pins[] = { 69static unsigned int mx27ads_pins[] = {
46 /* UART0 */ 70 /* UART0 */
47 PE12_PF_UART1_TXD, 71 PE12_PF_UART1_TXD,
@@ -141,7 +165,8 @@ static unsigned int mx27ads_pins[] = {
141 PB9_PF_SD2_CLK, 165 PB9_PF_SD2_CLK,
142}; 166};
143 167
144static struct mxc_nand_platform_data mx27ads_nand_board_info = { 168static const struct mxc_nand_platform_data
169mx27ads_nand_board_info __initconst = {
145 .width = 1, 170 .width = 1,
146 .hw_ecc = 1, 171 .hw_ecc = 1,
147}; 172};
@@ -168,7 +193,7 @@ static struct platform_device mx27ads_nor_mtd_device = {
168 .resource = &mx27ads_flash_resource, 193 .resource = &mx27ads_flash_resource,
169}; 194};
170 195
171static struct imxi2c_platform_data mx27ads_i2c_data = { 196static const struct imxi2c_platform_data mx27ads_i2c1_data __initconst = {
172 .bitrate = 100000, 197 .bitrate = 100000,
173}; 198};
174 199
@@ -263,20 +288,8 @@ static struct platform_device *platform_devices[] __initdata = {
263 &mxc_w1_master_device, 288 &mxc_w1_master_device,
264}; 289};
265 290
266static struct imxuart_platform_data uart_pdata[] = { 291static const struct imxuart_platform_data uart_pdata __initconst = {
267 { 292 .flags = IMXUART_HAVE_RTSCTS,
268 .flags = IMXUART_HAVE_RTSCTS,
269 }, {
270 .flags = IMXUART_HAVE_RTSCTS,
271 }, {
272 .flags = IMXUART_HAVE_RTSCTS,
273 }, {
274 .flags = IMXUART_HAVE_RTSCTS,
275 }, {
276 .flags = IMXUART_HAVE_RTSCTS,
277 }, {
278 .flags = IMXUART_HAVE_RTSCTS,
279 },
280}; 293};
281 294
282static void __init mx27ads_board_init(void) 295static void __init mx27ads_board_init(void)
@@ -284,18 +297,18 @@ static void __init mx27ads_board_init(void)
284 mxc_gpio_setup_multiple_pins(mx27ads_pins, ARRAY_SIZE(mx27ads_pins), 297 mxc_gpio_setup_multiple_pins(mx27ads_pins, ARRAY_SIZE(mx27ads_pins),
285 "mx27ads"); 298 "mx27ads");
286 299
287 mxc_register_device(&mxc_uart_device0, &uart_pdata[0]); 300 imx27_add_imx_uart0(&uart_pdata);
288 mxc_register_device(&mxc_uart_device1, &uart_pdata[1]); 301 imx27_add_imx_uart1(&uart_pdata);
289 mxc_register_device(&mxc_uart_device2, &uart_pdata[2]); 302 imx27_add_imx_uart2(&uart_pdata);
290 mxc_register_device(&mxc_uart_device3, &uart_pdata[3]); 303 imx27_add_imx_uart3(&uart_pdata);
291 mxc_register_device(&mxc_uart_device4, &uart_pdata[4]); 304 imx27_add_imx_uart4(&uart_pdata);
292 mxc_register_device(&mxc_uart_device5, &uart_pdata[5]); 305 imx27_add_imx_uart5(&uart_pdata);
293 mxc_register_device(&imx27_nand_device, &mx27ads_nand_board_info); 306 imx27_add_mxc_nand(&mx27ads_nand_board_info);
294 307
295 /* only the i2c master 1 is used on this CPU card */ 308 /* only the i2c master 1 is used on this CPU card */
296 i2c_register_board_info(1, mx27ads_i2c_devices, 309 i2c_register_board_info(1, mx27ads_i2c_devices,
297 ARRAY_SIZE(mx27ads_i2c_devices)); 310 ARRAY_SIZE(mx27ads_i2c_devices));
298 mxc_register_device(&mxc_i2c_device1, &mx27ads_i2c_data); 311 imx27_add_i2c_imx1(&mx27ads_i2c1_data);
299 mxc_register_device(&mxc_fb_device, &mx27ads_fb_data); 312 mxc_register_device(&mxc_fb_device, &mx27ads_fb_data);
300 mxc_register_device(&mxc_sdhc_device0, &sdhc1_pdata); 313 mxc_register_device(&mxc_sdhc_device0, &sdhc1_pdata);
301 mxc_register_device(&mxc_sdhc_device1, &sdhc2_pdata); 314 mxc_register_device(&mxc_sdhc_device1, &sdhc2_pdata);
@@ -342,4 +355,3 @@ MACHINE_START(MX27ADS, "Freescale i.MX27ADS")
342 .init_machine = mx27ads_board_init, 355 .init_machine = mx27ads_board_init,
343 .timer = &mx27ads_timer, 356 .timer = &mx27ads_timer,
344MACHINE_END 357MACHINE_END
345
diff --git a/arch/arm/mach-mx2/mach-mxt_td60.c b/arch/arm/mach-imx/mach-mxt_td60.c
index bc3855992677..a3a1e452d4c5 100644
--- a/arch/arm/mach-mx2/mach-mxt_td60.c
+++ b/arch/arm/mach-imx/mach-mxt_td60.c
@@ -12,10 +12,6 @@
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details. 14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */ 15 */
20 16
21#include <linux/platform_device.h> 17#include <linux/platform_device.h>
@@ -32,14 +28,13 @@
32#include <asm/mach/time.h> 28#include <asm/mach/time.h>
33#include <asm/mach/map.h> 29#include <asm/mach/map.h>
34#include <linux/gpio.h> 30#include <linux/gpio.h>
35#include <mach/imx-uart.h>
36#include <mach/iomux-mx27.h> 31#include <mach/iomux-mx27.h>
37#include <mach/mxc_nand.h> 32#include <mach/mxc_nand.h>
38#include <mach/i2c.h>
39#include <linux/i2c/pca953x.h> 33#include <linux/i2c/pca953x.h>
40#include <mach/imxfb.h> 34#include <mach/imxfb.h>
41#include <mach/mmc.h> 35#include <mach/mmc.h>
42 36
37#include "devices-imx27.h"
43#include "devices.h" 38#include "devices.h"
44 39
45static unsigned int mxt_td60_pins[] __initdata = { 40static unsigned int mxt_td60_pins[] __initdata = {
@@ -128,12 +123,13 @@ static unsigned int mxt_td60_pins[] __initdata = {
128 PB9_PF_SD2_CLK, 123 PB9_PF_SD2_CLK,
129}; 124};
130 125
131static struct mxc_nand_platform_data mxt_td60_nand_board_info = { 126static const struct mxc_nand_platform_data
127mxt_td60_nand_board_info __initconst = {
132 .width = 1, 128 .width = 1,
133 .hw_ecc = 1, 129 .hw_ecc = 1,
134}; 130};
135 131
136static struct imxi2c_platform_data mxt_td60_i2c_data = { 132static const struct imxi2c_platform_data mxt_td60_i2c0_data __initconst = {
137 .bitrate = 100000, 133 .bitrate = 100000,
138}; 134};
139 135
@@ -173,7 +169,7 @@ static struct i2c_board_info mxt_td60_i2c_devices[] = {
173 }, 169 },
174}; 170};
175 171
176static struct imxi2c_platform_data mxt_td60_i2c2_data = { 172static const struct imxi2c_platform_data mxt_td60_i2c1_data __initconst = {
177 .bitrate = 100000, 173 .bitrate = 100000,
178}; 174};
179 175
@@ -239,14 +235,8 @@ static struct platform_device *platform_devices[] __initdata = {
239 &mxc_fec_device, 235 &mxc_fec_device,
240}; 236};
241 237
242static struct imxuart_platform_data uart_pdata[] = { 238static const struct imxuart_platform_data uart_pdata __initconst = {
243 { 239 .flags = IMXUART_HAVE_RTSCTS,
244 .flags = IMXUART_HAVE_RTSCTS,
245 }, {
246 .flags = IMXUART_HAVE_RTSCTS,
247 }, {
248 .flags = IMXUART_HAVE_RTSCTS,
249 },
250}; 240};
251 241
252static void __init mxt_td60_board_init(void) 242static void __init mxt_td60_board_init(void)
@@ -254,10 +244,10 @@ static void __init mxt_td60_board_init(void)
254 mxc_gpio_setup_multiple_pins(mxt_td60_pins, ARRAY_SIZE(mxt_td60_pins), 244 mxc_gpio_setup_multiple_pins(mxt_td60_pins, ARRAY_SIZE(mxt_td60_pins),
255 "MXT_TD60"); 245 "MXT_TD60");
256 246
257 mxc_register_device(&mxc_uart_device0, &uart_pdata[0]); 247 imx27_add_imx_uart0(&uart_pdata);
258 mxc_register_device(&mxc_uart_device1, &uart_pdata[1]); 248 imx27_add_imx_uart1(&uart_pdata);
259 mxc_register_device(&mxc_uart_device2, &uart_pdata[2]); 249 imx27_add_imx_uart2(&uart_pdata);
260 mxc_register_device(&imx27_nand_device, &mxt_td60_nand_board_info); 250 imx27_add_mxc_nand(&mxt_td60_nand_board_info);
261 251
262 i2c_register_board_info(0, mxt_td60_i2c_devices, 252 i2c_register_board_info(0, mxt_td60_i2c_devices,
263 ARRAY_SIZE(mxt_td60_i2c_devices)); 253 ARRAY_SIZE(mxt_td60_i2c_devices));
@@ -265,8 +255,8 @@ static void __init mxt_td60_board_init(void)
265 i2c_register_board_info(1, mxt_td60_i2c2_devices, 255 i2c_register_board_info(1, mxt_td60_i2c2_devices,
266 ARRAY_SIZE(mxt_td60_i2c2_devices)); 256 ARRAY_SIZE(mxt_td60_i2c2_devices));
267 257
268 mxc_register_device(&mxc_i2c_device0, &mxt_td60_i2c_data); 258 imx27_add_i2c_imx0(&mxt_td60_i2c0_data);
269 mxc_register_device(&mxc_i2c_device1, &mxt_td60_i2c2_data); 259 imx27_add_i2c_imx1(&mxt_td60_i2c1_data);
270 mxc_register_device(&mxc_fb_device, &mxt_td60_fb_data); 260 mxc_register_device(&mxc_fb_device, &mxt_td60_fb_data);
271 mxc_register_device(&mxc_sdhc_device0, &sdhc1_pdata); 261 mxc_register_device(&mxc_sdhc_device0, &sdhc1_pdata);
272 262
diff --git a/arch/arm/mach-mx2/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c
index 2164b7f96ef2..6c92deaf468f 100644
--- a/arch/arm/mach-mx2/mach-pca100.c
+++ b/arch/arm/mach-imx/mach-pca100.c
@@ -36,12 +36,7 @@
36#include <mach/common.h> 36#include <mach/common.h>
37#include <mach/hardware.h> 37#include <mach/hardware.h>
38#include <mach/iomux-mx27.h> 38#include <mach/iomux-mx27.h>
39#include <mach/i2c.h>
40#include <asm/mach/time.h> 39#include <asm/mach/time.h>
41#if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE)
42#include <mach/spi.h>
43#endif
44#include <mach/imx-uart.h>
45#include <mach/audmux.h> 40#include <mach/audmux.h>
46#include <mach/ssi.h> 41#include <mach/ssi.h>
47#include <mach/mxc_nand.h> 42#include <mach/mxc_nand.h>
@@ -51,6 +46,7 @@
51#include <mach/ulpi.h> 46#include <mach/ulpi.h>
52#include <mach/imxfb.h> 47#include <mach/imxfb.h>
53 48
49#include "devices-imx27.h"
54#include "devices.h" 50#include "devices.h"
55 51
56#define OTG_PHY_CS_GPIO (GPIO_PORTB + 23) 52#define OTG_PHY_CS_GPIO (GPIO_PORTB + 23)
@@ -166,11 +162,12 @@ static int pca100_pins[] = {
166 GPIO_PORTE | 5 | GPIO_GPIO | GPIO_IN, /* GPIO2_IRQ */ 162 GPIO_PORTE | 5 | GPIO_GPIO | GPIO_IN, /* GPIO2_IRQ */
167}; 163};
168 164
169static struct imxuart_platform_data uart_pdata = { 165static const struct imxuart_platform_data uart_pdata __initconst = {
170 .flags = IMXUART_HAVE_RTSCTS, 166 .flags = IMXUART_HAVE_RTSCTS,
171}; 167};
172 168
173static struct mxc_nand_platform_data pca100_nand_board_info = { 169static const struct mxc_nand_platform_data
170pca100_nand_board_info __initconst = {
174 .width = 1, 171 .width = 1,
175 .hw_ecc = 1, 172 .hw_ecc = 1,
176}; 173};
@@ -181,7 +178,7 @@ static struct platform_device *platform_devices[] __initdata = {
181 &mxc_wdt, 178 &mxc_wdt,
182}; 179};
183 180
184static struct imxi2c_platform_data pca100_i2c_1_data = { 181static const struct imxi2c_platform_data pca100_i2c1_data __initconst = {
185 .bitrate = 100000, 182 .bitrate = 100000,
186}; 183};
187 184
@@ -224,7 +221,7 @@ static struct spi_board_info pca100_spi_board_info[] __initdata = {
224 221
225static int pca100_spi_cs[] = {SPI1_SS0, SPI1_SS1}; 222static int pca100_spi_cs[] = {SPI1_SS0, SPI1_SS1};
226 223
227static struct spi_imx_master pca100_spi_0_data = { 224static const struct spi_imx_master pca100_spi0_data __initconst = {
228 .chipselect = pca100_spi_cs, 225 .chipselect = pca100_spi_cs,
229 .num_chipselect = ARRAY_SIZE(pca100_spi_cs), 226 .num_chipselect = ARRAY_SIZE(pca100_spi_cs),
230}; 227};
@@ -394,24 +391,24 @@ static void __init pca100_init(void)
394 391
395 mxc_register_device(&imx_ssi_device0, &pca100_ssi_pdata); 392 mxc_register_device(&imx_ssi_device0, &pca100_ssi_pdata);
396 393
397 mxc_register_device(&mxc_uart_device0, &uart_pdata); 394 imx27_add_imx_uart0(&uart_pdata);
398 395
399 mxc_register_device(&mxc_sdhc_device1, &sdhc_pdata); 396 mxc_register_device(&mxc_sdhc_device1, &sdhc_pdata);
400 397
401 mxc_register_device(&imx27_nand_device, &pca100_nand_board_info); 398 imx27_add_mxc_nand(&pca100_nand_board_info);
402 399
403 /* only the i2c master 1 is used on this CPU card */ 400 /* only the i2c master 1 is used on this CPU card */
404 i2c_register_board_info(1, pca100_i2c_devices, 401 i2c_register_board_info(1, pca100_i2c_devices,
405 ARRAY_SIZE(pca100_i2c_devices)); 402 ARRAY_SIZE(pca100_i2c_devices));
406 403
407 mxc_register_device(&mxc_i2c_device1, &pca100_i2c_1_data); 404 imx27_add_i2c_imx1(&pca100_i2c1_data);
408 405
409#if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE) 406#if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE)
410 mxc_gpio_mode(GPIO_PORTD | 28 | GPIO_GPIO | GPIO_IN); 407 mxc_gpio_mode(GPIO_PORTD | 28 | GPIO_GPIO | GPIO_IN);
411 mxc_gpio_mode(GPIO_PORTD | 27 | GPIO_GPIO | GPIO_IN); 408 mxc_gpio_mode(GPIO_PORTD | 27 | GPIO_GPIO | GPIO_IN);
412 spi_register_board_info(pca100_spi_board_info, 409 spi_register_board_info(pca100_spi_board_info,
413 ARRAY_SIZE(pca100_spi_board_info)); 410 ARRAY_SIZE(pca100_spi_board_info));
414 mxc_register_device(&mxc_spi_device0, &pca100_spi_0_data); 411 imx27_add_spi_imx0(&pca100_spi_0_data);
415#endif 412#endif
416 413
417 gpio_request(OTG_PHY_CS_GPIO, "usb-otg-cs"); 414 gpio_request(OTG_PHY_CS_GPIO, "usb-otg-cs");
diff --git a/arch/arm/mach-mx2/mach-pcm038.c b/arch/arm/mach-imx/mach-pcm038.c
index 36c89431679a..9212e8f37001 100644
--- a/arch/arm/mach-mx2/mach-pcm038.c
+++ b/arch/arm/mach-imx/mach-pcm038.c
@@ -35,14 +35,12 @@
35#include <mach/board-pcm038.h> 35#include <mach/board-pcm038.h>
36#include <mach/common.h> 36#include <mach/common.h>
37#include <mach/hardware.h> 37#include <mach/hardware.h>
38#include <mach/i2c.h>
39#include <mach/iomux-mx27.h> 38#include <mach/iomux-mx27.h>
40#include <mach/imx-uart.h>
41#include <mach/mxc_nand.h> 39#include <mach/mxc_nand.h>
42#include <mach/spi.h>
43#include <mach/mxc_ehci.h> 40#include <mach/mxc_ehci.h>
44#include <mach/ulpi.h> 41#include <mach/ulpi.h>
45 42
43#include "devices-imx27.h"
46#include "devices.h" 44#include "devices.h"
47 45
48static int pcm038_pins[] = { 46static int pcm038_pins[] = {
@@ -162,17 +160,12 @@ static struct platform_device pcm038_nor_mtd_device = {
162 .resource = &pcm038_flash_resource, 160 .resource = &pcm038_flash_resource,
163}; 161};
164 162
165static struct imxuart_platform_data uart_pdata[] = { 163static const struct imxuart_platform_data uart_pdata __initconst = {
166 { 164 .flags = IMXUART_HAVE_RTSCTS,
167 .flags = IMXUART_HAVE_RTSCTS,
168 }, {
169 .flags = IMXUART_HAVE_RTSCTS,
170 }, {
171 .flags = IMXUART_HAVE_RTSCTS,
172 },
173}; 165};
174 166
175static struct mxc_nand_platform_data pcm038_nand_board_info = { 167static const struct mxc_nand_platform_data
168pcm038_nand_board_info __initconst = {
176 .width = 1, 169 .width = 1,
177 .hw_ecc = 1, 170 .hw_ecc = 1,
178}; 171};
@@ -192,7 +185,7 @@ static void __init pcm038_init_sram(void)
192 mx27_setup_weimcs(1, 0x0000d843, 0x22252521, 0x22220a00); 185 mx27_setup_weimcs(1, 0x0000d843, 0x22252521, 0x22220a00);
193} 186}
194 187
195static struct imxi2c_platform_data pcm038_i2c_1_data = { 188static const struct imxi2c_platform_data pcm038_i2c1_data __initconst = {
196 .bitrate = 100000, 189 .bitrate = 100000,
197}; 190};
198 191
@@ -215,7 +208,7 @@ static struct i2c_board_info pcm038_i2c_devices[] = {
215 208
216static int pcm038_spi_cs[] = {GPIO_PORTD + 28}; 209static int pcm038_spi_cs[] = {GPIO_PORTD + 28};
217 210
218static struct spi_imx_master pcm038_spi_0_data = { 211static const struct spi_imx_master pcm038_spi0_data __initconst = {
219 .chipselect = pcm038_spi_cs, 212 .chipselect = pcm038_spi_cs,
220 .num_chipselect = ARRAY_SIZE(pcm038_spi_cs), 213 .num_chipselect = ARRAY_SIZE(pcm038_spi_cs),
221}; 214};
@@ -305,18 +298,18 @@ static void __init pcm038_init(void)
305 298
306 pcm038_init_sram(); 299 pcm038_init_sram();
307 300
308 mxc_register_device(&mxc_uart_device0, &uart_pdata[0]); 301 imx27_add_imx_uart0(&uart_pdata);
309 mxc_register_device(&mxc_uart_device1, &uart_pdata[1]); 302 imx27_add_imx_uart1(&uart_pdata);
310 mxc_register_device(&mxc_uart_device2, &uart_pdata[2]); 303 imx27_add_imx_uart2(&uart_pdata);
311 304
312 mxc_gpio_mode(PE16_AF_OWIRE); 305 mxc_gpio_mode(PE16_AF_OWIRE);
313 mxc_register_device(&imx27_nand_device, &pcm038_nand_board_info); 306 imx27_add_mxc_nand(&pcm038_nand_board_info);
314 307
315 /* only the i2c master 1 is used on this CPU card */ 308 /* only the i2c master 1 is used on this CPU card */
316 i2c_register_board_info(1, pcm038_i2c_devices, 309 i2c_register_board_info(1, pcm038_i2c_devices,
317 ARRAY_SIZE(pcm038_i2c_devices)); 310 ARRAY_SIZE(pcm038_i2c_devices));
318 311
319 mxc_register_device(&mxc_i2c_device1, &pcm038_i2c_1_data); 312 imx27_add_i2c_imx1(&pcm038_i2c1_data);
320 313
321 /* PE18 for user-LED D40 */ 314 /* PE18 for user-LED D40 */
322 mxc_gpio_mode(GPIO_PORTE | 18 | GPIO_GPIO | GPIO_OUT); 315 mxc_gpio_mode(GPIO_PORTE | 18 | GPIO_GPIO | GPIO_OUT);
@@ -326,7 +319,7 @@ static void __init pcm038_init(void)
326 /* MC13783 IRQ */ 319 /* MC13783 IRQ */
327 mxc_gpio_mode(GPIO_PORTB | 23 | GPIO_GPIO | GPIO_IN); 320 mxc_gpio_mode(GPIO_PORTB | 23 | GPIO_GPIO | GPIO_IN);
328 321
329 mxc_register_device(&mxc_spi_device0, &pcm038_spi_0_data); 322 imx27_add_spi_imx0(&pcm038_spi0_data);
330 spi_register_board_info(pcm038_spi_board_info, 323 spi_register_board_info(pcm038_spi_board_info,
331 ARRAY_SIZE(pcm038_spi_board_info)); 324 ARRAY_SIZE(pcm038_spi_board_info));
332 325
diff --git a/arch/arm/mach-mx1/mach-scb9328.c b/arch/arm/mach-imx/mach-scb9328.c
index 7587a7a12460..88bf0d1e26e6 100644
--- a/arch/arm/mach-mx1/mach-scb9328.c
+++ b/arch/arm/mach-imx/mach-scb9328.c
@@ -22,17 +22,17 @@
22#include <mach/common.h> 22#include <mach/common.h>
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24#include <mach/irqs.h> 24#include <mach/irqs.h>
25#include <mach/imx-uart.h>
26#include <mach/iomux-mx1.h> 25#include <mach/iomux-mx1.h>
27 26
27#include "devices-imx1.h"
28#include "devices.h" 28#include "devices.h"
29 29
30/* 30/*
31 * This scb9328 has a 32MiB flash 31 * This scb9328 has a 32MiB flash
32 */ 32 */
33static struct resource flash_resource = { 33static struct resource flash_resource = {
34 .start = IMX_CS0_PHYS, 34 .start = MX1_CS0_PHYS,
35 .end = IMX_CS0_PHYS + (32 * 1024 * 1024) - 1, 35 .end = MX1_CS0_PHYS + (32 * 1024 * 1024) - 1,
36 .flags = IORESOURCE_MEM, 36 .flags = IORESOURCE_MEM,
37}; 37};
38 38
@@ -70,13 +70,13 @@ static struct dm9000_plat_data dm9000_platdata = {
70static struct resource dm9000x_resources[] = { 70static struct resource dm9000x_resources[] = {
71 { 71 {
72 .name = "address area", 72 .name = "address area",
73 .start = IMX_CS5_PHYS, 73 .start = MX1_CS5_PHYS,
74 .end = IMX_CS5_PHYS + 1, 74 .end = MX1_CS5_PHYS + 1,
75 .flags = IORESOURCE_MEM, /* address access */ 75 .flags = IORESOURCE_MEM, /* address access */
76 }, { 76 }, {
77 .name = "data area", 77 .name = "data area",
78 .start = IMX_CS5_PHYS + 4, 78 .start = MX1_CS5_PHYS + 4,
79 .end = IMX_CS5_PHYS + 5, 79 .end = MX1_CS5_PHYS + 5,
80 .flags = IORESOURCE_MEM, /* data access */ 80 .flags = IORESOURCE_MEM, /* data access */
81 }, { 81 }, {
82 .start = IRQ_GPIOC(3), 82 .start = IRQ_GPIOC(3),
@@ -108,14 +108,13 @@ static int uart1_mxc_init(struct platform_device *pdev)
108 ARRAY_SIZE(mxc_uart1_pins), "UART1"); 108 ARRAY_SIZE(mxc_uart1_pins), "UART1");
109} 109}
110 110
111static int uart1_mxc_exit(struct platform_device *pdev) 111static void uart1_mxc_exit(struct platform_device *pdev)
112{ 112{
113 mxc_gpio_release_multiple_pins(mxc_uart1_pins, 113 mxc_gpio_release_multiple_pins(mxc_uart1_pins,
114 ARRAY_SIZE(mxc_uart1_pins)); 114 ARRAY_SIZE(mxc_uart1_pins));
115 return 0;
116} 115}
117 116
118static struct imxuart_platform_data uart_pdata = { 117static const struct imxuart_platform_data uart_pdata __initconst = {
119 .init = uart1_mxc_init, 118 .init = uart1_mxc_init,
120 .exit = uart1_mxc_exit, 119 .exit = uart1_mxc_exit,
121 .flags = IMXUART_HAVE_RTSCTS, 120 .flags = IMXUART_HAVE_RTSCTS,
@@ -131,7 +130,7 @@ static struct platform_device *devices[] __initdata = {
131 */ 130 */
132static void __init scb9328_init(void) 131static void __init scb9328_init(void)
133{ 132{
134 mxc_register_device(&imx_uart1_device, &uart_pdata); 133 imx1_add_imx_uart0(&uart_pdata);
135 134
136 printk(KERN_INFO"Scb9328: Adding devices\n"); 135 printk(KERN_INFO"Scb9328: Adding devices\n");
137 platform_add_devices(devices, ARRAY_SIZE(devices)); 136 platform_add_devices(devices, ARRAY_SIZE(devices));
diff --git a/arch/arm/mach-mx1/generic.c b/arch/arm/mach-imx/mm-imx1.c
index 7f9fc1034c08..117ebf6bc951 100644
--- a/arch/arm/mach-mx1/generic.c
+++ b/arch/arm/mach-imx/mm-imx1.c
@@ -3,7 +3,7 @@
3 * Created: april 20th, 2004 3 * Created: april 20th, 2004
4 * Copyright: Synertronixx GmbH 4 * Copyright: Synertronixx GmbH
5 * 5 *
6 * Common code for i.MX machines 6 * Common code for i.MX1 machines
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by 9 * it under the terms of the GNU General Public License as published by
@@ -14,11 +14,6 @@
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details. 16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 *
22 */ 17 */
23#include <linux/kernel.h> 18#include <linux/kernel.h>
24#include <linux/init.h> 19#include <linux/init.h>
@@ -31,23 +26,25 @@
31 26
32static struct map_desc imx_io_desc[] __initdata = { 27static struct map_desc imx_io_desc[] __initdata = {
33 { 28 {
34 .virtual = IMX_IO_BASE, 29 .virtual = MX1_IO_BASE_ADDR_VIRT,
35 .pfn = __phys_to_pfn(IMX_IO_PHYS), 30 .pfn = __phys_to_pfn(MX1_IO_BASE_ADDR),
36 .length = IMX_IO_SIZE, 31 .length = MX1_IO_SIZE,
37 .type = MT_DEVICE 32 .type = MT_DEVICE
38 } 33 }
39}; 34};
40 35
41void __init mx1_map_io(void) 36void __init mx1_map_io(void)
42{ 37{
43 mxc_set_cpu_type(MXC_CPU_MX1); 38 mxc_set_cpu_type(MXC_CPU_MX1);
44 mxc_arch_reset_init(IO_ADDRESS(WDT_BASE_ADDR)); 39 mxc_arch_reset_init(MX1_IO_ADDRESS(MX1_WDT_BASE_ADDR));
45 40
46 iotable_init(imx_io_desc, ARRAY_SIZE(imx_io_desc)); 41 iotable_init(imx_io_desc, ARRAY_SIZE(imx_io_desc));
47} 42}
48 43
44int imx1_register_gpios(void);
45
49void __init mx1_init_irq(void) 46void __init mx1_init_irq(void)
50{ 47{
51 mxc_init_irq(IO_ADDRESS(AVIC_BASE_ADDR)); 48 imx1_register_gpios();
49 mxc_init_irq(MX1_IO_ADDRESS(MX1_AVIC_BASE_ADDR));
52} 50}
53
diff --git a/arch/arm/mach-mx2/mm-imx21.c b/arch/arm/mach-imx/mm-imx21.c
index 64134314d012..68aa5d2ecdb1 100644
--- a/arch/arm/mach-mx2/mm-imx21.c
+++ b/arch/arm/mach-imx/mm-imx21.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/arm/mach-mx2/mm-imx21.c 2 * arch/arm/mach-imx/mm-imx21.c
3 * 3 *
4 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de) 4 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
5 * 5 *
@@ -77,7 +77,10 @@ void __init mx21_map_io(void)
77 iotable_init(imx21_io_desc, ARRAY_SIZE(imx21_io_desc)); 77 iotable_init(imx21_io_desc, ARRAY_SIZE(imx21_io_desc));
78} 78}
79 79
80int imx21_register_gpios(void);
81
80void __init mx21_init_irq(void) 82void __init mx21_init_irq(void)
81{ 83{
84 imx21_register_gpios();
82 mxc_init_irq(MX21_IO_ADDRESS(MX21_AVIC_BASE_ADDR)); 85 mxc_init_irq(MX21_IO_ADDRESS(MX21_AVIC_BASE_ADDR));
83} 86}
diff --git a/arch/arm/mach-mx2/mm-imx27.c b/arch/arm/mach-imx/mm-imx27.c
index 3366ed44cfd5..bcedce9c87dd 100644
--- a/arch/arm/mach-mx2/mm-imx27.c
+++ b/arch/arm/mach-imx/mm-imx27.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/arm/mach-mx2/mm-imx27.c 2 * arch/arm/mach-imx/mm-imx27.c
3 * 3 *
4 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de) 4 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
5 * 5 *
@@ -77,7 +77,10 @@ void __init mx27_map_io(void)
77 iotable_init(imx27_io_desc, ARRAY_SIZE(imx27_io_desc)); 77 iotable_init(imx27_io_desc, ARRAY_SIZE(imx27_io_desc));
78} 78}
79 79
80int imx27_register_gpios(void);
81
80void __init mx27_init_irq(void) 82void __init mx27_init_irq(void)
81{ 83{
84 imx27_register_gpios();
82 mxc_init_irq(MX27_IO_ADDRESS(MX27_AVIC_BASE_ADDR)); 85 mxc_init_irq(MX27_IO_ADDRESS(MX27_AVIC_BASE_ADDR));
83} 86}
diff --git a/arch/arm/mach-mx1/ksym_mx1.c b/arch/arm/mach-imx/mx1-camera-fiq-ksym.c
index b09ee12a4ff0..b09ee12a4ff0 100644
--- a/arch/arm/mach-mx1/ksym_mx1.c
+++ b/arch/arm/mach-imx/mx1-camera-fiq-ksym.c
diff --git a/arch/arm/mach-mx1/mx1_camera_fiq.S b/arch/arm/mach-imx/mx1-camera-fiq.S
index 9c69aa65bf17..9c69aa65bf17 100644
--- a/arch/arm/mach-mx1/mx1_camera_fiq.S
+++ b/arch/arm/mach-imx/mx1-camera-fiq.S
diff --git a/arch/arm/mach-mx2/pcm970-baseboard.c b/arch/arm/mach-imx/pcm970-baseboard.c
index f490a406d57e..f490a406d57e 100644
--- a/arch/arm/mach-mx2/pcm970-baseboard.c
+++ b/arch/arm/mach-imx/pcm970-baseboard.c
diff --git a/arch/arm/mach-mx2/pm-imx27.c b/arch/arm/mach-imx/pm-imx27.c
index afc17ce0bb54..afc17ce0bb54 100644
--- a/arch/arm/mach-mx2/pm-imx27.c
+++ b/arch/arm/mach-imx/pm-imx27.c
diff --git a/arch/arm/mach-mx1/Kconfig b/arch/arm/mach-mx1/Kconfig
deleted file mode 100644
index eb7660f5d4b7..000000000000
--- a/arch/arm/mach-mx1/Kconfig
+++ /dev/null
@@ -1,19 +0,0 @@
1if ARCH_MX1
2
3comment "MX1 platforms:"
4
5config MACH_MXLADS
6 bool
7
8config ARCH_MX1ADS
9 bool "MX1ADS platform"
10 select MACH_MXLADS
11 help
12 Say Y here if you are using Motorola MX1ADS/MXLADS boards
13
14config MACH_SCB9328
15 bool "Synertronixx scb9328"
16 help
17 Say Y here if you are using a Synertronixx scb9328 board
18
19endif
diff --git a/arch/arm/mach-mx1/Makefile b/arch/arm/mach-mx1/Makefile
deleted file mode 100644
index fc2ddf82441b..000000000000
--- a/arch/arm/mach-mx1/Makefile
+++ /dev/null
@@ -1,15 +0,0 @@
1#
2# Makefile for the linux kernel.
3#
4
5# Object file lists.
6
7EXTRA_CFLAGS += -DIMX_NEEDS_DEPRECATED_SYMBOLS
8obj-y += generic.o clock.o devices.o
9
10# Support for CMOS sensor interface
11obj-$(CONFIG_MX1_VIDEO) += ksym_mx1.o mx1_camera_fiq.o
12
13# Specific board support
14obj-$(CONFIG_ARCH_MX1ADS) += mach-mx1ads.o
15obj-$(CONFIG_MACH_SCB9328) += mach-scb9328.o
diff --git a/arch/arm/mach-mx1/Makefile.boot b/arch/arm/mach-mx1/Makefile.boot
deleted file mode 100644
index 8ed1492288a2..000000000000
--- a/arch/arm/mach-mx1/Makefile.boot
+++ /dev/null
@@ -1,4 +0,0 @@
1 zreladdr-y := 0x08008000
2params_phys-y := 0x08000100
3initrd_phys-y := 0x08800000
4
diff --git a/arch/arm/mach-mx1/crm_regs.h b/arch/arm/mach-mx1/crm_regs.h
deleted file mode 100644
index 22e866ff0c09..000000000000
--- a/arch/arm/mach-mx1/crm_regs.h
+++ /dev/null
@@ -1,55 +0,0 @@
1/*
2 * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
3 * Copyright (c) 2008 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
4 *
5 * This file may be distributed under the terms of the GNU General
6 * Public License, version 2.
7 */
8
9#ifndef __ARCH_ARM_MACH_MX1_CRM_REGS_H__
10#define __ARCH_ARM_MACH_MX1_CRM_REGS_H__
11
12#define CCM_BASE IO_ADDRESS(CCM_BASE_ADDR)
13#define SCM_BASE IO_ADDRESS(SCM_BASE_ADDR)
14
15/* CCM register addresses */
16#define CCM_CSCR (CCM_BASE + 0x0)
17#define CCM_MPCTL0 (CCM_BASE + 0x4)
18#define CCM_MPCTL1 (CCM_BASE + 0x8)
19#define CCM_SPCTL0 (CCM_BASE + 0xC)
20#define CCM_SPCTL1 (CCM_BASE + 0x10)
21#define CCM_PCDR (CCM_BASE + 0x20)
22
23#define CCM_CSCR_CLKO_OFFSET 29
24#define CCM_CSCR_CLKO_MASK (0x7 << 29)
25#define CCM_CSCR_USB_OFFSET 26
26#define CCM_CSCR_USB_MASK (0x7 << 26)
27#define CCM_CSCR_SPLL_RESTART (1 << 22)
28#define CCM_CSCR_MPLL_RESTART (1 << 21)
29#define CCM_CSCR_OSC_EN_SHIFT 17
30#define CCM_CSCR_SYSTEM_SEL (1 << 16)
31#define CCM_CSCR_BCLK_OFFSET 10
32#define CCM_CSCR_BCLK_MASK (0xF << 10)
33#define CCM_CSCR_PRESC (1 << 15)
34#define CCM_CSCR_SPEN (1 << 1)
35#define CCM_CSCR_MPEN (1 << 0)
36
37#define CCM_PCDR_PCLK3_OFFSET 16
38#define CCM_PCDR_PCLK3_MASK (0x7F << 16)
39#define CCM_PCDR_PCLK2_OFFSET 4
40#define CCM_PCDR_PCLK2_MASK (0xF << 4)
41#define CCM_PCDR_PCLK1_OFFSET 0
42#define CCM_PCDR_PCLK1_MASK 0xF
43
44/* SCM register addresses */
45#define SCM_SIDR (SCM_BASE + 0x0)
46#define SCM_FMCR (SCM_BASE + 0x4)
47#define SCM_GPCR (SCM_BASE + 0x8)
48#define SCM_GCCR (SCM_BASE + 0xC)
49
50#define SCM_GCCR_DMA_CLK_EN_OFFSET 3
51#define SCM_GCCR_CSI_CLK_EN_OFFSET 2
52#define SCM_GCCR_MMA_CLK_EN_OFFSET 1
53#define SCM_GCCR_USBD_CLK_EN_OFFSET 0
54
55#endif /* __ARCH_ARM_MACH_MX2_CRM_REGS_H__ */
diff --git a/arch/arm/mach-mx1/devices.c b/arch/arm/mach-mx1/devices.c
deleted file mode 100644
index b6be29d1cb08..000000000000
--- a/arch/arm/mach-mx1/devices.c
+++ /dev/null
@@ -1,242 +0,0 @@
1/*
2 * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
3 * Copyright 2008 Sascha Hauer, kernel@pengutronix.de
4 * Copyright (c) 2008 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
5 * Copyright (c) 2008 Darius Augulis <darius.augulis@teltonika.lt>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor,
19 * Boston, MA 02110-1301, USA.
20 */
21
22#include <linux/kernel.h>
23#include <linux/init.h>
24#include <linux/platform_device.h>
25#include <linux/gpio.h>
26#include <mach/irqs.h>
27#include <mach/hardware.h>
28
29#include "devices.h"
30
31static struct resource imx_csi_resources[] = {
32 {
33 .start = 0x00224000,
34 .end = 0x00224010,
35 .flags = IORESOURCE_MEM,
36 }, {
37 .start = CSI_INT,
38 .end = CSI_INT,
39 .flags = IORESOURCE_IRQ,
40 },
41};
42
43static u64 imx_csi_dmamask = 0xffffffffUL;
44
45struct platform_device imx_csi_device = {
46 .name = "mx1-camera",
47 .id = 0, /* This is used to put cameras on this interface */
48 .dev = {
49 .dma_mask = &imx_csi_dmamask,
50 .coherent_dma_mask = 0xffffffff,
51 },
52 .resource = imx_csi_resources,
53 .num_resources = ARRAY_SIZE(imx_csi_resources),
54};
55
56static struct resource imx_i2c_resources[] = {
57 {
58 .start = 0x00217000,
59 .end = 0x00217010,
60 .flags = IORESOURCE_MEM,
61 }, {
62 .start = I2C_INT,
63 .end = I2C_INT,
64 .flags = IORESOURCE_IRQ,
65 },
66};
67
68struct platform_device imx_i2c_device = {
69 .name = "imx-i2c",
70 .id = 0,
71 .resource = imx_i2c_resources,
72 .num_resources = ARRAY_SIZE(imx_i2c_resources),
73};
74
75static struct resource imx_uart1_resources[] = {
76 {
77 .start = UART1_BASE_ADDR,
78 .end = UART1_BASE_ADDR + 0xD0,
79 .flags = IORESOURCE_MEM,
80 }, {
81 .start = UART1_MINT_RX,
82 .end = UART1_MINT_RX,
83 .flags = IORESOURCE_IRQ,
84 }, {
85 .start = UART1_MINT_TX,
86 .end = UART1_MINT_TX,
87 .flags = IORESOURCE_IRQ,
88 }, {
89 .start = UART1_MINT_RTS,
90 .end = UART1_MINT_RTS,
91 .flags = IORESOURCE_IRQ,
92 },
93};
94
95struct platform_device imx_uart1_device = {
96 .name = "imx-uart",
97 .id = 0,
98 .num_resources = ARRAY_SIZE(imx_uart1_resources),
99 .resource = imx_uart1_resources,
100};
101
102static struct resource imx_uart2_resources[] = {
103 {
104 .start = UART2_BASE_ADDR,
105 .end = UART2_BASE_ADDR + 0xD0,
106 .flags = IORESOURCE_MEM,
107 }, {
108 .start = UART2_MINT_RX,
109 .end = UART2_MINT_RX,
110 .flags = IORESOURCE_IRQ,
111 }, {
112 .start = UART2_MINT_TX,
113 .end = UART2_MINT_TX,
114 .flags = IORESOURCE_IRQ,
115 }, {
116 .start = UART2_MINT_RTS,
117 .end = UART2_MINT_RTS,
118 .flags = IORESOURCE_IRQ,
119 },
120};
121
122struct platform_device imx_uart2_device = {
123 .name = "imx-uart",
124 .id = 1,
125 .num_resources = ARRAY_SIZE(imx_uart2_resources),
126 .resource = imx_uart2_resources,
127};
128
129static struct resource imx_rtc_resources[] = {
130 {
131 .start = 0x00204000,
132 .end = 0x00204024,
133 .flags = IORESOURCE_MEM,
134 }, {
135 .start = RTC_INT,
136 .end = RTC_INT,
137 .flags = IORESOURCE_IRQ,
138 }, {
139 .start = RTC_SAMINT,
140 .end = RTC_SAMINT,
141 .flags = IORESOURCE_IRQ,
142 },
143};
144
145struct platform_device imx_rtc_device = {
146 .name = "rtc-imx",
147 .id = 0,
148 .resource = imx_rtc_resources,
149 .num_resources = ARRAY_SIZE(imx_rtc_resources),
150};
151
152static struct resource imx_wdt_resources[] = {
153 {
154 .start = 0x00201000,
155 .end = 0x00201008,
156 .flags = IORESOURCE_MEM,
157 }, {
158 .start = WDT_INT,
159 .end = WDT_INT,
160 .flags = IORESOURCE_IRQ,
161 },
162};
163
164struct platform_device imx_wdt_device = {
165 .name = "imx-wdt",
166 .id = 0,
167 .resource = imx_wdt_resources,
168 .num_resources = ARRAY_SIZE(imx_wdt_resources),
169};
170
171static struct resource imx_usb_resources[] = {
172 {
173 .start = 0x00212000,
174 .end = 0x00212148,
175 .flags = IORESOURCE_MEM,
176 }, {
177 .start = USBD_INT0,
178 .end = USBD_INT0,
179 .flags = IORESOURCE_IRQ,
180 }, {
181 .start = USBD_INT1,
182 .end = USBD_INT1,
183 .flags = IORESOURCE_IRQ,
184 }, {
185 .start = USBD_INT2,
186 .end = USBD_INT2,
187 .flags = IORESOURCE_IRQ,
188 }, {
189 .start = USBD_INT3,
190 .end = USBD_INT3,
191 .flags = IORESOURCE_IRQ,
192 }, {
193 .start = USBD_INT4,
194 .end = USBD_INT4,
195 .flags = IORESOURCE_IRQ,
196 }, {
197 .start = USBD_INT5,
198 .end = USBD_INT5,
199 .flags = IORESOURCE_IRQ,
200 }, {
201 .start = USBD_INT6,
202 .end = USBD_INT6,
203 .flags = IORESOURCE_IRQ,
204 },
205};
206
207struct platform_device imx_usb_device = {
208 .name = "imx_udc",
209 .id = 0,
210 .num_resources = ARRAY_SIZE(imx_usb_resources),
211 .resource = imx_usb_resources,
212};
213
214/* GPIO port description */
215static struct mxc_gpio_port imx_gpio_ports[] = {
216 {
217 .chip.label = "gpio-0",
218 .base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR),
219 .irq = GPIO_INT_PORTA,
220 .virtual_irq_start = MXC_GPIO_IRQ_START,
221 }, {
222 .chip.label = "gpio-1",
223 .base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR + 0x100),
224 .irq = GPIO_INT_PORTB,
225 .virtual_irq_start = MXC_GPIO_IRQ_START + 32,
226 }, {
227 .chip.label = "gpio-2",
228 .base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR + 0x200),
229 .irq = GPIO_INT_PORTC,
230 .virtual_irq_start = MXC_GPIO_IRQ_START + 64,
231 }, {
232 .chip.label = "gpio-3",
233 .base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR + 0x300),
234 .irq = GPIO_INT_PORTD,
235 .virtual_irq_start = MXC_GPIO_IRQ_START + 96,
236 }
237};
238
239int __init mxc_register_gpios(void)
240{
241 return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
242}
diff --git a/arch/arm/mach-mx1/devices.h b/arch/arm/mach-mx1/devices.h
deleted file mode 100644
index 0da5d7cce3a2..000000000000
--- a/arch/arm/mach-mx1/devices.h
+++ /dev/null
@@ -1,7 +0,0 @@
1extern struct platform_device imx_csi_device;
2extern struct platform_device imx_i2c_device;
3extern struct platform_device imx_uart1_device;
4extern struct platform_device imx_uart2_device;
5extern struct platform_device imx_rtc_device;
6extern struct platform_device imx_wdt_device;
7extern struct platform_device imx_usb_device;
diff --git a/arch/arm/mach-mx2/serial.c b/arch/arm/mach-mx2/serial.c
deleted file mode 100644
index 1c0c835b2252..000000000000
--- a/arch/arm/mach-mx2/serial.c
+++ /dev/null
@@ -1,141 +0,0 @@
1/*
2 * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
3 * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
17 * MA 02110-1301, USA.
18 */
19
20#include <linux/module.h>
21#include <linux/platform_device.h>
22#include <linux/serial.h>
23#include <mach/hardware.h>
24#include <mach/imx-uart.h>
25#include "devices.h"
26
27static struct resource uart0[] = {
28 {
29 .start = MX2x_UART1_BASE_ADDR,
30 .end = MX2x_UART1_BASE_ADDR + 0x0B5,
31 .flags = IORESOURCE_MEM,
32 }, {
33 .start = MX2x_INT_UART1,
34 .end = MX2x_INT_UART1,
35 .flags = IORESOURCE_IRQ,
36 },
37};
38
39struct platform_device mxc_uart_device0 = {
40 .name = "imx-uart",
41 .id = 0,
42 .resource = uart0,
43 .num_resources = ARRAY_SIZE(uart0),
44};
45
46static struct resource uart1[] = {
47 {
48 .start = MX2x_UART2_BASE_ADDR,
49 .end = MX2x_UART2_BASE_ADDR + 0x0B5,
50 .flags = IORESOURCE_MEM,
51 }, {
52 .start = MX2x_INT_UART2,
53 .end = MX2x_INT_UART2,
54 .flags = IORESOURCE_IRQ,
55 },
56};
57
58struct platform_device mxc_uart_device1 = {
59 .name = "imx-uart",
60 .id = 1,
61 .resource = uart1,
62 .num_resources = ARRAY_SIZE(uart1),
63};
64
65static struct resource uart2[] = {
66 {
67 .start = MX2x_UART3_BASE_ADDR,
68 .end = MX2x_UART3_BASE_ADDR + 0x0B5,
69 .flags = IORESOURCE_MEM,
70 }, {
71 .start = MX2x_INT_UART3,
72 .end = MX2x_INT_UART3,
73 .flags = IORESOURCE_IRQ,
74 },
75};
76
77struct platform_device mxc_uart_device2 = {
78 .name = "imx-uart",
79 .id = 2,
80 .resource = uart2,
81 .num_resources = ARRAY_SIZE(uart2),
82};
83
84static struct resource uart3[] = {
85 {
86 .start = MX2x_UART4_BASE_ADDR,
87 .end = MX2x_UART4_BASE_ADDR + 0x0B5,
88 .flags = IORESOURCE_MEM,
89 }, {
90 .start = MX2x_INT_UART4,
91 .end = MX2x_INT_UART4,
92 .flags = IORESOURCE_IRQ,
93 },
94};
95
96struct platform_device mxc_uart_device3 = {
97 .name = "imx-uart",
98 .id = 3,
99 .resource = uart3,
100 .num_resources = ARRAY_SIZE(uart3),
101};
102
103#ifdef CONFIG_MACH_MX27
104static struct resource uart4[] = {
105 {
106 .start = MX27_UART5_BASE_ADDR,
107 .end = MX27_UART5_BASE_ADDR + 0x0B5,
108 .flags = IORESOURCE_MEM,
109 }, {
110 .start = MX27_INT_UART5,
111 .end = MX27_INT_UART5,
112 .flags = IORESOURCE_IRQ,
113 },
114};
115
116struct platform_device mxc_uart_device4 = {
117 .name = "imx-uart",
118 .id = 4,
119 .resource = uart4,
120 .num_resources = ARRAY_SIZE(uart4),
121};
122
123static struct resource uart5[] = {
124 {
125 .start = MX27_UART6_BASE_ADDR,
126 .end = MX27_UART6_BASE_ADDR + 0x0B5,
127 .flags = IORESOURCE_MEM,
128 }, {
129 .start = MX27_INT_UART6,
130 .end = MX27_INT_UART6,
131 .flags = IORESOURCE_IRQ,
132 },
133};
134
135struct platform_device mxc_uart_device5 = {
136 .name = "imx-uart",
137 .id = 5,
138 .resource = uart5,
139 .num_resources = ARRAY_SIZE(uart5),
140};
141#endif
diff --git a/arch/arm/mach-mx25/Kconfig b/arch/arm/mach-mx25/Kconfig
index 3a6668eebf9a..67e0b54218ae 100644
--- a/arch/arm/mach-mx25/Kconfig
+++ b/arch/arm/mach-mx25/Kconfig
@@ -4,9 +4,14 @@ comment "MX25 platforms:"
4 4
5config MACH_MX25_3DS 5config MACH_MX25_3DS
6 bool "Support MX25PDK (3DS) Platform" 6 bool "Support MX25PDK (3DS) Platform"
7 select IMX_HAVE_PLATFORM_IMX_UART
8 select IMX_HAVE_PLATFORM_MXC_NAND
7 9
8config MACH_EUKREA_CPUIMX25 10config MACH_EUKREA_CPUIMX25
9 bool "Support Eukrea CPUIMX25 Platform" 11 bool "Support Eukrea CPUIMX25 Platform"
12 select IMX_HAVE_PLATFORM_IMX_I2C
13 select IMX_HAVE_PLATFORM_IMX_UART
14 select IMX_HAVE_PLATFORM_MXC_NAND
10 select MXC_ULPI if USB_ULPI 15 select MXC_ULPI if USB_ULPI
11 16
12choice 17choice
diff --git a/arch/arm/mach-mx25/Makefile b/arch/arm/mach-mx25/Makefile
index 83ab5d805104..87ffb9c2f90a 100644
--- a/arch/arm/mach-mx25/Makefile
+++ b/arch/arm/mach-mx25/Makefile
@@ -1,5 +1,5 @@
1obj-y := mm.o devices.o 1obj-y := mm.o devices.o
2obj-$(CONFIG_ARCH_MX25) += clock.o 2obj-$(CONFIG_ARCH_MX25) += clock.o
3obj-$(CONFIG_MACH_MX25_3DS) += mach-mx25pdk.o 3obj-$(CONFIG_MACH_MX25_3DS) += mach-mx25_3ds.o
4obj-$(CONFIG_MACH_EUKREA_CPUIMX25) += mach-cpuimx25.o 4obj-$(CONFIG_MACH_EUKREA_CPUIMX25) += mach-cpuimx25.o
5obj-$(CONFIG_MACH_EUKREA_MBIMXSD_BASEBOARD) += eukrea_mbimxsd-baseboard.o 5obj-$(CONFIG_MACH_EUKREA_MBIMXSD_BASEBOARD) += eukrea_mbimxsd-baseboard.o
diff --git a/arch/arm/mach-mx25/devices-imx25.h b/arch/arm/mach-mx25/devices-imx25.h
new file mode 100644
index 000000000000..2025cb947fcf
--- /dev/null
+++ b/arch/arm/mach-mx25/devices-imx25.h
@@ -0,0 +1,38 @@
1/*
2 * Copyright (C) 2010 Pengutronix
3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it under
6 * the terms of the GNU General Public License version 2 as published by the
7 * Free Software Foundation.
8 */
9#include <mach/mx25.h>
10#include <mach/devices-common.h>
11
12#define imx25_add_imx_i2c0(pdata) \
13 imx_add_imx_i2c(0, MX25_I2C1_BASE_ADDR, SZ_16K, MX25_INT_I2C1, pdata)
14#define imx25_add_imx_i2c1(pdata) \
15 imx_add_imx_i2c(1, MX25_I2C2_BASE_ADDR, SZ_16K, MX25_INT_I2C2, pdata)
16#define imx25_add_imx_i2c2(pdata) \
17 imx_add_imx_i2c(2, MX25_I2C3_BASE_ADDR, SZ_16K, MX25_INT_I2C3, pdata)
18
19#define imx25_add_imx_uart0(pdata) \
20 imx_add_imx_uart_1irq(0, MX25_UART1_BASE_ADDR, SZ_16K, MX25_INT_UART1, pdata)
21#define imx25_add_imx_uart1(pdata) \
22 imx_add_imx_uart_1irq(1, MX25_UART2_BASE_ADDR, SZ_16K, MX25_INT_UART2, pdata)
23#define imx25_add_imx_uart2(pdata) \
24 imx_add_imx_uart_1irq(2, MX25_UART3_BASE_ADDR, SZ_16K, MX25_INT_UART3, pdata)
25#define imx25_add_imx_uart3(pdata) \
26 imx_add_imx_uart_1irq(3, MX25_UART4_BASE_ADDR, SZ_16K, MX25_INT_UART4, pdata)
27#define imx25_add_imx_uart4(pdata) \
28 imx_add_imx_uart_1irq(4, MX25_UART5_BASE_ADDR, SZ_16K, MX25_INT_UART5, pdata)
29
30#define imx25_add_mxc_nand(pdata) \
31 imx_add_mxc_nand_v21(MX25_NFC_BASE_ADDR, MX25_INT_NANDFC, pdata)
32
33#define imx25_add_spi_imx0(pdata) \
34 imx_add_spi_imx(0, MX25_CSPI1_BASE_ADDR, SZ_16K, MX25_INT_CSPI1, pdata)
35#define imx25_add_spi_imx1(pdata) \
36 imx_add_spi_imx(1, MX25_CSPI2_BASE_ADDR, SZ_16K, MX25_INT_CSPI2, pdata)
37#define imx25_add_spi_imx2(pdata) \
38 imx_add_spi_imx(2, MX25_CSPI3_BASE_ADDR, SZ_16K, MX25_INT_CSPI3, pdata)
diff --git a/arch/arm/mach-mx25/devices.c b/arch/arm/mach-mx25/devices.c
index 82d3e53f01f2..3468eb15b236 100644
--- a/arch/arm/mach-mx25/devices.c
+++ b/arch/arm/mach-mx25/devices.c
@@ -22,101 +22,6 @@
22#include <mach/mx25.h> 22#include <mach/mx25.h>
23#include <mach/irqs.h> 23#include <mach/irqs.h>
24 24
25static struct resource uart0[] = {
26 {
27 .start = 0x43f90000,
28 .end = 0x43f93fff,
29 .flags = IORESOURCE_MEM,
30 }, {
31 .start = 45,
32 .end = 45,
33 .flags = IORESOURCE_IRQ,
34 },
35};
36
37struct platform_device mxc_uart_device0 = {
38 .name = "imx-uart",
39 .id = 0,
40 .resource = uart0,
41 .num_resources = ARRAY_SIZE(uart0),
42};
43
44static struct resource uart1[] = {
45 {
46 .start = 0x43f94000,
47 .end = 0x43f97fff,
48 .flags = IORESOURCE_MEM,
49 }, {
50 .start = 32,
51 .end = 32,
52 .flags = IORESOURCE_IRQ,
53 },
54};
55
56struct platform_device mxc_uart_device1 = {
57 .name = "imx-uart",
58 .id = 1,
59 .resource = uart1,
60 .num_resources = ARRAY_SIZE(uart1),
61};
62
63static struct resource uart2[] = {
64 {
65 .start = 0x5000c000,
66 .end = 0x5000ffff,
67 .flags = IORESOURCE_MEM,
68 }, {
69 .start = 18,
70 .end = 18,
71 .flags = IORESOURCE_IRQ,
72 },
73};
74
75struct platform_device mxc_uart_device2 = {
76 .name = "imx-uart",
77 .id = 2,
78 .resource = uart2,
79 .num_resources = ARRAY_SIZE(uart2),
80};
81
82static struct resource uart3[] = {
83 {
84 .start = 0x50008000,
85 .end = 0x5000bfff,
86 .flags = IORESOURCE_MEM,
87 }, {
88 .start = 5,
89 .end = 5,
90 .flags = IORESOURCE_IRQ,
91 },
92};
93
94struct platform_device mxc_uart_device3 = {
95 .name = "imx-uart",
96 .id = 3,
97 .resource = uart3,
98 .num_resources = ARRAY_SIZE(uart3),
99};
100
101static struct resource uart4[] = {
102 {
103 .start = 0x5002c000,
104 .end = 0x5002ffff,
105 .flags = IORESOURCE_MEM,
106 }, {
107 .start = 40,
108 .end = 40,
109 .flags = IORESOURCE_IRQ,
110 },
111};
112
113struct platform_device mxc_uart_device4 = {
114 .name = "imx-uart",
115 .id = 4,
116 .resource = uart4,
117 .num_resources = ARRAY_SIZE(uart4),
118};
119
120static u64 otg_dmamask = DMA_BIT_MASK(32); 25static u64 otg_dmamask = DMA_BIT_MASK(32);
121 26
122static struct resource mxc_otg_resources[] = { 27static struct resource mxc_otg_resources[] = {
@@ -179,63 +84,6 @@ struct platform_device mxc_usbh2 = {
179 .num_resources = ARRAY_SIZE(mxc_usbh2_resources), 84 .num_resources = ARRAY_SIZE(mxc_usbh2_resources),
180}; 85};
181 86
182static struct resource mxc_spi_resources0[] = {
183 {
184 .start = 0x43fa4000,
185 .end = 0x43fa7fff,
186 .flags = IORESOURCE_MEM,
187 }, {
188 .start = 14,
189 .end = 14,
190 .flags = IORESOURCE_IRQ,
191 },
192};
193
194struct platform_device mxc_spi_device0 = {
195 .name = "spi_imx",
196 .id = 0,
197 .num_resources = ARRAY_SIZE(mxc_spi_resources0),
198 .resource = mxc_spi_resources0,
199};
200
201static struct resource mxc_spi_resources1[] = {
202 {
203 .start = 0x50010000,
204 .end = 0x50013fff,
205 .flags = IORESOURCE_MEM,
206 }, {
207 .start = 13,
208 .end = 13,
209 .flags = IORESOURCE_IRQ,
210 },
211};
212
213struct platform_device mxc_spi_device1 = {
214 .name = "spi_imx",
215 .id = 1,
216 .num_resources = ARRAY_SIZE(mxc_spi_resources1),
217 .resource = mxc_spi_resources1,
218};
219
220static struct resource mxc_spi_resources2[] = {
221 {
222 .start = 0x50004000,
223 .end = 0x50007fff,
224 .flags = IORESOURCE_MEM,
225 }, {
226 .start = 0,
227 .end = 0,
228 .flags = IORESOURCE_IRQ,
229 },
230};
231
232struct platform_device mxc_spi_device2 = {
233 .name = "spi_imx",
234 .id = 2,
235 .num_resources = ARRAY_SIZE(mxc_spi_resources2),
236 .resource = mxc_spi_resources2,
237};
238
239static struct resource mxc_pwm_resources0[] = { 87static struct resource mxc_pwm_resources0[] = {
240 { 88 {
241 .start = 0x53fe0000, 89 .start = 0x53fe0000,
@@ -331,63 +179,6 @@ struct platform_device mxc_pwm_device3 = {
331 .resource = mxc_pwm_resources3, 179 .resource = mxc_pwm_resources3,
332}; 180};
333 181
334static struct resource mxc_i2c_1_resources[] = {
335 {
336 .start = 0x43f80000,
337 .end = 0x43f83fff,
338 .flags = IORESOURCE_MEM,
339 }, {
340 .start = 3,
341 .end = 3,
342 .flags = IORESOURCE_IRQ,
343 }
344};
345
346struct platform_device mxc_i2c_device0 = {
347 .name = "imx-i2c",
348 .id = 0,
349 .num_resources = ARRAY_SIZE(mxc_i2c_1_resources),
350 .resource = mxc_i2c_1_resources,
351};
352
353static struct resource mxc_i2c_2_resources[] = {
354 {
355 .start = 0x43f98000,
356 .end = 0x43f9bfff,
357 .flags = IORESOURCE_MEM,
358 }, {
359 .start = 4,
360 .end = 4,
361 .flags = IORESOURCE_IRQ,
362 }
363};
364
365struct platform_device mxc_i2c_device1 = {
366 .name = "imx-i2c",
367 .id = 1,
368 .num_resources = ARRAY_SIZE(mxc_i2c_2_resources),
369 .resource = mxc_i2c_2_resources,
370};
371
372static struct resource mxc_i2c_3_resources[] = {
373 {
374 .start = 0x43f84000,
375 .end = 0x43f87fff,
376 .flags = IORESOURCE_MEM,
377 }, {
378 .start = 10,
379 .end = 10,
380 .flags = IORESOURCE_IRQ,
381 }
382};
383
384struct platform_device mxc_i2c_device2 = {
385 .name = "imx-i2c",
386 .id = 2,
387 .num_resources = ARRAY_SIZE(mxc_i2c_3_resources),
388 .resource = mxc_i2c_3_resources,
389};
390
391static struct mxc_gpio_port imx_gpio_ports[] = { 182static struct mxc_gpio_port imx_gpio_ports[] = {
392 { 183 {
393 .chip.label = "gpio-0", 184 .chip.label = "gpio-0",
@@ -412,7 +203,7 @@ static struct mxc_gpio_port imx_gpio_ports[] = {
412 } 203 }
413}; 204};
414 205
415int __init mxc_register_gpios(void) 206int __init imx25_register_gpios(void)
416{ 207{
417 return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports)); 208 return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
418} 209}
@@ -437,26 +228,6 @@ struct platform_device mx25_fec_device = {
437 .resource = mx25_fec_resources, 228 .resource = mx25_fec_resources,
438}; 229};
439 230
440static struct resource mxc_nand_resources[] = {
441 {
442 .start = MX25_NFC_BASE_ADDR,
443 .end = MX25_NFC_BASE_ADDR + 0x1fff,
444 .flags = IORESOURCE_MEM,
445 },
446 {
447 .start = MX25_INT_NANDFC,
448 .end = MX25_INT_NANDFC,
449 .flags = IORESOURCE_IRQ,
450 },
451};
452
453struct platform_device mxc_nand_device = {
454 .name = "mxc_nand",
455 .id = 0,
456 .num_resources = ARRAY_SIZE(mxc_nand_resources),
457 .resource = mxc_nand_resources,
458};
459
460static struct resource mx25_rtc_resources[] = { 231static struct resource mx25_rtc_resources[] = {
461 { 232 {
462 .start = MX25_DRYICE_BASE_ADDR, 233 .start = MX25_DRYICE_BASE_ADDR,
diff --git a/arch/arm/mach-mx25/devices.h b/arch/arm/mach-mx25/devices.h
index 00e29f57a596..4aceb68e35a7 100644
--- a/arch/arm/mach-mx25/devices.h
+++ b/arch/arm/mach-mx25/devices.h
@@ -1,24 +1,12 @@
1extern struct platform_device mxc_uart_device0;
2extern struct platform_device mxc_uart_device1;
3extern struct platform_device mxc_uart_device2;
4extern struct platform_device mxc_uart_device3;
5extern struct platform_device mxc_uart_device4;
6extern struct platform_device mxc_otg; 1extern struct platform_device mxc_otg;
7extern struct platform_device otg_udc_device; 2extern struct platform_device otg_udc_device;
8extern struct platform_device mxc_usbh2; 3extern struct platform_device mxc_usbh2;
9extern struct platform_device mxc_spi_device0;
10extern struct platform_device mxc_spi_device1;
11extern struct platform_device mxc_spi_device2;
12extern struct platform_device mxc_pwm_device0; 4extern struct platform_device mxc_pwm_device0;
13extern struct platform_device mxc_pwm_device1; 5extern struct platform_device mxc_pwm_device1;
14extern struct platform_device mxc_pwm_device2; 6extern struct platform_device mxc_pwm_device2;
15extern struct platform_device mxc_pwm_device3; 7extern struct platform_device mxc_pwm_device3;
16extern struct platform_device mxc_keypad_device; 8extern struct platform_device mxc_keypad_device;
17extern struct platform_device mxc_i2c_device0;
18extern struct platform_device mxc_i2c_device1;
19extern struct platform_device mxc_i2c_device2;
20extern struct platform_device mx25_fec_device; 9extern struct platform_device mx25_fec_device;
21extern struct platform_device mxc_nand_device;
22extern struct platform_device mx25_rtc_device; 10extern struct platform_device mx25_rtc_device;
23extern struct platform_device mx25_fb_device; 11extern struct platform_device mx25_fb_device;
24extern struct platform_device mxc_wdt; 12extern struct platform_device mxc_wdt;
diff --git a/arch/arm/mach-mx25/eukrea_mbimxsd-baseboard.c b/arch/arm/mach-mx25/eukrea_mbimxsd-baseboard.c
index e0f0dfda4d01..f07b1f95ac76 100644
--- a/arch/arm/mach-mx25/eukrea_mbimxsd-baseboard.c
+++ b/arch/arm/mach-mx25/eukrea_mbimxsd-baseboard.c
@@ -38,6 +38,7 @@
38#include <mach/ssi.h> 38#include <mach/ssi.h>
39#include <mach/audmux.h> 39#include <mach/audmux.h>
40 40
41#include "devices-imx25.h"
41#include "devices.h" 42#include "devices.h"
42 43
43static struct pad_desc eukrea_mbimxsd_pads[] = { 44static struct pad_desc eukrea_mbimxsd_pads[] = {
@@ -195,7 +196,7 @@ static struct platform_device *platform_devices[] __initdata = {
195 &eukrea_mbimxsd_lcd_powerdev, 196 &eukrea_mbimxsd_lcd_powerdev,
196}; 197};
197 198
198static struct imxuart_platform_data uart_pdata = { 199static const struct imxuart_platform_data uart_pdata __initconst = {
199 .flags = IMXUART_HAVE_RTSCTS, 200 .flags = IMXUART_HAVE_RTSCTS,
200}; 201};
201 202
@@ -237,7 +238,7 @@ void __init eukrea_mbimxsd_baseboard_init(void)
237 ); 238 );
238#endif 239#endif
239 240
240 mxc_register_device(&mxc_uart_device1, &uart_pdata); 241 imx25_add_imx_uart1(&uart_pdata);
241 mxc_register_device(&mx25_fb_device, &eukrea_mximxsd_fb_pdata); 242 mxc_register_device(&mx25_fb_device, &eukrea_mximxsd_fb_pdata);
242 mxc_register_device(&imx_ssi_device0, &eukrea_mbimxsd_ssi_pdata); 243 mxc_register_device(&imx_ssi_device0, &eukrea_mbimxsd_ssi_pdata);
243 244
diff --git a/arch/arm/mach-mx25/mach-cpuimx25.c b/arch/arm/mach-mx25/mach-cpuimx25.c
index 4796484830a0..d39f9ccd4be0 100644
--- a/arch/arm/mach-mx25/mach-cpuimx25.c
+++ b/arch/arm/mach-mx25/mach-cpuimx25.c
@@ -37,18 +37,17 @@
37#include <asm/memory.h> 37#include <asm/memory.h>
38#include <asm/mach/map.h> 38#include <asm/mach/map.h>
39#include <mach/common.h> 39#include <mach/common.h>
40#include <mach/imx-uart.h>
41#include <mach/i2c.h>
42#include <mach/mx25.h> 40#include <mach/mx25.h>
43#include <mach/mxc_nand.h> 41#include <mach/mxc_nand.h>
44#include <mach/imxfb.h> 42#include <mach/imxfb.h>
45#include <mach/mxc_ehci.h> 43#include <mach/mxc_ehci.h>
46#include <mach/ulpi.h> 44#include <mach/ulpi.h>
45#include <mach/iomux-mx25.h>
47 46
47#include "devices-imx25.h"
48#include "devices.h" 48#include "devices.h"
49#include <mach/iomux-mx25.h>
50 49
51static struct imxuart_platform_data uart_pdata = { 50static const struct imxuart_platform_data uart_pdata __initconst = {
52 .flags = IMXUART_HAVE_RTSCTS, 51 .flags = IMXUART_HAVE_RTSCTS,
53}; 52};
54 53
@@ -72,13 +71,15 @@ static struct fec_platform_data mx25_fec_pdata = {
72 .phy = PHY_INTERFACE_MODE_RMII, 71 .phy = PHY_INTERFACE_MODE_RMII,
73}; 72};
74 73
75static struct mxc_nand_platform_data eukrea_cpuimx25_nand_board_info = { 74static const struct mxc_nand_platform_data
75eukrea_cpuimx25_nand_board_info __initconst = {
76 .width = 1, 76 .width = 1,
77 .hw_ecc = 1, 77 .hw_ecc = 1,
78 .flash_bbt = 1, 78 .flash_bbt = 1,
79}; 79};
80 80
81static struct imxi2c_platform_data eukrea_cpuimx25_i2c_1_data = { 81static const struct imxi2c_platform_data
82eukrea_cpuimx25_i2c0_data __initconst = {
82 .bitrate = 100000, 83 .bitrate = 100000,
83}; 84};
84 85
@@ -125,14 +126,14 @@ static void __init eukrea_cpuimx25_init(void)
125 ARRAY_SIZE(eukrea_cpuimx25_pads))) 126 ARRAY_SIZE(eukrea_cpuimx25_pads)))
126 printk(KERN_ERR "error setting cpuimx25 pads !\n"); 127 printk(KERN_ERR "error setting cpuimx25 pads !\n");
127 128
128 mxc_register_device(&mxc_uart_device0, &uart_pdata); 129 imx25_add_imx_uart0(&uart_pdata);
129 mxc_register_device(&mxc_nand_device, &eukrea_cpuimx25_nand_board_info); 130 imx25_add_mxc_nand(&eukrea_cpuimx25_nand_board_info);
130 mxc_register_device(&mx25_rtc_device, NULL); 131 mxc_register_device(&mx25_rtc_device, NULL);
131 mxc_register_device(&mx25_fec_device, &mx25_fec_pdata); 132 mxc_register_device(&mx25_fec_device, &mx25_fec_pdata);
132 133
133 i2c_register_board_info(0, eukrea_cpuimx25_i2c_devices, 134 i2c_register_board_info(0, eukrea_cpuimx25_i2c_devices,
134 ARRAY_SIZE(eukrea_cpuimx25_i2c_devices)); 135 ARRAY_SIZE(eukrea_cpuimx25_i2c_devices));
135 mxc_register_device(&mxc_i2c_device0, &eukrea_cpuimx25_i2c_1_data); 136 imx25_add_imx_i2c0(&eukrea_cpuimx25_i2c0_data);
136 137
137#if defined(CONFIG_USB_ULPI) 138#if defined(CONFIG_USB_ULPI)
138 if (otg_mode_host) { 139 if (otg_mode_host) {
diff --git a/arch/arm/mach-mx25/mach-mx25pdk.c b/arch/arm/mach-mx25/mach-mx25_3ds.c
index ba3fbef1c41f..62bc21f11a71 100644
--- a/arch/arm/mach-mx25/mach-mx25pdk.c
+++ b/arch/arm/mach-mx25/mach-mx25_3ds.c
@@ -16,6 +16,12 @@
16 * Boston, MA 02110-1301, USA. 16 * Boston, MA 02110-1301, USA.
17 */ 17 */
18 18
19/*
20 * This machine is known as:
21 * - i.MX25 3-Stack Development System
22 * - i.MX25 Platform Development Kit (i.MX25 PDK)
23 */
24
19#include <linux/types.h> 25#include <linux/types.h>
20#include <linux/init.h> 26#include <linux/init.h>
21#include <linux/delay.h> 27#include <linux/delay.h>
@@ -33,14 +39,14 @@
33#include <asm/memory.h> 39#include <asm/memory.h>
34#include <asm/mach/map.h> 40#include <asm/mach/map.h>
35#include <mach/common.h> 41#include <mach/common.h>
36#include <mach/imx-uart.h>
37#include <mach/mx25.h> 42#include <mach/mx25.h>
38#include <mach/mxc_nand.h>
39#include <mach/imxfb.h> 43#include <mach/imxfb.h>
40#include "devices.h"
41#include <mach/iomux-mx25.h> 44#include <mach/iomux-mx25.h>
42 45
43static struct imxuart_platform_data uart_pdata = { 46#include "devices-imx25.h"
47#include "devices.h"
48
49static const struct imxuart_platform_data uart_pdata __initconst = {
44 .flags = IMXUART_HAVE_RTSCTS, 50 .flags = IMXUART_HAVE_RTSCTS,
45}; 51};
46 52
@@ -114,7 +120,8 @@ static void __init mx25pdk_fec_reset(void)
114 gpio_set_value(FEC_RESET_B_GPIO, 1); 120 gpio_set_value(FEC_RESET_B_GPIO, 1);
115} 121}
116 122
117static struct mxc_nand_platform_data mx25pdk_nand_board_info = { 123static const struct mxc_nand_platform_data
124mx25pdk_nand_board_info __initconst = {
118 .width = 1, 125 .width = 1,
119 .hw_ecc = 1, 126 .hw_ecc = 1,
120 .flash_bbt = 1, 127 .flash_bbt = 1,
@@ -177,9 +184,9 @@ static void __init mx25pdk_init(void)
177 mxc_iomux_v3_setup_multiple_pads(mx25pdk_pads, 184 mxc_iomux_v3_setup_multiple_pads(mx25pdk_pads,
178 ARRAY_SIZE(mx25pdk_pads)); 185 ARRAY_SIZE(mx25pdk_pads));
179 186
180 mxc_register_device(&mxc_uart_device0, &uart_pdata); 187 imx25_add_imx_uart0(&uart_pdata);
181 mxc_register_device(&mxc_usbh2, NULL); 188 mxc_register_device(&mxc_usbh2, NULL);
182 mxc_register_device(&mxc_nand_device, &mx25pdk_nand_board_info); 189 imx25_add_mxc_nand(&mx25pdk_nand_board_info);
183 mxc_register_device(&mx25_rtc_device, NULL); 190 mxc_register_device(&mx25_rtc_device, NULL);
184 mxc_register_device(&mx25_fb_device, &mx25pdk_fb_pdata); 191 mxc_register_device(&mx25_fb_device, &mx25pdk_fb_pdata);
185 mxc_register_device(&mxc_wdt, NULL); 192 mxc_register_device(&mxc_wdt, NULL);
diff --git a/arch/arm/mach-mx25/mm.c b/arch/arm/mach-mx25/mm.c
index a7e587ff3e9e..593e14545f5a 100644
--- a/arch/arm/mach-mx25/mm.c
+++ b/arch/arm/mach-mx25/mm.c
@@ -14,10 +14,6 @@
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details. 16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */ 17 */
22 18
23#include <linux/mm.h> 19#include <linux/mm.h>
@@ -69,8 +65,11 @@ void __init mx25_map_io(void)
69 iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); 65 iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
70} 66}
71 67
68int imx25_register_gpios(void);
69
72void __init mx25_init_irq(void) 70void __init mx25_init_irq(void)
73{ 71{
72 imx25_register_gpios();
74 mxc_init_irq((void __iomem *)MX25_AVIC_BASE_ADDR_VIRT); 73 mxc_init_irq((void __iomem *)MX25_AVIC_BASE_ADDR_VIRT);
75} 74}
76 75
diff --git a/arch/arm/mach-mx3/Kconfig b/arch/arm/mach-mx3/Kconfig
index b09e9a94adf1..a11112afde5e 100644
--- a/arch/arm/mach-mx3/Kconfig
+++ b/arch/arm/mach-mx3/Kconfig
@@ -15,6 +15,8 @@ comment "MX3 platforms:"
15config MACH_MX31ADS 15config MACH_MX31ADS
16 bool "Support MX31ADS platforms" 16 bool "Support MX31ADS platforms"
17 select ARCH_MX31 17 select ARCH_MX31
18 select IMX_HAVE_PLATFORM_IMX_I2C
19 select IMX_HAVE_PLATFORM_IMX_UART
18 default y 20 default y
19 help 21 help
20 Include support for MX31ADS platform. This includes specific 22 Include support for MX31ADS platform. This includes specific
@@ -34,6 +36,9 @@ config MACH_MX31ADS_WM1133_EV1
34config MACH_PCM037 36config MACH_PCM037
35 bool "Support Phytec pcm037 (i.MX31) platforms" 37 bool "Support Phytec pcm037 (i.MX31) platforms"
36 select ARCH_MX31 38 select ARCH_MX31
39 select IMX_HAVE_PLATFORM_IMX_I2C
40 select IMX_HAVE_PLATFORM_IMX_UART
41 select IMX_HAVE_PLATFORM_MXC_NAND
37 select MXC_ULPI if USB_ULPI 42 select MXC_ULPI if USB_ULPI
38 help 43 help
39 Include support for Phytec pcm037 platform. This includes 44 Include support for Phytec pcm037 platform. This includes
@@ -42,6 +47,7 @@ config MACH_PCM037
42config MACH_PCM037_EET 47config MACH_PCM037_EET
43 bool "Support pcm037 EET board extensions" 48 bool "Support pcm037 EET board extensions"
44 depends on MACH_PCM037 49 depends on MACH_PCM037
50 select IMX_HAVE_PLATFORM_SPI_IMX
45 help 51 help
46 Add support for PCM037 EET baseboard extensions. If you are using the 52 Add support for PCM037 EET baseboard extensions. If you are using the
47 OLED display with EET, use "video=mx3fb:CMEL-OLED" kernel 53 OLED display with EET, use "video=mx3fb:CMEL-OLED" kernel
@@ -51,6 +57,9 @@ config MACH_MX31LITE
51 bool "Support MX31 LITEKIT (LogicPD)" 57 bool "Support MX31 LITEKIT (LogicPD)"
52 select ARCH_MX31 58 select ARCH_MX31
53 select MXC_ULPI if USB_ULPI 59 select MXC_ULPI if USB_ULPI
60 select IMX_HAVE_PLATFORM_IMX_UART
61 select IMX_HAVE_PLATFORM_MXC_NAND
62 select IMX_HAVE_PLATFORM_SPI_IMX
54 help 63 help
55 Include support for MX31 LITEKIT platform. This includes specific 64 Include support for MX31 LITEKIT platform. This includes specific
56 configurations for the board and its peripherals. 65 configurations for the board and its peripherals.
@@ -58,6 +67,9 @@ config MACH_MX31LITE
58config MACH_MX31_3DS 67config MACH_MX31_3DS
59 bool "Support MX31PDK (3DS)" 68 bool "Support MX31PDK (3DS)"
60 select ARCH_MX31 69 select ARCH_MX31
70 select IMX_HAVE_PLATFORM_IMX_UART
71 select IMX_HAVE_PLATFORM_MXC_NAND
72 select IMX_HAVE_PLATFORM_SPI_IMX
61 help 73 help
62 Include support for MX31PDK (3DS) platform. This includes specific 74 Include support for MX31PDK (3DS) platform. This includes specific
63 configurations for the board and its peripherals. 75 configurations for the board and its peripherals.
@@ -74,6 +86,9 @@ config MACH_MX31_3DS_MXC_NAND_USE_BBT
74config MACH_MX31MOBOARD 86config MACH_MX31MOBOARD
75 bool "Support mx31moboard platforms (EPFL Mobots group)" 87 bool "Support mx31moboard platforms (EPFL Mobots group)"
76 select ARCH_MX31 88 select ARCH_MX31
89 select IMX_HAVE_PLATFORM_IMX_I2C
90 select IMX_HAVE_PLATFORM_IMX_UART
91 select IMX_HAVE_PLATFORM_SPI_IMX
77 select MXC_ULPI if USB_ULPI 92 select MXC_ULPI if USB_ULPI
78 help 93 help
79 Include support for mx31moboard platform. This includes specific 94 Include support for mx31moboard platform. This includes specific
@@ -82,6 +97,8 @@ config MACH_MX31MOBOARD
82config MACH_MX31LILLY 97config MACH_MX31LILLY
83 bool "Support MX31 LILLY-1131 platforms (INCO startec)" 98 bool "Support MX31 LILLY-1131 platforms (INCO startec)"
84 select ARCH_MX31 99 select ARCH_MX31
100 select IMX_HAVE_PLATFORM_IMX_UART
101 select IMX_HAVE_PLATFORM_SPI_IMX
85 select MXC_ULPI if USB_ULPI 102 select MXC_ULPI if USB_ULPI
86 help 103 help
87 Include support for mx31 based LILLY1131 modules. This includes 104 Include support for mx31 based LILLY1131 modules. This includes
@@ -90,6 +107,7 @@ config MACH_MX31LILLY
90config MACH_QONG 107config MACH_QONG
91 bool "Support Dave/DENX QongEVB-LITE platform" 108 bool "Support Dave/DENX QongEVB-LITE platform"
92 select ARCH_MX31 109 select ARCH_MX31
110 select IMX_HAVE_PLATFORM_IMX_UART
93 help 111 help
94 Include support for Dave/DENX QongEVB-LITE platform. This includes 112 Include support for Dave/DENX QongEVB-LITE platform. This includes
95 specific configurations for the board and its peripherals. 113 specific configurations for the board and its peripherals.
@@ -97,6 +115,9 @@ config MACH_QONG
97config MACH_PCM043 115config MACH_PCM043
98 bool "Support Phytec pcm043 (i.MX35) platforms" 116 bool "Support Phytec pcm043 (i.MX35) platforms"
99 select ARCH_MX35 117 select ARCH_MX35
118 select IMX_HAVE_PLATFORM_IMX_I2C
119 select IMX_HAVE_PLATFORM_IMX_UART
120 select IMX_HAVE_PLATFORM_MXC_NAND
100 select MXC_ULPI if USB_ULPI 121 select MXC_ULPI if USB_ULPI
101 help 122 help
102 Include support for Phytec pcm043 platform. This includes 123 Include support for Phytec pcm043 platform. This includes
@@ -105,6 +126,9 @@ config MACH_PCM043
105config MACH_ARMADILLO5X0 126config MACH_ARMADILLO5X0
106 bool "Support Atmark Armadillo-500 Development Base Board" 127 bool "Support Atmark Armadillo-500 Development Base Board"
107 select ARCH_MX31 128 select ARCH_MX31
129 select IMX_HAVE_PLATFORM_IMX_I2C
130 select IMX_HAVE_PLATFORM_IMX_UART
131 select IMX_HAVE_PLATFORM_MXC_NAND
108 select MXC_ULPI if USB_ULPI 132 select MXC_ULPI if USB_ULPI
109 help 133 help
110 Include support for Atmark Armadillo-500 platform. This includes 134 Include support for Atmark Armadillo-500 platform. This includes
@@ -113,6 +137,7 @@ config MACH_ARMADILLO5X0
113config MACH_MX35_3DS 137config MACH_MX35_3DS
114 bool "Support MX35PDK platform" 138 bool "Support MX35PDK platform"
115 select ARCH_MX35 139 select ARCH_MX35
140 select IMX_HAVE_PLATFORM_IMX_UART
116 default n 141 default n
117 help 142 help
118 Include support for MX35PDK platform. This includes specific 143 Include support for MX35PDK platform. This includes specific
@@ -121,6 +146,7 @@ config MACH_MX35_3DS
121config MACH_KZM_ARM11_01 146config MACH_KZM_ARM11_01
122 bool "Support KZM-ARM11-01(Kyoto Microcomputer)" 147 bool "Support KZM-ARM11-01(Kyoto Microcomputer)"
123 select ARCH_MX31 148 select ARCH_MX31
149 select IMX_HAVE_PLATFORM_IMX_UART
124 help 150 help
125 Include support for KZM-ARM11-01. This includes specific 151 Include support for KZM-ARM11-01. This includes specific
126 configurations for the board and its peripherals. 152 configurations for the board and its peripherals.
@@ -128,6 +154,9 @@ config MACH_KZM_ARM11_01
128config MACH_EUKREA_CPUIMX35 154config MACH_EUKREA_CPUIMX35
129 bool "Support Eukrea CPUIMX35 Platform" 155 bool "Support Eukrea CPUIMX35 Platform"
130 select ARCH_MX35 156 select ARCH_MX35
157 select IMX_HAVE_PLATFORM_IMX_UART
158 select IMX_HAVE_PLATFORM_IMX_I2C
159 select IMX_HAVE_PLATFORM_MXC_NAND
131 select MXC_ULPI if USB_ULPI 160 select MXC_ULPI if USB_ULPI
132 help 161 help
133 Include support for Eukrea CPUIMX35 platform. This includes 162 Include support for Eukrea CPUIMX35 platform. This includes
diff --git a/arch/arm/mach-mx3/Makefile b/arch/arm/mach-mx3/Makefile
index ef68ff55a7b6..54bc935acdc6 100644
--- a/arch/arm/mach-mx3/Makefile
+++ b/arch/arm/mach-mx3/Makefile
@@ -22,7 +22,7 @@ obj-$(CONFIG_MACH_MX31MOBOARD) += mach-mx31moboard.o mx31moboard-devboard.o \
22obj-$(CONFIG_MACH_QONG) += mach-qong.o 22obj-$(CONFIG_MACH_QONG) += mach-qong.o
23obj-$(CONFIG_MACH_PCM043) += mach-pcm043.o 23obj-$(CONFIG_MACH_PCM043) += mach-pcm043.o
24obj-$(CONFIG_MACH_ARMADILLO5X0) += mach-armadillo5x0.o 24obj-$(CONFIG_MACH_ARMADILLO5X0) += mach-armadillo5x0.o
25obj-$(CONFIG_MACH_MX35_3DS) += mach-mx35pdk.o 25obj-$(CONFIG_MACH_MX35_3DS) += mach-mx35_3ds.o
26obj-$(CONFIG_MACH_KZM_ARM11_01) += mach-kzm_arm11_01.o 26obj-$(CONFIG_MACH_KZM_ARM11_01) += mach-kzm_arm11_01.o
27obj-$(CONFIG_MACH_EUKREA_CPUIMX35) += mach-cpuimx35.o 27obj-$(CONFIG_MACH_EUKREA_CPUIMX35) += mach-cpuimx35.o
28obj-$(CONFIG_MACH_EUKREA_MBIMXSD_BASEBOARD) += eukrea_mbimxsd-baseboard.o 28obj-$(CONFIG_MACH_EUKREA_MBIMXSD_BASEBOARD) += eukrea_mbimxsd-baseboard.o
diff --git a/arch/arm/mach-mx3/devices-imx31.h b/arch/arm/mach-mx3/devices-imx31.h
new file mode 100644
index 000000000000..3b1a44a20585
--- /dev/null
+++ b/arch/arm/mach-mx3/devices-imx31.h
@@ -0,0 +1,38 @@
1/*
2 * Copyright (C) 2010 Pengutronix
3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it under
6 * the terms of the GNU General Public License version 2 as published by the
7 * Free Software Foundation.
8 */
9#include <mach/mx31.h>
10#include <mach/devices-common.h>
11
12#define imx31_add_imx_i2c0(pdata) \
13 imx_add_imx_i2c(0, MX31_I2C1_BASE_ADDR, SZ_4K, MX31_INT_I2C1, pdata)
14#define imx31_add_imx_i2c1(pdata) \
15 imx_add_imx_i2c(1, MX31_I2C2_BASE_ADDR, SZ_4K, MX31_INT_I2C2, pdata)
16#define imx31_add_imx_i2c2(pdata) \
17 imx_add_imx_i2c(2, MX31_I2C3_BASE_ADDR, SZ_4K, MX31_INT_I2C3, pdata)
18
19#define imx31_add_imx_uart0(pdata) \
20 imx_add_imx_uart_1irq(0, MX31_UART1_BASE_ADDR, SZ_16K, MX31_INT_UART1, pdata)
21#define imx31_add_imx_uart1(pdata) \
22 imx_add_imx_uart_1irq(1, MX31_UART2_BASE_ADDR, SZ_16K, MX31_INT_UART2, pdata)
23#define imx31_add_imx_uart2(pdata) \
24 imx_add_imx_uart_1irq(2, MX31_UART3_BASE_ADDR, SZ_16K, MX31_INT_UART3, pdata)
25#define imx31_add_imx_uart3(pdata) \
26 imx_add_imx_uart_1irq(3, MX31_UART4_BASE_ADDR, SZ_16K, MX31_INT_UART4, pdata)
27#define imx31_add_imx_uart4(pdata) \
28 imx_add_imx_uart_1irq(4, MX31_UART5_BASE_ADDR, SZ_16K, MX31_INT_UART5, pdata)
29
30#define imx31_add_mxc_nand(pdata) \
31 imx_add_mxc_nand_v1(MX31_NFC_BASE_ADDR, MX31_INT_NANDFC, pdata)
32
33#define imx31_add_spi_imx0(pdata) \
34 imx_add_spi_imx(0, MX31_CSPI1_BASE_ADDR, SZ_4K, MX31_INT_CSPI1, pdata)
35#define imx31_add_spi_imx1(pdata) \
36 imx_add_spi_imx(1, MX31_CSPI2_BASE_ADDR, SZ_4K, MX31_INT_CSPI2, pdata)
37#define imx31_add_spi_imx2(pdata) \
38 imx_add_spi_imx(2, MX31_CSPI3_BASE_ADDR, SZ_4K, MX31_INT_CSPI3, pdata)
diff --git a/arch/arm/mach-mx3/devices-imx35.h b/arch/arm/mach-mx3/devices-imx35.h
new file mode 100644
index 000000000000..536d9b9a250b
--- /dev/null
+++ b/arch/arm/mach-mx3/devices-imx35.h
@@ -0,0 +1,32 @@
1/*
2 * Copyright (C) 2010 Pengutronix
3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it under
6 * the terms of the GNU General Public License version 2 as published by the
7 * Free Software Foundation.
8 */
9#include <mach/mx35.h>
10#include <mach/devices-common.h>
11
12#define imx35_add_imx_i2c0(pdata) \
13 imx_add_imx_i2c(0, MX35_I2C1_BASE_ADDR, SZ_4K, MX35_INT_I2C1, pdata)
14#define imx35_add_imx_i2c1(pdata) \
15 imx_add_imx_i2c(1, MX35_I2C2_BASE_ADDR, SZ_4K, MX35_INT_I2C2, pdata)
16#define imx35_add_imx_i2c2(pdata) \
17 imx_add_imx_i2c(2, MX35_I2C3_BASE_ADDR, SZ_4K, MX35_INT_I2C3, pdata)
18
19#define imx35_add_imx_uart0(pdata) \
20 imx_add_imx_uart_1irq(0, MX35_UART1_BASE_ADDR, SZ_16K, MX35_INT_UART1, pdata)
21#define imx35_add_imx_uart1(pdata) \
22 imx_add_imx_uart_1irq(1, MX35_UART2_BASE_ADDR, SZ_16K, MX35_INT_UART2, pdata)
23#define imx35_add_imx_uart2(pdata) \
24 imx_add_imx_uart_1irq(2, MX35_UART3_BASE_ADDR, SZ_16K, MX35_INT_UART3, pdata)
25
26#define imx35_add_mxc_nand(pdata) \
27 imx_add_mxc_nand_v21(MX35_NFC_BASE_ADDR, MX35_INT_NANDFC, pdata)
28
29#define imx35_add_spi_imx0(pdata) \
30 imx_add_spi_imx(0, MX35_CSPI1_BASE_ADDR, SZ_4K, MX35_INT_CSPI1, pdata)
31#define imx35_add_spi_imx1(pdata) \
32 imx_add_spi_imx(1, MX35_CSPI2_BASE_ADDR, SZ_4K, MX35_INT_CSPI2, pdata)
diff --git a/arch/arm/mach-mx3/devices.c b/arch/arm/mach-mx3/devices.c
index db7acd6e9101..a4fd1a26fc91 100644
--- a/arch/arm/mach-mx3/devices.c
+++ b/arch/arm/mach-mx3/devices.c
@@ -25,108 +25,10 @@
25#include <mach/hardware.h> 25#include <mach/hardware.h>
26#include <mach/irqs.h> 26#include <mach/irqs.h>
27#include <mach/common.h> 27#include <mach/common.h>
28#include <mach/imx-uart.h>
29#include <mach/mx3_camera.h> 28#include <mach/mx3_camera.h>
30 29
31#include "devices.h" 30#include "devices.h"
32 31
33static struct resource uart0[] = {
34 {
35 .start = UART1_BASE_ADDR,
36 .end = UART1_BASE_ADDR + 0x0B5,
37 .flags = IORESOURCE_MEM,
38 }, {
39 .start = MXC_INT_UART1,
40 .end = MXC_INT_UART1,
41 .flags = IORESOURCE_IRQ,
42 },
43};
44
45struct platform_device mxc_uart_device0 = {
46 .name = "imx-uart",
47 .id = 0,
48 .resource = uart0,
49 .num_resources = ARRAY_SIZE(uart0),
50};
51
52static struct resource uart1[] = {
53 {
54 .start = UART2_BASE_ADDR,
55 .end = UART2_BASE_ADDR + 0x0B5,
56 .flags = IORESOURCE_MEM,
57 }, {
58 .start = MXC_INT_UART2,
59 .end = MXC_INT_UART2,
60 .flags = IORESOURCE_IRQ,
61 },
62};
63
64struct platform_device mxc_uart_device1 = {
65 .name = "imx-uart",
66 .id = 1,
67 .resource = uart1,
68 .num_resources = ARRAY_SIZE(uart1),
69};
70
71static struct resource uart2[] = {
72 {
73 .start = UART3_BASE_ADDR,
74 .end = UART3_BASE_ADDR + 0x0B5,
75 .flags = IORESOURCE_MEM,
76 }, {
77 .start = MXC_INT_UART3,
78 .end = MXC_INT_UART3,
79 .flags = IORESOURCE_IRQ,
80 },
81};
82
83struct platform_device mxc_uart_device2 = {
84 .name = "imx-uart",
85 .id = 2,
86 .resource = uart2,
87 .num_resources = ARRAY_SIZE(uart2),
88};
89
90#ifdef CONFIG_ARCH_MX31
91static struct resource uart3[] = {
92 {
93 .start = UART4_BASE_ADDR,
94 .end = UART4_BASE_ADDR + 0x0B5,
95 .flags = IORESOURCE_MEM,
96 }, {
97 .start = MXC_INT_UART4,
98 .end = MXC_INT_UART4,
99 .flags = IORESOURCE_IRQ,
100 },
101};
102
103struct platform_device mxc_uart_device3 = {
104 .name = "imx-uart",
105 .id = 3,
106 .resource = uart3,
107 .num_resources = ARRAY_SIZE(uart3),
108};
109
110static struct resource uart4[] = {
111 {
112 .start = UART5_BASE_ADDR,
113 .end = UART5_BASE_ADDR + 0x0B5,
114 .flags = IORESOURCE_MEM,
115 }, {
116 .start = MXC_INT_UART5,
117 .end = MXC_INT_UART5,
118 .flags = IORESOURCE_IRQ,
119 },
120};
121
122struct platform_device mxc_uart_device4 = {
123 .name = "imx-uart",
124 .id = 4,
125 .resource = uart4,
126 .num_resources = ARRAY_SIZE(uart4),
127};
128#endif /* CONFIG_ARCH_MX31 */
129
130/* GPIO port description */ 32/* GPIO port description */
131static struct mxc_gpio_port imx_gpio_ports[] = { 33static struct mxc_gpio_port imx_gpio_ports[] = {
132 { 34 {
@@ -147,7 +49,7 @@ static struct mxc_gpio_port imx_gpio_ports[] = {
147 } 49 }
148}; 50};
149 51
150int __init mxc_register_gpios(void) 52int __init imx3x_register_gpios(void)
151{ 53{
152 return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports)); 54 return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
153} 55}
@@ -167,82 +69,6 @@ struct platform_device mxc_w1_master_device = {
167 .resource = mxc_w1_master_resources, 69 .resource = mxc_w1_master_resources,
168}; 70};
169 71
170static struct resource mxc_nand_resources[] = {
171 {
172 .start = 0, /* runtime dependent */
173 .end = 0,
174 .flags = IORESOURCE_MEM,
175 }, {
176 .start = MXC_INT_NANDFC,
177 .end = MXC_INT_NANDFC,
178 .flags = IORESOURCE_IRQ,
179 },
180};
181
182struct platform_device mxc_nand_device = {
183 .name = "mxc_nand",
184 .id = 0,
185 .num_resources = ARRAY_SIZE(mxc_nand_resources),
186 .resource = mxc_nand_resources,
187};
188
189static struct resource mxc_i2c0_resources[] = {
190 {
191 .start = I2C_BASE_ADDR,
192 .end = I2C_BASE_ADDR + SZ_4K - 1,
193 .flags = IORESOURCE_MEM,
194 }, {
195 .start = MXC_INT_I2C,
196 .end = MXC_INT_I2C,
197 .flags = IORESOURCE_IRQ,
198 },
199};
200
201struct platform_device mxc_i2c_device0 = {
202 .name = "imx-i2c",
203 .id = 0,
204 .num_resources = ARRAY_SIZE(mxc_i2c0_resources),
205 .resource = mxc_i2c0_resources,
206};
207
208static struct resource mxc_i2c1_resources[] = {
209 {
210 .start = I2C2_BASE_ADDR,
211 .end = I2C2_BASE_ADDR + SZ_4K - 1,
212 .flags = IORESOURCE_MEM,
213 }, {
214 .start = MXC_INT_I2C2,
215 .end = MXC_INT_I2C2,
216 .flags = IORESOURCE_IRQ,
217 },
218};
219
220struct platform_device mxc_i2c_device1 = {
221 .name = "imx-i2c",
222 .id = 1,
223 .num_resources = ARRAY_SIZE(mxc_i2c1_resources),
224 .resource = mxc_i2c1_resources,
225};
226
227static struct resource mxc_i2c2_resources[] = {
228 {
229 .start = I2C3_BASE_ADDR,
230 .end = I2C3_BASE_ADDR + SZ_4K - 1,
231 .flags = IORESOURCE_MEM,
232 }, {
233 .start = MXC_INT_I2C3,
234 .end = MXC_INT_I2C3,
235 .flags = IORESOURCE_IRQ,
236 },
237};
238
239struct platform_device mxc_i2c_device2 = {
240 .name = "imx-i2c",
241 .id = 2,
242 .num_resources = ARRAY_SIZE(mxc_i2c2_resources),
243 .resource = mxc_i2c2_resources,
244};
245
246#ifdef CONFIG_ARCH_MX31 72#ifdef CONFIG_ARCH_MX31
247static struct resource mxcsdhc0_resources[] = { 73static struct resource mxcsdhc0_resources[] = {
248 { 74 {
@@ -455,68 +281,7 @@ struct platform_device mxc_usbh2 = {
455 .num_resources = ARRAY_SIZE(mxc_usbh2_resources), 281 .num_resources = ARRAY_SIZE(mxc_usbh2_resources),
456}; 282};
457 283
458/* 284#if defined(CONFIG_ARCH_MX35)
459 * SPI master controller
460 * 3 channels
461 */
462static struct resource mxc_spi_0_resources[] = {
463 {
464 .start = CSPI1_BASE_ADDR,
465 .end = CSPI1_BASE_ADDR + SZ_4K - 1,
466 .flags = IORESOURCE_MEM,
467 }, {
468 .start = MXC_INT_CSPI1,
469 .end = MXC_INT_CSPI1,
470 .flags = IORESOURCE_IRQ,
471 },
472};
473
474static struct resource mxc_spi_1_resources[] = {
475 {
476 .start = CSPI2_BASE_ADDR,
477 .end = CSPI2_BASE_ADDR + SZ_4K - 1,
478 .flags = IORESOURCE_MEM,
479 }, {
480 .start = MXC_INT_CSPI2,
481 .end = MXC_INT_CSPI2,
482 .flags = IORESOURCE_IRQ,
483 },
484};
485
486static struct resource mxc_spi_2_resources[] = {
487 {
488 .start = CSPI3_BASE_ADDR,
489 .end = CSPI3_BASE_ADDR + SZ_4K - 1,
490 .flags = IORESOURCE_MEM,
491 }, {
492 .start = MXC_INT_CSPI3,
493 .end = MXC_INT_CSPI3,
494 .flags = IORESOURCE_IRQ,
495 },
496};
497
498struct platform_device mxc_spi_device0 = {
499 .name = "spi_imx",
500 .id = 0,
501 .num_resources = ARRAY_SIZE(mxc_spi_0_resources),
502 .resource = mxc_spi_0_resources,
503};
504
505struct platform_device mxc_spi_device1 = {
506 .name = "spi_imx",
507 .id = 1,
508 .num_resources = ARRAY_SIZE(mxc_spi_1_resources),
509 .resource = mxc_spi_1_resources,
510};
511
512struct platform_device mxc_spi_device2 = {
513 .name = "spi_imx",
514 .id = 2,
515 .num_resources = ARRAY_SIZE(mxc_spi_2_resources),
516 .resource = mxc_spi_2_resources,
517};
518
519#ifdef CONFIG_ARCH_MX35
520static struct resource mxc_fec_resources[] = { 285static struct resource mxc_fec_resources[] = {
521 { 286 {
522 .start = MXC_FEC_BASE_ADDR, 287 .start = MXC_FEC_BASE_ADDR,
@@ -628,16 +393,15 @@ struct platform_device imx_kpp_device = {
628 393
629static int __init mx3_devices_init(void) 394static int __init mx3_devices_init(void)
630{ 395{
396#if defined(CONFIG_ARCH_MX31)
631 if (cpu_is_mx31()) { 397 if (cpu_is_mx31()) {
632 mxc_nand_resources[0].start = MX31_NFC_BASE_ADDR;
633 mxc_nand_resources[0].end = MX31_NFC_BASE_ADDR + 0xfff;
634 imx_wdt_resources[0].start = MX31_WDOG_BASE_ADDR; 398 imx_wdt_resources[0].start = MX31_WDOG_BASE_ADDR;
635 imx_wdt_resources[0].end = MX31_WDOG_BASE_ADDR + 0x3fff; 399 imx_wdt_resources[0].end = MX31_WDOG_BASE_ADDR + 0x3fff;
636 mxc_register_device(&mxc_rnga_device, NULL); 400 mxc_register_device(&mxc_rnga_device, NULL);
637 } 401 }
402#endif
403#if defined(CONFIG_ARCH_MX35)
638 if (cpu_is_mx35()) { 404 if (cpu_is_mx35()) {
639 mxc_nand_resources[0].start = MX35_NFC_BASE_ADDR;
640 mxc_nand_resources[0].end = MX35_NFC_BASE_ADDR + 0x1fff;
641 otg_resources[0].start = MX35_OTG_BASE_ADDR; 405 otg_resources[0].start = MX35_OTG_BASE_ADDR;
642 otg_resources[0].end = MX35_OTG_BASE_ADDR + 0x1ff; 406 otg_resources[0].end = MX35_OTG_BASE_ADDR + 0x1ff;
643 otg_resources[1].start = MXC_INT_USBOTG; 407 otg_resources[1].start = MXC_INT_USBOTG;
@@ -653,6 +417,7 @@ static int __init mx3_devices_init(void)
653 imx_wdt_resources[0].start = MX35_WDOG_BASE_ADDR; 417 imx_wdt_resources[0].start = MX35_WDOG_BASE_ADDR;
654 imx_wdt_resources[0].end = MX35_WDOG_BASE_ADDR + 0x3fff; 418 imx_wdt_resources[0].end = MX35_WDOG_BASE_ADDR + 0x3fff;
655 } 419 }
420#endif
656 421
657 return 0; 422 return 0;
658} 423}
diff --git a/arch/arm/mach-mx3/devices.h b/arch/arm/mach-mx3/devices.h
index 2c3c8646a29e..e5535234839f 100644
--- a/arch/arm/mach-mx3/devices.h
+++ b/arch/arm/mach-mx3/devices.h
@@ -1,14 +1,4 @@
1
2extern struct platform_device mxc_uart_device0;
3extern struct platform_device mxc_uart_device1;
4extern struct platform_device mxc_uart_device2;
5extern struct platform_device mxc_uart_device3;
6extern struct platform_device mxc_uart_device4;
7extern struct platform_device mxc_w1_master_device; 1extern struct platform_device mxc_w1_master_device;
8extern struct platform_device mxc_nand_device;
9extern struct platform_device mxc_i2c_device0;
10extern struct platform_device mxc_i2c_device1;
11extern struct platform_device mxc_i2c_device2;
12extern struct platform_device mx3_ipu; 2extern struct platform_device mx3_ipu;
13extern struct platform_device mx3_fb; 3extern struct platform_device mx3_fb;
14extern struct platform_device mx3_camera; 4extern struct platform_device mx3_camera;
@@ -20,9 +10,6 @@ extern struct platform_device mxc_otg_host;
20extern struct platform_device mxc_usbh1; 10extern struct platform_device mxc_usbh1;
21extern struct platform_device mxc_usbh2; 11extern struct platform_device mxc_usbh2;
22extern struct platform_device mxc_rnga_device; 12extern struct platform_device mxc_rnga_device;
23extern struct platform_device mxc_spi_device0;
24extern struct platform_device mxc_spi_device1;
25extern struct platform_device mxc_spi_device2;
26extern struct platform_device imx_ssi_device0; 13extern struct platform_device imx_ssi_device0;
27extern struct platform_device imx_ssi_device1; 14extern struct platform_device imx_ssi_device1;
28extern struct platform_device imx_ssi_device1; 15extern struct platform_device imx_ssi_device1;
diff --git a/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c b/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c
index 678597852443..368a603accfe 100644
--- a/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c
+++ b/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c
@@ -46,6 +46,7 @@
46#include <mach/audmux.h> 46#include <mach/audmux.h>
47#include <mach/ssi.h> 47#include <mach/ssi.h>
48 48
49#include "devices-imx35.h"
49#include "devices.h" 50#include "devices.h"
50 51
51static const struct fb_videomode fb_modedb[] = { 52static const struct fb_videomode fb_modedb[] = {
@@ -196,7 +197,7 @@ static struct platform_device *platform_devices[] __initdata = {
196 &eukrea_mbimxsd_lcd_powerdev, 197 &eukrea_mbimxsd_lcd_powerdev,
197}; 198};
198 199
199static struct imxuart_platform_data uart_pdata = { 200static const struct imxuart_platform_data uart_pdata __initconst = {
200 .flags = IMXUART_HAVE_RTSCTS, 201 .flags = IMXUART_HAVE_RTSCTS,
201}; 202};
202 203
@@ -238,7 +239,7 @@ void __init eukrea_mbimxsd_baseboard_init(void)
238 ); 239 );
239#endif 240#endif
240 241
241 mxc_register_device(&mxc_uart_device1, &uart_pdata); 242 imx35_add_imx_uart1(&uart_pdata);
242 mxc_register_device(&mx3_ipu, &mx3_ipu_data); 243 mxc_register_device(&mx3_ipu, &mx3_ipu_data);
243 mxc_register_device(&mx3_fb, &mx3fb_pdata); 244 mxc_register_device(&mx3_fb, &mx3fb_pdata);
244 245
diff --git a/arch/arm/mach-mx3/mach-armadillo5x0.c b/arch/arm/mach-mx3/mach-armadillo5x0.c
index 5f72ec91af2d..96aadcadb4ff 100644
--- a/arch/arm/mach-mx3/mach-armadillo5x0.c
+++ b/arch/arm/mach-mx3/mach-armadillo5x0.c
@@ -48,16 +48,14 @@
48#include <asm/mach/map.h> 48#include <asm/mach/map.h>
49 49
50#include <mach/common.h> 50#include <mach/common.h>
51#include <mach/imx-uart.h>
52#include <mach/iomux-mx3.h> 51#include <mach/iomux-mx3.h>
53#include <mach/board-armadillo5x0.h>
54#include <mach/mmc.h> 52#include <mach/mmc.h>
55#include <mach/ipu.h> 53#include <mach/ipu.h>
56#include <mach/mx3fb.h> 54#include <mach/mx3fb.h>
57#include <mach/mxc_nand.h>
58#include <mach/mxc_ehci.h> 55#include <mach/mxc_ehci.h>
59#include <mach/ulpi.h> 56#include <mach/ulpi.h>
60 57
58#include "devices-imx31.h"
61#include "devices.h" 59#include "devices.h"
62#include "crm_regs.h" 60#include "crm_regs.h"
63 61
@@ -301,7 +299,8 @@ static struct platform_device armadillo5x0_button_device = {
301/* 299/*
302 * NAND Flash 300 * NAND Flash
303 */ 301 */
304static struct mxc_nand_platform_data armadillo5x0_nand_flash_pdata = { 302static const struct mxc_nand_platform_data
303armadillo5x0_nand_board_info __initconst = {
305 .width = 1, 304 .width = 1,
306 .hw_ecc = 1, 305 .hw_ecc = 1,
307}; 306};
@@ -493,13 +492,12 @@ static struct platform_device armadillo5x0_smc911x_device = {
493}; 492};
494 493
495/* UART device data */ 494/* UART device data */
496static struct imxuart_platform_data uart_pdata = { 495static const struct imxuart_platform_data uart_pdata __initconst = {
497 .flags = IMXUART_HAVE_RTSCTS, 496 .flags = IMXUART_HAVE_RTSCTS,
498}; 497};
499 498
500static struct platform_device *devices[] __initdata = { 499static struct platform_device *devices[] __initdata = {
501 &armadillo5x0_smc911x_device, 500 &armadillo5x0_smc911x_device,
502 &mxc_i2c_device1,
503 &armadillo5x0_button_device, 501 &armadillo5x0_button_device,
504}; 502};
505 503
@@ -512,10 +510,11 @@ static void __init armadillo5x0_init(void)
512 ARRAY_SIZE(armadillo5x0_pins), "armadillo5x0"); 510 ARRAY_SIZE(armadillo5x0_pins), "armadillo5x0");
513 511
514 platform_add_devices(devices, ARRAY_SIZE(devices)); 512 platform_add_devices(devices, ARRAY_SIZE(devices));
513 imx31_add_imx_i2c1(NULL);
515 514
516 /* Register UART */ 515 /* Register UART */
517 mxc_register_device(&mxc_uart_device0, &uart_pdata); 516 imx31_add_imx_uart0(&uart_pdata);
518 mxc_register_device(&mxc_uart_device1, &uart_pdata); 517 imx31_add_imx_uart1(&uart_pdata);
519 518
520 /* SMSC9118 IRQ pin */ 519 /* SMSC9118 IRQ pin */
521 gpio_direction_input(MX31_PIN_GPIO1_0); 520 gpio_direction_input(MX31_PIN_GPIO1_0);
@@ -532,7 +531,7 @@ static void __init armadillo5x0_init(void)
532 &armadillo5x0_nor_flash_pdata); 531 &armadillo5x0_nor_flash_pdata);
533 532
534 /* Register NAND Flash */ 533 /* Register NAND Flash */
535 mxc_register_device(&mxc_nand_device, &armadillo5x0_nand_flash_pdata); 534 imx31_add_mxc_nand(&armadillo5x0_nand_board_info);
536 535
537 /* set NAND page size to 2k if not configured via boot mode pins */ 536 /* set NAND page size to 2k if not configured via boot mode pins */
538 __raw_writel(__raw_readl(MXC_CCM_RCSR) | (1 << 30), MXC_CCM_RCSR); 537 __raw_writel(__raw_readl(MXC_CCM_RCSR) | (1 << 30), MXC_CCM_RCSR);
diff --git a/arch/arm/mach-mx3/mach-cpuimx35.c b/arch/arm/mach-mx3/mach-cpuimx35.c
index 55caa5cb8bc7..4f6146d31328 100644
--- a/arch/arm/mach-mx3/mach-cpuimx35.c
+++ b/arch/arm/mach-mx3/mach-cpuimx35.c
@@ -40,20 +40,20 @@
40#include <mach/board-eukrea_cpuimx35.h> 40#include <mach/board-eukrea_cpuimx35.h>
41#include <mach/hardware.h> 41#include <mach/hardware.h>
42#include <mach/common.h> 42#include <mach/common.h>
43#include <mach/imx-uart.h>
44#include <mach/i2c.h>
45#include <mach/iomux-mx35.h> 43#include <mach/iomux-mx35.h>
46#include <mach/mxc_nand.h> 44#include <mach/mxc_nand.h>
47#include <mach/mxc_ehci.h> 45#include <mach/mxc_ehci.h>
48#include <mach/ulpi.h> 46#include <mach/ulpi.h>
49 47
48#include "devices-imx35.h"
50#include "devices.h" 49#include "devices.h"
51 50
52static struct imxuart_platform_data uart_pdata = { 51static const struct imxuart_platform_data uart_pdata __initconst = {
53 .flags = IMXUART_HAVE_RTSCTS, 52 .flags = IMXUART_HAVE_RTSCTS,
54}; 53};
55 54
56static struct imxi2c_platform_data eukrea_cpuimx35_i2c_1_data = { 55static const struct imxi2c_platform_data
56eukrea_cpuimx35_i2c0_data __initconst = {
57 .bitrate = 50000, 57 .bitrate = 50000,
58}; 58};
59 59
@@ -134,7 +134,8 @@ static struct pad_desc eukrea_cpuimx35_pads[] = {
134 MX35_PAD_ATA_DA2__GPIO3_2, 134 MX35_PAD_ATA_DA2__GPIO3_2,
135}; 135};
136 136
137static struct mxc_nand_platform_data pcm037_nand_board_info = { 137static const struct mxc_nand_platform_data
138eukrea_cpuimx35_nand_board_info __initconst = {
138 .width = 1, 139 .width = 1,
139 .hw_ecc = 1, 140 .hw_ecc = 1,
140 .flash_bbt = 1, 141 .flash_bbt = 1,
@@ -181,12 +182,12 @@ static void __init mxc_board_init(void)
181 182
182 platform_add_devices(devices, ARRAY_SIZE(devices)); 183 platform_add_devices(devices, ARRAY_SIZE(devices));
183 184
184 mxc_register_device(&mxc_uart_device0, &uart_pdata); 185 imx35_add_imx_uart0(&uart_pdata);
185 mxc_register_device(&mxc_nand_device, &pcm037_nand_board_info); 186 imx35_add_mxc_nand(&eukrea_cpuimx35_nand_board_info);
186 187
187 i2c_register_board_info(0, eukrea_cpuimx35_i2c_devices, 188 i2c_register_board_info(0, eukrea_cpuimx35_i2c_devices,
188 ARRAY_SIZE(eukrea_cpuimx35_i2c_devices)); 189 ARRAY_SIZE(eukrea_cpuimx35_i2c_devices));
189 mxc_register_device(&mxc_i2c_device0, &eukrea_cpuimx35_i2c_1_data); 190 imx35_add_imx_i2c0(&eukrea_cpuimx35_i2c0_data);
190 191
191#if defined(CONFIG_USB_ULPI) 192#if defined(CONFIG_USB_ULPI)
192 if (otg_mode_host) { 193 if (otg_mode_host) {
diff --git a/arch/arm/mach-mx3/mach-kzm_arm11_01.c b/arch/arm/mach-mx3/mach-kzm_arm11_01.c
index f085d5d1a6de..5b23e416d6c7 100644
--- a/arch/arm/mach-mx3/mach-kzm_arm11_01.c
+++ b/arch/arm/mach-mx3/mach-kzm_arm11_01.c
@@ -16,10 +16,6 @@
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details. 18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 */ 19 */
24 20
25#include <linux/gpio.h> 21#include <linux/gpio.h>
@@ -37,13 +33,12 @@
37#include <asm/mach/map.h> 33#include <asm/mach/map.h>
38#include <asm/mach/time.h> 34#include <asm/mach/time.h>
39 35
40#include <mach/board-kzmarm11.h>
41#include <mach/clock.h> 36#include <mach/clock.h>
42#include <mach/common.h> 37#include <mach/common.h>
43#include <mach/imx-uart.h>
44#include <mach/iomux-mx3.h> 38#include <mach/iomux-mx3.h>
45#include <mach/memory.h> 39#include <mach/memory.h>
46 40
41#include "devices-imx31.h"
47#include "devices.h" 42#include "devices.h"
48 43
49#define KZM_ARM11_IO_ADDRESS(x) ( \ 44#define KZM_ARM11_IO_ADDRESS(x) ( \
@@ -51,6 +46,23 @@
51 IMX_IO_ADDRESS(x, MX31_CS5) ?: \ 46 IMX_IO_ADDRESS(x, MX31_CS5) ?: \
52 MX31_IO_ADDRESS(x)) 47 MX31_IO_ADDRESS(x))
53 48
49/*
50 * KZM-ARM11-01 Board Control Registers on FPGA
51 */
52#define KZM_ARM11_CTL1 (MX31_CS4_BASE_ADDR + 0x1000)
53#define KZM_ARM11_CTL2 (MX31_CS4_BASE_ADDR + 0x1001)
54#define KZM_ARM11_RSW1 (MX31_CS4_BASE_ADDR + 0x1002)
55#define KZM_ARM11_BACK_LIGHT (MX31_CS4_BASE_ADDR + 0x1004)
56#define KZM_ARM11_FPGA_REV (MX31_CS4_BASE_ADDR + 0x1008)
57#define KZM_ARM11_7SEG_LED (MX31_CS4_BASE_ADDR + 0x1010)
58#define KZM_ARM11_LEDS (MX31_CS4_BASE_ADDR + 0x1020)
59#define KZM_ARM11_DIPSW2 (MX31_CS4_BASE_ADDR + 0x1003)
60
61/*
62 * External UART for touch panel on FPGA
63 */
64#define KZM_ARM11_16550 (MX31_CS4_BASE_ADDR + 0x1050)
65
54#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE) 66#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
55/* 67/*
56 * KZM-ARM11-01 has an external UART on FPGA 68 * KZM-ARM11-01 has an external UART on FPGA
@@ -173,15 +185,14 @@ static inline int kzm_init_smsc9118(void)
173#endif 185#endif
174 186
175#if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE) 187#if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE)
176static struct imxuart_platform_data uart_pdata = { 188static const struct imxuart_platform_data uart_pdata __initconst = {
177 .flags = IMXUART_HAVE_RTSCTS, 189 .flags = IMXUART_HAVE_RTSCTS,
178}; 190};
179 191
180static void __init kzm_init_imx_uart(void) 192static void __init kzm_init_imx_uart(void)
181{ 193{
182 mxc_register_device(&mxc_uart_device0, &uart_pdata); 194 imx31_add_imx_uart0(&uart_pdata);
183 195 imx31_add_imx_uart1(&uart_pdata);
184 mxc_register_device(&mxc_uart_device1, &uart_pdata);
185} 196}
186#else 197#else
187static inline void kzm_init_imx_uart(void) 198static inline void kzm_init_imx_uart(void)
diff --git a/arch/arm/mach-mx3/mach-mx31_3ds.c b/arch/arm/mach-mx3/mach-mx31_3ds.c
index 7e8d09ab9e6c..d4d9e7a1f735 100644
--- a/arch/arm/mach-mx3/mach-mx31_3ds.c
+++ b/arch/arm/mach-mx3/mach-mx31_3ds.c
@@ -10,10 +10,6 @@
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details. 12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */ 13 */
18 14
19#include <linux/delay.h> 15#include <linux/delay.h>
@@ -37,19 +33,46 @@
37#include <asm/memory.h> 33#include <asm/memory.h>
38#include <asm/mach/map.h> 34#include <asm/mach/map.h>
39#include <mach/common.h> 35#include <mach/common.h>
40#include <mach/board-mx31_3ds.h>
41#include <mach/imx-uart.h>
42#include <mach/iomux-mx3.h> 36#include <mach/iomux-mx3.h>
43#include <mach/mxc_nand.h> 37
44#include <mach/spi.h> 38#include "devices-imx31.h"
45#include "devices.h" 39#include "devices.h"
46 40
47/*! 41/* Definitions for components on the Debug board */
48 * @file mx31_3ds.c 42
49 * 43/* Base address of CPLD controller on the Debug board */
50 * @brief This file contains the board-specific initialization routines. 44#define DEBUG_BASE_ADDRESS CS5_IO_ADDRESS(MX3x_CS5_BASE_ADDR)
51 * 45
52 * @ingroup System 46/* LAN9217 ethernet base address */
47#define LAN9217_BASE_ADDR MX3x_CS5_BASE_ADDR
48
49/* CPLD config and interrupt base address */
50#define CPLD_ADDR (DEBUG_BASE_ADDRESS + 0x20000)
51
52/* status, interrupt */
53#define CPLD_INT_STATUS_REG (CPLD_ADDR + 0x10)
54#define CPLD_INT_MASK_REG (CPLD_ADDR + 0x38)
55#define CPLD_INT_RESET_REG (CPLD_ADDR + 0x20)
56/* magic word for debug CPLD */
57#define CPLD_MAGIC_NUMBER1_REG (CPLD_ADDR + 0x40)
58#define CPLD_MAGIC_NUMBER2_REG (CPLD_ADDR + 0x48)
59/* CPLD code version */
60#define CPLD_CODE_VER_REG (CPLD_ADDR + 0x50)
61/* magic word for debug CPLD */
62#define CPLD_MAGIC_NUMBER3_REG (CPLD_ADDR + 0x58)
63
64/* CPLD IRQ line for external uart, external ethernet etc */
65#define EXPIO_PARENT_INT IOMUX_TO_IRQ(MX31_PIN_GPIO1_1)
66
67#define MXC_EXP_IO_BASE (MXC_BOARD_IRQ_START)
68#define MXC_IRQ_TO_EXPIO(irq) ((irq) - MXC_EXP_IO_BASE)
69
70#define EXPIO_INT_ENET (MXC_EXP_IO_BASE + 0)
71
72#define MXC_MAX_EXP_IO_LINES 16
73
74/*
75 * This file contains the board-specific initialization routines.
53 */ 76 */
54 77
55static int mx31_3ds_pins[] = { 78static int mx31_3ds_pins[] = {
@@ -145,7 +168,7 @@ static int spi1_internal_chipselect[] = {
145 MXC_SPI_CS(2), 168 MXC_SPI_CS(2),
146}; 169};
147 170
148static struct spi_imx_master spi1_pdata = { 171static const struct spi_imx_master spi1_pdata __initconst = {
149 .chipselect = spi1_internal_chipselect, 172 .chipselect = spi1_internal_chipselect,
150 .num_chipselect = ARRAY_SIZE(spi1_internal_chipselect), 173 .num_chipselect = ARRAY_SIZE(spi1_internal_chipselect),
151}; 174};
@@ -165,7 +188,8 @@ static struct spi_board_info mx31_3ds_spi_devs[] __initdata = {
165/* 188/*
166 * NAND Flash 189 * NAND Flash
167 */ 190 */
168static struct mxc_nand_platform_data imx31_3ds_nand_flash_pdata = { 191static const struct mxc_nand_platform_data
192mx31_3ds_nand_board_info __initconst = {
169 .width = 1, 193 .width = 1,
170 .hw_ecc = 1, 194 .hw_ecc = 1,
171#ifdef MACH_MX31_3DS_MXC_NAND_USE_BBT 195#ifdef MACH_MX31_3DS_MXC_NAND_USE_BBT
@@ -225,7 +249,7 @@ static struct fsl_usb2_platform_data usbotg_pdata = {
225 .phy_mode = FSL_USB2_PHY_ULPI, 249 .phy_mode = FSL_USB2_PHY_ULPI,
226}; 250};
227 251
228static struct imxuart_platform_data uart_pdata = { 252static const struct imxuart_platform_data uart_pdata __initconst = {
229 .flags = IMXUART_HAVE_RTSCTS, 253 .flags = IMXUART_HAVE_RTSCTS,
230}; 254};
231 255
@@ -407,10 +431,10 @@ static void __init mxc_board_init(void)
407 mxc_iomux_setup_multiple_pins(mx31_3ds_pins, ARRAY_SIZE(mx31_3ds_pins), 431 mxc_iomux_setup_multiple_pins(mx31_3ds_pins, ARRAY_SIZE(mx31_3ds_pins),
408 "mx31_3ds"); 432 "mx31_3ds");
409 433
410 mxc_register_device(&mxc_uart_device0, &uart_pdata); 434 imx31_add_imx_uart0(&uart_pdata);
411 mxc_register_device(&mxc_nand_device, &imx31_3ds_nand_flash_pdata); 435 imx31_add_mxc_nand(&mx31_3ds_nand_board_info);
412 436
413 mxc_register_device(&mxc_spi_device1, &spi1_pdata); 437 imx31_add_spi_imx0(&spi1_pdata);
414 spi_register_board_info(mx31_3ds_spi_devs, 438 spi_register_board_info(mx31_3ds_spi_devs,
415 ARRAY_SIZE(mx31_3ds_spi_devs)); 439 ARRAY_SIZE(mx31_3ds_spi_devs));
416 440
diff --git a/arch/arm/mach-mx3/mach-mx31ads.c b/arch/arm/mach-mx3/mach-mx31ads.c
index b3d1a1895c20..94b3e7c42404 100644
--- a/arch/arm/mach-mx3/mach-mx31ads.c
+++ b/arch/arm/mach-mx3/mach-mx31ads.c
@@ -12,10 +12,6 @@
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details. 14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */ 15 */
20 16
21#include <linux/types.h> 17#include <linux/types.h>
@@ -33,8 +29,6 @@
33#include <asm/memory.h> 29#include <asm/memory.h>
34#include <asm/mach/map.h> 30#include <asm/mach/map.h>
35#include <mach/common.h> 31#include <mach/common.h>
36#include <mach/board-mx31ads.h>
37#include <mach/imx-uart.h>
38#include <mach/iomux-mx3.h> 32#include <mach/iomux-mx3.h>
39 33
40#ifdef CONFIG_MACH_MX31ADS_WM1133_EV1 34#ifdef CONFIG_MACH_MX31ADS_WM1133_EV1
@@ -43,14 +37,45 @@
43#include <linux/mfd/wm8350/pmic.h> 37#include <linux/mfd/wm8350/pmic.h>
44#endif 38#endif
45 39
40#include "devices-imx31.h"
46#include "devices.h" 41#include "devices.h"
47 42
48/*! 43/* Base address of PBC controller */
49 * @file mx31ads.c 44#define PBC_BASE_ADDRESS MX31_CS4_BASE_ADDR_VIRT
50 * 45/* Offsets for the PBC Controller register */
51 * @brief This file contains the board-specific initialization routines. 46
52 * 47/* PBC Board interrupt status register */
53 * @ingroup System 48#define PBC_INTSTATUS 0x000016
49
50/* PBC Board interrupt current status register */
51#define PBC_INTCURR_STATUS 0x000018
52
53/* PBC Interrupt mask register set address */
54#define PBC_INTMASK_SET 0x00001A
55
56/* PBC Interrupt mask register clear address */
57#define PBC_INTMASK_CLEAR 0x00001C
58
59/* External UART A */
60#define PBC_SC16C652_UARTA 0x010000
61
62/* External UART B */
63#define PBC_SC16C652_UARTB 0x010010
64
65#define PBC_INTSTATUS_REG (PBC_INTSTATUS + PBC_BASE_ADDRESS)
66#define PBC_INTMASK_SET_REG (PBC_INTMASK_SET + PBC_BASE_ADDRESS)
67#define PBC_INTMASK_CLEAR_REG (PBC_INTMASK_CLEAR + PBC_BASE_ADDRESS)
68#define EXPIO_PARENT_INT IOMUX_TO_IRQ(MX31_PIN_GPIO1_4)
69
70#define MXC_EXP_IO_BASE (MXC_BOARD_IRQ_START)
71#define MXC_IRQ_TO_EXPIO(irq) ((irq) - MXC_EXP_IO_BASE)
72
73#define EXPIO_INT_XUART_INTA (MXC_EXP_IO_BASE + 10)
74#define EXPIO_INT_XUART_INTB (MXC_EXP_IO_BASE + 11)
75
76#define MXC_MAX_EXP_IO_LINES 16
77/*
78 * This file contains the board-specific initialization routines.
54 */ 79 */
55 80
56#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE) 81#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
@@ -98,7 +123,7 @@ static inline int mxc_init_extuart(void)
98#endif 123#endif
99 124
100#if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE) 125#if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE)
101static struct imxuart_platform_data uart_pdata = { 126static const struct imxuart_platform_data uart_pdata __initconst = {
102 .flags = IMXUART_HAVE_RTSCTS, 127 .flags = IMXUART_HAVE_RTSCTS,
103}; 128};
104 129
@@ -112,7 +137,7 @@ static unsigned int uart_pins[] = {
112static inline void mxc_init_imx_uart(void) 137static inline void mxc_init_imx_uart(void)
113{ 138{
114 mxc_iomux_setup_multiple_pins(uart_pins, ARRAY_SIZE(uart_pins), "uart-0"); 139 mxc_iomux_setup_multiple_pins(uart_pins, ARRAY_SIZE(uart_pins), "uart-0");
115 mxc_register_device(&mxc_uart_device0, &uart_pdata); 140 imx31_add_imx_uart0(&uart_pdata);
116} 141}
117#else /* !SERIAL_IMX */ 142#else /* !SERIAL_IMX */
118static inline void mxc_init_imx_uart(void) 143static inline void mxc_init_imx_uart(void)
@@ -475,7 +500,7 @@ static void mxc_init_i2c(void)
475 mxc_iomux_mode(IOMUX_MODE(MX31_PIN_CSPI2_MOSI, IOMUX_CONFIG_ALT1)); 500 mxc_iomux_mode(IOMUX_MODE(MX31_PIN_CSPI2_MOSI, IOMUX_CONFIG_ALT1));
476 mxc_iomux_mode(IOMUX_MODE(MX31_PIN_CSPI2_MISO, IOMUX_CONFIG_ALT1)); 501 mxc_iomux_mode(IOMUX_MODE(MX31_PIN_CSPI2_MISO, IOMUX_CONFIG_ALT1));
477 502
478 mxc_register_device(&mxc_i2c_device1, NULL); 503 imx31_add_imx_i2c1(NULL);
479} 504}
480#else 505#else
481static void mxc_init_i2c(void) 506static void mxc_init_i2c(void)
diff --git a/arch/arm/mach-mx3/mach-mx31lilly.c b/arch/arm/mach-mx3/mach-mx31lilly.c
index 46bf57c44372..84942cf41b63 100644
--- a/arch/arm/mach-mx3/mach-mx31lilly.c
+++ b/arch/arm/mach-mx3/mach-mx31lilly.c
@@ -18,10 +18,6 @@
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details. 20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */ 21 */
26 22
27#include <linux/types.h> 23#include <linux/types.h>
@@ -46,10 +42,10 @@
46#include <mach/common.h> 42#include <mach/common.h>
47#include <mach/iomux-mx3.h> 43#include <mach/iomux-mx3.h>
48#include <mach/board-mx31lilly.h> 44#include <mach/board-mx31lilly.h>
49#include <mach/spi.h>
50#include <mach/mxc_ehci.h> 45#include <mach/mxc_ehci.h>
51#include <mach/ulpi.h> 46#include <mach/ulpi.h>
52 47
48#include "devices-imx31.h"
53#include "devices.h" 49#include "devices.h"
54 50
55/* 51/*
@@ -257,12 +253,12 @@ static int spi_internal_chipselect[] = {
257 MXC_SPI_CS(2), 253 MXC_SPI_CS(2),
258}; 254};
259 255
260static struct spi_imx_master spi0_pdata = { 256static const struct spi_imx_master spi0_pdata __initconst = {
261 .chipselect = spi_internal_chipselect, 257 .chipselect = spi_internal_chipselect,
262 .num_chipselect = ARRAY_SIZE(spi_internal_chipselect), 258 .num_chipselect = ARRAY_SIZE(spi_internal_chipselect),
263}; 259};
264 260
265static struct spi_imx_master spi1_pdata = { 261static const struct spi_imx_master spi1_pdata __initconst = {
266 .chipselect = spi_internal_chipselect, 262 .chipselect = spi_internal_chipselect,
267 .num_chipselect = ARRAY_SIZE(spi_internal_chipselect), 263 .num_chipselect = ARRAY_SIZE(spi_internal_chipselect),
268}; 264};
@@ -315,8 +311,8 @@ static void __init mx31lilly_board_init(void)
315 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SS1__SS1, "SPI2_SS1"); 311 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SS1__SS1, "SPI2_SS1");
316 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SS2__SS2, "SPI2_SS2"); 312 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SS2__SS2, "SPI2_SS2");
317 313
318 mxc_register_device(&mxc_spi_device0, &spi0_pdata); 314 imx31_add_spi_imx0(&spi0_pdata);
319 mxc_register_device(&mxc_spi_device1, &spi1_pdata); 315 imx31_add_spi_imx1(&spi1_pdata);
320 spi_register_board_info(&mc13783_dev, 1); 316 spi_register_board_info(&mc13783_dev, 1);
321 317
322 platform_add_devices(devices, ARRAY_SIZE(devices)); 318 platform_add_devices(devices, ARRAY_SIZE(devices));
diff --git a/arch/arm/mach-mx3/mach-mx31lite.c b/arch/arm/mach-mx3/mach-mx31lite.c
index 2b6d11400877..da236c497d2a 100644
--- a/arch/arm/mach-mx3/mach-mx31lite.c
+++ b/arch/arm/mach-mx3/mach-mx31lite.c
@@ -13,10 +13,6 @@
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details. 15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */ 16 */
21 17
22#include <linux/types.h> 18#include <linux/types.h>
@@ -42,14 +38,12 @@
42#include <mach/hardware.h> 38#include <mach/hardware.h>
43#include <mach/common.h> 39#include <mach/common.h>
44#include <mach/board-mx31lite.h> 40#include <mach/board-mx31lite.h>
45#include <mach/imx-uart.h>
46#include <mach/iomux-mx3.h> 41#include <mach/iomux-mx3.h>
47#include <mach/irqs.h> 42#include <mach/irqs.h>
48#include <mach/mxc_nand.h>
49#include <mach/spi.h>
50#include <mach/mxc_ehci.h> 43#include <mach/mxc_ehci.h>
51#include <mach/ulpi.h> 44#include <mach/ulpi.h>
52 45
46#include "devices-imx31.h"
53#include "devices.h" 47#include "devices.h"
54 48
55/* 49/*
@@ -69,7 +63,8 @@ static unsigned int mx31lite_pins[] = {
69 MX31_PIN_CSPI2_SS2__SS2, 63 MX31_PIN_CSPI2_SS2__SS2,
70}; 64};
71 65
72static struct mxc_nand_platform_data mx31lite_nand_board_info = { 66static const struct mxc_nand_platform_data
67mx31lite_nand_board_info __initconst = {
73 .width = 1, 68 .width = 1,
74 .hw_ecc = 1, 69 .hw_ecc = 1,
75}; 70};
@@ -112,7 +107,7 @@ static int spi_internal_chipselect[] = {
112 MXC_SPI_CS(0), 107 MXC_SPI_CS(0),
113}; 108};
114 109
115static struct spi_imx_master spi1_pdata = { 110static const struct spi_imx_master spi1_pdata __initconst = {
116 .chipselect = spi_internal_chipselect, 111 .chipselect = spi_internal_chipselect,
117 .num_chipselect = ARRAY_SIZE(spi_internal_chipselect), 112 .num_chipselect = ARRAY_SIZE(spi_internal_chipselect),
118}; 113};
@@ -253,9 +248,9 @@ static void __init mxc_board_init(void)
253 248
254 /* NOR and NAND flash */ 249 /* NOR and NAND flash */
255 platform_device_register(&physmap_flash_device); 250 platform_device_register(&physmap_flash_device);
256 mxc_register_device(&mxc_nand_device, &mx31lite_nand_board_info); 251 imx31_add_mxc_nand(&mx31lite_nand_board_info);
257 252
258 mxc_register_device(&mxc_spi_device1, &spi1_pdata); 253 imx31_add_spi_imx1(&spi1_pdata);
259 spi_register_board_info(&mc13783_spi_dev, 1); 254 spi_register_board_info(&mc13783_spi_dev, 1);
260 255
261#if defined(CONFIG_USB_ULPI) 256#if defined(CONFIG_USB_ULPI)
diff --git a/arch/arm/mach-mx3/mach-mx31moboard.c b/arch/arm/mach-mx3/mach-mx31moboard.c
index 33a8d35498a7..67776bc61c33 100644
--- a/arch/arm/mach-mx3/mach-mx31moboard.c
+++ b/arch/arm/mach-mx3/mach-mx31moboard.c
@@ -10,10 +10,6 @@
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details. 12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */ 13 */
18 14
19#include <linux/delay.h> 15#include <linux/delay.h>
@@ -42,16 +38,15 @@
42#include <mach/board-mx31moboard.h> 38#include <mach/board-mx31moboard.h>
43#include <mach/common.h> 39#include <mach/common.h>
44#include <mach/hardware.h> 40#include <mach/hardware.h>
45#include <mach/imx-uart.h>
46#include <mach/iomux-mx3.h> 41#include <mach/iomux-mx3.h>
47#include <mach/ipu.h> 42#include <mach/ipu.h>
48#include <mach/i2c.h>
49#include <mach/mmc.h> 43#include <mach/mmc.h>
50#include <mach/mxc_ehci.h> 44#include <mach/mxc_ehci.h>
51#include <mach/mx3_camera.h> 45#include <mach/mx3_camera.h>
52#include <mach/spi.h> 46#include <mach/spi.h>
53#include <mach/ulpi.h> 47#include <mach/ulpi.h>
54 48
49#include "devices-imx31.h"
55#include "devices.h" 50#include "devices.h"
56 51
57static unsigned int moboard_pins[] = { 52static unsigned int moboard_pins[] = {
@@ -130,24 +125,36 @@ static struct platform_device mx31moboard_flash = {
130 125
131static int moboard_uart0_init(struct platform_device *pdev) 126static int moboard_uart0_init(struct platform_device *pdev)
132{ 127{
133 gpio_request(IOMUX_TO_GPIO(MX31_PIN_CTS1), "uart0-cts-hack"); 128 int ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_CTS1), "uart0-cts-hack");
134 gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_CTS1), 0); 129 if (ret)
135 return 0; 130 return ret;
131
132 ret = gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_CTS1), 0);
133 if (ret)
134 gpio_free(IOMUX_TO_GPIO(MX31_PIN_CTS1));
135
136 return ret;
137}
138
139static void moboard_uart0_exit(struct platform_device *pdev)
140{
141 gpio_free(IOMUX_TO_GPIO(MX31_PIN_CTS1));
136} 142}
137 143
138static struct imxuart_platform_data uart0_pdata = { 144static const struct imxuart_platform_data uart0_pdata __initconst = {
139 .init = moboard_uart0_init, 145 .init = moboard_uart0_init,
146 .exit = moboard_uart0_exit,
140}; 147};
141 148
142static struct imxuart_platform_data uart4_pdata = { 149static const struct imxuart_platform_data uart4_pdata __initconst = {
143 .flags = IMXUART_HAVE_RTSCTS, 150 .flags = IMXUART_HAVE_RTSCTS,
144}; 151};
145 152
146static struct imxi2c_platform_data moboard_i2c0_pdata = { 153static const struct imxi2c_platform_data moboard_i2c0_data __initconst = {
147 .bitrate = 400000, 154 .bitrate = 400000,
148}; 155};
149 156
150static struct imxi2c_platform_data moboard_i2c1_pdata = { 157static const struct imxi2c_platform_data moboard_i2c1_data __initconst = {
151 .bitrate = 100000, 158 .bitrate = 100000,
152}; 159};
153 160
@@ -156,7 +163,7 @@ static int moboard_spi1_cs[] = {
156 MXC_SPI_CS(2), 163 MXC_SPI_CS(2),
157}; 164};
158 165
159static struct spi_imx_master moboard_spi1_master = { 166static const struct spi_imx_master moboard_spi1_pdata __initconst = {
160 .chipselect = moboard_spi1_cs, 167 .chipselect = moboard_spi1_cs,
161 .num_chipselect = ARRAY_SIZE(moboard_spi1_cs), 168 .num_chipselect = ARRAY_SIZE(moboard_spi1_cs),
162}; 169};
@@ -220,11 +227,54 @@ static struct mc13783_regulator_init_data moboard_regulators[] = {
220 }, 227 },
221}; 228};
222 229
230static struct mc13783_led_platform_data moboard_led[] = {
231 {
232 .id = MC13783_LED_R1,
233 .name = "coreboard-led-4:red",
234 .max_current = 2,
235 },
236 {
237 .id = MC13783_LED_G1,
238 .name = "coreboard-led-4:green",
239 .max_current = 2,
240 },
241 {
242 .id = MC13783_LED_B1,
243 .name = "coreboard-led-4:blue",
244 .max_current = 2,
245 },
246 {
247 .id = MC13783_LED_R2,
248 .name = "coreboard-led-5:red",
249 .max_current = 3,
250 },
251 {
252 .id = MC13783_LED_G2,
253 .name = "coreboard-led-5:green",
254 .max_current = 3,
255 },
256 {
257 .id = MC13783_LED_B2,
258 .name = "coreboard-led-5:blue",
259 .max_current = 3,
260 },
261};
262
263static struct mc13783_leds_platform_data moboard_leds = {
264 .num_leds = ARRAY_SIZE(moboard_led),
265 .led = moboard_led,
266 .flags = MC13783_LED_SLEWLIMTC,
267 .abmode = MC13783_LED_AB_DISABLED,
268 .tc1_period = MC13783_LED_PERIOD_10MS,
269 .tc2_period = MC13783_LED_PERIOD_10MS,
270};
271
223static struct mc13783_platform_data moboard_pmic = { 272static struct mc13783_platform_data moboard_pmic = {
224 .regulators = moboard_regulators, 273 .regulators = moboard_regulators,
225 .num_regulators = ARRAY_SIZE(moboard_regulators), 274 .num_regulators = ARRAY_SIZE(moboard_regulators),
275 .leds = &moboard_leds,
226 .flags = MC13783_USE_REGULATOR | MC13783_USE_RTC | 276 .flags = MC13783_USE_REGULATOR | MC13783_USE_RTC |
227 MC13783_USE_ADC, 277 MC13783_USE_ADC | MC13783_USE_LED,
228}; 278};
229 279
230static struct spi_board_info moboard_spi_board_info[] __initdata = { 280static struct spi_board_info moboard_spi_board_info[] __initdata = {
@@ -243,7 +293,7 @@ static int moboard_spi2_cs[] = {
243 MXC_SPI_CS(1), 293 MXC_SPI_CS(1),
244}; 294};
245 295
246static struct spi_imx_master moboard_spi2_master = { 296static const struct spi_imx_master moboard_spi2_pdata __initconst = {
247 .chipselect = moboard_spi2_cs, 297 .chipselect = moboard_spi2_cs,
248 .num_chipselect = ARRAY_SIZE(moboard_spi2_cs), 298 .num_chipselect = ARRAY_SIZE(moboard_spi2_cs),
249}; 299};
@@ -456,15 +506,14 @@ static void __init mxc_board_init(void)
456 506
457 platform_add_devices(devices, ARRAY_SIZE(devices)); 507 platform_add_devices(devices, ARRAY_SIZE(devices));
458 508
459 mxc_register_device(&mxc_uart_device0, &uart0_pdata); 509 imx31_add_imx_uart0(&uart0_pdata);
460 510 imx31_add_imx_uart4(&uart4_pdata);
461 mxc_register_device(&mxc_uart_device4, &uart4_pdata);
462 511
463 mxc_register_device(&mxc_i2c_device0, &moboard_i2c0_pdata); 512 imx31_add_imx_i2c0(&moboard_i2c0_data);
464 mxc_register_device(&mxc_i2c_device1, &moboard_i2c1_pdata); 513 imx31_add_imx_i2c1(&moboard_i2c1_data);
465 514
466 mxc_register_device(&mxc_spi_device1, &moboard_spi1_master); 515 imx31_add_spi_imx1(&moboard_spi1_pdata);
467 mxc_register_device(&mxc_spi_device2, &moboard_spi2_master); 516 imx31_add_spi_imx2(&moboard_spi2_pdata);
468 517
469 gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3), "pmic-irq"); 518 gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3), "pmic-irq");
470 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3)); 519 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3));
diff --git a/arch/arm/mach-mx3/mach-mx35pdk.c b/arch/arm/mach-mx3/mach-mx35_3ds.c
index bcac84d4dca4..1c30d7212f17 100644
--- a/arch/arm/mach-mx3/mach-mx35pdk.c
+++ b/arch/arm/mach-mx3/mach-mx35_3ds.c
@@ -12,10 +12,12 @@
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details. 14 * GNU General Public License for more details.
15 * 15 */
16 * You should have received a copy of the GNU General Public License 16
17 * along with this program; if not, write to the Free Software 17/*
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 18 * This machine is known as:
19 * - i.MX35 3-Stack Development System
20 * - i.MX35 Platform Development Kit (i.MX35 PDK)
19 */ 21 */
20 22
21#include <linux/types.h> 23#include <linux/types.h>
@@ -32,12 +34,12 @@
32 34
33#include <mach/hardware.h> 35#include <mach/hardware.h>
34#include <mach/common.h> 36#include <mach/common.h>
35#include <mach/imx-uart.h>
36#include <mach/iomux-mx35.h> 37#include <mach/iomux-mx35.h>
37 38
39#include "devices-imx35.h"
38#include "devices.h" 40#include "devices.h"
39 41
40static struct imxuart_platform_data uart_pdata = { 42static const struct imxuart_platform_data uart_pdata __initconst = {
41 .flags = IMXUART_HAVE_RTSCTS, 43 .flags = IMXUART_HAVE_RTSCTS,
42}; 44};
43 45
@@ -90,7 +92,7 @@ static void __init mxc_board_init(void)
90 92
91 platform_add_devices(devices, ARRAY_SIZE(devices)); 93 platform_add_devices(devices, ARRAY_SIZE(devices));
92 94
93 mxc_register_device(&mxc_uart_device0, &uart_pdata); 95 imx35_add_imx_uart0(&uart_pdata);
94 96
95 mxc_register_device(&mxc_otg_udc_device, &usb_pdata); 97 mxc_register_device(&mxc_otg_udc_device, &usb_pdata);
96} 98}
diff --git a/arch/arm/mach-mx3/mach-pcm037.c b/arch/arm/mach-mx3/mach-pcm037.c
index bb6c056854e9..8a292dd1a714 100644
--- a/arch/arm/mach-mx3/mach-pcm037.c
+++ b/arch/arm/mach-mx3/mach-pcm037.c
@@ -10,10 +10,6 @@
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details. 12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */ 13 */
18 14
19#include <linux/types.h> 15#include <linux/types.h>
@@ -43,20 +39,17 @@
43#include <asm/mach/arch.h> 39#include <asm/mach/arch.h>
44#include <asm/mach/time.h> 40#include <asm/mach/time.h>
45#include <asm/mach/map.h> 41#include <asm/mach/map.h>
46#include <mach/board-pcm037.h>
47#include <mach/common.h> 42#include <mach/common.h>
48#include <mach/hardware.h> 43#include <mach/hardware.h>
49#include <mach/i2c.h>
50#include <mach/imx-uart.h>
51#include <mach/iomux-mx3.h> 44#include <mach/iomux-mx3.h>
52#include <mach/ipu.h> 45#include <mach/ipu.h>
53#include <mach/mmc.h> 46#include <mach/mmc.h>
54#include <mach/mx3_camera.h> 47#include <mach/mx3_camera.h>
55#include <mach/mx3fb.h> 48#include <mach/mx3fb.h>
56#include <mach/mxc_nand.h>
57#include <mach/mxc_ehci.h> 49#include <mach/mxc_ehci.h>
58#include <mach/ulpi.h> 50#include <mach/ulpi.h>
59 51
52#include "devices-imx31.h"
60#include "devices.h" 53#include "devices.h"
61#include "pcm037.h" 54#include "pcm037.h"
62 55
@@ -225,7 +218,7 @@ static struct platform_device pcm037_flash = {
225 .num_resources = 1, 218 .num_resources = 1,
226}; 219};
227 220
228static struct imxuart_platform_data uart_pdata = { 221static const struct imxuart_platform_data uart_pdata __initconst = {
229 .flags = IMXUART_HAVE_RTSCTS, 222 .flags = IMXUART_HAVE_RTSCTS,
230}; 223};
231 224
@@ -279,16 +272,17 @@ static struct platform_device pcm037_sram_device = {
279 .resource = &pcm038_sram_resource, 272 .resource = &pcm038_sram_resource,
280}; 273};
281 274
282static struct mxc_nand_platform_data pcm037_nand_board_info = { 275static const struct mxc_nand_platform_data
276pcm037_nand_board_info __initconst = {
283 .width = 1, 277 .width = 1,
284 .hw_ecc = 1, 278 .hw_ecc = 1,
285}; 279};
286 280
287static struct imxi2c_platform_data pcm037_i2c_1_data = { 281static const struct imxi2c_platform_data pcm037_i2c1_data __initconst = {
288 .bitrate = 100000, 282 .bitrate = 100000,
289}; 283};
290 284
291static struct imxi2c_platform_data pcm037_i2c_2_data = { 285static const struct imxi2c_platform_data pcm037_i2c2_data __initconst = {
292 .bitrate = 20000, 286 .bitrate = 20000,
293}; 287};
294 288
@@ -615,9 +609,10 @@ static void __init mxc_board_init(void)
615 609
616 platform_add_devices(devices, ARRAY_SIZE(devices)); 610 platform_add_devices(devices, ARRAY_SIZE(devices));
617 611
618 mxc_register_device(&mxc_uart_device0, &uart_pdata); 612 imx31_add_imx_uart0(&uart_pdata);
619 mxc_register_device(&mxc_uart_device1, &uart_pdata); 613 /* XXX: should't this have .flags = 0 (i.e. no RTSCTS) on PCM037_EET? */
620 mxc_register_device(&mxc_uart_device2, &uart_pdata); 614 imx31_add_imx_uart1(&uart_pdata);
615 imx31_add_imx_uart2(&uart_pdata);
621 616
622 mxc_register_device(&mxc_w1_master_device, NULL); 617 mxc_register_device(&mxc_w1_master_device, NULL);
623 618
@@ -635,10 +630,10 @@ static void __init mxc_board_init(void)
635 i2c_register_board_info(1, pcm037_i2c_devices, 630 i2c_register_board_info(1, pcm037_i2c_devices,
636 ARRAY_SIZE(pcm037_i2c_devices)); 631 ARRAY_SIZE(pcm037_i2c_devices));
637 632
638 mxc_register_device(&mxc_i2c_device1, &pcm037_i2c_1_data); 633 imx31_add_imx_i2c1(&pcm037_i2c1_data);
639 mxc_register_device(&mxc_i2c_device2, &pcm037_i2c_2_data); 634 imx31_add_imx_i2c2(&pcm037_i2c2_data);
640 635
641 mxc_register_device(&mxc_nand_device, &pcm037_nand_board_info); 636 imx31_add_mxc_nand(&pcm037_nand_board_info);
642 mxc_register_device(&mxcsdhc_device0, &sdhc_pdata); 637 mxc_register_device(&mxcsdhc_device0, &sdhc_pdata);
643 mxc_register_device(&mx3_ipu, &mx3_ipu_data); 638 mxc_register_device(&mx3_ipu, &mx3_ipu_data);
644 mxc_register_device(&mx3_fb, &mx3fb_pdata); 639 mxc_register_device(&mx3_fb, &mx3fb_pdata);
diff --git a/arch/arm/mach-mx3/mach-pcm037_eet.c b/arch/arm/mach-mx3/mach-pcm037_eet.c
index 8d386000fc40..c8b98218efee 100644
--- a/arch/arm/mach-mx3/mach-pcm037_eet.c
+++ b/arch/arm/mach-mx3/mach-pcm037_eet.c
@@ -13,9 +13,6 @@
13#include <linux/spi/spi.h> 13#include <linux/spi/spi.h>
14 14
15#include <mach/common.h> 15#include <mach/common.h>
16#if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE)
17#include <mach/spi.h>
18#endif
19#include <mach/iomux-mx3.h> 16#include <mach/iomux-mx3.h>
20 17
21#include <asm/mach-types.h> 18#include <asm/mach-types.h>
@@ -64,7 +61,7 @@ static struct spi_board_info pcm037_spi_dev[] = {
64#if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE) 61#if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE)
65static int pcm037_spi1_cs[] = {MXC_SPI_CS(1), IOMUX_TO_GPIO(MX31_PIN_KEY_COL7)}; 62static int pcm037_spi1_cs[] = {MXC_SPI_CS(1), IOMUX_TO_GPIO(MX31_PIN_KEY_COL7)};
66 63
67struct spi_imx_master pcm037_spi1_master = { 64static const struct spi_imx_master pcm037_spi1_pdata __initconst = {
68 .chipselect = pcm037_spi1_cs, 65 .chipselect = pcm037_spi1_cs,
69 .num_chipselect = ARRAY_SIZE(pcm037_spi1_cs), 66 .num_chipselect = ARRAY_SIZE(pcm037_spi1_cs),
70}; 67};
@@ -184,7 +181,7 @@ static int eet_init_devices(void)
184 /* SPI */ 181 /* SPI */
185 spi_register_board_info(pcm037_spi_dev, ARRAY_SIZE(pcm037_spi_dev)); 182 spi_register_board_info(pcm037_spi_dev, ARRAY_SIZE(pcm037_spi_dev));
186#if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE) 183#if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE)
187 mxc_register_device(&mxc_spi_device0, &pcm037_spi1_master); 184 imx35_add_spi_imx0(&pcm037_spi1_pdata);
188#endif 185#endif
189 186
190 platform_device_register(&pcm037_gpio_keys_device); 187 platform_device_register(&pcm037_gpio_keys_device);
diff --git a/arch/arm/mach-mx3/mach-pcm043.c b/arch/arm/mach-mx3/mach-pcm043.c
index 8071b7281c4b..b92f624c755e 100644
--- a/arch/arm/mach-mx3/mach-pcm043.c
+++ b/arch/arm/mach-mx3/mach-pcm043.c
@@ -10,10 +10,6 @@
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details. 12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */ 13 */
18 14
19#include <linux/types.h> 15#include <linux/types.h>
@@ -40,19 +36,15 @@
40 36
41#include <mach/hardware.h> 37#include <mach/hardware.h>
42#include <mach/common.h> 38#include <mach/common.h>
43#include <mach/imx-uart.h>
44#if defined CONFIG_I2C_IMX || defined CONFIG_I2C_IMX_MODULE
45#include <mach/i2c.h>
46#endif
47#include <mach/iomux-mx35.h> 39#include <mach/iomux-mx35.h>
48#include <mach/ipu.h> 40#include <mach/ipu.h>
49#include <mach/mx3fb.h> 41#include <mach/mx3fb.h>
50#include <mach/mxc_nand.h>
51#include <mach/mxc_ehci.h> 42#include <mach/mxc_ehci.h>
52#include <mach/ulpi.h> 43#include <mach/ulpi.h>
53#include <mach/audmux.h> 44#include <mach/audmux.h>
54#include <mach/ssi.h> 45#include <mach/ssi.h>
55 46
47#include "devices-imx35.h"
56#include "devices.h" 48#include "devices.h"
57 49
58static const struct fb_videomode fb_modedb[] = { 50static const struct fb_videomode fb_modedb[] = {
@@ -122,12 +114,12 @@ static struct platform_device pcm043_flash = {
122 .num_resources = 1, 114 .num_resources = 1,
123}; 115};
124 116
125static struct imxuart_platform_data uart_pdata = { 117static const struct imxuart_platform_data uart_pdata __initconst = {
126 .flags = IMXUART_HAVE_RTSCTS, 118 .flags = IMXUART_HAVE_RTSCTS,
127}; 119};
128 120
129#if defined CONFIG_I2C_IMX || defined CONFIG_I2C_IMX_MODULE 121#if defined CONFIG_I2C_IMX || defined CONFIG_I2C_IMX_MODULE
130static struct imxi2c_platform_data pcm043_i2c_1_data = { 122static const struct imxi2c_platform_data pcm043_i2c0_data __initconst = {
131 .bitrate = 50000, 123 .bitrate = 50000,
132}; 124};
133 125
@@ -304,7 +296,8 @@ static struct imx_ssi_platform_data pcm043_ssi_pdata = {
304 .flags = IMX_SSI_USE_AC97, 296 .flags = IMX_SSI_USE_AC97,
305}; 297};
306 298
307static struct mxc_nand_platform_data pcm037_nand_board_info = { 299static const struct mxc_nand_platform_data
300pcm037_nand_board_info __initconst = {
308 .width = 1, 301 .width = 1,
309 .hw_ecc = 1, 302 .hw_ecc = 1,
310}; 303};
@@ -363,17 +356,17 @@ static void __init mxc_board_init(void)
363 356
364 platform_add_devices(devices, ARRAY_SIZE(devices)); 357 platform_add_devices(devices, ARRAY_SIZE(devices));
365 358
366 mxc_register_device(&mxc_uart_device0, &uart_pdata); 359 imx35_add_imx_uart0(&uart_pdata);
367 mxc_register_device(&mxc_nand_device, &pcm037_nand_board_info); 360 imx35_add_mxc_nand(&pcm037_nand_board_info);
368 mxc_register_device(&imx_ssi_device0, &pcm043_ssi_pdata); 361 mxc_register_device(&imx_ssi_device0, &pcm043_ssi_pdata);
369 362
370 mxc_register_device(&mxc_uart_device1, &uart_pdata); 363 imx35_add_imx_uart1(&uart_pdata);
371 364
372#if defined CONFIG_I2C_IMX || defined CONFIG_I2C_IMX_MODULE 365#if defined CONFIG_I2C_IMX || defined CONFIG_I2C_IMX_MODULE
373 i2c_register_board_info(0, pcm043_i2c_devices, 366 i2c_register_board_info(0, pcm043_i2c_devices,
374 ARRAY_SIZE(pcm043_i2c_devices)); 367 ARRAY_SIZE(pcm043_i2c_devices));
375 368
376 mxc_register_device(&mxc_i2c_device0, &pcm043_i2c_1_data); 369 imx35_add_imx_i2c0(&pcm043_i2c0_data);
377#endif 370#endif
378 371
379 mxc_register_device(&mx3_ipu, &mx3_ipu_data); 372 mxc_register_device(&mx3_ipu, &mx3_ipu_data);
diff --git a/arch/arm/mach-mx3/mach-qong.c b/arch/arm/mach-mx3/mach-qong.c
index e5b5b8323a17..d44ac70222a5 100644
--- a/arch/arm/mach-mx3/mach-qong.c
+++ b/arch/arm/mach-mx3/mach-qong.c
@@ -10,10 +10,6 @@
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details. 12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */ 13 */
18 14
19#include <linux/types.h> 15#include <linux/types.h>
@@ -34,9 +30,9 @@
34#include <mach/common.h> 30#include <mach/common.h>
35#include <asm/page.h> 31#include <asm/page.h>
36#include <asm/setup.h> 32#include <asm/setup.h>
37#include <mach/board-qong.h>
38#include <mach/imx-uart.h>
39#include <mach/iomux-mx3.h> 33#include <mach/iomux-mx3.h>
34
35#include "devices-imx31.h"
40#include "devices.h" 36#include "devices.h"
41 37
42/* FPGA defines */ 38/* FPGA defines */
@@ -62,7 +58,7 @@
62 * This file contains the board-specific initialization routines. 58 * This file contains the board-specific initialization routines.
63 */ 59 */
64 60
65static struct imxuart_platform_data uart_pdata = { 61static const struct imxuart_platform_data uart_pdata __initconst = {
66 .flags = IMXUART_HAVE_RTSCTS, 62 .flags = IMXUART_HAVE_RTSCTS,
67}; 63};
68 64
@@ -73,11 +69,11 @@ static int uart_pins[] = {
73 MX31_PIN_RXD1__RXD1 69 MX31_PIN_RXD1__RXD1
74}; 70};
75 71
76static inline void mxc_init_imx_uart(void) 72static inline void __init mxc_init_imx_uart(void)
77{ 73{
78 mxc_iomux_setup_multiple_pins(uart_pins, ARRAY_SIZE(uart_pins), 74 mxc_iomux_setup_multiple_pins(uart_pins, ARRAY_SIZE(uart_pins),
79 "uart-0"); 75 "uart-0");
80 mxc_register_device(&mxc_uart_device0, &uart_pdata); 76 imx31_add_imx_uart0(&uart_pdata);
81} 77}
82 78
83static struct resource dnet_resources[] = { 79static struct resource dnet_resources[] = {
@@ -116,7 +112,7 @@ static struct physmap_flash_data qong_flash_data = {
116 112
117static struct resource qong_flash_resource = { 113static struct resource qong_flash_resource = {
118 .start = MX31_CS0_BASE_ADDR, 114 .start = MX31_CS0_BASE_ADDR,
119 .end = MX31_CS0_BASE_ADDR + QONG_NOR_SIZE - 1, 115 .end = MX31_CS0_BASE_ADDR + SZ_128M - 1,
120 .flags = IORESOURCE_MEM, 116 .flags = IORESOURCE_MEM,
121}; 117};
122 118
diff --git a/arch/arm/mach-mx3/mm.c b/arch/arm/mach-mx3/mm.c
index 6858a4f9806c..a378fba49a8b 100644
--- a/arch/arm/mach-mx3/mm.c
+++ b/arch/arm/mach-mx3/mm.c
@@ -14,10 +14,6 @@
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details. 16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */ 17 */
22 18
23#include <linux/mm.h> 19#include <linux/mm.h>
@@ -97,8 +93,11 @@ void __init mx35_map_io(void)
97} 93}
98#endif 94#endif
99 95
96int imx3x_register_gpios(void);
97
100void __init mx31_init_irq(void) 98void __init mx31_init_irq(void)
101{ 99{
100 imx3x_register_gpios();
102 mxc_init_irq(IO_ADDRESS(AVIC_BASE_ADDR)); 101 mxc_init_irq(IO_ADDRESS(AVIC_BASE_ADDR));
103} 102}
104 103
diff --git a/arch/arm/mach-mx3/mx31lilly-db.c b/arch/arm/mach-mx3/mx31lilly-db.c
index 7aebd74a12e8..827fd3c80201 100644
--- a/arch/arm/mach-mx3/mx31lilly-db.c
+++ b/arch/arm/mach-mx3/mx31lilly-db.c
@@ -18,10 +18,6 @@
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details. 20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */ 21 */
26 22
27#include <linux/kernel.h> 23#include <linux/kernel.h>
@@ -36,13 +32,13 @@
36 32
37#include <mach/hardware.h> 33#include <mach/hardware.h>
38#include <mach/common.h> 34#include <mach/common.h>
39#include <mach/imx-uart.h>
40#include <mach/iomux-mx3.h> 35#include <mach/iomux-mx3.h>
41#include <mach/board-mx31lilly.h> 36#include <mach/board-mx31lilly.h>
42#include <mach/mmc.h> 37#include <mach/mmc.h>
43#include <mach/mx3fb.h> 38#include <mach/mx3fb.h>
44#include <mach/ipu.h> 39#include <mach/ipu.h>
45 40
41#include "devices-imx31.h"
46#include "devices.h" 42#include "devices.h"
47 43
48/* 44/*
@@ -96,7 +92,7 @@ static unsigned int lilly_db_board_pins[] __initdata = {
96}; 92};
97 93
98/* UART */ 94/* UART */
99static struct imxuart_platform_data uart_pdata __initdata = { 95static const struct imxuart_platform_data uart_pdata __initconst = {
100 .flags = IMXUART_HAVE_RTSCTS, 96 .flags = IMXUART_HAVE_RTSCTS,
101}; 97};
102 98
@@ -217,9 +213,9 @@ void __init mx31lilly_db_init(void)
217 mxc_iomux_setup_multiple_pins(lilly_db_board_pins, 213 mxc_iomux_setup_multiple_pins(lilly_db_board_pins,
218 ARRAY_SIZE(lilly_db_board_pins), 214 ARRAY_SIZE(lilly_db_board_pins),
219 "development board pins"); 215 "development board pins");
220 mxc_register_device(&mxc_uart_device0, &uart_pdata); 216 imx31_add_imx_uart0(&uart_pdata);
221 mxc_register_device(&mxc_uart_device1, &uart_pdata); 217 imx31_add_imx_uart1(&uart_pdata);
222 mxc_register_device(&mxc_uart_device2, &uart_pdata); 218 imx31_add_imx_uart2(&uart_pdata);
223 mxc_register_device(&mxcsdhc_device0, &mmc_pdata); 219 mxc_register_device(&mxcsdhc_device0, &mmc_pdata);
224 mx31lilly_init_fb(); 220 mx31lilly_init_fb();
225} 221}
diff --git a/arch/arm/mach-mx3/mx31lite-db.c b/arch/arm/mach-mx3/mx31lite-db.c
index 5f05bfbec380..7b0e74e275ba 100644
--- a/arch/arm/mach-mx3/mx31lite-db.c
+++ b/arch/arm/mach-mx3/mx31lite-db.c
@@ -18,10 +18,6 @@
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details. 20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */ 21 */
26 22
27#include <linux/kernel.h> 23#include <linux/kernel.h>
@@ -37,12 +33,11 @@
37 33
38#include <mach/hardware.h> 34#include <mach/hardware.h>
39#include <mach/common.h> 35#include <mach/common.h>
40#include <mach/imx-uart.h>
41#include <mach/iomux-mx3.h> 36#include <mach/iomux-mx3.h>
42#include <mach/board-mx31lite.h> 37#include <mach/board-mx31lite.h>
43#include <mach/mmc.h> 38#include <mach/mmc.h>
44#include <mach/spi.h>
45 39
40#include "devices-imx31.h"
46#include "devices.h" 41#include "devices.h"
47 42
48/* 43/*
@@ -76,7 +71,7 @@ static unsigned int litekit_db_board_pins[] __initdata = {
76}; 71};
77 72
78/* UART */ 73/* UART */
79static struct imxuart_platform_data uart_pdata __initdata = { 74static const struct imxuart_platform_data uart_pdata __initconst = {
80 .flags = IMXUART_HAVE_RTSCTS, 75 .flags = IMXUART_HAVE_RTSCTS,
81}; 76};
82 77
@@ -161,7 +156,7 @@ static int spi_internal_chipselect[] = {
161 MXC_SPI_CS(2), 156 MXC_SPI_CS(2),
162}; 157};
163 158
164static struct spi_imx_master spi0_pdata = { 159static const struct spi_imx_master spi0_pdata __initconst = {
165 .chipselect = spi_internal_chipselect, 160 .chipselect = spi_internal_chipselect,
166 .num_chipselect = ARRAY_SIZE(spi_internal_chipselect), 161 .num_chipselect = ARRAY_SIZE(spi_internal_chipselect),
167}; 162};
@@ -201,9 +196,9 @@ void __init mx31lite_db_init(void)
201 mxc_iomux_setup_multiple_pins(litekit_db_board_pins, 196 mxc_iomux_setup_multiple_pins(litekit_db_board_pins,
202 ARRAY_SIZE(litekit_db_board_pins), 197 ARRAY_SIZE(litekit_db_board_pins),
203 "development board pins"); 198 "development board pins");
204 mxc_register_device(&mxc_uart_device0, &uart_pdata); 199 imx31_add_imx_uart0(&uart_pdata);
205 mxc_register_device(&mxcsdhc_device0, &mmc_pdata); 200 mxc_register_device(&mxcsdhc_device0, &mmc_pdata);
206 mxc_register_device(&mxc_spi_device0, &spi0_pdata); 201 imx31_add_spi_imx0(&spi0_pdata);
207 platform_device_register(&litekit_led_device); 202 platform_device_register(&litekit_led_device);
208 mxc_register_device(&imx_wdt_device0, NULL); 203 mxc_register_device(&imx_wdt_device0, NULL);
209 mxc_register_device(&imx_rtc_device0, NULL); 204 mxc_register_device(&imx_rtc_device0, NULL);
diff --git a/arch/arm/mach-mx3/mx31moboard-devboard.c b/arch/arm/mach-mx3/mx31moboard-devboard.c
index 582299cb2c08..fc395a7a8599 100644
--- a/arch/arm/mach-mx3/mx31moboard-devboard.c
+++ b/arch/arm/mach-mx3/mx31moboard-devboard.c
@@ -10,10 +10,6 @@
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details. 12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */ 13 */
18 14
19#include <linux/gpio.h> 15#include <linux/gpio.h>
@@ -27,13 +23,13 @@
27#include <linux/usb/otg.h> 23#include <linux/usb/otg.h>
28 24
29#include <mach/common.h> 25#include <mach/common.h>
30#include <mach/imx-uart.h>
31#include <mach/iomux-mx3.h> 26#include <mach/iomux-mx3.h>
32#include <mach/hardware.h> 27#include <mach/hardware.h>
33#include <mach/mmc.h> 28#include <mach/mmc.h>
34#include <mach/mxc_ehci.h> 29#include <mach/mxc_ehci.h>
35#include <mach/ulpi.h> 30#include <mach/ulpi.h>
36 31
32#include "devices-imx31.h"
37#include "devices.h" 33#include "devices.h"
38 34
39static unsigned int devboard_pins[] = { 35static unsigned int devboard_pins[] = {
@@ -56,7 +52,7 @@ static unsigned int devboard_pins[] = {
56 MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11, 52 MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11,
57}; 53};
58 54
59static struct imxuart_platform_data uart_pdata = { 55static const struct imxuart_platform_data uart_pdata __initconst = {
60 .flags = IMXUART_HAVE_RTSCTS, 56 .flags = IMXUART_HAVE_RTSCTS,
61}; 57};
62 58
@@ -230,7 +226,7 @@ void __init mx31moboard_devboard_init(void)
230 mxc_iomux_setup_multiple_pins(devboard_pins, ARRAY_SIZE(devboard_pins), 226 mxc_iomux_setup_multiple_pins(devboard_pins, ARRAY_SIZE(devboard_pins),
231 "devboard"); 227 "devboard");
232 228
233 mxc_register_device(&mxc_uart_device1, &uart_pdata); 229 imx31_add_imx_uart1(&uart_pdata);
234 230
235 mxc_register_device(&mxcsdhc_device1, &sdhc2_pdata); 231 mxc_register_device(&mxcsdhc_device1, &sdhc2_pdata);
236 232
diff --git a/arch/arm/mach-mx3/mx31moboard-marxbot.c b/arch/arm/mach-mx3/mx31moboard-marxbot.c
index 4930f8c27e66..0551eb39d97e 100644
--- a/arch/arm/mach-mx3/mx31moboard-marxbot.c
+++ b/arch/arm/mach-mx3/mx31moboard-marxbot.c
@@ -10,10 +10,6 @@
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details. 12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */ 13 */
18 14
19#include <linux/delay.h> 15#include <linux/delay.h>
diff --git a/arch/arm/mach-mx3/mx31moboard-smartbot.c b/arch/arm/mach-mx3/mx31moboard-smartbot.c
index 293eea6d9d97..40c3e7564cb6 100644
--- a/arch/arm/mach-mx3/mx31moboard-smartbot.c
+++ b/arch/arm/mach-mx3/mx31moboard-smartbot.c
@@ -10,10 +10,6 @@
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details. 12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */ 13 */
18 14
19#include <linux/delay.h> 15#include <linux/delay.h>
@@ -30,7 +26,6 @@
30 26
31#include <mach/common.h> 27#include <mach/common.h>
32#include <mach/hardware.h> 28#include <mach/hardware.h>
33#include <mach/imx-uart.h>
34#include <mach/iomux-mx3.h> 29#include <mach/iomux-mx3.h>
35#include <mach/board-mx31moboard.h> 30#include <mach/board-mx31moboard.h>
36#include <mach/mxc_ehci.h> 31#include <mach/mxc_ehci.h>
@@ -38,6 +33,7 @@
38 33
39#include <media/soc_camera.h> 34#include <media/soc_camera.h>
40 35
36#include "devices-imx31.h"
41#include "devices.h" 37#include "devices.h"
42 38
43static unsigned int smartbot_pins[] = { 39static unsigned int smartbot_pins[] = {
@@ -59,7 +55,7 @@ static unsigned int smartbot_pins[] = {
59 MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11, 55 MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11,
60}; 56};
61 57
62static struct imxuart_platform_data uart_pdata = { 58static const struct imxuart_platform_data uart_pdata __initconst = {
63 .flags = IMXUART_HAVE_RTSCTS, 59 .flags = IMXUART_HAVE_RTSCTS,
64}; 60};
65 61
@@ -183,8 +179,7 @@ void __init mx31moboard_smartbot_init(int board)
183 mxc_iomux_setup_multiple_pins(smartbot_pins, ARRAY_SIZE(smartbot_pins), 179 mxc_iomux_setup_multiple_pins(smartbot_pins, ARRAY_SIZE(smartbot_pins),
184 "smartbot"); 180 "smartbot");
185 181
186 mxc_register_device(&mxc_uart_device1, &uart_pdata); 182 imx31_add_imx_uart1(&uart_pdata);
187
188 183
189 switch (board) { 184 switch (board) {
190 case MX31SMARTBOT: 185 case MX31SMARTBOT:
diff --git a/arch/arm/mach-mx5/devices.c b/arch/arm/mach-mx5/devices.c
index ede4fcbc7e80..fa118646c99e 100644
--- a/arch/arm/mach-mx5/devices.c
+++ b/arch/arm/mach-mx5/devices.c
@@ -253,7 +253,7 @@ static struct mxc_gpio_port mxc_gpio_ports[] = {
253 }, 253 },
254}; 254};
255 255
256int __init mxc_register_gpios(void) 256int __init imx51_register_gpios(void)
257{ 257{
258 return mxc_gpio_init(mxc_gpio_ports, ARRAY_SIZE(mxc_gpio_ports)); 258 return mxc_gpio_init(mxc_gpio_ports, ARRAY_SIZE(mxc_gpio_ports));
259} 259}
diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c
index b7677ef80cc4..2f79722508cf 100644
--- a/arch/arm/mach-mx5/mm.c
+++ b/arch/arm/mach-mx5/mm.c
@@ -65,6 +65,8 @@ void __init mx51_map_io(void)
65 iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); 65 iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
66} 66}
67 67
68int imx51_register_gpios(void);
69
68void __init mx51_init_irq(void) 70void __init mx51_init_irq(void)
69{ 71{
70 unsigned long tzic_addr; 72 unsigned long tzic_addr;
@@ -79,5 +81,6 @@ void __init mx51_init_irq(void)
79 if (!tzic_virt) 81 if (!tzic_virt)
80 panic("unable to map TZIC interrupt controller\n"); 82 panic("unable to map TZIC interrupt controller\n");
81 83
84 imx51_register_gpios();
82 tzic_init_irq(tzic_virt); 85 tzic_init_irq(tzic_virt);
83} 86}
diff --git a/arch/arm/mach-mxc91231/crm_regs.h b/arch/arm/mach-mxc91231/crm_regs.h
index ce4f59058189..b989baccd675 100644
--- a/arch/arm/mach-mxc91231/crm_regs.h
+++ b/arch/arm/mach-mxc91231/crm_regs.h
@@ -11,11 +11,6 @@
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 *
19 */ 14 */
20 15
21#ifndef _ARCH_ARM_MACH_MXC91231_CRM_REGS_H_ 16#ifndef _ARCH_ARM_MACH_MXC91231_CRM_REGS_H_
diff --git a/arch/arm/mach-mxc91231/devices.c b/arch/arm/mach-mxc91231/devices.c
index 353bd977b393..027af4f0d18a 100644
--- a/arch/arm/mach-mxc91231/devices.c
+++ b/arch/arm/mach-mxc91231/devices.c
@@ -135,7 +135,7 @@ static struct mxc_gpio_port mxc_gpio_ports[] = {
135 }, 135 },
136}; 136};
137 137
138int __init mxc_register_gpios(void) 138int __init mxc91231_register_gpios(void)
139{ 139{
140 return mxc_gpio_init(mxc_gpio_ports, ARRAY_SIZE(mxc_gpio_ports)); 140 return mxc_gpio_init(mxc_gpio_ports, ARRAY_SIZE(mxc_gpio_ports));
141} 141}
diff --git a/arch/arm/mach-mxc91231/mm.c b/arch/arm/mach-mxc91231/mm.c
index 6becda3ff331..aeccfd755fee 100644
--- a/arch/arm/mach-mxc91231/mm.c
+++ b/arch/arm/mach-mxc91231/mm.c
@@ -15,11 +15,6 @@
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details. 17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
23 */ 18 */
24 19
25#include <linux/mm.h> 20#include <linux/mm.h>
@@ -88,7 +83,10 @@ void __init mxc91231_map_io(void)
88 iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); 83 iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
89} 84}
90 85
86int mxc91231_register_gpios(void);
87
91void __init mxc91231_init_irq(void) 88void __init mxc91231_init_irq(void)
92{ 89{
90 mxc91231_register_gpios();
93 mxc_init_irq(MXC91231_IO_ADDRESS(MXC91231_AVIC_BASE_ADDR)); 91 mxc_init_irq(MXC91231_IO_ADDRESS(MXC91231_AVIC_BASE_ADDR));
94} 92}
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index e7d629b3c76a..f474a80b8867 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -137,9 +137,7 @@ static void ads7846_dev_init(void)
137 } 137 }
138 138
139 gpio_direction_input(ts_gpio); 139 gpio_direction_input(ts_gpio);
140 140 gpio_set_debounce(ts_gpio, 310);
141 omap_set_gpio_debounce(ts_gpio, 1);
142 omap_set_gpio_debounce_time(ts_gpio, 0xa);
143} 141}
144 142
145static int ads7846_get_pendown_state(void) 143static int ads7846_get_pendown_state(void)
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index 5fcb52e71298..fefd7e6e9779 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -209,8 +209,7 @@ static void ads7846_dev_init(void)
209 } 209 }
210 210
211 gpio_direction_input(ts_gpio); 211 gpio_direction_input(ts_gpio);
212 omap_set_gpio_debounce(ts_gpio, 1); 212 gpio_set_debounce(ts_gpio, 310);
213 omap_set_gpio_debounce_time(ts_gpio, 0xa);
214} 213}
215 214
216static int ads7846_get_pendown_state(void) 215static int ads7846_get_pendown_state(void)
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index 81bba194b030..b95261013812 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -579,9 +579,7 @@ static void ads7846_dev_init(void)
579 printk(KERN_ERR "can't get ads7846 pen down GPIO\n"); 579 printk(KERN_ERR "can't get ads7846 pen down GPIO\n");
580 580
581 gpio_direction_input(OMAP3_EVM_TS_GPIO); 581 gpio_direction_input(OMAP3_EVM_TS_GPIO);
582 582 gpio_set_debounce(OMAP3_EVM_TS_GPIO, 310);
583 omap_set_gpio_debounce(OMAP3_EVM_TS_GPIO, 1);
584 omap_set_gpio_debounce_time(OMAP3_EVM_TS_GPIO, 0xa);
585} 583}
586 584
587static int ads7846_get_pendown_state(void) 585static int ads7846_get_pendown_state(void)
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index 395d049bf010..db06dc910ba7 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -130,8 +130,8 @@ static struct platform_device pandora_keys_gpio = {
130static void __init pandora_keys_gpio_init(void) 130static void __init pandora_keys_gpio_init(void)
131{ 131{
132 /* set debounce time for GPIO banks 4 and 6 */ 132 /* set debounce time for GPIO banks 4 and 6 */
133 omap_set_gpio_debounce_time(32 * 3, GPIO_DEBOUNCE_TIME); 133 gpio_set_debounce(32 * 3, GPIO_DEBOUNCE_TIME);
134 omap_set_gpio_debounce_time(32 * 5, GPIO_DEBOUNCE_TIME); 134 gpio_set_debounce(32 * 5, GPIO_DEBOUNCE_TIME);
135} 135}
136 136
137static int board_keymap[] = { 137static int board_keymap[] = {
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c
index 2504d41f923e..2f5f8233dd5b 100644
--- a/arch/arm/mach-omap2/board-omap3touchbook.c
+++ b/arch/arm/mach-omap2/board-omap3touchbook.c
@@ -328,8 +328,7 @@ static void __init omap3_ads7846_init(void)
328 } 328 }
329 329
330 gpio_direction_input(OMAP3_TS_GPIO); 330 gpio_direction_input(OMAP3_TS_GPIO);
331 omap_set_gpio_debounce(OMAP3_TS_GPIO, 1); 331 gpio_set_debounce(OMAP3_TS_GPIO, 310);
332 omap_set_gpio_debounce_time(OMAP3_TS_GPIO, 0xa);
333} 332}
334 333
335static struct ads7846_platform_data ads7846_config = { 334static struct ads7846_platform_data ads7846_config = {
diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c
index 685f34a9634b..fe0de1698edc 100644
--- a/arch/arm/mach-orion5x/dns323-setup.c
+++ b/arch/arm/mach-orion5x/dns323-setup.c
@@ -240,22 +240,23 @@ error_fail:
240 240
241#define ORION_BLINK_HALF_PERIOD 100 /* ms */ 241#define ORION_BLINK_HALF_PERIOD 100 /* ms */
242 242
243static int dns323_gpio_blink_set(unsigned gpio, 243static int dns323_gpio_blink_set(unsigned gpio, int state,
244 unsigned long *delay_on, unsigned long *delay_off) 244 unsigned long *delay_on, unsigned long *delay_off)
245{ 245{
246 static int value = 0;
247 246
248 if (!*delay_on && !*delay_off) 247 if (delay_on && delay_off && !*delay_on && !*delay_off)
249 *delay_on = *delay_off = ORION_BLINK_HALF_PERIOD; 248 *delay_on = *delay_off = ORION_BLINK_HALF_PERIOD;
250 249
251 if (ORION_BLINK_HALF_PERIOD == *delay_on 250 switch(state) {
252 && ORION_BLINK_HALF_PERIOD == *delay_off) { 251 case GPIO_LED_NO_BLINK_LOW:
253 value = !value; 252 case GPIO_LED_NO_BLINK_HIGH:
254 orion_gpio_set_blink(gpio, value); 253 orion_gpio_set_blink(gpio, 0);
255 return 0; 254 gpio_set_value(gpio, state);
255 break;
256 case GPIO_LED_BLINK:
257 orion_gpio_set_blink(gpio, 1);
256 } 258 }
257 259 return 0;
258 return -EINVAL;
259} 260}
260 261
261static struct gpio_led dns323_leds[] = { 262static struct gpio_led dns323_leds[] = {
@@ -263,6 +264,7 @@ static struct gpio_led dns323_leds[] = {
263 .name = "power:blue", 264 .name = "power:blue",
264 .gpio = DNS323_GPIO_LED_POWER2, 265 .gpio = DNS323_GPIO_LED_POWER2,
265 .default_trigger = "timer", 266 .default_trigger = "timer",
267 .active_low = 1,
266 }, { 268 }, {
267 .name = "right:amber", 269 .name = "right:amber",
268 .gpio = DNS323_GPIO_LED_RIGHT_AMBER, 270 .gpio = DNS323_GPIO_LED_RIGHT_AMBER,
diff --git a/arch/arm/mach-s3c2440/mach-gta02.c b/arch/arm/mach-s3c2440/mach-gta02.c
index 45799c608d8f..9e39faa283b9 100644
--- a/arch/arm/mach-s3c2440/mach-gta02.c
+++ b/arch/arm/mach-s3c2440/mach-gta02.c
@@ -49,7 +49,6 @@
49#include <linux/io.h> 49#include <linux/io.h>
50 50
51#include <linux/i2c.h> 51#include <linux/i2c.h>
52#include <linux/backlight.h>
53#include <linux/regulator/machine.h> 52#include <linux/regulator/machine.h>
54 53
55#include <linux/mfd/pcf50633/core.h> 54#include <linux/mfd/pcf50633/core.h>
@@ -57,6 +56,7 @@
57#include <linux/mfd/pcf50633/adc.h> 56#include <linux/mfd/pcf50633/adc.h>
58#include <linux/mfd/pcf50633/gpio.h> 57#include <linux/mfd/pcf50633/gpio.h>
59#include <linux/mfd/pcf50633/pmic.h> 58#include <linux/mfd/pcf50633/pmic.h>
59#include <linux/mfd/pcf50633/backlight.h>
60 60
61#include <asm/mach/arch.h> 61#include <asm/mach/arch.h>
62#include <asm/mach/map.h> 62#include <asm/mach/map.h>
@@ -254,6 +254,12 @@ static char *gta02_batteries[] = {
254 "battery", 254 "battery",
255}; 255};
256 256
257static struct pcf50633_bl_platform_data gta02_backlight_data = {
258 .default_brightness = 0x3f,
259 .default_brightness_limit = 0,
260 .ramp_time = 5,
261};
262
257struct pcf50633_platform_data gta02_pcf_pdata = { 263struct pcf50633_platform_data gta02_pcf_pdata = {
258 .resumers = { 264 .resumers = {
259 [0] = PCF50633_INT1_USBINS | 265 [0] = PCF50633_INT1_USBINS |
@@ -271,6 +277,8 @@ struct pcf50633_platform_data gta02_pcf_pdata = {
271 277
272 .charger_reference_current_ma = 1000, 278 .charger_reference_current_ma = 1000,
273 279
280 .backlight_data = &gta02_backlight_data,
281
274 .reg_init_data = { 282 .reg_init_data = {
275 [PCF50633_REGULATOR_AUTO] = { 283 [PCF50633_REGULATOR_AUTO] = {
276 .constraints = { 284 .constraints = {
@@ -478,71 +486,6 @@ static struct s3c2410_udc_mach_info gta02_udc_cfg = {
478 486
479}; 487};
480 488
481
482
483static void gta02_bl_set_intensity(int intensity)
484{
485 struct pcf50633 *pcf = gta02_pcf;
486 int old_intensity = pcf50633_reg_read(pcf, PCF50633_REG_LEDOUT);
487
488 /* We map 8-bit intensity to 6-bit intensity in hardware. */
489 intensity >>= 2;
490
491 /*
492 * This can happen during, eg, print of panic on blanked console,
493 * but we can't service i2c without interrupts active, so abort.
494 */
495 if (in_atomic()) {
496 printk(KERN_ERR "gta02_bl_set_intensity called while atomic\n");
497 return;
498 }
499
500 old_intensity = pcf50633_reg_read(pcf, PCF50633_REG_LEDOUT);
501 if (intensity == old_intensity)
502 return;
503
504 /* We can't do this anywhere else. */
505 pcf50633_reg_write(pcf, PCF50633_REG_LEDDIM, 5);
506
507 if (!(pcf50633_reg_read(pcf, PCF50633_REG_LEDENA) & 3))
508 old_intensity = 0;
509
510 /*
511 * The PCF50633 cannot handle LEDOUT = 0 (datasheet p60)
512 * if seen, you have to re-enable the LED unit.
513 */
514 if (!intensity || !old_intensity)
515 pcf50633_reg_write(pcf, PCF50633_REG_LEDENA, 0);
516
517 /* Illegal to set LEDOUT to 0. */
518 if (!intensity)
519 pcf50633_reg_set_bit_mask(pcf, PCF50633_REG_LEDOUT, 0x3f, 2);
520 else
521 pcf50633_reg_set_bit_mask(pcf, PCF50633_REG_LEDOUT, 0x3f,
522 intensity);
523
524 if (intensity)
525 pcf50633_reg_write(pcf, PCF50633_REG_LEDENA, 2);
526
527}
528
529static struct generic_bl_info gta02_bl_info = {
530 .name = "gta02-bl",
531 .max_intensity = 0xff,
532 .default_intensity = 0xff,
533 .set_bl_intensity = gta02_bl_set_intensity,
534};
535
536static struct platform_device gta02_bl_dev = {
537 .name = "generic-bl",
538 .id = 1,
539 .dev = {
540 .platform_data = &gta02_bl_info,
541 },
542};
543
544
545
546/* USB */ 489/* USB */
547static struct s3c2410_hcd_info gta02_usb_info __initdata = { 490static struct s3c2410_hcd_info gta02_usb_info __initdata = {
548 .port[0] = { 491 .port[0] = {
@@ -579,7 +522,6 @@ static struct platform_device *gta02_devices[] __initdata = {
579/* These guys DO need to be children of PMU. */ 522/* These guys DO need to be children of PMU. */
580 523
581static struct platform_device *gta02_devices_pmu_children[] = { 524static struct platform_device *gta02_devices_pmu_children[] = {
582 &gta02_bl_dev,
583}; 525};
584 526
585 527
diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c
index 7a4138beb665..fbd85a9b7bbf 100644
--- a/arch/arm/mach-s3c64xx/clock.c
+++ b/arch/arm/mach-s3c64xx/clock.c
@@ -259,6 +259,12 @@ static struct clk init_clocks[] = {
259 .enable = s3c64xx_hclk_ctrl, 259 .enable = s3c64xx_hclk_ctrl,
260 .ctrlbit = S3C_CLKCON_HCLK_HSMMC2, 260 .ctrlbit = S3C_CLKCON_HCLK_HSMMC2,
261 }, { 261 }, {
262 .name = "otg",
263 .id = -1,
264 .parent = &clk_h,
265 .enable = s3c64xx_hclk_ctrl,
266 .ctrlbit = S3C_CLKCON_HCLK_USB,
267 }, {
262 .name = "timers", 268 .name = "timers",
263 .id = -1, 269 .id = -1,
264 .parent = &clk_p, 270 .parent = &clk_p,
diff --git a/arch/arm/mach-s5p6440/include/mach/irqs.h b/arch/arm/mach-s5p6440/include/mach/irqs.h
index a4b9b40d18f2..911854d9ad42 100644
--- a/arch/arm/mach-s5p6440/include/mach/irqs.h
+++ b/arch/arm/mach-s5p6440/include/mach/irqs.h
@@ -72,7 +72,14 @@
72#define S5P_IRQ_EINT_BASE (S5P_IRQ_VIC1(31) + 6) 72#define S5P_IRQ_EINT_BASE (S5P_IRQ_VIC1(31) + 6)
73 73
74#define S5P_EINT(x) ((x) + S5P_IRQ_EINT_BASE) 74#define S5P_EINT(x) ((x) + S5P_IRQ_EINT_BASE)
75#define IRQ_EINT(x) S5P_EINT(x) 75
76#define S5P_EINT_BASE1 (S5P_IRQ_EINT_BASE)
77/*
78 * S5P6440 has 0-15 external interrupts in group 0. Only these can be used
79 * to wake up from sleep. If request is beyond this range, by mistake, a large
80 * return value for an irq number should be indication of something amiss.
81 */
82#define S5P_EINT_BASE2 (0xf0000000)
76 83
77/* 84/*
78 * Next the external interrupt groups. These are similar to the IRQ_EINT(x) 85 * Next the external interrupt groups. These are similar to the IRQ_EINT(x)
diff --git a/arch/arm/mach-s5p6442/include/mach/irqs.h b/arch/arm/mach-s5p6442/include/mach/irqs.h
index da665809f6e4..02c23749c023 100644
--- a/arch/arm/mach-s5p6442/include/mach/irqs.h
+++ b/arch/arm/mach-s5p6442/include/mach/irqs.h
@@ -77,8 +77,9 @@
77 77
78#define S5P_IRQ_EINT_BASE (IRQ_VIC_END + 1) 78#define S5P_IRQ_EINT_BASE (IRQ_VIC_END + 1)
79 79
80#define IRQ_EINT(x) ((x) < 16 ? S5P_IRQ_VIC0(x) : \ 80#define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0))
81 (S5P_IRQ_EINT_BASE + (x)-16)) 81#define S5P_EINT_BASE2 (S5P_IRQ_EINT_BASE)
82
82/* Set the default NR_IRQS */ 83/* Set the default NR_IRQS */
83 84
84#define NR_IRQS (IRQ_EINT(31) + 1) 85#define NR_IRQS (IRQ_EINT(31) + 1)
diff --git a/arch/arm/mach-s5pc100/include/mach/irqs.h b/arch/arm/mach-s5pc100/include/mach/irqs.h
index 15066df3ced9..28aa551dc3a8 100644
--- a/arch/arm/mach-s5pc100/include/mach/irqs.h
+++ b/arch/arm/mach-s5pc100/include/mach/irqs.h
@@ -100,9 +100,6 @@
100#define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0)) 100#define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0))
101#define S5P_EINT_BASE2 (IRQ_VIC_END + 1) 101#define S5P_EINT_BASE2 (IRQ_VIC_END + 1)
102 102
103#define IRQ_EINT(x) ((x) < 16 ? S5P_IRQ_VIC0(x) : \
104 (S5P_EINT_BASE2 + (x) - 16))
105
106#define S3C_IRQ_GPIO_BASE (IRQ_EINT(31) + 1) 103#define S3C_IRQ_GPIO_BASE (IRQ_EINT(31) + 1)
107#define S3C_IRQ_GPIO(x) (S3C_IRQ_GPIO_BASE + (x)) 104#define S3C_IRQ_GPIO(x) (S3C_IRQ_GPIO_BASE + (x))
108 105
diff --git a/arch/arm/mach-s5pc100/include/mach/regs-gpio.h b/arch/arm/mach-s5pc100/include/mach/regs-gpio.h
index 763edebdd577..dd6295e1251d 100644
--- a/arch/arm/mach-s5pc100/include/mach/regs-gpio.h
+++ b/arch/arm/mach-s5pc100/include/mach/regs-gpio.h
@@ -60,12 +60,9 @@
60#define S5PC100EINT30PEND (S5P_VA_GPIO + 0xF40) 60#define S5PC100EINT30PEND (S5P_VA_GPIO + 0xF40)
61#define S5P_EINT_PEND(x) (S5PC100EINT30PEND + ((x) * 0x4)) 61#define S5P_EINT_PEND(x) (S5PC100EINT30PEND + ((x) * 0x4))
62 62
63#define eint_offset(irq) ((irq) < IRQ_EINT16_31 ? ((irq) - IRQ_EINT(0)) : \ 63#define EINT_REG_NR(x) (EINT_OFFSET(x) >> 3)
64 (((irq) - S5P_EINT_BASE2)))
65 64
66#define EINT_REG_NR(x) (eint_offset(x) >> 3) 65#define eint_irq_to_bit(irq) (1 << (EINT_OFFSET(irq) & 0x7))
67
68#define eint_irq_to_bit(irq) (1 << (eint_offset(irq) & 0x7))
69 66
70/* values for S5P_EXTINT0 */ 67/* values for S5P_EXTINT0 */
71#define S5P_EXTINT_LOWLEV (0x00) 68#define S5P_EXTINT_LOWLEV (0x00)
diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h
index 92fc6c7fc064..96895378ea27 100644
--- a/arch/arm/mach-s5pv210/include/mach/irqs.h
+++ b/arch/arm/mach-s5pv210/include/mach/irqs.h
@@ -118,22 +118,12 @@
118#define IRQ_MDNIE3 S5P_IRQ_VIC3(8) 118#define IRQ_MDNIE3 S5P_IRQ_VIC3(8)
119#define IRQ_VIC_END S5P_IRQ_VIC3(31) 119#define IRQ_VIC_END S5P_IRQ_VIC3(31)
120 120
121#define S5P_EINT_16_31_BASE (IRQ_VIC_END + 1) 121#define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0))
122 122#define S5P_EINT_BASE2 (IRQ_VIC_END + 1)
123#define EINT_MODE S3C_GPIO_SFN(0xf)
124
125#define IRQ_EINT(x) ((x) < 16 ? ((x) + S5P_IRQ_VIC0(0)) \
126 : ((x) + S5P_EINT_16_31_BASE))
127 123
128/* Set the default NR_IRQS */ 124/* Set the default NR_IRQS */
129
130#define NR_IRQS (IRQ_EINT(31) + 1) 125#define NR_IRQS (IRQ_EINT(31) + 1)
131 126
132#define EINT_GPIO_0(x) S5PV210_GPH0(x)
133#define EINT_GPIO_1(x) S5PV210_GPH1(x)
134#define EINT_GPIO_2(x) S5PV210_GPH2(x)
135#define EINT_GPIO_3(x) S5PV210_GPH3(x)
136
137/* Compatibility */ 127/* Compatibility */
138#define IRQ_LCD_FIFO IRQ_LCD0 128#define IRQ_LCD_FIFO IRQ_LCD0
139#define IRQ_LCD_VSYNC IRQ_LCD1 129#define IRQ_LCD_VSYNC IRQ_LCD1
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-gpio.h b/arch/arm/mach-s5pv210/include/mach/regs-gpio.h
index 6d068091c36c..49e029b4978a 100644
--- a/arch/arm/mach-s5pv210/include/mach/regs-gpio.h
+++ b/arch/arm/mach-s5pv210/include/mach/regs-gpio.h
@@ -27,12 +27,9 @@
27#define S5PV210_EINT30PEND (S5P_VA_GPIO + 0xF40) 27#define S5PV210_EINT30PEND (S5P_VA_GPIO + 0xF40)
28#define S5P_EINT_PEND(x) (S5PV210_EINT30PEND + ((x) * 0x4)) 28#define S5P_EINT_PEND(x) (S5PV210_EINT30PEND + ((x) * 0x4))
29 29
30#define eint_offset(irq) ((irq) < IRQ_EINT16_31 ? ((irq) - IRQ_EINT(0)) \ 30#define EINT_REG_NR(x) (EINT_OFFSET(x) >> 3)
31 : ((irq) - S5P_EINT_16_31_BASE))
32 31
33#define EINT_REG_NR(x) (eint_offset(x) >> 3) 32#define eint_irq_to_bit(irq) (1 << (EINT_OFFSET(irq) & 0x7))
34
35#define eint_irq_to_bit(irq) (1 << (eint_offset(irq) & 0x7))
36 33
37/* values for S5P_EXTINT0 */ 34/* values for S5P_EXTINT0 */
38#define S5P_EXTINT_LOWLEV (0x00) 35#define S5P_EXTINT_LOWLEV (0x00)
@@ -41,4 +38,11 @@
41#define S5P_EXTINT_RISEEDGE (0x03) 38#define S5P_EXTINT_RISEEDGE (0x03)
42#define S5P_EXTINT_BOTHEDGE (0x04) 39#define S5P_EXTINT_BOTHEDGE (0x04)
43 40
41#define EINT_MODE S3C_GPIO_SFN(0xf)
42
43#define EINT_GPIO_0(x) S5PV210_GPH0(x)
44#define EINT_GPIO_1(x) S5PV210_GPH1(x)
45#define EINT_GPIO_2(x) S5PV210_GPH2(x)
46#define EINT_GPIO_3(x) S5PV210_GPH3(x)
47
44#endif /* __ASM_ARCH_REGS_GPIO_H */ 48#endif /* __ASM_ARCH_REGS_GPIO_H */
diff --git a/arch/arm/mach-u300/i2c.c b/arch/arm/mach-u300/i2c.c
index c73ed06b6065..f0394baa11fa 100644
--- a/arch/arm/mach-u300/i2c.c
+++ b/arch/arm/mach-u300/i2c.c
@@ -9,7 +9,7 @@
9 */ 9 */
10#include <linux/kernel.h> 10#include <linux/kernel.h>
11#include <linux/i2c.h> 11#include <linux/i2c.h>
12#include <linux/mfd/ab3100.h> 12#include <linux/mfd/abx500.h>
13#include <linux/regulator/machine.h> 13#include <linux/regulator/machine.h>
14#include <linux/amba/bus.h> 14#include <linux/amba/bus.h>
15#include <mach/irqs.h> 15#include <mach/irqs.h>
@@ -46,6 +46,7 @@
46/* BUCK SLEEP 0xAC: 1.05V, Not used, SLEEP_A and B, Not used */ 46/* BUCK SLEEP 0xAC: 1.05V, Not used, SLEEP_A and B, Not used */
47#define BUCK_SLEEP_SETTING 0xAC 47#define BUCK_SLEEP_SETTING 0xAC
48 48
49#ifdef CONFIG_AB3100_CORE
49static struct regulator_consumer_supply supply_ldo_c[] = { 50static struct regulator_consumer_supply supply_ldo_c[] = {
50 { 51 {
51 .dev_name = "ab3100-codec", 52 .dev_name = "ab3100-codec",
@@ -253,14 +254,68 @@ static struct ab3100_platform_data ab3100_plf_data = {
253 LDO_D_SETTING, 254 LDO_D_SETTING,
254 }, 255 },
255}; 256};
257#endif
258
259#ifdef CONFIG_AB3550_CORE
260static struct abx500_init_settings ab3550_init_settings[] = {
261 {
262 .bank = 0,
263 .reg = AB3550_IMR1,
264 .setting = 0xff
265 },
266 {
267 .bank = 0,
268 .reg = AB3550_IMR2,
269 .setting = 0xff
270 },
271 {
272 .bank = 0,
273 .reg = AB3550_IMR3,
274 .setting = 0xff
275 },
276 {
277 .bank = 0,
278 .reg = AB3550_IMR4,
279 .setting = 0xff
280 },
281 {
282 .bank = 0,
283 .reg = AB3550_IMR5,
284 /* The two most significant bits are not used */
285 .setting = 0x3f
286 },
287};
288
289static struct ab3550_platform_data ab3550_plf_data = {
290 .irq = {
291 .base = IRQ_AB3550_BASE,
292 .count = (IRQ_AB3550_END - IRQ_AB3550_BASE + 1),
293 },
294 .dev_data = {
295 },
296 .init_settings = ab3550_init_settings,
297 .init_settings_sz = ARRAY_SIZE(ab3550_init_settings),
298};
299#endif
256 300
257static struct i2c_board_info __initdata bus0_i2c_board_info[] = { 301static struct i2c_board_info __initdata bus0_i2c_board_info[] = {
302#if defined(CONFIG_AB3550_CORE)
303 {
304 .type = "ab3550",
305 .addr = 0x4A,
306 .irq = IRQ_U300_IRQ0_EXT,
307 .platform_data = &ab3550_plf_data,
308 },
309#elif defined(CONFIG_AB3100_CORE)
258 { 310 {
259 .type = "ab3100", 311 .type = "ab3100",
260 .addr = 0x48, 312 .addr = 0x48,
261 .irq = IRQ_U300_IRQ0_EXT, 313 .irq = IRQ_U300_IRQ0_EXT,
262 .platform_data = &ab3100_plf_data, 314 .platform_data = &ab3100_plf_data,
263 }, 315 },
316#else
317 { },
318#endif
264}; 319};
265 320
266static struct i2c_board_info __initdata bus1_i2c_board_info[] = { 321static struct i2c_board_info __initdata bus1_i2c_board_info[] = {
diff --git a/arch/arm/mach-u300/include/mach/irqs.h b/arch/arm/mach-u300/include/mach/irqs.h
index a6867b12773e..09b1b28fa8fd 100644
--- a/arch/arm/mach-u300/include/mach/irqs.h
+++ b/arch/arm/mach-u300/include/mach/irqs.h
@@ -109,6 +109,13 @@
109#define U300_NR_IRQS 48 109#define U300_NR_IRQS 48
110#endif 110#endif
111 111
112#ifdef CONFIG_AB3550_CORE
113#define IRQ_AB3550_BASE (U300_NR_IRQS)
114#define IRQ_AB3550_END (IRQ_AB3550_BASE + 37)
115
116#define NR_IRQS (IRQ_AB3550_END + 1)
117#else
112#define NR_IRQS U300_NR_IRQS 118#define NR_IRQS U300_NR_IRQS
119#endif
113 120
114#endif 121#endif
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index 072196c57263..bb8d7b771817 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -50,7 +50,7 @@ struct pl022_config_chip ab4500_chip_info = {
50 50
51static struct spi_board_info u8500_spi_devices[] = { 51static struct spi_board_info u8500_spi_devices[] = {
52 { 52 {
53 .modalias = "ab4500", 53 .modalias = "ab8500",
54 .controller_data = &ab4500_chip_info, 54 .controller_data = &ab4500_chip_info,
55 .max_speed_hz = 12000000, 55 .max_speed_hz = 12000000,
56 .bus_num = 0, 56 .bus_num = 0,
diff --git a/arch/arm/mach-ux500/clock.c b/arch/arm/mach-ux500/clock.c
index 1b2c9890e8b4..6544855af2f1 100644
--- a/arch/arm/mach-ux500/clock.c
+++ b/arch/arm/mach-ux500/clock.c
@@ -411,7 +411,7 @@ static struct clk_lookup u8500_common_clks[] = {
411 CLK(apetraceclk, "apetrace", NULL), 411 CLK(apetraceclk, "apetrace", NULL),
412 CLK(mcdeclk, "mcde", NULL), 412 CLK(mcdeclk, "mcde", NULL),
413 CLK(ipi2clk, "ipi2", NULL), 413 CLK(ipi2clk, "ipi2", NULL),
414 CLK(dmaclk, "dma40", NULL), 414 CLK(dmaclk, "dma40.0", NULL),
415 CLK(b2r2clk, "b2r2", NULL), 415 CLK(b2r2clk, "b2r2", NULL),
416 CLK(tvclk, "tv", NULL), 416 CLK(tvclk, "tv", NULL),
417}; 417};
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index d04299f3b6b5..f21c444edd99 100644
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -32,6 +32,7 @@ static struct platform_device *platform_devs[] __initdata = {
32 &u8500_gpio_devs[6], 32 &u8500_gpio_devs[6],
33 &u8500_gpio_devs[7], 33 &u8500_gpio_devs[7],
34 &u8500_gpio_devs[8], 34 &u8500_gpio_devs[8],
35 &u8500_dma40_device,
35}; 36};
36 37
37/* minimum static i/o mapping required to boot U8500 platforms */ 38/* minimum static i/o mapping required to boot U8500 platforms */
@@ -71,6 +72,9 @@ void __init u8500_init_devices(void)
71{ 72{
72 ux500_init_devices(); 73 ux500_init_devices();
73 74
75 if (cpu_is_u8500ed())
76 dma40_u8500ed_fixup();
77
74 /* Register the platform devices */ 78 /* Register the platform devices */
75 platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs)); 79 platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));
76 80
diff --git a/arch/arm/mach-ux500/devices-db8500.c b/arch/arm/mach-ux500/devices-db8500.c
index 20334236afce..822903421943 100644
--- a/arch/arm/mach-ux500/devices-db8500.c
+++ b/arch/arm/mach-ux500/devices-db8500.c
@@ -12,9 +12,13 @@
12#include <linux/gpio.h> 12#include <linux/gpio.h>
13#include <linux/amba/bus.h> 13#include <linux/amba/bus.h>
14 14
15#include <plat/ste_dma40.h>
16
15#include <mach/hardware.h> 17#include <mach/hardware.h>
16#include <mach/setup.h> 18#include <mach/setup.h>
17 19
20#include "ste-dma40-db8500.h"
21
18static struct nmk_gpio_platform_data u8500_gpio_data[] = { 22static struct nmk_gpio_platform_data u8500_gpio_data[] = {
19 GPIO_DATA("GPIO-0-31", 0), 23 GPIO_DATA("GPIO-0-31", 0),
20 GPIO_DATA("GPIO-32-63", 32), /* 37..63 not routed to pin */ 24 GPIO_DATA("GPIO-32-63", 32), /* 37..63 not routed to pin */
@@ -105,3 +109,108 @@ struct platform_device u8500_i2c4_device = {
105 .resource = u8500_i2c4_resources, 109 .resource = u8500_i2c4_resources,
106 .num_resources = ARRAY_SIZE(u8500_i2c4_resources), 110 .num_resources = ARRAY_SIZE(u8500_i2c4_resources),
107}; 111};
112
113static struct resource dma40_resources[] = {
114 [0] = {
115 .start = U8500_DMA_BASE,
116 .end = U8500_DMA_BASE + SZ_4K - 1,
117 .flags = IORESOURCE_MEM,
118 .name = "base",
119 },
120 [1] = {
121 .start = U8500_DMA_LCPA_BASE,
122 .end = U8500_DMA_LCPA_BASE + SZ_4K - 1,
123 .flags = IORESOURCE_MEM,
124 .name = "lcpa",
125 },
126 [2] = {
127 .start = U8500_DMA_LCLA_BASE,
128 .end = U8500_DMA_LCLA_BASE + 16 * 1024 - 1,
129 .flags = IORESOURCE_MEM,
130 .name = "lcla",
131 },
132 [3] = {
133 .start = IRQ_DMA,
134 .end = IRQ_DMA,
135 .flags = IORESOURCE_IRQ}
136};
137
138/* Default configuration for physcial memcpy */
139struct stedma40_chan_cfg dma40_memcpy_conf_phy = {
140 .channel_type = (STEDMA40_CHANNEL_IN_PHY_MODE |
141 STEDMA40_LOW_PRIORITY_CHANNEL |
142 STEDMA40_PCHAN_BASIC_MODE),
143 .dir = STEDMA40_MEM_TO_MEM,
144
145 .src_info.endianess = STEDMA40_LITTLE_ENDIAN,
146 .src_info.data_width = STEDMA40_BYTE_WIDTH,
147 .src_info.psize = STEDMA40_PSIZE_PHY_1,
148
149 .dst_info.endianess = STEDMA40_LITTLE_ENDIAN,
150 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
151 .dst_info.psize = STEDMA40_PSIZE_PHY_1,
152
153};
154/* Default configuration for logical memcpy */
155struct stedma40_chan_cfg dma40_memcpy_conf_log = {
156 .channel_type = (STEDMA40_CHANNEL_IN_LOG_MODE |
157 STEDMA40_LOW_PRIORITY_CHANNEL |
158 STEDMA40_LCHAN_SRC_LOG_DST_LOG |
159 STEDMA40_NO_TIM_FOR_LINK),
160 .dir = STEDMA40_MEM_TO_MEM,
161
162 .src_info.endianess = STEDMA40_LITTLE_ENDIAN,
163 .src_info.data_width = STEDMA40_BYTE_WIDTH,
164 .src_info.psize = STEDMA40_PSIZE_LOG_1,
165
166 .dst_info.endianess = STEDMA40_LITTLE_ENDIAN,
167 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
168 .dst_info.psize = STEDMA40_PSIZE_LOG_1,
169
170};
171
172/*
173 * Mapping between destination event lines and physical device address.
174 * The event line is tied to a device and therefor the address is constant.
175 */
176static const dma_addr_t dma40_tx_map[STEDMA40_NR_DEV];
177
178/* Mapping between source event lines and physical device address */
179static const dma_addr_t dma40_rx_map[STEDMA40_NR_DEV];
180
181/* Reserved event lines for memcpy only */
182static int dma40_memcpy_event[] = {
183 STEDMA40_MEMCPY_TX_1,
184 STEDMA40_MEMCPY_TX_2,
185 STEDMA40_MEMCPY_TX_3,
186 STEDMA40_MEMCPY_TX_4,
187};
188
189static struct stedma40_platform_data dma40_plat_data = {
190 .dev_len = STEDMA40_NR_DEV,
191 .dev_rx = dma40_rx_map,
192 .dev_tx = dma40_tx_map,
193 .memcpy = dma40_memcpy_event,
194 .memcpy_len = ARRAY_SIZE(dma40_memcpy_event),
195 .memcpy_conf_phy = &dma40_memcpy_conf_phy,
196 .memcpy_conf_log = &dma40_memcpy_conf_log,
197 .llis_per_log = 8,
198};
199
200struct platform_device u8500_dma40_device = {
201 .dev = {
202 .platform_data = &dma40_plat_data,
203 },
204 .name = "dma40",
205 .id = 0,
206 .num_resources = ARRAY_SIZE(dma40_resources),
207 .resource = dma40_resources
208};
209
210void dma40_u8500ed_fixup(void)
211{
212 dma40_plat_data.memcpy = NULL;
213 dma40_plat_data.memcpy_len = 0;
214 dma40_resources[0].start = U8500_DMA_BASE_ED;
215 dma40_resources[0].end = U8500_DMA_BASE_ED + SZ_4K - 1;
216}
diff --git a/arch/arm/mach-ux500/include/mach/db8500-regs.h b/arch/arm/mach-ux500/include/mach/db8500-regs.h
index 9169e1e382a3..85fc6a80b386 100644
--- a/arch/arm/mach-ux500/include/mach/db8500-regs.h
+++ b/arch/arm/mach-ux500/include/mach/db8500-regs.h
@@ -7,6 +7,18 @@
7#ifndef __MACH_DB8500_REGS_H 7#ifndef __MACH_DB8500_REGS_H
8#define __MACH_DB8500_REGS_H 8#define __MACH_DB8500_REGS_H
9 9
10/* Base address and bank offsets for ESRAM */
11#define U8500_ESRAM_BASE 0x40000000
12#define U8500_ESRAM_BANK_SIZE 0x00020000
13#define U8500_ESRAM_BANK0 U8500_ESRAM_BASE
14#define U8500_ESRAM_BANK1 (U8500_ESRAM_BASE + U8500_ESRAM_BANK_SIZE)
15#define U8500_ESRAM_BANK2 (U8500_ESRAM_BANK1 + U8500_ESRAM_BANK_SIZE)
16#define U8500_ESRAM_BANK3 (U8500_ESRAM_BANK2 + U8500_ESRAM_BANK_SIZE)
17#define U8500_ESRAM_BANK4 (U8500_ESRAM_BANK3 + U8500_ESRAM_BANK_SIZE)
18/* Use bank 4 for DMA LCLA and LCPA */
19#define U8500_DMA_LCLA_BASE U8500_ESRAM_BANK4
20#define U8500_DMA_LCPA_BASE (U8500_ESRAM_BANK4 + 0x4000)
21
10#define U8500_PER3_BASE 0x80000000 22#define U8500_PER3_BASE 0x80000000
11#define U8500_STM_BASE 0x80100000 23#define U8500_STM_BASE 0x80100000
12#define U8500_STM_REG_BASE (U8500_STM_BASE + 0xF000) 24#define U8500_STM_REG_BASE (U8500_STM_BASE + 0xF000)
diff --git a/arch/arm/mach-ux500/include/mach/devices.h b/arch/arm/mach-ux500/include/mach/devices.h
index 0422af00a56e..c2b2f2574947 100644
--- a/arch/arm/mach-ux500/include/mach/devices.h
+++ b/arch/arm/mach-ux500/include/mach/devices.h
@@ -25,5 +25,8 @@ extern struct platform_device ux500_i2c3_device;
25 25
26extern struct platform_device u8500_i2c0_device; 26extern struct platform_device u8500_i2c0_device;
27extern struct platform_device u8500_i2c4_device; 27extern struct platform_device u8500_i2c4_device;
28extern struct platform_device u8500_dma40_device;
29
30void dma40_u8500ed_fixup(void);
28 31
29#endif 32#endif
diff --git a/arch/arm/mach-ux500/ste-dma40-db8500.h b/arch/arm/mach-ux500/ste-dma40-db8500.h
new file mode 100644
index 000000000000..e7016278dfa9
--- /dev/null
+++ b/arch/arm/mach-ux500/ste-dma40-db8500.h
@@ -0,0 +1,154 @@
1/*
2 * arch/arm/mach-ux500/ste_dma40_db8500.h
3 * DB8500-SoC-specific configuration for DMA40
4 *
5 * Copyright (C) ST-Ericsson 2007-2010
6 * License terms: GNU General Public License (GPL) version 2
7 * Author: Per Friden <per.friden@stericsson.com>
8 * Author: Jonas Aaberg <jonas.aberg@stericsson.com>
9 */
10#ifndef STE_DMA40_DB8500_H
11#define STE_DMA40_DB8500_H
12
13#define STEDMA40_NR_DEV 64
14
15enum dma_src_dev_type {
16 STEDMA40_DEV_SPI0_RX = 0,
17 STEDMA40_DEV_SD_MMC0_RX = 1,
18 STEDMA40_DEV_SD_MMC1_RX = 2,
19 STEDMA40_DEV_SD_MMC2_RX = 3,
20 STEDMA40_DEV_I2C1_RX = 4,
21 STEDMA40_DEV_I2C3_RX = 5,
22 STEDMA40_DEV_I2C2_RX = 6,
23 STEDMA40_DEV_I2C4_RX = 7, /* Only on V1 */
24 STEDMA40_DEV_SSP0_RX = 8,
25 STEDMA40_DEV_SSP1_RX = 9,
26 STEDMA40_DEV_MCDE_RX = 10,
27 STEDMA40_DEV_UART2_RX = 11,
28 STEDMA40_DEV_UART1_RX = 12,
29 STEDMA40_DEV_UART0_RX = 13,
30 STEDMA40_DEV_MSP2_RX = 14,
31 STEDMA40_DEV_I2C0_RX = 15,
32 STEDMA40_DEV_USB_OTG_IEP_8 = 16,
33 STEDMA40_DEV_USB_OTG_IEP_1_9 = 17,
34 STEDMA40_DEV_USB_OTG_IEP_2_10 = 18,
35 STEDMA40_DEV_USB_OTG_IEP_3_11 = 19,
36 STEDMA40_DEV_SLIM0_CH0_RX_HSI_RX_CH0 = 20,
37 STEDMA40_DEV_SLIM0_CH1_RX_HSI_RX_CH1 = 21,
38 STEDMA40_DEV_SLIM0_CH2_RX_HSI_RX_CH2 = 22,
39 STEDMA40_DEV_SLIM0_CH3_RX_HSI_RX_CH3 = 23,
40 STEDMA40_DEV_SRC_SXA0_RX_TX = 24,
41 STEDMA40_DEV_SRC_SXA1_RX_TX = 25,
42 STEDMA40_DEV_SRC_SXA2_RX_TX = 26,
43 STEDMA40_DEV_SRC_SXA3_RX_TX = 27,
44 STEDMA40_DEV_SD_MM2_RX = 28,
45 STEDMA40_DEV_SD_MM0_RX = 29,
46 STEDMA40_DEV_MSP1_RX = 30,
47 /*
48 * This channel is either SlimBus or MSP,
49 * never both at the same time.
50 */
51 STEDMA40_SLIM0_CH0_RX = 31,
52 STEDMA40_DEV_MSP0_RX = 31,
53 STEDMA40_DEV_SD_MM1_RX = 32,
54 STEDMA40_DEV_SPI2_RX = 33,
55 STEDMA40_DEV_I2C3_RX2 = 34,
56 STEDMA40_DEV_SPI1_RX = 35,
57 STEDMA40_DEV_USB_OTG_IEP_4_12 = 36,
58 STEDMA40_DEV_USB_OTG_IEP_5_13 = 37,
59 STEDMA40_DEV_USB_OTG_IEP_6_14 = 38,
60 STEDMA40_DEV_USB_OTG_IEP_7_15 = 39,
61 STEDMA40_DEV_SPI3_RX = 40,
62 STEDMA40_DEV_SD_MM3_RX = 41,
63 STEDMA40_DEV_SD_MM4_RX = 42,
64 STEDMA40_DEV_SD_MM5_RX = 43,
65 STEDMA40_DEV_SRC_SXA4_RX_TX = 44,
66 STEDMA40_DEV_SRC_SXA5_RX_TX = 45,
67 STEDMA40_DEV_SRC_SXA6_RX_TX = 46,
68 STEDMA40_DEV_SRC_SXA7_RX_TX = 47,
69 STEDMA40_DEV_CAC1_RX = 48,
70 /* RX channels 49 and 50 are unused */
71 STEDMA40_DEV_MSHC_RX = 51,
72 STEDMA40_DEV_SLIM1_CH0_RX_HSI_RX_CH4 = 52,
73 STEDMA40_DEV_SLIM1_CH1_RX_HSI_RX_CH5 = 53,
74 STEDMA40_DEV_SLIM1_CH2_RX_HSI_RX_CH6 = 54,
75 STEDMA40_DEV_SLIM1_CH3_RX_HSI_RX_CH7 = 55,
76 /* RX channels 56 thru 60 are unused */
77 STEDMA40_DEV_CAC0_RX = 61,
78 /* RX channels 62 and 63 are unused */
79};
80
81enum dma_dest_dev_type {
82 STEDMA40_DEV_SPI0_TX = 0,
83 STEDMA40_DEV_SD_MMC0_TX = 1,
84 STEDMA40_DEV_SD_MMC1_TX = 2,
85 STEDMA40_DEV_SD_MMC2_TX = 3,
86 STEDMA40_DEV_I2C1_TX = 4,
87 STEDMA40_DEV_I2C3_TX = 5,
88 STEDMA40_DEV_I2C2_TX = 6,
89 STEDMA50_DEV_I2C4_TX = 7, /* Only on V1 */
90 STEDMA40_DEV_SSP0_TX = 8,
91 STEDMA40_DEV_SSP1_TX = 9,
92 /* TX channel 10 is unused */
93 STEDMA40_DEV_UART2_TX = 11,
94 STEDMA40_DEV_UART1_TX = 12,
95 STEDMA40_DEV_UART0_TX= 13,
96 STEDMA40_DEV_MSP2_TX = 14,
97 STEDMA40_DEV_I2C0_TX = 15,
98 STEDMA40_DEV_USB_OTG_OEP_8 = 16,
99 STEDMA40_DEV_USB_OTG_OEP_1_9 = 17,
100 STEDMA40_DEV_USB_OTG_OEP_2_10= 18,
101 STEDMA40_DEV_USB_OTG_OEP_3_11 = 19,
102 STEDMA40_DEV_SLIM0_CH0_TX_HSI_TX_CH0 = 20,
103 STEDMA40_DEV_SLIM0_CH1_TX_HSI_TX_CH1 = 21,
104 STEDMA40_DEV_SLIM0_CH2_TX_HSI_TX_CH2 = 22,
105 STEDMA40_DEV_SLIM0_CH3_TX_HSI_TX_CH3 = 23,
106 STEDMA40_DEV_DST_SXA0_RX_TX = 24,
107 STEDMA40_DEV_DST_SXA1_RX_TX = 25,
108 STEDMA40_DEV_DST_SXA2_RX_TX = 26,
109 STEDMA40_DEV_DST_SXA3_RX_TX = 27,
110 STEDMA40_DEV_SD_MM2_TX = 28,
111 STEDMA40_DEV_SD_MM0_TX = 29,
112 STEDMA40_DEV_MSP1_TX = 30,
113 /*
114 * This channel is either SlimBus or MSP,
115 * never both at the same time.
116 */
117 STEDMA40_SLIM0_CH0_TX = 31,
118 STEDMA40_DEV_MSP0_TX = 31,
119 STEDMA40_DEV_SD_MM1_TX = 32,
120 STEDMA40_DEV_SPI2_TX = 33,
121 /* Secondary I2C3 channel */
122 STEDMA40_DEV_I2C3_TX2 = 34,
123 STEDMA40_DEV_SPI1_TX = 35,
124 STEDMA40_DEV_USB_OTG_OEP_4_12 = 36,
125 STEDMA40_DEV_USB_OTG_OEP_5_13 = 37,
126 STEDMA40_DEV_USB_OTG_OEP_6_14 = 38,
127 STEDMA40_DEV_USB_OTG_OEP_7_15 = 39,
128 STEDMA40_DEV_SPI3_TX = 40,
129 STEDMA40_DEV_SD_MM3_TX = 41,
130 STEDMA40_DEV_SD_MM4_TX = 42,
131 STEDMA40_DEV_SD_MM5_TX = 43,
132 STEDMA40_DEV_DST_SXA4_RX_TX = 44,
133 STEDMA40_DEV_DST_SXA5_RX_TX = 45,
134 STEDMA40_DEV_DST_SXA6_RX_TX = 46,
135 STEDMA40_DEV_DST_SXA7_RX_TX = 47,
136 STEDMA40_DEV_CAC1_TX = 48,
137 STEDMA40_DEV_CAC1_TX_HAC1_TX = 49,
138 STEDMA40_DEV_HAC1_TX = 50,
139 STEDMA40_MEMXCPY_TX_0 = 51,
140 STEDMA40_DEV_SLIM1_CH0_TX_HSI_TX_CH4 = 52,
141 STEDMA40_DEV_SLIM1_CH1_TX_HSI_TX_CH5 = 53,
142 STEDMA40_DEV_SLIM1_CH2_TX_HSI_TX_CH6 = 54,
143 STEDMA40_DEV_SLIM1_CH3_TX_HSI_TX_CH7 = 55,
144 STEDMA40_MEMCPY_TX_1 = 56,
145 STEDMA40_MEMCPY_TX_2 = 57,
146 STEDMA40_MEMCPY_TX_3 = 58,
147 STEDMA40_MEMCPY_TX_4 = 59,
148 STEDMA40_MEMCPY_TX_5 = 60,
149 STEDMA40_DEV_CAC0_TX = 61,
150 STEDMA40_DEV_CAC0_TX_HAC0_TX = 62,
151 STEDMA40_DEV_HAC0_TX = 63,
152};
153
154#endif
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig
index 902ba9e42c5b..20b2e79e54f2 100644
--- a/arch/arm/plat-mxc/Kconfig
+++ b/arch/arm/plat-mxc/Kconfig
@@ -1,5 +1,7 @@
1if ARCH_MXC 1if ARCH_MXC
2 2
3source "arch/arm/plat-mxc/devices/Kconfig"
4
3menu "Freescale MXC Implementations" 5menu "Freescale MXC Implementations"
4 6
5choice 7choice
@@ -8,15 +10,12 @@ choice
8 10
9config ARCH_MX1 11config ARCH_MX1
10 bool "MX1-based" 12 bool "MX1-based"
11 select CPU_ARM920T 13 select SOC_IMX1
12 select IMX_HAVE_IOMUX_V1
13 help 14 help
14 This enables support for systems based on the Freescale i.MX1 family 15 This enables support for systems based on the Freescale i.MX1 family
15 16
16config ARCH_MX2 17config ARCH_MX2
17 bool "MX2-based" 18 bool "MX2-based"
18 select CPU_ARM926T
19 select IMX_HAVE_IOMUX_V1
20 help 19 help
21 This enables support for systems based on the Freescale i.MX2 family 20 This enables support for systems based on the Freescale i.MX2 family
22 21
@@ -49,8 +48,7 @@ config ARCH_MX5
49 48
50endchoice 49endchoice
51 50
52source "arch/arm/mach-mx1/Kconfig" 51source "arch/arm/mach-imx/Kconfig"
53source "arch/arm/mach-mx2/Kconfig"
54source "arch/arm/mach-mx3/Kconfig" 52source "arch/arm/mach-mx3/Kconfig"
55source "arch/arm/mach-mx25/Kconfig" 53source "arch/arm/mach-mx25/Kconfig"
56source "arch/arm/mach-mxc91231/Kconfig" 54source "arch/arm/mach-mxc91231/Kconfig"
diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile
index 895bc3c5e0c0..c7506a80eb31 100644
--- a/arch/arm/plat-mxc/Makefile
+++ b/arch/arm/plat-mxc/Makefile
@@ -8,8 +8,6 @@ obj-y := irq.o clock.o gpio.o time.o devices.o cpu.o system.o
8# MX51 uses the TZIC interrupt controller, older platforms use AVIC (irq.o) 8# MX51 uses the TZIC interrupt controller, older platforms use AVIC (irq.o)
9obj-$(CONFIG_MXC_TZIC) += tzic.o 9obj-$(CONFIG_MXC_TZIC) += tzic.o
10 10
11obj-$(CONFIG_ARCH_MX1) += dma-mx1-mx2.o
12obj-$(CONFIG_ARCH_MX2) += dma-mx1-mx2.o
13obj-$(CONFIG_IMX_HAVE_IOMUX_V1) += iomux-v1.o 11obj-$(CONFIG_IMX_HAVE_IOMUX_V1) += iomux-v1.o
14obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o 12obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o
15obj-$(CONFIG_MXC_PWM) += pwm.o 13obj-$(CONFIG_MXC_PWM) += pwm.o
@@ -21,3 +19,5 @@ ifdef CONFIG_SND_IMX_SOC
21obj-y += ssi-fiq.o 19obj-y += ssi-fiq.o
22obj-y += ssi-fiq-ksym.o 20obj-y += ssi-fiq-ksym.o
23endif 21endif
22
23obj-y += devices/
diff --git a/arch/arm/plat-mxc/audmux-v1.c b/arch/arm/plat-mxc/audmux-v1.c
index b62917ca3f95..1180bef7664b 100644
--- a/arch/arm/plat-mxc/audmux-v1.c
+++ b/arch/arm/plat-mxc/audmux-v1.c
@@ -13,10 +13,6 @@
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details. 15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */ 16 */
21 17
22#include <linux/module.h> 18#include <linux/module.h>
diff --git a/arch/arm/plat-mxc/audmux-v2.c b/arch/arm/plat-mxc/audmux-v2.c
index ab94d78a927f..f9e7cdbd0005 100644
--- a/arch/arm/plat-mxc/audmux-v2.c
+++ b/arch/arm/plat-mxc/audmux-v2.c
@@ -13,10 +13,6 @@
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details. 15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */ 16 */
21 17
22#include <linux/module.h> 18#include <linux/module.h>
diff --git a/arch/arm/plat-mxc/devices.c b/arch/arm/plat-mxc/devices.c
index 56f2fb5cc456..735776d84956 100644
--- a/arch/arm/plat-mxc/devices.c
+++ b/arch/arm/plat-mxc/devices.c
@@ -18,6 +18,7 @@
18 18
19#include <linux/kernel.h> 19#include <linux/kernel.h>
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/err.h>
21#include <linux/platform_device.h> 22#include <linux/platform_device.h>
22#include <mach/common.h> 23#include <mach/common.h>
23 24
@@ -35,3 +36,35 @@ int __init mxc_register_device(struct platform_device *pdev, void *data)
35 return ret; 36 return ret;
36} 37}
37 38
39struct platform_device *__init imx_add_platform_device(const char *name, int id,
40 const struct resource *res, unsigned int num_resources,
41 const void *data, size_t size_data)
42{
43 int ret = -ENOMEM;
44 struct platform_device *pdev;
45
46 pdev = platform_device_alloc(name, id);
47 if (!pdev)
48 goto err;
49
50 if (res) {
51 ret = platform_device_add_resources(pdev, res, num_resources);
52 if (ret)
53 goto err;
54 }
55
56 if (data) {
57 ret = platform_device_add_data(pdev, data, size_data);
58 if (ret)
59 goto err;
60 }
61
62 ret = platform_device_add(pdev);
63 if (ret) {
64err:
65 platform_device_put(pdev);
66 return ERR_PTR(ret);
67 }
68
69 return pdev;
70}
diff --git a/arch/arm/plat-mxc/devices/Kconfig b/arch/arm/plat-mxc/devices/Kconfig
new file mode 100644
index 000000000000..09230f8c802a
--- /dev/null
+++ b/arch/arm/plat-mxc/devices/Kconfig
@@ -0,0 +1,11 @@
1config IMX_HAVE_PLATFORM_IMX_I2C
2 bool
3
4config IMX_HAVE_PLATFORM_IMX_UART
5 bool
6
7config IMX_HAVE_PLATFORM_MXC_NAND
8 bool
9
10config IMX_HAVE_PLATFORM_SPI_IMX
11 bool
diff --git a/arch/arm/plat-mxc/devices/Makefile b/arch/arm/plat-mxc/devices/Makefile
new file mode 100644
index 000000000000..5ecbb244d210
--- /dev/null
+++ b/arch/arm/plat-mxc/devices/Makefile
@@ -0,0 +1,4 @@
1obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_I2C) += platform-imx-i2c.o
2obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_UART) += platform-imx-uart.o
3obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_NAND) += platform-mxc_nand.o
4obj-$(CONFIG_IMX_HAVE_PLATFORM_SPI_IMX) += platform-spi_imx.o
diff --git a/arch/arm/plat-mxc/devices/platform-imx-i2c.c b/arch/arm/plat-mxc/devices/platform-imx-i2c.c
new file mode 100644
index 000000000000..d0af9f7d8aed
--- /dev/null
+++ b/arch/arm/plat-mxc/devices/platform-imx-i2c.c
@@ -0,0 +1,29 @@
1/*
2 * Copyright (C) 2009-2010 Pengutronix
3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it under
6 * the terms of the GNU General Public License version 2 as published by the
7 * Free Software Foundation.
8 */
9#include <mach/devices-common.h>
10
11struct platform_device *__init imx_add_imx_i2c(int id,
12 resource_size_t iobase, resource_size_t iosize, int irq,
13 const struct imxi2c_platform_data *pdata)
14{
15 struct resource res[] = {
16 {
17 .start = iobase,
18 .end = iobase + iosize - 1,
19 .flags = IORESOURCE_MEM,
20 }, {
21 .start = irq,
22 .end = irq,
23 .flags = IORESOURCE_IRQ,
24 },
25 };
26
27 return imx_add_platform_device("imx-i2c", id, res, ARRAY_SIZE(res),
28 pdata, sizeof(*pdata));
29}
diff --git a/arch/arm/plat-mxc/devices/platform-imx-uart.c b/arch/arm/plat-mxc/devices/platform-imx-uart.c
new file mode 100644
index 000000000000..fa3dff1433e8
--- /dev/null
+++ b/arch/arm/plat-mxc/devices/platform-imx-uart.c
@@ -0,0 +1,60 @@
1/*
2 * Copyright (C) 2009-2010 Pengutronix
3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it under
6 * the terms of the GNU General Public License version 2 as published by the
7 * Free Software Foundation.
8 */
9#include <mach/devices-common.h>
10
11struct platform_device *__init imx_add_imx_uart_3irq(int id,
12 resource_size_t iobase, resource_size_t iosize,
13 resource_size_t irqrx, resource_size_t irqtx,
14 resource_size_t irqrts,
15 const struct imxuart_platform_data *pdata)
16{
17 struct resource res[] = {
18 {
19 .start = iobase,
20 .end = iobase + iosize - 1,
21 .flags = IORESOURCE_MEM,
22 }, {
23 .start = irqrx,
24 .end = irqrx,
25 .flags = IORESOURCE_IRQ,
26 }, {
27 .start = irqtx,
28 .end = irqtx,
29 .flags = IORESOURCE_IRQ,
30 }, {
31 .start = irqrts,
32 .end = irqrx,
33 .flags = IORESOURCE_IRQ,
34 },
35 };
36
37 return imx_add_platform_device("imx-uart", id, res, ARRAY_SIZE(res),
38 pdata, sizeof(*pdata));
39}
40
41struct platform_device *__init imx_add_imx_uart_1irq(int id,
42 resource_size_t iobase, resource_size_t iosize,
43 resource_size_t irq,
44 const struct imxuart_platform_data *pdata)
45{
46 struct resource res[] = {
47 {
48 .start = iobase,
49 .end = iobase + iosize - 1,
50 .flags = IORESOURCE_MEM,
51 }, {
52 .start = irq,
53 .end = irq,
54 .flags = IORESOURCE_IRQ,
55 },
56 };
57
58 return imx_add_platform_device("imx-uart", id, res, ARRAY_SIZE(res),
59 pdata, sizeof(*pdata));
60}
diff --git a/arch/arm/plat-mxc/devices/platform-mxc_nand.c b/arch/arm/plat-mxc/devices/platform-mxc_nand.c
new file mode 100644
index 000000000000..1c286418d123
--- /dev/null
+++ b/arch/arm/plat-mxc/devices/platform-mxc_nand.c
@@ -0,0 +1,44 @@
1/*
2 * Copyright (C) 2009-2010 Pengutronix
3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it under
6 * the terms of the GNU General Public License version 2 as published by the
7 * Free Software Foundation.
8 */
9#include <asm/sizes.h>
10#include <mach/devices-common.h>
11
12static struct platform_device *__init imx_add_mxc_nand(resource_size_t iobase,
13 int irq, const struct mxc_nand_platform_data *pdata,
14 resource_size_t iosize)
15{
16 static int id = 0;
17
18 struct resource res[] = {
19 {
20 .start = iobase,
21 .end = iobase + iosize - 1,
22 .flags = IORESOURCE_MEM,
23 }, {
24 .start = irq,
25 .end = irq,
26 .flags = IORESOURCE_IRQ,
27 },
28 };
29
30 return imx_add_platform_device("mxc_nand", id++, res, ARRAY_SIZE(res),
31 pdata, sizeof(*pdata));
32}
33
34struct platform_device *__init imx_add_mxc_nand_v1(resource_size_t iobase,
35 int irq, const struct mxc_nand_platform_data *pdata)
36{
37 return imx_add_mxc_nand(iobase, irq, pdata, SZ_4K);
38}
39
40struct platform_device *__init imx_add_mxc_nand_v21(resource_size_t iobase,
41 int irq, const struct mxc_nand_platform_data *pdata)
42{
43 return imx_add_mxc_nand(iobase, irq, pdata, SZ_8K);
44}
diff --git a/arch/arm/plat-mxc/devices/platform-spi_imx.c b/arch/arm/plat-mxc/devices/platform-spi_imx.c
new file mode 100644
index 000000000000..2831a6d3eb4b
--- /dev/null
+++ b/arch/arm/plat-mxc/devices/platform-spi_imx.c
@@ -0,0 +1,30 @@
1/*
2 * Copyright (C) 2009-2010 Pengutronix
3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it under
6 * the terms of the GNU General Public License version 2 as published by the
7 * Free Software Foundation.
8 */
9#include <asm/sizes.h>
10#include <mach/devices-common.h>
11
12struct platform_device *__init imx_add_spi_imx(int id,
13 resource_size_t iobase, resource_size_t iosize, int irq,
14 const struct spi_imx_master *pdata)
15{
16 struct resource res[] = {
17 {
18 .start = iobase,
19 .end = iobase + iosize - 1,
20 .flags = IORESOURCE_MEM,
21 }, {
22 .start = irq,
23 .end = irq,
24 .flags = IORESOURCE_IRQ,
25 },
26 };
27
28 return imx_add_platform_device("spi_imx", id, res, ARRAY_SIZE(res),
29 pdata, sizeof(*pdata));
30}
diff --git a/arch/arm/plat-mxc/ehci.c b/arch/arm/plat-mxc/ehci.c
index 618479258bb6..35a064ff02ba 100644
--- a/arch/arm/plat-mxc/ehci.c
+++ b/arch/arm/plat-mxc/ehci.c
@@ -11,10 +11,6 @@
11 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 11 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
12 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * for more details. 13 * for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software Foundation,
17 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 */ 14 */
19 15
20#include <linux/platform_device.h> 16#include <linux/platform_device.h>
diff --git a/arch/arm/plat-mxc/include/mach/board-armadillo5x0.h b/arch/arm/plat-mxc/include/mach/board-armadillo5x0.h
deleted file mode 100644
index 0376c133c9f4..000000000000
--- a/arch/arm/plat-mxc/include/mach/board-armadillo5x0.h
+++ /dev/null
@@ -1,15 +0,0 @@
1/*
2 * Copyright 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>.
3 * All Rights Reserved.
4 */
5
6/*
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#ifndef __ASM_ARCH_MXC_BOARD_ARMADILLO5X0_H__
13#define __ASM_ARCH_MXC_BOARD_ARMADILLO5X0_H__
14
15#endif
diff --git a/arch/arm/plat-mxc/include/mach/board-eukrea_cpuimx27.h b/arch/arm/plat-mxc/include/mach/board-eukrea_cpuimx27.h
index a1fd5830af48..45b2fb8bed61 100644
--- a/arch/arm/plat-mxc/include/mach/board-eukrea_cpuimx27.h
+++ b/arch/arm/plat-mxc/include/mach/board-eukrea_cpuimx27.h
@@ -25,7 +25,7 @@
25#ifndef __ASSEMBLY__ 25#ifndef __ASSEMBLY__
26/* 26/*
27 * This CPU module needs a baseboard to work. After basic initializing 27 * This CPU module needs a baseboard to work. After basic initializing
28 * its own devices, it calls baseboard's init function. 28 * its own devices, it calls the baseboard's init function.
29 * TODO: Add your own baseboard init function and call it from 29 * TODO: Add your own baseboard init function and call it from
30 * inside eukrea_cpuimx27_init(). 30 * inside eukrea_cpuimx27_init().
31 * 31 *
diff --git a/arch/arm/plat-mxc/include/mach/board-kzmarm11.h b/arch/arm/plat-mxc/include/mach/board-kzmarm11.h
deleted file mode 100644
index 93cc66f104c7..000000000000
--- a/arch/arm/plat-mxc/include/mach/board-kzmarm11.h
+++ /dev/null
@@ -1,39 +0,0 @@
1/*
2 * Copyright (C) 2009 Yoichi Yuasa <yuasa@linux-mips.org>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
17 */
18#ifndef __ARM_ARCH_BOARD_KZM_ARM11_H
19#define __ARM_ARCH_BOARD_KZM_ARM11_H
20
21/*
22 * KZM-ARM11-01 Board Control Registers on FPGA
23 */
24#define KZM_ARM11_CTL1 (MX31_CS4_BASE_ADDR + 0x1000)
25#define KZM_ARM11_CTL2 (MX31_CS4_BASE_ADDR + 0x1001)
26#define KZM_ARM11_RSW1 (MX31_CS4_BASE_ADDR + 0x1002)
27#define KZM_ARM11_BACK_LIGHT (MX31_CS4_BASE_ADDR + 0x1004)
28#define KZM_ARM11_FPGA_REV (MX31_CS4_BASE_ADDR + 0x1008)
29#define KZM_ARM11_7SEG_LED (MX31_CS4_BASE_ADDR + 0x1010)
30#define KZM_ARM11_LEDS (MX31_CS4_BASE_ADDR + 0x1020)
31#define KZM_ARM11_DIPSW2 (MX31_CS4_BASE_ADDR + 0x1003)
32
33/*
34 * External UART for touch panel on FPGA
35 */
36#define KZM_ARM11_16550 (MX31_CS4_BASE_ADDR + 0x1050)
37
38#endif /* __ARM_ARCH_BOARD_KZM_ARM11_H */
39
diff --git a/arch/arm/plat-mxc/include/mach/board-mx21ads.h b/arch/arm/plat-mxc/include/mach/board-mx21ads.h
deleted file mode 100644
index 0cf4fa29510c..000000000000
--- a/arch/arm/plat-mxc/include/mach/board-mx21ads.h
+++ /dev/null
@@ -1,52 +0,0 @@
1/*
2 * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
3 */
4
5/*
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
9 *
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
12 */
13
14#ifndef __ASM_ARCH_MXC_BOARD_MX21ADS_H__
15#define __ASM_ARCH_MXC_BOARD_MX21ADS_H__
16
17/*
18 * Memory-mapped I/O on MX21ADS base board
19 */
20#define MX21ADS_MMIO_BASE_ADDR 0xF5000000
21#define MX21ADS_MMIO_SIZE SZ_16M
22
23#define MX21ADS_REG_ADDR(offset) (void __force __iomem *) \
24 (MX21ADS_MMIO_BASE_ADDR + (offset))
25
26#define MX21ADS_CS8900A_IRQ IRQ_GPIOE(11)
27#define MX21ADS_CS8900A_IOBASE_REG MX21ADS_REG_ADDR(0x000000)
28#define MX21ADS_ST16C255_IOBASE_REG MX21ADS_REG_ADDR(0x200000)
29#define MX21ADS_VERSION_REG MX21ADS_REG_ADDR(0x400000)
30#define MX21ADS_IO_REG MX21ADS_REG_ADDR(0x800000)
31
32/* MX21ADS_IO_REG bit definitions */
33#define MX21ADS_IO_SD_WP 0x0001 /* read */
34#define MX21ADS_IO_TP6 0x0001 /* write */
35#define MX21ADS_IO_SW_SEL 0x0002 /* read */
36#define MX21ADS_IO_TP7 0x0002 /* write */
37#define MX21ADS_IO_RESET_E_UART 0x0004
38#define MX21ADS_IO_RESET_BASE 0x0008
39#define MX21ADS_IO_CSI_CTL2 0x0010
40#define MX21ADS_IO_CSI_CTL1 0x0020
41#define MX21ADS_IO_CSI_CTL0 0x0040
42#define MX21ADS_IO_UART1_EN 0x0080
43#define MX21ADS_IO_UART4_EN 0x0100
44#define MX21ADS_IO_LCDON 0x0200
45#define MX21ADS_IO_IRDA_EN 0x0400
46#define MX21ADS_IO_IRDA_FIR_SEL 0x0800
47#define MX21ADS_IO_IRDA_MD0_B 0x1000
48#define MX21ADS_IO_IRDA_MD1 0x2000
49#define MX21ADS_IO_LED4_ON 0x4000
50#define MX21ADS_IO_LED3_ON 0x8000
51
52#endif /* __ASM_ARCH_MXC_BOARD_MX21ADS_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/board-mx27ads.h b/arch/arm/plat-mxc/include/mach/board-mx27ads.h
deleted file mode 100644
index 7776d230327f..000000000000
--- a/arch/arm/plat-mxc/include/mach/board-mx27ads.h
+++ /dev/null
@@ -1,344 +0,0 @@
1/*
2 * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
3 */
4
5/*
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
9 *
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
12 */
13
14#ifndef __ASM_ARCH_MXC_BOARD_MX27ADS_H__
15#define __ASM_ARCH_MXC_BOARD_MX27ADS_H__
16
17/* external interrupt multiplexer */
18#define MXC_EXP_IO_BASE (MXC_BOARD_IRQ_START)
19
20#define MXC_VIRTUAL_INTS_BASE (MXC_EXP_IO_BASE + MXC_MAX_EXP_IO_LINES)
21#define MXC_SDIO1_CARD_IRQ MXC_VIRTUAL_INTS_BASE
22#define MXC_SDIO2_CARD_IRQ (MXC_VIRTUAL_INTS_BASE + 1)
23#define MXC_SDIO3_CARD_IRQ (MXC_VIRTUAL_INTS_BASE + 2)
24
25#define MXC_MAX_BOARD_INTS (MXC_MAX_EXP_IO_LINES + \
26 MXC_MAX_VIRTUAL_INTS)
27
28/*
29 * @name Memory Size parameters
30 */
31
32/*
33 * Size of SDRAM memory
34 */
35#define SDRAM_MEM_SIZE SZ_128M
36
37/*
38 * PBC Controller parameters
39 */
40
41/*
42 * Base address of PBC controller, CS4
43 */
44#define PBC_BASE_ADDRESS 0xf4300000
45#define PBC_REG_ADDR(offset) (void __force __iomem *) \
46 (PBC_BASE_ADDRESS + (offset))
47
48/*
49 * PBC Interupt name definitions
50 */
51#define PBC_GPIO1_0 0
52#define PBC_GPIO1_1 1
53#define PBC_GPIO1_2 2
54#define PBC_GPIO1_3 3
55#define PBC_GPIO1_4 4
56#define PBC_GPIO1_5 5
57
58#define PBC_INTR_MAX_NUM 6
59#define PBC_INTR_SHARED_MAX_NUM 8
60
61/* When the PBC address connection is fixed in h/w, defined as 1 */
62#define PBC_ADDR_SH 0
63
64/* Offsets for the PBC Controller register */
65/*
66 * PBC Board version register offset
67 */
68#define PBC_VERSION_REG PBC_REG_ADDR(0x00000 >> PBC_ADDR_SH)
69/*
70 * PBC Board control register 1 set address.
71 */
72#define PBC_BCTRL1_SET_REG PBC_REG_ADDR(0x00008 >> PBC_ADDR_SH)
73/*
74 * PBC Board control register 1 clear address.
75 */
76#define PBC_BCTRL1_CLEAR_REG PBC_REG_ADDR(0x0000C >> PBC_ADDR_SH)
77/*
78 * PBC Board control register 2 set address.
79 */
80#define PBC_BCTRL2_SET_REG PBC_REG_ADDR(0x00010 >> PBC_ADDR_SH)
81/*
82 * PBC Board control register 2 clear address.
83 */
84#define PBC_BCTRL2_CLEAR_REG PBC_REG_ADDR(0x00014 >> PBC_ADDR_SH)
85/*
86 * PBC Board control register 3 set address.
87 */
88#define PBC_BCTRL3_SET_REG PBC_REG_ADDR(0x00018 >> PBC_ADDR_SH)
89/*
90 * PBC Board control register 3 clear address.
91 */
92#define PBC_BCTRL3_CLEAR_REG PBC_REG_ADDR(0x0001C >> PBC_ADDR_SH)
93/*
94 * PBC Board control register 3 set address.
95 */
96#define PBC_BCTRL4_SET_REG PBC_REG_ADDR(0x00020 >> PBC_ADDR_SH)
97/*
98 * PBC Board control register 4 clear address.
99 */
100#define PBC_BCTRL4_CLEAR_REG PBC_REG_ADDR(0x00024 >> PBC_ADDR_SH)
101/*PBC_ADDR_SH
102 * PBC Board status register 1.
103 */
104#define PBC_BSTAT1_REG PBC_REG_ADDR(0x00028 >> PBC_ADDR_SH)
105/*
106 * PBC Board interrupt status register.
107 */
108#define PBC_INTSTATUS_REG PBC_REG_ADDR(0x0002C >> PBC_ADDR_SH)
109/*
110 * PBC Board interrupt current status register.
111 */
112#define PBC_INTCURR_STATUS_REG PBC_REG_ADDR(0x00034 >> PBC_ADDR_SH)
113/*
114 * PBC Interrupt mask register set address.
115 */
116#define PBC_INTMASK_SET_REG PBC_REG_ADDR(0x00038 >> PBC_ADDR_SH)
117/*
118 * PBC Interrupt mask register clear address.
119 */
120#define PBC_INTMASK_CLEAR_REG PBC_REG_ADDR(0x0003C >> PBC_ADDR_SH)
121/*
122 * External UART A.
123 */
124#define PBC_SC16C652_UARTA_REG PBC_REG_ADDR(0x20000 >> PBC_ADDR_SH)
125/*
126 * UART 4 Expanding Signal Status.
127 */
128#define PBC_UART_STATUS_REG PBC_REG_ADDR(0x22000 >> PBC_ADDR_SH)
129/*
130 * UART 4 Expanding Signal Control Set.
131 */
132#define PBC_UCTRL_SET_REG PBC_REG_ADDR(0x24000 >> PBC_ADDR_SH)
133/*
134 * UART 4 Expanding Signal Control Clear.
135 */
136#define PBC_UCTRL_CLR_REG PBC_REG_ADDR(0x26000 >> PBC_ADDR_SH)
137/*
138 * Ethernet Controller IO base address.
139 */
140#define PBC_CS8900A_IOBASE_REG PBC_REG_ADDR(0x40000 >> PBC_ADDR_SH)
141/*
142 * Ethernet Controller Memory base address.
143 */
144#define PBC_CS8900A_MEMBASE_REG PBC_REG_ADDR(0x42000 >> PBC_ADDR_SH)
145/*
146 * Ethernet Controller DMA base address.
147 */
148#define PBC_CS8900A_DMABASE_REG PBC_REG_ADDR(0x44000 >> PBC_ADDR_SH)
149
150/* PBC Board Version Register bit definition */
151#define PBC_VERSION_ADS 0x8000 /* Bit15=1 means version for ads */
152#define PBC_VERSION_EVB_REVB 0x4000 /* BIT14=1 means version for evb revb */
153
154/* PBC Board Control Register 1 bit definitions */
155#define PBC_BCTRL1_ERST 0x0001 /* Ethernet Reset */
156#define PBC_BCTRL1_URST 0x0002 /* Reset External UART controller */
157#define PBC_BCTRL1_FRST 0x0004 /* FEC Reset */
158#define PBC_BCTRL1_ESLEEP 0x0010 /* Enable ethernet Sleep */
159#define PBC_BCTRL1_LCDON 0x0800 /* Enable the LCD */
160
161/* PBC Board Control Register 2 bit definitions */
162#define PBC_BCTRL2_VCC_EN 0x0004 /* Enable VCC */
163#define PBC_BCTRL2_VPP_EN 0x0008 /* Enable Vpp */
164#define PBC_BCTRL2_ATAFEC_EN 0X0010
165#define PBC_BCTRL2_ATAFEC_SEL 0X0020
166#define PBC_BCTRL2_ATA_EN 0X0040
167#define PBC_BCTRL2_IRDA_SD 0X0080
168#define PBC_BCTRL2_IRDA_EN 0X0100
169#define PBC_BCTRL2_CCTL10 0X0200
170#define PBC_BCTRL2_CCTL11 0X0400
171
172/* PBC Board Control Register 3 bit definitions */
173#define PBC_BCTRL3_HSH_EN 0X0020
174#define PBC_BCTRL3_FSH_MOD 0X0040
175#define PBC_BCTRL3_OTG_HS_EN 0X0080
176#define PBC_BCTRL3_OTG_VBUS_EN 0X0100
177#define PBC_BCTRL3_FSH_VBUS_EN 0X0200
178#define PBC_BCTRL3_USB_OTG_ON 0X0800
179#define PBC_BCTRL3_USB_FSH_ON 0X1000
180
181/* PBC Board Control Register 4 bit definitions */
182#define PBC_BCTRL4_REGEN_SEL 0X0001
183#define PBC_BCTRL4_USER_OFF 0X0002
184#define PBC_BCTRL4_VIB_EN 0X0004
185#define PBC_BCTRL4_PWRGT1_EN 0X0008
186#define PBC_BCTRL4_PWRGT2_EN 0X0010
187#define PBC_BCTRL4_STDBY_PRI 0X0020
188
189#ifndef __ASSEMBLY__
190/*
191 * Enumerations for SD cards and memory stick card. This corresponds to
192 * the card EN bits in the IMR: SD1_EN | MS_EN | SD3_EN | SD2_EN.
193 */
194enum mxc_card_no {
195 MXC_CARD_SD2 = 0,
196 MXC_CARD_SD3,
197 MXC_CARD_MS,
198 MXC_CARD_SD1,
199 MXC_CARD_MIN = MXC_CARD_SD2,
200 MXC_CARD_MAX = MXC_CARD_SD1,
201};
202#endif
203
204#define MXC_CPLD_VER_1_50 0x01
205
206/*
207 * PBC BSTAT Register bit definitions
208 */
209#define PBC_BSTAT_PRI_INT 0X0001
210#define PBC_BSTAT_USB_BYP 0X0002
211#define PBC_BSTAT_ATA_IOCS16 0X0004
212#define PBC_BSTAT_ATA_CBLID 0X0008
213#define PBC_BSTAT_ATA_DASP 0X0010
214#define PBC_BSTAT_PWR_RDY 0X0020
215#define PBC_BSTAT_SD3_WP 0X0100
216#define PBC_BSTAT_SD2_WP 0X0200
217#define PBC_BSTAT_SD1_WP 0X0400
218#define PBC_BSTAT_SD3_DET 0X0800
219#define PBC_BSTAT_SD2_DET 0X1000
220#define PBC_BSTAT_SD1_DET 0X2000
221#define PBC_BSTAT_MS_DET 0X4000
222#define PBC_BSTAT_SD3_DET_BIT 11
223#define PBC_BSTAT_SD2_DET_BIT 12
224#define PBC_BSTAT_SD1_DET_BIT 13
225#define PBC_BSTAT_MS_DET_BIT 14
226#define MXC_BSTAT_BIT(n) ((n == MXC_CARD_SD2) ? PBC_BSTAT_SD2_DET : \
227 ((n == MXC_CARD_SD3) ? PBC_BSTAT_SD3_DET : \
228 ((n == MXC_CARD_SD1) ? PBC_BSTAT_SD1_DET : \
229 ((n == MXC_CARD_MS) ? PBC_BSTAT_MS_DET : \
230 0x0))))
231
232/*
233 * PBC UART Control Register bit definitions
234 */
235#define PBC_UCTRL_DCE_DCD 0X0001
236#define PBC_UCTRL_DCE_DSR 0X0002
237#define PBC_UCTRL_DCE_RI 0X0004
238#define PBC_UCTRL_DTE_DTR 0X0100
239
240/*
241 * PBC UART Status Register bit definitions
242 */
243#define PBC_USTAT_DTE_DCD 0X0001
244#define PBC_USTAT_DTE_DSR 0X0002
245#define PBC_USTAT_DTE_RI 0X0004
246#define PBC_USTAT_DCE_DTR 0X0100
247
248/*
249 * PBC Interupt mask register bit definitions
250 */
251#define PBC_INTR_SD3_R_EN_BIT 4
252#define PBC_INTR_SD2_R_EN_BIT 0
253#define PBC_INTR_SD1_R_EN_BIT 6
254#define PBC_INTR_MS_R_EN_BIT 5
255#define PBC_INTR_SD3_EN_BIT 13
256#define PBC_INTR_SD2_EN_BIT 12
257#define PBC_INTR_MS_EN_BIT 14
258#define PBC_INTR_SD1_EN_BIT 15
259
260#define PBC_INTR_SD2_R_EN 0x0001
261#define PBC_INTR_LOW_BAT 0X0002
262#define PBC_INTR_OTG_FSOVER 0X0004
263#define PBC_INTR_FSH_OVER 0X0008
264#define PBC_INTR_SD3_R_EN 0x0010
265#define PBC_INTR_MS_R_EN 0x0020
266#define PBC_INTR_SD1_R_EN 0x0040
267#define PBC_INTR_FEC_INT 0X0080
268#define PBC_INTR_ENET_INT 0X0100
269#define PBC_INTR_OTGFS_INT 0X0200
270#define PBC_INTR_XUART_INT 0X0400
271#define PBC_INTR_CCTL12 0X0800
272#define PBC_INTR_SD2_EN 0x1000
273#define PBC_INTR_SD3_EN 0x2000
274#define PBC_INTR_MS_EN 0x4000
275#define PBC_INTR_SD1_EN 0x8000
276
277
278
279/* For interrupts like xuart, enet etc */
280#define EXPIO_PARENT_INT IOMUX_TO_IRQ(MX27_PIN_TIN)
281#define MXC_MAX_EXP_IO_LINES 16
282
283/*
284 * This corresponds to PBC_INTMASK_SET_REG at offset 0x38.
285 *
286 */
287#define EXPIO_INT_LOW_BAT (MXC_EXP_IO_BASE + 1)
288#define EXPIO_INT_OTG_FS_OVR (MXC_EXP_IO_BASE + 2)
289#define EXPIO_INT_FSH_OVR (MXC_EXP_IO_BASE + 3)
290#define EXPIO_INT_RES4 (MXC_EXP_IO_BASE + 4)
291#define EXPIO_INT_RES5 (MXC_EXP_IO_BASE + 5)
292#define EXPIO_INT_RES6 (MXC_EXP_IO_BASE + 6)
293#define EXPIO_INT_FEC (MXC_EXP_IO_BASE + 7)
294#define EXPIO_INT_ENET_INT (MXC_EXP_IO_BASE + 8)
295#define EXPIO_INT_OTG_FS_INT (MXC_EXP_IO_BASE + 9)
296#define EXPIO_INT_XUART_INTA (MXC_EXP_IO_BASE + 10)
297#define EXPIO_INT_CCTL12_INT (MXC_EXP_IO_BASE + 11)
298#define EXPIO_INT_SD2_EN (MXC_EXP_IO_BASE + 12)
299#define EXPIO_INT_SD3_EN (MXC_EXP_IO_BASE + 13)
300#define EXPIO_INT_MS_EN (MXC_EXP_IO_BASE + 14)
301#define EXPIO_INT_SD1_EN (MXC_EXP_IO_BASE + 15)
302
303/*
304 * This is System IRQ used by CS8900A for interrupt generation
305 * taken from platform.h
306 */
307#define CS8900AIRQ EXPIO_INT_ENET_INT
308/* This is I/O Base address used to access registers of CS8900A on MXC ADS */
309#define CS8900A_BASE_ADDRESS (PBC_CS8900A_IOBASE_REG + 0x300)
310
311#define MXC_PMIC_INT_LINE IOMUX_TO_IRQ(MX27_PIN_TOUT)
312
313/*
314* This is used to detect if the CPLD version is for mx27 evb board rev-a
315*/
316#define PBC_CPLD_VERSION_IS_REVA() \
317 ((__raw_readw(PBC_VERSION_REG) & \
318 (PBC_VERSION_ADS | PBC_VERSION_EVB_REVB))\
319 == 0)
320
321/* This is used to active or inactive ata signal in CPLD .
322 * It is dependent with hardware
323 */
324#define PBC_ATA_SIGNAL_ACTIVE() \
325 __raw_writew( \
326 PBC_BCTRL2_ATAFEC_EN|PBC_BCTRL2_ATAFEC_SEL|PBC_BCTRL2_ATA_EN, \
327 PBC_BCTRL2_CLEAR_REG)
328
329#define PBC_ATA_SIGNAL_INACTIVE() \
330 __raw_writew( \
331 PBC_BCTRL2_ATAFEC_EN|PBC_BCTRL2_ATAFEC_SEL|PBC_BCTRL2_ATA_EN, \
332 PBC_BCTRL2_SET_REG)
333
334#define MXC_BD_LED1 (1 << 5)
335#define MXC_BD_LED2 (1 << 6)
336#define MXC_BD_LED_ON(led) \
337 __raw_writew(led, PBC_BCTRL1_SET_REG)
338#define MXC_BD_LED_OFF(led) \
339 __raw_writew(led, PBC_BCTRL1_CLEAR_REG)
340
341/* to determine the correct external crystal reference */
342#define CKIH_27MHZ_BIT_SET (1 << 3)
343
344#endif /* __ASM_ARCH_MXC_BOARD_MX27ADS_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/board-mx27lite.h b/arch/arm/plat-mxc/include/mach/board-mx27lite.h
deleted file mode 100644
index ea87551d2736..000000000000
--- a/arch/arm/plat-mxc/include/mach/board-mx27lite.h
+++ /dev/null
@@ -1,14 +0,0 @@
1/*
2 * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved.
3 */
4
5/*
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_MXC_BOARD_MX27LITE_H__
12#define __ASM_ARCH_MXC_BOARD_MX27LITE_H__
13
14#endif /* __ASM_ARCH_MXC_BOARD_MX27LITE_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/board-mx27pdk.h b/arch/arm/plat-mxc/include/mach/board-mx27pdk.h
deleted file mode 100644
index fec1bcfa9164..000000000000
--- a/arch/arm/plat-mxc/include/mach/board-mx27pdk.h
+++ /dev/null
@@ -1,14 +0,0 @@
1/*
2 * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved.
3 */
4
5/*
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_MXC_BOARD_MX27PDK_H__
12#define __ASM_ARCH_MXC_BOARD_MX27PDK_H__
13
14#endif /* __ASM_ARCH_MXC_BOARD_MX27PDK_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31_3ds.h b/arch/arm/plat-mxc/include/mach/board-mx31_3ds.h
deleted file mode 100644
index da92933a233b..000000000000
--- a/arch/arm/plat-mxc/include/mach/board-mx31_3ds.h
+++ /dev/null
@@ -1,59 +0,0 @@
1/*
2 * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
3 */
4
5/*
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_MXC_BOARD_MX31_3DS_H__
12#define __ASM_ARCH_MXC_BOARD_MX31_3DS_H__
13
14/* Definitions for components on the Debug board */
15
16/* Base address of CPLD controller on the Debug board */
17#define DEBUG_BASE_ADDRESS CS5_IO_ADDRESS(CS5_BASE_ADDR)
18
19/* LAN9217 ethernet base address */
20#define LAN9217_BASE_ADDR CS5_BASE_ADDR
21
22/* CPLD config and interrupt base address */
23#define CPLD_ADDR (DEBUG_BASE_ADDRESS + 0x20000)
24
25/* LED switchs */
26#define CPLD_LED_REG (CPLD_ADDR + 0x00)
27/* buttons */
28#define CPLD_SWITCH_BUTTONS_REG (EXPIO_ADDR + 0x08)
29/* status, interrupt */
30#define CPLD_INT_STATUS_REG (CPLD_ADDR + 0x10)
31#define CPLD_INT_MASK_REG (CPLD_ADDR + 0x38)
32#define CPLD_INT_RESET_REG (CPLD_ADDR + 0x20)
33/* magic word for debug CPLD */
34#define CPLD_MAGIC_NUMBER1_REG (CPLD_ADDR + 0x40)
35#define CPLD_MAGIC_NUMBER2_REG (CPLD_ADDR + 0x48)
36/* CPLD code version */
37#define CPLD_CODE_VER_REG (CPLD_ADDR + 0x50)
38/* magic word for debug CPLD */
39#define CPLD_MAGIC_NUMBER3_REG (CPLD_ADDR + 0x58)
40/* module reset register */
41#define CPLD_MODULE_RESET_REG (CPLD_ADDR + 0x60)
42/* CPU ID and Personality ID */
43#define CPLD_MCU_BOARD_ID_REG (CPLD_ADDR + 0x68)
44
45/* CPLD IRQ line for external uart, external ethernet etc */
46#define EXPIO_PARENT_INT IOMUX_TO_IRQ(MX31_PIN_GPIO1_1)
47
48#define MXC_EXP_IO_BASE (MXC_BOARD_IRQ_START)
49#define MXC_IRQ_TO_EXPIO(irq) ((irq) - MXC_EXP_IO_BASE)
50
51#define EXPIO_INT_ENET (MXC_EXP_IO_BASE + 0)
52#define EXPIO_INT_XUART_A (MXC_EXP_IO_BASE + 1)
53#define EXPIO_INT_XUART_B (MXC_EXP_IO_BASE + 2)
54#define EXPIO_INT_BUTTON_A (MXC_EXP_IO_BASE + 3)
55#define EXPIO_INT_BUTTON_B (MXC_EXP_IO_BASE + 4)
56
57#define MXC_MAX_EXP_IO_LINES 16
58
59#endif /* __ASM_ARCH_MXC_BOARD_MX31_3DS_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31ads.h b/arch/arm/plat-mxc/include/mach/board-mx31ads.h
deleted file mode 100644
index 095a199591c6..000000000000
--- a/arch/arm/plat-mxc/include/mach/board-mx31ads.h
+++ /dev/null
@@ -1,117 +0,0 @@
1/*
2 * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
3 */
4
5/*
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_MXC_BOARD_MX31ADS_H__
12#define __ASM_ARCH_MXC_BOARD_MX31ADS_H__
13
14#include <mach/hardware.h>
15
16/* Base address of PBC controller */
17#define PBC_BASE_ADDRESS MX31_CS4_BASE_ADDR_VIRT
18/* Offsets for the PBC Controller register */
19
20/* PBC Board status register offset */
21#define PBC_BSTAT 0x000002
22
23/* PBC Board control register 1 set address */
24#define PBC_BCTRL1_SET 0x000004
25
26/* PBC Board control register 1 clear address */
27#define PBC_BCTRL1_CLEAR 0x000006
28
29/* PBC Board control register 2 set address */
30#define PBC_BCTRL2_SET 0x000008
31
32/* PBC Board control register 2 clear address */
33#define PBC_BCTRL2_CLEAR 0x00000A
34
35/* PBC Board control register 3 set address */
36#define PBC_BCTRL3_SET 0x00000C
37
38/* PBC Board control register 3 clear address */
39#define PBC_BCTRL3_CLEAR 0x00000E
40
41/* PBC Board control register 4 set address */
42#define PBC_BCTRL4_SET 0x000010
43
44/* PBC Board control register 4 clear address */
45#define PBC_BCTRL4_CLEAR 0x000012
46
47/* PBC Board status register 1 */
48#define PBC_BSTAT1 0x000014
49
50/* PBC Board interrupt status register */
51#define PBC_INTSTATUS 0x000016
52
53/* PBC Board interrupt current status register */
54#define PBC_INTCURR_STATUS 0x000018
55
56/* PBC Interrupt mask register set address */
57#define PBC_INTMASK_SET 0x00001A
58
59/* PBC Interrupt mask register clear address */
60#define PBC_INTMASK_CLEAR 0x00001C
61
62/* External UART A */
63#define PBC_SC16C652_UARTA 0x010000
64
65/* External UART B */
66#define PBC_SC16C652_UARTB 0x010010
67
68/* Ethernet Controller IO base address */
69#define PBC_CS8900A_IOBASE 0x020000
70
71/* Ethernet Controller Memory base address */
72#define PBC_CS8900A_MEMBASE 0x021000
73
74/* Ethernet Controller DMA base address */
75#define PBC_CS8900A_DMABASE 0x022000
76
77/* External chip select 0 */
78#define PBC_XCS0 0x040000
79
80/* LCD Display enable */
81#define PBC_LCD_EN_B 0x060000
82
83/* Code test debug enable */
84#define PBC_CODE_B 0x070000
85
86/* PSRAM memory select */
87#define PBC_PSRAM_B 0x5000000
88
89#define PBC_INTSTATUS_REG (PBC_INTSTATUS + PBC_BASE_ADDRESS)
90#define PBC_INTCURR_STATUS_REG (PBC_INTCURR_STATUS + PBC_BASE_ADDRESS)
91#define PBC_INTMASK_SET_REG (PBC_INTMASK_SET + PBC_BASE_ADDRESS)
92#define PBC_INTMASK_CLEAR_REG (PBC_INTMASK_CLEAR + PBC_BASE_ADDRESS)
93#define EXPIO_PARENT_INT IOMUX_TO_IRQ(MX31_PIN_GPIO1_4)
94
95#define MXC_EXP_IO_BASE (MXC_BOARD_IRQ_START)
96#define MXC_IRQ_TO_EXPIO(irq) ((irq) - MXC_EXP_IO_BASE)
97
98#define EXPIO_INT_LOW_BAT (MXC_EXP_IO_BASE + 0)
99#define EXPIO_INT_PB_IRQ (MXC_EXP_IO_BASE + 1)
100#define EXPIO_INT_OTG_FS_OVR (MXC_EXP_IO_BASE + 2)
101#define EXPIO_INT_FSH_OVR (MXC_EXP_IO_BASE + 3)
102#define EXPIO_INT_RES4 (MXC_EXP_IO_BASE + 4)
103#define EXPIO_INT_RES5 (MXC_EXP_IO_BASE + 5)
104#define EXPIO_INT_RES6 (MXC_EXP_IO_BASE + 6)
105#define EXPIO_INT_RES7 (MXC_EXP_IO_BASE + 7)
106#define EXPIO_INT_ENET_INT (MXC_EXP_IO_BASE + 8)
107#define EXPIO_INT_OTG_FS_INT (MXC_EXP_IO_BASE + 9)
108#define EXPIO_INT_XUART_INTA (MXC_EXP_IO_BASE + 10)
109#define EXPIO_INT_XUART_INTB (MXC_EXP_IO_BASE + 11)
110#define EXPIO_INT_SYNTH_IRQ (MXC_EXP_IO_BASE + 12)
111#define EXPIO_INT_CE_INT1 (MXC_EXP_IO_BASE + 13)
112#define EXPIO_INT_CE_INT2 (MXC_EXP_IO_BASE + 14)
113#define EXPIO_INT_RES15 (MXC_EXP_IO_BASE + 15)
114
115#define MXC_MAX_EXP_IO_LINES 16
116
117#endif /* __ASM_ARCH_MXC_BOARD_MX31ADS_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31lilly.h b/arch/arm/plat-mxc/include/mach/board-mx31lilly.h
index eb5a5024622e..0df71bfefbb1 100644
--- a/arch/arm/plat-mxc/include/mach/board-mx31lilly.h
+++ b/arch/arm/plat-mxc/include/mach/board-mx31lilly.h
@@ -31,7 +31,7 @@ enum mx31lilly_boards {
31 31
32/* 32/*
33 * This CPU module needs a baseboard to work. After basic initializing 33 * This CPU module needs a baseboard to work. After basic initializing
34 * its own devices, it calls baseboard's init function. 34 * its own devices, it calls the baseboard's init function.
35 */ 35 */
36 36
37extern void mx31lilly_db_init(void); 37extern void mx31lilly_db_init(void);
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31lite.h b/arch/arm/plat-mxc/include/mach/board-mx31lite.h
index 2b2da0367578..c1ad0ae807cc 100644
--- a/arch/arm/plat-mxc/include/mach/board-mx31lite.h
+++ b/arch/arm/plat-mxc/include/mach/board-mx31lite.h
@@ -32,7 +32,7 @@ enum mx31lite_boards {
32 32
33/* 33/*
34 * This CPU module needs a baseboard to work. After basic initializing 34 * This CPU module needs a baseboard to work. After basic initializing
35 * its own devices, it calls baseboard's init function. 35 * its own devices, it calls the baseboard's init function.
36 */ 36 */
37 37
38extern void mx31lite_db_init(void); 38extern void mx31lite_db_init(void);
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31moboard.h b/arch/arm/plat-mxc/include/mach/board-mx31moboard.h
index 36ff3cedee1a..de14543891cf 100644
--- a/arch/arm/plat-mxc/include/mach/board-mx31moboard.h
+++ b/arch/arm/plat-mxc/include/mach/board-mx31moboard.h
@@ -31,7 +31,7 @@ enum mx31moboard_boards {
31 31
32/* 32/*
33 * This CPU module needs a baseboard to work. After basic initializing 33 * This CPU module needs a baseboard to work. After basic initializing
34 * its own devices, it calls baseboard's init function. 34 * its own devices, it calls the baseboard's init function.
35 */ 35 */
36 36
37extern void mx31moboard_devboard_init(void); 37extern void mx31moboard_devboard_init(void);
diff --git a/arch/arm/plat-mxc/include/mach/board-mx35pdk.h b/arch/arm/plat-mxc/include/mach/board-mx35pdk.h
deleted file mode 100644
index 383f1c04df06..000000000000
--- a/arch/arm/plat-mxc/include/mach/board-mx35pdk.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/*
2 * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */
18
19#ifndef __ASM_ARCH_MXC_BOARD_MX35PDK_H__
20#define __ASM_ARCH_MXC_BOARD_MX35PDK_H__
21
22#endif /* __ASM_ARCH_MXC_BOARD_MX35PDK_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/board-pcm037.h b/arch/arm/plat-mxc/include/mach/board-pcm037.h
deleted file mode 100644
index 13411709b13a..000000000000
--- a/arch/arm/plat-mxc/include/mach/board-pcm037.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/*
2 * Copyright (C) 2008 Sascha Hauer, Pengutronix
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */
18
19#ifndef __ASM_ARCH_MXC_BOARD_PCM037_H__
20#define __ASM_ARCH_MXC_BOARD_PCM037_H__
21
22#endif /* __ASM_ARCH_MXC_BOARD_PCM037_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/board-pcm038.h b/arch/arm/plat-mxc/include/mach/board-pcm038.h
index 410f9786ed22..6f371e35753d 100644
--- a/arch/arm/plat-mxc/include/mach/board-pcm038.h
+++ b/arch/arm/plat-mxc/include/mach/board-pcm038.h
@@ -22,7 +22,7 @@
22#ifndef __ASSEMBLY__ 22#ifndef __ASSEMBLY__
23/* 23/*
24 * This CPU module needs a baseboard to work. After basic initializing 24 * This CPU module needs a baseboard to work. After basic initializing
25 * its own devices, it calls baseboard's init function. 25 * its own devices, it calls the baseboard's init function.
26 * TODO: Add your own baseboard init function and call it from 26 * TODO: Add your own baseboard init function and call it from
27 * inside pcm038_init(). 27 * inside pcm038_init().
28 * 28 *
diff --git a/arch/arm/plat-mxc/include/mach/board-pcm043.h b/arch/arm/plat-mxc/include/mach/board-pcm043.h
deleted file mode 100644
index 1ac4e1682e5c..000000000000
--- a/arch/arm/plat-mxc/include/mach/board-pcm043.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/*
2 * Copyright (C) 2008 Sascha Hauer, Pengutronix
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */
18
19#ifndef __ASM_ARCH_MXC_BOARD_PCM043_H__
20#define __ASM_ARCH_MXC_BOARD_PCM043_H__
21
22#endif /* __ASM_ARCH_MXC_BOARD_PCM043_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/board-qong.h b/arch/arm/plat-mxc/include/mach/board-qong.h
deleted file mode 100644
index 6d88c7af4b23..000000000000
--- a/arch/arm/plat-mxc/include/mach/board-qong.h
+++ /dev/null
@@ -1,17 +0,0 @@
1/*
2 * Copyright 2009 Ilya Yanok, Emcraft Systems Ltd, <yanok@emcraft.com>
3 */
4
5/*
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_MXC_BOARD_QONG_H__
12#define __ASM_ARCH_MXC_BOARD_QONG_H__
13
14/* NOR FLASH */
15#define QONG_NOR_SIZE (128*1024*1024)
16
17#endif /* __ASM_ARCH_MXC_BOARD_QONG_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h
new file mode 100644
index 000000000000..05c8d3f0a08f
--- /dev/null
+++ b/arch/arm/plat-mxc/include/mach/devices-common.h
@@ -0,0 +1,42 @@
1/*
2 * Copyright (C) 2009-2010 Pengutronix
3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it under
6 * the terms of the GNU General Public License version 2 as published by the
7 * Free Software Foundation.
8 */
9#include <linux/kernel.h>
10#include <linux/platform_device.h>
11#include <linux/init.h>
12
13struct platform_device *imx_add_platform_device(const char *name, int id,
14 const struct resource *res, unsigned int num_resources,
15 const void *data, size_t size_data);
16
17#include <mach/i2c.h>
18struct platform_device *__init imx_add_imx_i2c(int id,
19 resource_size_t iobase, resource_size_t iosize, int irq,
20 const struct imxi2c_platform_data *pdata);
21
22#include <mach/imx-uart.h>
23struct platform_device *__init imx_add_imx_uart_3irq(int id,
24 resource_size_t iobase, resource_size_t iosize,
25 resource_size_t irqrx, resource_size_t irqtx,
26 resource_size_t irqrts,
27 const struct imxuart_platform_data *pdata);
28struct platform_device *__init imx_add_imx_uart_1irq(int id,
29 resource_size_t iobase, resource_size_t iosize,
30 resource_size_t irq,
31 const struct imxuart_platform_data *pdata);
32
33#include <mach/mxc_nand.h>
34struct platform_device *__init imx_add_mxc_nand_v1(resource_size_t iobase,
35 int irq, const struct mxc_nand_platform_data *pdata);
36struct platform_device *__init imx_add_mxc_nand_v21(resource_size_t iobase,
37 int irq, const struct mxc_nand_platform_data *pdata);
38
39#include <mach/spi.h>
40struct platform_device *__init imx_add_spi_imx(int id,
41 resource_size_t iobase, resource_size_t iosize, int irq,
42 const struct spi_imx_master *pdata);
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mxc91231.h b/arch/arm/plat-mxc/include/mach/iomux-mxc91231.h
index 3887f3fe29d4..15d59510f597 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mxc91231.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mxc91231.h
@@ -12,10 +12,6 @@
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details. 14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */ 15 */
20 16
21#ifndef __MACH_IOMUX_MXC91231_H__ 17#ifndef __MACH_IOMUX_MXC91231_H__
diff --git a/arch/arm/plat-mxc/include/mach/mx1.h b/arch/arm/plat-mxc/include/mach/mx1.h
index 5eba7e6785de..641b24618239 100644
--- a/arch/arm/plat-mxc/include/mach/mx1.h
+++ b/arch/arm/plat-mxc/include/mach/mx1.h
@@ -91,24 +91,24 @@
91#define MX1_SIM_DATA_INT 16 91#define MX1_SIM_DATA_INT 16
92#define MX1_RTC_INT 17 92#define MX1_RTC_INT 17
93#define MX1_RTC_SAMINT 18 93#define MX1_RTC_SAMINT 18
94#define MX1_UART2_MINT_PFERR 19 94#define MX1_INT_UART2PFERR 19
95#define MX1_UART2_MINT_RTS 20 95#define MX1_INT_UART2RTS 20
96#define MX1_UART2_MINT_DTR 21 96#define MX1_INT_UART2DTR 21
97#define MX1_UART2_MINT_UARTC 22 97#define MX1_INT_UART2UARTC 22
98#define MX1_UART2_MINT_TX 23 98#define MX1_INT_UART2TX 23
99#define MX1_UART2_MINT_RX 24 99#define MX1_INT_UART2RX 24
100#define MX1_UART1_MINT_PFERR 25 100#define MX1_INT_UART1PFERR 25
101#define MX1_UART1_MINT_RTS 26 101#define MX1_INT_UART1RTS 26
102#define MX1_UART1_MINT_DTR 27 102#define MX1_INT_UART1DTR 27
103#define MX1_UART1_MINT_UARTC 28 103#define MX1_INT_UART1UARTC 28
104#define MX1_UART1_MINT_TX 29 104#define MX1_INT_UART1TX 29
105#define MX1_UART1_MINT_RX 30 105#define MX1_INT_UART1RX 30
106#define MX1_VOICE_DAC_INT 31 106#define MX1_VOICE_DAC_INT 31
107#define MX1_VOICE_ADC_INT 32 107#define MX1_VOICE_ADC_INT 32
108#define MX1_PEN_DATA_INT 33 108#define MX1_PEN_DATA_INT 33
109#define MX1_PWM_INT 34 109#define MX1_PWM_INT 34
110#define MX1_SDHC_INT 35 110#define MX1_SDHC_INT 35
111#define MX1_I2C_INT 39 111#define MX1_INT_I2C 39
112#define MX1_CSPI_INT 41 112#define MX1_CSPI_INT 41
113#define MX1_SSI_TX_INT 42 113#define MX1_SSI_TX_INT 42
114#define MX1_SSI_TX_ERR_INT 43 114#define MX1_SSI_TX_ERR_INT 43
@@ -245,7 +245,7 @@
245#define PEN_DATA_INT MX1_PEN_DATA_INT 245#define PEN_DATA_INT MX1_PEN_DATA_INT
246#define PWM_INT MX1_PWM_INT 246#define PWM_INT MX1_PWM_INT
247#define SDHC_INT MX1_SDHC_INT 247#define SDHC_INT MX1_SDHC_INT
248#define I2C_INT MX1_I2C_INT 248#define I2C_INT MX1_INT_I2C
249#define CSPI_INT MX1_CSPI_INT 249#define CSPI_INT MX1_CSPI_INT
250#define SSI_TX_INT MX1_SSI_TX_INT 250#define SSI_TX_INT MX1_SSI_TX_INT
251#define SSI_TX_ERR_INT MX1_SSI_TX_ERR_INT 251#define SSI_TX_ERR_INT MX1_SSI_TX_ERR_INT
diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h
index 7516f2949afe..2f2aad1032c1 100644
--- a/arch/arm/plat-mxc/include/mach/mx25.h
+++ b/arch/arm/plat-mxc/include/mach/mx25.h
@@ -11,6 +11,10 @@
11#define MX25_AVIC_BASE_ADDR_VIRT 0xfc400000 11#define MX25_AVIC_BASE_ADDR_VIRT 0xfc400000
12#define MX25_AVIC_SIZE SZ_1M 12#define MX25_AVIC_SIZE SZ_1M
13 13
14#define MX25_I2C1_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0x80000)
15#define MX25_I2C3_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0x84000)
16#define MX25_I2C2_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0x98000)
17#define MX25_CSPI1_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0xa4000)
14#define MX25_IOMUXC_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0xac000) 18#define MX25_IOMUXC_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0xac000)
15 19
16#define MX25_CRM_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0x80000) 20#define MX25_CRM_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0x80000)
@@ -30,7 +34,12 @@
30#define MX25_UART1_BASE_ADDR 0x43f90000 34#define MX25_UART1_BASE_ADDR 0x43f90000
31#define MX25_UART2_BASE_ADDR 0x43f94000 35#define MX25_UART2_BASE_ADDR 0x43f94000
32#define MX25_AUDMUX_BASE_ADDR 0x43fb0000 36#define MX25_AUDMUX_BASE_ADDR 0x43fb0000
37#define MX25_UART3_BASE_ADDR 0x5000c000
38#define MX25_UART4_BASE_ADDR 0x50008000
39#define MX25_UART5_BASE_ADDR 0x5002c000
33 40
41#define MX25_CSPI3_BASE_ADDR 0x50004000
42#define MX25_CSPI2_BASE_ADDR 0x50010000
34#define MX25_FEC_BASE_ADDR 0x50038000 43#define MX25_FEC_BASE_ADDR 0x50038000
35#define MX25_SSI2_BASE_ADDR 0x50014000 44#define MX25_SSI2_BASE_ADDR 0x50014000
36#define MX25_SSI1_BASE_ADDR 0x50034000 45#define MX25_SSI1_BASE_ADDR 0x50034000
@@ -41,14 +50,25 @@
41#define MX25_OTG_BASE_ADDR 0x53ff4000 50#define MX25_OTG_BASE_ADDR 0x53ff4000
42#define MX25_CSI_BASE_ADDR 0x53ff8000 51#define MX25_CSI_BASE_ADDR 0x53ff8000
43 52
44#define MX25_INT_SSI2 11 53#define MX25_INT_CSPI3 0
45#define MX25_INT_SSI1 12 54#define MX25_INT_I2C1 3
46#define MX25_INT_CSI 17 55#define MX25_INT_I2C2 4
47#define MX25_INT_DRYICE 25 56#define MX25_INT_UART4 5
48#define MX25_INT_NANDFC 33 57#define MX25_INT_I2C3 10
49#define MX25_INT_LCDC 39 58#define MX25_INT_SSI2 11
50#define MX25_INT_KPP 24 59#define MX25_INT_SSI1 12
51#define MX25_INT_FEC 57 60#define MX25_INT_CSPI2 13
61#define MX25_INT_CSPI1 14
62#define MX25_INT_CSI 17
63#define MX25_INT_UART3 18
64#define MX25_INT_KPP 24
65#define MX25_INT_DRYICE 25
66#define MX25_INT_UART2 32
67#define MX25_INT_NANDFC 33
68#define MX25_INT_LCDC 39
69#define MX25_INT_UART5 40
70#define MX25_INT_UART1 45
71#define MX25_INT_FEC 57
52 72
53#if defined(IMX_NEEDS_DEPRECATED_SYMBOLS) 73#if defined(IMX_NEEDS_DEPRECATED_SYMBOLS)
54#define UART1_BASE_ADDR MX25_UART1_BASE_ADDR 74#define UART1_BASE_ADDR MX25_UART1_BASE_ADDR
diff --git a/arch/arm/plat-mxc/include/mach/mx27.h b/arch/arm/plat-mxc/include/mach/mx27.h
index bae9cd75beee..a8ab2e02a8ca 100644
--- a/arch/arm/plat-mxc/include/mach/mx27.h
+++ b/arch/arm/plat-mxc/include/mach/mx27.h
@@ -48,7 +48,7 @@
48#define MX27_CSPI2_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x0f000) 48#define MX27_CSPI2_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x0f000)
49#define MX27_SSI1_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x10000) 49#define MX27_SSI1_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x10000)
50#define MX27_SSI2_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x11000) 50#define MX27_SSI2_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x11000)
51#define MX27_I2C_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x12000) 51#define MX27_I2C1_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x12000)
52#define MX27_SDHC1_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x13000) 52#define MX27_SDHC1_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x13000)
53#define MX27_SDHC2_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x14000) 53#define MX27_SDHC2_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x14000)
54#define MX27_GPIO_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x15000) 54#define MX27_GPIO_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x15000)
@@ -150,7 +150,7 @@ static inline void mx27_setup_weimcs(size_t cs,
150#define MX27_INT_SDHC3 9 150#define MX27_INT_SDHC3 9
151#define MX27_INT_SDHC2 10 151#define MX27_INT_SDHC2 10
152#define MX27_INT_SDHC1 11 152#define MX27_INT_SDHC1 11
153#define MX27_INT_I2C 12 153#define MX27_INT_I2C1 12
154#define MX27_INT_SSI2 13 154#define MX27_INT_SSI2 13
155#define MX27_INT_SSI1 14 155#define MX27_INT_SSI1 14
156#define MX27_INT_CSPI2 15 156#define MX27_INT_CSPI2 15
diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/plat-mxc/include/mach/mx31.h
index fb90e119c2b5..afee3ab9d62e 100644
--- a/arch/arm/plat-mxc/include/mach/mx31.h
+++ b/arch/arm/plat-mxc/include/mach/mx31.h
@@ -23,7 +23,7 @@
23#define MX31_ETB_SLOT4_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x10000) 23#define MX31_ETB_SLOT4_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x10000)
24#define MX31_ETB_SLOT5_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x14000) 24#define MX31_ETB_SLOT5_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x14000)
25#define MX31_ECT_CTIO_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x18000) 25#define MX31_ECT_CTIO_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x18000)
26#define MX31_I2C_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x80000) 26#define MX31_I2C1_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x80000)
27#define MX31_I2C3_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x84000) 27#define MX31_I2C3_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x84000)
28#define MX31_OTG_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x88000) 28#define MX31_OTG_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x88000)
29#define MX31_ATA_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x8c000) 29#define MX31_ATA_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x8c000)
@@ -145,7 +145,7 @@ static inline void mx31_setup_weimcs(size_t cs,
145#define MX31_INT_FIRI 7 145#define MX31_INT_FIRI 7
146#define MX31_INT_MMC_SDHC2 8 146#define MX31_INT_MMC_SDHC2 8
147#define MX31_INT_MMC_SDHC1 9 147#define MX31_INT_MMC_SDHC1 9
148#define MX31_INT_I2C 10 148#define MX31_INT_I2C1 10
149#define MX31_INT_SSI2 11 149#define MX31_INT_SSI2 11
150#define MX31_INT_SSI1 12 150#define MX31_INT_SSI1 12
151#define MX31_INT_CSPI2 13 151#define MX31_INT_CSPI2 13
diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/plat-mxc/include/mach/mx35.h
index 526a55842ae5..cda60c715127 100644
--- a/arch/arm/plat-mxc/include/mach/mx35.h
+++ b/arch/arm/plat-mxc/include/mach/mx35.h
@@ -18,7 +18,7 @@
18#define MX35_ETB_SLOT4_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x10000) 18#define MX35_ETB_SLOT4_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x10000)
19#define MX35_ETB_SLOT5_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x14000) 19#define MX35_ETB_SLOT5_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x14000)
20#define MX35_ECT_CTIO_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x18000) 20#define MX35_ECT_CTIO_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x18000)
21#define MX35_I2C_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x80000) 21#define MX35_I2C1_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x80000)
22#define MX35_I2C3_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x84000) 22#define MX35_I2C3_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x84000)
23#define MX35_UART1_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x90000) 23#define MX35_UART1_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x90000)
24#define MX35_UART2_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x94000) 24#define MX35_UART2_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x94000)
@@ -123,7 +123,7 @@
123#define MX35_INT_MMC_SDHC1 7 123#define MX35_INT_MMC_SDHC1 7
124#define MX35_INT_MMC_SDHC2 8 124#define MX35_INT_MMC_SDHC2 8
125#define MX35_INT_MMC_SDHC3 9 125#define MX35_INT_MMC_SDHC3 9
126#define MX35_INT_I2C 10 126#define MX35_INT_I2C1 10
127#define MX35_INT_SSI1 11 127#define MX35_INT_SSI1 11
128#define MX35_INT_SSI2 12 128#define MX35_INT_SSI2 12
129#define MX35_INT_CSPI2 13 129#define MX35_INT_CSPI2 13
diff --git a/arch/arm/plat-mxc/include/mach/mx3_camera.h b/arch/arm/plat-mxc/include/mach/mx3_camera.h
index 36d7ff27b5e2..f226ee3777e1 100644
--- a/arch/arm/plat-mxc/include/mach/mx3_camera.h
+++ b/arch/arm/plat-mxc/include/mach/mx3_camera.h
@@ -12,10 +12,6 @@
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details. 14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */ 15 */
20 16
21#ifndef _MX3_CAMERA_H_ 17#ifndef _MX3_CAMERA_H_
diff --git a/arch/arm/plat-mxc/include/mach/mxc91231.h b/arch/arm/plat-mxc/include/mach/mxc91231.h
index 5182b986b785..0ca3101ebf36 100644
--- a/arch/arm/plat-mxc/include/mach/mxc91231.h
+++ b/arch/arm/plat-mxc/include/mach/mxc91231.h
@@ -13,10 +13,6 @@
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details. 15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */ 16 */
21#ifndef __MACH_MXC91231_H__ 17#ifndef __MACH_MXC91231_H__
22#define __MACH_MXC91231_H__ 18#define __MACH_MXC91231_H__
diff --git a/arch/arm/plat-mxc/include/mach/mxc_nand.h b/arch/arm/plat-mxc/include/mach/mxc_nand.h
index 2d74748c5db7..04c0d060d814 100644
--- a/arch/arm/plat-mxc/include/mach/mxc_nand.h
+++ b/arch/arm/plat-mxc/include/mach/mxc_nand.h
@@ -23,9 +23,9 @@
23#include <linux/mtd/partitions.h> 23#include <linux/mtd/partitions.h>
24 24
25struct mxc_nand_platform_data { 25struct mxc_nand_platform_data {
26 int width; /* data bus width in bytes */ 26 unsigned int width; /* data bus width in bytes */
27 int hw_ecc:1; /* 0 if supress hardware ECC */ 27 unsigned int hw_ecc:1; /* 0 if supress hardware ECC */
28 int flash_bbt:1; /* set to 1 to use a flash based bbt */ 28 unsigned int flash_bbt:1; /* set to 1 to use a flash based bbt */
29 struct mtd_partition *parts; /* partition table */ 29 struct mtd_partition *parts; /* partition table */
30 int nr_parts; /* size of parts */ 30 int nr_parts; /* size of parts */
31}; 31};
diff --git a/arch/arm/plat-mxc/include/mach/system.h b/arch/arm/plat-mxc/include/mach/system.h
index ef00199568de..4acd1143a9bd 100644
--- a/arch/arm/plat-mxc/include/mach/system.h
+++ b/arch/arm/plat-mxc/include/mach/system.h
@@ -12,10 +12,6 @@
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details. 14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */ 15 */
20 16
21#ifndef __ASM_ARCH_MXC_SYSTEM_H__ 17#ifndef __ASM_ARCH_MXC_SYSTEM_H__
diff --git a/arch/arm/plat-mxc/include/mach/timex.h b/arch/arm/plat-mxc/include/mach/timex.h
index 024416ed11cd..2d9624697cc9 100644
--- a/arch/arm/plat-mxc/include/mach/timex.h
+++ b/arch/arm/plat-mxc/include/mach/timex.h
@@ -11,10 +11,6 @@
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */ 14 */
19 15
20#ifndef __ASM_ARCH_MXC_TIMEX_H__ 16#ifndef __ASM_ARCH_MXC_TIMEX_H__
diff --git a/arch/arm/plat-mxc/include/mach/uncompress.h b/arch/arm/plat-mxc/include/mach/uncompress.h
index b6d3d0fddc48..d9bd37e4667a 100644
--- a/arch/arm/plat-mxc/include/mach/uncompress.h
+++ b/arch/arm/plat-mxc/include/mach/uncompress.h
@@ -13,10 +13,6 @@
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details. 15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */ 16 */
21#ifndef __ASM_ARCH_MXC_UNCOMPRESS_H__ 17#ifndef __ASM_ARCH_MXC_UNCOMPRESS_H__
22#define __ASM_ARCH_MXC_UNCOMPRESS_H__ 18#define __ASM_ARCH_MXC_UNCOMPRESS_H__
diff --git a/arch/arm/plat-mxc/include/mach/vmalloc.h b/arch/arm/plat-mxc/include/mach/vmalloc.h
index 44243a278434..ef6379c474be 100644
--- a/arch/arm/plat-mxc/include/mach/vmalloc.h
+++ b/arch/arm/plat-mxc/include/mach/vmalloc.h
@@ -11,10 +11,6 @@
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */ 14 */
19 15
20#ifndef __ASM_ARCH_MXC_VMALLOC_H__ 16#ifndef __ASM_ARCH_MXC_VMALLOC_H__
diff --git a/arch/arm/plat-mxc/irq.c b/arch/arm/plat-mxc/irq.c
index 778ddfe57d89..7331f2ace5fe 100644
--- a/arch/arm/plat-mxc/irq.c
+++ b/arch/arm/plat-mxc/irq.c
@@ -142,9 +142,6 @@ void __init mxc_init_irq(void __iomem *irqbase)
142 for (i = 0; i < 8; i++) 142 for (i = 0; i < 8; i++)
143 __raw_writel(0, avic_base + AVIC_NIPRIORITY(i)); 143 __raw_writel(0, avic_base + AVIC_NIPRIORITY(i));
144 144
145 /* init architectures chained interrupt handler */
146 mxc_register_gpios();
147
148#ifdef CONFIG_FIQ 145#ifdef CONFIG_FIQ
149 /* Initialize FIQ */ 146 /* Initialize FIQ */
150 init_FIQ(); 147 init_FIQ();
diff --git a/arch/arm/plat-mxc/system.c b/arch/arm/plat-mxc/system.c
index 97f42799fa58..925bce4607e7 100644
--- a/arch/arm/plat-mxc/system.c
+++ b/arch/arm/plat-mxc/system.c
@@ -14,10 +14,6 @@
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details. 16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */ 17 */
22 18
23#include <linux/kernel.h> 19#include <linux/kernel.h>
diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/plat-mxc/tzic.c
index 9b86d2a60d43..b3da9aad4295 100644
--- a/arch/arm/plat-mxc/tzic.c
+++ b/arch/arm/plat-mxc/tzic.c
@@ -145,8 +145,6 @@ void __init tzic_init_irq(void __iomem *irqbase)
145 set_irq_handler(i, handle_level_irq); 145 set_irq_handler(i, handle_level_irq);
146 set_irq_flags(i, IRQF_VALID); 146 set_irq_flags(i, IRQF_VALID);
147 } 147 }
148 mxc_register_gpios();
149
150 pr_info("TrustZone Interrupt Controller (TZIC) initialized\n"); 148 pr_info("TrustZone Interrupt Controller (TZIC) initialized\n");
151} 149}
152 150
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index dc2ac42d6319..393e9219a5b6 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -624,79 +624,58 @@ do { \
624 __raw_writel(l, base + reg); \ 624 __raw_writel(l, base + reg); \
625} while(0) 625} while(0)
626 626
627void omap_set_gpio_debounce(int gpio, int enable) 627/**
628 * _set_gpio_debounce - low level gpio debounce time
629 * @bank: the gpio bank we're acting upon
630 * @gpio: the gpio number on this @gpio
631 * @debounce: debounce time to use
632 *
633 * OMAP's debounce time is in 31us steps so we need
634 * to convert and round up to the closest unit.
635 */
636static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio,
637 unsigned debounce)
628{ 638{
629 struct gpio_bank *bank; 639 void __iomem *reg = bank->base;
630 void __iomem *reg; 640 u32 val;
631 unsigned long flags; 641 u32 l;
632 u32 val, l = 1 << get_gpio_index(gpio); 642
643 if (debounce < 32)
644 debounce = 0x01;
645 else if (debounce > 7936)
646 debounce = 0xff;
647 else
648 debounce = (debounce / 0x1f) - 1;
633 649
634 if (cpu_class_is_omap1()) 650 l = 1 << get_gpio_index(gpio);
635 return;
636 651
637 bank = get_gpio_bank(gpio); 652 if (cpu_is_omap44xx())
638 reg = bank->base; 653 reg += OMAP4_GPIO_DEBOUNCINGTIME;
654 else
655 reg += OMAP24XX_GPIO_DEBOUNCE_VAL;
656
657 __raw_writel(debounce, reg);
639 658
659 reg = bank->base;
640 if (cpu_is_omap44xx()) 660 if (cpu_is_omap44xx())
641 reg += OMAP4_GPIO_DEBOUNCENABLE; 661 reg += OMAP4_GPIO_DEBOUNCENABLE;
642 else 662 else
643 reg += OMAP24XX_GPIO_DEBOUNCE_EN; 663 reg += OMAP24XX_GPIO_DEBOUNCE_EN;
644 664
645 if (!(bank->mod_usage & l)) {
646 printk(KERN_ERR "GPIO %d not requested\n", gpio);
647 return;
648 }
649
650 spin_lock_irqsave(&bank->lock, flags);
651 val = __raw_readl(reg); 665 val = __raw_readl(reg);
652 666
653 if (enable && !(val & l)) 667 if (debounce) {
654 val |= l; 668 val |= l;
655 else if (!enable && (val & l)) 669 if (cpu_is_omap34xx() || cpu_is_omap44xx())
656 val &= ~l;
657 else
658 goto done;
659
660 if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
661 bank->dbck_enable_mask = val;
662 if (enable)
663 clk_enable(bank->dbck); 670 clk_enable(bank->dbck);
664 else 671 } else {
672 val &= ~l;
673 if (cpu_is_omap34xx() || cpu_is_omap44xx())
665 clk_disable(bank->dbck); 674 clk_disable(bank->dbck);
666 } 675 }
667 676
668 __raw_writel(val, reg); 677 __raw_writel(val, reg);
669done:
670 spin_unlock_irqrestore(&bank->lock, flags);
671} 678}
672EXPORT_SYMBOL(omap_set_gpio_debounce);
673
674void omap_set_gpio_debounce_time(int gpio, int enc_time)
675{
676 struct gpio_bank *bank;
677 void __iomem *reg;
678
679 if (cpu_class_is_omap1())
680 return;
681
682 bank = get_gpio_bank(gpio);
683 reg = bank->base;
684
685 if (!bank->mod_usage) {
686 printk(KERN_ERR "GPIO not requested\n");
687 return;
688 }
689
690 enc_time &= 0xff;
691
692 if (cpu_is_omap44xx())
693 reg += OMAP4_GPIO_DEBOUNCINGTIME;
694 else
695 reg += OMAP24XX_GPIO_DEBOUNCE_VAL;
696
697 __raw_writel(enc_time, reg);
698}
699EXPORT_SYMBOL(omap_set_gpio_debounce_time);
700 679
701#ifdef CONFIG_ARCH_OMAP2PLUS 680#ifdef CONFIG_ARCH_OMAP2PLUS
702static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio, 681static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
@@ -1656,6 +1635,20 @@ static int gpio_output(struct gpio_chip *chip, unsigned offset, int value)
1656 return 0; 1635 return 0;
1657} 1636}
1658 1637
1638static int gpio_debounce(struct gpio_chip *chip, unsigned offset,
1639 unsigned debounce)
1640{
1641 struct gpio_bank *bank;
1642 unsigned long flags;
1643
1644 bank = container_of(chip, struct gpio_bank, chip);
1645 spin_lock_irqsave(&bank->lock, flags);
1646 _set_gpio_debounce(bank, offset, debounce);
1647 spin_unlock_irqrestore(&bank->lock, flags);
1648
1649 return 0;
1650}
1651
1659static void gpio_set(struct gpio_chip *chip, unsigned offset, int value) 1652static void gpio_set(struct gpio_chip *chip, unsigned offset, int value)
1660{ 1653{
1661 struct gpio_bank *bank; 1654 struct gpio_bank *bank;
@@ -1909,6 +1902,7 @@ static int __init _omap_gpio_init(void)
1909 bank->chip.direction_input = gpio_input; 1902 bank->chip.direction_input = gpio_input;
1910 bank->chip.get = gpio_get; 1903 bank->chip.get = gpio_get;
1911 bank->chip.direction_output = gpio_output; 1904 bank->chip.direction_output = gpio_output;
1905 bank->chip.set_debounce = gpio_debounce;
1912 bank->chip.set = gpio_set; 1906 bank->chip.set = gpio_set;
1913 bank->chip.to_irq = gpio_2irq; 1907 bank->chip.to_irq = gpio_2irq;
1914 if (bank_is_mpuio(bank)) { 1908 if (bank_is_mpuio(bank)) {
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
index 5cb2dd1da632..11d6a1bbd90d 100644
--- a/arch/arm/plat-s5p/Kconfig
+++ b/arch/arm/plat-s5p/Kconfig
@@ -29,3 +29,4 @@ config S5P_EXT_INT
29 bool 29 bool
30 help 30 help
31 Use the external interrupts (other than GPIO interrupts.) 31 Use the external interrupts (other than GPIO interrupts.)
32 Note: Do not choose this for S5P6440.
diff --git a/arch/arm/plat-s5p/clock.c b/arch/arm/plat-s5p/clock.c
index 24a931fd8d3b..b5e255265f20 100644
--- a/arch/arm/plat-s5p/clock.c
+++ b/arch/arm/plat-s5p/clock.c
@@ -148,6 +148,7 @@ static struct clk *s5p_clks[] __initdata = {
148 &clk_fout_vpll, 148 &clk_fout_vpll,
149 &clk_arm, 149 &clk_arm,
150 &clk_vpll, 150 &clk_vpll,
151 &clk_xusbxti,
151}; 152};
152 153
153void __init s5p_register_clocks(unsigned long xtal_freq) 154void __init s5p_register_clocks(unsigned long xtal_freq)
diff --git a/arch/arm/plat-s5p/include/plat/irqs.h b/arch/arm/plat-s5p/include/plat/irqs.h
index 9ff3d718be39..3fb3a3a17465 100644
--- a/arch/arm/plat-s5p/include/plat/irqs.h
+++ b/arch/arm/plat-s5p/include/plat/irqs.h
@@ -87,4 +87,11 @@
87#define IRQ_TIMER3 S5P_TIMER_IRQ(3) 87#define IRQ_TIMER3 S5P_TIMER_IRQ(3)
88#define IRQ_TIMER4 S5P_TIMER_IRQ(4) 88#define IRQ_TIMER4 S5P_TIMER_IRQ(4)
89 89
90#define IRQ_EINT(x) ((x) < 16 ? ((x) + S5P_EINT_BASE1) \
91 : ((x) - 16 + S5P_EINT_BASE2))
92
93#define EINT_OFFSET(irq) ((irq) < S5P_EINT_BASE2 ? \
94 ((irq) - S5P_EINT_BASE1) : \
95 ((irq) + 16 - S5P_EINT_BASE2))
96
90#endif /* __ASM_PLAT_S5P_IRQS_H */ 97#endif /* __ASM_PLAT_S5P_IRQS_H */
diff --git a/arch/arm/plat-s5p/irq-eint.c b/arch/arm/plat-s5p/irq-eint.c
index eaa70aa0127b..e56c8075df97 100644
--- a/arch/arm/plat-s5p/irq-eint.c
+++ b/arch/arm/plat-s5p/irq-eint.c
@@ -60,7 +60,7 @@ static void s5p_irq_eint_maskack(unsigned int irq)
60 60
61static int s5p_irq_eint_set_type(unsigned int irq, unsigned int type) 61static int s5p_irq_eint_set_type(unsigned int irq, unsigned int type)
62{ 62{
63 int offs = eint_offset(irq); 63 int offs = EINT_OFFSET(irq);
64 int shift; 64 int shift;
65 u32 ctrl, mask; 65 u32 ctrl, mask;
66 u32 newvalue = 0; 66 u32 newvalue = 0;
@@ -139,17 +139,16 @@ static struct irq_chip s5p_irq_eint = {
139 */ 139 */
140static inline void s5p_irq_demux_eint(unsigned int start) 140static inline void s5p_irq_demux_eint(unsigned int start)
141{ 141{
142 u32 status; 142 u32 status = __raw_readl(S5P_EINT_PEND(EINT_REG_NR(start)));
143 u32 mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(start))); 143 u32 mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(start)));
144 unsigned int irq; 144 unsigned int irq;
145 145
146 status = __raw_readl(S5P_EINT_PEND(EINT_REG_NR(start)));
147 status &= ~mask; 146 status &= ~mask;
148 status &= 0xff; 147 status &= 0xff;
149 148
150 while (status) { 149 while (status) {
151 irq = fls(status); 150 irq = fls(status) - 1;
152 generic_handle_irq(irq - 1 + start); 151 generic_handle_irq(irq + start);
153 status &= ~(1 << irq); 152 status &= ~(1 << irq);
154 } 153 }
155} 154}
@@ -162,12 +161,18 @@ static void s5p_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc)
162 161
163static inline void s5p_irq_vic_eint_mask(unsigned int irq) 162static inline void s5p_irq_vic_eint_mask(unsigned int irq)
164{ 163{
164 void __iomem *base = get_irq_chip_data(irq);
165
165 s5p_irq_eint_mask(irq); 166 s5p_irq_eint_mask(irq);
167 writel(1 << EINT_OFFSET(irq), base + VIC_INT_ENABLE_CLEAR);
166} 168}
167 169
168static void s5p_irq_vic_eint_unmask(unsigned int irq) 170static void s5p_irq_vic_eint_unmask(unsigned int irq)
169{ 171{
172 void __iomem *base = get_irq_chip_data(irq);
173
170 s5p_irq_eint_unmask(irq); 174 s5p_irq_eint_unmask(irq);
175 writel(1 << EINT_OFFSET(irq), base + VIC_INT_ENABLE);
171} 176}
172 177
173static inline void s5p_irq_vic_eint_ack(unsigned int irq) 178static inline void s5p_irq_vic_eint_ack(unsigned int irq)
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
index 34efdd2b032c..db4112c6f2be 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
@@ -43,6 +43,11 @@ struct s3c_gpio_chip;
43 * layouts. Provide an point to vector control routine and provide any 43 * layouts. Provide an point to vector control routine and provide any
44 * per-bank configuration information that other systems such as the 44 * per-bank configuration information that other systems such as the
45 * external interrupt code will need. 45 * external interrupt code will need.
46 *
47 * @sa s3c_gpio_cfgpin
48 * @sa s3c_gpio_getcfg
49 * @sa s3c_gpio_setpull
50 * @sa s3c_gpio_getpull
46 */ 51 */
47struct s3c_gpio_cfg { 52struct s3c_gpio_cfg {
48 unsigned int cfg_eint; 53 unsigned int cfg_eint;
@@ -70,11 +75,25 @@ struct s3c_gpio_cfg {
70/** 75/**
71 * s3c_gpio_cfgpin() - Change the GPIO function of a pin. 76 * s3c_gpio_cfgpin() - Change the GPIO function of a pin.
72 * @pin pin The pin number to configure. 77 * @pin pin The pin number to configure.
73 * @pin to The configuration for the pin's function. 78 * @to to The configuration for the pin's function.
74 * 79 *
75 * Configure which function is actually connected to the external 80 * Configure which function is actually connected to the external
76 * pin, such as an gpio input, output or some form of special function 81 * pin, such as an gpio input, output or some form of special function
77 * connected to an internal peripheral block. 82 * connected to an internal peripheral block.
83 *
84 * The @to parameter can be one of the generic S3C_GPIO_INPUT, S3C_GPIO_OUTPUT
85 * or S3C_GPIO_SFN() to indicate one of the possible values that the helper
86 * will then generate the correct bit mask and shift for the configuration.
87 *
88 * If a bank of GPIOs all needs to be set to special-function 2, then
89 * the following code will work:
90 *
91 * for (gpio = start; gpio < end; gpio++)
92 * s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
93 *
94 * The @to parameter can also be a specific value already shifted to the
95 * correct position in the control register, although these are discouraged
96 * in newer kernels and are only being kept for compatibility.
78 */ 97 */
79extern int s3c_gpio_cfgpin(unsigned int pin, unsigned int to); 98extern int s3c_gpio_cfgpin(unsigned int pin, unsigned int to);
80 99
@@ -108,6 +127,8 @@ extern unsigned s3c_gpio_getcfg(unsigned int pin);
108 * This function sets the state of the pull-{up,down} resistor for the 127 * This function sets the state of the pull-{up,down} resistor for the
109 * specified pin. It will return 0 if successfull, or a negative error 128 * specified pin. It will return 0 if successfull, or a negative error
110 * code if the pin cannot support the requested pull setting. 129 * code if the pin cannot support the requested pull setting.
130 *
131 * @pull is one of S3C_GPIO_PULL_NONE, S3C_GPIO_PULL_DOWN or S3C_GPIO_PULL_UP.
111*/ 132*/
112extern int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull); 133extern int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull);
113 134
diff --git a/arch/avr32/include/asm/scatterlist.h b/arch/avr32/include/asm/scatterlist.h
index 377320e3bd17..06394e5ead6c 100644
--- a/arch/avr32/include/asm/scatterlist.h
+++ b/arch/avr32/include/asm/scatterlist.h
@@ -1,25 +1,7 @@
1#ifndef __ASM_AVR32_SCATTERLIST_H 1#ifndef __ASM_AVR32_SCATTERLIST_H
2#define __ASM_AVR32_SCATTERLIST_H 2#define __ASM_AVR32_SCATTERLIST_H
3 3
4#include <asm/types.h> 4#include <asm-generic/scatterlist.h>
5
6struct scatterlist {
7#ifdef CONFIG_DEBUG_SG
8 unsigned long sg_magic;
9#endif
10 unsigned long page_link;
11 unsigned int offset;
12 dma_addr_t dma_address;
13 unsigned int length;
14};
15
16/* These macros should be used after a pci_map_sg call has been done
17 * to get bus addresses of each of the SG entries and their lengths.
18 * You should only work with the number of sg entries pci_map_sg
19 * returns.
20 */
21#define sg_dma_address(sg) ((sg)->dma_address)
22#define sg_dma_len(sg) ((sg)->length)
23 5
24#define ISA_DMA_THRESHOLD (0xffffffff) 6#define ISA_DMA_THRESHOLD (0xffffffff)
25 7
diff --git a/arch/blackfin/include/asm/scatterlist.h b/arch/blackfin/include/asm/scatterlist.h
index 04f448711cd0..64d41d34ab0b 100644
--- a/arch/blackfin/include/asm/scatterlist.h
+++ b/arch/blackfin/include/asm/scatterlist.h
@@ -1,27 +1,7 @@
1#ifndef _BLACKFIN_SCATTERLIST_H 1#ifndef _BLACKFIN_SCATTERLIST_H
2#define _BLACKFIN_SCATTERLIST_H 2#define _BLACKFIN_SCATTERLIST_H
3 3
4#include <linux/mm.h> 4#include <asm-generic/scatterlist.h>
5
6struct scatterlist {
7#ifdef CONFIG_DEBUG_SG
8 unsigned long sg_magic;
9#endif
10 unsigned long page_link;
11 unsigned int offset;
12 dma_addr_t dma_address;
13 unsigned int length;
14};
15
16/*
17 * These macros should be used after a pci_map_sg call has been done
18 * to get bus addresses of each of the SG entries and their lengths.
19 * You should only work with the number of sg entries pci_map_sg
20 * returns, or alternatively stop on the first sg_dma_len(sg) which
21 * is 0.
22 */
23#define sg_dma_address(sg) ((sg)->dma_address)
24#define sg_dma_len(sg) ((sg)->length)
25 5
26#define ISA_DMA_THRESHOLD (0xffffffff) 6#define ISA_DMA_THRESHOLD (0xffffffff)
27 7
diff --git a/arch/blackfin/kernel/ptrace.c b/arch/blackfin/kernel/ptrace.c
index 43eb969405d1..6ec77685df52 100644
--- a/arch/blackfin/kernel/ptrace.c
+++ b/arch/blackfin/kernel/ptrace.c
@@ -292,28 +292,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
292 break; 292 break;
293 } 293 }
294 294
295#ifdef CONFIG_BINFMT_ELF_FDPIC
296 case PTRACE_GETFDPIC: {
297 unsigned long tmp = 0;
298
299 switch (addr) {
300 case_PTRACE_GETFDPIC_EXEC:
301 case PTRACE_GETFDPIC_EXEC:
302 tmp = child->mm->context.exec_fdpic_loadmap;
303 break;
304 case_PTRACE_GETFDPIC_INTERP:
305 case PTRACE_GETFDPIC_INTERP:
306 tmp = child->mm->context.interp_fdpic_loadmap;
307 break;
308 default:
309 break;
310 }
311
312 ret = put_user(tmp, datap);
313 break;
314 }
315#endif
316
317 /* when I and D space are separate, this will have to be fixed. */ 295 /* when I and D space are separate, this will have to be fixed. */
318 case PTRACE_POKEDATA: 296 case PTRACE_POKEDATA:
319 pr_debug("ptrace: PTRACE_PEEKDATA\n"); 297 pr_debug("ptrace: PTRACE_PEEKDATA\n");
@@ -357,8 +335,14 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
357 case PTRACE_PEEKUSR: 335 case PTRACE_PEEKUSR:
358 switch (addr) { 336 switch (addr) {
359#ifdef CONFIG_BINFMT_ELF_FDPIC /* backwards compat */ 337#ifdef CONFIG_BINFMT_ELF_FDPIC /* backwards compat */
360 case PT_FDPIC_EXEC: goto case_PTRACE_GETFDPIC_EXEC; 338 case PT_FDPIC_EXEC:
361 case PT_FDPIC_INTERP: goto case_PTRACE_GETFDPIC_INTERP; 339 request = PTRACE_GETFDPIC;
340 addr = PTRACE_GETFDPIC_EXEC;
341 goto case_default;
342 case PT_FDPIC_INTERP:
343 request = PTRACE_GETFDPIC;
344 addr = PTRACE_GETFDPIC_INTERP;
345 goto case_default;
362#endif 346#endif
363 default: 347 default:
364 ret = get_reg(child, addr, datap); 348 ret = get_reg(child, addr, datap);
@@ -385,6 +369,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
385 0, sizeof(struct pt_regs), 369 0, sizeof(struct pt_regs),
386 (const void __user *)data); 370 (const void __user *)data);
387 371
372 case_default:
388 default: 373 default:
389 ret = ptrace_request(child, request, addr, data); 374 ret = ptrace_request(child, request, addr, data);
390 break; 375 break;
diff --git a/arch/cris/include/asm/scatterlist.h b/arch/cris/include/asm/scatterlist.h
index faff53ad1f96..249a7842ff5f 100644
--- a/arch/cris/include/asm/scatterlist.h
+++ b/arch/cris/include/asm/scatterlist.h
@@ -1,22 +1,7 @@
1#ifndef __ASM_CRIS_SCATTERLIST_H 1#ifndef __ASM_CRIS_SCATTERLIST_H
2#define __ASM_CRIS_SCATTERLIST_H 2#define __ASM_CRIS_SCATTERLIST_H
3 3
4struct scatterlist { 4#include <asm-generic/scatterlist.h>
5#ifdef CONFIG_DEBUG_SG
6 unsigned long sg_magic;
7#endif
8 char * address; /* Location data is to be transferred to */
9 unsigned int length;
10
11 /* The following is i386 highmem junk - not used by us */
12 unsigned long page_link;
13 unsigned int offset;/* for highmem, page offset */
14
15};
16
17#define sg_dma_address(sg) ((sg)->address)
18#define sg_dma_len(sg) ((sg)->length)
19/* i386 junk */
20 5
21#define ISA_DMA_THRESHOLD (0x1fffffff) 6#define ISA_DMA_THRESHOLD (0x1fffffff)
22 7
diff --git a/arch/frv/include/asm/cache.h b/arch/frv/include/asm/cache.h
index 7dc0f0f85b7c..2797163b8f4f 100644
--- a/arch/frv/include/asm/cache.h
+++ b/arch/frv/include/asm/cache.h
@@ -17,8 +17,6 @@
17#define L1_CACHE_SHIFT (CONFIG_FRV_L1_CACHE_SHIFT) 17#define L1_CACHE_SHIFT (CONFIG_FRV_L1_CACHE_SHIFT)
18#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) 18#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
19 19
20#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES
21
22#define __cacheline_aligned __attribute__((aligned(L1_CACHE_BYTES))) 20#define __cacheline_aligned __attribute__((aligned(L1_CACHE_BYTES)))
23#define ____cacheline_aligned __attribute__((aligned(L1_CACHE_BYTES))) 21#define ____cacheline_aligned __attribute__((aligned(L1_CACHE_BYTES)))
24 22
diff --git a/arch/frv/include/asm/mem-layout.h b/arch/frv/include/asm/mem-layout.h
index 2947764fc0e0..ccae981876fa 100644
--- a/arch/frv/include/asm/mem-layout.h
+++ b/arch/frv/include/asm/mem-layout.h
@@ -35,8 +35,8 @@
35 * the slab must be aligned such that load- and store-double instructions don't 35 * the slab must be aligned such that load- and store-double instructions don't
36 * fault if used 36 * fault if used
37 */ 37 */
38#define ARCH_KMALLOC_MINALIGN 8 38#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES
39#define ARCH_SLAB_MINALIGN 8 39#define ARCH_SLAB_MINALIGN L1_CACHE_BYTES
40 40
41/*****************************************************************************/ 41/*****************************************************************************/
42/* 42/*
diff --git a/arch/frv/include/asm/scatterlist.h b/arch/frv/include/asm/scatterlist.h
index 4bca8a28546c..1614bfd7e3a4 100644
--- a/arch/frv/include/asm/scatterlist.h
+++ b/arch/frv/include/asm/scatterlist.h
@@ -1,45 +1,7 @@
1#ifndef _ASM_SCATTERLIST_H 1#ifndef _ASM_SCATTERLIST_H
2#define _ASM_SCATTERLIST_H 2#define _ASM_SCATTERLIST_H
3 3
4#include <asm/types.h> 4#include <asm-generic/scatterlist.h>
5
6/*
7 * Drivers must set either ->address or (preferred) page and ->offset
8 * to indicate where data must be transferred to/from.
9 *
10 * Using page is recommended since it handles highmem data as well as
11 * low mem. ->address is restricted to data which has a virtual mapping, and
12 * it will go away in the future. Updating to page can be automated very
13 * easily -- something like
14 *
15 * sg->address = some_ptr;
16 *
17 * can be rewritten as
18 *
19 * sg_set_buf(sg, some_ptr, length);
20 *
21 * and that's it. There's no excuse for not highmem enabling YOUR driver. /jens
22 */
23struct scatterlist {
24#ifdef CONFIG_DEBUG_SG
25 unsigned long sg_magic;
26#endif
27 unsigned long page_link;
28 unsigned int offset; /* for highmem, page offset */
29
30 dma_addr_t dma_address;
31 unsigned int length;
32};
33
34/*
35 * These macros should be used after a pci_map_sg call has been done
36 * to get bus addresses of each of the SG entries and their lengths.
37 * You should only work with the number of sg entries pci_map_sg
38 * returns, or alternatively stop on the first sg_dma_len(sg) which
39 * is 0.
40 */
41#define sg_dma_address(sg) ((sg)->dma_address)
42#define sg_dma_len(sg) ((sg)->length)
43 5
44#define ISA_DMA_THRESHOLD (0xffffffffUL) 6#define ISA_DMA_THRESHOLD (0xffffffffUL)
45 7
diff --git a/arch/frv/kernel/ptrace.c b/arch/frv/kernel/ptrace.c
index 60eeed3694c0..fac028936a04 100644
--- a/arch/frv/kernel/ptrace.c
+++ b/arch/frv/kernel/ptrace.c
@@ -344,26 +344,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
344 0, sizeof(child->thread.user->f), 344 0, sizeof(child->thread.user->f),
345 (const void __user *)data); 345 (const void __user *)data);
346 346
347 case PTRACE_GETFDPIC:
348 tmp = 0;
349 switch (addr) {
350 case PTRACE_GETFDPIC_EXEC:
351 tmp = child->mm->context.exec_fdpic_loadmap;
352 break;
353 case PTRACE_GETFDPIC_INTERP:
354 tmp = child->mm->context.interp_fdpic_loadmap;
355 break;
356 default:
357 break;
358 }
359
360 ret = 0;
361 if (put_user(tmp, (unsigned long *) data)) {
362 ret = -EFAULT;
363 break;
364 }
365 break;
366
367 default: 347 default:
368 ret = ptrace_request(child, request, addr, data); 348 ret = ptrace_request(child, request, addr, data);
369 break; 349 break;
diff --git a/arch/frv/kernel/sysctl.c b/arch/frv/kernel/sysctl.c
index 71abd1510a59..6c155d69da29 100644
--- a/arch/frv/kernel/sysctl.c
+++ b/arch/frv/kernel/sysctl.c
@@ -46,8 +46,9 @@ static void frv_change_dcache_mode(unsigned long newmode)
46/* 46/*
47 * handle requests to dynamically switch the write caching mode delivered by /proc 47 * handle requests to dynamically switch the write caching mode delivered by /proc
48 */ 48 */
49static int procctl_frv_cachemode(ctl_table *table, int write, struct file *filp, 49static int procctl_frv_cachemode(ctl_table *table, int write,
50 void __user *buffer, size_t *lenp, loff_t *ppos) 50 void __user *buffer, size_t *lenp,
51 loff_t *ppos)
51{ 52{
52 unsigned long hsr0; 53 unsigned long hsr0;
53 char buff[8]; 54 char buff[8];
@@ -84,7 +85,7 @@ static int procctl_frv_cachemode(ctl_table *table, int write, struct file *filp,
84 } 85 }
85 86
86 /* read the state */ 87 /* read the state */
87 if (filp->f_pos > 0) { 88 if (*ppos > 0) {
88 *lenp = 0; 89 *lenp = 0;
89 return 0; 90 return 0;
90 } 91 }
@@ -110,7 +111,7 @@ static int procctl_frv_cachemode(ctl_table *table, int write, struct file *filp,
110 return -EFAULT; 111 return -EFAULT;
111 112
112 *lenp = len; 113 *lenp = len;
113 filp->f_pos = len; 114 *ppos = len;
114 return 0; 115 return 0;
115 116
116} /* end procctl_frv_cachemode() */ 117} /* end procctl_frv_cachemode() */
@@ -120,8 +121,9 @@ static int procctl_frv_cachemode(ctl_table *table, int write, struct file *filp,
120 * permit the mm_struct the nominated process is using have its MMU context ID pinned 121 * permit the mm_struct the nominated process is using have its MMU context ID pinned
121 */ 122 */
122#ifdef CONFIG_MMU 123#ifdef CONFIG_MMU
123static int procctl_frv_pin_cxnr(ctl_table *table, int write, struct file *filp, 124static int procctl_frv_pin_cxnr(ctl_table *table, int write,
124 void __user *buffer, size_t *lenp, loff_t *ppos) 125 void __user *buffer, size_t *lenp,
126 loff_t *ppos)
125{ 127{
126 pid_t pid; 128 pid_t pid;
127 char buff[16], *p; 129 char buff[16], *p;
@@ -150,7 +152,7 @@ static int procctl_frv_pin_cxnr(ctl_table *table, int write, struct file *filp,
150 } 152 }
151 153
152 /* read the currently pinned CXN */ 154 /* read the currently pinned CXN */
153 if (filp->f_pos > 0) { 155 if (*ppos > 0) {
154 *lenp = 0; 156 *lenp = 0;
155 return 0; 157 return 0;
156 } 158 }
@@ -163,7 +165,7 @@ static int procctl_frv_pin_cxnr(ctl_table *table, int write, struct file *filp,
163 return -EFAULT; 165 return -EFAULT;
164 166
165 *lenp = len; 167 *lenp = len;
166 filp->f_pos = len; 168 *ppos = len;
167 return 0; 169 return 0;
168 170
169} /* end procctl_frv_pin_cxnr() */ 171} /* end procctl_frv_pin_cxnr() */
diff --git a/arch/h8300/include/asm/scatterlist.h b/arch/h8300/include/asm/scatterlist.h
index d3ecdd87ac90..de08a4a2cc1c 100644
--- a/arch/h8300/include/asm/scatterlist.h
+++ b/arch/h8300/include/asm/scatterlist.h
@@ -1,17 +1,7 @@
1#ifndef _H8300_SCATTERLIST_H 1#ifndef _H8300_SCATTERLIST_H
2#define _H8300_SCATTERLIST_H 2#define _H8300_SCATTERLIST_H
3 3
4#include <asm/types.h> 4#include <asm-generic/scatterlist.h>
5
6struct scatterlist {
7#ifdef CONFIG_DEBUG_SG
8 unsigned long sg_magic;
9#endif
10 unsigned long page_link;
11 unsigned int offset;
12 dma_addr_t dma_address;
13 unsigned int length;
14};
15 5
16#define ISA_DMA_THRESHOLD (0xffffffff) 6#define ISA_DMA_THRESHOLD (0xffffffff)
17 7
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig
index 9676100b83ee..95610820041e 100644
--- a/arch/ia64/Kconfig
+++ b/arch/ia64/Kconfig
@@ -56,6 +56,9 @@ config MMU
56config NEED_DMA_MAP_STATE 56config NEED_DMA_MAP_STATE
57 def_bool y 57 def_bool y
58 58
59config NEED_SG_DMA_LENGTH
60 def_bool y
61
59config SWIOTLB 62config SWIOTLB
60 bool 63 bool
61 64
@@ -495,6 +498,14 @@ config HAVE_ARCH_NODEDATA_EXTENSION
495 def_bool y 498 def_bool y
496 depends on NUMA 499 depends on NUMA
497 500
501config USE_PERCPU_NUMA_NODE_ID
502 def_bool y
503 depends on NUMA
504
505config HAVE_MEMORYLESS_NODES
506 def_bool y
507 depends on NUMA
508
498config ARCH_PROC_KCORE_TEXT 509config ARCH_PROC_KCORE_TEXT
499 def_bool y 510 def_bool y
500 depends on PROC_KCORE 511 depends on PROC_KCORE
diff --git a/arch/ia64/include/asm/acpi.h b/arch/ia64/include/asm/acpi.h
index 21adbd7f90f8..837dc82a013e 100644
--- a/arch/ia64/include/asm/acpi.h
+++ b/arch/ia64/include/asm/acpi.h
@@ -94,7 +94,6 @@ ia64_acpi_release_global_lock (unsigned int *lock)
94#define acpi_noirq 0 /* ACPI always enabled on IA64 */ 94#define acpi_noirq 0 /* ACPI always enabled on IA64 */
95#define acpi_pci_disabled 0 /* ACPI PCI always enabled on IA64 */ 95#define acpi_pci_disabled 0 /* ACPI PCI always enabled on IA64 */
96#define acpi_strict 1 /* no ACPI spec workarounds on IA64 */ 96#define acpi_strict 1 /* no ACPI spec workarounds on IA64 */
97#define acpi_ht 0 /* no HT-only mode on IA64 */
98#endif 97#endif
99#define acpi_processor_cstate_check(x) (x) /* no idle limits on IA64 :) */ 98#define acpi_processor_cstate_check(x) (x) /* no idle limits on IA64 :) */
100static inline void disable_acpi(void) { } 99static inline void disable_acpi(void) { }
diff --git a/arch/ia64/include/asm/scatterlist.h b/arch/ia64/include/asm/scatterlist.h
index d8e98961dec7..f299a4fb25c8 100644
--- a/arch/ia64/include/asm/scatterlist.h
+++ b/arch/ia64/include/asm/scatterlist.h
@@ -1,6 +1,7 @@
1#ifndef _ASM_IA64_SCATTERLIST_H 1#ifndef _ASM_IA64_SCATTERLIST_H
2#define _ASM_IA64_SCATTERLIST_H 2#define _ASM_IA64_SCATTERLIST_H
3 3
4#include <asm-generic/scatterlist.h>
4/* 5/*
5 * It used to be that ISA_DMA_THRESHOLD had something to do with the 6 * It used to be that ISA_DMA_THRESHOLD had something to do with the
6 * DMA-limits of ISA-devices. Nowadays, its only remaining use (apart 7 * DMA-limits of ISA-devices. Nowadays, its only remaining use (apart
@@ -10,7 +11,6 @@
10 * that's 4GB - 1. 11 * that's 4GB - 1.
11 */ 12 */
12#define ISA_DMA_THRESHOLD 0xffffffff 13#define ISA_DMA_THRESHOLD 0xffffffff
13 14#define ARCH_HAS_SG_CHAIN
14#include <asm-generic/scatterlist.h>
15 15
16#endif /* _ASM_IA64_SCATTERLIST_H */ 16#endif /* _ASM_IA64_SCATTERLIST_H */
diff --git a/arch/ia64/include/asm/topology.h b/arch/ia64/include/asm/topology.h
index d323071d0f91..09f646753d1a 100644
--- a/arch/ia64/include/asm/topology.h
+++ b/arch/ia64/include/asm/topology.h
@@ -26,11 +26,6 @@
26#define RECLAIM_DISTANCE 15 26#define RECLAIM_DISTANCE 15
27 27
28/* 28/*
29 * Returns the number of the node containing CPU 'cpu'
30 */
31#define cpu_to_node(cpu) (int)(cpu_to_node_map[cpu])
32
33/*
34 * Returns a bitmask of CPUs on Node 'node'. 29 * Returns a bitmask of CPUs on Node 'node'.
35 */ 30 */
36#define cpumask_of_node(node) ((node) == -1 ? \ 31#define cpumask_of_node(node) ((node) == -1 ? \
diff --git a/arch/ia64/kernel/pci-swiotlb.c b/arch/ia64/kernel/pci-swiotlb.c
index 3095654f9ab3..d9485d952ed0 100644
--- a/arch/ia64/kernel/pci-swiotlb.c
+++ b/arch/ia64/kernel/pci-swiotlb.c
@@ -31,8 +31,6 @@ struct dma_map_ops swiotlb_dma_ops = {
31 .unmap_sg = swiotlb_unmap_sg_attrs, 31 .unmap_sg = swiotlb_unmap_sg_attrs,
32 .sync_single_for_cpu = swiotlb_sync_single_for_cpu, 32 .sync_single_for_cpu = swiotlb_sync_single_for_cpu,
33 .sync_single_for_device = swiotlb_sync_single_for_device, 33 .sync_single_for_device = swiotlb_sync_single_for_device,
34 .sync_single_range_for_cpu = swiotlb_sync_single_range_for_cpu,
35 .sync_single_range_for_device = swiotlb_sync_single_range_for_device,
36 .sync_sg_for_cpu = swiotlb_sync_sg_for_cpu, 34 .sync_sg_for_cpu = swiotlb_sync_sg_for_cpu,
37 .sync_sg_for_device = swiotlb_sync_sg_for_device, 35 .sync_sg_for_device = swiotlb_sync_sg_for_device,
38 .dma_supported = swiotlb_dma_supported, 36 .dma_supported = swiotlb_dma_supported,
diff --git a/arch/ia64/kernel/ptrace.c b/arch/ia64/kernel/ptrace.c
index 0dec7f702448..7c7909f9bc93 100644
--- a/arch/ia64/kernel/ptrace.c
+++ b/arch/ia64/kernel/ptrace.c
@@ -638,7 +638,7 @@ ptrace_attach_sync_user_rbs (struct task_struct *child)
638 */ 638 */
639 639
640 read_lock(&tasklist_lock); 640 read_lock(&tasklist_lock);
641 if (child->signal) { 641 if (child->sighand) {
642 spin_lock_irq(&child->sighand->siglock); 642 spin_lock_irq(&child->sighand->siglock);
643 if (child->state == TASK_STOPPED && 643 if (child->state == TASK_STOPPED &&
644 !test_and_set_tsk_thread_flag(child, TIF_RESTORE_RSE)) { 644 !test_and_set_tsk_thread_flag(child, TIF_RESTORE_RSE)) {
@@ -662,7 +662,7 @@ ptrace_attach_sync_user_rbs (struct task_struct *child)
662 * job control stop, so that SIGCONT can be used to wake it up. 662 * job control stop, so that SIGCONT can be used to wake it up.
663 */ 663 */
664 read_lock(&tasklist_lock); 664 read_lock(&tasklist_lock);
665 if (child->signal) { 665 if (child->sighand) {
666 spin_lock_irq(&child->sighand->siglock); 666 spin_lock_irq(&child->sighand->siglock);
667 if (child->state == TASK_TRACED && 667 if (child->state == TASK_TRACED &&
668 (child->signal->flags & SIGNAL_STOP_STOPPED)) { 668 (child->signal->flags & SIGNAL_STOP_STOPPED)) {
diff --git a/arch/ia64/kernel/smpboot.c b/arch/ia64/kernel/smpboot.c
index e5230b2ff2c5..6a1380e90f87 100644
--- a/arch/ia64/kernel/smpboot.c
+++ b/arch/ia64/kernel/smpboot.c
@@ -390,6 +390,14 @@ smp_callin (void)
390 390
391 fix_b0_for_bsp(); 391 fix_b0_for_bsp();
392 392
393#ifdef CONFIG_NUMA
394 /*
395 * numa_node_id() works after this.
396 */
397 set_numa_node(cpu_to_node_map[cpuid]);
398 set_numa_mem(local_memory_node(cpu_to_node_map[cpuid]));
399#endif
400
393 ipi_call_lock_irq(); 401 ipi_call_lock_irq();
394 spin_lock(&vector_lock); 402 spin_lock(&vector_lock);
395 /* Setup the per cpu irq handling data structures */ 403 /* Setup the per cpu irq handling data structures */
@@ -632,6 +640,9 @@ void __devinit smp_prepare_boot_cpu(void)
632{ 640{
633 cpu_set(smp_processor_id(), cpu_online_map); 641 cpu_set(smp_processor_id(), cpu_online_map);
634 cpu_set(smp_processor_id(), cpu_callin_map); 642 cpu_set(smp_processor_id(), cpu_callin_map);
643#ifdef CONFIG_NUMA
644 set_numa_node(cpu_to_node_map[smp_processor_id()]);
645#endif
635 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE; 646 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
636 paravirt_post_smp_prepare_boot_cpu(); 647 paravirt_post_smp_prepare_boot_cpu();
637} 648}
diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c
index 64aff520b899..aa2533ae7e9e 100644
--- a/arch/ia64/pci/pci.c
+++ b/arch/ia64/pci/pci.c
@@ -335,8 +335,11 @@ pcibios_setup_root_windows(struct pci_bus *bus, struct pci_controller *ctrl)
335} 335}
336 336
337struct pci_bus * __devinit 337struct pci_bus * __devinit
338pci_acpi_scan_root(struct acpi_device *device, int domain, int bus) 338pci_acpi_scan_root(struct acpi_pci_root *root)
339{ 339{
340 struct acpi_device *device = root->device;
341 int domain = root->segment;
342 int bus = root->secondary.start;
340 struct pci_controller *controller; 343 struct pci_controller *controller;
341 unsigned int windows = 0; 344 unsigned int windows = 0;
342 struct pci_bus *pbus; 345 struct pci_bus *pbus;
diff --git a/arch/m32r/include/asm/scatterlist.h b/arch/m32r/include/asm/scatterlist.h
index 1ed372c73d0b..aeeddd8dac17 100644
--- a/arch/m32r/include/asm/scatterlist.h
+++ b/arch/m32r/include/asm/scatterlist.h
@@ -1,20 +1,7 @@
1#ifndef _ASM_M32R_SCATTERLIST_H 1#ifndef _ASM_M32R_SCATTERLIST_H
2#define _ASM_M32R_SCATTERLIST_H 2#define _ASM_M32R_SCATTERLIST_H
3 3
4#include <asm/types.h> 4#include <asm-generic/scatterlist.h>
5
6struct scatterlist {
7#ifdef CONFIG_DEBUG_SG
8 unsigned long sg_magic;
9#endif
10 char * address; /* Location data is to be transferred to, NULL for
11 * highmem page */
12 unsigned long page_link;
13 unsigned int offset;/* for highmem, page offset */
14
15 dma_addr_t dma_address;
16 unsigned int length;
17};
18 5
19#define ISA_DMA_THRESHOLD (0x1fffffff) 6#define ISA_DMA_THRESHOLD (0x1fffffff)
20 7
diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig
index b5da298ba61d..2e3737b92ffc 100644
--- a/arch/m68k/Kconfig
+++ b/arch/m68k/Kconfig
@@ -7,6 +7,7 @@ config M68K
7 default y 7 default y
8 select HAVE_AOUT 8 select HAVE_AOUT
9 select HAVE_IDE 9 select HAVE_IDE
10 select GENERIC_ATOMIC64
10 11
11config MMU 12config MMU
12 bool 13 bool
diff --git a/arch/m68k/amiga/config.c b/arch/m68k/amiga/config.c
index d2cc35d98532..b1577f741fa8 100644
--- a/arch/m68k/amiga/config.c
+++ b/arch/m68k/amiga/config.c
@@ -97,10 +97,6 @@ static void amiga_get_model(char *model);
97static void amiga_get_hardware_list(struct seq_file *m); 97static void amiga_get_hardware_list(struct seq_file *m);
98/* amiga specific timer functions */ 98/* amiga specific timer functions */
99static unsigned long amiga_gettimeoffset(void); 99static unsigned long amiga_gettimeoffset(void);
100static int a3000_hwclk(int, struct rtc_time *);
101static int a2000_hwclk(int, struct rtc_time *);
102static int amiga_set_clock_mmss(unsigned long);
103static unsigned int amiga_get_ss(void);
104extern void amiga_mksound(unsigned int count, unsigned int ticks); 100extern void amiga_mksound(unsigned int count, unsigned int ticks);
105static void amiga_reset(void); 101static void amiga_reset(void);
106extern void amiga_init_sound(void); 102extern void amiga_init_sound(void);
@@ -138,10 +134,6 @@ static struct {
138 } 134 }
139}; 135};
140 136
141static struct resource rtc_resource = {
142 .start = 0x00dc0000, .end = 0x00dcffff
143};
144
145static struct resource ram_resource[NUM_MEMINFO]; 137static struct resource ram_resource[NUM_MEMINFO];
146 138
147 139
@@ -387,15 +379,6 @@ void __init config_amiga(void)
387 mach_get_model = amiga_get_model; 379 mach_get_model = amiga_get_model;
388 mach_get_hardware_list = amiga_get_hardware_list; 380 mach_get_hardware_list = amiga_get_hardware_list;
389 mach_gettimeoffset = amiga_gettimeoffset; 381 mach_gettimeoffset = amiga_gettimeoffset;
390 if (AMIGAHW_PRESENT(A3000_CLK)) {
391 mach_hwclk = a3000_hwclk;
392 rtc_resource.name = "A3000 RTC";
393 request_resource(&iomem_resource, &rtc_resource);
394 } else /* if (AMIGAHW_PRESENT(A2000_CLK)) */ {
395 mach_hwclk = a2000_hwclk;
396 rtc_resource.name = "A2000 RTC";
397 request_resource(&iomem_resource, &rtc_resource);
398 }
399 382
400 /* 383 /*
401 * default MAX_DMA=0xffffffff on all machines. If we don't do so, the SCSI 384 * default MAX_DMA=0xffffffff on all machines. If we don't do so, the SCSI
@@ -404,8 +387,6 @@ void __init config_amiga(void)
404 */ 387 */
405 mach_max_dma_address = 0xffffffff; 388 mach_max_dma_address = 0xffffffff;
406 389
407 mach_set_clock_mmss = amiga_set_clock_mmss;
408 mach_get_ss = amiga_get_ss;
409 mach_reset = amiga_reset; 390 mach_reset = amiga_reset;
410#if defined(CONFIG_INPUT_M68K_BEEP) || defined(CONFIG_INPUT_M68K_BEEP_MODULE) 391#if defined(CONFIG_INPUT_M68K_BEEP) || defined(CONFIG_INPUT_M68K_BEEP_MODULE)
411 mach_beep = amiga_mksound; 392 mach_beep = amiga_mksound;
@@ -530,161 +511,6 @@ static unsigned long amiga_gettimeoffset(void)
530 return ticks + offset; 511 return ticks + offset;
531} 512}
532 513
533static int a3000_hwclk(int op, struct rtc_time *t)
534{
535 tod_3000.cntrl1 = TOD3000_CNTRL1_HOLD;
536
537 if (!op) { /* read */
538 t->tm_sec = tod_3000.second1 * 10 + tod_3000.second2;
539 t->tm_min = tod_3000.minute1 * 10 + tod_3000.minute2;
540 t->tm_hour = tod_3000.hour1 * 10 + tod_3000.hour2;
541 t->tm_mday = tod_3000.day1 * 10 + tod_3000.day2;
542 t->tm_wday = tod_3000.weekday;
543 t->tm_mon = tod_3000.month1 * 10 + tod_3000.month2 - 1;
544 t->tm_year = tod_3000.year1 * 10 + tod_3000.year2;
545 if (t->tm_year <= 69)
546 t->tm_year += 100;
547 } else {
548 tod_3000.second1 = t->tm_sec / 10;
549 tod_3000.second2 = t->tm_sec % 10;
550 tod_3000.minute1 = t->tm_min / 10;
551 tod_3000.minute2 = t->tm_min % 10;
552 tod_3000.hour1 = t->tm_hour / 10;
553 tod_3000.hour2 = t->tm_hour % 10;
554 tod_3000.day1 = t->tm_mday / 10;
555 tod_3000.day2 = t->tm_mday % 10;
556 if (t->tm_wday != -1)
557 tod_3000.weekday = t->tm_wday;
558 tod_3000.month1 = (t->tm_mon + 1) / 10;
559 tod_3000.month2 = (t->tm_mon + 1) % 10;
560 if (t->tm_year >= 100)
561 t->tm_year -= 100;
562 tod_3000.year1 = t->tm_year / 10;
563 tod_3000.year2 = t->tm_year % 10;
564 }
565
566 tod_3000.cntrl1 = TOD3000_CNTRL1_FREE;
567
568 return 0;
569}
570
571static int a2000_hwclk(int op, struct rtc_time *t)
572{
573 int cnt = 5;
574
575 tod_2000.cntrl1 = TOD2000_CNTRL1_HOLD;
576
577 while ((tod_2000.cntrl1 & TOD2000_CNTRL1_BUSY) && cnt) {
578 tod_2000.cntrl1 &= ~TOD2000_CNTRL1_HOLD;
579 udelay(70);
580 tod_2000.cntrl1 |= TOD2000_CNTRL1_HOLD;
581 --cnt;
582 }
583
584 if (!cnt)
585 printk(KERN_INFO "hwclk: timed out waiting for RTC (0x%x)\n",
586 tod_2000.cntrl1);
587
588 if (!op) { /* read */
589 t->tm_sec = tod_2000.second1 * 10 + tod_2000.second2;
590 t->tm_min = tod_2000.minute1 * 10 + tod_2000.minute2;
591 t->tm_hour = (tod_2000.hour1 & 3) * 10 + tod_2000.hour2;
592 t->tm_mday = tod_2000.day1 * 10 + tod_2000.day2;
593 t->tm_wday = tod_2000.weekday;
594 t->tm_mon = tod_2000.month1 * 10 + tod_2000.month2 - 1;
595 t->tm_year = tod_2000.year1 * 10 + tod_2000.year2;
596 if (t->tm_year <= 69)
597 t->tm_year += 100;
598
599 if (!(tod_2000.cntrl3 & TOD2000_CNTRL3_24HMODE)) {
600 if (!(tod_2000.hour1 & TOD2000_HOUR1_PM) && t->tm_hour == 12)
601 t->tm_hour = 0;
602 else if ((tod_2000.hour1 & TOD2000_HOUR1_PM) && t->tm_hour != 12)
603 t->tm_hour += 12;
604 }
605 } else {
606 tod_2000.second1 = t->tm_sec / 10;
607 tod_2000.second2 = t->tm_sec % 10;
608 tod_2000.minute1 = t->tm_min / 10;
609 tod_2000.minute2 = t->tm_min % 10;
610 if (tod_2000.cntrl3 & TOD2000_CNTRL3_24HMODE)
611 tod_2000.hour1 = t->tm_hour / 10;
612 else if (t->tm_hour >= 12)
613 tod_2000.hour1 = TOD2000_HOUR1_PM +
614 (t->tm_hour - 12) / 10;
615 else
616 tod_2000.hour1 = t->tm_hour / 10;
617 tod_2000.hour2 = t->tm_hour % 10;
618 tod_2000.day1 = t->tm_mday / 10;
619 tod_2000.day2 = t->tm_mday % 10;
620 if (t->tm_wday != -1)
621 tod_2000.weekday = t->tm_wday;
622 tod_2000.month1 = (t->tm_mon + 1) / 10;
623 tod_2000.month2 = (t->tm_mon + 1) % 10;
624 if (t->tm_year >= 100)
625 t->tm_year -= 100;
626 tod_2000.year1 = t->tm_year / 10;
627 tod_2000.year2 = t->tm_year % 10;
628 }
629
630 tod_2000.cntrl1 &= ~TOD2000_CNTRL1_HOLD;
631
632 return 0;
633}
634
635static int amiga_set_clock_mmss(unsigned long nowtime)
636{
637 short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60;
638
639 if (AMIGAHW_PRESENT(A3000_CLK)) {
640 tod_3000.cntrl1 = TOD3000_CNTRL1_HOLD;
641
642 tod_3000.second1 = real_seconds / 10;
643 tod_3000.second2 = real_seconds % 10;
644 tod_3000.minute1 = real_minutes / 10;
645 tod_3000.minute2 = real_minutes % 10;
646
647 tod_3000.cntrl1 = TOD3000_CNTRL1_FREE;
648 } else /* if (AMIGAHW_PRESENT(A2000_CLK)) */ {
649 int cnt = 5;
650
651 tod_2000.cntrl1 |= TOD2000_CNTRL1_HOLD;
652
653 while ((tod_2000.cntrl1 & TOD2000_CNTRL1_BUSY) && cnt) {
654 tod_2000.cntrl1 &= ~TOD2000_CNTRL1_HOLD;
655 udelay(70);
656 tod_2000.cntrl1 |= TOD2000_CNTRL1_HOLD;
657 --cnt;
658 }
659
660 if (!cnt)
661 printk(KERN_INFO "set_clock_mmss: timed out waiting for RTC (0x%x)\n", tod_2000.cntrl1);
662
663 tod_2000.second1 = real_seconds / 10;
664 tod_2000.second2 = real_seconds % 10;
665 tod_2000.minute1 = real_minutes / 10;
666 tod_2000.minute2 = real_minutes % 10;
667
668 tod_2000.cntrl1 &= ~TOD2000_CNTRL1_HOLD;
669 }
670
671 return 0;
672}
673
674static unsigned int amiga_get_ss(void)
675{
676 unsigned int s;
677
678 if (AMIGAHW_PRESENT(A3000_CLK)) {
679 tod_3000.cntrl1 = TOD3000_CNTRL1_HOLD;
680 s = tod_3000.second1 * 10 + tod_3000.second2;
681 tod_3000.cntrl1 = TOD3000_CNTRL1_FREE;
682 } else /* if (AMIGAHW_PRESENT(A2000_CLK)) */ {
683 s = tod_2000.second1 * 10 + tod_2000.second2;
684 }
685 return s;
686}
687
688static NORET_TYPE void amiga_reset(void) 514static NORET_TYPE void amiga_reset(void)
689 ATTRIB_NORET; 515 ATTRIB_NORET;
690 516
diff --git a/arch/m68k/amiga/platform.c b/arch/m68k/amiga/platform.c
index 38f18bf14737..7fd8b41723ea 100644
--- a/arch/m68k/amiga/platform.c
+++ b/arch/m68k/amiga/platform.c
@@ -11,6 +11,7 @@
11#include <linux/zorro.h> 11#include <linux/zorro.h>
12 12
13#include <asm/amigahw.h> 13#include <asm/amigahw.h>
14#include <asm/amigayle.h>
14 15
15 16
16#ifdef CONFIG_ZORRO 17#ifdef CONFIG_ZORRO
@@ -55,11 +56,77 @@ static int __init amiga_init_bus(void)
55 56
56subsys_initcall(amiga_init_bus); 57subsys_initcall(amiga_init_bus);
57 58
58#endif /* CONFIG_ZORRO */ 59
60static int z_dev_present(zorro_id id)
61{
62 unsigned int i;
63
64 for (i = 0; i < zorro_num_autocon; i++)
65 if (zorro_autocon[i].rom.er_Manufacturer == ZORRO_MANUF(id) &&
66 zorro_autocon[i].rom.er_Product == ZORRO_PROD(id))
67 return 1;
68
69 return 0;
70}
71
72#else /* !CONFIG_ZORRO */
73
74static inline int z_dev_present(zorro_id id) { return 0; }
75
76#endif /* !CONFIG_ZORRO */
77
78
79static const struct resource a3000_scsi_resource __initconst = {
80 .start = 0xdd0000,
81 .end = 0xdd00ff,
82 .flags = IORESOURCE_MEM,
83};
84
85
86static const struct resource a4000t_scsi_resource __initconst = {
87 .start = 0xdd0000,
88 .end = 0xdd0fff,
89 .flags = IORESOURCE_MEM,
90};
91
92
93static const struct resource a1200_ide_resource __initconst = {
94 .start = 0xda0000,
95 .end = 0xda1fff,
96 .flags = IORESOURCE_MEM,
97};
98
99static const struct gayle_ide_platform_data a1200_ide_pdata __initconst = {
100 .base = 0xda0000,
101 .irqport = 0xda9000,
102 .explicit_ack = 1,
103};
104
105
106static const struct resource a4000_ide_resource __initconst = {
107 .start = 0xdd2000,
108 .end = 0xdd3fff,
109 .flags = IORESOURCE_MEM,
110};
111
112static const struct gayle_ide_platform_data a4000_ide_pdata __initconst = {
113 .base = 0xdd2020,
114 .irqport = 0xdd3020,
115 .explicit_ack = 0,
116};
117
118
119static const struct resource amiga_rtc_resource __initconst = {
120 .start = 0x00dc0000,
121 .end = 0x00dcffff,
122 .flags = IORESOURCE_MEM,
123};
59 124
60 125
61static int __init amiga_init_devices(void) 126static int __init amiga_init_devices(void)
62{ 127{
128 struct platform_device *pdev;
129
63 if (!MACH_IS_AMIGA) 130 if (!MACH_IS_AMIGA)
64 return -ENODEV; 131 return -ENODEV;
65 132
@@ -77,6 +144,53 @@ static int __init amiga_init_devices(void)
77 if (AMIGAHW_PRESENT(AMI_FLOPPY)) 144 if (AMIGAHW_PRESENT(AMI_FLOPPY))
78 platform_device_register_simple("amiga-floppy", -1, NULL, 0); 145 platform_device_register_simple("amiga-floppy", -1, NULL, 0);
79 146
147 if (AMIGAHW_PRESENT(A3000_SCSI))
148 platform_device_register_simple("amiga-a3000-scsi", -1,
149 &a3000_scsi_resource, 1);
150
151 if (AMIGAHW_PRESENT(A4000_SCSI))
152 platform_device_register_simple("amiga-a4000t-scsi", -1,
153 &a4000t_scsi_resource, 1);
154
155 if (AMIGAHW_PRESENT(A1200_IDE) ||
156 z_dev_present(ZORRO_PROD_MTEC_VIPER_MK_V_E_MATRIX_530_SCSI_IDE)) {
157 pdev = platform_device_register_simple("amiga-gayle-ide", -1,
158 &a1200_ide_resource, 1);
159 platform_device_add_data(pdev, &a1200_ide_pdata,
160 sizeof(a1200_ide_pdata));
161 }
162
163 if (AMIGAHW_PRESENT(A4000_IDE)) {
164 pdev = platform_device_register_simple("amiga-gayle-ide", -1,
165 &a4000_ide_resource, 1);
166 platform_device_add_data(pdev, &a4000_ide_pdata,
167 sizeof(a4000_ide_pdata));
168 }
169
170
171 /* other I/O hardware */
172 if (AMIGAHW_PRESENT(AMI_KEYBOARD))
173 platform_device_register_simple("amiga-keyboard", -1, NULL, 0);
174
175 if (AMIGAHW_PRESENT(AMI_MOUSE))
176 platform_device_register_simple("amiga-mouse", -1, NULL, 0);
177
178 if (AMIGAHW_PRESENT(AMI_SERIAL))
179 platform_device_register_simple("amiga-serial", -1, NULL, 0);
180
181 if (AMIGAHW_PRESENT(AMI_PARALLEL))
182 platform_device_register_simple("amiga-parallel", -1, NULL, 0);
183
184
185 /* real time clocks */
186 if (AMIGAHW_PRESENT(A2000_CLK))
187 platform_device_register_simple("rtc-msm6242", -1,
188 &amiga_rtc_resource, 1);
189
190 if (AMIGAHW_PRESENT(A3000_CLK))
191 platform_device_register_simple("rtc-rp5c01", -1,
192 &amiga_rtc_resource, 1);
193
80 return 0; 194 return 0;
81} 195}
82 196
diff --git a/arch/m68k/include/asm/amigayle.h b/arch/m68k/include/asm/amigayle.h
index bb5a6aa329f3..a01453d9c231 100644
--- a/arch/m68k/include/asm/amigayle.h
+++ b/arch/m68k/include/asm/amigayle.h
@@ -104,4 +104,10 @@ struct GAYLE {
104#define GAYLE_CFG_250NS 0x00 104#define GAYLE_CFG_250NS 0x00
105#define GAYLE_CFG_720NS 0x0c 105#define GAYLE_CFG_720NS 0x0c
106 106
107struct gayle_ide_platform_data {
108 unsigned long base;
109 unsigned long irqport;
110 int explicit_ack; /* A1200 IDE needs explicit ack */
111};
112
107#endif /* asm-m68k/amigayle.h */ 113#endif /* asm-m68k/amigayle.h */
diff --git a/arch/m68k/include/asm/atomic.h b/arch/m68k/include/asm/atomic.h
index 8d29145ebb27..eab36dcacf6c 100644
--- a/arch/m68k/include/asm/atomic.h
+++ b/arch/m68k/include/asm/atomic.h
@@ -3,3 +3,5 @@
3#else 3#else
4#include "atomic_mm.h" 4#include "atomic_mm.h"
5#endif 5#endif
6
7#include <asm-generic/atomic64.h>
diff --git a/arch/m68k/include/asm/cache.h b/arch/m68k/include/asm/cache.h
index fed3fd30de7e..ecafbe1718c3 100644
--- a/arch/m68k/include/asm/cache.h
+++ b/arch/m68k/include/asm/cache.h
@@ -8,4 +8,6 @@
8#define L1_CACHE_SHIFT 4 8#define L1_CACHE_SHIFT 4
9#define L1_CACHE_BYTES (1<< L1_CACHE_SHIFT) 9#define L1_CACHE_BYTES (1<< L1_CACHE_SHIFT)
10 10
11#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES
12
11#endif 13#endif
diff --git a/arch/m68k/include/asm/scatterlist.h b/arch/m68k/include/asm/scatterlist.h
index e27ad902b1cf..175da06c6b95 100644
--- a/arch/m68k/include/asm/scatterlist.h
+++ b/arch/m68k/include/asm/scatterlist.h
@@ -1,23 +1,9 @@
1#ifndef _M68K_SCATTERLIST_H 1#ifndef _M68K_SCATTERLIST_H
2#define _M68K_SCATTERLIST_H 2#define _M68K_SCATTERLIST_H
3 3
4#include <linux/types.h> 4#include <asm-generic/scatterlist.h>
5
6struct scatterlist {
7#ifdef CONFIG_DEBUG_SG
8 unsigned long sg_magic;
9#endif
10 unsigned long page_link;
11 unsigned int offset;
12 unsigned int length;
13
14 dma_addr_t dma_address; /* A place to hang host-specific addresses at. */
15};
16 5
17/* This is bogus and should go away. */ 6/* This is bogus and should go away. */
18#define ISA_DMA_THRESHOLD (0x00ffffff) 7#define ISA_DMA_THRESHOLD (0x00ffffff)
19 8
20#define sg_dma_address(sg) ((sg)->dma_address)
21#define sg_dma_len(sg) ((sg)->length)
22
23#endif /* !(_M68K_SCATTERLIST_H) */ 9#endif /* !(_M68K_SCATTERLIST_H) */
diff --git a/arch/microblaze/include/asm/scatterlist.h b/arch/microblaze/include/asm/scatterlist.h
index 35d786fe93ae..dc4a8900cc80 100644
--- a/arch/microblaze/include/asm/scatterlist.h
+++ b/arch/microblaze/include/asm/scatterlist.h
@@ -1 +1,3 @@
1#include <asm-generic/scatterlist.h> 1#include <asm-generic/scatterlist.h>
2
3#define ISA_DMA_THRESHOLD (~0UL)
diff --git a/arch/mips/include/asm/scatterlist.h b/arch/mips/include/asm/scatterlist.h
index 83d69fe17c9f..9af65e79be36 100644
--- a/arch/mips/include/asm/scatterlist.h
+++ b/arch/mips/include/asm/scatterlist.h
@@ -1,27 +1,7 @@
1#ifndef __ASM_SCATTERLIST_H 1#ifndef __ASM_SCATTERLIST_H
2#define __ASM_SCATTERLIST_H 2#define __ASM_SCATTERLIST_H
3 3
4#include <asm/types.h> 4#include <asm-generic/scatterlist.h>
5
6struct scatterlist {
7#ifdef CONFIG_DEBUG_SG
8 unsigned long sg_magic;
9#endif
10 unsigned long page_link;
11 unsigned int offset;
12 dma_addr_t dma_address;
13 unsigned int length;
14};
15
16/*
17 * These macros should be used after a pci_map_sg call has been done
18 * to get bus addresses of each of the SG entries and their lengths.
19 * You should only work with the number of sg entries pci_map_sg
20 * returns, or alternatively stop on the first sg_dma_len(sg) which
21 * is 0.
22 */
23#define sg_dma_address(sg) ((sg)->dma_address)
24#define sg_dma_len(sg) ((sg)->length)
25 5
26#define ISA_DMA_THRESHOLD (0x00ffffffUL) 6#define ISA_DMA_THRESHOLD (0x00ffffffUL)
27 7
diff --git a/arch/mn10300/include/asm/scatterlist.h b/arch/mn10300/include/asm/scatterlist.h
index 67535901b9ff..7bd00b9e030d 100644
--- a/arch/mn10300/include/asm/scatterlist.h
+++ b/arch/mn10300/include/asm/scatterlist.h
@@ -11,45 +11,8 @@
11#ifndef _ASM_SCATTERLIST_H 11#ifndef _ASM_SCATTERLIST_H
12#define _ASM_SCATTERLIST_H 12#define _ASM_SCATTERLIST_H
13 13
14#include <asm/types.h> 14#include <asm-generic/scatterlist.h>
15
16/*
17 * Drivers must set either ->address or (preferred) page and ->offset
18 * to indicate where data must be transferred to/from.
19 *
20 * Using page is recommended since it handles highmem data as well as
21 * low mem. ->address is restricted to data which has a virtual mapping, and
22 * it will go away in the future. Updating to page can be automated very
23 * easily -- something like
24 *
25 * sg->address = some_ptr;
26 *
27 * can be rewritten as
28 *
29 * sg_set_page(virt_to_page(some_ptr));
30 * sg->offset = (unsigned long) some_ptr & ~PAGE_MASK;
31 *
32 * and that's it. There's no excuse for not highmem enabling YOUR driver. /jens
33 */
34struct scatterlist {
35#ifdef CONFIG_DEBUG_SG
36 unsigned long sg_magic;
37#endif
38 unsigned long page_link;
39 unsigned int offset; /* for highmem, page offset */
40 dma_addr_t dma_address;
41 unsigned int length;
42};
43 15
44#define ISA_DMA_THRESHOLD (0x00ffffff) 16#define ISA_DMA_THRESHOLD (0x00ffffff)
45 17
46/*
47 * These macros should be used after a pci_map_sg call has been done
48 * to get bus addresses of each of the SG entries and their lengths.
49 * You should only work with the number of sg entries pci_map_sg
50 * returns.
51 */
52#define sg_dma_address(sg) ((sg)->dma_address)
53#define sg_dma_len(sg) ((sg)->length)
54
55#endif /* _ASM_SCATTERLIST_H */ 18#endif /* _ASM_SCATTERLIST_H */
diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig
index 9c4da3d63bfb..05a366a5c4d5 100644
--- a/arch/parisc/Kconfig
+++ b/arch/parisc/Kconfig
@@ -98,6 +98,9 @@ config STACKTRACE_SUPPORT
98config NEED_DMA_MAP_STATE 98config NEED_DMA_MAP_STATE
99 def_bool y 99 def_bool y
100 100
101config NEED_SG_DMA_LENGTH
102 def_bool y
103
101config ISA_DMA_API 104config ISA_DMA_API
102 bool 105 bool
103 106
diff --git a/arch/parisc/include/asm/cacheflush.h b/arch/parisc/include/asm/cacheflush.h
index 477277739da5..4556d820128a 100644
--- a/arch/parisc/include/asm/cacheflush.h
+++ b/arch/parisc/include/asm/cacheflush.h
@@ -2,6 +2,7 @@
2#define _PARISC_CACHEFLUSH_H 2#define _PARISC_CACHEFLUSH_H
3 3
4#include <linux/mm.h> 4#include <linux/mm.h>
5#include <linux/uaccess.h>
5 6
6/* The usual comment is "Caches aren't brain-dead on the <architecture>". 7/* The usual comment is "Caches aren't brain-dead on the <architecture>".
7 * Unfortunately, that doesn't apply to PA-RISC. */ 8 * Unfortunately, that doesn't apply to PA-RISC. */
@@ -125,11 +126,20 @@ static inline void *kmap(struct page *page)
125 126
126#define kunmap(page) kunmap_parisc(page_address(page)) 127#define kunmap(page) kunmap_parisc(page_address(page))
127 128
128#define kmap_atomic(page, idx) page_address(page) 129static inline void *kmap_atomic(struct page *page, enum km_type idx)
130{
131 pagefault_disable();
132 return page_address(page);
133}
129 134
130#define kunmap_atomic(addr, idx) kunmap_parisc(addr) 135static inline void kunmap_atomic(void *addr, enum km_type idx)
136{
137 kunmap_parisc(addr);
138 pagefault_enable();
139}
131 140
132#define kmap_atomic_pfn(pfn, idx) page_address(pfn_to_page(pfn)) 141#define kmap_atomic_prot(page, idx, prot) kmap_atomic(page, idx)
142#define kmap_atomic_pfn(pfn, idx) kmap_atomic(pfn_to_page(pfn), (idx))
133#define kmap_atomic_to_page(ptr) virt_to_page(ptr) 143#define kmap_atomic_to_page(ptr) virt_to_page(ptr)
134#endif 144#endif
135 145
diff --git a/arch/parisc/include/asm/scatterlist.h b/arch/parisc/include/asm/scatterlist.h
index 62269b31ebf4..2c3b79b54b28 100644
--- a/arch/parisc/include/asm/scatterlist.h
+++ b/arch/parisc/include/asm/scatterlist.h
@@ -3,25 +3,9 @@
3 3
4#include <asm/page.h> 4#include <asm/page.h>
5#include <asm/types.h> 5#include <asm/types.h>
6 6#include <asm-generic/scatterlist.h>
7struct scatterlist {
8#ifdef CONFIG_DEBUG_SG
9 unsigned long sg_magic;
10#endif
11 unsigned long page_link;
12 unsigned int offset;
13
14 unsigned int length;
15
16 /* an IOVA can be 64-bits on some PA-Risc platforms. */
17 dma_addr_t iova; /* I/O Virtual Address */
18 __u32 iova_length; /* bytes mapped */
19};
20
21#define sg_virt_addr(sg) ((unsigned long)sg_virt(sg))
22#define sg_dma_address(sg) ((sg)->iova)
23#define sg_dma_len(sg) ((sg)->iova_length)
24 7
25#define ISA_DMA_THRESHOLD (~0UL) 8#define ISA_DMA_THRESHOLD (~0UL)
9#define sg_virt_addr(sg) ((unsigned long)sg_virt(sg))
26 10
27#endif /* _ASM_PARISC_SCATTERLIST_H */ 11#endif /* _ASM_PARISC_SCATTERLIST_H */
diff --git a/arch/parisc/kernel/asm-offsets.c b/arch/parisc/kernel/asm-offsets.c
index ec787b411e9a..dcd55103a4bb 100644
--- a/arch/parisc/kernel/asm-offsets.c
+++ b/arch/parisc/kernel/asm-offsets.c
@@ -45,8 +45,12 @@
45#else 45#else
46#define FRAME_SIZE 64 46#define FRAME_SIZE 64
47#endif 47#endif
48#define FRAME_ALIGN 64
48 49
49#define align(x,y) (((x)+FRAME_SIZE+(y)-1) - (((x)+(y)-1)%(y))) 50/* Add FRAME_SIZE to the size x and align it to y. All definitions
51 * that use align_frame will include space for a frame.
52 */
53#define align_frame(x,y) (((x)+FRAME_SIZE+(y)-1) - (((x)+(y)-1)%(y)))
50 54
51int main(void) 55int main(void)
52{ 56{
@@ -146,7 +150,8 @@ int main(void)
146 DEFINE(TASK_PT_IOR, offsetof(struct task_struct, thread.regs.ior)); 150 DEFINE(TASK_PT_IOR, offsetof(struct task_struct, thread.regs.ior));
147 BLANK(); 151 BLANK();
148 DEFINE(TASK_SZ, sizeof(struct task_struct)); 152 DEFINE(TASK_SZ, sizeof(struct task_struct));
149 DEFINE(TASK_SZ_ALGN, align(sizeof(struct task_struct), 64)); 153 /* TASK_SZ_ALGN includes space for a stack frame. */
154 DEFINE(TASK_SZ_ALGN, align_frame(sizeof(struct task_struct), FRAME_ALIGN));
150 BLANK(); 155 BLANK();
151 DEFINE(PT_PSW, offsetof(struct pt_regs, gr[ 0])); 156 DEFINE(PT_PSW, offsetof(struct pt_regs, gr[ 0]));
152 DEFINE(PT_GR1, offsetof(struct pt_regs, gr[ 1])); 157 DEFINE(PT_GR1, offsetof(struct pt_regs, gr[ 1]));
@@ -233,7 +238,8 @@ int main(void)
233 DEFINE(PT_ISR, offsetof(struct pt_regs, isr)); 238 DEFINE(PT_ISR, offsetof(struct pt_regs, isr));
234 DEFINE(PT_IOR, offsetof(struct pt_regs, ior)); 239 DEFINE(PT_IOR, offsetof(struct pt_regs, ior));
235 DEFINE(PT_SIZE, sizeof(struct pt_regs)); 240 DEFINE(PT_SIZE, sizeof(struct pt_regs));
236 DEFINE(PT_SZ_ALGN, align(sizeof(struct pt_regs), 64)); 241 /* PT_SZ_ALGN includes space for a stack frame. */
242 DEFINE(PT_SZ_ALGN, align_frame(sizeof(struct pt_regs), FRAME_ALIGN));
237 BLANK(); 243 BLANK();
238 DEFINE(TI_TASK, offsetof(struct thread_info, task)); 244 DEFINE(TI_TASK, offsetof(struct thread_info, task));
239 DEFINE(TI_EXEC_DOMAIN, offsetof(struct thread_info, exec_domain)); 245 DEFINE(TI_EXEC_DOMAIN, offsetof(struct thread_info, exec_domain));
@@ -242,7 +248,8 @@ int main(void)
242 DEFINE(TI_SEGMENT, offsetof(struct thread_info, addr_limit)); 248 DEFINE(TI_SEGMENT, offsetof(struct thread_info, addr_limit));
243 DEFINE(TI_PRE_COUNT, offsetof(struct thread_info, preempt_count)); 249 DEFINE(TI_PRE_COUNT, offsetof(struct thread_info, preempt_count));
244 DEFINE(THREAD_SZ, sizeof(struct thread_info)); 250 DEFINE(THREAD_SZ, sizeof(struct thread_info));
245 DEFINE(THREAD_SZ_ALGN, align(sizeof(struct thread_info), 64)); 251 /* THREAD_SZ_ALGN includes space for a stack frame. */
252 DEFINE(THREAD_SZ_ALGN, align_frame(sizeof(struct thread_info), FRAME_ALIGN));
246 BLANK(); 253 BLANK();
247 DEFINE(ICACHE_BASE, offsetof(struct pdc_cache_info, ic_base)); 254 DEFINE(ICACHE_BASE, offsetof(struct pdc_cache_info, ic_base));
248 DEFINE(ICACHE_STRIDE, offsetof(struct pdc_cache_info, ic_stride)); 255 DEFINE(ICACHE_STRIDE, offsetof(struct pdc_cache_info, ic_stride));
diff --git a/arch/parisc/kernel/entry.S b/arch/parisc/kernel/entry.S
index 3a44f7f704fa..6337adef30f6 100644
--- a/arch/parisc/kernel/entry.S
+++ b/arch/parisc/kernel/entry.S
@@ -364,32 +364,6 @@
364 .align 32 364 .align 32
365 .endm 365 .endm
366 366
367 /* The following are simple 32 vs 64 bit instruction
368 * abstractions for the macros */
369 .macro EXTR reg1,start,length,reg2
370#ifdef CONFIG_64BIT
371 extrd,u \reg1,32+(\start),\length,\reg2
372#else
373 extrw,u \reg1,\start,\length,\reg2
374#endif
375 .endm
376
377 .macro DEP reg1,start,length,reg2
378#ifdef CONFIG_64BIT
379 depd \reg1,32+(\start),\length,\reg2
380#else
381 depw \reg1,\start,\length,\reg2
382#endif
383 .endm
384
385 .macro DEPI val,start,length,reg
386#ifdef CONFIG_64BIT
387 depdi \val,32+(\start),\length,\reg
388#else
389 depwi \val,\start,\length,\reg
390#endif
391 .endm
392
393 /* In LP64, the space contains part of the upper 32 bits of the 367 /* In LP64, the space contains part of the upper 32 bits of the
394 * fault. We have to extract this and place it in the va, 368 * fault. We have to extract this and place it in the va,
395 * zeroing the corresponding bits in the space register */ 369 * zeroing the corresponding bits in the space register */
@@ -442,19 +416,19 @@
442 */ 416 */
443 .macro L2_ptep pmd,pte,index,va,fault 417 .macro L2_ptep pmd,pte,index,va,fault
444#if PT_NLEVELS == 3 418#if PT_NLEVELS == 3
445 EXTR \va,31-ASM_PMD_SHIFT,ASM_BITS_PER_PMD,\index 419 extru \va,31-ASM_PMD_SHIFT,ASM_BITS_PER_PMD,\index
446#else 420#else
447 EXTR \va,31-ASM_PGDIR_SHIFT,ASM_BITS_PER_PGD,\index 421 extru \va,31-ASM_PGDIR_SHIFT,ASM_BITS_PER_PGD,\index
448#endif 422#endif
449 DEP %r0,31,PAGE_SHIFT,\pmd /* clear offset */ 423 dep %r0,31,PAGE_SHIFT,\pmd /* clear offset */
450 copy %r0,\pte 424 copy %r0,\pte
451 ldw,s \index(\pmd),\pmd 425 ldw,s \index(\pmd),\pmd
452 bb,>=,n \pmd,_PxD_PRESENT_BIT,\fault 426 bb,>=,n \pmd,_PxD_PRESENT_BIT,\fault
453 DEP %r0,31,PxD_FLAG_SHIFT,\pmd /* clear flags */ 427 dep %r0,31,PxD_FLAG_SHIFT,\pmd /* clear flags */
454 copy \pmd,%r9 428 copy \pmd,%r9
455 SHLREG %r9,PxD_VALUE_SHIFT,\pmd 429 SHLREG %r9,PxD_VALUE_SHIFT,\pmd
456 EXTR \va,31-PAGE_SHIFT,ASM_BITS_PER_PTE,\index 430 extru \va,31-PAGE_SHIFT,ASM_BITS_PER_PTE,\index
457 DEP %r0,31,PAGE_SHIFT,\pmd /* clear offset */ 431 dep %r0,31,PAGE_SHIFT,\pmd /* clear offset */
458 shladd \index,BITS_PER_PTE_ENTRY,\pmd,\pmd 432 shladd \index,BITS_PER_PTE_ENTRY,\pmd,\pmd
459 LDREG %r0(\pmd),\pte /* pmd is now pte */ 433 LDREG %r0(\pmd),\pte /* pmd is now pte */
460 bb,>=,n \pte,_PAGE_PRESENT_BIT,\fault 434 bb,>=,n \pte,_PAGE_PRESENT_BIT,\fault
@@ -605,7 +579,7 @@
605 depdi 0,31,32,\tmp 579 depdi 0,31,32,\tmp
606#endif 580#endif
607 copy \va,\tmp1 581 copy \va,\tmp1
608 DEPI 0,31,23,\tmp1 582 depi 0,31,23,\tmp1
609 cmpb,COND(<>),n \tmp,\tmp1,\fault 583 cmpb,COND(<>),n \tmp,\tmp1,\fault
610 ldi (_PAGE_DIRTY|_PAGE_WRITE|_PAGE_READ),\prot 584 ldi (_PAGE_DIRTY|_PAGE_WRITE|_PAGE_READ),\prot
611 depd,z \prot,8,7,\prot 585 depd,z \prot,8,7,\prot
@@ -997,13 +971,6 @@ intr_restore:
997 971
998 rfi 972 rfi
999 nop 973 nop
1000 nop
1001 nop
1002 nop
1003 nop
1004 nop
1005 nop
1006 nop
1007 974
1008#ifndef CONFIG_PREEMPT 975#ifndef CONFIG_PREEMPT
1009# define intr_do_preempt intr_restore 976# define intr_do_preempt intr_restore
@@ -2076,9 +2043,10 @@ syscall_restore:
2076 LDREG TASK_PT_GR31(%r1),%r31 /* restore syscall rp */ 2043 LDREG TASK_PT_GR31(%r1),%r31 /* restore syscall rp */
2077 2044
2078 /* NOTE: We use rsm/ssm pair to make this operation atomic */ 2045 /* NOTE: We use rsm/ssm pair to make this operation atomic */
2046 LDREG TASK_PT_GR30(%r1),%r1 /* Get user sp */
2079 rsm PSW_SM_I, %r0 2047 rsm PSW_SM_I, %r0
2080 LDREG TASK_PT_GR30(%r1),%r30 /* restore user sp */ 2048 copy %r1,%r30 /* Restore user sp */
2081 mfsp %sr3,%r1 /* Get users space id */ 2049 mfsp %sr3,%r1 /* Get user space id */
2082 mtsp %r1,%sr7 /* Restore sr7 */ 2050 mtsp %r1,%sr7 /* Restore sr7 */
2083 ssm PSW_SM_I, %r0 2051 ssm PSW_SM_I, %r0
2084 2052
diff --git a/arch/parisc/kernel/syscall.S b/arch/parisc/kernel/syscall.S
index f5f96021caa0..68e75ce838d6 100644
--- a/arch/parisc/kernel/syscall.S
+++ b/arch/parisc/kernel/syscall.S
@@ -47,18 +47,17 @@ ENTRY(linux_gateway_page)
47 KILL_INSN 47 KILL_INSN
48 .endr 48 .endr
49 49
50 /* ADDRESS 0xb0 to 0xb4, lws uses 1 insns for entry */ 50 /* ADDRESS 0xb0 to 0xb8, lws uses two insns for entry */
51 /* Light-weight-syscall entry must always be located at 0xb0 */ 51 /* Light-weight-syscall entry must always be located at 0xb0 */
52 /* WARNING: Keep this number updated with table size changes */ 52 /* WARNING: Keep this number updated with table size changes */
53#define __NR_lws_entries (2) 53#define __NR_lws_entries (2)
54 54
55lws_entry: 55lws_entry:
56 /* Unconditional branch to lws_start, located on the 56 gate lws_start, %r0 /* increase privilege */
57 same gateway page */ 57 depi 3, 31, 2, %r31 /* Ensure we return into user mode. */
58 b,n lws_start
59 58
60 /* Fill from 0xb4 to 0xe0 */ 59 /* Fill from 0xb8 to 0xe0 */
61 .rept 11 60 .rept 10
62 KILL_INSN 61 KILL_INSN
63 .endr 62 .endr
64 63
@@ -423,9 +422,6 @@ tracesys_sigexit:
423 422
424 *********************************************************/ 423 *********************************************************/
425lws_start: 424lws_start:
426 /* Gate and ensure we return to userspace */
427 gate .+8, %r0
428 depi 3, 31, 2, %r31 /* Ensure we return to userspace */
429 425
430#ifdef CONFIG_64BIT 426#ifdef CONFIG_64BIT
431 /* FIXME: If we are a 64-bit kernel just 427 /* FIXME: If we are a 64-bit kernel just
@@ -442,7 +438,7 @@ lws_start:
442#endif 438#endif
443 439
444 /* Is the lws entry number valid? */ 440 /* Is the lws entry number valid? */
445 comiclr,>>= __NR_lws_entries, %r20, %r0 441 comiclr,>> __NR_lws_entries, %r20, %r0
446 b,n lws_exit_nosys 442 b,n lws_exit_nosys
447 443
448 /* WARNING: Trashing sr2 and sr3 */ 444 /* WARNING: Trashing sr2 and sr3 */
@@ -473,7 +469,7 @@ lws_exit:
473 /* now reset the lowest bit of sp if it was set */ 469 /* now reset the lowest bit of sp if it was set */
474 xor %r30,%r1,%r30 470 xor %r30,%r1,%r30
475#endif 471#endif
476 be,n 0(%sr3, %r31) 472 be,n 0(%sr7, %r31)
477 473
478 474
479 475
@@ -529,7 +525,6 @@ lws_compare_and_swap32:
529#endif 525#endif
530 526
531lws_compare_and_swap: 527lws_compare_and_swap:
532#ifdef CONFIG_SMP
533 /* Load start of lock table */ 528 /* Load start of lock table */
534 ldil L%lws_lock_start, %r20 529 ldil L%lws_lock_start, %r20
535 ldo R%lws_lock_start(%r20), %r28 530 ldo R%lws_lock_start(%r20), %r28
@@ -572,8 +567,6 @@ cas_wouldblock:
572 ldo 2(%r0), %r28 /* 2nd case */ 567 ldo 2(%r0), %r28 /* 2nd case */
573 b lws_exit /* Contended... */ 568 b lws_exit /* Contended... */
574 ldo -EAGAIN(%r0), %r21 /* Spin in userspace */ 569 ldo -EAGAIN(%r0), %r21 /* Spin in userspace */
575#endif
576/* CONFIG_SMP */
577 570
578 /* 571 /*
579 prev = *addr; 572 prev = *addr;
@@ -601,13 +594,11 @@ cas_action:
6011: ldw 0(%sr3,%r26), %r28 5941: ldw 0(%sr3,%r26), %r28
602 sub,<> %r28, %r25, %r0 595 sub,<> %r28, %r25, %r0
6032: stw %r24, 0(%sr3,%r26) 5962: stw %r24, 0(%sr3,%r26)
604#ifdef CONFIG_SMP
605 /* Free lock */ 597 /* Free lock */
606 stw %r20, 0(%sr2,%r20) 598 stw %r20, 0(%sr2,%r20)
607# if ENABLE_LWS_DEBUG 599#if ENABLE_LWS_DEBUG
608 /* Clear thread register indicator */ 600 /* Clear thread register indicator */
609 stw %r0, 4(%sr2,%r20) 601 stw %r0, 4(%sr2,%r20)
610# endif
611#endif 602#endif
612 /* Return to userspace, set no error */ 603 /* Return to userspace, set no error */
613 b lws_exit 604 b lws_exit
@@ -615,12 +606,10 @@ cas_action:
615 606
6163: 6073:
617 /* Error occured on load or store */ 608 /* Error occured on load or store */
618#ifdef CONFIG_SMP
619 /* Free lock */ 609 /* Free lock */
620 stw %r20, 0(%sr2,%r20) 610 stw %r20, 0(%sr2,%r20)
621# if ENABLE_LWS_DEBUG 611#if ENABLE_LWS_DEBUG
622 stw %r0, 4(%sr2,%r20) 612 stw %r0, 4(%sr2,%r20)
623# endif
624#endif 613#endif
625 b lws_exit 614 b lws_exit
626 ldo -EFAULT(%r0),%r21 /* set errno */ 615 ldo -EFAULT(%r0),%r21 /* set errno */
@@ -672,7 +661,6 @@ ENTRY(sys_call_table64)
672END(sys_call_table64) 661END(sys_call_table64)
673#endif 662#endif
674 663
675#ifdef CONFIG_SMP
676 /* 664 /*
677 All light-weight-syscall atomic operations 665 All light-weight-syscall atomic operations
678 will use this set of locks 666 will use this set of locks
@@ -694,8 +682,6 @@ ENTRY(lws_lock_start)
694 .endr 682 .endr
695END(lws_lock_start) 683END(lws_lock_start)
696 .previous 684 .previous
697#endif
698/* CONFIG_SMP for lws_lock_start */
699 685
700.end 686.end
701 687
diff --git a/arch/parisc/math-emu/decode_exc.c b/arch/parisc/math-emu/decode_exc.c
index 3ca1c6149218..27a7492ddb0d 100644
--- a/arch/parisc/math-emu/decode_exc.c
+++ b/arch/parisc/math-emu/decode_exc.c
@@ -342,6 +342,7 @@ decode_fpu(unsigned int Fpu_register[], unsigned int trap_counts[])
342 return SIGNALCODE(SIGFPE, FPE_FLTINV); 342 return SIGNALCODE(SIGFPE, FPE_FLTINV);
343 case DIVISIONBYZEROEXCEPTION: 343 case DIVISIONBYZEROEXCEPTION:
344 update_trap_counts(Fpu_register, aflags, bflags, trap_counts); 344 update_trap_counts(Fpu_register, aflags, bflags, trap_counts);
345 Clear_excp_register(exception_index);
345 return SIGNALCODE(SIGFPE, FPE_FLTDIV); 346 return SIGNALCODE(SIGFPE, FPE_FLTDIV);
346 case INEXACTEXCEPTION: 347 case INEXACTEXCEPTION:
347 update_trap_counts(Fpu_register, aflags, bflags, trap_counts); 348 update_trap_counts(Fpu_register, aflags, bflags, trap_counts);
diff --git a/arch/parisc/mm/fault.c b/arch/parisc/mm/fault.c
index c6afbfc95770..18162ce4261e 100644
--- a/arch/parisc/mm/fault.c
+++ b/arch/parisc/mm/fault.c
@@ -264,8 +264,7 @@ no_context:
264 264
265 out_of_memory: 265 out_of_memory:
266 up_read(&mm->mmap_sem); 266 up_read(&mm->mmap_sem);
267 printk(KERN_CRIT "VM: killing process %s\n", current->comm); 267 if (!user_mode(regs))
268 if (user_mode(regs)) 268 goto no_context;
269 do_group_exit(SIGKILL); 269 pagefault_out_of_memory();
270 goto no_context;
271} 270}
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index c4c4549c22bb..66a315e06dce 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -663,6 +663,9 @@ config ZONE_DMA
663config NEED_DMA_MAP_STATE 663config NEED_DMA_MAP_STATE
664 def_bool (PPC64 || NOT_COHERENT_CACHE) 664 def_bool (PPC64 || NOT_COHERENT_CACHE)
665 665
666config NEED_SG_DMA_LENGTH
667 def_bool y
668
666config GENERIC_ISA_DMA 669config GENERIC_ISA_DMA
667 bool 670 bool
668 depends on PPC64 || POWER4 || 6xx && !CPM2 671 depends on PPC64 || POWER4 || 6xx && !CPM2
diff --git a/arch/powerpc/include/asm/scatterlist.h b/arch/powerpc/include/asm/scatterlist.h
index 912bf597870f..34cc78fd0ef4 100644
--- a/arch/powerpc/include/asm/scatterlist.h
+++ b/arch/powerpc/include/asm/scatterlist.h
@@ -9,38 +9,12 @@
9 * 2 of the License, or (at your option) any later version. 9 * 2 of the License, or (at your option) any later version.
10 */ 10 */
11 11
12#ifdef __KERNEL__
13#include <linux/types.h>
14#include <asm/dma.h> 12#include <asm/dma.h>
15 13#include <asm-generic/scatterlist.h>
16struct scatterlist {
17#ifdef CONFIG_DEBUG_SG
18 unsigned long sg_magic;
19#endif
20 unsigned long page_link;
21 unsigned int offset;
22 unsigned int length;
23
24 /* For TCE or SWIOTLB support */
25 dma_addr_t dma_address;
26 u32 dma_length;
27};
28
29/*
30 * These macros should be used after a dma_map_sg call has been done
31 * to get bus addresses of each of the SG entries and their lengths.
32 * You should only work with the number of sg entries pci_map_sg
33 * returns, or alternatively stop on the first sg_dma_len(sg) which
34 * is 0.
35 */
36#define sg_dma_address(sg) ((sg)->dma_address)
37#define sg_dma_len(sg) ((sg)->dma_length)
38 14
39#ifdef __powerpc64__ 15#ifdef __powerpc64__
40#define ISA_DMA_THRESHOLD (~0UL) 16#define ISA_DMA_THRESHOLD (~0UL)
41#endif 17#endif
42
43#define ARCH_HAS_SG_CHAIN 18#define ARCH_HAS_SG_CHAIN
44 19
45#endif /* __KERNEL__ */
46#endif /* _ASM_POWERPC_SCATTERLIST_H */ 20#endif /* _ASM_POWERPC_SCATTERLIST_H */
diff --git a/arch/powerpc/include/asm/sfp-machine.h b/arch/powerpc/include/asm/sfp-machine.h
index 8b8fab91ad1e..3a7a67a0d006 100644
--- a/arch/powerpc/include/asm/sfp-machine.h
+++ b/arch/powerpc/include/asm/sfp-machine.h
@@ -353,6 +353,12 @@
353#define abort() \ 353#define abort() \
354 return 0 354 return 0
355 355
356#ifdef __BIG_ENDIAN
357#define __BYTE_ORDER __BIG_ENDIAN
358#else
359#define __BYTE_ORDER __LITTLE_ENDIAN
360#endif
361
356/* Exception flags. */ 362/* Exception flags. */
357#define EFLAG_INVALID (1 << (31 - 2)) 363#define EFLAG_INVALID (1 << (31 - 2))
358#define EFLAG_OVERFLOW (1 << (31 - 3)) 364#define EFLAG_OVERFLOW (1 << (31 - 3))
diff --git a/arch/powerpc/kernel/dma-swiotlb.c b/arch/powerpc/kernel/dma-swiotlb.c
index 4ff4da2c238b..e7fe218b8697 100644
--- a/arch/powerpc/kernel/dma-swiotlb.c
+++ b/arch/powerpc/kernel/dma-swiotlb.c
@@ -39,8 +39,8 @@ struct dma_map_ops swiotlb_dma_ops = {
39 .dma_supported = swiotlb_dma_supported, 39 .dma_supported = swiotlb_dma_supported,
40 .map_page = swiotlb_map_page, 40 .map_page = swiotlb_map_page,
41 .unmap_page = swiotlb_unmap_page, 41 .unmap_page = swiotlb_unmap_page,
42 .sync_single_range_for_cpu = swiotlb_sync_single_range_for_cpu, 42 .sync_single_for_cpu = swiotlb_sync_single_for_cpu,
43 .sync_single_range_for_device = swiotlb_sync_single_range_for_device, 43 .sync_single_for_device = swiotlb_sync_single_for_device,
44 .sync_sg_for_cpu = swiotlb_sync_sg_for_cpu, 44 .sync_sg_for_cpu = swiotlb_sync_sg_for_cpu,
45 .sync_sg_for_device = swiotlb_sync_sg_for_device, 45 .sync_sg_for_device = swiotlb_sync_sg_for_device,
46 .mapping_error = swiotlb_dma_mapping_error, 46 .mapping_error = swiotlb_dma_mapping_error,
diff --git a/arch/powerpc/kernel/dma.c b/arch/powerpc/kernel/dma.c
index 6c1df5757cd6..8d1de6f31d5a 100644
--- a/arch/powerpc/kernel/dma.c
+++ b/arch/powerpc/kernel/dma.c
@@ -127,11 +127,11 @@ static inline void dma_direct_sync_sg(struct device *dev,
127 __dma_sync_page(sg_page(sg), sg->offset, sg->length, direction); 127 __dma_sync_page(sg_page(sg), sg->offset, sg->length, direction);
128} 128}
129 129
130static inline void dma_direct_sync_single_range(struct device *dev, 130static inline void dma_direct_sync_single(struct device *dev,
131 dma_addr_t dma_handle, unsigned long offset, size_t size, 131 dma_addr_t dma_handle, size_t size,
132 enum dma_data_direction direction) 132 enum dma_data_direction direction)
133{ 133{
134 __dma_sync(bus_to_virt(dma_handle+offset), size, direction); 134 __dma_sync(bus_to_virt(dma_handle), size, direction);
135} 135}
136#endif 136#endif
137 137
@@ -144,8 +144,8 @@ struct dma_map_ops dma_direct_ops = {
144 .map_page = dma_direct_map_page, 144 .map_page = dma_direct_map_page,
145 .unmap_page = dma_direct_unmap_page, 145 .unmap_page = dma_direct_unmap_page,
146#ifdef CONFIG_NOT_COHERENT_CACHE 146#ifdef CONFIG_NOT_COHERENT_CACHE
147 .sync_single_range_for_cpu = dma_direct_sync_single_range, 147 .sync_single_for_cpu = dma_direct_sync_single,
148 .sync_single_range_for_device = dma_direct_sync_single_range, 148 .sync_single_for_device = dma_direct_sync_single,
149 .sync_sg_for_cpu = dma_direct_sync_sg, 149 .sync_sg_for_cpu = dma_direct_sync_sg,
150 .sync_sg_for_device = dma_direct_sync_sg, 150 .sync_sg_for_device = dma_direct_sync_sg,
151#endif 151#endif
diff --git a/arch/powerpc/platforms/cell/spufs/file.c b/arch/powerpc/platforms/cell/spufs/file.c
index 5c2808252516..1a40da92154c 100644
--- a/arch/powerpc/platforms/cell/spufs/file.c
+++ b/arch/powerpc/platforms/cell/spufs/file.c
@@ -1849,8 +1849,7 @@ out:
1849 return ret; 1849 return ret;
1850} 1850}
1851 1851
1852static int spufs_mfc_fsync(struct file *file, struct dentry *dentry, 1852static int spufs_mfc_fsync(struct file *file, int datasync)
1853 int datasync)
1854{ 1853{
1855 return spufs_mfc_flush(file, NULL); 1854 return spufs_mfc_flush(file, NULL);
1856} 1855}
diff --git a/arch/powerpc/platforms/cell/spufs/inode.c b/arch/powerpc/platforms/cell/spufs/inode.c
index fc1b1c42b1dc..e5e5f823d687 100644
--- a/arch/powerpc/platforms/cell/spufs/inode.c
+++ b/arch/powerpc/platforms/cell/spufs/inode.c
@@ -251,7 +251,7 @@ const struct file_operations spufs_context_fops = {
251 .llseek = dcache_dir_lseek, 251 .llseek = dcache_dir_lseek,
252 .read = generic_read_dir, 252 .read = generic_read_dir,
253 .readdir = dcache_readdir, 253 .readdir = dcache_readdir,
254 .fsync = simple_sync_file, 254 .fsync = noop_fsync,
255}; 255};
256EXPORT_SYMBOL_GPL(spufs_context_fops); 256EXPORT_SYMBOL_GPL(spufs_context_fops);
257 257
diff --git a/arch/powerpc/platforms/pseries/hvCall_inst.c b/arch/powerpc/platforms/pseries/hvCall_inst.c
index 1fefae76e295..e19ff021e711 100644
--- a/arch/powerpc/platforms/pseries/hvCall_inst.c
+++ b/arch/powerpc/platforms/pseries/hvCall_inst.c
@@ -102,7 +102,7 @@ static const struct file_operations hcall_inst_seq_fops = {
102#define CPU_NAME_BUF_SIZE 32 102#define CPU_NAME_BUF_SIZE 32
103 103
104 104
105static void probe_hcall_entry(unsigned long opcode, unsigned long *args) 105static void probe_hcall_entry(void *ignored, unsigned long opcode, unsigned long *args)
106{ 106{
107 struct hcall_stats *h; 107 struct hcall_stats *h;
108 108
@@ -114,7 +114,7 @@ static void probe_hcall_entry(unsigned long opcode, unsigned long *args)
114 h->purr_start = mfspr(SPRN_PURR); 114 h->purr_start = mfspr(SPRN_PURR);
115} 115}
116 116
117static void probe_hcall_exit(unsigned long opcode, unsigned long retval, 117static void probe_hcall_exit(void *ignored, unsigned long opcode, unsigned long retval,
118 unsigned long *retbuf) 118 unsigned long *retbuf)
119{ 119{
120 struct hcall_stats *h; 120 struct hcall_stats *h;
@@ -140,11 +140,11 @@ static int __init hcall_inst_init(void)
140 if (!firmware_has_feature(FW_FEATURE_LPAR)) 140 if (!firmware_has_feature(FW_FEATURE_LPAR))
141 return 0; 141 return 0;
142 142
143 if (register_trace_hcall_entry(probe_hcall_entry)) 143 if (register_trace_hcall_entry(probe_hcall_entry, NULL))
144 return -EINVAL; 144 return -EINVAL;
145 145
146 if (register_trace_hcall_exit(probe_hcall_exit)) { 146 if (register_trace_hcall_exit(probe_hcall_exit, NULL)) {
147 unregister_trace_hcall_entry(probe_hcall_entry); 147 unregister_trace_hcall_entry(probe_hcall_entry, NULL);
148 return -EINVAL; 148 return -EINVAL;
149 } 149 }
150 150
diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c
index 6a1fde0d22b0..cd37e49e7034 100644
--- a/arch/powerpc/sysdev/fsl_rio.c
+++ b/arch/powerpc/sysdev/fsl_rio.c
@@ -1,6 +1,15 @@
1/* 1/*
2 * Freescale MPC85xx/MPC86xx RapidIO support 2 * Freescale MPC85xx/MPC86xx RapidIO support
3 * 3 *
4 * Copyright 2009 Sysgo AG
5 * Thomas Moll <thomas.moll@sysgo.com>
6 * - fixed maintenance access routines, check for aligned access
7 *
8 * Copyright 2009 Integrated Device Technology, Inc.
9 * Alex Bounine <alexandre.bounine@idt.com>
10 * - Added Port-Write message handling
11 * - Added Machine Check exception handling
12 *
4 * Copyright (C) 2007, 2008 Freescale Semiconductor, Inc. 13 * Copyright (C) 2007, 2008 Freescale Semiconductor, Inc.
5 * Zhang Wei <wei.zhang@freescale.com> 14 * Zhang Wei <wei.zhang@freescale.com>
6 * 15 *
@@ -24,19 +33,30 @@
24#include <linux/of_platform.h> 33#include <linux/of_platform.h>
25#include <linux/delay.h> 34#include <linux/delay.h>
26#include <linux/slab.h> 35#include <linux/slab.h>
36#include <linux/kfifo.h>
27 37
28#include <asm/io.h> 38#include <asm/io.h>
39#include <asm/machdep.h>
40#include <asm/uaccess.h>
41
42#undef DEBUG_PW /* Port-Write debugging */
29 43
30/* RapidIO definition irq, which read from OF-tree */ 44/* RapidIO definition irq, which read from OF-tree */
31#define IRQ_RIO_BELL(m) (((struct rio_priv *)(m->priv))->bellirq) 45#define IRQ_RIO_BELL(m) (((struct rio_priv *)(m->priv))->bellirq)
32#define IRQ_RIO_TX(m) (((struct rio_priv *)(m->priv))->txirq) 46#define IRQ_RIO_TX(m) (((struct rio_priv *)(m->priv))->txirq)
33#define IRQ_RIO_RX(m) (((struct rio_priv *)(m->priv))->rxirq) 47#define IRQ_RIO_RX(m) (((struct rio_priv *)(m->priv))->rxirq)
48#define IRQ_RIO_PW(m) (((struct rio_priv *)(m->priv))->pwirq)
34 49
35#define RIO_ATMU_REGS_OFFSET 0x10c00 50#define RIO_ATMU_REGS_OFFSET 0x10c00
36#define RIO_P_MSG_REGS_OFFSET 0x11000 51#define RIO_P_MSG_REGS_OFFSET 0x11000
37#define RIO_S_MSG_REGS_OFFSET 0x13000 52#define RIO_S_MSG_REGS_OFFSET 0x13000
38#define RIO_ESCSR 0x158 53#define RIO_ESCSR 0x158
39#define RIO_CCSR 0x15c 54#define RIO_CCSR 0x15c
55#define RIO_LTLEDCSR 0x0608
56#define RIO_LTLEDCSR_IER 0x80000000
57#define RIO_LTLEDCSR_PRT 0x01000000
58#define RIO_LTLEECSR 0x060c
59#define RIO_EPWISR 0x10010
40#define RIO_ISR_AACR 0x10120 60#define RIO_ISR_AACR 0x10120
41#define RIO_ISR_AACR_AA 0x1 /* Accept All ID */ 61#define RIO_ISR_AACR_AA 0x1 /* Accept All ID */
42#define RIO_MAINT_WIN_SIZE 0x400000 62#define RIO_MAINT_WIN_SIZE 0x400000
@@ -55,6 +75,18 @@
55#define RIO_MSG_ISR_QFI 0x00000010 75#define RIO_MSG_ISR_QFI 0x00000010
56#define RIO_MSG_ISR_DIQI 0x00000001 76#define RIO_MSG_ISR_DIQI 0x00000001
57 77
78#define RIO_IPWMR_SEN 0x00100000
79#define RIO_IPWMR_QFIE 0x00000100
80#define RIO_IPWMR_EIE 0x00000020
81#define RIO_IPWMR_CQ 0x00000002
82#define RIO_IPWMR_PWE 0x00000001
83
84#define RIO_IPWSR_QF 0x00100000
85#define RIO_IPWSR_TE 0x00000080
86#define RIO_IPWSR_QFI 0x00000010
87#define RIO_IPWSR_PWD 0x00000008
88#define RIO_IPWSR_PWB 0x00000004
89
58#define RIO_MSG_DESC_SIZE 32 90#define RIO_MSG_DESC_SIZE 32
59#define RIO_MSG_BUFFER_SIZE 4096 91#define RIO_MSG_BUFFER_SIZE 4096
60#define RIO_MIN_TX_RING_SIZE 2 92#define RIO_MIN_TX_RING_SIZE 2
@@ -121,7 +153,7 @@ struct rio_msg_regs {
121 u32 pad10[26]; 153 u32 pad10[26];
122 u32 pwmr; 154 u32 pwmr;
123 u32 pwsr; 155 u32 pwsr;
124 u32 pad11; 156 u32 epwqbar;
125 u32 pwqbar; 157 u32 pwqbar;
126}; 158};
127 159
@@ -160,6 +192,14 @@ struct rio_msg_rx_ring {
160 void *dev_id; 192 void *dev_id;
161}; 193};
162 194
195struct rio_port_write_msg {
196 void *virt;
197 dma_addr_t phys;
198 u32 msg_count;
199 u32 err_count;
200 u32 discard_count;
201};
202
163struct rio_priv { 203struct rio_priv {
164 struct device *dev; 204 struct device *dev;
165 void __iomem *regs_win; 205 void __iomem *regs_win;
@@ -172,11 +212,64 @@ struct rio_priv {
172 struct rio_dbell_ring dbell_ring; 212 struct rio_dbell_ring dbell_ring;
173 struct rio_msg_tx_ring msg_tx_ring; 213 struct rio_msg_tx_ring msg_tx_ring;
174 struct rio_msg_rx_ring msg_rx_ring; 214 struct rio_msg_rx_ring msg_rx_ring;
215 struct rio_port_write_msg port_write_msg;
175 int bellirq; 216 int bellirq;
176 int txirq; 217 int txirq;
177 int rxirq; 218 int rxirq;
219 int pwirq;
220 struct work_struct pw_work;
221 struct kfifo pw_fifo;
222 spinlock_t pw_fifo_lock;
178}; 223};
179 224
225#define __fsl_read_rio_config(x, addr, err, op) \
226 __asm__ __volatile__( \
227 "1: "op" %1,0(%2)\n" \
228 " eieio\n" \
229 "2:\n" \
230 ".section .fixup,\"ax\"\n" \
231 "3: li %1,-1\n" \
232 " li %0,%3\n" \
233 " b 2b\n" \
234 ".section __ex_table,\"a\"\n" \
235 " .align 2\n" \
236 " .long 1b,3b\n" \
237 ".text" \
238 : "=r" (err), "=r" (x) \
239 : "b" (addr), "i" (-EFAULT), "0" (err))
240
241static void __iomem *rio_regs_win;
242
243static int (*saved_mcheck_exception)(struct pt_regs *regs);
244
245static int fsl_rio_mcheck_exception(struct pt_regs *regs)
246{
247 const struct exception_table_entry *entry = NULL;
248 unsigned long reason = (mfspr(SPRN_MCSR) & MCSR_MASK);
249
250 if (reason & MCSR_BUS_RBERR) {
251 reason = in_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR));
252 if (reason & (RIO_LTLEDCSR_IER | RIO_LTLEDCSR_PRT)) {
253 /* Check if we are prepared to handle this fault */
254 entry = search_exception_tables(regs->nip);
255 if (entry) {
256 pr_debug("RIO: %s - MC Exception handled\n",
257 __func__);
258 out_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR),
259 0);
260 regs->msr |= MSR_RI;
261 regs->nip = entry->fixup;
262 return 1;
263 }
264 }
265 }
266
267 if (saved_mcheck_exception)
268 return saved_mcheck_exception(regs);
269 else
270 return cur_cpu_spec->machine_check(regs);
271}
272
180/** 273/**
181 * fsl_rio_doorbell_send - Send a MPC85xx doorbell message 274 * fsl_rio_doorbell_send - Send a MPC85xx doorbell message
182 * @mport: RapidIO master port info 275 * @mport: RapidIO master port info
@@ -277,27 +370,44 @@ fsl_rio_config_read(struct rio_mport *mport, int index, u16 destid,
277{ 370{
278 struct rio_priv *priv = mport->priv; 371 struct rio_priv *priv = mport->priv;
279 u8 *data; 372 u8 *data;
373 u32 rval, err = 0;
280 374
281 pr_debug 375 pr_debug
282 ("fsl_rio_config_read: index %d destid %d hopcount %d offset %8.8x len %d\n", 376 ("fsl_rio_config_read: index %d destid %d hopcount %d offset %8.8x len %d\n",
283 index, destid, hopcount, offset, len); 377 index, destid, hopcount, offset, len);
378
379 /* 16MB maintenance window possible */
380 /* allow only aligned access to maintenance registers */
381 if (offset > (0x1000000 - len) || !IS_ALIGNED(offset, len))
382 return -EINVAL;
383
284 out_be32(&priv->maint_atmu_regs->rowtar, 384 out_be32(&priv->maint_atmu_regs->rowtar,
285 (destid << 22) | (hopcount << 12) | ((offset & ~0x3) >> 9)); 385 (destid << 22) | (hopcount << 12) | (offset >> 12));
386 out_be32(&priv->maint_atmu_regs->rowtear, (destid >> 10));
286 387
287 data = (u8 *) priv->maint_win + offset; 388 data = (u8 *) priv->maint_win + (offset & (RIO_MAINT_WIN_SIZE - 1));
288 switch (len) { 389 switch (len) {
289 case 1: 390 case 1:
290 *val = in_8((u8 *) data); 391 __fsl_read_rio_config(rval, data, err, "lbz");
291 break; 392 break;
292 case 2: 393 case 2:
293 *val = in_be16((u16 *) data); 394 __fsl_read_rio_config(rval, data, err, "lhz");
294 break; 395 break;
295 default: 396 case 4:
296 *val = in_be32((u32 *) data); 397 __fsl_read_rio_config(rval, data, err, "lwz");
297 break; 398 break;
399 default:
400 return -EINVAL;
298 } 401 }
299 402
300 return 0; 403 if (err) {
404 pr_debug("RIO: cfg_read error %d for %x:%x:%x\n",
405 err, destid, hopcount, offset);
406 }
407
408 *val = rval;
409
410 return err;
301} 411}
302 412
303/** 413/**
@@ -322,10 +432,17 @@ fsl_rio_config_write(struct rio_mport *mport, int index, u16 destid,
322 pr_debug 432 pr_debug
323 ("fsl_rio_config_write: index %d destid %d hopcount %d offset %8.8x len %d val %8.8x\n", 433 ("fsl_rio_config_write: index %d destid %d hopcount %d offset %8.8x len %d val %8.8x\n",
324 index, destid, hopcount, offset, len, val); 434 index, destid, hopcount, offset, len, val);
435
436 /* 16MB maintenance windows possible */
437 /* allow only aligned access to maintenance registers */
438 if (offset > (0x1000000 - len) || !IS_ALIGNED(offset, len))
439 return -EINVAL;
440
325 out_be32(&priv->maint_atmu_regs->rowtar, 441 out_be32(&priv->maint_atmu_regs->rowtar,
326 (destid << 22) | (hopcount << 12) | ((offset & ~0x3) >> 9)); 442 (destid << 22) | (hopcount << 12) | (offset >> 12));
443 out_be32(&priv->maint_atmu_regs->rowtear, (destid >> 10));
327 444
328 data = (u8 *) priv->maint_win + offset; 445 data = (u8 *) priv->maint_win + (offset & (RIO_MAINT_WIN_SIZE - 1));
329 switch (len) { 446 switch (len) {
330 case 1: 447 case 1:
331 out_8((u8 *) data, val); 448 out_8((u8 *) data, val);
@@ -333,9 +450,11 @@ fsl_rio_config_write(struct rio_mport *mport, int index, u16 destid,
333 case 2: 450 case 2:
334 out_be16((u16 *) data, val); 451 out_be16((u16 *) data, val);
335 break; 452 break;
336 default: 453 case 4:
337 out_be32((u32 *) data, val); 454 out_be32((u32 *) data, val);
338 break; 455 break;
456 default:
457 return -EINVAL;
339 } 458 }
340 459
341 return 0; 460 return 0;
@@ -930,6 +1049,223 @@ static int fsl_rio_doorbell_init(struct rio_mport *mport)
930 return rc; 1049 return rc;
931} 1050}
932 1051
1052/**
1053 * fsl_rio_port_write_handler - MPC85xx port write interrupt handler
1054 * @irq: Linux interrupt number
1055 * @dev_instance: Pointer to interrupt-specific data
1056 *
1057 * Handles port write interrupts. Parses a list of registered
1058 * port write event handlers and executes a matching event handler.
1059 */
1060static irqreturn_t
1061fsl_rio_port_write_handler(int irq, void *dev_instance)
1062{
1063 u32 ipwmr, ipwsr;
1064 struct rio_mport *port = (struct rio_mport *)dev_instance;
1065 struct rio_priv *priv = port->priv;
1066 u32 epwisr, tmp;
1067
1068 ipwmr = in_be32(&priv->msg_regs->pwmr);
1069 ipwsr = in_be32(&priv->msg_regs->pwsr);
1070
1071 epwisr = in_be32(priv->regs_win + RIO_EPWISR);
1072 if (epwisr & 0x80000000) {
1073 tmp = in_be32(priv->regs_win + RIO_LTLEDCSR);
1074 pr_info("RIO_LTLEDCSR = 0x%x\n", tmp);
1075 out_be32(priv->regs_win + RIO_LTLEDCSR, 0);
1076 }
1077
1078 if (!(epwisr & 0x00000001))
1079 return IRQ_HANDLED;
1080
1081#ifdef DEBUG_PW
1082 pr_debug("PW Int->IPWMR: 0x%08x IPWSR: 0x%08x (", ipwmr, ipwsr);
1083 if (ipwsr & RIO_IPWSR_QF)
1084 pr_debug(" QF");
1085 if (ipwsr & RIO_IPWSR_TE)
1086 pr_debug(" TE");
1087 if (ipwsr & RIO_IPWSR_QFI)
1088 pr_debug(" QFI");
1089 if (ipwsr & RIO_IPWSR_PWD)
1090 pr_debug(" PWD");
1091 if (ipwsr & RIO_IPWSR_PWB)
1092 pr_debug(" PWB");
1093 pr_debug(" )\n");
1094#endif
1095 out_be32(&priv->msg_regs->pwsr,
1096 ipwsr & (RIO_IPWSR_TE | RIO_IPWSR_QFI | RIO_IPWSR_PWD));
1097
1098 if ((ipwmr & RIO_IPWMR_EIE) && (ipwsr & RIO_IPWSR_TE)) {
1099 priv->port_write_msg.err_count++;
1100 pr_info("RIO: Port-Write Transaction Err (%d)\n",
1101 priv->port_write_msg.err_count);
1102 }
1103 if (ipwsr & RIO_IPWSR_PWD) {
1104 priv->port_write_msg.discard_count++;
1105 pr_info("RIO: Port Discarded Port-Write Msg(s) (%d)\n",
1106 priv->port_write_msg.discard_count);
1107 }
1108
1109 /* Schedule deferred processing if PW was received */
1110 if (ipwsr & RIO_IPWSR_QFI) {
1111 /* Save PW message (if there is room in FIFO),
1112 * otherwise discard it.
1113 */
1114 if (kfifo_avail(&priv->pw_fifo) >= RIO_PW_MSG_SIZE) {
1115 priv->port_write_msg.msg_count++;
1116 kfifo_in(&priv->pw_fifo, priv->port_write_msg.virt,
1117 RIO_PW_MSG_SIZE);
1118 } else {
1119 priv->port_write_msg.discard_count++;
1120 pr_info("RIO: ISR Discarded Port-Write Msg(s) (%d)\n",
1121 priv->port_write_msg.discard_count);
1122 }
1123 schedule_work(&priv->pw_work);
1124 }
1125
1126 /* Issue Clear Queue command. This allows another
1127 * port-write to be received.
1128 */
1129 out_be32(&priv->msg_regs->pwmr, ipwmr | RIO_IPWMR_CQ);
1130
1131 return IRQ_HANDLED;
1132}
1133
1134static void fsl_pw_dpc(struct work_struct *work)
1135{
1136 struct rio_priv *priv = container_of(work, struct rio_priv, pw_work);
1137 unsigned long flags;
1138 u32 msg_buffer[RIO_PW_MSG_SIZE/sizeof(u32)];
1139
1140 /*
1141 * Process port-write messages
1142 */
1143 spin_lock_irqsave(&priv->pw_fifo_lock, flags);
1144 while (kfifo_out(&priv->pw_fifo, (unsigned char *)msg_buffer,
1145 RIO_PW_MSG_SIZE)) {
1146 /* Process one message */
1147 spin_unlock_irqrestore(&priv->pw_fifo_lock, flags);
1148#ifdef DEBUG_PW
1149 {
1150 u32 i;
1151 pr_debug("%s : Port-Write Message:", __func__);
1152 for (i = 0; i < RIO_PW_MSG_SIZE/sizeof(u32); i++) {
1153 if ((i%4) == 0)
1154 pr_debug("\n0x%02x: 0x%08x", i*4,
1155 msg_buffer[i]);
1156 else
1157 pr_debug(" 0x%08x", msg_buffer[i]);
1158 }
1159 pr_debug("\n");
1160 }
1161#endif
1162 /* Pass the port-write message to RIO core for processing */
1163 rio_inb_pwrite_handler((union rio_pw_msg *)msg_buffer);
1164 spin_lock_irqsave(&priv->pw_fifo_lock, flags);
1165 }
1166 spin_unlock_irqrestore(&priv->pw_fifo_lock, flags);
1167}
1168
1169/**
1170 * fsl_rio_pw_enable - enable/disable port-write interface init
1171 * @mport: Master port implementing the port write unit
1172 * @enable: 1=enable; 0=disable port-write message handling
1173 */
1174static int fsl_rio_pw_enable(struct rio_mport *mport, int enable)
1175{
1176 struct rio_priv *priv = mport->priv;
1177 u32 rval;
1178
1179 rval = in_be32(&priv->msg_regs->pwmr);
1180
1181 if (enable)
1182 rval |= RIO_IPWMR_PWE;
1183 else
1184 rval &= ~RIO_IPWMR_PWE;
1185
1186 out_be32(&priv->msg_regs->pwmr, rval);
1187
1188 return 0;
1189}
1190
1191/**
1192 * fsl_rio_port_write_init - MPC85xx port write interface init
1193 * @mport: Master port implementing the port write unit
1194 *
1195 * Initializes port write unit hardware and DMA buffer
1196 * ring. Called from fsl_rio_setup(). Returns %0 on success
1197 * or %-ENOMEM on failure.
1198 */
1199static int fsl_rio_port_write_init(struct rio_mport *mport)
1200{
1201 struct rio_priv *priv = mport->priv;
1202 int rc = 0;
1203
1204 /* Following configurations require a disabled port write controller */
1205 out_be32(&priv->msg_regs->pwmr,
1206 in_be32(&priv->msg_regs->pwmr) & ~RIO_IPWMR_PWE);
1207
1208 /* Initialize port write */
1209 priv->port_write_msg.virt = dma_alloc_coherent(priv->dev,
1210 RIO_PW_MSG_SIZE,
1211 &priv->port_write_msg.phys, GFP_KERNEL);
1212 if (!priv->port_write_msg.virt) {
1213 pr_err("RIO: unable allocate port write queue\n");
1214 return -ENOMEM;
1215 }
1216
1217 priv->port_write_msg.err_count = 0;
1218 priv->port_write_msg.discard_count = 0;
1219
1220 /* Point dequeue/enqueue pointers at first entry */
1221 out_be32(&priv->msg_regs->epwqbar, 0);
1222 out_be32(&priv->msg_regs->pwqbar, (u32) priv->port_write_msg.phys);
1223
1224 pr_debug("EIPWQBAR: 0x%08x IPWQBAR: 0x%08x\n",
1225 in_be32(&priv->msg_regs->epwqbar),
1226 in_be32(&priv->msg_regs->pwqbar));
1227
1228 /* Clear interrupt status IPWSR */
1229 out_be32(&priv->msg_regs->pwsr,
1230 (RIO_IPWSR_TE | RIO_IPWSR_QFI | RIO_IPWSR_PWD));
1231
1232 /* Configure port write contoller for snooping enable all reporting,
1233 clear queue full */
1234 out_be32(&priv->msg_regs->pwmr,
1235 RIO_IPWMR_SEN | RIO_IPWMR_QFIE | RIO_IPWMR_EIE | RIO_IPWMR_CQ);
1236
1237
1238 /* Hook up port-write handler */
1239 rc = request_irq(IRQ_RIO_PW(mport), fsl_rio_port_write_handler, 0,
1240 "port-write", (void *)mport);
1241 if (rc < 0) {
1242 pr_err("MPC85xx RIO: unable to request inbound doorbell irq");
1243 goto err_out;
1244 }
1245
1246 INIT_WORK(&priv->pw_work, fsl_pw_dpc);
1247 spin_lock_init(&priv->pw_fifo_lock);
1248 if (kfifo_alloc(&priv->pw_fifo, RIO_PW_MSG_SIZE * 32, GFP_KERNEL)) {
1249 pr_err("FIFO allocation failed\n");
1250 rc = -ENOMEM;
1251 goto err_out_irq;
1252 }
1253
1254 pr_debug("IPWMR: 0x%08x IPWSR: 0x%08x\n",
1255 in_be32(&priv->msg_regs->pwmr),
1256 in_be32(&priv->msg_regs->pwsr));
1257
1258 return rc;
1259
1260err_out_irq:
1261 free_irq(IRQ_RIO_PW(mport), (void *)mport);
1262err_out:
1263 dma_free_coherent(priv->dev, RIO_PW_MSG_SIZE,
1264 priv->port_write_msg.virt,
1265 priv->port_write_msg.phys);
1266 return rc;
1267}
1268
933static char *cmdline = NULL; 1269static char *cmdline = NULL;
934 1270
935static int fsl_rio_get_hdid(int index) 1271static int fsl_rio_get_hdid(int index)
@@ -1057,7 +1393,7 @@ int fsl_rio_setup(struct of_device *dev)
1057 dev_info(&dev->dev, "LAW start 0x%016llx, size 0x%016llx.\n", 1393 dev_info(&dev->dev, "LAW start 0x%016llx, size 0x%016llx.\n",
1058 law_start, law_size); 1394 law_start, law_size);
1059 1395
1060 ops = kmalloc(sizeof(struct rio_ops), GFP_KERNEL); 1396 ops = kzalloc(sizeof(struct rio_ops), GFP_KERNEL);
1061 if (!ops) { 1397 if (!ops) {
1062 rc = -ENOMEM; 1398 rc = -ENOMEM;
1063 goto err_ops; 1399 goto err_ops;
@@ -1067,6 +1403,7 @@ int fsl_rio_setup(struct of_device *dev)
1067 ops->cread = fsl_rio_config_read; 1403 ops->cread = fsl_rio_config_read;
1068 ops->cwrite = fsl_rio_config_write; 1404 ops->cwrite = fsl_rio_config_write;
1069 ops->dsend = fsl_rio_doorbell_send; 1405 ops->dsend = fsl_rio_doorbell_send;
1406 ops->pwenable = fsl_rio_pw_enable;
1070 1407
1071 port = kzalloc(sizeof(struct rio_mport), GFP_KERNEL); 1408 port = kzalloc(sizeof(struct rio_mport), GFP_KERNEL);
1072 if (!port) { 1409 if (!port) {
@@ -1089,11 +1426,12 @@ int fsl_rio_setup(struct of_device *dev)
1089 port->iores.flags = IORESOURCE_MEM; 1426 port->iores.flags = IORESOURCE_MEM;
1090 port->iores.name = "rio_io_win"; 1427 port->iores.name = "rio_io_win";
1091 1428
1429 priv->pwirq = irq_of_parse_and_map(dev->node, 0);
1092 priv->bellirq = irq_of_parse_and_map(dev->dev.of_node, 2); 1430 priv->bellirq = irq_of_parse_and_map(dev->dev.of_node, 2);
1093 priv->txirq = irq_of_parse_and_map(dev->dev.of_node, 3); 1431 priv->txirq = irq_of_parse_and_map(dev->dev.of_node, 3);
1094 priv->rxirq = irq_of_parse_and_map(dev->dev.of_node, 4); 1432 priv->rxirq = irq_of_parse_and_map(dev->dev.of_node, 4);
1095 dev_info(&dev->dev, "bellirq: %d, txirq: %d, rxirq %d\n", priv->bellirq, 1433 dev_info(&dev->dev, "pwirq: %d, bellirq: %d, txirq: %d, rxirq %d\n",
1096 priv->txirq, priv->rxirq); 1434 priv->pwirq, priv->bellirq, priv->txirq, priv->rxirq);
1097 1435
1098 rio_init_dbell_res(&port->riores[RIO_DOORBELL_RESOURCE], 0, 0xffff); 1436 rio_init_dbell_res(&port->riores[RIO_DOORBELL_RESOURCE], 0, 0xffff);
1099 rio_init_mbox_res(&port->riores[RIO_INB_MBOX_RESOURCE], 0, 0); 1437 rio_init_mbox_res(&port->riores[RIO_INB_MBOX_RESOURCE], 0, 0);
@@ -1109,6 +1447,7 @@ int fsl_rio_setup(struct of_device *dev)
1109 rio_register_mport(port); 1447 rio_register_mport(port);
1110 1448
1111 priv->regs_win = ioremap(regs.start, regs.end - regs.start + 1); 1449 priv->regs_win = ioremap(regs.start, regs.end - regs.start + 1);
1450 rio_regs_win = priv->regs_win;
1112 1451
1113 /* Probe the master port phy type */ 1452 /* Probe the master port phy type */
1114 ccsr = in_be32(priv->regs_win + RIO_CCSR); 1453 ccsr = in_be32(priv->regs_win + RIO_CCSR);
@@ -1166,7 +1505,8 @@ int fsl_rio_setup(struct of_device *dev)
1166 1505
1167 /* Configure maintenance transaction window */ 1506 /* Configure maintenance transaction window */
1168 out_be32(&priv->maint_atmu_regs->rowbar, law_start >> 12); 1507 out_be32(&priv->maint_atmu_regs->rowbar, law_start >> 12);
1169 out_be32(&priv->maint_atmu_regs->rowar, 0x80077015); /* 4M */ 1508 out_be32(&priv->maint_atmu_regs->rowar,
1509 0x80077000 | (ilog2(RIO_MAINT_WIN_SIZE) - 1));
1170 1510
1171 priv->maint_win = ioremap(law_start, RIO_MAINT_WIN_SIZE); 1511 priv->maint_win = ioremap(law_start, RIO_MAINT_WIN_SIZE);
1172 1512
@@ -1175,6 +1515,12 @@ int fsl_rio_setup(struct of_device *dev)
1175 (law_start + RIO_MAINT_WIN_SIZE) >> 12); 1515 (law_start + RIO_MAINT_WIN_SIZE) >> 12);
1176 out_be32(&priv->dbell_atmu_regs->rowar, 0x8004200b); /* 4k */ 1516 out_be32(&priv->dbell_atmu_regs->rowar, 0x8004200b); /* 4k */
1177 fsl_rio_doorbell_init(port); 1517 fsl_rio_doorbell_init(port);
1518 fsl_rio_port_write_init(port);
1519
1520 saved_mcheck_exception = ppc_md.machine_check_exception;
1521 ppc_md.machine_check_exception = fsl_rio_mcheck_exception;
1522 /* Ensure that RFXE is set */
1523 mtspr(SPRN_HID1, (mfspr(SPRN_HID1) | 0x20000));
1178 1524
1179 return 0; 1525 return 0;
1180err: 1526err:
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index 79d0ca086820..bee1c0f794cf 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -102,6 +102,7 @@ config S390
102 select HAVE_KERNEL_GZIP 102 select HAVE_KERNEL_GZIP
103 select HAVE_KERNEL_BZIP2 103 select HAVE_KERNEL_BZIP2
104 select HAVE_KERNEL_LZMA 104 select HAVE_KERNEL_LZMA
105 select HAVE_KERNEL_LZO
105 select ARCH_INLINE_SPIN_TRYLOCK 106 select ARCH_INLINE_SPIN_TRYLOCK
106 select ARCH_INLINE_SPIN_TRYLOCK_BH 107 select ARCH_INLINE_SPIN_TRYLOCK_BH
107 select ARCH_INLINE_SPIN_LOCK 108 select ARCH_INLINE_SPIN_LOCK
@@ -479,13 +480,6 @@ config CMM
479 Everybody who wants to run Linux under VM should select this 480 Everybody who wants to run Linux under VM should select this
480 option. 481 option.
481 482
482config CMM_PROC
483 bool "/proc interface to cooperative memory management"
484 depends on CMM
485 help
486 Select this option to enable the /proc interface to the
487 cooperative memory management.
488
489config CMM_IUCV 483config CMM_IUCV
490 bool "IUCV special message interface to cooperative memory management" 484 bool "IUCV special message interface to cooperative memory management"
491 depends on CMM && (SMSGIUCV=y || CMM=SMSGIUCV) 485 depends on CMM && (SMSGIUCV=y || CMM=SMSGIUCV)
diff --git a/arch/s390/boot/compressed/Makefile b/arch/s390/boot/compressed/Makefile
index 6e4a67ad07e1..1c999f726a58 100644
--- a/arch/s390/boot/compressed/Makefile
+++ b/arch/s390/boot/compressed/Makefile
@@ -7,7 +7,7 @@
7BITS := $(if $(CONFIG_64BIT),64,31) 7BITS := $(if $(CONFIG_64BIT),64,31)
8 8
9targets := vmlinux.lds vmlinux vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 \ 9targets := vmlinux.lds vmlinux vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 \
10 vmlinux.bin.lzma misc.o piggy.o sizes.h head$(BITS).o 10 vmlinux.bin.lzma vmlinux.bin.lzo misc.o piggy.o sizes.h head$(BITS).o
11 11
12KBUILD_CFLAGS := -m$(BITS) -D__KERNEL__ $(LINUX_INCLUDE) -O2 12KBUILD_CFLAGS := -m$(BITS) -D__KERNEL__ $(LINUX_INCLUDE) -O2
13KBUILD_CFLAGS += $(cflags-y) 13KBUILD_CFLAGS += $(cflags-y)
@@ -47,6 +47,7 @@ vmlinux.bin.all-y := $(obj)/vmlinux.bin
47suffix-$(CONFIG_KERNEL_GZIP) := gz 47suffix-$(CONFIG_KERNEL_GZIP) := gz
48suffix-$(CONFIG_KERNEL_BZIP2) := bz2 48suffix-$(CONFIG_KERNEL_BZIP2) := bz2
49suffix-$(CONFIG_KERNEL_LZMA) := lzma 49suffix-$(CONFIG_KERNEL_LZMA) := lzma
50suffix-$(CONFIG_KERNEL_LZO) := lzo
50 51
51$(obj)/vmlinux.bin.gz: $(vmlinux.bin.all-y) 52$(obj)/vmlinux.bin.gz: $(vmlinux.bin.all-y)
52 $(call if_changed,gzip) 53 $(call if_changed,gzip)
@@ -54,6 +55,8 @@ $(obj)/vmlinux.bin.bz2: $(vmlinux.bin.all-y)
54 $(call if_changed,bzip2) 55 $(call if_changed,bzip2)
55$(obj)/vmlinux.bin.lzma: $(vmlinux.bin.all-y) 56$(obj)/vmlinux.bin.lzma: $(vmlinux.bin.all-y)
56 $(call if_changed,lzma) 57 $(call if_changed,lzma)
58$(obj)/vmlinux.bin.lzo: $(vmlinux.bin.all-y)
59 $(call if_changed,lzo)
57 60
58LDFLAGS_piggy.o := -r --format binary --oformat $(LD_BFD) -T 61LDFLAGS_piggy.o := -r --format binary --oformat $(LD_BFD) -T
59$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.$(suffix-y) 62$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.$(suffix-y)
diff --git a/arch/s390/boot/compressed/misc.c b/arch/s390/boot/compressed/misc.c
index 14e0479d3888..0851eb1e919e 100644
--- a/arch/s390/boot/compressed/misc.c
+++ b/arch/s390/boot/compressed/misc.c
@@ -50,6 +50,10 @@ static unsigned long free_mem_end_ptr;
50#include "../../../../lib/decompress_unlzma.c" 50#include "../../../../lib/decompress_unlzma.c"
51#endif 51#endif
52 52
53#ifdef CONFIG_KERNEL_LZO
54#include "../../../../lib/decompress_unlzo.c"
55#endif
56
53extern _sclp_print_early(const char *); 57extern _sclp_print_early(const char *);
54 58
55int puts(const char *s) 59int puts(const char *s)
diff --git a/arch/s390/include/asm/atomic.h b/arch/s390/include/asm/atomic.h
index 451bfbb9db3d..76daea117181 100644
--- a/arch/s390/include/asm/atomic.h
+++ b/arch/s390/include/asm/atomic.h
@@ -15,6 +15,7 @@
15 15
16#include <linux/compiler.h> 16#include <linux/compiler.h>
17#include <linux/types.h> 17#include <linux/types.h>
18#include <asm/system.h>
18 19
19#define ATOMIC_INIT(i) { (i) } 20#define ATOMIC_INIT(i) { (i) }
20 21
@@ -274,6 +275,7 @@ static inline void atomic64_clear_mask(unsigned long long mask, atomic64_t *v)
274static inline int atomic64_add_unless(atomic64_t *v, long long a, long long u) 275static inline int atomic64_add_unless(atomic64_t *v, long long a, long long u)
275{ 276{
276 long long c, old; 277 long long c, old;
278
277 c = atomic64_read(v); 279 c = atomic64_read(v);
278 for (;;) { 280 for (;;) {
279 if (unlikely(c == u)) 281 if (unlikely(c == u))
@@ -286,6 +288,23 @@ static inline int atomic64_add_unless(atomic64_t *v, long long a, long long u)
286 return c != u; 288 return c != u;
287} 289}
288 290
291static inline long long atomic64_dec_if_positive(atomic64_t *v)
292{
293 long long c, old, dec;
294
295 c = atomic64_read(v);
296 for (;;) {
297 dec = c - 1;
298 if (unlikely(dec < 0))
299 break;
300 old = atomic64_cmpxchg((v), c, dec);
301 if (likely(old == c))
302 break;
303 c = old;
304 }
305 return dec;
306}
307
289#define atomic64_add(_i, _v) atomic64_add_return(_i, _v) 308#define atomic64_add(_i, _v) atomic64_add_return(_i, _v)
290#define atomic64_add_negative(_i, _v) (atomic64_add_return(_i, _v) < 0) 309#define atomic64_add_negative(_i, _v) (atomic64_add_return(_i, _v) < 0)
291#define atomic64_inc(_v) atomic64_add_return(1, _v) 310#define atomic64_inc(_v) atomic64_add_return(1, _v)
diff --git a/arch/s390/include/asm/ccwdev.h b/arch/s390/include/asm/ccwdev.h
index f4bd346a52d3..1c0030f9b890 100644
--- a/arch/s390/include/asm/ccwdev.h
+++ b/arch/s390/include/asm/ccwdev.h
@@ -91,6 +91,14 @@ struct ccw_device {
91 void (*handler) (struct ccw_device *, unsigned long, struct irb *); 91 void (*handler) (struct ccw_device *, unsigned long, struct irb *);
92}; 92};
93 93
94/*
95 * Possible CIO actions triggered by the unit check handler.
96 */
97enum uc_todo {
98 UC_TODO_RETRY,
99 UC_TODO_RETRY_ON_NEW_PATH,
100 UC_TODO_STOP
101};
94 102
95/** 103/**
96 * struct ccw driver - device driver for channel attached devices 104 * struct ccw driver - device driver for channel attached devices
@@ -107,6 +115,7 @@ struct ccw_device {
107 * @freeze: callback for freezing during hibernation snapshotting 115 * @freeze: callback for freezing during hibernation snapshotting
108 * @thaw: undo work done in @freeze 116 * @thaw: undo work done in @freeze
109 * @restore: callback for restoring after hibernation 117 * @restore: callback for restoring after hibernation
118 * @uc_handler: callback for unit check handler
110 * @driver: embedded device driver structure 119 * @driver: embedded device driver structure
111 * @name: device driver name 120 * @name: device driver name
112 */ 121 */
@@ -124,6 +133,7 @@ struct ccw_driver {
124 int (*freeze)(struct ccw_device *); 133 int (*freeze)(struct ccw_device *);
125 int (*thaw) (struct ccw_device *); 134 int (*thaw) (struct ccw_device *);
126 int (*restore)(struct ccw_device *); 135 int (*restore)(struct ccw_device *);
136 enum uc_todo (*uc_handler) (struct ccw_device *, struct irb *);
127 struct device_driver driver; 137 struct device_driver driver;
128 char *name; 138 char *name;
129}; 139};
diff --git a/arch/s390/include/asm/scatterlist.h b/arch/s390/include/asm/scatterlist.h
index 35d786fe93ae..be44d94cba54 100644
--- a/arch/s390/include/asm/scatterlist.h
+++ b/arch/s390/include/asm/scatterlist.h
@@ -1 +1,3 @@
1#define ISA_DMA_THRESHOLD (~0UL)
2
1#include <asm-generic/scatterlist.h> 3#include <asm-generic/scatterlist.h>
diff --git a/arch/s390/include/asm/sfp-util.h b/arch/s390/include/asm/sfp-util.h
index 7d43fee17e32..0addc6466d95 100644
--- a/arch/s390/include/asm/sfp-util.h
+++ b/arch/s390/include/asm/sfp-util.h
@@ -73,3 +73,5 @@ extern unsigned long __udiv_qrnnd (unsigned int *, unsigned int,
73#define UDIV_NEEDS_NORMALIZATION 0 73#define UDIV_NEEDS_NORMALIZATION 0
74 74
75#define abort() return 0 75#define abort() return 0
76
77#define __BYTE_ORDER __BIG_ENDIAN
diff --git a/arch/s390/kernel/asm-offsets.c b/arch/s390/kernel/asm-offsets.c
index d9b490a2716e..5232278d79ad 100644
--- a/arch/s390/kernel/asm-offsets.c
+++ b/arch/s390/kernel/asm-offsets.c
@@ -132,8 +132,6 @@ int main(void)
132 DEFINE(__LC_MCCK_CLOCK, offsetof(struct _lowcore, mcck_clock)); 132 DEFINE(__LC_MCCK_CLOCK, offsetof(struct _lowcore, mcck_clock));
133 DEFINE(__LC_MACHINE_FLAGS, offsetof(struct _lowcore, machine_flags)); 133 DEFINE(__LC_MACHINE_FLAGS, offsetof(struct _lowcore, machine_flags));
134 DEFINE(__LC_FTRACE_FUNC, offsetof(struct _lowcore, ftrace_func)); 134 DEFINE(__LC_FTRACE_FUNC, offsetof(struct _lowcore, ftrace_func));
135 DEFINE(__LC_SIE_HOOK, offsetof(struct _lowcore, sie_hook));
136 DEFINE(__LC_CMF_HPP, offsetof(struct _lowcore, cmf_hpp));
137 DEFINE(__LC_IRB, offsetof(struct _lowcore, irb)); 135 DEFINE(__LC_IRB, offsetof(struct _lowcore, irb));
138 DEFINE(__LC_CPU_TIMER_SAVE_AREA, offsetof(struct _lowcore, cpu_timer_save_area)); 136 DEFINE(__LC_CPU_TIMER_SAVE_AREA, offsetof(struct _lowcore, cpu_timer_save_area));
139 DEFINE(__LC_CLOCK_COMP_SAVE_AREA, offsetof(struct _lowcore, clock_comp_save_area)); 137 DEFINE(__LC_CLOCK_COMP_SAVE_AREA, offsetof(struct _lowcore, clock_comp_save_area));
@@ -154,6 +152,8 @@ int main(void)
154 DEFINE(__LC_FP_CREG_SAVE_AREA, offsetof(struct _lowcore, fpt_creg_save_area)); 152 DEFINE(__LC_FP_CREG_SAVE_AREA, offsetof(struct _lowcore, fpt_creg_save_area));
155 DEFINE(__LC_LAST_BREAK, offsetof(struct _lowcore, breaking_event_addr)); 153 DEFINE(__LC_LAST_BREAK, offsetof(struct _lowcore, breaking_event_addr));
156 DEFINE(__LC_VDSO_PER_CPU, offsetof(struct _lowcore, vdso_per_cpu_data)); 154 DEFINE(__LC_VDSO_PER_CPU, offsetof(struct _lowcore, vdso_per_cpu_data));
155 DEFINE(__LC_SIE_HOOK, offsetof(struct _lowcore, sie_hook));
156 DEFINE(__LC_CMF_HPP, offsetof(struct _lowcore, cmf_hpp));
157#endif /* CONFIG_32BIT */ 157#endif /* CONFIG_32BIT */
158 return 0; 158 return 0;
159} 159}
diff --git a/arch/s390/kernel/entry64.S b/arch/s390/kernel/entry64.S
index 178d92536d90..e7192e1cb678 100644
--- a/arch/s390/kernel/entry64.S
+++ b/arch/s390/kernel/entry64.S
@@ -65,7 +65,7 @@ _TIF_SYSCALL = (_TIF_SYSCALL_TRACE>>8 | _TIF_SYSCALL_AUDIT>>8 | \
65 ltgr %r3,%r3 65 ltgr %r3,%r3
66 jz 0f 66 jz 0f
67 basr %r14,%r3 67 basr %r14,%r3
68 0: 680:
69#endif 69#endif
70 .endm 70 .endm
71 71
diff --git a/arch/s390/kernel/kprobes.c b/arch/s390/kernel/kprobes.c
index 3d34eef5a2c3..2a3d2bf6f083 100644
--- a/arch/s390/kernel/kprobes.c
+++ b/arch/s390/kernel/kprobes.c
@@ -63,6 +63,8 @@ int __kprobes is_prohibited_opcode(kprobe_opcode_t *instruction)
63 case 0x0b: /* bsm */ 63 case 0x0b: /* bsm */
64 case 0x83: /* diag */ 64 case 0x83: /* diag */
65 case 0x44: /* ex */ 65 case 0x44: /* ex */
66 case 0xac: /* stnsm */
67 case 0xad: /* stosm */
66 return -EINVAL; 68 return -EINVAL;
67 } 69 }
68 switch (*(__u16 *) instruction) { 70 switch (*(__u16 *) instruction) {
@@ -72,6 +74,7 @@ int __kprobes is_prohibited_opcode(kprobe_opcode_t *instruction)
72 case 0xb258: /* bsg */ 74 case 0xb258: /* bsg */
73 case 0xb218: /* pc */ 75 case 0xb218: /* pc */
74 case 0xb228: /* pt */ 76 case 0xb228: /* pt */
77 case 0xb98d: /* epsw */
75 return -EINVAL; 78 return -EINVAL;
76 } 79 }
77 return 0; 80 return 0;
diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c
index 7d893248d265..c8e8e1354e1d 100644
--- a/arch/s390/kernel/setup.c
+++ b/arch/s390/kernel/setup.c
@@ -401,7 +401,6 @@ setup_lowcore(void)
401 lc->io_new_psw.mask = psw_kernel_bits; 401 lc->io_new_psw.mask = psw_kernel_bits;
402 lc->io_new_psw.addr = PSW_ADDR_AMODE | (unsigned long) io_int_handler; 402 lc->io_new_psw.addr = PSW_ADDR_AMODE | (unsigned long) io_int_handler;
403 lc->clock_comparator = -1ULL; 403 lc->clock_comparator = -1ULL;
404 lc->cmf_hpp = -1ULL;
405 lc->kernel_stack = ((unsigned long) &init_thread_union) + THREAD_SIZE; 404 lc->kernel_stack = ((unsigned long) &init_thread_union) + THREAD_SIZE;
406 lc->async_stack = (unsigned long) 405 lc->async_stack = (unsigned long)
407 __alloc_bootmem(ASYNC_SIZE, ASYNC_SIZE, 0) + ASYNC_SIZE; 406 __alloc_bootmem(ASYNC_SIZE, ASYNC_SIZE, 0) + ASYNC_SIZE;
@@ -418,6 +417,7 @@ setup_lowcore(void)
418 __ctl_set_bit(14, 29); 417 __ctl_set_bit(14, 29);
419 } 418 }
420#else 419#else
420 lc->cmf_hpp = -1ULL;
421 lc->vdso_per_cpu_data = (unsigned long) &lc->paste[0]; 421 lc->vdso_per_cpu_data = (unsigned long) &lc->paste[0];
422#endif 422#endif
423 lc->sync_enter_timer = S390_lowcore.sync_enter_timer; 423 lc->sync_enter_timer = S390_lowcore.sync_enter_timer;
diff --git a/arch/s390/kernel/smp.c b/arch/s390/kernel/smp.c
index e4d98de83dd8..541053ed234e 100644
--- a/arch/s390/kernel/smp.c
+++ b/arch/s390/kernel/smp.c
@@ -944,21 +944,21 @@ static int __cpuinit smp_cpu_notify(struct notifier_block *self,
944 struct cpu *c = &per_cpu(cpu_devices, cpu); 944 struct cpu *c = &per_cpu(cpu_devices, cpu);
945 struct sys_device *s = &c->sysdev; 945 struct sys_device *s = &c->sysdev;
946 struct s390_idle_data *idle; 946 struct s390_idle_data *idle;
947 int err = 0;
947 948
948 switch (action) { 949 switch (action) {
949 case CPU_ONLINE: 950 case CPU_ONLINE:
950 case CPU_ONLINE_FROZEN: 951 case CPU_ONLINE_FROZEN:
951 idle = &per_cpu(s390_idle, cpu); 952 idle = &per_cpu(s390_idle, cpu);
952 memset(idle, 0, sizeof(struct s390_idle_data)); 953 memset(idle, 0, sizeof(struct s390_idle_data));
953 if (sysfs_create_group(&s->kobj, &cpu_online_attr_group)) 954 err = sysfs_create_group(&s->kobj, &cpu_online_attr_group);
954 return NOTIFY_BAD;
955 break; 955 break;
956 case CPU_DEAD: 956 case CPU_DEAD:
957 case CPU_DEAD_FROZEN: 957 case CPU_DEAD_FROZEN:
958 sysfs_remove_group(&s->kobj, &cpu_online_attr_group); 958 sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
959 break; 959 break;
960 } 960 }
961 return NOTIFY_OK; 961 return notifier_from_errno(err);
962} 962}
963 963
964static struct notifier_block __cpuinitdata smp_cpu_nb = { 964static struct notifier_block __cpuinitdata smp_cpu_nb = {
diff --git a/arch/s390/kvm/Kconfig b/arch/s390/kvm/Kconfig
index 2f4b687cc7fa..a7251580891c 100644
--- a/arch/s390/kvm/Kconfig
+++ b/arch/s390/kvm/Kconfig
@@ -33,17 +33,6 @@ config KVM
33 33
34 If unsure, say N. 34 If unsure, say N.
35 35
36config KVM_AWARE_CMF
37 depends on KVM
38 bool "KVM aware sampling"
39 ---help---
40 This option enhances the sampling data from the CPU Measurement
41 Facility with additional information, that allows to distinguish
42 guest(s) and host when using the kernel based virtual machine
43 functionality.
44
45 If unsure, say N.
46
47# OK, it's a little counter-intuitive to do this, but it puts it neatly under 36# OK, it's a little counter-intuitive to do this, but it puts it neatly under
48# the virtualization menu. 37# the virtualization menu.
49source drivers/vhost/Kconfig 38source drivers/vhost/Kconfig
diff --git a/arch/s390/kvm/sie64a.S b/arch/s390/kvm/sie64a.S
index 31646bd0e469..7e9d30d567b0 100644
--- a/arch/s390/kvm/sie64a.S
+++ b/arch/s390/kvm/sie64a.S
@@ -32,12 +32,10 @@ SPI_PSW = STACK_FRAME_OVERHEAD + __PT_PSW
32 32
33 33
34 .macro SPP newpp 34 .macro SPP newpp
35#ifdef CONFIG_KVM_AWARE_CMF
36 tm __LC_MACHINE_FLAGS+6,0x20 # MACHINE_FLAG_SPP 35 tm __LC_MACHINE_FLAGS+6,0x20 # MACHINE_FLAG_SPP
37 jz 0f 36 jz 0f
38 .insn s,0xb2800000,\newpp 37 .insn s,0xb2800000,\newpp
39 0: 380:
40#endif
41 .endm 39 .endm
42 40
43sie_irq_handler: 41sie_irq_handler:
diff --git a/arch/s390/mm/cmm.c b/arch/s390/mm/cmm.c
index f87b34731e1d..eb6a2ef5f82e 100644
--- a/arch/s390/mm/cmm.c
+++ b/arch/s390/mm/cmm.c
@@ -1,11 +1,9 @@
1/* 1/*
2 * arch/s390/mm/cmm.c 2 * Collaborative memory management interface.
3 * 3 *
4 * S390 version 4 * Copyright IBM Corp 2003,2010
5 * Copyright (C) 2003 IBM Deutschland Entwicklung GmbH, IBM Corporation 5 * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>,
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
7 * 6 *
8 * Collaborative memory management interface.
9 */ 7 */
10 8
11#include <linux/errno.h> 9#include <linux/errno.h>
@@ -20,9 +18,9 @@
20#include <linux/kthread.h> 18#include <linux/kthread.h>
21#include <linux/oom.h> 19#include <linux/oom.h>
22#include <linux/suspend.h> 20#include <linux/suspend.h>
21#include <linux/uaccess.h>
23 22
24#include <asm/pgalloc.h> 23#include <asm/pgalloc.h>
25#include <asm/uaccess.h>
26#include <asm/diag.h> 24#include <asm/diag.h>
27 25
28static char *sender = "VMRMSVM"; 26static char *sender = "VMRMSVM";
@@ -53,14 +51,14 @@ static struct cmm_page_array *cmm_timed_page_list;
53static DEFINE_SPINLOCK(cmm_lock); 51static DEFINE_SPINLOCK(cmm_lock);
54 52
55static struct task_struct *cmm_thread_ptr; 53static struct task_struct *cmm_thread_ptr;
56static wait_queue_head_t cmm_thread_wait; 54static DECLARE_WAIT_QUEUE_HEAD(cmm_thread_wait);
57static struct timer_list cmm_timer; 55static DEFINE_TIMER(cmm_timer, NULL, 0, 0);
58 56
59static void cmm_timer_fn(unsigned long); 57static void cmm_timer_fn(unsigned long);
60static void cmm_set_timer(void); 58static void cmm_set_timer(void);
61 59
62static long 60static long cmm_alloc_pages(long nr, long *counter,
63cmm_alloc_pages(long nr, long *counter, struct cmm_page_array **list) 61 struct cmm_page_array **list)
64{ 62{
65 struct cmm_page_array *pa, *npa; 63 struct cmm_page_array *pa, *npa;
66 unsigned long addr; 64 unsigned long addr;
@@ -99,8 +97,7 @@ cmm_alloc_pages(long nr, long *counter, struct cmm_page_array **list)
99 return nr; 97 return nr;
100} 98}
101 99
102static long 100static long cmm_free_pages(long nr, long *counter, struct cmm_page_array **list)
103cmm_free_pages(long nr, long *counter, struct cmm_page_array **list)
104{ 101{
105 struct cmm_page_array *pa; 102 struct cmm_page_array *pa;
106 unsigned long addr; 103 unsigned long addr;
@@ -140,11 +137,10 @@ static int cmm_oom_notify(struct notifier_block *self,
140} 137}
141 138
142static struct notifier_block cmm_oom_nb = { 139static struct notifier_block cmm_oom_nb = {
143 .notifier_call = cmm_oom_notify 140 .notifier_call = cmm_oom_notify,
144}; 141};
145 142
146static int 143static int cmm_thread(void *dummy)
147cmm_thread(void *dummy)
148{ 144{
149 int rc; 145 int rc;
150 146
@@ -170,7 +166,7 @@ cmm_thread(void *dummy)
170 cmm_timed_pages_target = cmm_timed_pages; 166 cmm_timed_pages_target = cmm_timed_pages;
171 } else if (cmm_timed_pages_target < cmm_timed_pages) { 167 } else if (cmm_timed_pages_target < cmm_timed_pages) {
172 cmm_free_pages(1, &cmm_timed_pages, 168 cmm_free_pages(1, &cmm_timed_pages,
173 &cmm_timed_page_list); 169 &cmm_timed_page_list);
174 } 170 }
175 if (cmm_timed_pages > 0 && !timer_pending(&cmm_timer)) 171 if (cmm_timed_pages > 0 && !timer_pending(&cmm_timer))
176 cmm_set_timer(); 172 cmm_set_timer();
@@ -178,14 +174,12 @@ cmm_thread(void *dummy)
178 return 0; 174 return 0;
179} 175}
180 176
181static void 177static void cmm_kick_thread(void)
182cmm_kick_thread(void)
183{ 178{
184 wake_up(&cmm_thread_wait); 179 wake_up(&cmm_thread_wait);
185} 180}
186 181
187static void 182static void cmm_set_timer(void)
188cmm_set_timer(void)
189{ 183{
190 if (cmm_timed_pages_target <= 0 || cmm_timeout_seconds <= 0) { 184 if (cmm_timed_pages_target <= 0 || cmm_timeout_seconds <= 0) {
191 if (timer_pending(&cmm_timer)) 185 if (timer_pending(&cmm_timer))
@@ -202,8 +196,7 @@ cmm_set_timer(void)
202 add_timer(&cmm_timer); 196 add_timer(&cmm_timer);
203} 197}
204 198
205static void 199static void cmm_timer_fn(unsigned long ignored)
206cmm_timer_fn(unsigned long ignored)
207{ 200{
208 long nr; 201 long nr;
209 202
@@ -216,57 +209,49 @@ cmm_timer_fn(unsigned long ignored)
216 cmm_set_timer(); 209 cmm_set_timer();
217} 210}
218 211
219void 212static void cmm_set_pages(long nr)
220cmm_set_pages(long nr)
221{ 213{
222 cmm_pages_target = nr; 214 cmm_pages_target = nr;
223 cmm_kick_thread(); 215 cmm_kick_thread();
224} 216}
225 217
226long 218static long cmm_get_pages(void)
227cmm_get_pages(void)
228{ 219{
229 return cmm_pages; 220 return cmm_pages;
230} 221}
231 222
232void 223static void cmm_add_timed_pages(long nr)
233cmm_add_timed_pages(long nr)
234{ 224{
235 cmm_timed_pages_target += nr; 225 cmm_timed_pages_target += nr;
236 cmm_kick_thread(); 226 cmm_kick_thread();
237} 227}
238 228
239long 229static long cmm_get_timed_pages(void)
240cmm_get_timed_pages(void)
241{ 230{
242 return cmm_timed_pages; 231 return cmm_timed_pages;
243} 232}
244 233
245void 234static void cmm_set_timeout(long nr, long seconds)
246cmm_set_timeout(long nr, long seconds)
247{ 235{
248 cmm_timeout_pages = nr; 236 cmm_timeout_pages = nr;
249 cmm_timeout_seconds = seconds; 237 cmm_timeout_seconds = seconds;
250 cmm_set_timer(); 238 cmm_set_timer();
251} 239}
252 240
253static int 241static int cmm_skip_blanks(char *cp, char **endp)
254cmm_skip_blanks(char *cp, char **endp)
255{ 242{
256 char *str; 243 char *str;
257 244
258 for (str = cp; *str == ' ' || *str == '\t'; str++); 245 for (str = cp; *str == ' ' || *str == '\t'; str++)
246 ;
259 *endp = str; 247 *endp = str;
260 return str != cp; 248 return str != cp;
261} 249}
262 250
263#ifdef CONFIG_CMM_PROC
264
265static struct ctl_table cmm_table[]; 251static struct ctl_table cmm_table[];
266 252
267static int 253static int cmm_pages_handler(ctl_table *ctl, int write, void __user *buffer,
268cmm_pages_handler(ctl_table *ctl, int write, 254 size_t *lenp, loff_t *ppos)
269 void __user *buffer, size_t *lenp, loff_t *ppos)
270{ 255{
271 char buf[16], *p; 256 char buf[16], *p;
272 long nr; 257 long nr;
@@ -305,9 +290,8 @@ cmm_pages_handler(ctl_table *ctl, int write,
305 return 0; 290 return 0;
306} 291}
307 292
308static int 293static int cmm_timeout_handler(ctl_table *ctl, int write, void __user *buffer,
309cmm_timeout_handler(ctl_table *ctl, int write, 294 size_t *lenp, loff_t *ppos)
310 void __user *buffer, size_t *lenp, loff_t *ppos)
311{ 295{
312 char buf[64], *p; 296 char buf[64], *p;
313 long nr, seconds; 297 long nr, seconds;
@@ -370,12 +354,10 @@ static struct ctl_table cmm_dir_table[] = {
370 }, 354 },
371 { } 355 { }
372}; 356};
373#endif
374 357
375#ifdef CONFIG_CMM_IUCV 358#ifdef CONFIG_CMM_IUCV
376#define SMSG_PREFIX "CMM" 359#define SMSG_PREFIX "CMM"
377static void 360static void cmm_smsg_target(const char *from, char *msg)
378cmm_smsg_target(const char *from, char *msg)
379{ 361{
380 long nr, seconds; 362 long nr, seconds;
381 363
@@ -445,16 +427,13 @@ static struct notifier_block cmm_power_notifier = {
445 .notifier_call = cmm_power_event, 427 .notifier_call = cmm_power_event,
446}; 428};
447 429
448static int 430static int cmm_init(void)
449cmm_init (void)
450{ 431{
451 int rc = -ENOMEM; 432 int rc = -ENOMEM;
452 433
453#ifdef CONFIG_CMM_PROC
454 cmm_sysctl_header = register_sysctl_table(cmm_dir_table); 434 cmm_sysctl_header = register_sysctl_table(cmm_dir_table);
455 if (!cmm_sysctl_header) 435 if (!cmm_sysctl_header)
456 goto out_sysctl; 436 goto out_sysctl;
457#endif
458#ifdef CONFIG_CMM_IUCV 437#ifdef CONFIG_CMM_IUCV
459 rc = smsg_register_callback(SMSG_PREFIX, cmm_smsg_target); 438 rc = smsg_register_callback(SMSG_PREFIX, cmm_smsg_target);
460 if (rc < 0) 439 if (rc < 0)
@@ -466,8 +445,6 @@ cmm_init (void)
466 rc = register_pm_notifier(&cmm_power_notifier); 445 rc = register_pm_notifier(&cmm_power_notifier);
467 if (rc) 446 if (rc)
468 goto out_pm; 447 goto out_pm;
469 init_waitqueue_head(&cmm_thread_wait);
470 init_timer(&cmm_timer);
471 cmm_thread_ptr = kthread_run(cmm_thread, NULL, "cmmthread"); 448 cmm_thread_ptr = kthread_run(cmm_thread, NULL, "cmmthread");
472 rc = IS_ERR(cmm_thread_ptr) ? PTR_ERR(cmm_thread_ptr) : 0; 449 rc = IS_ERR(cmm_thread_ptr) ? PTR_ERR(cmm_thread_ptr) : 0;
473 if (rc) 450 if (rc)
@@ -483,36 +460,26 @@ out_oom_notify:
483 smsg_unregister_callback(SMSG_PREFIX, cmm_smsg_target); 460 smsg_unregister_callback(SMSG_PREFIX, cmm_smsg_target);
484out_smsg: 461out_smsg:
485#endif 462#endif
486#ifdef CONFIG_CMM_PROC
487 unregister_sysctl_table(cmm_sysctl_header); 463 unregister_sysctl_table(cmm_sysctl_header);
488out_sysctl: 464out_sysctl:
489#endif 465 del_timer_sync(&cmm_timer);
490 return rc; 466 return rc;
491} 467}
468module_init(cmm_init);
492 469
493static void 470static void cmm_exit(void)
494cmm_exit(void)
495{ 471{
496 kthread_stop(cmm_thread_ptr);
497 unregister_pm_notifier(&cmm_power_notifier);
498 unregister_oom_notifier(&cmm_oom_nb);
499 cmm_free_pages(cmm_pages, &cmm_pages, &cmm_page_list);
500 cmm_free_pages(cmm_timed_pages, &cmm_timed_pages, &cmm_timed_page_list);
501#ifdef CONFIG_CMM_PROC
502 unregister_sysctl_table(cmm_sysctl_header); 472 unregister_sysctl_table(cmm_sysctl_header);
503#endif
504#ifdef CONFIG_CMM_IUCV 473#ifdef CONFIG_CMM_IUCV
505 smsg_unregister_callback(SMSG_PREFIX, cmm_smsg_target); 474 smsg_unregister_callback(SMSG_PREFIX, cmm_smsg_target);
506#endif 475#endif
476 unregister_pm_notifier(&cmm_power_notifier);
477 unregister_oom_notifier(&cmm_oom_nb);
478 kthread_stop(cmm_thread_ptr);
479 del_timer_sync(&cmm_timer);
480 cmm_free_pages(cmm_pages, &cmm_pages, &cmm_page_list);
481 cmm_free_pages(cmm_timed_pages, &cmm_timed_pages, &cmm_timed_page_list);
507} 482}
508
509module_init(cmm_init);
510module_exit(cmm_exit); 483module_exit(cmm_exit);
511 484
512EXPORT_SYMBOL(cmm_set_pages);
513EXPORT_SYMBOL(cmm_get_pages);
514EXPORT_SYMBOL(cmm_add_timed_pages);
515EXPORT_SYMBOL(cmm_get_timed_pages);
516EXPORT_SYMBOL(cmm_set_timeout);
517
518MODULE_LICENSE("GPL"); 485MODULE_LICENSE("GPL");
diff --git a/arch/score/include/asm/scatterlist.h b/arch/score/include/asm/scatterlist.h
index 9f533b8362c7..4fa1a6658215 100644
--- a/arch/score/include/asm/scatterlist.h
+++ b/arch/score/include/asm/scatterlist.h
@@ -1,6 +1,8 @@
1#ifndef _ASM_SCORE_SCATTERLIST_H 1#ifndef _ASM_SCORE_SCATTERLIST_H
2#define _ASM_SCORE_SCATTERLIST_H 2#define _ASM_SCORE_SCATTERLIST_H
3 3
4#define ISA_DMA_THRESHOLD (~0UL)
5
4#include <asm-generic/scatterlist.h> 6#include <asm-generic/scatterlist.h>
5 7
6#endif /* _ASM_SCORE_SCATTERLIST_H */ 8#endif /* _ASM_SCORE_SCATTERLIST_H */
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 0e318c905eea..c5ee4ce60b57 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -186,6 +186,9 @@ config DMA_NONCOHERENT
186config NEED_DMA_MAP_STATE 186config NEED_DMA_MAP_STATE
187 def_bool DMA_NONCOHERENT 187 def_bool DMA_NONCOHERENT
188 188
189config NEED_SG_DMA_LENGTH
190 def_bool y
191
189source "init/Kconfig" 192source "init/Kconfig"
190 193
191source "kernel/Kconfig.freezer" 194source "kernel/Kconfig.freezer"
diff --git a/arch/sh/kernel/ptrace_32.c b/arch/sh/kernel/ptrace_32.c
index d4104ce9fe53..6c4bbba2a675 100644
--- a/arch/sh/kernel/ptrace_32.c
+++ b/arch/sh/kernel/ptrace_32.c
@@ -436,29 +436,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
436 0, sizeof(struct pt_dspregs), 436 0, sizeof(struct pt_dspregs),
437 (const void __user *)data); 437 (const void __user *)data);
438#endif 438#endif
439#ifdef CONFIG_BINFMT_ELF_FDPIC
440 case PTRACE_GETFDPIC: {
441 unsigned long tmp = 0;
442
443 switch (addr) {
444 case PTRACE_GETFDPIC_EXEC:
445 tmp = child->mm->context.exec_fdpic_loadmap;
446 break;
447 case PTRACE_GETFDPIC_INTERP:
448 tmp = child->mm->context.interp_fdpic_loadmap;
449 break;
450 default:
451 break;
452 }
453
454 ret = 0;
455 if (put_user(tmp, datap)) {
456 ret = -EFAULT;
457 break;
458 }
459 break;
460 }
461#endif
462 default: 439 default:
463 ret = ptrace_request(child, request, addr, data); 440 ret = ptrace_request(child, request, addr, data);
464 break; 441 break;
diff --git a/arch/sh/math-emu/sfp-util.h b/arch/sh/math-emu/sfp-util.h
index e8526021892f..8ae1bd310ad0 100644
--- a/arch/sh/math-emu/sfp-util.h
+++ b/arch/sh/math-emu/sfp-util.h
@@ -66,3 +66,7 @@
66 } while (0) 66 } while (0)
67 67
68#define abort() return 0 68#define abort() return 0
69
70#define __BYTE_ORDER __LITTLE_ENDIAN
71
72
diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig
index d6781ce687e2..6f1470baa314 100644
--- a/arch/sparc/Kconfig
+++ b/arch/sparc/Kconfig
@@ -133,6 +133,9 @@ config ZONE_DMA
133config NEED_DMA_MAP_STATE 133config NEED_DMA_MAP_STATE
134 def_bool y 134 def_bool y
135 135
136config NEED_SG_DMA_LENGTH
137 def_bool y
138
136config GENERIC_ISA_DMA 139config GENERIC_ISA_DMA
137 bool 140 bool
138 default y if SPARC32 141 default y if SPARC32
diff --git a/arch/sparc/include/asm/scatterlist.h b/arch/sparc/include/asm/scatterlist.h
index d1120257b033..433e45f05fd4 100644
--- a/arch/sparc/include/asm/scatterlist.h
+++ b/arch/sparc/include/asm/scatterlist.h
@@ -1,8 +1,9 @@
1#ifndef _SPARC_SCATTERLIST_H 1#ifndef _SPARC_SCATTERLIST_H
2#define _SPARC_SCATTERLIST_H 2#define _SPARC_SCATTERLIST_H
3 3
4#define sg_dma_len(sg) ((sg)->dma_length)
5
6#include <asm-generic/scatterlist.h> 4#include <asm-generic/scatterlist.h>
7 5
6#define ISA_DMA_THRESHOLD (~0UL)
7#define ARCH_HAS_SG_CHAIN
8
8#endif /* !(_SPARC_SCATTERLIST_H) */ 9#endif /* !(_SPARC_SCATTERLIST_H) */
diff --git a/arch/sparc/kernel/perf_event.c b/arch/sparc/kernel/perf_event.c
index 34ce49f80eac..0ec92c8861dd 100644
--- a/arch/sparc/kernel/perf_event.c
+++ b/arch/sparc/kernel/perf_event.c
@@ -92,6 +92,8 @@ struct cpu_hw_events {
92 92
93 /* Enabled/disable state. */ 93 /* Enabled/disable state. */
94 int enabled; 94 int enabled;
95
96 unsigned int group_flag;
95}; 97};
96DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events) = { .enabled = 1, }; 98DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events) = { .enabled = 1, };
97 99
@@ -981,53 +983,6 @@ static int collect_events(struct perf_event *group, int max_count,
981 return n; 983 return n;
982} 984}
983 985
984static void event_sched_in(struct perf_event *event)
985{
986 event->state = PERF_EVENT_STATE_ACTIVE;
987 event->oncpu = smp_processor_id();
988 event->tstamp_running += event->ctx->time - event->tstamp_stopped;
989 if (is_software_event(event))
990 event->pmu->enable(event);
991}
992
993int hw_perf_group_sched_in(struct perf_event *group_leader,
994 struct perf_cpu_context *cpuctx,
995 struct perf_event_context *ctx)
996{
997 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
998 struct perf_event *sub;
999 int n0, n;
1000
1001 if (!sparc_pmu)
1002 return 0;
1003
1004 n0 = cpuc->n_events;
1005 n = collect_events(group_leader, perf_max_events - n0,
1006 &cpuc->event[n0], &cpuc->events[n0],
1007 &cpuc->current_idx[n0]);
1008 if (n < 0)
1009 return -EAGAIN;
1010 if (check_excludes(cpuc->event, n0, n))
1011 return -EINVAL;
1012 if (sparc_check_constraints(cpuc->event, cpuc->events, n + n0))
1013 return -EAGAIN;
1014 cpuc->n_events = n0 + n;
1015 cpuc->n_added += n;
1016
1017 cpuctx->active_oncpu += n;
1018 n = 1;
1019 event_sched_in(group_leader);
1020 list_for_each_entry(sub, &group_leader->sibling_list, group_entry) {
1021 if (sub->state != PERF_EVENT_STATE_OFF) {
1022 event_sched_in(sub);
1023 n++;
1024 }
1025 }
1026 ctx->nr_active += n;
1027
1028 return 1;
1029}
1030
1031static int sparc_pmu_enable(struct perf_event *event) 986static int sparc_pmu_enable(struct perf_event *event)
1032{ 987{
1033 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); 988 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
@@ -1045,11 +1000,20 @@ static int sparc_pmu_enable(struct perf_event *event)
1045 cpuc->events[n0] = event->hw.event_base; 1000 cpuc->events[n0] = event->hw.event_base;
1046 cpuc->current_idx[n0] = PIC_NO_INDEX; 1001 cpuc->current_idx[n0] = PIC_NO_INDEX;
1047 1002
1003 /*
1004 * If group events scheduling transaction was started,
1005 * skip the schedulability test here, it will be peformed
1006 * at commit time(->commit_txn) as a whole
1007 */
1008 if (cpuc->group_flag & PERF_EVENT_TXN_STARTED)
1009 goto nocheck;
1010
1048 if (check_excludes(cpuc->event, n0, 1)) 1011 if (check_excludes(cpuc->event, n0, 1))
1049 goto out; 1012 goto out;
1050 if (sparc_check_constraints(cpuc->event, cpuc->events, n0 + 1)) 1013 if (sparc_check_constraints(cpuc->event, cpuc->events, n0 + 1))
1051 goto out; 1014 goto out;
1052 1015
1016nocheck:
1053 cpuc->n_events++; 1017 cpuc->n_events++;
1054 cpuc->n_added++; 1018 cpuc->n_added++;
1055 1019
@@ -1129,11 +1093,61 @@ static int __hw_perf_event_init(struct perf_event *event)
1129 return 0; 1093 return 0;
1130} 1094}
1131 1095
1096/*
1097 * Start group events scheduling transaction
1098 * Set the flag to make pmu::enable() not perform the
1099 * schedulability test, it will be performed at commit time
1100 */
1101static void sparc_pmu_start_txn(const struct pmu *pmu)
1102{
1103 struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events);
1104
1105 cpuhw->group_flag |= PERF_EVENT_TXN_STARTED;
1106}
1107
1108/*
1109 * Stop group events scheduling transaction
1110 * Clear the flag and pmu::enable() will perform the
1111 * schedulability test.
1112 */
1113static void sparc_pmu_cancel_txn(const struct pmu *pmu)
1114{
1115 struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events);
1116
1117 cpuhw->group_flag &= ~PERF_EVENT_TXN_STARTED;
1118}
1119
1120/*
1121 * Commit group events scheduling transaction
1122 * Perform the group schedulability test as a whole
1123 * Return 0 if success
1124 */
1125static int sparc_pmu_commit_txn(const struct pmu *pmu)
1126{
1127 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
1128 int n;
1129
1130 if (!sparc_pmu)
1131 return -EINVAL;
1132
1133 cpuc = &__get_cpu_var(cpu_hw_events);
1134 n = cpuc->n_events;
1135 if (check_excludes(cpuc->event, 0, n))
1136 return -EINVAL;
1137 if (sparc_check_constraints(cpuc->event, cpuc->events, n))
1138 return -EAGAIN;
1139
1140 return 0;
1141}
1142
1132static const struct pmu pmu = { 1143static const struct pmu pmu = {
1133 .enable = sparc_pmu_enable, 1144 .enable = sparc_pmu_enable,
1134 .disable = sparc_pmu_disable, 1145 .disable = sparc_pmu_disable,
1135 .read = sparc_pmu_read, 1146 .read = sparc_pmu_read,
1136 .unthrottle = sparc_pmu_unthrottle, 1147 .unthrottle = sparc_pmu_unthrottle,
1148 .start_txn = sparc_pmu_start_txn,
1149 .cancel_txn = sparc_pmu_cancel_txn,
1150 .commit_txn = sparc_pmu_commit_txn,
1137}; 1151};
1138 1152
1139const struct pmu *hw_perf_event_init(struct perf_event *event) 1153const struct pmu *hw_perf_event_init(struct perf_event *event)
diff --git a/arch/sparc/math-emu/sfp-util_32.h b/arch/sparc/math-emu/sfp-util_32.h
index 0ea35afbb914..d1b2aff3c259 100644
--- a/arch/sparc/math-emu/sfp-util_32.h
+++ b/arch/sparc/math-emu/sfp-util_32.h
@@ -107,3 +107,9 @@
107 107
108#define abort() \ 108#define abort() \
109 return 0 109 return 0
110
111#ifdef __BIG_ENDIAN
112#define __BYTE_ORDER __BIG_ENDIAN
113#else
114#define __BYTE_ORDER __LITTLE_ENDIAN
115#endif
diff --git a/arch/sparc/math-emu/sfp-util_64.h b/arch/sparc/math-emu/sfp-util_64.h
index d17c9bc72181..425d3cf01af4 100644
--- a/arch/sparc/math-emu/sfp-util_64.h
+++ b/arch/sparc/math-emu/sfp-util_64.h
@@ -112,3 +112,9 @@
112 112
113#define abort() \ 113#define abort() \
114 return 0 114 return 0
115
116#ifdef __BIG_ENDIAN
117#define __BYTE_ORDER __BIG_ENDIAN
118#else
119#define __BYTE_ORDER __LITTLE_ENDIAN
120#endif
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index e0c619c55b4e..dcb0593b4a66 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -109,6 +109,9 @@ config SBUS
109config NEED_DMA_MAP_STATE 109config NEED_DMA_MAP_STATE
110 def_bool (X86_64 || DMAR || DMA_API_DEBUG) 110 def_bool (X86_64 || DMAR || DMA_API_DEBUG)
111 111
112config NEED_SG_DMA_LENGTH
113 def_bool y
114
112config GENERIC_ISA_DMA 115config GENERIC_ISA_DMA
113 def_bool y 116 def_bool y
114 117
@@ -1703,6 +1706,10 @@ config HAVE_ARCH_EARLY_PFN_TO_NID
1703 def_bool X86_64 1706 def_bool X86_64
1704 depends on NUMA 1707 depends on NUMA
1705 1708
1709config USE_PERCPU_NUMA_NODE_ID
1710 def_bool X86_64
1711 depends on NUMA
1712
1706menu "Power management and ACPI options" 1713menu "Power management and ACPI options"
1707 1714
1708config ARCH_HIBERNATION_HEADER 1715config ARCH_HIBERNATION_HEADER
diff --git a/arch/x86/boot/compressed/relocs.c b/arch/x86/boot/compressed/relocs.c
index 7b1aaa20c7b5..89bbf4e4d05d 100644
--- a/arch/x86/boot/compressed/relocs.c
+++ b/arch/x86/boot/compressed/relocs.c
@@ -195,11 +195,11 @@ static const char *sym_name(const char *sym_strtab, Elf32_Sym *sym)
195 195
196 196
197 197
198#if __BYTE_ORDER == __LITTLE_ENDIAN 198#if BYTE_ORDER == LITTLE_ENDIAN
199#define le16_to_cpu(val) (val) 199#define le16_to_cpu(val) (val)
200#define le32_to_cpu(val) (val) 200#define le32_to_cpu(val) (val)
201#endif 201#endif
202#if __BYTE_ORDER == __BIG_ENDIAN 202#if BYTE_ORDER == BIG_ENDIAN
203#define le16_to_cpu(val) bswap_16(val) 203#define le16_to_cpu(val) bswap_16(val)
204#define le32_to_cpu(val) bswap_32(val) 204#define le32_to_cpu(val) bswap_32(val)
205#endif 205#endif
diff --git a/arch/x86/include/asm/acpi.h b/arch/x86/include/asm/acpi.h
index 56f462cf22d2..aa2c39d968fc 100644
--- a/arch/x86/include/asm/acpi.h
+++ b/arch/x86/include/asm/acpi.h
@@ -85,7 +85,6 @@ extern int acpi_ioapic;
85extern int acpi_noirq; 85extern int acpi_noirq;
86extern int acpi_strict; 86extern int acpi_strict;
87extern int acpi_disabled; 87extern int acpi_disabled;
88extern int acpi_ht;
89extern int acpi_pci_disabled; 88extern int acpi_pci_disabled;
90extern int acpi_skip_timer_override; 89extern int acpi_skip_timer_override;
91extern int acpi_use_timer_override; 90extern int acpi_use_timer_override;
@@ -97,7 +96,6 @@ void acpi_pic_sci_set_trigger(unsigned int, u16);
97static inline void disable_acpi(void) 96static inline void disable_acpi(void)
98{ 97{
99 acpi_disabled = 1; 98 acpi_disabled = 1;
100 acpi_ht = 0;
101 acpi_pci_disabled = 1; 99 acpi_pci_disabled = 1;
102 acpi_noirq = 1; 100 acpi_noirq = 1;
103} 101}
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index dca9c545f44e..468145914389 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -332,6 +332,7 @@ static __always_inline __pure bool __static_cpu_has(u8 bit)
332#endif 332#endif
333} 333}
334 334
335#if __GNUC__ >= 4
335#define static_cpu_has(bit) \ 336#define static_cpu_has(bit) \
336( \ 337( \
337 __builtin_constant_p(boot_cpu_has(bit)) ? \ 338 __builtin_constant_p(boot_cpu_has(bit)) ? \
@@ -340,6 +341,12 @@ static __always_inline __pure bool __static_cpu_has(u8 bit)
340 __static_cpu_has(bit) : \ 341 __static_cpu_has(bit) : \
341 boot_cpu_has(bit) \ 342 boot_cpu_has(bit) \
342) 343)
344#else
345/*
346 * gcc 3.x is too stupid to do the static test; fall back to dynamic.
347 */
348#define static_cpu_has(bit) boot_cpu_has(bit)
349#endif
343 350
344#endif /* defined(__KERNEL__) && !defined(__ASSEMBLY__) */ 351#endif /* defined(__KERNEL__) && !defined(__ASSEMBLY__) */
345 352
diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
index 6c3fdd631ed3..f32a4301c4d4 100644
--- a/arch/x86/include/asm/mce.h
+++ b/arch/x86/include/asm/mce.h
@@ -225,5 +225,13 @@ extern void mcheck_intel_therm_init(void);
225static inline void mcheck_intel_therm_init(void) { } 225static inline void mcheck_intel_therm_init(void) { }
226#endif 226#endif
227 227
228/*
229 * Used by APEI to report memory error via /dev/mcelog
230 */
231
232struct cper_sec_mem_err;
233extern void apei_mce_report_mem_error(int corrected,
234 struct cper_sec_mem_err *mem_err);
235
228#endif /* __KERNEL__ */ 236#endif /* __KERNEL__ */
229#endif /* _ASM_X86_MCE_H */ 237#endif /* _ASM_X86_MCE_H */
diff --git a/arch/x86/include/asm/perf_event_p4.h b/arch/x86/include/asm/perf_event_p4.h
index b05400a542ff..64a8ebff06fc 100644
--- a/arch/x86/include/asm/perf_event_p4.h
+++ b/arch/x86/include/asm/perf_event_p4.h
@@ -89,7 +89,8 @@
89 P4_CCCR_ENABLE) 89 P4_CCCR_ENABLE)
90 90
91/* HT mask */ 91/* HT mask */
92#define P4_CCCR_MASK_HT (P4_CCCR_MASK | P4_CCCR_THREAD_ANY) 92#define P4_CCCR_MASK_HT \
93 (P4_CCCR_MASK | P4_CCCR_OVF_PMI_T1 | P4_CCCR_THREAD_ANY)
93 94
94#define P4_GEN_ESCR_EMASK(class, name, bit) \ 95#define P4_GEN_ESCR_EMASK(class, name, bit) \
95 class##__##name = ((1 << bit) << P4_ESCR_EVENTMASK_SHIFT) 96 class##__##name = ((1 << bit) << P4_ESCR_EVENTMASK_SHIFT)
diff --git a/arch/x86/include/asm/rdc321x_defs.h b/arch/x86/include/asm/rdc321x_defs.h
deleted file mode 100644
index c8e9c8bed3d0..000000000000
--- a/arch/x86/include/asm/rdc321x_defs.h
+++ /dev/null
@@ -1,12 +0,0 @@
1#define PFX "rdc321x: "
2
3/* General purpose configuration and data registers */
4#define RDC3210_CFGREG_ADDR 0x0CF8
5#define RDC3210_CFGREG_DATA 0x0CFC
6
7#define RDC321X_GPIO_CTRL_REG1 0x48
8#define RDC321X_GPIO_CTRL_REG2 0x84
9#define RDC321X_GPIO_DATA_REG1 0x4c
10#define RDC321X_GPIO_DATA_REG2 0x88
11
12#define RDC321X_MAX_GPIO 58
diff --git a/arch/x86/include/asm/scatterlist.h b/arch/x86/include/asm/scatterlist.h
index 75af592677ec..fb0b1874396f 100644
--- a/arch/x86/include/asm/scatterlist.h
+++ b/arch/x86/include/asm/scatterlist.h
@@ -1,8 +1,9 @@
1#ifndef _ASM_X86_SCATTERLIST_H 1#ifndef _ASM_X86_SCATTERLIST_H
2#define _ASM_X86_SCATTERLIST_H 2#define _ASM_X86_SCATTERLIST_H
3 3
4#define ISA_DMA_THRESHOLD (0x00ffffff)
5
6#include <asm-generic/scatterlist.h> 4#include <asm-generic/scatterlist.h>
7 5
6#define ISA_DMA_THRESHOLD (0x00ffffff)
7#define ARCH_HAS_SG_CHAIN
8
8#endif /* _ASM_X86_SCATTERLIST_H */ 9#endif /* _ASM_X86_SCATTERLIST_H */
diff --git a/arch/x86/include/asm/thread_info.h b/arch/x86/include/asm/thread_info.h
index 62ba9400cc43..f0b6e5dbc5a0 100644
--- a/arch/x86/include/asm/thread_info.h
+++ b/arch/x86/include/asm/thread_info.h
@@ -239,8 +239,8 @@ static inline struct thread_info *current_thread_info(void)
239#define TS_USEDFPU 0x0001 /* FPU was used by this task 239#define TS_USEDFPU 0x0001 /* FPU was used by this task
240 this quantum (SMP) */ 240 this quantum (SMP) */
241#define TS_COMPAT 0x0002 /* 32bit syscall active (64BIT)*/ 241#define TS_COMPAT 0x0002 /* 32bit syscall active (64BIT)*/
242#define TS_POLLING 0x0004 /* true if in idle loop 242#define TS_POLLING 0x0004 /* idle task polling need_resched,
243 and not sleeping */ 243 skip sending interrupt */
244#define TS_RESTORE_SIGMASK 0x0008 /* restore signal mask in do_signal() */ 244#define TS_RESTORE_SIGMASK 0x0008 /* restore signal mask in do_signal() */
245 245
246#define tsk_is_polling(t) (task_thread_info(t)->status & TS_POLLING) 246#define tsk_is_polling(t) (task_thread_info(t)->status & TS_POLLING)
diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h
index c5087d796587..21899cc31e52 100644
--- a/arch/x86/include/asm/topology.h
+++ b/arch/x86/include/asm/topology.h
@@ -53,33 +53,29 @@
53extern int cpu_to_node_map[]; 53extern int cpu_to_node_map[];
54 54
55/* Returns the number of the node containing CPU 'cpu' */ 55/* Returns the number of the node containing CPU 'cpu' */
56static inline int cpu_to_node(int cpu) 56static inline int __cpu_to_node(int cpu)
57{ 57{
58 return cpu_to_node_map[cpu]; 58 return cpu_to_node_map[cpu];
59} 59}
60#define early_cpu_to_node(cpu) cpu_to_node(cpu) 60#define early_cpu_to_node __cpu_to_node
61#define cpu_to_node __cpu_to_node
61 62
62#else /* CONFIG_X86_64 */ 63#else /* CONFIG_X86_64 */
63 64
64/* Mappings between logical cpu number and node number */ 65/* Mappings between logical cpu number and node number */
65DECLARE_EARLY_PER_CPU(int, x86_cpu_to_node_map); 66DECLARE_EARLY_PER_CPU(int, x86_cpu_to_node_map);
66 67
67/* Returns the number of the current Node. */
68DECLARE_PER_CPU(int, node_number);
69#define numa_node_id() percpu_read(node_number)
70
71#ifdef CONFIG_DEBUG_PER_CPU_MAPS 68#ifdef CONFIG_DEBUG_PER_CPU_MAPS
72extern int cpu_to_node(int cpu); 69/*
70 * override generic percpu implementation of cpu_to_node
71 */
72extern int __cpu_to_node(int cpu);
73#define cpu_to_node __cpu_to_node
74
73extern int early_cpu_to_node(int cpu); 75extern int early_cpu_to_node(int cpu);
74 76
75#else /* !CONFIG_DEBUG_PER_CPU_MAPS */ 77#else /* !CONFIG_DEBUG_PER_CPU_MAPS */
76 78
77/* Returns the number of the node containing CPU 'cpu' */
78static inline int cpu_to_node(int cpu)
79{
80 return per_cpu(x86_cpu_to_node_map, cpu);
81}
82
83/* Same function but used if called before per_cpu areas are setup */ 79/* Same function but used if called before per_cpu areas are setup */
84static inline int early_cpu_to_node(int cpu) 80static inline int early_cpu_to_node(int cpu)
85{ 81{
@@ -170,6 +166,10 @@ static inline int numa_node_id(void)
170{ 166{
171 return 0; 167 return 0;
172} 168}
169/*
170 * indicate override:
171 */
172#define numa_node_id numa_node_id
173 173
174static inline int early_cpu_to_node(int cpu) 174static inline int early_cpu_to_node(int cpu)
175{ 175{
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index 488be461a380..60cc4058ed5f 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -63,7 +63,6 @@ EXPORT_SYMBOL(acpi_disabled);
63int acpi_noirq; /* skip ACPI IRQ initialization */ 63int acpi_noirq; /* skip ACPI IRQ initialization */
64int acpi_pci_disabled; /* skip ACPI PCI scan and IRQ initialization */ 64int acpi_pci_disabled; /* skip ACPI PCI scan and IRQ initialization */
65EXPORT_SYMBOL(acpi_pci_disabled); 65EXPORT_SYMBOL(acpi_pci_disabled);
66int acpi_ht __initdata = 1; /* enable HT */
67 66
68int acpi_lapic; 67int acpi_lapic;
69int acpi_ioapic; 68int acpi_ioapic;
@@ -1501,9 +1500,8 @@ void __init acpi_boot_table_init(void)
1501 1500
1502 /* 1501 /*
1503 * If acpi_disabled, bail out 1502 * If acpi_disabled, bail out
1504 * One exception: acpi=ht continues far enough to enumerate LAPICs
1505 */ 1503 */
1506 if (acpi_disabled && !acpi_ht) 1504 if (acpi_disabled)
1507 return; 1505 return;
1508 1506
1509 /* 1507 /*
@@ -1534,9 +1532,8 @@ int __init early_acpi_boot_init(void)
1534{ 1532{
1535 /* 1533 /*
1536 * If acpi_disabled, bail out 1534 * If acpi_disabled, bail out
1537 * One exception: acpi=ht continues far enough to enumerate LAPICs
1538 */ 1535 */
1539 if (acpi_disabled && !acpi_ht) 1536 if (acpi_disabled)
1540 return 1; 1537 return 1;
1541 1538
1542 /* 1539 /*
@@ -1554,9 +1551,8 @@ int __init acpi_boot_init(void)
1554 1551
1555 /* 1552 /*
1556 * If acpi_disabled, bail out 1553 * If acpi_disabled, bail out
1557 * One exception: acpi=ht continues far enough to enumerate LAPICs
1558 */ 1554 */
1559 if (acpi_disabled && !acpi_ht) 1555 if (acpi_disabled)
1560 return 1; 1556 return 1;
1561 1557
1562 acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf); 1558 acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf);
@@ -1591,21 +1587,12 @@ static int __init parse_acpi(char *arg)
1591 /* acpi=force to over-ride black-list */ 1587 /* acpi=force to over-ride black-list */
1592 else if (strcmp(arg, "force") == 0) { 1588 else if (strcmp(arg, "force") == 0) {
1593 acpi_force = 1; 1589 acpi_force = 1;
1594 acpi_ht = 1;
1595 acpi_disabled = 0; 1590 acpi_disabled = 0;
1596 } 1591 }
1597 /* acpi=strict disables out-of-spec workarounds */ 1592 /* acpi=strict disables out-of-spec workarounds */
1598 else if (strcmp(arg, "strict") == 0) { 1593 else if (strcmp(arg, "strict") == 0) {
1599 acpi_strict = 1; 1594 acpi_strict = 1;
1600 } 1595 }
1601 /* Limit ACPI just to boot-time to enable HT */
1602 else if (strcmp(arg, "ht") == 0) {
1603 if (!acpi_force) {
1604 printk(KERN_WARNING "acpi=ht will be removed in Linux-2.6.35\n");
1605 disable_acpi();
1606 }
1607 acpi_ht = 1;
1608 }
1609 /* acpi=rsdt use RSDT instead of XSDT */ 1596 /* acpi=rsdt use RSDT instead of XSDT */
1610 else if (strcmp(arg, "rsdt") == 0) { 1597 else if (strcmp(arg, "rsdt") == 0) {
1611 acpi_rsdt_forced = 1; 1598 acpi_rsdt_forced = 1;
diff --git a/arch/x86/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep.c
index f9961034e557..82e508677b91 100644
--- a/arch/x86/kernel/acpi/sleep.c
+++ b/arch/x86/kernel/acpi/sleep.c
@@ -162,8 +162,6 @@ static int __init acpi_sleep_setup(char *str)
162#endif 162#endif
163 if (strncmp(str, "old_ordering", 12) == 0) 163 if (strncmp(str, "old_ordering", 12) == 0)
164 acpi_old_suspend_ordering(); 164 acpi_old_suspend_ordering();
165 if (strncmp(str, "sci_force_enable", 16) == 0)
166 acpi_set_sci_en_on_resume();
167 str = strchr(str, ','); 165 str = strchr(str, ',');
168 if (str != NULL) 166 if (str != NULL)
169 str += strspn(str, ", \t"); 167 str += strspn(str, ", \t");
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index e5a4a1e01618..c02cc692985c 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -51,6 +51,7 @@
51#include <asm/smp.h> 51#include <asm/smp.h>
52#include <asm/mce.h> 52#include <asm/mce.h>
53#include <asm/kvm_para.h> 53#include <asm/kvm_para.h>
54#include <asm/tsc.h>
54 55
55unsigned int num_processors; 56unsigned int num_processors;
56 57
@@ -1151,8 +1152,13 @@ static void __cpuinit lapic_setup_esr(void)
1151 */ 1152 */
1152void __cpuinit setup_local_APIC(void) 1153void __cpuinit setup_local_APIC(void)
1153{ 1154{
1154 unsigned int value; 1155 unsigned int value, queued;
1155 int i, j; 1156 int i, j, acked = 0;
1157 unsigned long long tsc = 0, ntsc;
1158 long long max_loops = cpu_khz;
1159
1160 if (cpu_has_tsc)
1161 rdtscll(tsc);
1156 1162
1157 if (disable_apic) { 1163 if (disable_apic) {
1158 arch_disable_smp_support(); 1164 arch_disable_smp_support();
@@ -1204,13 +1210,32 @@ void __cpuinit setup_local_APIC(void)
1204 * the interrupt. Hence a vector might get locked. It was noticed 1210 * the interrupt. Hence a vector might get locked. It was noticed
1205 * for timer irq (vector 0x31). Issue an extra EOI to clear ISR. 1211 * for timer irq (vector 0x31). Issue an extra EOI to clear ISR.
1206 */ 1212 */
1207 for (i = APIC_ISR_NR - 1; i >= 0; i--) { 1213 do {
1208 value = apic_read(APIC_ISR + i*0x10); 1214 queued = 0;
1209 for (j = 31; j >= 0; j--) { 1215 for (i = APIC_ISR_NR - 1; i >= 0; i--)
1210 if (value & (1<<j)) 1216 queued |= apic_read(APIC_IRR + i*0x10);
1211 ack_APIC_irq(); 1217
1218 for (i = APIC_ISR_NR - 1; i >= 0; i--) {
1219 value = apic_read(APIC_ISR + i*0x10);
1220 for (j = 31; j >= 0; j--) {
1221 if (value & (1<<j)) {
1222 ack_APIC_irq();
1223 acked++;
1224 }
1225 }
1212 } 1226 }
1213 } 1227 if (acked > 256) {
1228 printk(KERN_ERR "LAPIC pending interrupts after %d EOI\n",
1229 acked);
1230 break;
1231 }
1232 if (cpu_has_tsc) {
1233 rdtscll(ntsc);
1234 max_loops = (cpu_khz << 10) - (ntsc - tsc);
1235 } else
1236 max_loops--;
1237 } while (queued && max_loops > 0);
1238 WARN_ON(max_loops <= 0);
1214 1239
1215 /* 1240 /*
1216 * Now that we are all set up, enable the APIC 1241 * Now that we are all set up, enable the APIC
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index cc83a002786e..68e4a6f2211e 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1121,9 +1121,9 @@ void __cpuinit cpu_init(void)
1121 oist = &per_cpu(orig_ist, cpu); 1121 oist = &per_cpu(orig_ist, cpu);
1122 1122
1123#ifdef CONFIG_NUMA 1123#ifdef CONFIG_NUMA
1124 if (cpu != 0 && percpu_read(node_number) == 0 && 1124 if (cpu != 0 && percpu_read(numa_node) == 0 &&
1125 cpu_to_node(cpu) != NUMA_NO_NODE) 1125 early_cpu_to_node(cpu) != NUMA_NO_NODE)
1126 percpu_write(node_number, cpu_to_node(cpu)); 1126 set_numa_node(early_cpu_to_node(cpu));
1127#endif 1127#endif
1128 1128
1129 me = current; 1129 me = current;
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
index 6f3dc8fbbfdc..7ec2123838e6 100644
--- a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
+++ b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
@@ -1497,8 +1497,8 @@ static struct cpufreq_driver cpufreq_amd64_driver = {
1497 * simply keep the boost-disable flag in sync with the current global 1497 * simply keep the boost-disable flag in sync with the current global
1498 * state. 1498 * state.
1499 */ 1499 */
1500static int __cpuinit cpb_notify(struct notifier_block *nb, unsigned long action, 1500static int cpb_notify(struct notifier_block *nb, unsigned long action,
1501 void *hcpu) 1501 void *hcpu)
1502{ 1502{
1503 unsigned cpu = (long)hcpu; 1503 unsigned cpu = (long)hcpu;
1504 u32 lo, hi; 1504 u32 lo, hi;
@@ -1528,7 +1528,7 @@ static int __cpuinit cpb_notify(struct notifier_block *nb, unsigned long action,
1528 return NOTIFY_OK; 1528 return NOTIFY_OK;
1529} 1529}
1530 1530
1531static struct notifier_block __cpuinitdata cpb_nb = { 1531static struct notifier_block cpb_nb = {
1532 .notifier_call = cpb_notify, 1532 .notifier_call = cpb_notify,
1533}; 1533};
1534 1534
diff --git a/arch/x86/kernel/cpu/mcheck/Makefile b/arch/x86/kernel/cpu/mcheck/Makefile
index 4ac6d48fe11b..bb34b03af252 100644
--- a/arch/x86/kernel/cpu/mcheck/Makefile
+++ b/arch/x86/kernel/cpu/mcheck/Makefile
@@ -7,3 +7,5 @@ obj-$(CONFIG_X86_MCE_THRESHOLD) += threshold.o
7obj-$(CONFIG_X86_MCE_INJECT) += mce-inject.o 7obj-$(CONFIG_X86_MCE_INJECT) += mce-inject.o
8 8
9obj-$(CONFIG_X86_THERMAL_VECTOR) += therm_throt.o 9obj-$(CONFIG_X86_THERMAL_VECTOR) += therm_throt.o
10
11obj-$(CONFIG_ACPI_APEI) += mce-apei.o
diff --git a/arch/x86/kernel/cpu/mcheck/mce-apei.c b/arch/x86/kernel/cpu/mcheck/mce-apei.c
new file mode 100644
index 000000000000..745b54f9be89
--- /dev/null
+++ b/arch/x86/kernel/cpu/mcheck/mce-apei.c
@@ -0,0 +1,138 @@
1/*
2 * Bridge between MCE and APEI
3 *
4 * On some machine, corrected memory errors are reported via APEI
5 * generic hardware error source (GHES) instead of corrected Machine
6 * Check. These corrected memory errors can be reported to user space
7 * through /dev/mcelog via faking a corrected Machine Check, so that
8 * the error memory page can be offlined by /sbin/mcelog if the error
9 * count for one page is beyond the threshold.
10 *
11 * For fatal MCE, save MCE record into persistent storage via ERST, so
12 * that the MCE record can be logged after reboot via ERST.
13 *
14 * Copyright 2010 Intel Corp.
15 * Author: Huang Ying <ying.huang@intel.com>
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License version
19 * 2 as published by the Free Software Foundation.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
29 */
30
31#include <linux/kernel.h>
32#include <linux/acpi.h>
33#include <linux/cper.h>
34#include <acpi/apei.h>
35#include <asm/mce.h>
36
37#include "mce-internal.h"
38
39void apei_mce_report_mem_error(int corrected, struct cper_sec_mem_err *mem_err)
40{
41 struct mce m;
42
43 /* Only corrected MC is reported */
44 if (!corrected)
45 return;
46
47 mce_setup(&m);
48 m.bank = 1;
49 /* Fake a memory read corrected error with unknown channel */
50 m.status = MCI_STATUS_VAL | MCI_STATUS_EN | MCI_STATUS_ADDRV | 0x9f;
51 m.addr = mem_err->physical_addr;
52 mce_log(&m);
53 mce_notify_irq();
54}
55EXPORT_SYMBOL_GPL(apei_mce_report_mem_error);
56
57#define CPER_CREATOR_MCE \
58 UUID_LE(0x75a574e3, 0x5052, 0x4b29, 0x8a, 0x8e, 0xbe, 0x2c, \
59 0x64, 0x90, 0xb8, 0x9d)
60#define CPER_SECTION_TYPE_MCE \
61 UUID_LE(0xfe08ffbe, 0x95e4, 0x4be7, 0xbc, 0x73, 0x40, 0x96, \
62 0x04, 0x4a, 0x38, 0xfc)
63
64/*
65 * CPER specification (in UEFI specification 2.3 appendix N) requires
66 * byte-packed.
67 */
68struct cper_mce_record {
69 struct cper_record_header hdr;
70 struct cper_section_descriptor sec_hdr;
71 struct mce mce;
72} __packed;
73
74int apei_write_mce(struct mce *m)
75{
76 struct cper_mce_record rcd;
77
78 memset(&rcd, 0, sizeof(rcd));
79 memcpy(rcd.hdr.signature, CPER_SIG_RECORD, CPER_SIG_SIZE);
80 rcd.hdr.revision = CPER_RECORD_REV;
81 rcd.hdr.signature_end = CPER_SIG_END;
82 rcd.hdr.section_count = 1;
83 rcd.hdr.error_severity = CPER_SER_FATAL;
84 /* timestamp, platform_id, partition_id are all invalid */
85 rcd.hdr.validation_bits = 0;
86 rcd.hdr.record_length = sizeof(rcd);
87 rcd.hdr.creator_id = CPER_CREATOR_MCE;
88 rcd.hdr.notification_type = CPER_NOTIFY_MCE;
89 rcd.hdr.record_id = cper_next_record_id();
90 rcd.hdr.flags = CPER_HW_ERROR_FLAGS_PREVERR;
91
92 rcd.sec_hdr.section_offset = (void *)&rcd.mce - (void *)&rcd;
93 rcd.sec_hdr.section_length = sizeof(rcd.mce);
94 rcd.sec_hdr.revision = CPER_SEC_REV;
95 /* fru_id and fru_text is invalid */
96 rcd.sec_hdr.validation_bits = 0;
97 rcd.sec_hdr.flags = CPER_SEC_PRIMARY;
98 rcd.sec_hdr.section_type = CPER_SECTION_TYPE_MCE;
99 rcd.sec_hdr.section_severity = CPER_SER_FATAL;
100
101 memcpy(&rcd.mce, m, sizeof(*m));
102
103 return erst_write(&rcd.hdr);
104}
105
106ssize_t apei_read_mce(struct mce *m, u64 *record_id)
107{
108 struct cper_mce_record rcd;
109 ssize_t len;
110
111 len = erst_read_next(&rcd.hdr, sizeof(rcd));
112 if (len <= 0)
113 return len;
114 /* Can not skip other records in storage via ERST unless clear them */
115 else if (len != sizeof(rcd) ||
116 uuid_le_cmp(rcd.hdr.creator_id, CPER_CREATOR_MCE)) {
117 if (printk_ratelimit())
118 pr_warning(
119 "MCE-APEI: Can not skip the unknown record in ERST");
120 return -EIO;
121 }
122
123 memcpy(m, &rcd.mce, sizeof(*m));
124 *record_id = rcd.hdr.record_id;
125
126 return sizeof(*m);
127}
128
129/* Check whether there is record in ERST */
130int apei_check_mce(void)
131{
132 return erst_get_record_count();
133}
134
135int apei_clear_mce(u64 record_id)
136{
137 return erst_clear(record_id);
138}
diff --git a/arch/x86/kernel/cpu/mcheck/mce-internal.h b/arch/x86/kernel/cpu/mcheck/mce-internal.h
index 32996f9fab67..fefcc69ee8b5 100644
--- a/arch/x86/kernel/cpu/mcheck/mce-internal.h
+++ b/arch/x86/kernel/cpu/mcheck/mce-internal.h
@@ -28,3 +28,26 @@ extern int mce_ser;
28 28
29extern struct mce_bank *mce_banks; 29extern struct mce_bank *mce_banks;
30 30
31#ifdef CONFIG_ACPI_APEI
32int apei_write_mce(struct mce *m);
33ssize_t apei_read_mce(struct mce *m, u64 *record_id);
34int apei_check_mce(void);
35int apei_clear_mce(u64 record_id);
36#else
37static inline int apei_write_mce(struct mce *m)
38{
39 return -EINVAL;
40}
41static inline ssize_t apei_read_mce(struct mce *m, u64 *record_id)
42{
43 return 0;
44}
45static inline int apei_check_mce(void)
46{
47 return 0;
48}
49static inline int apei_clear_mce(u64 record_id)
50{
51 return -EINVAL;
52}
53#endif
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 7a355ddcc64b..707165dbc203 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -264,7 +264,7 @@ static void wait_for_panic(void)
264 264
265static void mce_panic(char *msg, struct mce *final, char *exp) 265static void mce_panic(char *msg, struct mce *final, char *exp)
266{ 266{
267 int i; 267 int i, apei_err = 0;
268 268
269 if (!fake_panic) { 269 if (!fake_panic) {
270 /* 270 /*
@@ -287,8 +287,11 @@ static void mce_panic(char *msg, struct mce *final, char *exp)
287 struct mce *m = &mcelog.entry[i]; 287 struct mce *m = &mcelog.entry[i];
288 if (!(m->status & MCI_STATUS_VAL)) 288 if (!(m->status & MCI_STATUS_VAL))
289 continue; 289 continue;
290 if (!(m->status & MCI_STATUS_UC)) 290 if (!(m->status & MCI_STATUS_UC)) {
291 print_mce(m); 291 print_mce(m);
292 if (!apei_err)
293 apei_err = apei_write_mce(m);
294 }
292 } 295 }
293 /* Now print uncorrected but with the final one last */ 296 /* Now print uncorrected but with the final one last */
294 for (i = 0; i < MCE_LOG_LEN; i++) { 297 for (i = 0; i < MCE_LOG_LEN; i++) {
@@ -297,11 +300,17 @@ static void mce_panic(char *msg, struct mce *final, char *exp)
297 continue; 300 continue;
298 if (!(m->status & MCI_STATUS_UC)) 301 if (!(m->status & MCI_STATUS_UC))
299 continue; 302 continue;
300 if (!final || memcmp(m, final, sizeof(struct mce))) 303 if (!final || memcmp(m, final, sizeof(struct mce))) {
301 print_mce(m); 304 print_mce(m);
305 if (!apei_err)
306 apei_err = apei_write_mce(m);
307 }
302 } 308 }
303 if (final) 309 if (final) {
304 print_mce(final); 310 print_mce(final);
311 if (!apei_err)
312 apei_err = apei_write_mce(final);
313 }
305 if (cpu_missing) 314 if (cpu_missing)
306 printk(KERN_EMERG "Some CPUs didn't answer in synchronization\n"); 315 printk(KERN_EMERG "Some CPUs didn't answer in synchronization\n");
307 print_mce_tail(); 316 print_mce_tail();
@@ -1493,6 +1502,43 @@ static void collect_tscs(void *data)
1493 rdtscll(cpu_tsc[smp_processor_id()]); 1502 rdtscll(cpu_tsc[smp_processor_id()]);
1494} 1503}
1495 1504
1505static int mce_apei_read_done;
1506
1507/* Collect MCE record of previous boot in persistent storage via APEI ERST. */
1508static int __mce_read_apei(char __user **ubuf, size_t usize)
1509{
1510 int rc;
1511 u64 record_id;
1512 struct mce m;
1513
1514 if (usize < sizeof(struct mce))
1515 return -EINVAL;
1516
1517 rc = apei_read_mce(&m, &record_id);
1518 /* Error or no more MCE record */
1519 if (rc <= 0) {
1520 mce_apei_read_done = 1;
1521 return rc;
1522 }
1523 rc = -EFAULT;
1524 if (copy_to_user(*ubuf, &m, sizeof(struct mce)))
1525 return rc;
1526 /*
1527 * In fact, we should have cleared the record after that has
1528 * been flushed to the disk or sent to network in
1529 * /sbin/mcelog, but we have no interface to support that now,
1530 * so just clear it to avoid duplication.
1531 */
1532 rc = apei_clear_mce(record_id);
1533 if (rc) {
1534 mce_apei_read_done = 1;
1535 return rc;
1536 }
1537 *ubuf += sizeof(struct mce);
1538
1539 return 0;
1540}
1541
1496static ssize_t mce_read(struct file *filp, char __user *ubuf, size_t usize, 1542static ssize_t mce_read(struct file *filp, char __user *ubuf, size_t usize,
1497 loff_t *off) 1543 loff_t *off)
1498{ 1544{
@@ -1506,15 +1552,19 @@ static ssize_t mce_read(struct file *filp, char __user *ubuf, size_t usize,
1506 return -ENOMEM; 1552 return -ENOMEM;
1507 1553
1508 mutex_lock(&mce_read_mutex); 1554 mutex_lock(&mce_read_mutex);
1555
1556 if (!mce_apei_read_done) {
1557 err = __mce_read_apei(&buf, usize);
1558 if (err || buf != ubuf)
1559 goto out;
1560 }
1561
1509 next = rcu_dereference_check_mce(mcelog.next); 1562 next = rcu_dereference_check_mce(mcelog.next);
1510 1563
1511 /* Only supports full reads right now */ 1564 /* Only supports full reads right now */
1512 if (*off != 0 || usize < MCE_LOG_LEN*sizeof(struct mce)) { 1565 err = -EINVAL;
1513 mutex_unlock(&mce_read_mutex); 1566 if (*off != 0 || usize < MCE_LOG_LEN*sizeof(struct mce))
1514 kfree(cpu_tsc); 1567 goto out;
1515
1516 return -EINVAL;
1517 }
1518 1568
1519 err = 0; 1569 err = 0;
1520 prev = 0; 1570 prev = 0;
@@ -1562,10 +1612,15 @@ timeout:
1562 memset(&mcelog.entry[i], 0, sizeof(struct mce)); 1612 memset(&mcelog.entry[i], 0, sizeof(struct mce));
1563 } 1613 }
1564 } 1614 }
1615
1616 if (err)
1617 err = -EFAULT;
1618
1619out:
1565 mutex_unlock(&mce_read_mutex); 1620 mutex_unlock(&mce_read_mutex);
1566 kfree(cpu_tsc); 1621 kfree(cpu_tsc);
1567 1622
1568 return err ? -EFAULT : buf - ubuf; 1623 return err ? err : buf - ubuf;
1569} 1624}
1570 1625
1571static unsigned int mce_poll(struct file *file, poll_table *wait) 1626static unsigned int mce_poll(struct file *file, poll_table *wait)
@@ -1573,6 +1628,8 @@ static unsigned int mce_poll(struct file *file, poll_table *wait)
1573 poll_wait(file, &mce_wait, wait); 1628 poll_wait(file, &mce_wait, wait);
1574 if (rcu_dereference_check_mce(mcelog.next)) 1629 if (rcu_dereference_check_mce(mcelog.next))
1575 return POLLIN | POLLRDNORM; 1630 return POLLIN | POLLRDNORM;
1631 if (!mce_apei_read_done && apei_check_mce())
1632 return POLLIN | POLLRDNORM;
1576 return 0; 1633 return 0;
1577} 1634}
1578 1635
diff --git a/arch/x86/kernel/cpu/mcheck/therm_throt.c b/arch/x86/kernel/cpu/mcheck/therm_throt.c
index 81c499eceb21..e1a0a3bf9716 100644
--- a/arch/x86/kernel/cpu/mcheck/therm_throt.c
+++ b/arch/x86/kernel/cpu/mcheck/therm_throt.c
@@ -190,7 +190,7 @@ thermal_throttle_cpu_callback(struct notifier_block *nfb,
190 mutex_unlock(&therm_cpu_lock); 190 mutex_unlock(&therm_cpu_lock);
191 break; 191 break;
192 } 192 }
193 return err ? NOTIFY_BAD : NOTIFY_OK; 193 return notifier_from_errno(err);
194} 194}
195 195
196static struct notifier_block thermal_throttle_cpu_notifier __cpuinitdata = 196static struct notifier_block thermal_throttle_cpu_notifier __cpuinitdata =
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index fd4db0db3708..c77586061bcb 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -1717,7 +1717,11 @@ void perf_arch_fetch_caller_regs(struct pt_regs *regs, unsigned long ip, int ski
1717 */ 1717 */
1718 regs->bp = rewind_frame_pointer(skip + 1); 1718 regs->bp = rewind_frame_pointer(skip + 1);
1719 regs->cs = __KERNEL_CS; 1719 regs->cs = __KERNEL_CS;
1720 local_save_flags(regs->flags); 1720 /*
1721 * We abuse bit 3 to pass exact information, see perf_misc_flags
1722 * and the comment with PERF_EFLAGS_EXACT.
1723 */
1724 regs->flags = 0;
1721} 1725}
1722 1726
1723unsigned long perf_instruction_pointer(struct pt_regs *regs) 1727unsigned long perf_instruction_pointer(struct pt_regs *regs)
diff --git a/arch/x86/kernel/cpu/perf_event_p4.c b/arch/x86/kernel/cpu/perf_event_p4.c
index 424fc8de68e4..ae85d69644d1 100644
--- a/arch/x86/kernel/cpu/perf_event_p4.c
+++ b/arch/x86/kernel/cpu/perf_event_p4.c
@@ -465,15 +465,21 @@ out:
465 return rc; 465 return rc;
466} 466}
467 467
468static inline void p4_pmu_clear_cccr_ovf(struct hw_perf_event *hwc) 468static inline int p4_pmu_clear_cccr_ovf(struct hw_perf_event *hwc)
469{ 469{
470 unsigned long dummy; 470 int overflow = 0;
471 u32 low, high;
471 472
472 rdmsrl(hwc->config_base + hwc->idx, dummy); 473 rdmsr(hwc->config_base + hwc->idx, low, high);
473 if (dummy & P4_CCCR_OVF) { 474
475 /* we need to check high bit for unflagged overflows */
476 if ((low & P4_CCCR_OVF) || !(high & (1 << 31))) {
477 overflow = 1;
474 (void)checking_wrmsrl(hwc->config_base + hwc->idx, 478 (void)checking_wrmsrl(hwc->config_base + hwc->idx,
475 ((u64)dummy) & ~P4_CCCR_OVF); 479 ((u64)low) & ~P4_CCCR_OVF);
476 } 480 }
481
482 return overflow;
477} 483}
478 484
479static inline void p4_pmu_disable_event(struct perf_event *event) 485static inline void p4_pmu_disable_event(struct perf_event *event)
@@ -584,21 +590,15 @@ static int p4_pmu_handle_irq(struct pt_regs *regs)
584 590
585 WARN_ON_ONCE(hwc->idx != idx); 591 WARN_ON_ONCE(hwc->idx != idx);
586 592
587 /* 593 /* it might be unflagged overflow */
588 * FIXME: Redundant call, actually not needed 594 handled = p4_pmu_clear_cccr_ovf(hwc);
589 * but just to check if we're screwed
590 */
591 p4_pmu_clear_cccr_ovf(hwc);
592 595
593 val = x86_perf_event_update(event); 596 val = x86_perf_event_update(event);
594 if (val & (1ULL << (x86_pmu.cntval_bits - 1))) 597 if (!handled && (val & (1ULL << (x86_pmu.cntval_bits - 1))))
595 continue; 598 continue;
596 599
597 /* 600 /* event overflow for sure */
598 * event overflow 601 data.period = event->hw.last_period;
599 */
600 handled = 1;
601 data.period = event->hw.last_period;
602 602
603 if (!x86_perf_event_set_period(event)) 603 if (!x86_perf_event_set_period(event))
604 continue; 604 continue;
@@ -670,7 +670,7 @@ static void p4_pmu_swap_config_ts(struct hw_perf_event *hwc, int cpu)
670 670
671/* 671/*
672 * ESCR address hashing is tricky, ESCRs are not sequential 672 * ESCR address hashing is tricky, ESCRs are not sequential
673 * in memory but all starts from MSR_P4_BSU_ESCR0 (0x03e0) and 673 * in memory but all starts from MSR_P4_BSU_ESCR0 (0x03a0) and
674 * the metric between any ESCRs is laid in range [0xa0,0xe1] 674 * the metric between any ESCRs is laid in range [0xa0,0xe1]
675 * 675 *
676 * so we make ~70% filled hashtable 676 * so we make ~70% filled hashtable
@@ -735,8 +735,9 @@ static int p4_get_escr_idx(unsigned int addr)
735{ 735{
736 unsigned int idx = P4_ESCR_MSR_IDX(addr); 736 unsigned int idx = P4_ESCR_MSR_IDX(addr);
737 737
738 if (unlikely(idx >= P4_ESCR_MSR_TABLE_SIZE || 738 if (unlikely(idx >= P4_ESCR_MSR_TABLE_SIZE ||
739 !p4_escr_table[idx])) { 739 !p4_escr_table[idx] ||
740 p4_escr_table[idx] != addr)) {
740 WARN_ONCE(1, "P4 PMU: Wrong address passed: %x\n", addr); 741 WARN_ONCE(1, "P4 PMU: Wrong address passed: %x\n", addr);
741 return -1; 742 return -1;
742 } 743 }
@@ -762,7 +763,7 @@ static int p4_pmu_schedule_events(struct cpu_hw_events *cpuc, int n, int *assign
762{ 763{
763 unsigned long used_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)]; 764 unsigned long used_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)];
764 unsigned long escr_mask[BITS_TO_LONGS(P4_ESCR_MSR_TABLE_SIZE)]; 765 unsigned long escr_mask[BITS_TO_LONGS(P4_ESCR_MSR_TABLE_SIZE)];
765 int cpu = raw_smp_processor_id(); 766 int cpu = smp_processor_id();
766 struct hw_perf_event *hwc; 767 struct hw_perf_event *hwc;
767 struct p4_event_bind *bind; 768 struct p4_event_bind *bind;
768 unsigned int i, thread, num; 769 unsigned int i, thread, num;
diff --git a/arch/x86/kernel/cpuid.c b/arch/x86/kernel/cpuid.c
index 8b862d5900fe..1b7b31ab7d86 100644
--- a/arch/x86/kernel/cpuid.c
+++ b/arch/x86/kernel/cpuid.c
@@ -170,7 +170,7 @@ static int __cpuinit cpuid_class_cpu_callback(struct notifier_block *nfb,
170 cpuid_device_destroy(cpu); 170 cpuid_device_destroy(cpu);
171 break; 171 break;
172 } 172 }
173 return err ? NOTIFY_BAD : NOTIFY_OK; 173 return notifier_from_errno(err);
174} 174}
175 175
176static struct notifier_block __refdata cpuid_class_cpu_notifier = 176static struct notifier_block __refdata cpuid_class_cpu_notifier =
diff --git a/arch/x86/kernel/msr.c b/arch/x86/kernel/msr.c
index 4d4468e9f47c..7bf2dc4c8f70 100644
--- a/arch/x86/kernel/msr.c
+++ b/arch/x86/kernel/msr.c
@@ -230,7 +230,7 @@ static int __cpuinit msr_class_cpu_callback(struct notifier_block *nfb,
230 msr_device_destroy(cpu); 230 msr_device_destroy(cpu);
231 break; 231 break;
232 } 232 }
233 return err ? NOTIFY_BAD : NOTIFY_OK; 233 return notifier_from_errno(err);
234} 234}
235 235
236static struct notifier_block __refdata msr_class_cpu_notifier = { 236static struct notifier_block __refdata msr_class_cpu_notifier = {
diff --git a/arch/x86/kernel/pci-swiotlb.c b/arch/x86/kernel/pci-swiotlb.c
index 7d2829dde20e..a5bc528d4328 100644
--- a/arch/x86/kernel/pci-swiotlb.c
+++ b/arch/x86/kernel/pci-swiotlb.c
@@ -31,8 +31,6 @@ static struct dma_map_ops swiotlb_dma_ops = {
31 .free_coherent = swiotlb_free_coherent, 31 .free_coherent = swiotlb_free_coherent,
32 .sync_single_for_cpu = swiotlb_sync_single_for_cpu, 32 .sync_single_for_cpu = swiotlb_sync_single_for_cpu,
33 .sync_single_for_device = swiotlb_sync_single_for_device, 33 .sync_single_for_device = swiotlb_sync_single_for_device,
34 .sync_single_range_for_cpu = swiotlb_sync_single_range_for_cpu,
35 .sync_single_range_for_device = swiotlb_sync_single_range_for_device,
36 .sync_sg_for_cpu = swiotlb_sync_sg_for_cpu, 34 .sync_sg_for_cpu = swiotlb_sync_sg_for_cpu,
37 .sync_sg_for_device = swiotlb_sync_sg_for_device, 35 .sync_sg_for_device = swiotlb_sync_sg_for_device,
38 .map_sg = swiotlb_map_sg_attrs, 36 .map_sg = swiotlb_map_sg_attrs,
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index e8029896309a..b4ae4acbd031 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -676,6 +676,17 @@ static struct dmi_system_id __initdata bad_bios_dmi_table[] = {
676 DMI_MATCH(DMI_BOARD_NAME, "DG45FC"), 676 DMI_MATCH(DMI_BOARD_NAME, "DG45FC"),
677 }, 677 },
678 }, 678 },
679 /*
680 * The Dell Inspiron Mini 1012 has DMI_BIOS_VENDOR = "Dell Inc.", so
681 * match on the product name.
682 */
683 {
684 .callback = dmi_low_memory_corruption,
685 .ident = "Phoenix BIOS",
686 .matches = {
687 DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 1012"),
688 },
689 },
679#endif 690#endif
680 {} 691 {}
681}; 692};
diff --git a/arch/x86/kernel/setup_percpu.c b/arch/x86/kernel/setup_percpu.c
index ef6370b00e70..a867940a6dfc 100644
--- a/arch/x86/kernel/setup_percpu.c
+++ b/arch/x86/kernel/setup_percpu.c
@@ -265,10 +265,10 @@ void __init setup_per_cpu_areas(void)
265 265
266#if defined(CONFIG_X86_64) && defined(CONFIG_NUMA) 266#if defined(CONFIG_X86_64) && defined(CONFIG_NUMA)
267 /* 267 /*
268 * make sure boot cpu node_number is right, when boot cpu is on the 268 * make sure boot cpu numa_node is right, when boot cpu is on the
269 * node that doesn't have mem installed 269 * node that doesn't have mem installed
270 */ 270 */
271 per_cpu(node_number, boot_cpu_id) = cpu_to_node(boot_cpu_id); 271 set_cpu_numa_node(boot_cpu_id, early_cpu_to_node(boot_cpu_id));
272#endif 272#endif
273 273
274 /* Setup node to cpumask map */ 274 /* Setup node to cpumask map */
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index 763d815e27a0..37462f1ddba5 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -1215,9 +1215,17 @@ __init void prefill_possible_map(void)
1215 if (!num_processors) 1215 if (!num_processors)
1216 num_processors = 1; 1216 num_processors = 1;
1217 1217
1218 if (setup_possible_cpus == -1) 1218 i = setup_max_cpus ?: 1;
1219 possible = num_processors + disabled_cpus; 1219 if (setup_possible_cpus == -1) {
1220 else 1220 possible = num_processors;
1221#ifdef CONFIG_HOTPLUG_CPU
1222 if (setup_max_cpus)
1223 possible += disabled_cpus;
1224#else
1225 if (possible > i)
1226 possible = i;
1227#endif
1228 } else
1221 possible = setup_possible_cpus; 1229 possible = setup_possible_cpus;
1222 1230
1223 total_cpus = max_t(int, possible, num_processors + disabled_cpus); 1231 total_cpus = max_t(int, possible, num_processors + disabled_cpus);
@@ -1230,11 +1238,23 @@ __init void prefill_possible_map(void)
1230 possible = nr_cpu_ids; 1238 possible = nr_cpu_ids;
1231 } 1239 }
1232 1240
1241#ifdef CONFIG_HOTPLUG_CPU
1242 if (!setup_max_cpus)
1243#endif
1244 if (possible > i) {
1245 printk(KERN_WARNING
1246 "%d Processors exceeds max_cpus limit of %u\n",
1247 possible, setup_max_cpus);
1248 possible = i;
1249 }
1250
1233 printk(KERN_INFO "SMP: Allowing %d CPUs, %d hotplug CPUs\n", 1251 printk(KERN_INFO "SMP: Allowing %d CPUs, %d hotplug CPUs\n",
1234 possible, max_t(int, possible - num_processors, 0)); 1252 possible, max_t(int, possible - num_processors, 0));
1235 1253
1236 for (i = 0; i < possible; i++) 1254 for (i = 0; i < possible; i++)
1237 set_cpu_possible(i, true); 1255 set_cpu_possible(i, true);
1256 for (; i < NR_CPUS; i++)
1257 set_cpu_possible(i, false);
1238 1258
1239 nr_cpu_ids = possible; 1259 nr_cpu_ids = possible;
1240} 1260}
diff --git a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c
index 2bdf628066bd..9257510b4836 100644
--- a/arch/x86/lguest/boot.c
+++ b/arch/x86/lguest/boot.c
@@ -1390,7 +1390,6 @@ __init void lguest_init(void)
1390#endif 1390#endif
1391#ifdef CONFIG_ACPI 1391#ifdef CONFIG_ACPI
1392 acpi_disabled = 1; 1392 acpi_disabled = 1;
1393 acpi_ht = 0;
1394#endif 1393#endif
1395 1394
1396 /* 1395 /*
diff --git a/arch/x86/mm/numa_64.c b/arch/x86/mm/numa_64.c
index 8948f47fde05..a7bcc23ef96c 100644
--- a/arch/x86/mm/numa_64.c
+++ b/arch/x86/mm/numa_64.c
@@ -33,9 +33,6 @@ int numa_off __initdata;
33static unsigned long __initdata nodemap_addr; 33static unsigned long __initdata nodemap_addr;
34static unsigned long __initdata nodemap_size; 34static unsigned long __initdata nodemap_size;
35 35
36DEFINE_PER_CPU(int, node_number) = 0;
37EXPORT_PER_CPU_SYMBOL(node_number);
38
39/* 36/*
40 * Map cpu index to node index 37 * Map cpu index to node index
41 */ 38 */
@@ -809,7 +806,7 @@ void __cpuinit numa_set_node(int cpu, int node)
809 per_cpu(x86_cpu_to_node_map, cpu) = node; 806 per_cpu(x86_cpu_to_node_map, cpu) = node;
810 807
811 if (node != NUMA_NO_NODE) 808 if (node != NUMA_NO_NODE)
812 per_cpu(node_number, cpu) = node; 809 set_cpu_numa_node(cpu, node);
813} 810}
814 811
815void __cpuinit numa_clear_node(int cpu) 812void __cpuinit numa_clear_node(int cpu)
@@ -867,7 +864,7 @@ void __cpuinit numa_remove_cpu(int cpu)
867 numa_set_cpumask(cpu, 0); 864 numa_set_cpumask(cpu, 0);
868} 865}
869 866
870int cpu_to_node(int cpu) 867int __cpu_to_node(int cpu)
871{ 868{
872 if (early_per_cpu_ptr(x86_cpu_to_node_map)) { 869 if (early_per_cpu_ptr(x86_cpu_to_node_map)) {
873 printk(KERN_WARNING 870 printk(KERN_WARNING
@@ -877,7 +874,7 @@ int cpu_to_node(int cpu)
877 } 874 }
878 return per_cpu(x86_cpu_to_node_map, cpu); 875 return per_cpu(x86_cpu_to_node_map, cpu);
879} 876}
880EXPORT_SYMBOL(cpu_to_node); 877EXPORT_SYMBOL(__cpu_to_node);
881 878
882/* 879/*
883 * Same function as cpu_to_node() but used if called before the 880 * Same function as cpu_to_node() but used if called before the
diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c
index bbe5502ee1cb..acc15b23b743 100644
--- a/arch/x86/mm/pat.c
+++ b/arch/x86/mm/pat.c
@@ -336,6 +336,7 @@ int free_memtype(u64 start, u64 end)
336{ 336{
337 int err = -EINVAL; 337 int err = -EINVAL;
338 int is_range_ram; 338 int is_range_ram;
339 struct memtype *entry;
339 340
340 if (!pat_enabled) 341 if (!pat_enabled)
341 return 0; 342 return 0;
@@ -355,17 +356,20 @@ int free_memtype(u64 start, u64 end)
355 } 356 }
356 357
357 spin_lock(&memtype_lock); 358 spin_lock(&memtype_lock);
358 err = rbt_memtype_erase(start, end); 359 entry = rbt_memtype_erase(start, end);
359 spin_unlock(&memtype_lock); 360 spin_unlock(&memtype_lock);
360 361
361 if (err) { 362 if (!entry) {
362 printk(KERN_INFO "%s:%d freeing invalid memtype %Lx-%Lx\n", 363 printk(KERN_INFO "%s:%d freeing invalid memtype %Lx-%Lx\n",
363 current->comm, current->pid, start, end); 364 current->comm, current->pid, start, end);
365 return -EINVAL;
364 } 366 }
365 367
368 kfree(entry);
369
366 dprintk("free_memtype request 0x%Lx-0x%Lx\n", start, end); 370 dprintk("free_memtype request 0x%Lx-0x%Lx\n", start, end);
367 371
368 return err; 372 return 0;
369} 373}
370 374
371 375
diff --git a/arch/x86/mm/pat_internal.h b/arch/x86/mm/pat_internal.h
index 4f39eefa3e61..77e5ba153fac 100644
--- a/arch/x86/mm/pat_internal.h
+++ b/arch/x86/mm/pat_internal.h
@@ -28,15 +28,15 @@ static inline char *cattr_name(unsigned long flags)
28#ifdef CONFIG_X86_PAT 28#ifdef CONFIG_X86_PAT
29extern int rbt_memtype_check_insert(struct memtype *new, 29extern int rbt_memtype_check_insert(struct memtype *new,
30 unsigned long *new_type); 30 unsigned long *new_type);
31extern int rbt_memtype_erase(u64 start, u64 end); 31extern struct memtype *rbt_memtype_erase(u64 start, u64 end);
32extern struct memtype *rbt_memtype_lookup(u64 addr); 32extern struct memtype *rbt_memtype_lookup(u64 addr);
33extern int rbt_memtype_copy_nth_element(struct memtype *out, loff_t pos); 33extern int rbt_memtype_copy_nth_element(struct memtype *out, loff_t pos);
34#else 34#else
35static inline int rbt_memtype_check_insert(struct memtype *new, 35static inline int rbt_memtype_check_insert(struct memtype *new,
36 unsigned long *new_type) 36 unsigned long *new_type)
37{ return 0; } 37{ return 0; }
38static inline int rbt_memtype_erase(u64 start, u64 end) 38static inline struct memtype *rbt_memtype_erase(u64 start, u64 end)
39{ return 0; } 39{ return NULL; }
40static inline struct memtype *rbt_memtype_lookup(u64 addr) 40static inline struct memtype *rbt_memtype_lookup(u64 addr)
41{ return NULL; } 41{ return NULL; }
42static inline int rbt_memtype_copy_nth_element(struct memtype *out, loff_t pos) 42static inline int rbt_memtype_copy_nth_element(struct memtype *out, loff_t pos)
diff --git a/arch/x86/mm/pat_rbtree.c b/arch/x86/mm/pat_rbtree.c
index 07de4cb8cc30..f537087bb740 100644
--- a/arch/x86/mm/pat_rbtree.c
+++ b/arch/x86/mm/pat_rbtree.c
@@ -231,16 +231,17 @@ int rbt_memtype_check_insert(struct memtype *new, unsigned long *ret_type)
231 return err; 231 return err;
232} 232}
233 233
234int rbt_memtype_erase(u64 start, u64 end) 234struct memtype *rbt_memtype_erase(u64 start, u64 end)
235{ 235{
236 struct memtype *data; 236 struct memtype *data;
237 237
238 data = memtype_rb_exact_match(&memtype_rbroot, start, end); 238 data = memtype_rb_exact_match(&memtype_rbroot, start, end);
239 if (!data) 239 if (!data)
240 return -EINVAL; 240 goto out;
241 241
242 rb_erase(&data->rb, &memtype_rbroot); 242 rb_erase(&data->rb, &memtype_rbroot);
243 return 0; 243out:
244 return data;
244} 245}
245 246
246struct memtype *rbt_memtype_lookup(u64 addr) 247struct memtype *rbt_memtype_lookup(u64 addr)
diff --git a/arch/x86/mm/pf_in.c b/arch/x86/mm/pf_in.c
index df3d5c861cda..308e32570d84 100644
--- a/arch/x86/mm/pf_in.c
+++ b/arch/x86/mm/pf_in.c
@@ -34,7 +34,7 @@
34/* IA32 Manual 3, 2-1 */ 34/* IA32 Manual 3, 2-1 */
35static unsigned char prefix_codes[] = { 35static unsigned char prefix_codes[] = {
36 0xF0, 0xF2, 0xF3, 0x2E, 0x36, 0x3E, 0x26, 0x64, 36 0xF0, 0xF2, 0xF3, 0x2E, 0x36, 0x3E, 0x26, 0x64,
37 0x65, 0x2E, 0x3E, 0x66, 0x67 37 0x65, 0x66, 0x67
38}; 38};
39/* IA32 Manual 3, 3-432*/ 39/* IA32 Manual 3, 3-432*/
40static unsigned int reg_rop[] = { 40static unsigned int reg_rop[] = {
diff --git a/arch/x86/mm/pgtable_32.c b/arch/x86/mm/pgtable_32.c
index 792854003ed3..cac718499256 100644
--- a/arch/x86/mm/pgtable_32.c
+++ b/arch/x86/mm/pgtable_32.c
@@ -9,7 +9,6 @@
9#include <linux/pagemap.h> 9#include <linux/pagemap.h>
10#include <linux/spinlock.h> 10#include <linux/spinlock.h>
11#include <linux/module.h> 11#include <linux/module.h>
12#include <linux/quicklist.h>
13 12
14#include <asm/system.h> 13#include <asm/system.h>
15#include <asm/pgtable.h> 14#include <asm/pgtable.h>
diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c
index 31930fd30ea9..2ec04c424a62 100644
--- a/arch/x86/pci/acpi.c
+++ b/arch/x86/pci/acpi.c
@@ -207,10 +207,9 @@ get_current_resources(struct acpi_device *device, int busnum,
207 if (!info.res) 207 if (!info.res)
208 goto res_alloc_fail; 208 goto res_alloc_fail;
209 209
210 info.name = kmalloc(16, GFP_KERNEL); 210 info.name = kasprintf(GFP_KERNEL, "PCI Bus %04x:%02x", domain, busnum);
211 if (!info.name) 211 if (!info.name)
212 goto name_alloc_fail; 212 goto name_alloc_fail;
213 sprintf(info.name, "PCI Bus %04x:%02x", domain, busnum);
214 213
215 info.res_num = 0; 214 info.res_num = 0;
216 acpi_walk_resources(device->handle, METHOD_NAME__CRS, setup_resource, 215 acpi_walk_resources(device->handle, METHOD_NAME__CRS, setup_resource,
@@ -224,8 +223,11 @@ res_alloc_fail:
224 return; 223 return;
225} 224}
226 225
227struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_device *device, int domain, int busnum) 226struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_pci_root *root)
228{ 227{
228 struct acpi_device *device = root->device;
229 int domain = root->segment;
230 int busnum = root->secondary.start;
229 struct pci_bus *bus; 231 struct pci_bus *bus;
230 struct pci_sysdata *sd; 232 struct pci_sysdata *sd;
231 int node; 233 int node;
diff --git a/arch/xtensa/include/asm/scatterlist.h b/arch/xtensa/include/asm/scatterlist.h
index 810080bb0a2b..b1f9fdc1d5ba 100644
--- a/arch/xtensa/include/asm/scatterlist.h
+++ b/arch/xtensa/include/asm/scatterlist.h
@@ -11,28 +11,7 @@
11#ifndef _XTENSA_SCATTERLIST_H 11#ifndef _XTENSA_SCATTERLIST_H
12#define _XTENSA_SCATTERLIST_H 12#define _XTENSA_SCATTERLIST_H
13 13
14#include <asm/types.h> 14#include <asm-generic/scatterlist.h>
15
16struct scatterlist {
17#ifdef CONFIG_DEBUG_SG
18 unsigned long sg_magic;
19#endif
20 unsigned long page_link;
21 unsigned int offset;
22 dma_addr_t dma_address;
23 unsigned int length;
24};
25
26/*
27 * These macros should be used after a pci_map_sg call has been done
28 * to get bus addresses of each of the SG entries and their lengths.
29 * You should only work with the number of sg entries pci_map_sg
30 * returns, or alternatively stop on the first sg_dma_len(sg) which
31 * is 0.
32 */
33#define sg_dma_address(sg) ((sg)->dma_address)
34#define sg_dma_len(sg) ((sg)->length)
35
36 15
37#define ISA_DMA_THRESHOLD (~0UL) 16#define ISA_DMA_THRESHOLD (~0UL)
38 17