aboutsummaryrefslogtreecommitdiffstats
path: root/arch
diff options
context:
space:
mode:
authorKuninori Morimoto <kuninori.morimoto.gx@renesas.com>2010-10-31 10:43:14 -0400
committerPaul Mundt <lethal@linux-sh.org>2010-10-31 10:43:14 -0400
commit2669efec085bfc02006a452e1b5930f28bab959b (patch)
tree20ee1c0f5b9d19ceedd9b17f1d6f129c83d393a0 /arch
parentf2ace4a5d754c07503326d66ec85bf65e03d729d (diff)
ARM: mach-shmobile: ap4evb: Add HDMI sound support
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-shmobile/board-ap4evb.c46
1 files changed, 45 insertions, 1 deletions
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index 46ca4d4abf91..32d9e2816e56 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -565,12 +565,50 @@ static struct platform_device *qhd_devices[] __initdata = {
565 565
566/* FSI */ 566/* FSI */
567#define IRQ_FSI evt2irq(0x1840) 567#define IRQ_FSI evt2irq(0x1840)
568
569static int fsi_set_rate(int is_porta, int rate)
570{
571 struct clk *fsib_clk;
572 struct clk *fdiv_clk = &sh7372_fsidivb_clk;
573 int ret;
574
575 /* set_rate is not needed if port A */
576 if (is_porta)
577 return 0;
578
579 fsib_clk = clk_get(NULL, "fsib_clk");
580 if (IS_ERR(fsib_clk))
581 return -EINVAL;
582
583 switch (rate) {
584 case 48000:
585 clk_set_rate(fsib_clk, clk_round_rate(fsib_clk, 85428000));
586 clk_set_rate(fdiv_clk, clk_round_rate(fdiv_clk, 12204000));
587 ret = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
588 break;
589 default:
590 pr_err("unsupported rate in FSI2 port B\n");
591 ret = -EINVAL;
592 break;
593 }
594
595 clk_put(fsib_clk);
596
597 return ret;
598}
599
568static struct sh_fsi_platform_info fsi_info = { 600static struct sh_fsi_platform_info fsi_info = {
569 .porta_flags = SH_FSI_BRS_INV | 601 .porta_flags = SH_FSI_BRS_INV |
570 SH_FSI_OUT_SLAVE_MODE | 602 SH_FSI_OUT_SLAVE_MODE |
571 SH_FSI_IN_SLAVE_MODE | 603 SH_FSI_IN_SLAVE_MODE |
572 SH_FSI_OFMT(PCM) | 604 SH_FSI_OFMT(PCM) |
573 SH_FSI_IFMT(PCM), 605 SH_FSI_IFMT(PCM),
606
607 .portb_flags = SH_FSI_BRS_INV |
608 SH_FSI_BRM_INV |
609 SH_FSI_LRS_INV |
610 SH_FSI_OFMT(SPDIF),
611 .set_rate = fsi_set_rate,
574}; 612};
575 613
576static struct resource fsi_resources[] = { 614static struct resource fsi_resources[] = {
@@ -634,6 +672,7 @@ static struct platform_device lcdc1_device = {
634static struct sh_mobile_hdmi_info hdmi_info = { 672static struct sh_mobile_hdmi_info hdmi_info = {
635 .lcd_chan = &sh_mobile_lcdc1_info.ch[0], 673 .lcd_chan = &sh_mobile_lcdc1_info.ch[0],
636 .lcd_dev = &lcdc1_device.dev, 674 .lcd_dev = &lcdc1_device.dev,
675 .flags = HDMI_SND_SRC_SPDIF,
637}; 676};
638 677
639static struct resource hdmi_resources[] = { 678static struct resource hdmi_resources[] = {
@@ -992,6 +1031,7 @@ static void __init ap4evb_map_io(void)
992 1031
993#define GPIO_PORT9CR 0xE6051009 1032#define GPIO_PORT9CR 0xE6051009
994#define GPIO_PORT10CR 0xE605100A 1033#define GPIO_PORT10CR 0xE605100A
1034#define USCCR1 0xE6058144
995static void __init ap4evb_init(void) 1035static void __init ap4evb_init(void)
996{ 1036{
997 u32 srcr4; 1037 u32 srcr4;
@@ -1062,7 +1102,7 @@ static void __init ap4evb_init(void)
1062 /* setup USB phy */ 1102 /* setup USB phy */
1063 __raw_writew(0x8a0a, 0xE6058130); /* USBCR2 */ 1103 __raw_writew(0x8a0a, 0xE6058130); /* USBCR2 */
1064 1104
1065 /* enable FSI2 */ 1105 /* enable FSI2 port A (ak4643) */
1066 gpio_request(GPIO_FN_FSIAIBT, NULL); 1106 gpio_request(GPIO_FN_FSIAIBT, NULL);
1067 gpio_request(GPIO_FN_FSIAILR, NULL); 1107 gpio_request(GPIO_FN_FSIAILR, NULL);
1068 gpio_request(GPIO_FN_FSIAISLD, NULL); 1108 gpio_request(GPIO_FN_FSIAISLD, NULL);
@@ -1079,6 +1119,10 @@ static void __init ap4evb_init(void)
1079 gpio_request(GPIO_PORT41, NULL); 1119 gpio_request(GPIO_PORT41, NULL);
1080 gpio_direction_input(GPIO_PORT41); 1120 gpio_direction_input(GPIO_PORT41);
1081 1121
1122 /* setup FSI2 port B (HDMI) */
1123 gpio_request(GPIO_FN_FSIBCK, NULL);
1124 __raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */
1125
1082 /* set SPU2 clock to 119.6 MHz */ 1126 /* set SPU2 clock to 119.6 MHz */
1083 clk = clk_get(NULL, "spu_clk"); 1127 clk = clk_get(NULL, "spu_clk");
1084 if (!IS_ERR(clk)) { 1128 if (!IS_ERR(clk)) {