diff options
author | Daein Moon <moon9124@samsung.com> | 2010-10-25 03:30:40 -0400 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2010-10-25 19:40:12 -0400 |
commit | 09596ba07e81655dd8d90eb648cb443d48cdc9da (patch) | |
tree | 84fbac967501f226e45d855032958f3372a802e1 /arch | |
parent | a6149c09c96d2afdc73ff77f58d14f1e8946b1c6 (diff) |
ARM: S5PV310: Add support SROMC
This patch adds support SROMC for S5PV310 and S5PC210.
Signed-off-by: Daein Moon <moon9124@samsung.com>
Signed-off-by: Sangbeom Kim <sbkim73@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-s5pv310/cpu.c | 5 | ||||
-rw-r--r-- | arch/arm/mach-s5pv310/include/mach/map.h | 4 | ||||
-rw-r--r-- | arch/arm/mach-s5pv310/include/mach/regs-srom.h | 50 |
3 files changed, 59 insertions, 0 deletions
diff --git a/arch/arm/mach-s5pv310/cpu.c b/arch/arm/mach-s5pv310/cpu.c index 4e3f5be264ef..82ce4aa6d61a 100644 --- a/arch/arm/mach-s5pv310/cpu.c +++ b/arch/arm/mach-s5pv310/cpu.c | |||
@@ -77,6 +77,11 @@ static struct map_desc s5pv310_iodesc[] __initdata = { | |||
77 | .pfn = __phys_to_pfn(S3C_PA_UART), | 77 | .pfn = __phys_to_pfn(S3C_PA_UART), |
78 | .length = SZ_512K, | 78 | .length = SZ_512K, |
79 | .type = MT_DEVICE, | 79 | .type = MT_DEVICE, |
80 | }, { | ||
81 | .virtual = (unsigned long)S5P_VA_SROMC, | ||
82 | .pfn = __phys_to_pfn(S5PV310_PA_SROMC), | ||
83 | .length = SZ_4K, | ||
84 | .type = MT_DEVICE, | ||
80 | }, | 85 | }, |
81 | }; | 86 | }; |
82 | 87 | ||
diff --git a/arch/arm/mach-s5pv310/include/mach/map.h b/arch/arm/mach-s5pv310/include/mach/map.h index 1e3384fba13a..7acf4e77e92e 100644 --- a/arch/arm/mach-s5pv310/include/mach/map.h +++ b/arch/arm/mach-s5pv310/include/mach/map.h | |||
@@ -25,6 +25,8 @@ | |||
25 | 25 | ||
26 | #define S5PV310_PA_SYSRAM (0x02025000) | 26 | #define S5PV310_PA_SYSRAM (0x02025000) |
27 | 27 | ||
28 | #define S5PV310_PA_SROM_BANK(x) (0x04000000 + ((x) * 0x01000000)) | ||
29 | |||
28 | #define S5PC210_PA_ONENAND (0x0C000000) | 30 | #define S5PC210_PA_ONENAND (0x0C000000) |
29 | #define S5P_PA_ONENAND S5PC210_PA_ONENAND | 31 | #define S5P_PA_ONENAND S5PC210_PA_ONENAND |
30 | 32 | ||
@@ -56,6 +58,8 @@ | |||
56 | 58 | ||
57 | #define S5PV310_PA_HSMMC(x) (0x12510000 + ((x) * 0x10000)) | 59 | #define S5PV310_PA_HSMMC(x) (0x12510000 + ((x) * 0x10000)) |
58 | 60 | ||
61 | #define S5PV310_PA_SROMC (0x12570000) | ||
62 | |||
59 | #define S5PV310_PA_UART (0x13800000) | 63 | #define S5PV310_PA_UART (0x13800000) |
60 | 64 | ||
61 | #define S5P_PA_UART(x) (S5PV310_PA_UART + ((x) * S3C_UART_OFFSET)) | 65 | #define S5P_PA_UART(x) (S5PV310_PA_UART + ((x) * S3C_UART_OFFSET)) |
diff --git a/arch/arm/mach-s5pv310/include/mach/regs-srom.h b/arch/arm/mach-s5pv310/include/mach/regs-srom.h new file mode 100644 index 000000000000..1898b3e10550 --- /dev/null +++ b/arch/arm/mach-s5pv310/include/mach/regs-srom.h | |||
@@ -0,0 +1,50 @@ | |||
1 | /* linux/arch/arm/mach-s5pv310/include/mach/regs-srom.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * S5PV310 - SROMC register definitions | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_REGS_SROM_H | ||
14 | #define __ASM_ARCH_REGS_SROM_H __FILE__ | ||
15 | |||
16 | #include <mach/map.h> | ||
17 | |||
18 | #define S5PV310_SROMREG(x) (S5P_VA_SROMC + (x)) | ||
19 | |||
20 | #define S5PV310_SROM_BW S5PV310_SROMREG(0x0) | ||
21 | #define S5PV310_SROM_BC0 S5PV310_SROMREG(0x4) | ||
22 | #define S5PV310_SROM_BC1 S5PV310_SROMREG(0x8) | ||
23 | #define S5PV310_SROM_BC2 S5PV310_SROMREG(0xc) | ||
24 | #define S5PV310_SROM_BC3 S5PV310_SROMREG(0x10) | ||
25 | |||
26 | /* one register BW holds 4 x 4-bit packed settings for NCS0 - NCS3 */ | ||
27 | |||
28 | #define S5PV310_SROM_BW__DATAWIDTH__SHIFT 0 | ||
29 | #define S5PV310_SROM_BW__ADDRMODE__SHIFT 1 | ||
30 | #define S5PV310_SROM_BW__WAITENABLE__SHIFT 2 | ||
31 | #define S5PV310_SROM_BW__BYTEENABLE__SHIFT 3 | ||
32 | |||
33 | #define S5PV310_SROM_BW__CS_MASK 0xf | ||
34 | |||
35 | #define S5PV310_SROM_BW__NCS0__SHIFT 0 | ||
36 | #define S5PV310_SROM_BW__NCS1__SHIFT 4 | ||
37 | #define S5PV310_SROM_BW__NCS2__SHIFT 8 | ||
38 | #define S5PV310_SROM_BW__NCS3__SHIFT 12 | ||
39 | |||
40 | /* applies to same to BCS0 - BCS3 */ | ||
41 | |||
42 | #define S5PV310_SROM_BCX__PMC__SHIFT 0 | ||
43 | #define S5PV310_SROM_BCX__TACP__SHIFT 4 | ||
44 | #define S5PV310_SROM_BCX__TCAH__SHIFT 8 | ||
45 | #define S5PV310_SROM_BCX__TCOH__SHIFT 12 | ||
46 | #define S5PV310_SROM_BCX__TACC__SHIFT 16 | ||
47 | #define S5PV310_SROM_BCX__TCOS__SHIFT 24 | ||
48 | #define S5PV310_SROM_BCX__TACS__SHIFT 28 | ||
49 | |||
50 | #endif /* __ASM_ARCH_REGS_SROM_H */ | ||