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authorAnton Vorontsov <avorontsov@ru.mvista.com>2009-01-07 20:31:41 -0500
committerKumar Gala <galak@kernel.crashing.org>2009-01-28 19:16:48 -0500
commit0585a155a7318e69d43ef20636c2f072ad17d03f (patch)
tree1d91b03a7ffa554efa659abc574246f5c61009ac /arch
parent598804cd041c395ce87302af9088b2f227196185 (diff)
powerpc/83xx: Add PCI-E support for all MPC83xx boards with PCI-E
This patch adds pcie nodes to the appropriate dts files, plus adds some probing code for the boards. Also, remove of_device_is_avaliable() check from the mpc837x_mds.c board file, as mpc83xx_add_bridge() has the same check now. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/boot/dts/mpc8315erdb.dts64
-rw-r--r--arch/powerpc/boot/dts/mpc8377_mds.dts64
-rw-r--r--arch/powerpc/boot/dts/mpc8377_rdb.dts64
-rw-r--r--arch/powerpc/boot/dts/mpc8378_mds.dts64
-rw-r--r--arch/powerpc/boot/dts/mpc8378_rdb.dts64
-rw-r--r--arch/powerpc/platforms/83xx/mpc831x_rdb.c2
-rw-r--r--arch/powerpc/platforms/83xx/mpc837x_mds.c10
-rw-r--r--arch/powerpc/platforms/83xx/mpc837x_rdb.c2
8 files changed, 327 insertions, 7 deletions
diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts
index 71784165b77e..88d691cccb38 100644
--- a/arch/powerpc/boot/dts/mpc8315erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8315erdb.dts
@@ -22,6 +22,8 @@
22 serial0 = &serial0; 22 serial0 = &serial0;
23 serial1 = &serial1; 23 serial1 = &serial1;
24 pci0 = &pci0; 24 pci0 = &pci0;
25 pci1 = &pci1;
26 pci2 = &pci2;
25 }; 27 };
26 28
27 cpus { 29 cpus {
@@ -349,4 +351,66 @@
349 compatible = "fsl,mpc8349-pci"; 351 compatible = "fsl,mpc8349-pci";
350 device_type = "pci"; 352 device_type = "pci";
351 }; 353 };
354
355 pci1: pcie@e0009000 {
356 #address-cells = <3>;
357 #size-cells = <2>;
358 #interrupt-cells = <1>;
359 device_type = "pci";
360 compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie";
361 reg = <0xe0009000 0x00001000>;
362 ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
363 0x01000000 0 0x00000000 0xb1000000 0 0x00800000>;
364 bus-range = <0 255>;
365 interrupt-map-mask = <0xf800 0 0 7>;
366 interrupt-map = <0 0 0 1 &ipic 1 8
367 0 0 0 2 &ipic 1 8
368 0 0 0 3 &ipic 1 8
369 0 0 0 4 &ipic 1 8>;
370 clock-frequency = <0>;
371
372 pcie@0 {
373 #address-cells = <3>;
374 #size-cells = <2>;
375 device_type = "pci";
376 reg = <0 0 0 0 0>;
377 ranges = <0x02000000 0 0xa0000000
378 0x02000000 0 0xa0000000
379 0 0x10000000
380 0x01000000 0 0x00000000
381 0x01000000 0 0x00000000
382 0 0x00800000>;
383 };
384 };
385
386 pci2: pcie@e000a000 {
387 #address-cells = <3>;
388 #size-cells = <2>;
389 #interrupt-cells = <1>;
390 device_type = "pci";
391 compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie";
392 reg = <0xe000a000 0x00001000>;
393 ranges = <0x02000000 0 0xc0000000 0xc0000000 0 0x10000000
394 0x01000000 0 0x00000000 0xd1000000 0 0x00800000>;
395 bus-range = <0 255>;
396 interrupt-map-mask = <0xf800 0 0 7>;
397 interrupt-map = <0 0 0 1 &ipic 2 8
398 0 0 0 2 &ipic 2 8
399 0 0 0 3 &ipic 2 8
400 0 0 0 4 &ipic 2 8>;
401 clock-frequency = <0>;
402
403 pcie@0 {
404 #address-cells = <3>;
405 #size-cells = <2>;
406 device_type = "pci";
407 reg = <0 0 0 0 0>;
408 ranges = <0x02000000 0 0xc0000000
409 0x02000000 0 0xc0000000
410 0 0x10000000
411 0x01000000 0 0x00000000
412 0x01000000 0 0x00000000
413 0 0x00800000>;
414 };
415 };
352}; 416};
diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts
index 1d14d7052e6d..a519e8571e89 100644
--- a/arch/powerpc/boot/dts/mpc8377_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8377_mds.dts
@@ -23,6 +23,8 @@
23 serial0 = &serial0; 23 serial0 = &serial0;
24 serial1 = &serial1; 24 serial1 = &serial1;
25 pci0 = &pci0; 25 pci0 = &pci0;
26 pci1 = &pci1;
27 pci2 = &pci2;
26 }; 28 };
27 29
28 cpus { 30 cpus {
@@ -409,4 +411,66 @@
409 compatible = "fsl,mpc8349-pci"; 411 compatible = "fsl,mpc8349-pci";
410 device_type = "pci"; 412 device_type = "pci";
411 }; 413 };
414
415 pci1: pcie@e0009000 {
416 #address-cells = <3>;
417 #size-cells = <2>;
418 #interrupt-cells = <1>;
419 device_type = "pci";
420 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
421 reg = <0xe0009000 0x00001000>;
422 ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
423 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
424 bus-range = <0 255>;
425 interrupt-map-mask = <0xf800 0 0 7>;
426 interrupt-map = <0 0 0 1 &ipic 1 8
427 0 0 0 2 &ipic 1 8
428 0 0 0 3 &ipic 1 8
429 0 0 0 4 &ipic 1 8>;
430 clock-frequency = <0>;
431
432 pcie@0 {
433 #address-cells = <3>;
434 #size-cells = <2>;
435 device_type = "pci";
436 reg = <0 0 0 0 0>;
437 ranges = <0x02000000 0 0xa8000000
438 0x02000000 0 0xa8000000
439 0 0x10000000
440 0x01000000 0 0x00000000
441 0x01000000 0 0x00000000
442 0 0x00800000>;
443 };
444 };
445
446 pci2: pcie@e000a000 {
447 #address-cells = <3>;
448 #size-cells = <2>;
449 #interrupt-cells = <1>;
450 device_type = "pci";
451 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
452 reg = <0xe000a000 0x00001000>;
453 ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
454 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
455 bus-range = <0 255>;
456 interrupt-map-mask = <0xf800 0 0 7>;
457 interrupt-map = <0 0 0 1 &ipic 2 8
458 0 0 0 2 &ipic 2 8
459 0 0 0 3 &ipic 2 8
460 0 0 0 4 &ipic 2 8>;
461 clock-frequency = <0>;
462
463 pcie@0 {
464 #address-cells = <3>;
465 #size-cells = <2>;
466 device_type = "pci";
467 reg = <0 0 0 0 0>;
468 ranges = <0x02000000 0 0xc8000000
469 0x02000000 0 0xc8000000
470 0 0x10000000
471 0x01000000 0 0x00000000
472 0x01000000 0 0x00000000
473 0 0x00800000>;
474 };
475 };
412}; 476};
diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts
index 9413af3b9925..b4ab3d091e6e 100644
--- a/arch/powerpc/boot/dts/mpc8377_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts
@@ -22,6 +22,8 @@
22 serial0 = &serial0; 22 serial0 = &serial0;
23 serial1 = &serial1; 23 serial1 = &serial1;
24 pci0 = &pci0; 24 pci0 = &pci0;
25 pci1 = &pci1;
26 pci2 = &pci2;
25 }; 27 };
26 28
27 cpus { 29 cpus {
@@ -350,4 +352,66 @@
350 compatible = "fsl,mpc8349-pci"; 352 compatible = "fsl,mpc8349-pci";
351 device_type = "pci"; 353 device_type = "pci";
352 }; 354 };
355
356 pci1: pcie@e0009000 {
357 #address-cells = <3>;
358 #size-cells = <2>;
359 #interrupt-cells = <1>;
360 device_type = "pci";
361 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
362 reg = <0xe0009000 0x00001000>;
363 ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
364 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
365 bus-range = <0 255>;
366 interrupt-map-mask = <0xf800 0 0 7>;
367 interrupt-map = <0 0 0 1 &ipic 1 8
368 0 0 0 2 &ipic 1 8
369 0 0 0 3 &ipic 1 8
370 0 0 0 4 &ipic 1 8>;
371 clock-frequency = <0>;
372
373 pcie@0 {
374 #address-cells = <3>;
375 #size-cells = <2>;
376 device_type = "pci";
377 reg = <0 0 0 0 0>;
378 ranges = <0x02000000 0 0xa8000000
379 0x02000000 0 0xa8000000
380 0 0x10000000
381 0x01000000 0 0x00000000
382 0x01000000 0 0x00000000
383 0 0x00800000>;
384 };
385 };
386
387 pci2: pcie@e000a000 {
388 #address-cells = <3>;
389 #size-cells = <2>;
390 #interrupt-cells = <1>;
391 device_type = "pci";
392 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
393 reg = <0xe000a000 0x00001000>;
394 ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
395 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
396 bus-range = <0 255>;
397 interrupt-map-mask = <0xf800 0 0 7>;
398 interrupt-map = <0 0 0 1 &ipic 2 8
399 0 0 0 2 &ipic 2 8
400 0 0 0 3 &ipic 2 8
401 0 0 0 4 &ipic 2 8>;
402 clock-frequency = <0>;
403
404 pcie@0 {
405 #address-cells = <3>;
406 #size-cells = <2>;
407 device_type = "pci";
408 reg = <0 0 0 0 0>;
409 ranges = <0x02000000 0 0xc8000000
410 0x02000000 0 0xc8000000
411 0 0x10000000
412 0x01000000 0 0x00000000
413 0x01000000 0 0x00000000
414 0 0x00800000>;
415 };
416 };
353}; 417};
diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts
index b85fc02682d2..6bbee4989fbe 100644
--- a/arch/powerpc/boot/dts/mpc8378_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8378_mds.dts
@@ -23,6 +23,8 @@
23 serial0 = &serial0; 23 serial0 = &serial0;
24 serial1 = &serial1; 24 serial1 = &serial1;
25 pci0 = &pci0; 25 pci0 = &pci0;
26 pci1 = &pci1;
27 pci2 = &pci2;
26 }; 28 };
27 29
28 cpus { 30 cpus {
@@ -395,4 +397,66 @@
395 compatible = "fsl,mpc8349-pci"; 397 compatible = "fsl,mpc8349-pci";
396 device_type = "pci"; 398 device_type = "pci";
397 }; 399 };
400
401 pci1: pcie@e0009000 {
402 #address-cells = <3>;
403 #size-cells = <2>;
404 #interrupt-cells = <1>;
405 device_type = "pci";
406 compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie";
407 reg = <0xe0009000 0x00001000>;
408 ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
409 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
410 bus-range = <0 255>;
411 interrupt-map-mask = <0xf800 0 0 7>;
412 interrupt-map = <0 0 0 1 &ipic 1 8
413 0 0 0 2 &ipic 1 8
414 0 0 0 3 &ipic 1 8
415 0 0 0 4 &ipic 1 8>;
416 clock-frequency = <0>;
417
418 pcie@0 {
419 #address-cells = <3>;
420 #size-cells = <2>;
421 device_type = "pci";
422 reg = <0 0 0 0 0>;
423 ranges = <0x02000000 0 0xa8000000
424 0x02000000 0 0xa8000000
425 0 0x10000000
426 0x01000000 0 0x00000000
427 0x01000000 0 0x00000000
428 0 0x00800000>;
429 };
430 };
431
432 pci2: pcie@e000a000 {
433 #address-cells = <3>;
434 #size-cells = <2>;
435 #interrupt-cells = <1>;
436 device_type = "pci";
437 compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie";
438 reg = <0xe000a000 0x00001000>;
439 ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
440 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
441 bus-range = <0 255>;
442 interrupt-map-mask = <0xf800 0 0 7>;
443 interrupt-map = <0 0 0 1 &ipic 2 8
444 0 0 0 2 &ipic 2 8
445 0 0 0 3 &ipic 2 8
446 0 0 0 4 &ipic 2 8>;
447 clock-frequency = <0>;
448
449 pcie@0 {
450 #address-cells = <3>;
451 #size-cells = <2>;
452 device_type = "pci";
453 reg = <0 0 0 0 0>;
454 ranges = <0x02000000 0 0xc8000000
455 0x02000000 0 0xc8000000
456 0 0x10000000
457 0x01000000 0 0x00000000
458 0x01000000 0 0x00000000
459 0 0x00800000>;
460 };
461 };
398}; 462};
diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts
index 23c10ce22c2c..1b05fb0bf383 100644
--- a/arch/powerpc/boot/dts/mpc8378_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts
@@ -22,6 +22,8 @@
22 serial0 = &serial0; 22 serial0 = &serial0;
23 serial1 = &serial1; 23 serial1 = &serial1;
24 pci0 = &pci0; 24 pci0 = &pci0;
25 pci1 = &pci1;
26 pci2 = &pci2;
25 }; 27 };
26 28
27 cpus { 29 cpus {
@@ -334,4 +336,66 @@
334 compatible = "fsl,mpc8349-pci"; 336 compatible = "fsl,mpc8349-pci";
335 device_type = "pci"; 337 device_type = "pci";
336 }; 338 };
339
340 pci1: pcie@e0009000 {
341 #address-cells = <3>;
342 #size-cells = <2>;
343 #interrupt-cells = <1>;
344 device_type = "pci";
345 compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie";
346 reg = <0xe0009000 0x00001000>;
347 ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
348 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
349 bus-range = <0 255>;
350 interrupt-map-mask = <0xf800 0 0 7>;
351 interrupt-map = <0 0 0 1 &ipic 1 8
352 0 0 0 2 &ipic 1 8
353 0 0 0 3 &ipic 1 8
354 0 0 0 4 &ipic 1 8>;
355 clock-frequency = <0>;
356
357 pcie@0 {
358 #address-cells = <3>;
359 #size-cells = <2>;
360 device_type = "pci";
361 reg = <0 0 0 0 0>;
362 ranges = <0x02000000 0 0xa8000000
363 0x02000000 0 0xa8000000
364 0 0x10000000
365 0x01000000 0 0x00000000
366 0x01000000 0 0x00000000
367 0 0x00800000>;
368 };
369 };
370
371 pci2: pcie@e000a000 {
372 #address-cells = <3>;
373 #size-cells = <2>;
374 #interrupt-cells = <1>;
375 device_type = "pci";
376 compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie";
377 reg = <0xe000a000 0x00001000>;
378 ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
379 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
380 bus-range = <0 255>;
381 interrupt-map-mask = <0xf800 0 0 7>;
382 interrupt-map = <0 0 0 1 &ipic 2 8
383 0 0 0 2 &ipic 2 8
384 0 0 0 3 &ipic 2 8
385 0 0 0 4 &ipic 2 8>;
386 clock-frequency = <0>;
387
388 pcie@0 {
389 #address-cells = <3>;
390 #size-cells = <2>;
391 device_type = "pci";
392 reg = <0 0 0 0 0>;
393 ranges = <0x02000000 0 0xc8000000
394 0x02000000 0 0xc8000000
395 0 0x10000000
396 0x01000000 0 0x00000000
397 0x01000000 0 0x00000000
398 0 0x00800000>;
399 };
400 };
337}; 401};
diff --git a/arch/powerpc/platforms/83xx/mpc831x_rdb.c b/arch/powerpc/platforms/83xx/mpc831x_rdb.c
index 91a2c80b9d72..0b4f883b20eb 100644
--- a/arch/powerpc/platforms/83xx/mpc831x_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc831x_rdb.c
@@ -38,6 +38,8 @@ static void __init mpc831x_rdb_setup_arch(void)
38#ifdef CONFIG_PCI 38#ifdef CONFIG_PCI
39 for_each_compatible_node(np, "pci", "fsl,mpc8349-pci") 39 for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
40 mpc83xx_add_bridge(np); 40 mpc83xx_add_bridge(np);
41 for_each_compatible_node(np, "pci", "fsl,mpc8314-pcie")
42 mpc83xx_add_bridge(np);
41#endif 43#endif
42 mpc831x_usb_cfg(); 44 mpc831x_usb_cfg();
43} 45}
diff --git a/arch/powerpc/platforms/83xx/mpc837x_mds.c b/arch/powerpc/platforms/83xx/mpc837x_mds.c
index 530ef990ca7c..634785cc4523 100644
--- a/arch/powerpc/platforms/83xx/mpc837x_mds.c
+++ b/arch/powerpc/platforms/83xx/mpc837x_mds.c
@@ -84,14 +84,10 @@ static void __init mpc837x_mds_setup_arch(void)
84 ppc_md.progress("mpc837x_mds_setup_arch()", 0); 84 ppc_md.progress("mpc837x_mds_setup_arch()", 0);
85 85
86#ifdef CONFIG_PCI 86#ifdef CONFIG_PCI
87 for_each_compatible_node(np, "pci", "fsl,mpc8349-pci") { 87 for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
88 if (!of_device_is_available(np)) { 88 mpc83xx_add_bridge(np);
89 pr_warning("%s: disabled by the firmware.\n", 89 for_each_compatible_node(np, "pci", "fsl,mpc8314-pcie")
90 np->full_name);
91 continue;
92 }
93 mpc83xx_add_bridge(np); 90 mpc83xx_add_bridge(np);
94 }
95#endif 91#endif
96 mpc837xmds_usb_cfg(); 92 mpc837xmds_usb_cfg();
97} 93}
diff --git a/arch/powerpc/platforms/83xx/mpc837x_rdb.c b/arch/powerpc/platforms/83xx/mpc837x_rdb.c
index 1d096545322b..3d7b953d40e1 100644
--- a/arch/powerpc/platforms/83xx/mpc837x_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc837x_rdb.c
@@ -38,6 +38,8 @@ static void __init mpc837x_rdb_setup_arch(void)
38#ifdef CONFIG_PCI 38#ifdef CONFIG_PCI
39 for_each_compatible_node(np, "pci", "fsl,mpc8349-pci") 39 for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
40 mpc83xx_add_bridge(np); 40 mpc83xx_add_bridge(np);
41 for_each_compatible_node(np, "pci", "fsl,mpc8314-pcie")
42 mpc83xx_add_bridge(np);
41#endif 43#endif
42 mpc837x_usb_cfg(); 44 mpc837x_usb_cfg();
43} 45}
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-22 10:51:16 -0500