Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc

Pull powerpc bugfix from Ben Herrenschmidt:
 "This is a fix for a regression causing a freescale "83xx" based
  platforms to crash on boot due to some PCI breakage"

* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc:
  powerpc/pci: Fix boot panic on mpc83xx (regression)

1 files changed, 9 insertions, 15 deletions

diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 028ac1f71b51..46ac1ddea683 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -97,22 +97,14 @@ static int fsl_indirect_read_config(struct pci_bus *bus, unsigned int devfn,
         return indirect_read_config(bus, devfn, offset, len, val);
 }
 
-static struct pci_ops fsl_indirect_pci_ops =
+#if defined(CONFIG_FSL_SOC_BOOKE) || defined(CONFIG_PPC_86xx)
+
+static struct pci_ops fsl_indirect_pcie_ops =
 {
         .read = fsl_indirect_read_config,
         .write = indirect_write_config,
 };
 
-static void __init fsl_setup_indirect_pci(struct pci_controller* hose,
-                                          resource_size_t cfg_addr,
-                                          resource_size_t cfg_data, u32 flags)
-{
-        setup_indirect_pci(hose, cfg_addr, cfg_data, flags);
-        hose->ops = &fsl_indirect_pci_ops;
-}
-
-#if defined(CONFIG_FSL_SOC_BOOKE) || defined(CONFIG_PPC_86xx)
-
 #define MAX_PHYS_ADDR_BITS      40
 static u64 pci64_dma_offset = 1ull << MAX_PHYS_ADDR_BITS;
 
@@ -504,13 +496,15 @@ int __init fsl_add_bridge(struct platform_device *pdev, int is_primary)
         if (!hose->private_data)
                 goto no_bridge;
 
-        fsl_setup_indirect_pci(hose, rsrc.start, rsrc.start + 0x4,
-                               PPC_INDIRECT_TYPE_BIG_ENDIAN);
+        setup_indirect_pci(hose, rsrc.start, rsrc.start + 0x4,
+                           PPC_INDIRECT_TYPE_BIG_ENDIAN);
 
         if (in_be32(&pci->block_rev1) < PCIE_IP_REV_3_0)
                 hose->indirect_type |= PPC_INDIRECT_TYPE_FSL_CFG_REG_LINK;
 
         if (early_find_capability(hose, 0, 0, PCI_CAP_ID_EXP)) {
+                /* use fsl_indirect_read_config for PCIe */
+                hose->ops = &fsl_indirect_pcie_ops;
                 /* For PCIE read HEADER_TYPE to identify controler mode */
                 early_read_config_byte(hose, 0, 0, PCI_HEADER_TYPE, &hdr_type);
                 if ((hdr_type & 0x7f) != PCI_HEADER_TYPE_BRIDGE)
@@ -814,8 +808,8 @@ int __init mpc83xx_add_bridge(struct device_node *dev)
                 if (ret)
                         goto err0;
         } else {
-                fsl_setup_indirect_pci(hose, rsrc_cfg.start,
-                                       rsrc_cfg.start + 4, 0);
+                setup_indirect_pci(hose, rsrc_cfg.start,
+                                   rsrc_cfg.start + 4, 0);
         }
 
         printk(KERN_INFO "Found FSL PCI host bridge at 0x%016llx. "