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authorHeiko Carstens <heiko.carstens@de.ibm.com>2012-10-31 12:14:39 -0400
committerMartin Schwidefsky <schwidefsky@de.ibm.com>2012-11-06 16:39:51 -0500
commit99e639b791f5cfae0b8d42f5fe6c1e8839932bea (patch)
treecc4e2ff1f0c903aa56e2156bfaeda6ba43bae8bf /arch
parent619506d5dabb49b7f223a4f2f6b8d697574dd799 (diff)
s390/sclp: fix addressing mode clobber
The early mini sclp driver may be called in zArch mode either in 31 or 64 bit addressing mode. If called in 31 bit addressing mode the new external interrupt psw however would switch to 64 bit addressing mode. This would cause an addressing exception within the interrupt handler, since the code didn't expect the zArch/31 bit addressing mode combination. Fix this by setting the new psw addressing mode bits so they fit the current addressing mode. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/s390/kernel/sclp.S8
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/s390/kernel/sclp.S b/arch/s390/kernel/sclp.S
index bf053898630d..b6506ee32a36 100644
--- a/arch/s390/kernel/sclp.S
+++ b/arch/s390/kernel/sclp.S
@@ -44,6 +44,12 @@ _sclp_wait_int:
44#endif 44#endif
45 mvc .LoldpswS1-.LbaseS1(16,%r13),0(%r8) 45 mvc .LoldpswS1-.LbaseS1(16,%r13),0(%r8)
46 mvc 0(16,%r8),0(%r9) 46 mvc 0(16,%r8),0(%r9)
47#ifdef CONFIG_64BIT
48 epsw %r6,%r7 # set current addressing mode
49 nill %r6,0x1 # in new psw (31 or 64 bit mode)
50 nilh %r7,0x8000
51 stm %r6,%r7,0(%r8)
52#endif
47 lhi %r6,0x0200 # cr mask for ext int (cr0.54) 53 lhi %r6,0x0200 # cr mask for ext int (cr0.54)
48 ltr %r2,%r2 54 ltr %r2,%r2
49 jz .LsetctS1 55 jz .LsetctS1
@@ -87,7 +93,7 @@ _sclp_wait_int:
87 .long 0x00080000, 0x80000000+.LwaitS1 # PSW to handle ext int 93 .long 0x00080000, 0x80000000+.LwaitS1 # PSW to handle ext int
88#ifdef CONFIG_64BIT 94#ifdef CONFIG_64BIT
89.LextpswS1_64: 95.LextpswS1_64:
90 .quad 0x0000000180000000, .LwaitS1 # PSW to handle ext int, 64 bit 96 .quad 0, .LwaitS1 # PSW to handle ext int, 64 bit
91#endif 97#endif
92.LwaitpswS1: 98.LwaitpswS1:
93 .long 0x010a0000, 0x00000000+.LloopS1 # PSW to wait for ext int 99 .long 0x010a0000, 0x00000000+.LloopS1 # PSW to wait for ext int