Merge 3.6-rc3 into staging-next

This picks up fixes we want in this branch to allow us to properly test.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

175 files changed, 1969 insertions, 2531 deletions

diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig
index d5b9b5e645cc..9944dedee5b1 100644
--- a/arch/alpha/Kconfig
+++ b/arch/alpha/Kconfig
@@ -18,6 +18,8 @@ config ALPHA
         select ARCH_HAVE_NMI_SAFE_CMPXCHG
         select GENERIC_SMP_IDLE_THREAD
         select GENERIC_CMOS_UPDATE
+        select GENERIC_STRNCPY_FROM_USER
+        select GENERIC_STRNLEN_USER
         help
           The Alpha is a 64-bit general-purpose processor designed and
           marketed by the Digital Equipment Corporation of blessed memory,
diff --git a/arch/alpha/include/asm/atomic.h b/arch/alpha/include/asm/atomic.h
index 3bb7ffeae3bc..c2cbe4fc391c 100644
--- a/arch/alpha/include/asm/atomic.h
+++ b/arch/alpha/include/asm/atomic.h
@@ -14,8 +14,8 @@
  */
 
 
-#define ATOMIC_INIT(i)          ( (atomic_t) { (i) } )
-#define ATOMIC64_INIT(i)        ( (atomic64_t) { (i) } )
+#define ATOMIC_INIT(i)          { (i) }
+#define ATOMIC64_INIT(i)        { (i) }
 
 #define atomic_read(v)          (*(volatile int *)&(v)->counter)
 #define atomic64_read(v)        (*(volatile long *)&(v)->counter)
diff --git a/arch/alpha/include/asm/fpu.h b/arch/alpha/include/asm/fpu.h
index db00f7885faa..e477bcd5b94a 100644
--- a/arch/alpha/include/asm/fpu.h
+++ b/arch/alpha/include/asm/fpu.h
@@ -1,7 +1,9 @@
 #ifndef __ASM_ALPHA_FPU_H
 #define __ASM_ALPHA_FPU_H
 
+#ifdef __KERNEL__
 #include <asm/special_insns.h>
+#endif
 
 /*
  * Alpha floating-point control register defines:
diff --git a/arch/alpha/include/asm/ptrace.h b/arch/alpha/include/asm/ptrace.h
index fd698a174f26..b87755a19554 100644
--- a/arch/alpha/include/asm/ptrace.h
+++ b/arch/alpha/include/asm/ptrace.h
@@ -76,7 +76,10 @@ struct switch_stack {
 #define task_pt_regs(task) \
   ((struct pt_regs *) (task_stack_page(task) + 2*PAGE_SIZE) - 1)
 
-#define force_successful_syscall_return() (task_pt_regs(current)->r0 = 0)
+#define current_pt_regs() \
+  ((struct pt_regs *) ((char *)current_thread_info() + 2*PAGE_SIZE) - 1)
+
+#define force_successful_syscall_return() (current_pt_regs()->r0 = 0)
 
 #endif
 
diff --git a/arch/alpha/include/asm/socket.h b/arch/alpha/include/asm/socket.h
index dcb221a4b5be..7d2f75be932e 100644
--- a/arch/alpha/include/asm/socket.h
+++ b/arch/alpha/include/asm/socket.h
@@ -76,9 +76,11 @@
 /* Instruct lower device to use last 4-bytes of skb data as FCS */
 #define SO_NOFCS                43
 
+#ifdef __KERNEL__
 /* O_NONBLOCK clashes with the bits used for socket types.  Therefore we
  * have to define SOCK_NONBLOCK to a different value here.
  */
 #define SOCK_NONBLOCK   0x40000000
+#endif /* __KERNEL__ */
 
 #endif /* _ASM_SOCKET_H */
diff --git a/arch/alpha/include/asm/uaccess.h b/arch/alpha/include/asm/uaccess.h
index b49ec2f8d6e3..766fdfde2b7a 100644
--- a/arch/alpha/include/asm/uaccess.h
+++ b/arch/alpha/include/asm/uaccess.h
@@ -433,36 +433,12 @@ clear_user(void __user *to, long len)
 #undef __module_address
 #undef __module_call
 
-/* Returns: -EFAULT if exception before terminator, N if the entire
-   buffer filled, else strlen.  */
+#define user_addr_max() \
+        (segment_eq(get_fs(), USER_DS) ? TASK_SIZE : ~0UL)
 
-extern long __strncpy_from_user(char *__to, const char __user *__from, long __to_len);
-
-extern inline long
-strncpy_from_user(char *to, const char __user *from, long n)
-{
-        long ret = -EFAULT;
-        if (__access_ok((unsigned long)from, 0, get_fs()))
-                ret = __strncpy_from_user(to, from, n);
-        return ret;
-}
-
-/* Returns: 0 if bad, string length+1 (memory size) of string if ok */
-extern long __strlen_user(const char __user *);
-
-extern inline long strlen_user(const char __user *str)
-{
-        return access_ok(VERIFY_READ,str,0) ? __strlen_user(str) : 0;
-}
-
-/* Returns: 0 if exception before NUL or reaching the supplied limit (N),
- * a value greater than N if the limit would be exceeded, else strlen.  */
-extern long __strnlen_user(const char __user *, long);
-
-extern inline long strnlen_user(const char __user *str, long n)
-{
-        return access_ok(VERIFY_READ,str,0) ? __strnlen_user(str, n) : 0;
-}
+extern long strncpy_from_user(char *dest, const char __user *src, long count);
+extern __must_check long strlen_user(const char __user *str);
+extern __must_check long strnlen_user(const char __user *str, long n);
 
 /*
  * About the exception table:
diff --git a/arch/alpha/include/asm/unistd.h b/arch/alpha/include/asm/unistd.h
index 633b23b0664a..a31a78eac9b9 100644
--- a/arch/alpha/include/asm/unistd.h
+++ b/arch/alpha/include/asm/unistd.h
@@ -465,10 +465,12 @@
 #define __NR_setns                      501
 #define __NR_accept4                    502
 #define __NR_sendmmsg                   503
+#define __NR_process_vm_readv           504
+#define __NR_process_vm_writev          505
 
 #ifdef __KERNEL__
 
-#define NR_SYSCALLS                     504
+#define NR_SYSCALLS                     506
 
 #define __ARCH_WANT_OLD_READDIR
 #define __ARCH_WANT_STAT64
diff --git a/arch/alpha/include/asm/word-at-a-time.h b/arch/alpha/include/asm/word-at-a-time.h
new file mode 100644
index 000000000000..6b340d0f1521
--- /dev/null
+++ b/arch/alpha/include/asm/word-at-a-time.h
@@ -0,0 +1,55 @@
+#ifndef _ASM_WORD_AT_A_TIME_H
+#define _ASM_WORD_AT_A_TIME_H
+
+#include <asm/compiler.h>
+
+/*
+ * word-at-a-time interface for Alpha.
+ */
+
+/*
+ * We do not use the word_at_a_time struct on Alpha, but it needs to be
+ * implemented to humour the generic code.
+ */
+struct word_at_a_time {
+        const unsigned long unused;
+};
+
+#define WORD_AT_A_TIME_CONSTANTS { 0 }
+
+/* Return nonzero if val has a zero */
+static inline unsigned long has_zero(unsigned long val, unsigned long *bits, const struct word_at_a_time *c)
+{
+        unsigned long zero_locations = __kernel_cmpbge(0, val);
+        *bits = zero_locations;
+        return zero_locations;
+}
+
+static inline unsigned long prep_zero_mask(unsigned long val, unsigned long bits, const struct word_at_a_time *c)
+{
+        return bits;
+}
+
+#define create_zero_mask(bits) (bits)
+
+static inline unsigned long find_zero(unsigned long bits)
+{
+#if defined(CONFIG_ALPHA_EV6) && defined(CONFIG_ALPHA_EV67)
+        /* Simple if have CIX instructions */
+        return __kernel_cttz(bits);
+#else
+        unsigned long t1, t2, t3;
+        /* Retain lowest set bit only */
+        bits &= -bits;
+        /* Binary search for lowest set bit */
+        t1 = bits & 0xf0;
+        t2 = bits & 0xcc;
+        t3 = bits & 0xaa;
+        if (t1) t1 = 4;
+        if (t2) t2 = 2;
+        if (t3) t3 = 1;
+        return t1 + t2 + t3;
+#endif
+}
+
+#endif /* _ASM_WORD_AT_A_TIME_H */
diff --git a/arch/alpha/kernel/alpha_ksyms.c b/arch/alpha/kernel/alpha_ksyms.c
index d96e742d4dc2..15fa821d09cd 100644
--- a/arch/alpha/kernel/alpha_ksyms.c
+++ b/arch/alpha/kernel/alpha_ksyms.c
@@ -52,7 +52,6 @@ EXPORT_SYMBOL(alpha_write_fp_reg_s);
 
 /* entry.S */
 EXPORT_SYMBOL(kernel_thread);
-EXPORT_SYMBOL(kernel_execve);
 
 /* Networking helper routines. */
 EXPORT_SYMBOL(csum_tcpudp_magic);
@@ -74,8 +73,6 @@ EXPORT_SYMBOL(alpha_fp_emul);
  */
 EXPORT_SYMBOL(__copy_user);
 EXPORT_SYMBOL(__do_clear_user);
-EXPORT_SYMBOL(__strncpy_from_user);
-EXPORT_SYMBOL(__strnlen_user);
 
 /* 
  * SMP-specific symbols.
diff --git a/arch/alpha/kernel/entry.S b/arch/alpha/kernel/entry.S
index 6d159cee5f2f..ec0da0567ab5 100644
--- a/arch/alpha/kernel/entry.S
+++ b/arch/alpha/kernel/entry.S
@@ -663,58 +663,6 @@ kernel_thread:
         br      ret_to_kernel
 .end kernel_thread
 
-/*
- * kernel_execve(path, argv, envp)
- */
-        .align  4
-        .globl  kernel_execve
-        .ent    kernel_execve
-kernel_execve:
-        /* We can be called from a module.  */
-        ldgp    $gp, 0($27)
-        lda     $sp, -(32+SIZEOF_PT_REGS+8)($sp)
-        .frame  $sp, 32+SIZEOF_PT_REGS+8, $26, 0
-        stq     $26, 0($sp)
-        stq     $16, 8($sp)
-        stq     $17, 16($sp)
-        stq     $18, 24($sp)
-        .prologue 1
-
-        lda     $16, 32($sp)
-        lda     $17, 0
-        lda     $18, SIZEOF_PT_REGS
-        bsr     $26, memset             !samegp
-
-        /* Avoid the HAE being gratuitously wrong, which would cause us
-           to do the whole turn off interrupts thing and restore it.  */
-        ldq     $2, alpha_mv+HAE_CACHE
-        stq     $2, 152+32($sp)
-
-        ldq     $16, 8($sp)
-        ldq     $17, 16($sp)
-        ldq     $18, 24($sp)
-        lda     $19, 32($sp)
-        bsr     $26, do_execve          !samegp
-
-        ldq     $26, 0($sp)
-        bne     $0, 1f                  /* error! */
-
-        /* Move the temporary pt_regs struct from its current location
-           to the top of the kernel stack frame.  See copy_thread for
-           details for a normal process.  */
-        lda     $16, 0x4000 - SIZEOF_PT_REGS($8)
-        lda     $17, 32($sp)
-        lda     $18, SIZEOF_PT_REGS
-        bsr     $26, memmove            !samegp
-
-        /* Take that over as our new stack frame and visit userland!  */
-        lda     $sp, 0x4000 - SIZEOF_PT_REGS($8)
-        br      $31, ret_from_sys_call
-
-1:      lda     $sp, 32+SIZEOF_PT_REGS+8($sp)
-        ret
-.end kernel_execve
-
 
 /*
  * Special system calls.  Most of these are special in that they either
@@ -797,115 +745,6 @@ sys_rt_sigreturn:
 .end sys_rt_sigreturn
 
         .align  4
-        .globl  sys_sethae
-        .ent    sys_sethae
-sys_sethae:
-        .prologue 0
-        stq     $16, 152($sp)
-        ret
-.end sys_sethae
-
-        .align  4
-        .globl  osf_getpriority
-        .ent    osf_getpriority
-osf_getpriority:
-        lda     $sp, -16($sp)
-        stq     $26, 0($sp)
-        .prologue 0
-
-        jsr     $26, sys_getpriority
-
-        ldq     $26, 0($sp)
-        blt     $0, 1f
-
-        /* Return value is the unbiased priority, i.e. 20 - prio.
-           This does result in negative return values, so signal
-           no error by writing into the R0 slot.  */
-        lda     $1, 20
-        stq     $31, 16($sp)
-        subl    $1, $0, $0
-        unop
-
-1:      lda     $sp, 16($sp)
-        ret
-.end osf_getpriority
-
-        .align  4
-        .globl  sys_getxuid
-        .ent    sys_getxuid
-sys_getxuid:
-        .prologue 0
-        ldq     $2, TI_TASK($8)
-        ldq     $3, TASK_CRED($2)
-        ldl     $0, CRED_UID($3)
-        ldl     $1, CRED_EUID($3)
-        stq     $1, 80($sp)
-        ret
-.end sys_getxuid
-
-        .align  4
-        .globl  sys_getxgid
-        .ent    sys_getxgid
-sys_getxgid:
-        .prologue 0
-        ldq     $2, TI_TASK($8)
-        ldq     $3, TASK_CRED($2)
-        ldl     $0, CRED_GID($3)
-        ldl     $1, CRED_EGID($3)
-        stq     $1, 80($sp)
-        ret
-.end sys_getxgid
-
-        .align  4
-        .globl  sys_getxpid
-        .ent    sys_getxpid
-sys_getxpid:
-        .prologue 0
-        ldq     $2, TI_TASK($8)
-
-        /* See linux/kernel/timer.c sys_getppid for discussion
-           about this loop.  */
-        ldq     $3, TASK_GROUP_LEADER($2)
-        ldq     $4, TASK_REAL_PARENT($3)
-        ldl     $0, TASK_TGID($2)
-1:      ldl     $1, TASK_TGID($4)
-#ifdef CONFIG_SMP
-        mov     $4, $5
-        mb
-        ldq     $3, TASK_GROUP_LEADER($2)
-        ldq     $4, TASK_REAL_PARENT($3)
-        cmpeq   $4, $5, $5
-        beq     $5, 1b
-#endif
-        stq     $1, 80($sp)
-        ret
-.end sys_getxpid
-
-        .align  4
-        .globl  sys_alpha_pipe
-        .ent    sys_alpha_pipe
-sys_alpha_pipe:
-        lda     $sp, -16($sp)
-        stq     $26, 0($sp)
-        .prologue 0
-
-        mov     $31, $17
-        lda     $16, 8($sp)
-        jsr     $26, do_pipe_flags
-
-        ldq     $26, 0($sp)
-        bne     $0, 1f
-
-        /* The return values are in $0 and $20.  */
-        ldl     $1, 12($sp)
-        ldl     $0, 8($sp)
-
-        stq     $1, 80+16($sp)
-1:      lda     $sp, 16($sp)
-        ret
-.end sys_alpha_pipe
-
-        .align  4
         .globl  sys_execve
         .ent    sys_execve
 sys_execve:
diff --git a/arch/alpha/kernel/osf_sys.c b/arch/alpha/kernel/osf_sys.c
index 98a103621af6..bc1acdda7a5e 100644
--- a/arch/alpha/kernel/osf_sys.c
+++ b/arch/alpha/kernel/osf_sys.c
@@ -1404,3 +1404,52 @@ SYSCALL_DEFINE3(osf_writev, unsigned long, fd,
 }
 
 #endif
+
+SYSCALL_DEFINE2(osf_getpriority, int, which, int, who)
+{
+        int prio = sys_getpriority(which, who);
+        if (prio >= 0) {
+                /* Return value is the unbiased priority, i.e. 20 - prio.
+                   This does result in negative return values, so signal
+                   no error */
+                force_successful_syscall_return();
+                prio = 20 - prio;
+        }
+        return prio;
+}
+
+SYSCALL_DEFINE0(getxuid)
+{
+        current_pt_regs()->r20 = sys_geteuid();
+        return sys_getuid();
+}
+
+SYSCALL_DEFINE0(getxgid)
+{
+        current_pt_regs()->r20 = sys_getegid();
+        return sys_getgid();
+}
+
+SYSCALL_DEFINE0(getxpid)
+{
+        current_pt_regs()->r20 = sys_getppid();
+        return sys_getpid();
+}
+
+SYSCALL_DEFINE0(alpha_pipe)
+{
+        int fd[2];
+        int res = do_pipe_flags(fd, 0);
+        if (!res) {
+                /* The return values are in $0 and $20.  */
+                current_pt_regs()->r20 = fd[1];
+                res = fd[0];
+        }
+        return res;
+}
+
+SYSCALL_DEFINE1(sethae, unsigned long, val)
+{
+        current_pt_regs()->hae = val;
+        return 0;
+}
diff --git a/arch/alpha/kernel/process.c b/arch/alpha/kernel/process.c
index 153d3fce3e8e..d6fde98b74b3 100644
--- a/arch/alpha/kernel/process.c
+++ b/arch/alpha/kernel/process.c
@@ -455,3 +455,22 @@ get_wchan(struct task_struct *p)
         }
         return pc;
 }
+
+int kernel_execve(const char *path, const char *const argv[], const char *const envp[])
+{
+        /* Avoid the HAE being gratuitously wrong, which would cause us
+           to do the whole turn off interrupts thing and restore it.  */
+        struct pt_regs regs = {.hae = alpha_mv.hae_cache};
+        int err = do_execve(path, argv, envp, &regs);
+        if (!err) {
+                struct pt_regs *p = current_pt_regs();
+                /* copy regs to normal position and off to userland we go... */
+                *p = regs;
+                __asm__ __volatile__ (
+                        "mov    %0, $sp;"
+                        "br     $31, ret_from_sys_call"
+                        : : "r"(p));
+        }
+        return err;
+}
+EXPORT_SYMBOL(kernel_execve);
diff --git a/arch/alpha/kernel/systbls.S b/arch/alpha/kernel/systbls.S
index 87835235f114..2ac6b45c3e00 100644
--- a/arch/alpha/kernel/systbls.S
+++ b/arch/alpha/kernel/systbls.S
@@ -111,7 +111,7 @@ sys_call_table:
         .quad sys_socket
         .quad sys_connect
         .quad sys_accept
-        .quad osf_getpriority                   /* 100 */
+        .quad sys_osf_getpriority                       /* 100 */
         .quad sys_send
         .quad sys_recv
         .quad sys_sigreturn
@@ -522,6 +522,8 @@ sys_call_table:
         .quad sys_setns
         .quad sys_accept4
         .quad sys_sendmmsg
+        .quad sys_process_vm_readv
+        .quad sys_process_vm_writev             /* 505 */
 
         .size sys_call_table, . - sys_call_table
         .type sys_call_table, @object
diff --git a/arch/alpha/lib/Makefile b/arch/alpha/lib/Makefile
index c0a83ab62b78..59660743237c 100644
--- a/arch/alpha/lib/Makefile
+++ b/arch/alpha/lib/Makefile
@@ -31,8 +31,6 @@ lib-y =	__divqu.o __remqu.o __divlu.o __remlu.o \
         $(ev6-y)memchr.o \
         $(ev6-y)copy_user.o \
         $(ev6-y)clear_user.o \
-        $(ev6-y)strncpy_from_user.o \
-        $(ev67-y)strlen_user.o \
         $(ev6-y)csum_ipv6_magic.o \
         $(ev6-y)clear_page.o \
         $(ev6-y)copy_page.o \
diff --git a/arch/alpha/lib/ev6-strncpy_from_user.S b/arch/alpha/lib/ev6-strncpy_from_user.S
deleted file mode 100644
index d2e28178cacc..000000000000
--- a/arch/alpha/lib/ev6-strncpy_from_user.S
+++ /dev/null
@@ -1,424 +0,0 @@
-/*
- * arch/alpha/lib/ev6-strncpy_from_user.S
- * 21264 version contributed by Rick Gorton <rick.gorton@alpha-processor.com>
- *
- * Just like strncpy except in the return value:
- *
- * -EFAULT       if an exception occurs before the terminator is copied.
- * N             if the buffer filled.
- *
- * Otherwise the length of the string is returned.
- *
- * Much of the information about 21264 scheduling/coding comes from:
- *      Compiler Writer's Guide for the Alpha 21264
- *      abbreviated as 'CWG' in other comments here
- *      ftp.digital.com/pub/Digital/info/semiconductor/literature/dsc-library.html
- * Scheduling notation:
- *      E       - either cluster
- *      U       - upper subcluster; U0 - subcluster U0; U1 - subcluster U1
- *      L       - lower subcluster; L0 - subcluster L0; L1 - subcluster L1
- * A bunch of instructions got moved and temp registers were changed
- * to aid in scheduling.  Control flow was also re-arranged to eliminate
- * branches, and to provide longer code sequences to enable better scheduling.
- * A total rewrite (using byte load/stores for start & tail sequences)
- * is desirable, but very difficult to do without a from-scratch rewrite.
- * Save that for the future.
- */
-
-
-#include <asm/errno.h>
-#include <asm/regdef.h>
-
-
-/* Allow an exception for an insn; exit if we get one.  */
-#define EX(x,y...)                      \
-        99: x,##y;                      \
-        .section __ex_table,"a";        \
-        .long 99b - .;                  \
-        lda $31, $exception-99b($0);    \
-        .previous
-
-
-        .set noat
-        .set noreorder
-        .text
-
-        .globl __strncpy_from_user
-        .ent __strncpy_from_user
-        .frame $30, 0, $26
-        .prologue 0
-
-        .align 4
-__strncpy_from_user:
-        and     a0, 7, t3       # E : find dest misalignment
-        beq     a2, $zerolength # U :
-
-        /* Are source and destination co-aligned?  */
-        mov     a0, v0          # E : save the string start
-        xor     a0, a1, t4      # E :
-        EX( ldq_u t1, 0(a1) )   # L : Latency=3 load first quadword
-        ldq_u   t0, 0(a0)       # L : load first (partial) aligned dest quadword
-
-        addq    a2, t3, a2      # E : bias count by dest misalignment
-        subq    a2, 1, a3       # E :
-        addq    zero, 1, t10    # E :
-        and     t4, 7, t4       # E : misalignment between the two
-
-        and     a3, 7, t6       # E : number of tail bytes
-        sll     t10, t6, t10    # E : t10 = bitmask of last count byte
-        bne     t4, $unaligned  # U :
-        lda     t2, -1          # E : build a mask against false zero
-
-        /*
-         * We are co-aligned; take care of a partial first word.
-         * On entry to this basic block:
-         * t0 == the first destination word for masking back in
-         * t1 == the first source word.
-         */
-
-        srl     a3, 3, a2       # E : a2 = loop counter = (count - 1)/8
-        addq    a1, 8, a1       # E :
-        mskqh   t2, a1, t2      # U :   detection in the src word
-        nop
-
-        /* Create the 1st output word and detect 0's in the 1st input word.  */
-        mskqh   t1, a1, t3      # U :
-        mskql   t0, a1, t0      # U : assemble the first output word
-        ornot   t1, t2, t2      # E :
-        nop
-
-        cmpbge  zero, t2, t8    # E : bits set iff null found
-        or      t0, t3, t0      # E :
-        beq     a2, $a_eoc      # U :
-        bne     t8, $a_eos      # U : 2nd branch in a quad.  Bad.
-
-        /* On entry to this basic block:
-         * t0 == a source quad not containing a null.
-         * a0 - current aligned destination address
-         * a1 - current aligned source address
-         * a2 - count of quadwords to move.
-         * NOTE: Loop improvement - unrolling this is going to be
-         *      a huge win, since we're going to stall otherwise.
-         *      Fix this later.  For _really_ large copies, look
-         *      at using wh64 on a look-ahead basis.  See the code
-         *      in clear_user.S and copy_user.S.
-         * Presumably, since (a0) and (a1) do not overlap (by C definition)
-         * Lots of nops here:
-         *      - Separate loads from stores
-         *      - Keep it to 1 branch/quadpack so the branch predictor
-         *        can train.
-         */
-$a_loop:
-        stq_u   t0, 0(a0)       # L :
-        addq    a0, 8, a0       # E :
-        nop
-        subq    a2, 1, a2       # E :
-
-        EX( ldq_u t0, 0(a1) )   # L :
-        addq    a1, 8, a1       # E :
-        cmpbge  zero, t0, t8    # E : Stall 2 cycles on t0
-        beq     a2, $a_eoc      # U :
-
-        beq     t8, $a_loop     # U :
-        nop
-        nop
-        nop
-
-        /* Take care of the final (partial) word store.  At this point
-         * the end-of-count bit is set in t8 iff it applies.
-         *
-         * On entry to this basic block we have:
-         * t0 == the source word containing the null
-         * t8 == the cmpbge mask that found it.
-         */
-$a_eos:
-        negq    t8, t12         # E : find low bit set
-        and     t8, t12, t12    # E : 
-
-        /* We're doing a partial word store and so need to combine
-           our source and original destination words.  */
-        ldq_u   t1, 0(a0)       # L :
-        subq    t12, 1, t6      # E :
-
-        or      t12, t6, t8     # E :
-        zapnot  t0, t8, t0      # U : clear src bytes > null
-        zap     t1, t8, t1      # U : clear dst bytes <= null
-        or      t0, t1, t0      # E :
-
-        stq_u   t0, 0(a0)       # L :
-        br      $finish_up      # L0 :
-        nop
-        nop
-
-        /* Add the end-of-count bit to the eos detection bitmask.  */
-        .align 4
-$a_eoc:
-        or      t10, t8, t8
-        br      $a_eos
-        nop
-        nop
-
-
-/* The source and destination are not co-aligned.  Align the destination
-   and cope.  We have to be very careful about not reading too much and
-   causing a SEGV.  */
-
-        .align 4
-$u_head:
-        /* We know just enough now to be able to assemble the first
-           full source word.  We can still find a zero at the end of it
-           that prevents us from outputting the whole thing.
-
-           On entry to this basic block:
-           t0 == the first dest word, unmasked
-           t1 == the shifted low bits of the first source word
-           t6 == bytemask that is -1 in dest word bytes */
-
-        EX( ldq_u t2, 8(a1) )   # L : load second src word
-        addq    a1, 8, a1       # E :
-        mskql   t0, a0, t0      # U : mask trailing garbage in dst
-        extqh   t2, a1, t4      # U :
-
-        or      t1, t4, t1      # E : first aligned src word complete
-        mskqh   t1, a0, t1      # U : mask leading garbage in src
-        or      t0, t1, t0      # E : first output word complete
-        or      t0, t6, t6      # E : mask original data for zero test
-
-        cmpbge  zero, t6, t8    # E :
-        beq     a2, $u_eocfin   # U :
-        bne     t8, $u_final    # U : bad news - 2nd branch in a quad
-        lda     t6, -1          # E : mask out the bits we have
-
-        mskql   t6, a1, t6      # U :   already seen
-        stq_u   t0, 0(a0)       # L : store first output word
-        or      t6, t2, t2      # E :
-        cmpbge  zero, t2, t8    # E : find nulls in second partial
-
-        addq    a0, 8, a0               # E :
-        subq    a2, 1, a2               # E :
-        bne     t8, $u_late_head_exit   # U :
-        nop
-
-        /* Finally, we've got all the stupid leading edge cases taken care
-           of and we can set up to enter the main loop.  */
-
-        extql   t2, a1, t1      # U : position hi-bits of lo word
-        EX( ldq_u t2, 8(a1) )   # L : read next high-order source word
-        addq    a1, 8, a1       # E :
-        cmpbge  zero, t2, t8    # E :
-
-        beq     a2, $u_eoc      # U :
-        bne     t8, $u_eos      # U :
-        nop
-        nop
-
-        /* Unaligned copy main loop.  In order to avoid reading too much,
-           the loop is structured to detect zeros in aligned source words.
-           This has, unfortunately, effectively pulled half of a loop
-           iteration out into the head and half into the tail, but it does
-           prevent nastiness from accumulating in the very thing we want
-           to run as fast as possible.
-
-           On entry to this basic block:
-           t1 == the shifted high-order bits from the previous source word
-           t2 == the unshifted current source word
-
-           We further know that t2 does not contain a null terminator.  */
-
-        /*
-         * Extra nops here:
-         *      separate load quads from store quads
-         *      only one branch/quad to permit predictor training
-         */
-
-        .align 4
-$u_loop:
-        extqh   t2, a1, t0      # U : extract high bits for current word
-        addq    a1, 8, a1       # E :
-        extql   t2, a1, t3      # U : extract low bits for next time
-        addq    a0, 8, a0       # E :
-
-        or      t0, t1, t0      # E : current dst word now complete
-        EX( ldq_u t2, 0(a1) )   # L : load high word for next time
-        subq    a2, 1, a2       # E :
-        nop
-
-        stq_u   t0, -8(a0)      # L : save the current word
-        mov     t3, t1          # E :
-        cmpbge  zero, t2, t8    # E : test new word for eos
-        beq     a2, $u_eoc      # U :
-
-        beq     t8, $u_loop     # U :
-        nop
-        nop
-        nop
-
-        /* We've found a zero somewhere in the source word we just read.
-           If it resides in the lower half, we have one (probably partial)
-           word to write out, and if it resides in the upper half, we
-           have one full and one partial word left to write out.
-
-           On entry to this basic block:
-           t1 == the shifted high-order bits from the previous source word
-           t2 == the unshifted current source word.  */
-        .align 4
-$u_eos:
-        extqh   t2, a1, t0      # U :
-        or      t0, t1, t0      # E : first (partial) source word complete
-        cmpbge  zero, t0, t8    # E : is the null in this first bit?
-        nop
-
-        bne     t8, $u_final    # U :
-        stq_u   t0, 0(a0)       # L : the null was in the high-order bits
-        addq    a0, 8, a0       # E :
-        subq    a2, 1, a2       # E :
-
-        .align 4
-$u_late_head_exit:
-        extql   t2, a1, t0      # U :
-        cmpbge  zero, t0, t8    # E :
-        or      t8, t10, t6     # E :
-        cmoveq  a2, t6, t8      # E :
-
-        /* Take care of a final (probably partial) result word.
-           On entry to this basic block:
-           t0 == assembled source word
-           t8 == cmpbge mask that found the null.  */
-        .align 4
-$u_final:
-        negq    t8, t6          # E : isolate low bit set
-        and     t6, t8, t12     # E :
-        ldq_u   t1, 0(a0)       # L :
-        subq    t12, 1, t6      # E :
-
-        or      t6, t12, t8     # E :
-        zapnot  t0, t8, t0      # U : kill source bytes > null
-        zap     t1, t8, t1      # U : kill dest bytes <= null
-        or      t0, t1, t0      # E :
-
-        stq_u   t0, 0(a0)       # E :
-        br      $finish_up      # U :
-        nop
-        nop
-
-        .align 4
-$u_eoc:                         # end-of-count
-        extqh   t2, a1, t0      # U :
-        or      t0, t1, t0      # E :
-        cmpbge  zero, t0, t8    # E :
-        nop
-
-        .align 4
-$u_eocfin:                      # end-of-count, final word
-        or      t10, t8, t8     # E :
-        br      $u_final        # U :
-        nop
-        nop
-
-        /* Unaligned copy entry point.  */
-        .align 4
-$unaligned:
-
-        srl     a3, 3, a2       # U : a2 = loop counter = (count - 1)/8
-        and     a0, 7, t4       # E : find dest misalignment
-        and     a1, 7, t5       # E : find src misalignment
-        mov     zero, t0        # E :
-
-        /* Conditionally load the first destination word and a bytemask
-           with 0xff indicating that the destination byte is sacrosanct.  */
-
-        mov     zero, t6        # E :
-        beq     t4, 1f          # U :
-        ldq_u   t0, 0(a0)       # L :
-        lda     t6, -1          # E :
-
-        mskql   t6, a0, t6      # E :
-        nop
-        nop
-        nop
-
-        .align 4
-1:
-        subq    a1, t4, a1      # E : sub dest misalignment from src addr
-        /* If source misalignment is larger than dest misalignment, we need
-           extra startup checks to avoid SEGV.  */
-        cmplt   t4, t5, t12     # E :
-        extql   t1, a1, t1      # U : shift src into place
-        lda     t2, -1          # E : for creating masks later
-
-        beq     t12, $u_head    # U :
-        mskqh   t2, t5, t2      # U : begin src byte validity mask
-        cmpbge  zero, t1, t8    # E : is there a zero?
-        nop
-
-        extql   t2, a1, t2      # U :
-        or      t8, t10, t5     # E : test for end-of-count too
-        cmpbge  zero, t2, t3    # E :
-        cmoveq  a2, t5, t8      # E : Latency=2, extra map slot
-
-        nop                     # E : goes with cmov
-        andnot  t8, t3, t8      # E :
-        beq     t8, $u_head     # U :
-        nop
-
-        /* At this point we've found a zero in the first partial word of
-           the source.  We need to isolate the valid source data and mask
-           it into the original destination data.  (Incidentally, we know
-           that we'll need at least one byte of that original dest word.) */
-
-        ldq_u   t0, 0(a0)       # L :
-        negq    t8, t6          # E : build bitmask of bytes <= zero
-        mskqh   t1, t4, t1      # U :
-        and     t6, t8, t12     # E :
-
-        subq    t12, 1, t6      # E :
-        or      t6, t12, t8     # E :
-        zapnot  t2, t8, t2      # U : prepare source word; mirror changes
-        zapnot  t1, t8, t1      # U : to source validity mask
-
-        andnot  t0, t2, t0      # E : zero place for source to reside
-        or      t0, t1, t0      # E : and put it there
-        stq_u   t0, 0(a0)       # L :
-        nop
-
-        .align 4
-$finish_up:
-        zapnot  t0, t12, t4     # U : was last byte written null?
-        and     t12, 0xf0, t3   # E : binary search for the address of the
-        cmovne  t4, 1, t4       # E : Latency=2, extra map slot
-        nop                     # E : with cmovne
-
-        and     t12, 0xcc, t2   # E : last byte written
-        and     t12, 0xaa, t1   # E :
-        cmovne  t3, 4, t3       # E : Latency=2, extra map slot
-        nop                     # E : with cmovne
-
-        bic     a0, 7, t0
-        cmovne  t2, 2, t2       # E : Latency=2, extra map slot
-        nop                     # E : with cmovne
-        nop
-
-        cmovne  t1, 1, t1       # E : Latency=2, extra map slot
-        nop                     # E : with cmovne
-        addq    t0, t3, t0      # E :
-        addq    t1, t2, t1      # E :
-
-        addq    t0, t1, t0      # E :
-        addq    t0, t4, t0      # add one if we filled the buffer
-        subq    t0, v0, v0      # find string length
-        ret                     # L0 :
-
-        .align 4
-$zerolength:
-        nop
-        nop
-        nop
-        clr     v0
-
-$exception:
-        nop
-        nop
-        nop
-        ret
-
-        .end __strncpy_from_user
diff --git a/arch/alpha/lib/ev67-strlen_user.S b/arch/alpha/lib/ev67-strlen_user.S
deleted file mode 100644
index 57e0d77b81a6..000000000000
--- a/arch/alpha/lib/ev67-strlen_user.S
+++ /dev/null
@@ -1,107 +0,0 @@
-/*
- * arch/alpha/lib/ev67-strlen_user.S
- * 21264 version contributed by Rick Gorton <rick.gorton@api-networks.com>
- *
- * Return the length of the string including the NULL terminator
- * (strlen+1) or zero if an error occurred.
- *
- * In places where it is critical to limit the processing time,
- * and the data is not trusted, strnlen_user() should be used.
- * It will return a value greater than its second argument if
- * that limit would be exceeded. This implementation is allowed
- * to access memory beyond the limit, but will not cross a page
- * boundary when doing so.
- *
- * Much of the information about 21264 scheduling/coding comes from:
- *      Compiler Writer's Guide for the Alpha 21264
- *      abbreviated as 'CWG' in other comments here
- *      ftp.digital.com/pub/Digital/info/semiconductor/literature/dsc-library.html
- * Scheduling notation:
- *      E       - either cluster
- *      U       - upper subcluster; U0 - subcluster U0; U1 - subcluster U1
- *      L       - lower subcluster; L0 - subcluster L0; L1 - subcluster L1
- * Try not to change the actual algorithm if possible for consistency.
- */
-
-#include <asm/regdef.h>
-
-
-/* Allow an exception for an insn; exit if we get one.  */
-#define EX(x,y...)                      \
-        99: x,##y;                      \
-        .section __ex_table,"a";        \
-        .long 99b - .;                  \
-        lda v0, $exception-99b(zero);   \
-        .previous
-
-
-        .set noreorder
-        .set noat
-        .text
-
-        .globl __strlen_user
-        .ent __strlen_user
-        .frame sp, 0, ra
-
-        .align 4
-__strlen_user:
-        ldah    a1, 32767(zero) # do not use plain strlen_user() for strings
-                                # that might be almost 2 GB long; you should
-                                # be using strnlen_user() instead
-        nop
-        nop
-        nop
-
-        .globl __strnlen_user
-
-        .align 4
-__strnlen_user:
-        .prologue 0
-        EX( ldq_u t0, 0(a0) )   # L : load first quadword (a0 may be misaligned)
-        lda     t1, -1(zero)    # E :
-
-        insqh   t1, a0, t1      # U :
-        andnot  a0, 7, v0       # E :
-        or      t1, t0, t0      # E :
-        subq    a0, 1, a0       # E : get our +1 for the return 
-
-        cmpbge  zero, t0, t1    # E : t1 <- bitmask: bit i == 1 <==> i-th byte == 0
-        subq    a1, 7, t2       # E :
-        subq    a0, v0, t0      # E :
-        bne     t1, $found      # U :
-
-        addq    t2, t0, t2      # E :
-        addq    a1, 1, a1       # E :
-        nop                     # E :
-        nop                     # E :
-
-        .align 4
-$loop:  ble     t2, $limit      # U :
-        EX( ldq t0, 8(v0) )     # L :
-        nop                     # E :
-        nop                     # E :
-
-        cmpbge  zero, t0, t1    # E :
-        subq    t2, 8, t2       # E :
-        addq    v0, 8, v0       # E : addr += 8
-        beq     t1, $loop       # U :
-
-$found: cttz    t1, t2          # U0 :
-        addq    v0, t2, v0      # E :
-        subq    v0, a0, v0      # E :
-        ret                     # L0 :
-
-$exception:
-        nop
-        nop
-        nop
-        ret
-
-        .align 4                # currently redundant
-$limit:
-        nop
-        nop
-        subq    a1, t2, v0
-        ret
-
-        .end __strlen_user
diff --git a/arch/alpha/lib/strlen_user.S b/arch/alpha/lib/strlen_user.S
deleted file mode 100644
index 508a18e96479..000000000000
--- a/arch/alpha/lib/strlen_user.S
+++ /dev/null
@@ -1,91 +0,0 @@
-/*
- * arch/alpha/lib/strlen_user.S
- *
- * Return the length of the string including the NUL terminator
- * (strlen+1) or zero if an error occurred.
- *
- * In places where it is critical to limit the processing time,
- * and the data is not trusted, strnlen_user() should be used.
- * It will return a value greater than its second argument if
- * that limit would be exceeded. This implementation is allowed
- * to access memory beyond the limit, but will not cross a page
- * boundary when doing so.
- */
-
-#include <asm/regdef.h>
-
-
-/* Allow an exception for an insn; exit if we get one.  */
-#define EX(x,y...)                      \
-        99: x,##y;                      \
-        .section __ex_table,"a";        \
-        .long 99b - .;                  \
-        lda v0, $exception-99b(zero);   \
-        .previous
-
-
-        .set noreorder
-        .set noat
-        .text
-
-        .globl __strlen_user
-        .ent __strlen_user
-        .frame sp, 0, ra
-
-        .align 3
-__strlen_user:
-        ldah    a1, 32767(zero) # do not use plain strlen_user() for strings
-                                # that might be almost 2 GB long; you should
-                                # be using strnlen_user() instead
-
-        .globl __strnlen_user
-
-        .align 3
-__strnlen_user:
-        .prologue 0
-
-        EX( ldq_u t0, 0(a0) )   # load first quadword (a0 may be misaligned)
-        lda     t1, -1(zero)
-        insqh   t1, a0, t1
-        andnot  a0, 7, v0
-        or      t1, t0, t0
-        subq    a0, 1, a0       # get our +1 for the return 
-        cmpbge  zero, t0, t1    # t1 <- bitmask: bit i == 1 <==> i-th byte == 0
-        subq    a1, 7, t2
-        subq    a0, v0, t0
-        bne     t1, $found
-
-        addq    t2, t0, t2
-        addq    a1, 1, a1
-
-        .align 3
-$loop:  ble     t2, $limit
-        EX( ldq t0, 8(v0) )
-        subq    t2, 8, t2
-        addq    v0, 8, v0       # addr += 8
-        cmpbge  zero, t0, t1
-        beq     t1, $loop
-
-$found: negq    t1, t2          # clear all but least set bit
-        and     t1, t2, t1
-
-        and     t1, 0xf0, t2    # binary search for that set bit
-        and     t1, 0xcc, t3
-        and     t1, 0xaa, t4
-        cmovne  t2, 4, t2
-        cmovne  t3, 2, t3
-        cmovne  t4, 1, t4
-        addq    t2, t3, t2
-        addq    v0, t4, v0
-        addq    v0, t2, v0
-        nop                     # dual issue next two on ev4 and ev5
-        subq    v0, a0, v0
-$exception:
-        ret
-
-        .align 3                # currently redundant
-$limit:
-        subq    a1, t2, v0
-        ret
-
-        .end __strlen_user
diff --git a/arch/alpha/lib/strncpy_from_user.S b/arch/alpha/lib/strncpy_from_user.S
deleted file mode 100644
index 73ee21160ff7..000000000000
--- a/arch/alpha/lib/strncpy_from_user.S
+++ /dev/null
@@ -1,339 +0,0 @@
-/*
- * arch/alpha/lib/strncpy_from_user.S
- * Contributed by Richard Henderson (rth@tamu.edu)
- *
- * Just like strncpy except in the return value:
- *
- * -EFAULT       if an exception occurs before the terminator is copied.
- * N             if the buffer filled.
- *
- * Otherwise the length of the string is returned.
- */
-
-
-#include <asm/errno.h>
-#include <asm/regdef.h>
-
-
-/* Allow an exception for an insn; exit if we get one.  */
-#define EX(x,y...)                      \
-        99: x,##y;                      \
-        .section __ex_table,"a";        \
-        .long 99b - .;                  \
-        lda $31, $exception-99b($0);    \
-        .previous
-
-
-        .set noat
-        .set noreorder
-        .text
-
-        .globl __strncpy_from_user
-        .ent __strncpy_from_user
-        .frame $30, 0, $26
-        .prologue 0
-
-        .align 3
-$aligned:
-        /* On entry to this basic block:
-           t0 == the first destination word for masking back in
-           t1 == the first source word.  */
-
-        /* Create the 1st output word and detect 0's in the 1st input word.  */
-        lda     t2, -1          # e1    : build a mask against false zero
-        mskqh   t2, a1, t2      # e0    :   detection in the src word
-        mskqh   t1, a1, t3      # e0    :
-        ornot   t1, t2, t2      # .. e1 :
-        mskql   t0, a1, t0      # e0    : assemble the first output word
-        cmpbge  zero, t2, t8    # .. e1 : bits set iff null found
-        or      t0, t3, t0      # e0    :
-        beq     a2, $a_eoc      # .. e1 :
-        bne     t8, $a_eos      # .. e1 :
-
-        /* On entry to this basic block:
-           t0 == a source word not containing a null.  */
-
-$a_loop:
-        stq_u   t0, 0(a0)       # e0    :
-        addq    a0, 8, a0       # .. e1 :
-        EX( ldq_u t0, 0(a1) )   # e0    :
-        addq    a1, 8, a1       # .. e1 :
-        subq    a2, 1, a2       # e0    :
-        cmpbge  zero, t0, t8    # .. e1 (stall)
-        beq     a2, $a_eoc      # e1    :
-        beq     t8, $a_loop     # e1    :
-
-        /* Take care of the final (partial) word store.  At this point
-           the end-of-count bit is set in t8 iff it applies.
-
-           On entry to this basic block we have:
-           t0 == the source word containing the null
-           t8 == the cmpbge mask that found it.  */
-
-$a_eos:
-        negq    t8, t12         # e0    : find low bit set
-        and     t8, t12, t12    # e1 (stall)
-
-        /* For the sake of the cache, don't read a destination word
-           if we're not going to need it.  */
-        and     t12, 0x80, t6   # e0    :
-        bne     t6, 1f          # .. e1 (zdb)
-
-        /* We're doing a partial word store and so need to combine
-           our source and original destination words.  */
-        ldq_u   t1, 0(a0)       # e0    :
-        subq    t12, 1, t6      # .. e1 :
-        or      t12, t6, t8     # e0    :
-        unop                    #
-        zapnot  t0, t8, t0      # e0    : clear src bytes > null
-        zap     t1, t8, t1      # .. e1 : clear dst bytes <= null
-        or      t0, t1, t0      # e1    :
-
-1:      stq_u   t0, 0(a0)
-        br      $finish_up
-
-        /* Add the end-of-count bit to the eos detection bitmask.  */
-$a_eoc:
-        or      t10, t8, t8
-        br      $a_eos
-
-        /*** The Function Entry Point ***/
-        .align 3
-__strncpy_from_user:
-        mov     a0, v0          # save the string start
-        beq     a2, $zerolength
-
-        /* Are source and destination co-aligned?  */
-        xor     a0, a1, t1      # e0    :
-        and     a0, 7, t0       # .. e1 : find dest misalignment
-        and     t1, 7, t1       # e0    :
-        addq    a2, t0, a2      # .. e1 : bias count by dest misalignment
-        subq    a2, 1, a2       # e0    :
-        and     a2, 7, t2       # e1    :
-        srl     a2, 3, a2       # e0    : a2 = loop counter = (count - 1)/8
-        addq    zero, 1, t10    # .. e1 :
-        sll     t10, t2, t10    # e0    : t10 = bitmask of last count byte
-        bne     t1, $unaligned  # .. e1 :
-
-        /* We are co-aligned; take care of a partial first word.  */
-
-        EX( ldq_u t1, 0(a1) )   # e0    : load first src word
-        addq    a1, 8, a1       # .. e1 :
-
-        beq     t0, $aligned    # avoid loading dest word if not needed
-        ldq_u   t0, 0(a0)       # e0    :
-        br      $aligned        # .. e1 :
-
-
-/* The source and destination are not co-aligned.  Align the destination
-   and cope.  We have to be very careful about not reading too much and
-   causing a SEGV.  */
-
-        .align 3
-$u_head:
-        /* We know just enough now to be able to assemble the first
-           full source word.  We can still find a zero at the end of it
-           that prevents us from outputting the whole thing.
-
-           On entry to this basic block:
-           t0 == the first dest word, unmasked
-           t1 == the shifted low bits of the first source word
-           t6 == bytemask that is -1 in dest word bytes */
-
-        EX( ldq_u t2, 8(a1) )   # e0    : load second src word
-        addq    a1, 8, a1       # .. e1 :
-        mskql   t0, a0, t0      # e0    : mask trailing garbage in dst
-        extqh   t2, a1, t4      # e0    :
-        or      t1, t4, t1      # e1    : first aligned src word complete
-        mskqh   t1, a0, t1      # e0    : mask leading garbage in src
-        or      t0, t1, t0      # e0    : first output word complete
-        or      t0, t6, t6      # e1    : mask original data for zero test
-        cmpbge  zero, t6, t8    # e0    :
-        beq     a2, $u_eocfin   # .. e1 :
-        bne     t8, $u_final    # e1    :
-
-        lda     t6, -1                  # e1    : mask out the bits we have
-        mskql   t6, a1, t6              # e0    :   already seen
-        stq_u   t0, 0(a0)               # e0    : store first output word
-        or      t6, t2, t2              # .. e1 :
-        cmpbge  zero, t2, t8            # e0    : find nulls in second partial
-        addq    a0, 8, a0               # .. e1 :
-        subq    a2, 1, a2               # e0    :
-        bne     t8, $u_late_head_exit   # .. e1 :
-
-        /* Finally, we've got all the stupid leading edge cases taken care
-           of and we can set up to enter the main loop.  */
-
-        extql   t2, a1, t1      # e0    : position hi-bits of lo word
-        EX( ldq_u t2, 8(a1) )   # .. e1 : read next high-order source word
-        addq    a1, 8, a1       # e0    :
-        cmpbge  zero, t2, t8    # e1 (stall)
-        beq     a2, $u_eoc      # e1    :
-        bne     t8, $u_eos      # e1    :
-
-        /* Unaligned copy main loop.  In order to avoid reading too much,
-           the loop is structured to detect zeros in aligned source words.
-           This has, unfortunately, effectively pulled half of a loop
-           iteration out into the head and half into the tail, but it does
-           prevent nastiness from accumulating in the very thing we want
-           to run as fast as possible.
-
-           On entry to this basic block:
-           t1 == the shifted high-order bits from the previous source word
-           t2 == the unshifted current source word
-
-           We further know that t2 does not contain a null terminator.  */
-
-        .align 3
-$u_loop:
-        extqh   t2, a1, t0      # e0    : extract high bits for current word
-        addq    a1, 8, a1       # .. e1 :
-        extql   t2, a1, t3      # e0    : extract low bits for next time
-        addq    a0, 8, a0       # .. e1 :
-        or      t0, t1, t0      # e0    : current dst word now complete
-        EX( ldq_u t2, 0(a1) )   # .. e1 : load high word for next time
-        stq_u   t0, -8(a0)      # e0    : save the current word
-        mov     t3, t1          # .. e1 :
-        subq    a2, 1, a2       # e0    :
-        cmpbge  zero, t2, t8    # .. e1 : test new word for eos
-        beq     a2, $u_eoc      # e1    :
-        beq     t8, $u_loop     # e1    :
-
-        /* We've found a zero somewhere in the source word we just read.
-           If it resides in the lower half, we have one (probably partial)
-           word to write out, and if it resides in the upper half, we
-           have one full and one partial word left to write out.
-
-           On entry to this basic block:
-           t1 == the shifted high-order bits from the previous source word
-           t2 == the unshifted current source word.  */
-$u_eos:
-        extqh   t2, a1, t0      # e0    :
-        or      t0, t1, t0      # e1    : first (partial) source word complete
-
-        cmpbge  zero, t0, t8    # e0    : is the null in this first bit?
-        bne     t8, $u_final    # .. e1 (zdb)
-
-        stq_u   t0, 0(a0)       # e0    : the null was in the high-order bits
-        addq    a0, 8, a0       # .. e1 :
-        subq    a2, 1, a2       # e1    :
-
-$u_late_head_exit:
-        extql   t2, a1, t0      # .. e0 :
-        cmpbge  zero, t0, t8    # e0    :
-        or      t8, t10, t6     # e1    :
-        cmoveq  a2, t6, t8      # e0    :
-        nop                     # .. e1 :
-
-        /* Take care of a final (probably partial) result word.
-           On entry to this basic block:
-           t0 == assembled source word
-           t8 == cmpbge mask that found the null.  */
-$u_final:
-        negq    t8, t6          # e0    : isolate low bit set
-        and     t6, t8, t12     # e1    :
-
-        and     t12, 0x80, t6   # e0    : avoid dest word load if we can
-        bne     t6, 1f          # .. e1 (zdb)
-
-        ldq_u   t1, 0(a0)       # e0    :
-        subq    t12, 1, t6      # .. e1 :
-        or      t6, t12, t8     # e0    :
-        zapnot  t0, t8, t0      # .. e1 : kill source bytes > null
-        zap     t1, t8, t1      # e0    : kill dest bytes <= null
-        or      t0, t1, t0      # e1    :
-
-1:      stq_u   t0, 0(a0)       # e0    :
-        br      $finish_up
-
-$u_eoc:                         # end-of-count
-        extqh   t2, a1, t0
-        or      t0, t1, t0
-        cmpbge  zero, t0, t8
-
-$u_eocfin:                      # end-of-count, final word
-        or      t10, t8, t8
-        br      $u_final
-
-        /* Unaligned copy entry point.  */
-        .align 3
-$unaligned:
-
-        EX( ldq_u t1, 0(a1) )   # e0    : load first source word
-
-        and     a0, 7, t4       # .. e1 : find dest misalignment
-        and     a1, 7, t5       # e0    : find src misalignment
-
-        /* Conditionally load the first destination word and a bytemask
-           with 0xff indicating that the destination byte is sacrosanct.  */
-
-        mov     zero, t0        # .. e1 :
-        mov     zero, t6        # e0    :
-        beq     t4, 1f          # .. e1 :
-        ldq_u   t0, 0(a0)       # e0    :
-        lda     t6, -1          # .. e1 :
-        mskql   t6, a0, t6      # e0    :
-1:
-        subq    a1, t4, a1      # .. e1 : sub dest misalignment from src addr
-
-        /* If source misalignment is larger than dest misalignment, we need
-           extra startup checks to avoid SEGV.  */
-
-        cmplt   t4, t5, t12     # e1    :
-        extql   t1, a1, t1      # .. e0 : shift src into place
-        lda     t2, -1          # e0    : for creating masks later
-        beq     t12, $u_head    # e1    :
-
-        mskqh   t2, t5, t2      # e0    : begin src byte validity mask
-        cmpbge  zero, t1, t8    # .. e1 : is there a zero?
-        extql   t2, a1, t2      # e0    :
-        or      t8, t10, t5     # .. e1 : test for end-of-count too
-        cmpbge  zero, t2, t3    # e0    :
-        cmoveq  a2, t5, t8      # .. e1 :
-        andnot  t8, t3, t8      # e0    :
-        beq     t8, $u_head     # .. e1 (zdb)
-
-        /* At this point we've found a zero in the first partial word of
-           the source.  We need to isolate the valid source data and mask
-           it into the original destination data.  (Incidentally, we know
-           that we'll need at least one byte of that original dest word.) */
-
-        ldq_u   t0, 0(a0)       # e0    :
-        negq    t8, t6          # .. e1 : build bitmask of bytes <= zero
-        mskqh   t1, t4, t1      # e0    :
-        and     t6, t8, t12     # .. e1 :
-        subq    t12, 1, t6      # e0    :
-        or      t6, t12, t8     # e1    :
-
-        zapnot  t2, t8, t2      # e0    : prepare source word; mirror changes
-        zapnot  t1, t8, t1      # .. e1 : to source validity mask
-
-        andnot  t0, t2, t0      # e0    : zero place for source to reside
-        or      t0, t1, t0      # e1    : and put it there
-        stq_u   t0, 0(a0)       # e0    :
-
-$finish_up:
-        zapnot  t0, t12, t4     # was last byte written null?
-        cmovne  t4, 1, t4
-
-        and     t12, 0xf0, t3   # binary search for the address of the
-        and     t12, 0xcc, t2   # last byte written
-        and     t12, 0xaa, t1
-        bic     a0, 7, t0
-        cmovne  t3, 4, t3
-        cmovne  t2, 2, t2
-        cmovne  t1, 1, t1
-        addq    t0, t3, t0
-        addq    t1, t2, t1
-        addq    t0, t1, t0
-        addq    t0, t4, t0      # add one if we filled the buffer
-
-        subq    t0, v0, v0      # find string length
-        ret
-
-$zerolength:
-        clr     v0
-$exception:
-        ret
-
-        .end __strncpy_from_user
diff --git a/arch/alpha/mm/fault.c b/arch/alpha/mm/fault.c
index 5eecab1a84ef..0c4132dd3507 100644
--- a/arch/alpha/mm/fault.c
+++ b/arch/alpha/mm/fault.c
@@ -89,6 +89,8 @@ do_page_fault(unsigned long address, unsigned long mmcsr,
         const struct exception_table_entry *fixup;
         int fault, si_code = SEGV_MAPERR;
         siginfo_t info;
+        unsigned int flags = (FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE |
+                              (cause > 0 ? FAULT_FLAG_WRITE : 0));
 
         /* As of EV6, a load into $31/$f31 is a prefetch, and never faults
            (or is suppressed by the PALcode).  Support that for older CPUs
@@ -114,6 +116,7 @@ do_page_fault(unsigned long address, unsigned long mmcsr,
                 goto vmalloc_fault;
 #endif
 
+retry:
         down_read(&mm->mmap_sem);
         vma = find_vma(mm, address);
         if (!vma)
@@ -144,8 +147,11 @@ do_page_fault(unsigned long address, unsigned long mmcsr,
         /* If for any reason at all we couldn't handle the fault,
            make sure we exit gracefully rather than endlessly redo
            the fault.  */
-        fault = handle_mm_fault(mm, vma, address, cause > 0 ? FAULT_FLAG_WRITE : 0);
-        up_read(&mm->mmap_sem);
+        fault = handle_mm_fault(mm, vma, address, flags);
+
+        if ((fault & VM_FAULT_RETRY) && fatal_signal_pending(current))
+                return;
+
         if (unlikely(fault & VM_FAULT_ERROR)) {
                 if (fault & VM_FAULT_OOM)
                         goto out_of_memory;
@@ -153,10 +159,26 @@ do_page_fault(unsigned long address, unsigned long mmcsr,
                         goto do_sigbus;
                 BUG();
         }
-        if (fault & VM_FAULT_MAJOR)
-                current->maj_flt++;
-        else
-                current->min_flt++;
+
+        if (flags & FAULT_FLAG_ALLOW_RETRY) {
+                if (fault & VM_FAULT_MAJOR)
+                        current->maj_flt++;
+                else
+                        current->min_flt++;
+                if (fault & VM_FAULT_RETRY) {
+                        flags &= ~FAULT_FLAG_ALLOW_RETRY;
+
+                         /* No need to up_read(&mm->mmap_sem) as we would
+                         * have already released it in __lock_page_or_retry
+                         * in mm/filemap.c.
+                         */
+
+                        goto retry;
+                }
+        }
+
+        up_read(&mm->mmap_sem);
+
         return;
 
         /* Something tried to access memory that isn't in our memory map.
@@ -186,12 +208,14 @@ do_page_fault(unsigned long address, unsigned long mmcsr,
         /* We ran out of memory, or some other thing happened to us that
            made us unable to handle the page fault gracefully.  */
  out_of_memory:
+        up_read(&mm->mmap_sem);
         if (!user_mode(regs))
                 goto no_context;
         pagefault_out_of_memory();
         return;
 
  do_sigbus:
+        up_read(&mm->mmap_sem);
         /* Send a sigbus, regardless of whether we were in kernel
            or user mode.  */
         info.si_signo = SIGBUS;
diff --git a/arch/alpha/oprofile/common.c b/arch/alpha/oprofile/common.c
index a0a5d27aa215..b8ce18f485d3 100644
--- a/arch/alpha/oprofile/common.c
+++ b/arch/alpha/oprofile/common.c
@@ -12,6 +12,7 @@
 #include <linux/smp.h>
 #include <linux/errno.h>
 #include <asm/ptrace.h>
+#include <asm/special_insns.h>
 
 #include "op_impl.h"
 
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index e91c7cdc6fe5..6d6e18fee9fe 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -38,7 +38,6 @@ config ARM
         select HARDIRQS_SW_RESEND
         select GENERIC_IRQ_PROBE
         select GENERIC_IRQ_SHOW
-        select GENERIC_IRQ_PROBE
         select ARCH_WANT_IPC_PARSE_VERSION
         select HARDIRQS_SW_RESEND
         select CPU_PM if (SUSPEND || CPU_IDLE)
@@ -126,11 +125,6 @@ config TRACE_IRQFLAGS_SUPPORT
         bool
         default y
 
-config GENERIC_LOCKBREAK
-        bool
-        default y
-        depends on SMP && PREEMPT
-
 config RWSEM_GENERIC_SPINLOCK
         bool
         default y
diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi
index a874dbfb5ae6..e6138310e5ce 100644
--- a/arch/arm/boot/dts/imx23.dtsi
+++ b/arch/arm/boot/dts/imx23.dtsi
@@ -51,11 +51,11 @@
 
                         dma-apbh@80004000 {
                                 compatible = "fsl,imx23-dma-apbh";
-                                reg = <0x80004000 2000>;
+                                reg = <0x80004000 0x2000>;
                         };
 
                         ecc@80008000 {
-                                reg = <0x80008000 2000>;
+                                reg = <0x80008000 0x2000>;
                                 status = "disabled";
                         };
 
@@ -63,7 +63,7 @@
                                 compatible = "fsl,imx23-gpmi-nand";
                                 #address-cells = <1>;
                                 #size-cells = <1>;
-                                reg = <0x8000c000 2000>, <0x8000a000 2000>;
+                                reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
                                 reg-names = "gpmi-nand", "bch";
                                 interrupts = <13>, <56>;
                                 interrupt-names = "gpmi-dma", "bch";
@@ -72,14 +72,14 @@
                         };
 
                         ssp0: ssp@80010000 {
-                                reg = <0x80010000 2000>;
+                                reg = <0x80010000 0x2000>;
                                 interrupts = <15 14>;
                                 fsl,ssp-dma-channel = <1>;
                                 status = "disabled";
                         };
 
                         etm@80014000 {
-                                reg = <0x80014000 2000>;
+                                reg = <0x80014000 0x2000>;
                                 status = "disabled";
                         };
 
@@ -87,7 +87,7 @@
                                 #address-cells = <1>;
                                 #size-cells = <0>;
                                 compatible = "fsl,imx23-pinctrl", "simple-bus";
-                                reg = <0x80018000 2000>;
+                                reg = <0x80018000 0x2000>;
 
                                 gpio0: gpio@0 {
                                         compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
@@ -273,32 +273,32 @@
                         };
 
                         emi@80020000 {
-                                reg = <0x80020000 2000>;
+                                reg = <0x80020000 0x2000>;
                                 status = "disabled";
                         };
 
                         dma-apbx@80024000 {
                                 compatible = "fsl,imx23-dma-apbx";
-                                reg = <0x80024000 2000>;
+                                reg = <0x80024000 0x2000>;
                         };
 
                         dcp@80028000 {
-                                reg = <0x80028000 2000>;
+                                reg = <0x80028000 0x2000>;
                                 status = "disabled";
                         };
 
                         pxp@8002a000 {
-                                reg = <0x8002a000 2000>;
+                                reg = <0x8002a000 0x2000>;
                                 status = "disabled";
                         };
 
                         ocotp@8002c000 {
-                                reg = <0x8002c000 2000>;
+                                reg = <0x8002c000 0x2000>;
                                 status = "disabled";
                         };
 
                         axi-ahb@8002e000 {
-                                reg = <0x8002e000 2000>;
+                                reg = <0x8002e000 0x2000>;
                                 status = "disabled";
                         };
 
@@ -310,14 +310,14 @@
                         };
 
                         ssp1: ssp@80034000 {
-                                reg = <0x80034000 2000>;
+                                reg = <0x80034000 0x2000>;
                                 interrupts = <2 20>;
                                 fsl,ssp-dma-channel = <2>;
                                 status = "disabled";
                         };
 
                         tvenc@80038000 {
-                                reg = <0x80038000 2000>;
+                                reg = <0x80038000 0x2000>;
                                 status = "disabled";
                         };
                 };
@@ -330,37 +330,37 @@
                         ranges;
 
                         clkctl@80040000 {
-                                reg = <0x80040000 2000>;
+                                reg = <0x80040000 0x2000>;
                                 status = "disabled";
                         };
 
                         saif0: saif@80042000 {
-                                reg = <0x80042000 2000>;
+                                reg = <0x80042000 0x2000>;
                                 status = "disabled";
                         };
 
                         power@80044000 {
-                                reg = <0x80044000 2000>;
+                                reg = <0x80044000 0x2000>;
                                 status = "disabled";
                         };
 
                         saif1: saif@80046000 {
-                                reg = <0x80046000 2000>;
+                                reg = <0x80046000 0x2000>;
                                 status = "disabled";
                         };
 
                         audio-out@80048000 {
-                                reg = <0x80048000 2000>;
+                                reg = <0x80048000 0x2000>;
                                 status = "disabled";
                         };
 
                         audio-in@8004c000 {
-                                reg = <0x8004c000 2000>;
+                                reg = <0x8004c000 0x2000>;
                                 status = "disabled";
                         };
 
                         lradc@80050000 {
-                                reg = <0x80050000 2000>;
+                                reg = <0x80050000 0x2000>;
                                 status = "disabled";
                         };
 
@@ -370,26 +370,26 @@
                         };
 
                         i2c@80058000 {
-                                reg = <0x80058000 2000>;
+                                reg = <0x80058000 0x2000>;
                                 status = "disabled";
                         };
 
                         rtc@8005c000 {
                                 compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc";
-                                reg = <0x8005c000 2000>;
+                                reg = <0x8005c000 0x2000>;
                                 interrupts = <22>;
                         };
 
                         pwm: pwm@80064000 {
                                 compatible = "fsl,imx23-pwm";
-                                reg = <0x80064000 2000>;
+                                reg = <0x80064000 0x2000>;
                                 #pwm-cells = <2>;
                                 fsl,pwm-number = <5>;
                                 status = "disabled";
                         };
 
                         timrot@80068000 {
-                                reg = <0x80068000 2000>;
+                                reg = <0x80068000 0x2000>;
                                 status = "disabled";
                         };
 
@@ -429,7 +429,7 @@
                 ranges;
 
                 usbctrl@80080000 {
-                        reg = <0x80080000 0x10000>;
+                        reg = <0x80080000 0x40000>;
                         status = "disabled";
                 };
         };
diff --git a/arch/arm/boot/dts/imx27-3ds.dts b/arch/arm/boot/dts/imx27-3ds.dts
index d3f8296e19e0..0a8978a40ece 100644
--- a/arch/arm/boot/dts/imx27-3ds.dts
+++ b/arch/arm/boot/dts/imx27-3ds.dts
@@ -27,7 +27,7 @@
                                 status = "okay";
                         };
 
-                        uart@1000a000 {
+                        uart1: serial@1000a000 {
                                 fsl,uart-has-rtscts;
                                 status = "okay";
                         };
diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi
index 00bae3aad5ab..5303ab680a34 100644
--- a/arch/arm/boot/dts/imx27.dtsi
+++ b/arch/arm/boot/dts/imx27.dtsi
@@ -19,6 +19,12 @@
                 serial3 = &uart4;
                 serial4 = &uart5;
                 serial5 = &uart6;
+                gpio0 = &gpio1;
+                gpio1 = &gpio2;
+                gpio2 = &gpio3;
+                gpio3 = &gpio4;
+                gpio4 = &gpio5;
+                gpio5 = &gpio6;
         };
 
         avic: avic-interrupt-controller@e0000000 {
diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi
index 787efac68da8..3fa6d190fab4 100644
--- a/arch/arm/boot/dts/imx28.dtsi
+++ b/arch/arm/boot/dts/imx28.dtsi
@@ -57,18 +57,18 @@
                         };
 
                         hsadc@80002000 {
-                                reg = <0x80002000 2000>;
+                                reg = <0x80002000 0x2000>;
                                 interrupts = <13 87>;
                                 status = "disabled";
                         };
 
                         dma-apbh@80004000 {
                                 compatible = "fsl,imx28-dma-apbh";
-                                reg = <0x80004000 2000>;
+                                reg = <0x80004000 0x2000>;
                         };
 
                         perfmon@80006000 {
-                                reg = <0x80006000 800>;
+                                reg = <0x80006000 0x800>;
                                 interrupts = <27>;
                                 status = "disabled";
                         };
@@ -77,7 +77,7 @@
                                 compatible = "fsl,imx28-gpmi-nand";
                                 #address-cells = <1>;
                                 #size-cells = <1>;
-                                reg = <0x8000c000 2000>, <0x8000a000 2000>;
+                                reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
                                 reg-names = "gpmi-nand", "bch";
                                 interrupts = <88>, <41>;
                                 interrupt-names = "gpmi-dma", "bch";
@@ -86,28 +86,28 @@
                         };
 
                         ssp0: ssp@80010000 {
-                                reg = <0x80010000 2000>;
+                                reg = <0x80010000 0x2000>;
                                 interrupts = <96 82>;
                                 fsl,ssp-dma-channel = <0>;
                                 status = "disabled";
                         };
 
                         ssp1: ssp@80012000 {
-                                reg = <0x80012000 2000>;
+                                reg = <0x80012000 0x2000>;
                                 interrupts = <97 83>;
                                 fsl,ssp-dma-channel = <1>;
                                 status = "disabled";
                         };
 
                         ssp2: ssp@80014000 {
-                                reg = <0x80014000 2000>;
+                                reg = <0x80014000 0x2000>;
                                 interrupts = <98 84>;
                                 fsl,ssp-dma-channel = <2>;
                                 status = "disabled";
                         };
 
                         ssp3: ssp@80016000 {
-                                reg = <0x80016000 2000>;
+                                reg = <0x80016000 0x2000>;
                                 interrupts = <99 85>;
                                 fsl,ssp-dma-channel = <3>;
                                 status = "disabled";
@@ -117,7 +117,7 @@
                                 #address-cells = <1>;
                                 #size-cells = <0>;
                                 compatible = "fsl,imx28-pinctrl", "simple-bus";
-                                reg = <0x80018000 2000>;
+                                reg = <0x80018000 0x2000>;
 
                                 gpio0: gpio@0 {
                                         compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
@@ -510,96 +510,96 @@
                         };
 
                         digctl@8001c000 {
-                                reg = <0x8001c000 2000>;
+                                reg = <0x8001c000 0x2000>;
                                 interrupts = <89>;
                                 status = "disabled";
                         };
 
                         etm@80022000 {
-                                reg = <0x80022000 2000>;
+                                reg = <0x80022000 0x2000>;
                                 status = "disabled";
                         };
 
                         dma-apbx@80024000 {
                                 compatible = "fsl,imx28-dma-apbx";
-                                reg = <0x80024000 2000>;
+                                reg = <0x80024000 0x2000>;
                         };
 
                         dcp@80028000 {
-                                reg = <0x80028000 2000>;
+                                reg = <0x80028000 0x2000>;
                                 interrupts = <52 53 54>;
                                 status = "disabled";
                         };
 
                         pxp@8002a000 {
-                                reg = <0x8002a000 2000>;
+                                reg = <0x8002a000 0x2000>;
                                 interrupts = <39>;
                                 status = "disabled";
                         };
 
                         ocotp@8002c000 {
-                                reg = <0x8002c000 2000>;
+                                reg = <0x8002c000 0x2000>;
                                 status = "disabled";
                         };
 
                         axi-ahb@8002e000 {
-                                reg = <0x8002e000 2000>;
+                                reg = <0x8002e000 0x2000>;
                                 status = "disabled";
                         };
 
                         lcdif@80030000 {
                                 compatible = "fsl,imx28-lcdif";
-                                reg = <0x80030000 2000>;
+                                reg = <0x80030000 0x2000>;
                                 interrupts = <38 86>;
                                 status = "disabled";
                         };
 
                         can0: can@80032000 {
                                 compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";
-                                reg = <0x80032000 2000>;
+                                reg = <0x80032000 0x2000>;
                                 interrupts = <8>;
                                 status = "disabled";
                         };
 
                         can1: can@80034000 {
                                 compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";
-                                reg = <0x80034000 2000>;
+                                reg = <0x80034000 0x2000>;
                                 interrupts = <9>;
                                 status = "disabled";
                         };
 
                         simdbg@8003c000 {
-                                reg = <0x8003c000 200>;
+                                reg = <0x8003c000 0x200>;
                                 status = "disabled";
                         };
 
                         simgpmisel@8003c200 {
-                                reg = <0x8003c200 100>;
+                                reg = <0x8003c200 0x100>;
                                 status = "disabled";
                         };
 
                         simsspsel@8003c300 {
-                                reg = <0x8003c300 100>;
+                                reg = <0x8003c300 0x100>;
                                 status = "disabled";
                         };
 
                         simmemsel@8003c400 {
-                                reg = <0x8003c400 100>;
+                                reg = <0x8003c400 0x100>;
                                 status = "disabled";
                         };
 
                         gpiomon@8003c500 {
-                                reg = <0x8003c500 100>;
+                                reg = <0x8003c500 0x100>;
                                 status = "disabled";
                         };
 
                         simenet@8003c700 {
-                                reg = <0x8003c700 100>;
+                                reg = <0x8003c700 0x100>;
                                 status = "disabled";
                         };
 
                         armjtag@8003c800 {
-                                reg = <0x8003c800 100>;
+                                reg = <0x8003c800 0x100>;
                                 status = "disabled";
                         };
                 };
@@ -612,45 +612,45 @@
                         ranges;
 
                         clkctl@80040000 {
-                                reg = <0x80040000 2000>;
+                                reg = <0x80040000 0x2000>;
                                 status = "disabled";
                         };
 
                         saif0: saif@80042000 {
                                 compatible = "fsl,imx28-saif";
-                                reg = <0x80042000 2000>;
+                                reg = <0x80042000 0x2000>;
                                 interrupts = <59 80>;
                                 fsl,saif-dma-channel = <4>;
                                 status = "disabled";
                         };
 
                         power@80044000 {
-                                reg = <0x80044000 2000>;
+                                reg = <0x80044000 0x2000>;
                                 status = "disabled";
                         };
 
                         saif1: saif@80046000 {
                                 compatible = "fsl,imx28-saif";
-                                reg = <0x80046000 2000>;
+                                reg = <0x80046000 0x2000>;
                                 interrupts = <58 81>;
                                 fsl,saif-dma-channel = <5>;
                                 status = "disabled";
                         };
 
                         lradc@80050000 {
-                                reg = <0x80050000 2000>;
+                                reg = <0x80050000 0x2000>;
                                 status = "disabled";
                         };
 
                         spdif@80054000 {
-                                reg = <0x80054000 2000>;
+                                reg = <0x80054000 0x2000>;
                                 interrupts = <45 66>;
                                 status = "disabled";
                         };
 
                         rtc@80056000 {
                                 compatible = "fsl,imx28-rtc", "fsl,stmp3xxx-rtc";
-                                reg = <0x80056000 2000>;
+                                reg = <0x80056000 0x2000>;
                                 interrupts = <29>;
                         };
 
@@ -658,7 +658,7 @@
                                 #address-cells = <1>;
                                 #size-cells = <0>;
                                 compatible = "fsl,imx28-i2c";
-                                reg = <0x80058000 2000>;
+                                reg = <0x80058000 0x2000>;
                                 interrupts = <111 68>;
                                 clock-frequency = <100000>;
                                 status = "disabled";
@@ -668,7 +668,7 @@
                                 #address-cells = <1>;
                                 #size-cells = <0>;
                                 compatible = "fsl,imx28-i2c";
-                                reg = <0x8005a000 2000>;
+                                reg = <0x8005a000 0x2000>;
                                 interrupts = <110 69>;
                                 clock-frequency = <100000>;
                                 status = "disabled";
@@ -676,14 +676,14 @@
 
                         pwm: pwm@80064000 {
                                 compatible = "fsl,imx28-pwm", "fsl,imx23-pwm";
-                                reg = <0x80064000 2000>;
+                                reg = <0x80064000 0x2000>;
                                 #pwm-cells = <2>;
                                 fsl,pwm-number = <8>;
                                 status = "disabled";
                         };
 
                         timrot@80068000 {
-                                reg = <0x80068000 2000>;
+                                reg = <0x80068000 0x2000>;
                                 status = "disabled";
                         };
 
diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts
index de065b5976e6..cd86177a3ea2 100644
--- a/arch/arm/boot/dts/imx51-babbage.dts
+++ b/arch/arm/boot/dts/imx51-babbage.dts
@@ -53,7 +53,7 @@
                                                 spi-max-frequency = <6000000>;
                                                 reg = <0>;
                                                 interrupt-parent = <&gpio1>;
-                                                interrupts = <8>;
+                                                interrupts = <8 0x4>;
 
                                                 regulators {
                                                         sw1_reg: sw1 {
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
index 53cbaa3d4f90..aba28dc87fc8 100644
--- a/arch/arm/boot/dts/imx51.dtsi
+++ b/arch/arm/boot/dts/imx51.dtsi
@@ -17,6 +17,10 @@
                 serial0 = &uart1;
                 serial1 = &uart2;
                 serial2 = &uart3;
+                gpio0 = &gpio1;
+                gpio1 = &gpio2;
+                gpio2 = &gpio3;
+                gpio3 = &gpio4;
         };
 
         tzic: tz-interrupt-controller@e0000000 {
diff --git a/arch/arm/boot/dts/imx53-ard.dts b/arch/arm/boot/dts/imx53-ard.dts
index 5b8eafcdbeec..da895e93a999 100644
--- a/arch/arm/boot/dts/imx53-ard.dts
+++ b/arch/arm/boot/dts/imx53-ard.dts
@@ -64,12 +64,32 @@
                         reg = <0xf4000000 0x2000000>;
                         phy-mode = "mii";
                         interrupt-parent = <&gpio2>;
-                        interrupts = <31>;
+                        interrupts = <31 0x8>;
                         reg-io-width = <4>;
+                        /*
+                         * VDD33A and VDDVARIO of LAN9220 are supplied by
+                         * SW4_3V3 of LTC3589.  Before the regulator driver
+                         * for this PMIC is available, we use a fixed dummy
+                         * 3V3 regulator to get LAN9220 driver probing work.
+                         */
+                        vdd33a-supply = <&reg_3p3v>;
+                        vddvario-supply = <&reg_3p3v>;
                         smsc,irq-push-pull;
                 };
         };
 
+        regulators {
+                compatible = "simple-bus";
+
+                reg_3p3v: 3p3v {
+                        compatible = "regulator-fixed";
+                        regulator-name = "3P3V";
+                        regulator-min-microvolt = <3300000>;
+                        regulator-max-microvolt = <3300000>;
+                        regulator-always-on;
+                };
+        };
+
         gpio-keys {
                 compatible = "gpio-keys";
 
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index fc79cdc4b4e6..cd37165edce5 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -19,6 +19,13 @@
                 serial2 = &uart3;
                 serial3 = &uart4;
                 serial4 = &uart5;
+                gpio0 = &gpio1;
+                gpio1 = &gpio2;
+                gpio2 = &gpio3;
+                gpio3 = &gpio4;
+                gpio4 = &gpio5;
+                gpio5 = &gpio6;
+                gpio6 = &gpio7;
         };
 
         tzic: tz-interrupt-controller@0fffc000 {
diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts
index d42e851ceb97..72f30f3e6171 100644
--- a/arch/arm/boot/dts/imx6q-sabrelite.dts
+++ b/arch/arm/boot/dts/imx6q-sabrelite.dts
@@ -53,6 +53,7 @@
                                                 fsl,pins = <
                                                            144  0x80000000      /* MX6Q_PAD_EIM_D22__GPIO_3_22 */
                                                            121  0x80000000      /* MX6Q_PAD_EIM_D19__GPIO_3_19 */
+                                                           953  0x80000000      /* MX6Q_PAD_GPIO_0__CCM_CLKO */
                                                            >;
                                         };
                                 };
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index 3d3c64b014e6..fd57079f71a9 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -19,6 +19,13 @@
                 serial2 = &uart3;
                 serial3 = &uart4;
                 serial4 = &uart5;
+                gpio0 = &gpio1;
+                gpio1 = &gpio2;
+                gpio2 = &gpio3;
+                gpio3 = &gpio4;
+                gpio4 = &gpio5;
+                gpio5 = &gpio6;
+                gpio6 = &gpio7;
         };
 
         cpus {
diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig
index f725b9637b33..3c9f32f9b6b4 100644
--- a/arch/arm/configs/imx_v6_v7_defconfig
+++ b/arch/arm/configs/imx_v6_v7_defconfig
@@ -192,6 +192,7 @@ CONFIG_RTC_DRV_MC13XXX=y
 CONFIG_RTC_DRV_MXC=y
 CONFIG_DMADEVICES=y
 CONFIG_IMX_SDMA=y
+CONFIG_MXS_DMA=y
 CONFIG_COMMON_CLK_DEBUG=y
 # CONFIG_IOMMU_SUPPORT is not set
 CONFIG_EXT2_FS=y
diff --git a/arch/arm/configs/mxs_defconfig b/arch/arm/configs/mxs_defconfig
index ccdb6357fb74..4edcfb4e4dee 100644
--- a/arch/arm/configs/mxs_defconfig
+++ b/arch/arm/configs/mxs_defconfig
@@ -34,7 +34,6 @@ CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_PREEMPT_VOLUNTARY=y
 CONFIG_AEABI=y
-CONFIG_DEFAULT_MMAP_MIN_ADDR=65536
 CONFIG_AUTO_ZRELADDR=y
 CONFIG_FPE_NWFPE=y
 CONFIG_NET=y
diff --git a/arch/arm/configs/tct_hammer_defconfig b/arch/arm/configs/tct_hammer_defconfig
index 1d24f8458bef..71277a1591ba 100644
--- a/arch/arm/configs/tct_hammer_defconfig
+++ b/arch/arm/configs/tct_hammer_defconfig
@@ -7,7 +7,7 @@ CONFIG_SYSFS_DEPRECATED_V2=y
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
-# CONFIG_BUG is not set
+# CONFIG_BUGVERBOSE is not set
 # CONFIG_ELF_CORE is not set
 # CONFIG_SHMEM is not set
 CONFIG_SLOB=y
diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h
index f66626d71e7d..41dc31f834c3 100644
--- a/arch/arm/include/asm/pgtable.h
+++ b/arch/arm/include/asm/pgtable.h
@@ -195,6 +195,18 @@ static inline pte_t *pmd_page_vaddr(pmd_t pmd)
 
 #define pte_clear(mm,addr,ptep) set_pte_ext(ptep, __pte(0), 0)
 
+#define pte_none(pte)           (!pte_val(pte))
+#define pte_present(pte)        (pte_val(pte) & L_PTE_PRESENT)
+#define pte_write(pte)          (!(pte_val(pte) & L_PTE_RDONLY))
+#define pte_dirty(pte)          (pte_val(pte) & L_PTE_DIRTY)
+#define pte_young(pte)          (pte_val(pte) & L_PTE_YOUNG)
+#define pte_exec(pte)           (!(pte_val(pte) & L_PTE_XN))
+#define pte_special(pte)        (0)
+
+#define pte_present_user(pte) \
+        ((pte_val(pte) & (L_PTE_PRESENT | L_PTE_USER)) == \
+         (L_PTE_PRESENT | L_PTE_USER))
+
 #if __LINUX_ARM_ARCH__ < 6
 static inline void __sync_icache_dcache(pte_t pteval)
 {
@@ -206,25 +218,15 @@ extern void __sync_icache_dcache(pte_t pteval);
 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
                               pte_t *ptep, pte_t pteval)
 {
-        if (addr >= TASK_SIZE)
-                set_pte_ext(ptep, pteval, 0);
-        else {
+        unsigned long ext = 0;
+
+        if (addr < TASK_SIZE && pte_present_user(pteval)) {
                 __sync_icache_dcache(pteval);
-                set_pte_ext(ptep, pteval, PTE_EXT_NG);
+                ext |= PTE_EXT_NG;
         }
-}
 
-#define pte_none(pte)           (!pte_val(pte))
-#define pte_present(pte)        (pte_val(pte) & L_PTE_PRESENT)
-#define pte_write(pte)          (!(pte_val(pte) & L_PTE_RDONLY))
-#define pte_dirty(pte)          (pte_val(pte) & L_PTE_DIRTY)
-#define pte_young(pte)          (pte_val(pte) & L_PTE_YOUNG)
-#define pte_exec(pte)           (!(pte_val(pte) & L_PTE_XN))
-#define pte_special(pte)        (0)
-
-#define pte_present_user(pte) \
-        ((pte_val(pte) & (L_PTE_PRESENT | L_PTE_USER)) == \
-         (L_PTE_PRESENT | L_PTE_USER))
+        set_pte_ext(ptep, pteval, ext);
+}
 
 #define PTE_BIT_FUNC(fn,op) \
 static inline pte_t pte_##fn(pte_t pte) { pte_val(pte) op; return pte; }
@@ -251,13 +253,13 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
  *
  *   3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
  *   1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
- *   <--------------- offset --------------------> <- type --> 0 0 0
+ *   <--------------- offset ----------------------> < type -> 0 0 0
  *
- * This gives us up to 63 swap files and 32GB per swap file.  Note that
+ * This gives us up to 31 swap files and 64GB per swap file.  Note that
  * the offset field is always non-zero.
  */
 #define __SWP_TYPE_SHIFT        3
-#define __SWP_TYPE_BITS         6
+#define __SWP_TYPE_BITS         5
 #define __SWP_TYPE_MASK         ((1 << __SWP_TYPE_BITS) - 1)
 #define __SWP_OFFSET_SHIFT      (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT)
 
diff --git a/arch/arm/include/asm/sched_clock.h b/arch/arm/include/asm/sched_clock.h
index e3f757263438..05b8e82ec9f5 100644
--- a/arch/arm/include/asm/sched_clock.h
+++ b/arch/arm/include/asm/sched_clock.h
@@ -10,5 +10,7 @@
 
 extern void sched_clock_postinit(void);
 extern void setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate);
+extern void setup_sched_clock_needs_suspend(u32 (*read)(void), int bits,
+                unsigned long rate);
 
 #endif
diff --git a/arch/arm/kernel/sched_clock.c b/arch/arm/kernel/sched_clock.c
index 27d186abbc06..f4515393248d 100644
--- a/arch/arm/kernel/sched_clock.c
+++ b/arch/arm/kernel/sched_clock.c
@@ -21,6 +21,8 @@ struct clock_data {
         u32 epoch_cyc_copy;
         u32 mult;
         u32 shift;
+        bool suspended;
+        bool needs_suspend;
 };
 
 static void sched_clock_poll(unsigned long wrap_ticks);
@@ -49,6 +51,9 @@ static unsigned long long cyc_to_sched_clock(u32 cyc, u32 mask)
         u64 epoch_ns;
         u32 epoch_cyc;
 
+        if (cd.suspended)
+                return cd.epoch_ns;
+
         /*
          * Load the epoch_cyc and epoch_ns atomically.  We do this by
          * ensuring that we always write epoch_cyc, epoch_ns and
@@ -98,6 +103,13 @@ static void sched_clock_poll(unsigned long wrap_ticks)
         update_sched_clock();
 }
 
+void __init setup_sched_clock_needs_suspend(u32 (*read)(void), int bits,
+                unsigned long rate)
+{
+        setup_sched_clock(read, bits, rate);
+        cd.needs_suspend = true;
+}
+
 void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate)
 {
         unsigned long r, w;
@@ -169,11 +181,23 @@ void __init sched_clock_postinit(void)
 static int sched_clock_suspend(void)
 {
         sched_clock_poll(sched_clock_timer.data);
+        if (cd.needs_suspend)
+                cd.suspended = true;
         return 0;
 }
 
+static void sched_clock_resume(void)
+{
+        if (cd.needs_suspend) {
+                cd.epoch_cyc = read_sched_clock();
+                cd.epoch_cyc_copy = cd.epoch_cyc;
+                cd.suspended = false;
+        }
+}
+
 static struct syscore_ops sched_clock_ops = {
         .suspend = sched_clock_suspend,
+        .resume = sched_clock_resume,
 };
 
 static int __init sched_clock_syscore_init(void)
diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c
index 198b08456e90..26c12c6440fc 100644
--- a/arch/arm/kernel/topology.c
+++ b/arch/arm/kernel/topology.c
@@ -321,7 +321,7 @@ void store_cpu_topology(unsigned int cpuid)
  * init_cpu_topology is called at boot when only one cpu is running
  * which prevent simultaneous write access to cpu_topology array
  */
-void init_cpu_topology(void)
+void __init init_cpu_topology(void)
 {
         unsigned int cpu;
 
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 2473fd1fd51c..af72969820b4 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -16,13 +16,30 @@ lib-y		:= backtrace.o changebit.o csumipv6.o csumpartial.o   \
                    call_with_stack.o
 
 mmu-y   := clear_user.o copy_page.o getuser.o putuser.o
-mmu-y   += copy_from_user.o copy_to_user.o
+
+# the code in uaccess.S is not preemption safe and
+# probably faster on ARMv3 only
+ifeq ($(CONFIG_PREEMPT),y)
+  mmu-y += copy_from_user.o copy_to_user.o
+else
+ifneq ($(CONFIG_CPU_32v3),y)
+  mmu-y += copy_from_user.o copy_to_user.o
+else
+  mmu-y += uaccess.o
+endif
+endif
 
 # using lib_ here won't override already available weak symbols
 obj-$(CONFIG_UACCESS_WITH_MEMCPY) += uaccess_with_memcpy.o
 
-lib-$(CONFIG_MMU)               += $(mmu-y)
-lib-y                           += io-readsw-armv4.o io-writesw-armv4.o
+lib-$(CONFIG_MMU) += $(mmu-y)
+
+ifeq ($(CONFIG_CPU_32v3),y)
+  lib-y += io-readsw-armv3.o io-writesw-armv3.o
+else
+  lib-y += io-readsw-armv4.o io-writesw-armv4.o
+endif
+
 lib-$(CONFIG_ARCH_RPC)          += ecard.o io-acorn.o floppydma.o
 lib-$(CONFIG_ARCH_SHARK)        += io-shark.o
 
diff --git a/arch/arm/lib/io-readsw-armv3.S b/arch/arm/lib/io-readsw-armv3.S
new file mode 100644
index 000000000000..88487c8c4f23
--- /dev/null
+++ b/arch/arm/lib/io-readsw-armv3.S
@@ -0,0 +1,106 @@
+/*
+ *  linux/arch/arm/lib/io-readsw-armv3.S
+ *
+ *  Copyright (C) 1995-2000 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+
+.Linsw_bad_alignment:
+                adr     r0, .Linsw_bad_align_msg
+                mov     r2, lr
+                b       panic
+.Linsw_bad_align_msg:
+                .asciz  "insw: bad buffer alignment (0x%p, lr=0x%08lX)\n"
+                .align
+
+.Linsw_align:   tst     r1, #1
+                bne     .Linsw_bad_alignment
+
+                ldr     r3, [r0]
+                strb    r3, [r1], #1
+                mov     r3, r3, lsr #8
+                strb    r3, [r1], #1
+
+                subs    r2, r2, #1
+                moveq   pc, lr
+
+ENTRY(__raw_readsw)
+                teq     r2, #0          @ do we have to check for the zero len?
+                moveq   pc, lr
+                tst     r1, #3
+                bne     .Linsw_align
+
+.Linsw_aligned: mov     ip, #0xff
+                orr     ip, ip, ip, lsl #8
+                stmfd   sp!, {r4, r5, r6, lr}
+
+                subs    r2, r2, #8
+                bmi     .Lno_insw_8
+
+.Linsw_8_lp:    ldr     r3, [r0]
+                and     r3, r3, ip
+                ldr     r4, [r0]
+                orr     r3, r3, r4, lsl #16
+
+                ldr     r4, [r0]
+                and     r4, r4, ip
+                ldr     r5, [r0]
+                orr     r4, r4, r5, lsl #16
+
+                ldr     r5, [r0]
+                and     r5, r5, ip
+                ldr     r6, [r0]
+                orr     r5, r5, r6, lsl #16
+
+                ldr     r6, [r0]
+                and     r6, r6, ip
+                ldr     lr, [r0]
+                orr     r6, r6, lr, lsl #16
+
+                stmia   r1!, {r3 - r6}
+
+                subs    r2, r2, #8
+                bpl     .Linsw_8_lp
+
+                tst     r2, #7
+                ldmeqfd sp!, {r4, r5, r6, pc}
+
+.Lno_insw_8:    tst     r2, #4
+                beq     .Lno_insw_4
+
+                ldr     r3, [r0]
+                and     r3, r3, ip
+                ldr     r4, [r0]
+                orr     r3, r3, r4, lsl #16
+
+                ldr     r4, [r0]
+                and     r4, r4, ip
+                ldr     r5, [r0]
+                orr     r4, r4, r5, lsl #16
+
+                stmia   r1!, {r3, r4}
+
+.Lno_insw_4:    tst     r2, #2
+                beq     .Lno_insw_2
+
+                ldr     r3, [r0]
+                and     r3, r3, ip
+                ldr     r4, [r0]
+                orr     r3, r3, r4, lsl #16
+
+                str     r3, [r1], #4
+
+.Lno_insw_2:    tst     r2, #1
+                ldrne   r3, [r0]
+                strneb  r3, [r1], #1
+                movne   r3, r3, lsr #8
+                strneb  r3, [r1]
+
+                ldmfd   sp!, {r4, r5, r6, pc}
+
+
diff --git a/arch/arm/lib/io-writesw-armv3.S b/arch/arm/lib/io-writesw-armv3.S
new file mode 100644
index 000000000000..49b800419e32
--- /dev/null
+++ b/arch/arm/lib/io-writesw-armv3.S
@@ -0,0 +1,126 @@
+/*
+ *  linux/arch/arm/lib/io-writesw-armv3.S
+ *
+ *  Copyright (C) 1995-2000 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+
+.Loutsw_bad_alignment:
+                adr     r0, .Loutsw_bad_align_msg
+                mov     r2, lr
+                b       panic
+.Loutsw_bad_align_msg:
+                .asciz  "outsw: bad buffer alignment (0x%p, lr=0x%08lX)\n"
+                .align
+
+.Loutsw_align:  tst     r1, #1
+                bne     .Loutsw_bad_alignment
+
+                add     r1, r1, #2
+
+                ldr     r3, [r1, #-4]
+                mov     r3, r3, lsr #16
+                orr     r3, r3, r3, lsl #16
+                str     r3, [r0]
+                subs    r2, r2, #1
+                moveq   pc, lr
+
+ENTRY(__raw_writesw)
+                teq     r2, #0          @ do we have to check for the zero len?
+                moveq   pc, lr
+                tst     r1, #3
+                bne     .Loutsw_align
+
+                stmfd   sp!, {r4, r5, r6, lr}
+
+                subs    r2, r2, #8
+                bmi     .Lno_outsw_8
+
+.Loutsw_8_lp:   ldmia   r1!, {r3, r4, r5, r6}
+
+                mov     ip, r3, lsl #16
+                orr     ip, ip, ip, lsr #16
+                str     ip, [r0]
+
+                mov     ip, r3, lsr #16
+                orr     ip, ip, ip, lsl #16
+                str     ip, [r0]
+
+                mov     ip, r4, lsl #16
+                orr     ip, ip, ip, lsr #16
+                str     ip, [r0]
+
+                mov     ip, r4, lsr #16
+                orr     ip, ip, ip, lsl #16
+                str     ip, [r0]
+
+                mov     ip, r5, lsl #16
+                orr     ip, ip, ip, lsr #16
+                str     ip, [r0]
+
+                mov     ip, r5, lsr #16
+                orr     ip, ip, ip, lsl #16
+                str     ip, [r0]
+
+                mov     ip, r6, lsl #16
+                orr     ip, ip, ip, lsr #16
+                str     ip, [r0]
+
+                mov     ip, r6, lsr #16
+                orr     ip, ip, ip, lsl #16
+                str     ip, [r0]
+
+                subs    r2, r2, #8
+                bpl     .Loutsw_8_lp
+
+                tst     r2, #7
+                ldmeqfd sp!, {r4, r5, r6, pc}
+
+.Lno_outsw_8:   tst     r2, #4
+                beq     .Lno_outsw_4
+
+                ldmia   r1!, {r3, r4}
+
+                mov     ip, r3, lsl #16
+                orr     ip, ip, ip, lsr #16
+                str     ip, [r0]
+
+                mov     ip, r3, lsr #16
+                orr     ip, ip, ip, lsl #16
+                str     ip, [r0]
+
+                mov     ip, r4, lsl #16
+                orr     ip, ip, ip, lsr #16
+                str     ip, [r0]
+
+                mov     ip, r4, lsr #16
+                orr     ip, ip, ip, lsl #16
+                str     ip, [r0]
+
+.Lno_outsw_4:   tst     r2, #2
+                beq     .Lno_outsw_2
+
+                ldr     r3, [r1], #4
+
+                mov     ip, r3, lsl #16
+                orr     ip, ip, ip, lsr #16
+                str     ip, [r0]
+
+                mov     ip, r3, lsr #16
+                orr     ip, ip, ip, lsl #16
+                str     ip, [r0]
+
+.Lno_outsw_2:   tst     r2, #1
+
+                ldrne   r3, [r1]
+
+                movne   ip, r3, lsl #16
+                orrne   ip, ip, ip, lsr #16
+                strne   ip, [r0]
+
+                ldmfd   sp!, {r4, r5, r6, pc}
diff --git a/arch/arm/lib/uaccess.S b/arch/arm/lib/uaccess.S
new file mode 100644
index 000000000000..5c908b1cb8ed
--- /dev/null
+++ b/arch/arm/lib/uaccess.S
@@ -0,0 +1,564 @@
+/*
+ *  linux/arch/arm/lib/uaccess.S
+ *
+ *  Copyright (C) 1995, 1996,1997,1998 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  Routines to block copy data to/from user memory
+ *   These are highly optimised both for the 4k page size
+ *   and for various alignments.
+ */
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+#include <asm/errno.h>
+#include <asm/domain.h>
+
+                .text
+
+#define PAGE_SHIFT 12
+
+/* Prototype: int __copy_to_user(void *to, const char *from, size_t n)
+ * Purpose  : copy a block to user memory from kernel memory
+ * Params   : to   - user memory
+ *          : from - kernel memory
+ *          : n    - number of bytes to copy
+ * Returns  : Number of bytes NOT copied.
+ */
+
+.Lc2u_dest_not_aligned:
+                rsb     ip, ip, #4
+                cmp     ip, #2
+                ldrb    r3, [r1], #1
+USER(   TUSER(  strb)   r3, [r0], #1)                   @ May fault
+                ldrgeb  r3, [r1], #1
+USER(   TUSER(  strgeb) r3, [r0], #1)                   @ May fault
+                ldrgtb  r3, [r1], #1
+USER(   TUSER(  strgtb) r3, [r0], #1)                   @ May fault
+                sub     r2, r2, ip
+                b       .Lc2u_dest_aligned
+
+ENTRY(__copy_to_user)
+                stmfd   sp!, {r2, r4 - r7, lr}
+                cmp     r2, #4
+                blt     .Lc2u_not_enough
+                ands    ip, r0, #3
+                bne     .Lc2u_dest_not_aligned
+.Lc2u_dest_aligned:
+
+                ands    ip, r1, #3
+                bne     .Lc2u_src_not_aligned
+/*
+ * Seeing as there has to be at least 8 bytes to copy, we can
+ * copy one word, and force a user-mode page fault...
+ */
+
+.Lc2u_0fupi:    subs    r2, r2, #4
+                addmi   ip, r2, #4
+                bmi     .Lc2u_0nowords
+                ldr     r3, [r1], #4
+USER(   TUSER(  str)    r3, [r0], #4)                   @ May fault
+                mov     ip, r0, lsl #32 - PAGE_SHIFT    @ On each page, use a ld/st??t instruction
+                rsb     ip, ip, #0
+                movs    ip, ip, lsr #32 - PAGE_SHIFT
+                beq     .Lc2u_0fupi
+/*
+ * ip = max no. of bytes to copy before needing another "strt" insn
+ */
+                cmp     r2, ip
+                movlt   ip, r2
+                sub     r2, r2, ip
+                subs    ip, ip, #32
+                blt     .Lc2u_0rem8lp
+
+.Lc2u_0cpy8lp:  ldmia   r1!, {r3 - r6}
+                stmia   r0!, {r3 - r6}                  @ Shouldnt fault
+                ldmia   r1!, {r3 - r6}
+                subs    ip, ip, #32
+                stmia   r0!, {r3 - r6}                  @ Shouldnt fault
+                bpl     .Lc2u_0cpy8lp
+
+.Lc2u_0rem8lp:  cmn     ip, #16
+                ldmgeia r1!, {r3 - r6}
+                stmgeia r0!, {r3 - r6}                  @ Shouldnt fault
+                tst     ip, #8
+                ldmneia r1!, {r3 - r4}
+                stmneia r0!, {r3 - r4}                  @ Shouldnt fault
+                tst     ip, #4
+                ldrne   r3, [r1], #4
+        TUSER(  strne) r3, [r0], #4                     @ Shouldnt fault
+                ands    ip, ip, #3
+                beq     .Lc2u_0fupi
+.Lc2u_0nowords: teq     ip, #0
+                beq     .Lc2u_finished
+.Lc2u_nowords:  cmp     ip, #2
+                ldrb    r3, [r1], #1
+USER(   TUSER(  strb)   r3, [r0], #1)                   @ May fault
+                ldrgeb  r3, [r1], #1
+USER(   TUSER(  strgeb) r3, [r0], #1)                   @ May fault
+                ldrgtb  r3, [r1], #1
+USER(   TUSER(  strgtb) r3, [r0], #1)                   @ May fault
+                b       .Lc2u_finished
+
+.Lc2u_not_enough:
+                movs    ip, r2
+                bne     .Lc2u_nowords
+.Lc2u_finished: mov     r0, #0
+                ldmfd   sp!, {r2, r4 - r7, pc}
+
+.Lc2u_src_not_aligned:
+                bic     r1, r1, #3
+                ldr     r7, [r1], #4
+                cmp     ip, #2
+                bgt     .Lc2u_3fupi
+                beq     .Lc2u_2fupi
+.Lc2u_1fupi:    subs    r2, r2, #4
+                addmi   ip, r2, #4
+                bmi     .Lc2u_1nowords
+                mov     r3, r7, pull #8
+                ldr     r7, [r1], #4
+                orr     r3, r3, r7, push #24
+USER(   TUSER(  str)    r3, [r0], #4)                   @ May fault
+                mov     ip, r0, lsl #32 - PAGE_SHIFT
+                rsb     ip, ip, #0
+                movs    ip, ip, lsr #32 - PAGE_SHIFT
+                beq     .Lc2u_1fupi
+                cmp     r2, ip
+                movlt   ip, r2
+                sub     r2, r2, ip
+                subs    ip, ip, #16
+                blt     .Lc2u_1rem8lp
+
+.Lc2u_1cpy8lp:  mov     r3, r7, pull #8
+                ldmia   r1!, {r4 - r7}
+                subs    ip, ip, #16
+                orr     r3, r3, r4, push #24
+                mov     r4, r4, pull #8
+                orr     r4, r4, r5, push #24
+                mov     r5, r5, pull #8
+                orr     r5, r5, r6, push #24
+                mov     r6, r6, pull #8
+                orr     r6, r6, r7, push #24
+                stmia   r0!, {r3 - r6}                  @ Shouldnt fault
+                bpl     .Lc2u_1cpy8lp
+
+.Lc2u_1rem8lp:  tst     ip, #8
+                movne   r3, r7, pull #8
+                ldmneia r1!, {r4, r7}
+                orrne   r3, r3, r4, push #24
+                movne   r4, r4, pull #8
+                orrne   r4, r4, r7, push #24
+                stmneia r0!, {r3 - r4}                  @ Shouldnt fault
+                tst     ip, #4
+                movne   r3, r7, pull #8
+                ldrne   r7, [r1], #4
+                orrne   r3, r3, r7, push #24
+        TUSER(  strne) r3, [r0], #4                     @ Shouldnt fault
+                ands    ip, ip, #3
+                beq     .Lc2u_1fupi
+.Lc2u_1nowords: mov     r3, r7, get_byte_1
+                teq     ip, #0
+                beq     .Lc2u_finished
+                cmp     ip, #2
+USER(   TUSER(  strb)   r3, [r0], #1)                   @ May fault
+                movge   r3, r7, get_byte_2
+USER(   TUSER(  strgeb) r3, [r0], #1)                   @ May fault
+                movgt   r3, r7, get_byte_3
+USER(   TUSER(  strgtb) r3, [r0], #1)                   @ May fault
+                b       .Lc2u_finished
+
+.Lc2u_2fupi:    subs    r2, r2, #4
+                addmi   ip, r2, #4
+                bmi     .Lc2u_2nowords
+                mov     r3, r7, pull #16
+                ldr     r7, [r1], #4
+                orr     r3, r3, r7, push #16
+USER(   TUSER(  str)    r3, [r0], #4)                   @ May fault
+                mov     ip, r0, lsl #32 - PAGE_SHIFT
+                rsb     ip, ip, #0
+                movs    ip, ip, lsr #32 - PAGE_SHIFT
+                beq     .Lc2u_2fupi
+                cmp     r2, ip
+                movlt   ip, r2
+                sub     r2, r2, ip
+                subs    ip, ip, #16
+                blt     .Lc2u_2rem8lp
+
+.Lc2u_2cpy8lp:  mov     r3, r7, pull #16
+                ldmia   r1!, {r4 - r7}
+                subs    ip, ip, #16
+                orr     r3, r3, r4, push #16
+                mov     r4, r4, pull #16
+                orr     r4, r4, r5, push #16
+                mov     r5, r5, pull #16
+                orr     r5, r5, r6, push #16
+                mov     r6, r6, pull #16
+                orr     r6, r6, r7, push #16
+                stmia   r0!, {r3 - r6}                  @ Shouldnt fault
+                bpl     .Lc2u_2cpy8lp
+
+.Lc2u_2rem8lp:  tst     ip, #8
+                movne   r3, r7, pull #16
+                ldmneia r1!, {r4, r7}
+                orrne   r3, r3, r4, push #16
+                movne   r4, r4, pull #16
+                orrne   r4, r4, r7, push #16
+                stmneia r0!, {r3 - r4}                  @ Shouldnt fault
+                tst     ip, #4
+                movne   r3, r7, pull #16
+                ldrne   r7, [r1], #4
+                orrne   r3, r3, r7, push #16
+        TUSER(  strne) r3, [r0], #4                     @ Shouldnt fault
+                ands    ip, ip, #3
+                beq     .Lc2u_2fupi
+.Lc2u_2nowords: mov     r3, r7, get_byte_2
+                teq     ip, #0
+                beq     .Lc2u_finished
+                cmp     ip, #2
+USER(   TUSER(  strb)   r3, [r0], #1)                   @ May fault
+                movge   r3, r7, get_byte_3
+USER(   TUSER(  strgeb) r3, [r0], #1)                   @ May fault
+                ldrgtb  r3, [r1], #0
+USER(   TUSER(  strgtb) r3, [r0], #1)                   @ May fault
+                b       .Lc2u_finished
+
+.Lc2u_3fupi:    subs    r2, r2, #4
+                addmi   ip, r2, #4
+                bmi     .Lc2u_3nowords
+                mov     r3, r7, pull #24
+                ldr     r7, [r1], #4
+                orr     r3, r3, r7, push #8
+USER(   TUSER(  str)    r3, [r0], #4)                   @ May fault
+                mov     ip, r0, lsl #32 - PAGE_SHIFT
+                rsb     ip, ip, #0
+                movs    ip, ip, lsr #32 - PAGE_SHIFT
+                beq     .Lc2u_3fupi
+                cmp     r2, ip
+                movlt   ip, r2
+                sub     r2, r2, ip
+                subs    ip, ip, #16
+                blt     .Lc2u_3rem8lp
+
+.Lc2u_3cpy8lp:  mov     r3, r7, pull #24
+                ldmia   r1!, {r4 - r7}
+                subs    ip, ip, #16
+                orr     r3, r3, r4, push #8
+                mov     r4, r4, pull #24
+                orr     r4, r4, r5, push #8
+                mov     r5, r5, pull #24
+                orr     r5, r5, r6, push #8
+                mov     r6, r6, pull #24
+                orr     r6, r6, r7, push #8
+                stmia   r0!, {r3 - r6}                  @ Shouldnt fault
+                bpl     .Lc2u_3cpy8lp
+
+.Lc2u_3rem8lp:  tst     ip, #8
+                movne   r3, r7, pull #24
+                ldmneia r1!, {r4, r7}
+                orrne   r3, r3, r4, push #8
+                movne   r4, r4, pull #24
+                orrne   r4, r4, r7, push #8
+                stmneia r0!, {r3 - r4}                  @ Shouldnt fault
+                tst     ip, #4
+                movne   r3, r7, pull #24
+                ldrne   r7, [r1], #4
+                orrne   r3, r3, r7, push #8
+        TUSER(  strne) r3, [r0], #4                     @ Shouldnt fault
+                ands    ip, ip, #3
+                beq     .Lc2u_3fupi
+.Lc2u_3nowords: mov     r3, r7, get_byte_3
+                teq     ip, #0
+                beq     .Lc2u_finished
+                cmp     ip, #2
+USER(   TUSER(  strb)   r3, [r0], #1)                   @ May fault
+                ldrgeb  r3, [r1], #1
+USER(   TUSER(  strgeb) r3, [r0], #1)                   @ May fault
+                ldrgtb  r3, [r1], #0
+USER(   TUSER(  strgtb) r3, [r0], #1)                   @ May fault
+                b       .Lc2u_finished
+ENDPROC(__copy_to_user)
+
+                .pushsection .fixup,"ax"
+                .align  0
+9001:           ldmfd   sp!, {r0, r4 - r7, pc}
+                .popsection
+
+/* Prototype: unsigned long __copy_from_user(void *to,const void *from,unsigned long n);
+ * Purpose  : copy a block from user memory to kernel memory
+ * Params   : to   - kernel memory
+ *          : from - user memory
+ *          : n    - number of bytes to copy
+ * Returns  : Number of bytes NOT copied.
+ */
+.Lcfu_dest_not_aligned:
+                rsb     ip, ip, #4
+                cmp     ip, #2
+USER(   TUSER(  ldrb)   r3, [r1], #1)                   @ May fault
+                strb    r3, [r0], #1
+USER(   TUSER(  ldrgeb) r3, [r1], #1)                   @ May fault
+                strgeb  r3, [r0], #1
+USER(   TUSER(  ldrgtb) r3, [r1], #1)                   @ May fault
+                strgtb  r3, [r0], #1
+                sub     r2, r2, ip
+                b       .Lcfu_dest_aligned
+
+ENTRY(__copy_from_user)
+                stmfd   sp!, {r0, r2, r4 - r7, lr}
+                cmp     r2, #4
+                blt     .Lcfu_not_enough
+                ands    ip, r0, #3
+                bne     .Lcfu_dest_not_aligned
+.Lcfu_dest_aligned:
+                ands    ip, r1, #3
+                bne     .Lcfu_src_not_aligned
+
+/*
+ * Seeing as there has to be at least 8 bytes to copy, we can
+ * copy one word, and force a user-mode page fault...
+ */
+
+.Lcfu_0fupi:    subs    r2, r2, #4
+                addmi   ip, r2, #4
+                bmi     .Lcfu_0nowords
+USER(   TUSER(  ldr)    r3, [r1], #4)
+                str     r3, [r0], #4
+                mov     ip, r1, lsl #32 - PAGE_SHIFT    @ On each page, use a ld/st??t instruction
+                rsb     ip, ip, #0
+                movs    ip, ip, lsr #32 - PAGE_SHIFT
+                beq     .Lcfu_0fupi
+/*
+ * ip = max no. of bytes to copy before needing another "strt" insn
+ */
+                cmp     r2, ip
+                movlt   ip, r2
+                sub     r2, r2, ip
+                subs    ip, ip, #32
+                blt     .Lcfu_0rem8lp
+
+.Lcfu_0cpy8lp:  ldmia   r1!, {r3 - r6}                  @ Shouldnt fault
+                stmia   r0!, {r3 - r6}
+                ldmia   r1!, {r3 - r6}                  @ Shouldnt fault
+                subs    ip, ip, #32
+                stmia   r0!, {r3 - r6}
+                bpl     .Lcfu_0cpy8lp
+
+.Lcfu_0rem8lp:  cmn     ip, #16
+                ldmgeia r1!, {r3 - r6}                  @ Shouldnt fault
+                stmgeia r0!, {r3 - r6}
+                tst     ip, #8
+                ldmneia r1!, {r3 - r4}                  @ Shouldnt fault
+                stmneia r0!, {r3 - r4}
+                tst     ip, #4
+        TUSER(  ldrne) r3, [r1], #4                     @ Shouldnt fault
+                strne   r3, [r0], #4
+                ands    ip, ip, #3
+                beq     .Lcfu_0fupi
+.Lcfu_0nowords: teq     ip, #0
+                beq     .Lcfu_finished
+.Lcfu_nowords:  cmp     ip, #2
+USER(   TUSER(  ldrb)   r3, [r1], #1)                   @ May fault
+                strb    r3, [r0], #1
+USER(   TUSER(  ldrgeb) r3, [r1], #1)                   @ May fault
+                strgeb  r3, [r0], #1
+USER(   TUSER(  ldrgtb) r3, [r1], #1)                   @ May fault
+                strgtb  r3, [r0], #1
+                b       .Lcfu_finished
+
+.Lcfu_not_enough:
+                movs    ip, r2
+                bne     .Lcfu_nowords
+.Lcfu_finished: mov     r0, #0
+                add     sp, sp, #8
+                ldmfd   sp!, {r4 - r7, pc}
+
+.Lcfu_src_not_aligned:
+                bic     r1, r1, #3
+USER(   TUSER(  ldr)    r7, [r1], #4)                   @ May fault
+                cmp     ip, #2
+                bgt     .Lcfu_3fupi
+                beq     .Lcfu_2fupi
+.Lcfu_1fupi:    subs    r2, r2, #4
+                addmi   ip, r2, #4
+                bmi     .Lcfu_1nowords
+                mov     r3, r7, pull #8
+USER(   TUSER(  ldr)    r7, [r1], #4)                   @ May fault
+                orr     r3, r3, r7, push #24
+                str     r3, [r0], #4
+                mov     ip, r1, lsl #32 - PAGE_SHIFT
+                rsb     ip, ip, #0
+                movs    ip, ip, lsr #32 - PAGE_SHIFT
+                beq     .Lcfu_1fupi
+                cmp     r2, ip
+                movlt   ip, r2
+                sub     r2, r2, ip
+                subs    ip, ip, #16
+                blt     .Lcfu_1rem8lp
+
+.Lcfu_1cpy8lp:  mov     r3, r7, pull #8
+                ldmia   r1!, {r4 - r7}                  @ Shouldnt fault
+                subs    ip, ip, #16
+                orr     r3, r3, r4, push #24
+                mov     r4, r4, pull #8
+                orr     r4, r4, r5, push #24
+                mov     r5, r5, pull #8
+                orr     r5, r5, r6, push #24
+                mov     r6, r6, pull #8
+                orr     r6, r6, r7, push #24
+                stmia   r0!, {r3 - r6}
+                bpl     .Lcfu_1cpy8lp
+
+.Lcfu_1rem8lp:  tst     ip, #8
+                movne   r3, r7, pull #8
+                ldmneia r1!, {r4, r7}                   @ Shouldnt fault
+                orrne   r3, r3, r4, push #24
+                movne   r4, r4, pull #8
+                orrne   r4, r4, r7, push #24
+                stmneia r0!, {r3 - r4}
+                tst     ip, #4
+                movne   r3, r7, pull #8
+USER(   TUSER(  ldrne) r7, [r1], #4)                    @ May fault
+                orrne   r3, r3, r7, push #24
+                strne   r3, [r0], #4
+                ands    ip, ip, #3
+                beq     .Lcfu_1fupi
+.Lcfu_1nowords: mov     r3, r7, get_byte_1
+                teq     ip, #0
+                beq     .Lcfu_finished
+                cmp     ip, #2
+                strb    r3, [r0], #1
+                movge   r3, r7, get_byte_2
+                strgeb  r3, [r0], #1
+                movgt   r3, r7, get_byte_3
+                strgtb  r3, [r0], #1
+                b       .Lcfu_finished
+
+.Lcfu_2fupi:    subs    r2, r2, #4
+                addmi   ip, r2, #4
+                bmi     .Lcfu_2nowords
+                mov     r3, r7, pull #16
+USER(   TUSER(  ldr)    r7, [r1], #4)                   @ May fault
+                orr     r3, r3, r7, push #16
+                str     r3, [r0], #4
+                mov     ip, r1, lsl #32 - PAGE_SHIFT
+                rsb     ip, ip, #0
+                movs    ip, ip, lsr #32 - PAGE_SHIFT
+                beq     .Lcfu_2fupi
+                cmp     r2, ip
+                movlt   ip, r2
+                sub     r2, r2, ip
+                subs    ip, ip, #16
+                blt     .Lcfu_2rem8lp
+
+
+.Lcfu_2cpy8lp:  mov     r3, r7, pull #16
+                ldmia   r1!, {r4 - r7}                  @ Shouldnt fault
+                subs    ip, ip, #16
+                orr     r3, r3, r4, push #16
+                mov     r4, r4, pull #16
+                orr     r4, r4, r5, push #16
+                mov     r5, r5, pull #16
+                orr     r5, r5, r6, push #16
+                mov     r6, r6, pull #16
+                orr     r6, r6, r7, push #16
+                stmia   r0!, {r3 - r6}
+                bpl     .Lcfu_2cpy8lp
+
+.Lcfu_2rem8lp:  tst     ip, #8
+                movne   r3, r7, pull #16
+                ldmneia r1!, {r4, r7}                   @ Shouldnt fault
+                orrne   r3, r3, r4, push #16
+                movne   r4, r4, pull #16
+                orrne   r4, r4, r7, push #16
+                stmneia r0!, {r3 - r4}
+                tst     ip, #4
+                movne   r3, r7, pull #16
+USER(   TUSER(  ldrne) r7, [r1], #4)                    @ May fault
+                orrne   r3, r3, r7, push #16
+                strne   r3, [r0], #4
+                ands    ip, ip, #3
+                beq     .Lcfu_2fupi
+.Lcfu_2nowords: mov     r3, r7, get_byte_2
+                teq     ip, #0
+                beq     .Lcfu_finished
+                cmp     ip, #2
+                strb    r3, [r0], #1
+                movge   r3, r7, get_byte_3
+                strgeb  r3, [r0], #1
+USER(   TUSER(  ldrgtb) r3, [r1], #0)                   @ May fault
+                strgtb  r3, [r0], #1
+                b       .Lcfu_finished
+
+.Lcfu_3fupi:    subs    r2, r2, #4
+                addmi   ip, r2, #4
+                bmi     .Lcfu_3nowords
+                mov     r3, r7, pull #24
+USER(   TUSER(  ldr)    r7, [r1], #4)                   @ May fault
+                orr     r3, r3, r7, push #8
+                str     r3, [r0], #4
+                mov     ip, r1, lsl #32 - PAGE_SHIFT
+                rsb     ip, ip, #0
+                movs    ip, ip, lsr #32 - PAGE_SHIFT
+                beq     .Lcfu_3fupi
+                cmp     r2, ip
+                movlt   ip, r2
+                sub     r2, r2, ip
+                subs    ip, ip, #16
+                blt     .Lcfu_3rem8lp
+
+.Lcfu_3cpy8lp:  mov     r3, r7, pull #24
+                ldmia   r1!, {r4 - r7}                  @ Shouldnt fault
+                orr     r3, r3, r4, push #8
+                mov     r4, r4, pull #24
+                orr     r4, r4, r5, push #8
+                mov     r5, r5, pull #24
+                orr     r5, r5, r6, push #8
+                mov     r6, r6, pull #24
+                orr     r6, r6, r7, push #8
+                stmia   r0!, {r3 - r6}
+                subs    ip, ip, #16
+                bpl     .Lcfu_3cpy8lp
+
+.Lcfu_3rem8lp:  tst     ip, #8
+                movne   r3, r7, pull #24
+                ldmneia r1!, {r4, r7}                   @ Shouldnt fault
+                orrne   r3, r3, r4, push #8
+                movne   r4, r4, pull #24
+                orrne   r4, r4, r7, push #8
+                stmneia r0!, {r3 - r4}
+                tst     ip, #4
+                movne   r3, r7, pull #24
+USER(   TUSER(  ldrne) r7, [r1], #4)                    @ May fault
+                orrne   r3, r3, r7, push #8
+                strne   r3, [r0], #4
+                ands    ip, ip, #3
+                beq     .Lcfu_3fupi
+.Lcfu_3nowords: mov     r3, r7, get_byte_3
+                teq     ip, #0
+                beq     .Lcfu_finished
+                cmp     ip, #2
+                strb    r3, [r0], #1
+USER(   TUSER(  ldrgeb) r3, [r1], #1)                   @ May fault
+                strgeb  r3, [r0], #1
+USER(   TUSER(  ldrgtb) r3, [r1], #1)                   @ May fault
+                strgtb  r3, [r0], #1
+                b       .Lcfu_finished
+ENDPROC(__copy_from_user)
+
+                .pushsection .fixup,"ax"
+                .align  0
+                /*
+                 * We took an exception.  r0 contains a pointer to
+                 * the byte not copied.
+                 */
+9001:           ldr     r2, [sp], #4                    @ void *to
+                sub     r2, r0, r2                      @ bytes copied
+                ldr     r1, [sp], #4                    @ unsigned long count
+                subs    r4, r1, r2                      @ bytes left to copy
+                movne   r1, r4
+                blne    __memzero
+                mov     r0, r4
+                ldmfd   sp!, {r4 - r7, pc}
+                .popsection
+
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c
index 5de69f2fcca9..f6b9fc70161b 100644
--- a/arch/arm/mach-davinci/board-neuros-osd2.c
+++ b/arch/arm/mach-davinci/board-neuros-osd2.c
@@ -162,38 +162,6 @@ static void __init davinci_ntosd2_map_io(void)
         dm644x_init();
 }
 
-/*
- I2C initialization
-*/
-static struct davinci_i2c_platform_data ntosd2_i2c_pdata = {
-        .bus_freq       = 20 /* kHz */,
-        .bus_delay      = 100 /* usec */,
-};
-
-static struct i2c_board_info __initdata ntosd2_i2c_info[] =  {
-};
-
-static  int ntosd2_init_i2c(void)
-{
-        int     status;
-
-        davinci_init_i2c(&ntosd2_i2c_pdata);
-        status = gpio_request(NTOSD2_MSP430_IRQ, ntosd2_i2c_info[0].type);
-        if (status == 0) {
-                status = gpio_direction_input(NTOSD2_MSP430_IRQ);
-                if (status == 0) {
-                        status = gpio_to_irq(NTOSD2_MSP430_IRQ);
-                        if (status > 0) {
-                                ntosd2_i2c_info[0].irq = status;
-                                i2c_register_board_info(1,
-                                        ntosd2_i2c_info,
-                                        ARRAY_SIZE(ntosd2_i2c_info));
-                        }
-                }
-        }
-        return status;
-}
-
 static struct davinci_mmc_config davinci_ntosd2_mmc_config = {
         .wires          = 4,
         .version        = MMC_CTLR_VERSION_1
@@ -218,7 +186,6 @@ static __init void davinci_ntosd2_init(void)
 {
         struct clk *aemif_clk;
         struct davinci_soc_info *soc_info = &davinci_soc_info;
-        int     status;
 
         aemif_clk = clk_get(NULL, "aemif");
         clk_enable(aemif_clk);
@@ -242,12 +209,6 @@ static __init void davinci_ntosd2_init(void)
         platform_add_devices(davinci_ntosd2_devices,
                                 ARRAY_SIZE(davinci_ntosd2_devices));
 
-        /* Initialize I2C interface specific for this board */
-        status = ntosd2_init_i2c();
-        if (status < 0)
-                pr_warning("davinci_ntosd2_init: msp430 irq setup failed:"
-                                                "        %d\n", status);
-
         davinci_serial_init(&uart_config);
         dm644x_init_asp(&dm644x_ntosd2_snd_data);
 
diff --git a/arch/arm/mach-exynos/pm_domains.c b/arch/arm/mach-exynos/pm_domains.c
index 373c3c00d24c..c0bc83a7663e 100644
--- a/arch/arm/mach-exynos/pm_domains.c
+++ b/arch/arm/mach-exynos/pm_domains.c
@@ -115,7 +115,7 @@ static __init int exynos_pm_dt_parse_domains(void)
 }
 #endif /* CONFIG_OF */
 
-static __init void exynos_pm_add_dev_to_genpd(struct platform_device *pdev,
+static __init __maybe_unused void exynos_pm_add_dev_to_genpd(struct platform_device *pdev,
                                                 struct exynos_pm_domain *pd)
 {
         if (pdev->dev.bus) {
diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c
index 7aa6313fb167..f69ca4680049 100644
--- a/arch/arm/mach-imx/clk-imx27.c
+++ b/arch/arm/mach-imx/clk-imx27.c
@@ -223,7 +223,7 @@ int __init mx27_clocks_init(unsigned long fref)
         clk_register_clkdev(clk[per3_gate], "per", "imx-fb.0");
         clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx-fb.0");
         clk_register_clkdev(clk[lcdc_ahb_gate], "ahb", "imx-fb.0");
-        clk_register_clkdev(clk[csi_ahb_gate], NULL, "mx2-camera.0");
+        clk_register_clkdev(clk[csi_ahb_gate], "ahb", "mx2-camera.0");
         clk_register_clkdev(clk[usb_div], "per", "fsl-usb2-udc");
         clk_register_clkdev(clk[usb_ipg_gate], "ipg", "fsl-usb2-udc");
         clk_register_clkdev(clk[usb_ahb_gate], "ahb", "fsl-usb2-udc");
@@ -250,8 +250,10 @@ int __init mx27_clocks_init(unsigned long fref)
         clk_register_clkdev(clk[i2c2_ipg_gate], NULL, "imx-i2c.1");
         clk_register_clkdev(clk[owire_ipg_gate], NULL, "mxc_w1.0");
         clk_register_clkdev(clk[kpp_ipg_gate], NULL, "imx-keypad");
-        clk_register_clkdev(clk[emma_ahb_gate], "ahb", "imx-emma");
-        clk_register_clkdev(clk[emma_ipg_gate], "ipg", "imx-emma");
+        clk_register_clkdev(clk[emma_ahb_gate], "emma-ahb", "mx2-camera.0");
+        clk_register_clkdev(clk[emma_ipg_gate], "emma-ipg", "mx2-camera.0");
+        clk_register_clkdev(clk[emma_ahb_gate], "ahb", "m2m-emmaprp.0");
+        clk_register_clkdev(clk[emma_ipg_gate], "ipg", "m2m-emmaprp.0");
         clk_register_clkdev(clk[iim_ipg_gate], "iim", NULL);
         clk_register_clkdev(clk[gpio_ipg_gate], "gpio", NULL);
         clk_register_clkdev(clk[brom_ahb_gate], "brom", NULL);
diff --git a/arch/arm/mach-imx/clk-imx31.c b/arch/arm/mach-imx/clk-imx31.c
index 8e19e70f90f9..1253af2d9971 100644
--- a/arch/arm/mach-imx/clk-imx31.c
+++ b/arch/arm/mach-imx/clk-imx31.c
@@ -130,7 +130,7 @@ int __init mx31_clocks_init(unsigned long fref)
         clk_register_clkdev(clk[nfc], NULL, "mxc_nand.0");
         clk_register_clkdev(clk[ipu_gate], NULL, "ipu-core");
         clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb");
-        clk_register_clkdev(clk[kpp_gate], "kpp", NULL);
+        clk_register_clkdev(clk[kpp_gate], NULL, "imx-keypad");
         clk_register_clkdev(clk[usb_div_post], "per", "mxc-ehci.0");
         clk_register_clkdev(clk[usb_gate], "ahb", "mxc-ehci.0");
         clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.0");
diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c
index f6086693ebd2..4bdcaa97bd98 100644
--- a/arch/arm/mach-imx/clk-imx51-imx53.c
+++ b/arch/arm/mach-imx/clk-imx51-imx53.c
@@ -303,6 +303,7 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil,
         clk_prepare_enable(clk[aips_tz2]); /* fec */
         clk_prepare_enable(clk[spba]);
         clk_prepare_enable(clk[emi_fast_gate]); /* fec */
+        clk_prepare_enable(clk[emi_slow_gate]); /* eim */
         clk_prepare_enable(clk[tmax1]);
         clk_prepare_enable(clk[tmax2]); /* esdhc2, fec */
         clk_prepare_enable(clk[tmax3]); /* esdhc1, esdhc4 */
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index ebf680bebdf2..3fa6c51390da 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -11,6 +11,7 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/device.h>
+#include <linux/export.h>
 #include <linux/spinlock.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index 7b1055c8e0b9..3b2267529f5e 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -456,7 +456,7 @@ static void __init ap_init_timer(void)
 
         clk = clk_get_sys("ap_timer", NULL);
         BUG_ON(IS_ERR(clk));
-        clk_enable(clk);
+        clk_prepare_enable(clk);
         rate = clk_get_rate(clk);
 
         writel(0, TIMER0_VA_BASE + TIMER_CTRL);
diff --git a/arch/arm/mach-kirkwood/Makefile.boot b/arch/arm/mach-kirkwood/Makefile.boot
index 2a576abf409b..a5717558ee89 100644
--- a/arch/arm/mach-kirkwood/Makefile.boot
+++ b/arch/arm/mach-kirkwood/Makefile.boot
@@ -9,5 +9,5 @@ dtb-$(CONFIG_MACH_ICONNECT_DT) += kirkwood-iconnect.dtb
 dtb-$(CONFIG_MACH_IB62X0_DT) += kirkwood-ib62x0.dtb
 dtb-$(CONFIG_MACH_TS219_DT)     += kirkwood-qnap-ts219.dtb
 dtb-$(CONFIG_MACH_GOFLEXNET_DT) += kirkwood-goflexnet.dtb
-dbt-$(CONFIG_MACH_LSXL_DT) += kirkwood-lschlv2.dtb
-dbt-$(CONFIG_MACH_LSXL_DT) += kirkwood-lsxhl.dtb
+dtb-$(CONFIG_MACH_LSXL_DT) += kirkwood-lschlv2.dtb
+dtb-$(CONFIG_MACH_LSXL_DT) += kirkwood-lsxhl.dtb
diff --git a/arch/arm/mach-mxs/Kconfig b/arch/arm/mach-mxs/Kconfig
index ccdf83b17cf1..9a8bbda195b2 100644
--- a/arch/arm/mach-mxs/Kconfig
+++ b/arch/arm/mach-mxs/Kconfig
@@ -2,9 +2,6 @@ if ARCH_MXS
 
 source "arch/arm/mach-mxs/devices/Kconfig"
 
-config MXS_OCOTP
-        bool
-
 config SOC_IMX23
         bool
         select ARM_AMBA
@@ -66,7 +63,6 @@ config MACH_MX28EVK
         select MXS_HAVE_PLATFORM_MXS_SAIF
         select MXS_HAVE_PLATFORM_MXS_I2C
         select MXS_HAVE_PLATFORM_RTC_STMP3XXX
-        select MXS_OCOTP
         help
           Include support for MX28EVK platform. This includes specific
           configurations for the board and its peripherals.
@@ -94,7 +90,6 @@ config MODULE_M28
         select MXS_HAVE_PLATFORM_MXS_I2C
         select MXS_HAVE_PLATFORM_MXS_MMC
         select MXS_HAVE_PLATFORM_MXSFB
-        select MXS_OCOTP
 
 config MODULE_APX4
         bool
@@ -106,7 +101,6 @@ config MODULE_APX4
         select MXS_HAVE_PLATFORM_MXS_I2C
         select MXS_HAVE_PLATFORM_MXS_MMC
         select MXS_HAVE_PLATFORM_MXS_SAIF
-        select MXS_OCOTP
 
 config MACH_TX28
         bool "Ka-Ro TX28 module"
diff --git a/arch/arm/mach-mxs/Makefile b/arch/arm/mach-mxs/Makefile
index e41590ccb437..fed3695a1339 100644
--- a/arch/arm/mach-mxs/Makefile
+++ b/arch/arm/mach-mxs/Makefile
@@ -1,7 +1,6 @@
 # Common support
-obj-y := devices.o icoll.o iomux.o system.o timer.o mm.o
+obj-y := devices.o icoll.o iomux.o ocotp.o system.o timer.o mm.o
 
-obj-$(CONFIG_MXS_OCOTP) += ocotp.o
 obj-$(CONFIG_PM) += pm.o
 
 obj-$(CONFIG_MACH_MXS_DT) += mach-mxs.o
diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c
index 5905ed130e94..d89d87ae144c 100644
--- a/arch/arm/mach-pxa/raumfeld.c
+++ b/arch/arm/mach-pxa/raumfeld.c
@@ -953,12 +953,12 @@ static struct i2c_board_info raumfeld_connector_i2c_board_info __initdata = {
 
 static struct eeti_ts_platform_data eeti_ts_pdata = {
         .irq_active_high = 1,
+        .irq_gpio = GPIO_TOUCH_IRQ,
 };
 
 static struct i2c_board_info raumfeld_controller_i2c_board_info __initdata = {
         .type   = "eeti_ts",
         .addr   = 0x0a,
-        .irq    = PXA_GPIO_TO_IRQ(GPIO_TOUCH_IRQ),
         .platform_data = &eeti_ts_pdata,
 };
 
diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig
index e24961109b70..d56b0f7f2b20 100644
--- a/arch/arm/mach-s3c24xx/Kconfig
+++ b/arch/arm/mach-s3c24xx/Kconfig
@@ -483,7 +483,7 @@ config MACH_NEO1973_GTA02
         select I2C
         select POWER_SUPPLY
         select MACH_NEO1973
-        select S3C2410_PWM
+        select S3C24XX_PWM
         select S3C_DEV_USB_HOST
         help
            Say Y here if you are using the Openmoko GTA02 / Freerunner GSM Phone
@@ -493,7 +493,7 @@ config MACH_RX1950
         select S3C24XX_DCLK
         select PM_H1940 if PM
         select I2C
-        select S3C2410_PWM
+        select S3C24XX_PWM
         select S3C_DEV_NAND
         select S3C2410_IOTIMING if S3C2440_CPUFREQ
         select S3C2440_XTAL_16934400
diff --git a/arch/arm/mach-sa1100/leds-hackkit.c b/arch/arm/mach-sa1100/leds-hackkit.c
index 6a2352436e62..f8e47235babe 100644
--- a/arch/arm/mach-sa1100/leds-hackkit.c
+++ b/arch/arm/mach-sa1100/leds-hackkit.c
@@ -10,6 +10,7 @@
  * as cpu led, the green one is used as timer led.
  */
 #include <linux/init.h>
+#include <linux/io.h>
 
 #include <mach/hardware.h>
 #include <asm/leds.h>
diff --git a/arch/arm/mach-tegra/board-harmony-power.c b/arch/arm/mach-tegra/board-harmony-power.c
index 8fd387bf31f0..b7344beec102 100644
--- a/arch/arm/mach-tegra/board-harmony-power.c
+++ b/arch/arm/mach-tegra/board-harmony-power.c
@@ -51,7 +51,7 @@ static struct regulator_init_data ldo0_data = {
         .consumer_supplies = tps658621_ldo0_supply,
 };
 
-#define HARMONY_REGULATOR_INIT(_id, _name, _supply, _minmv, _maxmv)     \
+#define HARMONY_REGULATOR_INIT(_id, _name, _supply, _minmv, _maxmv, _on)\
         static struct regulator_init_data _id##_data = {                \
                 .supply_regulator = _supply,                            \
                 .constraints = {                                        \
@@ -63,21 +63,22 @@ static struct regulator_init_data ldo0_data = {
                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
                                            REGULATOR_CHANGE_STATUS |    \
                                            REGULATOR_CHANGE_VOLTAGE),   \
+                        .always_on = _on,                               \
                 },                                                      \
         }
 
-HARMONY_REGULATOR_INIT(sm0,  "vdd_sm0",  "vdd_sys", 725, 1500);
-HARMONY_REGULATOR_INIT(sm1,  "vdd_sm1",  "vdd_sys", 725, 1500);
-HARMONY_REGULATOR_INIT(sm2,  "vdd_sm2",  "vdd_sys", 3000, 4550);
-HARMONY_REGULATOR_INIT(ldo1, "vdd_ldo1", "vdd_sm2", 725, 1500);
-HARMONY_REGULATOR_INIT(ldo2, "vdd_ldo2", "vdd_sm2", 725, 1500);
-HARMONY_REGULATOR_INIT(ldo3, "vdd_ldo3", "vdd_sm2", 1250, 3300);
-HARMONY_REGULATOR_INIT(ldo4, "vdd_ldo4", "vdd_sm2", 1700, 2475);
-HARMONY_REGULATOR_INIT(ldo5, "vdd_ldo5", NULL,      1250, 3300);
-HARMONY_REGULATOR_INIT(ldo6, "vdd_ldo6", "vdd_sm2", 1250, 3300);
-HARMONY_REGULATOR_INIT(ldo7, "vdd_ldo7", "vdd_sm2", 1250, 3300);
-HARMONY_REGULATOR_INIT(ldo8, "vdd_ldo8", "vdd_sm2", 1250, 3300);
-HARMONY_REGULATOR_INIT(ldo9, "vdd_ldo9", "vdd_sm2", 1250, 3300);
+HARMONY_REGULATOR_INIT(sm0,  "vdd_sm0",  "vdd_sys", 725, 1500, 1);
+HARMONY_REGULATOR_INIT(sm1,  "vdd_sm1",  "vdd_sys", 725, 1500, 1);
+HARMONY_REGULATOR_INIT(sm2,  "vdd_sm2",  "vdd_sys", 3000, 4550, 1);
+HARMONY_REGULATOR_INIT(ldo1, "vdd_ldo1", "vdd_sm2", 725, 1500, 1);
+HARMONY_REGULATOR_INIT(ldo2, "vdd_ldo2", "vdd_sm2", 725, 1500, 0);
+HARMONY_REGULATOR_INIT(ldo3, "vdd_ldo3", "vdd_sm2", 1250, 3300, 1);
+HARMONY_REGULATOR_INIT(ldo4, "vdd_ldo4", "vdd_sm2", 1700, 2475, 1);
+HARMONY_REGULATOR_INIT(ldo5, "vdd_ldo5", NULL,      1250, 3300, 1);
+HARMONY_REGULATOR_INIT(ldo6, "vdd_ldo6", "vdd_sm2", 1250, 3300, 0);
+HARMONY_REGULATOR_INIT(ldo7, "vdd_ldo7", "vdd_sm2", 1250, 3300, 0);
+HARMONY_REGULATOR_INIT(ldo8, "vdd_ldo8", "vdd_sm2", 1250, 3300, 0);
+HARMONY_REGULATOR_INIT(ldo9, "vdd_ldo9", "vdd_sm2", 1250, 3300, 1);
 
 #define TPS_REG(_id, _data)                     \
         {                                       \
@@ -119,9 +120,10 @@ static struct i2c_board_info __initdata harmony_regulators[] = {
 
 int __init harmony_regulator_init(void)
 {
+        regulator_register_always_on(0, "vdd_sys",
+                NULL, 0, 5000000);
+
         if (machine_is_harmony()) {
-                regulator_register_always_on(0, "vdd_sys",
-                        NULL, 0, 5000000);
                 i2c_register_board_info(3, harmony_regulators, 1);
         } else { /* Harmony, booted using device tree */
                 struct device_node *np;
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index c2cdf6500f75..4e7d1182e8a3 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -358,7 +358,7 @@ void __init dma_contiguous_remap(void)
                 if (end > arm_lowmem_limit)
                         end = arm_lowmem_limit;
                 if (start >= end)
-                        return;
+                        continue;
 
                 map.pfn = __phys_to_pfn(start);
                 map.virtual = __phys_to_virt(start);
@@ -423,7 +423,7 @@ static void *__alloc_from_pool(size_t size, struct page **ret_page)
         unsigned int pageno;
         unsigned long flags;
         void *ptr = NULL;
-        size_t align;
+        unsigned long align_mask;
 
         if (!pool->vaddr) {
                 WARN(1, "coherent pool not initialised!\n");
@@ -435,11 +435,11 @@ static void *__alloc_from_pool(size_t size, struct page **ret_page)
          * small, so align them to their order in pages, minimum is a page
          * size. This helps reduce fragmentation of the DMA space.
          */
-        align = PAGE_SIZE << get_order(size);
+        align_mask = (1 << get_order(size)) - 1;
 
         spin_lock_irqsave(&pool->lock, flags);
         pageno = bitmap_find_next_zero_area(pool->bitmap, pool->nr_pages,
-                                            0, count, (1 << align) - 1);
+                                            0, count, align_mask);
         if (pageno < pool->nr_pages) {
                 bitmap_set(pool->bitmap, pageno, count);
                 ptr = pool->vaddr + PAGE_SIZE * pageno;
@@ -648,12 +648,12 @@ void arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
 
         if (arch_is_coherent() || nommu()) {
                 __dma_free_buffer(page, size);
+        } else if (__free_from_pool(cpu_addr, size)) {
+                return;
         } else if (!IS_ENABLED(CONFIG_CMA)) {
                 __dma_free_remap(cpu_addr, size);
                 __dma_free_buffer(page, size);
         } else {
-                if (__free_from_pool(cpu_addr, size))
-                        return;
                 /*
                  * Non-atomic allocations cannot be freed with IRQs disabled
                  */
diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c
index 77458548e031..40ca11ed6e5f 100644
--- a/arch/arm/mm/flush.c
+++ b/arch/arm/mm/flush.c
@@ -231,8 +231,6 @@ void __sync_icache_dcache(pte_t pteval)
         struct page *page;
         struct address_space *mapping;
 
-        if (!pte_present_user(pteval))
-                return;
         if (cache_is_vipt_nonaliasing() && !pte_exec(pteval))
                 /* only flush non-aliasing VIPT caches for exec mappings */
                 return;
diff --git a/arch/arm/mm/tlb-v7.S b/arch/arm/mm/tlb-v7.S
index c2021139cb56..ea94765acf9a 100644
--- a/arch/arm/mm/tlb-v7.S
+++ b/arch/arm/mm/tlb-v7.S
@@ -38,10 +38,10 @@ ENTRY(v7wbi_flush_user_tlb_range)
         dsb
         mov     r0, r0, lsr #PAGE_SHIFT         @ align address
         mov     r1, r1, lsr #PAGE_SHIFT
-#ifdef CONFIG_ARM_ERRATA_720789
-        mov     r3, #0
-#else
         asid    r3, r3                          @ mask ASID
+#ifdef CONFIG_ARM_ERRATA_720789
+        ALT_SMP(W(mov)  r3, #0  )
+        ALT_UP(W(nop)           )
 #endif
         orr     r0, r3, r0, lsl #PAGE_SHIFT     @ Create initial MVA
         mov     r1, r1, lsl #PAGE_SHIFT
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 7aca31c1df1f..9c3b90c3538e 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -403,7 +403,8 @@ config S5P_DEV_USB_EHCI
 
 config S3C24XX_PWM
         bool "PWM device support"
-        select HAVE_PWM
+        select PWM
+        select PWM_SAMSUNG
         help
           Support for exporting the PWM timer blocks via the pwm device
           system
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c
index fb849d044bde..c834b32af275 100644
--- a/arch/arm/vfp/vfpmodule.c
+++ b/arch/arm/vfp/vfpmodule.c
@@ -719,8 +719,10 @@ static int __init vfp_init(void)
                         if ((fmrx(MVFR1) & 0x000fff00) == 0x00011100)
                                 elf_hwcap |= HWCAP_NEON;
 #endif
+#ifdef CONFIG_VFPv3
                         if ((fmrx(MVFR1) & 0xf0000000) == 0x10000000)
                                 elf_hwcap |= HWCAP_VFPv4;
+#endif
                 }
         }
         return 0;
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c
index ada8f0fc71e4..fb96e607adcf 100644
--- a/arch/blackfin/kernel/setup.c
+++ b/arch/blackfin/kernel/setup.c
@@ -52,7 +52,6 @@ EXPORT_SYMBOL(reserved_mem_dcache_on);
 #ifdef CONFIG_MTD_UCLINUX
 extern struct map_info uclinux_ram_map;
 unsigned long memory_mtd_end, memory_mtd_start, mtd_size;
-unsigned long _ebss;
 EXPORT_SYMBOL(memory_mtd_end);
 EXPORT_SYMBOL(memory_mtd_start);
 EXPORT_SYMBOL(mtd_size);
diff --git a/arch/c6x/Kconfig b/arch/c6x/Kconfig
index 052f81a76239..983c859e40b7 100644
--- a/arch/c6x/Kconfig
+++ b/arch/c6x/Kconfig
@@ -6,6 +6,7 @@
 config C6X
         def_bool y
         select CLKDEV_LOOKUP
+        select GENERIC_ATOMIC64
         select GENERIC_IRQ_SHOW
         select HAVE_ARCH_TRACEHOOK
         select HAVE_DMA_API_DEBUG
diff --git a/arch/c6x/include/asm/cache.h b/arch/c6x/include/asm/cache.h
index 6d521d96d941..09c5a0f5f4d1 100644
--- a/arch/c6x/include/asm/cache.h
+++ b/arch/c6x/include/asm/cache.h
@@ -1,7 +1,7 @@
 /*
  *  Port on Texas Instruments TMS320C6x architecture
  *
- *  Copyright (C) 2005, 2006, 2009, 2010 Texas Instruments Incorporated
+ *  Copyright (C) 2005, 2006, 2009, 2010, 2012 Texas Instruments Incorporated
  *  Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
  *
  *  This program is free software; you can redistribute it and/or modify
@@ -16,9 +16,14 @@
 /*
  * Cache line size
  */
-#define L1D_CACHE_BYTES   64
-#define L1P_CACHE_BYTES   32
-#define L2_CACHE_BYTES    128
+#define L1D_CACHE_SHIFT   6
+#define L1D_CACHE_BYTES   (1 << L1D_CACHE_SHIFT)
+
+#define L1P_CACHE_SHIFT   5
+#define L1P_CACHE_BYTES   (1 << L1P_CACHE_SHIFT)
+
+#define L2_CACHE_SHIFT    7
+#define L2_CACHE_BYTES    (1 << L2_CACHE_SHIFT)
 
 /*
  * L2 used as cache
@@ -29,7 +34,8 @@
  * For practical reasons the L1_CACHE_BYTES defines should not be smaller than
  * the L2 line size
  */
-#define L1_CACHE_BYTES        L2_CACHE_BYTES
+#define L1_CACHE_SHIFT        L2_CACHE_SHIFT
+#define L1_CACHE_BYTES        (1 << L1_CACHE_SHIFT)
 
 #define L2_CACHE_ALIGN_LOW(x) \
         (((x) & ~(L2_CACHE_BYTES - 1)))
diff --git a/arch/ia64/configs/generic_defconfig b/arch/ia64/configs/generic_defconfig
index 954d81e2e837..7913695b2fcb 100644
--- a/arch/ia64/configs/generic_defconfig
+++ b/arch/ia64/configs/generic_defconfig
@@ -234,5 +234,4 @@ CONFIG_CRYPTO_PCBC=m
 CONFIG_CRYPTO_MD5=y
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRC_T10DIF=y
-CONFIG_MISC_DEVICES=y
 CONFIG_INTEL_IOMMU=y
diff --git a/arch/ia64/configs/gensparse_defconfig b/arch/ia64/configs/gensparse_defconfig
index 91c41ecfa6d9..f8e913365423 100644
--- a/arch/ia64/configs/gensparse_defconfig
+++ b/arch/ia64/configs/gensparse_defconfig
@@ -209,4 +209,3 @@ CONFIG_MAGIC_SYSRQ=y
 CONFIG_DEBUG_KERNEL=y
 CONFIG_DEBUG_MUTEXES=y
 CONFIG_CRYPTO_MD5=y
-CONFIG_MISC_DEVICES=y
diff --git a/arch/ia64/kernel/acpi.c b/arch/ia64/kernel/acpi.c
index 6f38b6120d96..440578850ae5 100644
--- a/arch/ia64/kernel/acpi.c
+++ b/arch/ia64/kernel/acpi.c
@@ -497,7 +497,7 @@ acpi_numa_processor_affinity_init(struct acpi_srat_cpu_affinity *pa)
         srat_num_cpus++;
 }
 
-void __init
+int __init
 acpi_numa_memory_affinity_init(struct acpi_srat_mem_affinity *ma)
 {
         unsigned long paddr, size;
@@ -512,7 +512,7 @@ acpi_numa_memory_affinity_init(struct acpi_srat_mem_affinity *ma)
 
         /* Ignore disabled entries */
         if (!(ma->flags & ACPI_SRAT_MEM_ENABLED))
-                return;
+                return -1;
 
         /* record this node in proximity bitmap */
         pxm_bit_set(pxm);
@@ -531,6 +531,7 @@ acpi_numa_memory_affinity_init(struct acpi_srat_mem_affinity *ma)
         p->size = size;
         p->nid = pxm;
         num_node_memblks++;
+        return 0;
 }
 
 void __init acpi_numa_arch_fixup(void)
diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig
index 0b0f8b8c4a26..b22df9410dce 100644
--- a/arch/m68k/Kconfig
+++ b/arch/m68k/Kconfig
@@ -5,6 +5,7 @@ config M68K
         select HAVE_AOUT if MMU
         select HAVE_GENERIC_HARDIRQS
         select GENERIC_IRQ_SHOW
+        select GENERIC_ATOMIC64
         select ARCH_HAVE_NMI_SAFE_CMPXCHG if RMW_INSNS
         select GENERIC_CPU_DEVICES
         select GENERIC_STRNCPY_FROM_USER if MMU
@@ -54,18 +55,6 @@ config ZONE_DMA
         bool
         default y
 
-config CPU_HAS_NO_BITFIELDS
-        bool
-
-config CPU_HAS_NO_MULDIV64
-        bool
-
-config CPU_HAS_ADDRESS_SPACES
-        bool
-
-config FPU
-        bool
-
 config HZ
         int
         default 1000 if CLEOPATRA
diff --git a/arch/m68k/Kconfig.cpu b/arch/m68k/Kconfig.cpu
index 43a9f8f1b8eb..c4eb79edecec 100644
--- a/arch/m68k/Kconfig.cpu
+++ b/arch/m68k/Kconfig.cpu
@@ -28,6 +28,7 @@ config COLDFIRE
         select CPU_HAS_NO_BITFIELDS
         select CPU_HAS_NO_MULDIV64
         select GENERIC_CSUM
+        select HAVE_CLK
 
 endchoice
 
@@ -37,6 +38,7 @@ config M68000
         bool
         select CPU_HAS_NO_BITFIELDS
         select CPU_HAS_NO_MULDIV64
+        select CPU_HAS_NO_UNALIGNED
         select GENERIC_CSUM
         help
           The Freescale (was Motorola) 68000 CPU is the first generation of
@@ -48,6 +50,7 @@ config M68000
 config MCPU32
         bool
         select CPU_HAS_NO_BITFIELDS
+        select CPU_HAS_NO_UNALIGNED
         help
           The Freescale (was then Motorola) CPU32 is a CPU core that is
           based on the 68020 processor. For the most part it is used in
@@ -56,7 +59,6 @@ config MCPU32
 config M68020
         bool "68020 support"
         depends on MMU
-        select GENERIC_ATOMIC64
         select CPU_HAS_ADDRESS_SPACES
         help
           If you anticipate running this kernel on a computer with a MC68020
@@ -67,7 +69,6 @@ config M68020
 config M68030
         bool "68030 support"
         depends on MMU && !MMU_SUN3
-        select GENERIC_ATOMIC64
         select CPU_HAS_ADDRESS_SPACES
         help
           If you anticipate running this kernel on a computer with a MC68030
@@ -77,7 +78,6 @@ config M68030
 config M68040
         bool "68040 support"
         depends on MMU && !MMU_SUN3
-        select GENERIC_ATOMIC64
         select CPU_HAS_ADDRESS_SPACES
         help
           If you anticipate running this kernel on a computer with a MC68LC040
@@ -88,7 +88,6 @@ config M68040
 config M68060
         bool "68060 support"
         depends on MMU && !MMU_SUN3
-        select GENERIC_ATOMIC64
         select CPU_HAS_ADDRESS_SPACES
         help
           If you anticipate running this kernel on a computer with a MC68060
@@ -376,6 +375,18 @@ config NODES_SHIFT
         default "3"
         depends on !SINGLE_MEMORY_CHUNK
 
+config CPU_HAS_NO_BITFIELDS
+        bool
+
+config CPU_HAS_NO_MULDIV64
+        bool
+
+config CPU_HAS_NO_UNALIGNED
+        bool
+
+config CPU_HAS_ADDRESS_SPACES
+        bool
+
 config FPU
         bool
 
diff --git a/arch/m68k/apollo/config.c b/arch/m68k/apollo/config.c
index 0a30406b9442..f5565d6eeb8e 100644
--- a/arch/m68k/apollo/config.c
+++ b/arch/m68k/apollo/config.c
@@ -177,8 +177,8 @@ irqreturn_t dn_timer_int(int irq, void *dev_id)
 
         timer_handler(irq, dev_id);
 
-        x=*(volatile unsigned char *)(timer+3);
-        x=*(volatile unsigned char *)(timer+5);
+        x = *(volatile unsigned char *)(apollo_timer + 3);
+        x = *(volatile unsigned char *)(apollo_timer + 5);
 
         return IRQ_HANDLED;
 }
@@ -186,17 +186,17 @@ irqreturn_t dn_timer_int(int irq, void *dev_id)
 void dn_sched_init(irq_handler_t timer_routine)
 {
         /* program timer 1 */
-        *(volatile unsigned char *)(timer+3)=0x01;
-        *(volatile unsigned char *)(timer+1)=0x40;
-        *(volatile unsigned char *)(timer+5)=0x09;
-        *(volatile unsigned char *)(timer+7)=0xc4;
+        *(volatile unsigned char *)(apollo_timer + 3) = 0x01;
+        *(volatile unsigned char *)(apollo_timer + 1) = 0x40;
+        *(volatile unsigned char *)(apollo_timer + 5) = 0x09;
+        *(volatile unsigned char *)(apollo_timer + 7) = 0xc4;
 
         /* enable IRQ of PIC B */
         *(volatile unsigned char *)(pica+1)&=(~8);
 
 #if 0
-        printk("*(0x10803) %02x\n",*(volatile unsigned char *)(timer+0x3));
-        printk("*(0x10803) %02x\n",*(volatile unsigned char *)(timer+0x3));
+        printk("*(0x10803) %02x\n",*(volatile unsigned char *)(apollo_timer + 0x3));
+        printk("*(0x10803) %02x\n",*(volatile unsigned char *)(apollo_timer + 0x3));
 #endif
 
         if (request_irq(IRQ_APOLLO, dn_timer_int, 0, "time", timer_routine))
diff --git a/arch/m68k/include/asm/Kbuild b/arch/m68k/include/asm/Kbuild
index eafa2539a8ee..a74e5d95c384 100644
--- a/arch/m68k/include/asm/Kbuild
+++ b/arch/m68k/include/asm/Kbuild
@@ -1,4 +1,29 @@
 include include/asm-generic/Kbuild.asm
 header-y += cachectl.h
 
+generic-y += bitsperlong.h
+generic-y += cputime.h
+generic-y += device.h
+generic-y += emergency-restart.h
+generic-y += errno.h
+generic-y += futex.h
+generic-y += ioctl.h
+generic-y += ipcbuf.h
+generic-y += irq_regs.h
+generic-y += kdebug.h
+generic-y += kmap_types.h
+generic-y += kvm_para.h
+generic-y += local64.h
+generic-y += local.h
+generic-y += mman.h
+generic-y += mutex.h
+generic-y += percpu.h
+generic-y += resource.h
+generic-y += scatterlist.h
+generic-y += sections.h
+generic-y += siginfo.h
+generic-y += statfs.h
+generic-y += topology.h
+generic-y += types.h
 generic-y += word-at-a-time.h
+generic-y += xor.h
diff --git a/arch/m68k/include/asm/MC68332.h b/arch/m68k/include/asm/MC68332.h
deleted file mode 100644
index 6bb8f02685a2..000000000000
--- a/arch/m68k/include/asm/MC68332.h
+++ /dev/null
@@ -1,152 +0,0 @@
-
-/* include/asm-m68knommu/MC68332.h: '332 control registers
- *
- * Copyright (C) 1998  Kenneth Albanowski <kjahds@kjahds.com>,
- *
- */
-
-#ifndef _MC68332_H_
-#define _MC68332_H_
-
-#define BYTE_REF(addr) (*((volatile unsigned char*)addr))
-#define WORD_REF(addr) (*((volatile unsigned short*)addr))
-
-#define PORTE_ADDR      0xfffa11
-#define PORTE   BYTE_REF(PORTE_ADDR)
-#define DDRE_ADDR       0xfffa15
-#define DDRE    BYTE_REF(DDRE_ADDR)
-#define PEPAR_ADDR      0xfffa17
-#define PEPAR   BYTE_REF(PEPAR_ADDR)
-
-#define PORTF_ADDR      0xfffa19
-#define PORTF   BYTE_REF(PORTF_ADDR)
-#define DDRF_ADDR       0xfffa1d
-#define DDRF    BYTE_REF(DDRF_ADDR)
-#define PFPAR_ADDR      0xfffa1f
-#define PFPAR   BYTE_REF(PFPAR_ADDR)
-
-#define PORTQS_ADDR     0xfffc15
-#define PORTQS  BYTE_REF(PORTQS_ADDR)
-#define DDRQS_ADDR      0xfffc17
-#define DDRQS   BYTE_REF(DDRQS_ADDR)
-#define PQSPAR_ADDR     0xfffc16
-#define PQSPAR  BYTE_REF(PQSPAR_ADDR)
-
-#define CSPAR0_ADDR 0xFFFA44
-#define CSPAR0 WORD_REF(CSPAR0_ADDR)
-#define CSPAR1_ADDR 0xFFFA46
-#define CSPAR1 WORD_REF(CSPAR1_ADDR)
-#define CSARBT_ADDR 0xFFFA48
-#define CSARBT WORD_REF(CSARBT_ADDR)
-#define CSOPBT_ADDR 0xFFFA4A
-#define CSOPBT WORD_REF(CSOPBT_ADDR)
-#define CSBAR0_ADDR 0xFFFA4C
-#define CSBAR0 WORD_REF(CSBAR0_ADDR)
-#define CSOR0_ADDR 0xFFFA4E
-#define CSOR0 WORD_REF(CSOR0_ADDR)
-#define CSBAR1_ADDR 0xFFFA50
-#define CSBAR1 WORD_REF(CSBAR1_ADDR)
-#define CSOR1_ADDR 0xFFFA52
-#define CSOR1 WORD_REF(CSOR1_ADDR)
-#define CSBAR2_ADDR 0xFFFA54
-#define CSBAR2 WORD_REF(CSBAR2_ADDR)
-#define CSOR2_ADDR 0xFFFA56
-#define CSOR2 WORD_REF(CSOR2_ADDR)
-#define CSBAR3_ADDR 0xFFFA58
-#define CSBAR3 WORD_REF(CSBAR3_ADDR)
-#define CSOR3_ADDR 0xFFFA5A
-#define CSOR3 WORD_REF(CSOR3_ADDR)
-#define CSBAR4_ADDR 0xFFFA5C
-#define CSBAR4 WORD_REF(CSBAR4_ADDR)
-#define CSOR4_ADDR 0xFFFA5E
-#define CSOR4 WORD_REF(CSOR4_ADDR)
-#define CSBAR5_ADDR 0xFFFA60
-#define CSBAR5 WORD_REF(CSBAR5_ADDR)
-#define CSOR5_ADDR 0xFFFA62
-#define CSOR5 WORD_REF(CSOR5_ADDR)
-#define CSBAR6_ADDR 0xFFFA64
-#define CSBAR6 WORD_REF(CSBAR6_ADDR)
-#define CSOR6_ADDR 0xFFFA66
-#define CSOR6 WORD_REF(CSOR6_ADDR)
-#define CSBAR7_ADDR 0xFFFA68
-#define CSBAR7 WORD_REF(CSBAR7_ADDR)
-#define CSOR7_ADDR 0xFFFA6A
-#define CSOR7 WORD_REF(CSOR7_ADDR)
-#define CSBAR8_ADDR 0xFFFA6C
-#define CSBAR8 WORD_REF(CSBAR8_ADDR)
-#define CSOR8_ADDR 0xFFFA6E
-#define CSOR8 WORD_REF(CSOR8_ADDR)
-#define CSBAR9_ADDR 0xFFFA70
-#define CSBAR9 WORD_REF(CSBAR9_ADDR)
-#define CSOR9_ADDR 0xFFFA72
-#define CSOR9 WORD_REF(CSOR9_ADDR)
-#define CSBAR10_ADDR 0xFFFA74
-#define CSBAR10 WORD_REF(CSBAR10_ADDR)
-#define CSOR10_ADDR 0xFFFA76
-#define CSOR10 WORD_REF(CSOR10_ADDR)
-
-#define CSOR_MODE_ASYNC 0x0000
-#define CSOR_MODE_SYNC  0x8000
-#define CSOR_MODE_MASK  0x8000
-#define CSOR_BYTE_DISABLE       0x0000
-#define CSOR_BYTE_UPPER         0x4000
-#define CSOR_BYTE_LOWER         0x2000
-#define CSOR_BYTE_BOTH          0x6000
-#define CSOR_BYTE_MASK          0x6000
-#define CSOR_RW_RSVD            0x0000
-#define CSOR_RW_READ            0x0800
-#define CSOR_RW_WRITE           0x1000
-#define CSOR_RW_BOTH            0x1800
-#define CSOR_RW_MASK            0x1800
-#define CSOR_STROBE_DS          0x0400
-#define CSOR_STROBE_AS          0x0000
-#define CSOR_STROBE_MASK        0x0400
-#define CSOR_DSACK_WAIT(x)      (wait << 6)
-#define CSOR_DSACK_FTERM        (14 << 6)
-#define CSOR_DSACK_EXTERNAL     (15 << 6)
-#define CSOR_DSACK_MASK         0x03c0
-#define CSOR_SPACE_CPU          0x0000
-#define CSOR_SPACE_USER         0x0010
-#define CSOR_SPACE_SU           0x0020
-#define CSOR_SPACE_BOTH         0x0030
-#define CSOR_SPACE_MASK         0x0030
-#define CSOR_IPL_ALL            0x0000
-#define CSOR_IPL_PRIORITY(x)    (x << 1)
-#define CSOR_IPL_MASK           0x000e
-#define CSOR_AVEC_ON            0x0001
-#define CSOR_AVEC_OFF           0x0000
-#define CSOR_AVEC_MASK          0x0001
-
-#define CSBAR_ADDR(x)           ((addr >> 11) << 3) 
-#define CSBAR_ADDR_MASK         0xfff8
-#define CSBAR_BLKSIZE_2K        0x0000
-#define CSBAR_BLKSIZE_8K        0x0001
-#define CSBAR_BLKSIZE_16K       0x0002
-#define CSBAR_BLKSIZE_64K       0x0003
-#define CSBAR_BLKSIZE_128K      0x0004
-#define CSBAR_BLKSIZE_256K      0x0005
-#define CSBAR_BLKSIZE_512K      0x0006
-#define CSBAR_BLKSIZE_1M        0x0007
-#define CSBAR_BLKSIZE_MASK      0x0007
-
-#define CSPAR_DISC      0
-#define CSPAR_ALT       1
-#define CSPAR_CS8       2
-#define CSPAR_CS16      3
-#define CSPAR_MASK      3
-
-#define CSPAR0_CSBOOT(x) (x << 0)
-#define CSPAR0_CS0(x)   (x << 2)
-#define CSPAR0_CS1(x)   (x << 4)
-#define CSPAR0_CS2(x)   (x << 6)
-#define CSPAR0_CS3(x)   (x << 8)
-#define CSPAR0_CS4(x)   (x << 10)
-#define CSPAR0_CS5(x)   (x << 12)
-
-#define CSPAR1_CS6(x)   (x << 0)
-#define CSPAR1_CS7(x)   (x << 2)
-#define CSPAR1_CS8(x)   (x << 4)
-#define CSPAR1_CS9(x)   (x << 6)
-#define CSPAR1_CS10(x)  (x << 8)
-
-#endif
diff --git a/arch/m68k/include/asm/apollodma.h b/arch/m68k/include/asm/apollodma.h
deleted file mode 100644
index 954adc851adb..000000000000
--- a/arch/m68k/include/asm/apollodma.h
+++ /dev/null
@@ -1,248 +0,0 @@
-/*
- * linux/include/asm/dma.h: Defines for using and allocating dma channels.
- * Written by Hennus Bergman, 1992.
- * High DMA channel support & info by Hannu Savolainen
- * and John Boyd, Nov. 1992.
- */
-
-#ifndef _ASM_APOLLO_DMA_H
-#define _ASM_APOLLO_DMA_H
-
-#include <asm/apollohw.h>               /* need byte IO */
-#include <linux/spinlock.h>             /* And spinlocks */
-#include <linux/delay.h>
-
-
-#define dma_outb(val,addr) (*((volatile unsigned char *)(addr+IO_BASE)) = (val))
-#define dma_inb(addr)      (*((volatile unsigned char *)(addr+IO_BASE)))
-
-/*
- * NOTES about DMA transfers:
- *
- *  controller 1: channels 0-3, byte operations, ports 00-1F
- *  controller 2: channels 4-7, word operations, ports C0-DF
- *
- *  - ALL registers are 8 bits only, regardless of transfer size
- *  - channel 4 is not used - cascades 1 into 2.
- *  - channels 0-3 are byte - addresses/counts are for physical bytes
- *  - channels 5-7 are word - addresses/counts are for physical words
- *  - transfers must not cross physical 64K (0-3) or 128K (5-7) boundaries
- *  - transfer count loaded to registers is 1 less than actual count
- *  - controller 2 offsets are all even (2x offsets for controller 1)
- *  - page registers for 5-7 don't use data bit 0, represent 128K pages
- *  - page registers for 0-3 use bit 0, represent 64K pages
- *
- * DMA transfers are limited to the lower 16MB of _physical_ memory.
- * Note that addresses loaded into registers must be _physical_ addresses,
- * not logical addresses (which may differ if paging is active).
- *
- *  Address mapping for channels 0-3:
- *
- *   A23 ... A16 A15 ... A8  A7 ... A0    (Physical addresses)
- *    |  ...  |   |  ... |   |  ... |
- *    |  ...  |   |  ... |   |  ... |
- *    |  ...  |   |  ... |   |  ... |
- *   P7  ...  P0  A7 ... A0  A7 ... A0
- * |    Page    | Addr MSB | Addr LSB |   (DMA registers)
- *
- *  Address mapping for channels 5-7:
- *
- *   A23 ... A17 A16 A15 ... A9 A8 A7 ... A1 A0    (Physical addresses)
- *    |  ...  |   \   \   ... \  \  \  ... \  \
- *    |  ...  |    \   \   ... \  \  \  ... \  (not used)
- *    |  ...  |     \   \   ... \  \  \  ... \
- *   P7  ...  P1 (0) A7 A6  ... A0 A7 A6 ... A0
- * |      Page      |  Addr MSB   |  Addr LSB  |   (DMA registers)
- *
- * Again, channels 5-7 transfer _physical_ words (16 bits), so addresses
- * and counts _must_ be word-aligned (the lowest address bit is _ignored_ at
- * the hardware level, so odd-byte transfers aren't possible).
- *
- * Transfer count (_not # bytes_) is limited to 64K, represented as actual
- * count - 1 : 64K => 0xFFFF, 1 => 0x0000.  Thus, count is always 1 or more,
- * and up to 128K bytes may be transferred on channels 5-7 in one operation.
- *
- */
-
-#define MAX_DMA_CHANNELS        8
-
-/* The maximum address that we can perform a DMA transfer to on this platform */#define MAX_DMA_ADDRESS      (PAGE_OFFSET+0x1000000)
-
-/* 8237 DMA controllers */
-#define IO_DMA1_BASE    0x10C00 /* 8 bit slave DMA, channels 0..3 */
-#define IO_DMA2_BASE    0x10D00 /* 16 bit master DMA, ch 4(=slave input)..7 */
-
-/* DMA controller registers */
-#define DMA1_CMD_REG            (IO_DMA1_BASE+0x08) /* command register (w) */
-#define DMA1_STAT_REG           (IO_DMA1_BASE+0x08) /* status register (r) */
-#define DMA1_REQ_REG            (IO_DMA1_BASE+0x09) /* request register (w) */
-#define DMA1_MASK_REG           (IO_DMA1_BASE+0x0A) /* single-channel mask (w) */
-#define DMA1_MODE_REG           (IO_DMA1_BASE+0x0B) /* mode register (w) */
-#define DMA1_CLEAR_FF_REG       (IO_DMA1_BASE+0x0C) /* clear pointer flip-flop (w) */
-#define DMA1_TEMP_REG           (IO_DMA1_BASE+0x0D) /* Temporary Register (r) */
-#define DMA1_RESET_REG          (IO_DMA1_BASE+0x0D) /* Master Clear (w) */
-#define DMA1_CLR_MASK_REG       (IO_DMA1_BASE+0x0E) /* Clear Mask */
-#define DMA1_MASK_ALL_REG       (IO_DMA1_BASE+0x0F) /* all-channels mask (w) */
-
-#define DMA2_CMD_REG            (IO_DMA2_BASE+0x10) /* command register (w) */
-#define DMA2_STAT_REG           (IO_DMA2_BASE+0x10) /* status register (r) */
-#define DMA2_REQ_REG            (IO_DMA2_BASE+0x12) /* request register (w) */
-#define DMA2_MASK_REG           (IO_DMA2_BASE+0x14) /* single-channel mask (w) */
-#define DMA2_MODE_REG           (IO_DMA2_BASE+0x16) /* mode register (w) */
-#define DMA2_CLEAR_FF_REG       (IO_DMA2_BASE+0x18) /* clear pointer flip-flop (w) */
-#define DMA2_TEMP_REG           (IO_DMA2_BASE+0x1A) /* Temporary Register (r) */
-#define DMA2_RESET_REG          (IO_DMA2_BASE+0x1A) /* Master Clear (w) */
-#define DMA2_CLR_MASK_REG       (IO_DMA2_BASE+0x1C) /* Clear Mask */
-#define DMA2_MASK_ALL_REG       (IO_DMA2_BASE+0x1E) /* all-channels mask (w) */
-
-#define DMA_ADDR_0              (IO_DMA1_BASE+0x00) /* DMA address registers */
-#define DMA_ADDR_1              (IO_DMA1_BASE+0x02)
-#define DMA_ADDR_2              (IO_DMA1_BASE+0x04)
-#define DMA_ADDR_3              (IO_DMA1_BASE+0x06)
-#define DMA_ADDR_4              (IO_DMA2_BASE+0x00)
-#define DMA_ADDR_5              (IO_DMA2_BASE+0x04)
-#define DMA_ADDR_6              (IO_DMA2_BASE+0x08)
-#define DMA_ADDR_7              (IO_DMA2_BASE+0x0C)
-
-#define DMA_CNT_0               (IO_DMA1_BASE+0x01)   /* DMA count registers */
-#define DMA_CNT_1               (IO_DMA1_BASE+0x03)
-#define DMA_CNT_2               (IO_DMA1_BASE+0x05)
-#define DMA_CNT_3               (IO_DMA1_BASE+0x07)
-#define DMA_CNT_4               (IO_DMA2_BASE+0x02)
-#define DMA_CNT_5               (IO_DMA2_BASE+0x06)
-#define DMA_CNT_6               (IO_DMA2_BASE+0x0A)
-#define DMA_CNT_7               (IO_DMA2_BASE+0x0E)
-
-#define DMA_MODE_READ   0x44    /* I/O to memory, no autoinit, increment, single mode */
-#define DMA_MODE_WRITE  0x48    /* memory to I/O, no autoinit, increment, single mode */
-#define DMA_MODE_CASCADE 0xC0   /* pass thru DREQ->HRQ, DACK<-HLDA only */
-
-#define DMA_AUTOINIT    0x10
-
-#define DMA_8BIT 0
-#define DMA_16BIT 1
-#define DMA_BUSMASTER 2
-
-extern spinlock_t  dma_spin_lock;
-
-static __inline__ unsigned long claim_dma_lock(void)
-{
-        unsigned long flags;
-        spin_lock_irqsave(&dma_spin_lock, flags);
-        return flags;
-}
-
-static __inline__ void release_dma_lock(unsigned long flags)
-{
-        spin_unlock_irqrestore(&dma_spin_lock, flags);
-}
-
-/* enable/disable a specific DMA channel */
-static __inline__ void enable_dma(unsigned int dmanr)
-{
-        if (dmanr<=3)
-                dma_outb(dmanr,  DMA1_MASK_REG);
-        else
-                dma_outb(dmanr & 3,  DMA2_MASK_REG);
-}
-
-static __inline__ void disable_dma(unsigned int dmanr)
-{
-        if (dmanr<=3)
-                dma_outb(dmanr | 4,  DMA1_MASK_REG);
-        else
-                dma_outb((dmanr & 3) | 4,  DMA2_MASK_REG);
-}
-
-/* Clear the 'DMA Pointer Flip Flop'.
- * Write 0 for LSB/MSB, 1 for MSB/LSB access.
- * Use this once to initialize the FF to a known state.
- * After that, keep track of it. :-)
- * --- In order to do that, the DMA routines below should ---
- * --- only be used while holding the DMA lock ! ---
- */
-static __inline__ void clear_dma_ff(unsigned int dmanr)
-{
-        if (dmanr<=3)
-                dma_outb(0,  DMA1_CLEAR_FF_REG);
-        else
-                dma_outb(0,  DMA2_CLEAR_FF_REG);
-}
-
-/* set mode (above) for a specific DMA channel */
-static __inline__ void set_dma_mode(unsigned int dmanr, char mode)
-{
-        if (dmanr<=3)
-                dma_outb(mode | dmanr,  DMA1_MODE_REG);
-        else
-                dma_outb(mode | (dmanr&3),  DMA2_MODE_REG);
-}
-
-/* Set transfer address & page bits for specific DMA channel.
- * Assumes dma flipflop is clear.
- */
-static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int a)
-{
-        if (dmanr <= 3)  {
-            dma_outb( a & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE );
-            dma_outb( (a>>8) & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE );
-        }  else  {
-            dma_outb( (a>>1) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE );
-            dma_outb( (a>>9) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE );
-        }
-}
-
-
-/* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for
- * a specific DMA channel.
- * You must ensure the parameters are valid.
- * NOTE: from a manual: "the number of transfers is one more
- * than the initial word count"! This is taken into account.
- * Assumes dma flip-flop is clear.
- * NOTE 2: "count" represents _bytes_ and must be even for channels 5-7.
- */
-static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
-{
-        count--;
-        if (dmanr <= 3)  {
-            dma_outb( count & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE );
-            dma_outb( (count>>8) & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE );
-        } else {
-            dma_outb( (count>>1) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE );
-            dma_outb( (count>>9) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE );
-        }
-}
-
-
-/* Get DMA residue count. After a DMA transfer, this
- * should return zero. Reading this while a DMA transfer is
- * still in progress will return unpredictable results.
- * If called before the channel has been used, it may return 1.
- * Otherwise, it returns the number of _bytes_ left to transfer.
- *
- * Assumes DMA flip-flop is clear.
- */
-static __inline__ int get_dma_residue(unsigned int dmanr)
-{
-        unsigned int io_port = (dmanr<=3)? ((dmanr&3)<<1) + 1 + IO_DMA1_BASE
-                                         : ((dmanr&3)<<2) + 2 + IO_DMA2_BASE;
-
-        /* using short to get 16-bit wrap around */
-        unsigned short count;
-
-        count = 1 + dma_inb(io_port);
-        count += dma_inb(io_port) << 8;
-
-        return (dmanr<=3)? count : (count<<1);
-}
-
-
-/* These are in kernel/dma.c: */
-extern int request_dma(unsigned int dmanr, const char * device_id);     /* reserve a DMA channel */
-extern void free_dma(unsigned int dmanr);       /* release it again */
-
-/* These are in arch/m68k/apollo/dma.c: */
-extern unsigned short dma_map_page(unsigned long phys_addr,int count,int type);
-extern void dma_unmap_page(unsigned short dma_addr);
-
-#endif /* _ASM_APOLLO_DMA_H */
diff --git a/arch/m68k/include/asm/apollohw.h b/arch/m68k/include/asm/apollohw.h
index a1373b9aa281..635ef4f89010 100644
--- a/arch/m68k/include/asm/apollohw.h
+++ b/arch/m68k/include/asm/apollohw.h
@@ -98,7 +98,7 @@ extern u_long timer_physaddr;
 #define cpuctrl (*(volatile unsigned int *)(IO_BASE + cpuctrl_physaddr))
 #define pica (IO_BASE + pica_physaddr)
 #define picb (IO_BASE + picb_physaddr)
-#define timer (IO_BASE + timer_physaddr)
+#define apollo_timer (IO_BASE + timer_physaddr)
 #define addr_xlat_map ((unsigned short *)(IO_BASE + 0x17000))
 
 #define isaIO2mem(x) (((((x) & 0x3f8)  << 7) | (((x) & 0xfc00) >> 6) | ((x) & 0x7)) + 0x40000 + IO_BASE)
diff --git a/arch/m68k/include/asm/bitsperlong.h b/arch/m68k/include/asm/bitsperlong.h
deleted file mode 100644
index 6dc0bb0c13b2..000000000000
--- a/arch/m68k/include/asm/bitsperlong.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/bitsperlong.h>
diff --git a/arch/m68k/include/asm/cputime.h b/arch/m68k/include/asm/cputime.h
deleted file mode 100644
index c79c5e892305..000000000000
--- a/arch/m68k/include/asm/cputime.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef __M68K_CPUTIME_H
-#define __M68K_CPUTIME_H
-
-#include <asm-generic/cputime.h>
-
-#endif /* __M68K_CPUTIME_H */
diff --git a/arch/m68k/include/asm/delay.h b/arch/m68k/include/asm/delay.h
index 9c09becfd4c9..12d8fe4f1d30 100644
--- a/arch/m68k/include/asm/delay.h
+++ b/arch/m68k/include/asm/delay.h
@@ -43,7 +43,7 @@ static inline void __delay(unsigned long loops)
 extern void __bad_udelay(void);
 
 
-#if defined(CONFIG_M68000) || defined(CONFIG_COLDFIRE)
+#ifdef CONFIG_CPU_HAS_NO_MULDIV64
 /*
  * The simpler m68k and ColdFire processors do not have a 32*32->64
  * multiply instruction. So we need to handle them a little differently.
diff --git a/arch/m68k/include/asm/device.h b/arch/m68k/include/asm/device.h
deleted file mode 100644
index d8f9872b0e2d..000000000000
--- a/arch/m68k/include/asm/device.h
+++ /dev/null
@@ -1,7 +0,0 @@
-/*
- * Arch specific extensions to struct device
- *
- * This file is released under the GPLv2
- */
-#include <asm-generic/device.h>
-
diff --git a/arch/m68k/include/asm/emergency-restart.h b/arch/m68k/include/asm/emergency-restart.h
deleted file mode 100644
index 108d8c48e42e..000000000000
--- a/arch/m68k/include/asm/emergency-restart.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _ASM_EMERGENCY_RESTART_H
-#define _ASM_EMERGENCY_RESTART_H
-
-#include <asm-generic/emergency-restart.h>
-
-#endif /* _ASM_EMERGENCY_RESTART_H */
diff --git a/arch/m68k/include/asm/errno.h b/arch/m68k/include/asm/errno.h
deleted file mode 100644
index 0d4e188d6ef6..000000000000
--- a/arch/m68k/include/asm/errno.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _M68K_ERRNO_H
-#define _M68K_ERRNO_H
-
-#include <asm-generic/errno.h>
-
-#endif /* _M68K_ERRNO_H */
diff --git a/arch/m68k/include/asm/futex.h b/arch/m68k/include/asm/futex.h
deleted file mode 100644
index 6a332a9f099c..000000000000
--- a/arch/m68k/include/asm/futex.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _ASM_FUTEX_H
-#define _ASM_FUTEX_H
-
-#include <asm-generic/futex.h>
-
-#endif
diff --git a/arch/m68k/include/asm/ioctl.h b/arch/m68k/include/asm/ioctl.h
deleted file mode 100644
index b279fe06dfe5..000000000000
--- a/arch/m68k/include/asm/ioctl.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/ioctl.h>
diff --git a/arch/m68k/include/asm/ipcbuf.h b/arch/m68k/include/asm/ipcbuf.h
deleted file mode 100644
index 84c7e51cb6d0..000000000000
--- a/arch/m68k/include/asm/ipcbuf.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/ipcbuf.h>
diff --git a/arch/m68k/include/asm/irq_regs.h b/arch/m68k/include/asm/irq_regs.h
deleted file mode 100644
index 3dd9c0b70270..000000000000
--- a/arch/m68k/include/asm/irq_regs.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/irq_regs.h>
diff --git a/arch/m68k/include/asm/kdebug.h b/arch/m68k/include/asm/kdebug.h
deleted file mode 100644
index 6ece1b037665..000000000000
--- a/arch/m68k/include/asm/kdebug.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/kdebug.h>
diff --git a/arch/m68k/include/asm/kmap_types.h b/arch/m68k/include/asm/kmap_types.h
deleted file mode 100644
index 3413cc1390ec..000000000000
--- a/arch/m68k/include/asm/kmap_types.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef __ASM_M68K_KMAP_TYPES_H
-#define __ASM_M68K_KMAP_TYPES_H
-
-#include <asm-generic/kmap_types.h>
-
-#endif  /* __ASM_M68K_KMAP_TYPES_H */
diff --git a/arch/m68k/include/asm/kvm_para.h b/arch/m68k/include/asm/kvm_para.h
deleted file mode 100644
index 14fab8f0b957..000000000000
--- a/arch/m68k/include/asm/kvm_para.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/kvm_para.h>
diff --git a/arch/m68k/include/asm/local.h b/arch/m68k/include/asm/local.h
deleted file mode 100644
index 6c259263e1f0..000000000000
--- a/arch/m68k/include/asm/local.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _ASM_M68K_LOCAL_H
-#define _ASM_M68K_LOCAL_H
-
-#include <asm-generic/local.h>
-
-#endif /* _ASM_M68K_LOCAL_H */
diff --git a/arch/m68k/include/asm/local64.h b/arch/m68k/include/asm/local64.h
deleted file mode 100644
index 36c93b5cc239..000000000000
--- a/arch/m68k/include/asm/local64.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/local64.h>
diff --git a/arch/m68k/include/asm/mac_mouse.h b/arch/m68k/include/asm/mac_mouse.h
deleted file mode 100644
index 39a5c292eaee..000000000000
--- a/arch/m68k/include/asm/mac_mouse.h
+++ /dev/null
@@ -1,23 +0,0 @@
-#ifndef _ASM_MAC_MOUSE_H
-#define _ASM_MAC_MOUSE_H
-
-/*
- * linux/include/asm-m68k/mac_mouse.h
- * header file for Macintosh ADB mouse driver
- * 27-10-97 Michael Schmitz
- * copied from:
- * header file for Atari Mouse driver
- * by Robert de Vries (robert@and.nl) on 19Jul93
- */
-
-struct mouse_status {
-        char            buttons;
-        short           dx;
-        short           dy;
-        int             ready;
-        int             active;
-        wait_queue_head_t wait;
-        struct fasync_struct *fasyncptr;
-};
-
-#endif
diff --git a/arch/m68k/include/asm/mcfmbus.h b/arch/m68k/include/asm/mcfmbus.h
deleted file mode 100644
index 319899c47a2c..000000000000
--- a/arch/m68k/include/asm/mcfmbus.h
+++ /dev/null
@@ -1,77 +0,0 @@
-/****************************************************************************/
-
-/*
- *      mcfmbus.h -- Coldfire MBUS support defines.
- *
- *      (C) Copyright 1999, Martin Floeer (mfloeer@axcent.de) 
- */
-
-/****************************************************************************/
-
-
-#ifndef mcfmbus_h
-#define mcfmbus_h
-
-
-#define MCFMBUS_BASE            0x280
-#define MCFMBUS_IRQ_VECTOR      0x19
-#define MCFMBUS_IRQ             0x1
-#define MCFMBUS_CLK             0x3f
-#define MCFMBUS_IRQ_LEVEL       0x07    /*IRQ Level 1*/
-#define MCFMBUS_ADDRESS         0x01
-
-
-/*
-*       Define the 5307 MBUS register set addresses
-*/
-
-#define MCFMBUS_MADR    0x00
-#define MCFMBUS_MFDR    0x04
-#define MCFMBUS_MBCR    0x08
-#define MCFMBUS_MBSR    0x0C
-#define MCFMBUS_MBDR    0x10
-
-
-#define MCFMBUS_MADR_ADDR(a)    (((a)&0x7F)<<0x01) /*Slave Address*/
-
-#define MCFMBUS_MFDR_MBC(a)     ((a)&0x3F)         /*M-Bus Clock*/
-
-/*
-*       Define bit flags in Control Register
-*/
-
-#define MCFMBUS_MBCR_MEN           (0x80)  /* M-Bus Enable                 */
-#define MCFMBUS_MBCR_MIEN          (0x40)  /* M-Bus Interrupt Enable       */
-#define MCFMBUS_MBCR_MSTA          (0x20)  /* Master/Slave Mode Select Bit */
-#define MCFMBUS_MBCR_MTX           (0x10)  /* Transmit/Rcv Mode Select Bit */
-#define MCFMBUS_MBCR_TXAK          (0x08)  /* Transmit Acknowledge Enable  */
-#define MCFMBUS_MBCR_RSTA          (0x04)  /* Repeat Start                 */
-
-/*
-*       Define bit flags in Status Register
-*/
-
-#define MCFMBUS_MBSR_MCF           (0x80)  /* Data Transfer Complete       */
-#define MCFMBUS_MBSR_MAAS          (0x40)  /* Addressed as a Slave         */
-#define MCFMBUS_MBSR_MBB           (0x20)  /* Bus Busy                     */
-#define MCFMBUS_MBSR_MAL           (0x10)  /* Arbitration Lost             */
-#define MCFMBUS_MBSR_SRW           (0x04)  /* Slave Transmit               */
-#define MCFMBUS_MBSR_MIF           (0x02)  /* M-Bus Interrupt              */
-#define MCFMBUS_MBSR_RXAK          (0x01)  /* No Acknowledge Received      */
-
-/*
-*       Define bit flags in DATA I/O Register
-*/
-
-#define MCFMBUS_MBDR_READ          (0x01)  /* 1=read 0=write MBUS */
-
-#define MBUSIOCSCLOCK           1
-#define MBUSIOCGCLOCK           2
-#define MBUSIOCSADDR                    3
-#define MBUSIOCGADDR                    4
-#define MBUSIOCSSLADDR                  5
-#define MBUSIOCGSLADDR                  6
-#define MBUSIOCSSUBADDR                 7
-#define MBUSIOCGSUBADDR                 8
-
-#endif
diff --git a/arch/m68k/include/asm/mman.h b/arch/m68k/include/asm/mman.h
deleted file mode 100644
index 8eebf89f5ab1..000000000000
--- a/arch/m68k/include/asm/mman.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/mman.h>
diff --git a/arch/m68k/include/asm/mutex.h b/arch/m68k/include/asm/mutex.h
deleted file mode 100644
index 458c1f7fbc18..000000000000
--- a/arch/m68k/include/asm/mutex.h
+++ /dev/null
@@ -1,9 +0,0 @@
-/*
- * Pull in the generic implementation for the mutex fastpath.
- *
- * TODO: implement optimized primitives instead, or leave the generic
- * implementation in place, or pick the atomic_xchg() based generic
- * implementation. (see asm-generic/mutex-xchg.h for details)
- */
-
-#include <asm-generic/mutex-dec.h>
diff --git a/arch/m68k/include/asm/percpu.h b/arch/m68k/include/asm/percpu.h
deleted file mode 100644
index 0859d048faf5..000000000000
--- a/arch/m68k/include/asm/percpu.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef __ASM_M68K_PERCPU_H
-#define __ASM_M68K_PERCPU_H
-
-#include <asm-generic/percpu.h>
-
-#endif  /* __ASM_M68K_PERCPU_H */
diff --git a/arch/m68k/include/asm/resource.h b/arch/m68k/include/asm/resource.h
deleted file mode 100644
index e7d35019f337..000000000000
--- a/arch/m68k/include/asm/resource.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _M68K_RESOURCE_H
-#define _M68K_RESOURCE_H
-
-#include <asm-generic/resource.h>
-
-#endif /* _M68K_RESOURCE_H */
diff --git a/arch/m68k/include/asm/sbus.h b/arch/m68k/include/asm/sbus.h
deleted file mode 100644
index bfe3ba147f2e..000000000000
--- a/arch/m68k/include/asm/sbus.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * some sbus structures and macros to make usage of sbus drivers possible
- */
-
-#ifndef __M68K_SBUS_H
-#define __M68K_SBUS_H
-
-struct sbus_dev {
-        struct {
-                unsigned int which_io;
-                unsigned int phys_addr;
-        } reg_addrs[1];
-};
-
-/* sbus IO functions stolen from include/asm-sparc/io.h for the serial driver */
-/* No SBUS on the Sun3, kludge -- sam */
-
-static inline void _sbus_writeb(unsigned char val, unsigned long addr)
-{
-        *(volatile unsigned char *)addr = val;
-}
-
-static inline unsigned char _sbus_readb(unsigned long addr)
-{
-        return *(volatile unsigned char *)addr;
-}
-
-static inline void _sbus_writel(unsigned long val, unsigned long addr)
-{
-        *(volatile unsigned long *)addr = val;
-
-}
-
-extern inline unsigned long _sbus_readl(unsigned long addr)
-{
-        return *(volatile unsigned long *)addr;
-}
-
-
-#define sbus_readb(a) _sbus_readb((unsigned long)a)
-#define sbus_writeb(v, a) _sbus_writeb(v, (unsigned long)a)
-#define sbus_readl(a) _sbus_readl((unsigned long)a)
-#define sbus_writel(v, a) _sbus_writel(v, (unsigned long)a)
-
-#endif
diff --git a/arch/m68k/include/asm/scatterlist.h b/arch/m68k/include/asm/scatterlist.h
deleted file mode 100644
index 312505452a1e..000000000000
--- a/arch/m68k/include/asm/scatterlist.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _M68K_SCATTERLIST_H
-#define _M68K_SCATTERLIST_H
-
-#include <asm-generic/scatterlist.h>
-
-#endif /* !(_M68K_SCATTERLIST_H) */
diff --git a/arch/m68k/include/asm/sections.h b/arch/m68k/include/asm/sections.h
deleted file mode 100644
index 5277e52715ec..000000000000
--- a/arch/m68k/include/asm/sections.h
+++ /dev/null
@@ -1,8 +0,0 @@
-#ifndef _ASM_M68K_SECTIONS_H
-#define _ASM_M68K_SECTIONS_H
-
-#include <asm-generic/sections.h>
-
-extern char _sbss[], _ebss[];
-
-#endif /* _ASM_M68K_SECTIONS_H */
diff --git a/arch/m68k/include/asm/shm.h b/arch/m68k/include/asm/shm.h
deleted file mode 100644
index fa56ec84a126..000000000000
--- a/arch/m68k/include/asm/shm.h
+++ /dev/null
@@ -1,31 +0,0 @@
-#ifndef _M68K_SHM_H
-#define _M68K_SHM_H
-
-
-/* format of page table entries that correspond to shared memory pages
-   currently out in swap space (see also mm/swap.c):
-   bits 0-1 (PAGE_PRESENT) is  = 0
-   bits 8..2 (SWP_TYPE) are = SHM_SWP_TYPE
-   bits 31..9 are used like this:
-   bits 15..9 (SHM_ID) the id of the shared memory segment
-   bits 30..16 (SHM_IDX) the index of the page within the shared memory segment
-                    (actually only bits 25..16 get used since SHMMAX is so low)
-   bit 31 (SHM_READ_ONLY) flag whether the page belongs to a read-only attach
-*/
-/* on the m68k both bits 0 and 1 must be zero */
-/* format on the sun3 is similar, but bits 30, 31 are set to zero and all
-   others are reduced by 2. --m */
-
-#ifndef CONFIG_SUN3
-#define SHM_ID_SHIFT    9
-#else
-#define SHM_ID_SHIFT    7
-#endif
-#define _SHM_ID_BITS    7
-#define SHM_ID_MASK     ((1<<_SHM_ID_BITS)-1)
-
-#define SHM_IDX_SHIFT   (SHM_ID_SHIFT+_SHM_ID_BITS)
-#define _SHM_IDX_BITS   15
-#define SHM_IDX_MASK    ((1<<_SHM_IDX_BITS)-1)
-
-#endif /* _M68K_SHM_H */
diff --git a/arch/m68k/include/asm/siginfo.h b/arch/m68k/include/asm/siginfo.h
deleted file mode 100644
index 851d3d784b53..000000000000
--- a/arch/m68k/include/asm/siginfo.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _M68K_SIGINFO_H
-#define _M68K_SIGINFO_H
-
-#include <asm-generic/siginfo.h>
-
-#endif
diff --git a/arch/m68k/include/asm/statfs.h b/arch/m68k/include/asm/statfs.h
deleted file mode 100644
index 08d93f14e061..000000000000
--- a/arch/m68k/include/asm/statfs.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _M68K_STATFS_H
-#define _M68K_STATFS_H
-
-#include <asm-generic/statfs.h>
-
-#endif /* _M68K_STATFS_H */
diff --git a/arch/m68k/include/asm/topology.h b/arch/m68k/include/asm/topology.h
deleted file mode 100644
index ca173e9f26ff..000000000000
--- a/arch/m68k/include/asm/topology.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _ASM_M68K_TOPOLOGY_H
-#define _ASM_M68K_TOPOLOGY_H
-
-#include <asm-generic/topology.h>
-
-#endif /* _ASM_M68K_TOPOLOGY_H */
diff --git a/arch/m68k/include/asm/types.h b/arch/m68k/include/asm/types.h
deleted file mode 100644
index 89705adcbd52..000000000000
--- a/arch/m68k/include/asm/types.h
+++ /dev/null
@@ -1,22 +0,0 @@
-#ifndef _M68K_TYPES_H
-#define _M68K_TYPES_H
-
-/*
- * This file is never included by application software unless
- * explicitly requested (e.g., via linux/types.h) in which case the
- * application is Linux specific so (user-) name space pollution is
- * not a major issue.  However, for interoperability, libraries still
- * need to be careful to avoid a name clashes.
- */
-#include <asm-generic/int-ll64.h>
-
-/*
- * These aren't exported outside the kernel to avoid name space clashes
- */
-#ifdef __KERNEL__
-
-#define BITS_PER_LONG 32
-
-#endif /* __KERNEL__ */
-
-#endif /* _M68K_TYPES_H */
diff --git a/arch/m68k/include/asm/unaligned.h b/arch/m68k/include/asm/unaligned.h
index f4043ae63db1..2b3ca0bf7a0d 100644
--- a/arch/m68k/include/asm/unaligned.h
+++ b/arch/m68k/include/asm/unaligned.h
@@ -2,7 +2,7 @@
 #define _ASM_M68K_UNALIGNED_H
 
 
-#if defined(CONFIG_COLDFIRE) || defined(CONFIG_M68000)
+#ifdef CONFIG_CPU_HAS_NO_UNALIGNED
 #include <linux/unaligned/be_struct.h>
 #include <linux/unaligned/le_byteshift.h>
 #include <linux/unaligned/generic.h>
@@ -12,7 +12,7 @@
 
 #else
 /*
- * The m68k can do unaligned accesses itself. 
+ * The m68k can do unaligned accesses itself.
  */
 #include <linux/unaligned/access_ok.h>
 #include <linux/unaligned/generic.h>
diff --git a/arch/m68k/include/asm/xor.h b/arch/m68k/include/asm/xor.h
deleted file mode 100644
index c82eb12a5b18..000000000000
--- a/arch/m68k/include/asm/xor.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/xor.h>
diff --git a/arch/m68k/kernel/setup_no.c b/arch/m68k/kernel/setup_no.c
index 7dc186b7a85f..71fb29938dba 100644
--- a/arch/m68k/kernel/setup_no.c
+++ b/arch/m68k/kernel/setup_no.c
@@ -218,13 +218,10 @@ void __init setup_arch(char **cmdline_p)
         printk(KERN_INFO "Motorola M5235EVB support (C)2005 Syn-tech Systems, Inc. (Jate Sujjavanich)\n");
 #endif
 
-        pr_debug("KERNEL -> TEXT=0x%06x-0x%06x DATA=0x%06x-0x%06x "
-                 "BSS=0x%06x-0x%06x\n", (int) &_stext, (int) &_etext,
-                 (int) &_sdata, (int) &_edata,
-                 (int) &_sbss, (int) &_ebss);
-        pr_debug("MEMORY -> ROMFS=0x%06x-0x%06x MEM=0x%06x-0x%06x\n ",
-                 (int) &_ebss, (int) memory_start,
-                 (int) memory_start, (int) memory_end);
+        pr_debug("KERNEL -> TEXT=0x%p-0x%p DATA=0x%p-0x%p BSS=0x%p-0x%p\n",
+                 _stext, _etext, _sdata, _edata, __bss_start, __bss_stop);
+        pr_debug("MEMORY -> ROMFS=0x%p-0x%06lx MEM=0x%06lx-0x%06lx\n ",
+                 __bss_stop, memory_start, memory_start, memory_end);
 
         /* Keep a copy of command line */
         *cmdline_p = &command_line[0];
diff --git a/arch/m68k/kernel/sys_m68k.c b/arch/m68k/kernel/sys_m68k.c
index 8623f8dc16f8..9a5932ec3689 100644
--- a/arch/m68k/kernel/sys_m68k.c
+++ b/arch/m68k/kernel/sys_m68k.c
@@ -479,9 +479,13 @@ sys_atomic_cmpxchg_32(unsigned long newval, int oldval, int d3, int d4, int d5,
                         goto bad_access;
                 }
 
-                mem_value = *mem;
+                /*
+                 * No need to check for EFAULT; we know that the page is
+                 * present and writable.
+                 */
+                __get_user(mem_value, mem);
                 if (mem_value == oldval)
-                        *mem = newval;
+                        __put_user(newval, mem);
 
                 pte_unmap_unlock(pte, ptl);
                 up_read(&mm->mmap_sem);
diff --git a/arch/m68k/kernel/vmlinux-nommu.lds b/arch/m68k/kernel/vmlinux-nommu.lds
index 40e02d9c38b4..06a763f49fd3 100644
--- a/arch/m68k/kernel/vmlinux-nommu.lds
+++ b/arch/m68k/kernel/vmlinux-nommu.lds
@@ -78,9 +78,7 @@ SECTIONS {
                 __init_end = .;
         }
 
-        _sbss = .;
         BSS_SECTION(0, 0, 0)
-        _ebss = .;
 
         _end = .;
 
diff --git a/arch/m68k/kernel/vmlinux-std.lds b/arch/m68k/kernel/vmlinux-std.lds
index 63407c836826..d0993594f558 100644
--- a/arch/m68k/kernel/vmlinux-std.lds
+++ b/arch/m68k/kernel/vmlinux-std.lds
@@ -31,9 +31,7 @@ SECTIONS
 
   RW_DATA_SECTION(16, PAGE_SIZE, THREAD_SIZE)
 
-  _sbss = .;
   BSS_SECTION(0, 0, 0)
-  _ebss = .;
 
   _edata = .;                   /* End of data section */
 
diff --git a/arch/m68k/kernel/vmlinux-sun3.lds b/arch/m68k/kernel/vmlinux-sun3.lds
index ad0f46d64c0b..8080469ee6c1 100644
--- a/arch/m68k/kernel/vmlinux-sun3.lds
+++ b/arch/m68k/kernel/vmlinux-sun3.lds
@@ -44,9 +44,7 @@ __init_begin = .;
         . = ALIGN(PAGE_SIZE);
         __init_end = .;
 
-  _sbss = .;
   BSS_SECTION(0, 0, 0)
-  _ebss = .;
 
   _end = . ;
 
diff --git a/arch/m68k/lib/muldi3.c b/arch/m68k/lib/muldi3.c
index 79e928a525d0..ee5f0b1b5c5d 100644
--- a/arch/m68k/lib/muldi3.c
+++ b/arch/m68k/lib/muldi3.c
@@ -19,7 +19,7 @@ along with GNU CC; see the file COPYING.  If not, write to
 the Free Software Foundation, 59 Temple Place - Suite 330,
 Boston, MA 02111-1307, USA.  */
 
-#if defined(CONFIG_M68000) || defined(CONFIG_COLDFIRE)
+#ifdef CONFIG_CPU_HAS_NO_MULDIV64
 
 #define SI_TYPE_SIZE 32
 #define __BITS4 (SI_TYPE_SIZE / 4)
diff --git a/arch/m68k/mm/init_mm.c b/arch/m68k/mm/init_mm.c
index f77f258dce3a..282f9de68966 100644
--- a/arch/m68k/mm/init_mm.c
+++ b/arch/m68k/mm/init_mm.c
@@ -104,7 +104,7 @@ void __init print_memmap(void)
                 MLK_ROUNDUP(__init_begin, __init_end),
                 MLK_ROUNDUP(_stext, _etext),
                 MLK_ROUNDUP(_sdata, _edata),
-                MLK_ROUNDUP(_sbss, _ebss));
+                MLK_ROUNDUP(__bss_start, __bss_stop));
 }
 
 void __init mem_init(void)
diff --git a/arch/m68k/mm/init_no.c b/arch/m68k/mm/init_no.c
index 345ec0d83e3d..688e3664aea0 100644
--- a/arch/m68k/mm/init_no.c
+++ b/arch/m68k/mm/init_no.c
@@ -91,7 +91,7 @@ void __init mem_init(void)
         totalram_pages = free_all_bootmem();
 
         codek = (_etext - _stext) >> 10;
-        datak = (_ebss - _sdata) >> 10;
+        datak = (__bss_stop - _sdata) >> 10;
         initk = (__init_begin - __init_end) >> 10;
 
         tmp = nr_free_pages() << PAGE_SHIFT;
diff --git a/arch/m68k/platform/68328/head-de2.S b/arch/m68k/platform/68328/head-de2.S
index f632fdcb93e9..537d3245b539 100644
--- a/arch/m68k/platform/68328/head-de2.S
+++ b/arch/m68k/platform/68328/head-de2.S
@@ -60,8 +60,8 @@ _start:
  *      Move ROM filesystem above bss :-)
  */
 
-        moveal  #_sbss, %a0                     /* romfs at the start of bss */
-        moveal  #_ebss, %a1                     /* Set up destination  */
+        moveal  #__bss_start, %a0               /* romfs at the start of bss */
+        moveal  #__bss_stop, %a1                /* Set up destination  */
         movel   %a0, %a2                        /* Copy of bss start */
 
         movel   8(%a0), %d1                     /* Get size of ROMFS */
@@ -84,8 +84,8 @@ _start:
  * Initialize BSS segment to 0
  */
 
-        lea     _sbss, %a0
-        lea     _ebss, %a1
+        lea     __bss_start, %a0
+        lea     __bss_stop, %a1
 
         /* Copy 0 to %a0 until %a0 == %a1 */
 2:      cmpal   %a0, %a1
diff --git a/arch/m68k/platform/68328/head-pilot.S b/arch/m68k/platform/68328/head-pilot.S
index 2ebfd6420818..45a9dad29e3d 100644
--- a/arch/m68k/platform/68328/head-pilot.S
+++ b/arch/m68k/platform/68328/head-pilot.S
@@ -110,7 +110,7 @@ L0:
         movel   #CONFIG_VECTORBASE, %d7
         addl    #16, %d7
         moveal  %d7, %a0
-        moveal  #_ebss, %a1
+        moveal  #__bss_stop, %a1
         lea     %a1@(512), %a2
 
         DBG_PUTC('C')
@@ -138,8 +138,8 @@ LD1:
 
         DBG_PUTC('E')
 
-        moveal  #_sbss, %a0
-        moveal  #_ebss, %a1
+        moveal  #__bss_start, %a0
+        moveal  #__bss_stop, %a1
 
         /* Copy 0 to %a0 until %a0 == %a1 */
 L1:
@@ -150,7 +150,7 @@ L1:
         DBG_PUTC('F')
 
         /* Copy command line from end of bss to command line */
-        moveal  #_ebss, %a0
+        moveal  #__bss_stop, %a0
         moveal  #command_line, %a1
         lea     %a1@(512), %a2
 
@@ -165,7 +165,7 @@ L3:
 
         movel   #_sdata, %d0    
         movel   %d0, _rambase   
-        movel   #_ebss, %d0
+        movel   #__bss_stop, %d0
         movel   %d0, _ramstart
 
         movel   %a4, %d0
diff --git a/arch/m68k/platform/68328/head-ram.S b/arch/m68k/platform/68328/head-ram.S
index 7f1aeeacb219..5189ef926098 100644
--- a/arch/m68k/platform/68328/head-ram.S
+++ b/arch/m68k/platform/68328/head-ram.S
@@ -76,8 +76,8 @@ pclp3:
         beq     pclp3
 #endif /* DEBUG */
         moveal  #0x007ffff0, %ssp
-        moveal  #_sbss, %a0
-        moveal  #_ebss, %a1
+        moveal  #__bss_start, %a0
+        moveal  #__bss_stop, %a1
 
         /* Copy 0 to %a0 until %a0 >= %a1 */
 L1:
diff --git a/arch/m68k/platform/68328/head-rom.S b/arch/m68k/platform/68328/head-rom.S
index a5ff96d0295f..3dff98ba2e97 100644
--- a/arch/m68k/platform/68328/head-rom.S
+++ b/arch/m68k/platform/68328/head-rom.S
@@ -59,8 +59,8 @@ _stext:	movew	#0x2700,%sr
         cmpal   %a1, %a2
         bhi     1b
 
-        moveal  #_sbss, %a0
-        moveal  #_ebss, %a1
+        moveal  #__bss_start, %a0
+        moveal  #__bss_stop, %a1
         /* Copy 0 to %a0 until %a0 == %a1 */
         
 1:
@@ -70,7 +70,7 @@ _stext:	movew	#0x2700,%sr
 
         movel   #_sdata, %d0    
         movel   %d0, _rambase        
-        movel   #_ebss, %d0
+        movel   #__bss_stop, %d0
         movel   %d0, _ramstart
         movel   #RAMEND-CONFIG_MEMORY_RESERVE*0x100000, %d0
         movel   %d0, _ramend
diff --git a/arch/m68k/platform/68360/head-ram.S b/arch/m68k/platform/68360/head-ram.S
index 8eb94fb6b971..acd213170d80 100644
--- a/arch/m68k/platform/68360/head-ram.S
+++ b/arch/m68k/platform/68360/head-ram.S
@@ -219,8 +219,8 @@ LD1:
         cmp.l   #_edata, %a1
         blt     LD1
 
-        moveal  #_sbss, %a0
-        moveal  #_ebss, %a1
+        moveal  #__bss_start, %a0
+        moveal  #__bss_stop, %a1
 
         /* Copy 0 to %a0 until %a0 == %a1 */
 L1:
@@ -234,7 +234,7 @@ load_quicc:
 store_ram_size:
         /* Set ram size information */
         move.l  #_sdata, _rambase
-        move.l  #_ebss, _ramstart
+        move.l  #__bss_stop, _ramstart
         move.l  #RAMEND, %d0
         sub.l   #0x1000, %d0                    /* Reserve 4K for stack space.*/
         move.l  %d0, _ramend                    /* Different from RAMEND.*/
diff --git a/arch/m68k/platform/68360/head-rom.S b/arch/m68k/platform/68360/head-rom.S
index 97510e55b802..dfc756d99886 100644
--- a/arch/m68k/platform/68360/head-rom.S
+++ b/arch/m68k/platform/68360/head-rom.S
@@ -13,7 +13,7 @@
  */
 
 .global _stext
-.global _sbss
+.global __bss_start
 .global _start
 
 .global _rambase
@@ -229,8 +229,8 @@ LD1:
         cmp.l   #_edata, %a1
         blt     LD1
 
-        moveal  #_sbss, %a0
-        moveal  #_ebss, %a1
+        moveal  #__bss_start, %a0
+        moveal  #__bss_stop, %a1
 
         /* Copy 0 to %a0 until %a0 == %a1 */
 L1:
@@ -244,7 +244,7 @@ load_quicc:
 store_ram_size:
         /* Set ram size information */
         move.l  #_sdata, _rambase
-        move.l  #_ebss, _ramstart
+        move.l  #__bss_stop, _ramstart
         move.l  #RAMEND, %d0
         sub.l   #0x1000, %d0                    /* Reserve 4K for stack space.*/
         move.l  %d0, _ramend                    /* Different from RAMEND.*/
diff --git a/arch/m68k/platform/coldfire/head.S b/arch/m68k/platform/coldfire/head.S
index 4e0c9eb3bd1f..b88f5716f357 100644
--- a/arch/m68k/platform/coldfire/head.S
+++ b/arch/m68k/platform/coldfire/head.S
@@ -230,8 +230,8 @@ _vstart:
         /*
          *      Move ROM filesystem above bss :-)
          */
-        lea     _sbss,%a0                       /* get start of bss */
-        lea     _ebss,%a1                       /* set up destination  */
+        lea     __bss_start,%a0                 /* get start of bss */
+        lea     __bss_stop,%a1                  /* set up destination  */
         movel   %a0,%a2                         /* copy of bss start */
 
         movel   8(%a0),%d0                      /* get size of ROMFS */
@@ -249,7 +249,7 @@ _copy_romfs:
         bne     _copy_romfs
 
 #else /* CONFIG_ROMFS_FS */
-        lea     _ebss,%a1
+        lea     __bss_stop,%a1
         movel   %a1,_ramstart
 #endif /* CONFIG_ROMFS_FS */
 
@@ -257,8 +257,8 @@ _copy_romfs:
         /*
          *      Zero out the bss region.
          */
-        lea     _sbss,%a0                       /* get start of bss */
-        lea     _ebss,%a1                       /* get end of bss */
+        lea     __bss_start,%a0                 /* get start of bss */
+        lea     __bss_stop,%a1                  /* get end of bss */
         clrl    %d0                             /* set value */
 _clear_bss:
         movel   %d0,(%a0)+                      /* clear each word */
diff --git a/arch/m68k/sun3/prom/init.c b/arch/m68k/sun3/prom/init.c
index d8e6349336b4..eeba067d565f 100644
--- a/arch/m68k/sun3/prom/init.c
+++ b/arch/m68k/sun3/prom/init.c
@@ -22,57 +22,13 @@ int prom_root_node;
 struct linux_nodeops *prom_nodeops;
 
 /* You must call prom_init() before you attempt to use any of the
- * routines in the prom library.  It returns 0 on success, 1 on
- * failure.  It gets passed the pointer to the PROM vector.
+ * routines in the prom library.
+ * It gets passed the pointer to the PROM vector.
  */
 
-extern void prom_meminit(void);
-extern void prom_ranges_init(void);
-
 void __init prom_init(struct linux_romvec *rp)
 {
         romvec = rp;
-#ifndef CONFIG_SUN3
-        switch(romvec->pv_romvers) {
-        case 0:
-                prom_vers = PROM_V0;
-                break;
-        case 2:
-                prom_vers = PROM_V2;
-                break;
-        case 3:
-                prom_vers = PROM_V3;
-                break;
-        case 4:
-                prom_vers = PROM_P1275;
-                prom_printf("PROMLIB: Sun IEEE Prom not supported yet\n");
-                prom_halt();
-                break;
-        default:
-                prom_printf("PROMLIB: Bad PROM version %d\n",
-                            romvec->pv_romvers);
-                prom_halt();
-                break;
-        };
-
-        prom_rev = romvec->pv_plugin_revision;
-        prom_prev = romvec->pv_printrev;
-        prom_nodeops = romvec->pv_nodeops;
-
-        prom_root_node = prom_getsibling(0);
-        if((prom_root_node == 0) || (prom_root_node == -1))
-                prom_halt();
-
-        if((((unsigned long) prom_nodeops) == 0) ||
-           (((unsigned long) prom_nodeops) == -1))
-                prom_halt();
-
-        prom_meminit();
-
-        prom_ranges_init();
-#endif
-//      printk("PROMLIB: Sun Boot Prom Version %d Revision %d\n",
-//             romvec->pv_romvers, prom_rev);
 
         /* Initialization successful. */
         return;
diff --git a/arch/microblaze/include/asm/sections.h b/arch/microblaze/include/asm/sections.h
index 4487e150b455..c07ed5d2a820 100644
--- a/arch/microblaze/include/asm/sections.h
+++ b/arch/microblaze/include/asm/sections.h
@@ -18,10 +18,6 @@ extern char _ssbss[], _esbss[];
 extern unsigned long __ivt_start[], __ivt_end[];
 extern char _etext[], _stext[];
 
-#  ifdef CONFIG_MTD_UCLINUX
-extern char *_ebss;
-#  endif
-
 extern u32 _fdt_start[], _fdt_end[];
 
 # endif /* !__ASSEMBLY__ */
diff --git a/arch/microblaze/kernel/microblaze_ksyms.c b/arch/microblaze/kernel/microblaze_ksyms.c
index bb4907c828dc..2b25bcf05c00 100644
--- a/arch/microblaze/kernel/microblaze_ksyms.c
+++ b/arch/microblaze/kernel/microblaze_ksyms.c
@@ -21,9 +21,6 @@
 #include <linux/ftrace.h>
 #include <linux/uaccess.h>
 
-extern char *_ebss;
-EXPORT_SYMBOL_GPL(_ebss);
-
 #ifdef CONFIG_FUNCTION_TRACER
 extern void _mcount(void);
 EXPORT_SYMBOL(_mcount);
diff --git a/arch/microblaze/kernel/setup.c b/arch/microblaze/kernel/setup.c
index 16d8dfd9094b..4da971d4392f 100644
--- a/arch/microblaze/kernel/setup.c
+++ b/arch/microblaze/kernel/setup.c
@@ -121,7 +121,7 @@ void __init machine_early_init(const char *cmdline, unsigned int ram,
 
         /* Move ROMFS out of BSS before clearing it */
         if (romfs_size > 0) {
-                memmove(&_ebss, (int *)romfs_base, romfs_size);
+                memmove(&__bss_stop, (int *)romfs_base, romfs_size);
                 klimit += romfs_size;
         }
 #endif
@@ -165,7 +165,7 @@ void __init machine_early_init(const char *cmdline, unsigned int ram,
         BUG_ON(romfs_size < 0); /* What else can we do? */
 
         printk("Moved 0x%08x bytes from 0x%08x to 0x%08x\n",
-                        romfs_size, romfs_base, (unsigned)&_ebss);
+                        romfs_size, romfs_base, (unsigned)&__bss_stop);
 
         printk("New klimit: 0x%08x\n", (unsigned)klimit);
 #endif
diff --git a/arch/microblaze/kernel/vmlinux.lds.S b/arch/microblaze/kernel/vmlinux.lds.S
index 109e9d86ade4..936d01a689d7 100644
--- a/arch/microblaze/kernel/vmlinux.lds.S
+++ b/arch/microblaze/kernel/vmlinux.lds.S
@@ -131,7 +131,6 @@ SECTIONS {
                         *(COMMON)
                 . = ALIGN (4) ;
                 __bss_stop = . ;
-                _ebss = . ;
         }
         . = ALIGN(PAGE_SIZE);
         _end = .;
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index 76de6b68487c..107610e01a29 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -124,6 +124,7 @@ config S390
         select GENERIC_TIME_VSYSCALL
         select GENERIC_CLOCKEVENTS
         select KTIME_SCALAR if 32BIT
+        select HAVE_ARCH_SECCOMP_FILTER
 
 config SCHED_OMIT_FRAME_POINTER
         def_bool y
diff --git a/arch/s390/include/asm/sparsemem.h b/arch/s390/include/asm/sparsemem.h
index 0fb34027d3f6..a60d085ddb4d 100644
--- a/arch/s390/include/asm/sparsemem.h
+++ b/arch/s390/include/asm/sparsemem.h
@@ -4,13 +4,11 @@
 #ifdef CONFIG_64BIT
 
 #define SECTION_SIZE_BITS       28
-#define MAX_PHYSADDR_BITS       46
 #define MAX_PHYSMEM_BITS        46
 
 #else
 
 #define SECTION_SIZE_BITS       25
-#define MAX_PHYSADDR_BITS       31
 #define MAX_PHYSMEM_BITS        31
 
 #endif /* CONFIG_64BIT */
diff --git a/arch/s390/include/asm/syscall.h b/arch/s390/include/asm/syscall.h
index fb214dd9b7e0..fe7b99759e12 100644
--- a/arch/s390/include/asm/syscall.h
+++ b/arch/s390/include/asm/syscall.h
@@ -12,6 +12,7 @@
 #ifndef _ASM_SYSCALL_H
 #define _ASM_SYSCALL_H  1
 
+#include <linux/audit.h>
 #include <linux/sched.h>
 #include <linux/err.h>
 #include <asm/ptrace.h>
@@ -87,4 +88,13 @@ static inline void syscall_set_arguments(struct task_struct *task,
                 regs->orig_gpr2 = args[0];
 }
 
+static inline int syscall_get_arch(struct task_struct *task,
+                                   struct pt_regs *regs)
+{
+#ifdef CONFIG_COMPAT
+        if (test_tsk_thread_flag(task, TIF_31BIT))
+                return AUDIT_ARCH_S390;
+#endif
+        return sizeof(long) == 8 ? AUDIT_ARCH_S390X : AUDIT_ARCH_S390;
+}
 #endif  /* _ASM_SYSCALL_H */
diff --git a/arch/s390/kernel/compat_linux.c b/arch/s390/kernel/compat_linux.c
index d1225089a4bb..f606d935f495 100644
--- a/arch/s390/kernel/compat_linux.c
+++ b/arch/s390/kernel/compat_linux.c
@@ -620,7 +620,6 @@ asmlinkage unsigned long old32_mmap(struct mmap_arg_struct_emu31 __user *arg)
                 return -EFAULT;
         if (a.offset & ~PAGE_MASK)
                 return -EINVAL;
-        a.addr = (unsigned long) compat_ptr(a.addr);
         return sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd,
                               a.offset >> PAGE_SHIFT);
 }
@@ -631,7 +630,6 @@ asmlinkage long sys32_mmap2(struct mmap_arg_struct_emu31 __user *arg)
 
         if (copy_from_user(&a, arg, sizeof(a)))
                 return -EFAULT;
-        a.addr = (unsigned long) compat_ptr(a.addr);
         return sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd, a.offset);
 }
 
diff --git a/arch/s390/kernel/compat_wrapper.S b/arch/s390/kernel/compat_wrapper.S
index e835d6d5b7fd..2d82cfcbce5b 100644
--- a/arch/s390/kernel/compat_wrapper.S
+++ b/arch/s390/kernel/compat_wrapper.S
@@ -1635,7 +1635,7 @@ ENTRY(compat_sys_process_vm_readv_wrapper)
         llgfr   %r6,%r6                 # unsigned long
         llgf    %r0,164(%r15)           # unsigned long
         stg     %r0,160(%r15)
-        jg      sys_process_vm_readv
+        jg      compat_sys_process_vm_readv
 
 ENTRY(compat_sys_process_vm_writev_wrapper)
         lgfr    %r2,%r2                 # compat_pid_t
@@ -1645,4 +1645,4 @@ ENTRY(compat_sys_process_vm_writev_wrapper)
         llgfr   %r6,%r6                 # unsigned long
         llgf    %r0,164(%r15)           # unsigned long
         stg     %r0,160(%r15)
-        jg      sys_process_vm_writev
+        jg      compat_sys_process_vm_writev
diff --git a/arch/s390/kernel/ptrace.c b/arch/s390/kernel/ptrace.c
index f4eb37680b91..e4be113fbac6 100644
--- a/arch/s390/kernel/ptrace.c
+++ b/arch/s390/kernel/ptrace.c
@@ -719,7 +719,11 @@ asmlinkage long do_syscall_trace_enter(struct pt_regs *regs)
         long ret = 0;
 
         /* Do the secure computing check first. */
-        secure_computing_strict(regs->gprs[2]);
+        if (secure_computing(regs->gprs[2])) {
+                /* seccomp failures shouldn't expose any additional code. */
+                ret = -1;
+                goto out;
+        }
 
         /*
          * The sysc_tracesys code in entry.S stored the system
@@ -745,6 +749,7 @@ asmlinkage long do_syscall_trace_enter(struct pt_regs *regs)
                             regs->gprs[2], regs->orig_gpr2,
                             regs->gprs[3], regs->gprs[4],
                             regs->gprs[5]);
+out:
         return ret ?: regs->gprs[2];
 }
 
diff --git a/arch/s390/kernel/sys_s390.c b/arch/s390/kernel/sys_s390.c
index b4a29eee41b8..d0964d22adb5 100644
--- a/arch/s390/kernel/sys_s390.c
+++ b/arch/s390/kernel/sys_s390.c
@@ -81,11 +81,12 @@ SYSCALL_DEFINE1(s390_personality, unsigned int, personality)
 {
         unsigned int ret;
 
-        if (current->personality == PER_LINUX32 && personality == PER_LINUX)
-                personality = PER_LINUX32;
+        if (personality(current->personality) == PER_LINUX32 &&
+            personality(personality) == PER_LINUX)
+                personality |= PER_LINUX32;
         ret = sys_personality(personality);
-        if (ret == PER_LINUX32)
-                ret = PER_LINUX;
+        if (personality(ret) == PER_LINUX32)
+                ret &= ~PER_LINUX32;
 
         return ret;
 }
diff --git a/arch/sh/drivers/dma/dma-sh.c b/arch/sh/drivers/dma/dma-sh.c
index 4c171f13b0e8..b22565623142 100644
--- a/arch/sh/drivers/dma/dma-sh.c
+++ b/arch/sh/drivers/dma/dma-sh.c
@@ -335,7 +335,7 @@ static int dmae_irq_init(void)
 
         for (n = 0; n < NR_DMAE; n++) {
                 int i = request_irq(get_dma_error_irq(n), dma_err,
-                                    IRQF_SHARED, dmae_name[n], NULL);
+                                    IRQF_SHARED, dmae_name[n], (void *)dmae_name[n]);
                 if (unlikely(i < 0)) {
                         printk(KERN_ERR "%s request_irq fail\n", dmae_name[n]);
                         return i;
diff --git a/arch/sh/include/asm/sections.h b/arch/sh/include/asm/sections.h
index 4a5350037c8f..1b6199740e98 100644
--- a/arch/sh/include/asm/sections.h
+++ b/arch/sh/include/asm/sections.h
@@ -6,7 +6,6 @@
 extern long __nosave_begin, __nosave_end;
 extern long __machvec_start, __machvec_end;
 extern char __uncached_start, __uncached_end;
-extern char _ebss[];
 extern char __start_eh_frame[], __stop_eh_frame[];
 
 #endif /* __ASM_SH_SECTIONS_H */
diff --git a/arch/sh/include/cpu-sh2a/cpu/sh7269.h b/arch/sh/include/cpu-sh2a/cpu/sh7269.h
index 48d14498e774..2a0ca8780f0d 100644
--- a/arch/sh/include/cpu-sh2a/cpu/sh7269.h
+++ b/arch/sh/include/cpu-sh2a/cpu/sh7269.h
@@ -183,18 +183,30 @@ enum {
         GPIO_FN_DV_DATA1, GPIO_FN_DV_DATA0,
         GPIO_FN_LCD_CLK, GPIO_FN_LCD_EXTCLK,
         GPIO_FN_LCD_VSYNC, GPIO_FN_LCD_HSYNC, GPIO_FN_LCD_DE,
-        GPIO_FN_LCD_DATA23, GPIO_FN_LCD_DATA22,
-        GPIO_FN_LCD_DATA21, GPIO_FN_LCD_DATA20,
-        GPIO_FN_LCD_DATA19, GPIO_FN_LCD_DATA18,
-        GPIO_FN_LCD_DATA17, GPIO_FN_LCD_DATA16,
-        GPIO_FN_LCD_DATA15, GPIO_FN_LCD_DATA14,
-        GPIO_FN_LCD_DATA13, GPIO_FN_LCD_DATA12,
-        GPIO_FN_LCD_DATA11, GPIO_FN_LCD_DATA10,
-        GPIO_FN_LCD_DATA9, GPIO_FN_LCD_DATA8,
-        GPIO_FN_LCD_DATA7, GPIO_FN_LCD_DATA6,
-        GPIO_FN_LCD_DATA5, GPIO_FN_LCD_DATA4,
-        GPIO_FN_LCD_DATA3, GPIO_FN_LCD_DATA2,
-        GPIO_FN_LCD_DATA1, GPIO_FN_LCD_DATA0,
+        GPIO_FN_LCD_DATA23_PG23, GPIO_FN_LCD_DATA22_PG22,
+        GPIO_FN_LCD_DATA21_PG21, GPIO_FN_LCD_DATA20_PG20,
+        GPIO_FN_LCD_DATA19_PG19, GPIO_FN_LCD_DATA18_PG18,
+        GPIO_FN_LCD_DATA17_PG17, GPIO_FN_LCD_DATA16_PG16,
+        GPIO_FN_LCD_DATA15_PG15, GPIO_FN_LCD_DATA14_PG14,
+        GPIO_FN_LCD_DATA13_PG13, GPIO_FN_LCD_DATA12_PG12,
+        GPIO_FN_LCD_DATA11_PG11, GPIO_FN_LCD_DATA10_PG10,
+        GPIO_FN_LCD_DATA9_PG9, GPIO_FN_LCD_DATA8_PG8,
+        GPIO_FN_LCD_DATA7_PG7, GPIO_FN_LCD_DATA6_PG6,
+        GPIO_FN_LCD_DATA5_PG5, GPIO_FN_LCD_DATA4_PG4,
+        GPIO_FN_LCD_DATA3_PG3, GPIO_FN_LCD_DATA2_PG2,
+        GPIO_FN_LCD_DATA1_PG1, GPIO_FN_LCD_DATA0_PG0,
+        GPIO_FN_LCD_DATA23_PJ23, GPIO_FN_LCD_DATA22_PJ22,
+        GPIO_FN_LCD_DATA21_PJ21, GPIO_FN_LCD_DATA20_PJ20,
+        GPIO_FN_LCD_DATA19_PJ19, GPIO_FN_LCD_DATA18_PJ18,
+        GPIO_FN_LCD_DATA17_PJ17, GPIO_FN_LCD_DATA16_PJ16,
+        GPIO_FN_LCD_DATA15_PJ15, GPIO_FN_LCD_DATA14_PJ14,
+        GPIO_FN_LCD_DATA13_PJ13, GPIO_FN_LCD_DATA12_PJ12,
+        GPIO_FN_LCD_DATA11_PJ11, GPIO_FN_LCD_DATA10_PJ10,
+        GPIO_FN_LCD_DATA9_PJ9, GPIO_FN_LCD_DATA8_PJ8,
+        GPIO_FN_LCD_DATA7_PJ7, GPIO_FN_LCD_DATA6_PJ6,
+        GPIO_FN_LCD_DATA5_PJ5, GPIO_FN_LCD_DATA4_PJ4,
+        GPIO_FN_LCD_DATA3_PJ3, GPIO_FN_LCD_DATA2_PJ2,
+        GPIO_FN_LCD_DATA1_PJ1, GPIO_FN_LCD_DATA0_PJ0,
         GPIO_FN_LCD_M_DISP,
 };
 
diff --git a/arch/sh/kernel/cpu/sh2a/pinmux-sh7269.c b/arch/sh/kernel/cpu/sh2a/pinmux-sh7269.c
index f25127c46eca..039e4587dd9b 100644
--- a/arch/sh/kernel/cpu/sh2a/pinmux-sh7269.c
+++ b/arch/sh/kernel/cpu/sh2a/pinmux-sh7269.c
@@ -758,12 +758,22 @@ enum {
         DV_DATA3_MARK, DV_DATA2_MARK, DV_DATA1_MARK, DV_DATA0_MARK,
         LCD_CLK_MARK, LCD_EXTCLK_MARK,
         LCD_VSYNC_MARK, LCD_HSYNC_MARK, LCD_DE_MARK,
-        LCD_DATA23_MARK, LCD_DATA22_MARK, LCD_DATA21_MARK, LCD_DATA20_MARK,
-        LCD_DATA19_MARK, LCD_DATA18_MARK, LCD_DATA17_MARK, LCD_DATA16_MARK,
-        LCD_DATA15_MARK, LCD_DATA14_MARK, LCD_DATA13_MARK, LCD_DATA12_MARK,
-        LCD_DATA11_MARK, LCD_DATA10_MARK, LCD_DATA9_MARK, LCD_DATA8_MARK,
-        LCD_DATA7_MARK, LCD_DATA6_MARK, LCD_DATA5_MARK, LCD_DATA4_MARK,
-        LCD_DATA3_MARK, LCD_DATA2_MARK, LCD_DATA1_MARK, LCD_DATA0_MARK,
+        LCD_DATA23_PG23_MARK, LCD_DATA22_PG22_MARK, LCD_DATA21_PG21_MARK,
+        LCD_DATA20_PG20_MARK, LCD_DATA19_PG19_MARK, LCD_DATA18_PG18_MARK,
+        LCD_DATA17_PG17_MARK, LCD_DATA16_PG16_MARK, LCD_DATA15_PG15_MARK,
+        LCD_DATA14_PG14_MARK, LCD_DATA13_PG13_MARK, LCD_DATA12_PG12_MARK,
+        LCD_DATA11_PG11_MARK, LCD_DATA10_PG10_MARK, LCD_DATA9_PG9_MARK,
+        LCD_DATA8_PG8_MARK, LCD_DATA7_PG7_MARK, LCD_DATA6_PG6_MARK,
+        LCD_DATA5_PG5_MARK, LCD_DATA4_PG4_MARK, LCD_DATA3_PG3_MARK,
+        LCD_DATA2_PG2_MARK, LCD_DATA1_PG1_MARK, LCD_DATA0_PG0_MARK,
+        LCD_DATA23_PJ23_MARK, LCD_DATA22_PJ22_MARK, LCD_DATA21_PJ21_MARK,
+        LCD_DATA20_PJ20_MARK, LCD_DATA19_PJ19_MARK, LCD_DATA18_PJ18_MARK,
+        LCD_DATA17_PJ17_MARK, LCD_DATA16_PJ16_MARK, LCD_DATA15_PJ15_MARK,
+        LCD_DATA14_PJ14_MARK, LCD_DATA13_PJ13_MARK, LCD_DATA12_PJ12_MARK,
+        LCD_DATA11_PJ11_MARK, LCD_DATA10_PJ10_MARK, LCD_DATA9_PJ9_MARK,
+        LCD_DATA8_PJ8_MARK, LCD_DATA7_PJ7_MARK, LCD_DATA6_PJ6_MARK,
+        LCD_DATA5_PJ5_MARK, LCD_DATA4_PJ4_MARK, LCD_DATA3_PJ3_MARK,
+        LCD_DATA2_PJ2_MARK, LCD_DATA1_PJ1_MARK, LCD_DATA0_PJ0_MARK,
         LCD_TCON6_MARK, LCD_TCON5_MARK, LCD_TCON4_MARK,
         LCD_TCON3_MARK, LCD_TCON2_MARK, LCD_TCON1_MARK, LCD_TCON0_MARK,
         LCD_M_DISP_MARK,
@@ -1036,6 +1046,7 @@ static pinmux_enum_t pinmux_data[] = {
 
         PINMUX_DATA(PF1_DATA, PF1MD_000),
         PINMUX_DATA(BACK_MARK, PF1MD_001),
+        PINMUX_DATA(SSL10_MARK, PF1MD_011),
         PINMUX_DATA(TIOC4B_MARK, PF1MD_100),
         PINMUX_DATA(DACK0_MARK, PF1MD_101),
 
@@ -1049,47 +1060,50 @@ static pinmux_enum_t pinmux_data[] = {
         PINMUX_DATA(PG27_DATA, PG27MD_00),
         PINMUX_DATA(LCD_TCON2_MARK, PG27MD_10),
         PINMUX_DATA(LCD_EXTCLK_MARK, PG27MD_11),
+        PINMUX_DATA(LCD_DE_MARK, PG27MD_11),
 
         PINMUX_DATA(PG26_DATA, PG26MD_00),
         PINMUX_DATA(LCD_TCON1_MARK, PG26MD_10),
+        PINMUX_DATA(LCD_HSYNC_MARK, PG26MD_10),
 
         PINMUX_DATA(PG25_DATA, PG25MD_00),
         PINMUX_DATA(LCD_TCON0_MARK, PG25MD_10),
+        PINMUX_DATA(LCD_VSYNC_MARK, PG25MD_10),
 
         PINMUX_DATA(PG24_DATA, PG24MD_00),
         PINMUX_DATA(LCD_CLK_MARK, PG24MD_10),
 
         PINMUX_DATA(PG23_DATA, PG23MD_000),
-        PINMUX_DATA(LCD_DATA23_MARK, PG23MD_010),
+        PINMUX_DATA(LCD_DATA23_PG23_MARK, PG23MD_010),
         PINMUX_DATA(LCD_TCON6_MARK, PG23MD_011),
         PINMUX_DATA(TXD5_MARK, PG23MD_100),
 
         PINMUX_DATA(PG22_DATA, PG22MD_000),
-        PINMUX_DATA(LCD_DATA22_MARK, PG22MD_010),
+        PINMUX_DATA(LCD_DATA22_PG22_MARK, PG22MD_010),
         PINMUX_DATA(LCD_TCON5_MARK, PG22MD_011),
         PINMUX_DATA(RXD5_MARK, PG22MD_100),
 
         PINMUX_DATA(PG21_DATA, PG21MD_000),
         PINMUX_DATA(DV_DATA7_MARK, PG21MD_001),
-        PINMUX_DATA(LCD_DATA21_MARK, PG21MD_010),
+        PINMUX_DATA(LCD_DATA21_PG21_MARK, PG21MD_010),
         PINMUX_DATA(LCD_TCON4_MARK, PG21MD_011),
         PINMUX_DATA(TXD4_MARK, PG21MD_100),
 
         PINMUX_DATA(PG20_DATA, PG20MD_000),
         PINMUX_DATA(DV_DATA6_MARK, PG20MD_001),
-        PINMUX_DATA(LCD_DATA20_MARK, PG21MD_010),
+        PINMUX_DATA(LCD_DATA20_PG20_MARK, PG21MD_010),
         PINMUX_DATA(LCD_TCON3_MARK, PG20MD_011),
         PINMUX_DATA(RXD4_MARK, PG20MD_100),
 
         PINMUX_DATA(PG19_DATA, PG19MD_000),
         PINMUX_DATA(DV_DATA5_MARK, PG19MD_001),
-        PINMUX_DATA(LCD_DATA19_MARK, PG19MD_010),
+        PINMUX_DATA(LCD_DATA19_PG19_MARK, PG19MD_010),
         PINMUX_DATA(SPDIF_OUT_MARK, PG19MD_011),
         PINMUX_DATA(SCK5_MARK, PG19MD_100),
 
         PINMUX_DATA(PG18_DATA, PG18MD_000),
         PINMUX_DATA(DV_DATA4_MARK, PG18MD_001),
-        PINMUX_DATA(LCD_DATA18_MARK, PG18MD_010),
+        PINMUX_DATA(LCD_DATA18_PG18_MARK, PG18MD_010),
         PINMUX_DATA(SPDIF_IN_MARK, PG18MD_011),
         PINMUX_DATA(SCK4_MARK, PG18MD_100),
 
@@ -1097,103 +1111,103 @@ static pinmux_enum_t pinmux_data[] = {
 // we're going with 2 bits
         PINMUX_DATA(PG17_DATA, PG17MD_00),
         PINMUX_DATA(WE3ICIOWRAHDQMUU_MARK, PG17MD_01),
-        PINMUX_DATA(LCD_DATA17_MARK, PG17MD_10),
+        PINMUX_DATA(LCD_DATA17_PG17_MARK, PG17MD_10),
 
 // TODO hardware manual has PG16 3 bits wide in reg picture and 2 bits in description
 // we're going with 2 bits
         PINMUX_DATA(PG16_DATA, PG16MD_00),
         PINMUX_DATA(WE2ICIORDDQMUL_MARK, PG16MD_01),
-        PINMUX_DATA(LCD_DATA16_MARK, PG16MD_10),
+        PINMUX_DATA(LCD_DATA16_PG16_MARK, PG16MD_10),
 
         PINMUX_DATA(PG15_DATA, PG15MD_00),
         PINMUX_DATA(D31_MARK, PG15MD_01),
-        PINMUX_DATA(LCD_DATA15_MARK, PG15MD_10),
+        PINMUX_DATA(LCD_DATA15_PG15_MARK, PG15MD_10),
         PINMUX_DATA(PINT7_PG_MARK, PG15MD_11),
 
         PINMUX_DATA(PG14_DATA, PG14MD_00),
         PINMUX_DATA(D30_MARK, PG14MD_01),
-        PINMUX_DATA(LCD_DATA14_MARK, PG14MD_10),
+        PINMUX_DATA(LCD_DATA14_PG14_MARK, PG14MD_10),
         PINMUX_DATA(PINT6_PG_MARK, PG14MD_11),
 
         PINMUX_DATA(PG13_DATA, PG13MD_00),
         PINMUX_DATA(D29_MARK, PG13MD_01),
-        PINMUX_DATA(LCD_DATA13_MARK, PG13MD_10),
+        PINMUX_DATA(LCD_DATA13_PG13_MARK, PG13MD_10),
         PINMUX_DATA(PINT5_PG_MARK, PG13MD_11),
 
         PINMUX_DATA(PG12_DATA, PG12MD_00),
         PINMUX_DATA(D28_MARK, PG12MD_01),
-        PINMUX_DATA(LCD_DATA12_MARK, PG12MD_10),
+        PINMUX_DATA(LCD_DATA12_PG12_MARK, PG12MD_10),
         PINMUX_DATA(PINT4_PG_MARK, PG12MD_11),
 
         PINMUX_DATA(PG11_DATA, PG11MD_000),
         PINMUX_DATA(D27_MARK, PG11MD_001),
-        PINMUX_DATA(LCD_DATA11_MARK, PG11MD_010),
+        PINMUX_DATA(LCD_DATA11_PG11_MARK, PG11MD_010),
         PINMUX_DATA(PINT3_PG_MARK, PG11MD_011),
         PINMUX_DATA(TIOC3D_MARK, PG11MD_100),
 
         PINMUX_DATA(PG10_DATA, PG10MD_000),
         PINMUX_DATA(D26_MARK, PG10MD_001),
-        PINMUX_DATA(LCD_DATA10_MARK, PG10MD_010),
+        PINMUX_DATA(LCD_DATA10_PG10_MARK, PG10MD_010),
         PINMUX_DATA(PINT2_PG_MARK, PG10MD_011),
         PINMUX_DATA(TIOC3C_MARK, PG10MD_100),
 
         PINMUX_DATA(PG9_DATA, PG9MD_000),
         PINMUX_DATA(D25_MARK, PG9MD_001),
-        PINMUX_DATA(LCD_DATA9_MARK, PG9MD_010),
+        PINMUX_DATA(LCD_DATA9_PG9_MARK, PG9MD_010),
         PINMUX_DATA(PINT1_PG_MARK, PG9MD_011),
         PINMUX_DATA(TIOC3B_MARK, PG9MD_100),
 
         PINMUX_DATA(PG8_DATA, PG8MD_000),
         PINMUX_DATA(D24_MARK, PG8MD_001),
-        PINMUX_DATA(LCD_DATA8_MARK, PG8MD_010),
+        PINMUX_DATA(LCD_DATA8_PG8_MARK, PG8MD_010),
         PINMUX_DATA(PINT0_PG_MARK, PG8MD_011),
         PINMUX_DATA(TIOC3A_MARK, PG8MD_100),
 
         PINMUX_DATA(PG7_DATA, PG7MD_000),
         PINMUX_DATA(D23_MARK, PG7MD_001),
-        PINMUX_DATA(LCD_DATA7_MARK, PG7MD_010),
+        PINMUX_DATA(LCD_DATA7_PG7_MARK, PG7MD_010),
         PINMUX_DATA(IRQ7_PG_MARK, PG7MD_011),
         PINMUX_DATA(TIOC2B_MARK, PG7MD_100),
 
         PINMUX_DATA(PG6_DATA, PG6MD_000),
         PINMUX_DATA(D22_MARK, PG6MD_001),
-        PINMUX_DATA(LCD_DATA6_MARK, PG6MD_010),
+        PINMUX_DATA(LCD_DATA6_PG6_MARK, PG6MD_010),
         PINMUX_DATA(IRQ6_PG_MARK, PG6MD_011),
         PINMUX_DATA(TIOC2A_MARK, PG6MD_100),
 
         PINMUX_DATA(PG5_DATA, PG5MD_000),
         PINMUX_DATA(D21_MARK, PG5MD_001),
-        PINMUX_DATA(LCD_DATA5_MARK, PG5MD_010),
+        PINMUX_DATA(LCD_DATA5_PG5_MARK, PG5MD_010),
         PINMUX_DATA(IRQ5_PG_MARK, PG5MD_011),
         PINMUX_DATA(TIOC1B_MARK, PG5MD_100),
 
         PINMUX_DATA(PG4_DATA, PG4MD_000),
         PINMUX_DATA(D20_MARK, PG4MD_001),
-        PINMUX_DATA(LCD_DATA4_MARK, PG4MD_010),
+        PINMUX_DATA(LCD_DATA4_PG4_MARK, PG4MD_010),
         PINMUX_DATA(IRQ4_PG_MARK, PG4MD_011),
         PINMUX_DATA(TIOC1A_MARK, PG4MD_100),
 
         PINMUX_DATA(PG3_DATA, PG3MD_000),
         PINMUX_DATA(D19_MARK, PG3MD_001),
-        PINMUX_DATA(LCD_DATA3_MARK, PG3MD_010),
+        PINMUX_DATA(LCD_DATA3_PG3_MARK, PG3MD_010),
         PINMUX_DATA(IRQ3_PG_MARK, PG3MD_011),
         PINMUX_DATA(TIOC0D_MARK, PG3MD_100),
 
         PINMUX_DATA(PG2_DATA, PG2MD_000),
         PINMUX_DATA(D18_MARK, PG2MD_001),
-        PINMUX_DATA(LCD_DATA2_MARK, PG2MD_010),
+        PINMUX_DATA(LCD_DATA2_PG2_MARK, PG2MD_010),
         PINMUX_DATA(IRQ2_PG_MARK, PG2MD_011),
         PINMUX_DATA(TIOC0C_MARK, PG2MD_100),
 
         PINMUX_DATA(PG1_DATA, PG1MD_000),
         PINMUX_DATA(D17_MARK, PG1MD_001),
-        PINMUX_DATA(LCD_DATA1_MARK, PG1MD_010),
+        PINMUX_DATA(LCD_DATA1_PG1_MARK, PG1MD_010),
         PINMUX_DATA(IRQ1_PG_MARK, PG1MD_011),
         PINMUX_DATA(TIOC0B_MARK, PG1MD_100),
 
         PINMUX_DATA(PG0_DATA, PG0MD_000),
         PINMUX_DATA(D16_MARK, PG0MD_001),
-        PINMUX_DATA(LCD_DATA0_MARK, PG0MD_010),
+        PINMUX_DATA(LCD_DATA0_PG0_MARK, PG0MD_010),
         PINMUX_DATA(IRQ0_PG_MARK, PG0MD_011),
         PINMUX_DATA(TIOC0A_MARK, PG0MD_100),
 
@@ -1275,14 +1289,14 @@ static pinmux_enum_t pinmux_data[] = {
 
         PINMUX_DATA(PJ23_DATA, PJ23MD_000),
         PINMUX_DATA(DV_DATA23_MARK, PJ23MD_001),
-        PINMUX_DATA(LCD_DATA23_MARK, PJ23MD_010),
+        PINMUX_DATA(LCD_DATA23_PJ23_MARK, PJ23MD_010),
         PINMUX_DATA(LCD_TCON6_MARK, PJ23MD_011),
         PINMUX_DATA(IRQ3_PJ_MARK, PJ23MD_100),
         PINMUX_DATA(CTX1_MARK, PJ23MD_101),
 
         PINMUX_DATA(PJ22_DATA, PJ22MD_000),
         PINMUX_DATA(DV_DATA22_MARK, PJ22MD_001),
-        PINMUX_DATA(LCD_DATA22_MARK, PJ22MD_010),
+        PINMUX_DATA(LCD_DATA22_PJ22_MARK, PJ22MD_010),
         PINMUX_DATA(LCD_TCON5_MARK, PJ22MD_011),
         PINMUX_DATA(IRQ2_PJ_MARK, PJ22MD_100),
         PINMUX_DATA(CRX1_MARK, PJ22MD_101),
@@ -1290,14 +1304,14 @@ static pinmux_enum_t pinmux_data[] = {
 
         PINMUX_DATA(PJ21_DATA, PJ21MD_000),
         PINMUX_DATA(DV_DATA21_MARK, PJ21MD_001),
-        PINMUX_DATA(LCD_DATA21_MARK, PJ21MD_010),
+        PINMUX_DATA(LCD_DATA21_PJ21_MARK, PJ21MD_010),
         PINMUX_DATA(LCD_TCON4_MARK, PJ21MD_011),
         PINMUX_DATA(IRQ1_PJ_MARK, PJ21MD_100),
         PINMUX_DATA(CTX2_MARK, PJ21MD_101),
 
         PINMUX_DATA(PJ20_DATA, PJ20MD_000),
         PINMUX_DATA(DV_DATA20_MARK, PJ20MD_001),
-        PINMUX_DATA(LCD_DATA20_MARK, PJ20MD_010),
+        PINMUX_DATA(LCD_DATA20_PJ20_MARK, PJ20MD_010),
         PINMUX_DATA(LCD_TCON3_MARK, PJ20MD_011),
         PINMUX_DATA(IRQ0_PJ_MARK, PJ20MD_100),
         PINMUX_DATA(CRX2_MARK, PJ20MD_101),
@@ -1305,7 +1319,7 @@ static pinmux_enum_t pinmux_data[] = {
 
         PINMUX_DATA(PJ19_DATA, PJ19MD_000),
         PINMUX_DATA(DV_DATA19_MARK, PJ19MD_001),
-        PINMUX_DATA(LCD_DATA19_MARK, PJ19MD_010),
+        PINMUX_DATA(LCD_DATA19_PJ19_MARK, PJ19MD_010),
         PINMUX_DATA(MISO0_PJ19_MARK, PJ19MD_011),
         PINMUX_DATA(TIOC0D_MARK, PJ19MD_100),
         PINMUX_DATA(SIOFRXD_MARK, PJ19MD_101),
@@ -1313,126 +1327,126 @@ static pinmux_enum_t pinmux_data[] = {
 
         PINMUX_DATA(PJ18_DATA, PJ18MD_000),
         PINMUX_DATA(DV_DATA18_MARK, PJ18MD_001),
-        PINMUX_DATA(LCD_DATA18_MARK, PJ18MD_010),
+        PINMUX_DATA(LCD_DATA18_PJ18_MARK, PJ18MD_010),
         PINMUX_DATA(MOSI0_PJ18_MARK, PJ18MD_011),
         PINMUX_DATA(TIOC0C_MARK, PJ18MD_100),
         PINMUX_DATA(SIOFTXD_MARK, PJ18MD_101),
 
         PINMUX_DATA(PJ17_DATA, PJ17MD_000),
         PINMUX_DATA(DV_DATA17_MARK, PJ17MD_001),
-        PINMUX_DATA(LCD_DATA17_MARK, PJ17MD_010),
+        PINMUX_DATA(LCD_DATA17_PJ17_MARK, PJ17MD_010),
         PINMUX_DATA(SSL00_PJ17_MARK, PJ17MD_011),
         PINMUX_DATA(TIOC0B_MARK, PJ17MD_100),
         PINMUX_DATA(SIOFSYNC_MARK, PJ17MD_101),
 
         PINMUX_DATA(PJ16_DATA, PJ16MD_000),
         PINMUX_DATA(DV_DATA16_MARK, PJ16MD_001),
-        PINMUX_DATA(LCD_DATA16_MARK, PJ16MD_010),
+        PINMUX_DATA(LCD_DATA16_PJ16_MARK, PJ16MD_010),
         PINMUX_DATA(RSPCK0_PJ16_MARK, PJ16MD_011),
         PINMUX_DATA(TIOC0A_MARK, PJ16MD_100),
         PINMUX_DATA(SIOFSCK_MARK, PJ16MD_101),
 
         PINMUX_DATA(PJ15_DATA, PJ15MD_000),
         PINMUX_DATA(DV_DATA15_MARK, PJ15MD_001),
-        PINMUX_DATA(LCD_DATA15_MARK, PJ15MD_010),
+        PINMUX_DATA(LCD_DATA15_PJ15_MARK, PJ15MD_010),
         PINMUX_DATA(PINT7_PJ_MARK, PJ15MD_011),
         PINMUX_DATA(PWM2H_MARK, PJ15MD_100),
         PINMUX_DATA(TXD7_MARK, PJ15MD_101),
 
         PINMUX_DATA(PJ14_DATA, PJ14MD_000),
         PINMUX_DATA(DV_DATA14_MARK, PJ14MD_001),
-        PINMUX_DATA(LCD_DATA14_MARK, PJ14MD_010),
+        PINMUX_DATA(LCD_DATA14_PJ14_MARK, PJ14MD_010),
         PINMUX_DATA(PINT6_PJ_MARK, PJ14MD_011),
         PINMUX_DATA(PWM2G_MARK, PJ14MD_100),
         PINMUX_DATA(TXD6_MARK, PJ14MD_101),
 
         PINMUX_DATA(PJ13_DATA, PJ13MD_000),
         PINMUX_DATA(DV_DATA13_MARK, PJ13MD_001),
-        PINMUX_DATA(LCD_DATA13_MARK, PJ13MD_010),
+        PINMUX_DATA(LCD_DATA13_PJ13_MARK, PJ13MD_010),
         PINMUX_DATA(PINT5_PJ_MARK, PJ13MD_011),
         PINMUX_DATA(PWM2F_MARK, PJ13MD_100),
         PINMUX_DATA(TXD5_MARK, PJ13MD_101),
 
         PINMUX_DATA(PJ12_DATA, PJ12MD_000),
         PINMUX_DATA(DV_DATA12_MARK, PJ12MD_001),
-        PINMUX_DATA(LCD_DATA12_MARK, PJ12MD_010),
+        PINMUX_DATA(LCD_DATA12_PJ12_MARK, PJ12MD_010),
         PINMUX_DATA(PINT4_PJ_MARK, PJ12MD_011),
         PINMUX_DATA(PWM2E_MARK, PJ12MD_100),
         PINMUX_DATA(SCK7_MARK, PJ12MD_101),
 
         PINMUX_DATA(PJ11_DATA, PJ11MD_000),
         PINMUX_DATA(DV_DATA11_MARK, PJ11MD_001),
-        PINMUX_DATA(LCD_DATA11_MARK, PJ11MD_010),
+        PINMUX_DATA(LCD_DATA11_PJ11_MARK, PJ11MD_010),
         PINMUX_DATA(PINT3_PJ_MARK, PJ11MD_011),
         PINMUX_DATA(PWM2D_MARK, PJ11MD_100),
         PINMUX_DATA(SCK6_MARK, PJ11MD_101),
 
         PINMUX_DATA(PJ10_DATA, PJ10MD_000),
         PINMUX_DATA(DV_DATA10_MARK, PJ10MD_001),
-        PINMUX_DATA(LCD_DATA10_MARK, PJ10MD_010),
+        PINMUX_DATA(LCD_DATA10_PJ10_MARK, PJ10MD_010),
         PINMUX_DATA(PINT2_PJ_MARK, PJ10MD_011),
         PINMUX_DATA(PWM2C_MARK, PJ10MD_100),
         PINMUX_DATA(SCK5_MARK, PJ10MD_101),
 
         PINMUX_DATA(PJ9_DATA, PJ9MD_000),
         PINMUX_DATA(DV_DATA9_MARK, PJ9MD_001),
-        PINMUX_DATA(LCD_DATA9_MARK, PJ9MD_010),
+        PINMUX_DATA(LCD_DATA9_PJ9_MARK, PJ9MD_010),
         PINMUX_DATA(PINT1_PJ_MARK, PJ9MD_011),
         PINMUX_DATA(PWM2B_MARK, PJ9MD_100),
         PINMUX_DATA(RTS5_MARK, PJ9MD_101),
 
         PINMUX_DATA(PJ8_DATA, PJ8MD_000),
         PINMUX_DATA(DV_DATA8_MARK, PJ8MD_001),
-        PINMUX_DATA(LCD_DATA8_MARK, PJ8MD_010),
+        PINMUX_DATA(LCD_DATA8_PJ8_MARK, PJ8MD_010),
         PINMUX_DATA(PINT0_PJ_MARK, PJ8MD_011),
         PINMUX_DATA(PWM2A_MARK, PJ8MD_100),
         PINMUX_DATA(CTS5_MARK, PJ8MD_101),
 
         PINMUX_DATA(PJ7_DATA, PJ7MD_000),
         PINMUX_DATA(DV_DATA7_MARK, PJ7MD_001),
-        PINMUX_DATA(LCD_DATA7_MARK, PJ7MD_010),
+        PINMUX_DATA(LCD_DATA7_PJ7_MARK, PJ7MD_010),
         PINMUX_DATA(SD_D2_MARK, PJ7MD_011),
         PINMUX_DATA(PWM1H_MARK, PJ7MD_100),
 
         PINMUX_DATA(PJ6_DATA, PJ6MD_000),
         PINMUX_DATA(DV_DATA6_MARK, PJ6MD_001),
-        PINMUX_DATA(LCD_DATA6_MARK, PJ6MD_010),
+        PINMUX_DATA(LCD_DATA6_PJ6_MARK, PJ6MD_010),
         PINMUX_DATA(SD_D3_MARK, PJ6MD_011),
         PINMUX_DATA(PWM1G_MARK, PJ6MD_100),
 
         PINMUX_DATA(PJ5_DATA, PJ5MD_000),
         PINMUX_DATA(DV_DATA5_MARK, PJ5MD_001),
-        PINMUX_DATA(LCD_DATA5_MARK, PJ5MD_010),
+        PINMUX_DATA(LCD_DATA5_PJ5_MARK, PJ5MD_010),
         PINMUX_DATA(SD_CMD_MARK, PJ5MD_011),
         PINMUX_DATA(PWM1F_MARK, PJ5MD_100),
 
         PINMUX_DATA(PJ4_DATA, PJ4MD_000),
         PINMUX_DATA(DV_DATA4_MARK, PJ4MD_001),
-        PINMUX_DATA(LCD_DATA4_MARK, PJ4MD_010),
+        PINMUX_DATA(LCD_DATA4_PJ4_MARK, PJ4MD_010),
         PINMUX_DATA(SD_CLK_MARK, PJ4MD_011),
         PINMUX_DATA(PWM1E_MARK, PJ4MD_100),
 
         PINMUX_DATA(PJ3_DATA, PJ3MD_000),
         PINMUX_DATA(DV_DATA3_MARK, PJ3MD_001),
-        PINMUX_DATA(LCD_DATA3_MARK, PJ3MD_010),
+        PINMUX_DATA(LCD_DATA3_PJ3_MARK, PJ3MD_010),
         PINMUX_DATA(SD_D0_MARK, PJ3MD_011),
         PINMUX_DATA(PWM1D_MARK, PJ3MD_100),
 
         PINMUX_DATA(PJ2_DATA, PJ2MD_000),
         PINMUX_DATA(DV_DATA2_MARK, PJ2MD_001),
-        PINMUX_DATA(LCD_DATA2_MARK, PJ2MD_010),
+        PINMUX_DATA(LCD_DATA2_PJ2_MARK, PJ2MD_010),
         PINMUX_DATA(SD_D1_MARK, PJ2MD_011),
         PINMUX_DATA(PWM1C_MARK, PJ2MD_100),
 
         PINMUX_DATA(PJ1_DATA, PJ1MD_000),
         PINMUX_DATA(DV_DATA1_MARK, PJ1MD_001),
-        PINMUX_DATA(LCD_DATA1_MARK, PJ1MD_010),
+        PINMUX_DATA(LCD_DATA1_PJ1_MARK, PJ1MD_010),
         PINMUX_DATA(SD_WP_MARK, PJ1MD_011),
         PINMUX_DATA(PWM1B_MARK, PJ1MD_100),
 
         PINMUX_DATA(PJ0_DATA, PJ0MD_000),
         PINMUX_DATA(DV_DATA0_MARK, PJ0MD_001),
-        PINMUX_DATA(LCD_DATA0_MARK, PJ0MD_010),
+        PINMUX_DATA(LCD_DATA0_PJ0_MARK, PJ0MD_010),
         PINMUX_DATA(SD_CD_MARK, PJ0MD_011),
         PINMUX_DATA(PWM1A_MARK, PJ0MD_100),
 };
@@ -1877,30 +1891,55 @@ static struct pinmux_gpio pinmux_gpios[] = {
         PINMUX_GPIO(GPIO_FN_LCD_HSYNC, LCD_HSYNC_MARK),
         PINMUX_GPIO(GPIO_FN_LCD_DE, LCD_DE_MARK),
 
-        PINMUX_GPIO(GPIO_FN_LCD_DATA23, LCD_DATA23_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA22, LCD_DATA22_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA21, LCD_DATA21_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA20, LCD_DATA20_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA19, LCD_DATA19_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA18, LCD_DATA18_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA17, LCD_DATA17_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA16, LCD_DATA16_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA15, LCD_DATA15_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA14, LCD_DATA14_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA13, LCD_DATA13_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA12, LCD_DATA12_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA11, LCD_DATA11_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA10, LCD_DATA10_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA9, LCD_DATA9_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA8, LCD_DATA8_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA7, LCD_DATA7_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA6, LCD_DATA6_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA5, LCD_DATA5_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA4, LCD_DATA4_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA3, LCD_DATA3_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA2, LCD_DATA2_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA1, LCD_DATA1_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA0, LCD_DATA0_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA23_PG23, LCD_DATA23_PG23_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA22_PG22, LCD_DATA22_PG22_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA21_PG21, LCD_DATA21_PG21_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA20_PG20, LCD_DATA20_PG20_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA19_PG19, LCD_DATA19_PG19_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA18_PG18, LCD_DATA18_PG18_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA17_PG17, LCD_DATA17_PG17_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA16_PG16, LCD_DATA16_PG16_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA15_PG15, LCD_DATA15_PG15_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA14_PG14, LCD_DATA14_PG14_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA13_PG13, LCD_DATA13_PG13_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA12_PG12, LCD_DATA12_PG12_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA11_PG11, LCD_DATA11_PG11_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA10_PG10, LCD_DATA10_PG10_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA9_PG9, LCD_DATA9_PG9_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA8_PG8, LCD_DATA8_PG8_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA7_PG7, LCD_DATA7_PG7_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA6_PG6, LCD_DATA6_PG6_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA5_PG5, LCD_DATA5_PG5_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA4_PG4, LCD_DATA4_PG4_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA3_PG3, LCD_DATA3_PG3_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA2_PG2, LCD_DATA2_PG2_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA1_PG1, LCD_DATA1_PG1_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA0_PG0, LCD_DATA0_PG0_MARK),
+
+        PINMUX_GPIO(GPIO_FN_LCD_DATA23_PJ23, LCD_DATA23_PJ23_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA22_PJ22, LCD_DATA22_PJ22_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA21_PJ21, LCD_DATA21_PJ21_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA20_PJ20, LCD_DATA20_PJ20_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA19_PJ19, LCD_DATA19_PJ19_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA18_PJ18, LCD_DATA18_PJ18_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA17_PJ17, LCD_DATA17_PJ17_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA16_PJ16, LCD_DATA16_PJ16_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA15_PJ15, LCD_DATA15_PJ15_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA14_PJ14, LCD_DATA14_PJ14_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA13_PJ13, LCD_DATA13_PJ13_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA12_PJ12, LCD_DATA12_PJ12_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA11_PJ11, LCD_DATA11_PJ11_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA10_PJ10, LCD_DATA10_PJ10_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA9_PJ9, LCD_DATA9_PJ9_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA8_PJ8, LCD_DATA8_PJ8_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA7_PJ7, LCD_DATA7_PJ7_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA6_PJ6, LCD_DATA6_PJ6_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA5_PJ5, LCD_DATA5_PJ5_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA4_PJ4, LCD_DATA4_PJ4_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA3_PJ3, LCD_DATA3_PJ3_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA2_PJ2, LCD_DATA2_PJ2_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA1_PJ1, LCD_DATA1_PJ1_MARK),
+        PINMUX_GPIO(GPIO_FN_LCD_DATA0_PJ0, LCD_DATA0_PJ0_MARK),
 
         PINMUX_GPIO(GPIO_FN_LCD_M_DISP, LCD_M_DISP_MARK),
 };
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index 7b57bf1dc855..ebe7a7d97215 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -273,7 +273,7 @@ void __init setup_arch(char **cmdline_p)
         data_resource.start = virt_to_phys(_etext);
         data_resource.end = virt_to_phys(_edata)-1;
         bss_resource.start = virt_to_phys(__bss_start);
-        bss_resource.end = virt_to_phys(_ebss)-1;
+        bss_resource.end = virt_to_phys(__bss_stop)-1;
 
 #ifdef CONFIG_CMDLINE_OVERWRITE
         strlcpy(command_line, CONFIG_CMDLINE, sizeof(command_line));
diff --git a/arch/sh/kernel/sh_ksyms_32.c b/arch/sh/kernel/sh_ksyms_32.c
index 3896f26efa4a..2a0a596ebf67 100644
--- a/arch/sh/kernel/sh_ksyms_32.c
+++ b/arch/sh/kernel/sh_ksyms_32.c
@@ -19,7 +19,6 @@ EXPORT_SYMBOL(csum_partial);
 EXPORT_SYMBOL(csum_partial_copy_generic);
 EXPORT_SYMBOL(copy_page);
 EXPORT_SYMBOL(__clear_user);
-EXPORT_SYMBOL(_ebss);
 EXPORT_SYMBOL(empty_zero_page);
 
 #define DECLARE_EXPORT(name)            \
diff --git a/arch/sh/kernel/vmlinux.lds.S b/arch/sh/kernel/vmlinux.lds.S
index c98905f71e28..db88cbf9eafd 100644
--- a/arch/sh/kernel/vmlinux.lds.S
+++ b/arch/sh/kernel/vmlinux.lds.S
@@ -78,7 +78,6 @@ SECTIONS
         . = ALIGN(PAGE_SIZE);
         __init_end = .;
         BSS_SECTION(0, PAGE_SIZE, 4)
-        _ebss = .;                      /* uClinux MTD sucks */
         _end = . ;
 
         STABS_DEBUG
diff --git a/arch/sh/lib/mcount.S b/arch/sh/lib/mcount.S
index 84a57761f17e..60164e65d665 100644
--- a/arch/sh/lib/mcount.S
+++ b/arch/sh/lib/mcount.S
@@ -39,7 +39,7 @@
  *
  * Make sure the stack pointer contains a valid address. Valid
  * addresses for kernel stacks are anywhere after the bss
- * (after _ebss) and anywhere in init_thread_union (init_stack).
+ * (after __bss_stop) and anywhere in init_thread_union (init_stack).
  */
 #define STACK_CHECK()                                   \
         mov     #(THREAD_SIZE >> 10), r0;               \
@@ -60,7 +60,7 @@
         cmp/hi  r2, r1;                                 \
         bf      stack_panic;                            \
                                                         \
-        /* If sp > _ebss then we're OK. */              \
+        /* If sp > __bss_stop then we're OK. */         \
         mov.l   .L_ebss, r1;                            \
         cmp/hi  r1, r15;                                \
         bt      1f;                                     \
@@ -70,7 +70,7 @@
         cmp/hs  r1, r15;                                \
         bf      stack_panic;                            \
                                                         \
-        /* If sp > init_stack && sp < _ebss, not OK. */ \
+        /* If sp > init_stack && sp < __bss_stop, not OK. */    \
         add     r0, r1;                                 \
         cmp/hs  r1, r15;                                \
         bt      stack_panic;                            \
@@ -292,8 +292,6 @@ stack_panic:
          nop
 
         .align 2
-.L_ebss:
-        .long   _ebss
 .L_init_thread_union:
         .long   init_thread_union
 .Lpanic:
diff --git a/arch/sparc/kernel/sys_sparc_64.c b/arch/sparc/kernel/sys_sparc_64.c
index 0dc1f5786081..11c6c9603e71 100644
--- a/arch/sparc/kernel/sys_sparc_64.c
+++ b/arch/sparc/kernel/sys_sparc_64.c
@@ -502,12 +502,12 @@ SYSCALL_DEFINE1(sparc64_personality, unsigned long, personality)
 {
         int ret;
 
-        if (current->personality == PER_LINUX32 &&
-            personality == PER_LINUX)
-                personality = PER_LINUX32;
+        if (personality(current->personality) == PER_LINUX32 &&
+            personality(personality) == PER_LINUX)
+                personality |= PER_LINUX32;
         ret = sys_personality(personality);
-        if (ret == PER_LINUX32)
-                ret = PER_LINUX;
+        if (personality(ret) == PER_LINUX32)
+                ret &= ~PER_LINUX32;
 
         return ret;
 }
diff --git a/arch/sparc/mm/init_64.c b/arch/sparc/mm/init_64.c
index 6026fdd1b2ed..d58edf5fefdb 100644
--- a/arch/sparc/mm/init_64.c
+++ b/arch/sparc/mm/init_64.c
@@ -2020,6 +2020,9 @@ EXPORT_SYMBOL(_PAGE_CACHE);
 #ifdef CONFIG_SPARSEMEM_VMEMMAP
 unsigned long vmemmap_table[VMEMMAP_SIZE];
 
+static long __meminitdata addr_start, addr_end;
+static int __meminitdata node_start;
+
 int __meminit vmemmap_populate(struct page *start, unsigned long nr, int node)
 {
         unsigned long vstart = (unsigned long) start;
@@ -2050,15 +2053,30 @@ int __meminit vmemmap_populate(struct page *start, unsigned long nr, int node)
 
                         *vmem_pp = pte_base | __pa(block);
 
-                        printk(KERN_INFO "[%p-%p] page_structs=%lu "
-                               "node=%d entry=%lu/%lu\n", start, block, nr,
-                               node,
-                               addr >> VMEMMAP_CHUNK_SHIFT,
-                               VMEMMAP_SIZE);
+                        /* check to see if we have contiguous blocks */
+                        if (addr_end != addr || node_start != node) {
+                                if (addr_start)
+                                        printk(KERN_DEBUG " [%lx-%lx] on node %d\n",
+                                               addr_start, addr_end-1, node_start);
+                                addr_start = addr;
+                                node_start = node;
+                        }
+                        addr_end = addr + VMEMMAP_CHUNK;
                 }
         }
         return 0;
 }
+
+void __meminit vmemmap_populate_print_last(void)
+{
+        if (addr_start) {
+                printk(KERN_DEBUG " [%lx-%lx] on node %d\n",
+                       addr_start, addr_end-1, node_start);
+                addr_start = 0;
+                addr_end = 0;
+                node_start = 0;
+        }
+}
 #endif /* CONFIG_SPARSEMEM_VMEMMAP */
 
 static void prot_init_common(unsigned long page_none,
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index ba2657c49217..8ec3a1aa4abd 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -1527,7 +1527,7 @@ config SECCOMP
           If unsure, say Y. Only embedded should say N here.
 
 config CC_STACKPROTECTOR
-        bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
+        bool "Enable -fstack-protector buffer overflow detection"
         ---help---
           This option turns on the -fstack-protector GCC feature. This
           feature puts, at the beginning of functions, a canary value on
diff --git a/arch/x86/Makefile b/arch/x86/Makefile
index b0c5276861ec..682e9c210baa 100644
--- a/arch/x86/Makefile
+++ b/arch/x86/Makefile
@@ -27,6 +27,10 @@ ifeq ($(CONFIG_X86_32),y)
 
         KBUILD_CFLAGS += -msoft-float -mregparm=3 -freg-struct-return
 
+        # Never want PIC in a 32-bit kernel, prevent breakage with GCC built
+        # with nonstandard options
+        KBUILD_CFLAGS += -fno-pic
+
         # prevent gcc from keeping the stack 16 byte aligned
         KBUILD_CFLAGS += $(call cc-option,-mpreferred-stack-boundary=2)
 
diff --git a/arch/x86/boot/Makefile b/arch/x86/boot/Makefile
index 5a747dd884db..f7535bedc33f 100644
--- a/arch/x86/boot/Makefile
+++ b/arch/x86/boot/Makefile
@@ -57,7 +57,7 @@ KBUILD_CFLAGS	:= $(LINUXINCLUDE) -g -Os -D_SETUP -D__KERNEL__ \
                    -Wall -Wstrict-prototypes \
                    -march=i386 -mregparm=3 \
                    -include $(srctree)/$(src)/code16gcc.h \
-                   -fno-strict-aliasing -fomit-frame-pointer \
+                   -fno-strict-aliasing -fomit-frame-pointer -fno-pic \
                    $(call cc-option, -ffreestanding) \
                    $(call cc-option, -fno-toplevel-reorder,\
                         $(call cc-option, -fno-unit-at-a-time)) \
diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
index 441520e4174f..a3ac52b29cbf 100644
--- a/arch/x86/include/asm/mce.h
+++ b/arch/x86/include/asm/mce.h
@@ -33,6 +33,14 @@
 #define MCI_STATUS_PCC   (1ULL<<57)  /* processor context corrupt */
 #define MCI_STATUS_S     (1ULL<<56)  /* Signaled machine check */
 #define MCI_STATUS_AR    (1ULL<<55)  /* Action required */
+#define MCACOD            0xffff     /* MCA Error Code */
+
+/* Architecturally defined codes from SDM Vol. 3B Chapter 15 */
+#define MCACOD_SCRUB    0x00C0  /* 0xC0-0xCF Memory Scrubbing */
+#define MCACOD_SCRUBMSK 0xfff0
+#define MCACOD_L3WB     0x017A  /* L3 Explicit Writeback */
+#define MCACOD_DATA     0x0134  /* Data Load */
+#define MCACOD_INSTR    0x0150  /* Instruction Fetch */
 
 /* MCi_MISC register defines */
 #define MCI_MISC_ADDR_LSB(m)    ((m) & 0x3f)
diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h
index dab39350e51e..cb4e43bce98a 100644
--- a/arch/x86/include/asm/perf_event.h
+++ b/arch/x86/include/asm/perf_event.h
@@ -196,11 +196,16 @@ static inline u32 get_ibs_caps(void) { return 0; }
 extern void perf_events_lapic_init(void);
 
 /*
- * Abuse bit 3 of the cpu eflags register to indicate proper PEBS IP fixups.
- * This flag is otherwise unused and ABI specified to be 0, so nobody should
- * care what we do with it.
+ * Abuse bits {3,5} of the cpu eflags register. These flags are otherwise
+ * unused and ABI specified to be 0, so nobody should care what we do with
+ * them.
+ *
+ * EXACT - the IP points to the exact instruction that triggered the
+ *         event (HW bugs exempt).
+ * VM    - original X86_VM_MASK; see set_linear_ip().
  */
 #define PERF_EFLAGS_EXACT       (1UL << 3)
+#define PERF_EFLAGS_VM          (1UL << 5)
 
 struct pt_regs;
 extern unsigned long perf_instruction_pointer(struct pt_regs *regs);
diff --git a/arch/x86/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep.c
index 95bf99de9058..1b8e5a03d942 100644
--- a/arch/x86/kernel/acpi/sleep.c
+++ b/arch/x86/kernel/acpi/sleep.c
@@ -25,10 +25,6 @@ unsigned long acpi_realmode_flags;
 static char temp_stack[4096];
 #endif
 
-asmlinkage void acpi_enter_s3(void)
-{
-        acpi_enter_sleep_state(3, wake_sleep_flags);
-}
 /**
  * acpi_suspend_lowlevel - save kernel state
  *
diff --git a/arch/x86/kernel/acpi/sleep.h b/arch/x86/kernel/acpi/sleep.h
index 5653a5791ec9..67f59f8c6956 100644
--- a/arch/x86/kernel/acpi/sleep.h
+++ b/arch/x86/kernel/acpi/sleep.h
@@ -2,7 +2,6 @@
  *      Variables and functions used by the code in sleep.c
  */
 
-#include <linux/linkage.h>
 #include <asm/realmode.h>
 
 extern unsigned long saved_video_mode;
@@ -11,7 +10,6 @@ extern long saved_magic;
 extern int wakeup_pmode_return;
 
 extern u8 wake_sleep_flags;
-extern asmlinkage void acpi_enter_s3(void);
 
 extern unsigned long acpi_copy_wakeup_routine(unsigned long);
 extern void wakeup_long64(void);
diff --git a/arch/x86/kernel/acpi/wakeup_32.S b/arch/x86/kernel/acpi/wakeup_32.S
index 72610839f03b..13ab720573e3 100644
--- a/arch/x86/kernel/acpi/wakeup_32.S
+++ b/arch/x86/kernel/acpi/wakeup_32.S
@@ -74,7 +74,9 @@ restore_registers:
 ENTRY(do_suspend_lowlevel)
         call    save_processor_state
         call    save_registers
-        call    acpi_enter_s3
+        pushl   $3
+        call    acpi_enter_sleep_state
+        addl    $4, %esp
 
 #       In case of S3 failure, we'll emerge here.  Jump
 #       to ret_point to recover
diff --git a/arch/x86/kernel/acpi/wakeup_64.S b/arch/x86/kernel/acpi/wakeup_64.S
index 014d1d28c397..8ea5164cbd04 100644
--- a/arch/x86/kernel/acpi/wakeup_64.S
+++ b/arch/x86/kernel/acpi/wakeup_64.S
@@ -71,7 +71,9 @@ ENTRY(do_suspend_lowlevel)
         movq    %rsi, saved_rsi
 
         addq    $8, %rsp
-        call    acpi_enter_s3
+        movl    $3, %edi
+        xorl    %eax, %eax
+        call    acpi_enter_sleep_state
         /* in case something went wrong, restore the machine status and go on */
         jmp     resume_point
 
diff --git a/arch/x86/kernel/alternative.c b/arch/x86/kernel/alternative.c
index 931280ff8299..afb7ff79a29f 100644
--- a/arch/x86/kernel/alternative.c
+++ b/arch/x86/kernel/alternative.c
@@ -224,7 +224,7 @@ void __init arch_init_ideal_nops(void)
                         ideal_nops = intel_nops;
 #endif
                 }
-
+                break;
         default:
 #ifdef CONFIG_X86_64
                 ideal_nops = k8_nops;
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 406eee784684..c265593ec2cd 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -1204,7 +1204,7 @@ static void __clear_irq_vector(int irq, struct irq_cfg *cfg)
         BUG_ON(!cfg->vector);
 
         vector = cfg->vector;
-        for_each_cpu(cpu, cfg->domain)
+        for_each_cpu_and(cpu, cfg->domain, cpu_online_mask)
                 per_cpu(vector_irq, cpu)[vector] = -1;
 
         cfg->vector = 0;
@@ -1212,7 +1212,7 @@ static void __clear_irq_vector(int irq, struct irq_cfg *cfg)
 
         if (likely(!cfg->move_in_progress))
                 return;
-        for_each_cpu(cpu, cfg->old_domain) {
+        for_each_cpu_and(cpu, cfg->old_domain, cpu_online_mask) {
                 for (vector = FIRST_EXTERNAL_VECTOR; vector < NR_VECTORS;
                                                                 vector++) {
                         if (per_cpu(vector_irq, cpu)[vector] != irq)
@@ -1356,6 +1356,16 @@ static void setup_ioapic_irq(unsigned int irq, struct irq_cfg *cfg,
         if (!IO_APIC_IRQ(irq))
                 return;
 
+        /*
+         * For legacy irqs, cfg->domain starts with cpu 0. Now that IO-APIC
+         * can handle this irq and the apic driver is finialized at this point,
+         * update the cfg->domain.
+         */
+        if (irq < legacy_pic->nr_legacy_irqs &&
+            cpumask_equal(cfg->domain, cpumask_of(0)))
+                apic->vector_allocation_domain(0, cfg->domain,
+                                               apic->target_cpus());
+
         if (assign_irq_vector(irq, cfg, apic->target_cpus()))
                 return;
 
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 46d8786d655e..a5fbc3c5fccc 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -144,6 +144,8 @@ static int __init x86_xsave_setup(char *s)
 {
         setup_clear_cpu_cap(X86_FEATURE_XSAVE);
         setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
+        setup_clear_cpu_cap(X86_FEATURE_AVX);
+        setup_clear_cpu_cap(X86_FEATURE_AVX2);
         return 1;
 }
 __setup("noxsave", x86_xsave_setup);
diff --git a/arch/x86/kernel/cpu/mcheck/mce-severity.c b/arch/x86/kernel/cpu/mcheck/mce-severity.c
index 413c2ced887c..13017626f9a8 100644
--- a/arch/x86/kernel/cpu/mcheck/mce-severity.c
+++ b/arch/x86/kernel/cpu/mcheck/mce-severity.c
@@ -55,13 +55,6 @@ static struct severity {
 #define MCI_UC_S (MCI_STATUS_UC|MCI_STATUS_S)
 #define MCI_UC_SAR (MCI_STATUS_UC|MCI_STATUS_S|MCI_STATUS_AR)
 #define MCI_ADDR (MCI_STATUS_ADDRV|MCI_STATUS_MISCV)
-#define MCACOD 0xffff
-/* Architecturally defined codes from SDM Vol. 3B Chapter 15 */
-#define MCACOD_SCRUB    0x00C0  /* 0xC0-0xCF Memory Scrubbing */
-#define MCACOD_SCRUBMSK 0xfff0
-#define MCACOD_L3WB     0x017A  /* L3 Explicit Writeback */
-#define MCACOD_DATA     0x0134  /* Data Load */
-#define MCACOD_INSTR    0x0150  /* Instruction Fetch */
 
         MCESEV(
                 NO, "Invalid",
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 5e095f873e3e..292d0258311c 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -103,6 +103,8 @@ DEFINE_PER_CPU(mce_banks_t, mce_poll_banks) = {
 
 static DEFINE_PER_CPU(struct work_struct, mce_work);
 
+static void (*quirk_no_way_out)(int bank, struct mce *m, struct pt_regs *regs);
+
 /*
  * CPU/chipset specific EDAC code can register a notifier call here to print
  * MCE errors in a human-readable form.
@@ -650,14 +652,18 @@ EXPORT_SYMBOL_GPL(machine_check_poll);
  * Do a quick check if any of the events requires a panic.
  * This decides if we keep the events around or clear them.
  */
-static int mce_no_way_out(struct mce *m, char **msg, unsigned long *validp)
+static int mce_no_way_out(struct mce *m, char **msg, unsigned long *validp,
+                          struct pt_regs *regs)
 {
         int i, ret = 0;
 
         for (i = 0; i < banks; i++) {
                 m->status = mce_rdmsrl(MSR_IA32_MCx_STATUS(i));
-                if (m->status & MCI_STATUS_VAL)
+                if (m->status & MCI_STATUS_VAL) {
                         __set_bit(i, validp);
+                        if (quirk_no_way_out)
+                                quirk_no_way_out(i, m, regs);
+                }
                 if (mce_severity(m, tolerant, msg) >= MCE_PANIC_SEVERITY)
                         ret = 1;
         }
@@ -1040,7 +1046,7 @@ void do_machine_check(struct pt_regs *regs, long error_code)
         *final = m;
 
         memset(valid_banks, 0, sizeof(valid_banks));
-        no_way_out = mce_no_way_out(&m, &msg, valid_banks);
+        no_way_out = mce_no_way_out(&m, &msg, valid_banks, regs);
 
         barrier();
 
@@ -1418,6 +1424,34 @@ static void __mcheck_cpu_init_generic(void)
         }
 }
 
+/*
+ * During IFU recovery Sandy Bridge -EP4S processors set the RIPV and
+ * EIPV bits in MCG_STATUS to zero on the affected logical processor (SDM
+ * Vol 3B Table 15-20). But this confuses both the code that determines
+ * whether the machine check occurred in kernel or user mode, and also
+ * the severity assessment code. Pretend that EIPV was set, and take the
+ * ip/cs values from the pt_regs that mce_gather_info() ignored earlier.
+ */
+static void quirk_sandybridge_ifu(int bank, struct mce *m, struct pt_regs *regs)
+{
+        if (bank != 0)
+                return;
+        if ((m->mcgstatus & (MCG_STATUS_EIPV|MCG_STATUS_RIPV)) != 0)
+                return;
+        if ((m->status & (MCI_STATUS_OVER|MCI_STATUS_UC|
+                          MCI_STATUS_EN|MCI_STATUS_MISCV|MCI_STATUS_ADDRV|
+                          MCI_STATUS_PCC|MCI_STATUS_S|MCI_STATUS_AR|
+                          MCACOD)) !=
+                         (MCI_STATUS_UC|MCI_STATUS_EN|
+                          MCI_STATUS_MISCV|MCI_STATUS_ADDRV|MCI_STATUS_S|
+                          MCI_STATUS_AR|MCACOD_INSTR))
+                return;
+
+        m->mcgstatus |= MCG_STATUS_EIPV;
+        m->ip = regs->ip;
+        m->cs = regs->cs;
+}
+
 /* Add per CPU specific workarounds here */
 static int __cpuinit __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c)
 {
@@ -1515,6 +1549,9 @@ static int __cpuinit __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c)
                  */
                 if (c->x86 == 6 && c->x86_model <= 13 && mce_bootlog < 0)
                         mce_bootlog = 0;
+
+                if (c->x86 == 6 && c->x86_model == 45)
+                        quirk_no_way_out = quirk_sandybridge_ifu;
         }
         if (monarch_timeout < 0)
                 monarch_timeout = 0;
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index 29557aa06dda..915b876edd1e 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -32,6 +32,8 @@
 #include <asm/smp.h>
 #include <asm/alternative.h>
 #include <asm/timer.h>
+#include <asm/desc.h>
+#include <asm/ldt.h>
 
 #include "perf_event.h"
 
@@ -1738,6 +1740,29 @@ valid_user_frame(const void __user *fp, unsigned long size)
         return (__range_not_ok(fp, size, TASK_SIZE) == 0);
 }
 
+static unsigned long get_segment_base(unsigned int segment)
+{
+        struct desc_struct *desc;
+        int idx = segment >> 3;
+
+        if ((segment & SEGMENT_TI_MASK) == SEGMENT_LDT) {
+                if (idx > LDT_ENTRIES)
+                        return 0;
+
+                if (idx > current->active_mm->context.size)
+                        return 0;
+
+                desc = current->active_mm->context.ldt;
+        } else {
+                if (idx > GDT_ENTRIES)
+                        return 0;
+
+                desc = __this_cpu_ptr(&gdt_page.gdt[0]);
+        }
+
+        return get_desc_base(desc + idx);
+}
+
 #ifdef CONFIG_COMPAT
 
 #include <asm/compat.h>
@@ -1746,13 +1771,17 @@ static inline int
 perf_callchain_user32(struct pt_regs *regs, struct perf_callchain_entry *entry)
 {
         /* 32-bit process in 64-bit kernel. */
+        unsigned long ss_base, cs_base;
         struct stack_frame_ia32 frame;
         const void __user *fp;
 
         if (!test_thread_flag(TIF_IA32))
                 return 0;
 
-        fp = compat_ptr(regs->bp);
+        cs_base = get_segment_base(regs->cs);
+        ss_base = get_segment_base(regs->ss);
+
+        fp = compat_ptr(ss_base + regs->bp);
         while (entry->nr < PERF_MAX_STACK_DEPTH) {
                 unsigned long bytes;
                 frame.next_frame     = 0;
@@ -1765,8 +1794,8 @@ perf_callchain_user32(struct pt_regs *regs, struct perf_callchain_entry *entry)
                 if (!valid_user_frame(fp, sizeof(frame)))
                         break;
 
-                perf_callchain_store(entry, frame.return_address);
-                fp = compat_ptr(frame.next_frame);
+                perf_callchain_store(entry, cs_base + frame.return_address);
+                fp = compat_ptr(ss_base + frame.next_frame);
         }
         return 1;
 }
@@ -1789,6 +1818,12 @@ perf_callchain_user(struct perf_callchain_entry *entry, struct pt_regs *regs)
                 return;
         }
 
+        /*
+         * We don't know what to do with VM86 stacks.. ignore them for now.
+         */
+        if (regs->flags & (X86_VM_MASK | PERF_EFLAGS_VM))
+                return;
+
         fp = (void __user *)regs->bp;
 
         perf_callchain_store(entry, regs->ip);
@@ -1816,16 +1851,50 @@ perf_callchain_user(struct perf_callchain_entry *entry, struct pt_regs *regs)
         }
 }
 
-unsigned long perf_instruction_pointer(struct pt_regs *regs)
+/*
+ * Deal with code segment offsets for the various execution modes:
+ *
+ *   VM86 - the good olde 16 bit days, where the linear address is
+ *          20 bits and we use regs->ip + 0x10 * regs->cs.
+ *
+ *   IA32 - Where we need to look at GDT/LDT segment descriptor tables
+ *          to figure out what the 32bit base address is.
+ *
+ *    X32 - has TIF_X32 set, but is running in x86_64
+ *
+ * X86_64 - CS,DS,SS,ES are all zero based.
+ */
+static unsigned long code_segment_base(struct pt_regs *regs)
 {
-        unsigned long ip;
+        /*
+         * If we are in VM86 mode, add the segment offset to convert to a
+         * linear address.
+         */
+        if (regs->flags & X86_VM_MASK)
+                return 0x10 * regs->cs;
+
+        /*
+         * For IA32 we look at the GDT/LDT segment base to convert the
+         * effective IP to a linear address.
+         */
+#ifdef CONFIG_X86_32
+        if (user_mode(regs) && regs->cs != __USER_CS)
+                return get_segment_base(regs->cs);
+#else
+        if (test_thread_flag(TIF_IA32)) {
+                if (user_mode(regs) && regs->cs != __USER32_CS)
+                        return get_segment_base(regs->cs);
+        }
+#endif
+        return 0;
+}
 
+unsigned long perf_instruction_pointer(struct pt_regs *regs)
+{
         if (perf_guest_cbs && perf_guest_cbs->is_in_guest())
-                ip = perf_guest_cbs->get_guest_ip();
-        else
-                ip = instruction_pointer(regs);
+                return perf_guest_cbs->get_guest_ip();
 
-        return ip;
+        return regs->ip + code_segment_base(regs);
 }
 
 unsigned long perf_misc_flags(struct pt_regs *regs)
@@ -1838,7 +1907,7 @@ unsigned long perf_misc_flags(struct pt_regs *regs)
                 else
                         misc |= PERF_RECORD_MISC_GUEST_KERNEL;
         } else {
-                if (!kernel_ip(regs->ip))
+                if (user_mode(regs))
                         misc |= PERF_RECORD_MISC_USER;
                 else
                         misc |= PERF_RECORD_MISC_KERNEL;
diff --git a/arch/x86/kernel/cpu/perf_event.h b/arch/x86/kernel/cpu/perf_event.h
index 821d53b696d1..6605a81ba339 100644
--- a/arch/x86/kernel/cpu/perf_event.h
+++ b/arch/x86/kernel/cpu/perf_event.h
@@ -516,6 +516,26 @@ static inline bool kernel_ip(unsigned long ip)
 #endif
 }
 
+/*
+ * Not all PMUs provide the right context information to place the reported IP
+ * into full context. Specifically segment registers are typically not
+ * supplied.
+ *
+ * Assuming the address is a linear address (it is for IBS), we fake the CS and
+ * vm86 mode using the known zero-based code segment and 'fix up' the registers
+ * to reflect this.
+ *
+ * Intel PEBS/LBR appear to typically provide the effective address, nothing
+ * much we can do about that but pray and treat it like a linear address.
+ */
+static inline void set_linear_ip(struct pt_regs *regs, unsigned long ip)
+{
+        regs->cs = kernel_ip(ip) ? __KERNEL_CS : __USER_CS;
+        if (regs->flags & X86_VM_MASK)
+                regs->flags ^= (PERF_EFLAGS_VM | X86_VM_MASK);
+        regs->ip = ip;
+}
+
 #ifdef CONFIG_CPU_SUP_AMD
 
 int amd_pmu_init(void);
diff --git a/arch/x86/kernel/cpu/perf_event_amd_ibs.c b/arch/x86/kernel/cpu/perf_event_amd_ibs.c
index da9bcdcd9856..7bfb5bec8630 100644
--- a/arch/x86/kernel/cpu/perf_event_amd_ibs.c
+++ b/arch/x86/kernel/cpu/perf_event_amd_ibs.c
@@ -13,6 +13,8 @@
 
 #include <asm/apic.h>
 
+#include "perf_event.h"
+
 static u32 ibs_caps;
 
 #if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_AMD)
@@ -536,7 +538,7 @@ static int perf_ibs_handle_irq(struct perf_ibs *perf_ibs, struct pt_regs *iregs)
         if (check_rip && (ibs_data.regs[2] & IBS_RIP_INVALID)) {
                 regs.flags &= ~PERF_EFLAGS_EXACT;
         } else {
-                instruction_pointer_set(&regs, ibs_data.regs[1]);
+                set_linear_ip(&regs, ibs_data.regs[1]);
                 regs.flags |= PERF_EFLAGS_EXACT;
         }
 
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index 382366977d4c..7f2739e03e79 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -1522,8 +1522,16 @@ static struct perf_guest_switch_msr *intel_guest_get_msrs(int *nr)
         arr[0].msr = MSR_CORE_PERF_GLOBAL_CTRL;
         arr[0].host = x86_pmu.intel_ctrl & ~cpuc->intel_ctrl_guest_mask;
         arr[0].guest = x86_pmu.intel_ctrl & ~cpuc->intel_ctrl_host_mask;
+        /*
+         * If PMU counter has PEBS enabled it is not enough to disable counter
+         * on a guest entry since PEBS memory write can overshoot guest entry
+         * and corrupt guest memory. Disabling PEBS solves the problem.
+         */
+        arr[1].msr = MSR_IA32_PEBS_ENABLE;
+        arr[1].host = cpuc->pebs_enabled;
+        arr[1].guest = 0;
 
-        *nr = 1;
+        *nr = 2;
         return arr;
 }
 
diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c b/arch/x86/kernel/cpu/perf_event_intel_ds.c
index 629ae0b7ad90..e38d97bf4259 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_ds.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c
@@ -499,7 +499,7 @@ static int intel_pmu_pebs_fixup_ip(struct pt_regs *regs)
          * We sampled a branch insn, rewind using the LBR stack
          */
         if (ip == to) {
-                regs->ip = from;
+                set_linear_ip(regs, from);
                 return 1;
         }
 
@@ -529,7 +529,7 @@ static int intel_pmu_pebs_fixup_ip(struct pt_regs *regs)
         } while (to < ip);
 
         if (to == ip) {
-                regs->ip = old_to;
+                set_linear_ip(regs, old_to);
                 return 1;
         }
 
@@ -569,7 +569,8 @@ static void __intel_pmu_pebs_event(struct perf_event *event,
          * A possible PERF_SAMPLE_REGS will have to transfer all regs.
          */
         regs = *iregs;
-        regs.ip = pebs->ip;
+        regs.flags = pebs->flags;
+        set_linear_ip(&regs, pebs->ip);
         regs.bp = pebs->bp;
         regs.sp = pebs->sp;
 
diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore.c b/arch/x86/kernel/cpu/perf_event_intel_uncore.c
index 7563fda9f033..0a5571080e74 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_uncore.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_uncore.c
@@ -796,7 +796,6 @@ static struct intel_uncore_type *nhm_msr_uncores[] = {
 
 DEFINE_UNCORE_FORMAT_ATTR(event5, event, "config:1-5");
 DEFINE_UNCORE_FORMAT_ATTR(counter, counter, "config:6-7");
-DEFINE_UNCORE_FORMAT_ATTR(mm_cfg, mm_cfg, "config:63");
 DEFINE_UNCORE_FORMAT_ATTR(match, match, "config1:0-63");
 DEFINE_UNCORE_FORMAT_ATTR(mask, mask, "config2:0-63");
 
@@ -902,16 +901,21 @@ static struct attribute_group nhmex_uncore_cbox_format_group = {
         .attrs = nhmex_uncore_cbox_formats_attr,
 };
 
+/* msr offset for each instance of cbox */
+static unsigned nhmex_cbox_msr_offsets[] = {
+        0x0, 0x80, 0x40, 0xc0, 0x20, 0xa0, 0x60, 0xe0, 0x240, 0x2c0,
+};
+
 static struct intel_uncore_type nhmex_uncore_cbox = {
         .name                   = "cbox",
         .num_counters           = 6,
-        .num_boxes              = 8,
+        .num_boxes              = 10,
         .perf_ctr_bits          = 48,
         .event_ctl              = NHMEX_C0_MSR_PMON_EV_SEL0,
         .perf_ctr               = NHMEX_C0_MSR_PMON_CTR0,
         .event_mask             = NHMEX_PMON_RAW_EVENT_MASK,
         .box_ctl                = NHMEX_C0_MSR_PMON_GLOBAL_CTL,
-        .msr_offset             = NHMEX_C_MSR_OFFSET,
+        .msr_offsets            = nhmex_cbox_msr_offsets,
         .pair_ctr_ctl           = 1,
         .ops                    = &nhmex_uncore_ops,
         .format_group           = &nhmex_uncore_cbox_format_group
@@ -1032,24 +1036,22 @@ static struct intel_uncore_type nhmex_uncore_bbox = {
 
 static int nhmex_sbox_hw_config(struct intel_uncore_box *box, struct perf_event *event)
 {
-        struct hw_perf_event_extra *reg1 = &event->hw.extra_reg;
-        struct hw_perf_event_extra *reg2 = &event->hw.branch_reg;
+        struct hw_perf_event *hwc = &event->hw;
+        struct hw_perf_event_extra *reg1 = &hwc->extra_reg;
+        struct hw_perf_event_extra *reg2 = &hwc->branch_reg;
 
-        if (event->attr.config & NHMEX_S_PMON_MM_CFG_EN) {
-                reg1->config = event->attr.config1;
-                reg2->config = event->attr.config2;
-        } else {
-                reg1->config = ~0ULL;
-                reg2->config = ~0ULL;
-        }
+        /* only TO_R_PROG_EV event uses the match/mask register */
+        if ((hwc->config & NHMEX_PMON_CTL_EV_SEL_MASK) !=
+            NHMEX_S_EVENT_TO_R_PROG_EV)
+                return 0;
 
         if (box->pmu->pmu_idx == 0)
                 reg1->reg = NHMEX_S0_MSR_MM_CFG;
         else
                 reg1->reg = NHMEX_S1_MSR_MM_CFG;
-
         reg1->idx = 0;
-
+        reg1->config = event->attr.config1;
+        reg2->config = event->attr.config2;
         return 0;
 }
 
@@ -1059,8 +1061,8 @@ static void nhmex_sbox_msr_enable_event(struct intel_uncore_box *box, struct per
         struct hw_perf_event_extra *reg1 = &hwc->extra_reg;
         struct hw_perf_event_extra *reg2 = &hwc->branch_reg;
 
-        wrmsrl(reg1->reg, 0);
-        if (reg1->config != ~0ULL || reg2->config != ~0ULL) {
+        if (reg1->idx != EXTRA_REG_NONE) {
+                wrmsrl(reg1->reg, 0);
                 wrmsrl(reg1->reg + 1, reg1->config);
                 wrmsrl(reg1->reg + 2, reg2->config);
                 wrmsrl(reg1->reg, NHMEX_S_PMON_MM_CFG_EN);
@@ -1074,7 +1076,6 @@ static struct attribute *nhmex_uncore_sbox_formats_attr[] = {
         &format_attr_edge.attr,
         &format_attr_inv.attr,
         &format_attr_thresh8.attr,
-        &format_attr_mm_cfg.attr,
         &format_attr_match.attr,
         &format_attr_mask.attr,
         NULL,
@@ -1142,6 +1143,9 @@ static struct extra_reg nhmex_uncore_mbox_extra_regs[] = {
         EVENT_EXTRA_END
 };
 
+/* Nehalem-EX or Westmere-EX ? */
+bool uncore_nhmex;
+
 static bool nhmex_mbox_get_shared_reg(struct intel_uncore_box *box, int idx, u64 config)
 {
         struct intel_uncore_extra_reg *er;
@@ -1171,18 +1175,29 @@ static bool nhmex_mbox_get_shared_reg(struct intel_uncore_box *box, int idx, u64
                 return false;
 
         /* mask of the shared fields */
-        mask = NHMEX_M_PMON_ZDP_CTL_FVC_MASK;
+        if (uncore_nhmex)
+                mask = NHMEX_M_PMON_ZDP_CTL_FVC_MASK;
+        else
+                mask = WSMEX_M_PMON_ZDP_CTL_FVC_MASK;
         er = &box->shared_regs[EXTRA_REG_NHMEX_M_ZDP_CTL_FVC];
 
         raw_spin_lock_irqsave(&er->lock, flags);
         /* add mask of the non-shared field if it's in use */
-        if (__BITS_VALUE(atomic_read(&er->ref), idx, 8))
-                mask |= NHMEX_M_PMON_ZDP_CTL_FVC_EVENT_MASK(idx);
+        if (__BITS_VALUE(atomic_read(&er->ref), idx, 8)) {
+                if (uncore_nhmex)
+                        mask |= NHMEX_M_PMON_ZDP_CTL_FVC_EVENT_MASK(idx);
+                else
+                        mask |= WSMEX_M_PMON_ZDP_CTL_FVC_EVENT_MASK(idx);
+        }
 
         if (!atomic_read(&er->ref) || !((er->config ^ config) & mask)) {
                 atomic_add(1 << (idx * 8), &er->ref);
-                mask = NHMEX_M_PMON_ZDP_CTL_FVC_MASK |
-                        NHMEX_M_PMON_ZDP_CTL_FVC_EVENT_MASK(idx);
+                if (uncore_nhmex)
+                        mask = NHMEX_M_PMON_ZDP_CTL_FVC_MASK |
+                                NHMEX_M_PMON_ZDP_CTL_FVC_EVENT_MASK(idx);
+                else
+                        mask = WSMEX_M_PMON_ZDP_CTL_FVC_MASK |
+                                WSMEX_M_PMON_ZDP_CTL_FVC_EVENT_MASK(idx);
                 er->config &= ~mask;
                 er->config |= (config & mask);
                 ret = true;
@@ -1216,7 +1231,10 @@ u64 nhmex_mbox_alter_er(struct perf_event *event, int new_idx, bool modify)
 
         /* get the non-shared control bits and shift them */
         idx = orig_idx - EXTRA_REG_NHMEX_M_ZDP_CTL_FVC;
-        config &= NHMEX_M_PMON_ZDP_CTL_FVC_EVENT_MASK(idx);
+        if (uncore_nhmex)
+                config &= NHMEX_M_PMON_ZDP_CTL_FVC_EVENT_MASK(idx);
+        else
+                config &= WSMEX_M_PMON_ZDP_CTL_FVC_EVENT_MASK(idx);
         if (new_idx > orig_idx) {
                 idx = new_idx - orig_idx;
                 config <<= 3 * idx;
@@ -1226,6 +1244,10 @@ u64 nhmex_mbox_alter_er(struct perf_event *event, int new_idx, bool modify)
         }
 
         /* add the shared control bits back */
+        if (uncore_nhmex)
+                config |= NHMEX_M_PMON_ZDP_CTL_FVC_MASK & reg1->config;
+        else
+                config |= WSMEX_M_PMON_ZDP_CTL_FVC_MASK & reg1->config;
         config |= NHMEX_M_PMON_ZDP_CTL_FVC_MASK & reg1->config;
         if (modify) {
                 /* adjust the main event selector */
@@ -1264,7 +1286,8 @@ again:
         }
 
         /* for the match/mask registers */
-        if ((uncore_box_is_fake(box) || !reg2->alloc) &&
+        if (reg2->idx != EXTRA_REG_NONE &&
+            (uncore_box_is_fake(box) || !reg2->alloc) &&
             !nhmex_mbox_get_shared_reg(box, reg2->idx, reg2->config))
                 goto fail;
 
@@ -1278,7 +1301,8 @@ again:
                 if (idx[0] != 0xff && idx[0] != __BITS_VALUE(reg1->idx, 0, 8))
                         nhmex_mbox_alter_er(event, idx[0], true);
                 reg1->alloc |= alloc;
-                reg2->alloc = 1;
+                if (reg2->idx != EXTRA_REG_NONE)
+                        reg2->alloc = 1;
         }
         return NULL;
 fail:
@@ -1342,9 +1366,6 @@ static int nhmex_mbox_hw_config(struct intel_uncore_box *box, struct perf_event
         struct extra_reg *er;
         unsigned msr;
         int reg_idx = 0;
-
-        if (WARN_ON_ONCE(reg1->idx != -1))
-                return -EINVAL;
         /*
          * The mbox events may require 2 extra MSRs at the most. But only
          * the lower 32 bits in these MSRs are significant, so we can use
@@ -1355,11 +1376,6 @@ static int nhmex_mbox_hw_config(struct intel_uncore_box *box, struct perf_event
                         continue;
                 if (event->attr.config1 & ~er->valid_mask)
                         return -EINVAL;
-                if (er->idx == __BITS_VALUE(reg1->idx, 0, 8) ||
-                    er->idx == __BITS_VALUE(reg1->idx, 1, 8))
-                        continue;
-                if (WARN_ON_ONCE(reg_idx >= 2))
-                        return -EINVAL;
 
                 msr = er->msr + type->msr_offset * box->pmu->pmu_idx;
                 if (WARN_ON_ONCE(msr >= 0xffff || er->idx >= 0xff))
@@ -1368,6 +1384,8 @@ static int nhmex_mbox_hw_config(struct intel_uncore_box *box, struct perf_event
                 /* always use the 32~63 bits to pass the PLD config */
                 if (er->idx == EXTRA_REG_NHMEX_M_PLD)
                         reg_idx = 1;
+                else if (WARN_ON_ONCE(reg_idx > 0))
+                        return -EINVAL;
 
                 reg1->idx &= ~(0xff << (reg_idx * 8));
                 reg1->reg &= ~(0xffff << (reg_idx * 16));
@@ -1376,17 +1394,21 @@ static int nhmex_mbox_hw_config(struct intel_uncore_box *box, struct perf_event
                 reg1->config = event->attr.config1;
                 reg_idx++;
         }
-        /* use config2 to pass the filter config */
-        reg2->idx = EXTRA_REG_NHMEX_M_FILTER;
-        if (event->attr.config2 & NHMEX_M_PMON_MM_CFG_EN)
-                reg2->config = event->attr.config2;
-        else
-                reg2->config = ~0ULL;
-        if (box->pmu->pmu_idx == 0)
-                reg2->reg = NHMEX_M0_MSR_PMU_MM_CFG;
-        else
-                reg2->reg = NHMEX_M1_MSR_PMU_MM_CFG;
-
+        /*
+         * The mbox only provides ability to perform address matching
+         * for the PLD events.
+         */
+        if (reg_idx == 2) {
+                reg2->idx = EXTRA_REG_NHMEX_M_FILTER;
+                if (event->attr.config2 & NHMEX_M_PMON_MM_CFG_EN)
+                        reg2->config = event->attr.config2;
+                else
+                        reg2->config = ~0ULL;
+                if (box->pmu->pmu_idx == 0)
+                        reg2->reg = NHMEX_M0_MSR_PMU_MM_CFG;
+                else
+                        reg2->reg = NHMEX_M1_MSR_PMU_MM_CFG;
+        }
         return 0;
 }
 
@@ -1422,34 +1444,36 @@ static void nhmex_mbox_msr_enable_event(struct intel_uncore_box *box, struct per
                 wrmsrl(__BITS_VALUE(reg1->reg, 1, 16),
                         nhmex_mbox_shared_reg_config(box, idx));
 
-        wrmsrl(reg2->reg, 0);
-        if (reg2->config != ~0ULL) {
-                wrmsrl(reg2->reg + 1,
-                        reg2->config & NHMEX_M_PMON_ADDR_MATCH_MASK);
-                wrmsrl(reg2->reg + 2, NHMEX_M_PMON_ADDR_MASK_MASK &
-                        (reg2->config >> NHMEX_M_PMON_ADDR_MASK_SHIFT));
-                wrmsrl(reg2->reg, NHMEX_M_PMON_MM_CFG_EN);
+        if (reg2->idx != EXTRA_REG_NONE) {
+                wrmsrl(reg2->reg, 0);
+                if (reg2->config != ~0ULL) {
+                        wrmsrl(reg2->reg + 1,
+                                reg2->config & NHMEX_M_PMON_ADDR_MATCH_MASK);
+                        wrmsrl(reg2->reg + 2, NHMEX_M_PMON_ADDR_MASK_MASK &
+                                (reg2->config >> NHMEX_M_PMON_ADDR_MASK_SHIFT));
+                        wrmsrl(reg2->reg, NHMEX_M_PMON_MM_CFG_EN);
+                }
         }
 
         wrmsrl(hwc->config_base, hwc->config | NHMEX_PMON_CTL_EN_BIT0);
 }
 
-DEFINE_UNCORE_FORMAT_ATTR(count_mode,   count_mode,     "config:2-3");
-DEFINE_UNCORE_FORMAT_ATTR(storage_mode, storage_mode,   "config:4-5");
-DEFINE_UNCORE_FORMAT_ATTR(wrap_mode,    wrap_mode,      "config:6");
-DEFINE_UNCORE_FORMAT_ATTR(flag_mode,    flag_mode,      "config:7");
-DEFINE_UNCORE_FORMAT_ATTR(inc_sel,      inc_sel,        "config:9-13");
-DEFINE_UNCORE_FORMAT_ATTR(set_flag_sel, set_flag_sel,   "config:19-21");
-DEFINE_UNCORE_FORMAT_ATTR(filter_cfg,   filter_cfg,     "config2:63");
-DEFINE_UNCORE_FORMAT_ATTR(filter_match, filter_match,   "config2:0-33");
-DEFINE_UNCORE_FORMAT_ATTR(filter_mask,  filter_mask,    "config2:34-61");
-DEFINE_UNCORE_FORMAT_ATTR(dsp,          dsp,            "config1:0-31");
-DEFINE_UNCORE_FORMAT_ATTR(thr,          thr,            "config1:0-31");
-DEFINE_UNCORE_FORMAT_ATTR(fvc,          fvc,            "config1:0-31");
-DEFINE_UNCORE_FORMAT_ATTR(pgt,          pgt,            "config1:0-31");
-DEFINE_UNCORE_FORMAT_ATTR(map,          map,            "config1:0-31");
-DEFINE_UNCORE_FORMAT_ATTR(iss,          iss,            "config1:0-31");
-DEFINE_UNCORE_FORMAT_ATTR(pld,          pld,            "config1:32-63");
+DEFINE_UNCORE_FORMAT_ATTR(count_mode,           count_mode,     "config:2-3");
+DEFINE_UNCORE_FORMAT_ATTR(storage_mode,         storage_mode,   "config:4-5");
+DEFINE_UNCORE_FORMAT_ATTR(wrap_mode,            wrap_mode,      "config:6");
+DEFINE_UNCORE_FORMAT_ATTR(flag_mode,            flag_mode,      "config:7");
+DEFINE_UNCORE_FORMAT_ATTR(inc_sel,              inc_sel,        "config:9-13");
+DEFINE_UNCORE_FORMAT_ATTR(set_flag_sel,         set_flag_sel,   "config:19-21");
+DEFINE_UNCORE_FORMAT_ATTR(filter_cfg_en,        filter_cfg_en,  "config2:63");
+DEFINE_UNCORE_FORMAT_ATTR(filter_match,         filter_match,   "config2:0-33");
+DEFINE_UNCORE_FORMAT_ATTR(filter_mask,          filter_mask,    "config2:34-61");
+DEFINE_UNCORE_FORMAT_ATTR(dsp,                  dsp,            "config1:0-31");
+DEFINE_UNCORE_FORMAT_ATTR(thr,                  thr,            "config1:0-31");
+DEFINE_UNCORE_FORMAT_ATTR(fvc,                  fvc,            "config1:0-31");
+DEFINE_UNCORE_FORMAT_ATTR(pgt,                  pgt,            "config1:0-31");
+DEFINE_UNCORE_FORMAT_ATTR(map,                  map,            "config1:0-31");
+DEFINE_UNCORE_FORMAT_ATTR(iss,                  iss,            "config1:0-31");
+DEFINE_UNCORE_FORMAT_ATTR(pld,                  pld,            "config1:32-63");
 
 static struct attribute *nhmex_uncore_mbox_formats_attr[] = {
         &format_attr_count_mode.attr,
@@ -1458,7 +1482,7 @@ static struct attribute *nhmex_uncore_mbox_formats_attr[] = {
         &format_attr_flag_mode.attr,
         &format_attr_inc_sel.attr,
         &format_attr_set_flag_sel.attr,
-        &format_attr_filter_cfg.attr,
+        &format_attr_filter_cfg_en.attr,
         &format_attr_filter_match.attr,
         &format_attr_filter_mask.attr,
         &format_attr_dsp.attr,
@@ -1482,6 +1506,12 @@ static struct uncore_event_desc nhmex_uncore_mbox_events[] = {
         { /* end: all zeroes */ },
 };
 
+static struct uncore_event_desc wsmex_uncore_mbox_events[] = {
+        INTEL_UNCORE_EVENT_DESC(bbox_cmds_read, "inc_sel=0xd,fvc=0x5000"),
+        INTEL_UNCORE_EVENT_DESC(bbox_cmds_write, "inc_sel=0xd,fvc=0x5040"),
+        { /* end: all zeroes */ },
+};
+
 static struct intel_uncore_ops nhmex_uncore_mbox_ops = {
         NHMEX_UNCORE_OPS_COMMON_INIT(),
         .enable_event   = nhmex_mbox_msr_enable_event,
@@ -1513,7 +1543,7 @@ void nhmex_rbox_alter_er(struct intel_uncore_box *box, struct perf_event *event)
         struct hw_perf_event_extra *reg1 = &hwc->extra_reg;
         int port;
 
-        /* adjust the main event selector */
+        /* adjust the main event selector and extra register index */
         if (reg1->idx % 2) {
                 reg1->idx--;
                 hwc->config -= 1 << NHMEX_R_PMON_CTL_EV_SEL_SHIFT;
@@ -1522,29 +1552,17 @@ void nhmex_rbox_alter_er(struct intel_uncore_box *box, struct perf_event *event)
                 hwc->config += 1 << NHMEX_R_PMON_CTL_EV_SEL_SHIFT;
         }
 
-        /* adjust address or config of extra register */
+        /* adjust extra register config */
         port = reg1->idx / 6 + box->pmu->pmu_idx * 4;
         switch (reg1->idx % 6) {
-        case 0:
-                reg1->reg = NHMEX_R_MSR_PORTN_IPERF_CFG0(port);
-                break;
-        case 1:
-                reg1->reg = NHMEX_R_MSR_PORTN_IPERF_CFG1(port);
-                break;
         case 2:
-                /* the 8~15 bits to the 0~7 bits */
+                /* shift the 8~15 bits to the 0~7 bits */
                 reg1->config >>= 8;
                 break;
         case 3:
-                /* the 0~7 bits to the 8~15 bits */
+                /* shift the 0~7 bits to the 8~15 bits */
                 reg1->config <<= 8;
                 break;
-        case 4:
-                reg1->reg = NHMEX_R_MSR_PORTN_XBR_SET1_MM_CFG(port);
-                break;
-        case 5:
-                reg1->reg = NHMEX_R_MSR_PORTN_XBR_SET2_MM_CFG(port);
-                break;
         };
 }
 
@@ -1671,7 +1689,7 @@ static int nhmex_rbox_hw_config(struct intel_uncore_box *box, struct perf_event
         struct hw_perf_event *hwc = &event->hw;
         struct hw_perf_event_extra *reg1 = &event->hw.extra_reg;
         struct hw_perf_event_extra *reg2 = &event->hw.branch_reg;
-        int port, idx;
+        int idx;
 
         idx = (event->hw.config & NHMEX_R_PMON_CTL_EV_SEL_MASK) >>
                 NHMEX_R_PMON_CTL_EV_SEL_SHIFT;
@@ -1681,27 +1699,11 @@ static int nhmex_rbox_hw_config(struct intel_uncore_box *box, struct perf_event
         reg1->idx = idx;
         reg1->config = event->attr.config1;
 
-        port = idx / 6 + box->pmu->pmu_idx * 4;
-        idx %= 6;
-        switch (idx) {
-        case 0:
-                reg1->reg = NHMEX_R_MSR_PORTN_IPERF_CFG0(port);
-                break;
-        case 1:
-                reg1->reg = NHMEX_R_MSR_PORTN_IPERF_CFG1(port);
-                break;
-        case 2:
-        case 3:
-                reg1->reg = NHMEX_R_MSR_PORTN_QLX_CFG(port);
-                break;
+        switch (idx % 6) {
         case 4:
         case 5:
-                if (idx == 4)
-                        reg1->reg = NHMEX_R_MSR_PORTN_XBR_SET1_MM_CFG(port);
-                else
-                        reg1->reg = NHMEX_R_MSR_PORTN_XBR_SET2_MM_CFG(port);
-                reg2->config = event->attr.config2;
                 hwc->config |= event->attr.config & (~0ULL << 32);
+                reg2->config = event->attr.config2;
                 break;
         };
         return 0;
@@ -1727,28 +1729,34 @@ static void nhmex_rbox_msr_enable_event(struct intel_uncore_box *box, struct per
         struct hw_perf_event *hwc = &event->hw;
         struct hw_perf_event_extra *reg1 = &hwc->extra_reg;
         struct hw_perf_event_extra *reg2 = &hwc->branch_reg;
-        int idx, er_idx;
+        int idx, port;
 
-        idx = reg1->idx % 6;
-        er_idx = idx;
-        if (er_idx > 2)
-                er_idx--;
-        er_idx += (reg1->idx / 6) * 5;
+        idx = reg1->idx;
+        port = idx / 6 + box->pmu->pmu_idx * 4;
 
-        switch (idx) {
+        switch (idx % 6) {
         case 0:
+                wrmsrl(NHMEX_R_MSR_PORTN_IPERF_CFG0(port), reg1->config);
+                break;
         case 1:
-                wrmsrl(reg1->reg, reg1->config);
+                wrmsrl(NHMEX_R_MSR_PORTN_IPERF_CFG1(port), reg1->config);
                 break;
         case 2:
         case 3:
-                wrmsrl(reg1->reg, nhmex_rbox_shared_reg_config(box, er_idx));
+                wrmsrl(NHMEX_R_MSR_PORTN_QLX_CFG(port),
+                        nhmex_rbox_shared_reg_config(box, 2 + (idx / 6) * 5));
                 break;
         case 4:
+                wrmsrl(NHMEX_R_MSR_PORTN_XBR_SET1_MM_CFG(port),
+                        hwc->config >> 32);
+                wrmsrl(NHMEX_R_MSR_PORTN_XBR_SET1_MATCH(port), reg1->config);
+                wrmsrl(NHMEX_R_MSR_PORTN_XBR_SET1_MASK(port), reg2->config);
+                break;
         case 5:
-                wrmsrl(reg1->reg, reg1->config);
-                wrmsrl(reg1->reg + 1, hwc->config >> 32);
-                wrmsrl(reg1->reg + 2, reg2->config);
+                wrmsrl(NHMEX_R_MSR_PORTN_XBR_SET2_MM_CFG(port),
+                        hwc->config >> 32);
+                wrmsrl(NHMEX_R_MSR_PORTN_XBR_SET2_MATCH(port), reg1->config);
+                wrmsrl(NHMEX_R_MSR_PORTN_XBR_SET2_MASK(port), reg2->config);
                 break;
         };
 
@@ -1756,8 +1764,8 @@ static void nhmex_rbox_msr_enable_event(struct intel_uncore_box *box, struct per
                 (hwc->config & NHMEX_R_PMON_CTL_EV_SEL_MASK));
 }
 
-DEFINE_UNCORE_FORMAT_ATTR(xbr_match, xbr_match, "config:32-63");
-DEFINE_UNCORE_FORMAT_ATTR(xbr_mm_cfg, xbr_mm_cfg, "config1:0-63");
+DEFINE_UNCORE_FORMAT_ATTR(xbr_mm_cfg, xbr_mm_cfg, "config:32-63");
+DEFINE_UNCORE_FORMAT_ATTR(xbr_match, xbr_match, "config1:0-63");
 DEFINE_UNCORE_FORMAT_ATTR(xbr_mask, xbr_mask, "config2:0-63");
 DEFINE_UNCORE_FORMAT_ATTR(qlx_cfg, qlx_cfg, "config1:0-15");
 DEFINE_UNCORE_FORMAT_ATTR(iperf_cfg, iperf_cfg, "config1:0-31");
@@ -2303,6 +2311,7 @@ int uncore_pmu_event_init(struct perf_event *event)
         event->hw.idx = -1;
         event->hw.last_tag = ~0ULL;
         event->hw.extra_reg.idx = EXTRA_REG_NONE;
+        event->hw.branch_reg.idx = EXTRA_REG_NONE;
 
         if (event->attr.config == UNCORE_FIXED_EVENT) {
                 /* no fixed counter */
@@ -2373,7 +2382,7 @@ static void __init uncore_type_exit(struct intel_uncore_type *type)
         type->attr_groups[1] = NULL;
 }
 
-static void uncore_types_exit(struct intel_uncore_type **types)
+static void __init uncore_types_exit(struct intel_uncore_type **types)
 {
         int i;
         for (i = 0; types[i]; i++)
@@ -2814,7 +2823,13 @@ static int __init uncore_cpu_init(void)
                         snbep_uncore_cbox.num_boxes = max_cores;
                 msr_uncores = snbep_msr_uncores;
                 break;
-        case 46:
+        case 46: /* Nehalem-EX */
+                uncore_nhmex = true;
+        case 47: /* Westmere-EX aka. Xeon E7 */
+                if (!uncore_nhmex)
+                        nhmex_uncore_mbox.event_descs = wsmex_uncore_mbox_events;
+                if (nhmex_uncore_cbox.num_boxes > max_cores)
+                        nhmex_uncore_cbox.num_boxes = max_cores;
                 msr_uncores = nhmex_msr_uncores;
                 break;
         default:
diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore.h b/arch/x86/kernel/cpu/perf_event_intel_uncore.h
index f3851892e077..5b81c1856aac 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_uncore.h
+++ b/arch/x86/kernel/cpu/perf_event_intel_uncore.h
@@ -5,7 +5,7 @@
 #include "perf_event.h"
 
 #define UNCORE_PMU_NAME_LEN             32
-#define UNCORE_PMU_HRTIMER_INTERVAL     (60 * NSEC_PER_SEC)
+#define UNCORE_PMU_HRTIMER_INTERVAL     (60LL * NSEC_PER_SEC)
 
 #define UNCORE_FIXED_EVENT              0xff
 #define UNCORE_PMC_IDX_MAX_GENERIC      8
@@ -230,6 +230,7 @@
 #define NHMEX_S1_MSR_MASK                       0xe5a
 
 #define NHMEX_S_PMON_MM_CFG_EN                  (0x1ULL << 63)
+#define NHMEX_S_EVENT_TO_R_PROG_EV              0
 
 /* NHM-EX Mbox */
 #define NHMEX_M0_MSR_GLOBAL_CTL                 0xca0
@@ -275,18 +276,12 @@
                  NHMEX_M_PMON_CTL_INC_SEL_MASK |        \
                  NHMEX_M_PMON_CTL_SET_FLAG_SEL_MASK)
 
-
-#define NHMEX_M_PMON_ZDP_CTL_FVC_FVID_MASK      0x1f
-#define NHMEX_M_PMON_ZDP_CTL_FVC_BCMD_MASK      (0x7 << 5)
-#define NHMEX_M_PMON_ZDP_CTL_FVC_RSP_MASK       (0x7 << 8)
-#define NHMEX_M_PMON_ZDP_CTL_FVC_PBOX_INIT_ERR  (1 << 23)
-#define NHMEX_M_PMON_ZDP_CTL_FVC_MASK                   \
-                (NHMEX_M_PMON_ZDP_CTL_FVC_FVID_MASK |   \
-                 NHMEX_M_PMON_ZDP_CTL_FVC_BCMD_MASK |   \
-                 NHMEX_M_PMON_ZDP_CTL_FVC_RSP_MASK  |   \
-                 NHMEX_M_PMON_ZDP_CTL_FVC_PBOX_INIT_ERR)
+#define NHMEX_M_PMON_ZDP_CTL_FVC_MASK           (((1 << 11) - 1) | (1 << 23))
 #define NHMEX_M_PMON_ZDP_CTL_FVC_EVENT_MASK(n)  (0x7 << (11 + 3 * (n)))
 
+#define WSMEX_M_PMON_ZDP_CTL_FVC_MASK           (((1 << 12) - 1) | (1 << 24))
+#define WSMEX_M_PMON_ZDP_CTL_FVC_EVENT_MASK(n)  (0x7 << (12 + 3 * (n)))
+
 /*
  * use the 9~13 bits to select event If the 7th bit is not set,
  * otherwise use the 19~21 bits to select event.
@@ -368,6 +363,7 @@ struct intel_uncore_type {
         unsigned num_shared_regs:8;
         unsigned single_fixed:1;
         unsigned pair_ctr_ctl:1;
+        unsigned *msr_offsets;
         struct event_constraint unconstrainted;
         struct event_constraint *constraints;
         struct intel_uncore_pmu *pmus;
@@ -485,29 +481,31 @@ unsigned uncore_pci_perf_ctr(struct intel_uncore_box *box, int idx)
         return idx * 8 + box->pmu->type->perf_ctr;
 }
 
-static inline
-unsigned uncore_msr_box_ctl(struct intel_uncore_box *box)
+static inline unsigned uncore_msr_box_offset(struct intel_uncore_box *box)
+{
+        struct intel_uncore_pmu *pmu = box->pmu;
+        return pmu->type->msr_offsets ?
+                pmu->type->msr_offsets[pmu->pmu_idx] :
+                pmu->type->msr_offset * pmu->pmu_idx;
+}
+
+static inline unsigned uncore_msr_box_ctl(struct intel_uncore_box *box)
 {
         if (!box->pmu->type->box_ctl)
                 return 0;
-        return box->pmu->type->box_ctl +
-                box->pmu->type->msr_offset * box->pmu->pmu_idx;
+        return box->pmu->type->box_ctl + uncore_msr_box_offset(box);
 }
 
-static inline
-unsigned uncore_msr_fixed_ctl(struct intel_uncore_box *box)
+static inline unsigned uncore_msr_fixed_ctl(struct intel_uncore_box *box)
 {
         if (!box->pmu->type->fixed_ctl)
                 return 0;
-        return box->pmu->type->fixed_ctl +
-                box->pmu->type->msr_offset * box->pmu->pmu_idx;
+        return box->pmu->type->fixed_ctl + uncore_msr_box_offset(box);
 }
 
-static inline
-unsigned uncore_msr_fixed_ctr(struct intel_uncore_box *box)
+static inline unsigned uncore_msr_fixed_ctr(struct intel_uncore_box *box)
 {
-        return box->pmu->type->fixed_ctr +
-                box->pmu->type->msr_offset * box->pmu->pmu_idx;
+        return box->pmu->type->fixed_ctr + uncore_msr_box_offset(box);
 }
 
 static inline
@@ -515,7 +513,7 @@ unsigned uncore_msr_event_ctl(struct intel_uncore_box *box, int idx)
 {
         return box->pmu->type->event_ctl +
                 (box->pmu->type->pair_ctr_ctl ? 2 * idx : idx) +
-                box->pmu->type->msr_offset * box->pmu->pmu_idx;
+                uncore_msr_box_offset(box);
 }
 
 static inline
@@ -523,7 +521,7 @@ unsigned uncore_msr_perf_ctr(struct intel_uncore_box *box, int idx)
 {
         return box->pmu->type->perf_ctr +
                 (box->pmu->type->pair_ctr_ctl ? 2 * idx : idx) +
-                box->pmu->type->msr_offset * box->pmu->pmu_idx;
+                uncore_msr_box_offset(box);
 }
 
 static inline
diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c
index 1f5f1d5d2a02..7ad683d78645 100644
--- a/arch/x86/kernel/irq.c
+++ b/arch/x86/kernel/irq.c
@@ -328,6 +328,7 @@ void fixup_irqs(void)
                                 chip->irq_retrigger(data);
                         raw_spin_unlock(&desc->lock);
                 }
+                __this_cpu_write(vector_irq[vector], -1);
         }
 }
 #endif
diff --git a/arch/x86/kernel/kdebugfs.c b/arch/x86/kernel/kdebugfs.c
index 1d5d31ea686b..dc1404bf8e4b 100644
--- a/arch/x86/kernel/kdebugfs.c
+++ b/arch/x86/kernel/kdebugfs.c
@@ -107,7 +107,7 @@ static int __init create_setup_data_nodes(struct dentry *parent)
 {
         struct setup_data_node *node;
         struct setup_data *data;
-        int error = -ENOMEM;
+        int error;
         struct dentry *d;
         struct page *pg;
         u64 pa_data;
@@ -121,8 +121,10 @@ static int __init create_setup_data_nodes(struct dentry *parent)
 
         while (pa_data) {
                 node = kmalloc(sizeof(*node), GFP_KERNEL);
-                if (!node)
+                if (!node) {
+                        error = -ENOMEM;
                         goto err_dir;
+                }
 
                 pg = pfn_to_page((pa_data+sizeof(*data)-1) >> PAGE_SHIFT);
                 if (PageHighMem(pg)) {
diff --git a/arch/x86/kvm/i8259.c b/arch/x86/kvm/i8259.c
index 1df8fb9e1d5d..e498b18f010c 100644
--- a/arch/x86/kvm/i8259.c
+++ b/arch/x86/kvm/i8259.c
@@ -316,6 +316,11 @@ static void pic_ioport_write(void *opaque, u32 addr, u32 val)
         addr &= 1;
         if (addr == 0) {
                 if (val & 0x10) {
+                        u8 edge_irr = s->irr & ~s->elcr;
+                        int i;
+                        bool found;
+                        struct kvm_vcpu *vcpu;
+
                         s->init4 = val & 1;
                         s->last_irr = 0;
                         s->irr &= s->elcr;
@@ -333,6 +338,18 @@ static void pic_ioport_write(void *opaque, u32 addr, u32 val)
                         if (val & 0x08)
                                 pr_pic_unimpl(
                                         "level sensitive irq not supported");
+
+                        kvm_for_each_vcpu(i, vcpu, s->pics_state->kvm)
+                                if (kvm_apic_accept_pic_intr(vcpu)) {
+                                        found = true;
+                                        break;
+                                }
+
+
+                        if (found)
+                                for (irq = 0; irq < PIC_NUM_PINS/2; irq++)
+                                        if (edge_irr & (1 << irq))
+                                                pic_clear_isr(s, irq);
                 } else if (val & 0x08) {
                         if (val & 0x04)
                                 s->poll = 1;
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index c39b60707e02..c00f03de1b79 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -1488,13 +1488,6 @@ static void __vmx_load_host_state(struct vcpu_vmx *vmx)
                 loadsegment(ds, vmx->host_state.ds_sel);
                 loadsegment(es, vmx->host_state.es_sel);
         }
-#else
-        /*
-         * The sysexit path does not restore ds/es, so we must set them to
-         * a reasonable value ourselves.
-         */
-        loadsegment(ds, __USER_DS);
-        loadsegment(es, __USER_DS);
 #endif
         reload_tss();
 #ifdef CONFIG_X86_64
@@ -6370,6 +6363,19 @@ static void __noclone vmx_vcpu_run(struct kvm_vcpu *vcpu)
 #endif
               );
 
+#ifndef CONFIG_X86_64
+        /*
+         * The sysexit path does not restore ds/es, so we must set them to
+         * a reasonable value ourselves.
+         *
+         * We can't defer this to vmx_load_host_state() since that function
+         * may be executed in interrupt context, which saves and restore segments
+         * around it, nullifying its effect.
+         */
+        loadsegment(ds, __USER_DS);
+        loadsegment(es, __USER_DS);
+#endif
+
         vcpu->arch.regs_avail = ~((1 << VCPU_REGS_RIP) | (1 << VCPU_REGS_RSP)
                                   | (1 << VCPU_EXREG_RFLAGS)
                                   | (1 << VCPU_EXREG_CPL)
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 59b59508ff07..42bce48f6928 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -925,6 +925,10 @@ static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
          */
         getboottime(&boot);
 
+        if (kvm->arch.kvmclock_offset) {
+                struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
+                boot = timespec_sub(boot, ts);
+        }
         wc.sec = boot.tv_sec;
         wc.nsec = boot.tv_nsec;
         wc.version = version;
diff --git a/arch/x86/mm/hugetlbpage.c b/arch/x86/mm/hugetlbpage.c
index f6679a7fb8ca..b91e48512425 100644
--- a/arch/x86/mm/hugetlbpage.c
+++ b/arch/x86/mm/hugetlbpage.c
@@ -56,9 +56,16 @@ static int vma_shareable(struct vm_area_struct *vma, unsigned long addr)
 }
 
 /*
- * search for a shareable pmd page for hugetlb.
+ * Search for a shareable pmd page for hugetlb. In any case calls pmd_alloc()
+ * and returns the corresponding pte. While this is not necessary for the
+ * !shared pmd case because we can allocate the pmd later as well, it makes the
+ * code much cleaner. pmd allocation is essential for the shared case because
+ * pud has to be populated inside the same i_mmap_mutex section - otherwise
+ * racing tasks could either miss the sharing (see huge_pte_offset) or select a
+ * bad pmd for sharing.
  */
-static void huge_pmd_share(struct mm_struct *mm, unsigned long addr, pud_t *pud)
+static pte_t *
+huge_pmd_share(struct mm_struct *mm, unsigned long addr, pud_t *pud)
 {
         struct vm_area_struct *vma = find_vma(mm, addr);
         struct address_space *mapping = vma->vm_file->f_mapping;
@@ -68,9 +75,10 @@ static void huge_pmd_share(struct mm_struct *mm, unsigned long addr, pud_t *pud)
         struct vm_area_struct *svma;
         unsigned long saddr;
         pte_t *spte = NULL;
+        pte_t *pte;
 
         if (!vma_shareable(vma, addr))
-                return;
+                return (pte_t *)pmd_alloc(mm, pud, addr);
 
         mutex_lock(&mapping->i_mmap_mutex);
         vma_prio_tree_foreach(svma, &iter, &mapping->i_mmap, idx, idx) {
@@ -97,7 +105,9 @@ static void huge_pmd_share(struct mm_struct *mm, unsigned long addr, pud_t *pud)
                 put_page(virt_to_page(spte));
         spin_unlock(&mm->page_table_lock);
 out:
+        pte = (pte_t *)pmd_alloc(mm, pud, addr);
         mutex_unlock(&mapping->i_mmap_mutex);
+        return pte;
 }
 
 /*
@@ -142,8 +152,9 @@ pte_t *huge_pte_alloc(struct mm_struct *mm,
                 } else {
                         BUG_ON(sz != PMD_SIZE);
                         if (pud_none(*pud))
-                                huge_pmd_share(mm, addr, pud);
-                        pte = (pte_t *) pmd_alloc(mm, pud, addr);
+                                pte = huge_pmd_share(mm, addr, pud);
+                        else
+                                pte = (pte_t *)pmd_alloc(mm, pud, addr);
                 }
         }
         BUG_ON(pte && !pte_none(*pte) && !pte_huge(*pte));
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 931930a96160..a718e0d23503 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -919,13 +919,11 @@ static int change_page_attr_set_clr(unsigned long *addr, int numpages,
 
         /*
          * On success we use clflush, when the CPU supports it to
-         * avoid the wbindv. If the CPU does not support it, in the
-         * error case, and during early boot (for EFI) we fall back
-         * to cpa_flush_all (which uses wbinvd):
+         * avoid the wbindv. If the CPU does not support it and in the
+         * error case we fall back to cpa_flush_all (which uses
+         * wbindv):
          */
-        if (early_boot_irqs_disabled)
-                __cpa_flush_all((void *)(long)cache);
-        else if (!ret && cpu_has_clflush) {
+        if (!ret && cpu_has_clflush) {
                 if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) {
                         cpa_flush_array(addr, numpages, cache,
                                         cpa.flags, pages);
diff --git a/arch/x86/mm/srat.c b/arch/x86/mm/srat.c
index 4599c3e8bcb6..4ddf497ca65b 100644
--- a/arch/x86/mm/srat.c
+++ b/arch/x86/mm/srat.c
@@ -142,23 +142,23 @@ static inline int save_add_info(void) {return 0;}
 #endif
 
 /* Callback for parsing of the Proximity Domain <-> Memory Area mappings */
-void __init
+int __init
 acpi_numa_memory_affinity_init(struct acpi_srat_mem_affinity *ma)
 {
         u64 start, end;
         int node, pxm;
 
         if (srat_disabled())
-                return;
+                return -1;
         if (ma->header.length != sizeof(struct acpi_srat_mem_affinity)) {
                 bad_srat();
-                return;
+                return -1;
         }
         if ((ma->flags & ACPI_SRAT_MEM_ENABLED) == 0)
-                return;
+                return -1;
 
         if ((ma->flags & ACPI_SRAT_MEM_HOT_PLUGGABLE) && !save_add_info())
-                return;
+                return -1;
         start = ma->base_address;
         end = start + ma->length;
         pxm = ma->proximity_domain;
@@ -168,12 +168,12 @@ acpi_numa_memory_affinity_init(struct acpi_srat_mem_affinity *ma)
         if (node < 0) {
                 printk(KERN_ERR "SRAT: Too many proximity domains.\n");
                 bad_srat();
-                return;
+                return -1;
         }
 
         if (numa_add_memblk(node, start, end) < 0) {
                 bad_srat();
-                return;
+                return -1;
         }
 
         node_set(node, numa_nodes_parsed);
@@ -181,6 +181,7 @@ acpi_numa_memory_affinity_init(struct acpi_srat_mem_affinity *ma)
         printk(KERN_INFO "SRAT: Node %u PXM %u [mem %#010Lx-%#010Lx]\n",
                node, pxm,
                (unsigned long long) start, (unsigned long long) end - 1);
+        return 0;
 }
 
 void __init acpi_numa_arch_fixup(void) {}
diff --git a/arch/x86/platform/efi/efi.c b/arch/x86/platform/efi/efi.c
index 2dc29f51e75a..92660edaa1e7 100644
--- a/arch/x86/platform/efi/efi.c
+++ b/arch/x86/platform/efi/efi.c
@@ -234,7 +234,22 @@ static efi_status_t __init phys_efi_set_virtual_address_map(
         return status;
 }
 
-static int efi_set_rtc_mmss(unsigned long nowtime)
+static efi_status_t __init phys_efi_get_time(efi_time_t *tm,
+                                             efi_time_cap_t *tc)
+{
+        unsigned long flags;
+        efi_status_t status;
+
+        spin_lock_irqsave(&rtc_lock, flags);
+        efi_call_phys_prelog();
+        status = efi_call_phys2(efi_phys.get_time, virt_to_phys(tm),
+                                virt_to_phys(tc));
+        efi_call_phys_epilog();
+        spin_unlock_irqrestore(&rtc_lock, flags);
+        return status;
+}
+
+int efi_set_rtc_mmss(unsigned long nowtime)
 {
         int real_seconds, real_minutes;
         efi_status_t    status;
@@ -263,7 +278,7 @@ static int efi_set_rtc_mmss(unsigned long nowtime)
         return 0;
 }
 
-static unsigned long efi_get_time(void)
+unsigned long efi_get_time(void)
 {
         efi_status_t status;
         efi_time_t eft;
@@ -606,13 +621,18 @@ static int __init efi_runtime_init(void)
         }
         /*
          * We will only need *early* access to the following
-         * EFI runtime service before set_virtual_address_map
+         * two EFI runtime services before set_virtual_address_map
          * is invoked.
          */
+        efi_phys.get_time = (efi_get_time_t *)runtime->get_time;
         efi_phys.set_virtual_address_map =
                 (efi_set_virtual_address_map_t *)
                 runtime->set_virtual_address_map;
-
+        /*
+         * Make efi_get_time can be called before entering
+         * virtual mode.
+         */
+        efi.get_time = phys_efi_get_time;
         early_iounmap(runtime, sizeof(efi_runtime_services_t));
 
         return 0;
@@ -700,10 +720,12 @@ void __init efi_init(void)
                 efi_enabled = 0;
                 return;
         }
+#ifdef CONFIG_X86_32
         if (efi_native) {
                 x86_platform.get_wallclock = efi_get_time;
                 x86_platform.set_wallclock = efi_set_rtc_mmss;
         }
+#endif
 
 #if EFI_DEBUG
         print_efi_memmap();
diff --git a/arch/x86/realmode/rm/Makefile b/arch/x86/realmode/rm/Makefile
index b2d534cab25f..88692871823f 100644
--- a/arch/x86/realmode/rm/Makefile
+++ b/arch/x86/realmode/rm/Makefile
@@ -72,7 +72,7 @@ KBUILD_CFLAGS	:= $(LINUXINCLUDE) -m32 -g -Os -D_SETUP -D__KERNEL__ -D_WAKEUP \
                    -Wall -Wstrict-prototypes \
                    -march=i386 -mregparm=3 \
                    -include $(srctree)/$(src)/../../boot/code16gcc.h \
-                   -fno-strict-aliasing -fomit-frame-pointer \
+                   -fno-strict-aliasing -fomit-frame-pointer -fno-pic \
                    $(call cc-option, -ffreestanding) \
                    $(call cc-option, -fno-toplevel-reorder,\
                         $(call cc-option, -fno-unit-at-a-time)) \
diff --git a/arch/x86/syscalls/syscall_64.tbl b/arch/x86/syscalls/syscall_64.tbl
index 51171aeff0dc..a582bfed95bb 100644
--- a/arch/x86/syscalls/syscall_64.tbl
+++ b/arch/x86/syscalls/syscall_64.tbl
@@ -60,8 +60,8 @@
 51      common  getsockname             sys_getsockname
 52      common  getpeername             sys_getpeername
 53      common  socketpair              sys_socketpair
-54      common  setsockopt              sys_setsockopt
-55      common  getsockopt              sys_getsockopt
+54      64      setsockopt              sys_setsockopt
+55      64      getsockopt              sys_getsockopt
 56      common  clone                   stub_clone
 57      common  fork                    stub_fork
 58      common  vfork                   stub_vfork
@@ -318,7 +318,7 @@
 309     common  getcpu                  sys_getcpu
 310     64      process_vm_readv        sys_process_vm_readv
 311     64      process_vm_writev       sys_process_vm_writev
-312     64      kcmp                    sys_kcmp
+312     common  kcmp                    sys_kcmp
 
 #
 # x32-specific system call numbers start at 512 to avoid cache impact
@@ -353,3 +353,5 @@
 538     x32     sendmmsg                compat_sys_sendmmsg
 539     x32     process_vm_readv        compat_sys_process_vm_readv
 540     x32     process_vm_writev       compat_sys_process_vm_writev
+541     x32     setsockopt              compat_sys_setsockopt
+542     x32     getsockopt              compat_sys_getsockopt
diff --git a/arch/x86/xen/p2m.c b/arch/x86/xen/p2m.c
index 64effdc6da94..b2e91d40a4cb 100644
--- a/arch/x86/xen/p2m.c
+++ b/arch/x86/xen/p2m.c
@@ -194,6 +194,11 @@ RESERVE_BRK(p2m_mid_mfn, PAGE_SIZE * (MAX_DOMAIN_PAGES / (P2M_PER_PAGE * P2M_MID
  * boundary violation will require three middle nodes. */
 RESERVE_BRK(p2m_mid_identity, PAGE_SIZE * 2 * 3);
 
+/* When we populate back during bootup, the amount of pages can vary. The
+ * max we have is seen is 395979, but that does not mean it can't be more.
+ * But some machines can have 3GB I/O holes even. So lets reserve enough
+ * for 4GB of I/O and E820 holes. */
+RESERVE_BRK(p2m_populated, PMD_SIZE * 4);
 static inline unsigned p2m_top_index(unsigned long pfn)
 {
         BUG_ON(pfn >= MAX_P2M_PFN);