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authorThomas Gleixner <tglx@linutronix.de>2007-08-28 05:03:01 -0400
committerRalf Baechle <ralf@linux-mips.org>2007-10-11 18:46:02 -0400
commit4e45171c4e31578157189ca22cfb7b2bcc5f69f2 (patch)
tree2b5d3dea2f711e0a138496ff8659b8da80d7bd6d /arch
parent1c0c13eb935c95fd2ca0b0aca6dd4860487fb242 (diff)
[MIPS] cleanup struct irqaction initializers
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> CC: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/cobalt/irq.c4
-rw-r--r--arch/mips/jmr3927/rbhma3100/irq.c8
-rw-r--r--arch/mips/kernel/i8259.c4
-rw-r--r--arch/mips/sgi-ip32/ip32-irq.c16
-rw-r--r--arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c10
5 files changed, 30 insertions, 12 deletions
diff --git a/arch/mips/cobalt/irq.c b/arch/mips/cobalt/irq.c
index 950ad1e8be44..48763cd10eaa 100644
--- a/arch/mips/cobalt/irq.c
+++ b/arch/mips/cobalt/irq.c
@@ -92,7 +92,9 @@ asmlinkage void plat_irq_dispatch(void)
92} 92}
93 93
94static struct irqaction irq_via = { 94static struct irqaction irq_via = {
95 no_action, 0, { { 0, } }, "cascade", NULL, NULL 95 .handler = no_action,
96 .mask = CPU_MASK_NONE,
97 .name = "cascade"
96}; 98};
97 99
98void __init arch_init_irq(void) 100void __init arch_init_irq(void)
diff --git a/arch/mips/jmr3927/rbhma3100/irq.c b/arch/mips/jmr3927/rbhma3100/irq.c
index d9efe692e551..3a47e8ce1196 100644
--- a/arch/mips/jmr3927/rbhma3100/irq.c
+++ b/arch/mips/jmr3927/rbhma3100/irq.c
@@ -104,7 +104,9 @@ static irqreturn_t jmr3927_ioc_interrupt(int irq, void *dev_id)
104} 104}
105 105
106static struct irqaction ioc_action = { 106static struct irqaction ioc_action = {
107 jmr3927_ioc_interrupt, 0, CPU_MASK_NONE, "IOC", NULL, NULL, 107 .handler = jmr3927_ioc_interrupt,
108 .mask = CPU_MASK_NONE,
109 .name = "IOC",
108}; 110};
109 111
110static irqreturn_t jmr3927_pcierr_interrupt(int irq, void *dev_id) 112static irqreturn_t jmr3927_pcierr_interrupt(int irq, void *dev_id)
@@ -116,7 +118,9 @@ static irqreturn_t jmr3927_pcierr_interrupt(int irq, void *dev_id)
116 return IRQ_HANDLED; 118 return IRQ_HANDLED;
117} 119}
118static struct irqaction pcierr_action = { 120static struct irqaction pcierr_action = {
119 jmr3927_pcierr_interrupt, 0, CPU_MASK_NONE, "PCI error", NULL, NULL, 121 .handler = jmr3927_pcierr_interrupt,
122 .mask = CPU_MASK_NONE,
123 .name = "PCI error",
120}; 124};
121 125
122static void __init jmr3927_irq_init(void); 126static void __init jmr3927_irq_init(void);
diff --git a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c
index 4f4359bfd180..60021647cac1 100644
--- a/arch/mips/kernel/i8259.c
+++ b/arch/mips/kernel/i8259.c
@@ -303,7 +303,9 @@ void init_8259A(int auto_eoi)
303 * IRQ2 is cascade interrupt to second interrupt controller 303 * IRQ2 is cascade interrupt to second interrupt controller
304 */ 304 */
305static struct irqaction irq2 = { 305static struct irqaction irq2 = {
306 no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL 306 .handler = no_action,
307 .mask = CPU_MASK_NONE,
308 .name = "cascade",
307}; 309};
308 310
309static struct resource pic1_io_resource = { 311static struct resource pic1_io_resource = {
diff --git a/arch/mips/sgi-ip32/ip32-irq.c b/arch/mips/sgi-ip32/ip32-irq.c
index fb9da9acf53f..5bad1b744d0f 100644
--- a/arch/mips/sgi-ip32/ip32-irq.c
+++ b/arch/mips/sgi-ip32/ip32-irq.c
@@ -117,10 +117,18 @@ static void inline flush_mace_bus(void)
117extern irqreturn_t crime_memerr_intr(int irq, void *dev_id); 117extern irqreturn_t crime_memerr_intr(int irq, void *dev_id);
118extern irqreturn_t crime_cpuerr_intr(int irq, void *dev_id); 118extern irqreturn_t crime_cpuerr_intr(int irq, void *dev_id);
119 119
120struct irqaction memerr_irq = { crime_memerr_intr, IRQF_DISABLED, 120struct irqaction memerr_irq = {
121 CPU_MASK_NONE, "CRIME memory error", NULL, NULL }; 121 .handler = crime_memerr_intr,
122struct irqaction cpuerr_irq = { crime_cpuerr_intr, IRQF_DISABLED, 122 .flags = IRQF_DISABLED,
123 CPU_MASK_NONE, "CRIME CPU error", NULL, NULL }; 123 .mask = CPU_MASK_NONE,
124 .name = "CRIME memory error",
125};
126struct irqaction cpuerr_irq = {
127 .handler = crime_cpuerr_intr,
128 .flags = IRQF_DISABLED,
129 .mask = CPU_MASK_NONE,
130 .name = "CRIME CPU error",
131};
124 132
125/* 133/*
126 * For interrupts wired from a single device to the CPU. Only the clock 134 * For interrupts wired from a single device to the CPU. Only the clock
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
index 9607ad5e734a..551235648811 100644
--- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
+++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
@@ -243,10 +243,12 @@ int toshiba_rbtx4927_irq_nested(int sw_irq)
243 return (sw_irq); 243 return (sw_irq);
244} 244}
245 245
246//#define TOSHIBA_RBTX4927_PIC_ACTION(s) { no_action, 0, CPU_MASK_NONE, s, NULL, NULL } 246static struct irqaction toshiba_rbtx4927_irq_ioc_action = {
247#define TOSHIBA_RBTX4927_PIC_ACTION(s) { no_action, IRQF_SHARED, CPU_MASK_NONE, s, NULL, NULL } 247 .handler = no_action,
248static struct irqaction toshiba_rbtx4927_irq_ioc_action = 248 .flags = IRQF_SHARED,
249TOSHIBA_RBTX4927_PIC_ACTION(TOSHIBA_RBTX4927_IOC_NAME); 249 .mask = CPU_MASK_NONE,
250 .name = TOSHIBA_RBTX4927_IOC_NAME
251};
250 252
251 253
252/**********************************************************************************/ 254/**********************************************************************************/