diff options
author | Paul Mundt <lethal@linux-sh.org> | 2010-03-29 04:45:12 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2010-03-29 04:45:12 -0400 |
commit | f4221802ea3a28f7c16d157ac6f697d58267cb58 (patch) | |
tree | 4ab937dddbfae1a9f19f84d9d9eb691fd0f76a4f /arch | |
parent | 04b1731766b22cd41a0acd480e3206e93f2d5931 (diff) |
sh: sh7723 clkdev lookups.
Convert to TMU clock lookups for SH7723.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/clock-sh7723.c | 46 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-sh7723.c | 7 |
2 files changed, 42 insertions, 11 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c index 4d4c123d02c4..fc86c88223f4 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c | |||
@@ -21,6 +21,8 @@ | |||
21 | #include <linux/init.h> | 21 | #include <linux/init.h> |
22 | #include <linux/kernel.h> | 22 | #include <linux/kernel.h> |
23 | #include <linux/io.h> | 23 | #include <linux/io.h> |
24 | #include <linux/clk.h> | ||
25 | #include <asm/clkdev.h> | ||
24 | #include <asm/clock.h> | 26 | #include <asm/clock.h> |
25 | #include <asm/hwblk.h> | 27 | #include <asm/hwblk.h> |
26 | #include <cpu/sh7723.h> | 28 | #include <cpu/sh7723.h> |
@@ -171,11 +173,11 @@ static struct clk mstp_clks[] = { | |||
171 | SH_HWBLK_CLK("sh0", -1, SH_CLK, HWBLK_SHYWAY, CLK_ENABLE_ON_INIT), | 173 | SH_HWBLK_CLK("sh0", -1, SH_CLK, HWBLK_SHYWAY, CLK_ENABLE_ON_INIT), |
172 | SH_HWBLK_CLK("hudi0", -1, P_CLK, HWBLK_HUDI, 0), | 174 | SH_HWBLK_CLK("hudi0", -1, P_CLK, HWBLK_HUDI, 0), |
173 | SH_HWBLK_CLK("ubc0", -1, I_CLK, HWBLK_UBC, 0), | 175 | SH_HWBLK_CLK("ubc0", -1, I_CLK, HWBLK_UBC, 0), |
174 | SH_HWBLK_CLK("tmu0", -1, P_CLK, HWBLK_TMU0, 0), | 176 | SH_HWBLK_CLK("tmu012_fck", -1, P_CLK, HWBLK_TMU0, 0), |
175 | SH_HWBLK_CLK("cmt0", -1, R_CLK, HWBLK_CMT, 0), | 177 | SH_HWBLK_CLK("cmt_fck", -1, R_CLK, HWBLK_CMT, 0), |
176 | SH_HWBLK_CLK("rwdt0", -1, R_CLK, HWBLK_RWDT, 0), | 178 | SH_HWBLK_CLK("rwdt0", -1, R_CLK, HWBLK_RWDT, 0), |
177 | SH_HWBLK_CLK("dmac1", -1, B_CLK, HWBLK_DMAC1, 0), | 179 | SH_HWBLK_CLK("dmac1", -1, B_CLK, HWBLK_DMAC1, 0), |
178 | SH_HWBLK_CLK("tmu1", -1, P_CLK, HWBLK_TMU1, 0), | 180 | SH_HWBLK_CLK("tmu345_fck", -1, P_CLK, HWBLK_TMU1, 0), |
179 | SH_HWBLK_CLK("flctl0", -1, P_CLK, HWBLK_FLCTL, 0), | 181 | SH_HWBLK_CLK("flctl0", -1, P_CLK, HWBLK_FLCTL, 0), |
180 | SH_HWBLK_CLK("sci_fck", 0, P_CLK, HWBLK_SCIF0, 0), | 182 | SH_HWBLK_CLK("sci_fck", 0, P_CLK, HWBLK_SCIF0, 0), |
181 | SH_HWBLK_CLK("sci_fck", 1, P_CLK, HWBLK_SCIF1, 0), | 183 | SH_HWBLK_CLK("sci_fck", 1, P_CLK, HWBLK_SCIF1, 0), |
@@ -211,6 +213,40 @@ static struct clk mstp_clks[] = { | |||
211 | SH_HWBLK_CLK("lcdc0", -1, B_CLK, HWBLK_LCDC, 0), | 213 | SH_HWBLK_CLK("lcdc0", -1, B_CLK, HWBLK_LCDC, 0), |
212 | }; | 214 | }; |
213 | 215 | ||
216 | static struct clk_lookup lookups[] = { | ||
217 | { | ||
218 | /* TMU0 */ | ||
219 | .dev_id = "sh_tmu.0", | ||
220 | .con_id = "tmu_fck", | ||
221 | .clk = &mstp_clks[11], /* tmu012_fck */ | ||
222 | }, { | ||
223 | /* TMU1 */ | ||
224 | .dev_id = "sh_tmu.1", | ||
225 | .con_id = "tmu_fck", | ||
226 | .clk = &mstp_clks[11], | ||
227 | }, { | ||
228 | /* TMU2 */ | ||
229 | .dev_id = "sh_tmu.2", | ||
230 | .con_id = "tmu_fck", | ||
231 | .clk = &mstp_clks[11], | ||
232 | }, { | ||
233 | /* TMU3 */ | ||
234 | .dev_id = "sh_tmu.3", | ||
235 | .con_id = "tmu_fck", | ||
236 | .clk = &mstp_clks[15], /* tmu345_fck */ | ||
237 | }, { | ||
238 | /* TMU4 */ | ||
239 | .dev_id = "sh_tmu.4", | ||
240 | .con_id = "tmu_fck", | ||
241 | .clk = &mstp_clks[15], | ||
242 | }, { | ||
243 | /* TMU5 */ | ||
244 | .dev_id = "sh_tmu.5", | ||
245 | .con_id = "tmu_fck", | ||
246 | .clk = &mstp_clks[15], | ||
247 | }, | ||
248 | }; | ||
249 | |||
214 | int __init arch_clk_init(void) | 250 | int __init arch_clk_init(void) |
215 | { | 251 | { |
216 | int k, ret = 0; | 252 | int k, ret = 0; |
@@ -222,7 +258,9 @@ int __init arch_clk_init(void) | |||
222 | pll_clk.parent = &extal_clk; | 258 | pll_clk.parent = &extal_clk; |
223 | 259 | ||
224 | for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++) | 260 | for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++) |
225 | ret = clk_register(main_clks[k]); | 261 | ret |= clk_register(main_clks[k]); |
262 | |||
263 | clkdev_add_table(lookups, ARRAY_SIZE(lookups)); | ||
226 | 264 | ||
227 | if (!ret) | 265 | if (!ret) |
228 | ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); | 266 | ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); |
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c index 187462b51be0..0eadefdbbba1 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c | |||
@@ -207,7 +207,6 @@ static struct platform_device veu1_device = { | |||
207 | static struct sh_timer_config cmt_platform_data = { | 207 | static struct sh_timer_config cmt_platform_data = { |
208 | .channel_offset = 0x60, | 208 | .channel_offset = 0x60, |
209 | .timer_bit = 5, | 209 | .timer_bit = 5, |
210 | .clk = "cmt0", | ||
211 | .clockevent_rating = 125, | 210 | .clockevent_rating = 125, |
212 | .clocksource_rating = 125, | 211 | .clocksource_rating = 125, |
213 | }; | 212 | }; |
@@ -240,7 +239,6 @@ static struct platform_device cmt_device = { | |||
240 | static struct sh_timer_config tmu0_platform_data = { | 239 | static struct sh_timer_config tmu0_platform_data = { |
241 | .channel_offset = 0x04, | 240 | .channel_offset = 0x04, |
242 | .timer_bit = 0, | 241 | .timer_bit = 0, |
243 | .clk = "tmu0", | ||
244 | .clockevent_rating = 200, | 242 | .clockevent_rating = 200, |
245 | }; | 243 | }; |
246 | 244 | ||
@@ -272,7 +270,6 @@ static struct platform_device tmu0_device = { | |||
272 | static struct sh_timer_config tmu1_platform_data = { | 270 | static struct sh_timer_config tmu1_platform_data = { |
273 | .channel_offset = 0x10, | 271 | .channel_offset = 0x10, |
274 | .timer_bit = 1, | 272 | .timer_bit = 1, |
275 | .clk = "tmu0", | ||
276 | .clocksource_rating = 200, | 273 | .clocksource_rating = 200, |
277 | }; | 274 | }; |
278 | 275 | ||
@@ -304,7 +301,6 @@ static struct platform_device tmu1_device = { | |||
304 | static struct sh_timer_config tmu2_platform_data = { | 301 | static struct sh_timer_config tmu2_platform_data = { |
305 | .channel_offset = 0x1c, | 302 | .channel_offset = 0x1c, |
306 | .timer_bit = 2, | 303 | .timer_bit = 2, |
307 | .clk = "tmu0", | ||
308 | }; | 304 | }; |
309 | 305 | ||
310 | static struct resource tmu2_resources[] = { | 306 | static struct resource tmu2_resources[] = { |
@@ -335,7 +331,6 @@ static struct platform_device tmu2_device = { | |||
335 | static struct sh_timer_config tmu3_platform_data = { | 331 | static struct sh_timer_config tmu3_platform_data = { |
336 | .channel_offset = 0x04, | 332 | .channel_offset = 0x04, |
337 | .timer_bit = 0, | 333 | .timer_bit = 0, |
338 | .clk = "tmu1", | ||
339 | }; | 334 | }; |
340 | 335 | ||
341 | static struct resource tmu3_resources[] = { | 336 | static struct resource tmu3_resources[] = { |
@@ -366,7 +361,6 @@ static struct platform_device tmu3_device = { | |||
366 | static struct sh_timer_config tmu4_platform_data = { | 361 | static struct sh_timer_config tmu4_platform_data = { |
367 | .channel_offset = 0x10, | 362 | .channel_offset = 0x10, |
368 | .timer_bit = 1, | 363 | .timer_bit = 1, |
369 | .clk = "tmu1", | ||
370 | }; | 364 | }; |
371 | 365 | ||
372 | static struct resource tmu4_resources[] = { | 366 | static struct resource tmu4_resources[] = { |
@@ -397,7 +391,6 @@ static struct platform_device tmu4_device = { | |||
397 | static struct sh_timer_config tmu5_platform_data = { | 391 | static struct sh_timer_config tmu5_platform_data = { |
398 | .channel_offset = 0x1c, | 392 | .channel_offset = 0x1c, |
399 | .timer_bit = 2, | 393 | .timer_bit = 2, |
400 | .clk = "tmu1", | ||
401 | }; | 394 | }; |
402 | 395 | ||
403 | static struct resource tmu5_resources[] = { | 396 | static struct resource tmu5_resources[] = { |