ARM/ASoC: omap-mcbsp: Remove CLKR/FSR mux configuration code

Remove the feature to configure the CLKR/FSR mux on McBSP port with 6pin
configuration.
When moving to devicetree these callback can no longer be used in a clean
way anymore.
If a board require to change the 6pin port to work in 4pin setup it needs
to set up the mux in the board file.
For OMAP2/3:
u32 devconf0;

/* McBSP1 CLKR/FSR signal to be connected to CLKX/FSX pin */
devconf0 = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
devconf0 |=  OMAP2_MCBSP1_CLKR_MASK | OMAP2_MCBSP1_FSR_MASK;
omap_ctrl_writel(devconf0, OMAP2_CONTROL_DEVCONF0);

For OMAP4:
u32 mcbsp_pad;

/* McBSP4 CLKR/FSR signal to be connected to CLKX/FSX pin */
mcbsp_pad = omap4_ctrl_pad_readl(OMAP2_CONTROL_DEVCONF0);
mcbsp_pad |=  ((1 << 31) | (1 << 30));
omap4_ctrl_pad_writel(mcbsp_pad, OMAP2_CONTROL_DEVCONF0);

In case when the kernel is booted with DT blob the pinctrl-single will be
provided as soon as it is enabled on the platform.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Jarkko Nikula <jarkko.nikula@bitmer.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>

2 files changed, 0 insertions, 78 deletions

diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index 6e046e1111b1..660e00b3ef82 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -25,8 +25,6 @@
 #include <plat/omap_device.h>
 #include <linux/pm_runtime.h>
 
-#include "control.h"
-
 /*
  * FIXME: Find a mechanism to enable/disable runtime the McBSP ICLK autoidle.
  * Sidetone needs non-gated ICLK and sidetone autoidle is broken.
@@ -34,73 +32,6 @@
 #include "cm2xxx_3xxx.h"
 #include "cm-regbits-34xx.h"
 
-/* McBSP1 internal signal muxing function for OMAP2/3 */
-static int omap2_mcbsp1_mux_rx_clk(struct device *dev, const char *signal,
-                                   const char *src)
-{
-        u32 v;
-
-        v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
-
-        if (!strcmp(signal, "clkr")) {
-                if (!strcmp(src, "clkr"))
-                        v &= ~OMAP2_MCBSP1_CLKR_MASK;
-                else if (!strcmp(src, "clkx"))
-                        v |= OMAP2_MCBSP1_CLKR_MASK;
-                else
-                        return -EINVAL;
-        } else if (!strcmp(signal, "fsr")) {
-                if (!strcmp(src, "fsr"))
-                        v &= ~OMAP2_MCBSP1_FSR_MASK;
-                else if (!strcmp(src, "fsx"))
-                        v |= OMAP2_MCBSP1_FSR_MASK;
-                else
-                        return -EINVAL;
-        } else {
-                return -EINVAL;
-        }
-
-        omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
-
-        return 0;
-}
-
-/* McBSP4 internal signal muxing function for OMAP4 */
-#define OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_FSX     (1 << 31)
-#define OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_CLKX    (1 << 30)
-static int omap4_mcbsp4_mux_rx_clk(struct device *dev, const char *signal,
-                                   const char *src)
-{
-        u32 v;
-
-        /*
-         * In CONTROL_MCBSPLP register only bit 30 (CLKR mux), and bit 31 (FSR
-         * mux) is used */
-        v = omap4_ctrl_pad_readl(OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MCBSPLP);
-
-        if (!strcmp(signal, "clkr")) {
-                if (!strcmp(src, "clkr"))
-                        v &= ~OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_CLKX;
-                else if (!strcmp(src, "clkx"))
-                        v |= OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_CLKX;
-                else
-                        return -EINVAL;
-        } else if (!strcmp(signal, "fsr")) {
-                if (!strcmp(src, "fsr"))
-                        v &= ~OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_FSX;
-                else if (!strcmp(src, "fsx"))
-                        v |= OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_FSX;
-                else
-                        return -EINVAL;
-        } else {
-                return -EINVAL;
-        }
-
-        omap4_ctrl_pad_writel(v, OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MCBSPLP);
-
-        return 0;
-}
-
 static int omap3_enable_st_clock(unsigned int id, bool enable)
 {
         unsigned int w;
@@ -143,14 +74,6 @@ static int __init omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
                 pdata->has_ccr = true;
         }
 
-        /* On OMAP2/3 the McBSP1 port has 6 pin configuration */
-        if (id == 1 && oh->class->rev < MCBSP_CONFIG_TYPE4)
-                pdata->mux_signal = omap2_mcbsp1_mux_rx_clk;
-
-        /* On OMAP4 the McBSP4 port has 6 pin configuration */
-        if (id == 4 && oh->class->rev == MCBSP_CONFIG_TYPE4)
-                pdata->mux_signal = omap4_mcbsp4_mux_rx_clk;
-
         if (oh->class->rev == MCBSP_CONFIG_TYPE2) {
                 /* The FIFO has 128 locations */
                 pdata->buffer_size = 0x80;
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h
index 0a7d5ca471e0..c78d90b28b19 100644
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
@@ -47,7 +47,6 @@ struct omap_mcbsp_platform_data {
         bool has_wakeup; /* Wakeup capability */
         bool has_ccr; /* Transceiver has configuration control registers */
         int (*enable_st_clock)(unsigned int, bool);
-        int (*mux_signal)(struct device *dev, const char *signal, const char *src);
 };
 
 /**