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authorPaul Walmsley <paul@pwsan.com>2011-09-14 19:23:39 -0400
committerPaul Walmsley <paul@pwsan.com>2011-09-14 19:23:39 -0400
commit00c46b3069c1ee9aa31db3057e9224685af52efa (patch)
tree473f87e3733e20a31b663fb346e44f36cf1cb0d4 /arch
parentd6504acd2125984c61dce24727dd3842d0144015 (diff)
OMAP: id: remove OMAP_CHIP declarations, code
Now that all of the users of the OMAP_CHIP bitfield code have been converted to use lists, the OMAP_CHIP code, data, and declarations can be removed. Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-omap2/id.c55
-rw-r--r--arch/arm/plat-omap/include/plat/clock.h2
-rw-r--r--arch/arm/plat-omap/include/plat/cpu.h62
3 files changed, 0 insertions, 119 deletions
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index ed1d43923d1c..d27daf921c7e 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -28,7 +28,6 @@
28 28
29#include "control.h" 29#include "control.h"
30 30
31static struct omap_chip_id omap_chip;
32static unsigned int omap_revision; 31static unsigned int omap_revision;
33 32
34u32 omap_features; 33u32 omap_features;
@@ -39,19 +38,6 @@ unsigned int omap_rev(void)
39} 38}
40EXPORT_SYMBOL(omap_rev); 39EXPORT_SYMBOL(omap_rev);
41 40
42/**
43 * omap_chip_is - test whether currently running OMAP matches a chip type
44 * @oc: omap_chip_t to test against
45 *
46 * Test whether the currently-running OMAP chip matches the supplied
47 * chip type 'oc'. Returns 1 upon a match; 0 upon failure.
48 */
49int omap_chip_is(struct omap_chip_id oci)
50{
51 return (oci.oc & omap_chip.oc) ? 1 : 0;
52}
53EXPORT_SYMBOL(omap_chip_is);
54
55int omap_type(void) 41int omap_type(void)
56{ 42{
57 u32 val = 0; 43 u32 val = 0;
@@ -248,8 +234,6 @@ static void __init omap3_check_revision(const char **cpu_rev)
248 u16 hawkeye; 234 u16 hawkeye;
249 u8 rev; 235 u8 rev;
250 236
251 omap_chip.oc = CHIP_IS_OMAP3430;
252
253 /* 237 /*
254 * We cannot access revision registers on ES1.0. 238 * We cannot access revision registers on ES1.0.
255 * If the processor type is Cortex-A8 and the revision is 0x0 239 * If the processor type is Cortex-A8 and the revision is 0x0
@@ -258,7 +242,6 @@ static void __init omap3_check_revision(const char **cpu_rev)
258 cpuid = read_cpuid(CPUID_ID); 242 cpuid = read_cpuid(CPUID_ID);
259 if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) { 243 if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) {
260 omap_revision = OMAP3430_REV_ES1_0; 244 omap_revision = OMAP3430_REV_ES1_0;
261 omap_chip.oc |= CHIP_IS_OMAP3430ES1;
262 *cpu_rev = "1.0"; 245 *cpu_rev = "1.0";
263 return; 246 return;
264 } 247 }
@@ -280,22 +263,18 @@ static void __init omap3_check_revision(const char **cpu_rev)
280 case 0: /* Take care of early samples */ 263 case 0: /* Take care of early samples */
281 case 1: 264 case 1:
282 omap_revision = OMAP3430_REV_ES2_0; 265 omap_revision = OMAP3430_REV_ES2_0;
283 omap_chip.oc |= CHIP_IS_OMAP3430ES2;
284 *cpu_rev = "2.0"; 266 *cpu_rev = "2.0";
285 break; 267 break;
286 case 2: 268 case 2:
287 omap_revision = OMAP3430_REV_ES2_1; 269 omap_revision = OMAP3430_REV_ES2_1;
288 omap_chip.oc |= CHIP_IS_OMAP3430ES2;
289 *cpu_rev = "2.1"; 270 *cpu_rev = "2.1";
290 break; 271 break;
291 case 3: 272 case 3:
292 omap_revision = OMAP3430_REV_ES3_0; 273 omap_revision = OMAP3430_REV_ES3_0;
293 omap_chip.oc |= CHIP_IS_OMAP3430ES3_0;
294 *cpu_rev = "3.0"; 274 *cpu_rev = "3.0";
295 break; 275 break;
296 case 4: 276 case 4:
297 omap_revision = OMAP3430_REV_ES3_1; 277 omap_revision = OMAP3430_REV_ES3_1;
298 omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
299 *cpu_rev = "3.1"; 278 *cpu_rev = "3.1";
300 break; 279 break;
301 case 7: 280 case 7:
@@ -303,9 +282,6 @@ static void __init omap3_check_revision(const char **cpu_rev)
303 default: 282 default:
304 /* Use the latest known revision as default */ 283 /* Use the latest known revision as default */
305 omap_revision = OMAP3430_REV_ES3_1_2; 284 omap_revision = OMAP3430_REV_ES3_1_2;
306
307 /* REVISIT: Add CHIP_IS_OMAP3430ES3_1_2? */
308 omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
309 *cpu_rev = "3.1.2"; 285 *cpu_rev = "3.1.2";
310 } 286 }
311 break; 287 break;
@@ -315,8 +291,6 @@ static void __init omap3_check_revision(const char **cpu_rev)
315 * 291 *
316 * Set the device to be OMAP3517 here. Actual device 292 * Set the device to be OMAP3517 here. Actual device
317 * is identified later based on the features. 293 * is identified later based on the features.
318 *
319 * REVISIT: AM3505/AM3517 should have their own CHIP_IS
320 */ 294 */
321 switch (rev) { 295 switch (rev) {
322 case 0: 296 case 0:
@@ -329,11 +303,9 @@ static void __init omap3_check_revision(const char **cpu_rev)
329 omap_revision = OMAP3517_REV_ES1_1; 303 omap_revision = OMAP3517_REV_ES1_1;
330 *cpu_rev = "1.1"; 304 *cpu_rev = "1.1";
331 } 305 }
332 omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
333 break; 306 break;
334 case 0xb891: 307 case 0xb891:
335 /* Handle 36xx devices */ 308 /* Handle 36xx devices */
336 omap_chip.oc |= CHIP_IS_OMAP3630ES1;
337 309
338 switch(rev) { 310 switch(rev) {
339 case 0: /* Take care of early samples */ 311 case 0: /* Take care of early samples */
@@ -342,20 +314,16 @@ static void __init omap3_check_revision(const char **cpu_rev)
342 break; 314 break;
343 case 1: 315 case 1:
344 omap_revision = OMAP3630_REV_ES1_1; 316 omap_revision = OMAP3630_REV_ES1_1;
345 omap_chip.oc |= CHIP_IS_OMAP3630ES1_1;
346 *cpu_rev = "1.1"; 317 *cpu_rev = "1.1";
347 break; 318 break;
348 case 2: 319 case 2:
349 /* FALLTHROUGH */ 320 /* FALLTHROUGH */
350 default: 321 default:
351 omap_revision = OMAP3630_REV_ES1_2; 322 omap_revision = OMAP3630_REV_ES1_2;
352 omap_chip.oc |= CHIP_IS_OMAP3630ES1_2;
353 *cpu_rev = "1.2"; 323 *cpu_rev = "1.2";
354 } 324 }
355 break; 325 break;
356 case 0xb81e: 326 case 0xb81e:
357 omap_chip.oc = CHIP_IS_TI816X;
358
359 switch (rev) { 327 switch (rev) {
360 case 0: 328 case 0:
361 omap_revision = TI8168_REV_ES1_0; 329 omap_revision = TI8168_REV_ES1_0;
@@ -372,7 +340,6 @@ static void __init omap3_check_revision(const char **cpu_rev)
372 default: 340 default:
373 /* Unknown default to latest silicon rev as default */ 341 /* Unknown default to latest silicon rev as default */
374 omap_revision = OMAP3630_REV_ES1_2; 342 omap_revision = OMAP3630_REV_ES1_2;
375 omap_chip.oc |= CHIP_IS_OMAP3630ES1_2;
376 *cpu_rev = "1.2"; 343 *cpu_rev = "1.2";
377 pr_warn("Warning: unknown chip type; assuming OMAP3630ES1.2\n"); 344 pr_warn("Warning: unknown chip type; assuming OMAP3630ES1.2\n");
378 } 345 }
@@ -407,24 +374,20 @@ static void __init omap4_check_revision(void)
407 switch (rev) { 374 switch (rev) {
408 case 0: 375 case 0:
409 omap_revision = OMAP4430_REV_ES1_0; 376 omap_revision = OMAP4430_REV_ES1_0;
410 omap_chip.oc |= CHIP_IS_OMAP4430ES1;
411 break; 377 break;
412 case 1: 378 case 1:
413 default: 379 default:
414 omap_revision = OMAP4430_REV_ES2_0; 380 omap_revision = OMAP4430_REV_ES2_0;
415 omap_chip.oc |= CHIP_IS_OMAP4430ES2;
416 } 381 }
417 break; 382 break;
418 case 0xb95c: 383 case 0xb95c:
419 switch (rev) { 384 switch (rev) {
420 case 3: 385 case 3:
421 omap_revision = OMAP4430_REV_ES2_1; 386 omap_revision = OMAP4430_REV_ES2_1;
422 omap_chip.oc |= CHIP_IS_OMAP4430ES2_1;
423 break; 387 break;
424 case 4: 388 case 4:
425 default: 389 default:
426 omap_revision = OMAP4430_REV_ES2_2; 390 omap_revision = OMAP4430_REV_ES2_2;
427 omap_chip.oc |= CHIP_IS_OMAP4430ES2_2;
428 } 391 }
429 break; 392 break;
430 case 0xb94e: 393 case 0xb94e:
@@ -432,14 +395,12 @@ static void __init omap4_check_revision(void)
432 case 0: 395 case 0:
433 default: 396 default:
434 omap_revision = OMAP4460_REV_ES1_0; 397 omap_revision = OMAP4460_REV_ES1_0;
435 omap_chip.oc |= CHIP_IS_OMAP4460ES1_0;
436 break; 398 break;
437 } 399 }
438 break; 400 break;
439 default: 401 default:
440 /* Unknown default to latest silicon rev as default */ 402 /* Unknown default to latest silicon rev as default */
441 omap_revision = OMAP4430_REV_ES2_2; 403 omap_revision = OMAP4430_REV_ES2_2;
442 omap_chip.oc |= CHIP_IS_OMAP4430ES2_2;
443 } 404 }
444 405
445 pr_info("OMAP%04x ES%d.%d\n", omap_rev() >> 16, 406 pr_info("OMAP%04x ES%d.%d\n", omap_rev() >> 16,
@@ -523,22 +484,6 @@ void __init omap2_check_revision(void)
523 } else { 484 } else {
524 pr_err("OMAP revision unknown, please fix!\n"); 485 pr_err("OMAP revision unknown, please fix!\n");
525 } 486 }
526
527 /*
528 * OK, now we know the exact revision. Initialize omap_chip bits
529 * for powerdowmain and clockdomain code.
530 */
531 if (cpu_is_omap243x()) {
532 /* Currently only supports 2430ES2.1 and 2430-all */
533 omap_chip.oc |= CHIP_IS_OMAP2430;
534 return;
535 } else if (cpu_is_omap242x()) {
536 /* Currently only supports 2420ES2.1.1 and 2420-all */
537 omap_chip.oc |= CHIP_IS_OMAP2420;
538 return;
539 }
540
541 pr_err("Uninitialized omap_chip, please fix!\n");
542} 487}
543 488
544/* 489/*
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h
index df4b9683f17f..197ca03c3f7d 100644
--- a/arch/arm/plat-omap/include/plat/clock.h
+++ b/arch/arm/plat-omap/include/plat/clock.h
@@ -80,8 +80,6 @@ struct clkops {
80 * 80 *
81 * @div is the divisor that should be applied to the parent clock's rate 81 * @div is the divisor that should be applied to the parent clock's rate
82 * to produce the current clock's rate. 82 * to produce the current clock's rate.
83 *
84 * XXX @flags probably should be replaced with an struct omap_chip.
85 */ 83 */
86struct clksel_rate { 84struct clksel_rate {
87 u32 val; 85 u32 val;
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index ddbc0254e3f6..2f9026942229 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -44,13 +44,6 @@
44 44
45int omap_type(void); 45int omap_type(void);
46 46
47struct omap_chip_id {
48 u16 oc;
49 u8 type;
50};
51
52#define OMAP_CHIP_INIT(x) { .oc = x }
53
54/* 47/*
55 * omap_rev bits: 48 * omap_rev bits:
56 * CPU id bits (0730, 1510, 1710, 2422...) [31:16] 49 * CPU id bits (0730, 1510, 1710, 2422...) [31:16]
@@ -402,61 +395,6 @@ IS_OMAP_TYPE(3517, 0x3517)
402#define OMAP446X_CLASS 0x44600044 395#define OMAP446X_CLASS 0x44600044
403#define OMAP4460_REV_ES1_0 (OMAP446X_CLASS | (0x10 << 8)) 396#define OMAP4460_REV_ES1_0 (OMAP446X_CLASS | (0x10 << 8))
404 397
405/*
406 * omap_chip bits
407 *
408 * CHIP_IS_OMAP{2420,2430,3430} indicate that a particular structure is
409 * valid on all chips of that type. CHIP_IS_OMAP3430ES{1,2} indicates
410 * something that is only valid on that particular ES revision.
411 *
412 * These bits may be ORed together to indicate structures that are
413 * available on multiple chip types.
414 *
415 * To test whether a particular structure matches the current OMAP chip type,
416 * use omap_chip_is().
417 *
418 */
419#define CHIP_IS_OMAP2420 (1 << 0)
420#define CHIP_IS_OMAP2430 (1 << 1)
421#define CHIP_IS_OMAP3430 (1 << 2)
422#define CHIP_IS_OMAP3430ES1 (1 << 3)
423#define CHIP_IS_OMAP3430ES2 (1 << 4)
424#define CHIP_IS_OMAP3430ES3_0 (1 << 5)
425#define CHIP_IS_OMAP3430ES3_1 (1 << 6)
426#define CHIP_IS_OMAP3630ES1 (1 << 7)
427#define CHIP_IS_OMAP4430ES1 (1 << 8)
428#define CHIP_IS_OMAP3630ES1_1 (1 << 9)
429#define CHIP_IS_OMAP3630ES1_2 (1 << 10)
430#define CHIP_IS_OMAP4430ES2 (1 << 11)
431#define CHIP_IS_OMAP4430ES2_1 (1 << 12)
432#define CHIP_IS_OMAP4430ES2_2 (1 << 13)
433#define CHIP_IS_TI816X (1 << 14)
434#define CHIP_IS_OMAP4460ES1_0 (1 << 15)
435
436#define CHIP_IS_OMAP24XX (CHIP_IS_OMAP2420 | CHIP_IS_OMAP2430)
437
438#define CHIP_IS_OMAP4430 (CHIP_IS_OMAP4430ES1 | \
439 CHIP_IS_OMAP4430ES2 | \
440 CHIP_IS_OMAP4430ES2_1 | \
441 CHIP_IS_OMAP4430ES2_2 | \
442 CHIP_IS_OMAP4460ES1_0)
443
444/*
445 * "GE" here represents "greater than or equal to" in terms of ES
446 * levels. So CHIP_GE_OMAP3430ES2 is intended to match all OMAP3430
447 * chips at ES2 and beyond, but not, for example, any OMAP lines after
448 * OMAP3.
449 */
450#define CHIP_GE_OMAP3430ES2 (CHIP_IS_OMAP3430ES2 | \
451 CHIP_IS_OMAP3430ES3_0 | \
452 CHIP_GE_OMAP3430ES3_1)
453#define CHIP_GE_OMAP3430ES3_1 (CHIP_IS_OMAP3430ES3_1 | \
454 CHIP_IS_OMAP3630ES1 | \
455 CHIP_GE_OMAP3630ES1_1)
456#define CHIP_GE_OMAP3630ES1_1 (CHIP_IS_OMAP3630ES1_1 | \
457 CHIP_IS_OMAP3630ES1_2)
458
459int omap_chip_is(struct omap_chip_id oci);
460void omap2_check_revision(void); 398void omap2_check_revision(void);
461 399
462/* 400/*