Merge branch 'master'

author: Jeff Garzik <jgarzik@pobox.com> 2005-11-11 23:39:35 -0500
committer: Jeff Garzik <jgarzik@pobox.com> 2005-11-11 23:39:35 -0500
commit: f4256e301d9800b1e0276404cb01b3ac85b51067 (patch)
tree: 975f56627b78f757608b31684311a24ca1478481 /arch
parent: fb2a26b9f8f5eda6b96ba9753edf105e5999d6d9 (diff)
parent: cd52d1ee9a92587b242d946a2300a3245d3b885a (diff)
316 files changed, 16300 insertions, 5933 deletions
diff --git a/arch/alpha/kernel/process.c b/arch/alpha/kernel/process.c
index eb20c3afff58..a8682612abc0 100644
--- a/arch/alpha/kernel/process.c
+++ b/arch/alpha/kernel/process.c
@@ -43,21 +43,17 @@
 #include "proto.h"
 #include "pci_impl.h"
-void default_idle(void)
-{
-        barrier();
-}
 void
 cpu_idle(void)
 {
+        set_thread_flag(TIF_POLLING_NRFLAG);
        while (1) {
-                void (*idle)(void) = default_idle;
                /* FIXME -- EV6 and LCA45 know how to power down
                   the CPU.  */
                while (!need_resched())
-                        idle();
+                        cpu_relax();
                schedule();
        }
 }
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 3bfef0934c9d..3df7cbd924a1 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -239,6 +239,8 @@ source "arch/arm/plat-omap/Kconfig"
 source "arch/arm/mach-omap1/Kconfig"
+source "arch/arm/mach-omap2/Kconfig"
 source "arch/arm/mach-s3c2410/Kconfig"
 source "arch/arm/mach-lh7a40x/Kconfig"
@@ -358,7 +360,7 @@ config HOTPLUG_CPU
 config LOCAL_TIMERS
        bool "Use local timer interrupts"
-        depends on SMP && n
+        depends on SMP && REALVIEW_MPCORE
        default y
        help
          Enable support for local timers on SMP platforms, rather then the
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 114cda7f1b73..81bd2193fe6d 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -93,6 +93,7 @@ textaddr-$(CONFIG_ARCH_FORTUNET)   := 0xc0008000
 machine-$(CONFIG_ARCH_IXP4XX)     := ixp4xx
 machine-$(CONFIG_ARCH_IXP2000)    := ixp2000
 machine-$(CONFIG_ARCH_OMAP1)      := omap1
+ machine-$(CONFIG_ARCH_OMAP2)      := omap2
  incdir-$(CONFIG_ARCH_OMAP)       := omap
 machine-$(CONFIG_ARCH_S3C2410)    := s3c2410
 machine-$(CONFIG_ARCH_LH7A40X)    := lh7a40x
diff --git a/arch/arm/common/locomo.c b/arch/arm/common/locomo.c
index ad55680726ed..557e52c1c869 100644
--- a/arch/arm/common/locomo.c
+++ b/arch/arm/common/locomo.c
@@ -550,9 +550,9 @@ struct locomo_save_data {
        u16     LCM_SPIMD;
 };
-static int locomo_suspend(struct device *dev, pm_message_t state)
+static int locomo_suspend(struct platform_device *dev, pm_message_t state)
 {
-        struct locomo *lchip = dev_get_drvdata(dev);
+        struct locomo *lchip = platform_get_drvdata(dev);
        struct locomo_save_data *save;
        unsigned long flags;
@@ -560,7 +560,7 @@ static int locomo_suspend(struct device *dev, pm_message_t state)
        if (!save)
                return -ENOMEM;
-        dev->power.saved_state = (void *) save;
+        dev->dev.power.saved_state = (void *) save;
        spin_lock_irqsave(&lchip->lock, flags);
@@ -594,14 +594,14 @@ static int locomo_suspend(struct device *dev, pm_message_t state)
        return 0;
 }
-static int locomo_resume(struct device *dev)
+static int locomo_resume(struct platform_device *dev)
 {
-        struct locomo *lchip = dev_get_drvdata(dev);
+        struct locomo *lchip = platform_get_drvdata(dev);
        struct locomo_save_data *save;
        unsigned long r;
        unsigned long flags;
        
-        save = (struct locomo_save_data *) dev->power.saved_state;
+        save = (struct locomo_save_data *) dev->dev.power.saved_state;
        if (!save)
                return 0;
@@ -760,27 +760,26 @@ static void __locomo_remove(struct locomo *lchip)
        kfree(lchip);
 }
-static int locomo_probe(struct device *dev)
+static int locomo_probe(struct platform_device *dev)
 {
-        struct platform_device *pdev = to_platform_device(dev);
        struct resource *mem;
        int irq;
-        mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        mem = platform_get_resource(dev, IORESOURCE_MEM, 0);
        if (!mem)
                return -EINVAL;
-        irq = platform_get_irq(pdev, 0);
+        irq = platform_get_irq(dev, 0);
-        return __locomo_probe(dev, mem, irq);
+        return __locomo_probe(&dev->dev, mem, irq);
 }
-static int locomo_remove(struct device *dev)
+static int locomo_remove(struct platform_device *dev)
 {
-        struct locomo *lchip = dev_get_drvdata(dev);
+        struct locomo *lchip = platform__get_drvdata(dev);
        if (lchip) {
                __locomo_remove(lchip);
-                dev_set_drvdata(dev, NULL);
+                platform_set_drvdata(dev, NULL);
        }
        return 0;
@@ -792,15 +791,16 @@ static int locomo_remove(struct device *dev)
 *      the per-machine level, and then have this driver pick
 *      up the registered devices.
 */
-static struct device_driver locomo_device_driver = {
+static struct platform_driver locomo_device_driver = {
-        .name           = "locomo",
-        .bus            = &platform_bus_type,
        .probe          = locomo_probe,
        .remove         = locomo_remove,
 #ifdef CONFIG_PM
        .suspend        = locomo_suspend,
        .resume         = locomo_resume,
 #endif
+        .driver         = {
+                .name   = "locomo",
+        },
 };
 /*
@@ -1126,13 +1126,13 @@ static int __init locomo_init(void)
 {
        int ret = bus_register(&locomo_bus_type);
        if (ret == 0)
-                driver_register(&locomo_device_driver);
+                platform_driver_register(&locomo_device_driver);
        return ret;
 }
 static void __exit locomo_exit(void)
 {
-        driver_unregister(&locomo_device_driver);
+        platform_driver_unregister(&locomo_device_driver);
        bus_unregister(&locomo_bus_type);
 }
diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c
index 174aa86ee816..7b07acb03f3b 100644
--- a/arch/arm/common/sa1111.c
+++ b/arch/arm/common/sa1111.c
@@ -801,9 +801,9 @@ struct sa1111_save_data {
 #ifdef CONFIG_PM
-static int sa1111_suspend(struct device *dev, pm_message_t state)
+static int sa1111_suspend(struct platform_device *dev, pm_message_t state)
 {
-        struct sa1111 *sachip = dev_get_drvdata(dev);
+        struct sa1111 *sachip = platform_get_drvdata(dev);
        struct sa1111_save_data *save;
        unsigned long flags;
        unsigned int val;
@@ -812,7 +812,7 @@ static int sa1111_suspend(struct device *dev, pm_message_t state)
        save = kmalloc(sizeof(struct sa1111_save_data), GFP_KERNEL);
        if (!save)
                return -ENOMEM;
-        dev->power.saved_state = save;
+        dev->dev.power.saved_state = save;
        spin_lock_irqsave(&sachip->lock, flags);
@@ -859,14 +859,14 @@ static int sa1111_suspend(struct device *dev, pm_message_t state)
 *      restored by their respective drivers, and must be called
 *      via LDM after this function.
 */
-static int sa1111_resume(struct device *dev)
+static int sa1111_resume(struct platform_device *dev)
 {
-        struct sa1111 *sachip = dev_get_drvdata(dev);
+        struct sa1111 *sachip = platform_get_drvdata(dev);
        struct sa1111_save_data *save;
        unsigned long flags, id;
        void __iomem *base;
-        save = (struct sa1111_save_data *)dev->power.saved_state;
+        save = (struct sa1111_save_data *)dev->dev.power.saved_state;
        if (!save)
                return 0;
@@ -879,7 +879,7 @@ static int sa1111_resume(struct device *dev)
        id = sa1111_readl(sachip->base + SA1111_SKID);
        if ((id & SKID_ID_MASK) != SKID_SA1111_ID) {
                __sa1111_remove(sachip);
-                dev_set_drvdata(dev, NULL);
+                platform_set_drvdata(dev, NULL);
                kfree(save);
                return 0;
        }
@@ -911,7 +911,7 @@ static int sa1111_resume(struct device *dev)
        spin_unlock_irqrestore(&sachip->lock, flags);
-        dev->power.saved_state = NULL;
+        dev->dev.power.saved_state = NULL;
        kfree(save);
        return 0;
@@ -922,9 +922,8 @@ static int sa1111_resume(struct device *dev)
 #define sa1111_resume  NULL
 #endif
-static int sa1111_probe(struct device *dev)
+static int sa1111_probe(struct platform_device *pdev)
 {
-        struct platform_device *pdev = to_platform_device(dev);
        struct resource *mem;
        int irq;
@@ -933,20 +932,20 @@ static int sa1111_probe(struct device *dev)
                return -EINVAL;
        irq = platform_get_irq(pdev, 0);
-        return __sa1111_probe(dev, mem, irq);
+        return __sa1111_probe(&pdev->dev, mem, irq);
 }
-static int sa1111_remove(struct device *dev)
+static int sa1111_remove(struct platform_device *pdev)
 {
-        struct sa1111 *sachip = dev_get_drvdata(dev);
+        struct sa1111 *sachip = platform_get_drvdata(pdev);
        if (sachip) {
                __sa1111_remove(sachip);
-                dev_set_drvdata(dev, NULL);
+                platform_set_drvdata(pdev, NULL);
 #ifdef CONFIG_PM
-                kfree(dev->power.saved_state);
+                kfree(pdev->dev.power.saved_state);
-                dev->power.saved_state = NULL;
+                pdev->dev.power.saved_state = NULL;
 #endif
        }
@@ -962,13 +961,14 @@ static int sa1111_remove(struct device *dev)
 *      We also need to handle the SDRAM configuration for
 *      PXA250/SA1110 machine classes.
 */
-static struct device_driver sa1111_device_driver = {
+static struct platform_driver sa1111_device_driver = {
-        .name           = "sa1111",
-        .bus            = &platform_bus_type,
        .probe          = sa1111_probe,
        .remove         = sa1111_remove,
        .suspend        = sa1111_suspend,
        .resume         = sa1111_resume,
+        .driver         = {
+                .name   = "sa1111",
+        },
 };
 /*
@@ -1256,13 +1256,13 @@ static int __init sa1111_init(void)
 {
        int ret = bus_register(&sa1111_bus_type);
        if (ret == 0)
-                driver_register(&sa1111_device_driver);
+                platform_driver_register(&sa1111_device_driver);
        return ret;
 }
 static void __exit sa1111_exit(void)
 {
-        driver_unregister(&sa1111_device_driver);
+        platform_driver_unregister(&sa1111_device_driver);
        bus_unregister(&sa1111_bus_type);
 }
diff --git a/arch/arm/common/scoop.c b/arch/arm/common/scoop.c
index c7fdf390cef9..32924c6714fe 100644
--- a/arch/arm/common/scoop.c
+++ b/arch/arm/common/scoop.c
@@ -98,9 +98,9 @@ static void check_scoop_reg(struct scoop_dev *sdev)
 }
 #ifdef CONFIG_PM
-static int scoop_suspend(struct device *dev, pm_message_t state)
+static int scoop_suspend(struct platform_device *dev, pm_message_t state)
 {
-        struct scoop_dev *sdev = dev_get_drvdata(dev);
+        struct scoop_dev *sdev = platform_get_drvdata(dev);
        check_scoop_reg(sdev);
        sdev->scoop_gpwr = SCOOP_REG(sdev->base, SCOOP_GPWR);
@@ -109,9 +109,9 @@ static int scoop_suspend(struct device *dev, pm_message_t state)
        return 0;
 }
-static int scoop_resume(struct device *dev)
+static int scoop_resume(struct platform_device *dev)
 {
-        struct scoop_dev *sdev = dev_get_drvdata(dev);
+        struct scoop_dev *sdev = platform_get_drvdata(dev);
        check_scoop_reg(sdev);
        SCOOP_REG(sdev->base,SCOOP_GPWR) = sdev->scoop_gpwr;
@@ -123,11 +123,10 @@ static int scoop_resume(struct device *dev)
 #define scoop_resume    NULL
 #endif
-int __init scoop_probe(struct device *dev)
+int __init scoop_probe(struct platform_device *pdev)
 {
        struct scoop_dev *devptr;
        struct scoop_config *inf;
-        struct platform_device *pdev = to_platform_device(dev);
        struct resource *mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
        if (!mem)
@@ -141,7 +140,7 @@ int __init scoop_probe(struct device *dev)
        memset(devptr, 0, sizeof(struct scoop_dev));
        spin_lock_init(&devptr->scoop_lock);
-        inf = dev->platform_data;
+        inf = pdev->dev.platform_data;
        devptr->base = ioremap(mem->start, mem->end - mem->start + 1);
        if (!devptr->base) {
@@ -149,7 +148,7 @@ int __init scoop_probe(struct device *dev)
                return -ENOMEM;
        }
-        dev_set_drvdata(dev, devptr);
+        platform_set_drvdata(pdev, devptr);
        printk("Sharp Scoop Device found at 0x%08x -> 0x%08x\n",(unsigned int)mem->start,(unsigned int)devptr->base);
@@ -164,29 +163,30 @@ int __init scoop_probe(struct device *dev)
        return 0;
 }
-static int scoop_remove(struct device *dev)
+static int scoop_remove(struct platform_device *pdev)
 {
-        struct scoop_dev *sdev = dev_get_drvdata(dev);
+        struct scoop_dev *sdev = platform_get_drvdata(pdev);
        if (sdev) {
                iounmap(sdev->base);
                kfree(sdev);
-                dev_set_drvdata(dev, NULL);
+                platform_set_drvdata(pdev, NULL);
        }
        return 0;
 }
-static struct device_driver scoop_driver = {
+static struct platform_driver scoop_driver = {
-        .name           = "sharp-scoop",
-        .bus            = &platform_bus_type,
        .probe          = scoop_probe,
        .remove         = scoop_remove,
        .suspend        = scoop_suspend,
        .resume         = scoop_resume,
+        .driver         = {
+                .name   = "sharp-scoop",
+        },
 };
 int __init scoop_init(void)
 {
-        return driver_register(&scoop_driver);
+        return platform_driver_register(&scoop_driver);
 }
 subsys_initcall(scoop_init);
diff --git a/arch/arm/configs/enp2611_defconfig b/arch/arm/configs/enp2611_defconfig
index 30e6444f9aaa..fd7c0042bcca 100644
--- a/arch/arm/configs/enp2611_defconfig
+++ b/arch/arm/configs/enp2611_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.13
+# Linux kernel version: 2.6.14-git13
-# Wed Sep 14 10:51:52 2005
+# Thu Nov 10 15:12:48 2005
 #
 CONFIG_ARM=y
 CONFIG_MMU=y
@@ -21,6 +21,7 @@ CONFIG_INIT_ENV_ARG_LIMIT=32
 # General setup
 #
 CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 # CONFIG_POSIX_MQUEUE is not set
@@ -31,6 +32,7 @@ CONFIG_SYSCTL=y
 # CONFIG_HOTPLUG is not set
 CONFIG_KOBJECT_UEVENT=y
 # CONFIG_IKCONFIG is not set
+CONFIG_INITRAMFS_SOURCE=""
 CONFIG_EMBEDDED=y
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_ALL is not set
@@ -61,6 +63,23 @@ CONFIG_OBSOLETE_MODPARM=y
 CONFIG_KMOD=y
 #
+# Block layer
+#
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+#
 # System Type
 #
 # CONFIG_ARCH_CLPS7500 is not set
@@ -82,6 +101,7 @@ CONFIG_ARCH_IXP2000=y
 # CONFIG_ARCH_LH7A40X is not set
 # CONFIG_ARCH_OMAP is not set
 # CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_REALVIEW is not set
 # CONFIG_ARCH_IMX is not set
 # CONFIG_ARCH_H720X is not set
 # CONFIG_ARCH_AAEC2000 is not set
@@ -124,7 +144,6 @@ CONFIG_XSCALE_PMU=y
 CONFIG_ISA_DMA_API=y
 CONFIG_PCI=y
 CONFIG_PCI_LEGACY_PROC=y
-CONFIG_PCI_NAMES=y
 # CONFIG_PCI_DEBUG is not set
 #
@@ -144,6 +163,8 @@ CONFIG_FLATMEM_MANUAL=y
 # CONFIG_SPARSEMEM_MANUAL is not set
 CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4096
 CONFIG_ALIGNMENT_TRAP=y
 #
@@ -162,6 +183,7 @@ CONFIG_CMDLINE="console=ttyS0,57600 root=/dev/nfs ip=bootp mem=64M@0x0 pci=firmw
 # At least one emulation must be selected
 #
 CONFIG_FPE_NWFPE=y
+CONFIG_FPE_NWFPE_XP=y
 # CONFIG_FPE_FASTFPE is not set
 #
@@ -205,14 +227,19 @@ CONFIG_SYN_COOKIES=y
 # CONFIG_INET_ESP is not set
 # CONFIG_INET_IPCOMP is not set
 # CONFIG_INET_TUNNEL is not set
-# CONFIG_IP_TCPDIAG is not set
+CONFIG_INET_DIAG=y
-# CONFIG_IP_TCPDIAG_IPV6 is not set
+CONFIG_INET_TCP_DIAG=y
 # CONFIG_TCP_CONG_ADVANCED is not set
 CONFIG_TCP_CONG_BIC=y
 # CONFIG_IPV6 is not set
 # CONFIG_NETFILTER is not set
 #
+# DCCP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_DCCP is not set
+#
 # SCTP Configuration (EXPERIMENTAL)
 #
 # CONFIG_IP_SCTP is not set
@@ -228,6 +255,10 @@ CONFIG_TCP_CONG_BIC=y
 # CONFIG_NET_DIVERT is not set
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
+#
+# QoS and/or fair queueing
+#
 # CONFIG_NET_SCHED is not set
 # CONFIG_NET_CLS_ROUTE is not set
@@ -238,6 +269,7 @@ CONFIG_TCP_CONG_BIC=y
 # CONFIG_HAMRADIO is not set
 # CONFIG_IRDA is not set
 # CONFIG_BT is not set
+# CONFIG_IEEE80211 is not set
 #
 # Device Drivers
@@ -273,6 +305,7 @@ CONFIG_MTD_BLOCK=y
 # CONFIG_FTL is not set
 # CONFIG_NFTL is not set
 # CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
 #
 # RAM/ROM/Flash chip drivers
@@ -307,7 +340,6 @@ CONFIG_MTD_COMPLEX_MAPPINGS=y
 # CONFIG_MTD_PHYSMAP is not set
 # CONFIG_MTD_ARM_INTEGRATOR is not set
 CONFIG_MTD_IXP2000=y
-# CONFIG_MTD_EDB7312 is not set
 # CONFIG_MTD_PCI is not set
 # CONFIG_MTD_PLATRAM is not set
@@ -334,6 +366,11 @@ CONFIG_MTD_IXP2000=y
 # CONFIG_MTD_NAND is not set
 #
+# OneNAND Flash Device Drivers
+#
+# CONFIG_MTD_ONENAND is not set
+#
 # Parallel port support
 #
 # CONFIG_PARPORT is not set
@@ -358,21 +395,13 @@ CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=16
 CONFIG_BLK_DEV_RAM_SIZE=8192
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_INITRAMFS_SOURCE=""
 # CONFIG_CDROM_PKTCDVD is not set
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
 # CONFIG_ATA_OVER_ETH is not set
 #
 # SCSI device support
 #
+# CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
 #
@@ -410,12 +439,18 @@ CONFIG_DUMMY=y
 # CONFIG_ARCNET is not set
 #
+# PHY device support
+#
+# CONFIG_PHYLIB is not set
+#
 # Ethernet (10 or 100Mbit)
 #
 CONFIG_NET_ETHERNET=y
 CONFIG_MII=y
 # CONFIG_HAPPYMEAL is not set
 # CONFIG_SUNGEM is not set
+# CONFIG_CASSINI is not set
 # CONFIG_NET_VENDOR_3COM is not set
 # CONFIG_SMC91X is not set
 # CONFIG_DM9000 is not set
@@ -455,6 +490,7 @@ CONFIG_EEPRO100=y
 # CONFIG_HAMACHI is not set
 # CONFIG_YELLOWFIN is not set
 # CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
 # CONFIG_SKGE is not set
 # CONFIG_SK98LIN is not set
 # CONFIG_VIA_VELOCITY is not set
@@ -464,6 +500,7 @@ CONFIG_EEPRO100=y
 #
 # Ethernet (10000 Mbit)
 #
+# CONFIG_CHELSIO_T1 is not set
 # CONFIG_IXGB is not set
 # CONFIG_S2IO is not set
@@ -609,6 +646,7 @@ CONFIG_IXP2000_WATCHDOG=y
 # TPM devices
 #
 # CONFIG_TCG_TPM is not set
+# CONFIG_TELCLOCK is not set
 #
 # I2C support
@@ -634,7 +672,6 @@ CONFIG_I2C_ALGOBIT=y
 # CONFIG_I2C_I801 is not set
 # CONFIG_I2C_I810 is not set
 # CONFIG_I2C_PIIX4 is not set
-# CONFIG_I2C_ISA is not set
 CONFIG_I2C_IXP2000=y
 # CONFIG_I2C_NFORCE2 is not set
 # CONFIG_I2C_PARPORT_LIGHT is not set
@@ -649,7 +686,6 @@ CONFIG_I2C_IXP2000=y
 # CONFIG_I2C_VIAPRO is not set
 # CONFIG_I2C_VOODOO3 is not set
 # CONFIG_I2C_PCA_ISA is not set
-CONFIG_I2C_SENSOR=y
 #
 # Miscellaneous I2C Chip support
@@ -662,6 +698,7 @@ CONFIG_SENSORS_EEPROM=y
 # CONFIG_SENSORS_PCF8591 is not set
 # CONFIG_SENSORS_RTC8564 is not set
 # CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_RTC_X1205_I2C is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
@@ -671,6 +708,7 @@ CONFIG_SENSORS_EEPROM=y
 # Hardware Monitoring support
 #
 CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
 # CONFIG_SENSORS_ADM1021 is not set
 # CONFIG_SENSORS_ADM1025 is not set
 # CONFIG_SENSORS_ADM1026 is not set
@@ -701,6 +739,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_VIA686A is not set
 # CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83792D is not set
 # CONFIG_SENSORS_W83L785TS is not set
 # CONFIG_SENSORS_W83627HF is not set
 # CONFIG_SENSORS_W83627EHF is not set
@@ -711,6 +750,10 @@ CONFIG_HWMON=y
 #
 #
+# Multimedia Capabilities Port drivers
+#
+#
 # Multimedia devices
 #
 # CONFIG_VIDEO_DEV is not set
@@ -738,6 +781,10 @@ CONFIG_USB_ARCH_HAS_OHCI=y
 # CONFIG_USB is not set
 #
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+#
 # USB Gadget Support
 #
 # CONFIG_USB_GADGET is not set
@@ -765,10 +812,6 @@ CONFIG_FS_MBCACHE=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 CONFIG_FS_POSIX_ACL=y
-#
-# XFS support
-#
 # CONFIG_XFS_FS is not set
 # CONFIG_MINIX_FS is not set
 # CONFIG_ROMFS_FS is not set
@@ -777,6 +820,7 @@ CONFIG_INOTIFY=y
 CONFIG_DNOTIFY=y
 # CONFIG_AUTOFS_FS is not set
 # CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
 #
 # CD-ROM/DVD Filesystems
@@ -796,11 +840,10 @@ CONFIG_DNOTIFY=y
 #
 CONFIG_PROC_FS=y
 CONFIG_SYSFS=y
-# CONFIG_DEVPTS_FS_XATTR is not set
 CONFIG_TMPFS=y
-# CONFIG_TMPFS_XATTR is not set
 # CONFIG_HUGETLB_PAGE is not set
 CONFIG_RAMFS=y
+# CONFIG_RELAYFS_FS is not set
 #
 # Miscellaneous filesystems
@@ -816,6 +859,7 @@ CONFIG_RAMFS=y
 CONFIG_JFFS2_FS=y
 CONFIG_JFFS2_FS_DEBUG=0
 CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_SUMMARY is not set
 # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
 CONFIG_JFFS2_ZLIB=y
 CONFIG_JFFS2_RTIME=y
@@ -848,6 +892,7 @@ CONFIG_SUNRPC=y
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
 # CONFIG_AFS_FS is not set
+# CONFIG_9P_FS is not set
 #
 # Partition Types
@@ -886,6 +931,7 @@ CONFIG_MSDOS_PARTITION=y
 CONFIG_DEBUG_KERNEL=y
 CONFIG_MAGIC_SYSRQ=y
 CONFIG_LOG_BUF_SHIFT=14
+CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_SCHEDSTATS is not set
 # CONFIG_DEBUG_SLAB is not set
 # CONFIG_DEBUG_SPINLOCK is not set
@@ -894,7 +940,9 @@ CONFIG_LOG_BUF_SHIFT=14
 CONFIG_DEBUG_BUGVERBOSE=y
 # CONFIG_DEBUG_INFO is not set
 # CONFIG_DEBUG_FS is not set
+# CONFIG_DEBUG_VM is not set
 CONFIG_FRAME_POINTER=y
+# CONFIG_RCU_TORTURE_TEST is not set
 CONFIG_DEBUG_USER=y
 # CONFIG_DEBUG_WAITQ is not set
 CONFIG_DEBUG_ERRORS=y
@@ -920,6 +968,7 @@ CONFIG_DEBUG_LL=y
 # Library routines
 #
 # CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
 CONFIG_CRC32=y
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
diff --git a/arch/arm/configs/ixdp2400_defconfig b/arch/arm/configs/ixdp2400_defconfig
index ddeb9f99d662..e6a4d2656fe5 100644
--- a/arch/arm/configs/ixdp2400_defconfig
+++ b/arch/arm/configs/ixdp2400_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.13
+# Linux kernel version: 2.6.14-git13
-# Wed Sep 14 10:52:01 2005
+# Thu Nov 10 15:14:13 2005
 #
 CONFIG_ARM=y
 CONFIG_MMU=y
@@ -21,6 +21,7 @@ CONFIG_INIT_ENV_ARG_LIMIT=32
 # General setup
 #
 CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 # CONFIG_POSIX_MQUEUE is not set
@@ -31,6 +32,7 @@ CONFIG_SYSCTL=y
 # CONFIG_HOTPLUG is not set
 CONFIG_KOBJECT_UEVENT=y
 # CONFIG_IKCONFIG is not set
+CONFIG_INITRAMFS_SOURCE=""
 CONFIG_EMBEDDED=y
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_ALL is not set
@@ -61,6 +63,23 @@ CONFIG_OBSOLETE_MODPARM=y
 CONFIG_KMOD=y
 #
+# Block layer
+#
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+#
 # System Type
 #
 # CONFIG_ARCH_CLPS7500 is not set
@@ -82,6 +101,7 @@ CONFIG_ARCH_IXP2000=y
 # CONFIG_ARCH_LH7A40X is not set
 # CONFIG_ARCH_OMAP is not set
 # CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_REALVIEW is not set
 # CONFIG_ARCH_IMX is not set
 # CONFIG_ARCH_H720X is not set
 # CONFIG_ARCH_AAEC2000 is not set
@@ -125,7 +145,6 @@ CONFIG_XSCALE_PMU=y
 CONFIG_ISA_DMA_API=y
 CONFIG_PCI=y
 CONFIG_PCI_LEGACY_PROC=y
-CONFIG_PCI_NAMES=y
 # CONFIG_PCI_DEBUG is not set
 #
@@ -145,6 +164,8 @@ CONFIG_FLATMEM_MANUAL=y
 # CONFIG_SPARSEMEM_MANUAL is not set
 CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4096
 CONFIG_ALIGNMENT_TRAP=y
 #
@@ -163,6 +184,7 @@ CONFIG_CMDLINE="console=ttyS0,57600 root=/dev/nfs ip=bootp mem=64M@0x0 pci=firmw
 # At least one emulation must be selected
 #
 CONFIG_FPE_NWFPE=y
+CONFIG_FPE_NWFPE_XP=y
 # CONFIG_FPE_FASTFPE is not set
 #
@@ -206,14 +228,19 @@ CONFIG_SYN_COOKIES=y
 # CONFIG_INET_ESP is not set
 # CONFIG_INET_IPCOMP is not set
 # CONFIG_INET_TUNNEL is not set
-# CONFIG_IP_TCPDIAG is not set
+CONFIG_INET_DIAG=y
-# CONFIG_IP_TCPDIAG_IPV6 is not set
+CONFIG_INET_TCP_DIAG=y
 # CONFIG_TCP_CONG_ADVANCED is not set
 CONFIG_TCP_CONG_BIC=y
 # CONFIG_IPV6 is not set
 # CONFIG_NETFILTER is not set
 #
+# DCCP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_DCCP is not set
+#
 # SCTP Configuration (EXPERIMENTAL)
 #
 # CONFIG_IP_SCTP is not set
@@ -229,6 +256,10 @@ CONFIG_TCP_CONG_BIC=y
 # CONFIG_NET_DIVERT is not set
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
+#
+# QoS and/or fair queueing
+#
 # CONFIG_NET_SCHED is not set
 # CONFIG_NET_CLS_ROUTE is not set
@@ -239,6 +270,7 @@ CONFIG_TCP_CONG_BIC=y
 # CONFIG_HAMRADIO is not set
 # CONFIG_IRDA is not set
 # CONFIG_BT is not set
+# CONFIG_IEEE80211 is not set
 #
 # Device Drivers
@@ -274,6 +306,7 @@ CONFIG_MTD_BLOCK=y
 # CONFIG_FTL is not set
 # CONFIG_NFTL is not set
 # CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
 #
 # RAM/ROM/Flash chip drivers
@@ -308,7 +341,6 @@ CONFIG_MTD_COMPLEX_MAPPINGS=y
 # CONFIG_MTD_PHYSMAP is not set
 # CONFIG_MTD_ARM_INTEGRATOR is not set
 CONFIG_MTD_IXP2000=y
-# CONFIG_MTD_EDB7312 is not set
 # CONFIG_MTD_PCI is not set
 # CONFIG_MTD_PLATRAM is not set
@@ -335,6 +367,11 @@ CONFIG_MTD_IXP2000=y
 # CONFIG_MTD_NAND is not set
 #
+# OneNAND Flash Device Drivers
+#
+# CONFIG_MTD_ONENAND is not set
+#
 # Parallel port support
 #
 # CONFIG_PARPORT is not set
@@ -359,21 +396,13 @@ CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=16
 CONFIG_BLK_DEV_RAM_SIZE=8192
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_INITRAMFS_SOURCE=""
 # CONFIG_CDROM_PKTCDVD is not set
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
 # CONFIG_ATA_OVER_ETH is not set
 #
 # SCSI device support
 #
+# CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
 #
@@ -411,12 +440,18 @@ CONFIG_DUMMY=y
 # CONFIG_ARCNET is not set
 #
+# PHY device support
+#
+# CONFIG_PHYLIB is not set
+#
 # Ethernet (10 or 100Mbit)
 #
 CONFIG_NET_ETHERNET=y
 CONFIG_MII=y
 # CONFIG_HAPPYMEAL is not set
 # CONFIG_SUNGEM is not set
+# CONFIG_CASSINI is not set
 # CONFIG_NET_VENDOR_3COM is not set
 # CONFIG_SMC91X is not set
 # CONFIG_DM9000 is not set
@@ -456,6 +491,7 @@ CONFIG_EEPRO100=y
 # CONFIG_HAMACHI is not set
 # CONFIG_YELLOWFIN is not set
 # CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
 # CONFIG_SKGE is not set
 # CONFIG_SK98LIN is not set
 # CONFIG_VIA_VELOCITY is not set
@@ -465,6 +501,7 @@ CONFIG_EEPRO100=y
 #
 # Ethernet (10000 Mbit)
 #
+# CONFIG_CHELSIO_T1 is not set
 # CONFIG_IXGB is not set
 # CONFIG_S2IO is not set
@@ -610,6 +647,7 @@ CONFIG_IXP2000_WATCHDOG=y
 # TPM devices
 #
 # CONFIG_TCG_TPM is not set
+# CONFIG_TELCLOCK is not set
 #
 # I2C support
@@ -635,7 +673,6 @@ CONFIG_I2C_ALGOBIT=y
 # CONFIG_I2C_I801 is not set
 # CONFIG_I2C_I810 is not set
 # CONFIG_I2C_PIIX4 is not set
-# CONFIG_I2C_ISA is not set
 CONFIG_I2C_IXP2000=y
 # CONFIG_I2C_NFORCE2 is not set
 # CONFIG_I2C_PARPORT_LIGHT is not set
@@ -650,7 +687,6 @@ CONFIG_I2C_IXP2000=y
 # CONFIG_I2C_VIAPRO is not set
 # CONFIG_I2C_VOODOO3 is not set
 # CONFIG_I2C_PCA_ISA is not set
-CONFIG_I2C_SENSOR=y
 #
 # Miscellaneous I2C Chip support
@@ -663,6 +699,7 @@ CONFIG_SENSORS_EEPROM=y
 # CONFIG_SENSORS_PCF8591 is not set
 # CONFIG_SENSORS_RTC8564 is not set
 # CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_RTC_X1205_I2C is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
@@ -672,6 +709,7 @@ CONFIG_SENSORS_EEPROM=y
 # Hardware Monitoring support
 #
 CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
 # CONFIG_SENSORS_ADM1021 is not set
 # CONFIG_SENSORS_ADM1025 is not set
 # CONFIG_SENSORS_ADM1026 is not set
@@ -702,6 +740,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_VIA686A is not set
 # CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83792D is not set
 # CONFIG_SENSORS_W83L785TS is not set
 # CONFIG_SENSORS_W83627HF is not set
 # CONFIG_SENSORS_W83627EHF is not set
@@ -712,6 +751,10 @@ CONFIG_HWMON=y
 #
 #
+# Multimedia Capabilities Port drivers
+#
+#
 # Multimedia devices
 #
 # CONFIG_VIDEO_DEV is not set
@@ -739,6 +782,10 @@ CONFIG_USB_ARCH_HAS_OHCI=y
 # CONFIG_USB is not set
 #
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+#
 # USB Gadget Support
 #
 # CONFIG_USB_GADGET is not set
@@ -766,10 +813,6 @@ CONFIG_FS_MBCACHE=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 CONFIG_FS_POSIX_ACL=y
-#
-# XFS support
-#
 # CONFIG_XFS_FS is not set
 # CONFIG_MINIX_FS is not set
 # CONFIG_ROMFS_FS is not set
@@ -778,6 +821,7 @@ CONFIG_INOTIFY=y
 CONFIG_DNOTIFY=y
 # CONFIG_AUTOFS_FS is not set
 # CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
 #
 # CD-ROM/DVD Filesystems
@@ -797,11 +841,10 @@ CONFIG_DNOTIFY=y
 #
 CONFIG_PROC_FS=y
 CONFIG_SYSFS=y
-# CONFIG_DEVPTS_FS_XATTR is not set
 CONFIG_TMPFS=y
-# CONFIG_TMPFS_XATTR is not set
 # CONFIG_HUGETLB_PAGE is not set
 CONFIG_RAMFS=y
+# CONFIG_RELAYFS_FS is not set
 #
 # Miscellaneous filesystems
@@ -817,6 +860,7 @@ CONFIG_RAMFS=y
 CONFIG_JFFS2_FS=y
 CONFIG_JFFS2_FS_DEBUG=0
 CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_SUMMARY is not set
 # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
 CONFIG_JFFS2_ZLIB=y
 CONFIG_JFFS2_RTIME=y
@@ -849,6 +893,7 @@ CONFIG_SUNRPC=y
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
 # CONFIG_AFS_FS is not set
+# CONFIG_9P_FS is not set
 #
 # Partition Types
@@ -887,6 +932,7 @@ CONFIG_MSDOS_PARTITION=y
 CONFIG_DEBUG_KERNEL=y
 CONFIG_MAGIC_SYSRQ=y
 CONFIG_LOG_BUF_SHIFT=14
+CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_SCHEDSTATS is not set
 # CONFIG_DEBUG_SLAB is not set
 # CONFIG_DEBUG_SPINLOCK is not set
@@ -895,7 +941,9 @@ CONFIG_LOG_BUF_SHIFT=14
 CONFIG_DEBUG_BUGVERBOSE=y
 # CONFIG_DEBUG_INFO is not set
 # CONFIG_DEBUG_FS is not set
+# CONFIG_DEBUG_VM is not set
 CONFIG_FRAME_POINTER=y
+# CONFIG_RCU_TORTURE_TEST is not set
 CONFIG_DEBUG_USER=y
 # CONFIG_DEBUG_WAITQ is not set
 CONFIG_DEBUG_ERRORS=y
@@ -921,6 +969,7 @@ CONFIG_DEBUG_LL=y
 # Library routines
 #
 # CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
 CONFIG_CRC32=y
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
diff --git a/arch/arm/configs/ixdp2401_defconfig b/arch/arm/configs/ixdp2401_defconfig
index 32bd552e0986..5572cf95d5f8 100644
--- a/arch/arm/configs/ixdp2401_defconfig
+++ b/arch/arm/configs/ixdp2401_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.13
+# Linux kernel version: 2.6.14-git13
-# Wed Sep 14 10:52:10 2005
+# Thu Nov 10 15:14:50 2005
 #
 CONFIG_ARM=y
 CONFIG_MMU=y
@@ -21,6 +21,7 @@ CONFIG_INIT_ENV_ARG_LIMIT=32
 # General setup
 #
 CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 # CONFIG_POSIX_MQUEUE is not set
@@ -31,6 +32,7 @@ CONFIG_SYSCTL=y
 # CONFIG_HOTPLUG is not set
 CONFIG_KOBJECT_UEVENT=y
 # CONFIG_IKCONFIG is not set
+CONFIG_INITRAMFS_SOURCE=""
 CONFIG_EMBEDDED=y
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_ALL is not set
@@ -61,6 +63,23 @@ CONFIG_OBSOLETE_MODPARM=y
 CONFIG_KMOD=y
 #
+# Block layer
+#
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+#
 # System Type
 #
 # CONFIG_ARCH_CLPS7500 is not set
@@ -82,6 +101,7 @@ CONFIG_ARCH_IXP2000=y
 # CONFIG_ARCH_LH7A40X is not set
 # CONFIG_ARCH_OMAP is not set
 # CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_REALVIEW is not set
 # CONFIG_ARCH_IMX is not set
 # CONFIG_ARCH_H720X is not set
 # CONFIG_ARCH_AAEC2000 is not set
@@ -125,7 +145,6 @@ CONFIG_XSCALE_PMU=y
 CONFIG_ISA_DMA_API=y
 CONFIG_PCI=y
 CONFIG_PCI_LEGACY_PROC=y
-CONFIG_PCI_NAMES=y
 # CONFIG_PCI_DEBUG is not set
 #
@@ -145,6 +164,8 @@ CONFIG_FLATMEM_MANUAL=y
 # CONFIG_SPARSEMEM_MANUAL is not set
 CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4096
 CONFIG_ALIGNMENT_TRAP=y
 #
@@ -163,6 +184,7 @@ CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/nfs ip=bootp mem=64M@0x0 pci=firm
 # At least one emulation must be selected
 #
 CONFIG_FPE_NWFPE=y
+CONFIG_FPE_NWFPE_XP=y
 # CONFIG_FPE_FASTFPE is not set
 #
@@ -206,14 +228,19 @@ CONFIG_SYN_COOKIES=y
 # CONFIG_INET_ESP is not set
 # CONFIG_INET_IPCOMP is not set
 # CONFIG_INET_TUNNEL is not set
-CONFIG_IP_TCPDIAG=y
+CONFIG_INET_DIAG=y
-# CONFIG_IP_TCPDIAG_IPV6 is not set
+CONFIG_INET_TCP_DIAG=y
 # CONFIG_TCP_CONG_ADVANCED is not set
 CONFIG_TCP_CONG_BIC=y
 # CONFIG_IPV6 is not set
 # CONFIG_NETFILTER is not set
 #
+# DCCP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_DCCP is not set
+#
 # SCTP Configuration (EXPERIMENTAL)
 #
 # CONFIG_IP_SCTP is not set
@@ -229,6 +256,10 @@ CONFIG_TCP_CONG_BIC=y
 # CONFIG_NET_DIVERT is not set
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
+#
+# QoS and/or fair queueing
+#
 # CONFIG_NET_SCHED is not set
 # CONFIG_NET_CLS_ROUTE is not set
@@ -239,6 +270,7 @@ CONFIG_TCP_CONG_BIC=y
 # CONFIG_HAMRADIO is not set
 # CONFIG_IRDA is not set
 # CONFIG_BT is not set
+# CONFIG_IEEE80211 is not set
 #
 # Device Drivers
@@ -274,6 +306,7 @@ CONFIG_MTD_BLOCK=y
 # CONFIG_FTL is not set
 # CONFIG_NFTL is not set
 # CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
 #
 # RAM/ROM/Flash chip drivers
@@ -308,7 +341,6 @@ CONFIG_MTD_COMPLEX_MAPPINGS=y
 # CONFIG_MTD_PHYSMAP is not set
 # CONFIG_MTD_ARM_INTEGRATOR is not set
 CONFIG_MTD_IXP2000=y
-# CONFIG_MTD_EDB7312 is not set
 # CONFIG_MTD_PCI is not set
 # CONFIG_MTD_PLATRAM is not set
@@ -335,6 +367,11 @@ CONFIG_MTD_IXP2000=y
 # CONFIG_MTD_NAND is not set
 #
+# OneNAND Flash Device Drivers
+#
+# CONFIG_MTD_ONENAND is not set
+#
 # Parallel port support
 #
 # CONFIG_PARPORT is not set
@@ -359,21 +396,13 @@ CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=16
 CONFIG_BLK_DEV_RAM_SIZE=8192
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_INITRAMFS_SOURCE=""
 # CONFIG_CDROM_PKTCDVD is not set
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
 # CONFIG_ATA_OVER_ETH is not set
 #
 # SCSI device support
 #
+# CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
 #
@@ -411,12 +440,18 @@ CONFIG_DUMMY=y
 # CONFIG_ARCNET is not set
 #
+# PHY device support
+#
+# CONFIG_PHYLIB is not set
+#
 # Ethernet (10 or 100Mbit)
 #
 CONFIG_NET_ETHERNET=y
 CONFIG_MII=y
 # CONFIG_HAPPYMEAL is not set
 # CONFIG_SUNGEM is not set
+# CONFIG_CASSINI is not set
 # CONFIG_NET_VENDOR_3COM is not set
 # CONFIG_SMC91X is not set
 # CONFIG_DM9000 is not set
@@ -457,6 +492,7 @@ CONFIG_EEPRO100=y
 # CONFIG_HAMACHI is not set
 # CONFIG_YELLOWFIN is not set
 # CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
 # CONFIG_SKGE is not set
 # CONFIG_SK98LIN is not set
 # CONFIG_VIA_VELOCITY is not set
@@ -466,6 +502,7 @@ CONFIG_EEPRO100=y
 #
 # Ethernet (10000 Mbit)
 #
+# CONFIG_CHELSIO_T1 is not set
 # CONFIG_IXGB is not set
 # CONFIG_S2IO is not set
@@ -611,6 +648,7 @@ CONFIG_IXP2000_WATCHDOG=y
 # TPM devices
 #
 # CONFIG_TCG_TPM is not set
+# CONFIG_TELCLOCK is not set
 #
 # I2C support
@@ -636,7 +674,6 @@ CONFIG_I2C_ALGOBIT=y
 # CONFIG_I2C_I801 is not set
 # CONFIG_I2C_I810 is not set
 # CONFIG_I2C_PIIX4 is not set
-# CONFIG_I2C_ISA is not set
 CONFIG_I2C_IXP2000=y
 # CONFIG_I2C_NFORCE2 is not set
 # CONFIG_I2C_PARPORT_LIGHT is not set
@@ -651,7 +688,6 @@ CONFIG_I2C_IXP2000=y
 # CONFIG_I2C_VIAPRO is not set
 # CONFIG_I2C_VOODOO3 is not set
 # CONFIG_I2C_PCA_ISA is not set
-CONFIG_I2C_SENSOR=y
 #
 # Miscellaneous I2C Chip support
@@ -664,6 +700,7 @@ CONFIG_SENSORS_EEPROM=y
 # CONFIG_SENSORS_PCF8591 is not set
 # CONFIG_SENSORS_RTC8564 is not set
 # CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_RTC_X1205_I2C is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
@@ -673,6 +710,7 @@ CONFIG_SENSORS_EEPROM=y
 # Hardware Monitoring support
 #
 CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
 # CONFIG_SENSORS_ADM1021 is not set
 # CONFIG_SENSORS_ADM1025 is not set
 # CONFIG_SENSORS_ADM1026 is not set
@@ -703,6 +741,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_VIA686A is not set
 # CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83792D is not set
 # CONFIG_SENSORS_W83L785TS is not set
 # CONFIG_SENSORS_W83627HF is not set
 # CONFIG_SENSORS_W83627EHF is not set
@@ -713,6 +752,10 @@ CONFIG_HWMON=y
 #
 #
+# Multimedia Capabilities Port drivers
+#
+#
 # Multimedia devices
 #
 # CONFIG_VIDEO_DEV is not set
@@ -740,6 +783,10 @@ CONFIG_USB_ARCH_HAS_OHCI=y
 # CONFIG_USB is not set
 #
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+#
 # USB Gadget Support
 #
 # CONFIG_USB_GADGET is not set
@@ -767,10 +814,6 @@ CONFIG_FS_MBCACHE=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 CONFIG_FS_POSIX_ACL=y
-#
-# XFS support
-#
 # CONFIG_XFS_FS is not set
 # CONFIG_MINIX_FS is not set
 # CONFIG_ROMFS_FS is not set
@@ -779,6 +822,7 @@ CONFIG_INOTIFY=y
 CONFIG_DNOTIFY=y
 # CONFIG_AUTOFS_FS is not set
 # CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
 #
 # CD-ROM/DVD Filesystems
@@ -798,11 +842,10 @@ CONFIG_DNOTIFY=y
 #
 CONFIG_PROC_FS=y
 CONFIG_SYSFS=y
-# CONFIG_DEVPTS_FS_XATTR is not set
 CONFIG_TMPFS=y
-# CONFIG_TMPFS_XATTR is not set
 # CONFIG_HUGETLB_PAGE is not set
 CONFIG_RAMFS=y
+# CONFIG_RELAYFS_FS is not set
 #
 # Miscellaneous filesystems
@@ -818,6 +861,7 @@ CONFIG_RAMFS=y
 CONFIG_JFFS2_FS=y
 CONFIG_JFFS2_FS_DEBUG=0
 CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_SUMMARY is not set
 # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
 CONFIG_JFFS2_ZLIB=y
 CONFIG_JFFS2_RTIME=y
@@ -850,6 +894,7 @@ CONFIG_SUNRPC=y
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
 # CONFIG_AFS_FS is not set
+# CONFIG_9P_FS is not set
 #
 # Partition Types
@@ -888,6 +933,7 @@ CONFIG_MSDOS_PARTITION=y
 CONFIG_DEBUG_KERNEL=y
 CONFIG_MAGIC_SYSRQ=y
 CONFIG_LOG_BUF_SHIFT=14
+CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_SCHEDSTATS is not set
 # CONFIG_DEBUG_SLAB is not set
 # CONFIG_DEBUG_SPINLOCK is not set
@@ -896,7 +942,9 @@ CONFIG_LOG_BUF_SHIFT=14
 CONFIG_DEBUG_BUGVERBOSE=y
 # CONFIG_DEBUG_INFO is not set
 # CONFIG_DEBUG_FS is not set
+# CONFIG_DEBUG_VM is not set
 CONFIG_FRAME_POINTER=y
+# CONFIG_RCU_TORTURE_TEST is not set
 CONFIG_DEBUG_USER=y
 # CONFIG_DEBUG_WAITQ is not set
 CONFIG_DEBUG_ERRORS=y
@@ -922,6 +970,7 @@ CONFIG_DEBUG_LL=y
 # Library routines
 #
 # CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
 CONFIG_CRC32=y
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
diff --git a/arch/arm/configs/ixdp2800_defconfig b/arch/arm/configs/ixdp2800_defconfig
index 81d3a0606f95..0fddbde85835 100644
--- a/arch/arm/configs/ixdp2800_defconfig
+++ b/arch/arm/configs/ixdp2800_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.13
+# Linux kernel version: 2.6.14-git13
-# Wed Sep 14 10:52:23 2005
+# Thu Nov 10 15:14:56 2005
 #
 CONFIG_ARM=y
 CONFIG_MMU=y
@@ -21,6 +21,7 @@ CONFIG_INIT_ENV_ARG_LIMIT=32
 # General setup
 #
 CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 # CONFIG_POSIX_MQUEUE is not set
@@ -31,6 +32,7 @@ CONFIG_SYSCTL=y
 # CONFIG_HOTPLUG is not set
 CONFIG_KOBJECT_UEVENT=y
 # CONFIG_IKCONFIG is not set
+CONFIG_INITRAMFS_SOURCE=""
 CONFIG_EMBEDDED=y
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_ALL is not set
@@ -61,6 +63,23 @@ CONFIG_OBSOLETE_MODPARM=y
 CONFIG_KMOD=y
 #
+# Block layer
+#
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+#
 # System Type
 #
 # CONFIG_ARCH_CLPS7500 is not set
@@ -82,6 +101,7 @@ CONFIG_ARCH_IXP2000=y
 # CONFIG_ARCH_LH7A40X is not set
 # CONFIG_ARCH_OMAP is not set
 # CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_REALVIEW is not set
 # CONFIG_ARCH_IMX is not set
 # CONFIG_ARCH_H720X is not set
 # CONFIG_ARCH_AAEC2000 is not set
@@ -125,7 +145,6 @@ CONFIG_XSCALE_PMU=y
 CONFIG_ISA_DMA_API=y
 CONFIG_PCI=y
 CONFIG_PCI_LEGACY_PROC=y
-CONFIG_PCI_NAMES=y
 # CONFIG_PCI_DEBUG is not set
 #
@@ -145,6 +164,8 @@ CONFIG_FLATMEM_MANUAL=y
 # CONFIG_SPARSEMEM_MANUAL is not set
 CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4096
 CONFIG_ALIGNMENT_TRAP=y
 #
@@ -163,6 +184,7 @@ CONFIG_CMDLINE="console=ttyS0,9600 root=/dev/nfs ip=bootp mem=64M@0x0"
 # At least one emulation must be selected
 #
 CONFIG_FPE_NWFPE=y
+CONFIG_FPE_NWFPE_XP=y
 # CONFIG_FPE_FASTFPE is not set
 #
@@ -206,14 +228,19 @@ CONFIG_SYN_COOKIES=y
 # CONFIG_INET_ESP is not set
 # CONFIG_INET_IPCOMP is not set
 # CONFIG_INET_TUNNEL is not set
-# CONFIG_IP_TCPDIAG is not set
+CONFIG_INET_DIAG=y
-# CONFIG_IP_TCPDIAG_IPV6 is not set
+CONFIG_INET_TCP_DIAG=y
 # CONFIG_TCP_CONG_ADVANCED is not set
 CONFIG_TCP_CONG_BIC=y
 # CONFIG_IPV6 is not set
 # CONFIG_NETFILTER is not set
 #
+# DCCP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_DCCP is not set
+#
 # SCTP Configuration (EXPERIMENTAL)
 #
 # CONFIG_IP_SCTP is not set
@@ -229,6 +256,10 @@ CONFIG_TCP_CONG_BIC=y
 # CONFIG_NET_DIVERT is not set
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
+#
+# QoS and/or fair queueing
+#
 # CONFIG_NET_SCHED is not set
 # CONFIG_NET_CLS_ROUTE is not set
@@ -239,6 +270,7 @@ CONFIG_TCP_CONG_BIC=y
 # CONFIG_HAMRADIO is not set
 # CONFIG_IRDA is not set
 # CONFIG_BT is not set
+# CONFIG_IEEE80211 is not set
 #
 # Device Drivers
@@ -274,6 +306,7 @@ CONFIG_MTD_BLOCK=y
 # CONFIG_FTL is not set
 # CONFIG_NFTL is not set
 # CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
 #
 # RAM/ROM/Flash chip drivers
@@ -308,7 +341,6 @@ CONFIG_MTD_COMPLEX_MAPPINGS=y
 # CONFIG_MTD_PHYSMAP is not set
 # CONFIG_MTD_ARM_INTEGRATOR is not set
 CONFIG_MTD_IXP2000=y
-# CONFIG_MTD_EDB7312 is not set
 # CONFIG_MTD_PCI is not set
 # CONFIG_MTD_PLATRAM is not set
@@ -335,6 +367,11 @@ CONFIG_MTD_IXP2000=y
 # CONFIG_MTD_NAND is not set
 #
+# OneNAND Flash Device Drivers
+#
+# CONFIG_MTD_ONENAND is not set
+#
 # Parallel port support
 #
 # CONFIG_PARPORT is not set
@@ -359,21 +396,13 @@ CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=16
 CONFIG_BLK_DEV_RAM_SIZE=8192
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_INITRAMFS_SOURCE=""
 # CONFIG_CDROM_PKTCDVD is not set
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
 # CONFIG_ATA_OVER_ETH is not set
 #
 # SCSI device support
 #
+# CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
 #
@@ -411,12 +440,18 @@ CONFIG_DUMMY=y
 # CONFIG_ARCNET is not set
 #
+# PHY device support
+#
+# CONFIG_PHYLIB is not set
+#
 # Ethernet (10 or 100Mbit)
 #
 CONFIG_NET_ETHERNET=y
 CONFIG_MII=y
 # CONFIG_HAPPYMEAL is not set
 # CONFIG_SUNGEM is not set
+# CONFIG_CASSINI is not set
 # CONFIG_NET_VENDOR_3COM is not set
 # CONFIG_SMC91X is not set
 # CONFIG_DM9000 is not set
@@ -456,6 +491,7 @@ CONFIG_EEPRO100=y
 # CONFIG_HAMACHI is not set
 # CONFIG_YELLOWFIN is not set
 # CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
 # CONFIG_SKGE is not set
 # CONFIG_SK98LIN is not set
 # CONFIG_VIA_VELOCITY is not set
@@ -465,6 +501,7 @@ CONFIG_EEPRO100=y
 #
 # Ethernet (10000 Mbit)
 #
+# CONFIG_CHELSIO_T1 is not set
 # CONFIG_IXGB is not set
 # CONFIG_S2IO is not set
@@ -610,6 +647,7 @@ CONFIG_IXP2000_WATCHDOG=y
 # TPM devices
 #
 # CONFIG_TCG_TPM is not set
+# CONFIG_TELCLOCK is not set
 #
 # I2C support
@@ -635,7 +673,6 @@ CONFIG_I2C_ALGOBIT=y
 # CONFIG_I2C_I801 is not set
 # CONFIG_I2C_I810 is not set
 # CONFIG_I2C_PIIX4 is not set
-# CONFIG_I2C_ISA is not set
 CONFIG_I2C_IXP2000=y
 # CONFIG_I2C_NFORCE2 is not set
 # CONFIG_I2C_PARPORT_LIGHT is not set
@@ -650,7 +687,6 @@ CONFIG_I2C_IXP2000=y
 # CONFIG_I2C_VIAPRO is not set
 # CONFIG_I2C_VOODOO3 is not set
 # CONFIG_I2C_PCA_ISA is not set
-CONFIG_I2C_SENSOR=y
 #
 # Miscellaneous I2C Chip support
@@ -663,6 +699,7 @@ CONFIG_SENSORS_EEPROM=y
 # CONFIG_SENSORS_PCF8591 is not set
 # CONFIG_SENSORS_RTC8564 is not set
 # CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_RTC_X1205_I2C is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
@@ -672,6 +709,7 @@ CONFIG_SENSORS_EEPROM=y
 # Hardware Monitoring support
 #
 CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
 # CONFIG_SENSORS_ADM1021 is not set
 # CONFIG_SENSORS_ADM1025 is not set
 # CONFIG_SENSORS_ADM1026 is not set
@@ -702,6 +740,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_VIA686A is not set
 # CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83792D is not set
 # CONFIG_SENSORS_W83L785TS is not set
 # CONFIG_SENSORS_W83627HF is not set
 # CONFIG_SENSORS_W83627EHF is not set
@@ -712,6 +751,10 @@ CONFIG_HWMON=y
 #
 #
+# Multimedia Capabilities Port drivers
+#
+#
 # Multimedia devices
 #
 # CONFIG_VIDEO_DEV is not set
@@ -739,6 +782,10 @@ CONFIG_USB_ARCH_HAS_OHCI=y
 # CONFIG_USB is not set
 #
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+#
 # USB Gadget Support
 #
 # CONFIG_USB_GADGET is not set
@@ -766,10 +813,6 @@ CONFIG_FS_MBCACHE=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 CONFIG_FS_POSIX_ACL=y
-#
-# XFS support
-#
 # CONFIG_XFS_FS is not set
 # CONFIG_MINIX_FS is not set
 # CONFIG_ROMFS_FS is not set
@@ -778,6 +821,7 @@ CONFIG_INOTIFY=y
 CONFIG_DNOTIFY=y
 # CONFIG_AUTOFS_FS is not set
 # CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
 #
 # CD-ROM/DVD Filesystems
@@ -797,11 +841,10 @@ CONFIG_DNOTIFY=y
 #
 CONFIG_PROC_FS=y
 CONFIG_SYSFS=y
-# CONFIG_DEVPTS_FS_XATTR is not set
 CONFIG_TMPFS=y
-# CONFIG_TMPFS_XATTR is not set
 # CONFIG_HUGETLB_PAGE is not set
 CONFIG_RAMFS=y
+# CONFIG_RELAYFS_FS is not set
 #
 # Miscellaneous filesystems
@@ -817,6 +860,7 @@ CONFIG_RAMFS=y
 CONFIG_JFFS2_FS=y
 CONFIG_JFFS2_FS_DEBUG=0
 CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_SUMMARY is not set
 # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
 CONFIG_JFFS2_ZLIB=y
 CONFIG_JFFS2_RTIME=y
@@ -849,6 +893,7 @@ CONFIG_SUNRPC=y
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
 # CONFIG_AFS_FS is not set
+# CONFIG_9P_FS is not set
 #
 # Partition Types
@@ -887,6 +932,7 @@ CONFIG_MSDOS_PARTITION=y
 CONFIG_DEBUG_KERNEL=y
 CONFIG_MAGIC_SYSRQ=y
 CONFIG_LOG_BUF_SHIFT=14
+CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_SCHEDSTATS is not set
 # CONFIG_DEBUG_SLAB is not set
 # CONFIG_DEBUG_SPINLOCK is not set
@@ -895,7 +941,9 @@ CONFIG_LOG_BUF_SHIFT=14
 CONFIG_DEBUG_BUGVERBOSE=y
 # CONFIG_DEBUG_INFO is not set
 # CONFIG_DEBUG_FS is not set
+# CONFIG_DEBUG_VM is not set
 CONFIG_FRAME_POINTER=y
+# CONFIG_RCU_TORTURE_TEST is not set
 CONFIG_DEBUG_USER=y
 # CONFIG_DEBUG_WAITQ is not set
 CONFIG_DEBUG_ERRORS=y
@@ -921,6 +969,7 @@ CONFIG_DEBUG_LL=y
 # Library routines
 #
 # CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
 CONFIG_CRC32=y
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
diff --git a/arch/arm/configs/ixdp2801_defconfig b/arch/arm/configs/ixdp2801_defconfig
index 66ac0885df3e..89b9aa06aa91 100644
--- a/arch/arm/configs/ixdp2801_defconfig
+++ b/arch/arm/configs/ixdp2801_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.13
+# Linux kernel version: 2.6.14-git13
-# Wed Sep 14 10:52:16 2005
+# Thu Nov 10 15:15:03 2005
 #
 CONFIG_ARM=y
 CONFIG_MMU=y
@@ -21,6 +21,7 @@ CONFIG_INIT_ENV_ARG_LIMIT=32
 # General setup
 #
 CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 # CONFIG_POSIX_MQUEUE is not set
@@ -31,6 +32,7 @@ CONFIG_SYSCTL=y
 # CONFIG_HOTPLUG is not set
 CONFIG_KOBJECT_UEVENT=y
 # CONFIG_IKCONFIG is not set
+CONFIG_INITRAMFS_SOURCE=""
 CONFIG_EMBEDDED=y
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_ALL is not set
@@ -61,6 +63,23 @@ CONFIG_OBSOLETE_MODPARM=y
 CONFIG_KMOD=y
 #
+# Block layer
+#
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+#
 # System Type
 #
 # CONFIG_ARCH_CLPS7500 is not set
@@ -82,6 +101,7 @@ CONFIG_ARCH_IXP2000=y
 # CONFIG_ARCH_LH7A40X is not set
 # CONFIG_ARCH_OMAP is not set
 # CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_REALVIEW is not set
 # CONFIG_ARCH_IMX is not set
 # CONFIG_ARCH_H720X is not set
 # CONFIG_ARCH_AAEC2000 is not set
@@ -125,7 +145,6 @@ CONFIG_XSCALE_PMU=y
 CONFIG_ISA_DMA_API=y
 CONFIG_PCI=y
 CONFIG_PCI_LEGACY_PROC=y
-CONFIG_PCI_NAMES=y
 # CONFIG_PCI_DEBUG is not set
 #
@@ -145,6 +164,8 @@ CONFIG_FLATMEM_MANUAL=y
 # CONFIG_SPARSEMEM_MANUAL is not set
 CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4096
 CONFIG_ALIGNMENT_TRAP=y
 #
@@ -163,6 +184,7 @@ CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/nfs ip=bootp mem=64M@0x0 pci=firm
 # At least one emulation must be selected
 #
 CONFIG_FPE_NWFPE=y
+CONFIG_FPE_NWFPE_XP=y
 # CONFIG_FPE_FASTFPE is not set
 #
@@ -206,14 +228,19 @@ CONFIG_SYN_COOKIES=y
 # CONFIG_INET_ESP is not set
 # CONFIG_INET_IPCOMP is not set
 # CONFIG_INET_TUNNEL is not set
-# CONFIG_IP_TCPDIAG is not set
+CONFIG_INET_DIAG=y
-# CONFIG_IP_TCPDIAG_IPV6 is not set
+CONFIG_INET_TCP_DIAG=y
 # CONFIG_TCP_CONG_ADVANCED is not set
 CONFIG_TCP_CONG_BIC=y
 # CONFIG_IPV6 is not set
 # CONFIG_NETFILTER is not set
 #
+# DCCP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_DCCP is not set
+#
 # SCTP Configuration (EXPERIMENTAL)
 #
 # CONFIG_IP_SCTP is not set
@@ -229,6 +256,10 @@ CONFIG_TCP_CONG_BIC=y
 # CONFIG_NET_DIVERT is not set
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
+#
+# QoS and/or fair queueing
+#
 # CONFIG_NET_SCHED is not set
 # CONFIG_NET_CLS_ROUTE is not set
@@ -239,6 +270,7 @@ CONFIG_TCP_CONG_BIC=y
 # CONFIG_HAMRADIO is not set
 # CONFIG_IRDA is not set
 # CONFIG_BT is not set
+# CONFIG_IEEE80211 is not set
 #
 # Device Drivers
@@ -274,6 +306,7 @@ CONFIG_MTD_BLOCK=y
 # CONFIG_FTL is not set
 # CONFIG_NFTL is not set
 # CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
 #
 # RAM/ROM/Flash chip drivers
@@ -308,7 +341,6 @@ CONFIG_MTD_COMPLEX_MAPPINGS=y
 # CONFIG_MTD_PHYSMAP is not set
 # CONFIG_MTD_ARM_INTEGRATOR is not set
 CONFIG_MTD_IXP2000=y
-# CONFIG_MTD_EDB7312 is not set
 # CONFIG_MTD_PCI is not set
 # CONFIG_MTD_PLATRAM is not set
@@ -335,6 +367,11 @@ CONFIG_MTD_IXP2000=y
 # CONFIG_MTD_NAND is not set
 #
+# OneNAND Flash Device Drivers
+#
+# CONFIG_MTD_ONENAND is not set
+#
 # Parallel port support
 #
 # CONFIG_PARPORT is not set
@@ -359,21 +396,13 @@ CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=16
 CONFIG_BLK_DEV_RAM_SIZE=8192
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_INITRAMFS_SOURCE=""
 # CONFIG_CDROM_PKTCDVD is not set
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
 # CONFIG_ATA_OVER_ETH is not set
 #
 # SCSI device support
 #
+# CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
 #
@@ -411,12 +440,18 @@ CONFIG_DUMMY=y
 # CONFIG_ARCNET is not set
 #
+# PHY device support
+#
+# CONFIG_PHYLIB is not set
+#
 # Ethernet (10 or 100Mbit)
 #
 CONFIG_NET_ETHERNET=y
 CONFIG_MII=y
 # CONFIG_HAPPYMEAL is not set
 # CONFIG_SUNGEM is not set
+# CONFIG_CASSINI is not set
 # CONFIG_NET_VENDOR_3COM is not set
 # CONFIG_SMC91X is not set
 # CONFIG_DM9000 is not set
@@ -457,6 +492,7 @@ CONFIG_EEPRO100=y
 # CONFIG_HAMACHI is not set
 # CONFIG_YELLOWFIN is not set
 # CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
 # CONFIG_SKGE is not set
 # CONFIG_SK98LIN is not set
 # CONFIG_VIA_VELOCITY is not set
@@ -466,6 +502,7 @@ CONFIG_EEPRO100=y
 #
 # Ethernet (10000 Mbit)
 #
+# CONFIG_CHELSIO_T1 is not set
 # CONFIG_IXGB is not set
 # CONFIG_S2IO is not set
@@ -611,6 +648,7 @@ CONFIG_IXP2000_WATCHDOG=y
 # TPM devices
 #
 # CONFIG_TCG_TPM is not set
+# CONFIG_TELCLOCK is not set
 #
 # I2C support
@@ -636,7 +674,6 @@ CONFIG_I2C_ALGOBIT=y
 # CONFIG_I2C_I801 is not set
 # CONFIG_I2C_I810 is not set
 # CONFIG_I2C_PIIX4 is not set
-# CONFIG_I2C_ISA is not set
 CONFIG_I2C_IXP2000=y
 # CONFIG_I2C_NFORCE2 is not set
 # CONFIG_I2C_PARPORT_LIGHT is not set
@@ -651,7 +688,6 @@ CONFIG_I2C_IXP2000=y
 # CONFIG_I2C_VIAPRO is not set
 # CONFIG_I2C_VOODOO3 is not set
 # CONFIG_I2C_PCA_ISA is not set
-CONFIG_I2C_SENSOR=y
 #
 # Miscellaneous I2C Chip support
@@ -664,6 +700,7 @@ CONFIG_SENSORS_EEPROM=y
 # CONFIG_SENSORS_PCF8591 is not set
 # CONFIG_SENSORS_RTC8564 is not set
 # CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_RTC_X1205_I2C is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
@@ -673,6 +710,7 @@ CONFIG_SENSORS_EEPROM=y
 # Hardware Monitoring support
 #
 CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
 # CONFIG_SENSORS_ADM1021 is not set
 # CONFIG_SENSORS_ADM1025 is not set
 # CONFIG_SENSORS_ADM1026 is not set
@@ -703,6 +741,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_VIA686A is not set
 # CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83792D is not set
 # CONFIG_SENSORS_W83L785TS is not set
 # CONFIG_SENSORS_W83627HF is not set
 # CONFIG_SENSORS_W83627EHF is not set
@@ -713,6 +752,10 @@ CONFIG_HWMON=y
 #
 #
+# Multimedia Capabilities Port drivers
+#
+#
 # Multimedia devices
 #
 # CONFIG_VIDEO_DEV is not set
@@ -740,6 +783,10 @@ CONFIG_USB_ARCH_HAS_OHCI=y
 # CONFIG_USB is not set
 #
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+#
 # USB Gadget Support
 #
 # CONFIG_USB_GADGET is not set
@@ -767,10 +814,6 @@ CONFIG_FS_MBCACHE=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 CONFIG_FS_POSIX_ACL=y
-#
-# XFS support
-#
 # CONFIG_XFS_FS is not set
 # CONFIG_MINIX_FS is not set
 # CONFIG_ROMFS_FS is not set
@@ -779,6 +822,7 @@ CONFIG_INOTIFY=y
 CONFIG_DNOTIFY=y
 # CONFIG_AUTOFS_FS is not set
 # CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
 #
 # CD-ROM/DVD Filesystems
@@ -798,11 +842,10 @@ CONFIG_DNOTIFY=y
 #
 CONFIG_PROC_FS=y
 CONFIG_SYSFS=y
-# CONFIG_DEVPTS_FS_XATTR is not set
 CONFIG_TMPFS=y
-# CONFIG_TMPFS_XATTR is not set
 # CONFIG_HUGETLB_PAGE is not set
 CONFIG_RAMFS=y
+# CONFIG_RELAYFS_FS is not set
 #
 # Miscellaneous filesystems
@@ -818,6 +861,7 @@ CONFIG_RAMFS=y
 CONFIG_JFFS2_FS=y
 CONFIG_JFFS2_FS_DEBUG=0
 CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_SUMMARY is not set
 # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
 CONFIG_JFFS2_ZLIB=y
 CONFIG_JFFS2_RTIME=y
@@ -850,6 +894,7 @@ CONFIG_SUNRPC=y
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
 # CONFIG_AFS_FS is not set
+# CONFIG_9P_FS is not set
 #
 # Partition Types
@@ -888,6 +933,7 @@ CONFIG_MSDOS_PARTITION=y
 CONFIG_DEBUG_KERNEL=y
 CONFIG_MAGIC_SYSRQ=y
 CONFIG_LOG_BUF_SHIFT=14
+CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_SCHEDSTATS is not set
 # CONFIG_DEBUG_SLAB is not set
 # CONFIG_DEBUG_SPINLOCK is not set
@@ -896,7 +942,9 @@ CONFIG_LOG_BUF_SHIFT=14
 CONFIG_DEBUG_BUGVERBOSE=y
 # CONFIG_DEBUG_INFO is not set
 # CONFIG_DEBUG_FS is not set
+# CONFIG_DEBUG_VM is not set
 CONFIG_FRAME_POINTER=y
+# CONFIG_RCU_TORTURE_TEST is not set
 CONFIG_DEBUG_USER=y
 # CONFIG_DEBUG_WAITQ is not set
 CONFIG_DEBUG_ERRORS=y
@@ -922,6 +970,7 @@ CONFIG_DEBUG_LL=y
 # Library routines
 #
 # CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
 CONFIG_CRC32=y
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
diff --git a/arch/arm/configs/omap_h2_1610_defconfig b/arch/arm/configs/omap_h2_1610_defconfig
index 4198677cd394..529f0f72e1e9 100644
--- a/arch/arm/configs/omap_h2_1610_defconfig
+++ b/arch/arm/configs/omap_h2_1610_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.13
+# Linux kernel version: 2.6.14
-# Mon Sep  5 18:07:12 2005
+# Wed Nov  9 18:53:40 2005
 #
 CONFIG_ARM=y
 CONFIG_MMU=y
@@ -22,6 +22,7 @@ CONFIG_INIT_ENV_ARG_LIMIT=32
 # General setup
 #
 CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 # CONFIG_POSIX_MQUEUE is not set
@@ -31,6 +32,7 @@ CONFIG_SYSCTL=y
 # CONFIG_HOTPLUG is not set
 CONFIG_KOBJECT_UEVENT=y
 # CONFIG_IKCONFIG is not set
+CONFIG_INITRAMFS_SOURCE=""
 # CONFIG_EMBEDDED is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
@@ -60,6 +62,23 @@ CONFIG_OBSOLETE_MODPARM=y
 # CONFIG_KMOD is not set
 #
+# Block layer
+#
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+#
 # System Type
 #
 # CONFIG_ARCH_CLPS7500 is not set
@@ -81,6 +100,7 @@ CONFIG_OBSOLETE_MODPARM=y
 # CONFIG_ARCH_LH7A40X is not set
 CONFIG_ARCH_OMAP=y
 # CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_REALVIEW is not set
 # CONFIG_ARCH_IMX is not set
 # CONFIG_ARCH_H720X is not set
 # CONFIG_ARCH_AAEC2000 is not set
@@ -112,7 +132,7 @@ CONFIG_OMAP_SERIAL_WAKE=y
 # OMAP Core Type
 #
 # CONFIG_ARCH_OMAP730 is not set
-# CONFIG_ARCH_OMAP1510 is not set
+# CONFIG_ARCH_OMAP15XX is not set
 CONFIG_ARCH_OMAP16XX=y
 #
@@ -177,6 +197,8 @@ CONFIG_FLATMEM_MANUAL=y
 # CONFIG_SPARSEMEM_MANUAL is not set
 CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4096
 # CONFIG_LEDS is not set
 CONFIG_ALIGNMENT_TRAP=y
@@ -258,14 +280,19 @@ CONFIG_IP_PNP_BOOTP=y
 # CONFIG_INET_ESP is not set
 # CONFIG_INET_IPCOMP is not set
 # CONFIG_INET_TUNNEL is not set
-CONFIG_IP_TCPDIAG=y
+CONFIG_INET_DIAG=y
-# CONFIG_IP_TCPDIAG_IPV6 is not set
+CONFIG_INET_TCP_DIAG=y
 # CONFIG_TCP_CONG_ADVANCED is not set
 CONFIG_TCP_CONG_BIC=y
 # CONFIG_IPV6 is not set
 # CONFIG_NETFILTER is not set
 #
+# DCCP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_DCCP is not set
+#
 # SCTP Configuration (EXPERIMENTAL)
 #
 # CONFIG_IP_SCTP is not set
@@ -281,6 +308,10 @@ CONFIG_TCP_CONG_BIC=y
 # CONFIG_NET_DIVERT is not set
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
+#
+# QoS and/or fair queueing
+#
 # CONFIG_NET_SCHED is not set
 # CONFIG_NET_CLS_ROUTE is not set
@@ -291,6 +322,7 @@ CONFIG_TCP_CONG_BIC=y
 # CONFIG_HAMRADIO is not set
 # CONFIG_IRDA is not set
 # CONFIG_BT is not set
+# CONFIG_IEEE80211 is not set
 #
 # Device Drivers
@@ -328,21 +360,13 @@ CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=16
 CONFIG_BLK_DEV_RAM_SIZE=8192
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_INITRAMFS_SOURCE=""
 # CONFIG_CDROM_PKTCDVD is not set
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
 CONFIG_ATA_OVER_ETH=m
 #
 # SCSI device support
 #
+# CONFIG_RAID_ATTRS is not set
 CONFIG_SCSI=y
 CONFIG_SCSI_PROC_FS=y
@@ -369,10 +393,12 @@ CONFIG_SCSI_PROC_FS=y
 # CONFIG_SCSI_SPI_ATTRS is not set
 # CONFIG_SCSI_FC_ATTRS is not set
 # CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_ATTRS is not set
 #
 # SCSI low-level drivers
 #
+# CONFIG_ISCSI_TCP is not set
 # CONFIG_SCSI_SATA is not set
 # CONFIG_SCSI_DEBUG is not set
@@ -404,6 +430,11 @@ CONFIG_NETDEVICES=y
 # CONFIG_TUN is not set
 #
+# PHY device support
+#
+# CONFIG_PHYLIB is not set
+#
 # Ethernet (10 or 100Mbit)
 #
 CONFIG_NET_ETHERNET=y
@@ -439,6 +470,7 @@ CONFIG_PPP=y
 # CONFIG_PPP_SYNC_TTY is not set
 # CONFIG_PPP_DEFLATE is not set
 # CONFIG_PPP_BSDCOMP is not set
+# CONFIG_PPP_MPPE is not set
 # CONFIG_PPPOE is not set
 CONFIG_SLIP=y
 CONFIG_SLIP_COMPRESSED=y
@@ -541,18 +573,18 @@ CONFIG_WATCHDOG_NOWAYOUT=y
 #
 # TPM devices
 #
+# CONFIG_TELCLOCK is not set
 #
 # I2C support
 #
 # CONFIG_I2C is not set
-# CONFIG_I2C_SENSOR is not set
-CONFIG_ISP1301_OMAP=y
 #
 # Hardware Monitoring support
 #
 CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
 # CONFIG_HWMON_DEBUG_CHIP is not set
 #
@@ -560,6 +592,10 @@ CONFIG_HWMON=y
 #
 #
+# Multimedia Capabilities Port drivers
+#
+#
 # Multimedia devices
 #
 # CONFIG_VIDEO_DEV is not set
@@ -576,7 +612,6 @@ CONFIG_FB=y
 # CONFIG_FB_CFB_FILLRECT is not set
 # CONFIG_FB_CFB_COPYAREA is not set
 # CONFIG_FB_CFB_IMAGEBLIT is not set
-# CONFIG_FB_SOFT_CURSOR is not set
 # CONFIG_FB_MACMODES is not set
 CONFIG_FB_MODE_HELPERS=y
 # CONFIG_FB_TILEBLITTING is not set
@@ -589,6 +624,7 @@ CONFIG_FB_MODE_HELPERS=y
 # CONFIG_VGA_CONSOLE is not set
 CONFIG_DUMMY_CONSOLE=y
 CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
 CONFIG_FONTS=y
 CONFIG_FONT_8x8=y
 CONFIG_FONT_8x16=y
@@ -600,6 +636,7 @@ CONFIG_FONT_8x16=y
 # CONFIG_FONT_SUN8x16 is not set
 # CONFIG_FONT_SUN12x22 is not set
 # CONFIG_FONT_10x18 is not set
+# CONFIG_FONT_RL is not set
 #
 # Logo configuration
@@ -624,10 +661,10 @@ CONFIG_SOUND=y
 # Open Sound System
 #
 CONFIG_SOUND_PRIME=y
+# CONFIG_OBSOLETE_OSS_DRIVER is not set
 # CONFIG_SOUND_MSNDCLAS is not set
 # CONFIG_SOUND_MSNDPIN is not set
 # CONFIG_SOUND_OSS is not set
-# CONFIG_SOUND_AD1980 is not set
 #
 # USB support
@@ -637,22 +674,21 @@ CONFIG_USB_ARCH_HAS_OHCI=y
 # CONFIG_USB is not set
 #
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+#
 # USB Gadget Support
 #
-CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET is not set
-# CONFIG_USB_GADGET_DEBUG_FILES is not set
-CONFIG_USB_GADGET_SELECTED=y
 # CONFIG_USB_GADGET_NET2280 is not set
 # CONFIG_USB_GADGET_PXA2XX is not set
 # CONFIG_USB_GADGET_GOKU is not set
 # CONFIG_USB_GADGET_LH7A40X is not set
-CONFIG_USB_GADGET_OMAP=y
+# CONFIG_USB_GADGET_OMAP is not set
-CONFIG_USB_OMAP=y
 # CONFIG_USB_GADGET_DUMMY_HCD is not set
-# CONFIG_USB_GADGET_DUALSPEED is not set
 # CONFIG_USB_ZERO is not set
-CONFIG_USB_ETH=y
+# CONFIG_USB_ETH is not set
-CONFIG_USB_ETH_RNDIS=y
 # CONFIG_USB_GADGETFS is not set
 # CONFIG_USB_FILE_STORAGE is not set
 # CONFIG_USB_G_SERIAL is not set
@@ -673,10 +709,6 @@ CONFIG_EXT2_FS=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
-#
-# XFS support
-#
 # CONFIG_XFS_FS is not set
 # CONFIG_MINIX_FS is not set
 CONFIG_ROMFS_FS=y
@@ -685,6 +717,7 @@ CONFIG_INOTIFY=y
 CONFIG_DNOTIFY=y
 # CONFIG_AUTOFS_FS is not set
 # CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
 #
 # CD-ROM/DVD Filesystems
@@ -706,10 +739,10 @@ CONFIG_FAT_DEFAULT_CODEPAGE=437
 #
 CONFIG_PROC_FS=y
 CONFIG_SYSFS=y
-# CONFIG_DEVPTS_FS_XATTR is not set
 # CONFIG_TMPFS is not set
 # CONFIG_HUGETLB_PAGE is not set
 CONFIG_RAMFS=y
+# CONFIG_RELAYFS_FS is not set
 #
 # Miscellaneous filesystems
@@ -750,6 +783,7 @@ CONFIG_RPCSEC_GSS_KRB5=y
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
 # CONFIG_AFS_FS is not set
+# CONFIG_9P_FS is not set
 #
 # Partition Types
@@ -859,6 +893,7 @@ CONFIG_CRYPTO_DES=y
 # Library routines
 #
 # CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
 CONFIG_CRC32=y
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index ba298277becd..30494aab829a 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -86,12 +86,16 @@ EXPORT_SYMBOL(pm_power_off);
 */
 void default_idle(void)
 {
-        local_irq_disable();
+        if (hlt_counter)
-        if (!need_resched() && !hlt_counter) {
+                cpu_relax();
-                timer_dyn_reprogram();
+        else {
-                arch_idle();
+                local_irq_disable();
+                if (!need_resched()) {
+                        timer_dyn_reprogram();
+                        arch_idle();
+                }
+                local_irq_enable();
        }
-        local_irq_enable();
 }
 /*
@@ -116,13 +120,13 @@ void cpu_idle(void)
                if (!idle)
                        idle = default_idle;
-                preempt_disable();
                leds_event(led_idle_start);
                while (!need_resched())
                        idle();
                leds_event(led_idle_end);
-                preempt_enable();
+                preempt_enable_no_resched();
                schedule();
+                preempt_disable();
        }
 }
@@ -355,7 +359,7 @@ copy_thread(int nr, unsigned long clone_flags, unsigned long stack_start,
        struct thread_info *thread = p->thread_info;
        struct pt_regs *childregs;
-        childregs = ((struct pt_regs *)((unsigned long)thread + THREAD_START_SP)) - 1;
+        childregs = (void *)thread + THREAD_START_SP - sizeof(*regs);
        *childregs = *regs;
        childregs->ARM_r0 = 0;
        childregs->ARM_sp = stack_start;
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 77e2e9ca89fa..e55ea952f7aa 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -256,7 +256,9 @@ void __cpuexit cpu_die(void)
 asmlinkage void __cpuinit secondary_start_kernel(void)
 {
        struct mm_struct *mm = &init_mm;
-        unsigned int cpu = smp_processor_id();
+        unsigned int cpu;
+        cpu = smp_processor_id();
        printk("CPU%u: Booted secondary processor\n", cpu);
@@ -273,6 +275,7 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
        local_flush_tlb_all();
        cpu_init();
+        preempt_disable();
        /*
         * Give the platform a chance to do its own initialisation.
diff --git a/arch/arm/lib/bitops.h b/arch/arm/lib/bitops.h
index f35d91fbe117..b8c14e936697 100644
--- a/arch/arm/lib/bitops.h
+++ b/arch/arm/lib/bitops.h
@@ -34,7 +34,7 @@
        and     r2, r0, #7
        mov     r3, #1
        mov     r3, r3, lsl r2
-        save_and_disable_irqs ip, r2
+        save_and_disable_irqs ip
        ldrb    r2, [r1, r0, lsr #3]
        \instr  r2, r2, r3
        strb    r2, [r1, r0, lsr #3]
@@ -54,7 +54,7 @@
        add     r1, r1, r0, lsr #3
        and     r3, r0, #7
        mov     r0, #1
-        save_and_disable_irqs ip, r2
+        save_and_disable_irqs ip
        ldrb    r2, [r1]
        tst     r2, r0, lsl r3
        \instr  r2, r2, r0, lsl r3
diff --git a/arch/arm/lib/csumpartial.S b/arch/arm/lib/csumpartial.S
index cb5e3708f118..a78dae5a7b28 100644
--- a/arch/arm/lib/csumpartial.S
+++ b/arch/arm/lib/csumpartial.S
@@ -26,7 +26,7 @@ td1	.req	r4	@ save before use
 td2     .req    r5      @ save before use
 td3     .req    lr
-.zero:          mov     r0, sum
+.Lzero:         mov     r0, sum
                add     sp, sp, #4
                ldr     pc, [sp], #4
@@ -34,21 +34,22 @@ td3	.req	lr
                 * Handle 0 to 7 bytes, with any alignment of source and
                 * destination pointers.  Note that when we get here, C = 0
                 */
-.less8:         teq     len, #0                 @ check for zero count
+.Lless8:                teq     len, #0                 @ check for zero count
-                beq     .zero
+                beq     .Lzero
                /* we must have at least one byte. */
                tst     buf, #1                 @ odd address?
+                movne   sum, sum, ror #8
                ldrneb  td0, [buf], #1
                subne   len, len, #1
                adcnes  sum, sum, td0, put_byte_1
-.less4:         tst     len, #6
+.Lless4:                tst     len, #6
-                beq     .less8_byte
+                beq     .Lless8_byte
                /* we are now half-word aligned */
-.less8_wordlp:
+.Lless8_wordlp:
 #if __LINUX_ARM_ARCH__ >= 4
                ldrh    td0, [buf], #2
                sub     len, len, #2
@@ -64,19 +65,19 @@ td3	.req	lr
 #endif
                adcs    sum, sum, td0
                tst     len, #6
-                bne     .less8_wordlp
+                bne     .Lless8_wordlp
-.less8_byte:    tst     len, #1                 @ odd number of bytes
+.Lless8_byte:   tst     len, #1                 @ odd number of bytes
                ldrneb  td0, [buf], #1          @ include last byte
                adcnes  sum, sum, td0, put_byte_0       @ update checksum
-.done:          adc     r0, sum, #0             @ collect up the last carry
+.Ldone:         adc     r0, sum, #0             @ collect up the last carry
                ldr     td0, [sp], #4
                tst     td0, #1                 @ check buffer alignment
                movne   r0, r0, ror #8          @ rotate checksum by 8 bits
                ldr     pc, [sp], #4            @ return
-.not_aligned:   tst     buf, #1                 @ odd address
+.Lnot_aligned:  tst     buf, #1                 @ odd address
                ldrneb  td0, [buf], #1          @ make even
                subne   len, len, #1
                adcnes  sum, sum, td0, put_byte_1       @ update checksum
@@ -101,11 +102,14 @@ td3	.req	lr
 ENTRY(csum_partial)
                stmfd   sp!, {buf, lr}
                cmp     len, #8                 @ Ensure that we have at least
-                blo     .less8                  @ 8 bytes to copy.
+                blo     .Lless8                 @ 8 bytes to copy.
+                tst     buf, #1
+                movne   sum, sum, ror #8
                adds    sum, sum, #0            @ C = 0
                tst     buf, #3                 @ Test destination alignment
-                blne    .not_aligned            @ aligh destination, return here
+                blne    .Lnot_aligned           @ align destination, return here
 1:              bics    ip, len, #31
                beq     3f
@@ -127,11 +131,11 @@ ENTRY(csum_partial)
                ldmfd   sp!, {r4 - r5}
 3:              tst     len, #0x1c              @ should not change C
-                beq     .less4
+                beq     .Lless4
 4:              ldr     td0, [buf], #4
                sub     len, len, #4
                adcs    sum, sum, td0
                tst     len, #0x1c
                bne     4b
-                b       .less4
+                b       .Lless4
diff --git a/arch/arm/lib/csumpartialcopygeneric.S b/arch/arm/lib/csumpartialcopygeneric.S
index d3a2f4667db4..4a4609c19095 100644
--- a/arch/arm/lib/csumpartialcopygeneric.S
+++ b/arch/arm/lib/csumpartialcopygeneric.S
@@ -22,7 +22,7 @@ dst	.req	r1
 len     .req    r2
 sum     .req    r3
-.zero:          mov     r0, sum
+.Lzero:         mov     r0, sum
                load_regs       ea
                /*
@@ -31,8 +31,9 @@ sum	.req	r3
                 * the length.  Note that the source pointer hasn't been
                 * aligned yet.
                 */
-.dst_unaligned: tst     dst, #1
+.Ldst_unaligned:
-                beq     .dst_16bit
+                tst     dst, #1
+                beq     .Ldst_16bit
                load1b  ip
                sub     len, len, #1
@@ -41,7 +42,7 @@ sum	.req	r3
                tst     dst, #2
                moveq   pc, lr                  @ dst is now 32bit aligned
-.dst_16bit:     load2b  r8, ip
+.Ldst_16bit:    load2b  r8, ip
                sub     len, len, #2
                adcs    sum, sum, r8, put_byte_0
                strb    r8, [dst], #1
@@ -53,12 +54,12 @@ sum	.req	r3
                 * Handle 0 to 7 bytes, with any alignment of source and
                 * destination pointers.  Note that when we get here, C = 0
                 */
-.less8:         teq     len, #0                 @ check for zero count
+.Lless8:        teq     len, #0                 @ check for zero count
-                beq     .zero
+                beq     .Lzero
                /* we must have at least one byte. */
                tst     dst, #1                 @ dst 16-bit aligned
-                beq     .less8_aligned
+                beq     .Lless8_aligned
                /* Align dst */
                load1b  ip
@@ -66,7 +67,7 @@ sum	.req	r3
                adcs    sum, sum, ip, put_byte_1        @ update checksum
                strb    ip, [dst], #1
                tst     len, #6
-                beq     .less8_byteonly
+                beq     .Lless8_byteonly
 1:              load2b  r8, ip
                sub     len, len, #2
@@ -74,15 +75,16 @@ sum	.req	r3
                strb    r8, [dst], #1
                adcs    sum, sum, ip, put_byte_1
                strb    ip, [dst], #1
-.less8_aligned: tst     len, #6
+.Lless8_aligned:
+                tst     len, #6
                bne     1b
-.less8_byteonly:
+.Lless8_byteonly:
                tst     len, #1
-                beq     .done
+                beq     .Ldone
                load1b  r8
                adcs    sum, sum, r8, put_byte_0        @ update checksum
                strb    r8, [dst], #1
-                b       .done
+                b       .Ldone
 FN_ENTRY
                mov     ip, sp
@@ -90,11 +92,11 @@ FN_ENTRY
                sub     fp, ip, #4
                cmp     len, #8                 @ Ensure that we have at least
-                blo     .less8                  @ 8 bytes to copy.
+                blo     .Lless8                 @ 8 bytes to copy.
                adds    sum, sum, #0            @ C = 0
                tst     dst, #3                 @ Test destination alignment
-                blne    .dst_unaligned          @ align destination, return here
+                blne    .Ldst_unaligned         @ align destination, return here
                /*
                 * Ok, the dst pointer is now 32bit aligned, and we know
@@ -103,7 +105,7 @@ FN_ENTRY
                 */
                tst     src, #3                 @ Test source alignment
-                bne     .src_not_aligned
+                bne     .Lsrc_not_aligned
                /* Routine for src & dst aligned */
@@ -136,17 +138,17 @@ FN_ENTRY
                adcs    sum, sum, r4
 4:              ands    len, len, #3
-                beq     .done
+                beq     .Ldone
                load1l  r4
                tst     len, #2
                mov     r5, r4, get_byte_0
-                beq     .exit
+                beq     .Lexit
                adcs    sum, sum, r4, push #16
                strb    r5, [dst], #1
                mov     r5, r4, get_byte_1
                strb    r5, [dst], #1
                mov     r5, r4, get_byte_2
-.exit:          tst     len, #1
+.Lexit:         tst     len, #1
                strneb  r5, [dst], #1
                andne   r5, r5, #255
                adcnes  sum, sum, r5, put_byte_0
@@ -157,20 +159,20 @@ FN_ENTRY
                 * the inefficient byte manipulations in the
                 * architecture independent code.
                 */
-.done:          adc     r0, sum, #0
+.Ldone:         adc     r0, sum, #0
                ldr     sum, [sp, #0]           @ dst
                tst     sum, #1
                movne   r0, r0, ror #8
                load_regs       ea
-.src_not_aligned:
+.Lsrc_not_aligned:
                adc     sum, sum, #0            @ include C from dst alignment
                and     ip, src, #3
                bic     src, src, #3
                load1l  r5
                cmp     ip, #2
-                beq     .src2_aligned
+                beq     .Lsrc2_aligned
-                bhi     .src3_aligned
+                bhi     .Lsrc3_aligned
                mov     r4, r5, pull #8         @ C = 0
                bics    ip, len, #15
                beq     2f
@@ -211,18 +213,18 @@ FN_ENTRY
                adcs    sum, sum, r4
                mov     r4, r5, pull #8
 4:              ands    len, len, #3
-                beq     .done
+                beq     .Ldone
                mov     r5, r4, get_byte_0
                tst     len, #2
-                beq     .exit
+                beq     .Lexit
                adcs    sum, sum, r4, push #16
                strb    r5, [dst], #1
                mov     r5, r4, get_byte_1
                strb    r5, [dst], #1
                mov     r5, r4, get_byte_2
-                b       .exit
+                b       .Lexit
-.src2_aligned:  mov     r4, r5, pull #16
+.Lsrc2_aligned: mov     r4, r5, pull #16
                adds    sum, sum, #0
                bics    ip, len, #15
                beq     2f
@@ -263,20 +265,20 @@ FN_ENTRY
                adcs    sum, sum, r4
                mov     r4, r5, pull #16
 4:              ands    len, len, #3
-                beq     .done
+                beq     .Ldone
                mov     r5, r4, get_byte_0
                tst     len, #2
-                beq     .exit
+                beq     .Lexit
                adcs    sum, sum, r4
                strb    r5, [dst], #1
                mov     r5, r4, get_byte_1
                strb    r5, [dst], #1
                tst     len, #1
-                beq     .done
+                beq     .Ldone
                load1b  r5
-                b       .exit
+                b       .Lexit
-.src3_aligned:  mov     r4, r5, pull #24
+.Lsrc3_aligned: mov     r4, r5, pull #24
                adds    sum, sum, #0
                bics    ip, len, #15
                beq     2f
@@ -317,10 +319,10 @@ FN_ENTRY
                adcs    sum, sum, r4
                mov     r4, r5, pull #24
 4:              ands    len, len, #3
-                beq     .done
+                beq     .Ldone
                mov     r5, r4, get_byte_0
                tst     len, #2
-                beq     .exit
+                beq     .Lexit
                strb    r5, [dst], #1
                adcs    sum, sum, r4
                load1l  r4
@@ -328,4 +330,4 @@ FN_ENTRY
                strb    r5, [dst], #1
                adcs    sum, sum, r4, push #24
                mov     r5, r4, get_byte_1
-                b       .exit
+                b       .Lexit
diff --git a/arch/arm/lib/delay.S b/arch/arm/lib/delay.S
index 3c7f7e675dd8..b3fb475b4120 100644
--- a/arch/arm/lib/delay.S
+++ b/arch/arm/lib/delay.S
@@ -11,7 +11,7 @@
 #include <asm/assembler.h>
                .text
-LC0:            .word   loops_per_jiffy
+.LC0:           .word   loops_per_jiffy
 /*
 * 0 <= r0 <= 2000
@@ -21,7 +21,7 @@ ENTRY(__udelay)
                orr     r2, r2, #0x00db
                mul     r0, r2, r0
 ENTRY(__const_udelay)                           @ 0 <= r0 <= 0x01ffffff
-                ldr     r2, LC0
+                ldr     r2, .LC0
                ldr     r2, [r2]                @ max = 0x0fffffff
                mov     r0, r0, lsr #11         @ max = 0x00003fff
                mov     r2, r2, lsr #11         @ max = 0x0003ffff
diff --git a/arch/arm/lib/findbit.S b/arch/arm/lib/findbit.S
index f055d56ea68a..6f8e27a58c78 100644
--- a/arch/arm/lib/findbit.S
+++ b/arch/arm/lib/findbit.S
@@ -27,7 +27,7 @@ ENTRY(_find_first_zero_bit_le)
                mov     r2, #0
 1:              ldrb    r3, [r0, r2, lsr #3]
                eors    r3, r3, #0xff           @ invert bits
-                bne     .found                  @ any now set - found zero bit
+                bne     .L_found                @ any now set - found zero bit
                add     r2, r2, #8              @ next bit pointer
 2:              cmp     r2, r1                  @ any more?
                blo     1b
@@ -46,7 +46,7 @@ ENTRY(_find_next_zero_bit_le)
                ldrb    r3, [r0, r2, lsr #3]
                eor     r3, r3, #0xff           @ now looking for a 1 bit
                movs    r3, r3, lsr ip          @ shift off unused bits
-                bne     .found
+                bne     .L_found
                orr     r2, r2, #7              @ if zero, then no bits here
                add     r2, r2, #1              @ align bit pointer
                b       2b                      @ loop for next bit
@@ -61,7 +61,7 @@ ENTRY(_find_first_bit_le)
                mov     r2, #0
 1:              ldrb    r3, [r0, r2, lsr #3]
                movs    r3, r3
-                bne     .found                  @ any now set - found zero bit
+                bne     .L_found                @ any now set - found zero bit
                add     r2, r2, #8              @ next bit pointer
 2:              cmp     r2, r1                  @ any more?
                blo     1b
@@ -79,7 +79,7 @@ ENTRY(_find_next_bit_le)
                beq     1b                      @ If new byte, goto old routine
                ldrb    r3, [r0, r2, lsr #3]
                movs    r3, r3, lsr ip          @ shift off unused bits
-                bne     .found
+                bne     .L_found
                orr     r2, r2, #7              @ if zero, then no bits here
                add     r2, r2, #1              @ align bit pointer
                b       2b                      @ loop for next bit
@@ -93,7 +93,7 @@ ENTRY(_find_first_zero_bit_be)
 1:              eor     r3, r2, #0x18           @ big endian byte ordering
                ldrb    r3, [r0, r3, lsr #3]
                eors    r3, r3, #0xff           @ invert bits
-                bne     .found                  @ any now set - found zero bit
+                bne     .L_found                @ any now set - found zero bit
                add     r2, r2, #8              @ next bit pointer
 2:              cmp     r2, r1                  @ any more?
                blo     1b
@@ -109,7 +109,7 @@ ENTRY(_find_next_zero_bit_be)
                ldrb    r3, [r0, r3, lsr #3]
                eor     r3, r3, #0xff           @ now looking for a 1 bit
                movs    r3, r3, lsr ip          @ shift off unused bits
-                bne     .found
+                bne     .L_found
                orr     r2, r2, #7              @ if zero, then no bits here
                add     r2, r2, #1              @ align bit pointer
                b       2b                      @ loop for next bit
@@ -121,7 +121,7 @@ ENTRY(_find_first_bit_be)
 1:              eor     r3, r2, #0x18           @ big endian byte ordering
                ldrb    r3, [r0, r3, lsr #3]
                movs    r3, r3
-                bne     .found                  @ any now set - found zero bit
+                bne     .L_found                @ any now set - found zero bit
                add     r2, r2, #8              @ next bit pointer
 2:              cmp     r2, r1                  @ any more?
                blo     1b
@@ -136,7 +136,7 @@ ENTRY(_find_next_bit_be)
                eor     r3, r2, #0x18           @ big endian byte ordering
                ldrb    r3, [r0, r3, lsr #3]
                movs    r3, r3, lsr ip          @ shift off unused bits
-                bne     .found
+                bne     .L_found
                orr     r2, r2, #7              @ if zero, then no bits here
                add     r2, r2, #1              @ align bit pointer
                b       2b                      @ loop for next bit
@@ -146,7 +146,7 @@ ENTRY(_find_next_bit_be)
 /*
 * One or more bits in the LSB of r3 are assumed to be set.
 */
-.found:
+.L_found:
 #if __LINUX_ARM_ARCH__ >= 5
                rsb     r1, r3, #0
                and     r3, r3, r1
diff --git a/arch/arm/lib/io-acorn.S b/arch/arm/lib/io-acorn.S
index 3aacd01d40e1..b153523631c3 100644
--- a/arch/arm/lib/io-acorn.S
+++ b/arch/arm/lib/io-acorn.S
@@ -17,7 +17,7 @@
                .text
                .align
-.iosl_warning:
+.Liosl_warning:
                .ascii  "<4>insl/outsl not implemented, called from %08lX\0"
                .align
@@ -27,6 +27,6 @@
 */
 ENTRY(insl)
 ENTRY(outsl)
-                adr     r0, .iosl_warning
+                adr     r0, .Liosl_warning
                mov     r1, lr
                b       printk
diff --git a/arch/arm/lib/io-readsb.S b/arch/arm/lib/io-readsb.S
index 081ef749298a..d3d8de71a2c8 100644
--- a/arch/arm/lib/io-readsb.S
+++ b/arch/arm/lib/io-readsb.S
@@ -10,7 +10,7 @@
 #include <linux/linkage.h>
 #include <asm/assembler.h>
-.insb_align:    rsb     ip, ip, #4
+.Linsb_align:   rsb     ip, ip, #4
                cmp     ip, r2
                movgt   ip, r2
                cmp     ip, #2
@@ -21,20 +21,20 @@
                ldrgtb  r3, [r0]
                strgtb  r3, [r1], #1
                subs    r2, r2, ip
-                bne     .insb_aligned
+                bne     .Linsb_aligned
 ENTRY(__raw_readsb)
                teq     r2, #0          @ do we have to check for the zero len?
                moveq   pc, lr
                ands    ip, r1, #3
-                bne     .insb_align
+                bne     .Linsb_align
-.insb_aligned:  stmfd   sp!, {r4 - r6, lr}
+.Linsb_aligned: stmfd   sp!, {r4 - r6, lr}
                subs    r2, r2, #16
-                bmi     .insb_no_16
+                bmi     .Linsb_no_16
-.insb_16_lp:    ldrb    r3, [r0]
+.Linsb_16_lp:   ldrb    r3, [r0]
                ldrb    r4, [r0]
                ldrb    r5, [r0]
                mov     r3, r3,     put_byte_0
@@ -69,13 +69,13 @@ ENTRY(__raw_readsb)
                stmia   r1!, {r3 - r6}
                subs    r2, r2, #16
-                bpl     .insb_16_lp
+                bpl     .Linsb_16_lp
                tst     r2, #15
                LOADREGS(eqfd, sp!, {r4 - r6, pc})
-.insb_no_16:    tst     r2, #8
+.Linsb_no_16:   tst     r2, #8
-                beq     .insb_no_8
+                beq     .Linsb_no_8
                ldrb    r3, [r0]
                ldrb    r4, [r0]
@@ -95,8 +95,8 @@ ENTRY(__raw_readsb)
                orr     r4, r4, ip, put_byte_3
                stmia   r1!, {r3, r4}
-.insb_no_8:     tst     r2, #4
+.Linsb_no_8:    tst     r2, #4
-                beq     .insb_no_4
+                beq     .Linsb_no_4
                ldrb    r3, [r0]
                ldrb    r4, [r0]
@@ -108,7 +108,7 @@ ENTRY(__raw_readsb)
                orr     r3, r3, r6, put_byte_3
                str     r3, [r1], #4
-.insb_no_4:     ands    r2, r2, #3
+.Linsb_no_4:    ands    r2, r2, #3
                LOADREGS(eqfd, sp!, {r4 - r6, pc})
                cmp     r2, #2
diff --git a/arch/arm/lib/io-readsw-armv3.S b/arch/arm/lib/io-readsw-armv3.S
index 476cf7f8a633..146d47c15455 100644
--- a/arch/arm/lib/io-readsw-armv3.S
+++ b/arch/arm/lib/io-readsw-armv3.S
@@ -11,16 +11,16 @@
 #include <asm/assembler.h>
 #include <asm/hardware.h>
-.insw_bad_alignment:
+.Linsw_bad_alignment:
-                adr     r0, .insw_bad_align_msg
+                adr     r0, .Linsw_bad_align_msg
                mov     r2, lr
                b       panic
-.insw_bad_align_msg:
+.Linsw_bad_align_msg:
                .asciz  "insw: bad buffer alignment (0x%p, lr=0x%08lX)\n"
                .align
-.insw_align:    tst     r1, #1
+.Linsw_align:   tst     r1, #1
-                bne     .insw_bad_alignment
+                bne     .Linsw_bad_alignment
                ldr     r3, [r0]
                strb    r3, [r1], #1
@@ -34,16 +34,16 @@ ENTRY(__raw_readsw)
                teq     r2, #0          @ do we have to check for the zero len?
                moveq   pc, lr
                tst     r1, #3
-                bne     .insw_align
+                bne     .Linsw_align
-.insw_aligned:  mov     ip, #0xff
+.Linsw_aligned: mov     ip, #0xff
                orr     ip, ip, ip, lsl #8
                stmfd   sp!, {r4, r5, r6, lr}
                subs    r2, r2, #8
-                bmi     .no_insw_8
+                bmi     .Lno_insw_8
-.insw_8_lp:     ldr     r3, [r0]
+.Linsw_8_lp:    ldr     r3, [r0]
                and     r3, r3, ip
                ldr     r4, [r0]
                orr     r3, r3, r4, lsl #16
@@ -66,13 +66,13 @@ ENTRY(__raw_readsw)
                stmia   r1!, {r3 - r6}
                subs    r2, r2, #8
-                bpl     .insw_8_lp
+                bpl     .Linsw_8_lp
                tst     r2, #7
                LOADREGS(eqfd, sp!, {r4, r5, r6, pc})
-.no_insw_8:     tst     r2, #4
+.Lno_insw_8:    tst     r2, #4
-                beq     .no_insw_4
+                beq     .Lno_insw_4
                ldr     r3, [r0]
                and     r3, r3, ip
@@ -86,8 +86,8 @@ ENTRY(__raw_readsw)
                stmia   r1!, {r3, r4}
-.no_insw_4:     tst     r2, #2
+.Lno_insw_4:    tst     r2, #2
-                beq     .no_insw_2
+                beq     .Lno_insw_2
                ldr     r3, [r0]
                and     r3, r3, ip
@@ -96,7 +96,7 @@ ENTRY(__raw_readsw)
                str     r3, [r1], #4
-.no_insw_2:     tst     r2, #1
+.Lno_insw_2:    tst     r2, #1
                ldrne   r3, [r0]
                strneb  r3, [r1], #1
                movne   r3, r3, lsr #8
diff --git a/arch/arm/lib/io-readsw-armv4.S b/arch/arm/lib/io-readsw-armv4.S
index c92b66ecbe86..4db1c5f0b219 100644
--- a/arch/arm/lib/io-readsw-armv4.S
+++ b/arch/arm/lib/io-readsw-armv4.S
@@ -18,8 +18,8 @@
 #endif
                .endm
-.insw_align:    movs    ip, r1, lsl #31
+.Linsw_align:   movs    ip, r1, lsl #31
-                bne     .insw_noalign
+                bne     .Linsw_noalign
                ldrh    ip, [r0]
                sub     r2, r2, #1
                strh    ip, [r1], #2
@@ -28,14 +28,14 @@ ENTRY(__raw_readsw)
                teq     r2, #0
                moveq   pc, lr
                tst     r1, #3
-                bne     .insw_align
+                bne     .Linsw_align
                stmfd   sp!, {r4, r5, lr}
                subs    r2, r2, #8
-                bmi     .no_insw_8
+                bmi     .Lno_insw_8
-.insw_8_lp:     ldrh    r3, [r0]
+.Linsw_8_lp:    ldrh    r3, [r0]
                ldrh    r4, [r0]
                pack    r3, r3, r4
@@ -53,10 +53,10 @@ ENTRY(__raw_readsw)
                subs    r2, r2, #8
                stmia   r1!, {r3 - r5, ip}
-                bpl     .insw_8_lp
+                bpl     .Linsw_8_lp
-.no_insw_8:     tst     r2, #4
+.Lno_insw_8:    tst     r2, #4
-                beq     .no_insw_4
+                beq     .Lno_insw_4
                ldrh    r3, [r0]
                ldrh    r4, [r0]
@@ -68,15 +68,15 @@ ENTRY(__raw_readsw)
                stmia   r1!, {r3, r4}
-.no_insw_4:     movs    r2, r2, lsl #31
+.Lno_insw_4:    movs    r2, r2, lsl #31
-                bcc     .no_insw_2
+                bcc     .Lno_insw_2
                ldrh    r3, [r0]
                ldrh    ip, [r0]
                pack    r3, r3, ip
                str     r3, [r1], #4
-.no_insw_2:     ldrneh  r3, [r0]
+.Lno_insw_2:    ldrneh  r3, [r0]
                strneh  r3, [r1]
                ldmfd   sp!, {r4, r5, pc}
@@ -93,7 +93,7 @@ ENTRY(__raw_readsw)
 #define pull_hbyte1             lsr #8
 #endif
-.insw_noalign:  stmfd   sp!, {r4, lr}
+.Linsw_noalign: stmfd   sp!, {r4, lr}
                ldrccb  ip, [r1, #-1]!
                bcc     1f
diff --git a/arch/arm/lib/io-writesb.S b/arch/arm/lib/io-writesb.S
index 70b2561bdb09..08209fc640ea 100644
--- a/arch/arm/lib/io-writesb.S
+++ b/arch/arm/lib/io-writesb.S
@@ -30,7 +30,7 @@
 #endif
                .endm
-.outsb_align:   rsb     ip, ip, #4
+.Loutsb_align:  rsb     ip, ip, #4
                cmp     ip, r2
                movgt   ip, r2
                cmp     ip, #2
@@ -41,44 +41,45 @@
                ldrgtb  r3, [r1], #1
                strgtb  r3, [r0]
                subs    r2, r2, ip
-                bne     .outsb_aligned
+                bne     .Loutsb_aligned
 ENTRY(__raw_writesb)
                teq     r2, #0          @ do we have to check for the zero len?
                moveq   pc, lr
                ands    ip, r1, #3
-                bne     .outsb_align
+                bne     .Loutsb_align
-.outsb_aligned: stmfd   sp!, {r4, r5, lr}
+.Loutsb_aligned:
+                stmfd   sp!, {r4, r5, lr}
                subs    r2, r2, #16
-                bmi     .outsb_no_16
+                bmi     .Loutsb_no_16
-.outsb_16_lp:   ldmia   r1!, {r3, r4, r5, ip}
+.Loutsb_16_lp:  ldmia   r1!, {r3, r4, r5, ip}
                outword r3
                outword r4
                outword r5
                outword ip
                subs    r2, r2, #16
-                bpl     .outsb_16_lp
+                bpl     .Loutsb_16_lp
                tst     r2, #15
                LOADREGS(eqfd, sp!, {r4, r5, pc})
-.outsb_no_16:   tst     r2, #8
+.Loutsb_no_16:  tst     r2, #8
-                beq     .outsb_no_8
+                beq     .Loutsb_no_8
                ldmia   r1!, {r3, r4}
                outword r3
                outword r4
-.outsb_no_8:    tst     r2, #4
+.Loutsb_no_8:   tst     r2, #4
-                beq     .outsb_no_4
+                beq     .Loutsb_no_4
                ldr     r3, [r1], #4
                outword r3
-.outsb_no_4:    ands    r2, r2, #3
+.Loutsb_no_4:   ands    r2, r2, #3
                LOADREGS(eqfd, sp!, {r4, r5, pc})
                cmp     r2, #2
diff --git a/arch/arm/lib/io-writesw-armv3.S b/arch/arm/lib/io-writesw-armv3.S
index 950e7e310f1a..52d62b481295 100644
--- a/arch/arm/lib/io-writesw-armv3.S
+++ b/arch/arm/lib/io-writesw-armv3.S
@@ -11,16 +11,16 @@
 #include <asm/assembler.h>
 #include <asm/hardware.h>
-.outsw_bad_alignment:
+.Loutsw_bad_alignment:
-                adr     r0, .outsw_bad_align_msg
+                adr     r0, .Loutsw_bad_align_msg
                mov     r2, lr
                b       panic
-.outsw_bad_align_msg:
+.Loutsw_bad_align_msg:
                .asciz  "outsw: bad buffer alignment (0x%p, lr=0x%08lX)\n"
                .align
-.outsw_align:   tst     r1, #1
+.Loutsw_align:  tst     r1, #1
-                bne     .outsw_bad_alignment
+                bne     .Loutsw_bad_alignment
                add     r1, r1, #2
@@ -35,14 +35,14 @@ ENTRY(__raw_writesw)
                teq     r2, #0          @ do we have to check for the zero len?
                moveq   pc, lr
                tst     r1, #3
-                bne     .outsw_align
+                bne     .Loutsw_align
-.outsw_aligned: stmfd   sp!, {r4, r5, r6, lr}
+                stmfd   sp!, {r4, r5, r6, lr}
                subs    r2, r2, #8
-                bmi     .no_outsw_8
+                bmi     .Lno_outsw_8
-.outsw_8_lp:    ldmia   r1!, {r3, r4, r5, r6}
+.Loutsw_8_lp:   ldmia   r1!, {r3, r4, r5, r6}
                mov     ip, r3, lsl #16
                orr     ip, ip, ip, lsr #16
@@ -77,13 +77,13 @@ ENTRY(__raw_writesw)
                str     ip, [r0]
                subs    r2, r2, #8
-                bpl     .outsw_8_lp
+                bpl     .Loutsw_8_lp
                tst     r2, #7
                LOADREGS(eqfd, sp!, {r4, r5, r6, pc})
-.no_outsw_8:    tst     r2, #4
+.Lno_outsw_8:   tst     r2, #4
-                beq     .no_outsw_4
+                beq     .Lno_outsw_4
                ldmia   r1!, {r3, r4}
@@ -103,8 +103,8 @@ ENTRY(__raw_writesw)
                orr     ip, ip, ip, lsl #16
                str     ip, [r0]
-.no_outsw_4:    tst     r2, #2
+.Lno_outsw_4:   tst     r2, #2
-                beq     .no_outsw_2
+                beq     .Lno_outsw_2
                ldr     r3, [r1], #4
@@ -116,7 +116,7 @@ ENTRY(__raw_writesw)
                orr     ip, ip, ip, lsl #16
                str     ip, [r0]
-.no_outsw_2:    tst     r2, #1
+.Lno_outsw_2:   tst     r2, #1
                ldrne   r3, [r1]
diff --git a/arch/arm/lib/io-writesw-armv4.S b/arch/arm/lib/io-writesw-armv4.S
index 5e240e452af6..c8e85bd653b7 100644
--- a/arch/arm/lib/io-writesw-armv4.S
+++ b/arch/arm/lib/io-writesw-armv4.S
@@ -22,8 +22,8 @@
 #endif
                .endm
-.outsw_align:   movs    ip, r1, lsl #31
+.Loutsw_align:  movs    ip, r1, lsl #31
-                bne     .outsw_noalign
+                bne     .Loutsw_noalign
                ldrh    r3, [r1], #2
                sub     r2, r2, #1
@@ -33,35 +33,35 @@ ENTRY(__raw_writesw)
                teq     r2, #0
                moveq   pc, lr
                ands    r3, r1, #3
-                bne     .outsw_align
+                bne     .Loutsw_align
                stmfd   sp!, {r4, r5, lr}
                subs    r2, r2, #8
-                bmi     .no_outsw_8
+                bmi     .Lno_outsw_8
-.outsw_8_lp:    ldmia   r1!, {r3, r4, r5, ip}
+.Loutsw_8_lp:   ldmia   r1!, {r3, r4, r5, ip}
                subs    r2, r2, #8
                outword r3
                outword r4
                outword r5
                outword ip
-                bpl     .outsw_8_lp
+                bpl     .Loutsw_8_lp
-.no_outsw_8:    tst     r2, #4
+.Lno_outsw_8:   tst     r2, #4
-                beq     .no_outsw_4
+                beq     .Lno_outsw_4
                ldmia   r1!, {r3, ip}
                outword r3
                outword ip
-.no_outsw_4:    movs    r2, r2, lsl #31
+.Lno_outsw_4:   movs    r2, r2, lsl #31
-                bcc     .no_outsw_2
+                bcc     .Lno_outsw_2
                ldr     r3, [r1], #4
                outword r3
-.no_outsw_2:    ldrneh  r3, [r1]
+.Lno_outsw_2:   ldrneh  r3, [r1]
                strneh  r3, [r0]
                ldmfd   sp!, {r4, r5, pc}
@@ -74,7 +74,8 @@ ENTRY(__raw_writesw)
 #define push_hbyte1     lsl #8
 #endif
-.outsw_noalign: ldr     r3, [r1, -r3]!
+.Loutsw_noalign:
+                ldr     r3, [r1, -r3]!
                subcs   r2, r2, #1
                bcs     2f
                subs    r2, r2, #2
diff --git a/arch/arm/lib/uaccess.S b/arch/arm/lib/uaccess.S
index 6f1b5b49fe4c..0cc450f863b6 100644
--- a/arch/arm/lib/uaccess.S
+++ b/arch/arm/lib/uaccess.S
@@ -27,7 +27,7 @@
 * Returns  : Number of bytes NOT copied.
 */
-.c2u_dest_not_aligned:
+.Lc2u_dest_not_aligned:
                rsb     ip, ip, #4
                cmp     ip, #2
                ldrb    r3, [r1], #1
@@ -37,32 +37,32 @@ USER(		strgebt	r3, [r0], #1)			@ May fault
                ldrgtb  r3, [r1], #1
 USER(           strgtbt r3, [r0], #1)                   @ May fault
                sub     r2, r2, ip
-                b       .c2u_dest_aligned
+                b       .Lc2u_dest_aligned
 ENTRY(__arch_copy_to_user)
                stmfd   sp!, {r2, r4 - r7, lr}
                cmp     r2, #4
-                blt     .c2u_not_enough
+                blt     .Lc2u_not_enough
                ands    ip, r0, #3
-                bne     .c2u_dest_not_aligned
+                bne     .Lc2u_dest_not_aligned
-.c2u_dest_aligned:
+.Lc2u_dest_aligned:
                ands    ip, r1, #3
-                bne     .c2u_src_not_aligned
+                bne     .Lc2u_src_not_aligned
 /*
 * Seeing as there has to be at least 8 bytes to copy, we can
 * copy one word, and force a user-mode page fault...
 */
-.c2u_0fupi:     subs    r2, r2, #4
+.Lc2u_0fupi:    subs    r2, r2, #4
                addmi   ip, r2, #4
-                bmi     .c2u_0nowords
+                bmi     .Lc2u_0nowords
                ldr     r3, [r1], #4
 USER(           strt    r3, [r0], #4)                   @ May fault
                mov     ip, r0, lsl #32 - PAGE_SHIFT    @ On each page, use a ld/st??t instruction
                rsb     ip, ip, #0
                movs    ip, ip, lsr #32 - PAGE_SHIFT
-                beq     .c2u_0fupi
+                beq     .Lc2u_0fupi
 /*
 * ip = max no. of bytes to copy before needing another "strt" insn
 */
@@ -70,16 +70,16 @@ USER(		strt	r3, [r0], #4)			@ May fault
                movlt   ip, r2
                sub     r2, r2, ip
                subs    ip, ip, #32
-                blt     .c2u_0rem8lp
+                blt     .Lc2u_0rem8lp
-.c2u_0cpy8lp:   ldmia   r1!, {r3 - r6}
+.Lc2u_0cpy8lp:  ldmia   r1!, {r3 - r6}
                stmia   r0!, {r3 - r6}                  @ Shouldnt fault
                ldmia   r1!, {r3 - r6}
                subs    ip, ip, #32
                stmia   r0!, {r3 - r6}                  @ Shouldnt fault
-                bpl     .c2u_0cpy8lp
+                bpl     .Lc2u_0cpy8lp
-.c2u_0rem8lp:   cmn     ip, #16
+.Lc2u_0rem8lp:  cmn     ip, #16
                ldmgeia r1!, {r3 - r6}
                stmgeia r0!, {r3 - r6}                  @ Shouldnt fault
                tst     ip, #8
@@ -89,33 +89,33 @@ USER(		strt	r3, [r0], #4)			@ May fault
                ldrne   r3, [r1], #4
                strnet  r3, [r0], #4                    @ Shouldnt fault
                ands    ip, ip, #3
-                beq     .c2u_0fupi
+                beq     .Lc2u_0fupi
-.c2u_0nowords:  teq     ip, #0
+.Lc2u_0nowords: teq     ip, #0
-                beq     .c2u_finished
+                beq     .Lc2u_finished
-.c2u_nowords:   cmp     ip, #2
+.Lc2u_nowords:  cmp     ip, #2
                ldrb    r3, [r1], #1
 USER(           strbt   r3, [r0], #1)                   @ May fault
                ldrgeb  r3, [r1], #1
 USER(           strgebt r3, [r0], #1)                   @ May fault
                ldrgtb  r3, [r1], #1
 USER(           strgtbt r3, [r0], #1)                   @ May fault
-                b       .c2u_finished
+                b       .Lc2u_finished
-.c2u_not_enough:
+.Lc2u_not_enough:
                movs    ip, r2
-                bne     .c2u_nowords
+                bne     .Lc2u_nowords
-.c2u_finished:  mov     r0, #0
+.Lc2u_finished: mov     r0, #0
                LOADREGS(fd,sp!,{r2, r4 - r7, pc})
-.c2u_src_not_aligned:
+.Lc2u_src_not_aligned:
                bic     r1, r1, #3
                ldr     r7, [r1], #4
                cmp     ip, #2
-                bgt     .c2u_3fupi
+                bgt     .Lc2u_3fupi
-                beq     .c2u_2fupi
+                beq     .Lc2u_2fupi
-.c2u_1fupi:     subs    r2, r2, #4
+.Lc2u_1fupi:    subs    r2, r2, #4
                addmi   ip, r2, #4
-                bmi     .c2u_1nowords
+                bmi     .Lc2u_1nowords
                mov     r3, r7, pull #8
                ldr     r7, [r1], #4
                orr     r3, r3, r7, push #24
@@ -123,14 +123,14 @@ USER(		strt	r3, [r0], #4)			@ May fault
                mov     ip, r0, lsl #32 - PAGE_SHIFT
                rsb     ip, ip, #0
                movs    ip, ip, lsr #32 - PAGE_SHIFT
-                beq     .c2u_1fupi
+                beq     .Lc2u_1fupi
                cmp     r2, ip
                movlt   ip, r2
                sub     r2, r2, ip
                subs    ip, ip, #16
-                blt     .c2u_1rem8lp
+                blt     .Lc2u_1rem8lp
-.c2u_1cpy8lp:   mov     r3, r7, pull #8
+.Lc2u_1cpy8lp:  mov     r3, r7, pull #8
                ldmia   r1!, {r4 - r7}
                subs    ip, ip, #16
                orr     r3, r3, r4, push #24
@@ -141,9 +141,9 @@ USER(		strt	r3, [r0], #4)			@ May fault
                mov     r6, r6, pull #8
                orr     r6, r6, r7, push #24
                stmia   r0!, {r3 - r6}                  @ Shouldnt fault
-                bpl     .c2u_1cpy8lp
+                bpl     .Lc2u_1cpy8lp
-.c2u_1rem8lp:   tst     ip, #8
+.Lc2u_1rem8lp:  tst     ip, #8
                movne   r3, r7, pull #8
                ldmneia r1!, {r4, r7}
                orrne   r3, r3, r4, push #24
@@ -156,21 +156,21 @@ USER(		strt	r3, [r0], #4)			@ May fault
                orrne   r3, r3, r7, push #24
                strnet  r3, [r0], #4                    @ Shouldnt fault
                ands    ip, ip, #3
-                beq     .c2u_1fupi
+                beq     .Lc2u_1fupi
-.c2u_1nowords:  mov     r3, r7, get_byte_1
+.Lc2u_1nowords: mov     r3, r7, get_byte_1
                teq     ip, #0
-                beq     .c2u_finished
+                beq     .Lc2u_finished
                cmp     ip, #2
 USER(           strbt   r3, [r0], #1)                   @ May fault
                movge   r3, r7, get_byte_2
 USER(           strgebt r3, [r0], #1)                   @ May fault
                movgt   r3, r7, get_byte_3
 USER(           strgtbt r3, [r0], #1)                   @ May fault
-                b       .c2u_finished
+                b       .Lc2u_finished
-.c2u_2fupi:     subs    r2, r2, #4
+.Lc2u_2fupi:    subs    r2, r2, #4
                addmi   ip, r2, #4
-                bmi     .c2u_2nowords
+                bmi     .Lc2u_2nowords
                mov     r3, r7, pull #16
                ldr     r7, [r1], #4
                orr     r3, r3, r7, push #16
@@ -178,14 +178,14 @@ USER(		strt	r3, [r0], #4)			@ May fault
                mov     ip, r0, lsl #32 - PAGE_SHIFT
                rsb     ip, ip, #0
                movs    ip, ip, lsr #32 - PAGE_SHIFT
-                beq     .c2u_2fupi
+                beq     .Lc2u_2fupi
                cmp     r2, ip
                movlt   ip, r2
                sub     r2, r2, ip
                subs    ip, ip, #16
-                blt     .c2u_2rem8lp
+                blt     .Lc2u_2rem8lp
-.c2u_2cpy8lp:   mov     r3, r7, pull #16
+.Lc2u_2cpy8lp:  mov     r3, r7, pull #16
                ldmia   r1!, {r4 - r7}
                subs    ip, ip, #16
                orr     r3, r3, r4, push #16
@@ -196,9 +196,9 @@ USER(		strt	r3, [r0], #4)			@ May fault
                mov     r6, r6, pull #16
                orr     r6, r6, r7, push #16
                stmia   r0!, {r3 - r6}                  @ Shouldnt fault
-                bpl     .c2u_2cpy8lp
+                bpl     .Lc2u_2cpy8lp
-.c2u_2rem8lp:   tst     ip, #8
+.Lc2u_2rem8lp:  tst     ip, #8
                movne   r3, r7, pull #16
                ldmneia r1!, {r4, r7}
                orrne   r3, r3, r4, push #16
@@ -211,21 +211,21 @@ USER(		strt	r3, [r0], #4)			@ May fault
                orrne   r3, r3, r7, push #16
                strnet  r3, [r0], #4                    @ Shouldnt fault
                ands    ip, ip, #3
-                beq     .c2u_2fupi
+                beq     .Lc2u_2fupi
-.c2u_2nowords:  mov     r3, r7, get_byte_2
+.Lc2u_2nowords: mov     r3, r7, get_byte_2
                teq     ip, #0
-                beq     .c2u_finished
+                beq     .Lc2u_finished
                cmp     ip, #2
 USER(           strbt   r3, [r0], #1)                   @ May fault
                movge   r3, r7, get_byte_3
 USER(           strgebt r3, [r0], #1)                   @ May fault
                ldrgtb  r3, [r1], #0
 USER(           strgtbt r3, [r0], #1)                   @ May fault
-                b       .c2u_finished
+                b       .Lc2u_finished
-.c2u_3fupi:     subs    r2, r2, #4
+.Lc2u_3fupi:    subs    r2, r2, #4
                addmi   ip, r2, #4
-                bmi     .c2u_3nowords
+                bmi     .Lc2u_3nowords
                mov     r3, r7, pull #24
                ldr     r7, [r1], #4
                orr     r3, r3, r7, push #8
@@ -233,14 +233,14 @@ USER(		strt	r3, [r0], #4)			@ May fault
                mov     ip, r0, lsl #32 - PAGE_SHIFT
                rsb     ip, ip, #0
                movs    ip, ip, lsr #32 - PAGE_SHIFT
-                beq     .c2u_3fupi
+                beq     .Lc2u_3fupi
                cmp     r2, ip
                movlt   ip, r2
                sub     r2, r2, ip
                subs    ip, ip, #16
-                blt     .c2u_3rem8lp
+                blt     .Lc2u_3rem8lp
-.c2u_3cpy8lp:   mov     r3, r7, pull #24
+.Lc2u_3cpy8lp:  mov     r3, r7, pull #24
                ldmia   r1!, {r4 - r7}
                subs    ip, ip, #16
                orr     r3, r3, r4, push #8
@@ -251,9 +251,9 @@ USER(		strt	r3, [r0], #4)			@ May fault
                mov     r6, r6, pull #24
                orr     r6, r6, r7, push #8
                stmia   r0!, {r3 - r6}                  @ Shouldnt fault
-                bpl     .c2u_3cpy8lp
+                bpl     .Lc2u_3cpy8lp
-.c2u_3rem8lp:   tst     ip, #8
+.Lc2u_3rem8lp:  tst     ip, #8
                movne   r3, r7, pull #24
                ldmneia r1!, {r4, r7}
                orrne   r3, r3, r4, push #8
@@ -266,17 +266,17 @@ USER(		strt	r3, [r0], #4)			@ May fault
                orrne   r3, r3, r7, push #8
                strnet  r3, [r0], #4                    @ Shouldnt fault
                ands    ip, ip, #3
-                beq     .c2u_3fupi
+                beq     .Lc2u_3fupi
-.c2u_3nowords:  mov     r3, r7, get_byte_3
+.Lc2u_3nowords: mov     r3, r7, get_byte_3
                teq     ip, #0
-                beq     .c2u_finished
+                beq     .Lc2u_finished
                cmp     ip, #2
 USER(           strbt   r3, [r0], #1)                   @ May fault
                ldrgeb  r3, [r1], #1
 USER(           strgebt r3, [r0], #1)                   @ May fault
                ldrgtb  r3, [r1], #0
 USER(           strgtbt r3, [r0], #1)                   @ May fault
-                b       .c2u_finished
+                b       .Lc2u_finished
                .section .fixup,"ax"
                .align  0
@@ -290,7 +290,7 @@ USER(		strgtbt	r3, [r0], #1)			@ May fault
 *          : n    - number of bytes to copy
 * Returns  : Number of bytes NOT copied.
 */
-.cfu_dest_not_aligned:
+.Lcfu_dest_not_aligned:
                rsb     ip, ip, #4
                cmp     ip, #2
 USER(           ldrbt   r3, [r1], #1)                   @ May fault
@@ -300,31 +300,32 @@ USER(		ldrgebt	r3, [r1], #1)			@ May fault
 USER(           ldrgtbt r3, [r1], #1)                   @ May fault
                strgtb  r3, [r0], #1
                sub     r2, r2, ip
-                b       .cfu_dest_aligned
+                b       .Lcfu_dest_aligned
 ENTRY(__arch_copy_from_user)
                stmfd   sp!, {r0, r2, r4 - r7, lr}
                cmp     r2, #4
-                blt     .cfu_not_enough
+                blt     .Lcfu_not_enough
                ands    ip, r0, #3
-                bne     .cfu_dest_not_aligned
+                bne     .Lcfu_dest_not_aligned
-.cfu_dest_aligned:
+.Lcfu_dest_aligned:
                ands    ip, r1, #3
-                bne     .cfu_src_not_aligned
+                bne     .Lcfu_src_not_aligned
 /*
 * Seeing as there has to be at least 8 bytes to copy, we can
 * copy one word, and force a user-mode page fault...
 */
-.cfu_0fupi:     subs    r2, r2, #4
+.Lcfu_0fupi:    subs    r2, r2, #4
                addmi   ip, r2, #4
-                bmi     .cfu_0nowords
+                bmi     .Lcfu_0nowords
 USER(           ldrt    r3, [r1], #4)
                str     r3, [r0], #4
                mov     ip, r1, lsl #32 - PAGE_SHIFT    @ On each page, use a ld/st??t instruction
                rsb     ip, ip, #0
                movs    ip, ip, lsr #32 - PAGE_SHIFT
-                beq     .cfu_0fupi
+                beq     .Lcfu_0fupi
 /*
 * ip = max no. of bytes to copy before needing another "strt" insn
 */
@@ -332,16 +333,16 @@ USER(		ldrt	r3, [r1], #4)
                movlt   ip, r2
                sub     r2, r2, ip
                subs    ip, ip, #32
-                blt     .cfu_0rem8lp
+                blt     .Lcfu_0rem8lp
-.cfu_0cpy8lp:   ldmia   r1!, {r3 - r6}                  @ Shouldnt fault
+.Lcfu_0cpy8lp:  ldmia   r1!, {r3 - r6}                  @ Shouldnt fault
                stmia   r0!, {r3 - r6}
                ldmia   r1!, {r3 - r6}                  @ Shouldnt fault
                subs    ip, ip, #32
                stmia   r0!, {r3 - r6}
-                bpl     .cfu_0cpy8lp
+                bpl     .Lcfu_0cpy8lp
-.cfu_0rem8lp:   cmn     ip, #16
+.Lcfu_0rem8lp:  cmn     ip, #16
                ldmgeia r1!, {r3 - r6}                  @ Shouldnt fault
                stmgeia r0!, {r3 - r6}
                tst     ip, #8
@@ -351,34 +352,34 @@ USER(		ldrt	r3, [r1], #4)
                ldrnet  r3, [r1], #4                    @ Shouldnt fault
                strne   r3, [r0], #4
                ands    ip, ip, #3
-                beq     .cfu_0fupi
+                beq     .Lcfu_0fupi
-.cfu_0nowords:  teq     ip, #0
+.Lcfu_0nowords: teq     ip, #0
-                beq     .cfu_finished
+                beq     .Lcfu_finished
-.cfu_nowords:   cmp     ip, #2
+.Lcfu_nowords:  cmp     ip, #2
 USER(           ldrbt   r3, [r1], #1)                   @ May fault
                strb    r3, [r0], #1
 USER(           ldrgebt r3, [r1], #1)                   @ May fault
                strgeb  r3, [r0], #1
 USER(           ldrgtbt r3, [r1], #1)                   @ May fault
                strgtb  r3, [r0], #1
-                b       .cfu_finished
+                b       .Lcfu_finished
-.cfu_not_enough:
+.Lcfu_not_enough:
                movs    ip, r2
-                bne     .cfu_nowords
+                bne     .Lcfu_nowords
-.cfu_finished:  mov     r0, #0
+.Lcfu_finished: mov     r0, #0
                add     sp, sp, #8
                LOADREGS(fd,sp!,{r4 - r7, pc})
-.cfu_src_not_aligned:
+.Lcfu_src_not_aligned:
                bic     r1, r1, #3
 USER(           ldrt    r7, [r1], #4)                   @ May fault
                cmp     ip, #2
-                bgt     .cfu_3fupi
+                bgt     .Lcfu_3fupi
-                beq     .cfu_2fupi
+                beq     .Lcfu_2fupi
-.cfu_1fupi:     subs    r2, r2, #4
+.Lcfu_1fupi:    subs    r2, r2, #4
                addmi   ip, r2, #4
-                bmi     .cfu_1nowords
+                bmi     .Lcfu_1nowords
                mov     r3, r7, pull #8
 USER(           ldrt    r7, [r1], #4)                   @ May fault
                orr     r3, r3, r7, push #24
@@ -386,14 +387,14 @@ USER(		ldrt	r7, [r1], #4)			@ May fault
                mov     ip, r1, lsl #32 - PAGE_SHIFT
                rsb     ip, ip, #0
                movs    ip, ip, lsr #32 - PAGE_SHIFT
-                beq     .cfu_1fupi
+                beq     .Lcfu_1fupi
                cmp     r2, ip
                movlt   ip, r2
                sub     r2, r2, ip
                subs    ip, ip, #16
-                blt     .cfu_1rem8lp
+                blt     .Lcfu_1rem8lp
-.cfu_1cpy8lp:   mov     r3, r7, pull #8
+.Lcfu_1cpy8lp:  mov     r3, r7, pull #8
                ldmia   r1!, {r4 - r7}                  @ Shouldnt fault
                subs    ip, ip, #16
                orr     r3, r3, r4, push #24
@@ -404,9 +405,9 @@ USER(		ldrt	r7, [r1], #4)			@ May fault
                mov     r6, r6, pull #8
                orr     r6, r6, r7, push #24
                stmia   r0!, {r3 - r6}
-                bpl     .cfu_1cpy8lp
+                bpl     .Lcfu_1cpy8lp
-.cfu_1rem8lp:   tst     ip, #8
+.Lcfu_1rem8lp:  tst     ip, #8
                movne   r3, r7, pull #8
                ldmneia r1!, {r4, r7}                   @ Shouldnt fault
                orrne   r3, r3, r4, push #24
@@ -419,21 +420,21 @@ USER(		ldrnet	r7, [r1], #4)			@ May fault
                orrne   r3, r3, r7, push #24
                strne   r3, [r0], #4
                ands    ip, ip, #3
-                beq     .cfu_1fupi
+                beq     .Lcfu_1fupi
-.cfu_1nowords:  mov     r3, r7, get_byte_1
+.Lcfu_1nowords: mov     r3, r7, get_byte_1
                teq     ip, #0
-                beq     .cfu_finished
+                beq     .Lcfu_finished
                cmp     ip, #2
                strb    r3, [r0], #1
                movge   r3, r7, get_byte_2
                strgeb  r3, [r0], #1
                movgt   r3, r7, get_byte_3
                strgtb  r3, [r0], #1
-                b       .cfu_finished
+                b       .Lcfu_finished
-.cfu_2fupi:     subs    r2, r2, #4
+.Lcfu_2fupi:    subs    r2, r2, #4
                addmi   ip, r2, #4
-                bmi     .cfu_2nowords
+                bmi     .Lcfu_2nowords
                mov     r3, r7, pull #16
 USER(           ldrt    r7, [r1], #4)                   @ May fault
                orr     r3, r3, r7, push #16
@@ -441,14 +442,15 @@ USER(		ldrt	r7, [r1], #4)			@ May fault
                mov     ip, r1, lsl #32 - PAGE_SHIFT
                rsb     ip, ip, #0
                movs    ip, ip, lsr #32 - PAGE_SHIFT
-                beq     .cfu_2fupi
+                beq     .Lcfu_2fupi
                cmp     r2, ip
                movlt   ip, r2
                sub     r2, r2, ip
                subs    ip, ip, #16
-                blt     .cfu_2rem8lp
+                blt     .Lcfu_2rem8lp
-.cfu_2cpy8lp:   mov     r3, r7, pull #16
+.Lcfu_2cpy8lp:  mov     r3, r7, pull #16
                ldmia   r1!, {r4 - r7}                  @ Shouldnt fault
                subs    ip, ip, #16
                orr     r3, r3, r4, push #16
@@ -459,9 +461,9 @@ USER(		ldrt	r7, [r1], #4)			@ May fault
                mov     r6, r6, pull #16
                orr     r6, r6, r7, push #16
                stmia   r0!, {r3 - r6}
-                bpl     .cfu_2cpy8lp
+                bpl     .Lcfu_2cpy8lp
-.cfu_2rem8lp:   tst     ip, #8
+.Lcfu_2rem8lp:  tst     ip, #8
                movne   r3, r7, pull #16
                ldmneia r1!, {r4, r7}                   @ Shouldnt fault
                orrne   r3, r3, r4, push #16
@@ -474,21 +476,21 @@ USER(		ldrnet	r7, [r1], #4)			@ May fault
                orrne   r3, r3, r7, push #16
                strne   r3, [r0], #4
                ands    ip, ip, #3
-                beq     .cfu_2fupi
+                beq     .Lcfu_2fupi
-.cfu_2nowords:  mov     r3, r7, get_byte_2
+.Lcfu_2nowords: mov     r3, r7, get_byte_2
                teq     ip, #0
-                beq     .cfu_finished
+                beq     .Lcfu_finished
                cmp     ip, #2
                strb    r3, [r0], #1
                movge   r3, r7, get_byte_3
                strgeb  r3, [r0], #1
 USER(           ldrgtbt r3, [r1], #0)                   @ May fault
                strgtb  r3, [r0], #1
-                b       .cfu_finished
+                b       .Lcfu_finished
-.cfu_3fupi:     subs    r2, r2, #4
+.Lcfu_3fupi:    subs    r2, r2, #4
                addmi   ip, r2, #4
-                bmi     .cfu_3nowords
+                bmi     .Lcfu_3nowords
                mov     r3, r7, pull #24
 USER(           ldrt    r7, [r1], #4)                   @ May fault
                orr     r3, r3, r7, push #8
@@ -496,14 +498,14 @@ USER(		ldrt	r7, [r1], #4)			@ May fault
                mov     ip, r1, lsl #32 - PAGE_SHIFT
                rsb     ip, ip, #0
                movs    ip, ip, lsr #32 - PAGE_SHIFT
-                beq     .cfu_3fupi
+                beq     .Lcfu_3fupi
                cmp     r2, ip
                movlt   ip, r2
                sub     r2, r2, ip
                subs    ip, ip, #16
-                blt     .cfu_3rem8lp
+                blt     .Lcfu_3rem8lp
-.cfu_3cpy8lp:   mov     r3, r7, pull #24
+.Lcfu_3cpy8lp:  mov     r3, r7, pull #24
                ldmia   r1!, {r4 - r7}                  @ Shouldnt fault
                orr     r3, r3, r4, push #8
                mov     r4, r4, pull #24
@@ -514,9 +516,9 @@ USER(		ldrt	r7, [r1], #4)			@ May fault
                orr     r6, r6, r7, push #8
                stmia   r0!, {r3 - r6}
                subs    ip, ip, #16
-                bpl     .cfu_3cpy8lp
+                bpl     .Lcfu_3cpy8lp
-.cfu_3rem8lp:   tst     ip, #8
+.Lcfu_3rem8lp:  tst     ip, #8
                movne   r3, r7, pull #24
                ldmneia r1!, {r4, r7}                   @ Shouldnt fault
                orrne   r3, r3, r4, push #8
@@ -529,17 +531,17 @@ USER(		ldrnet	r7, [r1], #4)			@ May fault
                orrne   r3, r3, r7, push #8
                strne   r3, [r0], #4
                ands    ip, ip, #3
-                beq     .cfu_3fupi
+                beq     .Lcfu_3fupi
-.cfu_3nowords:  mov     r3, r7, get_byte_3
+.Lcfu_3nowords: mov     r3, r7, get_byte_3
                teq     ip, #0
-                beq     .cfu_finished
+                beq     .Lcfu_finished
                cmp     ip, #2
                strb    r3, [r0], #1
 USER(           ldrgebt r3, [r1], #1)                   @ May fault
                strgeb  r3, [r0], #1
 USER(           ldrgtbt r3, [r1], #1)                   @ May fault
                strgtb  r3, [r0], #1
-                b       .cfu_finished
+                b       .Lcfu_finished
                .section .fixup,"ax"
                .align  0
diff --git a/arch/arm/mach-ixp4xx/Kconfig b/arch/arm/mach-ixp4xx/Kconfig
index 89762a26495c..385285851cb5 100644
--- a/arch/arm/mach-ixp4xx/Kconfig
+++ b/arch/arm/mach-ixp4xx/Kconfig
@@ -8,6 +8,16 @@ menu "Intel IXP4xx Implementation Options"
 comment "IXP4xx Platforms"
+# This entry is placed on top because otherwise it would have
+# been shown as a submenu.
+config MACH_NSLU2
+        bool
+        prompt "NSLU2" if !(MACH_IXDP465 || MACH_IXDPG425 || ARCH_IXDP425 || ARCH_ADI_COYOTE || ARCH_AVILA || ARCH_IXCDP1100 || ARCH_PRPMC1100 || MACH_GTWX5715)
+        help
+          Say 'Y' here if you want your kernel to support Linksys's
+          NSLU2 NAS device. For more information on this platform,
+          see http://www.nslu2-linux.org
 config ARCH_AVILA
        bool "Avila"
        help
diff --git a/arch/arm/mach-ixp4xx/Makefile b/arch/arm/mach-ixp4xx/Makefile
index ddecbda4a633..7a15629c18d0 100644
--- a/arch/arm/mach-ixp4xx/Makefile
+++ b/arch/arm/mach-ixp4xx/Makefile
@@ -8,4 +8,5 @@ obj-$(CONFIG_ARCH_IXDP4XX)	+= ixdp425-pci.o ixdp425-setup.o
 obj-$(CONFIG_MACH_IXDPG425)     += ixdpg425-pci.o coyote-setup.o
 obj-$(CONFIG_ARCH_ADI_COYOTE)   += coyote-pci.o coyote-setup.o
 obj-$(CONFIG_MACH_GTWX5715)     += gtwx5715-pci.o gtwx5715-setup.o
+obj-$(CONFIG_MACH_NSLU2)        += nslu2-pci.o nslu2-setup.o nslu2-power.o
diff --git a/arch/arm/mach-ixp4xx/nslu2-pci.c b/arch/arm/mach-ixp4xx/nslu2-pci.c
new file mode 100644
index 000000000000..a575f2e0b2c8
--- /dev/null
+++ b/arch/arm/mach-ixp4xx/nslu2-pci.c
@@ -0,0 +1,77 @@
+/*
+ * arch/arm/mach-ixp4xx/nslu2-pci.c
+ *
+ * NSLU2 board-level PCI initialization
+ *
+ * based on ixdp425-pci.c:
+ *      Copyright (C) 2002 Intel Corporation.
+ *      Copyright (C) 2003-2004 MontaVista Software, Inc.
+ *
+ * Maintainer: http://www.nslu2-linux.org/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#include <linux/config.h>
+#include <linux/pci.h>
+#include <linux/init.h>
+#include <asm/mach/pci.h>
+#include <asm/mach-types.h>
+void __init nslu2_pci_preinit(void)
+{
+        set_irq_type(IRQ_NSLU2_PCI_INTA, IRQT_LOW);
+        set_irq_type(IRQ_NSLU2_PCI_INTB, IRQT_LOW);
+        set_irq_type(IRQ_NSLU2_PCI_INTC, IRQT_LOW);
+        gpio_line_isr_clear(NSLU2_PCI_INTA_PIN);
+        gpio_line_isr_clear(NSLU2_PCI_INTB_PIN);
+        gpio_line_isr_clear(NSLU2_PCI_INTC_PIN);
+        /* INTD is not configured as GPIO is used
+         * for the power input button.
+         */
+        ixp4xx_pci_preinit();
+}
+static int __init nslu2_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+{
+        static int pci_irq_table[NSLU2_PCI_IRQ_LINES] = {
+                IRQ_NSLU2_PCI_INTA,
+                IRQ_NSLU2_PCI_INTB,
+                IRQ_NSLU2_PCI_INTC,
+        };
+        int irq = -1;
+        if (slot >= 1 && slot <= NSLU2_PCI_MAX_DEV &&
+                pin >= 1 && pin <= NSLU2_PCI_IRQ_LINES) {
+                        irq = pci_irq_table[(slot + pin - 2) % NSLU2_PCI_IRQ_LINES];
+        }
+        return irq;
+}
+struct hw_pci __initdata nslu2_pci = {
+        .nr_controllers = 1,
+        .preinit        = nslu2_pci_preinit,
+        .swizzle        = pci_std_swizzle,
+        .setup          = ixp4xx_setup,
+        .scan           = ixp4xx_scan_bus,
+        .map_irq        = nslu2_map_irq,
+};
+int __init nslu2_pci_init(void) /* monkey see, monkey do */
+{
+        if (machine_is_nslu2())
+                pci_common_init(&nslu2_pci);
+        return 0;
+}
+subsys_initcall(nslu2_pci_init);
diff --git a/arch/arm/mach-ixp4xx/nslu2-power.c b/arch/arm/mach-ixp4xx/nslu2-power.c
new file mode 100644
index 000000000000..18fbc8c0fb30
--- /dev/null
+++ b/arch/arm/mach-ixp4xx/nslu2-power.c
@@ -0,0 +1,92 @@
+/*
+ * arch/arm/mach-ixp4xx/nslu2-power.c
+ *
+ * NSLU2 Power/Reset driver
+ *
+ * Copyright (C) 2005 Tower Technologies
+ *
+ * based on nslu2-io.c
+ *  Copyright (C) 2004 Karen Spearel
+ *
+ * Author: Alessandro Zummo <a.zummo@towertech.it>
+ * Maintainers: http://www.nslu2-linux.org/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#include <linux/module.h>
+#include <linux/reboot.h>
+#include <linux/interrupt.h>
+#include <asm/mach-types.h>
+extern void ctrl_alt_del(void);
+static irqreturn_t nslu2_power_handler(int irq, void *dev_id, struct pt_regs *regs)
+{
+        /* Signal init to do the ctrlaltdel action, this will bypass init if
+         * it hasn't started and do a kernel_restart.
+         */
+        ctrl_alt_del();
+        return IRQ_HANDLED;
+}
+static irqreturn_t nslu2_reset_handler(int irq, void *dev_id, struct pt_regs *regs)
+{
+        /* This is the paper-clip reset, it shuts the machine down directly.
+         */
+        machine_power_off();
+        return IRQ_HANDLED;
+}
+static int __init nslu2_power_init(void)
+{
+        if (!(machine_is_nslu2()))
+                return 0;
+        *IXP4XX_GPIO_GPISR = 0x20400000;        /* read the 2 irqs to clr */
+        set_irq_type(NSLU2_RB_IRQ, IRQT_LOW);
+        set_irq_type(NSLU2_PB_IRQ, IRQT_HIGH);
+        gpio_line_isr_clear(NSLU2_RB_GPIO);
+        gpio_line_isr_clear(NSLU2_PB_GPIO);
+        if (request_irq(NSLU2_RB_IRQ, &nslu2_reset_handler,
+                SA_INTERRUPT, "NSLU2 reset button", NULL) < 0) {
+                printk(KERN_DEBUG "Reset Button IRQ %d not available\n",
+                        NSLU2_RB_IRQ);
+                return -EIO;
+        }
+        if (request_irq(NSLU2_PB_IRQ, &nslu2_power_handler,
+                SA_INTERRUPT, "NSLU2 power button", NULL) < 0) {
+                printk(KERN_DEBUG "Power Button IRQ %d not available\n",
+                        NSLU2_PB_IRQ);
+                return -EIO;
+        }
+        return 0;
+}
+static void __exit nslu2_power_exit(void)
+{
+        free_irq(NSLU2_RB_IRQ, NULL);
+        free_irq(NSLU2_PB_IRQ, NULL);
+}
+module_init(nslu2_power_init);
+module_exit(nslu2_power_exit);
+MODULE_AUTHOR("Alessandro Zummo <a.zummo@towertech.it>");
+MODULE_DESCRIPTION("NSLU2 Power/Reset driver");
+MODULE_LICENSE("GPL");
diff --git a/arch/arm/mach-ixp4xx/nslu2-setup.c b/arch/arm/mach-ixp4xx/nslu2-setup.c
new file mode 100644
index 000000000000..289e94cb65c2
--- /dev/null
+++ b/arch/arm/mach-ixp4xx/nslu2-setup.c
@@ -0,0 +1,134 @@
+/*
+ * arch/arm/mach-ixp4xx/nslu2-setup.c
+ *
+ * NSLU2 board-setup
+ *
+ * based ixdp425-setup.c:
+ *      Copyright (C) 2003-2004 MontaVista Software, Inc.
+ *
+ * Author: Mark Rakes <mrakes at mac.com>
+ * Maintainers: http://www.nslu2-linux.org/
+ *
+ * Fixed missing init_time in MACHINE_START kas11 10/22/04
+ * Changed to conform to new style __init ixdp425 kas11 10/22/04
+ */
+#include <linux/kernel.h>
+#include <linux/serial.h>
+#include <linux/serial_8250.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/flash.h>
+static struct flash_platform_data nslu2_flash_data = {
+        .map_name               = "cfi_probe",
+        .width                  = 2,
+};
+static struct resource nslu2_flash_resource = {
+        .start                  = NSLU2_FLASH_BASE,
+        .end                    = NSLU2_FLASH_BASE + NSLU2_FLASH_SIZE,
+        .flags                  = IORESOURCE_MEM,
+};
+static struct platform_device nslu2_flash = {
+        .name                   = "IXP4XX-Flash",
+        .id                     = 0,
+        .dev.platform_data      = &nslu2_flash_data,
+        .num_resources          = 1,
+        .resource               = &nslu2_flash_resource,
+};
+static struct ixp4xx_i2c_pins nslu2_i2c_gpio_pins = {
+        .sda_pin                = NSLU2_SDA_PIN,
+        .scl_pin                = NSLU2_SCL_PIN,
+};
+static struct platform_device nslu2_i2c_controller = {
+        .name                   = "IXP4XX-I2C",
+        .id                     = 0,
+        .dev.platform_data      = &nslu2_i2c_gpio_pins,
+        .num_resources          = 0,
+};
+static struct resource nslu2_uart_resources[] = {
+        {
+                .start          = IXP4XX_UART1_BASE_PHYS,
+                .end            = IXP4XX_UART1_BASE_PHYS + 0x0fff,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = IXP4XX_UART2_BASE_PHYS,
+                .end            = IXP4XX_UART2_BASE_PHYS + 0x0fff,
+                .flags          = IORESOURCE_MEM,
+        }
+};
+static struct plat_serial8250_port nslu2_uart_data[] = {
+        {
+                .mapbase        = IXP4XX_UART1_BASE_PHYS,
+                .membase        = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
+                .irq            = IRQ_IXP4XX_UART1,
+                .flags          = UPF_BOOT_AUTOCONF,
+                .iotype         = UPIO_MEM,
+                .regshift       = 2,
+                .uartclk        = IXP4XX_UART_XTAL,
+        },
+        {
+                .mapbase        = IXP4XX_UART2_BASE_PHYS,
+                .membase        = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
+                .irq            = IRQ_IXP4XX_UART2,
+                .flags          = UPF_BOOT_AUTOCONF,
+                .iotype         = UPIO_MEM,
+                .regshift       = 2,
+                .uartclk        = IXP4XX_UART_XTAL,
+        },
+        { }
+};
+static struct platform_device nslu2_uart = {
+        .name                   = "serial8250",
+        .id                     = PLAT8250_DEV_PLATFORM,
+        .dev.platform_data      = nslu2_uart_data,
+        .num_resources          = 2,
+        .resource               = nslu2_uart_resources,
+};
+static struct platform_device *nslu2_devices[] __initdata = {
+        &nslu2_i2c_controller,
+        &nslu2_flash,
+        &nslu2_uart,
+};
+static void nslu2_power_off(void)
+{
+        /* This causes the box to drop the power and go dead. */
+        /* enable the pwr cntl gpio */
+        gpio_line_config(NSLU2_PO_GPIO, IXP4XX_GPIO_OUT);
+        /* do the deed */
+        gpio_line_set(NSLU2_PO_GPIO, IXP4XX_GPIO_HIGH);
+}
+static void __init nslu2_init(void)
+{
+        ixp4xx_sys_init();
+        pm_power_off = nslu2_power_off;
+        platform_add_devices(nslu2_devices, ARRAY_SIZE(nslu2_devices));
+}
+MACHINE_START(NSLU2, "Linksys NSLU2")
+        /* Maintainer: www.nslu2-linux.org */
+        .phys_ram       = PHYS_OFFSET,
+        .phys_io        = IXP4XX_PERIPHERAL_BASE_PHYS,
+        .io_pg_offst    = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xFFFC,
+        .boot_params    = 0x00000100,
+        .map_io         = ixp4xx_map_io,
+        .init_irq       = ixp4xx_init_irq,
+        .timer          = &ixp4xx_timer,
+        .init_machine   = nslu2_init,
+MACHINE_END
diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig
index 27fc2e8e5fca..86a0f0d14345 100644
--- a/arch/arm/mach-omap1/Kconfig
+++ b/arch/arm/mach-omap1/Kconfig
@@ -6,10 +6,10 @@ config ARCH_OMAP730
        bool "OMAP730 Based System"
        select ARCH_OMAP_OTG
-config ARCH_OMAP1510
+config ARCH_OMAP15XX
        depends on ARCH_OMAP1
        default y
-        bool "OMAP1510 Based System"
+        bool "OMAP15xx Based System"
 config ARCH_OMAP16XX
        depends on ARCH_OMAP1
@@ -21,7 +21,7 @@ comment "OMAP Board Type"
 config MACH_OMAP_INNOVATOR
        bool "TI Innovator"
-        depends on ARCH_OMAP1 && (ARCH_OMAP1510 || ARCH_OMAP16XX)
+        depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX)
        help
          TI OMAP 1510 or 1610 Innovator board support. Say Y here if you
          have such a board.
@@ -64,20 +64,30 @@ config MACH_OMAP_PERSEUS2
 config MACH_VOICEBLUE
        bool "Voiceblue"
-        depends on ARCH_OMAP1 && ARCH_OMAP1510
+        depends on ARCH_OMAP1 && ARCH_OMAP15XX
        help
          Support for Voiceblue GSM/VoIP gateway. Say Y here if you have
          such a board.
 config MACH_NETSTAR
        bool "NetStar"
-        depends on ARCH_OMAP1 && ARCH_OMAP1510
+        depends on ARCH_OMAP1 && ARCH_OMAP15XX
        help
          Support for NetStar PBX. Say Y here if you have such a board.
+config MACH_OMAP_PALMTE
+        bool "Palm Tungsten E"
+        depends on ARCH_OMAP1 && ARCH_OMAP15XX
+        help
+          Support for the Palm Tungsten E PDA. Currently only the LCD panel
+          is supported. To boot the kernel, you'll need a PalmOS compatible
+          bootloader; check out http://palmtelinux.sourceforge.net for more
+          informations.
+          Say Y here if you have such a PDA, say NO otherwise.
 config MACH_OMAP_GENERIC
        bool "Generic OMAP board"
-        depends on ARCH_OMAP1 && (ARCH_OMAP1510 || ARCH_OMAP16XX)
+        depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX)
        help
          Support for generic OMAP-1510, 1610 or 1710 board with
          no FPGA. Can be used as template for porting Linux to
@@ -121,32 +131,32 @@ config OMAP_ARM_182MHZ
 config OMAP_ARM_168MHZ
        bool "OMAP ARM 168 MHz CPU"
-        depends on ARCH_OMAP1 && (ARCH_OMAP1510 || ARCH_OMAP16XX || ARCH_OMAP730)
+        depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730)
        help
          Enable 168MHz clock for OMAP CPU. If unsure, say N.
 config OMAP_ARM_150MHZ
        bool "OMAP ARM 150 MHz CPU"
-        depends on ARCH_OMAP1 && ARCH_OMAP1510
+        depends on ARCH_OMAP1 && ARCH_OMAP15XX
        help
          Enable 150MHz clock for OMAP CPU. If unsure, say N.
 config OMAP_ARM_120MHZ
        bool "OMAP ARM 120 MHz CPU"
-        depends on ARCH_OMAP1 && (ARCH_OMAP1510 || ARCH_OMAP16XX || ARCH_OMAP730)
+        depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730)
        help
          Enable 120MHz clock for OMAP CPU. If unsure, say N.
 config OMAP_ARM_60MHZ
        bool "OMAP ARM 60 MHz CPU"
-        depends on ARCH_OMAP1 && (ARCH_OMAP1510 || ARCH_OMAP16XX || ARCH_OMAP730)
+        depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730)
        default y
        help
          Enable 60MHz clock for OMAP CPU. If unsure, say Y.
 config OMAP_ARM_30MHZ
        bool "OMAP ARM 30 MHz CPU"
-        depends on ARCH_OMAP1 && (ARCH_OMAP1510 || ARCH_OMAP16XX || ARCH_OMAP730)
+        depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730)
        help
          Enable 30MHz clock for OMAP CPU. If unsure, say N.
diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile
index 181a93deaaee..b0b00156faae 100644
--- a/arch/arm/mach-omap1/Makefile
+++ b/arch/arm/mach-omap1/Makefile
@@ -3,7 +3,7 @@
 #
 # Common support
-obj-y := io.o id.o irq.o time.o serial.o devices.o
+obj-y := io.o id.o clock.o irq.o time.o mux.o serial.o devices.o
 led-y := leds.o
 # Specific board support
@@ -15,8 +15,9 @@ obj-$(CONFIG_MACH_OMAP_OSK)		+= board-osk.o
 obj-$(CONFIG_MACH_OMAP_H3)              += board-h3.o
 obj-$(CONFIG_MACH_VOICEBLUE)            += board-voiceblue.o
 obj-$(CONFIG_MACH_NETSTAR)              += board-netstar.o
+obj-$(CONFIG_MACH_OMAP_PALMTE)          += board-palmte.o
-ifeq ($(CONFIG_ARCH_OMAP1510),y)
+ifeq ($(CONFIG_ARCH_OMAP15XX),y)
 # Innovator-1510 FPGA
 obj-$(CONFIG_MACH_OMAP_INNOVATOR)       += fpga.o
 endif
diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c
index c209c7172a9a..4b292e93fbe2 100644
--- a/arch/arm/mach-omap1/board-generic.c
+++ b/arch/arm/mach-omap1/board-generic.c
@@ -15,7 +15,7 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
-#include <linux/device.h>
+#include <linux/platform_device.h>
 #include <asm/hardware.h>
 #include <asm/mach-types.h>
@@ -28,8 +28,6 @@
 #include <asm/arch/board.h>
 #include <asm/arch/common.h>
-static int __initdata generic_serial_ports[OMAP_MAX_NR_PORTS] = {1, 1, 1};
 static void __init omap_generic_init_irq(void)
 {
        omap_init_irq();
@@ -37,7 +35,7 @@ static void __init omap_generic_init_irq(void)
 /* assume no Mini-AB port */
-#ifdef CONFIG_ARCH_OMAP1510
+#ifdef CONFIG_ARCH_OMAP15XX
 static struct omap_usb_config generic1510_usb_config __initdata = {
        .register_host  = 1,
        .register_dev   = 1,
@@ -76,21 +74,19 @@ static struct omap_mmc_config generic_mmc_config __initdata = {
 #endif
+static struct omap_uart_config generic_uart_config __initdata = {
+        .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
+};
 static struct omap_board_config_kernel generic_config[] = {
        { OMAP_TAG_USB,           NULL },
        { OMAP_TAG_MMC,           &generic_mmc_config },
+        { OMAP_TAG_UART,        &generic_uart_config },
 };
 static void __init omap_generic_init(void)
 {
-        const struct omap_uart_config *uart_conf;
+#ifdef CONFIG_ARCH_OMAP15XX
-        /*
-         * Make sure the serial ports are muxed on at this point.
-         * You have to mux them off in device drivers later on
-         * if not needed.
-         */
-#ifdef CONFIG_ARCH_OMAP1510
        if (cpu_is_omap1510()) {
                generic_config[0].data = &generic1510_usb_config;
        }
@@ -101,20 +97,9 @@ static void __init omap_generic_init(void)
        }
 #endif
-        uart_conf = omap_get_config(OMAP_TAG_UART, struct omap_uart_config);
-        if (uart_conf != NULL) {
-                unsigned int enabled_ports, i;
-                enabled_ports = uart_conf->enabled_uarts;
-                for (i = 0; i < 3; i++) {
-                        if (!(enabled_ports & (1 << i)))
-                                generic_serial_ports[i] = 0;
-                }
-        }
        omap_board_config = generic_config;
        omap_board_config_size = ARRAY_SIZE(generic_config);
-        omap_serial_init(generic_serial_ports);
+        omap_serial_init();
 }
 static void __init omap_generic_map_io(void)
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c
index 4ee6bd8a50b8..a07e2c9307fa 100644
--- a/arch/arm/mach-omap1/board-h2.c
+++ b/arch/arm/mach-omap1/board-h2.c
@@ -40,8 +40,6 @@
 extern int omap_gpio_init(void);
-static int __initdata h2_serial_ports[OMAP_MAX_NR_PORTS] = {1, 1, 1};
 static struct mtd_partition h2_partitions[] = {
        /* bootloader (U-Boot, etc) in first sector */
        {
@@ -160,9 +158,20 @@ static struct omap_mmc_config h2_mmc_config __initdata = {
        },
 };
+static struct omap_uart_config h2_uart_config __initdata = {
+        .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
+};
+static struct omap_lcd_config h2_lcd_config __initdata = {
+        .panel_name     = "h2",
+        .ctrl_name      = "internal",
+};
 static struct omap_board_config_kernel h2_config[] = {
        { OMAP_TAG_USB,           &h2_usb_config },
        { OMAP_TAG_MMC,           &h2_mmc_config },
+        { OMAP_TAG_UART,        &h2_uart_config },
+        { OMAP_TAG_LCD,         &h2_lcd_config },
 };
 static void __init h2_init(void)
@@ -180,12 +189,12 @@ static void __init h2_init(void)
        platform_add_devices(h2_devices, ARRAY_SIZE(h2_devices));
        omap_board_config = h2_config;
        omap_board_config_size = ARRAY_SIZE(h2_config);
+        omap_serial_init();
 }
 static void __init h2_map_io(void)
 {
        omap_map_common_io();
-        omap_serial_init(h2_serial_ports);
 }
 MACHINE_START(OMAP_H2, "TI-H2")
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c
index fc824361430d..668e278433c2 100644
--- a/arch/arm/mach-omap1/board-h3.c
+++ b/arch/arm/mach-omap1/board-h3.c
@@ -41,8 +41,6 @@
 extern int omap_gpio_init(void);
-static int __initdata h3_serial_ports[OMAP_MAX_NR_PORTS] = {1, 1, 1};
 static struct mtd_partition h3_partitions[] = {
        /* bootloader (U-Boot, etc) in first sector */
        {
@@ -168,9 +166,20 @@ static struct omap_mmc_config h3_mmc_config __initdata = {
        },
 };
+static struct omap_uart_config h3_uart_config __initdata = {
+        .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
+};
+static struct omap_lcd_config h3_lcd_config __initdata = {
+        .panel_name     = "h3",
+        .ctrl_name      = "internal",
+};
 static struct omap_board_config_kernel h3_config[] = {
-        { OMAP_TAG_USB,  &h3_usb_config },
+        { OMAP_TAG_USB,         &h3_usb_config },
-        { OMAP_TAG_MMC,  &h3_mmc_config },
+        { OMAP_TAG_MMC,         &h3_mmc_config },
+        { OMAP_TAG_UART,        &h3_uart_config },
+        { OMAP_TAG_LCD,         &h3_lcd_config },
 };
 static void __init h3_init(void)
@@ -180,6 +189,7 @@ static void __init h3_init(void)
        (void) platform_add_devices(devices, ARRAY_SIZE(devices));
        omap_board_config = h3_config;
        omap_board_config_size = ARRAY_SIZE(h3_config);
+        omap_serial_init();
 }
 static void __init h3_init_smc91x(void)
@@ -201,7 +211,6 @@ void h3_init_irq(void)
 static void __init h3_map_io(void)
 {
        omap_map_common_io();
-        omap_serial_init(h3_serial_ports);
 }
 MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
index a2eac853b2da..95f1ff36cdcb 100644
--- a/arch/arm/mach-omap1/board-innovator.c
+++ b/arch/arm/mach-omap1/board-innovator.c
@@ -36,8 +36,6 @@
 #include <asm/arch/usb.h>
 #include <asm/arch/common.h>
-static int __initdata innovator_serial_ports[OMAP_MAX_NR_PORTS] = {1, 1, 1};
 static struct mtd_partition innovator_partitions[] = {
        /* bootloader (U-Boot, etc) in first sector */
        {
@@ -99,7 +97,7 @@ static struct platform_device innovator_flash_device = {
        .resource       = &innovator_flash_resource,
 };
-#ifdef CONFIG_ARCH_OMAP1510
+#ifdef CONFIG_ARCH_OMAP15XX
 /* Only FPGA needs to be mapped here. All others are done with ioremap */
 static struct map_desc innovator1510_io_desc[] __initdata = {
@@ -136,7 +134,7 @@ static struct platform_device *innovator1510_devices[] __initdata = {
        &innovator1510_smc91x_device,
 };
-#endif /* CONFIG_ARCH_OMAP1510 */
+#endif /* CONFIG_ARCH_OMAP15XX */
 #ifdef CONFIG_ARCH_OMAP16XX
@@ -185,7 +183,7 @@ void innovator_init_irq(void)
 {
        omap_init_irq();
        omap_gpio_init();
-#ifdef CONFIG_ARCH_OMAP1510
+#ifdef CONFIG_ARCH_OMAP15XX
        if (cpu_is_omap1510()) {
                omap1510_fpga_init_irq();
        }
@@ -193,7 +191,7 @@ void innovator_init_irq(void)
        innovator_init_smc91x();
 }
-#ifdef CONFIG_ARCH_OMAP1510
+#ifdef CONFIG_ARCH_OMAP15XX
 static struct omap_usb_config innovator1510_usb_config __initdata = {
        /* for bundled non-standard host and peripheral cables */
        .hmc_mode       = 4,
@@ -205,6 +203,11 @@ static struct omap_usb_config innovator1510_usb_config __initdata = {
        .register_dev   = 1,
        .pins[0]        = 2,
 };
+static struct omap_lcd_config innovator1510_lcd_config __initdata = {
+        .panel_name     = "inn1510",
+        .ctrl_name      = "internal",
+};
 #endif
 #ifdef CONFIG_ARCH_OMAP16XX
@@ -222,6 +225,11 @@ static struct omap_usb_config h2_usb_config __initdata = {
        .pins[1]        = 3,
 };
+static struct omap_lcd_config innovator1610_lcd_config __initdata = {
+        .panel_name     = "inn1610",
+        .ctrl_name      = "internal",
+};
 #endif
 static struct omap_mmc_config innovator_mmc_config __initdata = {
@@ -234,14 +242,20 @@ static struct omap_mmc_config innovator_mmc_config __initdata = {
        },
 };
+static struct omap_uart_config innovator_uart_config __initdata = {
+        .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
+};
 static struct omap_board_config_kernel innovator_config[] = {
        { OMAP_TAG_USB,         NULL },
+        { OMAP_TAG_LCD,         NULL },
        { OMAP_TAG_MMC,         &innovator_mmc_config },
+        { OMAP_TAG_UART,        &innovator_uart_config },
 };
 static void __init innovator_init(void)
 {
-#ifdef CONFIG_ARCH_OMAP1510
+#ifdef CONFIG_ARCH_OMAP15XX
        if (cpu_is_omap1510()) {
                platform_add_devices(innovator1510_devices, ARRAY_SIZE(innovator1510_devices));
        }
@@ -252,23 +266,28 @@ static void __init innovator_init(void)
        }
 #endif
-#ifdef CONFIG_ARCH_OMAP1510
+#ifdef CONFIG_ARCH_OMAP15XX
-        if (cpu_is_omap1510())
+        if (cpu_is_omap1510()) {
                innovator_config[0].data = &innovator1510_usb_config;
+                innovator_config[1].data = &innovator1510_lcd_config;
+        }
 #endif
 #ifdef CONFIG_ARCH_OMAP16XX
-        if (cpu_is_omap1610())
+        if (cpu_is_omap1610()) {
                innovator_config[0].data = &h2_usb_config;
+                innovator_config[1].data = &innovator1610_lcd_config;
+        }
 #endif
        omap_board_config = innovator_config;
        omap_board_config_size = ARRAY_SIZE(innovator_config);
+        omap_serial_init();
 }
 static void __init innovator_map_io(void)
 {
        omap_map_common_io();
-#ifdef CONFIG_ARCH_OMAP1510
+#ifdef CONFIG_ARCH_OMAP15XX
        if (cpu_is_omap1510()) {
                iotable_init(innovator1510_io_desc, ARRAY_SIZE(innovator1510_io_desc));
                udelay(10);     /* Delay needed for FPGA */
@@ -280,7 +299,6 @@ static void __init innovator_map_io(void)
                       fpga_read(OMAP1510_FPGA_BOARD_REV));
        }
 #endif
-        omap_serial_init(innovator_serial_ports);
 }
 MACHINE_START(OMAP_INNOVATOR, "TI-Innovator")
diff --git a/arch/arm/mach-omap1/board-netstar.c b/arch/arm/mach-omap1/board-netstar.c
index c851c2e4dfcb..0448fa7de8a4 100644
--- a/arch/arm/mach-omap1/board-netstar.c
+++ b/arch/arm/mach-omap1/board-netstar.c
@@ -55,6 +55,14 @@ static struct platform_device *netstar_devices[] __initdata = {
        &netstar_smc91x_device,
 };
+static struct omap_uart_config netstar_uart_config __initdata = {
+        .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
+};
+static struct omap_board_config_kernel netstar_config[] = {
+        { OMAP_TAG_UART,        &netstar_uart_config },
+};
 static void __init netstar_init_irq(void)
 {
        omap_init_irq();
@@ -92,14 +100,15 @@ static void __init netstar_init(void)
        /* Switch off red LED */
        omap_writeb(0x00, OMAP_LPG1_PMR);       /* Disable clock */
        omap_writeb(0x80, OMAP_LPG1_LCR);
-}
-static int __initdata omap_serial_ports[OMAP_MAX_NR_PORTS] = {1, 1, 1};
+        omap_board_config = netstar_config;
+        omap_board_config_size = ARRAY_SIZE(netstar_config);
+        omap_serial_init();
+}
 static void __init netstar_map_io(void)
 {
        omap_map_common_io();
-        omap_serial_init(omap_serial_ports);
 }
 #define MACHINE_PANICED         1
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c
index a88524e7c315..e990e1bc1669 100644
--- a/arch/arm/mach-omap1/board-osk.c
+++ b/arch/arm/mach-omap1/board-osk.c
@@ -46,8 +46,6 @@
 #include <asm/arch/tc.h>
 #include <asm/arch/common.h>
-static int __initdata osk_serial_ports[OMAP_MAX_NR_PORTS] = {1, 0, 0};
 static struct mtd_partition osk_partitions[] = {
        /* bootloader (U-Boot, etc) in first sector */
        {
@@ -155,7 +153,7 @@ static void __init osk_init_smc91x(void)
        }
        /* Check EMIFS wait states to fix errors with SMC_GET_PKT_HDR */
-        EMIFS_CCS(1) |= 0x2;
+        EMIFS_CCS(1) |= 0x3;
 }
 static void __init osk_init_cf(void)
@@ -193,8 +191,19 @@ static struct omap_usb_config osk_usb_config __initdata = {
        .pins[0]        = 2,
 };
+static struct omap_uart_config osk_uart_config __initdata = {
+        .enabled_uarts = (1 << 0),
+};
+static struct omap_lcd_config osk_lcd_config __initdata = {
+        .panel_name     = "osk",
+        .ctrl_name      = "internal",
+};
 static struct omap_board_config_kernel osk_config[] = {
        { OMAP_TAG_USB,           &osk_usb_config },
+        { OMAP_TAG_UART,                &osk_uart_config },
+        { OMAP_TAG_LCD,                 &osk_lcd_config },
 };
 #ifdef  CONFIG_OMAP_OSK_MISTRAL
@@ -254,13 +263,13 @@ static void __init osk_init(void)
        omap_board_config_size = ARRAY_SIZE(osk_config);
        USB_TRANSCEIVER_CTRL_REG |= (3 << 1);
+        omap_serial_init();
        osk_mistral_init();
 }
 static void __init osk_map_io(void)
 {
        omap_map_common_io();
-        omap_serial_init(osk_serial_ports);
 }
 MACHINE_START(OMAP_OSK, "TI-OSK")
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c
new file mode 100644
index 000000000000..540b20d78cca
--- /dev/null
+++ b/arch/arm/mach-omap1/board-palmte.c
@@ -0,0 +1,87 @@
+/*
+ * linux/arch/arm/mach-omap1/board-palmte.c
+ *
+ * Modified from board-generic.c
+ *
+ * Support for the Palm Tungsten E PDA.
+ *
+ * Original version : Laurent Gonzalez
+ *
+ * Maintainters : http://palmtelinux.sf.net
+ *                palmtelinux-developpers@lists.sf.net
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/notifier.h>
+#include <asm/hardware.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/mux.h>
+#include <asm/arch/usb.h>
+#include <asm/arch/board.h>
+#include <asm/arch/common.h>
+#include <asm/hardware/clock.h>
+static void __init omap_generic_init_irq(void)
+{
+        omap_init_irq();
+}
+static struct omap_usb_config palmte_usb_config __initdata = {
+        .register_dev   = 1,
+        .hmc_mode       = 0,
+        .pins[0]        = 3,
+};
+static struct omap_mmc_config palmte_mmc_config __initdata = {
+        .mmc [0] = {
+                .enabled        = 1,
+                .wire4          = 1,
+                .wp_pin         = OMAP_MPUIO(3),
+                .power_pin      = -1,
+                .switch_pin     = -1,
+        },
+};
+static struct omap_lcd_config palmte_lcd_config __initdata = {
+        .panel_name     = "palmte",
+        .ctrl_name      = "internal",
+};
+static struct omap_board_config_kernel palmte_config[] = {
+        { OMAP_TAG_USB, &palmte_usb_config },
+        { OMAP_TAG_MMC, &palmte_mmc_config },
+        { OMAP_TAG_LCD, &palmte_lcd_config },
+};
+static void __init omap_generic_init(void)
+{
+        omap_board_config = palmte_config;
+        omap_board_config_size = ARRAY_SIZE(palmte_config);
+}
+static void __init omap_generic_map_io(void)
+{
+        omap_map_common_io();
+}
+MACHINE_START(OMAP_PALMTE, "OMAP310 based Palm Tungsten E")
+        .phys_ram       = 0x10000000,
+        .phys_io        = 0xfff00000,
+        .io_pg_offst    = ((0xfef00000) >> 18) & 0xfffc,
+        .boot_params    = 0x10000100,
+        .map_io         = omap_generic_map_io,
+        .init_irq       = omap_generic_init_irq,
+        .init_machine   = omap_generic_init,
+        .timer          = &omap_timer,
+MACHINE_END
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c
index 354b157acb3a..bd900b7ab33c 100644
--- a/arch/arm/mach-omap1/board-perseus2.c
+++ b/arch/arm/mach-omap1/board-perseus2.c
@@ -29,6 +29,7 @@
 #include <asm/arch/mux.h>
 #include <asm/arch/fpga.h>
 #include <asm/arch/common.h>
+#include <asm/arch/board.h>
 static struct resource smc91x_resources[] = {
        [0] = {
@@ -43,8 +44,6 @@ static struct resource smc91x_resources[] = {
        },
 };
-static int __initdata p2_serial_ports[OMAP_MAX_NR_PORTS] = {1, 1, 0};
 static struct mtd_partition p2_partitions[] = {
        /* bootloader (U-Boot, etc) in first sector */
        {
@@ -111,9 +110,27 @@ static struct platform_device *devices[] __initdata = {
        &smc91x_device,
 };
+static struct omap_uart_config perseus2_uart_config __initdata = {
+        .enabled_uarts = ((1 << 0) | (1 << 1)),
+};
+static struct omap_lcd_config perseus2_lcd_config __initdata = {
+        .panel_name     = "p2",
+        .ctrl_name      = "internal",
+};
+static struct omap_board_config_kernel perseus2_config[] = {
+        { OMAP_TAG_UART,        &perseus2_uart_config },
+        { OMAP_TAG_LCD,         &perseus2_lcd_config },
+};
 static void __init omap_perseus2_init(void)
 {
        (void) platform_add_devices(devices, ARRAY_SIZE(devices));
+        omap_board_config = perseus2_config;
+        omap_board_config_size = ARRAY_SIZE(perseus2_config);
+        omap_serial_init();
 }
 static void __init perseus2_init_smc91x(void)
@@ -131,7 +148,6 @@ void omap_perseus2_init_irq(void)
        omap_gpio_init();
        perseus2_init_smc91x();
 }
 /* Only FPGA needs to be mapped here. All others are done with ioremap */
 static struct map_desc omap_perseus2_io_desc[] __initdata = {
        {
@@ -179,7 +195,6 @@ static void __init omap_perseus2_map_io(void)
         * It is used as the Ethernet controller interrupt
         */
        omap_writel(omap_readl(OMAP730_IO_CONF_9) & 0x1FFFFFFF, OMAP730_IO_CONF_9);
-        omap_serial_init(p2_serial_ports);
 }
 MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2")
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c
index 3f018b296861..6f9a6220e78a 100644
--- a/arch/arm/mach-omap1/board-voiceblue.c
+++ b/arch/arm/mach-omap1/board-voiceblue.c
@@ -150,9 +150,14 @@ static struct omap_mmc_config voiceblue_mmc_config __initdata = {
        },
 };
+static struct omap_uart_config voiceblue_uart_config __initdata = {
+        .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
+};
 static struct omap_board_config_kernel voiceblue_config[] = {
        { OMAP_TAG_USB, &voiceblue_usb_config },
        { OMAP_TAG_MMC, &voiceblue_mmc_config },
+        { OMAP_TAG_UART,        &voiceblue_uart_config },
 };
 static void __init voiceblue_init_irq(void)
@@ -191,6 +196,7 @@ static void __init voiceblue_init(void)
        platform_add_devices(voiceblue_devices, ARRAY_SIZE(voiceblue_devices));
        omap_board_config = voiceblue_config;
        omap_board_config_size = ARRAY_SIZE(voiceblue_config);
+        omap_serial_init();
        /* There is a good chance board is going up, so enable power LED
         * (it is connected through invertor) */
@@ -198,12 +204,9 @@ static void __init voiceblue_init(void)
        omap_writeb(0x00, OMAP_LPG1_PMR);       /* Disable clock */
 }
-static int __initdata omap_serial_ports[OMAP_MAX_NR_PORTS] = {1, 1, 1};
 static void __init voiceblue_map_io(void)
 {
        omap_map_common_io();
-        omap_serial_init(omap_serial_ports);
 }
 #define MACHINE_PANICED         1
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
new file mode 100644
index 000000000000..4277eee44ed5
--- /dev/null
+++ b/arch/arm/mach-omap1/clock.c
@@ -0,0 +1,792 @@
+/*
+ *  linux/arch/arm/mach-omap1/clock.c
+ *
+ *  Copyright (C) 2004 - 2005 Nokia corporation
+ *  Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
+ *
+ *  Modified to use omap shared clock framework by
+ *  Tony Lindgren <tony@atomide.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <asm/io.h>
+#include <asm/hardware/clock.h>
+#include <asm/arch/usb.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/sram.h>
+#include "clock.h"
+__u32 arm_idlect1_mask;
+/*-------------------------------------------------------------------------
+ * Omap1 specific clock functions
+ *-------------------------------------------------------------------------*/
+static void omap1_watchdog_recalc(struct clk * clk)
+{
+        clk->rate = clk->parent->rate / 14;
+}
+static void omap1_uart_recalc(struct clk * clk)
+{
+        unsigned int val = omap_readl(clk->enable_reg);
+        if (val & clk->enable_bit)
+                clk->rate = 48000000;
+        else
+                clk->rate = 12000000;
+}
+static int omap1_clk_enable_dsp_domain(struct clk *clk)
+{
+        int retval;
+        retval = omap1_clk_use(&api_ck.clk);
+        if (!retval) {
+                retval = omap1_clk_enable(clk);
+                omap1_clk_unuse(&api_ck.clk);
+        }
+        return retval;
+}
+static void omap1_clk_disable_dsp_domain(struct clk *clk)
+{
+        if (omap1_clk_use(&api_ck.clk) == 0) {
+                omap1_clk_disable(clk);
+                omap1_clk_unuse(&api_ck.clk);
+        }
+}
+static int omap1_clk_enable_uart_functional(struct clk *clk)
+{
+        int ret;
+        struct uart_clk *uclk;
+        ret = omap1_clk_enable(clk);
+        if (ret == 0) {
+                /* Set smart idle acknowledgement mode */
+                uclk = (struct uart_clk *)clk;
+                omap_writeb((omap_readb(uclk->sysc_addr) & ~0x10) | 8,
+                            uclk->sysc_addr);
+        }
+        return ret;
+}
+static void omap1_clk_disable_uart_functional(struct clk *clk)
+{
+        struct uart_clk *uclk;
+        /* Set force idle acknowledgement mode */
+        uclk = (struct uart_clk *)clk;
+        omap_writeb((omap_readb(uclk->sysc_addr) & ~0x18), uclk->sysc_addr);
+        omap1_clk_disable(clk);
+}
+static void omap1_clk_allow_idle(struct clk *clk)
+{
+        struct arm_idlect1_clk * iclk = (struct arm_idlect1_clk *)clk;
+        if (!(clk->flags & CLOCK_IDLE_CONTROL))
+                return;
+        if (iclk->no_idle_count > 0 && !(--iclk->no_idle_count))
+                arm_idlect1_mask |= 1 << iclk->idlect_shift;
+}
+static void omap1_clk_deny_idle(struct clk *clk)
+{
+        struct arm_idlect1_clk * iclk = (struct arm_idlect1_clk *)clk;
+        if (!(clk->flags & CLOCK_IDLE_CONTROL))
+                return;
+        if (iclk->no_idle_count++ == 0)
+                arm_idlect1_mask &= ~(1 << iclk->idlect_shift);
+}
+static __u16 verify_ckctl_value(__u16 newval)
+{
+        /* This function checks for following limitations set
+         * by the hardware (all conditions must be true):
+         * DSPMMU_CK == DSP_CK  or  DSPMMU_CK == DSP_CK/2
+         * ARM_CK >= TC_CK
+         * DSP_CK >= TC_CK
+         * DSPMMU_CK >= TC_CK
+         *
+         * In addition following rules are enforced:
+         * LCD_CK <= TC_CK
+         * ARMPER_CK <= TC_CK
+         *
+         * However, maximum frequencies are not checked for!
+         */
+        __u8 per_exp;
+        __u8 lcd_exp;
+        __u8 arm_exp;
+        __u8 dsp_exp;
+        __u8 tc_exp;
+        __u8 dspmmu_exp;
+        per_exp = (newval >> CKCTL_PERDIV_OFFSET) & 3;
+        lcd_exp = (newval >> CKCTL_LCDDIV_OFFSET) & 3;
+        arm_exp = (newval >> CKCTL_ARMDIV_OFFSET) & 3;
+        dsp_exp = (newval >> CKCTL_DSPDIV_OFFSET) & 3;
+        tc_exp = (newval >> CKCTL_TCDIV_OFFSET) & 3;
+        dspmmu_exp = (newval >> CKCTL_DSPMMUDIV_OFFSET) & 3;
+        if (dspmmu_exp < dsp_exp)
+                dspmmu_exp = dsp_exp;
+        if (dspmmu_exp > dsp_exp+1)
+                dspmmu_exp = dsp_exp+1;
+        if (tc_exp < arm_exp)
+                tc_exp = arm_exp;
+        if (tc_exp < dspmmu_exp)
+                tc_exp = dspmmu_exp;
+        if (tc_exp > lcd_exp)
+                lcd_exp = tc_exp;
+        if (tc_exp > per_exp)
+                per_exp = tc_exp;
+        newval &= 0xf000;
+        newval |= per_exp << CKCTL_PERDIV_OFFSET;
+        newval |= lcd_exp << CKCTL_LCDDIV_OFFSET;
+        newval |= arm_exp << CKCTL_ARMDIV_OFFSET;
+        newval |= dsp_exp << CKCTL_DSPDIV_OFFSET;
+        newval |= tc_exp << CKCTL_TCDIV_OFFSET;
+        newval |= dspmmu_exp << CKCTL_DSPMMUDIV_OFFSET;
+        return newval;
+}
+static int calc_dsor_exp(struct clk *clk, unsigned long rate)
+{
+        /* Note: If target frequency is too low, this function will return 4,
+         * which is invalid value. Caller must check for this value and act
+         * accordingly.
+         *
+         * Note: This function does not check for following limitations set
+         * by the hardware (all conditions must be true):
+         * DSPMMU_CK == DSP_CK  or  DSPMMU_CK == DSP_CK/2
+         * ARM_CK >= TC_CK
+         * DSP_CK >= TC_CK
+         * DSPMMU_CK >= TC_CK
+         */
+        unsigned long realrate;
+        struct clk * parent;
+        unsigned  dsor_exp;
+        if (unlikely(!(clk->flags & RATE_CKCTL)))
+                return -EINVAL;
+        parent = clk->parent;
+        if (unlikely(parent == 0))
+                return -EIO;
+        realrate = parent->rate;
+        for (dsor_exp=0; dsor_exp<4; dsor_exp++) {
+                if (realrate <= rate)
+                        break;
+                realrate /= 2;
+        }
+        return dsor_exp;
+}
+static void omap1_ckctl_recalc(struct clk * clk)
+{
+        int dsor;
+        /* Calculate divisor encoded as 2-bit exponent */
+        dsor = 1 << (3 & (omap_readw(ARM_CKCTL) >> clk->rate_offset));
+        if (unlikely(clk->rate == clk->parent->rate / dsor))
+                return; /* No change, quick exit */
+        clk->rate = clk->parent->rate / dsor;
+        if (unlikely(clk->flags & RATE_PROPAGATES))
+                propagate_rate(clk);
+}
+static void omap1_ckctl_recalc_dsp_domain(struct clk * clk)
+{
+        int dsor;
+        /* Calculate divisor encoded as 2-bit exponent
+         *
+         * The clock control bits are in DSP domain,
+         * so api_ck is needed for access.
+         * Note that DSP_CKCTL virt addr = phys addr, so
+         * we must use __raw_readw() instead of omap_readw().
+         */
+        omap1_clk_use(&api_ck.clk);
+        dsor = 1 << (3 & (__raw_readw(DSP_CKCTL) >> clk->rate_offset));
+        omap1_clk_unuse(&api_ck.clk);
+        if (unlikely(clk->rate == clk->parent->rate / dsor))
+                return; /* No change, quick exit */
+        clk->rate = clk->parent->rate / dsor;
+        if (unlikely(clk->flags & RATE_PROPAGATES))
+                propagate_rate(clk);
+}
+/* MPU virtual clock functions */
+static int omap1_select_table_rate(struct clk * clk, unsigned long rate)
+{
+        /* Find the highest supported frequency <= rate and switch to it */
+        struct mpu_rate * ptr;
+        if (clk != &virtual_ck_mpu)
+                return -EINVAL;
+        for (ptr = rate_table; ptr->rate; ptr++) {
+                if (ptr->xtal != ck_ref.rate)
+                        continue;
+                /* DPLL1 cannot be reprogrammed without risking system crash */
+                if (likely(ck_dpll1.rate!=0) && ptr->pll_rate != ck_dpll1.rate)
+                        continue;
+                /* Can check only after xtal frequency check */
+                if (ptr->rate <= rate)
+                        break;
+        }
+        if (!ptr->rate)
+                return -EINVAL;
+        /*
+         * In most cases we should not need to reprogram DPLL.
+         * Reprogramming the DPLL is tricky, it must be done from SRAM.
+         */
+        omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val);
+        ck_dpll1.rate = ptr->pll_rate;
+        propagate_rate(&ck_dpll1);
+        return 0;
+}
+static int omap1_clk_set_rate_dsp_domain(struct clk *clk, unsigned long rate)
+{
+        int  ret = -EINVAL;
+        int  dsor_exp;
+        __u16  regval;
+        if (clk->flags & RATE_CKCTL) {
+                dsor_exp = calc_dsor_exp(clk, rate);
+                if (dsor_exp > 3)
+                        dsor_exp = -EINVAL;
+                if (dsor_exp < 0)
+                        return dsor_exp;
+                regval = __raw_readw(DSP_CKCTL);
+                regval &= ~(3 << clk->rate_offset);
+                regval |= dsor_exp << clk->rate_offset;
+                __raw_writew(regval, DSP_CKCTL);
+                clk->rate = clk->parent->rate / (1 << dsor_exp);
+                ret = 0;
+        }
+        if (unlikely(ret == 0 && (clk->flags & RATE_PROPAGATES)))
+                propagate_rate(clk);
+        return ret;
+}
+static long omap1_round_to_table_rate(struct clk * clk, unsigned long rate)
+{
+        /* Find the highest supported frequency <= rate */
+        struct mpu_rate * ptr;
+        long  highest_rate;
+        if (clk != &virtual_ck_mpu)
+                return -EINVAL;
+        highest_rate = -EINVAL;
+        for (ptr = rate_table; ptr->rate; ptr++) {
+                if (ptr->xtal != ck_ref.rate)
+                        continue;
+                highest_rate = ptr->rate;
+                /* Can check only after xtal frequency check */
+                if (ptr->rate <= rate)
+                        break;
+        }
+        return highest_rate;
+}
+static unsigned calc_ext_dsor(unsigned long rate)
+{
+        unsigned dsor;
+        /* MCLK and BCLK divisor selection is not linear:
+         * freq = 96MHz / dsor
+         *
+         * RATIO_SEL range: dsor <-> RATIO_SEL
+         * 0..6: (RATIO_SEL+2) <-> (dsor-2)
+         * 6..48:  (8+(RATIO_SEL-6)*2) <-> ((dsor-8)/2+6)
+         * Minimum dsor is 2 and maximum is 96. Odd divisors starting from 9
+         * can not be used.
+         */
+        for (dsor = 2; dsor < 96; ++dsor) {
+                if ((dsor & 1) && dsor > 8)
+                        continue;
+                if (rate >= 96000000 / dsor)
+                        break;
+        }
+        return dsor;
+}
+/* Only needed on 1510 */
+static int omap1_set_uart_rate(struct clk * clk, unsigned long rate)
+{
+        unsigned int val;
+        val = omap_readl(clk->enable_reg);
+        if (rate == 12000000)
+                val &= ~(1 << clk->enable_bit);
+        else if (rate == 48000000)
+                val |= (1 << clk->enable_bit);
+        else
+                return -EINVAL;
+        omap_writel(val, clk->enable_reg);
+        clk->rate = rate;
+        return 0;
+}
+/* External clock (MCLK & BCLK) functions */
+static int omap1_set_ext_clk_rate(struct clk * clk, unsigned long rate)
+{
+        unsigned dsor;
+        __u16 ratio_bits;
+        dsor = calc_ext_dsor(rate);
+        clk->rate = 96000000 / dsor;
+        if (dsor > 8)
+                ratio_bits = ((dsor - 8) / 2 + 6) << 2;
+        else
+                ratio_bits = (dsor - 2) << 2;
+        ratio_bits |= omap_readw(clk->enable_reg) & ~0xfd;
+        omap_writew(ratio_bits, clk->enable_reg);
+        return 0;
+}
+static long omap1_round_ext_clk_rate(struct clk * clk, unsigned long rate)
+{
+        return 96000000 / calc_ext_dsor(rate);
+}
+static void omap1_init_ext_clk(struct clk * clk)
+{
+        unsigned dsor;
+        __u16 ratio_bits;
+        /* Determine current rate and ensure clock is based on 96MHz APLL */
+        ratio_bits = omap_readw(clk->enable_reg) & ~1;
+        omap_writew(ratio_bits, clk->enable_reg);
+        ratio_bits = (ratio_bits & 0xfc) >> 2;
+        if (ratio_bits > 6)
+                dsor = (ratio_bits - 6) * 2 + 8;
+        else
+                dsor = ratio_bits + 2;
+        clk-> rate = 96000000 / dsor;
+}
+static int omap1_clk_use(struct clk *clk)
+{
+        int ret = 0;
+        if (clk->usecount++ == 0) {
+                if (likely(clk->parent)) {
+                        ret = omap1_clk_use(clk->parent);
+                        if (unlikely(ret != 0)) {
+                                clk->usecount--;
+                                return ret;
+                        }
+                        if (clk->flags & CLOCK_NO_IDLE_PARENT)
+                                if (!cpu_is_omap24xx())
+                                        omap1_clk_deny_idle(clk->parent);
+                }
+                ret = clk->enable(clk);
+                if (unlikely(ret != 0) && clk->parent) {
+                        omap1_clk_unuse(clk->parent);
+                        clk->usecount--;
+                }
+        }
+        return ret;
+}
+static void omap1_clk_unuse(struct clk *clk)
+{
+        if (clk->usecount > 0 && !(--clk->usecount)) {
+                clk->disable(clk);
+                if (likely(clk->parent)) {
+                        omap1_clk_unuse(clk->parent);
+                        if (clk->flags & CLOCK_NO_IDLE_PARENT)
+                                if (!cpu_is_omap24xx())
+                                        omap1_clk_allow_idle(clk->parent);
+                }
+        }
+}
+static int omap1_clk_enable(struct clk *clk)
+{
+        __u16 regval16;
+        __u32 regval32;
+        if (clk->flags & ALWAYS_ENABLED)
+                return 0;
+        if (unlikely(clk->enable_reg == 0)) {
+                printk(KERN_ERR "clock.c: Enable for %s without enable code\n",
+                       clk->name);
+                return 0;
+        }
+        if (clk->flags & ENABLE_REG_32BIT) {
+                if (clk->flags & VIRTUAL_IO_ADDRESS) {
+                        regval32 = __raw_readl(clk->enable_reg);
+                        regval32 |= (1 << clk->enable_bit);
+                        __raw_writel(regval32, clk->enable_reg);
+                } else {
+                        regval32 = omap_readl(clk->enable_reg);
+                        regval32 |= (1 << clk->enable_bit);
+                        omap_writel(regval32, clk->enable_reg);
+                }
+        } else {
+                if (clk->flags & VIRTUAL_IO_ADDRESS) {
+                        regval16 = __raw_readw(clk->enable_reg);
+                        regval16 |= (1 << clk->enable_bit);
+                        __raw_writew(regval16, clk->enable_reg);
+                } else {
+                        regval16 = omap_readw(clk->enable_reg);
+                        regval16 |= (1 << clk->enable_bit);
+                        omap_writew(regval16, clk->enable_reg);
+                }
+        }
+        return 0;
+}
+static void omap1_clk_disable(struct clk *clk)
+{
+        __u16 regval16;
+        __u32 regval32;
+        if (clk->enable_reg == 0)
+                return;
+        if (clk->flags & ENABLE_REG_32BIT) {
+                if (clk->flags & VIRTUAL_IO_ADDRESS) {
+                        regval32 = __raw_readl(clk->enable_reg);
+                        regval32 &= ~(1 << clk->enable_bit);
+                        __raw_writel(regval32, clk->enable_reg);
+                } else {
+                        regval32 = omap_readl(clk->enable_reg);
+                        regval32 &= ~(1 << clk->enable_bit);
+                        omap_writel(regval32, clk->enable_reg);
+                }
+        } else {
+                if (clk->flags & VIRTUAL_IO_ADDRESS) {
+                        regval16 = __raw_readw(clk->enable_reg);
+                        regval16 &= ~(1 << clk->enable_bit);
+                        __raw_writew(regval16, clk->enable_reg);
+                } else {
+                        regval16 = omap_readw(clk->enable_reg);
+                        regval16 &= ~(1 << clk->enable_bit);
+                        omap_writew(regval16, clk->enable_reg);
+                }
+        }
+}
+static long omap1_clk_round_rate(struct clk *clk, unsigned long rate)
+{
+        int dsor_exp;
+        if (clk->flags & RATE_FIXED)
+                return clk->rate;
+        if (clk->flags & RATE_CKCTL) {
+                dsor_exp = calc_dsor_exp(clk, rate);
+                if (dsor_exp < 0)
+                        return dsor_exp;
+                if (dsor_exp > 3)
+                        dsor_exp = 3;
+                return clk->parent->rate / (1 << dsor_exp);
+        }
+        if(clk->round_rate != 0)
+                return clk->round_rate(clk, rate);
+        return clk->rate;
+}
+static int omap1_clk_set_rate(struct clk *clk, unsigned long rate)
+{
+        int  ret = -EINVAL;
+        int  dsor_exp;
+        __u16  regval;
+        if (clk->set_rate)
+                ret = clk->set_rate(clk, rate);
+        else if (clk->flags & RATE_CKCTL) {
+                dsor_exp = calc_dsor_exp(clk, rate);
+                if (dsor_exp > 3)
+                        dsor_exp = -EINVAL;
+                if (dsor_exp < 0)
+                        return dsor_exp;
+                regval = omap_readw(ARM_CKCTL);
+                regval &= ~(3 << clk->rate_offset);
+                regval |= dsor_exp << clk->rate_offset;
+                regval = verify_ckctl_value(regval);
+                omap_writew(regval, ARM_CKCTL);
+                clk->rate = clk->parent->rate / (1 << dsor_exp);
+                ret = 0;
+        }
+        if (unlikely(ret == 0 && (clk->flags & RATE_PROPAGATES)))
+                propagate_rate(clk);
+        return ret;
+}
+/*-------------------------------------------------------------------------
+ * Omap1 clock reset and init functions
+ *-------------------------------------------------------------------------*/
+#ifdef CONFIG_OMAP_RESET_CLOCKS
+/*
+ * Resets some clocks that may be left on from bootloader,
+ * but leaves serial clocks on. See also omap_late_clk_reset().
+ */
+static inline void omap1_early_clk_reset(void)
+{
+        //omap_writel(0x3 << 29, MOD_CONF_CTRL_0);
+}
+static int __init omap1_late_clk_reset(void)
+{
+        /* Turn off all unused clocks */
+        struct clk *p;
+        __u32 regval32;
+        /* USB_REQ_EN will be disabled later if necessary (usb_dc_ck) */
+        regval32 = omap_readw(SOFT_REQ_REG) & (1 << 4);
+        omap_writew(regval32, SOFT_REQ_REG);
+        omap_writew(0, SOFT_REQ_REG2);
+        list_for_each_entry(p, &clocks, node) {
+                if (p->usecount > 0 || (p->flags & ALWAYS_ENABLED) ||
+                        p->enable_reg == 0)
+                        continue;
+                /* Clocks in the DSP domain need api_ck. Just assume bootloader
+                 * has not enabled any DSP clocks */
+                if ((u32)p->enable_reg == DSP_IDLECT2) {
+                        printk(KERN_INFO "Skipping reset check for DSP domain "
+                               "clock \"%s\"\n", p->name);
+                        continue;
+                }
+                /* Is the clock already disabled? */
+                if (p->flags & ENABLE_REG_32BIT) {
+                        if (p->flags & VIRTUAL_IO_ADDRESS)
+                                regval32 = __raw_readl(p->enable_reg);
+                        else
+                                regval32 = omap_readl(p->enable_reg);
+                } else {
+                        if (p->flags & VIRTUAL_IO_ADDRESS)
+                                regval32 = __raw_readw(p->enable_reg);
+                        else
+                                regval32 = omap_readw(p->enable_reg);
+                }
+                if ((regval32 & (1 << p->enable_bit)) == 0)
+                        continue;
+                /* FIXME: This clock seems to be necessary but no-one
+                 * has asked for its activation. */
+                if (p == &tc2_ck         // FIX: pm.c (SRAM), CCP, Camera
+                    || p == &ck_dpll1out.clk // FIX: SoSSI, SSR
+                    || p == &arm_gpio_ck // FIX: GPIO code for 1510
+                    ) {
+                        printk(KERN_INFO "FIXME: Clock \"%s\" seems unused\n",
+                               p->name);
+                        continue;
+                }
+                printk(KERN_INFO "Disabling unused clock \"%s\"... ", p->name);
+                p->disable(p);
+                printk(" done\n");
+        }
+        return 0;
+}
+late_initcall(omap1_late_clk_reset);
+#else
+#define omap1_early_clk_reset() {}
+#endif
+static struct clk_functions omap1_clk_functions = {
+        .clk_use                = omap1_clk_use,
+        .clk_unuse              = omap1_clk_unuse,
+        .clk_round_rate         = omap1_clk_round_rate,
+        .clk_set_rate           = omap1_clk_set_rate,
+};
+int __init omap1_clk_init(void)
+{
+        struct clk ** clkp;
+        const struct omap_clock_config *info;
+        int crystal_type = 0; /* Default 12 MHz */
+        omap1_early_clk_reset();
+        clk_init(&omap1_clk_functions);
+        /* By default all idlect1 clocks are allowed to idle */
+        arm_idlect1_mask = ~0;
+        for (clkp = onchip_clks; clkp < onchip_clks+ARRAY_SIZE(onchip_clks); clkp++) {
+                if (((*clkp)->flags &CLOCK_IN_OMAP1510) && cpu_is_omap1510()) {
+                        clk_register(*clkp);
+                        continue;
+                }
+                if (((*clkp)->flags &CLOCK_IN_OMAP16XX) && cpu_is_omap16xx()) {
+                        clk_register(*clkp);
+                        continue;
+                }
+                if (((*clkp)->flags &CLOCK_IN_OMAP730) && cpu_is_omap730()) {
+                        clk_register(*clkp);
+                        continue;
+                }
+        }
+        info = omap_get_config(OMAP_TAG_CLOCK, struct omap_clock_config);
+        if (info != NULL) {
+                if (!cpu_is_omap1510())
+                        crystal_type = info->system_clock_type;
+        }
+#if defined(CONFIG_ARCH_OMAP730)
+        ck_ref.rate = 13000000;
+#elif defined(CONFIG_ARCH_OMAP16XX)
+        if (crystal_type == 2)
+                ck_ref.rate = 19200000;
+#endif
+        printk("Clocks: ARM_SYSST: 0x%04x DPLL_CTL: 0x%04x ARM_CKCTL: 0x%04x\n",
+               omap_readw(ARM_SYSST), omap_readw(DPLL_CTL),
+               omap_readw(ARM_CKCTL));
+        /* We want to be in syncronous scalable mode */
+        omap_writew(0x1000, ARM_SYSST);
+#ifdef CONFIG_OMAP_CLOCKS_SET_BY_BOOTLOADER
+        /* Use values set by bootloader. Determine PLL rate and recalculate
+         * dependent clocks as if kernel had changed PLL or divisors.
+         */
+        {
+                unsigned pll_ctl_val = omap_readw(DPLL_CTL);
+                ck_dpll1.rate = ck_ref.rate; /* Base xtal rate */
+                if (pll_ctl_val & 0x10) {
+                        /* PLL enabled, apply multiplier and divisor */
+                        if (pll_ctl_val & 0xf80)
+                                ck_dpll1.rate *= (pll_ctl_val & 0xf80) >> 7;
+                        ck_dpll1.rate /= ((pll_ctl_val & 0x60) >> 5) + 1;
+                } else {
+                        /* PLL disabled, apply bypass divisor */
+                        switch (pll_ctl_val & 0xc) {
+                        case 0:
+                                break;
+                        case 0x4:
+                                ck_dpll1.rate /= 2;
+                                break;
+                        default:
+                                ck_dpll1.rate /= 4;
+                                break;
+                        }
+                }
+        }
+        propagate_rate(&ck_dpll1);
+#else
+        /* Find the highest supported frequency and enable it */
+        if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) {
+                printk(KERN_ERR "System frequencies not set. Check your config.\n");
+                /* Guess sane values (60MHz) */
+                omap_writew(0x2290, DPLL_CTL);
+                omap_writew(0x1005, ARM_CKCTL);
+                ck_dpll1.rate = 60000000;
+                propagate_rate(&ck_dpll1);
+        }
+#endif
+        /* Cache rates for clocks connected to ck_ref (not dpll1) */
+        propagate_rate(&ck_ref);
+        printk(KERN_INFO "Clocking rate (xtal/DPLL1/MPU): "
+                "%ld.%01ld/%ld.%01ld/%ld.%01ld MHz\n",
+               ck_ref.rate / 1000000, (ck_ref.rate / 100000) % 10,
+               ck_dpll1.rate / 1000000, (ck_dpll1.rate / 100000) % 10,
+               arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10);
+#ifdef CONFIG_MACH_OMAP_PERSEUS2
+        /* Select slicer output as OMAP input clock */
+        omap_writew(omap_readw(OMAP730_PCC_UPLD_CTRL) & ~0x1, OMAP730_PCC_UPLD_CTRL);
+#endif
+        /* Turn off DSP and ARM_TIMXO. Make sure ARM_INTHCK is not divided */
+        omap_writew(omap_readw(ARM_CKCTL) & 0x0fff, ARM_CKCTL);
+        /* Put DSP/MPUI into reset until needed */
+        omap_writew(0, ARM_RSTCT1);
+        omap_writew(1, ARM_RSTCT2);
+        omap_writew(0x400, ARM_IDLECT1);
+        /*
+         * According to OMAP5910 Erratum SYS_DMA_1, bit DMACK_REQ (bit 8)
+         * of the ARM_IDLECT2 register must be set to zero. The power-on
+         * default value of this bit is one.
+         */
+        omap_writew(0x0000, ARM_IDLECT2);       /* Turn LCD clock off also */
+        /*
+         * Only enable those clocks we will need, let the drivers
+         * enable other clocks as necessary
+         */
+        clk_use(&armper_ck.clk);
+        clk_use(&armxor_ck.clk);
+        clk_use(&armtim_ck.clk); /* This should be done by timer code */
+        if (cpu_is_omap1510())
+                clk_enable(&arm_gpio_ck);
+        return 0;
+}
diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h
new file mode 100644
index 000000000000..f3bdfb50e01a
--- /dev/null
+++ b/arch/arm/mach-omap1/clock.h
@@ -0,0 +1,768 @@
+/*
+ *  linux/arch/arm/mach-omap1/clock.h
+ *
+ *  Copyright (C) 2004 - 2005 Nokia corporation
+ *  Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
+ *  Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ARCH_ARM_MACH_OMAP1_CLOCK_H
+#define __ARCH_ARM_MACH_OMAP1_CLOCK_H
+static int omap1_clk_enable(struct clk * clk);
+static void omap1_clk_disable(struct clk * clk);
+static void omap1_ckctl_recalc(struct clk * clk);
+static void omap1_watchdog_recalc(struct clk * clk);
+static void omap1_ckctl_recalc_dsp_domain(struct clk * clk);
+static int omap1_clk_enable_dsp_domain(struct clk * clk);
+static int omap1_clk_set_rate_dsp_domain(struct clk * clk, unsigned long rate);
+static void omap1_clk_disable_dsp_domain(struct clk * clk);
+static int omap1_set_uart_rate(struct clk * clk, unsigned long rate);
+static void omap1_uart_recalc(struct clk * clk);
+static int omap1_clk_enable_uart_functional(struct clk * clk);
+static void omap1_clk_disable_uart_functional(struct clk * clk);
+static int omap1_set_ext_clk_rate(struct clk * clk, unsigned long rate);
+static long omap1_round_ext_clk_rate(struct clk * clk, unsigned long rate);
+static void omap1_init_ext_clk(struct clk * clk);
+static int omap1_select_table_rate(struct clk * clk, unsigned long rate);
+static long omap1_round_to_table_rate(struct clk * clk, unsigned long rate);
+static int omap1_clk_use(struct clk *clk);
+static void omap1_clk_unuse(struct clk *clk);
+struct mpu_rate {
+        unsigned long           rate;
+        unsigned long           xtal;
+        unsigned long           pll_rate;
+        __u16                   ckctl_val;
+        __u16                   dpllctl_val;
+};
+struct uart_clk {
+        struct clk      clk;
+        unsigned long   sysc_addr;
+};
+/* Provide a method for preventing idling some ARM IDLECT clocks */
+struct arm_idlect1_clk {
+        struct clk      clk;
+        unsigned long   no_idle_count;
+        __u8            idlect_shift;
+};
+/* ARM_CKCTL bit shifts */
+#define CKCTL_PERDIV_OFFSET     0
+#define CKCTL_LCDDIV_OFFSET     2
+#define CKCTL_ARMDIV_OFFSET     4
+#define CKCTL_DSPDIV_OFFSET     6
+#define CKCTL_TCDIV_OFFSET      8
+#define CKCTL_DSPMMUDIV_OFFSET  10
+/*#define ARM_TIMXO             12*/
+#define EN_DSPCK                13
+/*#define ARM_INTHCK_SEL        14*/ /* Divide-by-2 for mpu inth_ck */
+/* DSP_CKCTL bit shifts */
+#define CKCTL_DSPPERDIV_OFFSET  0
+/* ARM_IDLECT2 bit shifts */
+#define EN_WDTCK        0
+#define EN_XORPCK       1
+#define EN_PERCK        2
+#define EN_LCDCK        3
+#define EN_LBCK         4 /* Not on 1610/1710 */
+/*#define EN_HSABCK     5*/
+#define EN_APICK        6
+#define EN_TIMCK        7
+#define DMACK_REQ       8
+#define EN_GPIOCK       9 /* Not on 1610/1710 */
+/*#define EN_LBFREECK   10*/
+#define EN_CKOUT_ARM    11
+/* ARM_IDLECT3 bit shifts */
+#define EN_OCPI_CK      0
+#define EN_TC1_CK       2
+#define EN_TC2_CK       4
+/* DSP_IDLECT2 bit shifts (0,1,2 are same as for ARM_IDLECT2) */
+#define EN_DSPTIMCK     5
+/* Various register defines for clock controls scattered around OMAP chip */
+#define USB_MCLK_EN_BIT         4       /* In ULPD_CLKC_CTRL */
+#define USB_HOST_HHC_UHOST_EN   9       /* In MOD_CONF_CTRL_0 */
+#define SWD_ULPD_PLL_CLK_REQ    1       /* In SWD_CLK_DIV_CTRL_SEL */
+#define COM_ULPD_PLL_CLK_REQ    1       /* In COM_CLK_DIV_CTRL_SEL */
+#define SWD_CLK_DIV_CTRL_SEL    0xfffe0874
+#define COM_CLK_DIV_CTRL_SEL    0xfffe0878
+#define SOFT_REQ_REG            0xfffe0834
+#define SOFT_REQ_REG2           0xfffe0880
+/*-------------------------------------------------------------------------
+ * Omap1 MPU rate table
+ *-------------------------------------------------------------------------*/
+static struct mpu_rate rate_table[] = {
+        /* MPU MHz, xtal MHz, dpll1 MHz, CKCTL, DPLL_CTL
+         * NOTE: Comment order here is different from bits in CKCTL value:
+         * armdiv, dspdiv, dspmmu, tcdiv, perdiv, lcddiv
+         */
+#if defined(CONFIG_OMAP_ARM_216MHZ)
+        { 216000000, 12000000, 216000000, 0x050d, 0x2910 }, /* 1/1/2/2/2/8 */
+#endif
+#if defined(CONFIG_OMAP_ARM_195MHZ)
+        { 195000000, 13000000, 195000000, 0x050e, 0x2790 }, /* 1/1/2/2/4/8 */
+#endif
+#if defined(CONFIG_OMAP_ARM_192MHZ)
+        { 192000000, 19200000, 192000000, 0x050f, 0x2510 }, /* 1/1/2/2/8/8 */
+        { 192000000, 12000000, 192000000, 0x050f, 0x2810 }, /* 1/1/2/2/8/8 */
+        {  96000000, 12000000, 192000000, 0x055f, 0x2810 }, /* 2/2/2/2/8/8 */
+        {  48000000, 12000000, 192000000, 0x0baf, 0x2810 }, /* 4/4/4/8/8/8 */
+        {  24000000, 12000000, 192000000, 0x0fff, 0x2810 }, /* 8/8/8/8/8/8 */
+#endif
+#if defined(CONFIG_OMAP_ARM_182MHZ)
+        { 182000000, 13000000, 182000000, 0x050e, 0x2710 }, /* 1/1/2/2/4/8 */
+#endif
+#if defined(CONFIG_OMAP_ARM_168MHZ)
+        { 168000000, 12000000, 168000000, 0x010f, 0x2710 }, /* 1/1/1/2/8/8 */
+#endif
+#if defined(CONFIG_OMAP_ARM_150MHZ)
+        { 150000000, 12000000, 150000000, 0x010a, 0x2cb0 }, /* 1/1/1/2/4/4 */
+#endif
+#if defined(CONFIG_OMAP_ARM_120MHZ)
+        { 120000000, 12000000, 120000000, 0x010a, 0x2510 }, /* 1/1/1/2/4/4 */
+#endif
+#if defined(CONFIG_OMAP_ARM_96MHZ)
+        {  96000000, 12000000,  96000000, 0x0005, 0x2410 }, /* 1/1/1/1/2/2 */
+#endif
+#if defined(CONFIG_OMAP_ARM_60MHZ)
+        {  60000000, 12000000,  60000000, 0x0005, 0x2290 }, /* 1/1/1/1/2/2 */
+#endif
+#if defined(CONFIG_OMAP_ARM_30MHZ)
+        {  30000000, 12000000,  60000000, 0x0555, 0x2290 }, /* 2/2/2/2/2/2 */
+#endif
+        { 0, 0, 0, 0, 0 },
+};
+/*-------------------------------------------------------------------------
+ * Omap1 clocks
+ *-------------------------------------------------------------------------*/
+static struct clk ck_ref = {
+        .name           = "ck_ref",
+        .rate           = 12000000,
+        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                          ALWAYS_ENABLED,
+        .enable         = &omap1_clk_enable,
+        .disable        = &omap1_clk_disable,
+};
+static struct clk ck_dpll1 = {
+        .name           = "ck_dpll1",
+        .parent         = &ck_ref,
+        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                          RATE_PROPAGATES | ALWAYS_ENABLED,
+        .enable         = &omap1_clk_enable,
+        .disable        = &omap1_clk_disable,
+};
+static struct arm_idlect1_clk ck_dpll1out = {
+        .clk = {
+                .name           = "ck_dpll1out",
+                .parent         = &ck_dpll1,
+                .flags          = CLOCK_IN_OMAP16XX | CLOCK_IDLE_CONTROL,
+                .enable_reg     = (void __iomem *)ARM_IDLECT2,
+                .enable_bit     = EN_CKOUT_ARM,
+                .recalc         = &followparent_recalc,
+                .enable         = &omap1_clk_enable,
+                .disable        = &omap1_clk_disable,
+        },
+        .idlect_shift   = 12,
+};
+static struct clk arm_ck = {
+        .name           = "arm_ck",
+        .parent         = &ck_dpll1,
+        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                          RATE_CKCTL | RATE_PROPAGATES | ALWAYS_ENABLED,
+        .rate_offset    = CKCTL_ARMDIV_OFFSET,
+        .recalc         = &omap1_ckctl_recalc,
+        .enable         = &omap1_clk_enable,
+        .disable        = &omap1_clk_disable,
+};
+static struct arm_idlect1_clk armper_ck = {
+        .clk = {
+                .name           = "armper_ck",
+                .parent         = &ck_dpll1,
+                .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                                  RATE_CKCTL | CLOCK_IDLE_CONTROL,
+                .enable_reg     = (void __iomem *)ARM_IDLECT2,
+                .enable_bit     = EN_PERCK,
+                .rate_offset    = CKCTL_PERDIV_OFFSET,
+                .recalc         = &omap1_ckctl_recalc,
+                .enable         = &omap1_clk_enable,
+                .disable        = &omap1_clk_disable,
+        },
+        .idlect_shift   = 2,
+};
+static struct clk arm_gpio_ck = {
+        .name           = "arm_gpio_ck",
+        .parent         = &ck_dpll1,
+        .flags          = CLOCK_IN_OMAP1510,
+        .enable_reg     = (void __iomem *)ARM_IDLECT2,
+        .enable_bit     = EN_GPIOCK,
+        .recalc         = &followparent_recalc,
+        .enable         = &omap1_clk_enable,
+        .disable        = &omap1_clk_disable,
+};
+static struct arm_idlect1_clk armxor_ck = {
+        .clk = {
+                .name           = "armxor_ck",
+                .parent         = &ck_ref,
+                .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                                  CLOCK_IDLE_CONTROL,
+                .enable_reg     = (void __iomem *)ARM_IDLECT2,
+                .enable_bit     = EN_XORPCK,
+                .recalc         = &followparent_recalc,
+                .enable         = &omap1_clk_enable,
+                .disable        = &omap1_clk_disable,
+        },
+        .idlect_shift   = 1,
+};
+static struct arm_idlect1_clk armtim_ck = {
+        .clk = {
+                .name           = "armtim_ck",
+                .parent         = &ck_ref,
+                .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                                  CLOCK_IDLE_CONTROL,
+                .enable_reg     = (void __iomem *)ARM_IDLECT2,
+                .enable_bit     = EN_TIMCK,
+                .recalc         = &followparent_recalc,
+                .enable         = &omap1_clk_enable,
+                .disable        = &omap1_clk_disable,
+        },
+        .idlect_shift   = 9,
+};
+static struct arm_idlect1_clk armwdt_ck = {
+        .clk = {
+                .name           = "armwdt_ck",
+                .parent         = &ck_ref,
+                .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                                  CLOCK_IDLE_CONTROL,
+                .enable_reg     = (void __iomem *)ARM_IDLECT2,
+                .enable_bit     = EN_WDTCK,
+                .recalc         = &omap1_watchdog_recalc,
+                .enable         = &omap1_clk_enable,
+                .disable        = &omap1_clk_disable,
+        },
+        .idlect_shift   = 0,
+};
+static struct clk arminth_ck16xx = {
+        .name           = "arminth_ck",
+        .parent         = &arm_ck,
+        .flags          = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
+        .recalc         = &followparent_recalc,
+        /* Note: On 16xx the frequency can be divided by 2 by programming
+         * ARM_CKCTL:ARM_INTHCK_SEL(14) to 1
+         *
+         * 1510 version is in TC clocks.
+         */
+        .enable         = &omap1_clk_enable,
+        .disable        = &omap1_clk_disable,
+};
+static struct clk dsp_ck = {
+        .name           = "dsp_ck",
+        .parent         = &ck_dpll1,
+        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                          RATE_CKCTL,
+        .enable_reg     = (void __iomem *)ARM_CKCTL,
+        .enable_bit     = EN_DSPCK,
+        .rate_offset    = CKCTL_DSPDIV_OFFSET,
+        .recalc         = &omap1_ckctl_recalc,
+        .enable         = &omap1_clk_enable,
+        .disable        = &omap1_clk_disable,
+};
+static struct clk dspmmu_ck = {
+        .name           = "dspmmu_ck",
+        .parent         = &ck_dpll1,
+        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                          RATE_CKCTL | ALWAYS_ENABLED,
+        .rate_offset    = CKCTL_DSPMMUDIV_OFFSET,
+        .recalc         = &omap1_ckctl_recalc,
+        .enable         = &omap1_clk_enable,
+        .disable        = &omap1_clk_disable,
+};
+static struct clk dspper_ck = {
+        .name           = "dspper_ck",
+        .parent         = &ck_dpll1,
+        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                          RATE_CKCTL | VIRTUAL_IO_ADDRESS,
+        .enable_reg     = (void __iomem *)DSP_IDLECT2,
+        .enable_bit     = EN_PERCK,
+        .rate_offset    = CKCTL_PERDIV_OFFSET,
+        .recalc         = &omap1_ckctl_recalc_dsp_domain,
+        .set_rate       = &omap1_clk_set_rate_dsp_domain,
+        .enable         = &omap1_clk_enable_dsp_domain,
+        .disable        = &omap1_clk_disable_dsp_domain,
+};
+static struct clk dspxor_ck = {
+        .name           = "dspxor_ck",
+        .parent         = &ck_ref,
+        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                          VIRTUAL_IO_ADDRESS,
+        .enable_reg     = (void __iomem *)DSP_IDLECT2,
+        .enable_bit     = EN_XORPCK,
+        .recalc         = &followparent_recalc,
+        .enable         = &omap1_clk_enable_dsp_domain,
+        .disable        = &omap1_clk_disable_dsp_domain,
+};
+static struct clk dsptim_ck = {
+        .name           = "dsptim_ck",
+        .parent         = &ck_ref,
+        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                          VIRTUAL_IO_ADDRESS,
+        .enable_reg     = (void __iomem *)DSP_IDLECT2,
+        .enable_bit     = EN_DSPTIMCK,
+        .recalc         = &followparent_recalc,
+        .enable         = &omap1_clk_enable_dsp_domain,
+        .disable        = &omap1_clk_disable_dsp_domain,
+};
+/* Tie ARM_IDLECT1:IDLIF_ARM to this logical clock structure */
+static struct arm_idlect1_clk tc_ck = {
+        .clk = {
+                .name           = "tc_ck",
+                .parent         = &ck_dpll1,
+                .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                                  CLOCK_IN_OMAP730 | RATE_CKCTL |
+                                  RATE_PROPAGATES | ALWAYS_ENABLED |
+                                  CLOCK_IDLE_CONTROL,
+                .rate_offset    = CKCTL_TCDIV_OFFSET,
+                .recalc         = &omap1_ckctl_recalc,
+                .enable         = &omap1_clk_enable,
+                .disable        = &omap1_clk_disable,
+        },
+        .idlect_shift   = 6,
+};
+static struct clk arminth_ck1510 = {
+        .name           = "arminth_ck",
+        .parent         = &tc_ck.clk,
+        .flags          = CLOCK_IN_OMAP1510 | ALWAYS_ENABLED,
+        .recalc         = &followparent_recalc,
+        /* Note: On 1510 the frequency follows TC_CK
+         *
+         * 16xx version is in MPU clocks.
+         */
+        .enable         = &omap1_clk_enable,
+        .disable        = &omap1_clk_disable,
+};
+static struct clk tipb_ck = {
+        /* No-idle controlled by "tc_ck" */
+        .name           = "tibp_ck",
+        .parent         = &tc_ck.clk,
+        .flags          = CLOCK_IN_OMAP1510 | ALWAYS_ENABLED,
+        .recalc         = &followparent_recalc,
+        .enable         = &omap1_clk_enable,
+        .disable        = &omap1_clk_disable,
+};
+static struct clk l3_ocpi_ck = {
+        /* No-idle controlled by "tc_ck" */
+        .name           = "l3_ocpi_ck",
+        .parent         = &tc_ck.clk,
+        .flags          = CLOCK_IN_OMAP16XX,
+        .enable_reg     = (void __iomem *)ARM_IDLECT3,
+        .enable_bit     = EN_OCPI_CK,
+        .recalc         = &followparent_recalc,
+        .enable         = &omap1_clk_enable,
+        .disable        = &omap1_clk_disable,
+};
+static struct clk tc1_ck = {
+        .name           = "tc1_ck",
+        .parent         = &tc_ck.clk,
+        .flags          = CLOCK_IN_OMAP16XX,
+        .enable_reg     = (void __iomem *)ARM_IDLECT3,
+        .enable_bit     = EN_TC1_CK,
+        .recalc         = &followparent_recalc,
+        .enable         = &omap1_clk_enable,
+        .disable        = &omap1_clk_disable,
+};
+static struct clk tc2_ck = {
+        .name           = "tc2_ck",
+        .parent         = &tc_ck.clk,
+        .flags          = CLOCK_IN_OMAP16XX,
+        .enable_reg     = (void __iomem *)ARM_IDLECT3,
+        .enable_bit     = EN_TC2_CK,
+        .recalc         = &followparent_recalc,
+        .enable         = &omap1_clk_enable,
+        .disable        = &omap1_clk_disable,
+};
+static struct clk dma_ck = {
+        /* No-idle controlled by "tc_ck" */
+        .name           = "dma_ck",
+        .parent         = &tc_ck.clk,
+        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                          ALWAYS_ENABLED,
+        .recalc         = &followparent_recalc,
+        .enable         = &omap1_clk_enable,
+        .disable        = &omap1_clk_disable,
+};
+static struct clk dma_lcdfree_ck = {
+        .name           = "dma_lcdfree_ck",
+        .parent         = &tc_ck.clk,
+        .flags          = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
+        .recalc         = &followparent_recalc,
+        .enable         = &omap1_clk_enable,
+        .disable        = &omap1_clk_disable,
+};
+static struct arm_idlect1_clk api_ck = {
+        .clk = {
+                .name           = "api_ck",
+                .parent         = &tc_ck.clk,
+                .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                                  CLOCK_IDLE_CONTROL,
+                .enable_reg     = (void __iomem *)ARM_IDLECT2,
+                .enable_bit     = EN_APICK,
+                .recalc         = &followparent_recalc,
+                .enable         = &omap1_clk_enable,
+                .disable        = &omap1_clk_disable,
+        },
+        .idlect_shift   = 8,
+};
+static struct arm_idlect1_clk lb_ck = {
+        .clk = {
+                .name           = "lb_ck",
+                .parent         = &tc_ck.clk,
+                .flags          = CLOCK_IN_OMAP1510 | CLOCK_IDLE_CONTROL,
+                .enable_reg     = (void __iomem *)ARM_IDLECT2,
+                .enable_bit     = EN_LBCK,
+                .recalc         = &followparent_recalc,
+                .enable         = &omap1_clk_enable,
+                .disable        = &omap1_clk_disable,
+        },
+        .idlect_shift   = 4,
+};
+static struct clk rhea1_ck = {
+        .name           = "rhea1_ck",
+        .parent         = &tc_ck.clk,
+        .flags          = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
+        .recalc         = &followparent_recalc,
+        .enable         = &omap1_clk_enable,
+        .disable        = &omap1_clk_disable,
+};
+static struct clk rhea2_ck = {
+        .name           = "rhea2_ck",
+        .parent         = &tc_ck.clk,
+        .flags          = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
+        .recalc         = &followparent_recalc,
+        .enable         = &omap1_clk_enable,
+        .disable        = &omap1_clk_disable,
+};
+static struct clk lcd_ck_16xx = {
+        .name           = "lcd_ck",
+        .parent         = &ck_dpll1,
+        .flags          = CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP730 | RATE_CKCTL,
+        .enable_reg     = (void __iomem *)ARM_IDLECT2,
+        .enable_bit     = EN_LCDCK,
+        .rate_offset    = CKCTL_LCDDIV_OFFSET,
+        .recalc         = &omap1_ckctl_recalc,
+        .enable         = &omap1_clk_enable,
+        .disable        = &omap1_clk_disable,
+};
+static struct arm_idlect1_clk lcd_ck_1510 = {
+        .clk = {
+                .name           = "lcd_ck",
+                .parent         = &ck_dpll1,
+                .flags          = CLOCK_IN_OMAP1510 | RATE_CKCTL |
+                                  CLOCK_IDLE_CONTROL,
+                .enable_reg     = (void __iomem *)ARM_IDLECT2,
+                .enable_bit     = EN_LCDCK,
+                .rate_offset    = CKCTL_LCDDIV_OFFSET,
+                .recalc         = &omap1_ckctl_recalc,
+                .enable         = &omap1_clk_enable,
+                .disable        = &omap1_clk_disable,
+        },
+        .idlect_shift   = 3,
+};
+static struct clk uart1_1510 = {
+        .name           = "uart1_ck",
+        /* Direct from ULPD, no real parent */
+        .parent         = &armper_ck.clk,
+        .rate           = 12000000,
+        .flags          = CLOCK_IN_OMAP1510 | ENABLE_REG_32BIT |
+                          ALWAYS_ENABLED | CLOCK_NO_IDLE_PARENT,
+        .enable_reg     = (void __iomem *)MOD_CONF_CTRL_0,
+        .enable_bit     = 29,   /* Chooses between 12MHz and 48MHz */
+        .set_rate       = &omap1_set_uart_rate,
+        .recalc         = &omap1_uart_recalc,
+        .enable         = &omap1_clk_enable,
+        .disable        = &omap1_clk_disable,
+};
+static struct uart_clk uart1_16xx = {
+        .clk    = {
+                .name           = "uart1_ck",
+                /* Direct from ULPD, no real parent */
+                .parent         = &armper_ck.clk,
+                .rate           = 48000000,
+                .flags          = CLOCK_IN_OMAP16XX | RATE_FIXED |
+                                  ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
+                .enable_reg     = (void __iomem *)MOD_CONF_CTRL_0,
+                .enable_bit     = 29,
+                .enable         = &omap1_clk_enable_uart_functional,
+                .disable        = &omap1_clk_disable_uart_functional,
+        },
+        .sysc_addr      = 0xfffb0054,
+};
+static struct clk uart2_ck = {
+        .name           = "uart2_ck",
+        /* Direct from ULPD, no real parent */
+        .parent         = &armper_ck.clk,
+        .rate           = 12000000,
+        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                          ENABLE_REG_32BIT | ALWAYS_ENABLED |
+                          CLOCK_NO_IDLE_PARENT,
+        .enable_reg     = (void __iomem *)MOD_CONF_CTRL_0,
+        .enable_bit     = 30,   /* Chooses between 12MHz and 48MHz */
+        .set_rate       = &omap1_set_uart_rate,
+        .recalc         = &omap1_uart_recalc,
+        .enable         = &omap1_clk_enable,
+        .disable        = &omap1_clk_disable,
+};
+static struct clk uart3_1510 = {
+        .name           = "uart3_ck",
+        /* Direct from ULPD, no real parent */
+        .parent         = &armper_ck.clk,
+        .rate           = 12000000,
+        .flags          = CLOCK_IN_OMAP1510 | ENABLE_REG_32BIT |
+                          ALWAYS_ENABLED | CLOCK_NO_IDLE_PARENT,
+        .enable_reg     = (void __iomem *)MOD_CONF_CTRL_0,
+        .enable_bit     = 31,   /* Chooses between 12MHz and 48MHz */
+        .set_rate       = &omap1_set_uart_rate,
+        .recalc         = &omap1_uart_recalc,
+        .enable         = &omap1_clk_enable,
+        .disable        = &omap1_clk_disable,
+};
+static struct uart_clk uart3_16xx = {
+        .clk    = {
+                .name           = "uart3_ck",
+                /* Direct from ULPD, no real parent */
+                .parent         = &armper_ck.clk,
+                .rate           = 48000000,
+                .flags          = CLOCK_IN_OMAP16XX | RATE_FIXED |
+                                  ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
+                .enable_reg     = (void __iomem *)MOD_CONF_CTRL_0,
+                .enable_bit     = 31,
+                .enable         = &omap1_clk_enable_uart_functional,
+                .disable        = &omap1_clk_disable_uart_functional,
+        },
+        .sysc_addr      = 0xfffb9854,
+};
+static struct clk usb_clko = {  /* 6 MHz output on W4_USB_CLKO */
+        .name           = "usb_clko",
+        /* Direct from ULPD, no parent */
+        .rate           = 6000000,
+        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                          RATE_FIXED | ENABLE_REG_32BIT,
+        .enable_reg     = (void __iomem *)ULPD_CLOCK_CTRL,
+        .enable_bit     = USB_MCLK_EN_BIT,
+        .enable         = &omap1_clk_enable,
+        .disable        = &omap1_clk_disable,
+};
+static struct clk usb_hhc_ck1510 = {
+        .name           = "usb_hhc_ck",
+        /* Direct from ULPD, no parent */
+        .rate           = 48000000, /* Actually 2 clocks, 12MHz and 48MHz */
+        .flags          = CLOCK_IN_OMAP1510 |
+                          RATE_FIXED | ENABLE_REG_32BIT,
+        .enable_reg     = (void __iomem *)MOD_CONF_CTRL_0,
+        .enable_bit     = USB_HOST_HHC_UHOST_EN,
+        .enable         = &omap1_clk_enable,
+        .disable        = &omap1_clk_disable,
+};
+static struct clk usb_hhc_ck16xx = {
+        .name           = "usb_hhc_ck",
+        /* Direct from ULPD, no parent */
+        .rate           = 48000000,
+        /* OTG_SYSCON_2.OTG_PADEN == 0 (not 1510-compatible) */
+        .flags          = CLOCK_IN_OMAP16XX |
+                          RATE_FIXED | ENABLE_REG_32BIT,
+        .enable_reg     = (void __iomem *)OTG_BASE + 0x08 /* OTG_SYSCON_2 */,
+        .enable_bit     = 8 /* UHOST_EN */,
+        .enable         = &omap1_clk_enable,
+        .disable        = &omap1_clk_disable,
+};
+static struct clk usb_dc_ck = {
+        .name           = "usb_dc_ck",
+        /* Direct from ULPD, no parent */
+        .rate           = 48000000,
+        .flags          = CLOCK_IN_OMAP16XX | RATE_FIXED,
+        .enable_reg     = (void __iomem *)SOFT_REQ_REG,
+        .enable_bit     = 4,
+        .enable         = &omap1_clk_enable,
+        .disable        = &omap1_clk_disable,
+};
+static struct clk mclk_1510 = {
+        .name           = "mclk",
+        /* Direct from ULPD, no parent. May be enabled by ext hardware. */
+        .rate           = 12000000,
+        .flags          = CLOCK_IN_OMAP1510 | RATE_FIXED,
+        .enable         = &omap1_clk_enable,
+        .disable        = &omap1_clk_disable,
+};
+static struct clk mclk_16xx = {
+        .name           = "mclk",
+        /* Direct from ULPD, no parent. May be enabled by ext hardware. */
+        .flags          = CLOCK_IN_OMAP16XX,
+        .enable_reg     = (void __iomem *)COM_CLK_DIV_CTRL_SEL,
+        .enable_bit     = COM_ULPD_PLL_CLK_REQ,
+        .set_rate       = &omap1_set_ext_clk_rate,
+        .round_rate     = &omap1_round_ext_clk_rate,
+        .init           = &omap1_init_ext_clk,
+        .enable         = &omap1_clk_enable,
+        .disable        = &omap1_clk_disable,
+};
+static struct clk bclk_1510 = {
+        .name           = "bclk",
+        /* Direct from ULPD, no parent. May be enabled by ext hardware. */
+        .rate           = 12000000,
+        .flags          = CLOCK_IN_OMAP1510 | RATE_FIXED,
+        .enable         = &omap1_clk_enable,
+        .disable        = &omap1_clk_disable,
+};
+static struct clk bclk_16xx = {
+        .name           = "bclk",
+        /* Direct from ULPD, no parent. May be enabled by ext hardware. */
+        .flags          = CLOCK_IN_OMAP16XX,
+        .enable_reg     = (void __iomem *)SWD_CLK_DIV_CTRL_SEL,
+        .enable_bit     = SWD_ULPD_PLL_CLK_REQ,
+        .set_rate       = &omap1_set_ext_clk_rate,
+        .round_rate     = &omap1_round_ext_clk_rate,
+        .init           = &omap1_init_ext_clk,
+        .enable         = &omap1_clk_enable,
+        .disable        = &omap1_clk_disable,
+};
+static struct clk mmc1_ck = {
+        .name           = "mmc1_ck",
+        /* Functional clock is direct from ULPD, interface clock is ARMPER */
+        .parent         = &armper_ck.clk,
+        .rate           = 48000000,
+        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                          RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
+        .enable_reg     = (void __iomem *)MOD_CONF_CTRL_0,
+        .enable_bit     = 23,
+        .enable         = &omap1_clk_enable,
+        .disable        = &omap1_clk_disable,
+};
+static struct clk mmc2_ck = {
+        .name           = "mmc2_ck",
+        /* Functional clock is direct from ULPD, interface clock is ARMPER */
+        .parent         = &armper_ck.clk,
+        .rate           = 48000000,
+        .flags          = CLOCK_IN_OMAP16XX |
+                          RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
+        .enable_reg     = (void __iomem *)MOD_CONF_CTRL_0,
+        .enable_bit     = 20,
+        .enable         = &omap1_clk_enable,
+        .disable        = &omap1_clk_disable,
+};
+static struct clk virtual_ck_mpu = {
+        .name           = "mpu",
+        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                          VIRTUAL_CLOCK | ALWAYS_ENABLED,
+        .parent         = &arm_ck, /* Is smarter alias for */
+        .recalc         = &followparent_recalc,
+        .set_rate       = &omap1_select_table_rate,
+        .round_rate     = &omap1_round_to_table_rate,
+        .enable         = &omap1_clk_enable,
+        .disable        = &omap1_clk_disable,
+};
+static struct clk * onchip_clks[] = {
+        /* non-ULPD clocks */
+        &ck_ref,
+        &ck_dpll1,
+        /* CK_GEN1 clocks */
+        &ck_dpll1out.clk,
+        &arm_ck,
+        &armper_ck.clk,
+        &arm_gpio_ck,
+        &armxor_ck.clk,
+        &armtim_ck.clk,
+        &armwdt_ck.clk,
+        &arminth_ck1510,  &arminth_ck16xx,
+        /* CK_GEN2 clocks */
+        &dsp_ck,
+        &dspmmu_ck,
+        &dspper_ck,
+        &dspxor_ck,
+        &dsptim_ck,
+        /* CK_GEN3 clocks */
+        &tc_ck.clk,
+        &tipb_ck,
+        &l3_ocpi_ck,
+        &tc1_ck,
+        &tc2_ck,
+        &dma_ck,
+        &dma_lcdfree_ck,
+        &api_ck.clk,
+        &lb_ck.clk,
+        &rhea1_ck,
+        &rhea2_ck,
+        &lcd_ck_16xx,
+        &lcd_ck_1510.clk,
+        /* ULPD clocks */
+        &uart1_1510,
+        &uart1_16xx.clk,
+        &uart2_ck,
+        &uart3_1510,
+        &uart3_16xx.clk,
+        &usb_clko,
+        &usb_hhc_ck1510, &usb_hhc_ck16xx,
+        &usb_dc_ck,
+        &mclk_1510,  &mclk_16xx,
+        &bclk_1510,  &bclk_16xx,
+        &mmc1_ck,
+        &mmc2_ck,
+        /* Virtual clocks */
+        &virtual_ck_mpu,
+};
+#endif
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index 3c5d901efeaa..ecbc47514adc 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -25,56 +25,7 @@
 #include <asm/arch/mux.h>
 #include <asm/arch/gpio.h>
+extern void omap_nop_release(struct device *dev);
-static void omap_nop_release(struct device *dev)
-{
-        /* Nothing */
-}
-/*-------------------------------------------------------------------------*/
-#if     defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE)
-#define OMAP_I2C_BASE           0xfffb3800
-static struct resource i2c_resources[] = {
-        {
-                .start          = OMAP_I2C_BASE,
-                .end            = OMAP_I2C_BASE + 0x3f,
-                .flags          = IORESOURCE_MEM,
-        },
-        {
-                .start          = INT_I2C,
-                .flags          = IORESOURCE_IRQ,
-        },
-};
-/* DMA not used; works around erratum writing to non-empty i2c fifo */
-static struct platform_device omap_i2c_device = {
-        .name           = "i2c_omap",
-        .id             = -1,
-        .dev = {
-                .release        = omap_nop_release,
-        },
-        .num_resources  = ARRAY_SIZE(i2c_resources),
-        .resource       = i2c_resources,
-};
-static void omap_init_i2c(void)
-{
-        /* FIXME define and use a boot tag, in case of boards that
-         * either don't wire up I2C, or chips that mux it differently...
-         * it can include clocking and address info, maybe more.
-         */
-        omap_cfg_reg(I2C_SCL);
-        omap_cfg_reg(I2C_SDA);
-        (void) platform_device_register(&omap_i2c_device);
-}
-#else
-static inline void omap_init_i2c(void) {}
-#endif
 /*-------------------------------------------------------------------------*/
@@ -110,137 +61,6 @@ static inline void omap_init_irda(void) {}
 /*-------------------------------------------------------------------------*/
-#if     defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
-#define OMAP_MMC1_BASE          0xfffb7800
-#define OMAP_MMC2_BASE          0xfffb7c00      /* omap16xx only */
-static struct omap_mmc_conf mmc1_conf;
-static u64 mmc1_dmamask = 0xffffffff;
-static struct resource mmc1_resources[] = {
-        {
-                .start          = IO_ADDRESS(OMAP_MMC1_BASE),
-                .end            = IO_ADDRESS(OMAP_MMC1_BASE) + 0x7f,
-                .flags          = IORESOURCE_MEM,
-        },
-        {
-                .start          = INT_MMC,
-                .flags          = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device mmc_omap_device1 = {
-        .name           = "mmci-omap",
-        .id             = 1,
-        .dev = {
-                .release        = omap_nop_release,
-                .dma_mask       = &mmc1_dmamask,
-                .platform_data  = &mmc1_conf,
-        },
-        .num_resources  = ARRAY_SIZE(mmc1_resources),
-        .resource       = mmc1_resources,
-};
-#ifdef  CONFIG_ARCH_OMAP16XX
-static struct omap_mmc_conf mmc2_conf;
-static u64 mmc2_dmamask = 0xffffffff;
-static struct resource mmc2_resources[] = {
-        {
-                .start          = IO_ADDRESS(OMAP_MMC2_BASE),
-                .end            = IO_ADDRESS(OMAP_MMC2_BASE) + 0x7f,
-                .flags          = IORESOURCE_MEM,
-        },
-        {
-                .start          = INT_1610_MMC2,
-                .flags          = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device mmc_omap_device2 = {
-        .name           = "mmci-omap",
-        .id             = 2,
-        .dev = {
-                .release        = omap_nop_release,
-                .dma_mask       = &mmc2_dmamask,
-                .platform_data  = &mmc2_conf,
-        },
-        .num_resources  = ARRAY_SIZE(mmc2_resources),
-        .resource       = mmc2_resources,
-};
-#endif
-static void __init omap_init_mmc(void)
-{
-        const struct omap_mmc_config    *mmc_conf;
-        const struct omap_mmc_conf      *mmc;
-        /* NOTE:  assumes MMC was never (wrongly) enabled */
-        mmc_conf = omap_get_config(OMAP_TAG_MMC, struct omap_mmc_config);
-        if (!mmc_conf)
-                return;
-        /* block 1 is always available and has just one pinout option */
-        mmc = &mmc_conf->mmc[0];
-        if (mmc->enabled) {
-                omap_cfg_reg(MMC_CMD);
-                omap_cfg_reg(MMC_CLK);
-                omap_cfg_reg(MMC_DAT0);
-                if (cpu_is_omap1710()) {
-                      omap_cfg_reg(M15_1710_MMC_CLKI);
-                      omap_cfg_reg(P19_1710_MMC_CMDDIR);
-                      omap_cfg_reg(P20_1710_MMC_DATDIR0);
-                }
-                if (mmc->wire4) {
-                        omap_cfg_reg(MMC_DAT1);
-                        /* NOTE:  DAT2 can be on W10 (here) or M15 */
-                        if (!mmc->nomux)
-                                omap_cfg_reg(MMC_DAT2);
-                        omap_cfg_reg(MMC_DAT3);
-                }
-                mmc1_conf = *mmc;
-                (void) platform_device_register(&mmc_omap_device1);
-        }
-#ifdef  CONFIG_ARCH_OMAP16XX
-        /* block 2 is on newer chips, and has many pinout options */
-        mmc = &mmc_conf->mmc[1];
-        if (mmc->enabled) {
-                if (!mmc->nomux) {
-                        omap_cfg_reg(Y8_1610_MMC2_CMD);
-                        omap_cfg_reg(Y10_1610_MMC2_CLK);
-                        omap_cfg_reg(R18_1610_MMC2_CLKIN);
-                        omap_cfg_reg(W8_1610_MMC2_DAT0);
-                        if (mmc->wire4) {
-                                omap_cfg_reg(V8_1610_MMC2_DAT1);
-                                omap_cfg_reg(W15_1610_MMC2_DAT2);
-                                omap_cfg_reg(R10_1610_MMC2_DAT3);
-                        }
-                        /* These are needed for the level shifter */
-                        omap_cfg_reg(V9_1610_MMC2_CMDDIR);
-                        omap_cfg_reg(V5_1610_MMC2_DATDIR0);
-                        omap_cfg_reg(W19_1610_MMC2_DATDIR1);
-                }
-                /* Feedback clock must be set on OMAP-1710 MMC2 */
-                if (cpu_is_omap1710())
-                        omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24),
-                                     MOD_CONF_CTRL_1);
-                mmc2_conf = *mmc;
-                (void) platform_device_register(&mmc_omap_device2);
-        }
-#endif
-        return;
-}
-#else
-static inline void omap_init_mmc(void) {}
-#endif
 #if     defined(CONFIG_OMAP_RTC) || defined(CONFIG_OMAP_RTC)
 #define OMAP_RTC_BASE           0xfffb4800
@@ -279,38 +99,6 @@ static void omap_init_rtc(void)
 static inline void omap_init_rtc(void) {}
 #endif
-/*-------------------------------------------------------------------------*/
-#if     defined(CONFIG_OMAP16XX_WATCHDOG) || defined(CONFIG_OMAP16XX_WATCHDOG_MODULE)
-#define OMAP_WDT_BASE           0xfffeb000
-static struct resource wdt_resources[] = {
-        {
-                .start          = OMAP_WDT_BASE,
-                .end            = OMAP_WDT_BASE + 0x4f,
-                .flags          = IORESOURCE_MEM,
-        },
-};
-static struct platform_device omap_wdt_device = {
-        .name      = "omap1610_wdt",
-        .id          = -1,
-        .dev = {
-                .release        = omap_nop_release,
-        },
-        .num_resources  = ARRAY_SIZE(wdt_resources),
-        .resource       = wdt_resources,
-};
-static void omap_init_wdt(void)
-{
-        (void) platform_device_register(&omap_wdt_device);
-}
-#else
-static inline void omap_init_wdt(void) {}
-#endif
 /*-------------------------------------------------------------------------*/
@@ -334,18 +122,15 @@ static inline void omap_init_wdt(void) {}
 * may be handled by the boot loader, and drivers should expect it will
 * normally have been done by the time they're probed.
 */
-static int __init omap_init_devices(void)
+static int __init omap1_init_devices(void)
 {
        /* please keep these calls, and their implementations above,
         * in alphabetical order so they're easier to sort through.
         */
-        omap_init_i2c();
        omap_init_irda();
-        omap_init_mmc();
        omap_init_rtc();
-        omap_init_wdt();
        return 0;
 }
-arch_initcall(omap_init_devices);
+arch_initcall(omap1_init_devices);
diff --git a/arch/arm/mach-omap1/id.c b/arch/arm/mach-omap1/id.c
index 986c3b7e09bb..5c637c048368 100644
--- a/arch/arm/mach-omap1/id.c
+++ b/arch/arm/mach-omap1/id.c
@@ -18,6 +18,13 @@
 #include <asm/io.h>
+#define OMAP_DIE_ID_0           0xfffe1800
+#define OMAP_DIE_ID_1           0xfffe1804
+#define OMAP_PRODUCTION_ID_0    0xfffe2000
+#define OMAP_PRODUCTION_ID_1    0xfffe2004
+#define OMAP32_ID_0             0xfffed400
+#define OMAP32_ID_1             0xfffed404
 struct omap_id {
        u16     jtag_id;        /* Used to determine OMAP type */
        u8      die_rev;        /* Processor revision */
@@ -27,6 +34,7 @@ struct omap_id {
 /* Register values to detect the OMAP version */
 static struct omap_id omap_ids[] __initdata = {
+        { .jtag_id = 0xb574, .die_rev = 0x2, .omap_id = 0x03310315, .type = 0x03100000},
        { .jtag_id = 0x355f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300100},
        { .jtag_id = 0xb55f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300300},
        { .jtag_id = 0xb470, .die_rev = 0x0, .omap_id = 0x03310100, .type = 0x15100000},
@@ -164,6 +172,7 @@ void __init omap_check_revision(void)
        case 0x07:
                system_rev |= 0x07;
                break;
+        case 0x03:
        case 0x15:
                system_rev |= 0x15;
                break;
diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c
index 79fb86535ebc..a7a19f75b9e1 100644
--- a/arch/arm/mach-omap1/io.c
+++ b/arch/arm/mach-omap1/io.c
@@ -15,9 +15,10 @@
 #include <asm/mach/map.h>
 #include <asm/io.h>
+#include <asm/arch/mux.h>
 #include <asm/arch/tc.h>
-extern int clk_init(void);
+extern int omap1_clk_init(void);
 extern void omap_check_revision(void);
 extern void omap_sram_init(void);
@@ -50,7 +51,7 @@ static struct map_desc omap730_io_desc[] __initdata = {
 };
 #endif
-#ifdef CONFIG_ARCH_OMAP1510
+#ifdef CONFIG_ARCH_OMAP15XX
 static struct map_desc omap1510_io_desc[] __initdata = {
        {
                .virtual        = OMAP1510_DSP_BASE,
@@ -98,7 +99,7 @@ static void __init _omap_map_io(void)
                iotable_init(omap730_io_desc, ARRAY_SIZE(omap730_io_desc));
        }
 #endif
-#ifdef CONFIG_ARCH_OMAP1510
+#ifdef CONFIG_ARCH_OMAP15XX
        if (cpu_is_omap1510()) {
                iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc));
        }
@@ -119,7 +120,7 @@ static void __init _omap_map_io(void)
        /* Must init clocks early to assure that timer interrupt works
         */
-        clk_init();
+        omap1_clk_init();
 }
 /*
@@ -127,7 +128,9 @@ static void __init _omap_map_io(void)
 */
 void __init omap_map_common_io(void)
 {
-        if (!initialized)
+        if (!initialized) {
                _omap_map_io();
+                omap1_mux_init();
+        }
 }
diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c
index 192ce6055faa..ed65a7d2e941 100644
--- a/arch/arm/mach-omap1/irq.c
+++ b/arch/arm/mach-omap1/irq.c
@@ -47,6 +47,7 @@
 #include <asm/irq.h>
 #include <asm/mach/irq.h>
 #include <asm/arch/gpio.h>
+#include <asm/arch/cpu.h>
 #include <asm/io.h>
@@ -147,11 +148,15 @@ static struct omap_irq_bank omap730_irq_banks[] = {
 };
 #endif
-#ifdef CONFIG_ARCH_OMAP1510
+#ifdef CONFIG_ARCH_OMAP15XX
 static struct omap_irq_bank omap1510_irq_banks[] = {
        { .base_reg = OMAP_IH1_BASE,            .trigger_map = 0xb3febfff },
        { .base_reg = OMAP_IH2_BASE,            .trigger_map = 0xffbfffed },
 };
+static struct omap_irq_bank omap310_irq_banks[] = {
+        { .base_reg = OMAP_IH1_BASE,            .trigger_map = 0xb3faefc3 },
+        { .base_reg = OMAP_IH2_BASE,            .trigger_map = 0x65b3c061 },
+};
 #endif
 #if defined(CONFIG_ARCH_OMAP16XX)
@@ -181,11 +186,15 @@ void __init omap_init_irq(void)
                irq_bank_count = ARRAY_SIZE(omap730_irq_banks);
        }
 #endif
-#ifdef CONFIG_ARCH_OMAP1510
+#ifdef CONFIG_ARCH_OMAP15XX
        if (cpu_is_omap1510()) {
                irq_banks = omap1510_irq_banks;
                irq_bank_count = ARRAY_SIZE(omap1510_irq_banks);
        }
+        if (cpu_is_omap310()) {
+                irq_banks = omap310_irq_banks;
+                irq_bank_count = ARRAY_SIZE(omap310_irq_banks);
+        }
 #endif
 #if defined(CONFIG_ARCH_OMAP16XX)
        if (cpu_is_omap16xx()) {
@@ -226,9 +235,11 @@ void __init omap_init_irq(void)
        }
        /* Unmask level 2 handler */
-        if (cpu_is_omap730()) {
+        if (cpu_is_omap730())
                omap_unmask_irq(INT_730_IH2_IRQ);
-        } else {
+        else if (cpu_is_omap1510())
-                omap_unmask_irq(INT_IH2_IRQ);
+                omap_unmask_irq(INT_1510_IH2_IRQ);
-        }
+        else if (cpu_is_omap16xx())
+                omap_unmask_irq(INT_1610_IH2_IRQ);
 }
diff --git a/arch/arm/mach-omap1/leds-h2p2-debug.c b/arch/arm/mach-omap1/leds-h2p2-debug.c
index be283cda63dd..650650815915 100644
--- a/arch/arm/mach-omap1/leds-h2p2-debug.c
+++ b/arch/arm/mach-omap1/leds-h2p2-debug.c
@@ -13,12 +13,12 @@
 #include <linux/init.h>
 #include <linux/kernel_stat.h>
 #include <linux/sched.h>
-#include <linux/version.h>
 #include <asm/io.h>
 #include <asm/hardware.h>
 #include <asm/leds.h>
 #include <asm/system.h>
+#include <asm/mach-types.h>
 #include <asm/arch/fpga.h>
 #include <asm/arch/gpio.h>
@@ -64,14 +64,19 @@ void h2p2_dbg_leds_event(led_event_t evt)
        case led_stop:
        case led_halted:
                /* all leds off during suspend or shutdown */
-                omap_set_gpio_dataout(GPIO_TIMER, 0);
-                omap_set_gpio_dataout(GPIO_IDLE, 0);
+                if (! machine_is_omap_perseus2()) {
+                        omap_set_gpio_dataout(GPIO_TIMER, 0);
+                        omap_set_gpio_dataout(GPIO_IDLE, 0);
+                }
                __raw_writew(~0, &fpga->leds);
                led_state &= ~LED_STATE_ENABLED;
                if (evt == led_halted) {
                        iounmap(fpga);
                        fpga = NULL;
                }
                goto done;
        case led_claim:
@@ -86,18 +91,37 @@ void h2p2_dbg_leds_event(led_event_t evt)
 #ifdef CONFIG_LEDS_TIMER
        case led_timer:
                led_state ^= LED_TIMER_ON;
-                omap_set_gpio_dataout(GPIO_TIMER, led_state & LED_TIMER_ON);
-                goto done;
+                if (machine_is_omap_perseus2())
+                        hw_led_state ^= H2P2_DBG_FPGA_P2_LED_TIMER;
+                else {
+                        omap_set_gpio_dataout(GPIO_TIMER, led_state & LED_TIMER_ON);
+                        goto done;
+                }
+                break;
 #endif
 #ifdef CONFIG_LEDS_CPU
        case led_idle_start:
-                omap_set_gpio_dataout(GPIO_IDLE, 1);
+                if (machine_is_omap_perseus2())
-                goto done;
+                        hw_led_state |= H2P2_DBG_FPGA_P2_LED_IDLE;
+                else {
+                        omap_set_gpio_dataout(GPIO_IDLE, 1);
+                        goto done;
+                }
+                break;
        case led_idle_end:
-                omap_set_gpio_dataout(GPIO_IDLE, 0);
+                if (machine_is_omap_perseus2())
-                goto done;
+                        hw_led_state &= ~H2P2_DBG_FPGA_P2_LED_IDLE;
+                else {
+                        omap_set_gpio_dataout(GPIO_IDLE, 0);
+                        goto done;
+                }
+                break;
 #endif
        case led_green_on:
@@ -136,7 +160,7 @@ void h2p2_dbg_leds_event(led_event_t evt)
        /*
         *  Actually burn the LEDs
         */
-        if (led_state & LED_STATE_CLAIMED)
+        if (led_state & LED_STATE_ENABLED)
                __raw_writew(~hw_led_state, &fpga->leds);
 done:
diff --git a/arch/arm/mach-omap1/leds.c b/arch/arm/mach-omap1/leds.c
index 5c6b1bb6e722..3f9dcac4fd41 100644
--- a/arch/arm/mach-omap1/leds.c
+++ b/arch/arm/mach-omap1/leds.c
@@ -33,7 +33,6 @@ omap_leds_init(void)
        if (machine_is_omap_h2()
                        || machine_is_omap_h3()
-                        || machine_is_omap_perseus2()
 #ifdef  CONFIG_OMAP_OSK_MISTRAL
                        || machine_is_omap_osk()
 #endif
diff --git a/arch/arm/mach-omap1/mux.c b/arch/arm/mach-omap1/mux.c
new file mode 100644
index 000000000000..d4b8d624e742
--- /dev/null
+++ b/arch/arm/mach-omap1/mux.c
@@ -0,0 +1,289 @@
+/*
+ * linux/arch/arm/mach-omap1/mux.c
+ *
+ * OMAP1 pin multiplexing configurations
+ *
+ * Copyright (C) 2003 - 2005 Nokia Corporation
+ *
+ * Written by Tony Lindgren <tony.lindgren@nokia.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <asm/system.h>
+#include <asm/io.h>
+#include <linux/spinlock.h>
+#include <asm/arch/mux.h>
+#ifdef CONFIG_OMAP_MUX
+#ifdef CONFIG_ARCH_OMAP730
+struct pin_config __initdata_or_module omap730_pins[] = {
+MUX_CFG_730("E2_730_KBR0",      12,   21,    0,   0,   20,   1,   NA,    0,  0)
+MUX_CFG_730("J7_730_KBR1",      12,   25,    0,   0,   24,   1,   NA,    0,  0)
+MUX_CFG_730("E1_730_KBR2",      12,   29,    0,   0,   28,   1,   NA,    0,  0)
+MUX_CFG_730("F3_730_KBR3",      13,    1,    0,   0,   0,    1,   NA,    0,  0)
+MUX_CFG_730("D2_730_KBR4",      13,    5,    0,   0,   4,    1,   NA,    0,  0)
+MUX_CFG_730("C2_730_KBC0",      13,    9,    0,   0,    8,   1,   NA,    0,  0)
+MUX_CFG_730("D3_730_KBC1",      13,   13,    0,   0,   12,   1,   NA,    0,  0)
+MUX_CFG_730("E4_730_KBC2",      13,   17,    0,   0,   16,   1,   NA,    0,  0)
+MUX_CFG_730("F4_730_KBC3",      13,   21,    0,   0,   20,   1,   NA,    0,  0)
+MUX_CFG_730("E3_730_KBC4",      13,   25,    0,   0,   24,   1,   NA,    0,  0)
+};
+#endif
+#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX)
+struct pin_config __initdata_or_module omap1xxx_pins[] = {
+/*
+ *       description            mux  mode   mux  pull pull  pull  pu_pd  pu  dbg
+ *                              reg  offset mode reg  bit   ena   reg
+ */
+MUX_CFG("UART1_TX",              9,   21,    1,   2,   3,   0,   NA,     0,  0)
+MUX_CFG("UART1_RTS",             9,   12,    1,   2,   0,   0,   NA,     0,  0)
+/* UART2 (COM_UART_GATING), conflicts with USB2 */
+MUX_CFG("UART2_TX",              C,   27,    1,   3,   3,   0,   NA,     0,  0)
+MUX_CFG("UART2_RX",              C,   18,    0,   3,   1,   1,   NA,     0,  0)
+MUX_CFG("UART2_CTS",             C,   21,    0,   3,   1,   1,   NA,     0,  0)
+MUX_CFG("UART2_RTS",             C,   24,    1,   3,   2,   0,   NA,     0,  0)
+/* UART3 (GIGA_UART_GATING) */
+MUX_CFG("UART3_TX",              6,    0,    1,   0,  30,   0,   NA,     0,  0)
+MUX_CFG("UART3_RX",              6,    3,    0,   0,  31,   1,   NA,     0,  0)
+MUX_CFG("UART3_CTS",             5,   12,    2,   0,  24,   0,   NA,     0,  0)
+MUX_CFG("UART3_RTS",             5,   15,    2,   0,  25,   0,   NA,     0,  0)
+MUX_CFG("UART3_CLKREQ",          9,   27,    0,   2,   5,   0,   NA,     0,  0)
+MUX_CFG("UART3_BCLK",            A,    0,    0,   2,   6,   0,   NA,     0,  0)
+MUX_CFG("Y15_1610_UART3_RTS",    A,    0,    1,   2,   6,   0,   NA,     0,  0)
+/* PWT & PWL, conflicts with UART3 */
+MUX_CFG("PWT",                   6,    0,    2,   0,  30,   0,   NA,     0,  0)
+MUX_CFG("PWL",                   6,    3,    1,   0,  31,   1,   NA,     0,  0)
+/* USB internal master generic */
+MUX_CFG("R18_USB_VBUS",          7,    9,    2,   1,  11,   0,   NA,     0,  1)
+MUX_CFG("R18_1510_USB_GPIO0",    7,    9,    0,   1,  11,   1,   NA,     0,  1)
+/* works around erratum:  W4_USB_PUEN and W4_USB_PUDIS are switched! */
+MUX_CFG("W4_USB_PUEN",           D,    3,    3,   3,   5,   1,   NA,     0,  1)
+MUX_CFG("W4_USB_CLKO",           D,    3,    1,   3,   5,   0,   NA,     0,  1)
+MUX_CFG("W4_USB_HIGHZ",          D,    3,    4,   3,   5,   0,    3,     0,  1)
+MUX_CFG("W4_GPIO58",             D,    3,    7,   3,   5,   0,    3,     0,  1)
+/* USB1 master */
+MUX_CFG("USB1_SUSP",             8,   27,    2,   1,  27,   0,   NA,     0,  1)
+MUX_CFG("USB1_SE0",              9,    0,    2,   1,  28,   0,   NA,     0,  1)
+MUX_CFG("W13_1610_USB1_SE0",     9,    0,    4,   1,  28,   0,   NA,     0,  1)
+MUX_CFG("USB1_TXEN",             9,    3,    2,   1,  29,   0,   NA,     0,  1)
+MUX_CFG("USB1_TXD",              9,   24,    1,   2,   4,   0,   NA,     0,  1)
+MUX_CFG("USB1_VP",               A,    3,    1,   2,   7,   0,   NA,     0,  1)
+MUX_CFG("USB1_VM",               A,    6,    1,   2,   8,   0,   NA,     0,  1)
+MUX_CFG("USB1_RCV",              A,    9,    1,   2,   9,   0,   NA,     0,  1)
+MUX_CFG("USB1_SPEED",            A,   12,    2,   2,  10,   0,   NA,     0,  1)
+MUX_CFG("R13_1610_USB1_SPEED",   A,   12,    5,   2,  10,   0,   NA,     0,  1)
+MUX_CFG("R13_1710_USB1_SEO",     A,   12,    5,   2,  10,   0,   NA,     0,  1)
+/* USB2 master */
+MUX_CFG("USB2_SUSP",             B,    3,    1,   2,  17,   0,   NA,     0,  1)
+MUX_CFG("USB2_VP",               B,    6,    1,   2,  18,   0,   NA,     0,  1)
+MUX_CFG("USB2_TXEN",             B,    9,    1,   2,  19,   0,   NA,     0,  1)
+MUX_CFG("USB2_VM",               C,   18,    1,   3,   0,   0,   NA,     0,  1)
+MUX_CFG("USB2_RCV",              C,   21,    1,   3,   1,   0,   NA,     0,  1)
+MUX_CFG("USB2_SE0",              C,   24,    2,   3,   2,   0,   NA,     0,  1)
+MUX_CFG("USB2_TXD",              C,   27,    2,   3,   3,   0,   NA,     0,  1)
+/* OMAP-1510 GPIO */
+MUX_CFG("R18_1510_GPIO0",        7,    9,    0,   1,  11,   1,    0,     0,  1)
+MUX_CFG("R19_1510_GPIO1",        7,    6,    0,   1,  10,   1,    0,     0,  1)
+MUX_CFG("M14_1510_GPIO2",        7,    3,    0,   1,   9,   1,    0,     0,  1)
+/* OMAP1610 GPIO */
+MUX_CFG("P18_1610_GPIO3",        7,    0,    0,   1,   8,   0,   NA,     0,  1)
+MUX_CFG("Y15_1610_GPIO17",       A,    0,    7,   2,   6,   0,   NA,     0,  1)
+/* OMAP-1710 GPIO */
+MUX_CFG("R18_1710_GPIO0",        7,    9,    0,   1,  11,   1,    1,     1,  1)
+MUX_CFG("V2_1710_GPIO10",        F,   27,    1,   4,   3,   1,    4,     1,  1)
+MUX_CFG("N21_1710_GPIO14",       6,    9,    0,   1,   1,   1,    1,     1,  1)
+MUX_CFG("W15_1710_GPIO40",       9,   27,    7,   2,   5,   1,    2,     1,  1)
+/* MPUIO */
+MUX_CFG("MPUIO2",                7,   18,    0,   1,  14,   1,   NA,     0,  1)
+MUX_CFG("N15_1610_MPUIO2",       7,   18,    0,   1,  14,   1,    1,     0,  1)
+MUX_CFG("MPUIO4",                7,   15,    0,   1,  13,   1,   NA,     0,  1)
+MUX_CFG("MPUIO5",                7,   12,    0,   1,  12,   1,   NA,     0,  1)
+MUX_CFG("T20_1610_MPUIO5",       7,   12,    0,   1,  12,   0,    3,     0,  1)
+MUX_CFG("W11_1610_MPUIO6",      10,   15,    2,   3,   8,   0,    3,     0,  1)
+MUX_CFG("V10_1610_MPUIO7",       A,   24,    2,   2,  14,   0,    2,     0,  1)
+MUX_CFG("W11_1610_MPUIO9",      10,   15,    1,   3,   8,   0,    3,     0,  1)
+MUX_CFG("V10_1610_MPUIO10",      A,   24,    1,   2,  14,   0,    2,     0,  1)
+MUX_CFG("W10_1610_MPUIO11",      A,   18,    2,   2,  11,   0,    2,     0,  1)
+MUX_CFG("E20_1610_MPUIO13",      3,   21,    1,   0,   7,   0,    0,     0,  1)
+MUX_CFG("U20_1610_MPUIO14",      9,    6,    6,   0,  30,   0,    0,     0,  1)
+MUX_CFG("E19_1610_MPUIO15",      3,   18,    1,   0,   6,   0,    0,     0,  1)
+/* MCBSP2 */
+MUX_CFG("MCBSP2_CLKR",           C,    6,    0,   2,  27,   1,   NA,     0,  1)
+MUX_CFG("MCBSP2_CLKX",           C,    9,    0,   2,  29,   1,   NA,     0,  1)
+MUX_CFG("MCBSP2_DR",             C,    0,    0,   2,  26,   1,   NA,     0,  1)
+MUX_CFG("MCBSP2_DX",             C,   15,    0,   2,  31,   1,   NA,     0,  1)
+MUX_CFG("MCBSP2_FSR",            C,   12,    0,   2,  30,   1,   NA,     0,  1)
+MUX_CFG("MCBSP2_FSX",            C,    3,    0,   2,  27,   1,   NA,     0,  1)
+/* MCBSP3 NOTE: Mode must 1 for clock */
+MUX_CFG("MCBSP3_CLKX",           9,    3,    1,   1,  29,   0,   NA,     0,  1)
+/* Misc ballouts */
+MUX_CFG("BALLOUT_V8_ARMIO3",     B,   18,    0,   2,  25,   1,   NA,     0,  1)
+MUX_CFG("N20_HDQ",             6,   18,    1,   1,   4,   0,    1,     4,  0)
+/* OMAP-1610 MMC2 */
+MUX_CFG("W8_1610_MMC2_DAT0",     B,   21,    6,   2,  23,   1,    2,     1,  1)
+MUX_CFG("V8_1610_MMC2_DAT1",     B,   27,    6,   2,  25,   1,    2,     1,  1)
+MUX_CFG("W15_1610_MMC2_DAT2",    9,   12,    6,   2,   5,   1,    2,     1,  1)
+MUX_CFG("R10_1610_MMC2_DAT3",    B,   18,    6,   2,  22,   1,    2,     1,  1)
+MUX_CFG("Y10_1610_MMC2_CLK",     B,    3,    6,   2,  17,   0,    2,     0,  1)
+MUX_CFG("Y8_1610_MMC2_CMD",      B,   24,    6,   2,  24,   1,    2,     1,  1)
+MUX_CFG("V9_1610_MMC2_CMDDIR",   B,   12,    6,   2,  20,   0,    2,     1,  1)
+MUX_CFG("V5_1610_MMC2_DATDIR0",  B,   15,    6,   2,  21,   0,    2,     1,  1)
+MUX_CFG("W19_1610_MMC2_DATDIR1", 8,   15,    6,   1,  23,   0,    1,     1,  1)
+MUX_CFG("R18_1610_MMC2_CLKIN",   7,    9,    6,   1,  11,   0,    1,    11,  1)
+/* OMAP-1610 External Trace Interface */
+MUX_CFG("M19_1610_ETM_PSTAT0",   5,   27,    1,   0,  29,   0,    0,     0,  1)
+MUX_CFG("L15_1610_ETM_PSTAT1",   5,   24,    1,   0,  28,   0,    0,     0,  1)
+MUX_CFG("L18_1610_ETM_PSTAT2",   5,   21,    1,   0,  27,   0,    0,     0,  1)
+MUX_CFG("L19_1610_ETM_D0",       5,   18,    1,   0,  26,   0,    0,     0,  1)
+MUX_CFG("J19_1610_ETM_D6",       5,    0,    1,   0,  20,   0,    0,     0,  1)
+MUX_CFG("J18_1610_ETM_D7",       5,   27,    1,   0,  19,   0,    0,     0,  1)
+/* OMAP16XX GPIO */
+MUX_CFG("P20_1610_GPIO4",        6,   27,    0,   1,   7,   0,    1,     1,  1)
+MUX_CFG("V9_1610_GPIO7",         B,   12,    1,   2,  20,   0,    2,     1,  1)
+MUX_CFG("W8_1610_GPIO9",         B,   21,    0,   2,  23,   0,    2,     1,  1)
+MUX_CFG("N20_1610_GPIO11",       6,   18,    0,   1,   4,   0,    1,     1,  1)
+MUX_CFG("N19_1610_GPIO13",       6,   12,    0,   1,   2,   0,    1,     1,  1)
+MUX_CFG("P10_1610_GPIO22",       C,    0,    7,   2,  26,   0,    2,     1,  1)
+MUX_CFG("V5_1610_GPIO24",        B,   15,    7,   2,  21,   0,    2,     1,  1)
+MUX_CFG("AA20_1610_GPIO_41",     9,    9,    7,   1,  31,   0,    1,     1,  1)
+MUX_CFG("W19_1610_GPIO48",       8,   15,    7,   1,  23,   1,    1,     0,  1)
+MUX_CFG("M7_1610_GPIO62",       10,    0,    0,   4,  24,   0,    4,     0,  1)
+MUX_CFG("V14_16XX_GPIO37",       9,   18,    7,   2,   2,   0,    2,     2,  0)
+MUX_CFG("R9_16XX_GPIO18",        C,   18,    7,   3,   0,   0,    3,     0,  0)
+MUX_CFG("L14_16XX_GPIO49",       6,    3,    7,   0,  31,   0,    0,    31,  0)
+/* OMAP-1610 uWire */
+MUX_CFG("V19_1610_UWIRE_SCLK",   8,    6,    0,   1,  20,   0,    1,     1,  1)
+MUX_CFG("U18_1610_UWIRE_SDI",    8,    0,    0,   1,  18,   0,    1,     1,  1)
+MUX_CFG("W21_1610_UWIRE_SDO",    8,    3,    0,   1,  19,   0,    1,     1,  1)
+MUX_CFG("N14_1610_UWIRE_CS0",    8,    9,    1,   1,  21,   0,    1,     1,  1)
+MUX_CFG("P15_1610_UWIRE_CS3",    8,   12,    1,   1,  22,   0,    1,     1,  1)
+MUX_CFG("N15_1610_UWIRE_CS1",    7,   18,    2,   1,  14,   0,   NA,     0,  1)
+/* OMAP-1610 Flash */
+MUX_CFG("L3_1610_FLASH_CS2B_OE",10,    6,    1,  NA,   0,   0,   NA,     0,  1)
+MUX_CFG("M8_1610_FLASH_CS2B_WE",10,    3,    1,  NA,   0,   0,   NA,     0,  1)
+/* First MMC interface, same on 1510, 1610 and 1710 */
+MUX_CFG("MMC_CMD",               A,   27,    0,   2,  15,   1,    2,     1,  1)
+MUX_CFG("MMC_DAT1",              A,   24,    0,   2,  14,   1,    2,     1,  1)
+MUX_CFG("MMC_DAT2",              A,   18,    0,   2,  12,   1,    2,     1,  1)
+MUX_CFG("MMC_DAT0",              B,    0,    0,   2,  16,   1,    2,     1,  1)
+MUX_CFG("MMC_CLK",               A,   21,    0,  NA,   0,   0,   NA,     0,  1)
+MUX_CFG("MMC_DAT3",             10,   15,    0,   3,   8,   1,    3,     1,  1)
+MUX_CFG("M15_1710_MMC_CLKI",     6,   21,    2,   0,   0,   0,   NA,     0,  1)
+MUX_CFG("P19_1710_MMC_CMDDIR",   6,   24,    6,   0,   0,   0,   NA,     0,  1)
+MUX_CFG("P20_1710_MMC_DATDIR0",  6,   27,    5,   0,   0,   0,   NA,     0,  1)
+/* OMAP-1610 USB0 alternate configuration */
+MUX_CFG("W9_USB0_TXEN",          B,   9,     5,   2,  19,   0,    2,     0,  1)
+MUX_CFG("AA9_USB0_VP",           B,   6,     5,   2,  18,   0,    2,     0,  1)
+MUX_CFG("Y5_USB0_RCV",           C,  21,     5,   3,   1,   0,    1,     0,  1)
+MUX_CFG("R9_USB0_VM",            C,  18,     5,   3,   0,   0,    3,     0,  1)
+MUX_CFG("V6_USB0_TXD",           C,  27,     5,   3,   3,   0,    3,     0,  1)
+MUX_CFG("W5_USB0_SE0",           C,  24,     5,   3,   2,   0,    3,     0,  1)
+MUX_CFG("V9_USB0_SPEED",         B,  12,     5,   2,  20,   0,    2,     0,  1)
+MUX_CFG("Y10_USB0_SUSP",         B,   3,     5,   2,  17,   0,    2,     0,  1)
+/* USB2 interface */
+MUX_CFG("W9_USB2_TXEN",          B,   9,     1,  NA,   0,   0,   NA,     0,  1)
+MUX_CFG("AA9_USB2_VP",           B,   6,     1,  NA,   0,   0,   NA,     0,  1)
+MUX_CFG("Y5_USB2_RCV",           C,  21,     1,  NA,   0,   0,   NA,     0,  1)
+MUX_CFG("R9_USB2_VM",            C,  18,     1,  NA,   0,   0,   NA,     0,  1)
+MUX_CFG("V6_USB2_TXD",           C,  27,     2,  NA,   0,   0,   NA,     0,  1)
+MUX_CFG("W5_USB2_SE0",           C,  24,     2,  NA,   0,   0,   NA,     0,  1)
+/* 16XX UART */
+MUX_CFG("R13_1610_UART1_TX",     A,  12,     6,   2,  10,   0,    2,    10,  1)
+MUX_CFG("V14_16XX_UART1_RX",     9,  18,     0,   2,   2,   0,    2,     2,  1)
+MUX_CFG("R14_1610_UART1_CTS",    9,  15,     0,   2,   1,   0,    2,     1,  1)
+MUX_CFG("AA15_1610_UART1_RTS",   9,  12,     1,   2,   0,   0,    2,     0,  1)
+MUX_CFG("R9_16XX_UART2_RX",      C,  18,     0,   3,   0,   0,    3,     0,  1)
+MUX_CFG("L14_16XX_UART3_RX",     6,   3,     0,   0,  31,   0,    0,    31,  1)
+/* I2C interface */
+MUX_CFG("I2C_SCL",               7,  24,     0,  NA,   0,   0,   NA,     0,  0)
+MUX_CFG("I2C_SDA",               7,  27,     0,  NA,   0,   0,   NA,     0,  0)
+/* Keypad */
+MUX_CFG("F18_1610_KBC0",         3,  15,     0,   0,   5,   1,    0,     0,  0)
+MUX_CFG("D20_1610_KBC1",         3,  12,     0,   0,   4,   1,    0,     0,  0)
+MUX_CFG("D19_1610_KBC2",         3,   9,     0,   0,   3,   1,    0,     0,  0)
+MUX_CFG("E18_1610_KBC3",         3,   6,     0,   0,   2,   1,    0,     0,  0)
+MUX_CFG("C21_1610_KBC4",         3,   3,     0,   0,   1,   1,    0,     0,  0)
+MUX_CFG("G18_1610_KBR0",         4,   0,     0,   0,   10,  1,    0,     1,  0)
+MUX_CFG("F19_1610_KBR1",         3,   27,    0,   0,   9,   1,    0,     1,  0)
+MUX_CFG("H14_1610_KBR2",         3,   24,    0,   0,   8,   1,    0,     1,  0)
+MUX_CFG("E20_1610_KBR3",         3,   21,    0,   0,   7,   1,    0,     1,  0)
+MUX_CFG("E19_1610_KBR4",         3,   18,    0,   0,   6,   1,    0,     1,  0)
+MUX_CFG("N19_1610_KBR5",         6,  12,     1,   1,   2,   1,    1,     1,  0)
+/* Power management */
+MUX_CFG("T20_1610_LOW_PWR",      7,   12,    1,   NA,   0,   0,   NA,    0,  0)
+/* MCLK Settings */
+MUX_CFG("V5_1710_MCLK_ON",       B,   15,    0,   NA,   0,   0,   NA,    0,  0)
+MUX_CFG("V5_1710_MCLK_OFF",      B,   15,    6,   NA,   0,   0,   NA,    0,  0)
+MUX_CFG("R10_1610_MCLK_ON",      B,   18,    0,   NA,  22,   0,   NA,    1,  0)
+MUX_CFG("R10_1610_MCLK_OFF",     B,   18,    6,   2,   22,   1,   2,     1,  1)
+/* CompactFlash controller, conflicts with MMC1 */
+MUX_CFG("P11_1610_CF_CD2",       A,   27,    3,   2,   15,   1,   2,     1,  1)
+MUX_CFG("R11_1610_CF_IOIS16",    B,    0,    3,   2,   16,   1,   2,     1,  1)
+MUX_CFG("V10_1610_CF_IREQ",      A,   24,    3,   2,   14,   0,   2,     0,  1)
+MUX_CFG("W10_1610_CF_RESET",     A,   18,    3,   2,   12,   1,   2,     1,  1)
+MUX_CFG("W11_1610_CF_CD1",      10,   15,    3,   3,    8,   1,   3,     1,  1)
+};
+#endif  /* CONFIG_ARCH_OMAP15XX || CONFIG_ARCH_OMAP16XX */
+int __init omap1_mux_init(void)
+{
+#ifdef CONFIG_ARCH_OMAP730
+        omap_mux_register(omap730_pins, ARRAY_SIZE(omap730_pins));
+#endif
+#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX)
+        omap_mux_register(omap1xxx_pins, ARRAY_SIZE(omap1xxx_pins));
+#endif
+        return 0;
+}
+#endif
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c
index 40c4f7c40e73..6810cfb84462 100644
--- a/arch/arm/mach-omap1/serial.c
+++ b/arch/arm/mach-omap1/serial.c
@@ -109,9 +109,10 @@ static struct platform_device serial_device = {
 * By default UART2 does not work on Innovator-1510 if you have
 * USB OHCI enabled. To use UART2, you must disable USB2 first.
 */
-void __init omap_serial_init(int ports[OMAP_MAX_NR_PORTS])
+void __init omap_serial_init(void)
 {
        int i;
+        const struct omap_uart_config *info;
        if (cpu_is_omap730()) {
                serial_platform_data[0].regshift = 0;
@@ -126,10 +127,14 @@ void __init omap_serial_init(int ports[OMAP_MAX_NR_PORTS])
                serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16;
        }
+        info = omap_get_config(OMAP_TAG_UART, struct omap_uart_config);
+        if (info == NULL)
+                return;
        for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
                unsigned char reg;
-                if (ports[i] == 0) {
+                if (!((1 << i) & info->enabled_uarts)) {
                        serial_platform_data[i].membase = NULL;
                        serial_platform_data[i].mapbase = 0;
                        continue;
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
index 191a9b1ee9b7..cdbf4d7620c6 100644
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -226,8 +226,8 @@ unsigned long long sched_clock(void)
 #ifdef CONFIG_OMAP_32K_TIMER
-#ifdef CONFIG_ARCH_OMAP1510
+#ifdef CONFIG_ARCH_OMAP15XX
-#error OMAP 32KHz timer does not currently work on 1510!
+#error OMAP 32KHz timer does not currently work on 15XX!
 #endif
 /*
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
new file mode 100644
index 000000000000..578880943cf2
--- /dev/null
+++ b/arch/arm/mach-omap2/Kconfig
@@ -0,0 +1,22 @@
+comment "OMAP Core Type"
+        depends on ARCH_OMAP2
+config ARCH_OMAP24XX
+        bool "OMAP24xx Based System"
+        depends on ARCH_OMAP2
+config ARCH_OMAP2420
+        bool "OMAP2420 support"
+        depends on ARCH_OMAP24XX
+comment "OMAP Board Type"
+        depends on ARCH_OMAP2
+config MACH_OMAP_GENERIC
+        bool "Generic OMAP board"
+        depends on ARCH_OMAP2 && ARCH_OMAP24XX
+config MACH_OMAP_H4
+        bool "OMAP 2420 H4 board"
+        depends on ARCH_OMAP2 && ARCH_OMAP24XX
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
new file mode 100644
index 000000000000..42041166435c
--- /dev/null
+++ b/arch/arm/mach-omap2/Makefile
@@ -0,0 +1,13 @@
+#
+# Makefile for the linux kernel.
+#
+# Common support
+obj-y := irq.o id.o io.o sram-fn.o clock.o mux.o devices.o serial.o
+obj-$(CONFIG_OMAP_MPU_TIMER)            += timer-gp.o
+# Specific board support
+obj-$(CONFIG_MACH_OMAP_GENERIC)         += board-generic.o
+obj-$(CONFIG_MACH_OMAP_H4)              += board-h4.o
diff --git a/arch/arm/mach-omap2/Makefile.boot b/arch/arm/mach-omap2/Makefile.boot
new file mode 100644
index 000000000000..565aff7f37a9
--- /dev/null
+++ b/arch/arm/mach-omap2/Makefile.boot
@@ -0,0 +1,3 @@
+  zreladdr-y            := 0x80008000
+params_phys-y           := 0x80000100
+initrd_phys-y           := 0x80800000
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
new file mode 100644
index 000000000000..c602e7a3d93e
--- /dev/null
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -0,0 +1,80 @@
+/*
+ * linux/arch/arm/mach-omap/omap2/board-generic.c
+ *
+ * Copyright (C) 2005 Nokia Corporation
+ * Author: Paul Mundt <paul.mundt@nokia.com>
+ *
+ * Modified from mach-omap/omap1/board-generic.c
+ *
+ * Code for generic OMAP2 board. Should work on many OMAP2 systems where
+ * the bootloader passes the board-specific data to the kernel.
+ * Do not put any board specific code to this file; create a new machine
+ * type if you need custom low-level initializations.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/device.h>
+#include <asm/hardware.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/mux.h>
+#include <asm/arch/usb.h>
+#include <asm/arch/board.h>
+#include <asm/arch/common.h>
+static void __init omap_generic_init_irq(void)
+{
+        omap_init_irq();
+}
+static struct omap_uart_config generic_uart_config __initdata = {
+        .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
+};
+static struct omap_mmc_config generic_mmc_config __initdata = {
+        .mmc [0] = {
+                .enabled        = 0,
+                .wire4          = 0,
+                .wp_pin         = -1,
+                .power_pin      = -1,
+                .switch_pin     = -1,
+        },
+};
+static struct omap_board_config_kernel generic_config[] = {
+        { OMAP_TAG_UART,        &generic_uart_config },
+        { OMAP_TAG_MMC,         &generic_mmc_config },
+};
+static void __init omap_generic_init(void)
+{
+        omap_board_config = generic_config;
+        omap_board_config_size = ARRAY_SIZE(generic_config);
+        omap_serial_init();
+}
+static void __init omap_generic_map_io(void)
+{
+        omap_map_common_io();
+}
+MACHINE_START(OMAP_GENERIC, "Generic OMAP24xx")
+        /* Maintainer: Paul Mundt <paul.mundt@nokia.com> */
+        .phys_ram       = 0x80000000,
+        .phys_io        = 0x48000000,
+        .io_pg_offst    = ((0xd8000000) >> 18) & 0xfffc,
+        .boot_params    = 0x80000100,
+        .map_io         = omap_generic_map_io,
+        .init_irq       = omap_generic_init_irq,
+        .init_machine   = omap_generic_init,
+        .timer          = &omap_timer,
+MACHINE_END
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
new file mode 100644
index 000000000000..f2554469a76a
--- /dev/null
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -0,0 +1,197 @@
+/*
+ * linux/arch/arm/mach-omap/omap2/board-h4.c
+ *
+ * Copyright (C) 2005 Nokia Corporation
+ * Author: Paul Mundt <paul.mundt@nokia.com>
+ *
+ * Modified from mach-omap/omap1/board-generic.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/delay.h>
+#include <asm/hardware.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/flash.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/mux.h>
+#include <asm/arch/usb.h>
+#include <asm/arch/board.h>
+#include <asm/arch/common.h>
+#include <asm/arch/prcm.h>
+#include <asm/io.h>
+#include <asm/delay.h>
+static struct mtd_partition h4_partitions[] = {
+        /* bootloader (U-Boot, etc) in first sector */
+        {
+              .name             = "bootloader",
+              .offset           = 0,
+              .size             = SZ_128K,
+              .mask_flags       = MTD_WRITEABLE, /* force read-only */
+        },
+        /* bootloader params in the next sector */
+        {
+              .name             = "params",
+              .offset           = MTDPART_OFS_APPEND,
+              .size             = SZ_128K,
+              .mask_flags       = 0,
+        },
+        /* kernel */
+        {
+              .name             = "kernel",
+              .offset           = MTDPART_OFS_APPEND,
+              .size             = SZ_2M,
+              .mask_flags       = 0
+        },
+        /* file system */
+        {
+              .name             = "filesystem",
+              .offset           = MTDPART_OFS_APPEND,
+              .size             = MTDPART_SIZ_FULL,
+              .mask_flags       = 0
+        }
+};
+static struct flash_platform_data h4_flash_data = {
+        .map_name       = "cfi_probe",
+        .width          = 2,
+        .parts          = h4_partitions,
+        .nr_parts       = ARRAY_SIZE(h4_partitions),
+};
+static struct resource h4_flash_resource = {
+        .start          = H4_CS0_BASE,
+        .end            = H4_CS0_BASE + SZ_64M - 1,
+        .flags          = IORESOURCE_MEM,
+};
+static struct platform_device h4_flash_device = {
+        .name           = "omapflash",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &h4_flash_data,
+        },
+        .num_resources  = 1,
+        .resource       = &h4_flash_resource,
+};
+static struct resource h4_smc91x_resources[] = {
+        [0] = {
+                .start  = OMAP24XX_ETHR_START,          /* Physical */
+                .end    = OMAP24XX_ETHR_START + 0xf,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = OMAP_GPIO_IRQ(OMAP24XX_ETHR_GPIO_IRQ),
+                .end    = OMAP_GPIO_IRQ(OMAP24XX_ETHR_GPIO_IRQ),
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+static struct platform_device h4_smc91x_device = {
+        .name           = "smc91x",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(h4_smc91x_resources),
+        .resource       = h4_smc91x_resources,
+};
+static struct platform_device *h4_devices[] __initdata = {
+        &h4_smc91x_device,
+        &h4_flash_device,
+};
+static inline void __init h4_init_smc91x(void)
+{
+        /* Make sure CS1 timings are correct */
+        GPMC_CONFIG1_1 = 0x00011200;
+        GPMC_CONFIG2_1 = 0x001f1f01;
+        GPMC_CONFIG3_1 = 0x00080803;
+        GPMC_CONFIG4_1 = 0x1c091c09;
+        GPMC_CONFIG5_1 = 0x041f1f1f;
+        GPMC_CONFIG6_1 = 0x000004c4;
+        GPMC_CONFIG7_1 = 0x00000f40 | (0x08000000 >> 24);
+        udelay(100);
+        omap_cfg_reg(M15_24XX_GPIO92);
+        if (omap_request_gpio(OMAP24XX_ETHR_GPIO_IRQ) < 0) {
+                printk(KERN_ERR "Failed to request GPIO%d for smc91x IRQ\n",
+                        OMAP24XX_ETHR_GPIO_IRQ);
+                return;
+        }
+        omap_set_gpio_direction(OMAP24XX_ETHR_GPIO_IRQ, 1);
+}
+static void __init omap_h4_init_irq(void)
+{
+        omap_init_irq();
+        omap_gpio_init();
+        h4_init_smc91x();
+}
+static struct omap_uart_config h4_uart_config __initdata = {
+        .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
+};
+static struct omap_mmc_config h4_mmc_config __initdata = {
+        .mmc [0] = {
+                .enabled        = 1,
+                .wire4          = 1,
+                .wp_pin         = -1,
+                .power_pin      = -1,
+                .switch_pin     = -1,
+        },
+};
+static struct omap_lcd_config h4_lcd_config __initdata = {
+        .panel_name     = "h4",
+        .ctrl_name      = "internal",
+};
+static struct omap_board_config_kernel h4_config[] = {
+        { OMAP_TAG_UART,        &h4_uart_config },
+        { OMAP_TAG_MMC,         &h4_mmc_config },
+        { OMAP_TAG_LCD,         &h4_lcd_config },
+};
+static void __init omap_h4_init(void)
+{
+        /*
+         * Make sure the serial ports are muxed on at this point.
+         * You have to mux them off in device drivers later on
+         * if not needed.
+         */
+        platform_add_devices(h4_devices, ARRAY_SIZE(h4_devices));
+        omap_board_config = h4_config;
+        omap_board_config_size = ARRAY_SIZE(h4_config);
+        omap_serial_init();
+}
+static void __init omap_h4_map_io(void)
+{
+        omap_map_common_io();
+}
+MACHINE_START(OMAP_H4, "OMAP2420 H4 board")
+        /* Maintainer: Paul Mundt <paul.mundt@nokia.com> */
+        .phys_ram       = 0x80000000,
+        .phys_io        = 0x48000000,
+        .io_pg_offst    = ((0xd8000000) >> 18) & 0xfffc,
+        .boot_params    = 0x80000100,
+        .map_io         = omap_h4_map_io,
+        .init_irq       = omap_h4_init_irq,
+        .init_machine   = omap_h4_init,
+        .timer          = &omap_timer,
+MACHINE_END
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
new file mode 100644
index 000000000000..85818d9f2635
--- /dev/null
+++ b/arch/arm/mach-omap2/clock.c
@@ -0,0 +1,1129 @@
+/*
+ *  linux/arch/arm/mach-omap2/clock.c
+ *
+ *  Copyright (C) 2005 Texas Instruments Inc.
+ *  Richard Woodruff <r-woodruff2@ti.com>
+ *  Created for OMAP2.
+ *
+ *  Cleaned up and modified to use omap shared clock framework by
+ *  Tony Lindgren <tony@atomide.com>
+ *
+ *  Based on omap1 clock.c, Copyright (C) 2004 - 2005 Nokia corporation
+ *  Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/list.h>
+#include <linux/errno.h>
+#include <linux/delay.h>
+#include <asm/io.h>
+#include <asm/hardware/clock.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/sram.h>
+#include <asm/arch/prcm.h>
+#include "clock.h"
+//#define DOWN_VARIABLE_DPLL 1                  /* Experimental */
+static struct prcm_config *curr_prcm_set;
+static struct memory_timings mem_timings;
+static u32 curr_perf_level = PRCM_FULL_SPEED;
+/*-------------------------------------------------------------------------
+ * Omap2 specific clock functions
+ *-------------------------------------------------------------------------*/
+/* Recalculate SYST_CLK */
+static void omap2_sys_clk_recalc(struct clk * clk)
+{
+        u32 div = PRCM_CLKSRC_CTRL;
+        div &= (1 << 7) | (1 << 6);     /* Test if ext clk divided by 1 or 2 */
+        div >>= clk->rate_offset;
+        clk->rate = (clk->parent->rate / div);
+        propagate_rate(clk);
+}
+static u32 omap2_get_dpll_rate(struct clk * tclk)
+{
+        int dpll_clk, dpll_mult, dpll_div, amult;
+        dpll_mult = (CM_CLKSEL1_PLL >> 12) & 0x03ff;    /* 10 bits */
+        dpll_div = (CM_CLKSEL1_PLL >> 8) & 0x0f;        /* 4 bits */
+        dpll_clk = (tclk->parent->rate * dpll_mult) / (dpll_div + 1);
+        amult = CM_CLKSEL2_PLL & 0x3;
+        dpll_clk *= amult;
+        return dpll_clk;
+}
+static void omap2_followparent_recalc(struct clk *clk)
+{
+        followparent_recalc(clk);
+}
+static void omap2_propagate_rate(struct clk * clk)
+{
+        if (!(clk->flags & RATE_FIXED))
+                clk->rate = clk->parent->rate;
+        propagate_rate(clk);
+}
+/* Enable an APLL if off */
+static void omap2_clk_fixed_enable(struct clk *clk)
+{
+        u32 cval, i=0;
+        if (clk->enable_bit == 0xff)                    /* Parent will do it */
+                return;
+        cval = CM_CLKEN_PLL;
+        if ((cval & (0x3 << clk->enable_bit)) == (0x3 << clk->enable_bit))
+                return;
+        cval &= ~(0x3 << clk->enable_bit);
+        cval |= (0x3 << clk->enable_bit);
+        CM_CLKEN_PLL = cval;
+        if (clk == &apll96_ck)
+                cval = (1 << 8);
+        else if (clk == &apll54_ck)
+                cval = (1 << 6);
+        while (!CM_IDLEST_CKGEN & cval) {               /* Wait for lock */
+                ++i;
+                udelay(1);
+                if (i == 100000)
+                        break;
+        }
+}
+/* Enables clock without considering parent dependencies or use count
+ * REVISIT: Maybe change this to use clk->enable like on omap1?
+ */
+static int omap2_clk_enable(struct clk * clk)
+{
+        u32 regval32;
+        if (clk->flags & ALWAYS_ENABLED)
+                return 0;
+        if (unlikely(clk->enable_reg == 0)) {
+                printk(KERN_ERR "clock.c: Enable for %s without enable code\n",
+                       clk->name);
+                return 0;
+        }
+        if (clk->enable_reg == (void __iomem *)&CM_CLKEN_PLL) {
+                omap2_clk_fixed_enable(clk);
+                return 0;
+        }
+        regval32 = __raw_readl(clk->enable_reg);
+        regval32 |= (1 << clk->enable_bit);
+        __raw_writel(regval32, clk->enable_reg);
+        return 0;
+}
+/* Stop APLL */
+static void omap2_clk_fixed_disable(struct clk *clk)
+{
+        u32 cval;
+        if(clk->enable_bit == 0xff)             /* let parent off do it */
+                return;
+        cval = CM_CLKEN_PLL;
+        cval &= ~(0x3 << clk->enable_bit);
+        CM_CLKEN_PLL = cval;
+}
+/* Disables clock without considering parent dependencies or use count */
+static void omap2_clk_disable(struct clk *clk)
+{
+        u32 regval32;
+        if (clk->enable_reg == 0)
+                return;
+        if (clk->enable_reg == (void __iomem *)&CM_CLKEN_PLL) {
+                omap2_clk_fixed_disable(clk);
+                return;
+        }
+        regval32 = __raw_readl(clk->enable_reg);
+        regval32 &= ~(1 << clk->enable_bit);
+        __raw_writel(regval32, clk->enable_reg);
+}
+static int omap2_clk_use(struct clk *clk)
+{
+        int ret = 0;
+        if (clk->usecount++ == 0) {
+                if (likely((u32)clk->parent))
+                        ret = omap2_clk_use(clk->parent);
+                if (unlikely(ret != 0)) {
+                        clk->usecount--;
+                        return ret;
+                }
+                ret = omap2_clk_enable(clk);
+                if (unlikely(ret != 0) && clk->parent) {
+                        omap2_clk_unuse(clk->parent);
+                        clk->usecount--;
+                }
+        }
+        return ret;
+}
+static void omap2_clk_unuse(struct clk *clk)
+{
+        if (clk->usecount > 0 && !(--clk->usecount)) {
+                omap2_clk_disable(clk);
+                if (likely((u32)clk->parent))
+                        omap2_clk_unuse(clk->parent);
+        }
+}
+/*
+ * Uses the current prcm set to tell if a rate is valid.
+ * You can go slower, but not faster within a given rate set.
+ */
+static u32 omap2_dpll_round_rate(unsigned long target_rate)
+{
+        u32 high, low;
+        if ((CM_CLKSEL2_PLL & 0x3) == 1) {      /* DPLL clockout */
+                high = curr_prcm_set->dpll_speed * 2;
+                low = curr_prcm_set->dpll_speed;
+        } else {                                /* DPLL clockout x 2 */
+                high = curr_prcm_set->dpll_speed;
+                low = curr_prcm_set->dpll_speed / 2;
+        }
+#ifdef DOWN_VARIABLE_DPLL
+        if (target_rate > high)
+                return high;
+        else
+                return target_rate;
+#else
+        if (target_rate > low)
+                return high;
+        else
+                return low;
+#endif
+}
+/*
+ * Used for clocks that are part of CLKSEL_xyz governed clocks.
+ * REVISIT: Maybe change to use clk->enable() functions like on omap1?
+ */
+static void omap2_clksel_recalc(struct clk * clk)
+{
+        u32 fixed = 0, div = 0;
+        if (clk == &dpll_ck) {
+                clk->rate = omap2_get_dpll_rate(clk);
+                fixed = 1;
+                div = 0;
+        }
+        if (clk == &iva1_mpu_int_ifck) {
+                div = 2;
+                fixed = 1;
+        }
+        if ((clk == &dss1_fck) && ((CM_CLKSEL1_CORE & (0x1f << 8)) == 0)) {
+                clk->rate = sys_ck.rate;
+                return;
+        }
+        if (!fixed) {
+                div = omap2_clksel_get_divisor(clk);
+                if (div == 0)
+                        return;
+        }
+        if (div != 0) {
+                if (unlikely(clk->rate == clk->parent->rate / div))
+                        return;
+                clk->rate = clk->parent->rate / div;
+        }
+        if (unlikely(clk->flags & RATE_PROPAGATES))
+                propagate_rate(clk);
+}
+/*
+ * Finds best divider value in an array based on the source and target
+ * rates. The divider array must be sorted with smallest divider first.
+ */
+static inline u32 omap2_divider_from_table(u32 size, u32 *div_array,
+                                           u32 src_rate, u32 tgt_rate)
+{
+        int i, test_rate;
+        if (div_array == NULL)
+                return ~1;
+        for (i=0; i < size; i++) {
+                test_rate = src_rate / *div_array;
+                if (test_rate <= tgt_rate)
+                        return *div_array;
+                ++div_array;
+        }
+        return ~0;      /* No acceptable divider */
+}
+/*
+ * Find divisor for the given clock and target rate.
+ *
+ * Note that this will not work for clocks which are part of CONFIG_PARTICIPANT,
+ * they are only settable as part of virtual_prcm set.
+ */
+static u32 omap2_clksel_round_rate(struct clk *tclk, u32 target_rate,
+        u32 *new_div)
+{
+        u32 gfx_div[] = {2, 3, 4};
+        u32 sysclkout_div[] = {1, 2, 4, 8, 16};
+        u32 dss1_div[] = {1, 2, 3, 4, 5, 6, 8, 9, 12, 16};
+        u32 vylnq_div[] = {1, 2, 3, 4, 6, 8, 9, 12, 16, 18};
+        u32 best_div = ~0, asize = 0;
+        u32 *div_array = NULL;
+        switch (tclk->flags & SRC_RATE_SEL_MASK) {
+        case CM_GFX_SEL1:
+                asize = 3;
+                div_array = gfx_div;
+                break;
+        case CM_PLL_SEL1:
+                return omap2_dpll_round_rate(target_rate);
+        case CM_SYSCLKOUT_SEL1:
+                asize = 5;
+                div_array = sysclkout_div;
+                break;
+        case CM_CORE_SEL1:
+                if(tclk == &dss1_fck){
+                        if(tclk->parent == &core_ck){
+                                asize = 10;
+                                div_array = dss1_div;
+                        } else {
+                                *new_div = 0; /* fixed clk */
+                                return(tclk->parent->rate);
+                        }
+                } else if((tclk == &vlynq_fck) && cpu_is_omap2420()){
+                        if(tclk->parent == &core_ck){
+                                asize = 10;
+                                div_array = vylnq_div;
+                        } else {
+                                *new_div = 0; /* fixed clk */
+                                return(tclk->parent->rate);
+                        }
+                }
+                break;
+        }
+        best_div = omap2_divider_from_table(asize, div_array,
+         tclk->parent->rate, target_rate);
+        if (best_div == ~0){
+                *new_div = 1;
+                return best_div; /* signal error */
+        }
+        *new_div = best_div;
+        return (tclk->parent->rate / best_div);
+}
+/* Given a clock and a rate apply a clock specific rounding function */
+static long omap2_clk_round_rate(struct clk *clk, unsigned long rate)
+{
+        u32 new_div = 0;
+        int valid_rate;
+        if (clk->flags & RATE_FIXED)
+                return clk->rate;
+        if (clk->flags & RATE_CKCTL) {
+                valid_rate = omap2_clksel_round_rate(clk, rate, &new_div);
+                return valid_rate;
+        }
+        if (clk->round_rate != 0)
+                return clk->round_rate(clk, rate);
+        return clk->rate;
+}
+/*
+ * Check the DLL lock state, and return tue if running in unlock mode.
+ * This is needed to compenste for the shifted DLL value in unlock mode.
+ */
+static u32 omap2_dll_force_needed(void)
+{
+        u32 dll_state = SDRC_DLLA_CTRL;         /* dlla and dllb are a set */
+        if ((dll_state & (1 << 2)) == (1 << 2))
+                return 1;
+        else
+                return 0;
+}
+static void omap2_init_memory_params(u32 force_lock_to_unlock_mode)
+{
+        unsigned long dll_cnt;
+        u32 fast_dll = 0;
+        mem_timings.m_type = !((SDRC_MR_0 & 0x3) == 0x1); /* DDR = 1, SDR = 0 */
+        /* 2422 es2.05 and beyond has a single SIP DDR instead of 2 like others.
+         * In the case of 2422, its ok to use CS1 instead of CS0.
+         */
+#if 0   /* FIXME: Enable after 24xx cpu detection works */
+        ctype = get_cpu_type();
+        if (cpu_is_omap2422())
+                mem_timings.base_cs = 1;
+        else
+#endif
+                mem_timings.base_cs = 0;
+        if (mem_timings.m_type != M_DDR)
+                return;
+        /* With DDR we need to determine the low frequency DLL value */
+        if (((mem_timings.fast_dll_ctrl & (1 << 2)) == M_LOCK_CTRL))
+                mem_timings.dll_mode = M_UNLOCK;
+        else
+                mem_timings.dll_mode = M_LOCK;
+        if (mem_timings.base_cs == 0) {
+                fast_dll = SDRC_DLLA_CTRL;
+                dll_cnt = SDRC_DLLA_STATUS & 0xff00;
+        } else {
+                fast_dll = SDRC_DLLB_CTRL;
+                dll_cnt = SDRC_DLLB_STATUS & 0xff00;
+        }
+        if (force_lock_to_unlock_mode) {
+                fast_dll &= ~0xff00;
+                fast_dll |= dll_cnt;            /* Current lock mode */
+        }
+        mem_timings.fast_dll_ctrl = fast_dll;
+        /* No disruptions, DDR will be offline & C-ABI not followed */
+        omap2_sram_ddr_init(&mem_timings.slow_dll_ctrl,
+                            mem_timings.fast_dll_ctrl,
+                            mem_timings.base_cs,
+                            force_lock_to_unlock_mode);
+        mem_timings.slow_dll_ctrl &= 0xff00;    /* Keep lock value */
+        /* Turn status into unlock ctrl */
+        mem_timings.slow_dll_ctrl |=
+                ((mem_timings.fast_dll_ctrl & 0xF) | (1 << 2));
+        /* 90 degree phase for anything below 133Mhz */
+        mem_timings.slow_dll_ctrl |= (1 << 1);
+}
+static u32 omap2_reprogram_sdrc(u32 level, u32 force)
+{
+        u32 prev = curr_perf_level, flags;
+        if ((curr_perf_level == level) && !force)
+                return prev;
+        if (level == PRCM_HALF_SPEED) {
+                local_irq_save(flags);
+                PRCM_VOLTSETUP = 0xffff;
+                omap2_sram_reprogram_sdrc(PRCM_HALF_SPEED,
+                                          mem_timings.slow_dll_ctrl,
+                                          mem_timings.m_type);
+                curr_perf_level = PRCM_HALF_SPEED;
+                local_irq_restore(flags);
+        }
+        if (level == PRCM_FULL_SPEED) {
+                local_irq_save(flags);
+                PRCM_VOLTSETUP = 0xffff;
+                omap2_sram_reprogram_sdrc(PRCM_FULL_SPEED,
+                                          mem_timings.fast_dll_ctrl,
+                                          mem_timings.m_type);
+                curr_perf_level = PRCM_FULL_SPEED;
+                local_irq_restore(flags);
+        }
+        return prev;
+}
+static int omap2_reprogram_dpll(struct clk * clk, unsigned long rate)
+{
+        u32 flags, cur_rate, low, mult, div, valid_rate, done_rate;
+        u32 bypass = 0;
+        struct prcm_config tmpset;
+        int ret = -EINVAL;
+        local_irq_save(flags);
+        cur_rate = omap2_get_dpll_rate(&dpll_ck);
+        mult = CM_CLKSEL2_PLL & 0x3;
+        if ((rate == (cur_rate / 2)) && (mult == 2)) {
+                omap2_reprogram_sdrc(PRCM_HALF_SPEED, 1);
+        } else if ((rate == (cur_rate * 2)) && (mult == 1)) {
+                omap2_reprogram_sdrc(PRCM_FULL_SPEED, 1);
+        } else if (rate != cur_rate) {
+                valid_rate = omap2_dpll_round_rate(rate);
+                if (valid_rate != rate)
+                        goto dpll_exit;
+                if ((CM_CLKSEL2_PLL & 0x3) == 1)
+                        low = curr_prcm_set->dpll_speed;
+                else
+                        low = curr_prcm_set->dpll_speed / 2;
+                tmpset.cm_clksel1_pll = CM_CLKSEL1_PLL;
+                tmpset.cm_clksel1_pll &= ~(0x3FFF << 8);
+                div = ((curr_prcm_set->xtal_speed / 1000000) - 1);
+                tmpset.cm_clksel2_pll = CM_CLKSEL2_PLL;
+                tmpset.cm_clksel2_pll &= ~0x3;
+                if (rate > low) {
+                        tmpset.cm_clksel2_pll |= 0x2;
+                        mult = ((rate / 2) / 1000000);
+                        done_rate = PRCM_FULL_SPEED;
+                } else {
+                        tmpset.cm_clksel2_pll |= 0x1;
+                        mult = (rate / 1000000);
+                        done_rate = PRCM_HALF_SPEED;
+                }
+                tmpset.cm_clksel1_pll |= ((div << 8) | (mult << 12));
+                /* Worst case */
+                tmpset.base_sdrc_rfr = V24XX_SDRC_RFR_CTRL_BYPASS;
+                if (rate == curr_prcm_set->xtal_speed)  /* If asking for 1-1 */
+                        bypass = 1;
+                omap2_reprogram_sdrc(PRCM_FULL_SPEED, 1); /* For init_mem */
+                /* Force dll lock mode */
+                omap2_set_prcm(tmpset.cm_clksel1_pll, tmpset.base_sdrc_rfr,
+                               bypass);
+                /* Errata: ret dll entry state */
+                omap2_init_memory_params(omap2_dll_force_needed());
+                omap2_reprogram_sdrc(done_rate, 0);
+        }
+        omap2_clksel_recalc(&dpll_ck);
+        ret = 0;
+dpll_exit:
+        local_irq_restore(flags);
+        return(ret);
+}
+/* Just return the MPU speed */
+static void omap2_mpu_recalc(struct clk * clk)
+{
+        clk->rate = curr_prcm_set->mpu_speed;
+}
+/*
+ * Look for a rate equal or less than the target rate given a configuration set.
+ *
+ * What's not entirely clear is "which" field represents the key field.
+ * Some might argue L3-DDR, others ARM, others IVA. This code is simple and
+ * just uses the ARM rates.
+ */
+static long omap2_round_to_table_rate(struct clk * clk, unsigned long rate)
+{
+        struct prcm_config * ptr;
+        long highest_rate;
+        if (clk != &virt_prcm_set)
+                return -EINVAL;
+        highest_rate = -EINVAL;
+        for (ptr = rate_table; ptr->mpu_speed; ptr++) {
+                if (ptr->xtal_speed != sys_ck.rate)
+                        continue;
+                highest_rate = ptr->mpu_speed;
+                /* Can check only after xtal frequency check */
+                if (ptr->mpu_speed <= rate)
+                        break;
+        }
+        return highest_rate;
+}
+/*
+ * omap2_convert_field_to_div() - turn field value into integer divider
+ */
+static u32 omap2_clksel_to_divisor(u32 div_sel, u32 field_val)
+{
+        u32 i;
+        u32 clkout_array[] = {1, 2, 4, 8, 16};
+        if ((div_sel & SRC_RATE_SEL_MASK) == CM_SYSCLKOUT_SEL1) {
+                for (i = 0; i < 5; i++) {
+                        if (field_val == i)
+                                return clkout_array[i];
+                }
+                return ~0;
+        } else
+                return field_val;
+}
+/*
+ * Returns the CLKSEL divider register value
+ * REVISIT: This should be cleaned up to work nicely with void __iomem *
+ */
+static u32 omap2_get_clksel(u32 *div_sel, u32 *field_mask,
+                            struct clk *clk)
+{
+        int ret = ~0;
+        u32 reg_val, div_off;
+        u32 div_addr = 0;
+        u32 mask = ~0;
+        div_off = clk->rate_offset;
+        switch ((*div_sel & SRC_RATE_SEL_MASK)) {
+        case CM_MPU_SEL1:
+                div_addr = (u32)&CM_CLKSEL_MPU;
+                mask = 0x1f;
+                break;
+        case CM_DSP_SEL1:
+                div_addr = (u32)&CM_CLKSEL_DSP;
+                if (cpu_is_omap2420()) {
+                        if ((div_off == 0) || (div_off == 8))
+                                mask = 0x1f;
+                        else if (div_off == 5)
+                                mask = 0x3;
+                } else if (cpu_is_omap2430()) {
+                        if (div_off == 0)
+                                mask = 0x1f;
+                        else if (div_off == 5)
+                                mask = 0x3;
+                }
+                break;
+        case CM_GFX_SEL1:
+                div_addr = (u32)&CM_CLKSEL_GFX;
+                if (div_off == 0)
+                        mask = 0x7;
+                break;
+        case CM_MODEM_SEL1:
+                div_addr = (u32)&CM_CLKSEL_MDM;
+                if (div_off == 0)
+                        mask = 0xf;
+                break;
+        case CM_SYSCLKOUT_SEL1:
+                div_addr = (u32)&PRCM_CLKOUT_CTRL;
+                if ((div_off == 3) || (div_off = 11))
+                        mask= 0x3;
+                break;
+        case CM_CORE_SEL1:
+                div_addr = (u32)&CM_CLKSEL1_CORE;
+                switch (div_off) {
+                case 0:                                 /* l3 */
+                case 8:                                 /* dss1 */
+                case 15:                                /* vylnc-2420 */
+                case 20:                                /* ssi */
+                        mask = 0x1f; break;
+                case 5:                                 /* l4 */
+                        mask = 0x3; break;
+                case 13:                                /* dss2 */
+                        mask = 0x1; break;
+                case 25:                                /* usb */
+                        mask = 0xf; break;
+                }
+        }
+        *field_mask = mask;
+        if (unlikely(mask == ~0))
+                div_addr = 0;
+        *div_sel = div_addr;
+        if (unlikely(div_addr == 0))
+                return ret;
+        /* Isolate field */
+        reg_val = __raw_readl((void __iomem *)div_addr) & (mask << div_off);
+        /* Normalize back to divider value */
+        reg_val >>= div_off;
+        return reg_val;
+}
+/*
+ * Return divider to be applied to parent clock.
+ * Return 0 on error.
+ */
+static u32 omap2_clksel_get_divisor(struct clk *clk)
+{
+        int ret = 0;
+        u32 div, div_sel, div_off, field_mask, field_val;
+        /* isolate control register */
+        div_sel = (SRC_RATE_SEL_MASK & clk->flags);
+        div_off = clk->rate_offset;
+        field_val = omap2_get_clksel(&div_sel, &field_mask, clk);
+        if (div_sel == 0)
+                return ret;
+        div_sel = (SRC_RATE_SEL_MASK & clk->flags);
+        div = omap2_clksel_to_divisor(div_sel, field_val);
+        return div;
+}
+/* Set the clock rate for a clock source */
+static int omap2_clk_set_rate(struct clk *clk, unsigned long rate)
+{
+        int ret = -EINVAL;
+        void __iomem * reg;
+        u32 div_sel, div_off, field_mask, field_val, reg_val, validrate;
+        u32 new_div = 0;
+        if (!(clk->flags & CONFIG_PARTICIPANT) && (clk->flags & RATE_CKCTL)) {
+                if (clk == &dpll_ck)
+                        return omap2_reprogram_dpll(clk, rate);
+                /* Isolate control register */
+                div_sel = (SRC_RATE_SEL_MASK & clk->flags);
+                div_off = clk->src_offset;
+                validrate = omap2_clksel_round_rate(clk, rate, &new_div);
+                if(validrate != rate)
+                        return(ret);
+                field_val = omap2_get_clksel(&div_sel, &field_mask, clk);
+                if (div_sel == 0)
+                        return ret;
+                if(clk->flags & CM_SYSCLKOUT_SEL1){
+                        switch(new_div){
+                        case 16: field_val = 4; break;
+                        case 8:  field_val = 3; break;
+                        case 4:  field_val = 2; break;
+                        case 2:  field_val = 1; break;
+                        case 1:  field_val = 0; break;
+                        }
+                }
+                else
+                        field_val = new_div;
+                reg = (void __iomem *)div_sel;
+                reg_val = __raw_readl(reg);
+                reg_val &= ~(field_mask << div_off);
+                reg_val |= (field_val << div_off);
+                __raw_writel(reg_val, reg);
+                clk->rate = clk->parent->rate / field_val;
+                if (clk->flags & DELAYED_APP)
+                        __raw_writel(0x1, (void __iomem *)&PRCM_CLKCFG_CTRL);
+                ret = 0;
+        } else if (clk->set_rate != 0)
+                ret = clk->set_rate(clk, rate);
+        if (unlikely(ret == 0 && (clk->flags & RATE_PROPAGATES)))
+                propagate_rate(clk);
+        return ret;
+}
+/* Converts encoded control register address into a full address */
+static u32 omap2_get_src_field(u32 *type_to_addr, u32 reg_offset,
+                               struct clk *src_clk, u32 *field_mask)
+{
+        u32 val = ~0, src_reg_addr = 0, mask = 0;
+        /* Find target control register.*/
+        switch ((*type_to_addr & SRC_RATE_SEL_MASK)) {
+        case CM_CORE_SEL1:
+                src_reg_addr = (u32)&CM_CLKSEL1_CORE;
+                if (reg_offset == 13) {                 /* DSS2_fclk */
+                        mask = 0x1;
+                        if (src_clk == &sys_ck)
+                                val = 0;
+                        if (src_clk == &func_48m_ck)
+                                val = 1;
+                } else if (reg_offset == 8) {           /* DSS1_fclk */
+                        mask = 0x1f;
+                        if (src_clk == &sys_ck)
+                                val = 0;
+                        else if (src_clk == &core_ck)   /* divided clock */
+                                val = 0x10;             /* rate needs fixing */
+                } else if ((reg_offset == 15) && cpu_is_omap2420()){ /*vlnyq*/
+                        mask = 0x1F;
+                        if(src_clk == &func_96m_ck)
+                                val = 0;
+                        else if (src_clk == &core_ck)
+                                val = 0x10;
+                }
+                break;
+        case CM_CORE_SEL2:
+                src_reg_addr = (u32)&CM_CLKSEL2_CORE;
+                mask = 0x3;
+                if (src_clk == &func_32k_ck)
+                        val = 0x0;
+                if (src_clk == &sys_ck)
+                        val = 0x1;
+                if (src_clk == &alt_ck)
+                        val = 0x2;
+                break;
+        case CM_WKUP_SEL1:
+                src_reg_addr = (u32)&CM_CLKSEL2_CORE;
+                mask = 0x3;
+                if (src_clk == &func_32k_ck)
+                        val = 0x0;
+                if (src_clk == &sys_ck)
+                        val = 0x1;
+                if (src_clk == &alt_ck)
+                        val = 0x2;
+                break;
+        case CM_PLL_SEL1:
+                src_reg_addr = (u32)&CM_CLKSEL1_PLL;
+                mask = 0x1;
+                if (reg_offset == 0x3) {
+                        if (src_clk == &apll96_ck)
+                                val = 0;
+                        if (src_clk == &alt_ck)
+                                val = 1;
+                }
+                else if (reg_offset == 0x5) {
+                        if (src_clk == &apll54_ck)
+                                val = 0;
+                        if (src_clk == &alt_ck)
+                                val = 1;
+                }
+                break;
+        case CM_PLL_SEL2:
+                src_reg_addr = (u32)&CM_CLKSEL2_PLL;
+                mask = 0x3;
+                if (src_clk == &func_32k_ck)
+                        val = 0x0;
+                if (src_clk == &dpll_ck)
+                        val = 0x2;
+                break;
+        case CM_SYSCLKOUT_SEL1:
+                src_reg_addr = (u32)&PRCM_CLKOUT_CTRL;
+                mask = 0x3;
+                if (src_clk == &dpll_ck)
+                        val = 0;
+                if (src_clk == &sys_ck)
+                        val = 1;
+                if (src_clk == &func_54m_ck)
+                        val = 2;
+                if (src_clk == &func_96m_ck)
+                        val = 3;
+                break;
+        }
+        if (val == ~0)                  /* Catch errors in offset */
+                *type_to_addr = 0;
+        else
+                *type_to_addr = src_reg_addr;
+        *field_mask = mask;
+        return val;
+}
+static int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent)
+{
+        void __iomem * reg;
+        u32 src_sel, src_off, field_val, field_mask, reg_val, rate;
+        int ret = -EINVAL;
+        if (unlikely(clk->flags & CONFIG_PARTICIPANT))
+                return ret;
+        if (clk->flags & SRC_SEL_MASK) {        /* On-chip SEL collection */
+                src_sel = (SRC_RATE_SEL_MASK & clk->flags);
+                src_off = clk->src_offset;
+                if (src_sel == 0)
+                        goto set_parent_error;
+                field_val = omap2_get_src_field(&src_sel, src_off, new_parent,
+                                                &field_mask);
+                reg = (void __iomem *)src_sel;
+                if (clk->usecount > 0)
+                        omap2_clk_disable(clk);
+                /* Set new source value (previous dividers if any in effect) */
+                reg_val = __raw_readl(reg) & ~(field_mask << src_off);
+                reg_val |= (field_val << src_off);
+                __raw_writel(reg_val, reg);
+                if (clk->flags & DELAYED_APP)
+                        __raw_writel(0x1, (void __iomem *)&PRCM_CLKCFG_CTRL);
+                if (clk->usecount > 0)
+                        omap2_clk_enable(clk);
+                clk->parent = new_parent;
+                /* SRC_RATE_SEL_MASK clocks follow their parents rates.*/
+                if ((new_parent == &core_ck) && (clk == &dss1_fck))
+                        clk->rate = new_parent->rate / 0x10;
+                else
+                        clk->rate = new_parent->rate;
+                if (unlikely(clk->flags & RATE_PROPAGATES))
+                        propagate_rate(clk);
+                return 0;
+        } else {
+                clk->parent = new_parent;
+                rate = new_parent->rate;
+                omap2_clk_set_rate(clk, rate);
+                ret = 0;
+        }
+ set_parent_error:
+        return ret;
+}
+/* Sets basic clocks based on the specified rate */
+static int omap2_select_table_rate(struct clk * clk, unsigned long rate)
+{
+        u32 flags, cur_rate, done_rate, bypass = 0;
+        u8 cpu_mask = 0;
+        struct prcm_config *prcm;
+        unsigned long found_speed = 0;
+        if (clk != &virt_prcm_set)
+                return -EINVAL;
+        /* FIXME: Change cpu_is_omap2420() to cpu_is_omap242x() */
+        if (cpu_is_omap2420())
+                cpu_mask = RATE_IN_242X;
+        else if (cpu_is_omap2430())
+                cpu_mask = RATE_IN_243X;
+        for (prcm = rate_table; prcm->mpu_speed; prcm++) {
+                if (!(prcm->flags & cpu_mask))
+                        continue;
+                if (prcm->xtal_speed != sys_ck.rate)
+                        continue;
+                if (prcm->mpu_speed <= rate) {
+                        found_speed = prcm->mpu_speed;
+                        break;
+                }
+        }
+        if (!found_speed) {
+                printk(KERN_INFO "Could not set MPU rate to %luMHz\n",
+         rate / 1000000);
+                return -EINVAL;
+        }
+        curr_prcm_set = prcm;
+        cur_rate = omap2_get_dpll_rate(&dpll_ck);
+        if (prcm->dpll_speed == cur_rate / 2) {
+                omap2_reprogram_sdrc(PRCM_HALF_SPEED, 1);
+        } else if (prcm->dpll_speed == cur_rate * 2) {
+                omap2_reprogram_sdrc(PRCM_FULL_SPEED, 1);
+        } else if (prcm->dpll_speed != cur_rate) {
+                local_irq_save(flags);
+                if (prcm->dpll_speed == prcm->xtal_speed)
+                        bypass = 1;
+                if ((prcm->cm_clksel2_pll & 0x3) == 2)
+                        done_rate = PRCM_FULL_SPEED;
+                else
+                        done_rate = PRCM_HALF_SPEED;
+                /* MPU divider */
+                CM_CLKSEL_MPU = prcm->cm_clksel_mpu;
+                /* dsp + iva1 div(2420), iva2.1(2430) */
+                CM_CLKSEL_DSP = prcm->cm_clksel_dsp;
+                CM_CLKSEL_GFX = prcm->cm_clksel_gfx;
+                /* Major subsystem dividers */
+                CM_CLKSEL1_CORE = prcm->cm_clksel1_core;
+                if (cpu_is_omap2430())
+                        CM_CLKSEL_MDM = prcm->cm_clksel_mdm;
+                /* x2 to enter init_mem */
+                omap2_reprogram_sdrc(PRCM_FULL_SPEED, 1);
+                omap2_set_prcm(prcm->cm_clksel1_pll, prcm->base_sdrc_rfr,
+                               bypass);
+                omap2_init_memory_params(omap2_dll_force_needed());
+                omap2_reprogram_sdrc(done_rate, 0);
+                local_irq_restore(flags);
+        }
+        omap2_clksel_recalc(&dpll_ck);
+        return 0;
+}
+/*-------------------------------------------------------------------------
+ * Omap2 clock reset and init functions
+ *-------------------------------------------------------------------------*/
+static struct clk_functions omap2_clk_functions = {
+        .clk_enable             = omap2_clk_enable,
+        .clk_disable            = omap2_clk_disable,
+        .clk_use                = omap2_clk_use,
+        .clk_unuse              = omap2_clk_unuse,
+        .clk_round_rate         = omap2_clk_round_rate,
+        .clk_set_rate           = omap2_clk_set_rate,
+        .clk_set_parent         = omap2_clk_set_parent,
+};
+static void __init omap2_get_crystal_rate(struct clk *osc, struct clk *sys)
+{
+        u32 div, aplls, sclk = 13000000;
+        aplls = CM_CLKSEL1_PLL;
+        aplls &= ((1 << 23) | (1 << 24) | (1 << 25));
+        aplls >>= 23;                   /* Isolate field, 0,2,3 */
+        if (aplls == 0)
+                sclk = 19200000;
+        else if (aplls == 2)
+                sclk = 13000000;
+        else if (aplls == 3)
+                sclk = 12000000;
+        div = PRCM_CLKSRC_CTRL;
+        div &= ((1 << 7) | (1 << 6));
+        div >>= sys->rate_offset;
+        osc->rate = sclk * div;
+        sys->rate = sclk;
+}
+#ifdef CONFIG_OMAP_RESET_CLOCKS
+static void __init omap2_disable_unused_clocks(void)
+{
+        struct clk *ck;
+        u32 regval32;
+        list_for_each_entry(ck, &clocks, node) {
+                if (ck->usecount > 0 || (ck->flags & ALWAYS_ENABLED) ||
+                        ck->enable_reg == 0)
+                        continue;
+                regval32 = __raw_readl(ck->enable_reg);
+                if ((regval32 & (1 << ck->enable_bit)) == 0)
+                        continue;
+                printk(KERN_INFO "Disabling unused clock \"%s\"\n", ck->name);
+                omap2_clk_disable(ck);
+        }
+}
+late_initcall(omap2_disable_unused_clocks);
+#endif
+/*
+ * Switch the MPU rate if specified on cmdline.
+ * We cannot do this early until cmdline is parsed.
+ */
+static int __init omap2_clk_arch_init(void)
+{
+        if (!mpurate)
+                return -EINVAL;
+        if (omap2_select_table_rate(&virt_prcm_set, mpurate))
+                printk(KERN_ERR "Could not find matching MPU rate\n");
+        propagate_rate(&osc_ck);                /* update main root fast */
+        propagate_rate(&func_32k_ck);           /* update main root slow */
+        printk(KERN_INFO "Switched to new clocking rate (Crystal/DPLL/MPU): "
+               "%ld.%01ld/%ld/%ld MHz\n",
+               (sys_ck.rate / 1000000), (sys_ck.rate / 100000) % 10,
+               (dpll_ck.rate / 1000000), (mpu_ck.rate / 1000000)) ;
+        return 0;
+}
+arch_initcall(omap2_clk_arch_init);
+int __init omap2_clk_init(void)
+{
+        struct prcm_config *prcm;
+        struct clk ** clkp;
+        u32 clkrate;
+        clk_init(&omap2_clk_functions);
+        omap2_get_crystal_rate(&osc_ck, &sys_ck);
+        for (clkp = onchip_clks; clkp < onchip_clks + ARRAY_SIZE(onchip_clks);
+             clkp++) {
+                if ((*clkp)->flags & CLOCK_IN_OMAP242X && cpu_is_omap2420()) {
+                        clk_register(*clkp);
+                        continue;
+                }
+                if ((*clkp)->flags & CLOCK_IN_OMAP243X && cpu_is_omap2430()) {
+                        clk_register(*clkp);
+                        continue;
+                }
+        }
+        /* Check the MPU rate set by bootloader */
+        clkrate = omap2_get_dpll_rate(&dpll_ck);
+        for (prcm = rate_table; prcm->mpu_speed; prcm++) {
+                if (prcm->xtal_speed != sys_ck.rate)
+                        continue;
+                if (prcm->dpll_speed <= clkrate)
+                         break;
+        }
+        curr_prcm_set = prcm;
+        propagate_rate(&osc_ck);                /* update main root fast */
+        propagate_rate(&func_32k_ck);           /* update main root slow */
+        printk(KERN_INFO "Clocking rate (Crystal/DPLL/MPU): "
+               "%ld.%01ld/%ld/%ld MHz\n",
+               (sys_ck.rate / 1000000), (sys_ck.rate / 100000) % 10,
+               (dpll_ck.rate / 1000000), (mpu_ck.rate / 1000000)) ;
+        /*
+         * Only enable those clocks we will need, let the drivers
+         * enable other clocks as necessary
+         */
+        clk_use(&sync_32k_ick);
+        clk_use(&omapctrl_ick);
+        if (cpu_is_omap2430())
+                clk_use(&sdrc_ick);
+        return 0;
+}
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
new file mode 100644
index 000000000000..4aeab5591bd3
--- /dev/null
+++ b/arch/arm/mach-omap2/clock.h
@@ -0,0 +1,2103 @@
+/*
+ *  linux/arch/arm/mach-omap24xx/clock.h
+ *
+ *  Copyright (C) 2005 Texas Instruments Inc.
+ *  Richard Woodruff <r-woodruff2@ti.com>
+ *  Created for OMAP2.
+ *
+ *  Copyright (C) 2004 Nokia corporation
+ *  Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
+ *  Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ARCH_ARM_MACH_OMAP2_CLOCK_H
+#define __ARCH_ARM_MACH_OMAP2_CLOCK_H
+static void omap2_sys_clk_recalc(struct clk * clk);
+static void omap2_clksel_recalc(struct clk * clk);
+static void omap2_followparent_recalc(struct clk * clk);
+static void omap2_propagate_rate(struct clk * clk);
+static void omap2_mpu_recalc(struct clk * clk);
+static int omap2_select_table_rate(struct clk * clk, unsigned long rate);
+static long omap2_round_to_table_rate(struct clk * clk, unsigned long rate);
+static void omap2_clk_unuse(struct clk *clk);
+static void omap2_sys_clk_recalc(struct clk * clk);
+static u32 omap2_clksel_to_divisor(u32 div_sel, u32 field_val);
+static u32 omap2_clksel_get_divisor(struct clk *clk);
+#define RATE_IN_242X    (1 << 0)
+#define RATE_IN_243X    (1 << 1)
+/* Memory timings */
+#define M_DDR           1
+#define M_LOCK_CTRL     (1 << 2)
+#define M_UNLOCK        0
+#define M_LOCK          1
+struct memory_timings {
+        u32 m_type;             /* ddr = 1, sdr = 0 */
+        u32 dll_mode;           /* use lock mode = 1, unlock mode = 0 */
+        u32 slow_dll_ctrl;      /* unlock mode, dll value for slow speed */
+        u32 fast_dll_ctrl;      /* unlock mode, dll value for fast speed */
+        u32 base_cs;            /* base chip select to use for calculations */
+};
+/* Key dividers which make up a PRCM set. Ratio's for a PRCM are mandated.
+ * xtal_speed, dpll_speed, mpu_speed, CM_CLKSEL_MPU,CM_CLKSEL_DSP
+ * CM_CLKSEL_GFX, CM_CLKSEL1_CORE, CM_CLKSEL1_PLL CM_CLKSEL2_PLL, CM_CLKSEL_MDM
+ */
+struct prcm_config {
+        unsigned long xtal_speed;       /* crystal rate */
+        unsigned long dpll_speed;       /* dpll: out*xtal*M/(N-1)table_recalc */
+        unsigned long mpu_speed;        /* speed of MPU */
+        unsigned long cm_clksel_mpu;    /* mpu divider */
+        unsigned long cm_clksel_dsp;    /* dsp+iva1 div(2420), iva2.1(2430) */
+        unsigned long cm_clksel_gfx;    /* gfx dividers */
+        unsigned long cm_clksel1_core;  /* major subsystem dividers */
+        unsigned long cm_clksel1_pll;   /* m,n */
+        unsigned long cm_clksel2_pll;   /* dpllx1 or x2 out */
+        unsigned long cm_clksel_mdm;    /* modem dividers 2430 only */
+        unsigned long base_sdrc_rfr;    /* base refresh timing for a set */
+        unsigned char flags;
+};
+/* Mask for clksel which support parent settign in set_rate */
+#define SRC_SEL_MASK (CM_CORE_SEL1 | CM_CORE_SEL2 | CM_WKUP_SEL1 | \
+                        CM_PLL_SEL1 | CM_PLL_SEL2 | CM_SYSCLKOUT_SEL1)
+/* Mask for clksel regs which support rate operations */
+#define SRC_RATE_SEL_MASK (CM_MPU_SEL1 | CM_DSP_SEL1 | CM_GFX_SEL1 | \
+                        CM_MODEM_SEL1 | CM_CORE_SEL1 | CM_CORE_SEL2 | \
+                        CM_WKUP_SEL1 | CM_PLL_SEL1 | CM_PLL_SEL2 | \
+                        CM_SYSCLKOUT_SEL1)
+/*
+ * The OMAP2 processor can be run at several discrete 'PRCM configurations'.
+ * These configurations are characterized by voltage and speed for clocks.
+ * The device is only validated for certain combinations. One way to express
+ * these combinations is via the 'ratio's' which the clocks operate with
+ * respect to each other. These ratio sets are for a given voltage/DPLL
+ * setting. All configurations can be described by a DPLL setting and a ratio
+ * There are 3 ratio sets for the 2430 and X ratio sets for 2420.
+ *
+ * 2430 differs from 2420 in that there are no more phase synchronizers used.
+ * They both have a slightly different clock domain setup. 2420(iva1,dsp) vs
+ * 2430 (iva2.1, NOdsp, mdm)
+ */
+/* Core fields for cm_clksel, not ratio governed */
+#define RX_CLKSEL_DSS1                  (0x10 << 8)
+#define RX_CLKSEL_DSS2                  (0x0 << 13)
+#define RX_CLKSEL_SSI                   (0x5 << 20)
+/*-------------------------------------------------------------------------
+ * Voltage/DPLL ratios
+ *-------------------------------------------------------------------------*/
+/* 2430 Ratio's, 2430-Ratio Config 1 */
+#define R1_CLKSEL_L3                    (4 << 0)
+#define R1_CLKSEL_L4                    (2 << 5)
+#define R1_CLKSEL_USB                   (4 << 25)
+#define R1_CM_CLKSEL1_CORE_VAL          R1_CLKSEL_USB | RX_CLKSEL_SSI | \
+                                        RX_CLKSEL_DSS2 | RX_CLKSEL_DSS1 | \
+                                        R1_CLKSEL_L4 | R1_CLKSEL_L3
+#define R1_CLKSEL_MPU                   (2 << 0)
+#define R1_CM_CLKSEL_MPU_VAL            R1_CLKSEL_MPU
+#define R1_CLKSEL_DSP                   (2 << 0)
+#define R1_CLKSEL_DSP_IF                (2 << 5)
+#define R1_CM_CLKSEL_DSP_VAL            R1_CLKSEL_DSP | R1_CLKSEL_DSP_IF
+#define R1_CLKSEL_GFX                   (2 << 0)
+#define R1_CM_CLKSEL_GFX_VAL            R1_CLKSEL_GFX
+#define R1_CLKSEL_MDM                   (4 << 0)
+#define R1_CM_CLKSEL_MDM_VAL            R1_CLKSEL_MDM
+/* 2430-Ratio Config 2 */
+#define R2_CLKSEL_L3                    (6 << 0)
+#define R2_CLKSEL_L4                    (2 << 5)
+#define R2_CLKSEL_USB                   (2 << 25)
+#define R2_CM_CLKSEL1_CORE_VAL          R2_CLKSEL_USB | RX_CLKSEL_SSI | \
+                                        RX_CLKSEL_DSS2 | RX_CLKSEL_DSS1 | \
+                                        R2_CLKSEL_L4 | R2_CLKSEL_L3
+#define R2_CLKSEL_MPU                   (2 << 0)
+#define R2_CM_CLKSEL_MPU_VAL            R2_CLKSEL_MPU
+#define R2_CLKSEL_DSP                   (2 << 0)
+#define R2_CLKSEL_DSP_IF                (3 << 5)
+#define R2_CM_CLKSEL_DSP_VAL            R2_CLKSEL_DSP | R2_CLKSEL_DSP_IF
+#define R2_CLKSEL_GFX                   (2 << 0)
+#define R2_CM_CLKSEL_GFX_VAL            R2_CLKSEL_GFX
+#define R2_CLKSEL_MDM                   (6 << 0)
+#define R2_CM_CLKSEL_MDM_VAL            R2_CLKSEL_MDM
+/* 2430-Ratio Bootm (BYPASS) */
+#define RB_CLKSEL_L3                    (1 << 0)
+#define RB_CLKSEL_L4                    (1 << 5)
+#define RB_CLKSEL_USB                   (1 << 25)
+#define RB_CM_CLKSEL1_CORE_VAL          RB_CLKSEL_USB | RX_CLKSEL_SSI | \
+                                        RX_CLKSEL_DSS2 | RX_CLKSEL_DSS1 | \
+                                        RB_CLKSEL_L4 | RB_CLKSEL_L3
+#define RB_CLKSEL_MPU                   (1 << 0)
+#define RB_CM_CLKSEL_MPU_VAL            RB_CLKSEL_MPU
+#define RB_CLKSEL_DSP                   (1 << 0)
+#define RB_CLKSEL_DSP_IF                (1 << 5)
+#define RB_CM_CLKSEL_DSP_VAL            RB_CLKSEL_DSP | RB_CLKSEL_DSP_IF
+#define RB_CLKSEL_GFX                   (1 << 0)
+#define RB_CM_CLKSEL_GFX_VAL            RB_CLKSEL_GFX
+#define RB_CLKSEL_MDM                   (1 << 0)
+#define RB_CM_CLKSEL_MDM_VAL            RB_CLKSEL_MDM
+/* 2420 Ratio Equivalents */
+#define RXX_CLKSEL_VLYNQ                (0x12 << 15)
+#define RXX_CLKSEL_SSI                  (0x8 << 20)
+/* 2420-PRCM III 532MHz core */
+#define RIII_CLKSEL_L3                  (4 << 0)        /* 133MHz */
+#define RIII_CLKSEL_L4                  (2 << 5)        /* 66.5MHz */
+#define RIII_CLKSEL_USB                 (4 << 25)       /* 33.25MHz */
+#define RIII_CM_CLKSEL1_CORE_VAL        RIII_CLKSEL_USB | RXX_CLKSEL_SSI | \
+                                        RXX_CLKSEL_VLYNQ | RX_CLKSEL_DSS2 | \
+                                        RX_CLKSEL_DSS1 | RIII_CLKSEL_L4 | \
+                                        RIII_CLKSEL_L3
+#define RIII_CLKSEL_MPU                 (2 << 0)        /* 266MHz */
+#define RIII_CM_CLKSEL_MPU_VAL          RIII_CLKSEL_MPU
+#define RIII_CLKSEL_DSP                 (3 << 0)        /* c5x - 177.3MHz */
+#define RIII_CLKSEL_DSP_IF              (2 << 5)        /* c5x - 88.67MHz */
+#define RIII_SYNC_DSP                   (1 << 7)        /* Enable sync */
+#define RIII_CLKSEL_IVA                 (6 << 8)        /* iva1 - 88.67MHz */
+#define RIII_SYNC_IVA                   (1 << 13)       /* Enable sync */
+#define RIII_CM_CLKSEL_DSP_VAL          RIII_SYNC_IVA | RIII_CLKSEL_IVA | \
+                                        RIII_SYNC_DSP | RIII_CLKSEL_DSP_IF | \
+                                        RIII_CLKSEL_DSP
+#define RIII_CLKSEL_GFX                 (2 << 0)        /* 66.5MHz */
+#define RIII_CM_CLKSEL_GFX_VAL          RIII_CLKSEL_GFX
+/* 2420-PRCM II 600MHz core */
+#define RII_CLKSEL_L3                   (6 << 0)        /* 100MHz */
+#define RII_CLKSEL_L4                   (2 << 5)        /* 50MHz */
+#define RII_CLKSEL_USB                  (2 << 25)       /* 50MHz */
+#define RII_CM_CLKSEL1_CORE_VAL         RII_CLKSEL_USB | \
+                                        RXX_CLKSEL_SSI | RXX_CLKSEL_VLYNQ | \
+                                        RX_CLKSEL_DSS2 | RX_CLKSEL_DSS1 | \
+                                        RII_CLKSEL_L4 | RII_CLKSEL_L3
+#define RII_CLKSEL_MPU                  (2 << 0)        /* 300MHz */
+#define RII_CM_CLKSEL_MPU_VAL           RII_CLKSEL_MPU
+#define RII_CLKSEL_DSP                  (3 << 0)        /* c5x - 200MHz */
+#define RII_CLKSEL_DSP_IF               (2 << 5)        /* c5x - 100MHz */
+#define RII_SYNC_DSP                    (0 << 7)        /* Bypass sync */
+#define RII_CLKSEL_IVA                  (6 << 8)        /* iva1 - 200MHz */
+#define RII_SYNC_IVA                    (0 << 13)       /* Bypass sync */
+#define RII_CM_CLKSEL_DSP_VAL           RII_SYNC_IVA | RII_CLKSEL_IVA | \
+                                        RII_SYNC_DSP | RII_CLKSEL_DSP_IF | \
+                                        RII_CLKSEL_DSP
+#define RII_CLKSEL_GFX                  (2 << 0)        /* 50MHz */
+#define RII_CM_CLKSEL_GFX_VAL           RII_CLKSEL_GFX
+/* 2420-PRCM VII (boot) */
+#define RVII_CLKSEL_L3                  (1 << 0)
+#define RVII_CLKSEL_L4                  (1 << 5)
+#define RVII_CLKSEL_DSS1                (1 << 8)
+#define RVII_CLKSEL_DSS2                (0 << 13)
+#define RVII_CLKSEL_VLYNQ               (1 << 15)
+#define RVII_CLKSEL_SSI                 (1 << 20)
+#define RVII_CLKSEL_USB                 (1 << 25)
+#define RVII_CM_CLKSEL1_CORE_VAL        RVII_CLKSEL_USB | RVII_CLKSEL_SSI | \
+                                        RVII_CLKSEL_VLYNQ | RVII_CLKSEL_DSS2 | \
+                                        RVII_CLKSEL_DSS1 | RVII_CLKSEL_L4 | RVII_CLKSEL_L3
+#define RVII_CLKSEL_MPU                 (1 << 0) /* all divide by 1 */
+#define RVII_CM_CLKSEL_MPU_VAL          RVII_CLKSEL_MPU
+#define RVII_CLKSEL_DSP                 (1 << 0)
+#define RVII_CLKSEL_DSP_IF              (1 << 5)
+#define RVII_SYNC_DSP                   (0 << 7)
+#define RVII_CLKSEL_IVA                 (1 << 8)
+#define RVII_SYNC_IVA                   (0 << 13)
+#define RVII_CM_CLKSEL_DSP_VAL          RVII_SYNC_IVA | RVII_CLKSEL_IVA | RVII_SYNC_DSP | \
+                                        RVII_CLKSEL_DSP_IF | RVII_CLKSEL_DSP
+#define RVII_CLKSEL_GFX                 (1 << 0)
+#define RVII_CM_CLKSEL_GFX_VAL          RVII_CLKSEL_GFX
+/*-------------------------------------------------------------------------
+ * 2430 Target modes: Along with each configuration the CPU has several
+ * modes which goes along with them. Modes mainly are the addition of
+ * describe DPLL combinations to go along with a ratio.
+ *-------------------------------------------------------------------------*/
+/* Hardware governed */
+#define MX_48M_SRC                      (0 << 3)
+#define MX_54M_SRC                      (0 << 5)
+#define MX_APLLS_CLIKIN_12              (3 << 23)
+#define MX_APLLS_CLIKIN_13              (2 << 23)
+#define MX_APLLS_CLIKIN_19_2            (0 << 23)
+/*
+ * 2430 - standalone, 2*ref*M/(n+1), M/N is for exactness not relock speed
+ * #2   (ratio1) baseport-target
+ * #5a  (ratio1) baseport-target, target DPLL = 266*2 = 532MHz
+ */
+#define M5A_DPLL_MULT_12                (133 << 12)
+#define M5A_DPLL_DIV_12                 (5 << 8)
+#define M5A_CM_CLKSEL1_PLL_12_VAL       MX_48M_SRC | MX_54M_SRC | \
+                                        M5A_DPLL_DIV_12 | M5A_DPLL_MULT_12 | \
+                                        MX_APLLS_CLIKIN_12
+#define M5A_DPLL_MULT_13                (266 << 12)
+#define M5A_DPLL_DIV_13                 (12 << 8)
+#define M5A_CM_CLKSEL1_PLL_13_VAL       MX_48M_SRC | MX_54M_SRC | \
+                                        M5A_DPLL_DIV_13 | M5A_DPLL_MULT_13 | \
+                                        MX_APLLS_CLIKIN_13
+#define M5A_DPLL_MULT_19                (180 << 12)
+#define M5A_DPLL_DIV_19                 (12 << 8)
+#define M5A_CM_CLKSEL1_PLL_19_VAL       MX_48M_SRC | MX_54M_SRC | \
+                                        M5A_DPLL_DIV_19 | M5A_DPLL_MULT_19 | \
+                                        MX_APLLS_CLIKIN_19_2
+/* #5b  (ratio1) target DPLL = 200*2 = 400MHz */
+#define M5B_DPLL_MULT_12                (50 << 12)
+#define M5B_DPLL_DIV_12                 (2 << 8)
+#define M5B_CM_CLKSEL1_PLL_12_VAL       MX_48M_SRC | MX_54M_SRC | \
+                                        M5B_DPLL_DIV_12 | M5B_DPLL_MULT_12 | \
+                                        MX_APLLS_CLIKIN_12
+#define M5B_DPLL_MULT_13                (200 << 12)
+#define M5B_DPLL_DIV_13                 (12 << 8)
+#define M5B_CM_CLKSEL1_PLL_13_VAL       MX_48M_SRC | MX_54M_SRC | \
+                                        M5B_DPLL_DIV_13 | M5B_DPLL_MULT_13 | \
+                                        MX_APLLS_CLIKIN_13
+#define M5B_DPLL_MULT_19                (125 << 12)
+#define M5B_DPLL_DIV_19                 (31 << 8)
+#define M5B_CM_CLKSEL1_PLL_19_VAL       MX_48M_SRC | MX_54M_SRC | \
+                                        M5B_DPLL_DIV_19 | M5B_DPLL_MULT_19 | \
+                                        MX_APLLS_CLIKIN_19_2
+/*
+ * #4   (ratio2)
+ * #3   (ratio2) baseport-target, target DPLL = 330*2 = 660MHz
+ */
+#define M3_DPLL_MULT_12                 (55 << 12)
+#define M3_DPLL_DIV_12                  (1 << 8)
+#define M3_CM_CLKSEL1_PLL_12_VAL        MX_48M_SRC | MX_54M_SRC | \
+                                        M3_DPLL_DIV_12 | M3_DPLL_MULT_12 | \
+                                        MX_APLLS_CLIKIN_12
+#define M3_DPLL_MULT_13                 (330 << 12)
+#define M3_DPLL_DIV_13                  (12 << 8)
+#define M3_CM_CLKSEL1_PLL_13_VAL        MX_48M_SRC | MX_54M_SRC | \
+                                        M3_DPLL_DIV_13 | M3_DPLL_MULT_13 | \
+                                        MX_APLLS_CLIKIN_13
+#define M3_DPLL_MULT_19                 (275 << 12)
+#define M3_DPLL_DIV_19                  (15 << 8)
+#define M3_CM_CLKSEL1_PLL_19_VAL        MX_48M_SRC | MX_54M_SRC | \
+                                        M3_DPLL_DIV_19 | M3_DPLL_MULT_19 | \
+                                        MX_APLLS_CLIKIN_19_2
+/* boot (boot) */
+#define MB_DPLL_MULT                    (1 << 12)
+#define MB_DPLL_DIV                     (0 << 8)
+#define MB_CM_CLKSEL1_PLL_12_VAL        MX_48M_SRC | MX_54M_SRC | MB_DPLL_DIV |\
+                                        MB_DPLL_MULT | MX_APLLS_CLIKIN_12
+#define MB_CM_CLKSEL1_PLL_13_VAL        MX_48M_SRC | MX_54M_SRC | MB_DPLL_DIV |\
+                                        MB_DPLL_MULT | MX_APLLS_CLIKIN_13
+#define MB_CM_CLKSEL1_PLL_19_VAL        MX_48M_SRC | MX_54M_SRC | MB_DPLL_DIV |\
+                                        MB_DPLL_MULT | MX_APLLS_CLIKIN_19
+/*
+ * 2430 - chassis (sedna)
+ * 165 (ratio1) same as above #2
+ * 150 (ratio1)
+ * 133 (ratio2) same as above #4
+ * 110 (ratio2) same as above #3
+ * 104 (ratio2)
+ * boot (boot)
+ */
+/*
+ * 2420 Equivalent - mode registers
+ * PRCM II , target DPLL = 2*300MHz = 600MHz
+ */
+#define MII_DPLL_MULT_12                (50 << 12)
+#define MII_DPLL_DIV_12                 (1 << 8)
+#define MII_CM_CLKSEL1_PLL_12_VAL       MX_48M_SRC | MX_54M_SRC | \
+                                        MII_DPLL_DIV_12 | MII_DPLL_MULT_12 | \
+                                        MX_APLLS_CLIKIN_12
+#define MII_DPLL_MULT_13                (300 << 12)
+#define MII_DPLL_DIV_13                 (12 << 8)
+#define MII_CM_CLKSEL1_PLL_13_VAL       MX_48M_SRC | MX_54M_SRC | \
+                                        MII_DPLL_DIV_13 | MII_DPLL_MULT_13 | \
+                                        MX_APLLS_CLIKIN_13
+/* PRCM III target DPLL = 2*266 = 532MHz*/
+#define MIII_DPLL_MULT_12               (133 << 12)
+#define MIII_DPLL_DIV_12                (5 << 8)
+#define MIII_CM_CLKSEL1_PLL_12_VAL      MX_48M_SRC | MX_54M_SRC | \
+                                        MIII_DPLL_DIV_12 | MIII_DPLL_MULT_12 | \
+                                        MX_APLLS_CLIKIN_12
+#define MIII_DPLL_MULT_13               (266 << 12)
+#define MIII_DPLL_DIV_13                (12 << 8)
+#define MIII_CM_CLKSEL1_PLL_13_VAL      MX_48M_SRC | MX_54M_SRC | \
+                                        MIII_DPLL_DIV_13 | MIII_DPLL_MULT_13 | \
+                                        MX_APLLS_CLIKIN_13
+/* PRCM VII (boot bypass) */
+#define MVII_CM_CLKSEL1_PLL_12_VAL      MB_CM_CLKSEL1_PLL_12_VAL
+#define MVII_CM_CLKSEL1_PLL_13_VAL      MB_CM_CLKSEL1_PLL_13_VAL
+/* High and low operation value */
+#define MX_CLKSEL2_PLL_2x_VAL           (2 << 0)
+#define MX_CLKSEL2_PLL_1x_VAL           (1 << 0)
+/*
+ * These represent optimal values for common parts, it won't work for all.
+ * As long as you scale down, most parameters are still work, they just
+ * become sub-optimal. The RFR value goes in the oppisite direction. If you
+ * don't adjust it down as your clock period increases the refresh interval
+ * will not be met. Setting all parameters for complete worst case may work,
+ * but may cut memory performance by 2x. Due to errata the DLLs need to be
+ * unlocked and their value needs run time calibration. A dynamic call is
+ * need for that as no single right value exists acorss production samples.
+ *
+ * Only the FULL speed values are given. Current code is such that rate
+ * changes must be made at DPLLoutx2. The actual value adjustment for low
+ * frequency operation will be handled by omap_set_performance()
+ *
+ * By having the boot loader boot up in the fastest L4 speed available likely
+ * will result in something which you can switch between.
+ */
+#define V24XX_SDRC_RFR_CTRL_133MHz      (0x0003de00 | 1)
+#define V24XX_SDRC_RFR_CTRL_100MHz      (0x0002da01 | 1)
+#define V24XX_SDRC_RFR_CTRL_110MHz      (0x0002da01 | 1) /* Need to calc */
+#define V24XX_SDRC_RFR_CTRL_BYPASS      (0x00005000 | 1) /* Need to calc */
+/* MPU speed defines */
+#define S12M    12000000
+#define S13M    13000000
+#define S19M    19200000
+#define S26M    26000000
+#define S100M   100000000
+#define S133M   133000000
+#define S150M   150000000
+#define S165M   165000000
+#define S200M   200000000
+#define S266M   266000000
+#define S300M   300000000
+#define S330M   330000000
+#define S400M   400000000
+#define S532M   532000000
+#define S600M   600000000
+#define S660M   660000000
+/*-------------------------------------------------------------------------
+ * Key dividers which make up a PRCM set. Ratio's for a PRCM are mandated.
+ * xtal_speed, dpll_speed, mpu_speed, CM_CLKSEL_MPU,
+ * CM_CLKSEL_DSP, CM_CLKSEL_GFX, CM_CLKSEL1_CORE, CM_CLKSEL1_PLL,
+ * CM_CLKSEL2_PLL, CM_CLKSEL_MDM
+ *
+ * Filling in table based on H4 boards and 2430-SDPs variants available.
+ * There are quite a few more rates combinations which could be defined.
+ *
+ * When multiple values are defiend the start up will try and choose the
+ * fastest one. If a 'fast' value is defined, then automatically, the /2
+ * one should be included as it can be used.    Generally having more that
+ * one fast set does not make sense, as static timings need to be changed
+ * to change the set.    The exception is the bypass setting which is
+ * availble for low power bypass.
+ *
+ * Note: This table needs to be sorted, fastest to slowest.
+ *-------------------------------------------------------------------------*/
+static struct prcm_config rate_table[] = {
+        /* PRCM II - FAST */
+        {S12M, S600M, S300M, RII_CM_CLKSEL_MPU_VAL,             /* 300MHz ARM */
+                RII_CM_CLKSEL_DSP_VAL, RII_CM_CLKSEL_GFX_VAL,
+                RII_CM_CLKSEL1_CORE_VAL, MII_CM_CLKSEL1_PLL_12_VAL,
+                MX_CLKSEL2_PLL_2x_VAL, 0, V24XX_SDRC_RFR_CTRL_100MHz,
+                RATE_IN_242X},
+        {S13M, S600M, S300M, RII_CM_CLKSEL_MPU_VAL,             /* 300MHz ARM */
+                RII_CM_CLKSEL_DSP_VAL, RII_CM_CLKSEL_GFX_VAL,
+                RII_CM_CLKSEL1_CORE_VAL, MII_CM_CLKSEL1_PLL_13_VAL,
+                MX_CLKSEL2_PLL_2x_VAL, 0, V24XX_SDRC_RFR_CTRL_100MHz,
+                RATE_IN_242X},
+        /* PRCM III - FAST */
+        {S12M, S532M, S266M, RIII_CM_CLKSEL_MPU_VAL,            /* 266MHz ARM */
+                RIII_CM_CLKSEL_DSP_VAL, RIII_CM_CLKSEL_GFX_VAL,
+                RIII_CM_CLKSEL1_CORE_VAL, MIII_CM_CLKSEL1_PLL_12_VAL,
+                MX_CLKSEL2_PLL_2x_VAL, 0, V24XX_SDRC_RFR_CTRL_133MHz,
+                RATE_IN_242X},
+        {S13M, S532M, S266M, RIII_CM_CLKSEL_MPU_VAL,            /* 266MHz ARM */
+                RIII_CM_CLKSEL_DSP_VAL, RIII_CM_CLKSEL_GFX_VAL,
+                RIII_CM_CLKSEL1_CORE_VAL, MIII_CM_CLKSEL1_PLL_13_VAL,
+                MX_CLKSEL2_PLL_2x_VAL, 0, V24XX_SDRC_RFR_CTRL_133MHz,
+                RATE_IN_242X},
+        /* PRCM II - SLOW */
+        {S12M, S300M, S150M, RII_CM_CLKSEL_MPU_VAL,             /* 150MHz ARM */
+                RII_CM_CLKSEL_DSP_VAL, RII_CM_CLKSEL_GFX_VAL,
+                RII_CM_CLKSEL1_CORE_VAL, MII_CM_CLKSEL1_PLL_12_VAL,
+                MX_CLKSEL2_PLL_2x_VAL, 0, V24XX_SDRC_RFR_CTRL_100MHz,
+                RATE_IN_242X},
+        {S13M, S300M, S150M, RII_CM_CLKSEL_MPU_VAL,             /* 150MHz ARM */
+                RII_CM_CLKSEL_DSP_VAL, RII_CM_CLKSEL_GFX_VAL,
+                RII_CM_CLKSEL1_CORE_VAL, MII_CM_CLKSEL1_PLL_13_VAL,
+                MX_CLKSEL2_PLL_2x_VAL, 0, V24XX_SDRC_RFR_CTRL_100MHz,
+                RATE_IN_242X},
+        /* PRCM III - SLOW */
+        {S12M, S266M, S133M, RIII_CM_CLKSEL_MPU_VAL,            /* 133MHz ARM */
+                RIII_CM_CLKSEL_DSP_VAL, RIII_CM_CLKSEL_GFX_VAL,
+                RIII_CM_CLKSEL1_CORE_VAL, MIII_CM_CLKSEL1_PLL_12_VAL,
+                MX_CLKSEL2_PLL_2x_VAL, 0, V24XX_SDRC_RFR_CTRL_133MHz,
+                RATE_IN_242X},
+        {S13M, S266M, S133M, RIII_CM_CLKSEL_MPU_VAL,            /* 133MHz ARM */
+                RIII_CM_CLKSEL_DSP_VAL, RIII_CM_CLKSEL_GFX_VAL,
+                RIII_CM_CLKSEL1_CORE_VAL, MIII_CM_CLKSEL1_PLL_13_VAL,
+                MX_CLKSEL2_PLL_2x_VAL, 0, V24XX_SDRC_RFR_CTRL_133MHz,
+                RATE_IN_242X},
+        /* PRCM-VII (boot-bypass) */
+        {S12M, S12M, S12M, RVII_CM_CLKSEL_MPU_VAL,              /* 12MHz ARM*/
+                RVII_CM_CLKSEL_DSP_VAL, RVII_CM_CLKSEL_GFX_VAL,
+                RVII_CM_CLKSEL1_CORE_VAL, MVII_CM_CLKSEL1_PLL_12_VAL,
+                MX_CLKSEL2_PLL_2x_VAL, 0, V24XX_SDRC_RFR_CTRL_BYPASS,
+                RATE_IN_242X},
+        /* PRCM-VII (boot-bypass) */
+        {S13M, S13M, S13M, RVII_CM_CLKSEL_MPU_VAL,              /* 13MHz ARM */
+                RVII_CM_CLKSEL_DSP_VAL, RVII_CM_CLKSEL_GFX_VAL,
+                RVII_CM_CLKSEL1_CORE_VAL, MVII_CM_CLKSEL1_PLL_13_VAL,
+                MX_CLKSEL2_PLL_2x_VAL, 0, V24XX_SDRC_RFR_CTRL_BYPASS,
+                RATE_IN_242X},
+        /* PRCM #3 - ratio2 (ES2) - FAST */
+        {S13M, S660M, S330M, R2_CM_CLKSEL_MPU_VAL,              /* 330MHz ARM */
+                R2_CM_CLKSEL_DSP_VAL, R2_CM_CLKSEL_GFX_VAL,
+                R2_CM_CLKSEL1_CORE_VAL, M3_CM_CLKSEL1_PLL_13_VAL,
+                MX_CLKSEL2_PLL_2x_VAL, R2_CM_CLKSEL_MDM_VAL,
+                V24XX_SDRC_RFR_CTRL_110MHz,
+                RATE_IN_243X},
+        /* PRCM #5a - ratio1 - FAST */
+        {S13M, S532M, S266M, R1_CM_CLKSEL_MPU_VAL,              /* 266MHz ARM */
+                R1_CM_CLKSEL_DSP_VAL, R1_CM_CLKSEL_GFX_VAL,
+                R1_CM_CLKSEL1_CORE_VAL, M5A_CM_CLKSEL1_PLL_13_VAL,
+                MX_CLKSEL2_PLL_2x_VAL, R1_CM_CLKSEL_MDM_VAL,
+                V24XX_SDRC_RFR_CTRL_133MHz,
+                RATE_IN_243X},
+        /* PRCM #5b - ratio1 - FAST */
+        {S13M, S400M, S200M, R1_CM_CLKSEL_MPU_VAL,              /* 200MHz ARM */
+                R1_CM_CLKSEL_DSP_VAL, R1_CM_CLKSEL_GFX_VAL,
+                R1_CM_CLKSEL1_CORE_VAL, M5B_CM_CLKSEL1_PLL_13_VAL,
+                MX_CLKSEL2_PLL_2x_VAL, R1_CM_CLKSEL_MDM_VAL,
+                V24XX_SDRC_RFR_CTRL_100MHz,
+                RATE_IN_243X},
+        /* PRCM #3 - ratio2 (ES2) - SLOW */
+        {S13M, S330M, S165M, R2_CM_CLKSEL_MPU_VAL,              /* 165MHz ARM */
+                R2_CM_CLKSEL_DSP_VAL, R2_CM_CLKSEL_GFX_VAL,
+                R2_CM_CLKSEL1_CORE_VAL, M3_CM_CLKSEL1_PLL_13_VAL,
+                MX_CLKSEL2_PLL_1x_VAL, R2_CM_CLKSEL_MDM_VAL,
+                V24XX_SDRC_RFR_CTRL_110MHz,
+                RATE_IN_243X},
+        /* PRCM #5a - ratio1 - SLOW */
+        {S13M, S266M, S133M, R1_CM_CLKSEL_MPU_VAL,              /* 133MHz ARM */
+                R1_CM_CLKSEL_DSP_VAL, R1_CM_CLKSEL_GFX_VAL,
+                R1_CM_CLKSEL1_CORE_VAL, M5A_CM_CLKSEL1_PLL_13_VAL,
+                MX_CLKSEL2_PLL_1x_VAL, R1_CM_CLKSEL_MDM_VAL,
+                V24XX_SDRC_RFR_CTRL_133MHz,
+                RATE_IN_243X},
+        /* PRCM #5b - ratio1 - SLOW*/
+        {S13M, S200M, S100M, R1_CM_CLKSEL_MPU_VAL,              /* 100MHz ARM */
+                R1_CM_CLKSEL_DSP_VAL, R1_CM_CLKSEL_GFX_VAL,
+                R1_CM_CLKSEL1_CORE_VAL, M5B_CM_CLKSEL1_PLL_13_VAL,
+                MX_CLKSEL2_PLL_1x_VAL, R1_CM_CLKSEL_MDM_VAL,
+                V24XX_SDRC_RFR_CTRL_100MHz,
+                RATE_IN_243X},
+        /* PRCM-boot/bypass */
+        {S13M, S13M, S13M, RB_CM_CLKSEL_MPU_VAL,                /* 13Mhz */
+                RB_CM_CLKSEL_DSP_VAL, RB_CM_CLKSEL_GFX_VAL,
+                RB_CM_CLKSEL1_CORE_VAL, MB_CM_CLKSEL1_PLL_13_VAL,
+                MX_CLKSEL2_PLL_2x_VAL, RB_CM_CLKSEL_MDM_VAL,
+                V24XX_SDRC_RFR_CTRL_BYPASS,
+                RATE_IN_243X},
+        /* PRCM-boot/bypass */
+        {S12M, S12M, S12M, RB_CM_CLKSEL_MPU_VAL,                /* 12Mhz */
+                RB_CM_CLKSEL_DSP_VAL, RB_CM_CLKSEL_GFX_VAL,
+                RB_CM_CLKSEL1_CORE_VAL, MB_CM_CLKSEL1_PLL_12_VAL,
+                MX_CLKSEL2_PLL_2x_VAL, RB_CM_CLKSEL_MDM_VAL,
+                V24XX_SDRC_RFR_CTRL_BYPASS,
+                RATE_IN_243X},
+        { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
+};
+/*-------------------------------------------------------------------------
+ * 24xx clock tree.
+ *
+ * NOTE:In many cases here we are assigning a 'default' parent. In many
+ *      cases the parent is selectable. The get/set parent calls will also
+ *      switch sources.
+ *
+ *      Many some clocks say always_enabled, but they can be auto idled for
+ *      power savings. They will always be available upon clock request.
+ *
+ *      Several sources are given initial rates which may be wrong, this will
+ *      be fixed up in the init func.
+ *
+ *      Things are broadly separated below by clock domains. It is
+ *      noteworthy that most periferals have dependencies on multiple clock
+ *      domains. Many get their interface clocks from the L4 domain, but get
+ *      functional clocks from fixed sources or other core domain derived
+ *      clocks.
+ *-------------------------------------------------------------------------*/
+/* Base external input clocks */
+static struct clk func_32k_ck = {
+        .name           = "func_32k_ck",
+        .rate           = 32000,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
+                                RATE_FIXED | ALWAYS_ENABLED,
+};
+/* Typical 12/13MHz in standalone mode, will be 26Mhz in chassis mode */
+static struct clk osc_ck = {            /* (*12, *13, 19.2, *26, 38.4)MHz */
+        .name           = "osc_ck",
+        .rate           = 26000000,             /* fixed up in clock init */
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
+                                RATE_FIXED | ALWAYS_ENABLED | RATE_PROPAGATES,
+};
+/* With out modem likely 12MHz, with modem likely 13MHz */
+static struct clk sys_ck = {            /* (*12, *13, 19.2, 26, 38.4)MHz */
+        .name           = "sys_ck",             /* ~ ref_clk also */
+        .parent         = &osc_ck,
+        .rate           = 13000000,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
+                                RATE_FIXED | ALWAYS_ENABLED | RATE_PROPAGATES,
+        .rate_offset    = 6, /* sysclkdiv 1 or 2, already handled or no boot */
+        .recalc         = &omap2_sys_clk_recalc,
+};
+static struct clk alt_ck = {            /* Typical 54M or 48M, may not exist */
+        .name           = "alt_ck",
+        .rate           = 54000000,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
+                                RATE_FIXED | ALWAYS_ENABLED | RATE_PROPAGATES,
+        .recalc         = &omap2_propagate_rate,
+};
+/*
+ * Analog domain root source clocks
+ */
+/* dpll_ck, is broken out in to special cases through clksel */
+static struct clk dpll_ck = {
+        .name           = "dpll_ck",
+        .parent         = &sys_ck,              /* Can be func_32k also */
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
+                                RATE_PROPAGATES | RATE_CKCTL | CM_PLL_SEL1,
+        .recalc         = &omap2_clksel_recalc,
+};
+static struct clk apll96_ck = {
+        .name           = "apll96_ck",
+        .parent         = &sys_ck,
+        .rate           = 96000000,
+        .flags          = CLOCK_IN_OMAP242X |CLOCK_IN_OMAP243X |
+                                RATE_FIXED | RATE_PROPAGATES,
+        .enable_reg     = (void __iomem *)&CM_CLKEN_PLL,
+        .enable_bit     = 0x2,
+        .recalc         = &omap2_propagate_rate,
+};
+static struct clk apll54_ck = {
+        .name           = "apll54_ck",
+        .parent         = &sys_ck,
+        .rate           = 54000000,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
+                                RATE_FIXED | RATE_PROPAGATES,
+        .enable_reg     = (void __iomem *)&CM_CLKEN_PLL,
+        .enable_bit     = 0x6,
+        .recalc         = &omap2_propagate_rate,
+};
+/*
+ * PRCM digital base sources
+ */
+static struct clk func_54m_ck = {
+        .name           = "func_54m_ck",
+        .parent         = &apll54_ck,   /* can also be alt_clk */
+        .rate           = 54000000,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
+                                RATE_FIXED | CM_PLL_SEL1 | RATE_PROPAGATES,
+        .src_offset     = 5,
+        .enable_reg     = (void __iomem *)&CM_CLKEN_PLL,
+        .enable_bit     = 0xff,
+        .recalc         = &omap2_propagate_rate,
+};
+static struct clk core_ck = {
+        .name           = "core_ck",
+        .parent         = &dpll_ck,             /* can also be 32k */
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
+                                ALWAYS_ENABLED | RATE_PROPAGATES,
+        .recalc         = &omap2_propagate_rate,
+};
+static struct clk sleep_ck = {          /* sys_clk or 32k */
+        .name           = "sleep_ck",
+        .parent         = &func_32k_ck,
+        .rate           = 32000,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .recalc         = &omap2_propagate_rate,
+};
+static struct clk func_96m_ck = {
+        .name           = "func_96m_ck",
+        .parent         = &apll96_ck,
+        .rate           = 96000000,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
+                                RATE_FIXED | RATE_PROPAGATES,
+        .enable_reg     = (void __iomem *)&CM_CLKEN_PLL,
+        .enable_bit     = 0xff,
+        .recalc         = &omap2_propagate_rate,
+};
+static struct clk func_48m_ck = {
+        .name           = "func_48m_ck",
+        .parent         = &apll96_ck,    /* 96M or Alt */
+        .rate           = 48000000,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
+                                RATE_FIXED | CM_PLL_SEL1 | RATE_PROPAGATES,
+        .src_offset     = 3,
+        .enable_reg     = (void __iomem *)&CM_CLKEN_PLL,
+        .enable_bit     = 0xff,
+        .recalc         = &omap2_propagate_rate,
+};
+static struct clk func_12m_ck = {
+        .name           = "func_12m_ck",
+        .parent         = &func_48m_ck,
+        .rate           = 12000000,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
+                                RATE_FIXED | RATE_PROPAGATES,
+        .recalc         = &omap2_propagate_rate,
+        .enable_reg     = (void __iomem *)&CM_CLKEN_PLL,
+        .enable_bit     = 0xff,
+};
+/* Secure timer, only available in secure mode */
+static struct clk wdt1_osc_ck = {
+        .name           = "ck_wdt1_osc",
+        .parent         = &osc_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk sys_clkout = {
+        .name           = "sys_clkout",
+        .parent         = &func_54m_ck,
+        .rate           = 54000000,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
+                                CM_SYSCLKOUT_SEL1 | RATE_CKCTL,
+        .src_offset     = 0,
+        .enable_reg     = (void __iomem *)&PRCM_CLKOUT_CTRL,
+        .enable_bit     = 7,
+        .rate_offset    = 3,
+        .recalc         = &omap2_clksel_recalc,
+};
+/* In 2430, new in 2420 ES2 */
+static struct clk sys_clkout2 = {
+        .name           = "sys_clkout2",
+        .parent         = &func_54m_ck,
+        .rate           = 54000000,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
+                                CM_SYSCLKOUT_SEL1 | RATE_CKCTL,
+        .src_offset     = 8,
+        .enable_reg     = (void __iomem *)&PRCM_CLKOUT_CTRL,
+        .enable_bit     = 15,
+        .rate_offset    = 11,
+        .recalc         = &omap2_clksel_recalc,
+};
+/*
+ * MPU clock domain
+ *      Clocks:
+ *              MPU_FCLK, MPU_ICLK
+ *              INT_M_FCLK, INT_M_I_CLK
+ *
+ * - Individual clocks are hardware managed.
+ * - Base divider comes from: CM_CLKSEL_MPU
+ *
+ */
+static struct clk mpu_ck = {    /* Control cpu */
+        .name           = "mpu_ck",
+        .parent         = &core_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | RATE_CKCTL |
+                                ALWAYS_ENABLED | CM_MPU_SEL1 | DELAYED_APP |
+                                CONFIG_PARTICIPANT | RATE_PROPAGATES,
+        .rate_offset    = 0,    /* bits 0-4 */
+        .recalc         = &omap2_clksel_recalc,
+};
+/*
+ * DSP (2430-IVA2.1) (2420-UMA+IVA1) clock domain
+ * Clocks:
+ *      2430: IVA2.1_FCLK, IVA2.1_ICLK
+ *      2420: UMA_FCLK, UMA_ICLK, IVA_MPU, IVA_COP
+ */
+static struct clk iva2_1_fck = {
+        .name           = "iva2_1_fck",
+        .parent         = &core_ck,
+        .flags          = CLOCK_IN_OMAP243X | RATE_CKCTL | CM_DSP_SEL1 |
+                                DELAYED_APP | RATE_PROPAGATES |
+                                CONFIG_PARTICIPANT,
+        .rate_offset    = 0,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN_DSP,
+        .enable_bit     = 0,
+        .recalc         = &omap2_clksel_recalc,
+};
+static struct clk iva2_1_ick = {
+        .name           = "iva2_1_ick",
+        .parent         = &iva2_1_fck,
+        .flags          = CLOCK_IN_OMAP243X | RATE_CKCTL | CM_DSP_SEL1 |
+                                DELAYED_APP | CONFIG_PARTICIPANT,
+        .rate_offset    = 5,
+        .recalc         = &omap2_clksel_recalc,
+};
+/*
+ * Won't be too specific here. The core clock comes into this block
+ * it is divided then tee'ed. One branch goes directly to xyz enable
+ * controls. The other branch gets further divided by 2 then possibly
+ * routed into a synchronizer and out of clocks abc.
+ */
+static struct clk dsp_fck = {
+        .name           = "dsp_fck",
+        .parent         = &core_ck,
+        .flags          = CLOCK_IN_OMAP242X | RATE_CKCTL | CM_DSP_SEL1 |
+                        DELAYED_APP | CONFIG_PARTICIPANT | RATE_PROPAGATES,
+        .rate_offset    = 0,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN_DSP,
+        .enable_bit     = 0,
+        .recalc         = &omap2_clksel_recalc,
+};
+static struct clk dsp_ick = {
+        .name           = "dsp_ick",     /* apparently ipi and isp */
+        .parent         = &dsp_fck,
+        .flags          = CLOCK_IN_OMAP242X | RATE_CKCTL | CM_DSP_SEL1 |
+                                DELAYED_APP | CONFIG_PARTICIPANT,
+        .rate_offset = 5,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN_DSP,
+        .enable_bit     = 1,            /* for ipi */
+        .recalc         = &omap2_clksel_recalc,
+};
+static struct clk iva1_ifck = {
+        .name           = "iva1_ifck",
+        .parent         = &core_ck,
+        .flags          = CLOCK_IN_OMAP242X | CM_DSP_SEL1 | RATE_CKCTL |
+                        CONFIG_PARTICIPANT | RATE_PROPAGATES | DELAYED_APP,
+        .rate_offset= 8,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN_DSP,
+        .enable_bit     = 10,
+        .recalc         = &omap2_clksel_recalc,
+};
+/* IVA1 mpu/int/i/f clocks are /2 of parent */
+static struct clk iva1_mpu_int_ifck = {
+        .name           = "iva1_mpu_int_ifck",
+        .parent         = &iva1_ifck,
+        .flags          = CLOCK_IN_OMAP242X | RATE_CKCTL | CM_DSP_SEL1,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN_DSP,
+        .enable_bit     = 8,
+        .recalc         = &omap2_clksel_recalc,
+};
+/*
+ * L3 clock domain
+ * L3 clocks are used for both interface and functional clocks to
+ * multiple entities. Some of these clocks are completely managed
+ * by hardware, and some others allow software control. Hardware
+ * managed ones general are based on directly CLK_REQ signals and
+ * various auto idle settings. The functional spec sets many of these
+ * as 'tie-high' for their enables.
+ *
+ * I-CLOCKS:
+ *      L3-Interconnect, SMS, GPMC, SDRC, OCM_RAM, OCM_ROM, SDMA
+ *      CAM, HS-USB.
+ * F-CLOCK
+ *      SSI.
+ *
+ * GPMC memories and SDRC have timing and clock sensitive registers which
+ * may very well need notification when the clock changes. Currently for low
+ * operating points, these are taken care of in sleep.S.
+ */
+static struct clk core_l3_ck = {        /* Used for ick and fck, interconnect */
+        .name           = "core_l3_ck",
+        .parent         = &core_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
+                                RATE_CKCTL | ALWAYS_ENABLED | CM_CORE_SEL1 |
+                                DELAYED_APP | CONFIG_PARTICIPANT |
+                                RATE_PROPAGATES,
+        .rate_offset    = 0,
+        .recalc         = &omap2_clksel_recalc,
+};
+static struct clk usb_l4_ick = {        /* FS-USB interface clock */
+        .name           = "usb_l4_ick",
+        .parent         = &core_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
+                                RATE_CKCTL | CM_CORE_SEL1 | DELAYED_APP |
+                                CONFIG_PARTICIPANT,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN2_CORE,
+        .enable_bit     = 0,
+        .rate_offset = 25,
+        .recalc         = &omap2_clksel_recalc,
+};
+/*
+ * SSI is in L3 management domain, its direct parent is core not l3,
+ * many core power domain entities are grouped into the L3 clock
+ * domain.
+ * SSI_SSR_FCLK, SSI_SST_FCLK, SSI_L4_CLIK
+ *
+ * ssr = core/1/2/3/4/5, sst = 1/2 ssr.
+ */
+static struct clk ssi_ssr_sst_fck = {
+        .name           = "ssi_fck",
+        .parent         = &core_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
+                                RATE_CKCTL | CM_CORE_SEL1 | DELAYED_APP,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN2_CORE,     /* bit 1 */
+        .enable_bit     = 1,
+        .rate_offset = 20,
+        .recalc         = &omap2_clksel_recalc,
+};
+/*
+ * GFX clock domain
+ *      Clocks:
+ * GFX_FCLK, GFX_ICLK
+ * GFX_CG1(2d), GFX_CG2(3d)
+ *
+ * GFX_FCLK runs from L3, and is divided by (1,2,3,4)
+ * The 2d and 3d clocks run at a hardware determined
+ * divided value of fclk.
+ *
+ */
+static struct clk gfx_3d_fck = {
+        .name           = "gfx_3d_fck",
+        .parent         = &core_l3_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
+                                RATE_CKCTL | CM_GFX_SEL1,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN_GFX,
+        .enable_bit     = 2,
+        .rate_offset= 0,
+        .recalc         = &omap2_clksel_recalc,
+};
+static struct clk gfx_2d_fck = {
+        .name           = "gfx_2d_fck",
+        .parent         = &core_l3_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
+                                RATE_CKCTL | CM_GFX_SEL1,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN_GFX,
+        .enable_bit     = 1,
+        .rate_offset= 0,
+        .recalc         = &omap2_clksel_recalc,
+};
+static struct clk gfx_ick = {
+        .name           = "gfx_ick",            /* From l3 */
+        .parent         = &core_l3_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
+                                RATE_CKCTL,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN_GFX,       /* bit 0 */
+        .enable_bit     = 0,
+        .recalc         = &omap2_followparent_recalc,
+};
+/*
+ * Modem clock domain (2430)
+ *      CLOCKS:
+ *              MDM_OSC_CLK
+ *              MDM_ICLK
+ */
+static struct clk mdm_ick = {           /* used both as a ick and fck */
+        .name           = "mdm_ick",
+        .parent         = &core_ck,
+        .flags          = CLOCK_IN_OMAP243X | RATE_CKCTL | CM_MODEM_SEL1 |
+                                DELAYED_APP | CONFIG_PARTICIPANT,
+        .rate_offset    = 0,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN_MDM,
+        .enable_bit     = 0,
+        .recalc         = &omap2_clksel_recalc,
+};
+static struct clk mdm_osc_ck = {
+        .name           = "mdm_osc_ck",
+        .rate           = 26000000,
+        .parent         = &osc_ck,
+        .flags          = CLOCK_IN_OMAP243X | RATE_FIXED,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN_MDM,
+        .enable_bit     = 1,
+        .recalc         = &omap2_followparent_recalc,
+};
+/*
+ * L4 clock management domain
+ *
+ * This domain contains lots of interface clocks from the L4 interface, some
+ * functional clocks.   Fixed APLL functional source clocks are managed in
+ * this domain.
+ */
+static struct clk l4_ck = {             /* used both as an ick and fck */
+        .name           = "l4_ck",
+        .parent         = &core_l3_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
+                                RATE_CKCTL | ALWAYS_ENABLED | CM_CORE_SEL1 |
+                                DELAYED_APP | RATE_PROPAGATES,
+        .rate_offset    = 5,
+        .recalc         = &omap2_clksel_recalc,
+};
+static struct clk ssi_l4_ick = {
+        .name           = "ssi_l4_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | RATE_CKCTL,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN2_CORE,     /* bit 1 */
+        .enable_bit     = 1,
+        .recalc         = &omap2_followparent_recalc,
+};
+/*
+ * DSS clock domain
+ * CLOCKs:
+ * DSS_L4_ICLK, DSS_L3_ICLK,
+ * DSS_CLK1, DSS_CLK2, DSS_54MHz_CLK
+ *
+ * DSS is both initiator and target.
+ */
+static struct clk dss_ick = {           /* Enables both L3,L4 ICLK's */
+        .name           = "dss_ick",
+        .parent         = &l4_ck,       /* really both l3 and l4 */
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | RATE_CKCTL,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN1_CORE,
+        .enable_bit     = 0,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk dss1_fck = {
+        .name           = "dss1_fck",
+        .parent         = &core_ck,             /* Core or sys */
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
+                                RATE_CKCTL | CM_CORE_SEL1 | DELAYED_APP,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN1_CORE,
+        .enable_bit     = 0,
+        .rate_offset    = 8,
+        .src_offset     = 8,
+        .recalc         = &omap2_clksel_recalc,
+};
+static struct clk dss2_fck = {          /* Alt clk used in power management */
+        .name           = "dss2_fck",
+        .parent         = &sys_ck,              /* fixed at sys_ck or 48MHz */
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
+                                RATE_CKCTL | CM_CORE_SEL1 | RATE_FIXED,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN1_CORE,
+        .enable_bit     = 1,
+        .src_offset     = 13,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk dss_54m_fck = {       /* Alt clk used in power management */
+        .name           = "dss_54m_fck",        /* 54m tv clk */
+        .parent         = &func_54m_ck,
+        .rate           = 54000000,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
+                                RATE_FIXED | RATE_PROPAGATES,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN1_CORE,
+        .enable_bit     = 2,
+        .recalc         = &omap2_propagate_rate,
+};
+/*
+ * CORE power domain ICLK & FCLK defines.
+ * Many of the these can have more than one possible parent. Entries
+ * here will likely have an L4 interface parent, and may have multiple
+ * functional clock parents.
+ */
+static struct clk gpt1_ick = {
+        .name           = "gpt1_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN_WKUP,      /* Bit4 */
+        .enable_bit     = 0,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk gpt1_fck = {
+        .name           = "gpt1_fck",
+        .parent         = &func_32k_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
+                                CM_WKUP_SEL1,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN_WKUP,
+        .enable_bit     = 0,
+        .src_offset     = 0,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk gpt2_ick = {
+        .name           = "gpt2_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN1_CORE,     /* bit4 */
+        .enable_bit     = 0,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk gpt2_fck = {
+        .name           = "gpt2_fck",
+        .parent         = &func_32k_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
+                                CM_CORE_SEL2,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN1_CORE,
+        .enable_bit     = 4,
+        .src_offset     = 2,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk gpt3_ick = {
+        .name           = "gpt3_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN1_CORE,     /* Bit5 */
+        .enable_bit     = 5,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk gpt3_fck = {
+        .name           = "gpt3_fck",
+        .parent         = &func_32k_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
+                                CM_CORE_SEL2,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN1_CORE,
+        .enable_bit     = 5,
+        .src_offset     = 4,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk gpt4_ick = {
+        .name           = "gpt4_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN1_CORE,     /* Bit6 */
+        .enable_bit     = 6,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk gpt4_fck = {
+        .name           = "gpt4_fck",
+        .parent         = &func_32k_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
+                                CM_CORE_SEL2,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN1_CORE,
+        .enable_bit     = 6,
+        .src_offset     = 6,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk gpt5_ick = {
+        .name           = "gpt5_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN1_CORE,      /* Bit7 */
+        .enable_bit     = 7,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk gpt5_fck = {
+        .name           = "gpt5_fck",
+        .parent         = &func_32k_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
+                                CM_CORE_SEL2,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN1_CORE,
+        .enable_bit     = 7,
+        .src_offset     = 8,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk gpt6_ick = {
+        .name           = "gpt6_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_bit     = 8,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN1_CORE,      /* bit8 */
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk gpt6_fck = {
+        .name           = "gpt6_fck",
+        .parent         = &func_32k_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
+                                CM_CORE_SEL2,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN1_CORE,
+        .enable_bit     = 8,
+        .src_offset     = 10,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk gpt7_ick = {
+        .name           = "gpt7_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN1_CORE,      /* bit9 */
+        .enable_bit     = 9,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk gpt7_fck = {
+        .name           = "gpt7_fck",
+        .parent         = &func_32k_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
+                                CM_CORE_SEL2,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN1_CORE,
+        .enable_bit     = 9,
+        .src_offset     = 12,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk gpt8_ick = {
+        .name           = "gpt8_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN1_CORE,      /* bit10 */
+        .enable_bit     = 10,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk gpt8_fck = {
+        .name           = "gpt8_fck",
+        .parent         = &func_32k_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
+                                CM_CORE_SEL2,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN1_CORE,
+        .enable_bit     = 10,
+        .src_offset     = 14,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk gpt9_ick = {
+        .name           = "gpt9_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN1_CORE,
+        .enable_bit     = 11,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk gpt9_fck = {
+        .name           = "gpt9_fck",
+        .parent         = &func_32k_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
+                                        CM_CORE_SEL2,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN1_CORE,
+        .enable_bit     = 11,
+        .src_offset     = 16,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk gpt10_ick = {
+        .name           = "gpt10_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN1_CORE,
+        .enable_bit     = 12,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk gpt10_fck = {
+        .name           = "gpt10_fck",
+        .parent         = &func_32k_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
+                                        CM_CORE_SEL2,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN1_CORE,
+        .enable_bit     = 12,
+        .src_offset     = 18,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk gpt11_ick = {
+        .name           = "gpt11_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN1_CORE,
+        .enable_bit     = 13,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk gpt11_fck = {
+        .name           = "gpt11_fck",
+        .parent         = &func_32k_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
+                                        CM_CORE_SEL2,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN1_CORE,
+        .enable_bit     = 13,
+        .src_offset     = 20,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk gpt12_ick = {
+        .name           = "gpt12_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN1_CORE,      /* bit14 */
+        .enable_bit     = 14,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk gpt12_fck = {
+        .name           = "gpt12_fck",
+        .parent         = &func_32k_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
+                                        CM_CORE_SEL2,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN1_CORE,
+        .enable_bit     = 14,
+        .src_offset     = 22,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk mcbsp1_ick = {
+        .name           = "mcbsp1_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_bit     = 15,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN1_CORE,      /* bit16 */
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk mcbsp1_fck = {
+        .name           = "mcbsp1_fck",
+        .parent         = &func_96m_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_bit     = 15,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN1_CORE,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk mcbsp2_ick = {
+        .name           = "mcbsp2_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_bit     = 16,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN1_CORE,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk mcbsp2_fck = {
+        .name           = "mcbsp2_fck",
+        .parent         = &func_96m_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_bit     = 16,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN1_CORE,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk mcbsp3_ick = {
+        .name           = "mcbsp3_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN2_CORE,
+        .enable_bit     = 3,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk mcbsp3_fck = {
+        .name           = "mcbsp3_fck",
+        .parent         = &func_96m_ck,
+        .flags          = CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN2_CORE,
+        .enable_bit     = 3,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk mcbsp4_ick = {
+        .name           = "mcbsp4_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN2_CORE,
+        .enable_bit     = 4,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk mcbsp4_fck = {
+        .name           = "mcbsp4_fck",
+        .parent         = &func_96m_ck,
+        .flags          = CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN2_CORE,
+        .enable_bit     = 4,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk mcbsp5_ick = {
+        .name           = "mcbsp5_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN2_CORE,
+        .enable_bit     = 5,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk mcbsp5_fck = {
+        .name           = "mcbsp5_fck",
+        .parent         = &func_96m_ck,
+        .flags          = CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN2_CORE,
+        .enable_bit     = 5,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk mcspi1_ick = {
+        .name           = "mcspi1_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN1_CORE,
+        .enable_bit     = 17,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk mcspi1_fck = {
+        .name           = "mcspi1_fck",
+        .parent         = &func_48m_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN1_CORE,
+        .enable_bit     = 17,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk mcspi2_ick = {
+        .name           = "mcspi2_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN1_CORE,
+        .enable_bit     = 18,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk mcspi2_fck = {
+        .name           = "mcspi2_fck",
+        .parent         = &func_48m_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN1_CORE,
+        .enable_bit     = 18,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk mcspi3_ick = {
+        .name           = "mcspi3_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN2_CORE,
+        .enable_bit     = 9,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk mcspi3_fck = {
+        .name           = "mcspi3_fck",
+        .parent         = &func_48m_ck,
+        .flags          = CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN2_CORE,
+        .enable_bit     = 9,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk uart1_ick = {
+        .name           = "uart1_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN1_CORE,
+        .enable_bit     = 21,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk uart1_fck = {
+        .name           = "uart1_fck",
+        .parent         = &func_48m_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN1_CORE,
+        .enable_bit     = 21,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk uart2_ick = {
+        .name           = "uart2_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN1_CORE,
+        .enable_bit     = 22,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk uart2_fck = {
+        .name           = "uart2_fck",
+        .parent         = &func_48m_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN1_CORE,
+        .enable_bit     = 22,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk uart3_ick = {
+        .name           = "uart3_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN2_CORE,
+        .enable_bit     = 2,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk uart3_fck = {
+        .name           = "uart3_fck",
+        .parent         = &func_48m_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN2_CORE,
+        .enable_bit     = 2,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk gpios_ick = {
+        .name           = "gpios_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN_WKUP,
+        .enable_bit     = 2,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk gpios_fck = {
+        .name           = "gpios_fck",
+        .parent         = &func_32k_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN_WKUP,
+        .enable_bit     = 2,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk mpu_wdt_ick = {
+        .name           = "mpu_wdt_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN_WKUP,
+        .enable_bit     = 3,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk mpu_wdt_fck = {
+        .name           = "mpu_wdt_fck",
+        .parent         = &func_32k_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN_WKUP,
+        .enable_bit     = 3,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk sync_32k_ick = {
+        .name           = "sync_32k_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN_WKUP,
+        .enable_bit     = 1,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk wdt1_ick = {
+        .name           = "wdt1_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN_WKUP,
+        .enable_bit     = 4,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk omapctrl_ick = {
+        .name           = "omapctrl_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN_WKUP,
+        .enable_bit     = 5,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk icr_ick = {
+        .name           = "icr_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN_WKUP,
+        .enable_bit     = 6,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk cam_ick = {
+        .name           = "cam_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN1_CORE,
+        .enable_bit     = 31,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk cam_fck = {
+        .name           = "cam_fck",
+        .parent         = &func_96m_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN1_CORE,
+        .enable_bit     = 31,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk mailboxes_ick = {
+        .name           = "mailboxes_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN1_CORE,
+        .enable_bit     = 30,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk wdt4_ick = {
+        .name           = "wdt4_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN1_CORE,
+        .enable_bit     = 29,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk wdt4_fck = {
+        .name           = "wdt4_fck",
+        .parent         = &func_32k_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN1_CORE,
+        .enable_bit     = 29,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk wdt3_ick = {
+        .name           = "wdt3_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP242X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN1_CORE,
+        .enable_bit     = 28,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk wdt3_fck = {
+        .name           = "wdt3_fck",
+        .parent         = &func_32k_ck,
+        .flags          = CLOCK_IN_OMAP242X,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN1_CORE,
+        .enable_bit     = 28,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk mspro_ick = {
+        .name           = "mspro_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN1_CORE,
+        .enable_bit     = 27,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk mspro_fck = {
+        .name           = "mspro_fck",
+        .parent         = &func_96m_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN1_CORE,
+        .enable_bit     = 27,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk mmc_ick = {
+        .name           = "mmc_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP242X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN1_CORE,
+        .enable_bit     = 26,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk mmc_fck = {
+        .name           = "mmc_fck",
+        .parent         = &func_96m_ck,
+        .flags          = CLOCK_IN_OMAP242X,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN1_CORE,
+        .enable_bit     = 26,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk fac_ick = {
+        .name           = "fac_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN1_CORE,
+        .enable_bit     = 25,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk fac_fck = {
+        .name           = "fac_fck",
+        .parent         = &func_12m_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN1_CORE,
+        .enable_bit     = 25,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk eac_ick = {
+        .name           = "eac_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP242X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN1_CORE,
+        .enable_bit     = 24,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk eac_fck = {
+        .name           = "eac_fck",
+        .parent         = &func_96m_ck,
+        .flags          = CLOCK_IN_OMAP242X,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN1_CORE,
+        .enable_bit     = 24,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk hdq_ick = {
+        .name           = "hdq_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN1_CORE,
+        .enable_bit     = 23,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk hdq_fck = {
+        .name           = "hdq_fck",
+        .parent         = &func_12m_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN1_CORE,
+        .enable_bit     = 23,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk i2c2_ick = {
+        .name           = "i2c2_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN1_CORE,
+        .enable_bit     = 20,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk i2c2_fck = {
+        .name           = "i2c2_fck",
+        .parent         = &func_12m_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN1_CORE,
+        .enable_bit     = 20,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk i2chs2_fck = {
+        .name           = "i2chs2_fck",
+        .parent         = &func_96m_ck,
+        .flags          = CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN2_CORE,
+        .enable_bit     = 20,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk i2c1_ick = {
+        .name           = "i2c1_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN1_CORE,
+        .enable_bit     = 19,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk i2c1_fck = {
+        .name           = "i2c1_fck",
+        .parent         = &func_12m_ck,
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN1_CORE,
+        .enable_bit     = 19,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk i2chs1_fck = {
+        .name           = "i2chs1_fck",
+        .parent         = &func_96m_ck,
+        .flags          = CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN2_CORE,
+        .enable_bit     = 19,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk vlynq_ick = {
+        .name           = "vlynq_ick",
+        .parent         = &core_l3_ck,
+        .flags          = CLOCK_IN_OMAP242X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN1_CORE,
+        .enable_bit     = 3,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk vlynq_fck = {
+        .name           = "vlynq_fck",
+        .parent         = &func_96m_ck,
+        .flags          = CLOCK_IN_OMAP242X  | RATE_CKCTL | CM_CORE_SEL1 | DELAYED_APP,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN1_CORE,
+        .enable_bit     = 3,
+        .src_offset     = 15,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk sdrc_ick = {
+        .name           = "sdrc_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN3_CORE,
+        .enable_bit     = 2,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk des_ick = {
+        .name           = "des_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN4_CORE,
+        .enable_bit     = 0,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk sha_ick = {
+        .name           = "sha_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN4_CORE,
+        .enable_bit     = 1,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk rng_ick = {
+        .name           = "rng_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN4_CORE,
+        .enable_bit     = 2,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk aes_ick = {
+        .name           = "aes_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN4_CORE,
+        .enable_bit     = 3,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk pka_ick = {
+        .name           = "pka_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN4_CORE,
+        .enable_bit     = 4,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk usb_fck = {
+        .name           = "usb_fck",
+        .parent         = &func_48m_ck,
+        .flags          = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN2_CORE,
+        .enable_bit     = 0,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk usbhs_ick = {
+        .name           = "usbhs_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN2_CORE,
+        .enable_bit     = 6,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk mmchs1_ick = {
+        .name           = "mmchs1_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN2_CORE,
+        .enable_bit     = 7,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk mmchs1_fck = {
+        .name           = "mmchs1_fck",
+        .parent         = &func_96m_ck,
+        .flags          = CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN2_CORE,
+        .enable_bit     = 7,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk mmchs2_ick = {
+        .name           = "mmchs2_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN2_CORE,
+        .enable_bit     = 8,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk mmchs2_fck = {
+        .name           = "mmchs2_fck",
+        .parent         = &func_96m_ck,
+        .flags          = CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN2_CORE,
+        .enable_bit     = 8,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk gpio5_ick = {
+        .name           = "gpio5_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN2_CORE,
+        .enable_bit     = 10,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk gpio5_fck = {
+        .name           = "gpio5_fck",
+        .parent         = &func_32k_ck,
+        .flags          = CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN2_CORE,
+        .enable_bit     = 10,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk mdm_intc_ick = {
+        .name           = "mdm_intc_ick",
+        .parent         = &l4_ck,
+        .flags          = CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_ICLKEN2_CORE,
+        .enable_bit     = 11,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk mmchsdb1_fck = {
+        .name           = "mmchsdb1_fck",
+        .parent         = &func_32k_ck,
+        .flags          = CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN2_CORE,
+        .enable_bit     = 16,
+        .recalc         = &omap2_followparent_recalc,
+};
+static struct clk mmchsdb2_fck = {
+        .name           = "mmchsdb2_fck",
+        .parent         = &func_32k_ck,
+        .flags          = CLOCK_IN_OMAP243X,
+        .enable_reg     = (void __iomem *)&CM_FCLKEN2_CORE,
+        .enable_bit     = 17,
+        .recalc         = &omap2_followparent_recalc,
+};
+/*
+ * This clock is a composite clock which does entire set changes then
+ * forces a rebalance. It keys on the MPU speed, but it really could
+ * be any key speed part of a set in the rate table.
+ *
+ * to really change a set, you need memory table sets which get changed
+ * in sram, pre-notifiers & post notifiers, changing the top set, without
+ * having low level display recalc's won't work... this is why dpm notifiers
+ * work, isr's off, walk a list of clocks already _off_ and not messing with
+ * the bus.
+ *
+ * This clock should have no parent. It embodies the entire upper level
+ * active set. A parent will mess up some of the init also.
+ */
+static struct clk virt_prcm_set = {
+        .name           = "virt_prcm_set",
+        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
+                                VIRTUAL_CLOCK | ALWAYS_ENABLED | DELAYED_APP,
+        .parent         = &mpu_ck,      /* Indexed by mpu speed, no parent */
+        .recalc         = &omap2_mpu_recalc,    /* sets are keyed on mpu rate */
+        .set_rate       = &omap2_select_table_rate,
+        .round_rate     = &omap2_round_to_table_rate,
+};
+static struct clk *onchip_clks[] = {
+        /* external root sources */
+        &func_32k_ck,
+        &osc_ck,
+        &sys_ck,
+        &alt_ck,
+        /* internal analog sources */
+        &dpll_ck,
+        &apll96_ck,
+        &apll54_ck,
+        /* internal prcm root sources */
+        &func_54m_ck,
+        &core_ck,
+        &sleep_ck,
+        &func_96m_ck,
+        &func_48m_ck,
+        &func_12m_ck,
+        &wdt1_osc_ck,
+        &sys_clkout,
+        &sys_clkout2,
+        /* mpu domain clocks */
+        &mpu_ck,
+        /* dsp domain clocks */
+        &iva2_1_fck,            /* 2430 */
+        &iva2_1_ick,
+        &dsp_ick,               /* 2420 */
+        &dsp_fck,
+        &iva1_ifck,
+        &iva1_mpu_int_ifck,
+        /* GFX domain clocks */
+        &gfx_3d_fck,
+        &gfx_2d_fck,
+        &gfx_ick,
+        /* Modem domain clocks */
+        &mdm_ick,
+        &mdm_osc_ck,
+        /* DSS domain clocks */
+        &dss_ick,
+        &dss1_fck,
+        &dss2_fck,
+        &dss_54m_fck,
+        /* L3 domain clocks */
+        &core_l3_ck,
+        &ssi_ssr_sst_fck,
+        &usb_l4_ick,
+        /* L4 domain clocks */
+        &l4_ck,                 /* used as both core_l4 and wu_l4 */
+        &ssi_l4_ick,
+        /* virtual meta-group clock */
+        &virt_prcm_set,
+        /* general l4 interface ck, multi-parent functional clk */
+        &gpt1_ick,
+        &gpt1_fck,
+        &gpt2_ick,
+        &gpt2_fck,
+        &gpt3_ick,
+        &gpt3_fck,
+        &gpt4_ick,
+        &gpt4_fck,
+        &gpt5_ick,
+        &gpt5_fck,
+        &gpt6_ick,
+        &gpt6_fck,
+        &gpt7_ick,
+        &gpt7_fck,
+        &gpt8_ick,
+        &gpt8_fck,
+        &gpt9_ick,
+        &gpt9_fck,
+        &gpt10_ick,
+        &gpt10_fck,
+        &gpt11_ick,
+        &gpt11_fck,
+        &gpt12_ick,
+        &gpt12_fck,
+        &mcbsp1_ick,
+        &mcbsp1_fck,
+        &mcbsp2_ick,
+        &mcbsp2_fck,
+        &mcbsp3_ick,
+        &mcbsp3_fck,
+        &mcbsp4_ick,
+        &mcbsp4_fck,
+        &mcbsp5_ick,
+        &mcbsp5_fck,
+        &mcspi1_ick,
+        &mcspi1_fck,
+        &mcspi2_ick,
+        &mcspi2_fck,
+        &mcspi3_ick,
+        &mcspi3_fck,
+        &uart1_ick,
+        &uart1_fck,
+        &uart2_ick,
+        &uart2_fck,
+        &uart3_ick,
+        &uart3_fck,
+        &gpios_ick,
+        &gpios_fck,
+        &mpu_wdt_ick,
+        &mpu_wdt_fck,
+        &sync_32k_ick,
+        &wdt1_ick,
+        &omapctrl_ick,
+        &icr_ick,
+        &cam_fck,
+        &cam_ick,
+        &mailboxes_ick,
+        &wdt4_ick,
+        &wdt4_fck,
+        &wdt3_ick,
+        &wdt3_fck,
+        &mspro_ick,
+        &mspro_fck,
+        &mmc_ick,
+        &mmc_fck,
+        &fac_ick,
+        &fac_fck,
+        &eac_ick,
+        &eac_fck,
+        &hdq_ick,
+        &hdq_fck,
+        &i2c1_ick,
+        &i2c1_fck,
+        &i2chs1_fck,
+        &i2c2_ick,
+        &i2c2_fck,
+        &i2chs2_fck,
+        &vlynq_ick,
+        &vlynq_fck,
+        &sdrc_ick,
+        &des_ick,
+        &sha_ick,
+        &rng_ick,
+        &aes_ick,
+        &pka_ick,
+        &usb_fck,
+        &usbhs_ick,
+        &mmchs1_ick,
+        &mmchs1_fck,
+        &mmchs2_ick,
+        &mmchs2_fck,
+        &gpio5_ick,
+        &gpio5_fck,
+        &mdm_intc_ick,
+        &mmchsdb1_fck,
+        &mmchsdb2_fck,
+};
+#endif
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
new file mode 100644
index 000000000000..7181edb89352
--- /dev/null
+++ b/arch/arm/mach-omap2/devices.c
@@ -0,0 +1,89 @@
+/*
+ * linux/arch/arm/mach-omap2/devices.c
+ *
+ * OMAP2 platform device setup/initialization
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <asm/hardware.h>
+#include <asm/io.h>
+#include <asm/mach-types.h>
+#include <asm/mach/map.h>
+#include <asm/arch/tc.h>
+#include <asm/arch/board.h>
+#include <asm/arch/mux.h>
+#include <asm/arch/gpio.h>
+extern void omap_nop_release(struct device *dev);
+/*-------------------------------------------------------------------------*/
+#if     defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE)
+#define OMAP2_I2C_BASE2         0x48072000
+#define OMAP2_I2C_INT2          57
+static struct resource i2c_resources2[] = {
+        {
+                .start          = OMAP2_I2C_BASE2,
+                .end            = OMAP2_I2C_BASE2 + 0x3f,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = OMAP2_I2C_INT2,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+static struct platform_device omap_i2c_device2 = {
+        .name           = "i2c_omap",
+        .id             = 2,
+        .dev = {
+                .release        = omap_nop_release,
+        },
+        .num_resources  = ARRAY_SIZE(i2c_resources2),
+        .resource       = i2c_resources2,
+};
+/* See also arch/arm/plat-omap/devices.c for first I2C on 24xx */
+static void omap_init_i2c(void)
+{
+        /* REVISIT: Second I2C not in use on H4? */
+        if (machine_is_omap_h4())
+                return;
+        omap_cfg_reg(J15_24XX_I2C2_SCL);
+        omap_cfg_reg(H19_24XX_I2C2_SDA);
+        (void) platform_device_register(&omap_i2c_device2);
+}
+#else
+static void omap_init_i2c(void) {}
+#endif
+/*-------------------------------------------------------------------------*/
+static int __init omap2_init_devices(void)
+{
+        /* please keep these calls, and their implementations above,
+         * in alphabetical order so they're easier to sort through.
+         */
+        omap_init_i2c();
+        return 0;
+}
+arch_initcall(omap2_init_devices);
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
new file mode 100644
index 000000000000..76187300f2b6
--- /dev/null
+++ b/arch/arm/mach-omap2/id.c
@@ -0,0 +1,124 @@
+/*
+ * linux/arch/arm/mach-omap2/id.c
+ *
+ * OMAP2 CPU identification code
+ *
+ * Copyright (C) 2005 Nokia Corporation
+ * Written by Tony Lindgren <tony@atomide.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <asm/io.h>
+#define OMAP24XX_TAP_BASE       io_p2v(0x48014000)
+#define OMAP_TAP_IDCODE         0x0204
+#define OMAP_TAP_PROD_ID        0x0208
+#define OMAP_TAP_DIE_ID_0       0x0218
+#define OMAP_TAP_DIE_ID_1       0x021C
+#define OMAP_TAP_DIE_ID_2       0x0220
+#define OMAP_TAP_DIE_ID_3       0x0224
+/* system_rev fields for OMAP2 processors:
+ *   CPU id bits     [31:16],
+ *   CPU device type [15:12], (unprg,normal,POP)
+ *   CPU revision    [11:08]
+ *   CPU class bits  [07:00]
+ */
+struct omap_id {
+        u16     hawkeye;        /* Silicon type (Hawkeye id) */
+        u8      dev;            /* Device type from production_id reg */
+        u32     type;           /* combined type id copied to system_rev */
+};
+/* Register values to detect the OMAP version */
+static struct omap_id omap_ids[] __initdata = {
+        { .hawkeye = 0xb5d9, .dev = 0x0, .type = 0x24200000 },
+        { .hawkeye = 0xb5d9, .dev = 0x1, .type = 0x24201000 },
+        { .hawkeye = 0xb5d9, .dev = 0x2, .type = 0x24202000 },
+        { .hawkeye = 0xb5d9, .dev = 0x4, .type = 0x24220000 },
+        { .hawkeye = 0xb5d9, .dev = 0x8, .type = 0x24230000 },
+        { .hawkeye = 0xb68a, .dev = 0x0, .type = 0x24300000 },
+};
+static u32 __init read_tap_reg(int reg)
+{
+        return __raw_readl(OMAP24XX_TAP_BASE + reg);
+}
+void __init omap2_check_revision(void)
+{
+        int i, j;
+        u32 idcode;
+        u32 prod_id;
+        u16 hawkeye;
+        u8  dev_type;
+        u8  rev;
+        idcode = read_tap_reg(OMAP_TAP_IDCODE);
+        prod_id = read_tap_reg(OMAP_TAP_PROD_ID);
+        hawkeye = (idcode >> 12) & 0xffff;
+        rev = (idcode >> 28) & 0x0f;
+        dev_type = (prod_id >> 16) & 0x0f;
+#ifdef DEBUG
+        printk(KERN_DEBUG "OMAP_TAP_IDCODE 0x%08x REV %i HAWKEYE 0x%04x MANF %03x\n",
+                idcode, rev, hawkeye, (idcode >> 1) & 0x7ff);
+        printk(KERN_DEBUG "OMAP_TAP_DIE_ID_0: 0x%08x\n",
+                read_tap_reg(OMAP_TAP_DIE_ID_0));
+        printk(KERN_DEBUG "OMAP_TAP_DIE_ID_1: 0x%08x DEV_REV: %i\n",
+                read_tap_reg(OMAP_TAP_DIE_ID_1),
+               (read_tap_reg(OMAP_TAP_DIE_ID_1) >> 28) & 0xf);
+        printk(KERN_DEBUG "OMAP_TAP_DIE_ID_2: 0x%08x\n",
+                read_tap_reg(OMAP_TAP_DIE_ID_2));
+        printk(KERN_DEBUG "OMAP_TAP_DIE_ID_3: 0x%08x\n",
+                read_tap_reg(OMAP_TAP_DIE_ID_3));
+        printk(KERN_DEBUG "OMAP_TAP_PROD_ID_0: 0x%08x DEV_TYPE: %i\n",
+                prod_id, dev_type);
+#endif
+        /* Check hawkeye ids */
+        for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
+                if (hawkeye == omap_ids[i].hawkeye)
+                        break;
+        }
+        if (i == ARRAY_SIZE(omap_ids)) {
+                printk(KERN_ERR "Unknown OMAP CPU id\n");
+                return;
+        }
+        for (j = i; j < ARRAY_SIZE(omap_ids); j++) {
+                if (dev_type == omap_ids[j].dev)
+                        break;
+        }
+        if (j == ARRAY_SIZE(omap_ids)) {
+                printk(KERN_ERR "Unknown OMAP device type. "
+                                "Handling it as OMAP%04x\n",
+                                omap_ids[i].type >> 16);
+                j = i;
+        }
+        system_rev = omap_ids[j].type;
+        system_rev |= rev << 8;
+        /* Add the cpu class info (24xx) */
+        system_rev |= 0x24;
+        pr_info("OMAP%04x", system_rev >> 16);
+        if ((system_rev >> 8) & 0x0f)
+                printk("%x", (system_rev >> 8) & 0x0f);
+        printk("\n");
+}
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
new file mode 100644
index 000000000000..8ea67bf196a5
--- /dev/null
+++ b/arch/arm/mach-omap2/io.c
@@ -0,0 +1,53 @@
+/*
+ * linux/arch/arm/mach-omap2/io.c
+ *
+ * OMAP2 I/O mapping code
+ *
+ * Copyright (C) 2005 Nokia Corporation
+ * Author: Juha Yrj�l� <juha.yrjola@nokia.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <asm/mach/map.h>
+#include <asm/io.h>
+#include <asm/arch/mux.h>
+extern void omap_sram_init(void);
+extern int omap2_clk_init(void);
+extern void omap2_check_revision(void);
+/*
+ * The machine specific code may provide the extra mapping besides the
+ * default mapping provided here.
+ */
+static struct map_desc omap2_io_desc[] __initdata = {
+        {
+                .virtual        = L3_24XX_VIRT,
+                .pfn            = __phys_to_pfn(L3_24XX_PHYS),
+                .length         = L3_24XX_SIZE,
+                .type           = MT_DEVICE
+        },
+        {
+                .virtual        = L4_24XX_VIRT,
+                .pfn            = __phys_to_pfn(L4_24XX_PHYS),
+                .length         = L4_24XX_SIZE,
+                .type           = MT_DEVICE
+        }
+};
+void __init omap_map_common_io(void)
+{
+        iotable_init(omap2_io_desc, ARRAY_SIZE(omap2_io_desc));
+        omap2_check_revision();
+        omap_sram_init();
+        omap2_mux_init();
+        omap2_clk_init();
+}
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
new file mode 100644
index 000000000000..d7baff675cfe
--- /dev/null
+++ b/arch/arm/mach-omap2/irq.c
@@ -0,0 +1,149 @@
+/*
+ * linux/arch/arm/mach-omap/omap2/irq.c
+ *
+ * Interrupt handler for OMAP2 boards.
+ *
+ * Copyright (C) 2005 Nokia Corporation
+ * Author: Paul Mundt <paul.mundt@nokia.com>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/config.h>
+#include <linux/interrupt.h>
+#include <asm/hardware.h>
+#include <asm/mach/irq.h>
+#include <asm/irq.h>
+#include <asm/io.h>
+#define INTC_REVISION   0x0000
+#define INTC_SYSCONFIG  0x0010
+#define INTC_SYSSTATUS  0x0014
+#define INTC_CONTROL    0x0048
+#define INTC_MIR_CLEAR0 0x0088
+#define INTC_MIR_SET0   0x008c
+/*
+ * OMAP2 has a number of different interrupt controllers, each interrupt
+ * controller is identified as its own "bank". Register definitions are
+ * fairly consistent for each bank, but not all registers are implemented
+ * for each bank.. when in doubt, consult the TRM.
+ */
+static struct omap_irq_bank {
+        unsigned long base_reg;
+        unsigned int nr_irqs;
+} __attribute__ ((aligned(4))) irq_banks[] = {
+        {
+                /* MPU INTC */
+                .base_reg       = OMAP24XX_IC_BASE,
+                .nr_irqs        = 96,
+        }, {
+                /* XXX: DSP INTC */
+#if 0
+        /*
+         * Commented out for now until we fix the IVA clocking
+         */
+#ifdef CONFIG_ARCH_OMAP2420
+        }, {
+                /* IVA INTC (2420 only) */
+                .base_reg       = OMAP24XX_IVA_INTC_BASE,
+                .nr_irqs        = 16,   /* Actually 32, but only 16 are used */
+#endif
+#endif
+        }
+};
+/* XXX: FIQ and additional INTC support (only MPU at the moment) */
+static void omap_ack_irq(unsigned int irq)
+{
+        omap_writel(0x1, irq_banks[0].base_reg + INTC_CONTROL);
+}
+static void omap_mask_irq(unsigned int irq)
+{
+        int offset = (irq >> 5) << 5;
+        if (irq >= 64) {
+                irq %= 64;
+        } else if (irq >= 32) {
+                irq %= 32;
+        }
+        omap_writel(1 << irq, irq_banks[0].base_reg + INTC_MIR_SET0 + offset);
+}
+static void omap_unmask_irq(unsigned int irq)
+{
+        int offset = (irq >> 5) << 5;
+        if (irq >= 64) {
+                irq %= 64;
+        } else if (irq >= 32) {
+                irq %= 32;
+        }
+        omap_writel(1 << irq, irq_banks[0].base_reg + INTC_MIR_CLEAR0 + offset);
+}
+static void omap_mask_ack_irq(unsigned int irq)
+{
+        omap_mask_irq(irq);
+        omap_ack_irq(irq);
+}
+static struct irqchip omap_irq_chip = {
+        .ack    = omap_mask_ack_irq,
+        .mask   = omap_mask_irq,
+        .unmask = omap_unmask_irq,
+};
+static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank)
+{
+        unsigned long tmp;
+        tmp = omap_readl(bank->base_reg + INTC_REVISION) & 0xff;
+        printk(KERN_INFO "IRQ: Found an INTC at 0x%08lx "
+                         "(revision %ld.%ld) with %d interrupts\n",
+                         bank->base_reg, tmp >> 4, tmp & 0xf, bank->nr_irqs);
+        tmp = omap_readl(bank->base_reg + INTC_SYSCONFIG);
+        tmp |= 1 << 1;  /* soft reset */
+        omap_writel(tmp, bank->base_reg + INTC_SYSCONFIG);
+        while (!(omap_readl(bank->base_reg + INTC_SYSSTATUS) & 0x1))
+                /* Wait for reset to complete */;
+}
+void __init omap_init_irq(void)
+{
+        unsigned long nr_irqs = 0;
+        unsigned int nr_banks = 0;
+        int i;
+        for (i = 0; i < ARRAY_SIZE(irq_banks); i++) {
+                struct omap_irq_bank *bank = irq_banks + i;
+                /* XXX */
+                if (!bank->base_reg)
+                        continue;
+                omap_irq_bank_init_one(bank);
+                nr_irqs += bank->nr_irqs;
+                nr_banks++;
+        }
+        printk(KERN_INFO "Total of %ld interrupts on %d active controller%s\n",
+               nr_irqs, nr_banks, nr_banks > 1 ? "s" : "");
+        for (i = 0; i < nr_irqs; i++) {
+                set_irq_chip(i, &omap_irq_chip);
+                set_irq_handler(i, do_level_IRQ);
+                set_irq_flags(i, IRQF_VALID);
+        }
+}
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
new file mode 100644
index 000000000000..ea4654815dd1
--- /dev/null
+++ b/arch/arm/mach-omap2/mux.c
@@ -0,0 +1,65 @@
+/*
+ * linux/arch/arm/mach-omap2/mux.c
+ *
+ * OMAP1 pin multiplexing configurations
+ *
+ * Copyright (C) 2003 - 2005 Nokia Corporation
+ *
+ * Written by Tony Lindgren <tony.lindgren@nokia.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <asm/system.h>
+#include <asm/io.h>
+#include <linux/spinlock.h>
+#include <asm/arch/mux.h>
+#ifdef CONFIG_OMAP_MUX
+/* NOTE: See mux.h for the enumeration */
+struct pin_config __initdata_or_module omap24xx_pins[] = {
+/*
+ *      description                     mux     mux     pull    pull    debug
+ *                                      offset  mode    ena     type
+ */
+/* 24xx I2C */
+MUX_CFG_24XX("M19_24XX_I2C1_SCL",       0x111,  0,      0,      0,      1)
+MUX_CFG_24XX("L15_24XX_I2C1_SDA",       0x112,  0,      0,      0,      1)
+MUX_CFG_24XX("J15_24XX_I2C2_SCL",       0x113,  0,      0,      0,      1)
+MUX_CFG_24XX("H19_24XX_I2C2_SDA",       0x114,  0,      0,      0,      1)
+/* Menelaus interrupt */
+MUX_CFG_24XX("W19_24XX_SYS_NIRQ",       0x12c,  0,      1,      1,      1)
+/* 24xx GPIO */
+MUX_CFG_24XX("Y20_24XX_GPIO60",         0x12c,  3,      0,      0,      1)
+MUX_CFG_24XX("M15_24XX_GPIO92",         0x10a,  3,      0,      0,      1)
+};
+int __init omap2_mux_init(void)
+{
+        omap_mux_register(omap24xx_pins, ARRAY_SIZE(omap24xx_pins));
+        return 0;
+}
+#endif
diff --git a/arch/arm/mach-omap2/prcm.h b/arch/arm/mach-omap2/prcm.h
new file mode 100644
index 000000000000..2eb89b936c83
--- /dev/null
+++ b/arch/arm/mach-omap2/prcm.h
@@ -0,0 +1,419 @@
+/*
+ * prcm.h - Access definations for use in OMAP24XX clock and power management
+ *
+ * Copyright (C) 2005 Texas Instruments, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#ifndef __ASM_ARM_ARCH_DPM_PRCM_H
+#define __ASM_ARM_ARCH_DPM_PRCM_H
+/* SET_PERFORMANCE_LEVEL PARAMETERS */
+#define PRCM_HALF_SPEED 1
+#define PRCM_FULL_SPEED 2
+#ifndef __ASSEMBLER__
+#define PRCM_REG32(offset)      __REG32(OMAP24XX_PRCM_BASE + (offset))
+#define PRCM_REVISION           PRCM_REG32(0x000)
+#define PRCM_SYSCONFIG          PRCM_REG32(0x010)
+#define PRCM_IRQSTATUS_MPU      PRCM_REG32(0x018)
+#define PRCM_IRQENABLE_MPU      PRCM_REG32(0x01C)
+#define PRCM_VOLTCTRL           PRCM_REG32(0x050)
+#define PRCM_VOLTST             PRCM_REG32(0x054)
+#define PRCM_CLKSRC_CTRL        PRCM_REG32(0x060)
+#define PRCM_CLKOUT_CTRL        PRCM_REG32(0x070)
+#define PRCM_CLKEMUL_CTRL       PRCM_REG32(0x078)
+#define PRCM_CLKCFG_CTRL        PRCM_REG32(0x080)
+#define PRCM_CLKCFG_STATUS      PRCM_REG32(0x084)
+#define PRCM_VOLTSETUP          PRCM_REG32(0x090)
+#define PRCM_CLKSSETUP          PRCM_REG32(0x094)
+#define PRCM_POLCTRL            PRCM_REG32(0x098)
+/* GENERAL PURPOSE */
+#define GENERAL_PURPOSE1        PRCM_REG32(0x0B0)
+#define GENERAL_PURPOSE2        PRCM_REG32(0x0B4)
+#define GENERAL_PURPOSE3        PRCM_REG32(0x0B8)
+#define GENERAL_PURPOSE4        PRCM_REG32(0x0BC)
+#define GENERAL_PURPOSE5        PRCM_REG32(0x0C0)
+#define GENERAL_PURPOSE6        PRCM_REG32(0x0C4)
+#define GENERAL_PURPOSE7        PRCM_REG32(0x0C8)
+#define GENERAL_PURPOSE8        PRCM_REG32(0x0CC)
+#define GENERAL_PURPOSE9        PRCM_REG32(0x0D0)
+#define GENERAL_PURPOSE10       PRCM_REG32(0x0D4)
+#define GENERAL_PURPOSE11       PRCM_REG32(0x0D8)
+#define GENERAL_PURPOSE12       PRCM_REG32(0x0DC)
+#define GENERAL_PURPOSE13       PRCM_REG32(0x0E0)
+#define GENERAL_PURPOSE14       PRCM_REG32(0x0E4)
+#define GENERAL_PURPOSE15       PRCM_REG32(0x0E8)
+#define GENERAL_PURPOSE16       PRCM_REG32(0x0EC)
+#define GENERAL_PURPOSE17       PRCM_REG32(0x0F0)
+#define GENERAL_PURPOSE18       PRCM_REG32(0x0F4)
+#define GENERAL_PURPOSE19       PRCM_REG32(0x0F8)
+#define GENERAL_PURPOSE20       PRCM_REG32(0x0FC)
+/* MPU */
+#define CM_CLKSEL_MPU           PRCM_REG32(0x140)
+#define CM_CLKSTCTRL_MPU        PRCM_REG32(0x148)
+#define RM_RSTST_MPU            PRCM_REG32(0x158)
+#define PM_WKDEP_MPU            PRCM_REG32(0x1C8)
+#define PM_EVGENCTRL_MPU        PRCM_REG32(0x1D4)
+#define PM_EVEGENONTIM_MPU      PRCM_REG32(0x1D8)
+#define PM_EVEGENOFFTIM_MPU     PRCM_REG32(0x1DC)
+#define PM_PWSTCTRL_MPU         PRCM_REG32(0x1E0)
+#define PM_PWSTST_MPU           PRCM_REG32(0x1E4)
+/* CORE */
+#define CM_FCLKEN1_CORE         PRCM_REG32(0x200)
+#define CM_FCLKEN2_CORE         PRCM_REG32(0x204)
+#define CM_FCLKEN3_CORE         PRCM_REG32(0x208)
+#define CM_ICLKEN1_CORE         PRCM_REG32(0x210)
+#define CM_ICLKEN2_CORE         PRCM_REG32(0x214)
+#define CM_ICLKEN3_CORE         PRCM_REG32(0x218)
+#define CM_ICLKEN4_CORE         PRCM_REG32(0x21C)
+#define CM_IDLEST1_CORE         PRCM_REG32(0x220)
+#define CM_IDLEST2_CORE         PRCM_REG32(0x224)
+#define CM_IDLEST3_CORE         PRCM_REG32(0x228)
+#define CM_IDLEST4_CORE         PRCM_REG32(0x22C)
+#define CM_AUTOIDLE1_CORE       PRCM_REG32(0x230)
+#define CM_AUTOIDLE2_CORE       PRCM_REG32(0x234)
+#define CM_AUTOIDLE3_CORE       PRCM_REG32(0x238)
+#define CM_AUTOIDLE4_CORE       PRCM_REG32(0x23C)
+#define CM_CLKSEL1_CORE         PRCM_REG32(0x240)
+#define CM_CLKSEL2_CORE         PRCM_REG32(0x244)
+#define CM_CLKSTCTRL_CORE       PRCM_REG32(0x248)
+#define PM_WKEN1_CORE           PRCM_REG32(0x2A0)
+#define PM_WKEN2_CORE           PRCM_REG32(0x2A4)
+#define PM_WKST1_CORE           PRCM_REG32(0x2B0)
+#define PM_WKST2_CORE           PRCM_REG32(0x2B4)
+#define PM_WKDEP_CORE           PRCM_REG32(0x2C8)
+#define PM_PWSTCTRL_CORE        PRCM_REG32(0x2E0)
+#define PM_PWSTST_CORE          PRCM_REG32(0x2E4)
+/* GFX */
+#define CM_FCLKEN_GFX           PRCM_REG32(0x300)
+#define CM_ICLKEN_GFX           PRCM_REG32(0x310)
+#define CM_IDLEST_GFX           PRCM_REG32(0x320)
+#define CM_CLKSEL_GFX           PRCM_REG32(0x340)
+#define CM_CLKSTCTRL_GFX        PRCM_REG32(0x348)
+#define RM_RSTCTRL_GFX          PRCM_REG32(0x350)
+#define RM_RSTST_GFX            PRCM_REG32(0x358)
+#define PM_WKDEP_GFX            PRCM_REG32(0x3C8)
+#define PM_PWSTCTRL_GFX         PRCM_REG32(0x3E0)
+#define PM_PWSTST_GFX           PRCM_REG32(0x3E4)
+/* WAKE-UP */
+#define CM_FCLKEN_WKUP          PRCM_REG32(0x400)
+#define CM_ICLKEN_WKUP          PRCM_REG32(0x410)
+#define CM_IDLEST_WKUP          PRCM_REG32(0x420)
+#define CM_AUTOIDLE_WKUP        PRCM_REG32(0x430)
+#define CM_CLKSEL_WKUP          PRCM_REG32(0x440)
+#define RM_RSTCTRL_WKUP         PRCM_REG32(0x450)
+#define RM_RSTTIME_WKUP         PRCM_REG32(0x454)
+#define RM_RSTST_WKUP           PRCM_REG32(0x458)
+#define PM_WKEN_WKUP            PRCM_REG32(0x4A0)
+#define PM_WKST_WKUP            PRCM_REG32(0x4B0)
+/* CLOCKS */
+#define CM_CLKEN_PLL            PRCM_REG32(0x500)
+#define CM_IDLEST_CKGEN         PRCM_REG32(0x520)
+#define CM_AUTOIDLE_PLL         PRCM_REG32(0x530)
+#define CM_CLKSEL1_PLL          PRCM_REG32(0x540)
+#define CM_CLKSEL2_PLL          PRCM_REG32(0x544)
+/* DSP */
+#define CM_FCLKEN_DSP           PRCM_REG32(0x800)
+#define CM_ICLKEN_DSP           PRCM_REG32(0x810)
+#define CM_IDLEST_DSP           PRCM_REG32(0x820)
+#define CM_AUTOIDLE_DSP         PRCM_REG32(0x830)
+#define CM_CLKSEL_DSP           PRCM_REG32(0x840)
+#define CM_CLKSTCTRL_DSP        PRCM_REG32(0x848)
+#define RM_RSTCTRL_DSP          PRCM_REG32(0x850)
+#define RM_RSTST_DSP            PRCM_REG32(0x858)
+#define PM_WKEN_DSP             PRCM_REG32(0x8A0)
+#define PM_WKDEP_DSP            PRCM_REG32(0x8C8)
+#define PM_PWSTCTRL_DSP         PRCM_REG32(0x8E0)
+#define PM_PWSTST_DSP           PRCM_REG32(0x8E4)
+#define PRCM_IRQSTATUS_DSP      PRCM_REG32(0x8F0)
+#define PRCM_IRQENABLE_DSP      PRCM_REG32(0x8F4)
+/* IVA */
+#define PRCM_IRQSTATUS_IVA      PRCM_REG32(0x8F8)
+#define PRCM_IRQENABLE_IVA      PRCM_REG32(0x8FC)
+/* Modem on 2430 */
+#define CM_FCLKEN_MDM           PRCM_REG32(0xC00)
+#define CM_ICLKEN_MDM           PRCM_REG32(0xC10)
+#define CM_IDLEST_MDM           PRCM_REG32(0xC20)
+#define CM_CLKSEL_MDM           PRCM_REG32(0xC40)
+/* FIXME: Move to header for 2430 */
+#define DISP_BASE               (OMAP24XX_L4_IO_BASE+0x50000)
+#define DISP_REG32(offset)      __REG32(DISP_BASE + (offset))
+#define GPMC_BASE               (OMAP24XX_GPMC_BASE)
+#define GPMC_REG32(offset)      __REG32(GPMC_BASE + (offset))
+#define GPT1_BASE               (OMAP24XX_GPT1)
+#define GPT1_REG32(offset)      __REG32(GPT1_BASE + (offset))
+/* Misc sysconfig */
+#define DISPC_SYSCONFIG         DISP_REG32(0x410)
+#define SPI_BASE                (OMAP24XX_L4_IO_BASE+0x98000)
+#define MCSPI1_SYSCONFIG        __REG32(SPI_BASE + 0x10)
+#define MCSPI2_SYSCONFIG        __REG32(SPI_BASE+0x2000 + 0x10)
+//#define DSP_MMU_SYSCONFIG     0x5A000010
+#define CAMERA_MMU_SYSCONFIG    __REG32(DISP_BASE+0x2C10)
+//#define IVA_MMU_SYSCONFIG     0x5D000010
+//#define DSP_DMA_SYSCONFIG     0x00FCC02C
+#define CAMERA_DMA_SYSCONFIG    __REG32(DISP_BASE+0x282C)
+#define SYSTEM_DMA_SYSCONFIG    __REG32(DISP_BASE+0x602C)
+#define GPMC_SYSCONFIG          GPMC_REG32(0x010)
+#define MAILBOXES_SYSCONFIG     __REG32(OMAP24XX_L4_IO_BASE+0x94010)
+#define UART1_SYSCONFIG         __REG32(OMAP24XX_L4_IO_BASE+0x6A054)
+#define UART2_SYSCONFIG         __REG32(OMAP24XX_L4_IO_BASE+0x6C054)
+#define UART3_SYSCONFIG         __REG32(OMAP24XX_L4_IO_BASE+0x6E054)
+//#define IVA_SYSCONFIG         0x5C060010
+#define SDRC_SYSCONFIG          __REG32(OMAP24XX_SDRC_BASE+0x10)
+#define SMS_SYSCONFIG           __REG32(OMAP24XX_SMS_BASE+0x10)
+#define SSI_SYSCONFIG           __REG32(DISP_BASE+0x8010)
+//#define VLYNQ_SYSCONFIG       0x67FFFE10
+/* rkw - good cannidates for PM_ to start what nm was trying */
+#define OMAP24XX_GPT2           (OMAP24XX_L4_IO_BASE+0x2A000)
+#define OMAP24XX_GPT3           (OMAP24XX_L4_IO_BASE+0x78000)
+#define OMAP24XX_GPT4           (OMAP24XX_L4_IO_BASE+0x7A000)
+#define OMAP24XX_GPT5           (OMAP24XX_L4_IO_BASE+0x7C000)
+#define OMAP24XX_GPT6           (OMAP24XX_L4_IO_BASE+0x7E000)
+#define OMAP24XX_GPT7           (OMAP24XX_L4_IO_BASE+0x80000)
+#define OMAP24XX_GPT8           (OMAP24XX_L4_IO_BASE+0x82000)
+#define OMAP24XX_GPT9           (OMAP24XX_L4_IO_BASE+0x84000)
+#define OMAP24XX_GPT10          (OMAP24XX_L4_IO_BASE+0x86000)
+#define OMAP24XX_GPT11          (OMAP24XX_L4_IO_BASE+0x88000)
+#define OMAP24XX_GPT12          (OMAP24XX_L4_IO_BASE+0x8A000)
+#define GPTIMER1_SYSCONFIG      GPT1_REG32(0x010)
+#define GPTIMER2_SYSCONFIG      __REG32(OMAP24XX_GPT2 + 0x10)
+#define GPTIMER3_SYSCONFIG      __REG32(OMAP24XX_GPT3 + 0x10)
+#define GPTIMER4_SYSCONFIG      __REG32(OMAP24XX_GPT4 + 0x10)
+#define GPTIMER5_SYSCONFIG      __REG32(OMAP24XX_GPT5 + 0x10)
+#define GPTIMER6_SYSCONFIG      __REG32(OMAP24XX_GPT6 + 0x10)
+#define GPTIMER7_SYSCONFIG      __REG32(OMAP24XX_GPT7 + 0x10)
+#define GPTIMER8_SYSCONFIG      __REG32(OMAP24XX_GPT8 + 0x10)
+#define GPTIMER9_SYSCONFIG      __REG32(OMAP24XX_GPT9 + 0x10)
+#define GPTIMER10_SYSCONFIG     __REG32(OMAP24XX_GPT10 + 0x10)
+#define GPTIMER11_SYSCONFIG     __REG32(OMAP24XX_GPT11 + 0x10)
+#define GPTIMER12_SYSCONFIG     __REG32(OMAP24XX_GPT12 + 0x10)
+#define GPIOX_BASE(X)           (OMAP24XX_GPIO_BASE+(0x2000*((X)-1)))
+#define GPIO1_SYSCONFIG         __REG32((GPIOX_BASE(1)+0x10))
+#define GPIO2_SYSCONFIG         __REG32((GPIOX_BASE(2)+0x10))
+#define GPIO3_SYSCONFIG         __REG32((GPIOX_BASE(3)+0x10))
+#define GPIO4_SYSCONFIG         __REG32((GPIOX_BASE(4)+0x10))
+/* GP TIMER 1 */
+#define GPTIMER1_TISTAT         GPT1_REG32(0x014)
+#define GPTIMER1_TISR           GPT1_REG32(0x018)
+#define GPTIMER1_TIER           GPT1_REG32(0x01C)
+#define GPTIMER1_TWER           GPT1_REG32(0x020)
+#define GPTIMER1_TCLR           GPT1_REG32(0x024)
+#define GPTIMER1_TCRR           GPT1_REG32(0x028)
+#define GPTIMER1_TLDR           GPT1_REG32(0x02C)
+#define GPTIMER1_TTGR           GPT1_REG32(0x030)
+#define GPTIMER1_TWPS           GPT1_REG32(0x034)
+#define GPTIMER1_TMAR           GPT1_REG32(0x038)
+#define GPTIMER1_TCAR1          GPT1_REG32(0x03C)
+#define GPTIMER1_TSICR          GPT1_REG32(0x040)
+#define GPTIMER1_TCAR2          GPT1_REG32(0x044)
+/* rkw -- base fix up please... */
+#define GPTIMER3_TISR           __REG32(OMAP24XX_L4_IO_BASE+0x78018)
+/* SDRC */
+#define SDRC_DLLA_CTRL          __REG32(OMAP24XX_SDRC_BASE+0x060)
+#define SDRC_DLLA_STATUS        __REG32(OMAP24XX_SDRC_BASE+0x064)
+#define SDRC_DLLB_CTRL          __REG32(OMAP24XX_SDRC_BASE+0x068)
+#define SDRC_DLLB_STATUS        __REG32(OMAP24XX_SDRC_BASE+0x06C)
+#define SDRC_POWER              __REG32(OMAP24XX_SDRC_BASE+0x070)
+#define SDRC_MR_0               __REG32(OMAP24XX_SDRC_BASE+0x084)
+/* GPIO 1 */
+#define GPIO1_BASE              GPIOX_BASE(1)
+#define GPIO1_REG32(offset)     __REG32(GPIO1_BASE + (offset))
+#define GPIO1_IRQENABLE1        GPIO1_REG32(0x01C)
+#define GPIO1_IRQSTATUS1        GPIO1_REG32(0x018)
+#define GPIO1_IRQENABLE2        GPIO1_REG32(0x02C)
+#define GPIO1_IRQSTATUS2        GPIO1_REG32(0x028)
+#define GPIO1_WAKEUPENABLE      GPIO1_REG32(0x020)
+#define GPIO1_RISINGDETECT      GPIO1_REG32(0x048)
+#define GPIO1_DATAIN            GPIO1_REG32(0x038)
+#define GPIO1_OE                GPIO1_REG32(0x034)
+#define GPIO1_DATAOUT           GPIO1_REG32(0x03C)
+/* GPIO2 */
+#define GPIO2_BASE              GPIOX_BASE(2)
+#define GPIO2_REG32(offset)     __REG32(GPIO2_BASE + (offset))
+#define GPIO2_IRQENABLE1        GPIO2_REG32(0x01C)
+#define GPIO2_IRQSTATUS1        GPIO2_REG32(0x018)
+#define GPIO2_IRQENABLE2        GPIO2_REG32(0x02C)
+#define GPIO2_IRQSTATUS2        GPIO2_REG32(0x028)
+#define GPIO2_WAKEUPENABLE      GPIO2_REG32(0x020)
+#define GPIO2_RISINGDETECT      GPIO2_REG32(0x048)
+#define GPIO2_DATAIN            GPIO2_REG32(0x038)
+#define GPIO2_OE                GPIO2_REG32(0x034)
+#define GPIO2_DATAOUT           GPIO2_REG32(0x03C)
+/* GPIO 3 */
+#define GPIO3_BASE              GPIOX_BASE(3)
+#define GPIO3_REG32(offset)     __REG32(GPIO3_BASE + (offset))
+#define GPIO3_IRQENABLE1        GPIO3_REG32(0x01C)
+#define GPIO3_IRQSTATUS1        GPIO3_REG32(0x018)
+#define GPIO3_IRQENABLE2        GPIO3_REG32(0x02C)
+#define GPIO3_IRQSTATUS2        GPIO3_REG32(0x028)
+#define GPIO3_WAKEUPENABLE      GPIO3_REG32(0x020)
+#define GPIO3_RISINGDETECT      GPIO3_REG32(0x048)
+#define GPIO3_FALLINGDETECT     GPIO3_REG32(0x04C)
+#define GPIO3_DATAIN            GPIO3_REG32(0x038)
+#define GPIO3_OE                GPIO3_REG32(0x034)
+#define GPIO3_DATAOUT           GPIO3_REG32(0x03C)
+#define GPIO3_DEBOUNCENABLE     GPIO3_REG32(0x050)
+#define GPIO3_DEBOUNCINGTIME    GPIO3_REG32(0x054)
+/* GPIO 4 */
+#define GPIO4_BASE              GPIOX_BASE(4)
+#define GPIO4_REG32(offset)     __REG32(GPIO4_BASE + (offset))
+#define GPIO4_IRQENABLE1        GPIO4_REG32(0x01C)
+#define GPIO4_IRQSTATUS1        GPIO4_REG32(0x018)
+#define GPIO4_IRQENABLE2        GPIO4_REG32(0x02C)
+#define GPIO4_IRQSTATUS2        GPIO4_REG32(0x028)
+#define GPIO4_WAKEUPENABLE      GPIO4_REG32(0x020)
+#define GPIO4_RISINGDETECT      GPIO4_REG32(0x048)
+#define GPIO4_FALLINGDETECT     GPIO4_REG32(0x04C)
+#define GPIO4_DATAIN            GPIO4_REG32(0x038)
+#define GPIO4_OE                GPIO4_REG32(0x034)
+#define GPIO4_DATAOUT           GPIO4_REG32(0x03C)
+#define GPIO4_DEBOUNCENABLE     GPIO4_REG32(0x050)
+#define GPIO4_DEBOUNCINGTIME    GPIO4_REG32(0x054)
+/* IO CONFIG */
+#define CONTROL_BASE            (OMAP24XX_CTRL_BASE)
+#define CONTROL_REG32(offset)   __REG32(CONTROL_BASE + (offset))
+#define CONTROL_PADCONF_SPI1_NCS2       CONTROL_REG32(0x104)
+#define CONTROL_PADCONF_SYS_XTALOUT     CONTROL_REG32(0x134)
+#define CONTROL_PADCONF_UART1_RX        CONTROL_REG32(0x0C8)
+#define CONTROL_PADCONF_MCBSP1_DX       CONTROL_REG32(0x10C)
+#define CONTROL_PADCONF_GPMC_NCS4       CONTROL_REG32(0x090)
+#define CONTROL_PADCONF_DSS_D5          CONTROL_REG32(0x0B8)
+#define CONTROL_PADCONF_DSS_D9          CONTROL_REG32(0x0BC)
+#define CONTROL_PADCONF_DSS_D13         CONTROL_REG32(0x0C0)
+#define CONTROL_PADCONF_DSS_VSYNC       CONTROL_REG32(0x0CC)
+/* CONTROL */
+#define CONTROL_DEVCONF         CONTROL_REG32(0x274)
+/* INTERRUPT CONTROLLER */
+#define INTC_BASE               (OMAP24XX_L4_IO_BASE+0xfe000)
+#define INTC_REG32(offset)      __REG32(INTC_BASE + (offset))
+#define INTC1_U_BASE            INTC_REG32(0x000)
+#define INTC_MIR0               INTC_REG32(0x084)
+#define INTC_MIR_SET0           INTC_REG32(0x08C)
+#define INTC_MIR_CLEAR0         INTC_REG32(0x088)
+#define INTC_ISR_CLEAR0         INTC_REG32(0x094)
+#define INTC_MIR1               INTC_REG32(0x0A4)
+#define INTC_MIR_SET1           INTC_REG32(0x0AC)
+#define INTC_MIR_CLEAR1         INTC_REG32(0x0A8)
+#define INTC_ISR_CLEAR1         INTC_REG32(0x0B4)
+#define INTC_MIR2               INTC_REG32(0x0C4)
+#define INTC_MIR_SET2           INTC_REG32(0x0CC)
+#define INTC_MIR_CLEAR2         INTC_REG32(0x0C8)
+#define INTC_ISR_CLEAR2         INTC_REG32(0x0D4)
+#define INTC_SIR_IRQ            INTC_REG32(0x040)
+#define INTC_CONTROL            INTC_REG32(0x048)
+#define INTC_ILR11              INTC_REG32(0x12C)
+#define INTC_ILR32              INTC_REG32(0x180)
+#define INTC_ILR37              INTC_REG32(0x194)
+#define INTC_SYSCONFIG          INTC_REG32(0x010)
+/* RAM FIREWALL */
+#define RAMFW_BASE              (0x68005000)
+#define RAMFW_REG32(offset)     __REG32(RAMFW_BASE + (offset))
+#define RAMFW_REQINFOPERM0      RAMFW_REG32(0x048)
+#define RAMFW_READPERM0         RAMFW_REG32(0x050)
+#define RAMFW_WRITEPERM0        RAMFW_REG32(0x058)
+/* GPMC CS1 FPGA ON USER INTERFACE MODULE */
+//#define DEBUG_BOARD_LED_REGISTER 0x04000014
+/* GPMC CS0 */
+#define GPMC_CONFIG1_0          GPMC_REG32(0x060)
+#define GPMC_CONFIG2_0          GPMC_REG32(0x064)
+#define GPMC_CONFIG3_0          GPMC_REG32(0x068)
+#define GPMC_CONFIG4_0          GPMC_REG32(0x06C)
+#define GPMC_CONFIG5_0          GPMC_REG32(0x070)
+#define GPMC_CONFIG6_0          GPMC_REG32(0x074)
+#define GPMC_CONFIG7_0          GPMC_REG32(0x078)
+/* DSS */
+#define DSS_CONTROL             DISP_REG32(0x040)
+#define DISPC_CONTROL           DISP_REG32(0x440)
+#define DISPC_SYSSTATUS         DISP_REG32(0x414)
+#define DISPC_IRQSTATUS         DISP_REG32(0x418)
+#define DISPC_IRQENABLE         DISP_REG32(0x41C)
+#define DISPC_CONFIG            DISP_REG32(0x444)
+#define DISPC_DEFAULT_COLOR0    DISP_REG32(0x44C)
+#define DISPC_DEFAULT_COLOR1    DISP_REG32(0x450)
+#define DISPC_TRANS_COLOR0      DISP_REG32(0x454)
+#define DISPC_TRANS_COLOR1      DISP_REG32(0x458)
+#define DISPC_LINE_NUMBER       DISP_REG32(0x460)
+#define DISPC_TIMING_H          DISP_REG32(0x464)
+#define DISPC_TIMING_V          DISP_REG32(0x468)
+#define DISPC_POL_FREQ          DISP_REG32(0x46C)
+#define DISPC_DIVISOR           DISP_REG32(0x470)
+#define DISPC_SIZE_DIG          DISP_REG32(0x478)
+#define DISPC_SIZE_LCD          DISP_REG32(0x47C)
+#define DISPC_GFX_BA0           DISP_REG32(0x480)
+#define DISPC_GFX_BA1           DISP_REG32(0x484)
+#define DISPC_GFX_POSITION      DISP_REG32(0x488)
+#define DISPC_GFX_SIZE          DISP_REG32(0x48C)
+#define DISPC_GFX_ATTRIBUTES    DISP_REG32(0x4A0)
+#define DISPC_GFX_FIFO_THRESHOLD        DISP_REG32(0x4A4)
+#define DISPC_GFX_ROW_INC       DISP_REG32(0x4AC)
+#define DISPC_GFX_PIXEL_INC     DISP_REG32(0x4B0)
+#define DISPC_GFX_WINDOW_SKIP   DISP_REG32(0x4B4)
+#define DISPC_GFX_TABLE_BA      DISP_REG32(0x4B8)
+#define DISPC_DATA_CYCLE1       DISP_REG32(0x5D4)
+#define DISPC_DATA_CYCLE2       DISP_REG32(0x5D8)
+#define DISPC_DATA_CYCLE3       DISP_REG32(0x5DC)
+/* Wake up define for board */
+#define GPIO97                  (1 << 1)
+#define GPIO88                  (1 << 24)
+#endif /* __ASSEMBLER__ */
+#endif
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
new file mode 100644
index 000000000000..f4df04fe1dd8
--- /dev/null
+++ b/arch/arm/mach-omap2/serial.c
@@ -0,0 +1,180 @@
+/*
+ * arch/arm/mach-omap/omap2/serial.c
+ *
+ * OMAP2 serial support.
+ *
+ * Copyright (C) 2005 Nokia Corporation
+ * Author: Paul Mundt <paul.mundt@nokia.com>
+ *
+ * Based off of arch/arm/mach-omap/omap1/serial.c
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/serial_8250.h>
+#include <linux/serial_reg.h>
+#include <asm/io.h>
+#include <asm/hardware/clock.h>
+#include <asm/arch/common.h>
+#include <asm/arch/board.h>
+static struct clk * uart1_ick = NULL;
+static struct clk * uart1_fck = NULL;
+static struct clk * uart2_ick = NULL;
+static struct clk * uart2_fck = NULL;
+static struct clk * uart3_ick = NULL;
+static struct clk * uart3_fck = NULL;
+static struct plat_serial8250_port serial_platform_data[] = {
+        {
+                .membase        = (char *)IO_ADDRESS(OMAP_UART1_BASE),
+                .mapbase        = (unsigned long)OMAP_UART1_BASE,
+                .irq            = 72,
+                .flags          = UPF_BOOT_AUTOCONF,
+                .iotype         = UPIO_MEM,
+                .regshift       = 2,
+                .uartclk        = OMAP16XX_BASE_BAUD * 16,
+        }, {
+                .membase        = (char *)IO_ADDRESS(OMAP_UART2_BASE),
+                .mapbase        = (unsigned long)OMAP_UART2_BASE,
+                .irq            = 73,
+                .flags          = UPF_BOOT_AUTOCONF,
+                .iotype         = UPIO_MEM,
+                .regshift       = 2,
+                .uartclk        = OMAP16XX_BASE_BAUD * 16,
+        }, {
+                .membase        = (char *)IO_ADDRESS(OMAP_UART3_BASE),
+                .mapbase        = (unsigned long)OMAP_UART3_BASE,
+                .irq            = 74,
+                .flags          = UPF_BOOT_AUTOCONF,
+                .iotype         = UPIO_MEM,
+                .regshift       = 2,
+                .uartclk        = OMAP16XX_BASE_BAUD * 16,
+        }, {
+                .flags          = 0
+        }
+};
+static inline unsigned int serial_read_reg(struct plat_serial8250_port *up,
+                                           int offset)
+{
+        offset <<= up->regshift;
+        return (unsigned int)__raw_readb(up->membase + offset);
+}
+static inline void serial_write_reg(struct plat_serial8250_port *p, int offset,
+                                    int value)
+{
+        offset <<= p->regshift;
+        __raw_writeb(value, (unsigned long)(p->membase + offset));
+}
+/*
+ * Internal UARTs need to be initialized for the 8250 autoconfig to work
+ * properly. Note that the TX watermark initialization may not be needed
+ * once the 8250.c watermark handling code is merged.
+ */
+static inline void __init omap_serial_reset(struct plat_serial8250_port *p)
+{
+        serial_write_reg(p, UART_OMAP_MDR1, 0x07);
+        serial_write_reg(p, UART_OMAP_SCR, 0x08);
+        serial_write_reg(p, UART_OMAP_MDR1, 0x00);
+        serial_write_reg(p, UART_OMAP_SYSC, 0x01);
+}
+void __init omap_serial_init()
+{
+        int i;
+        const struct omap_uart_config *info;
+        /*
+         * Make sure the serial ports are muxed on at this point.
+         * You have to mux them off in device drivers later on
+         * if not needed.
+         */
+        info = omap_get_config(OMAP_TAG_UART,
+                               struct omap_uart_config);
+        if (info == NULL)
+                return;
+        for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
+                struct plat_serial8250_port *p = serial_platform_data + i;
+                if (!(info->enabled_uarts & (1 << i))) {
+                        p->membase = 0;
+                        p->mapbase = 0;
+                        continue;
+                }
+                switch (i) {
+                case 0:
+                        uart1_ick = clk_get(NULL, "uart1_ick");
+                        if (IS_ERR(uart1_ick))
+                                printk("Could not get uart1_ick\n");
+                        else {
+                                clk_use(uart1_ick);
+                        }
+                        uart1_fck = clk_get(NULL, "uart1_fck");
+                        if (IS_ERR(uart1_fck))
+                                printk("Could not get uart1_fck\n");
+                        else {
+                                clk_use(uart1_fck);
+                        }
+                        break;
+                case 1:
+                        uart2_ick = clk_get(NULL, "uart2_ick");
+                        if (IS_ERR(uart2_ick))
+                                printk("Could not get uart2_ick\n");
+                        else {
+                                clk_use(uart2_ick);
+                        }
+                        uart2_fck = clk_get(NULL, "uart2_fck");
+                        if (IS_ERR(uart2_fck))
+                                printk("Could not get uart2_fck\n");
+                        else {
+                                clk_use(uart2_fck);
+                        }
+                        break;
+                case 2:
+                        uart3_ick = clk_get(NULL, "uart3_ick");
+                        if (IS_ERR(uart3_ick))
+                                printk("Could not get uart3_ick\n");
+                        else {
+                                clk_use(uart3_ick);
+                        }
+                        uart3_fck = clk_get(NULL, "uart3_fck");
+                        if (IS_ERR(uart3_fck))
+                                printk("Could not get uart3_fck\n");
+                        else {
+                                clk_use(uart3_fck);
+                        }
+                        break;
+                }
+                omap_serial_reset(p);
+        }
+}
+static struct platform_device serial_device = {
+        .name                   = "serial8250",
+        .id                     = 0,
+        .dev                    = {
+                .platform_data  = serial_platform_data,
+        },
+};
+static int __init omap_init(void)
+{
+        return platform_device_register(&serial_device);
+}
+arch_initcall(omap_init);
diff --git a/arch/arm/mach-omap2/sram-fn.S b/arch/arm/mach-omap2/sram-fn.S
new file mode 100644
index 000000000000..2a869e203342
--- /dev/null
+++ b/arch/arm/mach-omap2/sram-fn.S
@@ -0,0 +1,333 @@
+/*
+ * linux/arch/arm/mach-omap1/sram.S
+ *
+ * Omap2 specific functions that need to be run in internal SRAM
+ *
+ * (C) Copyright 2004
+ * Texas Instruments, <www.ti.com>
+ * Richard Woodruff <r-woodruff2@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include <linux/config.h>
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+#include <asm/arch/io.h>
+#include <asm/hardware.h>
+#include <asm/arch/prcm.h>
+#define TIMER_32KSYNCT_CR_V     IO_ADDRESS(OMAP24XX_32KSYNCT_BASE + 0x010)
+#define CM_CLKSEL2_PLL_V        IO_ADDRESS(OMAP24XX_PRCM_BASE + 0x544)
+#define PRCM_VOLTCTRL_V         IO_ADDRESS(OMAP24XX_PRCM_BASE + 0x050)
+#define PRCM_CLKCFG_CTRL_V      IO_ADDRESS(OMAP24XX_PRCM_BASE + 0x080)
+#define CM_CLKEN_PLL_V          IO_ADDRESS(OMAP24XX_PRCM_BASE + 0x500)
+#define CM_IDLEST_CKGEN_V       IO_ADDRESS(OMAP24XX_PRCM_BASE + 0x520)
+#define CM_CLKSEL1_PLL_V        IO_ADDRESS(OMAP24XX_PRCM_BASE + 0x540)
+#define SDRC_DLLA_CTRL_V        IO_ADDRESS(OMAP24XX_SDRC_BASE + 0x060)
+#define SDRC_RFR_CTRL_V         IO_ADDRESS(OMAP24XX_SDRC_BASE + 0x0a4)
+        .text
+ENTRY(sram_ddr_init)
+        stmfd   sp!, {r0 - r12, lr}     @ save registers on stack
+        mov     r12, r2                 @ capture CS1 vs CS0
+        mov     r8, r3                  @ capture force parameter
+        /* frequency shift down */
+        ldr     r2, cm_clksel2_pll      @ get address of dpllout reg
+        mov     r3, #0x1                @ value for 1x operation
+        str     r3, [r2]                @ go to L1-freq operation
+        /* voltage shift down */
+        mov r9, #0x1                    @ set up for L1 voltage call
+        bl voltage_shift                @ go drop voltage
+        /* dll lock mode */
+        ldr     r11, sdrc_dlla_ctrl     @ addr of dlla ctrl
+        ldr     r10, [r11]              @ get current val
+        cmp     r12, #0x1               @ cs1 base (2422 es2.05/1)
+        addeq   r11, r11, #0x8          @ if cs1 base, move to DLLB
+        mvn     r9, #0x4                @ mask to get clear bit2
+        and     r10, r10, r9            @ clear bit2 for lock mode.
+        orr     r10, r10, #0x8          @ make sure DLL on (es2 bit pos)
+        orr     r10, r10, #0x2          @ 90 degree phase for all below 133Mhz
+        str     r10, [r11]              @ commit to DLLA_CTRL
+        bl      i_dll_wait              @ wait for dll to lock
+        /* get dll value */
+        add     r11, r11, #0x4          @ get addr of status reg
+        ldr     r10, [r11]              @ get locked value
+        /* voltage shift up */
+        mov r9, #0x0                    @ shift back to L0-voltage
+        bl voltage_shift                @ go raise voltage
+        /* frequency shift up */
+        mov     r3, #0x2                @ value for 2x operation
+        str     r3, [r2]                @ go to L0-freq operation
+        /* reset entry mode for dllctrl */
+        sub     r11, r11, #0x4          @ move from status to ctrl
+        cmp     r12, #0x1               @ normalize if cs1 based
+        subeq   r11, r11, #0x8          @ possibly back to DLLA
+        cmp     r8, #0x1                @ if forced unlock exit
+        orreq   r1, r1, #0x4            @ make sure exit with unlocked value
+        str     r1, [r11]               @ restore DLLA_CTRL high value
+        add     r11, r11, #0x8          @ move to DLLB_CTRL addr
+        str     r1, [r11]               @ set value DLLB_CTRL
+        bl      i_dll_wait              @ wait for possible lock
+        /* set up for return, DDR should be good */
+        str r10, [r0]                   @ write dll_status and return counter
+        ldmfd   sp!, {r0 - r12, pc}     @ restore regs and return
+        /* ensure the DLL has relocked */
+i_dll_wait:
+        mov     r4, #0x800              @ delay DLL relock, min 0x400 L3 clocks
+i_dll_delay:
+        subs    r4, r4, #0x1
+        bne     i_dll_delay
+        mov     pc, lr
+        /*
+         * shift up or down voltage, use R9 as input to tell level.
+         * wait for it to finish, use 32k sync counter, 1tick=31uS.
+         */
+voltage_shift:
+        ldr     r4, prcm_voltctrl       @ get addr of volt ctrl.
+        ldr     r5, [r4]                @ get value.
+        ldr     r6, prcm_mask_val       @ get value of mask
+        and     r5, r5, r6              @ apply mask to clear bits
+        orr     r5, r5, r9              @ bulld value for L0/L1-volt operation.
+        str     r5, [r4]                @ set up for change.
+        mov     r3, #0x4000             @ get val for force
+        orr     r5, r5, r3              @ build value for force
+        str     r5, [r4]                @ Force transition to L1
+        ldr     r3, timer_32ksynct_cr   @ get addr of counter
+        ldr     r5, [r3]                @ get value
+        add     r5, r5, #0x3            @ give it at most 93uS
+volt_delay:
+        ldr     r7, [r3]                @ get timer value
+        cmp     r5, r7                  @ time up?
+        bhi     volt_delay              @ not yet->branch
+        mov     pc, lr                  @ back to caller.
+/* relative load constants */
+cm_clksel2_pll:
+        .word CM_CLKSEL2_PLL_V
+sdrc_dlla_ctrl:
+        .word SDRC_DLLA_CTRL_V
+prcm_voltctrl:
+        .word PRCM_VOLTCTRL_V
+prcm_mask_val:
+        .word 0xFFFF3FFC
+timer_32ksynct_cr:
+        .word TIMER_32KSYNCT_CR_V
+ENTRY(sram_ddr_init_sz)
+        .word   . - sram_ddr_init
+/*
+ * Reprograms memory timings.
+ * r0 = [PRCM_FULL | PRCM_HALF] r1 = SDRC_DLLA_CTRL value r2 = [DDR | SDR]
+ * PRCM_FULL = 2, PRCM_HALF = 1, DDR = 1, SDR = 0
+ */
+ENTRY(sram_reprogram_sdrc)
+        stmfd   sp!, {r0 - r10, lr}     @ save registers on stack
+        mov     r3, #0x0                @ clear for mrc call
+        mcr     p15, 0, r3, c7, c10, 4  @ memory barrier, finish ARM SDR/DDR
+        nop
+        nop
+        ldr     r6, ddr_sdrc_rfr_ctrl   @ get addr of refresh reg
+        ldr     r5, [r6]                @ get value
+        mov     r5, r5, lsr #8          @ isolate rfr field and drop burst
+        cmp     r0, #0x1                @ going to half speed?
+        movne   r9, #0x0                @ if up set flag up for pre up, hi volt
+        blne    voltage_shift_c         @ adjust voltage
+        cmp     r0, #0x1                @ going to half speed (post branch link)
+        moveq   r5, r5, lsr #1          @ divide by 2 if to half
+        movne   r5, r5, lsl #1          @ mult by 2 if to full
+        mov     r5, r5, lsl #8          @ put rfr field back into place
+        add     r5, r5, #0x1            @ turn on burst of 1
+        ldr     r4, ddr_cm_clksel2_pll  @ get address of out reg
+        ldr     r3, [r4]                @ get curr value
+        orr     r3, r3, #0x3
+        bic     r3, r3, #0x3            @ clear lower bits
+        orr     r3, r3, r0              @ new state value
+        str     r3, [r4]                @ set new state (pll/x, x=1 or 2)
+        nop
+        nop
+        moveq   r9, #0x1                @ if speed down, post down, drop volt
+        bleq    voltage_shift_c
+        mcr     p15, 0, r3, c7, c10, 4  @ memory barrier
+        str     r5, [r6]                @ set new RFR_1 value
+        add     r6, r6, #0x30           @ get RFR_2 addr
+        str     r5, [r6]                @ set RFR_2
+        nop
+        cmp     r2, #0x1                @ (SDR or DDR) do we need to adjust DLL
+        bne     freq_out                @ leave if SDR, no DLL function
+        /* With DDR, we need to take care of the DLL for the frequency change */
+        ldr     r2, ddr_sdrc_dlla_ctrl  @ addr of dlla ctrl
+        str     r1, [r2]                @ write out new SDRC_DLLA_CTRL
+        add     r2, r2, #0x8            @ addr to SDRC_DLLB_CTRL
+        str     r1, [r2]                @ commit to SDRC_DLLB_CTRL
+        mov     r1, #0x2000             @ wait DLL relock, min 0x400 L3 clocks
+dll_wait:
+        subs    r1, r1, #0x1
+        bne     dll_wait
+freq_out:
+        ldmfd   sp!, {r0 - r10, pc}     @ restore regs and return
+    /*
+     * shift up or down voltage, use R9 as input to tell level.
+     *  wait for it to finish, use 32k sync counter, 1tick=31uS.
+     */
+voltage_shift_c:
+        ldr     r10, ddr_prcm_voltctrl  @ get addr of volt ctrl
+        ldr     r8, [r10]               @ get value
+        ldr     r7, ddr_prcm_mask_val   @ get value of mask
+        and     r8, r8, r7              @ apply mask to clear bits
+        orr     r8, r8, r9              @ bulld value for L0/L1-volt operation.
+        str     r8, [r10]               @ set up for change.
+        mov     r7, #0x4000             @ get val for force
+        orr     r8, r8, r7              @ build value for force
+        str     r8, [r10]               @ Force transition to L1
+        ldr     r10, ddr_timer_32ksynct @ get addr of counter
+        ldr     r8, [r10]               @ get value
+        add     r8, r8, #0x2            @ give it at most 62uS (min 31+)
+volt_delay_c:
+        ldr     r7, [r10]               @ get timer value
+        cmp     r8, r7                  @ time up?
+        bhi     volt_delay_c            @ not yet->branch
+        mov     pc, lr                  @ back to caller
+ddr_cm_clksel2_pll:
+        .word CM_CLKSEL2_PLL_V
+ddr_sdrc_dlla_ctrl:
+        .word SDRC_DLLA_CTRL_V
+ddr_sdrc_rfr_ctrl:
+        .word SDRC_RFR_CTRL_V
+ddr_prcm_voltctrl:
+        .word PRCM_VOLTCTRL_V
+ddr_prcm_mask_val:
+        .word 0xFFFF3FFC
+ddr_timer_32ksynct:
+        .word TIMER_32KSYNCT_CR_V
+ENTRY(sram_reprogram_sdrc_sz)
+        .word   . - sram_reprogram_sdrc
+/*
+ * Set dividers and pll. Also recalculate DLL value for DDR and unlock mode.
+ */
+ENTRY(sram_set_prcm)
+        stmfd   sp!, {r0-r12, lr}       @ regs to stack
+        adr     r4, pbegin              @ addr of preload start
+        adr     r8, pend                @ addr of preload end
+        mcrr    p15, 1, r8, r4, c12     @ preload into icache
+pbegin:
+        /* move into fast relock bypass */
+        ldr     r8, pll_ctl             @ get addr
+        ldr     r5, [r8]                @ get val
+        mvn     r6, #0x3                @ clear mask
+        and     r5, r5, r6              @ clear field
+        orr     r7, r5, #0x2            @ fast relock val
+        str     r7, [r8]                @ go to fast relock
+        ldr     r4, pll_stat            @ addr of stat
+block:
+        /* wait for bypass */
+        ldr     r8, [r4]                @ stat value
+        and     r8, r8, #0x3            @ mask for stat
+        cmp     r8, #0x1                @ there yet
+        bne     block                   @ loop if not
+        /* set new dpll dividers _after_ in bypass */
+        ldr     r4, pll_div             @ get addr
+        str     r0, [r4]                @ set dpll ctrl val
+        ldr     r4, set_config          @ get addr
+        mov     r8, #1                  @ valid cfg msk
+        str     r8, [r4]                @ make dividers take
+        mov     r4, #100                @ dead spin a bit
+wait_a_bit:
+        subs    r4, r4, #1              @ dec loop
+        bne     wait_a_bit              @ delay done?
+        /* check if staying in bypass */
+        cmp     r2, #0x1                @ stay in bypass?
+        beq     pend                    @ jump over dpll relock
+        /* relock DPLL with new vals */
+        ldr     r5, pll_stat            @ get addr
+        ldr     r4, pll_ctl             @ get addr
+        orr     r8, r7, #0x3            @ val for lock dpll
+        str     r8, [r4]                @ set val
+        mov     r0, #1000               @ dead spin a bit
+wait_more:
+        subs    r0, r0, #1              @ dec loop
+        bne     wait_more               @ delay done?
+wait_lock:
+        ldr     r8, [r5]                @ get lock val
+        and     r8, r8, #3              @ isolate field
+        cmp     r8, #2                  @ locked?
+        bne     wait_lock               @ wait if not
+pend:
+        /* update memory timings & briefly lock dll */
+        ldr     r4, sdrc_rfr            @ get addr
+        str     r1, [r4]                @ update refresh timing
+        ldr     r11, dlla_ctrl          @ get addr of DLLA ctrl
+        ldr     r10, [r11]              @ get current val
+        mvn     r9, #0x4                @ mask to get clear bit2
+        and     r10, r10, r9            @ clear bit2 for lock mode
+        orr     r10, r10, #0x8          @ make sure DLL on (es2 bit pos)
+        str     r10, [r11]              @ commit to DLLA_CTRL
+        add     r11, r11, #0x8          @ move to dllb
+        str     r10, [r11]              @ hit DLLB also
+        mov     r4, #0x800              @ relock time (min 0x400 L3 clocks)
+wait_dll_lock:
+        subs    r4, r4, #0x1
+        bne     wait_dll_lock
+        nop
+        ldmfd   sp!, {r0-r12, pc}       @ restore regs and return
+set_config:
+        .word PRCM_CLKCFG_CTRL_V
+pll_ctl:
+        .word CM_CLKEN_PLL_V
+pll_stat:
+        .word CM_IDLEST_CKGEN_V
+pll_div:
+        .word CM_CLKSEL1_PLL_V
+sdrc_rfr:
+        .word SDRC_RFR_CTRL_V
+dlla_ctrl:
+        .word SDRC_DLLA_CTRL_V
+ENTRY(sram_set_prcm_sz)
+        .word   . - sram_set_prcm
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
new file mode 100644
index 000000000000..9ec11443200f
--- /dev/null
+++ b/arch/arm/mach-omap2/timer-gp.c
@@ -0,0 +1,126 @@
+/*
+ * linux/arch/arm/mach-omap2/timer-gp.c
+ *
+ * OMAP2 GP timer support.
+ *
+ * Copyright (C) 2005 Nokia Corporation
+ * Author: Paul Mundt <paul.mundt@nokia.com>
+ *         Juha Yrj�l� <juha.yrjola@nokia.com>
+ *
+ * Some parts based off of TI's 24xx code:
+ *
+ *   Copyright (C) 2004 Texas Instruments, Inc.
+ *
+ * Roughly modelled after the OMAP1 MPU timer code.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/time.h>
+#include <linux/interrupt.h>
+#include <linux/err.h>
+#include <asm/mach/time.h>
+#include <asm/delay.h>
+#include <asm/io.h>
+#include <asm/hardware/clock.h>
+#define OMAP2_GP_TIMER1_BASE    0x48028000
+#define OMAP2_GP_TIMER2_BASE    0x4802a000
+#define OMAP2_GP_TIMER3_BASE    0x48078000
+#define OMAP2_GP_TIMER4_BASE    0x4807a000
+#define GP_TIMER_TIDR           0x00
+#define GP_TIMER_TISR           0x18
+#define GP_TIMER_TIER           0x1c
+#define GP_TIMER_TCLR           0x24
+#define GP_TIMER_TCRR           0x28
+#define GP_TIMER_TLDR           0x2c
+#define GP_TIMER_TSICR          0x40
+#define OS_TIMER_NR             1  /* GP timer 2 */
+static unsigned long timer_base[] = {
+        IO_ADDRESS(OMAP2_GP_TIMER1_BASE),
+        IO_ADDRESS(OMAP2_GP_TIMER2_BASE),
+        IO_ADDRESS(OMAP2_GP_TIMER3_BASE),
+        IO_ADDRESS(OMAP2_GP_TIMER4_BASE),
+};
+static inline unsigned int timer_read_reg(int nr, unsigned int reg)
+{
+        return __raw_readl(timer_base[nr] + reg);
+}
+static inline void timer_write_reg(int nr, unsigned int reg, unsigned int val)
+{
+        __raw_writel(val, timer_base[nr] + reg);
+}
+/* Note that we always enable the clock prescale divider bit */
+static inline void omap2_gp_timer_start(int nr, unsigned long load_val)
+{
+        unsigned int tmp;
+        tmp = 0xffffffff - load_val;
+        timer_write_reg(nr, GP_TIMER_TLDR, tmp);
+        timer_write_reg(nr, GP_TIMER_TCRR, tmp);
+        timer_write_reg(nr, GP_TIMER_TIER, 1 << 1);
+        timer_write_reg(nr, GP_TIMER_TCLR, (1 << 5) | (1 << 1) | 1);
+}
+static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id,
+                                            struct pt_regs *regs)
+{
+        write_seqlock(&xtime_lock);
+        timer_write_reg(OS_TIMER_NR, GP_TIMER_TISR, 1 << 1);
+        timer_tick(regs);
+        write_sequnlock(&xtime_lock);
+        return IRQ_HANDLED;
+}
+static struct irqaction omap2_gp_timer_irq = {
+        .name           = "gp timer",
+        .flags          = SA_INTERRUPT,
+        .handler        = omap2_gp_timer_interrupt,
+};
+static void __init omap2_gp_timer_init(void)
+{
+        struct clk * sys_ck;
+        u32 tick_period = 120000;
+        u32 l;
+        /* Reset clock and prescale value */
+        timer_write_reg(OS_TIMER_NR, GP_TIMER_TCLR, 0);
+        sys_ck = clk_get(NULL, "sys_ck");
+        if (IS_ERR(sys_ck))
+                printk(KERN_ERR "Could not get sys_ck\n");
+        else {
+                clk_use(sys_ck);
+                tick_period = clk_get_rate(sys_ck) / 100;
+                clk_put(sys_ck);
+        }
+        tick_period /= 2;       /* Minimum prescale divider is 2 */
+        tick_period -= 1;
+        l = timer_read_reg(OS_TIMER_NR, GP_TIMER_TIDR);
+        printk(KERN_INFO "OMAP2 GP timer (HW version %d.%d)\n",
+               (l >> 4) & 0x0f, l & 0x0f);
+        setup_irq(38, &omap2_gp_timer_irq);
+        omap2_gp_timer_start(OS_TIMER_NR, tick_period);
+}
+struct sys_timer omap_timer = {
+        .init   = omap2_gp_timer_init,
+};
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index b380a438e68f..e201aa9765b9 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -60,6 +60,7 @@ config MACH_CORGI
        bool "Enable Sharp SL-C700 (Corgi) Support"
        depends PXA_SHARPSL_25x
        select PXA_SHARP_C7xx
+        select PXA_SSP
 config MACH_SHEPHERD
        bool "Enable Sharp SL-C750 (Shepherd) Support"
@@ -102,12 +103,18 @@ config IWMMXT
 config PXA_SHARP_C7xx
        bool
+        select PXA_SSP
        help
          Enable support for all Sharp C7xx models
 config PXA_SHARP_Cxx00
        bool
+        select PXA_SSP
        help
          Enable common support for Sharp Cxx00 models
+config PXA_SSP
+        tristate
+        help
+          Enable support for PXA2xx SSP ports
 endif
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index 8bc72d07cea8..d210bd5032ce 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -11,8 +11,8 @@ obj-$(CONFIG_PXA27x) += pxa27x.o
 obj-$(CONFIG_ARCH_LUBBOCK) += lubbock.o
 obj-$(CONFIG_MACH_MAINSTONE) += mainstone.o
 obj-$(CONFIG_ARCH_PXA_IDP) += idp.o
-obj-$(CONFIG_PXA_SHARP_C7xx)    += corgi.o corgi_ssp.o corgi_lcd.o ssp.o
+obj-$(CONFIG_PXA_SHARP_C7xx)    += corgi.o corgi_ssp.o corgi_lcd.o
-obj-$(CONFIG_PXA_SHARP_Cxx00)   += spitz.o corgi_ssp.o corgi_lcd.o ssp.o
+obj-$(CONFIG_PXA_SHARP_Cxx00)   += spitz.o corgi_ssp.o corgi_lcd.o
 obj-$(CONFIG_MACH_POODLE)       += poodle.o
 obj-$(CONFIG_MACH_TOSA)         += tosa.o
@@ -26,6 +26,7 @@ obj-$(CONFIG_LEDS) += $(led-y)
 # Misc features
 obj-$(CONFIG_PM) += pm.o sleep.o
+obj-$(CONFIG_PXA_SSP) += ssp.o
 ifeq ($(CONFIG_PXA27x),y)
 obj-$(CONFIG_PM) += standby.o
diff --git a/arch/arm/mach-pxa/corgi_ssp.c b/arch/arm/mach-pxa/corgi_ssp.c
index 591e5f32dbec..b371d723635f 100644
--- a/arch/arm/mach-pxa/corgi_ssp.c
+++ b/arch/arm/mach-pxa/corgi_ssp.c
@@ -191,7 +191,7 @@ void __init corgi_ssp_set_machinfo(struct corgissp_machinfo *machinfo)
        ssp_machinfo = machinfo;
 }
-static int __init corgi_ssp_probe(struct device *dev)
+static int __init corgi_ssp_probe(struct platform_device *dev)
 {
        int ret;
@@ -203,7 +203,7 @@ static int __init corgi_ssp_probe(struct device *dev)
        GPDR(ssp_machinfo->cs_ads7846) |= GPIO_bit(ssp_machinfo->cs_ads7846);  /* output */
        GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);   /* High - Disable ADS7846*/
-        ret = ssp_init(&corgi_ssp_dev,ssp_machinfo->port);
+        ret = ssp_init(&corgi_ssp_dev, ssp_machinfo->port, 0);
        if (ret)
                printk(KERN_ERR "Unable to register SSP handler!\n");
@@ -216,13 +216,13 @@ static int __init corgi_ssp_probe(struct device *dev)
        return ret;
 }
-static int corgi_ssp_remove(struct device *dev)
+static int corgi_ssp_remove(struct platform_device *dev)
 {
        ssp_exit(&corgi_ssp_dev);
        return 0;
 }
-static int corgi_ssp_suspend(struct device *dev, pm_message_t state)
+static int corgi_ssp_suspend(struct platform_device *dev, pm_message_t state)
 {
        ssp_flush(&corgi_ssp_dev);
        ssp_save_state(&corgi_ssp_dev,&corgi_ssp_state);
@@ -230,7 +230,7 @@ static int corgi_ssp_suspend(struct device *dev, pm_message_t state)
        return 0;
 }
-static int corgi_ssp_resume(struct device *dev)
+static int corgi_ssp_resume(struct platform_device *dev)
 {
        GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon);  /* High - Disable LCD Control/Timing Gen */
        GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111); /* High - Disable MAX1111*/
@@ -241,18 +241,19 @@ static int corgi_ssp_resume(struct device *dev)
        return 0;
 }
-static struct device_driver corgissp_driver = {
+static struct platform_driver corgissp_driver = {
-        .name           = "corgi-ssp",
-        .bus            = &platform_bus_type,
        .probe          = corgi_ssp_probe,
        .remove         = corgi_ssp_remove,
        .suspend        = corgi_ssp_suspend,
        .resume         = corgi_ssp_resume,
+        .driver         = {
+                .name   = "corgi-ssp",
+        },
 };
 int __init corgi_ssp_init(void)
 {
-        return driver_register(&corgissp_driver);
+        return platform_driver_register(&corgissp_driver);
 }
 arch_initcall(corgi_ssp_init);
diff --git a/arch/arm/mach-pxa/sharpsl.h b/arch/arm/mach-pxa/sharpsl.h
index 3977a77aacdd..4879c0f7da72 100644
--- a/arch/arm/mach-pxa/sharpsl.h
+++ b/arch/arm/mach-pxa/sharpsl.h
@@ -32,3 +32,90 @@ void corgi_put_hsync(void);
 void spitz_put_hsync(void);
 void corgi_wait_hsync(void);
 void spitz_wait_hsync(void);
+/*
+ * SharpSL Battery/PM Driver
+ */
+struct sharpsl_charger_machinfo {
+        void (*init)(void);
+        int gpio_acin;
+        int gpio_batfull;
+        int gpio_batlock;
+        int gpio_fatal;
+        int (*status_acin)(void);
+        void (*discharge)(int);
+        void (*discharge1)(int);
+        void (*charge)(int);
+        void (*chargeled)(int);
+        void (*measure_temp)(int);
+        void (*presuspend)(void);
+        void (*postsuspend)(void);
+        unsigned long (*charger_wakeup)(void);
+        int (*should_wakeup)(unsigned int resume_on_alarm);
+        int bat_levels;
+        struct battery_thresh *bat_levels_noac;
+        struct battery_thresh *bat_levels_acin;
+        int status_high_acin;
+        int status_low_acin;
+        int status_high_noac;
+        int status_low_noac;
+};
+struct battery_thresh {
+        int voltage;
+        int percentage;
+};
+struct battery_stat {
+        int ac_status;         /* APM AC Present/Not Present */
+        int mainbat_status;    /* APM Main Battery Status */
+        int mainbat_percent;   /* Main Battery Percentage Charge */
+        int mainbat_voltage;   /* Main Battery Voltage */
+};
+struct sharpsl_pm_status {
+        struct device *dev;
+        struct timer_list ac_timer;
+        struct timer_list chrg_full_timer;
+        int charge_mode;
+#define CHRG_ERROR    (-1)
+#define CHRG_OFF      (0)
+#define CHRG_ON       (1)
+#define CHRG_DONE     (2)
+        unsigned int flags;
+#define SHARPSL_SUSPENDED       (1 << 0)  /* Device is Suspended */
+#define SHARPSL_ALARM_ACTIVE    (1 << 1)  /* Alarm is for charging event (not user) */
+#define SHARPSL_BL_LIMIT        (1 << 2)  /* Backlight Intensity Limited */
+#define SHARPSL_APM_QUEUED      (1 << 3)  /* APM Event Queued */
+#define SHARPSL_DO_OFFLINE_CHRG (1 << 4)  /* Trigger the offline charger */
+        int full_count;
+        unsigned long charge_start_time;
+        struct sharpsl_charger_machinfo *machinfo;
+        struct battery_stat battstat;
+};
+extern struct sharpsl_pm_status sharpsl_pm;
+extern struct battery_thresh spitz_battery_levels_acin[];
+extern struct battery_thresh spitz_battery_levels_noac[];
+#define READ_GPIO_BIT(x)    (GPLR(x) & GPIO_bit(x))
+#define SHARPSL_LED_ERROR  2
+#define SHARPSL_LED_ON     1
+#define SHARPSL_LED_OFF    0
+#define CHARGE_ON()         sharpsl_pm.machinfo->charge(1)
+#define CHARGE_OFF()        sharpsl_pm.machinfo->charge(0)
+#define CHARGE_LED_ON()     sharpsl_pm.machinfo->chargeled(SHARPSL_LED_ON)
+#define CHARGE_LED_OFF()    sharpsl_pm.machinfo->chargeled(SHARPSL_LED_OFF)
+#define CHARGE_LED_ERR()    sharpsl_pm.machinfo->chargeled(SHARPSL_LED_ERROR)
+#define DISCHARGE_ON()      sharpsl_pm.machinfo->discharge(1)
+#define DISCHARGE_OFF()     sharpsl_pm.machinfo->discharge(0)
+#define STATUS_AC_IN        sharpsl_pm.machinfo->status_acin()
+#define STATUS_BATT_LOCKED  READ_GPIO_BIT(sharpsl_pm.machinfo->gpio_batlock)
+#define STATUS_CHRG_FULL    READ_GPIO_BIT(sharpsl_pm.machinfo->gpio_batfull)
+#define STATUS_FATAL        READ_GPIO_BIT(sharpsl_pm.machinfo->gpio_fatal)
diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c
new file mode 100644
index 000000000000..6c9e871c53d8
--- /dev/null
+++ b/arch/arm/mach-pxa/sharpsl_pm.c
@@ -0,0 +1,992 @@
+/*
+ * Battery and Power Management code for the Sharp SL-C7xx and SL-Cxx00
+ * series of PDAs
+ *
+ * Copyright (c) 2004-2005 Richard Purdie
+ *
+ * Based on code written by Sharp for 2.4 kernels
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#undef DEBUG
+#include <linux/module.h>
+#include <linux/timer.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/apm_bios.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/device.h>
+#include <asm/hardware.h>
+#include <asm/hardware/scoop.h>
+#include <asm/mach-types.h>
+#include <asm/irq.h>
+#include <asm/apm.h>
+#include <asm/arch/pm.h>
+#include <asm/arch/pxa-regs.h>
+#include <asm/arch/sharpsl.h>
+#include "sharpsl.h"
+/*
+ * Constants
+ */
+#define SHARPSL_CHARGE_ON_TIME_INTERVAL        (msecs_to_jiffies(1*60*1000))  /* 1 min */
+#define SHARPSL_CHARGE_FINISH_TIME             (msecs_to_jiffies(10*60*1000)) /* 10 min */
+#define SHARPSL_BATCHK_TIME                    (msecs_to_jiffies(15*1000))    /* 15 sec */
+#define SHARPSL_BATCHK_TIME_SUSPEND            (60*10)                        /* 10 min */
+#define SHARPSL_WAIT_CO_TIME                   15  /* 15 sec */
+#define SHARPSL_WAIT_DISCHARGE_ON              100 /* 100 msec */
+#define SHARPSL_CHECK_BATTERY_WAIT_TIME_TEMP   10  /* 10 msec */
+#define SHARPSL_CHECK_BATTERY_WAIT_TIME_VOLT   10  /* 10 msec */
+#define SHARPSL_CHECK_BATTERY_WAIT_TIME_JKVAD  10  /* 10 msec */
+#define SHARPSL_CHARGE_WAIT_TIME               15  /* 15 msec */
+#define SHARPSL_CHARGE_CO_CHECK_TIME           5   /* 5 msec */
+#define SHARPSL_CHARGE_RETRY_CNT               1   /* eqv. 10 min */
+#define SHARPSL_CHARGE_ON_VOLT         0x99  /* 2.9V */
+#define SHARPSL_CHARGE_ON_TEMP         0xe0  /* 2.9V */
+#define SHARPSL_CHARGE_ON_JKVAD_HIGH   0x9b  /* 6V */
+#define SHARPSL_CHARGE_ON_JKVAD_LOW    0x34  /* 2V */
+#define SHARPSL_FATAL_ACIN_VOLT        182   /* 3.45V */
+#define SHARPSL_FATAL_NOACIN_VOLT      170   /* 3.40V */
+struct battery_thresh spitz_battery_levels_acin[] = {
+        { 213, 100},
+        { 212,  98},
+        { 211,  95},
+        { 210,  93},
+        { 209,  90},
+        { 208,  88},
+        { 207,  85},
+        { 206,  83},
+        { 205,  80},
+        { 204,  78},
+        { 203,  75},
+        { 202,  73},
+        { 201,  70},
+        { 200,  68},
+        { 199,  65},
+        { 198,  63},
+        { 197,  60},
+        { 196,  58},
+        { 195,  55},
+        { 194,  53},
+        { 193,  50},
+        { 192,  48},
+        { 192,  45},
+        { 191,  43},
+        { 191,  40},
+        { 190,  38},
+        { 190,  35},
+        { 189,  33},
+        { 188,  30},
+        { 187,  28},
+        { 186,  25},
+        { 185,  23},
+        { 184,  20},
+        { 183,  18},
+        { 182,  15},
+        { 181,  13},
+        { 180,  10},
+        { 179,   8},
+        { 178,   5},
+        {   0,   0},
+};
+struct battery_thresh  spitz_battery_levels_noac[] = {
+        { 213, 100},
+        { 212,  98},
+        { 211,  95},
+        { 210,  93},
+        { 209,  90},
+        { 208,  88},
+        { 207,  85},
+        { 206,  83},
+        { 205,  80},
+        { 204,  78},
+        { 203,  75},
+        { 202,  73},
+        { 201,  70},
+        { 200,  68},
+        { 199,  65},
+        { 198,  63},
+        { 197,  60},
+        { 196,  58},
+        { 195,  55},
+        { 194,  53},
+        { 193,  50},
+        { 192,  48},
+        { 191,  45},
+        { 190,  43},
+        { 189,  40},
+        { 188,  38},
+        { 187,  35},
+        { 186,  33},
+        { 185,  30},
+        { 184,  28},
+        { 183,  25},
+        { 182,  23},
+        { 181,  20},
+        { 180,  18},
+        { 179,  15},
+        { 178,  13},
+        { 177,  10},
+        { 176,   8},
+        { 175,   5},
+        {   0,   0},
+};
+/* MAX1111 Commands */
+#define MAXCTRL_PD0      1u << 0
+#define MAXCTRL_PD1      1u << 1
+#define MAXCTRL_SGL      1u << 2
+#define MAXCTRL_UNI      1u << 3
+#define MAXCTRL_SEL_SH   4
+#define MAXCTRL_STR      1u << 7
+/* MAX1111 Channel Definitions */
+#define BATT_AD    4u
+#define BATT_THM   2u
+#define JK_VAD     6u
+/*
+ * Prototypes
+ */
+static int sharpsl_read_MainBattery(void);
+static int sharpsl_off_charge_battery(void);
+static int sharpsl_check_battery(int mode);
+static int sharpsl_ac_check(void);
+static int sharpsl_fatal_check(void);
+static int sharpsl_average_value(int ad);
+static void sharpsl_average_clear(void);
+static void sharpsl_charge_toggle(void *private_);
+static void sharpsl_battery_thread(void *private_);
+/*
+ * Variables
+ */
+struct sharpsl_pm_status sharpsl_pm;
+DECLARE_WORK(toggle_charger, sharpsl_charge_toggle, NULL);
+DECLARE_WORK(sharpsl_bat, sharpsl_battery_thread, NULL);
+static int get_percentage(int voltage)
+{
+        int i = sharpsl_pm.machinfo->bat_levels - 1;
+        struct battery_thresh *thresh;
+        if (sharpsl_pm.charge_mode == CHRG_ON)
+                thresh=sharpsl_pm.machinfo->bat_levels_acin;
+        else
+                thresh=sharpsl_pm.machinfo->bat_levels_noac;
+        while (i > 0 && (voltage > thresh[i].voltage))
+                i--;
+        return thresh[i].percentage;
+}
+static int get_apm_status(int voltage)
+{
+        int low_thresh, high_thresh;
+        if (sharpsl_pm.charge_mode == CHRG_ON) {
+                high_thresh = sharpsl_pm.machinfo->status_high_acin;
+                low_thresh = sharpsl_pm.machinfo->status_low_acin;
+        } else {
+                high_thresh = sharpsl_pm.machinfo->status_high_noac;
+                low_thresh = sharpsl_pm.machinfo->status_low_noac;
+        }
+        if (voltage >= high_thresh)
+                return APM_BATTERY_STATUS_HIGH;
+        if (voltage >= low_thresh)
+                return APM_BATTERY_STATUS_LOW;
+        return APM_BATTERY_STATUS_CRITICAL;
+}
+void sharpsl_battery_kick(void)
+{
+        schedule_delayed_work(&sharpsl_bat, msecs_to_jiffies(125));
+}
+EXPORT_SYMBOL(sharpsl_battery_kick);
+static void sharpsl_battery_thread(void *private_)
+{
+        int voltage, percent, apm_status, i = 0;
+        if (!sharpsl_pm.machinfo)
+                return;
+        sharpsl_pm.battstat.ac_status = (!(STATUS_AC_IN) ? APM_AC_OFFLINE : APM_AC_ONLINE);
+        /* Corgi cannot confirm when battery fully charged so periodically kick! */
+        if (machine_is_corgi() && (sharpsl_pm.charge_mode == CHRG_ON)
+                        && time_after(jiffies, sharpsl_pm.charge_start_time +  SHARPSL_CHARGE_ON_TIME_INTERVAL))
+                schedule_work(&toggle_charger);
+        while(1) {
+                voltage = sharpsl_read_MainBattery();
+                if (voltage > 0) break;
+                if (i++ > 5) {
+                        voltage = sharpsl_pm.machinfo->bat_levels_noac[0].voltage;
+                        dev_warn(sharpsl_pm.dev, "Warning: Cannot read main battery!\n");
+                        break;
+                }
+        }
+        voltage = sharpsl_average_value(voltage);
+        apm_status = get_apm_status(voltage);
+        percent = get_percentage(voltage);
+        /* At low battery voltages, the voltage has a tendency to start
+           creeping back up so we try to avoid this here */
+        if ((sharpsl_pm.battstat.ac_status == APM_AC_ONLINE) || (apm_status == APM_BATTERY_STATUS_HIGH) ||  percent <= sharpsl_pm.battstat.mainbat_percent) {
+                sharpsl_pm.battstat.mainbat_voltage = voltage;
+                sharpsl_pm.battstat.mainbat_status = apm_status;
+                sharpsl_pm.battstat.mainbat_percent = percent;
+        }
+        dev_dbg(sharpsl_pm.dev, "Battery: voltage: %d, status: %d, percentage: %d, time: %d\n", voltage,
+                        sharpsl_pm.battstat.mainbat_status, sharpsl_pm.battstat.mainbat_percent, jiffies);
+        /* If battery is low. limit backlight intensity to save power. */
+        if ((sharpsl_pm.battstat.ac_status != APM_AC_ONLINE)
+                        && ((sharpsl_pm.battstat.mainbat_status == APM_BATTERY_STATUS_LOW) ||
+                        (sharpsl_pm.battstat.mainbat_status == APM_BATTERY_STATUS_CRITICAL))) {
+                if (!(sharpsl_pm.flags & SHARPSL_BL_LIMIT)) {
+                        corgibl_limit_intensity(1);
+                        sharpsl_pm.flags |= SHARPSL_BL_LIMIT;
+                }
+        } else if (sharpsl_pm.flags & SHARPSL_BL_LIMIT) {
+                corgibl_limit_intensity(0);
+                sharpsl_pm.flags &= ~SHARPSL_BL_LIMIT;
+        }
+        /* Suspend if critical battery level */
+        if ((sharpsl_pm.battstat.ac_status != APM_AC_ONLINE)
+                        && (sharpsl_pm.battstat.mainbat_status == APM_BATTERY_STATUS_CRITICAL)
+                        && !(sharpsl_pm.flags & SHARPSL_APM_QUEUED)) {
+                sharpsl_pm.flags |= SHARPSL_APM_QUEUED;
+                dev_err(sharpsl_pm.dev, "Fatal Off\n");
+                apm_queue_event(APM_CRITICAL_SUSPEND);
+        }
+        schedule_delayed_work(&sharpsl_bat, SHARPSL_BATCHK_TIME);
+}
+static void sharpsl_charge_on(void)
+{
+        dev_dbg(sharpsl_pm.dev, "Turning Charger On\n");
+        sharpsl_pm.full_count = 0;
+        sharpsl_pm.charge_mode = CHRG_ON;
+        schedule_delayed_work(&toggle_charger, msecs_to_jiffies(250));
+        schedule_delayed_work(&sharpsl_bat, msecs_to_jiffies(500));
+}
+static void sharpsl_charge_off(void)
+{
+        dev_dbg(sharpsl_pm.dev, "Turning Charger Off\n");
+        CHARGE_OFF();
+        CHARGE_LED_OFF();
+        sharpsl_pm.charge_mode = CHRG_OFF;
+        schedule_work(&sharpsl_bat);
+}
+static void sharpsl_charge_error(void)
+{
+        CHARGE_LED_ERR();
+        CHARGE_OFF();
+        sharpsl_pm.charge_mode = CHRG_ERROR;
+}
+static void sharpsl_charge_toggle(void *private_)
+{
+        dev_dbg(sharpsl_pm.dev, "Toogling Charger at time: %lx\n", jiffies);
+        if (STATUS_AC_IN == 0) {
+                sharpsl_charge_off();
+                return;
+        } else if ((sharpsl_check_battery(1) < 0) || (sharpsl_ac_check() < 0)) {
+                sharpsl_charge_error();
+                return;
+        }
+        CHARGE_LED_ON();
+        CHARGE_OFF();
+        mdelay(SHARPSL_CHARGE_WAIT_TIME);
+        CHARGE_ON();
+        sharpsl_pm.charge_start_time = jiffies;
+}
+static void sharpsl_ac_timer(unsigned long data)
+{
+        int acin = STATUS_AC_IN;
+        dev_dbg(sharpsl_pm.dev, "AC Status: %d\n",acin);
+        sharpsl_average_clear();
+        if (acin && (sharpsl_pm.charge_mode != CHRG_ON))
+                sharpsl_charge_on();
+        else if (sharpsl_pm.charge_mode == CHRG_ON)
+                sharpsl_charge_off();
+        schedule_work(&sharpsl_bat);
+}
+static irqreturn_t sharpsl_ac_isr(int irq, void *dev_id, struct pt_regs *fp)
+{
+        /* Delay the event slightly to debounce */
+        /* Must be a smaller delay than the chrg_full_isr below */
+        mod_timer(&sharpsl_pm.ac_timer, jiffies + msecs_to_jiffies(250));
+        return IRQ_HANDLED;
+}
+static void sharpsl_chrg_full_timer(unsigned long data)
+{
+        dev_dbg(sharpsl_pm.dev, "Charge Full at time: %lx\n", jiffies);
+        sharpsl_pm.full_count++;
+        if (STATUS_AC_IN == 0) {
+                dev_dbg(sharpsl_pm.dev, "Charge Full: AC removed - stop charging!\n");
+                if (sharpsl_pm.charge_mode == CHRG_ON)
+                        sharpsl_charge_off();
+        } else if (sharpsl_pm.full_count < 2) {
+                dev_dbg(sharpsl_pm.dev, "Charge Full: Count too low\n");
+                schedule_work(&toggle_charger);
+        } else if (time_after(jiffies, sharpsl_pm.charge_start_time + SHARPSL_CHARGE_FINISH_TIME)) {
+                dev_dbg(sharpsl_pm.dev, "Charge Full: Interrupt generated too slowly - retry.\n");
+                schedule_work(&toggle_charger);
+        } else {
+                sharpsl_charge_off();
+                sharpsl_pm.charge_mode = CHRG_DONE;
+                dev_dbg(sharpsl_pm.dev, "Charge Full: Charging Finished\n");
+        }
+}
+/* Charging Finished Interrupt (Not present on Corgi) */
+/* Can trigger at the same time as an AC staus change so
+   delay until after that has been processed */
+static irqreturn_t sharpsl_chrg_full_isr(int irq, void *dev_id, struct pt_regs *fp)
+{
+        if (sharpsl_pm.flags & SHARPSL_SUSPENDED)
+                return IRQ_HANDLED;
+        /* delay until after any ac interrupt */
+        mod_timer(&sharpsl_pm.chrg_full_timer, jiffies + msecs_to_jiffies(500));
+        return IRQ_HANDLED;
+}
+static irqreturn_t sharpsl_fatal_isr(int irq, void *dev_id, struct pt_regs *fp)
+{
+        int is_fatal = 0;
+        if (STATUS_BATT_LOCKED == 0) {
+                dev_err(sharpsl_pm.dev, "Battery now Unlocked! Suspending.\n");
+                is_fatal = 1;
+        }
+        if (sharpsl_pm.machinfo->gpio_fatal && (STATUS_FATAL == 0)) {
+                dev_err(sharpsl_pm.dev, "Fatal Batt Error! Suspending.\n");
+                is_fatal = 1;
+        }
+        if (!(sharpsl_pm.flags & SHARPSL_APM_QUEUED) && is_fatal) {
+                sharpsl_pm.flags |= SHARPSL_APM_QUEUED;
+                apm_queue_event(APM_CRITICAL_SUSPEND);
+        }
+        return IRQ_HANDLED;
+}
+/*
+ * Maintain an average of the last 10 readings
+ */
+#define SHARPSL_CNV_VALUE_NUM    10
+static int sharpsl_ad_index;
+static void sharpsl_average_clear(void)
+{
+        sharpsl_ad_index = 0;
+}
+static int sharpsl_average_value(int ad)
+{
+        int i, ad_val = 0;
+        static int sharpsl_ad[SHARPSL_CNV_VALUE_NUM+1];
+        if (sharpsl_pm.battstat.mainbat_status != APM_BATTERY_STATUS_HIGH) {
+                sharpsl_ad_index = 0;
+                return ad;
+        }
+        sharpsl_ad[sharpsl_ad_index] = ad;
+        sharpsl_ad_index++;
+        if (sharpsl_ad_index >= SHARPSL_CNV_VALUE_NUM) {
+                for (i=0; i < (SHARPSL_CNV_VALUE_NUM-1); i++)
+                        sharpsl_ad[i] = sharpsl_ad[i+1];
+                sharpsl_ad_index = SHARPSL_CNV_VALUE_NUM - 1;
+        }
+        for (i=0; i < sharpsl_ad_index; i++)
+                ad_val += sharpsl_ad[i];
+        return (ad_val / sharpsl_ad_index);
+}
+/*
+ * Read MAX1111 ADC
+ */
+static int read_max1111(int channel)
+{
+        return corgi_ssp_max1111_get((channel << MAXCTRL_SEL_SH) | MAXCTRL_PD0 | MAXCTRL_PD1
+                        | MAXCTRL_SGL | MAXCTRL_UNI | MAXCTRL_STR);
+}
+static int sharpsl_read_MainBattery(void)
+{
+        return read_max1111(BATT_AD);
+}
+static int sharpsl_read_Temp(void)
+{
+        int temp;
+        sharpsl_pm.machinfo->measure_temp(1);
+        mdelay(SHARPSL_CHECK_BATTERY_WAIT_TIME_TEMP);
+        temp = read_max1111(BATT_THM);
+        sharpsl_pm.machinfo->measure_temp(0);
+        return temp;
+}
+static int sharpsl_read_jkvad(void)
+{
+        return read_max1111(JK_VAD);
+}
+/*
+ * Take an array of 5 integers, remove the maximum and minimum values
+ * and return the average.
+ */
+static int get_select_val(int *val)
+{
+        int i, j, k, temp, sum = 0;
+        /* Find MAX val */
+        temp = val[0];
+        j=0;
+        for (i=1; i<5; i++) {
+                if (temp < val[i]) {
+                        temp = val[i];
+                        j = i;
+                }
+        }
+        /* Find MIN val */
+        temp = val[4];
+        k=4;
+        for (i=3; i>=0; i--) {
+                if (temp > val[i]) {
+                        temp = val[i];
+                        k = i;
+                }
+        }
+        for (i=0; i<5; i++)
+                if (i != j && i != k )
+                        sum += val[i];
+        dev_dbg(sharpsl_pm.dev, "Average: %d from values: %d, %d, %d, %d, %d\n", sum/3, val[0], val[1], val[2], val[3], val[4]);
+        return (sum/3);
+}
+/*  mode 0 - Check temperature and voltage
+ *       1 - Check temperature only */
+static int sharpsl_check_battery(int mode)
+{
+        int val, i, buff[5];
+        /* Check battery temperature */
+        for (i=0; i<5; i++) {
+                mdelay(SHARPSL_CHECK_BATTERY_WAIT_TIME_TEMP);
+                buff[i] = sharpsl_read_Temp();
+        }
+        val = get_select_val(buff);
+        dev_dbg(sharpsl_pm.dev, "Temperature: %d\n", val);
+        if (val > SHARPSL_CHARGE_ON_TEMP)
+                return -1;
+        if (mode == 1)
+                return 0;
+        /* disable charge, enable discharge */
+        CHARGE_OFF();
+        DISCHARGE_ON();
+        mdelay(SHARPSL_WAIT_DISCHARGE_ON);
+        if (sharpsl_pm.machinfo->discharge1)
+                sharpsl_pm.machinfo->discharge1(1);
+        /* Check battery voltage */
+        for (i=0; i<5; i++) {
+                buff[i] = sharpsl_read_MainBattery();
+                mdelay(SHARPSL_CHECK_BATTERY_WAIT_TIME_VOLT);
+        }
+        if (sharpsl_pm.machinfo->discharge1)
+                sharpsl_pm.machinfo->discharge1(0);
+        DISCHARGE_OFF();
+        val = get_select_val(buff);
+        dev_dbg(sharpsl_pm.dev, "Battery Voltage: %d\n", val);
+        if (val < SHARPSL_CHARGE_ON_VOLT)
+                return -1;
+        return 0;
+}
+static int sharpsl_ac_check(void)
+{
+        int temp, i, buff[5];
+        for (i=0; i<5; i++) {
+                buff[i] = sharpsl_read_jkvad();
+                mdelay(SHARPSL_CHECK_BATTERY_WAIT_TIME_JKVAD);
+        }
+        temp = get_select_val(buff);
+        dev_dbg(sharpsl_pm.dev, "AC Voltage: %d\n",temp);
+        if ((temp > SHARPSL_CHARGE_ON_JKVAD_HIGH) || (temp < SHARPSL_CHARGE_ON_JKVAD_LOW)) {
+                dev_err(sharpsl_pm.dev, "Error: AC check failed.\n");
+                return -1;
+        }
+        return 0;
+}
+#ifdef CONFIG_PM
+static int sharpsl_pm_suspend(struct device *dev, pm_message_t state)
+{
+        sharpsl_pm.flags |= SHARPSL_SUSPENDED;
+        flush_scheduled_work();
+        if (sharpsl_pm.charge_mode == CHRG_ON)
+                sharpsl_pm.flags |= SHARPSL_DO_OFFLINE_CHRG;
+        else
+                sharpsl_pm.flags &= ~SHARPSL_DO_OFFLINE_CHRG;
+        return 0;
+}
+static int sharpsl_pm_resume(struct device *dev)
+{
+        /* Clear the reset source indicators as they break the bootloader upon reboot */
+        RCSR = 0x0f;
+        sharpsl_average_clear();
+        sharpsl_pm.flags &= ~SHARPSL_APM_QUEUED;
+        sharpsl_pm.flags &= ~SHARPSL_SUSPENDED;
+        return 0;
+}
+static void corgi_goto_sleep(unsigned long alarm_time, unsigned int alarm_enable, suspend_state_t state)
+{
+        dev_dbg(sharpsl_pm.dev, "Time is: %08x\n",RCNR);
+        dev_dbg(sharpsl_pm.dev, "Offline Charge Activate = %d\n",sharpsl_pm.flags & SHARPSL_DO_OFFLINE_CHRG);
+        /* not charging and AC-IN! */
+        if ((sharpsl_pm.flags & SHARPSL_DO_OFFLINE_CHRG) && (STATUS_AC_IN != 0)) {
+                dev_dbg(sharpsl_pm.dev, "Activating Offline Charger...\n");
+                sharpsl_pm.charge_mode = CHRG_OFF;
+                sharpsl_pm.flags &= ~SHARPSL_DO_OFFLINE_CHRG;
+                sharpsl_off_charge_battery();
+        }
+        sharpsl_pm.machinfo->presuspend();
+        PEDR = 0xffffffff; /* clear it */
+        sharpsl_pm.flags &= ~SHARPSL_ALARM_ACTIVE;
+        if ((sharpsl_pm.charge_mode == CHRG_ON) && ((alarm_enable && ((alarm_time - RCNR) > (SHARPSL_BATCHK_TIME_SUSPEND + 30))) || !alarm_enable)) {
+                RTSR &= RTSR_ALE;
+                RTAR = RCNR + SHARPSL_BATCHK_TIME_SUSPEND;
+                dev_dbg(sharpsl_pm.dev, "Charging alarm at: %08x\n",RTAR);
+                sharpsl_pm.flags |= SHARPSL_ALARM_ACTIVE;
+        } else if (alarm_enable) {
+                RTSR &= RTSR_ALE;
+                RTAR = alarm_time;
+                dev_dbg(sharpsl_pm.dev, "User alarm at: %08x\n",RTAR);
+        } else {
+                dev_dbg(sharpsl_pm.dev, "No alarms set.\n");
+        }
+        pxa_pm_enter(state);
+        sharpsl_pm.machinfo->postsuspend();
+        dev_dbg(sharpsl_pm.dev, "Corgi woken up from suspend: %08x\n",PEDR);
+}
+static int corgi_enter_suspend(unsigned long alarm_time, unsigned int alarm_enable, suspend_state_t state)
+{
+        if (!sharpsl_pm.machinfo->should_wakeup(!(sharpsl_pm.flags & SHARPSL_ALARM_ACTIVE) && alarm_enable) )
+        {
+                if (!(sharpsl_pm.flags & SHARPSL_ALARM_ACTIVE)) {
+                        dev_dbg(sharpsl_pm.dev, "No user triggered wakeup events and not charging. Strange. Suspend.\n");
+                        corgi_goto_sleep(alarm_time, alarm_enable, state);
+                        return 1;
+                }
+                if(sharpsl_off_charge_battery()) {
+                        dev_dbg(sharpsl_pm.dev, "Charging. Suspend...\n");
+                        corgi_goto_sleep(alarm_time, alarm_enable, state);
+                        return 1;
+                }
+                dev_dbg(sharpsl_pm.dev, "User triggered wakeup in offline charger.\n");
+        }
+        if ((STATUS_BATT_LOCKED == 0) || (sharpsl_fatal_check() < 0) )
+        {
+                dev_err(sharpsl_pm.dev, "Fatal condition. Suspend.\n");
+                corgi_goto_sleep(alarm_time, alarm_enable, state);
+                return 1;
+        }
+        return 0;
+}
+static int corgi_pxa_pm_enter(suspend_state_t state)
+{
+        unsigned long alarm_time = RTAR;
+        unsigned int alarm_status = ((RTSR & RTSR_ALE) != 0);
+        dev_dbg(sharpsl_pm.dev, "SharpSL suspending for first time.\n");
+        corgi_goto_sleep(alarm_time, alarm_status, state);
+        while (corgi_enter_suspend(alarm_time,alarm_status,state))
+                {}
+        dev_dbg(sharpsl_pm.dev, "SharpSL resuming...\n");
+        return 0;
+}
+#endif
+/*
+ * Check for fatal battery errors
+ * Fatal returns -1
+ */
+static int sharpsl_fatal_check(void)
+{
+        int buff[5], temp, i, acin;
+        dev_dbg(sharpsl_pm.dev, "sharpsl_fatal_check entered\n");
+        /* Check AC-Adapter */
+        acin = STATUS_AC_IN;
+        if (acin && (sharpsl_pm.charge_mode == CHRG_ON)) {
+                CHARGE_OFF();
+                udelay(100);
+                DISCHARGE_ON(); /* enable discharge */
+                mdelay(SHARPSL_WAIT_DISCHARGE_ON);
+        }
+        if (sharpsl_pm.machinfo->discharge1)
+                sharpsl_pm.machinfo->discharge1(1);
+        /* Check battery : check inserting battery ? */
+        for (i=0; i<5; i++) {
+                buff[i] = sharpsl_read_MainBattery();
+                mdelay(SHARPSL_CHECK_BATTERY_WAIT_TIME_VOLT);
+        }
+        if (sharpsl_pm.machinfo->discharge1)
+                sharpsl_pm.machinfo->discharge1(0);
+        if (acin && (sharpsl_pm.charge_mode == CHRG_ON)) {
+                udelay(100);
+                CHARGE_ON();
+                DISCHARGE_OFF();
+        }
+        temp = get_select_val(buff);
+        dev_dbg(sharpsl_pm.dev, "sharpsl_fatal_check: acin: %d, discharge voltage: %d, no discharge: %d\n", acin, temp, sharpsl_read_MainBattery());
+        if ((acin && (temp < SHARPSL_FATAL_ACIN_VOLT)) ||
+                        (!acin && (temp < SHARPSL_FATAL_NOACIN_VOLT)))
+                return -1;
+        return 0;
+}
+static int sharpsl_off_charge_error(void)
+{
+        dev_err(sharpsl_pm.dev, "Offline Charger: Error occured.\n");
+        CHARGE_OFF();
+        CHARGE_LED_ERR();
+        sharpsl_pm.charge_mode = CHRG_ERROR;
+        return 1;
+}
+/*
+ * Charging Control while suspended
+ * Return 1 - go straight to sleep
+ * Return 0 - sleep or wakeup depending on other factors
+ */
+static int sharpsl_off_charge_battery(void)
+{
+        int time;
+        dev_dbg(sharpsl_pm.dev, "Charge Mode: %d\n", sharpsl_pm.charge_mode);
+        if (sharpsl_pm.charge_mode == CHRG_OFF) {
+                dev_dbg(sharpsl_pm.dev, "Offline Charger: Step 1\n");
+                /* AC Check */
+                if ((sharpsl_ac_check() < 0) || (sharpsl_check_battery(1) < 0))
+                        return sharpsl_off_charge_error();
+                /* Start Charging */
+                CHARGE_LED_ON();
+                CHARGE_OFF();
+                mdelay(SHARPSL_CHARGE_WAIT_TIME);
+                CHARGE_ON();
+                sharpsl_pm.charge_mode = CHRG_ON;
+                sharpsl_pm.full_count = 0;
+                return 1;
+        } else if (sharpsl_pm.charge_mode != CHRG_ON) {
+                return 1;
+        }
+        if (sharpsl_pm.full_count == 0) {
+                int time;
+                dev_dbg(sharpsl_pm.dev, "Offline Charger: Step 2\n");
+                if (sharpsl_check_battery(0) < 0)
+                        return sharpsl_off_charge_error();
+                CHARGE_OFF();
+                mdelay(SHARPSL_CHARGE_WAIT_TIME);
+                CHARGE_ON();
+                sharpsl_pm.charge_mode = CHRG_ON;
+                mdelay(SHARPSL_CHARGE_CO_CHECK_TIME);
+                time = RCNR;
+                while(1) {
+                        /* Check if any wakeup event had occured */
+                        if (sharpsl_pm.machinfo->charger_wakeup() != 0)
+                                return 0;
+                        /* Check for timeout */
+                        if ((RCNR - time) > SHARPSL_WAIT_CO_TIME)
+                                return 1;
+                        if (STATUS_CHRG_FULL) {
+                                dev_dbg(sharpsl_pm.dev, "Offline Charger: Charge full occured. Retrying to check\n");
+                                sharpsl_pm.full_count++;
+                                CHARGE_OFF();
+                                mdelay(SHARPSL_CHARGE_WAIT_TIME);
+                                CHARGE_ON();
+                                return 1;
+                        }
+                }
+        }
+        dev_dbg(sharpsl_pm.dev, "Offline Charger: Step 3\n");
+        mdelay(SHARPSL_CHARGE_CO_CHECK_TIME);
+        time = RCNR;
+        while(1) {
+                /* Check if any wakeup event had occured */
+                if (sharpsl_pm.machinfo->charger_wakeup() != 0)
+                        return 0;
+                /* Check for timeout */
+                if ((RCNR-time) > SHARPSL_WAIT_CO_TIME) {
+                        if (sharpsl_pm.full_count > SHARPSL_CHARGE_RETRY_CNT) {
+                                dev_dbg(sharpsl_pm.dev, "Offline Charger: Not charged sufficiently. Retrying.\n");
+                                sharpsl_pm.full_count = 0;
+                        }
+                        sharpsl_pm.full_count++;
+                        return 1;
+                }
+                if (STATUS_CHRG_FULL) {
+                        dev_dbg(sharpsl_pm.dev, "Offline Charger: Charging complete.\n");
+                        CHARGE_LED_OFF();
+                        CHARGE_OFF();
+                        sharpsl_pm.charge_mode = CHRG_DONE;
+                        return 1;
+                }
+        }
+}
+static ssize_t battery_percentage_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+        return sprintf(buf, "%d\n",sharpsl_pm.battstat.mainbat_percent);
+}
+static ssize_t battery_voltage_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+        return sprintf(buf, "%d\n",sharpsl_pm.battstat.mainbat_voltage);
+}
+static DEVICE_ATTR(battery_percentage, 0444, battery_percentage_show, NULL);
+static DEVICE_ATTR(battery_voltage, 0444, battery_voltage_show, NULL);
+extern void (*apm_get_power_status)(struct apm_power_info *);
+static void sharpsl_apm_get_power_status(struct apm_power_info *info)
+{
+        info->ac_line_status = sharpsl_pm.battstat.ac_status;
+        if (sharpsl_pm.charge_mode == CHRG_ON)
+                info->battery_status = APM_BATTERY_STATUS_CHARGING;
+        else
+                info->battery_status = sharpsl_pm.battstat.mainbat_status;
+        info->battery_flag = (1 << info->battery_status);
+        info->battery_life = sharpsl_pm.battstat.mainbat_percent;
+}
+static struct pm_ops sharpsl_pm_ops = {
+        .pm_disk_mode   = PM_DISK_FIRMWARE,
+        .prepare        = pxa_pm_prepare,
+        .enter          = corgi_pxa_pm_enter,
+        .finish         = pxa_pm_finish,
+};
+static int __init sharpsl_pm_probe(struct device *dev)
+{
+        if (!dev->platform_data)
+                return -EINVAL;
+        sharpsl_pm.dev = dev;
+        sharpsl_pm.machinfo = dev->platform_data;
+        sharpsl_pm.charge_mode = CHRG_OFF;
+        sharpsl_pm.flags = 0;
+        sharpsl_pm.machinfo->init();
+        init_timer(&sharpsl_pm.ac_timer);
+        sharpsl_pm.ac_timer.function = sharpsl_ac_timer;
+        init_timer(&sharpsl_pm.chrg_full_timer);
+        sharpsl_pm.chrg_full_timer.function = sharpsl_chrg_full_timer;
+        pxa_gpio_mode(sharpsl_pm.machinfo->gpio_acin | GPIO_IN);
+        pxa_gpio_mode(sharpsl_pm.machinfo->gpio_batfull | GPIO_IN);
+        pxa_gpio_mode(sharpsl_pm.machinfo->gpio_batlock | GPIO_IN);
+        /* Register interrupt handlers */
+        if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr, SA_INTERRUPT, "AC Input Detect", sharpsl_ac_isr)) {
+                dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin));
+        }
+        else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin),IRQT_BOTHEDGE);
+        if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr, SA_INTERRUPT, "Battery Cover", sharpsl_fatal_isr)) {
+                dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock));
+        }
+        else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock),IRQT_FALLING);
+        if (sharpsl_pm.machinfo->gpio_fatal) {
+                if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr, SA_INTERRUPT, "Fatal Battery", sharpsl_fatal_isr)) {
+                        dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal));
+                }
+                else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal),IRQT_FALLING);
+        }
+        if (!machine_is_corgi())
+        {
+                /* Register interrupt handler. */
+                if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr, SA_INTERRUPT, "CO", sharpsl_chrg_full_isr)) {
+                        dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull));
+                }
+                else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull),IRQT_RISING);
+        }
+        device_create_file(dev, &dev_attr_battery_percentage);
+        device_create_file(dev, &dev_attr_battery_voltage);
+        apm_get_power_status = sharpsl_apm_get_power_status;
+        pm_set_ops(&sharpsl_pm_ops);
+        mod_timer(&sharpsl_pm.ac_timer, jiffies + msecs_to_jiffies(250));
+        return 0;
+}
+static int sharpsl_pm_remove(struct device *dev)
+{
+        pm_set_ops(NULL);
+        device_remove_file(dev, &dev_attr_battery_percentage);
+        device_remove_file(dev, &dev_attr_battery_voltage);
+        free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr);
+        free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr);
+        if (sharpsl_pm.machinfo->gpio_fatal)
+                free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr);
+        if (!machine_is_corgi())
+                free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr);
+        del_timer_sync(&sharpsl_pm.chrg_full_timer);
+        del_timer_sync(&sharpsl_pm.ac_timer);
+        return 0;
+}
+static struct device_driver sharpsl_pm_driver = {
+        .name           = "sharpsl-pm",
+        .bus            = &platform_bus_type,
+        .probe          = sharpsl_pm_probe,
+        .remove         = sharpsl_pm_remove,
+        .suspend        = sharpsl_pm_suspend,
+        .resume         = sharpsl_pm_resume,
+};
+static int __devinit sharpsl_pm_init(void)
+{
+        return driver_register(&sharpsl_pm_driver);
+}
+static void sharpsl_pm_exit(void)
+{
+        driver_unregister(&sharpsl_pm_driver);
+}
+late_initcall(sharpsl_pm_init);
+module_exit(sharpsl_pm_exit);
diff --git a/arch/arm/mach-pxa/ssp.c b/arch/arm/mach-pxa/ssp.c
index 4d826c021315..a68b30eff4d2 100644
--- a/arch/arm/mach-pxa/ssp.c
+++ b/arch/arm/mach-pxa/ssp.c
@@ -19,6 +19,8 @@
 *   22nd Aug 2003 Initial version.
 *   20th Dec 2004 Added ssp_config for changing port config without
 *                 closing the port.
+ *    4th Aug 2005 Added option to disable irq handler registration and
+ *                 cleaned up irq and clock detection.
 */
 #include <linux/module.h>
@@ -37,6 +39,26 @@
 #define PXA_SSP_PORTS   3
+struct ssp_info_ {
+        int irq;
+        u32 clock;
+};
+/*
+ * SSP port clock and IRQ settings
+ */
+static const struct ssp_info_ ssp_info[PXA_SSP_PORTS] = {
+#if defined (CONFIG_PXA27x)
+        {IRQ_SSP,       CKEN23_SSP1},
+        {IRQ_SSP2,      CKEN3_SSP2},
+        {IRQ_SSP3,      CKEN4_SSP3},
+#else
+        {IRQ_SSP,       CKEN3_SSP},
+        {IRQ_NSSP,      CKEN9_NSSP},
+        {IRQ_ASSP,      CKEN10_ASSP},
+#endif
+};
 static DECLARE_MUTEX(sem);
 static int use_count[PXA_SSP_PORTS] = {0, 0, 0};
@@ -210,9 +232,9 @@ int ssp_config(struct ssp_dev *dev, u32 mode, u32 flags, u32 psp_flags, u32 spee
 *   %-EBUSY    if the resources are already in use
 *   %0         on success
 */
-int ssp_init(struct ssp_dev *dev, u32 port)
+int ssp_init(struct ssp_dev *dev, u32 port, u32 init_flags)
 {
-        int ret, irq;
+        int ret;
        if (port > PXA_SSP_PORTS || port == 0)
                return -ENODEV;
@@ -229,61 +251,20 @@ int ssp_init(struct ssp_dev *dev, u32 port)
                up(&sem);
                return -EBUSY;
        }
-        switch (port) {
-                case 1:
-                        irq = IRQ_SSP;
-                        break;
-#if defined (CONFIG_PXA27x)
-                case 2:
-                        irq = IRQ_SSP2;
-                        break;
-                case 3:
-                        irq = IRQ_SSP3;
-                        break;
-#else
-                case 2:
-                        irq = IRQ_NSSP;
-                        break;
-                case 3:
-                        irq = IRQ_ASSP;
-                        break;
-#endif
-                default:
-                        return -ENODEV;
-        }
        dev->port = port;
-        ret = request_irq(irq, ssp_interrupt, 0, "SSP", dev);
+        /* do we need to get irq */
-        if (ret)
+        if (!(init_flags & SSP_NO_IRQ)) {
-                goto out_region;
+                ret = request_irq(ssp_info[port-1].irq, ssp_interrupt,
+                                0, "SSP", dev);
+                if (ret)
+                        goto out_region;
+                dev->irq = ssp_info[port-1].irq;
+        } else
+                dev->irq = 0;
        /* turn on SSP port clock */
-        switch (dev->port) {
+        pxa_set_cken(ssp_info[port-1].clock, 1);
-#if defined (CONFIG_PXA27x)
-                case 1:
-                        pxa_set_cken(CKEN23_SSP1, 1);
-                        break;
-                case 2:
-                        pxa_set_cken(CKEN3_SSP2, 1);
-                        break;
-                case 3:
-                        pxa_set_cken(CKEN4_SSP3, 1);
-                        break;
-#else
-                case 1:
-                        pxa_set_cken(CKEN3_SSP, 1);
-                        break;
-                case 2:
-                        pxa_set_cken(CKEN9_NSSP, 1);
-                        break;
-                case 3:
-                        pxa_set_cken(CKEN10_ASSP, 1);
-                        break;
-#endif
-        }
        up(&sem);
        return 0;
@@ -301,46 +282,17 @@ out_region:
 */
 void ssp_exit(struct ssp_dev *dev)
 {
-        int irq;
        down(&sem);
        SSCR0_P(dev->port) &= ~SSCR0_SSE;
-        /* find irq, save power and turn off SSP port clock */
+        if (dev->port > PXA_SSP_PORTS || dev->port == 0) {
-        switch (dev->port) {
+                printk(KERN_WARNING "SSP: tried to close invalid port\n");
-#if defined (CONFIG_PXA27x)
+                return;
-                case 1:
-                        irq = IRQ_SSP;
-                        pxa_set_cken(CKEN23_SSP1, 0);
-                        break;
-                case 2:
-                        irq = IRQ_SSP2;
-                        pxa_set_cken(CKEN3_SSP2, 0);
-                        break;
-                case 3:
-                        irq = IRQ_SSP3;
-                        pxa_set_cken(CKEN4_SSP3, 0);
-                        break;
-#else
-                case 1:
-                        irq = IRQ_SSP;
-                        pxa_set_cken(CKEN3_SSP, 0);
-                        break;
-                case 2:
-                        irq = IRQ_NSSP;
-                        pxa_set_cken(CKEN9_NSSP, 0);
-                        break;
-                case 3:
-                        irq = IRQ_ASSP;
-                        pxa_set_cken(CKEN10_ASSP, 0);
-                        break;
-#endif
-                default:
-                        printk(KERN_WARNING "SSP: tried to close invalid port\n");
-                        return;
        }
-        free_irq(irq, dev);
+        pxa_set_cken(ssp_info[dev->port-1].clock, 0);
+        if (dev->irq)
+                free_irq(dev->irq, dev);
        release_mem_region(__PREG(SSCR0_P(dev->port)), 0x2c);
        use_count[dev->port - 1]--;
        up(&sem);
diff --git a/arch/arm/mach-realview/Makefile b/arch/arm/mach-realview/Makefile
index 011a85c10627..36e76ba937fc 100644
--- a/arch/arm/mach-realview/Makefile
+++ b/arch/arm/mach-realview/Makefile
@@ -5,3 +5,5 @@
 obj-y                                   := core.o clock.o
 obj-$(CONFIG_MACH_REALVIEW_EB)          += realview_eb.o
 obj-$(CONFIG_SMP)                       += platsmp.o headsmp.o
+obj-$(CONFIG_HOTPLUG_CPU)               += hotplug.o
+obj-$(CONFIG_LOCAL_TIMERS)              += localtimer.o
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c
index 4ea60d8b6e36..e2c6fa23d3cd 100644
--- a/arch/arm/mach-realview/core.c
+++ b/arch/arm/mach-realview/core.c
@@ -550,7 +550,7 @@ static irqreturn_t realview_timer_interrupt(int irq, void *dev_id, struct pt_reg
        timer_tick(regs);
-#ifdef CONFIG_SMP
+#if defined(CONFIG_SMP) && !defined(CONFIG_LOCAL_TIMERS)
        smp_send_timer();
        update_process_times(user_mode(regs));
 #endif
diff --git a/arch/arm/mach-realview/hotplug.c b/arch/arm/mach-realview/hotplug.c
new file mode 100644
index 000000000000..09748cbcd10e
--- /dev/null
+++ b/arch/arm/mach-realview/hotplug.c
@@ -0,0 +1,138 @@
+/*
+ *  linux/arch/arm/mach-realview/hotplug.c
+ *
+ *  Copyright (C) 2002 ARM Ltd.
+ *  All Rights Reserved
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/smp.h>
+#include <linux/completion.h>
+extern volatile int pen_release;
+static DECLARE_COMPLETION(cpu_killed);
+static inline void cpu_enter_lowpower(void)
+{
+        unsigned int v;
+        asm volatile(   "mcr    p15, 0, %1, c7, c14, 0\n"
+        "       mcr     p15, 0, %1, c7, c5, 0\n"
+        "       mcr     p15, 0, %1, c7, c10, 4\n"
+        /*
+         * Turn off coherency
+         */
+        "       mrc     p15, 0, %0, c1, c0, 1\n"
+        "       bic     %0, %0, #0x20\n"
+        "       mcr     p15, 0, %0, c1, c0, 1\n"
+        "       mrc     p15, 0, %0, c1, c0, 0\n"
+        "       bic     %0, %0, #0x04\n"
+        "       mcr     p15, 0, %0, c1, c0, 0\n"
+          : "=&r" (v)
+          : "r" (0)
+          : "cc");
+}
+static inline void cpu_leave_lowpower(void)
+{
+        unsigned int v;
+        asm volatile(   "mrc    p15, 0, %0, c1, c0, 0\n"
+        "       orr     %0, %0, #0x04\n"
+        "       mcr     p15, 0, %0, c1, c0, 0\n"
+        "       mrc     p15, 0, %0, c1, c0, 1\n"
+        "       orr     %0, %0, #0x20\n"
+        "       mcr     p15, 0, %0, c1, c0, 1\n"
+          : "=&r" (v)
+          :
+          : "cc");
+}
+static inline void platform_do_lowpower(unsigned int cpu)
+{
+        /*
+         * there is no power-control hardware on this platform, so all
+         * we can do is put the core into WFI; this is safe as the calling
+         * code will have already disabled interrupts
+         */
+        for (;;) {
+                /*
+                 * here's the WFI
+                 */
+                asm(".word      0xe320f003\n"
+                    :
+                    :
+                    : "memory", "cc");
+                if (pen_release == cpu) {
+                        /*
+                         * OK, proper wakeup, we're done
+                         */
+                        break;
+                }
+                /*
+                 * getting here, means that we have come out of WFI without
+                 * having been woken up - this shouldn't happen
+                 *
+                 * The trouble is, letting people know about this is not really
+                 * possible, since we are currently running incoherently, and
+                 * therefore cannot safely call printk() or anything else
+                 */
+#ifdef DEBUG
+                printk("CPU%u: spurious wakeup call\n", cpu);
+#endif
+        }
+}
+int platform_cpu_kill(unsigned int cpu)
+{
+        return wait_for_completion_timeout(&cpu_killed, 5000);
+}
+/*
+ * platform-specific code to shutdown a CPU
+ *
+ * Called with IRQs disabled
+ */
+void platform_cpu_die(unsigned int cpu)
+{
+#ifdef DEBUG
+        unsigned int this_cpu = hard_smp_processor_id();
+        if (cpu != this_cpu) {
+                printk(KERN_CRIT "Eek! platform_cpu_die running on %u, should be %u\n",
+                           this_cpu, cpu);
+                BUG();
+        }
+#endif
+        printk(KERN_NOTICE "CPU%u: shutdown\n", cpu);
+        complete(&cpu_killed);
+        /*
+         * we're ready for shutdown now, so do it
+         */
+        cpu_enter_lowpower();
+        platform_do_lowpower(cpu);
+        /*
+         * bring this CPU back into the world of cache
+         * coherency, and then restore interrupts
+         */
+        cpu_leave_lowpower();
+}
+int mach_cpu_disable(unsigned int cpu)
+{
+        /*
+         * we don't allow CPU 0 to be shutdown (it is still too special
+         * e.g. clock tick interrupts)
+         */
+        return cpu == 0 ? -EPERM : 0;
+}
diff --git a/arch/arm/mach-realview/localtimer.c b/arch/arm/mach-realview/localtimer.c
new file mode 100644
index 000000000000..5e917e37d095
--- /dev/null
+++ b/arch/arm/mach-realview/localtimer.c
@@ -0,0 +1,130 @@
+/*
+ *  linux/arch/arm/mach-realview/localtimer.c
+ *
+ *  Copyright (C) 2002 ARM Ltd.
+ *  All Rights Reserved
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/delay.h>
+#include <linux/device.h>
+#include <linux/smp.h>
+#include <asm/mach/time.h>
+#include <asm/hardware/arm_twd.h>
+#include <asm/hardware/gic.h>
+#include <asm/hardware.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include "core.h"
+#define TWD_BASE(cpu)   (__io_address(REALVIEW_TWD_BASE) + \
+                         ((cpu) * REALVIEW_TWD_SIZE))
+static unsigned long mpcore_timer_rate;
+/*
+ * local_timer_ack: checks for a local timer interrupt.
+ *
+ * If a local timer interrupt has occured, acknowledge and return 1.
+ * Otherwise, return 0.
+ */
+int local_timer_ack(void)
+{
+        void __iomem *base = TWD_BASE(smp_processor_id());
+        if (__raw_readl(base + TWD_TIMER_INTSTAT)) {
+                __raw_writel(1, base + TWD_TIMER_INTSTAT);
+                return 1;
+        }
+        return 0;
+}
+void __cpuinit local_timer_setup(unsigned int cpu)
+{
+        void __iomem *base = TWD_BASE(cpu);
+        unsigned int load, offset;
+        u64 waitjiffies;
+        unsigned int count;
+        /*
+         * If this is the first time round, we need to work out how fast
+         * the timer ticks
+         */
+        if (mpcore_timer_rate == 0) {
+                printk("Calibrating local timer... ");
+                /* Wait for a tick to start */
+                waitjiffies = get_jiffies_64() + 1;
+                while (get_jiffies_64() < waitjiffies)
+                        udelay(10);
+                /* OK, now the tick has started, let's get the timer going */
+                waitjiffies += 5;
+                                 /* enable, no interrupt or reload */
+                __raw_writel(0x1, base + TWD_TIMER_CONTROL);
+                                 /* maximum value */
+                __raw_writel(0xFFFFFFFFU, base + TWD_TIMER_COUNTER);
+                while (get_jiffies_64() < waitjiffies)
+                        udelay(10);
+                count = __raw_readl(base + TWD_TIMER_COUNTER);
+                mpcore_timer_rate = (0xFFFFFFFFU - count) * (HZ / 5);
+                printk("%lu.%02luMHz.\n", mpcore_timer_rate / 1000000,
+                        (mpcore_timer_rate / 100000) % 100);
+        }
+        load = mpcore_timer_rate / HZ;
+        __raw_writel(load, base + TWD_TIMER_LOAD);
+        __raw_writel(0x7,  base + TWD_TIMER_CONTROL);
+        /*
+         * Now maneuver our local tick into the right part of the jiffy.
+         * Start by working out where within the tick our local timer
+         * interrupt should go.
+         */
+        offset = ((mpcore_timer_rate / HZ) / (NR_CPUS + 1)) * (cpu + 1);
+        /*
+         * gettimeoffset() will return a number of us since the last tick.
+         * Convert this number of us to a local timer tick count.
+         * Be careful of integer overflow whilst keeping maximum precision.
+         *
+         * with HZ=100 and 1MHz (fpga) ~ 1GHz processor:
+         * load = 1 ~ 10,000
+         * mpcore_timer_rate/10000 = 100 ~ 100,000
+         *
+         * so the multiply value will be less than 10^9 always.
+         */
+        load = (system_timer->offset() * (mpcore_timer_rate / 10000)) / 100;
+        /* Add on our offset to get the load value */
+        load = (load + offset) % (mpcore_timer_rate / HZ);
+        __raw_writel(load, base + TWD_TIMER_COUNTER);
+        /* Make sure our local interrupt controller has this enabled */
+        __raw_writel(1 << IRQ_LOCALTIMER,
+                     __io_address(REALVIEW_GIC_DIST_BASE) + GIC_DIST_ENABLE_SET);
+}
+/*
+ * take a local timer down
+ */
+void __cpuexit local_timer_stop(unsigned int cpu)
+{
+        __raw_writel(0, TWD_BASE(cpu) + TWD_TIMER_CONTROL);
+}
diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c
index 09b35f62247a..0c7d4ac9a7b3 100644
--- a/arch/arm/mach-realview/platsmp.c
+++ b/arch/arm/mach-realview/platsmp.c
@@ -175,6 +175,11 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
                max_cpus = ncores;
        /*
+         * Enable the local timer for primary CPU
+         */
+        local_timer_setup(cpu);
+        /*
         * Initialise the possible/present maps.
         * cpu_possible_map describes the set of CPUs which may be present
         * cpu_present_map describes the set of CPUs populated
diff --git a/arch/arm/mach-s3c2410/mach-anubis.c b/arch/arm/mach-s3c2410/mach-anubis.c
index 8390b685c2b6..0f81fc0c2f7f 100644
--- a/arch/arm/mach-s3c2410/mach-anubis.c
+++ b/arch/arm/mach-s3c2410/mach-anubis.c
@@ -56,8 +56,16 @@
 static struct map_desc anubis_iodesc[] __initdata = {
  /* ISA IO areas */
-  { (u32)S3C24XX_VA_ISA_BYTE, 0x0,         SZ_16M, MT_DEVICE },
+  {
-  { (u32)S3C24XX_VA_ISA_WORD, 0x0,         SZ_16M, MT_DEVICE },
+        .virtual        = (u32)S3C24XX_VA_ISA_BYTE,
+        .pfn            = __phys_to_pfn(0x0),
+        .length         = SZ_4M,
+        .type           = MT_DEVICE
+  }, {
+        .virtual        = (u32)S3C24XX_VA_ISA_WORD,
+        .pfn            = __phys_to_pfn(0x0),
+        .length         = SZ_4M, MT_DEVICE
+  },
  /* we could possibly compress the next set down into a set of smaller tables
   * pagetables, but that would mean using an L2 section, and it still means
@@ -66,16 +74,41 @@ static struct map_desc anubis_iodesc[] __initdata = {
  /* CPLD control registers */
-  { (u32)ANUBIS_VA_CTRL1,       ANUBIS_PA_CTRL1,        SZ_4K, MT_DEVICE },
+  {
-  { (u32)ANUBIS_VA_CTRL2,       ANUBIS_PA_CTRL2,        SZ_4K, MT_DEVICE },
+        .virtual        = (u32)ANUBIS_VA_CTRL1,
+        .pfn            = __phys_to_pfn(ANUBIS_PA_CTRL1),
+        .length         = SZ_4K,
+        .type           = MT_DEVICE
+  }, {
+        .virtual        = (u32)ANUBIS_VA_CTRL2,
+        .pfn            = __phys_to_pfn(ANUBIS_PA_CTRL2),
+        .length         = SZ_4K,
+        .type           =MT_DEVICE
+  },
  /* IDE drives */
-  { (u32)ANUBIS_IDEPRI,         S3C2410_CS3,            SZ_1M, MT_DEVICE },
+  {
-  { (u32)ANUBIS_IDEPRIAUX,      S3C2410_CS3+(1<<26),    SZ_1M, MT_DEVICE },
+        .virtual        = (u32)ANUBIS_IDEPRI,
+        .pfn            = __phys_to_pfn(S3C2410_CS3),
-  { (u32)ANUBIS_IDESEC,         S3C2410_CS4,            SZ_1M, MT_DEVICE },
+        .length         = SZ_1M,
-  { (u32)ANUBIS_IDESECAUX,      S3C2410_CS4+(1<<26),    SZ_1M, MT_DEVICE },
+        .type           = MT_DEVICE
+  }, {
+        .virtual        = (u32)ANUBIS_IDEPRIAUX,
+        .pfn            = __phys_to_pfn(S3C2410_CS3+(1<<26)),
+        .length         = SZ_1M,
+        .type           = MT_DEVICE
+  }, {
+        .virtual        = (u32)ANUBIS_IDESEC,
+        .pfn            = __phys_to_pfn(S3C2410_CS4),
+        .length         = SZ_1M,
+        .type           = MT_DEVICE
+  }, {
+        .virtual        = (u32)ANUBIS_IDESECAUX,
+        .pfn            = __phys_to_pfn(S3C2410_CS4+(1<<26)),
+        .length         = SZ_1M,
+        .type           = MT_DEVICE
+  },
 };
 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
diff --git a/arch/arm/mach-s3c2410/mach-rx3715.c b/arch/arm/mach-s3c2410/mach-rx3715.c
index 24d69019a843..f8d86d1e16b6 100644
--- a/arch/arm/mach-s3c2410/mach-rx3715.c
+++ b/arch/arm/mach-s3c2410/mach-rx3715.c
@@ -56,8 +56,17 @@
 static struct map_desc rx3715_iodesc[] __initdata = {
        /* dump ISA space somewhere unused */
-        { (u32)S3C24XX_VA_ISA_WORD, S3C2410_CS3, SZ_16M, MT_DEVICE },
+        {
-        { (u32)S3C24XX_VA_ISA_BYTE, S3C2410_CS3, SZ_16M, MT_DEVICE },
+                .virtual        = (u32)S3C24XX_VA_ISA_WORD,
+                .pfn            = __phys_to_pfn(S3C2410_CS3),
+                .length         = SZ_1M,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (u32)S3C24XX_VA_ISA_BYTE,
+                .pfn            = __phys_to_pfn(S3C2410_CS3),
+                .length         = SZ_1M,
+                .type           = MT_DEVICE,
+        },
 };
diff --git a/arch/arm/mach-s3c2410/mach-smdk2440.c b/arch/arm/mach-s3c2410/mach-smdk2440.c
index d666c621ad06..4e31118533e6 100644
--- a/arch/arm/mach-s3c2410/mach-smdk2440.c
+++ b/arch/arm/mach-s3c2410/mach-smdk2440.c
@@ -58,8 +58,27 @@
 static struct map_desc smdk2440_iodesc[] __initdata = {
        /* ISA IO Space map (memory space selected by A24) */
-        { (u32)S3C24XX_VA_ISA_WORD, S3C2410_CS2, SZ_16M, MT_DEVICE },
+        {
-        { (u32)S3C24XX_VA_ISA_BYTE, S3C2410_CS2, SZ_16M, MT_DEVICE },
+                .virtual        = (u32)S3C24XX_VA_ISA_WORD,
+                .pfn            = __phys_to_pfn(S3C2410_CS2),
+                .length         = 0x10000,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (u32)S3C24XX_VA_ISA_WORD + 0x10000,
+                .pfn            = __phys_to_pfn(S3C2410_CS2 + (1<<24)),
+                .length         = SZ_4M,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (u32)S3C24XX_VA_ISA_BYTE,
+                .pfn            = __phys_to_pfn(S3C2410_CS2),
+                .length         = 0x10000,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (u32)S3C24XX_VA_ISA_BYTE + 0x10000,
+                .pfn            = __phys_to_pfn(S3C2410_CS2 + (1<<24)),
+                .length         = SZ_4M,
+                .type           = MT_DEVICE,
+        }
 };
 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c
index 69f1970646c6..9e02bc3712a0 100644
--- a/arch/arm/mach-sa1100/neponset.c
+++ b/arch/arm/mach-sa1100/neponset.c
@@ -137,7 +137,7 @@ static struct sa1100_port_fns neponset_port_fns __initdata = {
        .get_mctrl      = neponset_get_mctrl,
 };
-static int neponset_probe(struct device *dev)
+static int neponset_probe(struct platform_device *dev)
 {
        sa1100_register_uart_fns(&neponset_port_fns);
@@ -178,27 +178,27 @@ static int neponset_probe(struct device *dev)
 /*
 * LDM power management.
 */
-static int neponset_suspend(struct device *dev, pm_message_t state)
+static int neponset_suspend(struct platform_device *dev, pm_message_t state)
 {
        /*
         * Save state.
         */
-        if (!dev->power.saved_state)
+        if (!dev->dev.power.saved_state)
-                dev->power.saved_state = kmalloc(sizeof(unsigned int), GFP_KERNEL);
+                dev->dev.power.saved_state = kmalloc(sizeof(unsigned int), GFP_KERNEL);
-        if (!dev->power.saved_state)
+        if (!dev->dev.power.saved_state)
                return -ENOMEM;
-        *(unsigned int *)dev->power.saved_state = NCR_0;
+        *(unsigned int *)dev->dev.power.saved_state = NCR_0;
        return 0;
 }
-static int neponset_resume(struct device *dev)
+static int neponset_resume(struct platform_device *dev)
 {
-        if (dev->power.saved_state) {
+        if (dev->dev.power.saved_state) {
-                NCR_0 = *(unsigned int *)dev->power.saved_state;
+                NCR_0 = *(unsigned int *)dev->dev.power.saved_state;
-                kfree(dev->power.saved_state);
+                kfree(dev->dev.power.saved_state);
-                dev->power.saved_state = NULL;
+                dev->dev.power.saved_state = NULL;
        }
        return 0;
@@ -209,12 +209,13 @@ static int neponset_resume(struct device *dev)
 #define neponset_resume  NULL
 #endif
-static struct device_driver neponset_device_driver = {
+static struct platform_driver neponset_device_driver = {
-        .name           = "neponset",
-        .bus            = &platform_bus_type,
        .probe          = neponset_probe,
        .suspend        = neponset_suspend,
        .resume         = neponset_resume,
+        .driver         = {
+                .name   = "neponset",
+        },
 };
 static struct resource neponset_resources[] = {
@@ -293,7 +294,7 @@ static struct platform_device *devices[] __initdata = {
 static int __init neponset_init(void)
 {
-        driver_register(&neponset_device_driver);
+        platform_driver_register(&neponset_device_driver);
        /*
         * The Neponset is only present on the Assabet machine type.
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index e3c14d6b4328..e84fdde6edf8 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -102,8 +102,8 @@ config CPU_ARM922T
 # ARM925T
 config CPU_ARM925T
        bool "Support ARM925T processor" if ARCH_OMAP1
-        depends on ARCH_OMAP1510
+        depends on ARCH_OMAP15XX
-        default y if ARCH_OMAP1510
+        default y if ARCH_OMAP15XX
        select CPU_32v4
        select CPU_ABRT_EV4T
        select CPU_CACHE_V4WT
@@ -242,7 +242,7 @@ config CPU_XSCALE
 # ARMv6
 config CPU_V6
        bool "Support ARM V6 processor"
-        depends on ARCH_INTEGRATOR || MACH_REALVIEW_EB
+        depends on ARCH_INTEGRATOR || MACH_REALVIEW_EB || ARCH_OMAP2
        select CPU_32v6
        select CPU_ABRT_EV6
        select CPU_CACHE_V6
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile
index 7e144f9cad1c..9ccf1943fc94 100644
--- a/arch/arm/plat-omap/Makefile
+++ b/arch/arm/plat-omap/Makefile
@@ -3,7 +3,7 @@
 #
 # Common support
-obj-y := common.o sram.o sram-fn.o clock.o dma.o mux.o gpio.o mcbsp.o usb.o
+obj-y := common.o sram.o sram-fn.o clock.o devices.o dma.o mux.o gpio.o mcbsp.o usb.o
 obj-m :=
 obj-n :=
 obj-  :=
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c
index a020fe16428f..7ce39b986e23 100644
--- a/arch/arm/plat-omap/clock.c
+++ b/arch/arm/plat-omap/clock.c
@@ -1,15 +1,20 @@
 /*
 *  linux/arch/arm/plat-omap/clock.c
 *
- *  Copyright (C) 2004 Nokia corporation
+ *  Copyright (C) 2004 - 2005 Nokia corporation
 *  Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
 *
+ *  Modified for omap shared clock framework by Tony Lindgren <tony@atomide.com>
+ *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
-#include <linux/module.h>
+#include <linux/version.h>
+#include <linux/config.h>
 #include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/module.h>
 #include <linux/list.h>
 #include <linux/errno.h>
 #include <linux/err.h>
@@ -18,562 +23,20 @@
 #include <asm/io.h>
 #include <asm/semaphore.h>
 #include <asm/hardware/clock.h>
-#include <asm/arch/board.h>
-#include <asm/arch/usb.h>
-#include "clock.h"
+#include <asm/arch/clock.h>
-#include "sram.h"
-static LIST_HEAD(clocks);
+LIST_HEAD(clocks);
 static DECLARE_MUTEX(clocks_sem);
-static DEFINE_SPINLOCK(clockfw_lock);
+DEFINE_SPINLOCK(clockfw_lock);
-static void propagate_rate(struct clk *  clk);
-/* UART clock function */
-static int set_uart_rate(struct clk * clk, unsigned long rate);
-/* External clock (MCLK & BCLK) functions */
-static int set_ext_clk_rate(struct clk *  clk, unsigned long rate);
-static long round_ext_clk_rate(struct clk *  clk, unsigned long rate);
-static void init_ext_clk(struct clk *  clk);
-/* MPU virtual clock functions */
-static int select_table_rate(struct clk *  clk, unsigned long rate);
-static long round_to_table_rate(struct clk *  clk, unsigned long rate);
-void clk_setdpll(__u16, __u16);
-static struct mpu_rate rate_table[] = {
-        /* MPU MHz, xtal MHz, dpll1 MHz, CKCTL, DPLL_CTL
-         * armdiv, dspdiv, dspmmu, tcdiv, perdiv, lcddiv
-         */
-#if defined(CONFIG_OMAP_ARM_216MHZ)
-        { 216000000, 12000000, 216000000, 0x050d, 0x2910 }, /* 1/1/2/2/2/8 */
-#endif
-#if defined(CONFIG_OMAP_ARM_195MHZ)
-        { 195000000, 13000000, 195000000, 0x050e, 0x2790 }, /* 1/1/2/2/4/8 */
-#endif
-#if defined(CONFIG_OMAP_ARM_192MHZ)
-        { 192000000, 19200000, 192000000, 0x050f, 0x2510 }, /* 1/1/2/2/8/8 */
-        { 192000000, 12000000, 192000000, 0x050f, 0x2810 }, /* 1/1/2/2/8/8 */
-        {  96000000, 12000000, 192000000, 0x055f, 0x2810 }, /* 2/2/2/2/8/8 */
-        {  48000000, 12000000, 192000000, 0x0baf, 0x2810 }, /* 4/8/4/4/8/8 */
-        {  24000000, 12000000, 192000000, 0x0fff, 0x2810 }, /* 8/8/8/8/8/8 */
-#endif
-#if defined(CONFIG_OMAP_ARM_182MHZ)
-        { 182000000, 13000000, 182000000, 0x050e, 0x2710 }, /* 1/1/2/2/4/8 */
-#endif
-#if defined(CONFIG_OMAP_ARM_168MHZ)
-        { 168000000, 12000000, 168000000, 0x010f, 0x2710 }, /* 1/1/1/2/8/8 */
-#endif
-#if defined(CONFIG_OMAP_ARM_150MHZ)
-        { 150000000, 12000000, 150000000, 0x010a, 0x2cb0 }, /* 1/1/1/2/4/4 */
-#endif
-#if defined(CONFIG_OMAP_ARM_120MHZ)
-        { 120000000, 12000000, 120000000, 0x010a, 0x2510 }, /* 1/1/1/2/4/4 */
-#endif
-#if defined(CONFIG_OMAP_ARM_96MHZ)
-        {  96000000, 12000000,  96000000, 0x0005, 0x2410 }, /* 1/1/1/1/2/2 */
-#endif
-#if defined(CONFIG_OMAP_ARM_60MHZ)
-        {  60000000, 12000000,  60000000, 0x0005, 0x2290 }, /* 1/1/1/1/2/2 */
-#endif
-#if defined(CONFIG_OMAP_ARM_30MHZ)
-        {  30000000, 12000000,  60000000, 0x0555, 0x2290 }, /* 2/2/2/2/2/2 */
-#endif
-        { 0, 0, 0, 0, 0 },
-};
-static void ckctl_recalc(struct clk *  clk);
-int __clk_enable(struct clk *clk);
-void __clk_disable(struct clk *clk);
-void __clk_unuse(struct clk *clk);
-int __clk_use(struct clk *clk);
-static void followparent_recalc(struct clk *  clk)
-{
-        clk->rate = clk->parent->rate;
-}
-static void watchdog_recalc(struct clk *  clk)
-{
-        clk->rate = clk->parent->rate / 14;
-}
-static void uart_recalc(struct clk * clk)
-{
-        unsigned int val = omap_readl(clk->enable_reg);
-        if (val & clk->enable_bit)
-                clk->rate = 48000000;
-        else
-                clk->rate = 12000000;
-}
-static struct clk ck_ref = {
-        .name           = "ck_ref",
-        .rate           = 12000000,
-        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
-                          ALWAYS_ENABLED,
-};
-static struct clk ck_dpll1 = {
-        .name           = "ck_dpll1",
-        .parent         = &ck_ref,
-        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
-                          RATE_PROPAGATES | ALWAYS_ENABLED,
-};
-static struct clk ck_dpll1out = {
-        .name           = "ck_dpll1out",
-        .parent         = &ck_dpll1,
-        .flags          = CLOCK_IN_OMAP16XX,
-        .enable_reg     = ARM_IDLECT2,
-        .enable_bit     = EN_CKOUT_ARM,
-        .recalc         = &followparent_recalc,
-};
-static struct clk arm_ck = {
-        .name           = "arm_ck",
-        .parent         = &ck_dpll1,
-        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
-                          RATE_CKCTL | RATE_PROPAGATES | ALWAYS_ENABLED,
-        .rate_offset    = CKCTL_ARMDIV_OFFSET,
-        .recalc         = &ckctl_recalc,
-};
-static struct clk armper_ck = {
-        .name           = "armper_ck",
-        .parent         = &ck_dpll1,
-        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
-                          RATE_CKCTL,
-        .enable_reg     = ARM_IDLECT2,
-        .enable_bit     = EN_PERCK,
-        .rate_offset    = CKCTL_PERDIV_OFFSET,
-        .recalc         = &ckctl_recalc,
-};
-static struct clk arm_gpio_ck = {
-        .name           = "arm_gpio_ck",
-        .parent         = &ck_dpll1,
-        .flags          = CLOCK_IN_OMAP1510,
-        .enable_reg     = ARM_IDLECT2,
-        .enable_bit     = EN_GPIOCK,
-        .recalc         = &followparent_recalc,
-};
-static struct clk armxor_ck = {
-        .name           = "armxor_ck",
-        .parent         = &ck_ref,
-        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
-        .enable_reg     = ARM_IDLECT2,
-        .enable_bit     = EN_XORPCK,
-        .recalc         = &followparent_recalc,
-};
-static struct clk armtim_ck = {
-        .name           = "armtim_ck",
-        .parent         = &ck_ref,
-        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
-        .enable_reg     = ARM_IDLECT2,
-        .enable_bit     = EN_TIMCK,
-        .recalc         = &followparent_recalc,
-};
-static struct clk armwdt_ck = {
-        .name           = "armwdt_ck",
-        .parent         = &ck_ref,
-        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
-        .enable_reg     = ARM_IDLECT2,
-        .enable_bit     = EN_WDTCK,
-        .recalc         = &watchdog_recalc,
-};
-static struct clk arminth_ck16xx = {
-        .name           = "arminth_ck",
-        .parent         = &arm_ck,
-        .flags          = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
-        .recalc         = &followparent_recalc,
-        /* Note: On 16xx the frequency can be divided by 2 by programming
-         * ARM_CKCTL:ARM_INTHCK_SEL(14) to 1
-         *
-         * 1510 version is in TC clocks.
-         */
-};
-static struct clk dsp_ck = {
-        .name           = "dsp_ck",
-        .parent         = &ck_dpll1,
-        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
-                          RATE_CKCTL,
-        .enable_reg     = ARM_CKCTL,
-        .enable_bit     = EN_DSPCK,
-        .rate_offset    = CKCTL_DSPDIV_OFFSET,
-        .recalc         = &ckctl_recalc,
-};
-static struct clk dspmmu_ck = {
-        .name           = "dspmmu_ck",
-        .parent         = &ck_dpll1,
-        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
-                          RATE_CKCTL | ALWAYS_ENABLED,
-        .rate_offset    = CKCTL_DSPMMUDIV_OFFSET,
-        .recalc         = &ckctl_recalc,
-};
-static struct clk dspper_ck = {
-        .name           = "dspper_ck",
-        .parent         = &ck_dpll1,
-        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
-                          RATE_CKCTL | DSP_DOMAIN_CLOCK | VIRTUAL_IO_ADDRESS,
-        .enable_reg     = DSP_IDLECT2,
-        .enable_bit     = EN_PERCK,
-        .rate_offset    = CKCTL_PERDIV_OFFSET,
-        .recalc         = &followparent_recalc,
-        //.recalc               = &ckctl_recalc,
-};
-static struct clk dspxor_ck = {
-        .name           = "dspxor_ck",
-        .parent         = &ck_ref,
-        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
-                          DSP_DOMAIN_CLOCK | VIRTUAL_IO_ADDRESS,
-        .enable_reg     = DSP_IDLECT2,
-        .enable_bit     = EN_XORPCK,
-        .recalc         = &followparent_recalc,
-};
-static struct clk dsptim_ck = {
-        .name           = "dsptim_ck",
-        .parent         = &ck_ref,
-        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
-                          DSP_DOMAIN_CLOCK | VIRTUAL_IO_ADDRESS,
-        .enable_reg     = DSP_IDLECT2,
-        .enable_bit     = EN_DSPTIMCK,
-        .recalc         = &followparent_recalc,
-};
-static struct clk tc_ck = {
-        .name           = "tc_ck",
-        .parent         = &ck_dpll1,
-        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP730 |
-                          RATE_CKCTL | RATE_PROPAGATES | ALWAYS_ENABLED,
-        .rate_offset    = CKCTL_TCDIV_OFFSET,
-        .recalc         = &ckctl_recalc,
-};
-static struct clk arminth_ck1510 = {
-        .name           = "arminth_ck",
-        .parent         = &tc_ck,
-        .flags          = CLOCK_IN_OMAP1510 | ALWAYS_ENABLED,
-        .recalc         = &followparent_recalc,
-        /* Note: On 1510 the frequency follows TC_CK
-         *
-         * 16xx version is in MPU clocks.
-         */
-};
-static struct clk tipb_ck = {
-        .name           = "tibp_ck",
-        .parent         = &tc_ck,
-        .flags          = CLOCK_IN_OMAP1510 | ALWAYS_ENABLED,
-        .recalc         = &followparent_recalc,
-};
-static struct clk l3_ocpi_ck = {
-        .name           = "l3_ocpi_ck",
-        .parent         = &tc_ck,
-        .flags          = CLOCK_IN_OMAP16XX,
-        .enable_reg     = ARM_IDLECT3,
-        .enable_bit     = EN_OCPI_CK,
-        .recalc         = &followparent_recalc,
-};
-static struct clk tc1_ck = {
+static struct clk_functions *arch_clock;
-        .name           = "tc1_ck",
-        .parent         = &tc_ck,
-        .flags          = CLOCK_IN_OMAP16XX,
-        .enable_reg     = ARM_IDLECT3,
-        .enable_bit     = EN_TC1_CK,
-        .recalc         = &followparent_recalc,
-};
-static struct clk tc2_ck = {
+/*-------------------------------------------------------------------------
-        .name           = "tc2_ck",
+ * Standard clock functions defined in asm/hardware/clock.h
-        .parent         = &tc_ck,
+ *-------------------------------------------------------------------------*/
-        .flags          = CLOCK_IN_OMAP16XX,
-        .enable_reg     = ARM_IDLECT3,
-        .enable_bit     = EN_TC2_CK,
-        .recalc         = &followparent_recalc,
-};
-static struct clk dma_ck = {
+struct clk * clk_get(struct device *dev, const char *id)
-        .name           = "dma_ck",
-        .parent         = &tc_ck,
-        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
-                          ALWAYS_ENABLED,
-        .recalc         = &followparent_recalc,
-};
-static struct clk dma_lcdfree_ck = {
-        .name           = "dma_lcdfree_ck",
-        .parent         = &tc_ck,
-        .flags          = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
-        .recalc         = &followparent_recalc,
-};
-static struct clk api_ck = {
-        .name           = "api_ck",
-        .parent         = &tc_ck,
-        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
-        .enable_reg     = ARM_IDLECT2,
-        .enable_bit     = EN_APICK,
-        .recalc         = &followparent_recalc,
-};
-static struct clk lb_ck = {
-        .name           = "lb_ck",
-        .parent         = &tc_ck,
-        .flags          = CLOCK_IN_OMAP1510,
-        .enable_reg     = ARM_IDLECT2,
-        .enable_bit     = EN_LBCK,
-        .recalc         = &followparent_recalc,
-};
-static struct clk rhea1_ck = {
-        .name           = "rhea1_ck",
-        .parent         = &tc_ck,
-        .flags          = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
-        .recalc         = &followparent_recalc,
-};
-static struct clk rhea2_ck = {
-        .name           = "rhea2_ck",
-        .parent         = &tc_ck,
-        .flags          = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
-        .recalc         = &followparent_recalc,
-};
-static struct clk lcd_ck = {
-        .name           = "lcd_ck",
-        .parent         = &ck_dpll1,
-        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP730 |
-                          RATE_CKCTL,
-        .enable_reg     = ARM_IDLECT2,
-        .enable_bit     = EN_LCDCK,
-        .rate_offset    = CKCTL_LCDDIV_OFFSET,
-        .recalc         = &ckctl_recalc,
-};
-static struct clk uart1_1510 = {
-        .name           = "uart1_ck",
-        /* Direct from ULPD, no parent */
-        .rate           = 12000000,
-        .flags          = CLOCK_IN_OMAP1510 | ENABLE_REG_32BIT | ALWAYS_ENABLED,
-        .enable_reg     = MOD_CONF_CTRL_0,
-        .enable_bit     = 29,   /* Chooses between 12MHz and 48MHz */
-        .set_rate       = &set_uart_rate,
-        .recalc         = &uart_recalc,
-};
-static struct clk uart1_16xx = {
-        .name           = "uart1_ck",
-        /* Direct from ULPD, no parent */
-        .rate           = 48000000,
-        .flags          = CLOCK_IN_OMAP16XX | RATE_FIXED | ENABLE_REG_32BIT,
-        .enable_reg     = MOD_CONF_CTRL_0,
-        .enable_bit     = 29,
-};
-static struct clk uart2_ck = {
-        .name           = "uart2_ck",
-        /* Direct from ULPD, no parent */
-        .rate           = 12000000,
-        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | ENABLE_REG_32BIT |
-                          ALWAYS_ENABLED,
-        .enable_reg     = MOD_CONF_CTRL_0,
-        .enable_bit     = 30,   /* Chooses between 12MHz and 48MHz */
-        .set_rate       = &set_uart_rate,
-        .recalc         = &uart_recalc,
-};
-static struct clk uart3_1510 = {
-        .name           = "uart3_ck",
-        /* Direct from ULPD, no parent */
-        .rate           = 12000000,
-        .flags          = CLOCK_IN_OMAP1510 | ENABLE_REG_32BIT | ALWAYS_ENABLED,
-        .enable_reg     = MOD_CONF_CTRL_0,
-        .enable_bit     = 31,   /* Chooses between 12MHz and 48MHz */
-        .set_rate       = &set_uart_rate,
-        .recalc         = &uart_recalc,
-};
-static struct clk uart3_16xx = {
-        .name           = "uart3_ck",
-        /* Direct from ULPD, no parent */
-        .rate           = 48000000,
-        .flags          = CLOCK_IN_OMAP16XX | RATE_FIXED | ENABLE_REG_32BIT,
-        .enable_reg     = MOD_CONF_CTRL_0,
-        .enable_bit     = 31,
-};
-static struct clk usb_clko = {  /* 6 MHz output on W4_USB_CLKO */
-        .name           = "usb_clko",
-        /* Direct from ULPD, no parent */
-        .rate           = 6000000,
-        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
-                          RATE_FIXED | ENABLE_REG_32BIT,
-        .enable_reg     = ULPD_CLOCK_CTRL,
-        .enable_bit     = USB_MCLK_EN_BIT,
-};
-static struct clk usb_hhc_ck1510 = {
-        .name           = "usb_hhc_ck",
-        /* Direct from ULPD, no parent */
-        .rate           = 48000000, /* Actually 2 clocks, 12MHz and 48MHz */
-        .flags          = CLOCK_IN_OMAP1510 |
-                          RATE_FIXED | ENABLE_REG_32BIT,
-        .enable_reg     = MOD_CONF_CTRL_0,
-        .enable_bit     = USB_HOST_HHC_UHOST_EN,
-};
-static struct clk usb_hhc_ck16xx = {
-        .name           = "usb_hhc_ck",
-        /* Direct from ULPD, no parent */
-        .rate           = 48000000,
-        /* OTG_SYSCON_2.OTG_PADEN == 0 (not 1510-compatible) */
-        .flags          = CLOCK_IN_OMAP16XX |
-                          RATE_FIXED | ENABLE_REG_32BIT,
-        .enable_reg     = OTG_BASE + 0x08 /* OTG_SYSCON_2 */,
-        .enable_bit     = 8 /* UHOST_EN */,
-};
-static struct clk usb_dc_ck = {
-        .name           = "usb_dc_ck",
-        /* Direct from ULPD, no parent */
-        .rate           = 48000000,
-        .flags          = CLOCK_IN_OMAP16XX | RATE_FIXED,
-        .enable_reg     = SOFT_REQ_REG,
-        .enable_bit     = 4,
-};
-static struct clk mclk_1510 = {
-        .name           = "mclk",
-        /* Direct from ULPD, no parent. May be enabled by ext hardware. */
-        .rate           = 12000000,
-        .flags          = CLOCK_IN_OMAP1510 | RATE_FIXED,
-};
-static struct clk mclk_16xx = {
-        .name           = "mclk",
-        /* Direct from ULPD, no parent. May be enabled by ext hardware. */
-        .flags          = CLOCK_IN_OMAP16XX,
-        .enable_reg     = COM_CLK_DIV_CTRL_SEL,
-        .enable_bit     = COM_ULPD_PLL_CLK_REQ,
-        .set_rate       = &set_ext_clk_rate,
-        .round_rate     = &round_ext_clk_rate,
-        .init           = &init_ext_clk,
-};
-static struct clk bclk_1510 = {
-        .name           = "bclk",
-        /* Direct from ULPD, no parent. May be enabled by ext hardware. */
-        .rate           = 12000000,
-        .flags          = CLOCK_IN_OMAP1510 | RATE_FIXED,
-};
-static struct clk bclk_16xx = {
-        .name           = "bclk",
-        /* Direct from ULPD, no parent. May be enabled by ext hardware. */
-        .flags          = CLOCK_IN_OMAP16XX,
-        .enable_reg     = SWD_CLK_DIV_CTRL_SEL,
-        .enable_bit     = SWD_ULPD_PLL_CLK_REQ,
-        .set_rate       = &set_ext_clk_rate,
-        .round_rate     = &round_ext_clk_rate,
-        .init           = &init_ext_clk,
-};
-static struct clk mmc1_ck = {
-        .name           = "mmc1_ck",
-        /* Functional clock is direct from ULPD, interface clock is ARMPER */
-        .parent         = &armper_ck,
-        .rate           = 48000000,
-        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
-                          RATE_FIXED | ENABLE_REG_32BIT,
-        .enable_reg     = MOD_CONF_CTRL_0,
-        .enable_bit     = 23,
-};
-static struct clk mmc2_ck = {
-        .name           = "mmc2_ck",
-        /* Functional clock is direct from ULPD, interface clock is ARMPER */
-        .parent         = &armper_ck,
-        .rate           = 48000000,
-        .flags          = CLOCK_IN_OMAP16XX |
-                          RATE_FIXED | ENABLE_REG_32BIT,
-        .enable_reg     = MOD_CONF_CTRL_0,
-        .enable_bit     = 20,
-};
-static struct clk virtual_ck_mpu = {
-        .name           = "mpu",
-        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
-                          VIRTUAL_CLOCK | ALWAYS_ENABLED,
-        .parent         = &arm_ck, /* Is smarter alias for */
-        .recalc         = &followparent_recalc,
-        .set_rate       = &select_table_rate,
-        .round_rate     = &round_to_table_rate,
-};
-static struct clk *  onchip_clks[] = {
-        /* non-ULPD clocks */
-        &ck_ref,
-        &ck_dpll1,
-        /* CK_GEN1 clocks */
-        &ck_dpll1out,
-        &arm_ck,
-        &armper_ck,
-        &arm_gpio_ck,
-        &armxor_ck,
-        &armtim_ck,
-        &armwdt_ck,
-        &arminth_ck1510,  &arminth_ck16xx,
-        /* CK_GEN2 clocks */
-        &dsp_ck,
-        &dspmmu_ck,
-        &dspper_ck,
-        &dspxor_ck,
-        &dsptim_ck,
-        /* CK_GEN3 clocks */
-        &tc_ck,
-        &tipb_ck,
-        &l3_ocpi_ck,
-        &tc1_ck,
-        &tc2_ck,
-        &dma_ck,
-        &dma_lcdfree_ck,
-        &api_ck,
-        &lb_ck,
-        &rhea1_ck,
-        &rhea2_ck,
-        &lcd_ck,
-        /* ULPD clocks */
-        &uart1_1510,
-        &uart1_16xx,
-        &uart2_ck,
-        &uart3_1510,
-        &uart3_16xx,
-        &usb_clko,
-        &usb_hhc_ck1510, &usb_hhc_ck16xx,
-        &usb_dc_ck,
-        &mclk_1510,  &mclk_16xx,
-        &bclk_1510,  &bclk_16xx,
-        &mmc1_ck,
-        &mmc2_ck,
-        /* Virtual clocks */
-        &virtual_ck_mpu,
-};
-struct clk *clk_get(struct device *dev, const char *id)
 {
        struct clk *p, *clk = ERR_PTR(-ENOENT);
@@ -590,534 +53,200 @@ struct clk *clk_get(struct device *dev, const char *id)
 }
 EXPORT_SYMBOL(clk_get);
-void clk_put(struct clk *clk)
-{
-        if (clk && !IS_ERR(clk))
-                module_put(clk->owner);
-}
-EXPORT_SYMBOL(clk_put);
-int __clk_enable(struct clk *clk)
-{
-        __u16 regval16;
-        __u32 regval32;
-        if (clk->flags & ALWAYS_ENABLED)
-                return 0;
-        if (unlikely(clk->enable_reg == 0)) {
-                printk(KERN_ERR "clock.c: Enable for %s without enable code\n",
-                       clk->name);
-                return 0;
-        }
-        if (clk->flags & DSP_DOMAIN_CLOCK) {
-                __clk_use(&api_ck);
-        }
-        if (clk->flags & ENABLE_REG_32BIT) {
-                if (clk->flags & VIRTUAL_IO_ADDRESS) {
-                        regval32 = __raw_readl(clk->enable_reg);
-                        regval32 |= (1 << clk->enable_bit);
-                        __raw_writel(regval32, clk->enable_reg);
-                } else {
-                        regval32 = omap_readl(clk->enable_reg);
-                        regval32 |= (1 << clk->enable_bit);
-                        omap_writel(regval32, clk->enable_reg);
-                }
-        } else {
-                if (clk->flags & VIRTUAL_IO_ADDRESS) {
-                        regval16 = __raw_readw(clk->enable_reg);
-                        regval16 |= (1 << clk->enable_bit);
-                        __raw_writew(regval16, clk->enable_reg);
-                } else {
-                        regval16 = omap_readw(clk->enable_reg);
-                        regval16 |= (1 << clk->enable_bit);
-                        omap_writew(regval16, clk->enable_reg);
-                }
-        }
-        if (clk->flags & DSP_DOMAIN_CLOCK) {
-                __clk_unuse(&api_ck);
-        }
-        return 0;
-}
-void __clk_disable(struct clk *clk)
-{
-        __u16 regval16;
-        __u32 regval32;
-        if (clk->enable_reg == 0)
-                return;
-        if (clk->flags & DSP_DOMAIN_CLOCK) {
-                __clk_use(&api_ck);
-        }
-        if (clk->flags & ENABLE_REG_32BIT) {
-                if (clk->flags & VIRTUAL_IO_ADDRESS) {
-                        regval32 = __raw_readl(clk->enable_reg);
-                        regval32 &= ~(1 << clk->enable_bit);
-                        __raw_writel(regval32, clk->enable_reg);
-                } else {
-                        regval32 = omap_readl(clk->enable_reg);
-                        regval32 &= ~(1 << clk->enable_bit);
-                        omap_writel(regval32, clk->enable_reg);
-                }
-        } else {
-                if (clk->flags & VIRTUAL_IO_ADDRESS) {
-                        regval16 = __raw_readw(clk->enable_reg);
-                        regval16 &= ~(1 << clk->enable_bit);
-                        __raw_writew(regval16, clk->enable_reg);
-                } else {
-                        regval16 = omap_readw(clk->enable_reg);
-                        regval16 &= ~(1 << clk->enable_bit);
-                        omap_writew(regval16, clk->enable_reg);
-                }
-        }
-        if (clk->flags & DSP_DOMAIN_CLOCK) {
-                __clk_unuse(&api_ck);
-        }
-}
-void __clk_unuse(struct clk *clk)
-{
-        if (clk->usecount > 0 && !(--clk->usecount)) {
-                __clk_disable(clk);
-                if (likely(clk->parent))
-                        __clk_unuse(clk->parent);
-        }
-}
-int __clk_use(struct clk *clk)
-{
-        int ret = 0;
-        if (clk->usecount++ == 0) {
-                if (likely(clk->parent))
-                        ret = __clk_use(clk->parent);
-                if (unlikely(ret != 0)) {
-                        clk->usecount--;
-                        return ret;
-                }
-                ret = __clk_enable(clk);
-                if (unlikely(ret != 0) && clk->parent) {
-                        __clk_unuse(clk->parent);
-                        clk->usecount--;
-                }
-        }
-        return ret;
-}
 int clk_enable(struct clk *clk)
 {
        unsigned long flags;
-        int ret;
+        int ret = 0;
        spin_lock_irqsave(&clockfw_lock, flags);
-        ret = __clk_enable(clk);
+        if (clk->enable)
+                ret = clk->enable(clk);
+        else if (arch_clock->clk_enable)
+                ret = arch_clock->clk_enable(clk);
+        else
+                printk(KERN_ERR "Could not enable clock %s\n", clk->name);
        spin_unlock_irqrestore(&clockfw_lock, flags);
        return ret;
 }
 EXPORT_SYMBOL(clk_enable);
 void clk_disable(struct clk *clk)
 {
        unsigned long flags;
        spin_lock_irqsave(&clockfw_lock, flags);
-        __clk_disable(clk);
+        if (clk->disable)
+                clk->disable(clk);
+        else if (arch_clock->clk_disable)
+                arch_clock->clk_disable(clk);
+        else
+                printk(KERN_ERR "Could not disable clock %s\n", clk->name);
        spin_unlock_irqrestore(&clockfw_lock, flags);
 }
 EXPORT_SYMBOL(clk_disable);
 int clk_use(struct clk *clk)
 {
        unsigned long flags;
        int ret = 0;
        spin_lock_irqsave(&clockfw_lock, flags);
-        ret = __clk_use(clk);
+        if (arch_clock->clk_use)
+                ret = arch_clock->clk_use(clk);
        spin_unlock_irqrestore(&clockfw_lock, flags);
        return ret;
 }
 EXPORT_SYMBOL(clk_use);
 void clk_unuse(struct clk *clk)
 {
        unsigned long flags;
        spin_lock_irqsave(&clockfw_lock, flags);
-        __clk_unuse(clk);
+        if (arch_clock->clk_unuse)
+                arch_clock->clk_unuse(clk);
        spin_unlock_irqrestore(&clockfw_lock, flags);
 }
 EXPORT_SYMBOL(clk_unuse);
 int clk_get_usecount(struct clk *clk)
 {
-        return clk->usecount;
+        unsigned long flags;
-}
+        int ret = 0;
-EXPORT_SYMBOL(clk_get_usecount);
-unsigned long clk_get_rate(struct clk *clk)
-{
-        return clk->rate;
-}
-EXPORT_SYMBOL(clk_get_rate);
-static __u16 verify_ckctl_value(__u16 newval)
-{
-        /* This function checks for following limitations set
-         * by the hardware (all conditions must be true):
-         * DSPMMU_CK == DSP_CK  or  DSPMMU_CK == DSP_CK/2
-         * ARM_CK >= TC_CK
-         * DSP_CK >= TC_CK
-         * DSPMMU_CK >= TC_CK
-         *
-         * In addition following rules are enforced:
-         * LCD_CK <= TC_CK
-         * ARMPER_CK <= TC_CK
-         *
-         * However, maximum frequencies are not checked for!
-         */
-        __u8 per_exp;
-        __u8 lcd_exp;
-        __u8 arm_exp;
-        __u8 dsp_exp;
-        __u8 tc_exp;
-        __u8 dspmmu_exp;
-        per_exp = (newval >> CKCTL_PERDIV_OFFSET) & 3;
-        lcd_exp = (newval >> CKCTL_LCDDIV_OFFSET) & 3;
-        arm_exp = (newval >> CKCTL_ARMDIV_OFFSET) & 3;
-        dsp_exp = (newval >> CKCTL_DSPDIV_OFFSET) & 3;
-        tc_exp = (newval >> CKCTL_TCDIV_OFFSET) & 3;
-        dspmmu_exp = (newval >> CKCTL_DSPMMUDIV_OFFSET) & 3;
-        if (dspmmu_exp < dsp_exp)
-                dspmmu_exp = dsp_exp;
-        if (dspmmu_exp > dsp_exp+1)
-                dspmmu_exp = dsp_exp+1;
-        if (tc_exp < arm_exp)
-                tc_exp = arm_exp;
-        if (tc_exp < dspmmu_exp)
-                tc_exp = dspmmu_exp;
-        if (tc_exp > lcd_exp)
-                lcd_exp = tc_exp;
-        if (tc_exp > per_exp)
-                per_exp = tc_exp;
-        newval &= 0xf000;
+        spin_lock_irqsave(&clockfw_lock, flags);
-        newval |= per_exp << CKCTL_PERDIV_OFFSET;
+        ret = clk->usecount;
-        newval |= lcd_exp << CKCTL_LCDDIV_OFFSET;
+        spin_unlock_irqrestore(&clockfw_lock, flags);
-        newval |= arm_exp << CKCTL_ARMDIV_OFFSET;
-        newval |= dsp_exp << CKCTL_DSPDIV_OFFSET;
-        newval |= tc_exp << CKCTL_TCDIV_OFFSET;
-        newval |= dspmmu_exp << CKCTL_DSPMMUDIV_OFFSET;
-        return newval;
+        return ret;
 }
+EXPORT_SYMBOL(clk_get_usecount);
+unsigned long clk_get_rate(struct clk *clk)
-static int calc_dsor_exp(struct clk *clk, unsigned long rate)
 {
-        /* Note: If target frequency is too low, this function will return 4,
+        unsigned long flags;
-         * which is invalid value. Caller must check for this value and act
+        unsigned long ret = 0;
-         * accordingly.
-         *
-         * Note: This function does not check for following limitations set
-         * by the hardware (all conditions must be true):
-         * DSPMMU_CK == DSP_CK  or  DSPMMU_CK == DSP_CK/2
-         * ARM_CK >= TC_CK
-         * DSP_CK >= TC_CK
-         * DSPMMU_CK >= TC_CK
-         */
-        unsigned long realrate;
-        struct clk *  parent;
-        unsigned  dsor_exp;
-        if (unlikely(!(clk->flags & RATE_CKCTL)))
-                return -EINVAL;
-        parent = clk->parent;
-        if (unlikely(parent == 0))
-                return -EIO;
-        realrate = parent->rate;
-        for (dsor_exp=0; dsor_exp<4; dsor_exp++) {
-                if (realrate <= rate)
-                        break;
-                realrate /= 2;
+        spin_lock_irqsave(&clockfw_lock, flags);
-        }
+        ret = clk->rate;
+        spin_unlock_irqrestore(&clockfw_lock, flags);
-        return dsor_exp;
+        return ret;
 }
+EXPORT_SYMBOL(clk_get_rate);
+void clk_put(struct clk *clk)
-static void ckctl_recalc(struct clk *  clk)
 {
-        int dsor;
+        if (clk && !IS_ERR(clk))
+                module_put(clk->owner);
-        /* Calculate divisor encoded as 2-bit exponent */
-        if (clk->flags & DSP_DOMAIN_CLOCK) {
-                /* The clock control bits are in DSP domain,
-                 * so api_ck is needed for access.
-                 * Note that DSP_CKCTL virt addr = phys addr, so
-                 * we must use __raw_readw() instead of omap_readw().
-                 */
-                __clk_use(&api_ck);
-                dsor = 1 << (3 & (__raw_readw(DSP_CKCTL) >> clk->rate_offset));
-                __clk_unuse(&api_ck);
-        } else {
-                dsor = 1 << (3 & (omap_readw(ARM_CKCTL) >> clk->rate_offset));
-        }
-        if (unlikely(clk->rate == clk->parent->rate / dsor))
-                return; /* No change, quick exit */
-        clk->rate = clk->parent->rate / dsor;
-        if (unlikely(clk->flags & RATE_PROPAGATES))
-                propagate_rate(clk);
 }
+EXPORT_SYMBOL(clk_put);
+/*-------------------------------------------------------------------------
+ * Optional clock functions defined in asm/hardware/clock.h
+ *-------------------------------------------------------------------------*/
 long clk_round_rate(struct clk *clk, unsigned long rate)
 {
-        int dsor_exp;
+        unsigned long flags;
+        long ret = 0;
-        if (clk->flags & RATE_FIXED)
-                return clk->rate;
-        if (clk->flags & RATE_CKCTL) {
-                dsor_exp = calc_dsor_exp(clk, rate);
-                if (dsor_exp < 0)
-                        return dsor_exp;
-                if (dsor_exp > 3)
-                        dsor_exp = 3;
-                return clk->parent->rate / (1 << dsor_exp);
-        }
-        if(clk->round_rate != 0)
+        spin_lock_irqsave(&clockfw_lock, flags);
-                return clk->round_rate(clk, rate);
+        if (arch_clock->clk_round_rate)
+                ret = arch_clock->clk_round_rate(clk, rate);
+        spin_unlock_irqrestore(&clockfw_lock, flags);
-        return clk->rate;
+        return ret;
 }
 EXPORT_SYMBOL(clk_round_rate);
+int clk_set_rate(struct clk *clk, unsigned long rate)
-static void propagate_rate(struct clk *  clk)
-{
-        struct clk **  clkp;
-        for (clkp = onchip_clks; clkp < onchip_clks+ARRAY_SIZE(onchip_clks); clkp++) {
-                if (likely((*clkp)->parent != clk)) continue;
-                if (likely((*clkp)->recalc))
-                        (*clkp)->recalc(*clkp);
-        }
-}
-static int select_table_rate(struct clk *  clk, unsigned long rate)
 {
-        /* Find the highest supported frequency <= rate and switch to it */
+        unsigned long flags;
-        struct mpu_rate *  ptr;
+        int ret = 0;
-        if (clk != &virtual_ck_mpu)
-                return -EINVAL;
-        for (ptr = rate_table; ptr->rate; ptr++) {
-                if (ptr->xtal != ck_ref.rate)
-                        continue;
-                /* DPLL1 cannot be reprogrammed without risking system crash */
-                if (likely(ck_dpll1.rate!=0) && ptr->pll_rate != ck_dpll1.rate)
-                        continue;
-                /* Can check only after xtal frequency check */
-                if (ptr->rate <= rate)
-                        break;
-        }
-        if (!ptr->rate)
-                return -EINVAL;
-        /*
+        spin_lock_irqsave(&clockfw_lock, flags);
-         * In most cases we should not need to reprogram DPLL.
+        if (arch_clock->clk_set_rate)
-         * Reprogramming the DPLL is tricky, it must be done from SRAM.
+                ret = arch_clock->clk_set_rate(clk, rate);
-         */
+        spin_unlock_irqrestore(&clockfw_lock, flags);
-        omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val);
-        ck_dpll1.rate = ptr->pll_rate;
+        return ret;
-        propagate_rate(&ck_dpll1);
-        return 0;
 }
+EXPORT_SYMBOL(clk_set_rate);
+int clk_set_parent(struct clk *clk, struct clk *parent)
-static long round_to_table_rate(struct clk *  clk, unsigned long rate)
 {
-        /* Find the highest supported frequency <= rate */
+        unsigned long flags;
-        struct mpu_rate *  ptr;
+        int ret = 0;
-        long  highest_rate;
-        if (clk != &virtual_ck_mpu)
-                return -EINVAL;
-        highest_rate = -EINVAL;
-        for (ptr = rate_table; ptr->rate; ptr++) {
-                if (ptr->xtal != ck_ref.rate)
-                        continue;
-                highest_rate = ptr->rate;
-                /* Can check only after xtal frequency check */
+        spin_lock_irqsave(&clockfw_lock, flags);
-                if (ptr->rate <= rate)
+        if (arch_clock->clk_set_parent)
-                        break;
+                ret =  arch_clock->clk_set_parent(clk, parent);
-        }
+        spin_unlock_irqrestore(&clockfw_lock, flags);
-        return highest_rate;
+        return ret;
 }
+EXPORT_SYMBOL(clk_set_parent);
+struct clk *clk_get_parent(struct clk *clk)
-int clk_set_rate(struct clk *clk, unsigned long rate)
 {
-        int  ret = -EINVAL;
+        unsigned long flags;
-        int  dsor_exp;
+        struct clk * ret = NULL;
-        __u16  regval;
-        unsigned long  flags;
-        if (clk->flags & RATE_CKCTL) {
-                dsor_exp = calc_dsor_exp(clk, rate);
-                if (dsor_exp > 3)
-                        dsor_exp = -EINVAL;
-                if (dsor_exp < 0)
-                        return dsor_exp;
-                spin_lock_irqsave(&clockfw_lock, flags);
-                regval = omap_readw(ARM_CKCTL);
-                regval &= ~(3 << clk->rate_offset);
-                regval |= dsor_exp << clk->rate_offset;
-                regval = verify_ckctl_value(regval);
-                omap_writew(regval, ARM_CKCTL);
-                clk->rate = clk->parent->rate / (1 << dsor_exp);
-                spin_unlock_irqrestore(&clockfw_lock, flags);
-                ret = 0;
-        } else if(clk->set_rate != 0) {
-                spin_lock_irqsave(&clockfw_lock, flags);
-                ret = clk->set_rate(clk, rate);
-                spin_unlock_irqrestore(&clockfw_lock, flags);
-        }
-        if (unlikely(ret == 0 && (clk->flags & RATE_PROPAGATES)))
+        spin_lock_irqsave(&clockfw_lock, flags);
-                propagate_rate(clk);
+        if (arch_clock->clk_get_parent)
+                ret = arch_clock->clk_get_parent(clk);
+        spin_unlock_irqrestore(&clockfw_lock, flags);
        return ret;
 }
-EXPORT_SYMBOL(clk_set_rate);
+EXPORT_SYMBOL(clk_get_parent);
+/*-------------------------------------------------------------------------
+ * OMAP specific clock functions shared between omap1 and omap2
+ *-------------------------------------------------------------------------*/
-static unsigned calc_ext_dsor(unsigned long rate)
+unsigned int __initdata mpurate;
-{
-        unsigned dsor;
-        /* MCLK and BCLK divisor selection is not linear:
+/*
-         * freq = 96MHz / dsor
+ * By default we use the rate set by the bootloader.
-         *
+ * You can override this with mpurate= cmdline option.
-         * RATIO_SEL range: dsor <-> RATIO_SEL
+ */
-         * 0..6: (RATIO_SEL+2) <-> (dsor-2)
+static int __init omap_clk_setup(char *str)
-         * 6..48:  (8+(RATIO_SEL-6)*2) <-> ((dsor-8)/2+6)
-         * Minimum dsor is 2 and maximum is 96. Odd divisors starting from 9
-         * can not be used.
-         */
-        for (dsor = 2; dsor < 96; ++dsor) {
-                if ((dsor & 1) && dsor > 8)
-                        continue;
-                if (rate >= 96000000 / dsor)
-                        break;
-        }
-        return dsor;
-}
-/* Only needed on 1510 */
-static int set_uart_rate(struct clk * clk, unsigned long rate)
-{
-        unsigned int val;
-        val = omap_readl(clk->enable_reg);
-        if (rate == 12000000)
-                val &= ~(1 << clk->enable_bit);
-        else if (rate == 48000000)
-                val |= (1 << clk->enable_bit);
-        else
-                return -EINVAL;
-        omap_writel(val, clk->enable_reg);
-        clk->rate = rate;
-        return 0;
-}
-static int set_ext_clk_rate(struct clk *  clk, unsigned long rate)
 {
-        unsigned dsor;
+        get_option(&str, &mpurate);
-        __u16 ratio_bits;
-        dsor = calc_ext_dsor(rate);
+        if (!mpurate)
-        clk->rate = 96000000 / dsor;
+                return 1;
-        if (dsor > 8)
-                ratio_bits = ((dsor - 8) / 2 + 6) << 2;
-        else
-                ratio_bits = (dsor - 2) << 2;
-        ratio_bits |= omap_readw(clk->enable_reg) & ~0xfd;
+        if (mpurate < 1000)
-        omap_writew(ratio_bits, clk->enable_reg);
+                mpurate *= 1000000;
-        return 0;
+        return 1;
 }
+__setup("mpurate=", omap_clk_setup);
+/* Used for clocks that always have same value as the parent clock */
-static long round_ext_clk_rate(struct clk *  clk, unsigned long rate)
+void followparent_recalc(struct clk *clk)
 {
-        return 96000000 / calc_ext_dsor(rate);
+        clk->rate = clk->parent->rate;
 }
+/* Propagate rate to children */
-static void init_ext_clk(struct clk *  clk)
+void propagate_rate(struct clk * tclk)
 {
-        unsigned dsor;
+        struct clk *clkp;
-        __u16 ratio_bits;
-        /* Determine current rate and ensure clock is based on 96MHz APLL */
+        list_for_each_entry(clkp, &clocks, node) {
-        ratio_bits = omap_readw(clk->enable_reg) & ~1;
+                if (likely(clkp->parent != tclk))
-        omap_writew(ratio_bits, clk->enable_reg);
+                        continue;
+                if (likely((u32)clkp->recalc))
-        ratio_bits = (ratio_bits & 0xfc) >> 2;
+                        clkp->recalc(clkp);
-        if (ratio_bits > 6)
+        }
-                dsor = (ratio_bits - 6) * 2 + 8;
-        else
-                dsor = ratio_bits + 2;
-        clk-> rate = 96000000 / dsor;
 }
 int clk_register(struct clk *clk)
 {
        down(&clocks_sem);
@@ -1125,6 +254,7 @@ int clk_register(struct clk *clk)
        if (clk->init)
                clk->init(clk);
        up(&clocks_sem);
        return 0;
 }
 EXPORT_SYMBOL(clk_register);
@@ -1137,203 +267,38 @@ void clk_unregister(struct clk *clk)
 }
 EXPORT_SYMBOL(clk_unregister);
-#ifdef CONFIG_OMAP_RESET_CLOCKS
+void clk_deny_idle(struct clk *clk)
-/*
- * Resets some clocks that may be left on from bootloader,
- * but leaves serial clocks on. See also omap_late_clk_reset().
- */
-static inline void omap_early_clk_reset(void)
 {
-        //omap_writel(0x3 << 29, MOD_CONF_CTRL_0);
+        unsigned long flags;
+        spin_lock_irqsave(&clockfw_lock, flags);
+        if (arch_clock->clk_deny_idle)
+                arch_clock->clk_deny_idle(clk);
+        spin_unlock_irqrestore(&clockfw_lock, flags);
 }
-#else
+EXPORT_SYMBOL(clk_deny_idle);
-#define omap_early_clk_reset()  {}
-#endif
-int __init clk_init(void)
+void clk_allow_idle(struct clk *clk)
 {
-        struct clk **  clkp;
+        unsigned long flags;
-        const struct omap_clock_config *info;
-        int crystal_type = 0; /* Default 12 MHz */
-        omap_early_clk_reset();
-        for (clkp = onchip_clks; clkp < onchip_clks+ARRAY_SIZE(onchip_clks); clkp++) {
-                if (((*clkp)->flags &CLOCK_IN_OMAP1510) && cpu_is_omap1510()) {
-                        clk_register(*clkp);
-                        continue;
-                }
-                if (((*clkp)->flags &CLOCK_IN_OMAP16XX) && cpu_is_omap16xx()) {
-                        clk_register(*clkp);
-                        continue;
-                }
-                if (((*clkp)->flags &CLOCK_IN_OMAP730) && cpu_is_omap730()) {
-                        clk_register(*clkp);
-                        continue;
-                }
-        }
-        info = omap_get_config(OMAP_TAG_CLOCK, struct omap_clock_config);
-        if (info != NULL) {
-                if (!cpu_is_omap1510())
-                        crystal_type = info->system_clock_type;
-        }
-#if defined(CONFIG_ARCH_OMAP730)
-        ck_ref.rate = 13000000;
-#elif defined(CONFIG_ARCH_OMAP16XX)
-        if (crystal_type == 2)
-                ck_ref.rate = 19200000;
-#endif
-        printk("Clocks: ARM_SYSST: 0x%04x DPLL_CTL: 0x%04x ARM_CKCTL: 0x%04x\n",
-               omap_readw(ARM_SYSST), omap_readw(DPLL_CTL),
-               omap_readw(ARM_CKCTL));
-        /* We want to be in syncronous scalable mode */
-        omap_writew(0x1000, ARM_SYSST);
-#ifdef CONFIG_OMAP_CLOCKS_SET_BY_BOOTLOADER
-        /* Use values set by bootloader. Determine PLL rate and recalculate
-         * dependent clocks as if kernel had changed PLL or divisors.
-         */
-        {
-                unsigned pll_ctl_val = omap_readw(DPLL_CTL);
-                ck_dpll1.rate = ck_ref.rate; /* Base xtal rate */
-                if (pll_ctl_val & 0x10) {
-                        /* PLL enabled, apply multiplier and divisor */
-                        if (pll_ctl_val & 0xf80)
-                                ck_dpll1.rate *= (pll_ctl_val & 0xf80) >> 7;
-                        ck_dpll1.rate /= ((pll_ctl_val & 0x60) >> 5) + 1;
-                } else {
-                        /* PLL disabled, apply bypass divisor */
-                        switch (pll_ctl_val & 0xc) {
-                        case 0:
-                                break;
-                        case 0x4:
-                                ck_dpll1.rate /= 2;
-                                break;
-                        default:
-                                ck_dpll1.rate /= 4;
-                                break;
-                        }
-                }
-        }
-        propagate_rate(&ck_dpll1);
-#else
-        /* Find the highest supported frequency and enable it */
-        if (select_table_rate(&virtual_ck_mpu, ~0)) {
-                printk(KERN_ERR "System frequencies not set. Check your config.\n");
-                /* Guess sane values (60MHz) */
-                omap_writew(0x2290, DPLL_CTL);
-                omap_writew(0x1005, ARM_CKCTL);
-                ck_dpll1.rate = 60000000;
-                propagate_rate(&ck_dpll1);
-        }
-#endif
-        /* Cache rates for clocks connected to ck_ref (not dpll1) */
-        propagate_rate(&ck_ref);
-        printk(KERN_INFO "Clocking rate (xtal/DPLL1/MPU): "
-                "%ld.%01ld/%ld.%01ld/%ld.%01ld MHz\n",
-               ck_ref.rate / 1000000, (ck_ref.rate / 100000) % 10,
-               ck_dpll1.rate / 1000000, (ck_dpll1.rate / 100000) % 10,
-               arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10);
-#ifdef CONFIG_MACH_OMAP_PERSEUS2
-        /* Select slicer output as OMAP input clock */
-        omap_writew(omap_readw(OMAP730_PCC_UPLD_CTRL) & ~0x1, OMAP730_PCC_UPLD_CTRL);
-#endif
-        /* Turn off DSP and ARM_TIMXO. Make sure ARM_INTHCK is not divided */
-        omap_writew(omap_readw(ARM_CKCTL) & 0x0fff, ARM_CKCTL);
-        /* Put DSP/MPUI into reset until needed */
-        omap_writew(0, ARM_RSTCT1);
-        omap_writew(1, ARM_RSTCT2);
-        omap_writew(0x400, ARM_IDLECT1);
-        /*
-         * According to OMAP5910 Erratum SYS_DMA_1, bit DMACK_REQ (bit 8)
-         * of the ARM_IDLECT2 register must be set to zero. The power-on
-         * default value of this bit is one.
-         */
-        omap_writew(0x0000, ARM_IDLECT2);       /* Turn LCD clock off also */
-        /*
-         * Only enable those clocks we will need, let the drivers
-         * enable other clocks as necessary
-         */
-        clk_use(&armper_ck);
-        clk_use(&armxor_ck);
-        clk_use(&armtim_ck);
-        if (cpu_is_omap1510())
-                clk_enable(&arm_gpio_ck);
-        return 0;
+        spin_lock_irqsave(&clockfw_lock, flags);
+        if (arch_clock->clk_allow_idle)
+                arch_clock->clk_allow_idle(clk);
+        spin_unlock_irqrestore(&clockfw_lock, flags);
 }
+EXPORT_SYMBOL(clk_allow_idle);
+/*-------------------------------------------------------------------------*/
-#ifdef CONFIG_OMAP_RESET_CLOCKS
+int __init clk_init(struct clk_functions * custom_clocks)
-static int __init omap_late_clk_reset(void)
 {
-        /* Turn off all unused clocks */
+        if (!custom_clocks) {
-        struct clk *p;
+                printk(KERN_ERR "No custom clock functions registered\n");
-        __u32 regval32;
+                BUG();
-        /* USB_REQ_EN will be disabled later if necessary (usb_dc_ck) */
-        regval32 = omap_readw(SOFT_REQ_REG) & (1 << 4);
-        omap_writew(regval32, SOFT_REQ_REG);
-        omap_writew(0, SOFT_REQ_REG2);
-        list_for_each_entry(p, &clocks, node) {
-                if (p->usecount > 0 || (p->flags & ALWAYS_ENABLED) ||
-                        p->enable_reg == 0)
-                        continue;
-                /* Assume no DSP clocks have been activated by bootloader */
-                if (p->flags & DSP_DOMAIN_CLOCK)
-                        continue;
-                /* Is the clock already disabled? */
-                if (p->flags & ENABLE_REG_32BIT) {
-                        if (p->flags & VIRTUAL_IO_ADDRESS)
-                                regval32 = __raw_readl(p->enable_reg);
-                        else
-                                regval32 = omap_readl(p->enable_reg);
-                } else {
-                        if (p->flags & VIRTUAL_IO_ADDRESS)
-                                regval32 = __raw_readw(p->enable_reg);
-                        else
-                                regval32 = omap_readw(p->enable_reg);
-                }
-                if ((regval32 & (1 << p->enable_bit)) == 0)
-                        continue;
-                /* FIXME: This clock seems to be necessary but no-one
-                 * has asked for its activation. */
-                if (p == &tc2_ck         // FIX: pm.c (SRAM), CCP, Camera
-                    || p == &ck_dpll1out // FIX: SoSSI, SSR
-                    || p == &arm_gpio_ck // FIX: GPIO code for 1510
-                    ) {
-                        printk(KERN_INFO "FIXME: Clock \"%s\" seems unused\n",
-                               p->name);
-                        continue;
-                }
-                printk(KERN_INFO "Disabling unused clock \"%s\"... ", p->name);
-                __clk_disable(p);
-                printk(" done\n");
        }
+        arch_clock = custom_clocks;
        return 0;
 }
-late_initcall(omap_late_clk_reset);
-#endif
diff --git a/arch/arm/plat-omap/clock.h b/arch/arm/plat-omap/clock.h
deleted file mode 100644
index a89e1e8c2519..000000000000
--- a/arch/arm/plat-omap/clock.h
+++ /dev/null
@@ -1,120 +0,0 @@
-/*
- *  linux/arch/arm/plat-omap/clock.h
- *
- *  Copyright (C) 2004 Nokia corporation
- *  Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
- *  Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __ARCH_ARM_OMAP_CLOCK_H
-#define __ARCH_ARM_OMAP_CLOCK_H
-struct module;
-struct clk {
-        struct list_head        node;
-        struct module           *owner;
-        const char              *name;
-        struct clk              *parent;
-        unsigned long           rate;
-        __s8                    usecount;
-        __u16                   flags;
-        __u32                   enable_reg;
-        __u8                    enable_bit;
-        __u8                    rate_offset;
-        void                    (*recalc)(struct clk *);
-        int                     (*set_rate)(struct clk *, unsigned long);
-        long                    (*round_rate)(struct clk *, unsigned long);
-        void                    (*init)(struct clk *);
-};
-struct mpu_rate {
-        unsigned long           rate;
-        unsigned long           xtal;
-        unsigned long           pll_rate;
-        __u16                   ckctl_val;
-        __u16                   dpllctl_val;
-};
-/* Clock flags */
-#define RATE_CKCTL              1
-#define RATE_FIXED              2
-#define RATE_PROPAGATES         4
-#define VIRTUAL_CLOCK           8
-#define ALWAYS_ENABLED          16
-#define ENABLE_REG_32BIT        32
-#define CLOCK_IN_OMAP16XX       64
-#define CLOCK_IN_OMAP1510       128
-#define CLOCK_IN_OMAP730        256
-#define DSP_DOMAIN_CLOCK        512
-#define VIRTUAL_IO_ADDRESS      1024
-/* ARM_CKCTL bit shifts */
-#define CKCTL_PERDIV_OFFSET     0
-#define CKCTL_LCDDIV_OFFSET     2
-#define CKCTL_ARMDIV_OFFSET     4
-#define CKCTL_DSPDIV_OFFSET     6
-#define CKCTL_TCDIV_OFFSET      8
-#define CKCTL_DSPMMUDIV_OFFSET  10
-/*#define ARM_TIMXO             12*/
-#define EN_DSPCK                13
-/*#define ARM_INTHCK_SEL        14*/ /* Divide-by-2 for mpu inth_ck */
-/* DSP_CKCTL bit shifts */
-#define CKCTL_DSPPERDIV_OFFSET  0
-/* ARM_IDLECT1 bit shifts */
-/*#define IDLWDT_ARM    0*/
-/*#define IDLXORP_ARM   1*/
-/*#define IDLPER_ARM    2*/
-/*#define IDLLCD_ARM    3*/
-/*#define IDLLB_ARM     4*/
-/*#define IDLHSAB_ARM   5*/
-/*#define IDLIF_ARM     6*/
-/*#define IDLDPLL_ARM   7*/
-/*#define IDLAPI_ARM    8*/
-/*#define IDLTIM_ARM    9*/
-/*#define SETARM_IDLE   11*/
-/* ARM_IDLECT2 bit shifts */
-#define EN_WDTCK        0
-#define EN_XORPCK       1
-#define EN_PERCK        2
-#define EN_LCDCK        3
-#define EN_LBCK         4 /* Not on 1610/1710 */
-/*#define EN_HSABCK     5*/
-#define EN_APICK        6
-#define EN_TIMCK        7
-#define DMACK_REQ       8
-#define EN_GPIOCK       9 /* Not on 1610/1710 */
-/*#define EN_LBFREECK   10*/
-#define EN_CKOUT_ARM    11
-/* ARM_IDLECT3 bit shifts */
-#define EN_OCPI_CK      0
-#define EN_TC1_CK       2
-#define EN_TC2_CK       4
-/* DSP_IDLECT2 bit shifts (0,1,2 are same as for ARM_IDLECT2) */
-#define EN_DSPTIMCK     5
-/* Various register defines for clock controls scattered around OMAP chip */
-#define USB_MCLK_EN_BIT         4       /* In ULPD_CLKC_CTRL */
-#define USB_HOST_HHC_UHOST_EN   9       /* In MOD_CONF_CTRL_0 */
-#define SWD_ULPD_PLL_CLK_REQ    1       /* In SWD_CLK_DIV_CTRL_SEL */
-#define COM_ULPD_PLL_CLK_REQ    1       /* In COM_CLK_DIV_CTRL_SEL */
-#define SWD_CLK_DIV_CTRL_SEL    0xfffe0874
-#define COM_CLK_DIV_CTRL_SEL    0xfffe0878
-#define SOFT_REQ_REG            0xfffe0834
-#define SOFT_REQ_REG2           0xfffe0880
-int clk_register(struct clk *clk);
-void clk_unregister(struct clk *clk);
-int clk_init(void);
-#endif
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index 02bcc6c1cd1b..ccdb452630cf 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -31,7 +31,7 @@
 #include <asm/arch/mux.h>
 #include <asm/arch/fpga.h>
-#include "clock.h"
+#include <asm/arch/clock.h>
 #define NO_LENGTH_CHECK 0xffffffff
@@ -117,19 +117,43 @@ EXPORT_SYMBOL(omap_get_var_config);
 static int __init omap_add_serial_console(void)
 {
-        const struct omap_serial_console_config *info;
+        const struct omap_serial_console_config *con_info;
+        const struct omap_uart_config *uart_info;
-        info = omap_get_config(OMAP_TAG_SERIAL_CONSOLE,
+        static char speed[11], *opt = NULL;
-                               struct omap_serial_console_config);
+        int line, i, uart_idx;
-        if (info != NULL && info->console_uart) {
-                static char speed[11], *opt = NULL;
+        uart_info = omap_get_config(OMAP_TAG_UART, struct omap_uart_config);
+        con_info = omap_get_config(OMAP_TAG_SERIAL_CONSOLE,
+                                        struct omap_serial_console_config);
+        if (uart_info == NULL || con_info == NULL)
+                return 0;
+        if (con_info->console_uart == 0)
+                return 0;
+        if (con_info->console_speed) {
+                snprintf(speed, sizeof(speed), "%u", con_info->console_speed);
+                opt = speed;
+        }
-                if (info->console_speed) {
+        uart_idx = con_info->console_uart - 1;
-                        snprintf(speed, sizeof(speed), "%u", info->console_speed);
+        if (uart_idx >= OMAP_MAX_NR_PORTS) {
-                        opt = speed;
+                printk(KERN_INFO "Console: external UART#%d. "
-                }
+                        "Not adding it as console this time.\n",
-                return add_preferred_console("ttyS", info->console_uart - 1, opt);
+                        uart_idx + 1);
+                return 0;
+        }
+        if (!(uart_info->enabled_uarts & (1 << uart_idx))) {
+                printk(KERN_ERR "Console: Selected UART#%d is "
+                        "not enabled for this platform\n",
+                        uart_idx + 1);
+                return -1;
+        }
+        line = 0;
+        for (i = 0; i < uart_idx; i++) {
+                if (uart_info->enabled_uarts & (1 << i))
+                        line++;
        }
-        return 0;
+        return add_preferred_console("ttyS", line, opt);
 }
 console_initcall(omap_add_serial_console);
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
new file mode 100644
index 000000000000..9dcce904b608
--- /dev/null
+++ b/arch/arm/plat-omap/devices.c
@@ -0,0 +1,381 @@
+/*
+ * linux/arch/arm/plat-omap/devices.c
+ *
+ * Common platform device setup/initialization for OMAP1 and OMAP2
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <asm/hardware.h>
+#include <asm/io.h>
+#include <asm/mach-types.h>
+#include <asm/mach/map.h>
+#include <asm/arch/tc.h>
+#include <asm/arch/board.h>
+#include <asm/arch/mux.h>
+#include <asm/arch/gpio.h>
+void omap_nop_release(struct device *dev)
+{
+        /* Nothing */
+}
+/*-------------------------------------------------------------------------*/
+#if     defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE)
+#define OMAP1_I2C_BASE          0xfffb3800
+#define OMAP2_I2C_BASE1         0x48070000
+#define OMAP_I2C_SIZE           0x3f
+#define OMAP1_I2C_INT           INT_I2C
+#define OMAP2_I2C_INT1          56
+static struct resource i2c_resources1[] = {
+        {
+                .start          = 0,
+                .end            = 0,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = 0,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+/* DMA not used; works around erratum writing to non-empty i2c fifo */
+static struct platform_device omap_i2c_device1 = {
+        .name           = "i2c_omap",
+        .id             = 1,
+        .dev = {
+                .release        = omap_nop_release,
+        },
+        .num_resources  = ARRAY_SIZE(i2c_resources1),
+        .resource       = i2c_resources1,
+};
+/* See also arch/arm/mach-omap2/devices.c for second I2C on 24xx */
+static void omap_init_i2c(void)
+{
+        if (cpu_is_omap24xx()) {
+                i2c_resources1[0].start = OMAP2_I2C_BASE1;
+                i2c_resources1[0].end = OMAP2_I2C_BASE1 + OMAP_I2C_SIZE;
+                i2c_resources1[1].start = OMAP2_I2C_INT1;
+        } else {
+                i2c_resources1[0].start = OMAP1_I2C_BASE;
+                i2c_resources1[0].end = OMAP1_I2C_BASE + OMAP_I2C_SIZE;
+                i2c_resources1[1].start = OMAP1_I2C_INT;
+        }
+        /* FIXME define and use a boot tag, in case of boards that
+         * either don't wire up I2C, or chips that mux it differently...
+         * it can include clocking and address info, maybe more.
+         */
+        if (cpu_is_omap24xx()) {
+                omap_cfg_reg(M19_24XX_I2C1_SCL);
+                omap_cfg_reg(L15_24XX_I2C1_SDA);
+        } else {
+                omap_cfg_reg(I2C_SCL);
+                omap_cfg_reg(I2C_SDA);
+        }
+        (void) platform_device_register(&omap_i2c_device1);
+}
+#else
+static inline void omap_init_i2c(void) {}
+#endif
+/*-------------------------------------------------------------------------*/
+#if     defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
+#ifdef CONFIG_ARCH_OMAP24XX
+#define OMAP_MMC1_BASE          0x4809c000
+#define OMAP_MMC1_INT           83
+#else
+#define OMAP_MMC1_BASE          0xfffb7800
+#define OMAP_MMC1_INT           INT_MMC
+#endif
+#define OMAP_MMC2_BASE          0xfffb7c00      /* omap16xx only */
+static struct omap_mmc_conf mmc1_conf;
+static u64 mmc1_dmamask = 0xffffffff;
+static struct resource mmc1_resources[] = {
+        {
+                .start          = IO_ADDRESS(OMAP_MMC1_BASE),
+                .end            = IO_ADDRESS(OMAP_MMC1_BASE) + 0x7f,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = OMAP_MMC1_INT,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+static struct platform_device mmc_omap_device1 = {
+        .name           = "mmci-omap",
+        .id             = 1,
+        .dev = {
+                .release        = omap_nop_release,
+                .dma_mask       = &mmc1_dmamask,
+                .platform_data  = &mmc1_conf,
+        },
+        .num_resources  = ARRAY_SIZE(mmc1_resources),
+        .resource       = mmc1_resources,
+};
+#ifdef  CONFIG_ARCH_OMAP16XX
+static struct omap_mmc_conf mmc2_conf;
+static u64 mmc2_dmamask = 0xffffffff;
+static struct resource mmc2_resources[] = {
+        {
+                .start          = IO_ADDRESS(OMAP_MMC2_BASE),
+                .end            = IO_ADDRESS(OMAP_MMC2_BASE) + 0x7f,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = INT_1610_MMC2,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+static struct platform_device mmc_omap_device2 = {
+        .name           = "mmci-omap",
+        .id             = 2,
+        .dev = {
+                .release        = omap_nop_release,
+                .dma_mask       = &mmc2_dmamask,
+                .platform_data  = &mmc2_conf,
+        },
+        .num_resources  = ARRAY_SIZE(mmc2_resources),
+        .resource       = mmc2_resources,
+};
+#endif
+static void __init omap_init_mmc(void)
+{
+        const struct omap_mmc_config    *mmc_conf;
+        const struct omap_mmc_conf      *mmc;
+        /* NOTE:  assumes MMC was never (wrongly) enabled */
+        mmc_conf = omap_get_config(OMAP_TAG_MMC, struct omap_mmc_config);
+        if (!mmc_conf)
+                return;
+        /* block 1 is always available and has just one pinout option */
+        mmc = &mmc_conf->mmc[0];
+        if (mmc->enabled) {
+                if (!cpu_is_omap24xx()) {
+                        omap_cfg_reg(MMC_CMD);
+                        omap_cfg_reg(MMC_CLK);
+                        omap_cfg_reg(MMC_DAT0);
+                        if (cpu_is_omap1710()) {
+                                omap_cfg_reg(M15_1710_MMC_CLKI);
+                                omap_cfg_reg(P19_1710_MMC_CMDDIR);
+                                omap_cfg_reg(P20_1710_MMC_DATDIR0);
+                        }
+                }
+                if (mmc->wire4) {
+                        if (!cpu_is_omap24xx()) {
+                                omap_cfg_reg(MMC_DAT1);
+                                /* NOTE:  DAT2 can be on W10 (here) or M15 */
+                                if (!mmc->nomux)
+                                        omap_cfg_reg(MMC_DAT2);
+                                omap_cfg_reg(MMC_DAT3);
+                        }
+                }
+                mmc1_conf = *mmc;
+                (void) platform_device_register(&mmc_omap_device1);
+        }
+#ifdef  CONFIG_ARCH_OMAP16XX
+        /* block 2 is on newer chips, and has many pinout options */
+        mmc = &mmc_conf->mmc[1];
+        if (mmc->enabled) {
+                if (!mmc->nomux) {
+                        omap_cfg_reg(Y8_1610_MMC2_CMD);
+                        omap_cfg_reg(Y10_1610_MMC2_CLK);
+                        omap_cfg_reg(R18_1610_MMC2_CLKIN);
+                        omap_cfg_reg(W8_1610_MMC2_DAT0);
+                        if (mmc->wire4) {
+                                omap_cfg_reg(V8_1610_MMC2_DAT1);
+                                omap_cfg_reg(W15_1610_MMC2_DAT2);
+                                omap_cfg_reg(R10_1610_MMC2_DAT3);
+                        }
+                        /* These are needed for the level shifter */
+                        omap_cfg_reg(V9_1610_MMC2_CMDDIR);
+                        omap_cfg_reg(V5_1610_MMC2_DATDIR0);
+                        omap_cfg_reg(W19_1610_MMC2_DATDIR1);
+                }
+                /* Feedback clock must be set on OMAP-1710 MMC2 */
+                if (cpu_is_omap1710())
+                        omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24),
+                                     MOD_CONF_CTRL_1);
+                mmc2_conf = *mmc;
+                (void) platform_device_register(&mmc_omap_device2);
+        }
+#endif
+        return;
+}
+#else
+static inline void omap_init_mmc(void) {}
+#endif
+#if     defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
+#ifdef CONFIG_ARCH_OMAP24XX
+#define OMAP_WDT_BASE           0x48022000
+#else
+#define OMAP_WDT_BASE           0xfffeb000
+#endif
+static struct resource wdt_resources[] = {
+        {
+                .start          = OMAP_WDT_BASE,
+                .end            = OMAP_WDT_BASE + 0x4f,
+                .flags          = IORESOURCE_MEM,
+        },
+};
+static struct platform_device omap_wdt_device = {
+        .name      = "omap_wdt",
+        .id          = -1,
+        .dev = {
+                .release        = omap_nop_release,
+        },
+        .num_resources  = ARRAY_SIZE(wdt_resources),
+        .resource       = wdt_resources,
+};
+static void omap_init_wdt(void)
+{
+        (void) platform_device_register(&omap_wdt_device);
+}
+#else
+static inline void omap_init_wdt(void) {}
+#endif
+/*-------------------------------------------------------------------------*/
+#if     defined(CONFIG_OMAP_RNG) || defined(CONFIG_OMAP_RNG_MODULE)
+#ifdef CONFIG_ARCH_OMAP24XX
+#define OMAP_RNG_BASE           0x480A0000
+#else
+#define OMAP_RNG_BASE           0xfffe5000
+#endif
+static struct resource rng_resources[] = {
+        {
+                .start          = OMAP_RNG_BASE,
+                .end            = OMAP_RNG_BASE + 0x4f,
+                .flags          = IORESOURCE_MEM,
+        },
+};
+static struct platform_device omap_rng_device = {
+        .name      = "omap_rng",
+        .id          = -1,
+        .dev = {
+                .release        = omap_nop_release,
+        },
+        .num_resources  = ARRAY_SIZE(rng_resources),
+        .resource       = rng_resources,
+};
+static void omap_init_rng(void)
+{
+        (void) platform_device_register(&omap_rng_device);
+}
+#else
+static inline void omap_init_rng(void) {}
+#endif
+#if defined(CONFIG_FB_OMAP) || defined(CONFIG_FB_OMAP_MODULE)
+static struct omap_lcd_config omap_fb_conf;
+static u64 omap_fb_dma_mask = ~(u32)0;
+static struct platform_device omap_fb_device = {
+        .name           = "omapfb",
+        .id             = -1,
+        .dev = {
+                .release                = omap_nop_release,
+                .dma_mask               = &omap_fb_dma_mask,
+                .coherent_dma_mask      = ~(u32)0,
+                .platform_data          = &omap_fb_conf,
+        },
+        .num_resources = 0,
+};
+static inline void omap_init_fb(void)
+{
+        const struct omap_lcd_config *conf;
+        conf = omap_get_config(OMAP_TAG_LCD, struct omap_lcd_config);
+        if (conf != NULL)
+                omap_fb_conf = *conf;
+        platform_device_register(&omap_fb_device);
+}
+#else
+static inline void omap_init_fb(void) {}
+#endif
+/*
+ * This gets called after board-specific INIT_MACHINE, and initializes most
+ * on-chip peripherals accessible on this board (except for few like USB):
+ *
+ *  (a) Does any "standard config" pin muxing needed.  Board-specific
+ *      code will have muxed GPIO pins and done "nonstandard" setup;
+ *      that code could live in the boot loader.
+ *  (b) Populating board-specific platform_data with the data drivers
+ *      rely on to handle wiring variations.
+ *  (c) Creating platform devices as meaningful on this board and
+ *      with this kernel configuration.
+ *
+ * Claiming GPIOs, and setting their direction and initial values, is the
+ * responsibility of the device drivers.  So is responding to probe().
+ *
+ * Board-specific knowlege like creating devices or pin setup is to be
+ * kept out of drivers as much as possible.  In particular, pin setup
+ * may be handled by the boot loader, and drivers should expect it will
+ * normally have been done by the time they're probed.
+ */
+static int __init omap_init_devices(void)
+{
+        /* please keep these calls, and their implementations above,
+         * in alphabetical order so they're easier to sort through.
+         */
+        omap_init_fb();
+        omap_init_i2c();
+        omap_init_mmc();
+        omap_init_wdt();
+        omap_init_rng();
+        return 0;
+}
+arch_initcall(omap_init_devices);
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index da7b65145658..f5cc21ad0956 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -6,6 +6,8 @@
 * DMA channel linking for 1610 by Samuel Ortiz <samuel.ortiz@nokia.com>
 * Graphics DMA and LCD DMA graphics tranformations
 * by Imre Deak <imre.deak@nokia.com>
+ * OMAP2 support Copyright (C) 2004-2005 Texas Instruments, Inc.
+ * Merged to support both OMAP1 and OMAP2 by Tony Lindgren <tony@atomide.com>
 * Some functions based on earlier dma-omap.c Copyright (C) 2001 RidgeRun, Inc.
 *
 * Support functions for the OMAP internal DMA channels.
@@ -31,8 +33,15 @@
 #include <asm/arch/tc.h>
-#define OMAP_DMA_ACTIVE         0x01
+#define DEBUG_PRINTS
+#undef DEBUG_PRINTS
+#ifdef DEBUG_PRINTS
+#define debug_printk(x) printk x
+#else
+#define debug_printk(x)
+#endif
+#define OMAP_DMA_ACTIVE         0x01
 #define OMAP_DMA_CCR_EN         (1 << 7)
 #define OMAP_FUNC_MUX_ARM_BASE  (0xfffe1000 + 0xec)
@@ -55,7 +64,7 @@ static int dma_chan_count;
 static spinlock_t dma_chan_lock;
 static struct omap_dma_lch dma_chan[OMAP_LOGICAL_DMA_CH_COUNT];
-const static u8 dma_irq[OMAP_LOGICAL_DMA_CH_COUNT] = {
+const static u8 omap1_dma_irq[OMAP_LOGICAL_DMA_CH_COUNT] = {
        INT_DMA_CH0_6, INT_DMA_CH1_7, INT_DMA_CH2_8, INT_DMA_CH3,
        INT_DMA_CH4, INT_DMA_CH5, INT_1610_DMA_CH6, INT_1610_DMA_CH7,
        INT_1610_DMA_CH8, INT_1610_DMA_CH9, INT_1610_DMA_CH10,
@@ -63,6 +72,20 @@ const static u8 dma_irq[OMAP_LOGICAL_DMA_CH_COUNT] = {
        INT_1610_DMA_CH14, INT_1610_DMA_CH15, INT_DMA_LCD
 };
+#define REVISIT_24XX()          printk(KERN_ERR "FIXME: no %s on 24xx\n", \
+                                                __FUNCTION__);
+#ifdef CONFIG_ARCH_OMAP15XX
+/* Returns 1 if the DMA module is in OMAP1510-compatible mode, 0 otherwise */
+int omap_dma_in_1510_mode(void)
+{
+        return enable_1510_mode;
+}
+#else
+#define omap_dma_in_1510_mode()         0
+#endif
+#ifdef CONFIG_ARCH_OMAP1
 static inline int get_gdma_dev(int req)
 {
        u32 reg = OMAP_FUNC_MUX_ARM_BASE + ((req - 1) / 5) * 4;
@@ -82,6 +105,9 @@ static inline void set_gdma_dev(int req, int dev)
        l |= (dev - 1) << shift;
        omap_writel(l, reg);
 }
+#else
+#define set_gdma_dev(req, dev)  do {} while (0)
+#endif
 static void clear_lch_regs(int lch)
 {
@@ -121,38 +147,62 @@ void omap_set_dma_priority(int dst_port, int priority)
 }
 void omap_set_dma_transfer_params(int lch, int data_type, int elem_count,
-                                  int frame_count, int sync_mode)
+                                  int frame_count, int sync_mode,
+                                  int dma_trigger, int src_or_dst_synch)
 {
-        u16 w;
+        OMAP_DMA_CSDP_REG(lch) &= ~0x03;
+        OMAP_DMA_CSDP_REG(lch) |= data_type;
-        w = omap_readw(OMAP_DMA_CSDP(lch));
+        if (cpu_class_is_omap1()) {
-        w &= ~0x03;
+                OMAP_DMA_CCR_REG(lch) &= ~(1 << 5);
-        w |= data_type;
+                if (sync_mode == OMAP_DMA_SYNC_FRAME)
-        omap_writew(w, OMAP_DMA_CSDP(lch));
+                        OMAP_DMA_CCR_REG(lch) |= 1 << 5;
+                OMAP1_DMA_CCR2_REG(lch) &= ~(1 << 2);
+                if (sync_mode == OMAP_DMA_SYNC_BLOCK)
+                        OMAP1_DMA_CCR2_REG(lch) |= 1 << 2;
+        }
+        if (cpu_is_omap24xx() && dma_trigger) {
+                u32 val = OMAP_DMA_CCR_REG(lch);
+                if (dma_trigger > 63)
+                        val |= 1 << 20;
+                if (dma_trigger > 31)
+                        val |= 1 << 19;
-        w = omap_readw(OMAP_DMA_CCR(lch));
+                val |= (dma_trigger & 0x1f);
-        w &= ~(1 << 5);
-        if (sync_mode == OMAP_DMA_SYNC_FRAME)
-                w |= 1 << 5;
-        omap_writew(w, OMAP_DMA_CCR(lch));
-        w = omap_readw(OMAP_DMA_CCR2(lch));
+                if (sync_mode & OMAP_DMA_SYNC_FRAME)
-        w &= ~(1 << 2);
+                        val |= 1 << 5;
-        if (sync_mode == OMAP_DMA_SYNC_BLOCK)
-                w |= 1 << 2;
-        omap_writew(w, OMAP_DMA_CCR2(lch));
-        omap_writew(elem_count, OMAP_DMA_CEN(lch));
+                if (sync_mode & OMAP_DMA_SYNC_BLOCK)
-        omap_writew(frame_count, OMAP_DMA_CFN(lch));
+                        val |= 1 << 18;
+                if (src_or_dst_synch)
+                        val |= 1 << 24;         /* source synch */
+                else
+                        val &= ~(1 << 24);      /* dest synch */
+                OMAP_DMA_CCR_REG(lch) = val;
+        }
+        OMAP_DMA_CEN_REG(lch) = elem_count;
+        OMAP_DMA_CFN_REG(lch) = frame_count;
 }
 void omap_set_dma_color_mode(int lch, enum omap_dma_color_mode mode, u32 color)
 {
        u16 w;
        BUG_ON(omap_dma_in_1510_mode());
-        w = omap_readw(OMAP_DMA_CCR2(lch)) & ~0x03;
+        if (cpu_is_omap24xx()) {
+                REVISIT_24XX();
+                return;
+        }
+        w = OMAP1_DMA_CCR2_REG(lch) & ~0x03;
        switch (mode) {
        case OMAP_DMA_CONSTANT_FILL:
                w |= 0x01;
@@ -165,63 +215,84 @@ void omap_set_dma_color_mode(int lch, enum omap_dma_color_mode mode, u32 color)
        default:
                BUG();
        }
-        omap_writew(w, OMAP_DMA_CCR2(lch));
+        OMAP1_DMA_CCR2_REG(lch) = w;
-        w = omap_readw(OMAP_DMA_LCH_CTRL(lch)) & ~0x0f;
+        w = OMAP1_DMA_LCH_CTRL_REG(lch) & ~0x0f;
        /* Default is channel type 2D */
        if (mode) {
-                omap_writew((u16)color, OMAP_DMA_COLOR_L(lch));
+                OMAP1_DMA_COLOR_L_REG(lch) = (u16)color;
-                omap_writew((u16)(color >> 16), OMAP_DMA_COLOR_U(lch));
+                OMAP1_DMA_COLOR_U_REG(lch) = (u16)(color >> 16);
                w |= 1;         /* Channel type G */
        }
-        omap_writew(w, OMAP_DMA_LCH_CTRL(lch));
+        OMAP1_DMA_LCH_CTRL_REG(lch) = w;
 }
+/* Note that src_port is only for omap1 */
 void omap_set_dma_src_params(int lch, int src_port, int src_amode,
-                             unsigned long src_start)
+                             unsigned long src_start,
+                             int src_ei, int src_fi)
 {
-        u16 w;
+        if (cpu_class_is_omap1()) {
+                OMAP_DMA_CSDP_REG(lch) &= ~(0x1f << 2);
+                OMAP_DMA_CSDP_REG(lch) |= src_port << 2;
+        }
+        OMAP_DMA_CCR_REG(lch) &= ~(0x03 << 12);
+        OMAP_DMA_CCR_REG(lch) |= src_amode << 12;
+        if (cpu_class_is_omap1()) {
+                OMAP1_DMA_CSSA_U_REG(lch) = src_start >> 16;
+                OMAP1_DMA_CSSA_L_REG(lch) = src_start;
+        }
-        w = omap_readw(OMAP_DMA_CSDP(lch));
+        if (cpu_is_omap24xx())
-        w &= ~(0x1f << 2);
+                OMAP2_DMA_CSSA_REG(lch) = src_start;
-        w |= src_port << 2;
-        omap_writew(w, OMAP_DMA_CSDP(lch));
-        w = omap_readw(OMAP_DMA_CCR(lch));
+        OMAP_DMA_CSEI_REG(lch) = src_ei;
-        w &= ~(0x03 << 12);
+        OMAP_DMA_CSFI_REG(lch) = src_fi;
-        w |= src_amode << 12;
+}
-        omap_writew(w, OMAP_DMA_CCR(lch));
-        omap_writew(src_start >> 16, OMAP_DMA_CSSA_U(lch));
+void omap_set_dma_params(int lch, struct omap_dma_channel_params * params)
-        omap_writew(src_start, OMAP_DMA_CSSA_L(lch));
+{
+        omap_set_dma_transfer_params(lch, params->data_type,
+                                     params->elem_count, params->frame_count,
+                                     params->sync_mode, params->trigger,
+                                     params->src_or_dst_synch);
+        omap_set_dma_src_params(lch, params->src_port,
+                                params->src_amode, params->src_start,
+                                params->src_ei, params->src_fi);
+        omap_set_dma_dest_params(lch, params->dst_port,
+                                 params->dst_amode, params->dst_start,
+                                 params->dst_ei, params->dst_fi);
 }
 void omap_set_dma_src_index(int lch, int eidx, int fidx)
 {
-        omap_writew(eidx, OMAP_DMA_CSEI(lch));
+        if (cpu_is_omap24xx()) {
-        omap_writew(fidx, OMAP_DMA_CSFI(lch));
+                REVISIT_24XX();
+                return;
+        }
+        OMAP_DMA_CSEI_REG(lch) = eidx;
+        OMAP_DMA_CSFI_REG(lch) = fidx;
 }
 void omap_set_dma_src_data_pack(int lch, int enable)
 {
-        u16 w;
+        OMAP_DMA_CSDP_REG(lch) &= ~(1 << 6);
+        if (enable)
-        w = omap_readw(OMAP_DMA_CSDP(lch)) & ~(1 << 6);
+                OMAP_DMA_CSDP_REG(lch) |= (1 << 6);
-        w |= enable ? (1 << 6) : 0;
-        omap_writew(w, OMAP_DMA_CSDP(lch));
 }
 void omap_set_dma_src_burst_mode(int lch, enum omap_dma_burst_mode burst_mode)
 {
-        u16 w;
+        OMAP_DMA_CSDP_REG(lch) &= ~(0x03 << 7);
-        w = omap_readw(OMAP_DMA_CSDP(lch)) & ~(0x03 << 7);
        switch (burst_mode) {
        case OMAP_DMA_DATA_BURST_DIS:
                break;
        case OMAP_DMA_DATA_BURST_4:
-                w |= (0x01 << 7);
+                OMAP_DMA_CSDP_REG(lch) |= (0x02 << 7);
                break;
        case OMAP_DMA_DATA_BURST_8:
                /* not supported by current hardware
@@ -231,110 +302,283 @@ void omap_set_dma_src_burst_mode(int lch, enum omap_dma_burst_mode burst_mode)
        default:
                BUG();
        }
-        omap_writew(w, OMAP_DMA_CSDP(lch));
 }
+/* Note that dest_port is only for OMAP1 */
 void omap_set_dma_dest_params(int lch, int dest_port, int dest_amode,
-                              unsigned long dest_start)
+                              unsigned long dest_start,
+                              int dst_ei, int dst_fi)
 {
-        u16 w;
+        if (cpu_class_is_omap1()) {
+                OMAP_DMA_CSDP_REG(lch) &= ~(0x1f << 9);
+                OMAP_DMA_CSDP_REG(lch) |= dest_port << 9;
+        }
-        w = omap_readw(OMAP_DMA_CSDP(lch));
+        OMAP_DMA_CCR_REG(lch) &= ~(0x03 << 14);
-        w &= ~(0x1f << 9);
+        OMAP_DMA_CCR_REG(lch) |= dest_amode << 14;
-        w |= dest_port << 9;
-        omap_writew(w, OMAP_DMA_CSDP(lch));
+        if (cpu_class_is_omap1()) {
+                OMAP1_DMA_CDSA_U_REG(lch) = dest_start >> 16;
+                OMAP1_DMA_CDSA_L_REG(lch) = dest_start;
+        }
-        w = omap_readw(OMAP_DMA_CCR(lch));
+        if (cpu_is_omap24xx())
-        w &= ~(0x03 << 14);
+                OMAP2_DMA_CDSA_REG(lch) = dest_start;
-        w |= dest_amode << 14;
-        omap_writew(w, OMAP_DMA_CCR(lch));
-        omap_writew(dest_start >> 16, OMAP_DMA_CDSA_U(lch));
+        OMAP_DMA_CDEI_REG(lch) = dst_ei;
-        omap_writew(dest_start, OMAP_DMA_CDSA_L(lch));
+        OMAP_DMA_CDFI_REG(lch) = dst_fi;
 }
 void omap_set_dma_dest_index(int lch, int eidx, int fidx)
 {
-        omap_writew(eidx, OMAP_DMA_CDEI(lch));
+        if (cpu_is_omap24xx()) {
-        omap_writew(fidx, OMAP_DMA_CDFI(lch));
+                REVISIT_24XX();
+                return;
+        }
+        OMAP_DMA_CDEI_REG(lch) = eidx;
+        OMAP_DMA_CDFI_REG(lch) = fidx;
 }
 void omap_set_dma_dest_data_pack(int lch, int enable)
 {
-        u16 w;
+        OMAP_DMA_CSDP_REG(lch) &= ~(1 << 13);
+        if (enable)
-        w = omap_readw(OMAP_DMA_CSDP(lch)) & ~(1 << 13);
+                OMAP_DMA_CSDP_REG(lch) |= 1 << 13;
-        w |= enable ? (1 << 13) : 0;
-        omap_writew(w, OMAP_DMA_CSDP(lch));
 }
 void omap_set_dma_dest_burst_mode(int lch, enum omap_dma_burst_mode burst_mode)
 {
-        u16 w;
+        OMAP_DMA_CSDP_REG(lch) &= ~(0x03 << 14);
-        w = omap_readw(OMAP_DMA_CSDP(lch)) & ~(0x03 << 14);
        switch (burst_mode) {
        case OMAP_DMA_DATA_BURST_DIS:
                break;
        case OMAP_DMA_DATA_BURST_4:
-                w |= (0x01 << 14);
+                OMAP_DMA_CSDP_REG(lch) |= (0x02 << 14);
                break;
        case OMAP_DMA_DATA_BURST_8:
-                w |= (0x03 << 14);
+                OMAP_DMA_CSDP_REG(lch) |= (0x03 << 14);
                break;
        default:
                printk(KERN_ERR "Invalid DMA burst mode\n");
                BUG();
                return;
        }
-        omap_writew(w, OMAP_DMA_CSDP(lch));
 }
-static inline void init_intr(int lch)
+static inline void omap_enable_channel_irq(int lch)
 {
-        u16 w;
+        u32 status;
        /* Read CSR to make sure it's cleared. */
-        w = omap_readw(OMAP_DMA_CSR(lch));
+        status = OMAP_DMA_CSR_REG(lch);
        /* Enable some nice interrupts. */
-        omap_writew(dma_chan[lch].enabled_irqs, OMAP_DMA_CICR(lch));
+        OMAP_DMA_CICR_REG(lch) = dma_chan[lch].enabled_irqs;
        dma_chan[lch].flags |= OMAP_DMA_ACTIVE;
 }
-static inline void enable_lnk(int lch)
+static void omap_disable_channel_irq(int lch)
 {
-        u16 w;
+        if (cpu_is_omap24xx())
+                OMAP_DMA_CICR_REG(lch) = 0;
+}
+void omap_enable_dma_irq(int lch, u16 bits)
+{
+        dma_chan[lch].enabled_irqs |= bits;
+}
-        /* Clear the STOP_LNK bits */
+void omap_disable_dma_irq(int lch, u16 bits)
-        w = omap_readw(OMAP_DMA_CLNK_CTRL(lch));
+{
-        w &= ~(1 << 14);
+        dma_chan[lch].enabled_irqs &= ~bits;
-        omap_writew(w, OMAP_DMA_CLNK_CTRL(lch));
+}
+static inline void enable_lnk(int lch)
+{
+        if (cpu_class_is_omap1())
+                OMAP_DMA_CLNK_CTRL_REG(lch) &= ~(1 << 14);
-        /* And set the ENABLE_LNK bits */
+        /* Set the ENABLE_LNK bits */
        if (dma_chan[lch].next_lch != -1)
-                omap_writew(dma_chan[lch].next_lch | (1 << 15),
+                OMAP_DMA_CLNK_CTRL_REG(lch) =
-                            OMAP_DMA_CLNK_CTRL(lch));
+                        dma_chan[lch].next_lch | (1 << 15);
 }
 static inline void disable_lnk(int lch)
 {
-        u16 w;
        /* Disable interrupts */
-        omap_writew(0, OMAP_DMA_CICR(lch));
+        if (cpu_class_is_omap1()) {
+                OMAP_DMA_CICR_REG(lch) = 0;
+                /* Set the STOP_LNK bit */
+                OMAP_DMA_CLNK_CTRL_REG(lch) |= 1 << 14;
+        }
-        /* Set the STOP_LNK bit */
+        if (cpu_is_omap24xx()) {
-        w = omap_readw(OMAP_DMA_CLNK_CTRL(lch));
+                omap_disable_channel_irq(lch);
-        w |= (1 << 14);
+                /* Clear the ENABLE_LNK bit */
-        w = omap_writew(w, OMAP_DMA_CLNK_CTRL(lch));
+                OMAP_DMA_CLNK_CTRL_REG(lch) &= ~(1 << 15);
+        }
        dma_chan[lch].flags &= ~OMAP_DMA_ACTIVE;
 }
-void omap_start_dma(int lch)
+static inline void omap2_enable_irq_lch(int lch)
 {
-        u16 w;
+        u32 val;
+        if (!cpu_is_omap24xx())
+                return;
+        val = omap_readl(OMAP_DMA4_IRQENABLE_L0);
+        val |= 1 << lch;
+        omap_writel(val, OMAP_DMA4_IRQENABLE_L0);
+}
+int omap_request_dma(int dev_id, const char *dev_name,
+                     void (* callback)(int lch, u16 ch_status, void *data),
+                     void *data, int *dma_ch_out)
+{
+        int ch, free_ch = -1;
+        unsigned long flags;
+        struct omap_dma_lch *chan;
+        spin_lock_irqsave(&dma_chan_lock, flags);
+        for (ch = 0; ch < dma_chan_count; ch++) {
+                if (free_ch == -1 && dma_chan[ch].dev_id == -1) {
+                        free_ch = ch;
+                        if (dev_id == 0)
+                                break;
+                }
+        }
+        if (free_ch == -1) {
+                spin_unlock_irqrestore(&dma_chan_lock, flags);
+                return -EBUSY;
+        }
+        chan = dma_chan + free_ch;
+        chan->dev_id = dev_id;
+        if (cpu_class_is_omap1())
+                clear_lch_regs(free_ch);
+        if (cpu_is_omap24xx())
+                omap_clear_dma(free_ch);
+        spin_unlock_irqrestore(&dma_chan_lock, flags);
+        chan->dev_name = dev_name;
+        chan->callback = callback;
+        chan->data = data;
+        chan->enabled_irqs = OMAP_DMA_TOUT_IRQ | OMAP_DMA_DROP_IRQ |
+                                OMAP_DMA_BLOCK_IRQ;
+        if (cpu_is_omap24xx())
+                chan->enabled_irqs |= OMAP2_DMA_TRANS_ERR_IRQ;
+        if (cpu_is_omap16xx()) {
+                /* If the sync device is set, configure it dynamically. */
+                if (dev_id != 0) {
+                        set_gdma_dev(free_ch + 1, dev_id);
+                        dev_id = free_ch + 1;
+                }
+                /* Disable the 1510 compatibility mode and set the sync device
+                 * id. */
+                OMAP_DMA_CCR_REG(free_ch) = dev_id | (1 << 10);
+        } else if (cpu_is_omap730() || cpu_is_omap15xx()) {
+                OMAP_DMA_CCR_REG(free_ch) = dev_id;
+        }
+        if (cpu_is_omap24xx()) {
+                omap2_enable_irq_lch(free_ch);
+                omap_enable_channel_irq(free_ch);
+                /* Clear the CSR register and IRQ status register */
+                OMAP_DMA_CSR_REG(free_ch) = 0x0;
+                omap_writel(~0x0, OMAP_DMA4_IRQSTATUS_L0);
+        }
+        *dma_ch_out = free_ch;
+        return 0;
+}
+void omap_free_dma(int lch)
+{
+        unsigned long flags;
+        spin_lock_irqsave(&dma_chan_lock, flags);
+        if (dma_chan[lch].dev_id == -1) {
+                printk("omap_dma: trying to free nonallocated DMA channel %d\n",
+                       lch);
+                spin_unlock_irqrestore(&dma_chan_lock, flags);
+                return;
+        }
+        dma_chan[lch].dev_id = -1;
+        dma_chan[lch].next_lch = -1;
+        dma_chan[lch].callback = NULL;
+        spin_unlock_irqrestore(&dma_chan_lock, flags);
+        if (cpu_class_is_omap1()) {
+                /* Disable all DMA interrupts for the channel. */
+                OMAP_DMA_CICR_REG(lch) = 0;
+                /* Make sure the DMA transfer is stopped. */
+                OMAP_DMA_CCR_REG(lch) = 0;
+        }
+        if (cpu_is_omap24xx()) {
+                u32 val;
+                /* Disable interrupts */
+                val = omap_readl(OMAP_DMA4_IRQENABLE_L0);
+                val &= ~(1 << lch);
+                omap_writel(val, OMAP_DMA4_IRQENABLE_L0);
+                /* Clear the CSR register and IRQ status register */
+                OMAP_DMA_CSR_REG(lch) = 0x0;
+                val = omap_readl(OMAP_DMA4_IRQSTATUS_L0);
+                val |= 1 << lch;
+                omap_writel(val, OMAP_DMA4_IRQSTATUS_L0);
+                /* Disable all DMA interrupts for the channel. */
+                OMAP_DMA_CICR_REG(lch) = 0;
+                /* Make sure the DMA transfer is stopped. */
+                OMAP_DMA_CCR_REG(lch) = 0;
+                omap_clear_dma(lch);
+        }
+}
+/*
+ * Clears any DMA state so the DMA engine is ready to restart with new buffers
+ * through omap_start_dma(). Any buffers in flight are discarded.
+ */
+void omap_clear_dma(int lch)
+{
+        unsigned long flags;
+        local_irq_save(flags);
+        if (cpu_class_is_omap1()) {
+                int status;
+                OMAP_DMA_CCR_REG(lch) &= ~OMAP_DMA_CCR_EN;
+                /* Clear pending interrupts */
+                status = OMAP_DMA_CSR_REG(lch);
+        }
+        if (cpu_is_omap24xx()) {
+                int i;
+                u32 lch_base = OMAP24XX_DMA_BASE + lch * 0x60 + 0x80;
+                for (i = 0; i < 0x44; i += 4)
+                        omap_writel(0, lch_base + i);
+        }
+        local_irq_restore(flags);
+}
+void omap_start_dma(int lch)
+{
        if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) {
                int next_lch, cur_lch;
                char dma_chan_link_map[OMAP_LOGICAL_DMA_CH_COUNT];
@@ -348,31 +592,37 @@ void omap_start_dma(int lch)
                do {
                        next_lch = dma_chan[cur_lch].next_lch;
-                        /* The loop case: we've been here already */
+                        /* The loop case: we've been here already */
                        if (dma_chan_link_map[cur_lch])
                                break;
                        /* Mark the current channel */
                        dma_chan_link_map[cur_lch] = 1;
                        enable_lnk(cur_lch);
-                        init_intr(cur_lch);
+                        omap_enable_channel_irq(cur_lch);
                        cur_lch = next_lch;
                } while (next_lch != -1);
+        } else if (cpu_is_omap24xx()) {
+                /* Errata: Need to write lch even if not using chaining */
+                OMAP_DMA_CLNK_CTRL_REG(lch) = lch;
        }
-        init_intr(lch);
+        omap_enable_channel_irq(lch);
+        /* Errata: On ES2.0 BUFFERING disable must be set.
+         * This will always fail on ES1.0 */
+        if (cpu_is_omap24xx()) {
+                OMAP_DMA_CCR_REG(lch) |= OMAP_DMA_CCR_EN;
+        }
+        OMAP_DMA_CCR_REG(lch) |= OMAP_DMA_CCR_EN;
-        w = omap_readw(OMAP_DMA_CCR(lch));
-        w |= OMAP_DMA_CCR_EN;
-        omap_writew(w, OMAP_DMA_CCR(lch));
        dma_chan[lch].flags |= OMAP_DMA_ACTIVE;
 }
 void omap_stop_dma(int lch)
 {
-        u16 w;
        if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) {
                int next_lch, cur_lch = lch;
                char dma_chan_link_map[OMAP_LOGICAL_DMA_CH_COUNT];
@@ -393,146 +643,83 @@ void omap_stop_dma(int lch)
                return;
        }
        /* Disable all interrupts on the channel */
-        omap_writew(0, OMAP_DMA_CICR(lch));
+        if (cpu_class_is_omap1())
+                OMAP_DMA_CICR_REG(lch) = 0;
-        w = omap_readw(OMAP_DMA_CCR(lch));
+        OMAP_DMA_CCR_REG(lch) &= ~OMAP_DMA_CCR_EN;
-        w &= ~OMAP_DMA_CCR_EN;
-        omap_writew(w, OMAP_DMA_CCR(lch));
        dma_chan[lch].flags &= ~OMAP_DMA_ACTIVE;
 }
-void omap_enable_dma_irq(int lch, u16 bits)
+/*
+ * Returns current physical source address for the given DMA channel.
+ * If the channel is running the caller must disable interrupts prior calling
+ * this function and process the returned value before re-enabling interrupt to
+ * prevent races with the interrupt handler. Note that in continuous mode there
+ * is a chance for CSSA_L register overflow inbetween the two reads resulting
+ * in incorrect return value.
+ */
+dma_addr_t omap_get_dma_src_pos(int lch)
 {
-        dma_chan[lch].enabled_irqs |= bits;
+        dma_addr_t offset;
-}
-void omap_disable_dma_irq(int lch, u16 bits)
+        if (cpu_class_is_omap1())
-{
+                offset = (dma_addr_t) (OMAP1_DMA_CSSA_L_REG(lch) |
-        dma_chan[lch].enabled_irqs &= ~bits;
+                                       (OMAP1_DMA_CSSA_U_REG(lch) << 16));
-}
-static int dma_handle_ch(int ch)
+        if (cpu_is_omap24xx())
-{
+                offset = OMAP_DMA_CSAC_REG(lch);
-        u16 csr;
-        if (enable_1510_mode && ch >= 6) {
+        return offset;
-                csr = dma_chan[ch].saved_csr;
-                dma_chan[ch].saved_csr = 0;
-        } else
-                csr = omap_readw(OMAP_DMA_CSR(ch));
-        if (enable_1510_mode && ch <= 2 && (csr >> 7) != 0) {
-                dma_chan[ch + 6].saved_csr = csr >> 7;
-                csr &= 0x7f;
-        }
-        if ((csr & 0x3f) == 0)
-                return 0;
-        if (unlikely(dma_chan[ch].dev_id == -1)) {
-                printk(KERN_WARNING "Spurious interrupt from DMA channel %d (CSR %04x)\n",
-                       ch, csr);
-                return 0;
-        }
-        if (unlikely(csr & OMAP_DMA_TOUT_IRQ))
-                printk(KERN_WARNING "DMA timeout with device %d\n", dma_chan[ch].dev_id);
-        if (unlikely(csr & OMAP_DMA_DROP_IRQ))
-                printk(KERN_WARNING "DMA synchronization event drop occurred with device %d\n",
-                       dma_chan[ch].dev_id);
-        if (likely(csr & OMAP_DMA_BLOCK_IRQ))
-                dma_chan[ch].flags &= ~OMAP_DMA_ACTIVE;
-        if (likely(dma_chan[ch].callback != NULL))
-                dma_chan[ch].callback(ch, csr, dma_chan[ch].data);
-        return 1;
 }
-static irqreturn_t dma_irq_handler(int irq, void *dev_id, struct pt_regs *regs)
+/*
+ * Returns current physical destination address for the given DMA channel.
+ * If the channel is running the caller must disable interrupts prior calling
+ * this function and process the returned value before re-enabling interrupt to
+ * prevent races with the interrupt handler. Note that in continuous mode there
+ * is a chance for CDSA_L register overflow inbetween the two reads resulting
+ * in incorrect return value.
+ */
+dma_addr_t omap_get_dma_dst_pos(int lch)
 {
-        int ch = ((int) dev_id) - 1;
+        dma_addr_t offset;
-        int handled = 0;
-        for (;;) {
+        if (cpu_class_is_omap1())
-                int handled_now = 0;
+                offset = (dma_addr_t) (OMAP1_DMA_CDSA_L_REG(lch) |
+                                       (OMAP1_DMA_CDSA_U_REG(lch) << 16));
-                handled_now += dma_handle_ch(ch);
+        if (cpu_is_omap24xx())
-                if (enable_1510_mode && dma_chan[ch + 6].saved_csr)
+                offset = OMAP2_DMA_CDSA_REG(lch);
-                        handled_now += dma_handle_ch(ch + 6);
-                if (!handled_now)
-                        break;
-                handled += handled_now;
-        }
-        return handled ? IRQ_HANDLED : IRQ_NONE;
+        return offset;
 }
-int omap_request_dma(int dev_id, const char *dev_name,
+/*
-                     void (* callback)(int lch, u16 ch_status, void *data),
+ * Returns current source transfer counting for the given DMA channel.
-                     void *data, int *dma_ch_out)
+ * Can be used to monitor the progress of a transfer inside a block.
+ * It must be called with disabled interrupts.
+ */
+int omap_get_dma_src_addr_counter(int lch)
 {
-        int ch, free_ch = -1;
+        return (dma_addr_t) OMAP_DMA_CSAC_REG(lch);
-        unsigned long flags;
-        struct omap_dma_lch *chan;
-        spin_lock_irqsave(&dma_chan_lock, flags);
-        for (ch = 0; ch < dma_chan_count; ch++) {
-                if (free_ch == -1 && dma_chan[ch].dev_id == -1) {
-                        free_ch = ch;
-                        if (dev_id == 0)
-                                break;
-                }
-        }
-        if (free_ch == -1) {
-                spin_unlock_irqrestore(&dma_chan_lock, flags);
-                return -EBUSY;
-        }
-        chan = dma_chan + free_ch;
-        chan->dev_id = dev_id;
-        clear_lch_regs(free_ch);
-        spin_unlock_irqrestore(&dma_chan_lock, flags);
-        chan->dev_id = dev_id;
-        chan->dev_name = dev_name;
-        chan->callback = callback;
-        chan->data = data;
-        chan->enabled_irqs = OMAP_DMA_TOUT_IRQ | OMAP_DMA_DROP_IRQ | OMAP_DMA_BLOCK_IRQ;
-        if (cpu_is_omap16xx()) {
-                /* If the sync device is set, configure it dynamically. */
-                if (dev_id != 0) {
-                        set_gdma_dev(free_ch + 1, dev_id);
-                        dev_id = free_ch + 1;
-                }
-                /* Disable the 1510 compatibility mode and set the sync device
-                 * id. */
-                omap_writew(dev_id | (1 << 10), OMAP_DMA_CCR(free_ch));
-        } else {
-                omap_writew(dev_id, OMAP_DMA_CCR(free_ch));
-        }
-        *dma_ch_out = free_ch;
-        return 0;
 }
-void omap_free_dma(int ch)
+int omap_dma_running(void)
 {
-        unsigned long flags;
+        int lch;
-        spin_lock_irqsave(&dma_chan_lock, flags);
+        /* Check if LCD DMA is running */
-        if (dma_chan[ch].dev_id == -1) {
+        if (cpu_is_omap16xx())
-                printk("omap_dma: trying to free nonallocated DMA channel %d\n", ch);
+                if (omap_readw(OMAP1610_DMA_LCD_CCR) & OMAP_DMA_CCR_EN)
-                spin_unlock_irqrestore(&dma_chan_lock, flags);
+                        return 1;
-                return;
-        }
-        dma_chan[ch].dev_id = -1;
-        spin_unlock_irqrestore(&dma_chan_lock, flags);
-        /* Disable all DMA interrupts for the channel. */
+        for (lch = 0; lch < dma_chan_count; lch++)
-        omap_writew(0, OMAP_DMA_CICR(ch));
+                if (OMAP_DMA_CCR_REG(lch) & OMAP_DMA_CCR_EN)
-        /* Make sure the DMA transfer is stopped. */
+                        return 1;
-        omap_writew(0, OMAP_DMA_CCR(ch));
-}
-int omap_dma_in_1510_mode(void)
+        return 0;
-{
-        return enable_1510_mode;
 }
 /*
@@ -550,7 +737,8 @@ void omap_dma_link_lch (int lch_head, int lch_queue)
        if ((dma_chan[lch_head].dev_id == -1) ||
            (dma_chan[lch_queue].dev_id == -1)) {
-                printk(KERN_ERR "omap_dma: trying to link non requested channels\n");
+                printk(KERN_ERR "omap_dma: trying to link "
+                       "non requested channels\n");
                dump_stack();
        }
@@ -570,20 +758,149 @@ void omap_dma_unlink_lch (int lch_head, int lch_queue)
        if (dma_chan[lch_head].next_lch != lch_queue ||
            dma_chan[lch_head].next_lch == -1) {
-                printk(KERN_ERR "omap_dma: trying to unlink non linked channels\n");
+                printk(KERN_ERR "omap_dma: trying to unlink "
+                       "non linked channels\n");
                dump_stack();
        }
        if ((dma_chan[lch_head].flags & OMAP_DMA_ACTIVE) ||
            (dma_chan[lch_head].flags & OMAP_DMA_ACTIVE)) {
-                printk(KERN_ERR "omap_dma: You need to stop the DMA channels before unlinking\n");
+                printk(KERN_ERR "omap_dma: You need to stop the DMA channels "
+                       "before unlinking\n");
                dump_stack();
        }
        dma_chan[lch_head].next_lch = -1;
 }
+/*----------------------------------------------------------------------------*/
+#ifdef CONFIG_ARCH_OMAP1
+static int omap1_dma_handle_ch(int ch)
+{
+        u16 csr;
+        if (enable_1510_mode && ch >= 6) {
+                csr = dma_chan[ch].saved_csr;
+                dma_chan[ch].saved_csr = 0;
+        } else
+                csr = OMAP_DMA_CSR_REG(ch);
+        if (enable_1510_mode && ch <= 2 && (csr >> 7) != 0) {
+                dma_chan[ch + 6].saved_csr = csr >> 7;
+                csr &= 0x7f;
+        }
+        if ((csr & 0x3f) == 0)
+                return 0;
+        if (unlikely(dma_chan[ch].dev_id == -1)) {
+                printk(KERN_WARNING "Spurious interrupt from DMA channel "
+                       "%d (CSR %04x)\n", ch, csr);
+                return 0;
+        }
+        if (unlikely(csr & OMAP_DMA_TOUT_IRQ))
+                printk(KERN_WARNING "DMA timeout with device %d\n",
+                       dma_chan[ch].dev_id);
+        if (unlikely(csr & OMAP_DMA_DROP_IRQ))
+                printk(KERN_WARNING "DMA synchronization event drop occurred "
+                       "with device %d\n", dma_chan[ch].dev_id);
+        if (likely(csr & OMAP_DMA_BLOCK_IRQ))
+                dma_chan[ch].flags &= ~OMAP_DMA_ACTIVE;
+        if (likely(dma_chan[ch].callback != NULL))
+                dma_chan[ch].callback(ch, csr, dma_chan[ch].data);
+        return 1;
+}
+static irqreturn_t omap1_dma_irq_handler(int irq, void *dev_id,
+                                         struct pt_regs *regs)
+{
+        int ch = ((int) dev_id) - 1;
+        int handled = 0;
+        for (;;) {
+                int handled_now = 0;
+                handled_now += omap1_dma_handle_ch(ch);
+                if (enable_1510_mode && dma_chan[ch + 6].saved_csr)
+                        handled_now += omap1_dma_handle_ch(ch + 6);
+                if (!handled_now)
+                        break;
+                handled += handled_now;
+        }
+        return handled ? IRQ_HANDLED : IRQ_NONE;
+}
+#else
+#define omap1_dma_irq_handler   NULL
+#endif
+#ifdef CONFIG_ARCH_OMAP2
+static int omap2_dma_handle_ch(int ch)
+{
+        u32 status = OMAP_DMA_CSR_REG(ch);
+        u32 val;
+        if (!status)
+                return 0;
+        if (unlikely(dma_chan[ch].dev_id == -1))
+                return 0;
+        /* REVISIT: According to 24xx TRM, there's no TOUT_IE */
+        if (unlikely(status & OMAP_DMA_TOUT_IRQ))
+                printk(KERN_INFO "DMA timeout with device %d\n",
+                       dma_chan[ch].dev_id);
+        if (unlikely(status & OMAP_DMA_DROP_IRQ))
+                printk(KERN_INFO
+                       "DMA synchronization event drop occurred with device "
+                       "%d\n", dma_chan[ch].dev_id);
+        if (unlikely(status & OMAP2_DMA_TRANS_ERR_IRQ))
+                printk(KERN_INFO "DMA transaction error with device %d\n",
+                       dma_chan[ch].dev_id);
+        OMAP_DMA_CSR_REG(ch) = 0x20;
+        val = omap_readl(OMAP_DMA4_IRQSTATUS_L0);
+        /* ch in this function is from 0-31 while in register it is 1-32 */
+        val = 1 << (ch);
+        omap_writel(val, OMAP_DMA4_IRQSTATUS_L0);
+        if (likely(dma_chan[ch].callback != NULL))
+                dma_chan[ch].callback(ch, status, dma_chan[ch].data);
+        return 0;
+}
+/* STATUS register count is from 1-32 while our is 0-31 */
+static irqreturn_t omap2_dma_irq_handler(int irq, void *dev_id,
+                                         struct pt_regs *regs)
+{
+        u32 val;
+        int i;
+        val = omap_readl(OMAP_DMA4_IRQSTATUS_L0);
+        for (i = 1; i <= OMAP_LOGICAL_DMA_CH_COUNT; i++) {
+                int active = val & (1 << (i - 1));
+                if (active)
+                        omap2_dma_handle_ch(i - 1);
+        }
+        return IRQ_HANDLED;
+}
+static struct irqaction omap24xx_dma_irq = {
+        .name = "DMA",
+        .handler = omap2_dma_irq_handler,
+        .flags = SA_INTERRUPT
+};
+#else
+static struct irqaction omap24xx_dma_irq;
+#endif
+/*----------------------------------------------------------------------------*/
 static struct lcd_dma_info {
        spinlock_t lock;
@@ -795,7 +1112,7 @@ static void set_b1_regs(void)
        /* Always set the source port as SDRAM for now*/
        w &= ~(0x03 << 6);
        if (lcd_dma.callback != NULL)
-                w |= 1 << 1;            /* Block interrupt enable */
+                w |= 1 << 1;            /* Block interrupt enable */
        else
                w &= ~(1 << 1);
        omap_writew(w, OMAP1610_DMA_LCD_CTRL);
@@ -814,7 +1131,8 @@ static void set_b1_regs(void)
        omap_writew(fi, OMAP1610_DMA_LCD_SRC_FI_B1_L);
 }
-static irqreturn_t lcd_dma_irq_handler(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t lcd_dma_irq_handler(int irq, void *dev_id,
+                                       struct pt_regs *regs)
 {
        u16 w;
@@ -870,7 +1188,8 @@ void omap_free_lcd_dma(void)
                return;
        }
        if (!enable_1510_mode)
-                omap_writew(omap_readw(OMAP1610_DMA_LCD_CCR) & ~1, OMAP1610_DMA_LCD_CCR);
+                omap_writew(omap_readw(OMAP1610_DMA_LCD_CCR) & ~1,
+                            OMAP1610_DMA_LCD_CCR);
        lcd_dma.reserved = 0;
        spin_unlock(&lcd_dma.lock);
 }
@@ -939,93 +1258,24 @@ void omap_stop_lcd_dma(void)
        omap_writew(w, OMAP1610_DMA_LCD_CTRL);
 }
-/*
+/*----------------------------------------------------------------------------*/
- * Clears any DMA state so the DMA engine is ready to restart with new buffers
- * through omap_start_dma(). Any buffers in flight are discarded.
- */
-void omap_clear_dma(int lch)
-{
-        unsigned long flags;
-        int status;
-        local_irq_save(flags);
-        omap_writew(omap_readw(OMAP_DMA_CCR(lch)) & ~OMAP_DMA_CCR_EN,
-                    OMAP_DMA_CCR(lch));
-        status = OMAP_DMA_CSR(lch);     /* clear pending interrupts */
-        local_irq_restore(flags);
-}
-/*
- * Returns current physical source address for the given DMA channel.
- * If the channel is running the caller must disable interrupts prior calling
- * this function and process the returned value before re-enabling interrupt to
- * prevent races with the interrupt handler. Note that in continuous mode there
- * is a chance for CSSA_L register overflow inbetween the two reads resulting
- * in incorrect return value.
- */
-dma_addr_t omap_get_dma_src_pos(int lch)
-{
-        return (dma_addr_t) (omap_readw(OMAP_DMA_CSSA_L(lch)) |
-        (omap_readw(OMAP_DMA_CSSA_U(lch)) << 16));
-}
-/*
- * Returns current physical destination address for the given DMA channel.
- * If the channel is running the caller must disable interrupts prior calling
- * this function and process the returned value before re-enabling interrupt to
- * prevent races with the interrupt handler. Note that in continuous mode there
- * is a chance for CDSA_L register overflow inbetween the two reads resulting
- * in incorrect return value.
- */
-dma_addr_t omap_get_dma_dst_pos(int lch)
-{
-        return (dma_addr_t) (omap_readw(OMAP_DMA_CDSA_L(lch)) |
-        (omap_readw(OMAP_DMA_CDSA_U(lch)) << 16));
-}
-/*
- * Returns current source transfer counting for the given DMA channel.
- * Can be used to monitor the progress of a transfer inside a  block.
- * It must be called with disabled interrupts.
- */
-int omap_get_dma_src_addr_counter(int lch)
-{
-        return (dma_addr_t) omap_readw(OMAP_DMA_CSAC(lch));
-}
-int omap_dma_running(void)
-{
-        int lch;
-        /* Check if LCD DMA is running */
-        if (cpu_is_omap16xx())
-                if (omap_readw(OMAP1610_DMA_LCD_CCR) & OMAP_DMA_CCR_EN)
-                        return 1;
-        for (lch = 0; lch < dma_chan_count; lch++) {
-                u16 w;
-                w = omap_readw(OMAP_DMA_CCR(lch));
-                if (w & OMAP_DMA_CCR_EN)
-                        return 1;
-        }
-        return 0;
-}
 static int __init omap_init_dma(void)
 {
        int ch, r;
-        if (cpu_is_omap1510()) {
+        if (cpu_is_omap15xx()) {
-                printk(KERN_INFO "DMA support for OMAP1510 initialized\n");
+                printk(KERN_INFO "DMA support for OMAP15xx initialized\n");
                dma_chan_count = 9;
                enable_1510_mode = 1;
        } else if (cpu_is_omap16xx() || cpu_is_omap730()) {
                printk(KERN_INFO "OMAP DMA hardware version %d\n",
                       omap_readw(OMAP_DMA_HW_ID));
                printk(KERN_INFO "DMA capabilities: %08x:%08x:%04x:%04x:%04x\n",
-                       (omap_readw(OMAP_DMA_CAPS_0_U) << 16) | omap_readw(OMAP_DMA_CAPS_0_L),
+                       (omap_readw(OMAP_DMA_CAPS_0_U) << 16) |
-                       (omap_readw(OMAP_DMA_CAPS_1_U) << 16) | omap_readw(OMAP_DMA_CAPS_1_L),
+                       omap_readw(OMAP_DMA_CAPS_0_L),
+                       (omap_readw(OMAP_DMA_CAPS_1_U) << 16) |
+                       omap_readw(OMAP_DMA_CAPS_1_L),
                       omap_readw(OMAP_DMA_CAPS_2), omap_readw(OMAP_DMA_CAPS_3),
                       omap_readw(OMAP_DMA_CAPS_4));
                if (!enable_1510_mode) {
@@ -1038,6 +1288,11 @@ static int __init omap_init_dma(void)
                        dma_chan_count = 16;
                } else
                        dma_chan_count = 9;
+        } else if (cpu_is_omap24xx()) {
+                u8 revision = omap_readb(OMAP_DMA4_REVISION);
+                printk(KERN_INFO "OMAP DMA hardware revision %d.%d\n",
+                       revision >> 4, revision & 0xf);
+                dma_chan_count = OMAP_LOGICAL_DMA_CH_COUNT;
        } else {
                dma_chan_count = 0;
                return 0;
@@ -1049,41 +1304,56 @@ static int __init omap_init_dma(void)
        memset(&dma_chan, 0, sizeof(dma_chan));
        for (ch = 0; ch < dma_chan_count; ch++) {
+                omap_clear_dma(ch);
                dma_chan[ch].dev_id = -1;
                dma_chan[ch].next_lch = -1;
                if (ch >= 6 && enable_1510_mode)
                        continue;
-                /* request_irq() doesn't like dev_id (ie. ch) being zero,
+                if (cpu_class_is_omap1()) {
-                 * so we have to kludge around this. */
+                        /* request_irq() doesn't like dev_id (ie. ch) being
-                r = request_irq(dma_irq[ch], dma_irq_handler, 0, "DMA",
+                         * zero, so we have to kludge around this. */
-                                (void *) (ch + 1));
+                        r = request_irq(omap1_dma_irq[ch],
+                                        omap1_dma_irq_handler, 0, "DMA",
+                                        (void *) (ch + 1));
+                        if (r != 0) {
+                                int i;
+                                printk(KERN_ERR "unable to request IRQ %d "
+                                       "for DMA (error %d)\n",
+                                       omap1_dma_irq[ch], r);
+                                for (i = 0; i < ch; i++)
+                                        free_irq(omap1_dma_irq[i],
+                                                 (void *) (i + 1));
+                                return r;
+                        }
+                }
+        }
+        if (cpu_is_omap24xx())
+                setup_irq(INT_24XX_SDMA_IRQ0, &omap24xx_dma_irq);
+        /* FIXME: Update LCD DMA to work on 24xx */
+        if (cpu_class_is_omap1()) {
+                r = request_irq(INT_DMA_LCD, lcd_dma_irq_handler, 0,
+                                "LCD DMA", NULL);
                if (r != 0) {
                        int i;
-                        printk(KERN_ERR "unable to request IRQ %d for DMA (error %d)\n",
+                        printk(KERN_ERR "unable to request IRQ for LCD DMA "
-                               dma_irq[ch], r);
+                               "(error %d)\n", r);
-                        for (i = 0; i < ch; i++)
+                        for (i = 0; i < dma_chan_count; i++)
-                                free_irq(dma_irq[i], (void *) (i + 1));
+                                free_irq(omap1_dma_irq[i], (void *) (i + 1));
                        return r;
                }
        }
-        r = request_irq(INT_DMA_LCD, lcd_dma_irq_handler, 0, "LCD DMA", NULL);
-        if (r != 0) {
-                int i;
-                printk(KERN_ERR "unable to request IRQ for LCD DMA (error %d)\n", r);
-                for (i = 0; i < dma_chan_count; i++)
-                        free_irq(dma_irq[i], (void *) (i + 1));
-                return r;
-        }
        return 0;
 }
 arch_initcall(omap_init_dma);
 EXPORT_SYMBOL(omap_get_dma_src_pos);
 EXPORT_SYMBOL(omap_get_dma_dst_pos);
 EXPORT_SYMBOL(omap_get_dma_src_addr_counter);
@@ -1109,6 +1379,8 @@ EXPORT_SYMBOL(omap_set_dma_dest_index);
 EXPORT_SYMBOL(omap_set_dma_dest_data_pack);
 EXPORT_SYMBOL(omap_set_dma_dest_burst_mode);
+EXPORT_SYMBOL(omap_set_dma_params);
 EXPORT_SYMBOL(omap_dma_link_lch);
 EXPORT_SYMBOL(omap_dma_unlink_lch);
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 55059a24ad41..76f721d85137 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -140,7 +140,7 @@ static struct gpio_bank gpio_bank_1610[5] = {
 };
 #endif
-#ifdef CONFIG_ARCH_OMAP1510
+#ifdef CONFIG_ARCH_OMAP15XX
 static struct gpio_bank gpio_bank_1510[2] = {
        { OMAP_MPUIO_BASE,    INT_MPUIO,      IH_MPUIO_BASE, METHOD_MPUIO },
        { OMAP1510_GPIO_BASE, INT_GPIO_BANK1, IH_GPIO_BASE,  METHOD_GPIO_1510 }
@@ -173,7 +173,7 @@ static int gpio_bank_count;
 static inline struct gpio_bank *get_gpio_bank(int gpio)
 {
-#ifdef CONFIG_ARCH_OMAP1510
+#ifdef CONFIG_ARCH_OMAP15XX
        if (cpu_is_omap1510()) {
                if (OMAP_GPIO_IS_MPUIO(gpio))
                        return &gpio_bank[0];
@@ -222,7 +222,7 @@ static inline int gpio_valid(int gpio)
                        return -1;
                return 0;
        }
-#ifdef CONFIG_ARCH_OMAP1510
+#ifdef CONFIG_ARCH_OMAP15XX
        if (cpu_is_omap1510() && gpio < 16)
                return 0;
 #endif
@@ -654,7 +654,7 @@ int omap_request_gpio(int gpio)
        /* Set trigger to none. You need to enable the trigger after request_irq */
        _set_gpio_triggering(bank, get_gpio_index(gpio), IRQT_NOEDGE);
-#ifdef CONFIG_ARCH_OMAP1510
+#ifdef CONFIG_ARCH_OMAP15XX
        if (bank->method == METHOD_GPIO_1510) {
                void __iomem *reg;
@@ -739,7 +739,7 @@ static void gpio_irq_handler(unsigned int irq, struct irqdesc *desc,
        bank = (struct gpio_bank *) desc->data;
        if (bank->method == METHOD_MPUIO)
                isr_reg = bank->base + OMAP_MPUIO_GPIO_INT;
-#ifdef CONFIG_ARCH_OMAP1510
+#ifdef CONFIG_ARCH_OMAP15XX
        if (bank->method == METHOD_GPIO_1510)
                isr_reg = bank->base + OMAP1510_GPIO_INT_STATUS;
 #endif
@@ -774,7 +774,7 @@ static void gpio_irq_handler(unsigned int irq, struct irqdesc *desc,
                        d = irq_desc + gpio_irq;
                        desc_handle_irq(gpio_irq, d, regs);
                }
-        }
+        }
 }
 static void gpio_ack_irq(unsigned int irq)
@@ -837,8 +837,9 @@ static struct irqchip mpuio_irq_chip = {
        .unmask = mpuio_unmask_irq
 };
-static int initialized = 0;
+static int initialized;
-static struct clk * gpio_ck = NULL;
+static struct clk * gpio_ick;
+static struct clk * gpio_fck;
 static int __init _omap_gpio_init(void)
 {
@@ -848,14 +849,26 @@ static int __init _omap_gpio_init(void)
        initialized = 1;
        if (cpu_is_omap1510()) {
-                gpio_ck = clk_get(NULL, "arm_gpio_ck");
+                gpio_ick = clk_get(NULL, "arm_gpio_ck");
-                if (IS_ERR(gpio_ck))
+                if (IS_ERR(gpio_ick))
                        printk("Could not get arm_gpio_ck\n");
                else
-                        clk_use(gpio_ck);
+                        clk_use(gpio_ick);
+        }
+        if (cpu_is_omap24xx()) {
+                gpio_ick = clk_get(NULL, "gpios_ick");
+                if (IS_ERR(gpio_ick))
+                        printk("Could not get gpios_ick\n");
+                else
+                        clk_use(gpio_ick);
+                gpio_fck = clk_get(NULL, "gpios_fck");
+                if (IS_ERR(gpio_ick))
+                        printk("Could not get gpios_fck\n");
+                else
+                        clk_use(gpio_fck);
        }
-#ifdef CONFIG_ARCH_OMAP1510
+#ifdef CONFIG_ARCH_OMAP15XX
        if (cpu_is_omap1510()) {
                printk(KERN_INFO "OMAP1510 GPIO hardware\n");
                gpio_bank_count = 2;
@@ -901,7 +914,7 @@ static int __init _omap_gpio_init(void)
                if (bank->method == METHOD_MPUIO) {
                        omap_writew(0xFFFF, OMAP_MPUIO_BASE + OMAP_MPUIO_GPIO_MASKIT);
                }
-#ifdef CONFIG_ARCH_OMAP1510
+#ifdef CONFIG_ARCH_OMAP15XX
                if (bank->method == METHOD_GPIO_1510) {
                        __raw_writew(0xffff, bank->base + OMAP1510_GPIO_INT_MASK);
                        __raw_writew(0x0000, bank->base + OMAP1510_GPIO_INT_STATUS);
@@ -1038,6 +1051,7 @@ static struct sys_device omap_gpio_device = {
 /*
 * This may get called early from board specific init
+ * for boards that have interrupts routed via FPGA.
 */
 int omap_gpio_init(void)
 {
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index 9c9b7df3faf6..ea9475c86656 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -491,17 +491,20 @@ int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer, unsigned int leng
        omap_set_dma_transfer_params(mcbsp[id].dma_tx_lch,
                                     OMAP_DMA_DATA_TYPE_S16,
                                     length >> 1, 1,
-                                     OMAP_DMA_SYNC_ELEMENT);
+                                     OMAP_DMA_SYNC_ELEMENT,
+                                     0, 0);
        omap_set_dma_dest_params(mcbsp[id].dma_tx_lch,
                                 OMAP_DMA_PORT_TIPB,
                                 OMAP_DMA_AMODE_CONSTANT,
-                                 mcbsp[id].io_base + OMAP_MCBSP_REG_DXR1);
+                                 mcbsp[id].io_base + OMAP_MCBSP_REG_DXR1,
+                                 0, 0);
        omap_set_dma_src_params(mcbsp[id].dma_tx_lch,
                                OMAP_DMA_PORT_EMIFF,
                                OMAP_DMA_AMODE_POST_INC,
-                                buffer);
+                                buffer,
+                                0, 0);
        omap_start_dma(mcbsp[id].dma_tx_lch);
        wait_for_completion(&(mcbsp[id].tx_dma_completion));
@@ -531,17 +534,20 @@ int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer, unsigned int leng
        omap_set_dma_transfer_params(mcbsp[id].dma_rx_lch,
                                     OMAP_DMA_DATA_TYPE_S16,
                                     length >> 1, 1,
-                                     OMAP_DMA_SYNC_ELEMENT);
+                                     OMAP_DMA_SYNC_ELEMENT,
+                                     0, 0);
        omap_set_dma_src_params(mcbsp[id].dma_rx_lch,
                                OMAP_DMA_PORT_TIPB,
                                OMAP_DMA_AMODE_CONSTANT,
-                                mcbsp[id].io_base + OMAP_MCBSP_REG_DRR1);
+                                mcbsp[id].io_base + OMAP_MCBSP_REG_DRR1,
+                                0, 0);
        omap_set_dma_dest_params(mcbsp[id].dma_rx_lch,
                                 OMAP_DMA_PORT_EMIFF,
                                 OMAP_DMA_AMODE_POST_INC,
-                                 buffer);
+                                 buffer,
+                                 0, 0);
        omap_start_dma(mcbsp[id].dma_rx_lch);
        wait_for_completion(&(mcbsp[id].rx_dma_completion));
@@ -643,7 +649,7 @@ static const struct omap_mcbsp_info mcbsp_730[] = {
 };
 #endif
-#ifdef CONFIG_ARCH_OMAP1510
+#ifdef CONFIG_ARCH_OMAP15XX
 static const struct omap_mcbsp_info mcbsp_1510[] = {
        [0] = { .virt_base = OMAP1510_MCBSP1_BASE,
                .dma_rx_sync = OMAP_DMA_MCBSP1_RX,
@@ -712,7 +718,7 @@ static int __init omap_mcbsp_init(void)
                mcbsp_count = ARRAY_SIZE(mcbsp_730);
        }
 #endif
-#ifdef CONFIG_ARCH_OMAP1510
+#ifdef CONFIG_ARCH_OMAP15XX
        if (cpu_is_omap1510()) {
                mcbsp_info = mcbsp_1510;
                mcbsp_count = ARRAY_SIZE(mcbsp_1510);
diff --git a/arch/arm/plat-omap/mux.c b/arch/arm/plat-omap/mux.c
index 64482040f89e..8c1c016aa689 100644
--- a/arch/arm/plat-omap/mux.c
+++ b/arch/arm/plat-omap/mux.c
@@ -3,7 +3,7 @@
 *
 * Utility to set the Omap MUX and PULL_DWN registers from a table in mux.h
 *
- * Copyright (C) 2003 Nokia Corporation
+ * Copyright (C) 2003 - 2005 Nokia Corporation
 *
 * Written by Tony Lindgren <tony.lindgren@nokia.com>
 *
@@ -25,38 +25,74 @@
 #include <linux/config.h>
 #include <linux/module.h>
 #include <linux/init.h>
+#include <linux/kernel.h>
 #include <asm/system.h>
 #include <asm/io.h>
 #include <linux/spinlock.h>
-#define __MUX_C__
 #include <asm/arch/mux.h>
 #ifdef CONFIG_OMAP_MUX
+#define OMAP24XX_L4_BASE        0x48000000
+#define OMAP24XX_PULL_ENA       (1 << 3)
+#define OMAP24XX_PULL_UP        (1 << 4)
+static struct pin_config * pin_table;
+static unsigned long pin_table_sz;
+extern struct pin_config * omap730_pins;
+extern struct pin_config * omap1xxx_pins;
+extern struct pin_config * omap24xx_pins;
+int __init omap_mux_register(struct pin_config * pins, unsigned long size)
+{
+        pin_table = pins;
+        pin_table_sz = size;
+        return 0;
+}
 /*
 * Sets the Omap MUX and PULL_DWN registers based on the table
 */
-int __init_or_module
+int __init_or_module omap_cfg_reg(const unsigned long index)
-omap_cfg_reg(const reg_cfg_t reg_cfg)
 {
        static DEFINE_SPINLOCK(mux_spin_lock);
        unsigned long flags;
-        reg_cfg_set *cfg;
+        struct pin_config *cfg;
        unsigned int reg_orig = 0, reg = 0, pu_pd_orig = 0, pu_pd = 0,
                pull_orig = 0, pull = 0;
        unsigned int mask, warn = 0;
-        if (cpu_is_omap7xx())
+        if (!pin_table)
-                return 0;
+                BUG();
-        if (reg_cfg > ARRAY_SIZE(reg_cfg_table)) {
+        if (index >= pin_table_sz) {
-                printk(KERN_ERR "MUX: reg_cfg %d\n", reg_cfg);
+                printk(KERN_ERR "Invalid pin mux index: %lu (%lu)\n",
-                return -EINVAL;
+                       index, pin_table_sz);
+                dump_stack();
+                return -ENODEV;
        }
-        cfg = (reg_cfg_set *)&reg_cfg_table[reg_cfg];
+        cfg = (struct pin_config *)&pin_table[index];
+        if (cpu_is_omap24xx()) {
+                u8 reg = 0;
+                reg |= cfg->mask & 0x7;
+                if (cfg->pull_val)
+                        reg |= OMAP24XX_PULL_ENA;
+                if(cfg->pu_pd_val)
+                        reg |= OMAP24XX_PULL_UP;
+#ifdef CONFIG_OMAP_MUX_DEBUG
+                printk("Muxing %s (0x%08x): 0x%02x -> 0x%02x\n",
+                       cfg->name, OMAP24XX_L4_BASE + cfg->mux_reg,
+                       omap_readb(OMAP24XX_L4_BASE + cfg->mux_reg), reg);
+#endif
+                omap_writeb(reg, OMAP24XX_L4_BASE + cfg->mux_reg);
+                return 0;
+        }
        /* Check the mux register in question */
        if (cfg->mux_reg) {
@@ -157,7 +193,8 @@ omap_cfg_reg(const reg_cfg_t reg_cfg)
        return 0;
 #endif
 }
 EXPORT_SYMBOL(omap_cfg_reg);
+#else
+#define omap_mux_init() do {} while(0)
+#define omap_cfg_reg(x) do {} while(0)
 #endif  /* CONFIG_OMAP_MUX */
diff --git a/arch/arm/plat-omap/ocpi.c b/arch/arm/plat-omap/ocpi.c
index 1fb16f9edfd5..2ede2ee8cae4 100644
--- a/arch/arm/plat-omap/ocpi.c
+++ b/arch/arm/plat-omap/ocpi.c
@@ -25,7 +25,6 @@
 #include <linux/config.h>
 #include <linux/module.h>
-#include <linux/version.h>
 #include <linux/types.h>
 #include <linux/errno.h>
 #include <linux/kernel.h>
diff --git a/arch/arm/plat-omap/pm.c b/arch/arm/plat-omap/pm.c
index e15c6c1ddec9..966cca031ca7 100644
--- a/arch/arm/plat-omap/pm.c
+++ b/arch/arm/plat-omap/pm.c
@@ -54,11 +54,12 @@
 #include <asm/arch/tps65010.h>
 #include <asm/arch/dsp_common.h>
-#include "clock.h"
+#include <asm/arch/clock.h>
-#include "sram.h"
+#include <asm/arch/sram.h>
 static unsigned int arm_sleep_save[ARM_SLEEP_SAVE_SIZE];
 static unsigned short ulpd_sleep_save[ULPD_SLEEP_SAVE_SIZE];
+static unsigned int mpui730_sleep_save[MPUI730_SLEEP_SAVE_SIZE];
 static unsigned int mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_SIZE];
 static unsigned int mpui1610_sleep_save[MPUI1610_SLEEP_SAVE_SIZE];
@@ -120,8 +121,8 @@ void omap_pm_idle(void)
 */
 static void omap_pm_wakeup_setup(void)
 {
-        u32 level1_wake = OMAP_IRQ_BIT(INT_IH2_IRQ);
+        u32 level1_wake = 0;
-        u32 level2_wake = OMAP_IRQ_BIT(INT_UART2) | OMAP_IRQ_BIT(INT_KEYBOARD);
+        u32 level2_wake = OMAP_IRQ_BIT(INT_UART2);
        /*
         * Turn off all interrupts except GPIO bank 1, L1-2nd level cascade,
@@ -129,19 +130,29 @@ static void omap_pm_wakeup_setup(void)
         * drivers must still separately call omap_set_gpio_wakeup() to
         * wake up to a GPIO interrupt.
         */
-        if (cpu_is_omap1510() || cpu_is_omap16xx())
+        if (cpu_is_omap730())
-                level1_wake |= OMAP_IRQ_BIT(INT_GPIO_BANK1);
+                level1_wake = OMAP_IRQ_BIT(INT_730_GPIO_BANK1) |
-        else if (cpu_is_omap730())
+                        OMAP_IRQ_BIT(INT_730_IH2_IRQ);
-                level1_wake |= OMAP_IRQ_BIT(INT_730_GPIO_BANK1);
+        else if (cpu_is_omap1510())
+                level1_wake = OMAP_IRQ_BIT(INT_GPIO_BANK1) |
+                        OMAP_IRQ_BIT(INT_1510_IH2_IRQ);
+        else if (cpu_is_omap16xx())
+                level1_wake = OMAP_IRQ_BIT(INT_GPIO_BANK1) |
+                        OMAP_IRQ_BIT(INT_1610_IH2_IRQ);
        omap_writel(~level1_wake, OMAP_IH1_MIR);
-        if (cpu_is_omap1510())
+        if (cpu_is_omap730()) {
+                omap_writel(~level2_wake, OMAP_IH2_0_MIR);
+                omap_writel(~(OMAP_IRQ_BIT(INT_730_WAKE_UP_REQ) | OMAP_IRQ_BIT(INT_730_MPUIO_KEYPAD)), OMAP_IH2_1_MIR);
+        } else if (cpu_is_omap1510()) {
+                level2_wake |= OMAP_IRQ_BIT(INT_KEYBOARD);
                omap_writel(~level2_wake,  OMAP_IH2_MIR);
+        } else if (cpu_is_omap16xx()) {
-        /* INT_1610_WAKE_UP_REQ is needed for GPIO wakeup... */
+                level2_wake |= OMAP_IRQ_BIT(INT_KEYBOARD);
-        if (cpu_is_omap16xx()) {
                omap_writel(~level2_wake, OMAP_IH2_0_MIR);
+                /* INT_1610_WAKE_UP_REQ is needed for GPIO wakeup... */
                omap_writel(~OMAP_IRQ_BIT(INT_1610_WAKE_UP_REQ), OMAP_IH2_1_MIR);
                omap_writel(~0x0, OMAP_IH2_2_MIR);
                omap_writel(~0x0, OMAP_IH2_3_MIR);
@@ -185,7 +196,17 @@ void omap_pm_suspend(void)
         * Save interrupt, MPUI, ARM and UPLD control registers.
         */
-        if (cpu_is_omap1510()) {
+        if (cpu_is_omap730()) {
+                MPUI730_SAVE(OMAP_IH1_MIR);
+                MPUI730_SAVE(OMAP_IH2_0_MIR);
+                MPUI730_SAVE(OMAP_IH2_1_MIR);
+                MPUI730_SAVE(MPUI_CTRL);
+                MPUI730_SAVE(MPUI_DSP_BOOT_CONFIG);
+                MPUI730_SAVE(MPUI_DSP_API_CONFIG);
+                MPUI730_SAVE(EMIFS_CONFIG);
+                MPUI730_SAVE(EMIFF_SDRAM_CONFIG);
+        } else if (cpu_is_omap1510()) {
                MPUI1510_SAVE(OMAP_IH1_MIR);
                MPUI1510_SAVE(OMAP_IH2_MIR);
                MPUI1510_SAVE(MPUI_CTRL);
@@ -280,7 +301,13 @@ void omap_pm_suspend(void)
        ULPD_RESTORE(ULPD_CLOCK_CTRL);
        ULPD_RESTORE(ULPD_STATUS_REQ);
-        if (cpu_is_omap1510()) {
+        if (cpu_is_omap730()) {
+                MPUI730_RESTORE(EMIFS_CONFIG);
+                MPUI730_RESTORE(EMIFF_SDRAM_CONFIG);
+                MPUI730_RESTORE(OMAP_IH1_MIR);
+                MPUI730_RESTORE(OMAP_IH2_0_MIR);
+                MPUI730_RESTORE(OMAP_IH2_1_MIR);
+        } else if (cpu_is_omap1510()) {
                MPUI1510_RESTORE(MPUI_CTRL);
                MPUI1510_RESTORE(MPUI_DSP_BOOT_CONFIG);
                MPUI1510_RESTORE(MPUI_DSP_API_CONFIG);
@@ -355,7 +382,14 @@ static int omap_pm_read_proc(
        ULPD_SAVE(ULPD_DPLL_CTRL);
        ULPD_SAVE(ULPD_POWER_CTRL);
-        if (cpu_is_omap1510()) {
+        if (cpu_is_omap730()) {
+                MPUI730_SAVE(MPUI_CTRL);
+                MPUI730_SAVE(MPUI_DSP_STATUS);
+                MPUI730_SAVE(MPUI_DSP_BOOT_CONFIG);
+                MPUI730_SAVE(MPUI_DSP_API_CONFIG);
+                MPUI730_SAVE(EMIFF_SDRAM_CONFIG);
+                MPUI730_SAVE(EMIFS_CONFIG);
+        } else if (cpu_is_omap1510()) {
                MPUI1510_SAVE(MPUI_CTRL);
                MPUI1510_SAVE(MPUI_DSP_STATUS);
                MPUI1510_SAVE(MPUI_DSP_BOOT_CONFIG);
@@ -404,7 +438,21 @@ static int omap_pm_read_proc(
                   ULPD_SHOW(ULPD_STATUS_REQ),
                   ULPD_SHOW(ULPD_POWER_CTRL));
-                if (cpu_is_omap1510()) {
+                if (cpu_is_omap730()) {
+                        my_buffer_offset += sprintf(my_base + my_buffer_offset,
+                           "MPUI730_CTRL_REG         0x%-8x \n"
+                           "MPUI730_DSP_STATUS_REG:      0x%-8x \n"
+                           "MPUI730_DSP_BOOT_CONFIG_REG: 0x%-8x \n"
+         "MPUI730_DSP_API_CONFIG_REG:  0x%-8x \n"
+         "MPUI730_SDRAM_CONFIG_REG:    0x%-8x \n"
+         "MPUI730_EMIFS_CONFIG_REG:    0x%-8x \n",
+         MPUI730_SHOW(MPUI_CTRL),
+         MPUI730_SHOW(MPUI_DSP_STATUS),
+         MPUI730_SHOW(MPUI_DSP_BOOT_CONFIG),
+         MPUI730_SHOW(MPUI_DSP_API_CONFIG),
+         MPUI730_SHOW(EMIFF_SDRAM_CONFIG),
+         MPUI730_SHOW(EMIFS_CONFIG));
+                } else if (cpu_is_omap1510()) {
                        my_buffer_offset += sprintf(my_base + my_buffer_offset,
                           "MPUI1510_CTRL_REG             0x%-8x \n"
                           "MPUI1510_DSP_STATUS_REG:      0x%-8x \n"
@@ -553,7 +601,12 @@ static int __init omap_pm_init(void)
         * These routines need to be in SRAM as that's the only
         * memory the MPU can see when it wakes up.
         */
-        if (cpu_is_omap1510()) {
+        if (cpu_is_omap730()) {
+                omap_sram_idle = omap_sram_push(omap730_idle_loop_suspend,
+                                                omap730_idle_loop_suspend_sz);
+                omap_sram_suspend = omap_sram_push(omap730_cpu_suspend,
+         omap730_cpu_suspend_sz);
+        } else if (cpu_is_omap1510()) {
                omap_sram_idle = omap_sram_push(omap1510_idle_loop_suspend,
                                                omap1510_idle_loop_suspend_sz);
                omap_sram_suspend = omap_sram_push(omap1510_cpu_suspend,
@@ -572,7 +625,11 @@ static int __init omap_pm_init(void)
        pm_idle = omap_pm_idle;
-        setup_irq(INT_1610_WAKE_UP_REQ, &omap_wakeup_irq);
+        if (cpu_is_omap730())
+                setup_irq(INT_730_WAKE_UP_REQ, &omap_wakeup_irq);
+        else if (cpu_is_omap16xx())
+                setup_irq(INT_1610_WAKE_UP_REQ, &omap_wakeup_irq);
 #if 0
        /* --- BEGIN BOARD-DEPENDENT CODE --- */
        /* Sleepx mask direction */
@@ -591,7 +648,9 @@ static int __init omap_pm_init(void)
        omap_writew(ULPD_POWER_CTRL_REG_VAL, ULPD_POWER_CTRL);
        /* Configure IDLECT3 */
-        if (cpu_is_omap16xx())
+        if (cpu_is_omap730())
+                omap_writel(OMAP730_IDLECT3_VAL, OMAP730_IDLECT3);
+        else if (cpu_is_omap16xx())
                omap_writel(OMAP1610_IDLECT3_VAL, OMAP1610_IDLECT3);
        pm_set_ops(&omap_pm_ops);
@@ -600,8 +659,10 @@ static int __init omap_pm_init(void)
        omap_pm_init_proc();
 #endif
-        /* configure LOW_PWR pin */
+        if (cpu_is_omap16xx()) {
-        omap_cfg_reg(T20_1610_LOW_PWR);
+                /* configure LOW_PWR pin */
+                omap_cfg_reg(T20_1610_LOW_PWR);
+        }
        return 0;
 }
diff --git a/arch/arm/plat-omap/sleep.S b/arch/arm/plat-omap/sleep.S
index 9f745836f6aa..4cd7d292f854 100644
--- a/arch/arm/plat-omap/sleep.S
+++ b/arch/arm/plat-omap/sleep.S
@@ -1,7 +1,7 @@
 /*
 * linux/arch/arm/plat-omap/sleep.S
 *
- * Low-level OMAP1510/1610 sleep/wakeUp support
+ * Low-level OMAP730/1510/1610 sleep/wakeUp support
 *
 * Initial SA1110 code:
 * Copyright (c) 2001 Cliff Brake <cbrake@accelent.com>
@@ -52,7 +52,57 @@
 *       processor specific functions here.
 */
-#ifdef CONFIG_ARCH_OMAP1510
+#if defined(CONFIG_ARCH_OMAP730)
+ENTRY(omap730_idle_loop_suspend)
+        stmfd   sp!, {r0 - r12, lr}             @ save registers on stack
+        @ load base address of ARM_IDLECT1 and ARM_IDLECT2
+        mov     r4, #CLKGEN_REG_ASM_BASE & 0xff000000
+        orr     r4, r4, #CLKGEN_REG_ASM_BASE & 0x00ff0000
+        orr     r4, r4, #CLKGEN_REG_ASM_BASE & 0x0000ff00
+        @ turn off clock domains
+        @ get ARM_IDLECT2 into r2
+        ldrh    r2, [r4, #ARM_IDLECT2_ASM_OFFSET & 0xff]
+        mov     r5, #OMAP730_IDLECT2_SLEEP_VAL & 0xff
+        orr     r5, r5, #OMAP730_IDLECT2_SLEEP_VAL & 0xff00
+        strh    r5, [r4, #ARM_IDLECT2_ASM_OFFSET & 0xff]
+        @ request ARM idle
+        @ get ARM_IDLECT1 into r1
+        ldrh    r1, [r4, #ARM_IDLECT1_ASM_OFFSET & 0xff]
+        orr     r3, r1, #OMAP730_IDLE_LOOP_REQUEST & 0xffff
+        strh    r3, [r4, #ARM_IDLECT1_ASM_OFFSET & 0xff]
+        mov     r5, #IDLE_WAIT_CYCLES & 0xff
+        orr     r5, r5, #IDLE_WAIT_CYCLES & 0xff00
+l_730:  subs    r5, r5, #1
+        bne     l_730
+/*
+ * Let's wait for the next clock tick to wake us up.
+ */
+        mov     r0, #0
+        mcr     p15, 0, r0, c7, c0, 4           @ wait for interrupt
+/*
+ * omap730_idle_loop_suspend()'s resume point.
+ *
+ * It will just start executing here, so we'll restore stuff from the
+ * stack, reset the ARM_IDLECT1 and ARM_IDLECT2.
+ */
+        @ restore ARM_IDLECT1 and ARM_IDLECT2 and return
+        @ r1 has ARM_IDLECT1 and r2 still has ARM_IDLECT2
+        strh    r2, [r4, #ARM_IDLECT2_ASM_OFFSET & 0xff]
+        strh    r1, [r4, #ARM_IDLECT1_ASM_OFFSET & 0xff]
+        ldmfd   sp!, {r0 - r12, pc}             @ restore regs and return
+ENTRY(omap730_idle_loop_suspend_sz)
+        .word   . - omap730_idle_loop_suspend
+#endif /* CONFIG_ARCH_OMAP730 */
+#ifdef CONFIG_ARCH_OMAP15XX
 ENTRY(omap1510_idle_loop_suspend)
        stmfd   sp!, {r0 - r12, lr}             @ save registers on stack
@@ -100,7 +150,7 @@ l_1510:	subs	r5, r5, #1
 ENTRY(omap1510_idle_loop_suspend_sz)
        .word   . - omap1510_idle_loop_suspend
-#endif /* CONFIG_ARCH_OMAP1510 */
+#endif /* CONFIG_ARCH_OMAP15XX */
 #if defined(CONFIG_ARCH_OMAP16XX)
 ENTRY(omap1610_idle_loop_suspend)
@@ -169,7 +219,86 @@ ENTRY(omap1610_idle_loop_suspend_sz)
 *
 */
-#ifdef CONFIG_ARCH_OMAP1510
+#if defined(CONFIG_ARCH_OMAP730)
+ENTRY(omap730_cpu_suspend)
+        @ save registers on stack
+        stmfd   sp!, {r0 - r12, lr}
+        @ Drain write cache
+        mov     r4, #0
+        mcr     p15, 0, r0, c7, c10, 4
+        nop
+        @ load base address of Traffic Controller
+        mov     r6, #TCMIF_ASM_BASE & 0xff000000
+        orr     r6, r6, #TCMIF_ASM_BASE & 0x00ff0000
+        orr     r6, r6, #TCMIF_ASM_BASE & 0x0000ff00
+        @ prepare to put SDRAM into self-refresh manually
+        ldr     r7, [r6, #EMIFF_SDRAM_CONFIG_ASM_OFFSET & 0xff]
+        orr     r9, r7, #SELF_REFRESH_MODE & 0xff000000
+        orr     r9, r9, #SELF_REFRESH_MODE & 0x000000ff
+        str     r9, [r6, #EMIFF_SDRAM_CONFIG_ASM_OFFSET & 0xff]
+        @ prepare to put EMIFS to Sleep
+        ldr     r8, [r6, #EMIFS_CONFIG_ASM_OFFSET & 0xff]
+        orr     r9, r8, #IDLE_EMIFS_REQUEST & 0xff
+        str     r9, [r6, #EMIFS_CONFIG_ASM_OFFSET & 0xff]
+        @ load base address of ARM_IDLECT1 and ARM_IDLECT2
+        mov     r4, #CLKGEN_REG_ASM_BASE & 0xff000000
+        orr     r4, r4, #CLKGEN_REG_ASM_BASE & 0x00ff0000
+        orr     r4, r4, #CLKGEN_REG_ASM_BASE & 0x0000ff00
+        @ turn off clock domains
+        @ do not disable PERCK (0x04)
+        mov     r5, #OMAP730_IDLECT2_SLEEP_VAL & 0xff
+        orr     r5, r5, #OMAP730_IDLECT2_SLEEP_VAL & 0xff00
+        strh    r5, [r4, #ARM_IDLECT2_ASM_OFFSET & 0xff]
+        @ request ARM idle
+        mov     r3, #OMAP730_IDLECT1_SLEEP_VAL & 0xff
+        orr     r3, r3, #OMAP730_IDLECT1_SLEEP_VAL & 0xff00
+        strh    r3, [r4, #ARM_IDLECT1_ASM_OFFSET & 0xff]
+        @ disable instruction cache
+        mrc     p15, 0, r9, c1, c0, 0
+        bic     r2, r9, #0x1000
+        mcr     p15, 0, r2, c1, c0, 0
+        nop
+/*
+ * Let's wait for the next wake up event to wake us up. r0 can't be
+ * used here because r0 holds ARM_IDLECT1
+ */
+        mov     r2, #0
+        mcr     p15, 0, r2, c7, c0, 4           @ wait for interrupt
+/*
+ * omap730_cpu_suspend()'s resume point.
+ *
+ * It will just start executing here, so we'll restore stuff from the
+ * stack.
+ */
+        @ re-enable Icache
+        mcr     p15, 0, r9, c1, c0, 0
+        @ reset the ARM_IDLECT1 and ARM_IDLECT2.
+        strh    r1, [r4, #ARM_IDLECT2_ASM_OFFSET & 0xff]
+        strh    r0, [r4, #ARM_IDLECT1_ASM_OFFSET & 0xff]
+        @ Restore EMIFF controls
+        str     r7, [r6, #EMIFF_SDRAM_CONFIG_ASM_OFFSET & 0xff]
+        str     r8, [r6, #EMIFS_CONFIG_ASM_OFFSET & 0xff]
+        @ restore regs and return
+        ldmfd   sp!, {r0 - r12, pc}
+ENTRY(omap730_cpu_suspend_sz)
+        .word   . - omap730_cpu_suspend
+#endif /* CONFIG_ARCH_OMAP730 */
+#ifdef CONFIG_ARCH_OMAP15XX
 ENTRY(omap1510_cpu_suspend)
        @ save registers on stack
@@ -241,7 +370,7 @@ l_1510_2:
 ENTRY(omap1510_cpu_suspend_sz)
        .word   . - omap1510_cpu_suspend
-#endif /* CONFIG_ARCH_OMAP1510 */
+#endif /* CONFIG_ARCH_OMAP15XX */
 #if defined(CONFIG_ARCH_OMAP16XX)
 ENTRY(omap1610_cpu_suspend)
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 7ad69f14a3e7..792f66375830 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -20,10 +20,13 @@
 #include <asm/io.h>
 #include <asm/cacheflush.h>
-#include "sram.h"
+#include <asm/arch/sram.h>
+#define OMAP1_SRAM_PA           0x20000000
+#define OMAP1_SRAM_VA           0xd0000000
+#define OMAP2_SRAM_PA           0x40200000
+#define OMAP2_SRAM_VA           0xd0000000
-#define OMAP1_SRAM_BASE         0xd0000000
-#define OMAP1_SRAM_START        0x20000000
 #define SRAM_BOOTLOADER_SZ      0x80
 static unsigned long omap_sram_base;
@@ -31,37 +34,40 @@ static unsigned long omap_sram_size;
 static unsigned long omap_sram_ceil;
 /*
- * The amount of SRAM depends on the core type:
+ * The amount of SRAM depends on the core type.
- * 730 = 200K, 1510 = 512K, 5912 = 256K, 1610 = 16K, 1710 = 16K
 * Note that we cannot try to test for SRAM here because writes
 * to secure SRAM will hang the system. Also the SRAM is not
 * yet mapped at this point.
 */
 void __init omap_detect_sram(void)
 {
-        omap_sram_base = OMAP1_SRAM_BASE;
+        if (!cpu_is_omap24xx())
+                omap_sram_base = OMAP1_SRAM_VA;
+        else
+                omap_sram_base = OMAP2_SRAM_VA;
        if (cpu_is_omap730())
-                omap_sram_size = 0x32000;
+                omap_sram_size = 0x32000;       /* 200K */
-        else if (cpu_is_omap1510())
+        else if (cpu_is_omap15xx())
-                omap_sram_size = 0x80000;
+                omap_sram_size = 0x30000;       /* 192K */
        else if (cpu_is_omap1610() || cpu_is_omap1621() || cpu_is_omap1710())
-                omap_sram_size = 0x4000;
+                omap_sram_size = 0x4000;        /* 16K */
        else if (cpu_is_omap1611())
-                omap_sram_size = 0x3e800;
+                omap_sram_size = 0x3e800;       /* 250K */
+        else if (cpu_is_omap2420())
+                omap_sram_size = 0xa0014;       /* 640K */
        else {
                printk(KERN_ERR "Could not detect SRAM size\n");
                omap_sram_size = 0x4000;
        }
-        printk(KERN_INFO "SRAM size: 0x%lx\n", omap_sram_size);
        omap_sram_ceil = omap_sram_base + omap_sram_size;
 }
 static struct map_desc omap_sram_io_desc[] __initdata = {
        {       /* .length gets filled in at runtime */
-                .virtual        = OMAP1_SRAM_BASE,
+                .virtual        = OMAP1_SRAM_VA,
-                .pfn            = __phys_to_pfn(OMAP1_SRAM_START),
+                .pfn            = __phys_to_pfn(OMAP1_SRAM_PA),
                .type           = MT_DEVICE
        }
 };
@@ -76,10 +82,19 @@ void __init omap_map_sram(void)
        if (omap_sram_size == 0)
                return;
+        if (cpu_is_omap24xx()) {
+                omap_sram_io_desc[0].virtual = OMAP2_SRAM_VA;
+                omap_sram_io_desc[0].pfn = __phys_to_pfn(OMAP2_SRAM_PA);
+        }
        omap_sram_io_desc[0].length = (omap_sram_size + PAGE_SIZE-1)/PAGE_SIZE;
        omap_sram_io_desc[0].length *= PAGE_SIZE;
        iotable_init(omap_sram_io_desc, ARRAY_SIZE(omap_sram_io_desc));
+        printk(KERN_INFO "SRAM: Mapped pa 0x%08lx to va 0x%08lx size: 0x%lx\n",
+               omap_sram_io_desc[0].pfn, omap_sram_io_desc[0].virtual,
+               omap_sram_io_desc[0].length);
        /*
         * Looks like we need to preserve some bootloader code at the
         * beginning of SRAM for jumping to flash for reboot to work...
@@ -88,16 +103,6 @@ void __init omap_map_sram(void)
               omap_sram_size - SRAM_BOOTLOADER_SZ);
 }
-static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl) = NULL;
-void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl)
-{
-        if (_omap_sram_reprogram_clock == NULL)
-                panic("Cannot use SRAM");
-        return _omap_sram_reprogram_clock(dpllctl, ckctl);
-}
 void * omap_sram_push(void * start, unsigned long size)
 {
        if (size > (omap_sram_ceil - (omap_sram_base + SRAM_BOOTLOADER_SZ))) {
@@ -111,10 +116,94 @@ void * omap_sram_push(void * start, unsigned long size)
        return (void *)omap_sram_ceil;
 }
-void __init omap_sram_init(void)
+static void omap_sram_error(void)
+{
+        panic("Uninitialized SRAM function\n");
+}
+#ifdef CONFIG_ARCH_OMAP1
+static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl);
+void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl)
+{
+        if (!_omap_sram_reprogram_clock)
+                omap_sram_error();
+        return _omap_sram_reprogram_clock(dpllctl, ckctl);
+}
+int __init omap1_sram_init(void)
 {
-        omap_detect_sram();
-        omap_map_sram();
        _omap_sram_reprogram_clock = omap_sram_push(sram_reprogram_clock,
                                                    sram_reprogram_clock_sz);
+        return 0;
+}
+#else
+#define omap1_sram_init()       do {} while (0)
+#endif
+#ifdef CONFIG_ARCH_OMAP2
+static void (*_omap2_sram_ddr_init)(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
+                              u32 base_cs, u32 force_unlock);
+void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
+                   u32 base_cs, u32 force_unlock)
+{
+        if (!_omap2_sram_ddr_init)
+                omap_sram_error();
+        return _omap2_sram_ddr_init(slow_dll_ctrl, fast_dll_ctrl,
+                                    base_cs, force_unlock);
+}
+static void (*_omap2_sram_reprogram_sdrc)(u32 perf_level, u32 dll_val,
+                                          u32 mem_type);
+void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type)
+{
+        if (!_omap2_sram_reprogram_sdrc)
+                omap_sram_error();
+        return _omap2_sram_reprogram_sdrc(perf_level, dll_val, mem_type);
+}
+static u32 (*_omap2_set_prcm)(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
+u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass)
+{
+        if (!_omap2_set_prcm)
+                omap_sram_error();
+        return _omap2_set_prcm(dpll_ctrl_val, sdrc_rfr_val, bypass);
+}
+int __init omap2_sram_init(void)
+{
+        _omap2_sram_ddr_init = omap_sram_push(sram_ddr_init, sram_ddr_init_sz);
+        _omap2_sram_reprogram_sdrc = omap_sram_push(sram_reprogram_sdrc,
+                                                    sram_reprogram_sdrc_sz);
+        _omap2_set_prcm = omap_sram_push(sram_set_prcm, sram_set_prcm_sz);
+        return 0;
+}
+#else
+#define omap2_sram_init()       do {} while (0)
+#endif
+int __init omap_sram_init(void)
+{
+        omap_detect_sram();
+        omap_map_sram();
+        if (!cpu_is_omap24xx())
+                omap1_sram_init();
+        else
+                omap2_sram_init();
+        return 0;
 }
diff --git a/arch/arm/plat-omap/sram.h b/arch/arm/plat-omap/sram.h
deleted file mode 100644
index 71984efa6ae8..000000000000
--- a/arch/arm/plat-omap/sram.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * linux/arch/arm/plat-omap/sram.h
- *
- * Interface for functions that need to be run in internal SRAM
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __ARCH_ARM_OMAP_SRAM_H
-#define __ARCH_ARM_OMAP_SRAM_H
-extern void * omap_sram_push(void * start, unsigned long size);
-extern void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl);
-/* Do not use these */
-extern void sram_reprogram_clock(u32 ckctl, u32 dpllctl);
-extern unsigned long sram_reprogram_clock_sz;
-#endif
diff --git a/arch/arm/plat-omap/usb.c b/arch/arm/plat-omap/usb.c
index 205e2d0b826d..00afc7a8c2ab 100644
--- a/arch/arm/plat-omap/usb.c
+++ b/arch/arm/plat-omap/usb.c
@@ -91,6 +91,8 @@ EXPORT_SYMBOL(otg_set_transceiver);
 /*-------------------------------------------------------------------------*/
+#if defined(CONFIG_ARCH_OMAP_OTG) || defined(CONFIG_ARCH_OMAP15XX)
 static u32 __init omap_usb0_init(unsigned nwires, unsigned is_device)
 {
        u32     syscon1 = 0;
@@ -271,6 +273,8 @@ static u32 __init omap_usb2_init(unsigned nwires, unsigned alt_pingroup)
        return syscon1 << 24;
 }
+#endif
 /*-------------------------------------------------------------------------*/
 #if     defined(CONFIG_USB_GADGET_OMAP) || \
@@ -494,7 +498,7 @@ static inline void omap_otg_init(struct omap_usb_config *config) {}
 /*-------------------------------------------------------------------------*/
-#ifdef  CONFIG_ARCH_OMAP1510
+#ifdef  CONFIG_ARCH_OMAP15XX
 #define ULPD_DPLL_CTRL_REG      __REG16(ULPD_DPLL_CTRL)
 #define DPLL_IOB                (1 << 13)
@@ -507,7 +511,6 @@ static inline void omap_otg_init(struct omap_usb_config *config) {}
 static void __init omap_1510_usb_init(struct omap_usb_config *config)
 {
-        int status;
        unsigned int val;
        omap_usb0_init(config->pins[0], is_usb0_device(config));
@@ -539,6 +542,8 @@ static void __init omap_1510_usb_init(struct omap_usb_config *config)
 #ifdef  CONFIG_USB_GADGET_OMAP
        if (config->register_dev) {
+                int status;
                udc_device.dev.platform_data = config;
                status = platform_device_register(&udc_device);
                if (status)
@@ -549,6 +554,8 @@ static void __init omap_1510_usb_init(struct omap_usb_config *config)
 #if     defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
        if (config->register_host) {
+                int status;
                ohci_device.dev.platform_data = config;
                status = platform_device_register(&ohci_device);
                if (status)
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index ae7c64b8cec3..048c9c19aa4f 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -12,7 +12,7 @@
 #
 #   http://www.arm.linux.org.uk/developer/machines/?action=new
 #
-# Last update: Mon Oct 10 09:46:25 2005
+# Last update: Fri Nov 11 21:55:04 2005
 #
 # machine_is_xxx        CONFIG_xxxx             MACH_TYPE_xxx           number
 #
@@ -460,7 +460,7 @@ esl_sarva		MACH_ESL_SARVA		ESL_SARVA		443
 xm250                   MACH_XM250              XM250                   444
 t6tc1xb                 MACH_T6TC1XB            T6TC1XB                 445
 ess710                  MACH_ESS710             ESS710                  446
-mx31ads                 MACH_MX3ADS             MX3ADS                  447
+mx31ads                 MACH_MX31ADS            MX31ADS                 447
 himalaya                MACH_HIMALAYA           HIMALAYA                448
 bolfenk                 MACH_BOLFENK            BOLFENK                 449
 at91rm9200kr            MACH_AT91RM9200KR       AT91RM9200KR            450
@@ -802,7 +802,7 @@ cpuat91			MACH_CPUAT91		CPUAT91			787
 rea9200                 MACH_REA9200            REA9200                 788
 acts_pune_sa1110        MACH_ACTS_PUNE_SA1110   ACTS_PUNE_SA1110        789
 ixp425                  MACH_IXP425             IXP425                  790
-argonplusodyssey        MACH_ODYSSEY            ODYSSEY                 791
+argonplusodyssey        MACH_ARGONPLUSODYSSEY   ARGONPLUSODYSSEY        791
 perch                   MACH_PERCH              PERCH                   792
 eis05r1                 MACH_EIS05R1            EIS05R1                 793
 pepperpad               MACH_PEPPERPAD          PEPPERPAD               794
@@ -816,7 +816,7 @@ iq_nextgen_c		MACH_IQ_NEXTGEN_C	IQ_NEXTGEN_C		801
 iq_nextgen_d            MACH_IQ_NEXTGEN_D       IQ_NEXTGEN_D            802
 iq_nextgen_e            MACH_IQ_NEXTGEN_E       IQ_NEXTGEN_E            803
 mallow_at91             MACH_MALLOW_AT91        MALLOW_AT91             804
-cybertracker            MACH_CYBERTRACKER       CYBERTRACKER            805
+cybertracker_i          MACH_CYBERTRACKER_I     CYBERTRACKER_I          805
 gesbc931x               MACH_GESBC931X          GESBC931X               806
 centipad                MACH_CENTIPAD           CENTIPAD                807
 armsoc                  MACH_ARMSOC             ARMSOC                  808
@@ -869,3 +869,38 @@ davinci_dvdp		MACH_DAVINCI_DVDP	DAVINCI_DVDP		854
 htcuniversal            MACH_HTCUNIVERSAL       HTCUNIVERSAL            855
 tpad                    MACH_TPAD               TPAD                    856
 roverp3                 MACH_ROVERP3            ROVERP3                 857
+jornada928              MACH_JORNADA928         JORNADA928              858
+mv88fxx81               MACH_MV88FXX81          MV88FXX81               859
+stmp36xx                MACH_STMP36XX           STMP36XX                860
+sxni79524               MACH_SXNI79524          SXNI79524               861
+ams_delta               MACH_AMS_DELTA          AMS_DELTA               862
+uranium                 MACH_URANIUM            URANIUM                 863
+ucon                    MACH_UCON               UCON                    864
+nas100d                 MACH_NAS100D            NAS100D                 865
+l083                    MACH_L083_1000          L083_1000               866
+ezx                     MACH_EZX                EZX                     867
+pnx5220                 MACH_PNX5220            PNX5220                 868
+butte                   MACH_BUTTE              BUTTE                   869
+srm2                    MACH_SRM2               SRM2                    870
+dsbr                    MACH_DSBR               DSBR                    871
+crystalball             MACH_CRYSTALBALL        CRYSTALBALL             872
+tinypxa27x              MACH_TINYPXA27X         TINYPXA27X              873
+herbie                  MACH_HERBIE             HERBIE                  874
+magician                MACH_MAGICIAN           MAGICIAN                875
+cm4002                  MACH_CM4002             CM4002                  876
+b4                      MACH_B4                 B4                      877
+maui                    MACH_MAUI               MAUI                    878
+cybertracker_g          MACH_CYBERTRACKER_G     CYBERTRACKER_G          879
+nxdkn                   MACH_NXDKN              NXDKN                   880
+mio8390                 MACH_MIO8390            MIO8390                 881
+omi_board               MACH_OMI_BOARD          OMI_BOARD               882
+mx21civ                 MACH_MX21CIV            MX21CIV                 883
+mahi_cdac               MACH_MAHI_CDAC          MAHI_CDAC               884
+xscale_palmtx           MACH_XSCALE_PALMTX      XSCALE_PALMTX           885
+arch_s3c2413            MACH_ARCH_S3C2413       ARCH_S3C2413            886
+s3c2413                 MACH_S3C2413            S3C2413                 887
+samsys_ep0              MACH_SAMSYS_EP0         SAMSYS_EP0              888
+wg302v1                 MACH_WG302V1            WG302V1                 889
+wg302v2                 MACH_WG302V2            WG302V2                 890
+eb42x                   MACH_EB42X              EB42X                   891
+iq331es                 MACH_IQ331ES            IQ331ES                 892
diff --git a/arch/arm26/kernel/process.c b/arch/arm26/kernel/process.c
index 9eb9964d32a7..15833a0057dd 100644
--- a/arch/arm26/kernel/process.c
+++ b/arch/arm26/kernel/process.c
@@ -74,15 +74,13 @@ __setup("hlt", hlt_setup);
 void cpu_idle(void)
 {
        /* endless idle loop with no priority at all */
-        preempt_disable();
        while (1) {
-                while (!need_resched()) {
+                while (!need_resched())
-                        local_irq_disable();
+                        cpu_relax();
-                        if (!need_resched() && !hlt_counter)
+                preempt_enable_no_resched();
-                                local_irq_enable();
+                schedule();
-                }
+                preempt_disable();
        }
-        schedule();
 }
 static char reboot_mode = 'h';
diff --git a/arch/cris/arch-v10/drivers/pcf8563.c b/arch/cris/arch-v10/drivers/pcf8563.c
index 201f4c90d961..f2c55742e90c 100644
--- a/arch/cris/arch-v10/drivers/pcf8563.c
+++ b/arch/cris/arch-v10/drivers/pcf8563.c
@@ -19,7 +19,6 @@
 */
 #include <linux/config.h>
-#include <linux/version.h>
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/types.h>
diff --git a/arch/cris/arch-v10/kernel/fasttimer.c b/arch/cris/arch-v10/kernel/fasttimer.c
index 094ff45ae85b..cac05a5e514c 100644
--- a/arch/cris/arch-v10/kernel/fasttimer.c
+++ b/arch/cris/arch-v10/kernel/fasttimer.c
@@ -112,7 +112,6 @@
 #include <asm/rtc.h>
 #include <linux/config.h>
-#include <linux/version.h>
 #include <asm/arch/svinto.h>
 #include <asm/fasttimer.h>
diff --git a/arch/cris/arch-v32/drivers/nandflash.c b/arch/cris/arch-v32/drivers/nandflash.c
index fc2a619b035d..93ddea4d9564 100644
--- a/arch/cris/arch-v32/drivers/nandflash.c
+++ b/arch/cris/arch-v32/drivers/nandflash.c
@@ -14,7 +14,6 @@
 *
 */
-#include <linux/version.h>
 #include <linux/slab.h>
 #include <linux/init.h>
 #include <linux/module.h>
diff --git a/arch/cris/arch-v32/drivers/pcf8563.c b/arch/cris/arch-v32/drivers/pcf8563.c
index f894580b648b..d788bda3578c 100644
--- a/arch/cris/arch-v32/drivers/pcf8563.c
+++ b/arch/cris/arch-v32/drivers/pcf8563.c
@@ -18,7 +18,6 @@
 */
 #include <linux/config.h>
-#include <linux/version.h>
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/types.h>
diff --git a/arch/cris/arch-v32/kernel/smp.c b/arch/cris/arch-v32/kernel/smp.c
index 957f551ba5ce..13867f4fad16 100644
--- a/arch/cris/arch-v32/kernel/smp.c
+++ b/arch/cris/arch-v32/kernel/smp.c
@@ -161,6 +161,7 @@ void __init smp_callin(void)
        REG_WR(intr_vect, irq_regs[cpu], rw_mask, vect_mask);
        unmask_irq(IPI_INTR_VECT);
        unmask_irq(TIMER_INTR_VECT);
+        preempt_disable();
        local_irq_enable();
        cpu_set(cpu, cpu_online_map);
diff --git a/arch/cris/kernel/process.c b/arch/cris/kernel/process.c
index 949a0e40e03c..7c80afb10460 100644
--- a/arch/cris/kernel/process.c
+++ b/arch/cris/kernel/process.c
@@ -218,7 +218,9 @@ void cpu_idle (void)
                                idle = default_idle;
                        idle();
                }
+                preempt_enable_no_resched();
                schedule();
+                preempt_disable();
        }
 }
diff --git a/arch/frv/kernel/process.c b/arch/frv/kernel/process.c
index 3001b82b1514..54a452136f00 100644
--- a/arch/frv/kernel/process.c
+++ b/arch/frv/kernel/process.c
@@ -77,16 +77,20 @@ void (*idle)(void) = core_sleep_idle;
 */
 void cpu_idle(void)
 {
+        int cpu = smp_processor_id();
        /* endless idle loop with no priority at all */
        while (1) {
                while (!need_resched()) {
-                        irq_stat[smp_processor_id()].idle_timestamp = jiffies;
+                        irq_stat[cpu].idle_timestamp = jiffies;
                        if (!frv_dma_inprogress && idle)
                                idle();
                }
+                preempt_enable_no_resched();
                schedule();
+                preempt_disable();
        }
 }
diff --git a/arch/h8300/kernel/process.c b/arch/h8300/kernel/process.c
index 27f1fce64ce4..fe21adf3e75e 100644
--- a/arch/h8300/kernel/process.c
+++ b/arch/h8300/kernel/process.c
@@ -53,22 +53,18 @@ asmlinkage void ret_from_fork(void);
 #if !defined(CONFIG_H8300H_SIM) && !defined(CONFIG_H8S_SIM)
 void default_idle(void)
 {
-        while(1) {
+        local_irq_disable();
-                if (!need_resched()) {
+        if (!need_resched()) {
-                        local_irq_enable();
+                local_irq_enable();
-                        __asm__("sleep");
+                /* XXX: race here! What if need_resched() gets set now? */
-                        local_irq_disable();
+                __asm__("sleep");
-                }
+        } else
-                schedule();
+                local_irq_enable();
-        }
 }
 #else
 void default_idle(void)
 {
-        while(1) {
+        cpu_relax();
-                if (need_resched())
-                        schedule();
-        }
 }
 #endif
 void (*idle)(void) = default_idle;
@@ -81,7 +77,13 @@ void (*idle)(void) = default_idle;
 */
 void cpu_idle(void)
 {
-        idle();
+        while (1) {
+                while (!need_resched())
+                        idle();
+                preempt_enable_no_resched();
+                schedule();
+                preempt_disable();
+        }
 }
 void machine_restart(char * __unused)
diff --git a/arch/i386/kernel/apm.c b/arch/i386/kernel/apm.c
index 86e80c551478..003548b8735f 100644
--- a/arch/i386/kernel/apm.c
+++ b/arch/i386/kernel/apm.c
@@ -769,8 +769,26 @@ static int set_system_power_state(u_short state)
 static int apm_do_idle(void)
 {
        u32     eax;
+        u8      ret = 0;
+        int     idled = 0;
+        int     polling;
+        polling = test_thread_flag(TIF_POLLING_NRFLAG);
+        if (polling) {
+                clear_thread_flag(TIF_POLLING_NRFLAG);
+                smp_mb__after_clear_bit();
+        }
+        if (!need_resched()) {
+                idled = 1;
+                ret = apm_bios_call_simple(APM_FUNC_IDLE, 0, 0, &eax);
+        }
+        if (polling)
+                set_thread_flag(TIF_POLLING_NRFLAG);
+        if (!idled)
+                return 0;
-        if (apm_bios_call_simple(APM_FUNC_IDLE, 0, 0, &eax)) {
+        if (ret) {
                static unsigned long t;
                /* This always fails on some SMP boards running UP kernels.
diff --git a/arch/i386/kernel/process.c b/arch/i386/kernel/process.c
index 7a14fdfd3af9..1cb261f225d5 100644
--- a/arch/i386/kernel/process.c
+++ b/arch/i386/kernel/process.c
@@ -99,14 +99,22 @@ EXPORT_SYMBOL(enable_hlt);
 */
 void default_idle(void)
 {
+        local_irq_enable();
        if (!hlt_counter && boot_cpu_data.hlt_works_ok) {
-                local_irq_disable();
+                clear_thread_flag(TIF_POLLING_NRFLAG);
-                if (!need_resched())
+                smp_mb__after_clear_bit();
-                        safe_halt();
+                while (!need_resched()) {
-                else
+                        local_irq_disable();
-                        local_irq_enable();
+                        if (!need_resched())
+                                safe_halt();
+                        else
+                                local_irq_enable();
+                }
+                set_thread_flag(TIF_POLLING_NRFLAG);
        } else {
-                cpu_relax();
+                while (!need_resched())
+                        cpu_relax();
        }
 }
 #ifdef CONFIG_APM_MODULE
@@ -120,29 +128,14 @@ EXPORT_SYMBOL(default_idle);
 */
 static void poll_idle (void)
 {
-        int oldval;
        local_irq_enable();
-        /*
+        asm volatile(
-         * Deal with another CPU just having chosen a thread to
+                "2:"
-         * run here:
+                "testl %0, %1;"
-         */
+                "rep; nop;"
-        oldval = test_and_clear_thread_flag(TIF_NEED_RESCHED);
+                "je 2b;"
+                : : "i"(_TIF_NEED_RESCHED), "m" (current_thread_info()->flags));
-        if (!oldval) {
-                set_thread_flag(TIF_POLLING_NRFLAG);
-                asm volatile(
-                        "2:"
-                        "testl %0, %1;"
-                        "rep; nop;"
-                        "je 2b;"
-                        : : "i"(_TIF_NEED_RESCHED), "m" (current_thread_info()->flags));
-                clear_thread_flag(TIF_POLLING_NRFLAG);
-        } else {
-                set_need_resched();
-        }
 }
 #ifdef CONFIG_HOTPLUG_CPU
@@ -179,7 +172,9 @@ static inline void play_dead(void)
 */
 void cpu_idle(void)
 {
-        int cpu = raw_smp_processor_id();
+        int cpu = smp_processor_id();
+        set_thread_flag(TIF_POLLING_NRFLAG);
        /* endless idle loop with no priority at all */
        while (1) {
@@ -201,7 +196,9 @@ void cpu_idle(void)
                        __get_cpu_var(irq_stat).idle_timestamp = jiffies;
                        idle();
                }
+                preempt_enable_no_resched();
                schedule();
+                preempt_disable();
        }
 }
@@ -244,15 +241,12 @@ static void mwait_idle(void)
 {
        local_irq_enable();
-        if (!need_resched()) {
+        while (!need_resched()) {
-                set_thread_flag(TIF_POLLING_NRFLAG);
+                __monitor((void *)&current_thread_info()->flags, 0, 0);
-                do {
+                smp_mb();
-                        __monitor((void *)&current_thread_info()->flags, 0, 0);
+                if (need_resched())
-                        if (need_resched())
+                        break;
-                                break;
+                __mwait(0, 0);
-                        __mwait(0, 0);
-                } while (!need_resched());
-                clear_thread_flag(TIF_POLLING_NRFLAG);
        }
 }
diff --git a/arch/i386/kernel/setup.c b/arch/i386/kernel/setup.c
index b48ac635f3c1..fdfcb0cba9b4 100644
--- a/arch/i386/kernel/setup.c
+++ b/arch/i386/kernel/setup.c
@@ -129,9 +129,7 @@ struct drive_info_struct { char dummy[32]; } drive_info;
 EXPORT_SYMBOL(drive_info);
 #endif
 struct screen_info screen_info;
-#ifdef CONFIG_VT
 EXPORT_SYMBOL(screen_info);
-#endif
 struct apm_info apm_info;
 EXPORT_SYMBOL(apm_info);
 struct sys_desc_table_struct {
diff --git a/arch/i386/kernel/smpboot.c b/arch/i386/kernel/smpboot.c
index 47ec76794d02..bc5a9d97466b 100644
--- a/arch/i386/kernel/smpboot.c
+++ b/arch/i386/kernel/smpboot.c
@@ -485,6 +485,7 @@ static void __devinit start_secondary(void *unused)
         * things done here to the most necessary things.
         */
        cpu_init();
+        preempt_disable();
        smp_callin();
        while (!cpu_isset(smp_processor_id(), smp_commenced_mask))
                rep_nop();
diff --git a/arch/i386/pci/fixup.c b/arch/i386/pci/fixup.c
index 3984226a8b98..eeb1b1f2d548 100644
--- a/arch/i386/pci/fixup.c
+++ b/arch/i386/pci/fixup.c
@@ -433,9 +433,8 @@ static void __devinit pci_post_fixup_toshiba_ohci1394(struct pci_dev *dev)
                return; /* only applies to certain Toshibas (so far) */
        /* Restore config space on Toshiba laptops */
-        mdelay(10);
        pci_write_config_word(dev, PCI_CACHE_LINE_SIZE, toshiba_line_size);
-        pci_write_config_word(dev, PCI_INTERRUPT_LINE, dev->irq);
+        pci_read_config_byte(dev, PCI_INTERRUPT_LINE, (u8 *)&dev->irq);
        pci_write_config_dword(dev, PCI_BASE_ADDRESS_0,
                               pci_resource_start(dev, 0));
        pci_write_config_dword(dev, PCI_BASE_ADDRESS_1,
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig
index d4de8a4814be..8796e12c56f3 100644
--- a/arch/ia64/Kconfig
+++ b/arch/ia64/Kconfig
@@ -164,6 +164,19 @@ config IA64_PAGE_SIZE_64KB
 endchoice
+choice
+        prompt "Page Table Levels"
+        default PGTABLE_3
+config PGTABLE_3
+        bool "3 Levels"
+config PGTABLE_4
+        depends on !IA64_PAGE_SIZE_64KB
+        bool "4 Levels"
+endchoice
 source kernel/Kconfig.hz
 config IA64_BRL_EMU
diff --git a/arch/ia64/configs/sn2_defconfig b/arch/ia64/configs/sn2_defconfig
index 08112ab38468..87cfd31a4a39 100644
--- a/arch/ia64/configs/sn2_defconfig
+++ b/arch/ia64/configs/sn2_defconfig
@@ -80,6 +80,8 @@ CONFIG_MCKINLEY=y
 # CONFIG_IA64_PAGE_SIZE_8KB is not set
 CONFIG_IA64_PAGE_SIZE_16KB=y
 # CONFIG_IA64_PAGE_SIZE_64KB is not set
+# CONFIG_PGTABLE_3 is not set
+CONFIG_PGTABLE_4=y
 # CONFIG_HZ_100 is not set
 CONFIG_HZ_250=y
 # CONFIG_HZ_1000 is not set
diff --git a/arch/ia64/defconfig b/arch/ia64/defconfig
index 6e3f147e03e5..275a26c6e5aa 100644
--- a/arch/ia64/defconfig
+++ b/arch/ia64/defconfig
@@ -82,6 +82,8 @@ CONFIG_MCKINLEY=y
 # CONFIG_IA64_PAGE_SIZE_8KB is not set
 CONFIG_IA64_PAGE_SIZE_16KB=y
 # CONFIG_IA64_PAGE_SIZE_64KB is not set
+CONFIG_PGTABLE_3=y
+# CONFIG_PGTABLE_4 is not set
 # CONFIG_HZ_100 is not set
 CONFIG_HZ_250=y
 # CONFIG_HZ_1000 is not set
diff --git a/arch/ia64/ia32/ia32_ioctl.c b/arch/ia64/ia32/ia32_ioctl.c
index 164b211f4174..88739394f6df 100644
--- a/arch/ia64/ia32/ia32_ioctl.c
+++ b/arch/ia64/ia32/ia32_ioctl.c
@@ -29,10 +29,8 @@
 #define CODE
 #include "compat_ioctl.c"
-typedef int (* ioctl32_handler_t)(unsigned int, unsigned int, unsigned long, struct file *);
 #define COMPATIBLE_IOCTL(cmd)           HANDLE_IOCTL((cmd),sys_ioctl)
-#define HANDLE_IOCTL(cmd,handler)       { (cmd), (ioctl32_handler_t)(handler), NULL },
+#define HANDLE_IOCTL(cmd,handler)       { (cmd), (ioctl_trans_handler_t)(handler), NULL },
 #define IOCTL_TABLE_START \
        struct ioctl_trans ioctl_start[] = {
 #define IOCTL_TABLE_END \
diff --git a/arch/ia64/kernel/efi.c b/arch/ia64/kernel/efi.c
index f72ea6aebcb1..a3aa45cbcfa0 100644
--- a/arch/ia64/kernel/efi.c
+++ b/arch/ia64/kernel/efi.c
@@ -987,7 +987,7 @@ efi_initialize_iomem_resources(struct resource *code_resource,
                                break;
                }
-                if ((res = kcalloc(1, sizeof(struct resource), GFP_KERNEL)) == NULL) {
+                if ((res = kzalloc(sizeof(struct resource), GFP_KERNEL)) == NULL) {
                        printk(KERN_ERR "failed to alocate resource for iomem\n");
                        return;
                }
diff --git a/arch/ia64/kernel/ivt.S b/arch/ia64/kernel/ivt.S
index c13ca0d49c4a..e06f21f60dc5 100644
--- a/arch/ia64/kernel/ivt.S
+++ b/arch/ia64/kernel/ivt.S
@@ -114,7 +114,7 @@ ENTRY(vhpt_miss)
        shl r21=r16,3                           // shift bit 60 into sign bit
        shr.u r17=r16,61                        // get the region number into r17
        ;;
-        shr r22=r21,3
+        shr.u r22=r21,3
 #ifdef CONFIG_HUGETLB_PAGE
        extr.u r26=r25,2,6
        ;;
@@ -140,20 +140,34 @@ ENTRY(vhpt_miss)
 (p6)    dep r17=r18,r19,3,(PAGE_SHIFT-3)        // r17=PTA + IFA(33,42)*8
 (p7)    dep r17=r18,r17,3,(PAGE_SHIFT-6)        // r17=PTA + (((IFA(61,63) << 7) | IFA(33,39))*8)
        cmp.eq p7,p6=0,r21                      // unused address bits all zeroes?
-        shr.u r18=r22,PMD_SHIFT                 // shift L2 index into position
+#ifdef CONFIG_PGTABLE_4
+        shr.u r28=r22,PUD_SHIFT                 // shift L2 index into position
+#else
+        shr.u r18=r22,PMD_SHIFT                 // shift L3 index into position
+#endif
        ;;
        ld8 r17=[r17]                           // fetch the L1 entry (may be 0)
        ;;
 (p7)    cmp.eq p6,p7=r17,r0                     // was L1 entry NULL?
-        dep r17=r18,r17,3,(PAGE_SHIFT-3)        // compute address of L2 page table entry
+#ifdef CONFIG_PGTABLE_4
+        dep r28=r28,r17,3,(PAGE_SHIFT-3)        // compute address of L2 page table entry
+        ;;
+        shr.u r18=r22,PMD_SHIFT                 // shift L3 index into position
+(p7)    ld8 r29=[r28]                           // fetch the L2 entry (may be 0)
        ;;
-(p7)    ld8 r20=[r17]                           // fetch the L2 entry (may be 0)
+(p7)    cmp.eq.or.andcm p6,p7=r29,r0            // was L2 entry NULL?
-        shr.u r19=r22,PAGE_SHIFT                // shift L3 index into position
+        dep r17=r18,r29,3,(PAGE_SHIFT-3)        // compute address of L3 page table entry
+#else
+        dep r17=r18,r17,3,(PAGE_SHIFT-3)        // compute address of L3 page table entry
+#endif
        ;;
-(p7)    cmp.eq.or.andcm p6,p7=r20,r0            // was L2 entry NULL?
+(p7)    ld8 r20=[r17]                           // fetch the L3 entry (may be 0)
-        dep r21=r19,r20,3,(PAGE_SHIFT-3)        // compute address of L3 page table entry
+        shr.u r19=r22,PAGE_SHIFT                // shift L4 index into position
        ;;
-(p7)    ld8 r18=[r21]                           // read the L3 PTE
+(p7)    cmp.eq.or.andcm p6,p7=r20,r0            // was L3 entry NULL?
+        dep r21=r19,r20,3,(PAGE_SHIFT-3)        // compute address of L4 page table entry
+        ;;
+(p7)    ld8 r18=[r21]                           // read the L4 PTE
        mov r19=cr.isr                          // cr.isr bit 0 tells us if this is an insn miss
        ;;
 (p7)    tbit.z p6,p7=r18,_PAGE_P_BIT            // page present bit cleared?
@@ -192,14 +206,21 @@ ENTRY(vhpt_miss)
         * between reading the pagetable and the "itc".  If so, flush the entry we
         * inserted and retry.
         */
-        ld8 r25=[r21]                           // read L3 PTE again
+        ld8 r25=[r21]                           // read L4 entry again
-        ld8 r26=[r17]                           // read L2 entry again
+        ld8 r26=[r17]                           // read L3 PTE again
+#ifdef CONFIG_PGTABLE_4
+        ld8 r18=[r28]                           // read L2 entry again
+#endif
+        cmp.ne p6,p7=r0,r0
        ;;
-        cmp.ne p6,p7=r26,r20                    // did L2 entry change
+        cmp.ne.or.andcm p6,p7=r26,r20           // did L3 entry change
+#ifdef CONFIG_PGTABLE_4
+        cmp.ne.or.andcm p6,p7=r29,r18           // did L4 PTE change
+#endif
        mov r27=PAGE_SHIFT<<2
        ;;
 (p6)    ptc.l r22,r27                           // purge PTE page translation
-(p7)    cmp.ne.or.andcm p6,p7=r25,r18           // did L3 PTE change
+(p7)    cmp.ne.or.andcm p6,p7=r25,r18           // did L4 PTE change
        ;;
 (p6)    ptc.l r16,r27                           // purge translation
 #endif
@@ -432,18 +453,30 @@ ENTRY(nested_dtlb_miss)
 (p6)    dep r17=r18,r19,3,(PAGE_SHIFT-3)        // r17=PTA + IFA(33,42)*8
 (p7)    dep r17=r18,r17,3,(PAGE_SHIFT-6)        // r17=PTA + (((IFA(61,63) << 7) | IFA(33,39))*8)
        cmp.eq p7,p6=0,r21                      // unused address bits all zeroes?
-        shr.u r18=r22,PMD_SHIFT                 // shift L2 index into position
+#ifdef CONFIG_PGTABLE_4
+        shr.u r18=r22,PUD_SHIFT                 // shift L2 index into position
+#else
+        shr.u r18=r22,PMD_SHIFT                 // shift L3 index into position
+#endif
        ;;
        ld8 r17=[r17]                           // fetch the L1 entry (may be 0)
        ;;
 (p7)    cmp.eq p6,p7=r17,r0                     // was L1 entry NULL?
        dep r17=r18,r17,3,(PAGE_SHIFT-3)        // compute address of L2 page table entry
        ;;
+#ifdef CONFIG_PGTABLE_4
 (p7)    ld8 r17=[r17]                           // fetch the L2 entry (may be 0)
-        shr.u r19=r22,PAGE_SHIFT                // shift L3 index into position
+        shr.u r18=r22,PMD_SHIFT                 // shift L3 index into position
        ;;
 (p7)    cmp.eq.or.andcm p6,p7=r17,r0            // was L2 entry NULL?
-        dep r17=r19,r17,3,(PAGE_SHIFT-3)        // compute address of L3 page table entry
+        dep r17=r18,r17,3,(PAGE_SHIFT-3)        // compute address of L2 page table entry
+        ;;
+#endif
+(p7)    ld8 r17=[r17]                           // fetch the L3 entry (may be 0)
+        shr.u r19=r22,PAGE_SHIFT                // shift L4 index into position
+        ;;
+(p7)    cmp.eq.or.andcm p6,p7=r17,r0            // was L3 entry NULL?
+        dep r17=r19,r17,3,(PAGE_SHIFT-3)        // compute address of L4 page table entry
 (p6)    br.cond.spnt page_fault
        mov b0=r30
        br.sptk.many b0                         // return to continuation point
diff --git a/arch/ia64/kernel/kprobes.c b/arch/ia64/kernel/kprobes.c
index 96736a119c91..801eeaeaf3de 100644
--- a/arch/ia64/kernel/kprobes.c
+++ b/arch/ia64/kernel/kprobes.c
@@ -347,7 +347,7 @@ int __kprobes trampoline_probe_handler(struct kprobe *p, struct pt_regs *regs)
                ((struct fnptr *)kretprobe_trampoline)->ip;
        spin_lock_irqsave(&kretprobe_lock, flags);
-        head = kretprobe_inst_table_head(current);
+        head = kretprobe_inst_table_head(current);
        /*
         * It is possible to have multiple instances associated with a given
@@ -363,9 +363,9 @@ int __kprobes trampoline_probe_handler(struct kprobe *p, struct pt_regs *regs)
         *       kretprobe_trampoline
         */
        hlist_for_each_entry_safe(ri, node, tmp, head, hlist) {
-                if (ri->task != current)
+                if (ri->task != current)
                        /* another task is sharing our hash bucket */
-                        continue;
+                        continue;
                if (ri->rp && ri->rp->handler)
                        ri->rp->handler(ri, regs);
@@ -394,7 +394,7 @@ int __kprobes trampoline_probe_handler(struct kprobe *p, struct pt_regs *regs)
         * kprobe_handler() that we don't want the post_handler
         * to run (and have re-enabled preemption)
         */
-        return 1;
+        return 1;
 }
 /* Called with kretprobe_lock held */
@@ -739,12 +739,16 @@ int __kprobes kprobe_exceptions_notify(struct notifier_block *self,
        switch(val) {
        case DIE_BREAK:
-                if (pre_kprobes_handler(args))
+                /* err is break number from ia64_bad_break() */
-                        ret = NOTIFY_STOP;
+                if (args->err == 0x80200 || args->err == 0x80300)
+                        if (pre_kprobes_handler(args))
+                                ret = NOTIFY_STOP;
                break;
-        case DIE_SS:
+        case DIE_FAULT:
-                if (post_kprobes_handler(args->regs))
+                /* err is vector number from ia64_fault() */
-                        ret = NOTIFY_STOP;
+                if (args->err == 36)
+                        if (post_kprobes_handler(args->regs))
+                                ret = NOTIFY_STOP;
                break;
        case DIE_PAGE_FAULT:
                /* kprobe_running() needs smp_processor_id() */
diff --git a/arch/ia64/kernel/mca.c b/arch/ia64/kernel/mca.c
index 52c47da17246..355af15287c7 100644
--- a/arch/ia64/kernel/mca.c
+++ b/arch/ia64/kernel/mca.c
@@ -51,6 +51,9 @@
 *
 * 2005-08-12 Keith Owens <kaos@sgi.com>
 *            Convert MCA/INIT handlers to use per event stacks and SAL/OS state.
+ *
+ * 2005-10-07 Keith Owens <kaos@sgi.com>
+ *            Add notify_die() hooks.
 */
 #include <linux/config.h>
 #include <linux/types.h>
@@ -58,7 +61,6 @@
 #include <linux/sched.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
-#include <linux/kallsyms.h>
 #include <linux/smp_lock.h>
 #include <linux/bootmem.h>
 #include <linux/acpi.h>
@@ -69,6 +71,7 @@
 #include <linux/workqueue.h>
 #include <asm/delay.h>
+#include <asm/kdebug.h>
 #include <asm/machvec.h>
 #include <asm/meminit.h>
 #include <asm/page.h>
@@ -132,6 +135,14 @@ extern void salinfo_log_wakeup(int type, u8 *buffer, u64 size, int irqsafe);
 static int mca_init;
+static void inline
+ia64_mca_spin(const char *func)
+{
+        printk(KERN_EMERG "%s: spinning here, not returning to SAL\n", func);
+        while (1)
+                cpu_relax();
+}
 /*
 * IA64_MCA log support
 */
@@ -526,13 +537,16 @@ ia64_mca_wakeup_all(void)
 *  Outputs :   None
 */
 static irqreturn_t
-ia64_mca_rendez_int_handler(int rendez_irq, void *arg, struct pt_regs *ptregs)
+ia64_mca_rendez_int_handler(int rendez_irq, void *arg, struct pt_regs *regs)
 {
        unsigned long flags;
        int cpu = smp_processor_id();
        /* Mask all interrupts */
        local_irq_save(flags);
+        if (notify_die(DIE_MCA_RENDZVOUS_ENTER, "MCA", regs, 0, 0, 0)
+                        == NOTIFY_STOP)
+                ia64_mca_spin(__FUNCTION__);
        ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_DONE;
        /* Register with the SAL monarch that the slave has
@@ -540,10 +554,18 @@ ia64_mca_rendez_int_handler(int rendez_irq, void *arg, struct pt_regs *ptregs)
         */
        ia64_sal_mc_rendez();
+        if (notify_die(DIE_MCA_RENDZVOUS_PROCESS, "MCA", regs, 0, 0, 0)
+                        == NOTIFY_STOP)
+                ia64_mca_spin(__FUNCTION__);
        /* Wait for the monarch cpu to exit. */
        while (monarch_cpu != -1)
               cpu_relax();     /* spin until monarch leaves */
+        if (notify_die(DIE_MCA_RENDZVOUS_LEAVE, "MCA", regs, 0, 0, 0)
+                        == NOTIFY_STOP)
+                ia64_mca_spin(__FUNCTION__);
        /* Enable all interrupts */
        local_irq_restore(flags);
        return IRQ_HANDLED;
@@ -933,6 +955,9 @@ ia64_mca_handler(struct pt_regs *regs, struct switch_stack *sw,
        oops_in_progress = 1;   /* FIXME: make printk NMI/MCA/INIT safe */
        previous_current = ia64_mca_modify_original_stack(regs, sw, sos, "MCA");
        monarch_cpu = cpu;
+        if (notify_die(DIE_MCA_MONARCH_ENTER, "MCA", regs, 0, 0, 0)
+                        == NOTIFY_STOP)
+                ia64_mca_spin(__FUNCTION__);
        ia64_wait_for_slaves(cpu);
        /* Wakeup all the processors which are spinning in the rendezvous loop.
@@ -942,6 +967,9 @@ ia64_mca_handler(struct pt_regs *regs, struct switch_stack *sw,
         * spinning in SAL does not work.
         */
        ia64_mca_wakeup_all();
+        if (notify_die(DIE_MCA_MONARCH_PROCESS, "MCA", regs, 0, 0, 0)
+                        == NOTIFY_STOP)
+                ia64_mca_spin(__FUNCTION__);
        /* Get the MCA error record and log it */
        ia64_mca_log_sal_error_record(SAL_INFO_TYPE_MCA);
@@ -960,6 +988,9 @@ ia64_mca_handler(struct pt_regs *regs, struct switch_stack *sw,
                ia64_sal_clear_state_info(SAL_INFO_TYPE_MCA);
                sos->os_status = IA64_MCA_CORRECTED;
        }
+        if (notify_die(DIE_MCA_MONARCH_LEAVE, "MCA", regs, 0, 0, recover)
+                        == NOTIFY_STOP)
+                ia64_mca_spin(__FUNCTION__);
        set_curr_task(cpu, previous_current);
        monarch_cpu = -1;
@@ -1188,6 +1219,37 @@ ia64_mca_cpe_poll (unsigned long dummy)
 #endif /* CONFIG_ACPI */
+static int
+default_monarch_init_process(struct notifier_block *self, unsigned long val, void *data)
+{
+        int c;
+        struct task_struct *g, *t;
+        if (val != DIE_INIT_MONARCH_PROCESS)
+                return NOTIFY_DONE;
+        printk(KERN_ERR "Processes interrupted by INIT -");
+        for_each_online_cpu(c) {
+                struct ia64_sal_os_state *s;
+                t = __va(__per_cpu_mca[c] + IA64_MCA_CPU_INIT_STACK_OFFSET);
+                s = (struct ia64_sal_os_state *)((char *)t + MCA_SOS_OFFSET);
+                g = s->prev_task;
+                if (g) {
+                        if (g->pid)
+                                printk(" %d", g->pid);
+                        else
+                                printk(" %d (cpu %d task 0x%p)", g->pid, task_cpu(g), g);
+                }
+        }
+        printk("\n\n");
+        if (read_trylock(&tasklist_lock)) {
+                do_each_thread (g, t) {
+                        printk("\nBacktrace of pid %d (%s)\n", t->pid, t->comm);
+                        show_stack(t, NULL);
+                } while_each_thread (g, t);
+                read_unlock(&tasklist_lock);
+        }
+        return NOTIFY_DONE;
+}
 /*
 * C portion of the OS INIT handler
 *
@@ -1212,8 +1274,7 @@ ia64_init_handler(struct pt_regs *regs, struct switch_stack *sw,
        static atomic_t slaves;
        static atomic_t monarchs;
        task_t *previous_current;
-        int cpu = smp_processor_id(), c;
+        int cpu = smp_processor_id();
-        struct task_struct *g, *t;
        oops_in_progress = 1;   /* FIXME: make printk NMI/MCA/INIT safe */
        console_loglevel = 15;  /* make sure printks make it to console */
@@ -1253,8 +1314,17 @@ ia64_init_handler(struct pt_regs *regs, struct switch_stack *sw,
                ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_INIT;
                while (monarch_cpu == -1)
                       cpu_relax();     /* spin until monarch enters */
+                if (notify_die(DIE_INIT_SLAVE_ENTER, "INIT", regs, 0, 0, 0)
+                                == NOTIFY_STOP)
+                        ia64_mca_spin(__FUNCTION__);
+                if (notify_die(DIE_INIT_SLAVE_PROCESS, "INIT", regs, 0, 0, 0)
+                                == NOTIFY_STOP)
+                        ia64_mca_spin(__FUNCTION__);
                while (monarch_cpu != -1)
                       cpu_relax();     /* spin until monarch leaves */
+                if (notify_die(DIE_INIT_SLAVE_LEAVE, "INIT", regs, 0, 0, 0)
+                                == NOTIFY_STOP)
+                        ia64_mca_spin(__FUNCTION__);
                printk("Slave on cpu %d returning to normal service.\n", cpu);
                set_curr_task(cpu, previous_current);
                ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_NOTDONE;
@@ -1263,6 +1333,9 @@ ia64_init_handler(struct pt_regs *regs, struct switch_stack *sw,
        }
        monarch_cpu = cpu;
+        if (notify_die(DIE_INIT_MONARCH_ENTER, "INIT", regs, 0, 0, 0)
+                        == NOTIFY_STOP)
+                ia64_mca_spin(__FUNCTION__);
        /*
         * Wait for a bit.  On some machines (e.g., HP's zx2000 and zx6000, INIT can be
@@ -1273,27 +1346,16 @@ ia64_init_handler(struct pt_regs *regs, struct switch_stack *sw,
        printk("Delaying for 5 seconds...\n");
        udelay(5*1000000);
        ia64_wait_for_slaves(cpu);
-        printk(KERN_ERR "Processes interrupted by INIT -");
+        /* If nobody intercepts DIE_INIT_MONARCH_PROCESS then we drop through
-        for_each_online_cpu(c) {
+         * to default_monarch_init_process() above and just print all the
-                struct ia64_sal_os_state *s;
+         * tasks.
-                t = __va(__per_cpu_mca[c] + IA64_MCA_CPU_INIT_STACK_OFFSET);
+         */
-                s = (struct ia64_sal_os_state *)((char *)t + MCA_SOS_OFFSET);
+        if (notify_die(DIE_INIT_MONARCH_PROCESS, "INIT", regs, 0, 0, 0)
-                g = s->prev_task;
+                        == NOTIFY_STOP)
-                if (g) {
+                ia64_mca_spin(__FUNCTION__);
-                        if (g->pid)
+        if (notify_die(DIE_INIT_MONARCH_LEAVE, "INIT", regs, 0, 0, 0)
-                                printk(" %d", g->pid);
+                        == NOTIFY_STOP)
-                        else
+                ia64_mca_spin(__FUNCTION__);
-                                printk(" %d (cpu %d task 0x%p)", g->pid, task_cpu(g), g);
-                }
-        }
-        printk("\n\n");
-        if (read_trylock(&tasklist_lock)) {
-                do_each_thread (g, t) {
-                        printk("\nBacktrace of pid %d (%s)\n", t->pid, t->comm);
-                        show_stack(t, NULL);
-                } while_each_thread (g, t);
-                read_unlock(&tasklist_lock);
-        }
        printk("\nINIT dump complete.  Monarch on cpu %d returning to normal service.\n", cpu);
        atomic_dec(&monarchs);
        set_curr_task(cpu, previous_current);
@@ -1462,6 +1524,10 @@ ia64_mca_init(void)
        s64 rc;
        struct ia64_sal_retval isrv;
        u64 timeout = IA64_MCA_RENDEZ_TIMEOUT;  /* platform specific */
+        static struct notifier_block default_init_monarch_nb = {
+                .notifier_call = default_monarch_init_process,
+                .priority = 0/* we need to notified last */
+        };
        IA64_MCA_DEBUG("%s: begin\n", __FUNCTION__);
@@ -1555,6 +1621,10 @@ ia64_mca_init(void)
                       "(status %ld)\n", rc);
                return;
        }
+        if (register_die_notifier(&default_init_monarch_nb)) {
+                printk(KERN_ERR "Failed to register default monarch INIT process\n");
+                return;
+        }
        IA64_MCA_DEBUG("%s: registered OS INIT handler with SAL\n", __FUNCTION__);
diff --git a/arch/ia64/kernel/mca_drv.c b/arch/ia64/kernel/mca_drv.c
index f081c60ab206..3492e3211a44 100644
--- a/arch/ia64/kernel/mca_drv.c
+++ b/arch/ia64/kernel/mca_drv.c
@@ -88,7 +88,7 @@ mca_page_isolate(unsigned long paddr)
        if (!ia64_phys_addr_valid(paddr))
                return ISOLATE_NONE;
-        if (!pfn_valid(paddr))
+        if (!pfn_valid(paddr >> PAGE_SHIFT))
                return ISOLATE_NONE;
        /* convert physical address to physical page number */
@@ -108,6 +108,7 @@ mca_page_isolate(unsigned long paddr)
                return ISOLATE_NG;
        /* add attribute 'Reserved' and register the page */
+        get_page(p);
        SetPageReserved(p);
        page_isolate[num_page_isolate++] = p;
@@ -546,9 +547,20 @@ recover_from_processor_error(int platform, slidx_table_t *slidx,
                (pal_processor_state_info_t*)peidx_psp(peidx);
        /*
-         * We cannot recover errors with other than bus_check.
+         * Processor recovery status must key off of the PAL recovery
+         * status in the Processor State Parameter.
         */
-        if (psp->cc || psp->rc || psp->uc)
+        /*
+         * The machine check is corrected.
+         */
+        if (psp->cm == 1)
+                return 1;
+        /*
+         * The error was not contained.  Software must be reset.
+         */
+        if (psp->us || psp->ci == 0)
                return 0;
        /*
@@ -569,8 +581,6 @@ recover_from_processor_error(int platform, slidx_table_t *slidx,
                return 0;
        if (pbci->eb && pbci->bsi > 0)
                return 0;
-        if (psp->ci == 0)
-                return 0;
        /*
         * This is a local MCA and estimated as recoverble external bus error.
diff --git a/arch/ia64/kernel/process.c b/arch/ia64/kernel/process.c
index 051e050359e4..e92ea64d8040 100644
--- a/arch/ia64/kernel/process.c
+++ b/arch/ia64/kernel/process.c
@@ -4,6 +4,9 @@
 * Copyright (C) 1998-2003 Hewlett-Packard Co
 *      David Mosberger-Tang <davidm@hpl.hp.com>
 * 04/11/17 Ashok Raj   <ashok.raj@intel.com> Added CPU Hotplug Support
+ *
+ * 2005-10-07 Keith Owens <kaos@sgi.com>
+ *            Add notify_die() hooks.
 */
 #define __KERNEL_SYSCALLS__     /* see <asm/unistd.h> */
 #include <linux/config.h>
@@ -34,6 +37,7 @@
 #include <asm/elf.h>
 #include <asm/ia32.h>
 #include <asm/irq.h>
+#include <asm/kdebug.h>
 #include <asm/pgalloc.h>
 #include <asm/processor.h>
 #include <asm/sal.h>
@@ -197,11 +201,15 @@ void
 default_idle (void)
 {
        local_irq_enable();
-        while (!need_resched())
+        while (!need_resched()) {
-                if (can_do_pal_halt)
+                if (can_do_pal_halt) {
-                        safe_halt();
+                        local_irq_disable();
-                else
+                        if (!need_resched())
+                                safe_halt();
+                        local_irq_enable();
+                } else
                        cpu_relax();
+        }
 }
 #ifdef CONFIG_HOTPLUG_CPU
@@ -263,16 +271,16 @@ void __attribute__((noreturn))
 cpu_idle (void)
 {
        void (*mark_idle)(int) = ia64_mark_idle;
+        int cpu = smp_processor_id();
+        set_thread_flag(TIF_POLLING_NRFLAG);
        /* endless idle loop with no priority at all */
        while (1) {
+                if (!need_resched()) {
+                        void (*idle)(void);
 #ifdef CONFIG_SMP
-                if (!need_resched())
                        min_xtp();
 #endif
-                while (!need_resched()) {
-                        void (*idle)(void);
                        if (__get_cpu_var(cpu_idle_state))
                                __get_cpu_var(cpu_idle_state) = 0;
@@ -284,17 +292,17 @@ cpu_idle (void)
                        if (!idle)
                                idle = default_idle;
                        (*idle)();
-                }
+                        if (mark_idle)
+                                (*mark_idle)(0);
-                if (mark_idle)
-                        (*mark_idle)(0);
 #ifdef CONFIG_SMP
-                normal_xtp();
+                        normal_xtp();
 #endif
+                }
+                preempt_enable_no_resched();
                schedule();
+                preempt_disable();
                check_pgt_cache();
-                if (cpu_is_offline(smp_processor_id()))
+                if (cpu_is_offline(cpu))
                        play_dead();
        }
 }
@@ -804,12 +812,14 @@ cpu_halt (void)
 void
 machine_restart (char *restart_cmd)
 {
+        (void) notify_die(DIE_MACHINE_RESTART, restart_cmd, NULL, 0, 0, 0);
        (*efi.reset_system)(EFI_RESET_WARM, 0, 0, NULL);
 }
 void
 machine_halt (void)
 {
+        (void) notify_die(DIE_MACHINE_HALT, "", NULL, 0, 0, 0);
        cpu_halt();
 }
diff --git a/arch/ia64/kernel/setup.c b/arch/ia64/kernel/setup.c
index 3af6de36a482..5add0bcf87a7 100644
--- a/arch/ia64/kernel/setup.c
+++ b/arch/ia64/kernel/setup.c
@@ -461,6 +461,7 @@ setup_arch (char **cmdline_p)
 #endif
        cpu_init();     /* initialize the bootstrap CPU */
+        mmu_context_init();     /* initialize context_id bitmap */
 #ifdef CONFIG_ACPI
        acpi_boot_init();
diff --git a/arch/ia64/kernel/signal.c b/arch/ia64/kernel/signal.c
index 774f34b675cf..58ce07efc56e 100644
--- a/arch/ia64/kernel/signal.c
+++ b/arch/ia64/kernel/signal.c
@@ -387,15 +387,14 @@ setup_frame (int sig, struct k_sigaction *ka, siginfo_t *info, sigset_t *set,
             struct sigscratch *scr)
 {
        extern char __kernel_sigtramp[];
-        unsigned long tramp_addr, new_rbs = 0;
+        unsigned long tramp_addr, new_rbs = 0, new_sp;
        struct sigframe __user *frame;
        long err;
-        frame = (void __user *) scr->pt.r12;
+        new_sp = scr->pt.r12;
        tramp_addr = (unsigned long) __kernel_sigtramp;
-        if ((ka->sa.sa_flags & SA_ONSTACK) && sas_ss_flags((unsigned long) frame) == 0) {
+        if ((ka->sa.sa_flags & SA_ONSTACK) && sas_ss_flags(new_sp) == 0) {
-                frame = (void __user *) ((current->sas_ss_sp + current->sas_ss_size)
+                new_sp = current->sas_ss_sp + current->sas_ss_size;
-                                         & ~(STACK_ALIGN - 1));
                /*
                 * We need to check for the register stack being on the signal stack
                 * separately, because it's switched separately (memory stack is switched
@@ -404,7 +403,7 @@ setup_frame (int sig, struct k_sigaction *ka, siginfo_t *info, sigset_t *set,
                if (!rbs_on_sig_stack(scr->pt.ar_bspstore))
                        new_rbs = (current->sas_ss_sp + sizeof(long) - 1) & ~(sizeof(long) - 1);
        }
-        frame = (void __user *) frame - ((sizeof(*frame) + STACK_ALIGN - 1) & ~(STACK_ALIGN - 1));
+        frame = (void __user *) ((new_sp - sizeof(*frame)) & -STACK_ALIGN);
        if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))
                return force_sigsegv_info(sig, frame);
diff --git a/arch/ia64/kernel/smpboot.c b/arch/ia64/kernel/smpboot.c
index 400a48987124..8f44e7d2df66 100644
--- a/arch/ia64/kernel/smpboot.c
+++ b/arch/ia64/kernel/smpboot.c
@@ -399,6 +399,7 @@ start_secondary (void *unused)
        Dprintk("start_secondary: starting CPU 0x%x\n", hard_smp_processor_id());
        efi_map_pal_code();
        cpu_init();
+        preempt_disable();
        smp_callin();
        cpu_idle();
diff --git a/arch/ia64/kernel/traps.c b/arch/ia64/kernel/traps.c
index f970359e7edf..fba5fdd1f968 100644
--- a/arch/ia64/kernel/traps.c
+++ b/arch/ia64/kernel/traps.c
@@ -30,17 +30,20 @@ fpswa_interface_t *fpswa_interface;
 EXPORT_SYMBOL(fpswa_interface);
 struct notifier_block *ia64die_chain;
-static DEFINE_SPINLOCK(die_notifier_lock);
-int register_die_notifier(struct notifier_block *nb)
+int
+register_die_notifier(struct notifier_block *nb)
 {
-        int err = 0;
+        return notifier_chain_register(&ia64die_chain, nb);
-        unsigned long flags;
-        spin_lock_irqsave(&die_notifier_lock, flags);
-        err = notifier_chain_register(&ia64die_chain, nb);
-        spin_unlock_irqrestore(&die_notifier_lock, flags);
-        return err;
 }
+EXPORT_SYMBOL_GPL(register_die_notifier);
+int
+unregister_die_notifier(struct notifier_block *nb)
+{
+        return notifier_chain_unregister(&ia64die_chain, nb);
+}
+EXPORT_SYMBOL_GPL(unregister_die_notifier);
 void __init
 trap_init (void)
@@ -105,6 +108,7 @@ die (const char *str, struct pt_regs *regs, long err)
        if (++die.lock_owner_depth < 3) {
                printk("%s[%d]: %s %ld [%d]\n",
                        current->comm, current->pid, str, err, ++die_counter);
+                (void) notify_die(DIE_OOPS, (char *)str, regs, err, 255, SIGSEGV);
                show_regs(regs);
        } else
                printk(KERN_ERR "Recursive die() failure, output suppressed\n");
@@ -155,9 +159,8 @@ __kprobes ia64_bad_break (unsigned long break_num, struct pt_regs *regs)
        switch (break_num) {
              case 0: /* unknown error (used by GCC for __builtin_abort()) */
                if (notify_die(DIE_BREAK, "break 0", regs, break_num, TRAP_BRKPT, SIGTRAP)
-                                == NOTIFY_STOP) {
+                                == NOTIFY_STOP)
                        return;
-                }
                die_if_kernel("bugcheck!", regs, break_num);
                sig = SIGILL; code = ILL_ILLOPC;
                break;
@@ -210,15 +213,6 @@ __kprobes ia64_bad_break (unsigned long break_num, struct pt_regs *regs)
                sig = SIGILL; code = __ILL_BNDMOD;
                break;
-              case 0x80200:
-              case 0x80300:
-                if (notify_die(DIE_BREAK, "kprobe", regs, break_num, TRAP_BRKPT, SIGTRAP)
-                                == NOTIFY_STOP) {
-                        return;
-                }
-                sig = SIGTRAP; code = TRAP_BRKPT;
-                break;
              default:
                if (break_num < 0x40000 || break_num > 0x100000)
                        die_if_kernel("Bad break", regs, break_num);
@@ -226,6 +220,9 @@ __kprobes ia64_bad_break (unsigned long break_num, struct pt_regs *regs)
                if (break_num < 0x80000) {
                        sig = SIGILL; code = __ILL_BREAK;
                } else {
+                        if (notify_die(DIE_BREAK, "bad break", regs, break_num, TRAP_BRKPT, SIGTRAP)
+                                        == NOTIFY_STOP)
+                                return;
                        sig = SIGTRAP; code = TRAP_BRKPT;
                }
        }
@@ -578,12 +575,11 @@ ia64_fault (unsigned long vector, unsigned long isr, unsigned long ifa,
 #endif
                        break;
                      case 35: siginfo.si_code = TRAP_BRANCH; ifa = 0; break;
-                      case 36:
+                      case 36: siginfo.si_code = TRAP_TRACE; ifa = 0; break;
-                              if (notify_die(DIE_SS, "ss", &regs, vector,
-                                             vector, SIGTRAP) == NOTIFY_STOP)
-                                      return;
-                              siginfo.si_code = TRAP_TRACE; ifa = 0; break;
                }
+                if (notify_die(DIE_FAULT, "ia64_fault", &regs, vector, siginfo.si_code, SIGTRAP)
+                                == NOTIFY_STOP)
+                        return;
                siginfo.si_signo = SIGTRAP;
                siginfo.si_errno = 0;
                siginfo.si_addr  = (void __user *) ifa;
diff --git a/arch/ia64/mm/discontig.c b/arch/ia64/mm/discontig.c
index a88cdb7232f8..0f776b032d31 100644
--- a/arch/ia64/mm/discontig.c
+++ b/arch/ia64/mm/discontig.c
@@ -350,14 +350,12 @@ static void __init initialize_pernode_data(void)
 *      for best.
 * @nid: node id
 * @pernodesize: size of this node's pernode data
- * @align: alignment to use for this node's pernode data
 */
-static void __init *memory_less_node_alloc(int nid, unsigned long pernodesize,
+static void __init *memory_less_node_alloc(int nid, unsigned long pernodesize)
-        unsigned long align)
 {
        void *ptr = NULL;
        u8 best = 0xff;
-        int bestnode = -1, node;
+        int bestnode = -1, node, anynode = 0;
        for_each_online_node(node) {
                if (node_isset(node, memory_less_mask))
@@ -366,13 +364,15 @@ static void __init *memory_less_node_alloc(int nid, unsigned long pernodesize,
                        best = node_distance(nid, node);
                        bestnode = node;
                }
+                anynode = node;
        }
-        ptr = __alloc_bootmem_node(mem_data[bestnode].pgdat,
+        if (bestnode == -1)
-                pernodesize, align, __pa(MAX_DMA_ADDRESS));
+                bestnode = anynode;
+        ptr = __alloc_bootmem_node(mem_data[bestnode].pgdat, pernodesize,
+                PERCPU_PAGE_SIZE, __pa(MAX_DMA_ADDRESS));
-        if (!ptr)
-                panic("NO memory for memory less node\n");
        return ptr;
 }
@@ -413,8 +413,7 @@ static void __init memory_less_nodes(void)
        for_each_node_mask(node, memory_less_mask) {
                pernodesize = compute_pernodesize(node);
-                pernode = memory_less_node_alloc(node, pernodesize,
+                pernode = memory_less_node_alloc(node, pernodesize);
-                        (node) ? (node * PERCPU_PAGE_SIZE) : (1024*1024));
                fill_pernode(node, __pa(pernode), pernodesize);
        }
diff --git a/arch/ia64/mm/tlb.c b/arch/ia64/mm/tlb.c
index c79a9b96d02b..41105d454423 100644
--- a/arch/ia64/mm/tlb.c
+++ b/arch/ia64/mm/tlb.c
@@ -8,6 +8,8 @@
 *              Modified RID allocation for SMP
 *          Goutham Rao <goutham.rao@intel.com>
 *              IPI based ptc implementation and A-step IPI implementation.
+ * Rohit Seth <rohit.seth@intel.com>
+ * Ken Chen <kenneth.w.chen@intel.com>
 */
 #include <linux/config.h>
 #include <linux/module.h>
@@ -16,78 +18,75 @@
 #include <linux/sched.h>
 #include <linux/smp.h>
 #include <linux/mm.h>
+#include <linux/bootmem.h>
 #include <asm/delay.h>
 #include <asm/mmu_context.h>
 #include <asm/pgalloc.h>
 #include <asm/pal.h>
 #include <asm/tlbflush.h>
+#include <asm/dma.h>
 static struct {
        unsigned long mask;     /* mask of supported purge page-sizes */
-        unsigned long max_bits; /* log2() of largest supported purge page-size */
+        unsigned long max_bits; /* log2 of largest supported purge page-size */
 } purge;
 struct ia64_ctx ia64_ctx = {
        .lock =         SPIN_LOCK_UNLOCKED,
        .next =         1,
-        .limit =        (1 << 15) - 1,          /* start out with the safe (architected) limit */
        .max_ctx =      ~0U
 };
 DEFINE_PER_CPU(u8, ia64_need_tlb_flush);
 /*
+ * Initializes the ia64_ctx.bitmap array based on max_ctx+1.
+ * Called after cpu_init() has setup ia64_ctx.max_ctx based on
+ * maximum RID that is supported by boot CPU.
+ */
+void __init
+mmu_context_init (void)
+{
+        ia64_ctx.bitmap = alloc_bootmem((ia64_ctx.max_ctx+1)>>3);
+        ia64_ctx.flushmap = alloc_bootmem((ia64_ctx.max_ctx+1)>>3);
+}
+/*
 * Acquire the ia64_ctx.lock before calling this function!
 */
 void
 wrap_mmu_context (struct mm_struct *mm)
 {
-        unsigned long tsk_context, max_ctx = ia64_ctx.max_ctx;
+        int i, cpu;
-        struct task_struct *tsk;
+        unsigned long flush_bit;
-        int i;
-        if (ia64_ctx.next > max_ctx)
+        for (i=0; i <= ia64_ctx.max_ctx / BITS_PER_LONG; i++) {
-                ia64_ctx.next = 300;    /* skip daemons */
+                flush_bit = xchg(&ia64_ctx.flushmap[i], 0);
-        ia64_ctx.limit = max_ctx + 1;
+                ia64_ctx.bitmap[i] ^= flush_bit;
+        }
+ 
+        /* use offset at 300 to skip daemons */
+        ia64_ctx.next = find_next_zero_bit(ia64_ctx.bitmap,
+                                ia64_ctx.max_ctx, 300);
+        ia64_ctx.limit = find_next_bit(ia64_ctx.bitmap,
+                                ia64_ctx.max_ctx, ia64_ctx.next);
        /*
-         * Scan all the task's mm->context and set proper safe range
+         * can't call flush_tlb_all() here because of race condition
+         * with O(1) scheduler [EF]
         */
+        cpu = get_cpu(); /* prevent preemption/migration */
-        read_lock(&tasklist_lock);
+        for_each_online_cpu(i)
-  repeat:
+                if (i != cpu)
-        for_each_process(tsk) {
+                        per_cpu(ia64_need_tlb_flush, i) = 1;
-                if (!tsk->mm)
+        put_cpu();
-                        continue;
-                tsk_context = tsk->mm->context;
-                if (tsk_context == ia64_ctx.next) {
-                        if (++ia64_ctx.next >= ia64_ctx.limit) {
-                                /* empty range: reset the range limit and start over */
-                                if (ia64_ctx.next > max_ctx)
-                                        ia64_ctx.next = 300;
-                                ia64_ctx.limit = max_ctx + 1;
-                                goto repeat;
-                        }
-                }
-                if ((tsk_context > ia64_ctx.next) && (tsk_context < ia64_ctx.limit))
-                        ia64_ctx.limit = tsk_context;
-        }
-        read_unlock(&tasklist_lock);
-        /* can't call flush_tlb_all() here because of race condition with O(1) scheduler [EF] */
-        {
-                int cpu = get_cpu(); /* prevent preemption/migration */
-                for_each_online_cpu(i) {
-                        if (i != cpu)
-                                per_cpu(ia64_need_tlb_flush, i) = 1;
-                }
-                put_cpu();
-        }
        local_flush_tlb_all();
 }
 void
-ia64_global_tlb_purge (struct mm_struct *mm, unsigned long start, unsigned long end, unsigned long nbits)
+ia64_global_tlb_purge (struct mm_struct *mm, unsigned long start,
+                       unsigned long end, unsigned long nbits)
 {
        static DEFINE_SPINLOCK(ptcg_lock);
@@ -135,7 +134,8 @@ local_flush_tlb_all (void)
 }
 void
-flush_tlb_range (struct vm_area_struct *vma, unsigned long start, unsigned long end)
+flush_tlb_range (struct vm_area_struct *vma, unsigned long start,
+                 unsigned long end)
 {
        struct mm_struct *mm = vma->vm_mm;
        unsigned long size = end - start;
@@ -149,7 +149,8 @@ flush_tlb_range (struct vm_area_struct *vma, unsigned long start, unsigned long
 #endif
        nbits = ia64_fls(size + 0xfff);
-        while (unlikely (((1UL << nbits) & purge.mask) == 0) && (nbits < purge.max_bits))
+        while (unlikely (((1UL << nbits) & purge.mask) == 0) &&
+                        (nbits < purge.max_bits))
                ++nbits;
        if (nbits > purge.max_bits)
                nbits = purge.max_bits;
@@ -191,5 +192,5 @@ ia64_tlb_init (void)
        local_cpu_data->ptce_stride[0] = ptce_info.stride[0];
        local_cpu_data->ptce_stride[1] = ptce_info.stride[1];
-        local_flush_tlb_all();          /* nuke left overs from bootstrapping... */
+        local_flush_tlb_all();  /* nuke left overs from bootstrapping... */
 }
diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c
index 017cfc3f4789..20d76fae24e8 100644
--- a/arch/ia64/pci/pci.c
+++ b/arch/ia64/pci/pci.c
@@ -95,7 +95,7 @@ pci_sal_write (unsigned int seg, unsigned int bus, unsigned int devfn,
 }
 static struct pci_raw_ops pci_sal_ops = {
-        .read =         pci_sal_read,
+        .read =         pci_sal_read,
        .write =        pci_sal_write
 };
@@ -137,35 +137,98 @@ alloc_pci_controller (int seg)
        return controller;
 }
-static u64 __devinit
+struct pci_root_info {
-add_io_space (struct acpi_resource_address64 *addr)
+        struct pci_controller *controller;
+        char *name;
+};
+static unsigned int
+new_space (u64 phys_base, int sparse)
 {
-        u64 offset;
+        u64 mmio_base;
-        int sparse = 0;
        int i;
-        if (addr->address_translation_offset == 0)
+        if (phys_base == 0)
-                return IO_SPACE_BASE(0);        /* part of legacy IO space */
+                return 0;       /* legacy I/O port space */
-        if (addr->attribute.io.translation_attribute == ACPI_SPARSE_TRANSLATION)
-                sparse = 1;
-        offset = (u64) ioremap(addr->address_translation_offset, 0);
+        mmio_base = (u64) ioremap(phys_base, 0);
        for (i = 0; i < num_io_spaces; i++)
-                if (io_space[i].mmio_base == offset &&
+                if (io_space[i].mmio_base == mmio_base &&
                    io_space[i].sparse == sparse)
-                        return IO_SPACE_BASE(i);
+                        return i;
        if (num_io_spaces == MAX_IO_SPACES) {
-                printk("Too many IO port spaces\n");
+                printk(KERN_ERR "PCI: Too many IO port spaces "
+                        "(MAX_IO_SPACES=%lu)\n", MAX_IO_SPACES);
                return ~0;
        }
        i = num_io_spaces++;
-        io_space[i].mmio_base = offset;
+        io_space[i].mmio_base = mmio_base;
        io_space[i].sparse = sparse;
-        return IO_SPACE_BASE(i);
+        return i;
+}
+static u64 __devinit
+add_io_space (struct pci_root_info *info, struct acpi_resource_address64 *addr)
+{
+        struct resource *resource;
+        char *name;
+        u64 base, min, max, base_port;
+        unsigned int sparse = 0, space_nr, len;
+        resource = kzalloc(sizeof(*resource), GFP_KERNEL);
+        if (!resource) {
+                printk(KERN_ERR "PCI: No memory for %s I/O port space\n",
+                        info->name);
+                goto out;
+        }
+        len = strlen(info->name) + 32;
+        name = kzalloc(len, GFP_KERNEL);
+        if (!name) {
+                printk(KERN_ERR "PCI: No memory for %s I/O port space name\n",
+                        info->name);
+                goto free_resource;
+        }
+        min = addr->min_address_range;
+        max = min + addr->address_length - 1;
+        if (addr->attribute.io.translation_attribute == ACPI_SPARSE_TRANSLATION)
+                sparse = 1;
+        space_nr = new_space(addr->address_translation_offset, sparse);
+        if (space_nr == ~0)
+                goto free_name;
+        base = __pa(io_space[space_nr].mmio_base);
+        base_port = IO_SPACE_BASE(space_nr);
+        snprintf(name, len, "%s I/O Ports %08lx-%08lx", info->name,
+                base_port + min, base_port + max);
+        /*
+         * The SDM guarantees the legacy 0-64K space is sparse, but if the
+         * mapping is done by the processor (not the bridge), ACPI may not
+         * mark it as sparse.
+         */
+        if (space_nr == 0)
+                sparse = 1;
+        resource->name  = name;
+        resource->flags = IORESOURCE_MEM;
+        resource->start = base + (sparse ? IO_SPACE_SPARSE_ENCODING(min) : min);
+        resource->end   = base + (sparse ? IO_SPACE_SPARSE_ENCODING(max) : max);
+        insert_resource(&iomem_resource, resource);
+        return base_port;
+free_name:
+        kfree(name);
+free_resource:
+        kfree(resource);
+out:
+        return ~0;
 }
 static acpi_status __devinit resource_to_window(struct acpi_resource *resource,
@@ -205,11 +268,6 @@ count_window (struct acpi_resource *resource, void *data)
        return AE_OK;
 }
-struct pci_root_info {
-        struct pci_controller *controller;
-        char *name;
-};
 static __devinit acpi_status add_window(struct acpi_resource *res, void *data)
 {
        struct pci_root_info *info = data;
@@ -231,7 +289,7 @@ static __devinit acpi_status add_window(struct acpi_resource *res, void *data)
        } else if (addr.resource_type == ACPI_IO_RANGE) {
                flags = IORESOURCE_IO;
                root = &ioport_resource;
-                offset = add_io_space(&addr);
+                offset = add_io_space(info, &addr);
                if (offset == ~0)
                        return AE_OK;
        } else
@@ -241,7 +299,7 @@ static __devinit acpi_status add_window(struct acpi_resource *res, void *data)
        window->resource.name = info->name;
        window->resource.flags = flags;
        window->resource.start = addr.min_address_range + offset;
-        window->resource.end = addr.max_address_range + offset;
+        window->resource.end = window->resource.start + addr.address_length - 1;
        window->resource.child = NULL;
        window->offset = offset;
@@ -739,7 +797,7 @@ int pci_vector_resources(int last, int nr_released)
 {
        int count = nr_released;
-        count += (IA64_LAST_DEVICE_VECTOR - last);
+        count += (IA64_LAST_DEVICE_VECTOR - last);
        return count;
 }
diff --git a/arch/ia64/sn/kernel/io_init.c b/arch/ia64/sn/kernel/io_init.c
index b4f5053f5e1b..05e4ea889981 100644
--- a/arch/ia64/sn/kernel/io_init.c
+++ b/arch/ia64/sn/kernel/io_init.c
@@ -349,7 +349,7 @@ void sn_pci_controller_fixup(int segment, int busnum, struct pci_bus *bus)
                return;         /*bus # does not exist */
        prom_bussoft_ptr = __va(prom_bussoft_ptr);
-        controller = kcalloc(1,sizeof(struct pci_controller), GFP_KERNEL);
+        controller = kzalloc(sizeof(struct pci_controller), GFP_KERNEL);
        controller->segment = segment;
        if (!controller)
                BUG();
diff --git a/arch/ia64/sn/kernel/setup.c b/arch/ia64/sn/kernel/setup.c
index 0fb579ef18c2..e510dce9971f 100644
--- a/arch/ia64/sn/kernel/setup.c
+++ b/arch/ia64/sn/kernel/setup.c
@@ -30,6 +30,7 @@
 #include <linux/root_dev.h>
 #include <linux/nodemask.h>
 #include <linux/pm.h>
+#include <linux/efi.h>
 #include <asm/io.h>
 #include <asm/sal.h>
@@ -242,6 +243,135 @@ static void __init sn_check_for_wars(void)
        }
 }
+/*
+ * Scan the EFI PCDP table (if it exists) for an acceptable VGA console
+ * output device.  If one exists, pick it and set sn_legacy_{io,mem} to
+ * reflect the bus offsets needed to address it.
+ *
+ * Since pcdp support in SN is not supported in the 2.4 kernel (or at least
+ * the one lbs is based on) just declare the needed structs here.
+ *
+ * Reference spec http://www.dig64.org/specifications/DIG64_PCDPv20.pdf
+ *
+ * Returns 0 if no acceptable vga is found, !0 otherwise.
+ *
+ * Note:  This stuff is duped here because Altix requires the PCDP to
+ * locate a usable VGA device due to lack of proper ACPI support.  Structures
+ * could be used from drivers/firmware/pcdp.h, but it was decided that moving
+ * this file to a more public location just for Altix use was undesireable.
+ */
+struct hcdp_uart_desc {
+        u8      pad[45];
+};
+struct pcdp {
+        u8      signature[4];   /* should be 'HCDP' */
+        u32     length;
+        u8      rev;            /* should be >=3 for pcdp, <3 for hcdp */
+        u8      sum;
+        u8      oem_id[6];
+        u64     oem_tableid;
+        u32     oem_rev;
+        u32     creator_id;
+        u32     creator_rev;
+        u32     num_type0;
+        struct hcdp_uart_desc uart[0];  /* num_type0 of these */
+        /* pcdp descriptors follow */
+}  __attribute__((packed));
+struct pcdp_device_desc {
+        u8      type;
+        u8      primary;
+        u16     length;
+        u16     index;
+        /* interconnect specific structure follows */
+        /* device specific structure follows that */
+}  __attribute__((packed));
+struct pcdp_interface_pci {
+        u8      type;           /* 1 == pci */
+        u8      reserved;
+        u16     length;
+        u8      segment;
+        u8      bus;
+        u8      dev;
+        u8      fun;
+        u16     devid;
+        u16     vendid;
+        u32     acpi_interrupt;
+        u64     mmio_tra;
+        u64     ioport_tra;
+        u8      flags;
+        u8      translation;
+}  __attribute__((packed));
+struct pcdp_vga_device {
+        u8      num_eas_desc;
+        /* ACPI Extended Address Space Desc follows */
+}  __attribute__((packed));
+/* from pcdp_device_desc.primary */
+#define PCDP_PRIMARY_CONSOLE    0x01
+/* from pcdp_device_desc.type */
+#define PCDP_CONSOLE_INOUT      0x0
+#define PCDP_CONSOLE_DEBUG      0x1
+#define PCDP_CONSOLE_OUT        0x2
+#define PCDP_CONSOLE_IN         0x3
+#define PCDP_CONSOLE_TYPE_VGA   0x8
+#define PCDP_CONSOLE_VGA        (PCDP_CONSOLE_TYPE_VGA | PCDP_CONSOLE_OUT)
+/* from pcdp_interface_pci.type */
+#define PCDP_IF_PCI             1
+/* from pcdp_interface_pci.translation */
+#define PCDP_PCI_TRANS_IOPORT   0x02
+#define PCDP_PCI_TRANS_MMIO     0x01
+static void
+sn_scan_pcdp(void)
+{
+        u8 *bp;
+        struct pcdp *pcdp;
+        struct pcdp_device_desc device;
+        struct pcdp_interface_pci if_pci;
+        extern struct efi efi;
+        pcdp = efi.hcdp;
+        if (! pcdp)
+                return;         /* no hcdp/pcdp table */
+        if (pcdp->rev < 3)
+                return;         /* only support PCDP (rev >= 3) */
+        for (bp = (u8 *)&pcdp->uart[pcdp->num_type0];
+             bp < (u8 *)pcdp + pcdp->length;
+             bp += device.length) {
+                memcpy(&device, bp, sizeof(device));
+                if (! (device.primary & PCDP_PRIMARY_CONSOLE))
+                        continue;       /* not primary console */
+                if (device.type != PCDP_CONSOLE_VGA)
+                        continue;       /* not VGA descriptor */
+                memcpy(&if_pci, bp+sizeof(device), sizeof(if_pci));
+                if (if_pci.type != PCDP_IF_PCI)
+                        continue;       /* not PCI interconnect */
+                if (if_pci.translation & PCDP_PCI_TRANS_IOPORT)
+                        vga_console_iobase =
+                                if_pci.ioport_tra | __IA64_UNCACHED_OFFSET;
+                if (if_pci.translation & PCDP_PCI_TRANS_MMIO)
+                        vga_console_membase =
+                                if_pci.mmio_tra | __IA64_UNCACHED_OFFSET;
+                break; /* once we find the primary, we're done */
+        }
+}
 /**
 * sn_setup - SN platform setup routine
 * @cmdline_p: kernel command line
@@ -263,16 +393,35 @@ void __init sn_setup(char **cmdline_p)
 #if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE)
        /*
-         * If there was a primary vga adapter identified through the
+         * Handle SN vga console.
-         * EFI PCDP table, make it the preferred console.  Otherwise
+         *
-         * zero out conswitchp.
+         * SN systems do not have enough ACPI table information
+         * being passed from prom to identify VGA adapters and the legacy
+         * addresses to access them.  Until that is done, SN systems rely
+         * on the PCDP table to identify the primary VGA console if one
+         * exists.
+         *
+         * However, kernel PCDP support is optional, and even if it is built
+         * into the kernel, it will not be used if the boot cmdline contains
+         * console= directives.
+         *
+         * So, to work around this mess, we duplicate some of the PCDP code
+         * here so that the primary VGA console (as defined by PCDP) will
+         * work on SN systems even if a different console (e.g. serial) is
+         * selected on the boot line (or CONFIG_EFI_PCDP is off).
         */
+        if (! vga_console_membase)
+                sn_scan_pcdp();
        if (vga_console_membase) {
                /* usable vga ... make tty0 the preferred default console */
-                add_preferred_console("tty", 0, NULL);
+                if (!strstr(*cmdline_p, "console="))
+                        add_preferred_console("tty", 0, NULL);
        } else {
                printk(KERN_DEBUG "SGI: Disabling VGA console\n");
+                if (!strstr(*cmdline_p, "console="))
+                        add_preferred_console("ttySG", 0, NULL);
 #ifdef CONFIG_DUMMY_CONSOLE
                conswitchp = &dummy_con;
 #else
diff --git a/arch/ia64/sn/kernel/xpc.h b/arch/ia64/sn/kernel/xpc.h
index fbcedc7c27fa..5483a9f227d4 100644
--- a/arch/ia64/sn/kernel/xpc.h
+++ b/arch/ia64/sn/kernel/xpc.h
@@ -163,7 +163,7 @@ struct xpc_vars {
        u8 version;
        u64 heartbeat;
        u64 heartbeating_to_mask;
-        u64 kdb_status;         /* 0 = machine running */
+        u64 heartbeat_offline;  /* if 0, heartbeat should be changing */
        int act_nasid;
        int act_phys_cpuid;
        u64 vars_part_pa;
diff --git a/arch/ia64/sn/kernel/xpc_main.c b/arch/ia64/sn/kernel/xpc_main.c
index cece3c7c69be..b617236524c6 100644
--- a/arch/ia64/sn/kernel/xpc_main.c
+++ b/arch/ia64/sn/kernel/xpc_main.c
@@ -57,6 +57,7 @@
 #include <linux/reboot.h>
 #include <asm/sn/intr.h>
 #include <asm/sn/sn_sal.h>
+#include <asm/kdebug.h>
 #include <asm/uaccess.h>
 #include "xpc.h"
@@ -188,6 +189,11 @@ static struct notifier_block xpc_reboot_notifier = {
        .notifier_call = xpc_system_reboot,
 };
+static int xpc_system_die(struct notifier_block *, unsigned long, void *);
+static struct notifier_block xpc_die_notifier = {
+        .notifier_call = xpc_system_die,
+};
 /*
 * Timer function to enforce the timelimit on the partition disengage request.
@@ -997,6 +1003,9 @@ xpc_do_exit(enum xpc_retval reason)
        /* take ourselves off of the reboot_notifier_list */
        (void) unregister_reboot_notifier(&xpc_reboot_notifier);
+        /* take ourselves off of the die_notifier list */
+        (void) unregister_die_notifier(&xpc_die_notifier);
        /* close down protections for IPI operations */
        xpc_restrict_IPI_ops();
@@ -1011,6 +1020,63 @@ xpc_do_exit(enum xpc_retval reason)
 /*
+ * Called when the system is about to be either restarted or halted.
+ */
+static void
+xpc_die_disengage(void)
+{
+        struct xpc_partition *part;
+        partid_t partid;
+        unsigned long engaged;
+        long time, print_time, disengage_request_timeout;
+        /* keep xpc_hb_checker thread from doing anything (just in case) */
+        xpc_exiting = 1;
+        xpc_vars->heartbeating_to_mask = 0;  /* indicate we're deactivated */
+        for (partid = 1; partid < XP_MAX_PARTITIONS; partid++) {
+                part = &xpc_partitions[partid];
+                if (!XPC_SUPPORTS_DISENGAGE_REQUEST(part->
+                                                        remote_vars_version)) {
+                        /* just in case it was left set by an earlier XPC */
+                        xpc_clear_partition_engaged(1UL << partid);
+                        continue;
+                }
+                if (xpc_partition_engaged(1UL << partid) ||
+                                        part->act_state != XPC_P_INACTIVE) {
+                        xpc_request_partition_disengage(part);
+                        xpc_mark_partition_disengaged(part);
+                        xpc_IPI_send_disengage(part);
+                }
+        }
+        print_time = rtc_time();
+        disengage_request_timeout = print_time +
+                (xpc_disengage_request_timelimit * sn_rtc_cycles_per_second);
+        /* wait for all other partitions to disengage from us */
+        while ((engaged = xpc_partition_engaged(-1UL)) &&
+                        (time = rtc_time()) < disengage_request_timeout) {
+                if (time >= print_time) {
+                        dev_info(xpc_part, "waiting for remote partitions to "
+                                "disengage, engaged=0x%lx\n", engaged);
+                        print_time = time + (XPC_DISENGAGE_PRINTMSG_INTERVAL *
+                                                sn_rtc_cycles_per_second);
+                }
+        }
+        dev_info(xpc_part, "finished waiting for remote partitions to "
+                                "disengage, engaged=0x%lx\n", engaged);
+}
+/*
 * This function is called when the system is being rebooted.
 */
 static int
@@ -1038,6 +1104,33 @@ xpc_system_reboot(struct notifier_block *nb, unsigned long event, void *unused)
 }
+/*
+ * This function is called when the system is being rebooted.
+ */
+static int
+xpc_system_die(struct notifier_block *nb, unsigned long event, void *unused)
+{
+        switch (event) {
+        case DIE_MACHINE_RESTART:
+        case DIE_MACHINE_HALT:
+                xpc_die_disengage();
+                break;
+        case DIE_MCA_MONARCH_ENTER:
+        case DIE_INIT_MONARCH_ENTER:
+                xpc_vars->heartbeat++;
+                xpc_vars->heartbeat_offline = 1;
+                break;
+        case DIE_MCA_MONARCH_LEAVE:
+        case DIE_INIT_MONARCH_LEAVE:
+                xpc_vars->heartbeat++;
+                xpc_vars->heartbeat_offline = 0;
+                break;
+        }
+        return NOTIFY_DONE;
+}
 int __init
 xpc_init(void)
 {
@@ -1154,6 +1247,12 @@ xpc_init(void)
                dev_warn(xpc_part, "can't register reboot notifier\n");
        }
+        /* add ourselves to the die_notifier list (i.e., ia64die_chain) */
+        ret = register_die_notifier(&xpc_die_notifier);
+        if (ret != 0) {
+                dev_warn(xpc_part, "can't register die notifier\n");
+        }
        /*
         * Set the beating to other partitions into motion.  This is
@@ -1179,6 +1278,9 @@ xpc_init(void)
                /* take ourselves off of the reboot_notifier_list */
                (void) unregister_reboot_notifier(&xpc_reboot_notifier);
+                /* take ourselves off of the die_notifier list */
+                (void) unregister_die_notifier(&xpc_die_notifier);
                del_timer_sync(&xpc_hb_timer);
                free_irq(SGI_XPC_ACTIVATE, NULL);
                xpc_restrict_IPI_ops();
diff --git a/arch/ia64/sn/kernel/xpc_partition.c b/arch/ia64/sn/kernel/xpc_partition.c
index 581e113d2d37..cdd6431853a1 100644
--- a/arch/ia64/sn/kernel/xpc_partition.c
+++ b/arch/ia64/sn/kernel/xpc_partition.c
@@ -436,13 +436,13 @@ xpc_check_remote_hb(void)
                }
                dev_dbg(xpc_part, "partid = %d, heartbeat = %ld, last_heartbeat"
-                        " = %ld, kdb_status = %ld, HB_mask = 0x%lx\n", partid,
+                        " = %ld, heartbeat_offline = %ld, HB_mask = 0x%lx\n",
-                        remote_vars->heartbeat, part->last_heartbeat,
+                        partid, remote_vars->heartbeat, part->last_heartbeat,
-                        remote_vars->kdb_status,
+                        remote_vars->heartbeat_offline,
                        remote_vars->heartbeating_to_mask);
                if (((remote_vars->heartbeat == part->last_heartbeat) &&
-                        (remote_vars->kdb_status == 0)) ||
+                        (remote_vars->heartbeat_offline == 0)) ||
                             !xpc_hb_allowed(sn_partition_id, remote_vars)) {
                        XPC_DEACTIVATE_PARTITION(part, xpcNoHeartbeat);
diff --git a/arch/ia64/sn/pci/pcibr/pcibr_provider.c b/arch/ia64/sn/pci/pcibr/pcibr_provider.c
index 7b03b8084ffc..1f500c81002c 100644
--- a/arch/ia64/sn/pci/pcibr/pcibr_provider.c
+++ b/arch/ia64/sn/pci/pcibr/pcibr_provider.c
@@ -212,13 +212,13 @@ void pcibr_target_interrupt(struct sn_irq_info *sn_irq_info)
                    pdi_pcibus_info;
                /* Disable the device's IRQ   */
-                pcireg_intr_enable_bit_clr(pcibus_info, bit);
+                pcireg_intr_enable_bit_clr(pcibus_info, (1 << bit));
                /* Change the device's IRQ    */
                pcireg_intr_addr_addr_set(pcibus_info, bit, xtalk_addr);
                /* Re-enable the device's IRQ */
-                pcireg_intr_enable_bit_set(pcibus_info, bit);
+                pcireg_intr_enable_bit_set(pcibus_info, (1 << bit));
                pcibr_force_interrupt(sn_irq_info);
        }
diff --git a/arch/ia64/sn/pci/pcibr/pcibr_reg.c b/arch/ia64/sn/pci/pcibr/pcibr_reg.c
index 4f718c3e93d3..5d534091262c 100644
--- a/arch/ia64/sn/pci/pcibr/pcibr_reg.c
+++ b/arch/ia64/sn/pci/pcibr/pcibr_reg.c
@@ -131,7 +131,7 @@ void pcireg_intr_enable_bit_clr(struct pcibus_info *pcibus_info, uint64_t bits)
                        __sn_clrq_relaxed(&ptr->tio.cp_int_enable, bits);
                        break;
                case PCIBR_BRIDGETYPE_PIC:
-                        __sn_clrq_relaxed(&ptr->pic.p_int_enable, ~bits);
+                        __sn_clrq_relaxed(&ptr->pic.p_int_enable, bits);
                        break;
                default:
                        panic
diff --git a/arch/ia64/sn/pci/tioce_provider.c b/arch/ia64/sn/pci/tioce_provider.c
index 9f03d4e5121c..dda196c9e324 100644
--- a/arch/ia64/sn/pci/tioce_provider.c
+++ b/arch/ia64/sn/pci/tioce_provider.c
@@ -218,7 +218,7 @@ tioce_alloc_map(struct tioce_kernel *ce_kern, int type, int port,
        if (i > last)
                return 0;
-        map = kcalloc(1, sizeof(struct tioce_dmamap), GFP_ATOMIC);
+        map = kzalloc(sizeof(struct tioce_dmamap), GFP_ATOMIC);
        if (!map)
                return 0;
@@ -555,7 +555,7 @@ tioce_kern_init(struct tioce_common *tioce_common)
        struct tioce *tioce_mmr;
        struct tioce_kernel *tioce_kern;
-        tioce_kern = kcalloc(1, sizeof(struct tioce_kernel), GFP_KERNEL);
+        tioce_kern = kzalloc(sizeof(struct tioce_kernel), GFP_KERNEL);
        if (!tioce_kern) {
                return NULL;
        }
@@ -727,7 +727,7 @@ tioce_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *cont
         * Allocate kernel bus soft and copy from prom.
         */
-        tioce_common = kcalloc(1, sizeof(struct tioce_common), GFP_KERNEL);
+        tioce_common = kzalloc(sizeof(struct tioce_common), GFP_KERNEL);
        if (!tioce_common)
                return NULL;
diff --git a/arch/m32r/kernel/process.c b/arch/m32r/kernel/process.c
index ea13a8f4d8b0..cc4b571e5db7 100644
--- a/arch/m32r/kernel/process.c
+++ b/arch/m32r/kernel/process.c
@@ -104,7 +104,9 @@ void cpu_idle (void)
                        idle();
                }
+                preempt_enable_no_resched();
                schedule();
+                preempt_disable();
        }
 }
diff --git a/arch/m32r/kernel/smpboot.c b/arch/m32r/kernel/smpboot.c
index 640d592ea072..b90c54169fa5 100644
--- a/arch/m32r/kernel/smpboot.c
+++ b/arch/m32r/kernel/smpboot.c
@@ -426,6 +426,7 @@ void __init smp_cpus_done(unsigned int max_cpus)
 int __init start_secondary(void *unused)
 {
        cpu_init();
+        preempt_disable();
        smp_callin();
        while (!cpu_isset(smp_processor_id(), smp_commenced_mask))
                cpu_relax();
diff --git a/arch/m68k/kernel/process.c b/arch/m68k/kernel/process.c
index 11b1b90ba6ba..13d109328a42 100644
--- a/arch/m68k/kernel/process.c
+++ b/arch/m68k/kernel/process.c
@@ -102,7 +102,9 @@ void cpu_idle(void)
        while (1) {
                while (!need_resched())
                        idle();
+                preempt_enable_no_resched();
                schedule();
+                preempt_disable();
        }
 }
diff --git a/arch/mips/au1000/common/setup.c b/arch/mips/au1000/common/setup.c
index 1ef15d5ef943..4f21f42d096b 100644
--- a/arch/mips/au1000/common/setup.c
+++ b/arch/mips/au1000/common/setup.c
@@ -111,17 +111,6 @@ void __init plat_setup(void)
    }
 #endif
-#ifdef CONFIG_FB_E1356
-        if ((argptr = strstr(argptr, "video=")) == NULL) {
-                argptr = prom_getcmdline();
-#ifdef CONFIG_MIPS_PB1000
-                strcat(argptr, " video=e1356fb:system:pb1000,mmunalign:1");
-#else
-                strcat(argptr, " video=e1356fb:system:pb1500");
-#endif
-        }
-#endif
 #ifdef CONFIG_FB_XPERT98
        if ((argptr = strstr(argptr, "video=")) == NULL) {
                argptr = prom_getcmdline();
diff --git a/arch/mips/configs/ddb5476_defconfig b/arch/mips/configs/ddb5476_defconfig
index b260e51eb517..326f3aa63741 100644
--- a/arch/mips/configs/ddb5476_defconfig
+++ b/arch/mips/configs/ddb5476_defconfig
@@ -658,7 +658,6 @@ CONFIG_FB=y
 # CONFIG_FB_SMIVGX is not set
 # CONFIG_FB_CYBLA is not set
 # CONFIG_FB_TRIDENT is not set
-# CONFIG_FB_E1356 is not set
 # CONFIG_FB_S1D13XXX is not set
 # CONFIG_FB_VIRTUAL is not set
diff --git a/arch/mips/configs/jmr3927_defconfig b/arch/mips/configs/jmr3927_defconfig
index 9a728c2d8fd5..6390a753e80b 100644
--- a/arch/mips/configs/jmr3927_defconfig
+++ b/arch/mips/configs/jmr3927_defconfig
@@ -628,7 +628,6 @@ CONFIG_FB=y
 # CONFIG_FB_SMIVGX is not set
 # CONFIG_FB_CYBLA is not set
 # CONFIG_FB_TRIDENT is not set
-# CONFIG_FB_E1356 is not set
 # CONFIG_FB_S1D13XXX is not set
 # CONFIG_FB_VIRTUAL is not set
diff --git a/arch/mips/configs/ocelot_3_defconfig b/arch/mips/configs/ocelot_3_defconfig
index ffb23fcab862..f18d05c2ca77 100644
--- a/arch/mips/configs/ocelot_3_defconfig
+++ b/arch/mips/configs/ocelot_3_defconfig
@@ -758,7 +758,6 @@ CONFIG_FB_MODE_HELPERS=y
 # CONFIG_FB_SMIVGX is not set
 # CONFIG_FB_CYBLA is not set
 # CONFIG_FB_TRIDENT is not set
-# CONFIG_FB_E1356 is not set
 # CONFIG_FB_S1D13XXX is not set
 # CONFIG_FB_VIRTUAL is not set
diff --git a/arch/mips/configs/pnx8550-v2pci_defconfig b/arch/mips/configs/pnx8550-v2pci_defconfig
index 05e65206a7b4..37bd8d5c865d 100644
--- a/arch/mips/configs/pnx8550-v2pci_defconfig
+++ b/arch/mips/configs/pnx8550-v2pci_defconfig
@@ -897,7 +897,6 @@ CONFIG_FB=y
 # CONFIG_FB_SMIVGX is not set
 # CONFIG_FB_CYBLA is not set
 # CONFIG_FB_TRIDENT is not set
-# CONFIG_FB_E1356 is not set
 # CONFIG_FB_S1D13XXX is not set
 # CONFIG_FB_VIRTUAL is not set
diff --git a/arch/mips/configs/rbhma4500_defconfig b/arch/mips/configs/rbhma4500_defconfig
index 2bc61ca4ba08..897420d39053 100644
--- a/arch/mips/configs/rbhma4500_defconfig
+++ b/arch/mips/configs/rbhma4500_defconfig
@@ -876,7 +876,6 @@ CONFIG_FB_ATY_CT=y
 # CONFIG_FB_SMIVGX is not set
 # CONFIG_FB_CYBLA is not set
 # CONFIG_FB_TRIDENT is not set
-# CONFIG_FB_E1356 is not set
 # CONFIG_FB_S1D13XXX is not set
 # CONFIG_FB_VIRTUAL is not set
diff --git a/arch/mips/kernel/ioctl32.c b/arch/mips/kernel/ioctl32.c
index ed9b2da510be..9ea1fc748864 100644
--- a/arch/mips/kernel/ioctl32.c
+++ b/arch/mips/kernel/ioctl32.c
@@ -26,10 +26,8 @@ long sys_ioctl(unsigned int fd, unsigned int cmd, unsigned long arg);
 #define CODE
 #include "compat_ioctl.c"
-typedef int (* ioctl32_handler_t)(unsigned int, unsigned int, unsigned long, struct file *);
 #define COMPATIBLE_IOCTL(cmd)           HANDLE_IOCTL((cmd),sys_ioctl)
-#define HANDLE_IOCTL(cmd,handler)       { (cmd), (ioctl32_handler_t)(handler), NULL },
+#define HANDLE_IOCTL(cmd,handler)       { (cmd), (ioctl_trans_handler_t)(handler), NULL },
 #define IOCTL_TABLE_START \
        struct ioctl_trans ioctl_start[] = {
 #define IOCTL_TABLE_END \
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index 4fe3d5715c41..dd725779d91f 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -52,7 +52,9 @@ ATTRIB_NORET void cpu_idle(void)
                while (!need_resched())
                        if (cpu_wait)
                                (*cpu_wait)();
+                preempt_enable_no_resched();
                schedule();
+                preempt_disable();
        }
 }
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index fcacf1aae98a..25472fcaf715 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -82,7 +82,7 @@ extern ATTRIB_NORET void cpu_idle(void);
 */
 asmlinkage void start_secondary(void)
 {
-        unsigned int cpu = smp_processor_id();
+        unsigned int cpu;
        cpu_probe();
        cpu_report();
@@ -95,6 +95,8 @@ asmlinkage void start_secondary(void)
         */
        calibrate_delay();
+        preempt_disable();
+        cpu = smp_processor_id();
        cpu_data[cpu].udelay_val = loops_per_jiffy;
        prom_smp_finish();
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/irq.c b/arch/mips/tx4938/toshiba_rbtx4938/irq.c
index 230f5a93c2e6..9cd9c0fe2265 100644
--- a/arch/mips/tx4938/toshiba_rbtx4938/irq.c
+++ b/arch/mips/tx4938/toshiba_rbtx4938/irq.c
@@ -84,7 +84,6 @@ IRQ  Device
 #include <asm/ptrace.h>
 #include <asm/reboot.h>
 #include <asm/time.h>
-#include <linux/version.h>
 #include <linux/bootmem.h>
 #include <asm/tx4938/rbtx4938.h>
diff --git a/arch/parisc/kernel/asm-offsets.c b/arch/parisc/kernel/asm-offsets.c
index 1ad44f92d6e4..e23c4e1e3a25 100644
--- a/arch/parisc/kernel/asm-offsets.c
+++ b/arch/parisc/kernel/asm-offsets.c
@@ -30,7 +30,6 @@
 #include <linux/types.h>
 #include <linux/sched.h>
 #include <linux/thread_info.h>
-#include <linux/version.h>
 #include <linux/ptrace.h>
 #include <linux/hardirq.h>
diff --git a/arch/parisc/kernel/process.c b/arch/parisc/kernel/process.c
index 7fdca87ef647..fee4f1f09adc 100644
--- a/arch/parisc/kernel/process.c
+++ b/arch/parisc/kernel/process.c
@@ -88,11 +88,15 @@ void default_idle(void)
 */
 void cpu_idle(void)
 {
+        set_thread_flag(TIF_POLLING_NRFLAG);
        /* endless idle loop with no priority at all */
        while (1) {
                while (!need_resched())
                        barrier();
+                preempt_enable_no_resched();
                schedule();
+                preempt_disable();
                check_pgt_cache();
        }
 }
diff --git a/arch/parisc/kernel/smp.c b/arch/parisc/kernel/smp.c
index 5db3be4e2704..a9ecf6465784 100644
--- a/arch/parisc/kernel/smp.c
+++ b/arch/parisc/kernel/smp.c
@@ -463,6 +463,7 @@ void __init smp_callin(void)
 #endif
        smp_cpu_init(slave_id);
+        preempt_disable();
 #if 0   /* NOT WORKING YET - see entry.S */
        istack = (void *)__get_free_pages(GFP_KERNEL,ISTACK_ORDER);
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 1493c7896fe3..c523029674e6 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -581,17 +581,12 @@ config ARCH_FLATMEM_ENABLE
       def_bool y
       depends on PPC64 && !NUMA
-config ARCH_DISCONTIGMEM_ENABLE
+config ARCH_SPARSEMEM_ENABLE
-        def_bool y
-        depends on SMP && PPC_PSERIES
-config ARCH_DISCONTIGMEM_DEFAULT
        def_bool y
-        depends on ARCH_DISCONTIGMEM_ENABLE
-config ARCH_SPARSEMEM_ENABLE
+config ARCH_SPARSEMEM_DEFAULT
        def_bool y
-        depends on ARCH_DISCONTIGMEM_ENABLE
+        depends on SMP && PPC_PSERIES
 source "mm/Kconfig"
@@ -599,6 +594,10 @@ config HAVE_ARCH_EARLY_PFN_TO_NID
        def_bool y
        depends on NEED_MULTIPLE_NODES
+config ARCH_MEMORY_PROBE
+        def_bool y
+        depends on MEMORY_HOTPLUG
 # Some NUMA nodes have memory ranges that span
 # other nodes.  Even though a pfn is valid and
 # between a node's start and end pfns, it may not
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index b3ae2993efb8..9a74b7ab03a4 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -4,6 +4,7 @@
 ifeq ($(CONFIG_PPC64),y)
 EXTRA_CFLAGS    += -mno-minimal-toc
+CFLAGS_ioctl32.o += -Ifs/
 endif
 ifeq ($(CONFIG_PPC32),y)
 CFLAGS_prom_init.o      += -fPIC
@@ -11,17 +12,29 @@ CFLAGS_btext.o		+= -fPIC
 endif
 obj-y                           := semaphore.o cputable.o ptrace.o syscalls.o \
-                                   signal_32.o pmc.o
+                                   irq.o signal_32.o pmc.o vdso.o
+obj-y                           += vdso32/
 obj-$(CONFIG_PPC64)             += setup_64.o binfmt_elf32.o sys_ppc32.o \
-                                   signal_64.o ptrace32.o systbl.o
+                                   signal_64.o ptrace32.o systbl.o \
+                                   paca.o ioctl32.o cpu_setup_power4.o \
+                                   firmware.o sysfs.o udbg.o
+obj-$(CONFIG_PPC64)             += vdso64/
 obj-$(CONFIG_ALTIVEC)           += vecemu.o vector.o
 obj-$(CONFIG_POWER4)            += idle_power4.o
 obj-$(CONFIG_PPC_OF)            += of_device.o
-obj-$(CONFIG_PPC_RTAS)          += rtas.o
+procfs-$(CONFIG_PPC64)          := proc_ppc64.o
+obj-$(CONFIG_PROC_FS)           += $(procfs-y)
+rtaspci-$(CONFIG_PPC64)         := rtas_pci.o
+obj-$(CONFIG_PPC_RTAS)          += rtas.o $(rtaspci-y)
 obj-$(CONFIG_RTAS_FLASH)        += rtas_flash.o
 obj-$(CONFIG_RTAS_PROC)         += rtas-proc.o
+obj-$(CONFIG_LPARCFG)           += lparcfg.o
 obj-$(CONFIG_IBMVIO)            += vio.o
 obj-$(CONFIG_GENERIC_TBSYNC)    += smp-tbsync.o
+obj-$(CONFIG_PPC_PSERIES)       += udbg_16550.o
+obj-$(CONFIG_PPC_MAPLE)         += udbg_16550.o
+udbgscc-$(CONFIG_PPC64)         := udbg_scc.o
+obj-$(CONFIG_PPC_PMAC)          += $(udbgscc-y)
 ifeq ($(CONFIG_PPC_MERGE),y)
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index b75757251994..4550eb4f4fbd 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -37,12 +37,12 @@
 #include <asm/cputable.h>
 #include <asm/thread_info.h>
 #include <asm/rtas.h>
+#include <asm/vdso_datapage.h>
 #ifdef CONFIG_PPC64
 #include <asm/paca.h>
 #include <asm/lppaca.h>
 #include <asm/iseries/hv_lp_event.h>
 #include <asm/cache.h>
-#include <asm/systemcfg.h>
 #include <asm/compat.h>
 #endif
@@ -106,7 +106,6 @@ int main(void)
        DEFINE(ICACHEL1LINESIZE, offsetof(struct ppc64_caches, iline_size));
        DEFINE(ICACHEL1LOGLINESIZE, offsetof(struct ppc64_caches, log_iline_size));
        DEFINE(ICACHEL1LINESPERPAGE, offsetof(struct ppc64_caches, ilines_per_page));
-        DEFINE(PLATFORM, offsetof(struct systemcfg, platform));
        DEFINE(PLATFORM_LPAR, PLATFORM_LPAR);
        /* paca */
@@ -252,25 +251,42 @@ int main(void)
        DEFINE(TASK_SIZE, TASK_SIZE);
        DEFINE(NUM_USER_SEGMENTS, TASK_SIZE>>28);
-#else /* CONFIG_PPC64 */
+#endif /* ! CONFIG_PPC64 */
-        /* systemcfg offsets for use by vdso */
-        DEFINE(CFG_TB_ORIG_STAMP, offsetof(struct systemcfg, tb_orig_stamp));
-        DEFINE(CFG_TB_TICKS_PER_SEC, offsetof(struct systemcfg, tb_ticks_per_sec));
-        DEFINE(CFG_TB_TO_XS, offsetof(struct systemcfg, tb_to_xs));
-        DEFINE(CFG_STAMP_XSEC, offsetof(struct systemcfg, stamp_xsec));
-        DEFINE(CFG_TB_UPDATE_COUNT, offsetof(struct systemcfg, tb_update_count));
-        DEFINE(CFG_TZ_MINUTEWEST, offsetof(struct systemcfg, tz_minuteswest));
-        DEFINE(CFG_TZ_DSTTIME, offsetof(struct systemcfg, tz_dsttime));
-        DEFINE(CFG_SYSCALL_MAP32, offsetof(struct systemcfg, syscall_map_32));
-        DEFINE(CFG_SYSCALL_MAP64, offsetof(struct systemcfg, syscall_map_64));
-        /* timeval/timezone offsets for use by vdso */
+        /* datapage offsets for use by vdso */
+        DEFINE(CFG_TB_ORIG_STAMP, offsetof(struct vdso_data, tb_orig_stamp));
+        DEFINE(CFG_TB_TICKS_PER_SEC, offsetof(struct vdso_data, tb_ticks_per_sec));
+        DEFINE(CFG_TB_TO_XS, offsetof(struct vdso_data, tb_to_xs));
+        DEFINE(CFG_STAMP_XSEC, offsetof(struct vdso_data, stamp_xsec));
+        DEFINE(CFG_TB_UPDATE_COUNT, offsetof(struct vdso_data, tb_update_count));
+        DEFINE(CFG_TZ_MINUTEWEST, offsetof(struct vdso_data, tz_minuteswest));
+        DEFINE(CFG_TZ_DSTTIME, offsetof(struct vdso_data, tz_dsttime));
+        DEFINE(CFG_SYSCALL_MAP32, offsetof(struct vdso_data, syscall_map_32));
+        DEFINE(WTOM_CLOCK_SEC, offsetof(struct vdso_data, wtom_clock_sec));
+        DEFINE(WTOM_CLOCK_NSEC, offsetof(struct vdso_data, wtom_clock_nsec));
+#ifdef CONFIG_PPC64
+        DEFINE(CFG_SYSCALL_MAP64, offsetof(struct vdso_data, syscall_map_64));
        DEFINE(TVAL64_TV_SEC, offsetof(struct timeval, tv_sec));
        DEFINE(TVAL64_TV_USEC, offsetof(struct timeval, tv_usec));
        DEFINE(TVAL32_TV_SEC, offsetof(struct compat_timeval, tv_sec));
        DEFINE(TVAL32_TV_USEC, offsetof(struct compat_timeval, tv_usec));
+        DEFINE(TSPC32_TV_SEC, offsetof(struct compat_timespec, tv_sec));
+        DEFINE(TSPC32_TV_NSEC, offsetof(struct compat_timespec, tv_nsec));
+#else
+        DEFINE(TVAL32_TV_SEC, offsetof(struct timeval, tv_sec));
+        DEFINE(TVAL32_TV_USEC, offsetof(struct timeval, tv_usec));
+        DEFINE(TSPEC32_TV_SEC, offsetof(struct timespec, tv_sec));
+        DEFINE(TSPEC32_TV_NSEC, offsetof(struct timespec, tv_nsec));
+#endif
+        /* timeval/timezone offsets for use by vdso */
        DEFINE(TZONE_TZ_MINWEST, offsetof(struct timezone, tz_minuteswest));
        DEFINE(TZONE_TZ_DSTTIME, offsetof(struct timezone, tz_dsttime));
-#endif /* CONFIG_PPC64 */
+        /* Other bits used by the vdso */
+        DEFINE(CLOCK_REALTIME, CLOCK_REALTIME);
+        DEFINE(CLOCK_MONOTONIC, CLOCK_MONOTONIC);
+        DEFINE(NSEC_PER_SEC, NSEC_PER_SEC);
+        DEFINE(CLOCK_REALTIME_RES, TICK_NSEC);
        return 0;
 }
diff --git a/arch/ppc64/kernel/cpu_setup_power4.S b/arch/powerpc/kernel/cpu_setup_power4.S
index 1fb673c511ff..cca942fe6115 100644
--- a/arch/ppc64/kernel/cpu_setup_power4.S
+++ b/arch/powerpc/kernel/cpu_setup_power4.S
@@ -114,11 +114,11 @@ _GLOBAL(__setup_cpu_ppc970)
        .data
        .balign L1_CACHE_BYTES,0
-cpu_state_storage:      
+cpu_state_storage:
        .space  CS_SIZE
        .balign L1_CACHE_BYTES,0
        .text
-        
 /* Called in normal context to backup CPU 0 state. This
 * does not include cache settings. This function is also
 * called for machine sleep. This does not include the MMU
@@ -151,7 +151,7 @@ _GLOBAL(__save_cpu_setup)
        std     r3,CS_HID4(r5)
        mfspr   r3,SPRN_HID5
        std     r3,CS_HID5(r5)
-        
 2:
        mtcr    r7
        blr
@@ -213,7 +213,7 @@ _GLOBAL(__restore_cpu_setup)
        mtspr   SPRN_HID1,r3
        sync
        isync
-        
        /* Restore HID4 */
        ld      r3,CS_HID4(r5)
        sync
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index cc4e9eb1c13f..1d85cedbbb7b 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -52,6 +52,9 @@ extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
 #define COMMON_USER             (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
                                 PPC_FEATURE_HAS_MMU)
 #define COMMON_USER_PPC64       (COMMON_USER | PPC_FEATURE_64)
+#define COMMON_USER_POWER4      (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
+#define COMMON_USER_POWER5      (COMMON_USER_PPC64 | PPC_FEATURE_POWER5)
+#define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS)
 /* We only set the spe features if the kernel was compiled with
@@ -160,7 +163,7 @@ struct cpu_spec	cpu_specs[] = {
                .pvr_value              = 0x00350000,
                .cpu_name               = "POWER4 (gp)",
                .cpu_features           = CPU_FTRS_POWER4,
-                .cpu_user_features      = COMMON_USER_PPC64,
+                .cpu_user_features      = COMMON_USER_POWER4,
                .icache_bsize           = 128,
                .dcache_bsize           = 128,
                .num_pmcs               = 8,
@@ -175,7 +178,7 @@ struct cpu_spec	cpu_specs[] = {
                .pvr_value              = 0x00380000,
                .cpu_name               = "POWER4+ (gq)",
                .cpu_features           = CPU_FTRS_POWER4,
-                .cpu_user_features      = COMMON_USER_PPC64,
+                .cpu_user_features      = COMMON_USER_POWER4,
                .icache_bsize           = 128,
                .dcache_bsize           = 128,
                .num_pmcs               = 8,
@@ -190,7 +193,7 @@ struct cpu_spec	cpu_specs[] = {
                .pvr_value              = 0x00390000,
                .cpu_name               = "PPC970",
                .cpu_features           = CPU_FTRS_PPC970,
-                .cpu_user_features      = COMMON_USER_PPC64 |
+                .cpu_user_features      = COMMON_USER_POWER4 |
                        PPC_FEATURE_HAS_ALTIVEC_COMP,
                .icache_bsize           = 128,
                .dcache_bsize           = 128,
@@ -212,7 +215,7 @@ struct cpu_spec	cpu_specs[] = {
 #else
                .cpu_features           = CPU_FTRS_PPC970,
 #endif
-                .cpu_user_features      = COMMON_USER_PPC64 |
+                .cpu_user_features      = COMMON_USER_POWER4 |
                        PPC_FEATURE_HAS_ALTIVEC_COMP,
                .icache_bsize           = 128,
                .dcache_bsize           = 128,
@@ -230,7 +233,7 @@ struct cpu_spec	cpu_specs[] = {
                .pvr_value              = 0x00440000,
                .cpu_name               = "PPC970MP",
                .cpu_features           = CPU_FTRS_PPC970,
-                .cpu_user_features      = COMMON_USER_PPC64 |
+                .cpu_user_features      = COMMON_USER_POWER4 |
                        PPC_FEATURE_HAS_ALTIVEC_COMP,
                .icache_bsize           = 128,
                .dcache_bsize           = 128,
@@ -245,7 +248,7 @@ struct cpu_spec	cpu_specs[] = {
                .pvr_value              = 0x003a0000,
                .cpu_name               = "POWER5 (gr)",
                .cpu_features           = CPU_FTRS_POWER5,
-                .cpu_user_features      = COMMON_USER_PPC64,
+                .cpu_user_features      = COMMON_USER_POWER5,
                .icache_bsize           = 128,
                .dcache_bsize           = 128,
                .num_pmcs               = 6,
@@ -260,7 +263,7 @@ struct cpu_spec	cpu_specs[] = {
                .pvr_value              = 0x003b0000,
                .cpu_name               = "POWER5 (gs)",
                .cpu_features           = CPU_FTRS_POWER5,
-                .cpu_user_features      = COMMON_USER_PPC64,
+                .cpu_user_features      = COMMON_USER_POWER5_PLUS,
                .icache_bsize           = 128,
                .dcache_bsize           = 128,
                .num_pmcs               = 6,
@@ -276,7 +279,7 @@ struct cpu_spec	cpu_specs[] = {
                .cpu_name               = "Cell Broadband Engine",
                .cpu_features           = CPU_FTRS_CELL,
                .cpu_user_features      = COMMON_USER_PPC64 |
-                        PPC_FEATURE_HAS_ALTIVEC_COMP,
+                        PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP,
                .icache_bsize           = 128,
                .dcache_bsize           = 128,
                .cpu_setup              = __setup_cpu_be,
diff --git a/arch/ppc64/kernel/firmware.c b/arch/powerpc/kernel/firmware.c
index d8432c0fb27d..65eae752a527 100644
--- a/arch/ppc64/kernel/firmware.c
+++ b/arch/powerpc/kernel/firmware.c
@@ -1,6 +1,4 @@
 /*
- *  arch/ppc64/kernel/firmware.c
- *
 *  Extracted from cputable.c
 *
 *  Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
diff --git a/arch/powerpc/kernel/fpu.S b/arch/powerpc/kernel/fpu.S
index 4d6001fa1cf2..b780b42c95fc 100644
--- a/arch/powerpc/kernel/fpu.S
+++ b/arch/powerpc/kernel/fpu.S
@@ -41,20 +41,20 @@ _GLOBAL(load_up_fpu)
 #ifndef CONFIG_SMP
        LOADBASE(r3, last_task_used_math)
        toreal(r3)
-        LDL     r4,OFF(last_task_used_math)(r3)
+        PPC_LL  r4,OFF(last_task_used_math)(r3)
-        CMPI    0,r4,0
+        PPC_LCMPI       0,r4,0
        beq     1f
        toreal(r4)
        addi    r4,r4,THREAD            /* want last_task_used_math->thread */
        SAVE_32FPRS(0, r4)
        mffs    fr0
        stfd    fr0,THREAD_FPSCR(r4)
-        LDL     r5,PT_REGS(r4)
+        PPC_LL  r5,PT_REGS(r4)
        toreal(r5)
-        LDL     r4,_MSR-STACK_FRAME_OVERHEAD(r5)
+        PPC_LL  r4,_MSR-STACK_FRAME_OVERHEAD(r5)
        li      r10,MSR_FP|MSR_FE0|MSR_FE1
        andc    r4,r4,r10               /* disable FP for previous task */
-        STL     r4,_MSR-STACK_FRAME_OVERHEAD(r5)
+        PPC_STL r4,_MSR-STACK_FRAME_OVERHEAD(r5)
 1:
 #endif /* CONFIG_SMP */
        /* enable use of FP after return */
@@ -77,7 +77,7 @@ _GLOBAL(load_up_fpu)
 #ifndef CONFIG_SMP
        subi    r4,r5,THREAD
        fromreal(r4)
-        STL     r4,OFF(last_task_used_math)(r3)
+        PPC_STL r4,OFF(last_task_used_math)(r3)
 #endif /* CONFIG_SMP */
        /* restore registers and return */
        /* we haven't used ctr or xer or lr */
@@ -97,24 +97,24 @@ _GLOBAL(giveup_fpu)
        MTMSRD(r5)                      /* enable use of fpu now */
        SYNC_601
        isync
-        CMPI    0,r3,0
+        PPC_LCMPI       0,r3,0
        beqlr-                          /* if no previous owner, done */
        addi    r3,r3,THREAD            /* want THREAD of task */
-        LDL     r5,PT_REGS(r3)
+        PPC_LL  r5,PT_REGS(r3)
-        CMPI    0,r5,0
+        PPC_LCMPI       0,r5,0
        SAVE_32FPRS(0, r3)
        mffs    fr0
        stfd    fr0,THREAD_FPSCR(r3)
        beq     1f
-        LDL     r4,_MSR-STACK_FRAME_OVERHEAD(r5)
+        PPC_LL  r4,_MSR-STACK_FRAME_OVERHEAD(r5)
        li      r3,MSR_FP|MSR_FE0|MSR_FE1
        andc    r4,r4,r3                /* disable FP for previous task */
-        STL     r4,_MSR-STACK_FRAME_OVERHEAD(r5)
+        PPC_STL r4,_MSR-STACK_FRAME_OVERHEAD(r5)
 1:
 #ifndef CONFIG_SMP
        li      r5,0
        LOADBASE(r4,last_task_used_math)
-        STL     r5,OFF(last_task_used_math)(r4)
+        PPC_STL r5,OFF(last_task_used_math)(r4)
 #endif /* CONFIG_SMP */
        blr
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index b102e3a2415e..ccdf94731e30 100644
--- a/arch/powerpc/kernel/head_32.S
+++ b/arch/powerpc/kernel/head_32.S
@@ -1100,6 +1100,7 @@ start_here:
        mr      r3,r31
        mr      r4,r30
        bl      machine_init
+        bl      __save_cpu_setup
        bl      MMU_init
 #ifdef CONFIG_APUS
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index 16ab40daa738..8a8bf79ef044 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -28,7 +28,6 @@
 #include <asm/reg.h>
 #include <asm/page.h>
 #include <asm/mmu.h>
-#include <asm/systemcfg.h>
 #include <asm/ppc_asm.h>
 #include <asm/asm-offsets.h>
 #include <asm/bug.h>
@@ -1697,25 +1696,14 @@ _GLOBAL(pmac_secondary_start)
 *   SPRG3 = paca virtual address
 */
 _GLOBAL(__secondary_start)
+        /* Set thread priority to MEDIUM */
+        HMT_MEDIUM
-        HMT_MEDIUM                      /* Set thread priority to MEDIUM */
+        /* Load TOC */
        ld      r2,PACATOC(r13)
-        li      r6,0
-        stb     r6,PACAPROCENABLED(r13)
+        /* Do early setup for that CPU (stab, slb, hash table pointer) */
+        bl      .early_setup_secondary
-#ifndef CONFIG_PPC_ISERIES
-        /* Initialize the page table pointer register. */
-        LOADADDR(r6,_SDR1)
-        ld      r6,0(r6)                /* get the value of _SDR1        */
-        mtspr   SPRN_SDR1,r6                    /* set the htab location         */
-#endif
-        /* Initialize the first segment table (or SLB) entry             */
-        ld      r3,PACASTABVIRT(r13)    /* get addr of segment table     */
-BEGIN_FTR_SECTION
-        bl      .stab_initialize
-END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
-        bl      .slb_initialize
        /* Initialize the kernel stack.  Just a repeat for iSeries.      */
        LOADADDR(r3,current_set)
@@ -1724,37 +1712,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
        addi    r1,r1,THREAD_SIZE-STACK_FRAME_OVERHEAD
        std     r1,PACAKSAVE(r13)
-        ld      r3,PACASTABREAL(r13)    /* get raddr of segment table    */
+        /* Clear backchain so we get nice backtraces */
-        ori     r4,r3,1                 /* turn on valid bit             */
-#ifdef CONFIG_PPC_ISERIES
-        li      r0,-1                   /* hypervisor call */
-        li      r3,1
-        sldi    r3,r3,63                /* 0x8000000000000000 */
-        ori     r3,r3,4                 /* 0x8000000000000004 */
-        sc                              /* HvCall_setASR */
-#else
-        /* set the ASR */
-        ld      r3,systemcfg@got(r2)    /* r3 = ptr to systemcfg         */
-        ld      r3,0(r3)
-        lwz     r3,PLATFORM(r3)         /* r3 = platform flags           */
-        andi.   r3,r3,PLATFORM_LPAR     /* Test if bit 0 is set (LPAR bit) */
-        beq     98f                     /* branch if result is 0  */
-        mfspr   r3,SPRN_PVR
-        srwi    r3,r3,16
-        cmpwi   r3,0x37                 /* SStar  */
-        beq     97f
-        cmpwi   r3,0x36                 /* IStar  */
-        beq     97f
-        cmpwi   r3,0x34                 /* Pulsar */
-        bne     98f
-97:     li      r3,H_SET_ASR            /* hcall = H_SET_ASR */
-        HVSC                            /* Invoking hcall */
-        b       99f
-98:                                     /* !(rpa hypervisor) || !(star)  */
-        mtasr   r4                      /* set the stab location         */
-99:
-#endif
        li      r7,0
        mtlr    r7
@@ -1777,6 +1735,7 @@ _GLOBAL(start_secondary_prolog)
        li      r3,0
        std     r3,0(r1)                /* Zero the stack frame pointer */
        bl      .start_secondary
+        b       .
 #endif
 /*
@@ -1896,40 +1855,6 @@ _STATIC(start_here_multiplatform)
        mr      r3,r31
        bl      .early_setup
-        /* set the ASR */
-        ld      r3,PACASTABREAL(r13)
-        ori     r4,r3,1                 /* turn on valid bit             */
-        ld      r3,systemcfg@got(r2)    /* r3 = ptr to systemcfg */
-        ld      r3,0(r3)
-        lwz     r3,PLATFORM(r3)         /* r3 = platform flags */
-        andi.   r3,r3,PLATFORM_LPAR     /* Test if bit 0 is set (LPAR bit) */
-        beq     98f                     /* branch if result is 0  */
-        mfspr   r3,SPRN_PVR
-        srwi    r3,r3,16
-        cmpwi   r3,0x37                 /* SStar */
-        beq     97f
-        cmpwi   r3,0x36                 /* IStar  */
-        beq     97f
-        cmpwi   r3,0x34                 /* Pulsar */
-        bne     98f
-97:     li      r3,H_SET_ASR            /* hcall = H_SET_ASR */
-        HVSC                            /* Invoking hcall */
-        b       99f
-98:                                     /* !(rpa hypervisor) || !(star) */
-        mtasr   r4                      /* set the stab location        */
-99:
-        /* Set SDR1 (hash table pointer) */
-        ld      r3,systemcfg@got(r2)    /* r3 = ptr to systemcfg */
-        ld      r3,0(r3)
-        lwz     r3,PLATFORM(r3)         /* r3 = platform flags */
-        /* Test if bit 0 is set (LPAR bit) */
-        andi.   r3,r3,PLATFORM_LPAR
-        bne     98f                     /* branch if result is !0  */
-        LOADADDR(r6,_SDR1)              /* Only if NOT LPAR */
-        add     r6,r6,r26
-        ld      r6,0(r6)                /* get the value of _SDR1 */
-        mtspr   SPRN_SDR1,r6                    /* set the htab location  */
-98: 
        LOADADDR(r3,.start_here_common)
        SET_REG_TO_CONST(r4, MSR_KERNEL)
        mtspr   SPRN_SRR0,r3
diff --git a/arch/ppc64/kernel/ioctl32.c b/arch/powerpc/kernel/ioctl32.c
index ba4a899045c2..3fa6a93adbd0 100644
--- a/arch/ppc64/kernel/ioctl32.c
+++ b/arch/powerpc/kernel/ioctl32.c
@@ -1,6 +1,6 @@
-/* 
+/*
 * ioctl32.c: Conversion between 32bit and 64bit native ioctls.
- * 
+ *
 * Based on sparc64 ioctl32.c by:
 *
 * Copyright (C) 1997-2000  Jakub Jelinek  (jakub@redhat.com)
diff --git a/arch/ppc64/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 87474584033f..4b7940693f3d 100644
--- a/arch/ppc64/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -5,12 +5,12 @@
 *    Copyright (C) 1992 Linus Torvalds
 *  Adapted from arch/i386 by Gary Thomas
 *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
- *  Updated and modified by Cort Dougan (cort@cs.nmt.edu)
+ *  Updated and modified by Cort Dougan <cort@fsmlabs.com>
- *    Copyright (C) 1996 Cort Dougan
+ *    Copyright (C) 1996-2001 Cort Dougan
 *  Adapted for Power Macintosh by Paul Mackerras
 *    Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au)
 *  Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
- * 
+ *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
@@ -21,6 +21,14 @@
 * instead of just grabbing them. Thus setups with different IRQ numbers
 * shouldn't result in any weird surprises, and installing new handlers
 * should be easier.
+ *
+ * The MPC8xx has an interrupt mask in the SIU.  If a bit is set, the
+ * interrupt is _enabled_.  As expected, IRQ0 is bit 0 in the 32-bit
+ * mask register (of which only 16 are defined), hence the weird shifting
+ * and complement of the cached_irq_mask.  I want to be able to stuff
+ * this right into the SIU SMASK register.
+ * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx
+ * to reduce code space and undefined function references.
 */
 #include <linux/errno.h>
@@ -29,6 +37,7 @@
 #include <linux/kernel_stat.h>
 #include <linux/signal.h>
 #include <linux/sched.h>
+#include <linux/ptrace.h>
 #include <linux/ioport.h>
 #include <linux/interrupt.h>
 #include <linux/timex.h>
@@ -40,9 +49,13 @@
 #include <linux/irq.h>
 #include <linux/proc_fs.h>
 #include <linux/random.h>
-#include <linux/kallsyms.h>
+#include <linux/seq_file.h>
+#include <linux/cpumask.h>
 #include <linux/profile.h>
 #include <linux/bitops.h>
+#ifdef CONFIG_PPC64
+#include <linux/kallsyms.h>
+#endif
 #include <asm/uaccess.h>
 #include <asm/system.h>
@@ -52,35 +65,54 @@
 #include <asm/cache.h>
 #include <asm/prom.h>
 #include <asm/ptrace.h>
-#include <asm/iseries/it_lp_queue.h>
 #include <asm/machdep.h>
+#ifdef CONFIG_PPC64
+#include <asm/iseries/it_lp_queue.h>
 #include <asm/paca.h>
+#endif
-#ifdef CONFIG_SMP
+static int ppc_spurious_interrupts;
-extern void iSeries_smp_message_recv( struct pt_regs * );
+#if defined(CONFIG_PPC_ISERIES) && defined(CONFIG_SMP)
+extern void iSeries_smp_message_recv(struct pt_regs *);
+#endif
+#ifdef CONFIG_PPC32
+#define NR_MASK_WORDS   ((NR_IRQS + 31) / 32)
+unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];
+atomic_t ppc_n_lost_interrupts;
+#ifdef CONFIG_TAU_INT
+extern int tau_initialized;
+extern int tau_interrupts(int);
+#endif
+#if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE)
+extern atomic_t ipi_recv;
+extern atomic_t ipi_sent;
 #endif
+#endif /* CONFIG_PPC32 */
-extern irq_desc_t irq_desc[NR_IRQS];
+#ifdef CONFIG_PPC64
 EXPORT_SYMBOL(irq_desc);
 int distribute_irqs = 1;
 int __irq_offset_value;
-int ppc_spurious_interrupts;
 u64 ppc64_interrupt_controller;
+#endif /* CONFIG_PPC64 */
 int show_interrupts(struct seq_file *p, void *v)
 {
-        int i = *(loff_t *) v, j;
+        int i = *(loff_t *)v, j;
-        struct irqaction * action;
+        struct irqaction *action;
        irq_desc_t *desc;
        unsigned long flags;
        if (i == 0) {
-                seq_printf(p, "           ");
+                seq_puts(p, "           ");
-                for (j=0; j<NR_CPUS; j++) {
+                for_each_online_cpu(j)
-                        if (cpu_online(j))
+                        seq_printf(p, "CPU%d       ", j);
-                                seq_printf(p, "CPU%d       ",j);
-                }
                seq_putc(p, '\n');
        }
@@ -92,26 +124,41 @@ int show_interrupts(struct seq_file *p, void *v)
                        goto skip;
                seq_printf(p, "%3d: ", i);
 #ifdef CONFIG_SMP
-                for (j = 0; j < NR_CPUS; j++) {
+                for_each_online_cpu(j)
-                        if (cpu_online(j))
+                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
-                                seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
-                }
 #else
                seq_printf(p, "%10u ", kstat_irqs(i));
 #endif /* CONFIG_SMP */
                if (desc->handler)
-                        seq_printf(p, " %s ", desc->handler->typename );
+                        seq_printf(p, " %s ", desc->handler->typename);
                else
-                        seq_printf(p, "  None      ");
+                        seq_puts(p, "  None      ");
                seq_printf(p, "%s", (desc->status & IRQ_LEVEL) ? "Level " : "Edge  ");
-                seq_printf(p, "    %s",action->name);
+                seq_printf(p, "    %s", action->name);
-                for (action=action->next; action; action = action->next)
+                for (action = action->next; action; action = action->next)
                        seq_printf(p, ", %s", action->name);
                seq_putc(p, '\n');
 skip:
                spin_unlock_irqrestore(&desc->lock, flags);
-        } else if (i == NR_IRQS)
+        } else if (i == NR_IRQS) {
+#ifdef CONFIG_PPC32
+#ifdef CONFIG_TAU_INT
+                if (tau_initialized){
+                        seq_puts(p, "TAU: ");
+                        for (j = 0; j < NR_CPUS; j++)
+                                if (cpu_online(j))
+                                        seq_printf(p, "%10u ", tau_interrupts(j));
+                        seq_puts(p, "  PowerPC             Thermal Assist (cpu temp)\n");
+                }
+#endif
+#if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE)
+                /* should this be per processor send/receive? */
+                seq_printf(p, "IPI (recv/sent): %10u/%u\n",
+                                atomic_read(&ipi_recv), atomic_read(&ipi_sent));
+#endif
+#endif /* CONFIG_PPC32 */
                seq_printf(p, "BAD: %10u\n", ppc_spurious_interrupts);
+        }
        return 0;
 }
@@ -144,126 +191,6 @@ void fixup_irqs(cpumask_t map)
 }
 #endif
-extern int noirqdebug;
-/*
- * Eventually, this should take an array of interrupts and an array size
- * so it can dispatch multiple interrupts.
- */
-void ppc_irq_dispatch_handler(struct pt_regs *regs, int irq)
-{
-        int status;
-        struct irqaction *action;
-        int cpu = smp_processor_id();
-        irq_desc_t *desc = get_irq_desc(irq);
-        irqreturn_t action_ret;
-#ifdef CONFIG_IRQSTACKS
-        struct thread_info *curtp, *irqtp;
-#endif
-        kstat_cpu(cpu).irqs[irq]++;
-        if (desc->status & IRQ_PER_CPU) {
-                /* no locking required for CPU-local interrupts: */
-                ack_irq(irq);
-                action_ret = handle_IRQ_event(irq, regs, desc->action);
-                desc->handler->end(irq);
-                return;
-        }
-        spin_lock(&desc->lock);
-        ack_irq(irq);   
-        /*
-           REPLAY is when Linux resends an IRQ that was dropped earlier
-           WAITING is used by probe to mark irqs that are being tested
-           */
-        status = desc->status & ~(IRQ_REPLAY | IRQ_WAITING);
-        status |= IRQ_PENDING; /* we _want_ to handle it */
-        /*
-         * If the IRQ is disabled for whatever reason, we cannot
-         * use the action we have.
-         */
-        action = NULL;
-        if (likely(!(status & (IRQ_DISABLED | IRQ_INPROGRESS)))) {
-                action = desc->action;
-                if (!action || !action->handler) {
-                        ppc_spurious_interrupts++;
-                        printk(KERN_DEBUG "Unhandled interrupt %x, disabled\n", irq);
-                        /* We can't call disable_irq here, it would deadlock */
-                        if (!desc->depth)
-                                desc->depth = 1;
-                        desc->status |= IRQ_DISABLED;
-                        /* This is not a real spurrious interrupt, we
-                         * have to eoi it, so we jump to out
-                         */
-                        mask_irq(irq);
-                        goto out;
-                }
-                status &= ~IRQ_PENDING; /* we commit to handling */
-                status |= IRQ_INPROGRESS; /* we are handling it */
-        }
-        desc->status = status;
-        /*
-         * If there is no IRQ handler or it was disabled, exit early.
-           Since we set PENDING, if another processor is handling
-           a different instance of this same irq, the other processor
-           will take care of it.
-         */
-        if (unlikely(!action))
-                goto out;
-        /*
-         * Edge triggered interrupts need to remember
-         * pending events.
-         * This applies to any hw interrupts that allow a second
-         * instance of the same irq to arrive while we are in do_IRQ
-         * or in the handler. But the code here only handles the _second_
-         * instance of the irq, not the third or fourth. So it is mostly
-         * useful for irq hardware that does not mask cleanly in an
-         * SMP environment.
-         */
-        for (;;) {
-                spin_unlock(&desc->lock);
-#ifdef CONFIG_IRQSTACKS
-                /* Switch to the irq stack to handle this */
-                curtp = current_thread_info();
-                irqtp = hardirq_ctx[smp_processor_id()];
-                if (curtp != irqtp) {
-                        irqtp->task = curtp->task;
-                        irqtp->flags = 0;
-                        action_ret = call_handle_IRQ_event(irq, regs, action, irqtp);
-                        irqtp->task = NULL;
-                        if (irqtp->flags)
-                                set_bits(irqtp->flags, &curtp->flags);
-                } else
-#endif
-                        action_ret = handle_IRQ_event(irq, regs, action);
-                spin_lock(&desc->lock);
-                if (!noirqdebug)
-                        note_interrupt(irq, desc, action_ret, regs);
-                if (likely(!(desc->status & IRQ_PENDING)))
-                        break;
-                desc->status &= ~IRQ_PENDING;
-        }
-out:
-        desc->status &= ~IRQ_INPROGRESS;
-        /*
-         * The ->end() handler has to deal with interrupts which got
-         * disabled while the handler was running.
-         */
-        if (desc->handler) {
-                if (desc->handler->end)
-                        desc->handler->end(irq);
-                else if (desc->handler->enable)
-                        desc->handler->enable(irq);
-        }
-        spin_unlock(&desc->lock);
-}
 #ifdef CONFIG_PPC_ISERIES
 void do_IRQ(struct pt_regs *regs)
 {
@@ -310,8 +237,11 @@ void do_IRQ(struct pt_regs *regs)
 void do_IRQ(struct pt_regs *regs)
 {
        int irq;
+#ifdef CONFIG_IRQSTACKS
+        struct thread_info *curtp, *irqtp;
+#endif
-        irq_enter();
+        irq_enter();
 #ifdef CONFIG_DEBUG_STACKOVERFLOW
        /* Debugging check for stack overflow: is there less than 2KB free? */
@@ -328,20 +258,44 @@ void do_IRQ(struct pt_regs *regs)
        }
 #endif
+        /*
+         * Every platform is required to implement ppc_md.get_irq.
+         * This function will either return an irq number or -1 to
+         * indicate there are no more pending.
+         * The value -2 is for buggy hardware and means that this IRQ
+         * has already been handled. -- Tom
+         */
        irq = ppc_md.get_irq(regs);
-        if (irq >= 0)
+        if (irq >= 0) {
-                ppc_irq_dispatch_handler(regs, irq);
+#ifdef CONFIG_IRQSTACKS
-        else
+                /* Switch to the irq stack to handle this */
-                /* That's not SMP safe ... but who cares ? */
+                curtp = current_thread_info();
-                ppc_spurious_interrupts++;
+                irqtp = hardirq_ctx[smp_processor_id()];
+                if (curtp != irqtp) {
-        irq_exit();
+                        irqtp->task = curtp->task;
+                        irqtp->flags = 0;
+                        call___do_IRQ(irq, regs, irqtp);
+                        irqtp->task = NULL;
+                        if (irqtp->flags)
+                                set_bits(irqtp->flags, &curtp->flags);
+                } else
+#endif
+                        __do_IRQ(irq, regs);
+        } else
+#ifdef CONFIG_PPC32
+                if (irq != -2)
+#endif
+                        /* That's not SMP safe ... but who cares ? */
+                        ppc_spurious_interrupts++;
+        irq_exit();
 }
 #endif  /* CONFIG_PPC_ISERIES */
 void __init init_IRQ(void)
 {
+#ifdef CONFIG_PPC64
        static int once = 0;
        if (once)
@@ -349,10 +303,14 @@ void __init init_IRQ(void)
        once++;
+#endif
        ppc_md.init_IRQ();
+#ifdef CONFIG_PPC64
        irq_ctx_init();
+#endif
 }
+#ifdef CONFIG_PPC64
 #ifndef CONFIG_PPC_ISERIES
 /*
 * Virtual IRQ mapping code, used on systems with XICS interrupt controllers.
@@ -517,3 +475,4 @@ static int __init setup_noirqdistrib(char *str)
 }
 __setup("noirqdistrib", setup_noirqdistrib);
+#endif /* CONFIG_PPC64 */
diff --git a/arch/ppc64/kernel/lparcfg.c b/arch/powerpc/kernel/lparcfg.c
index 3e7b2f28ec83..1b3ba8a440a6 100644
--- a/arch/ppc64/kernel/lparcfg.c
+++ b/arch/powerpc/kernel/lparcfg.c
@@ -35,6 +35,7 @@
 #include <asm/time.h>
 #include <asm/iseries/it_exp_vpd_panel.h>
 #include <asm/prom.h>
+#include <asm/vdso_datapage.h>
 #define MODULE_VERS "1.6"
 #define MODULE_NAME "lparcfg"
@@ -42,7 +43,7 @@
 /* #define LPARCFG_DEBUG */
 /* find a better place for this function... */
-void log_plpar_hcall_return(unsigned long rc, char *tag)
+static void log_plpar_hcall_return(unsigned long rc, char *tag)
 {
        if (rc == 0)            /* success, return */
                return;
@@ -96,7 +97,7 @@ static unsigned long get_purr(void)
 #define lparcfg_write NULL
-/* 
+/*
 * Methods used to fetch LPAR data when running on an iSeries platform.
 */
 static int lparcfg_data(struct seq_file *m, void *v)
@@ -168,7 +169,7 @@ static int lparcfg_data(struct seq_file *m, void *v)
 #endif                          /* CONFIG_PPC_ISERIES */
 #ifdef CONFIG_PPC_PSERIES
-/* 
+/*
 * Methods used to fetch LPAR data when running on a pSeries platform.
 */
@@ -177,7 +178,7 @@ static int lparcfg_data(struct seq_file *m, void *v)
 *  entitled_capacity,unallocated_capacity,
 *  aggregation, resource_capability).
 *
- *  R4 = Entitled Processor Capacity Percentage. 
+ *  R4 = Entitled Processor Capacity Percentage.
 *  R5 = Unallocated Processor Capacity Percentage.
 *  R6 (AABBCCDDEEFFGGHH).
 *      XXXX - reserved (0)
@@ -190,7 +191,7 @@ static int lparcfg_data(struct seq_file *m, void *v)
 *          XX - variable processor Capacity Weight
 *            XX - Unallocated Variable Processor Capacity Weight.
 *              XXXX - Active processors in Physical Processor Pool.
- *                  XXXX  - Processors active on platform. 
+ *                  XXXX  - Processors active on platform.
 */
 static unsigned int h_get_ppp(unsigned long *entitled,
                              unsigned long *unallocated,
@@ -212,11 +213,10 @@ static void h_pic(unsigned long *pool_idle_time, unsigned long *num_procs)
        unsigned long dummy;
        rc = plpar_hcall(H_PIC, 0, 0, 0, 0, pool_idle_time, num_procs, &dummy);
-        log_plpar_hcall_return(rc, "H_PIC");
+        if (rc != H_Authority)
+                log_plpar_hcall_return(rc, "H_PIC");
 }
-static unsigned long get_purr(void);
 /* Track sum of all purrs across all processors. This is used to further */
 /* calculate usage values by different applications                       */
@@ -273,7 +273,7 @@ static void parse_system_parameter_string(struct seq_file *m)
                if (!workbuffer) {
                        printk(KERN_ERR "%s %s kmalloc failure at line %d \n",
                               __FILE__, __FUNCTION__, __LINE__);
-                        kfree(local_buffer);                    
+                        kfree(local_buffer);
                        return;
                }
 #ifdef LPARCFG_DEBUG
@@ -318,8 +318,6 @@ static void parse_system_parameter_string(struct seq_file *m)
        kfree(local_buffer);
 }
-static int lparcfg_count_active_processors(void);
 /* Return the number of processors in the system.
 * This function reads through the device tree and counts
 * the virtual processors, this does not include threads.
@@ -371,7 +369,7 @@ static int lparcfg_data(struct seq_file *m, void *v)
        lrdrp = (int *)get_property(rtas_node, "ibm,lrdr-capacity", NULL);
        if (lrdrp == NULL) {
-                partition_potential_processors = systemcfg->processorCount;
+                partition_potential_processors = vdso_data->processorCount;
        } else {
                partition_potential_processors = *(lrdrp + 4);
        }
@@ -547,7 +545,7 @@ static ssize_t lparcfg_write(struct file *file, const char __user * buf,
                retval = -EIO;
        }
-      out:
+out:
        kfree(kbuf);
        return retval;
 }
@@ -560,10 +558,10 @@ static int lparcfg_open(struct inode *inode, struct file *file)
 }
 struct file_operations lparcfg_fops = {
-      .owner    = THIS_MODULE,
+        .owner          = THIS_MODULE,
-      .read     = seq_read,
+        .read           = seq_read,
-      .open     = lparcfg_open,
+        .open           = lparcfg_open,
-      .release  = single_release,
+        .release        = single_release,
 };
 int __init lparcfg_init(void)
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index 3bedb532aed9..f6d84a75ed26 100644
--- a/arch/powerpc/kernel/misc_32.S
+++ b/arch/powerpc/kernel/misc_32.S
@@ -519,7 +519,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
 *
 * flush_icache_range(unsigned long start, unsigned long stop)
 */
-_GLOBAL(flush_icache_range)
+_GLOBAL(__flush_icache_range)
 BEGIN_FTR_SECTION
        blr                             /* for 601, do nothing */
 END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
@@ -607,27 +607,6 @@ _GLOBAL(invalidate_dcache_range)
        sync                            /* wait for dcbi's to get to ram */
        blr
-#ifdef CONFIG_NOT_COHERENT_CACHE
-/*
- * 40x cores have 8K or 16K dcache and 32 byte line size.
- * 44x has a 32K dcache and 32 byte line size.
- * 8xx has 1, 2, 4, 8K variants.
- * For now, cover the worst case of the 44x.
- * Must be called with external interrupts disabled.
- */
-#define CACHE_NWAYS     64
-#define CACHE_NLINES    16
-_GLOBAL(flush_dcache_all)
-        li      r4, (2 * CACHE_NWAYS * CACHE_NLINES)
-        mtctr   r4
-        lis     r5, KERNELBASE@h
-1:      lwz     r3, 0(r5)               /* Load one word from every line */
-        addi    r5, r5, L1_CACHE_BYTES
-        bdnz    1b
-        blr
-#endif /* CONFIG_NOT_COHERENT_CACHE */
 /*
 * Flush a particular page from the data cache to RAM.
 * Note: this is necessary because the instruction cache does *not*
diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S
index ae1433da09b2..ae48a002f81a 100644
--- a/arch/powerpc/kernel/misc_64.S
+++ b/arch/powerpc/kernel/misc_64.S
@@ -89,12 +89,12 @@ _GLOBAL(call_do_softirq)
        mtlr    r0
        blr
-_GLOBAL(call_handle_IRQ_event)
+_GLOBAL(call___do_IRQ)
        mflr    r0
        std     r0,16(r1)
-        stdu    r1,THREAD_SIZE-112(r6)
+        stdu    r1,THREAD_SIZE-112(r5)
-        mr      r1,r6
+        mr      r1,r5
-        bl      .handle_IRQ_event
+        bl      .__do_IRQ
        ld      r1,0(r1)
        ld      r0,16(r1)
        mtlr    r0
diff --git a/arch/ppc64/kernel/pacaData.c b/arch/powerpc/kernel/paca.c
index 3133c72b28ec..a7b68f911eb1 100644
--- a/arch/ppc64/kernel/pacaData.c
+++ b/arch/powerpc/kernel/paca.c
@@ -15,24 +15,16 @@
 #include <asm/processor.h>
 #include <asm/ptrace.h>
 #include <asm/page.h>
 #include <asm/lppaca.h>
 #include <asm/iseries/it_lp_queue.h>
 #include <asm/paca.h>
-static union {
-        struct systemcfg        data;
-        u8                      page[PAGE_SIZE];
-} systemcfg_store __attribute__((__section__(".data.page.aligned")));
-struct systemcfg *systemcfg = &systemcfg_store.data;
-EXPORT_SYMBOL(systemcfg);
 /* This symbol is provided by the linker - let it fill in the paca
 * field correctly */
 extern unsigned long __toc_start;
-/* The Paca is an array with one entry per processor.  Each contains an 
+/* The Paca is an array with one entry per processor.  Each contains an
 * lppaca, which contains the information shared between the
 * hypervisor and Linux.  Each also contains an ItLpRegSave area which
 * is used by the hypervisor to save registers.
diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c
index 47d6f7e2ea9f..5dcf4ba05ee8 100644
--- a/arch/powerpc/kernel/ppc_ksyms.c
+++ b/arch/powerpc/kernel/ppc_ksyms.c
@@ -44,6 +44,7 @@
 #include <asm/cputable.h>
 #include <asm/btext.h>
 #include <asm/div64.h>
+#include <asm/signal.h>
 #ifdef  CONFIG_8xx
 #include <asm/commproc.h>
@@ -56,7 +57,6 @@ extern void machine_check_exception(struct pt_regs *regs);
 extern void alignment_exception(struct pt_regs *regs);
 extern void program_check_exception(struct pt_regs *regs);
 extern void single_step_exception(struct pt_regs *regs);
-extern int do_signal(sigset_t *, struct pt_regs *);
 extern int pmac_newworld;
 extern int sys_sigreturn(struct pt_regs *regs);
@@ -188,9 +188,6 @@ EXPORT_SYMBOL(adb_try_handler_change);
 EXPORT_SYMBOL(cuda_request);
 EXPORT_SYMBOL(cuda_poll);
 #endif /* CONFIG_ADB_CUDA */
-#if defined(CONFIG_PPC_MULTIPLATFORM) && defined(CONFIG_PPC32)
-EXPORT_SYMBOL(_machine);
-#endif
 #ifdef CONFIG_PPC_PMAC
 EXPORT_SYMBOL(sys_ctrler);
 #endif
diff --git a/arch/ppc64/kernel/proc_ppc64.c b/arch/powerpc/kernel/proc_ppc64.c
index 24e955ee9487..7ba42a405f41 100644
--- a/arch/ppc64/kernel/proc_ppc64.c
+++ b/arch/powerpc/kernel/proc_ppc64.c
@@ -1,18 +1,16 @@
 /*
- * arch/ppc64/kernel/proc_ppc64.c
- *
 * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen IBM Corporation
- * 
+ *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
- * 
+ *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
- * 
+ *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
@@ -25,7 +23,7 @@
 #include <linux/slab.h>
 #include <linux/kernel.h>
-#include <asm/systemcfg.h>
+#include <asm/vdso_datapage.h>
 #include <asm/rtas.h>
 #include <asm/uaccess.h>
 #include <asm/prom.h>
@@ -53,7 +51,7 @@ static int __init proc_ppc64_create(void)
        if (!root)
                return 1;
-        if (!(systemcfg->platform & (PLATFORM_PSERIES | PLATFORM_CELL)))
+        if (!(platform_is_pseries() || _machine == PLATFORM_CELL))
                return 0;
        if (!proc_mkdir("rtas", root))
@@ -74,7 +72,7 @@ static int __init proc_ppc64_init(void)
        if (!pde)
                return 1;
        pde->nlink = 1;
-        pde->data = systemcfg;
+        pde->data = vdso_data;
        pde->size = PAGE_SIZE;
        pde->proc_fops = &page_map_fops;
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index f645adb57534..6a5b468edb4d 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -48,9 +48,6 @@
 #include <asm/machdep.h>
 #include <asm/pSeries_reconfig.h>
 #include <asm/pci-bridge.h>
-#ifdef CONFIG_PPC64
-#include <asm/systemcfg.h>
-#endif
 #ifdef DEBUG
 #define DBG(fmt...) printk(KERN_ERR fmt)
@@ -74,10 +71,6 @@ struct isa_reg_property {
 typedef int interpret_func(struct device_node *, unsigned long *,
                           int, int, int);
-extern struct rtas_t rtas;
-extern struct lmb lmb;
-extern unsigned long klimit;
 static int __initdata dt_root_addr_cells;
 static int __initdata dt_root_size_cells;
@@ -391,7 +384,7 @@ static int __devinit finish_node_interrupts(struct device_node *np,
 #ifdef CONFIG_PPC64
                /* We offset irq numbers for the u3 MPIC by 128 in PowerMac */
-                if (systemcfg->platform == PLATFORM_POWERMAC && ic && ic->parent) {
+                if (_machine == PLATFORM_POWERMAC && ic && ic->parent) {
                        char *name = get_property(ic->parent, "name", NULL);
                        if (name && !strcmp(name, "u3"))
                                np->intrs[intrcount].line += 128;
@@ -1087,9 +1080,9 @@ void __init unflatten_device_tree(void)
 static int __init early_init_dt_scan_cpus(unsigned long node,
                                          const char *uname, int depth, void *data)
 {
-        char *type = of_get_flat_dt_prop(node, "device_type", NULL);
        u32 *prop;
-        unsigned long size = 0;
+        unsigned long size;
+        char *type = of_get_flat_dt_prop(node, "device_type", &size);
        /* We are scanning "cpu" nodes only */
        if (type == NULL || strcmp(type, "cpu") != 0)
@@ -1115,7 +1108,7 @@ static int __init early_init_dt_scan_cpus(unsigned long node,
 #ifdef CONFIG_ALTIVEC
        /* Check if we have a VMX and eventually update CPU features */
-        prop = (u32 *)of_get_flat_dt_prop(node, "ibm,vmx", &size);
+        prop = (u32 *)of_get_flat_dt_prop(node, "ibm,vmx", NULL);
        if (prop && (*prop) > 0) {
                cur_cpu_spec->cpu_features |= CPU_FTR_ALTIVEC;
                cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_ALTIVEC;
@@ -1161,13 +1154,9 @@ static int __init early_init_dt_scan_chosen(unsigned long node,
        prop = (u32 *)of_get_flat_dt_prop(node, "linux,platform", NULL);
        if (prop == NULL)
                return 0;
-#ifdef CONFIG_PPC64
-        systemcfg->platform = *prop;
-#else
 #ifdef CONFIG_PPC_MULTIPLATFORM
        _machine = *prop;
 #endif
-#endif
 #ifdef CONFIG_PPC64
        /* check if iommu is forced on or off */
@@ -1264,7 +1253,14 @@ static int __init early_init_dt_scan_memory(unsigned long node,
        unsigned long l;
        /* We are scanning "memory" nodes only */
-        if (type == NULL || strcmp(type, "memory") != 0)
+        if (type == NULL) {
+                /*
+                 * The longtrail doesn't have a device_type on the
+                 * /memory node, so look for the node called /memory@0.
+                 */
+                if (depth != 1 || strcmp(uname, "memory@0") != 0)
+                        return 0;
+        } else if (strcmp(type, "memory") != 0)
                return 0;
        reg = (cell_t *)of_get_flat_dt_prop(node, "reg", &l);
@@ -1339,9 +1335,6 @@ void __init early_init_devtree(void *params)
        of_scan_flat_dt(early_init_dt_scan_memory, NULL);
        lmb_enforce_memory_limit(memory_limit);
        lmb_analyze();
-#ifdef CONFIG_PPC64
-        systemcfg->physicalMemorySize = lmb_phys_mem_size();
-#endif
        lmb_reserve(0, __pa(klimit));
        DBG("Phys. mem: %lx\n", lmb_phys_mem_size());
@@ -1908,7 +1901,7 @@ static int of_finish_dynamic_node(struct device_node *node,
        /* We don't support that function on PowerMac, at least
         * not yet
         */
-        if (systemcfg->platform == PLATFORM_POWERMAC)
+        if (_machine == PLATFORM_POWERMAC)
                return -ENODEV;
        /* fix up new node's linux_phandle field */
@@ -1992,9 +1985,11 @@ int prom_add_property(struct device_node* np, struct property* prop)
        *next = prop;
        write_unlock(&devtree_lock);
+#ifdef CONFIG_PROC_DEVICETREE
        /* try to add to proc as well if it was initialized */
        if (np->pde)
                proc_device_tree_add_prop(np->pde, prop);
+#endif /* CONFIG_PROC_DEVICETREE */
        return 0;
 }
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c
index 6dc33d19fc2a..4ce0105c308e 100644
--- a/arch/powerpc/kernel/prom_init.c
+++ b/arch/powerpc/kernel/prom_init.c
@@ -94,11 +94,17 @@ extern const struct linux_logo logo_linux_clut224;
 #ifdef CONFIG_PPC64
 #define RELOC(x)        (*PTRRELOC(&(x)))
 #define ADDR(x)         (u32) add_reloc_offset((unsigned long)(x))
+#define OF_WORKAROUNDS  0
 #else
 #define RELOC(x)        (x)
 #define ADDR(x)         (u32) (x)
+#define OF_WORKAROUNDS  of_workarounds
+int of_workarounds;
 #endif
+#define OF_WA_CLAIM     1       /* do phys/virt claim separately, then map */
+#define OF_WA_LONGTRAIL 2       /* work around longtrail bugs */
 #define PROM_BUG() do {                                         \
        prom_printf("kernel BUG at %s line 0x%x!\n",            \
                    RELOC(__FILE__), __LINE__);                 \
@@ -111,11 +117,6 @@ extern const struct linux_logo logo_linux_clut224;
 #define prom_debug(x...)
 #endif
-#ifdef CONFIG_PPC32
-#define PLATFORM_POWERMAC       _MACH_Pmac
-#define PLATFORM_CHRP           _MACH_chrp
-#endif
 typedef u32 prom_arg_t;
@@ -128,10 +129,11 @@ struct prom_args {
 struct prom_t {
        ihandle root;
-        ihandle chosen;
+        phandle chosen;
        int cpu;
        ihandle stdout;
        ihandle mmumap;
+        ihandle memory;
 };
 struct mem_map_entry {
@@ -360,16 +362,36 @@ static void __init prom_printf(const char *format, ...)
 static unsigned int __init prom_claim(unsigned long virt, unsigned long size,
                                unsigned long align)
 {
-        int ret;
        struct prom_t *_prom = &RELOC(prom);
-        ret = call_prom("claim", 3, 1, (prom_arg_t)virt, (prom_arg_t)size,
+        if (align == 0 && (OF_WORKAROUNDS & OF_WA_CLAIM)) {
-                        (prom_arg_t)align);
+                /*
-        if (ret != -1 && _prom->mmumap != 0)
+                 * Old OF requires we claim physical and virtual separately
-                /* old pmacs need us to map as well */
+                 * and then map explicitly (assuming virtual mode)
+                 */
+                int ret;
+                prom_arg_t result;
+                ret = call_prom_ret("call-method", 5, 2, &result,
+                                    ADDR("claim"), _prom->memory,
+                                    align, size, virt);
+                if (ret != 0 || result == -1)
+                        return -1;
+                ret = call_prom_ret("call-method", 5, 2, &result,
+                                    ADDR("claim"), _prom->mmumap,
+                                    align, size, virt);
+                if (ret != 0) {
+                        call_prom("call-method", 4, 1, ADDR("release"),
+                                  _prom->memory, size, virt);
+                        return -1;
+                }
+                /* the 0x12 is M (coherence) + PP == read/write */
                call_prom("call-method", 6, 1,
-                          ADDR("map"), _prom->mmumap, 0, size, virt, virt);
+                          ADDR("map"), _prom->mmumap, 0x12, size, virt, virt);
-        return ret;
+                return virt;
+        }
+        return call_prom("claim", 3, 1, (prom_arg_t)virt, (prom_arg_t)size,
+                         (prom_arg_t)align);
 }
 static void __init __attribute__((noreturn)) prom_panic(const char *reason)
@@ -415,11 +437,52 @@ static int inline prom_getproplen(phandle node, const char *pname)
        return call_prom("getproplen", 2, 1, node, ADDR(pname));
 }
-static int inline prom_setprop(phandle node, const char *pname,
+static void add_string(char **str, const char *q)
-                               void *value, size_t valuelen)
 {
-        return call_prom("setprop", 4, 1, node, ADDR(pname),
+        char *p = *str;
-                         (u32)(unsigned long) value, (u32) valuelen);
+        while (*q)
+                *p++ = *q++;
+        *p++ = ' ';
+        *str = p;
+}
+static char *tohex(unsigned int x)
+{
+        static char digits[] = "0123456789abcdef";
+        static char result[9];
+        int i;
+        result[8] = 0;
+        i = 8;
+        do {
+                --i;
+                result[i] = digits[x & 0xf];
+                x >>= 4;
+        } while (x != 0 && i > 0);
+        return &result[i];
+}
+static int __init prom_setprop(phandle node, const char *nodename,
+                               const char *pname, void *value, size_t valuelen)
+{
+        char cmd[256], *p;
+        if (!(OF_WORKAROUNDS & OF_WA_LONGTRAIL))
+                return call_prom("setprop", 4, 1, node, ADDR(pname),
+                                 (u32)(unsigned long) value, (u32) valuelen);
+        /* gah... setprop doesn't work on longtrail, have to use interpret */
+        p = cmd;
+        add_string(&p, "dev");
+        add_string(&p, nodename);
+        add_string(&p, tohex((u32)(unsigned long) value));
+        add_string(&p, tohex(valuelen));
+        add_string(&p, tohex(ADDR(pname)));
+        add_string(&p, tohex(strlen(RELOC(pname))));
+        add_string(&p, "property");
+        *p = 0;
+        return call_prom("interpret", 1, 1, (u32)(unsigned long) cmd);
 }
 /* We can't use the standard versions because of RELOC headaches. */
@@ -980,7 +1043,7 @@ static void __init prom_instantiate_rtas(void)
        rtas_inst = call_prom("open", 1, 1, ADDR("/rtas"));
        if (!IHANDLE_VALID(rtas_inst)) {
-                prom_printf("opening rtas package failed");
+                prom_printf("opening rtas package failed (%x)\n", rtas_inst);
                return;
        }
@@ -988,7 +1051,7 @@ static void __init prom_instantiate_rtas(void)
        if (call_prom_ret("call-method", 3, 2, &entry,
                          ADDR("instantiate-rtas"),
-                          rtas_inst, base) == PROM_ERROR
+                          rtas_inst, base) != 0
            || entry == 0) {
                prom_printf(" failed\n");
                return;
@@ -997,8 +1060,10 @@ static void __init prom_instantiate_rtas(void)
        reserve_mem(base, size);
-        prom_setprop(rtas_node, "linux,rtas-base", &base, sizeof(base));
+        prom_setprop(rtas_node, "/rtas", "linux,rtas-base",
-        prom_setprop(rtas_node, "linux,rtas-entry", &entry, sizeof(entry));
+                     &base, sizeof(base));
+        prom_setprop(rtas_node, "/rtas", "linux,rtas-entry",
+                     &entry, sizeof(entry));
        prom_debug("rtas base     = 0x%x\n", base);
        prom_debug("rtas entry    = 0x%x\n", entry);
@@ -1089,10 +1154,6 @@ static void __init prom_initialize_tce_table(void)
                if (base < local_alloc_bottom)
                        local_alloc_bottom = base;
-                /* Save away the TCE table attributes for later use. */
-                prom_setprop(node, "linux,tce-base", &base, sizeof(base));
-                prom_setprop(node, "linux,tce-size", &minsize, sizeof(minsize));
                /* It seems OF doesn't null-terminate the path :-( */
                memset(path, 0, sizeof(path));
                /* Call OF to setup the TCE hardware */
@@ -1101,6 +1162,10 @@ static void __init prom_initialize_tce_table(void)
                        prom_printf("package-to-path failed\n");
                }
+                /* Save away the TCE table attributes for later use. */
+                prom_setprop(node, path, "linux,tce-base", &base, sizeof(base));
+                prom_setprop(node, path, "linux,tce-size", &minsize, sizeof(minsize));
                prom_debug("TCE table: %s\n", path);
                prom_debug("\tnode = 0x%x\n", node);
                prom_debug("\tbase = 0x%x\n", base);
@@ -1342,6 +1407,7 @@ static void __init prom_init_client_services(unsigned long pp)
 /*
 * For really old powermacs, we need to map things we claim.
 * For that, we need the ihandle of the mmu.
+ * Also, on the longtrail, we need to work around other bugs.
 */
 static void __init prom_find_mmu(void)
 {
@@ -1355,12 +1421,19 @@ static void __init prom_find_mmu(void)
        if (prom_getprop(oprom, "model", version, sizeof(version)) <= 0)
                return;
        version[sizeof(version) - 1] = 0;
-        prom_printf("OF version is '%s'\n", version);
        /* XXX might need to add other versions here */
-        if (strcmp(version, "Open Firmware, 1.0.5") != 0)
+        if (strcmp(version, "Open Firmware, 1.0.5") == 0)
+                of_workarounds = OF_WA_CLAIM;
+        else if (strncmp(version, "FirmWorks,3.", 12) == 0) {
+                of_workarounds = OF_WA_CLAIM | OF_WA_LONGTRAIL;
+                call_prom("interpret", 1, 1, "dev /memory 0 to allow-reclaim");
+        } else
                return;
+        _prom->memory = call_prom("open", 1, 1, ADDR("/memory"));
        prom_getprop(_prom->chosen, "mmu", &_prom->mmumap,
                     sizeof(_prom->mmumap));
+        if (!IHANDLE_VALID(_prom->memory) || !IHANDLE_VALID(_prom->mmumap))
+                of_workarounds &= ~OF_WA_CLAIM;         /* hmmm */
 }
 #else
 #define prom_find_mmu()
@@ -1382,16 +1455,17 @@ static void __init prom_init_stdout(void)
        memset(path, 0, 256);
        call_prom("instance-to-path", 3, 1, _prom->stdout, path, 255);
        val = call_prom("instance-to-package", 1, 1, _prom->stdout);
-        prom_setprop(_prom->chosen, "linux,stdout-package", &val, sizeof(val));
+        prom_setprop(_prom->chosen, "/chosen", "linux,stdout-package",
+                     &val, sizeof(val));
        prom_printf("OF stdout device is: %s\n", RELOC(of_stdout_device));
-        prom_setprop(_prom->chosen, "linux,stdout-path",
+        prom_setprop(_prom->chosen, "/chosen", "linux,stdout-path",
-                     RELOC(of_stdout_device), strlen(RELOC(of_stdout_device))+1);
+                     path, strlen(path) + 1);
        /* If it's a display, note it */
        memset(type, 0, sizeof(type));
        prom_getprop(val, "device_type", type, sizeof(type));
        if (strcmp(type, RELOC("display")) == 0)
-                prom_setprop(val, "linux,boot-display", NULL, 0);
+                prom_setprop(val, path, "linux,boot-display", NULL, 0);
 }
 static void __init prom_close_stdin(void)
@@ -1514,7 +1588,7 @@ static void __init prom_check_displays(void)
                /* Success */
                prom_printf("done\n");
-                prom_setprop(node, "linux,opened", NULL, 0);
+                prom_setprop(node, path, "linux,opened", NULL, 0);
                /* Setup a usable color table when the appropriate
                 * method is available. Should update this to set-colors */
@@ -1884,9 +1958,11 @@ static void __init fixup_device_tree(void)
        /* interrupt on this revision of u3 is number 0 and level */
        interrupts[0] = 0;
        interrupts[1] = 1;
-        prom_setprop(i2c, "interrupts", &interrupts, sizeof(interrupts));
+        prom_setprop(i2c, "/u3@0,f8000000/i2c@f8001000", "interrupts",
+                     &interrupts, sizeof(interrupts));
        parent = (u32)mpic;
-        prom_setprop(i2c, "interrupt-parent", &parent, sizeof(parent));
+        prom_setprop(i2c, "/u3@0,f8000000/i2c@f8001000", "interrupt-parent",
+                     &parent, sizeof(parent));
 #endif
 }
@@ -1922,11 +1998,11 @@ static void __init prom_check_initrd(unsigned long r3, unsigned long r4)
                RELOC(prom_initrd_end) = RELOC(prom_initrd_start) + r4;
                val = RELOC(prom_initrd_start);
-                prom_setprop(_prom->chosen, "linux,initrd-start", &val,
+                prom_setprop(_prom->chosen, "/chosen", "linux,initrd-start",
-                             sizeof(val));
+                             &val, sizeof(val));
                val = RELOC(prom_initrd_end);
-                prom_setprop(_prom->chosen, "linux,initrd-end", &val,
+                prom_setprop(_prom->chosen, "/chosen", "linux,initrd-end",
-                             sizeof(val));
+                             &val, sizeof(val));
                reserve_mem(RELOC(prom_initrd_start),
                            RELOC(prom_initrd_end) - RELOC(prom_initrd_start));
@@ -1969,14 +2045,15 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4,
        prom_init_client_services(pp);
        /*
-         * Init prom stdout device
+         * See if this OF is old enough that we need to do explicit maps
+         * and other workarounds
         */
-        prom_init_stdout();
+        prom_find_mmu();
        /*
-         * See if this OF is old enough that we need to do explicit maps
+         * Init prom stdout device
         */
-        prom_find_mmu();
+        prom_init_stdout();
        /*
         * Check for an initrd
@@ -1989,14 +2066,15 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4,
         */
        RELOC(of_platform) = prom_find_machine_type();
        getprop_rval = RELOC(of_platform);
-        prom_setprop(_prom->chosen, "linux,platform",
+        prom_setprop(_prom->chosen, "/chosen", "linux,platform",
                     &getprop_rval, sizeof(getprop_rval));
 #ifdef CONFIG_PPC_PSERIES
        /*
         * On pSeries, inform the firmware about our capabilities
         */
-        if (RELOC(of_platform) & PLATFORM_PSERIES)
+        if (RELOC(of_platform) == PLATFORM_PSERIES ||
+            RELOC(of_platform) == PLATFORM_PSERIES_LPAR)
                prom_send_capabilities();
 #endif
@@ -2050,21 +2128,23 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4,
         * Fill in some infos for use by the kernel later on
         */
        if (RELOC(prom_memory_limit))
-                prom_setprop(_prom->chosen, "linux,memory-limit",
+                prom_setprop(_prom->chosen, "/chosen", "linux,memory-limit",
                             &RELOC(prom_memory_limit),
                             sizeof(prom_memory_limit));
 #ifdef CONFIG_PPC64
        if (RELOC(ppc64_iommu_off))
-                prom_setprop(_prom->chosen, "linux,iommu-off", NULL, 0);
+                prom_setprop(_prom->chosen, "/chosen", "linux,iommu-off",
+                             NULL, 0);
        if (RELOC(iommu_force_on))
-                prom_setprop(_prom->chosen, "linux,iommu-force-on", NULL, 0);
+                prom_setprop(_prom->chosen, "/chosen", "linux,iommu-force-on",
+                             NULL, 0);
        if (RELOC(prom_tce_alloc_start)) {
-                prom_setprop(_prom->chosen, "linux,tce-alloc-start",
+                prom_setprop(_prom->chosen, "/chosen", "linux,tce-alloc-start",
                             &RELOC(prom_tce_alloc_start),
                             sizeof(prom_tce_alloc_start));
-                prom_setprop(_prom->chosen, "linux,tce-alloc-end",
+                prom_setprop(_prom->chosen, "/chosen", "linux,tce-alloc-end",
                             &RELOC(prom_tce_alloc_end),
                             sizeof(prom_tce_alloc_end));
        }
@@ -2081,8 +2161,13 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4,
        prom_printf("copying OF device tree ...\n");
        flatten_device_tree();
-        /* in case stdin is USB and still active on IBM machines... */
+        /*
-        prom_close_stdin();
+         * in case stdin is USB and still active on IBM machines...
+         * Unfortunately quiesce crashes on some powermacs if we have
+         * closed stdin already (in particular the powerbook 101).
+         */
+        if (RELOC(of_platform) != PLATFORM_POWERMAC)
+                prom_close_stdin();
        /*
         * Call OF "quiesce" method to shut down pending DMA's from
diff --git a/arch/powerpc/kernel/rtas-proc.c b/arch/powerpc/kernel/rtas-proc.c
index 5bdd5b079d96..7a95b8a28354 100644
--- a/arch/powerpc/kernel/rtas-proc.c
+++ b/arch/powerpc/kernel/rtas-proc.c
@@ -32,7 +32,6 @@
 #include <asm/rtas.h>
 #include <asm/machdep.h> /* for ppc_md */
 #include <asm/time.h>
-#include <asm/systemcfg.h>
 /* Token for Sensors */
 #define KEY_SWITCH              0x0001
@@ -259,7 +258,7 @@ static int __init proc_rtas_init(void)
 {
        struct proc_dir_entry *entry;
-        if (!(systemcfg->platform & PLATFORM_PSERIES))
+        if (_machine != PLATFORM_PSERIES && _machine != PLATFORM_PSERIES_LPAR)
                return 1;
        rtas_node = of_find_node_by_name(NULL, "rtas");
diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c
index 9d4e07f6f1ec..4283fa33f784 100644
--- a/arch/powerpc/kernel/rtas.c
+++ b/arch/powerpc/kernel/rtas.c
@@ -29,9 +29,6 @@
 #include <asm/delay.h>
 #include <asm/uaccess.h>
 #include <asm/lmb.h>
-#ifdef CONFIG_PPC64
-#include <asm/systemcfg.h>
-#endif
 struct rtas_t rtas = {
        .lock = SPIN_LOCK_UNLOCKED
@@ -671,7 +668,7 @@ void __init rtas_initialize(void)
         * the stop-self token if any
         */
 #ifdef CONFIG_PPC64
-        if (systemcfg->platform == PLATFORM_PSERIES_LPAR)
+        if (_machine == PLATFORM_PSERIES_LPAR)
                rtas_region = min(lmb.rmo_size, RTAS_INSTANTIATE_MAX);
 #endif
        rtas_rmo_buf = lmb_alloc_base(RTAS_RMOBUF_MAX, PAGE_SIZE, rtas_region);
diff --git a/arch/ppc64/kernel/rtas_pci.c b/arch/powerpc/kernel/rtas_pci.c
index 3c3f19192fcc..0e5a8e116653 100644
--- a/arch/ppc64/kernel/rtas_pci.c
+++ b/arch/powerpc/kernel/rtas_pci.c
@@ -5,19 +5,19 @@
 * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM
 *
 * RTAS specific routines for PCI.
- * 
+ *
 * Based on code from pci.c, chrp_pci.c and pSeries_pci.c
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
- *    
+ *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
- * 
+ *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
@@ -47,7 +47,7 @@ static int write_pci_config;
 static int ibm_read_pci_config;
 static int ibm_write_pci_config;
-static int config_access_valid(struct pci_dn *dn, int where)
+static inline int config_access_valid(struct pci_dn *dn, int where)
 {
        if (where < 256)
                return 1;
@@ -72,16 +72,14 @@ static int of_device_available(struct device_node * dn)
        return 0;
 }
-static int rtas_read_config(struct device_node *dn, int where, int size, u32 *val)
+static int rtas_read_config(struct pci_dn *pdn, int where, int size, u32 *val)
 {
        int returnval = -1;
        unsigned long buid, addr;
        int ret;
-        struct pci_dn *pdn;
-        if (!dn || !dn->data)
+        if (!pdn)
                return PCIBIOS_DEVICE_NOT_FOUND;
-        pdn = dn->data;
        if (!config_access_valid(pdn, where))
                return PCIBIOS_BAD_REGISTER_NUMBER;
@@ -90,7 +88,7 @@ static int rtas_read_config(struct device_node *dn, int where, int size, u32 *va
        buid = pdn->phb->buid;
        if (buid) {
                ret = rtas_call(ibm_read_pci_config, 4, 2, &returnval,
-                                addr, buid >> 32, buid & 0xffffffff, size);
+                                addr, BUID_HI(buid), BUID_LO(buid), size);
        } else {
                ret = rtas_call(read_pci_config, 2, 2, &returnval, addr, size);
        }
@@ -100,7 +98,7 @@ static int rtas_read_config(struct device_node *dn, int where, int size, u32 *va
                return PCIBIOS_DEVICE_NOT_FOUND;
        if (returnval == EEH_IO_ERROR_VALUE(size) &&
-            eeh_dn_check_failure (dn, NULL))
+            eeh_dn_check_failure (pdn->node, NULL))
                return PCIBIOS_DEVICE_NOT_FOUND;
        return PCIBIOS_SUCCESSFUL;
@@ -118,23 +116,23 @@ static int rtas_pci_read_config(struct pci_bus *bus,
                busdn = bus->sysdata;   /* must be a phb */
        /* Search only direct children of the bus */
-        for (dn = busdn->child; dn; dn = dn->sibling)
+        for (dn = busdn->child; dn; dn = dn->sibling) {
-                if (dn->data && PCI_DN(dn)->devfn == devfn
+                struct pci_dn *pdn = PCI_DN(dn);
+                if (pdn && pdn->devfn == devfn
                    && of_device_available(dn))
-                        return rtas_read_config(dn, where, size, val);
+                        return rtas_read_config(pdn, where, size, val);
+        }
        return PCIBIOS_DEVICE_NOT_FOUND;
 }
-int rtas_write_config(struct device_node *dn, int where, int size, u32 val)
+int rtas_write_config(struct pci_dn *pdn, int where, int size, u32 val)
 {
        unsigned long buid, addr;
        int ret;
-        struct pci_dn *pdn;
-        if (!dn || !dn->data)
+        if (!pdn)
                return PCIBIOS_DEVICE_NOT_FOUND;
-        pdn = dn->data;
        if (!config_access_valid(pdn, where))
                return PCIBIOS_BAD_REGISTER_NUMBER;
@@ -142,7 +140,8 @@ int rtas_write_config(struct device_node *dn, int where, int size, u32 val)
                (pdn->devfn << 8) | (where & 0xff);
        buid = pdn->phb->buid;
        if (buid) {
-                ret = rtas_call(ibm_write_pci_config, 5, 1, NULL, addr, buid >> 32, buid & 0xffffffff, size, (ulong) val);
+                ret = rtas_call(ibm_write_pci_config, 5, 1, NULL, addr,
+                        BUID_HI(buid), BUID_LO(buid), size, (ulong) val);
        } else {
                ret = rtas_call(write_pci_config, 3, 1, NULL, addr, size, (ulong)val);
        }
@@ -165,10 +164,12 @@ static int rtas_pci_write_config(struct pci_bus *bus,
                busdn = bus->sysdata;   /* must be a phb */
        /* Search only direct children of the bus */
-        for (dn = busdn->child; dn; dn = dn->sibling)
+        for (dn = busdn->child; dn; dn = dn->sibling) {
-                if (dn->data && PCI_DN(dn)->devfn == devfn
+                struct pci_dn *pdn = PCI_DN(dn);
+                if (pdn && pdn->devfn == devfn
                    && of_device_available(dn))
-                        return rtas_write_config(dn, where, size, val);
+                        return rtas_write_config(pdn, where, size, val);
+        }
        return PCIBIOS_DEVICE_NOT_FOUND;
 }
@@ -221,7 +222,7 @@ static void python_countermeasures(struct device_node *dev,
        /* Python's register file is 1 MB in size. */
        chip_regs = ioremap(reg_struct.address & ~(0xfffffUL), 0x100000);
-        /* 
+        /*
         * Firmware doesn't always clear this bit which is critical
         * for good performance - Anton
         */
@@ -292,7 +293,7 @@ static int phb_set_bus_ranges(struct device_node *dev,
        if (bus_range == NULL || len < 2 * sizeof(int)) {
                return 1;
        }
- 
        phb->first_busno =  bus_range[0];
        phb->last_busno  =  bus_range[1];
diff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup-common.c
index e22856ecb5a0..33e7f2c7f194 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -33,6 +33,7 @@
 #include <asm/io.h>
 #include <asm/prom.h>
 #include <asm/processor.h>
+#include <asm/vdso_datapage.h>
 #include <asm/pgtable.h>
 #include <asm/smp.h>
 #include <asm/elf.h>
@@ -51,6 +52,9 @@
 #include <asm/page.h>
 #include <asm/mmu.h>
 #include <asm/lmb.h>
+#include <asm/xmon.h>
+#include "setup.h"
 #undef DEBUG
@@ -60,6 +64,13 @@
 #define DBG(fmt...)
 #endif
+#ifdef CONFIG_PPC_MULTIPLATFORM
+int _machine = 0;
+EXPORT_SYMBOL(_machine);
+#endif
+unsigned long klimit = (unsigned long) _end;
 /*
 * This still seems to be needed... -- paulus
 */ 
@@ -433,10 +444,8 @@ void __init check_for_initrd(void)
        if (initrd_start >= KERNELBASE && initrd_end >= KERNELBASE &&
            initrd_end > initrd_start)
                ROOT_DEV = Root_RAM0;
-        else {
+        else
-                printk("Bogus initrd %08lx %08lx\n", initrd_start, initrd_end);
                initrd_start = initrd_end = 0;
-        }
        if (initrd_start)
                printk("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);
@@ -510,8 +519,8 @@ void __init smp_setup_cpu_maps(void)
         * On pSeries LPAR, we need to know how many cpus
         * could possibly be added to this partition.
         */
-        if (systemcfg->platform == PLATFORM_PSERIES_LPAR &&
+        if (_machine == PLATFORM_PSERIES_LPAR &&
-                                (dn = of_find_node_by_path("/rtas"))) {
+            (dn = of_find_node_by_path("/rtas"))) {
                int num_addr_cell, num_size_cell, maxcpus;
                unsigned int *ireg;
@@ -555,7 +564,27 @@ void __init smp_setup_cpu_maps(void)
                        cpu_set(cpu ^ 0x1, cpu_sibling_map[cpu]);
        }
-        systemcfg->processorCount = num_present_cpus();
+        vdso_data->processorCount = num_present_cpus();
 #endif /* CONFIG_PPC64 */
 }
 #endif /* CONFIG_SMP */
+#ifdef CONFIG_XMON
+static int __init early_xmon(char *p)
+{
+        /* ensure xmon is enabled */
+        if (p) {
+                if (strncmp(p, "on", 2) == 0)
+                        xmon_init(1);
+                if (strncmp(p, "off", 3) == 0)
+                        xmon_init(0);
+                if (strncmp(p, "early", 5) != 0)
+                        return 0;
+        }
+        xmon_init(1);
+        debugger(NULL);
+        return 0;
+}
+early_param("xmon", early_xmon);
+#endif
diff --git a/arch/powerpc/kernel/setup.h b/arch/powerpc/kernel/setup.h
new file mode 100644
index 000000000000..2ebba755272e
--- /dev/null
+++ b/arch/powerpc/kernel/setup.h
@@ -0,0 +1,6 @@
+#ifndef _POWERPC_KERNEL_SETUP_H
+#define _POWERPC_KERNEL_SETUP_H
+void check_for_initrd(void);
+#endif /* _POWERPC_KERNEL_SETUP_H */
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index 3af2631e3fab..c98cfcc9cd9a 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -40,6 +40,8 @@
 #include <asm/xmon.h>
 #include <asm/time.h>
+#include "setup.h"
 #define DBG(fmt...)
 #if defined CONFIG_KGDB
@@ -70,8 +72,6 @@ unsigned int DMA_MODE_WRITE;
 int have_of = 1;
 #ifdef CONFIG_PPC_MULTIPLATFORM
-int _machine = 0;
 extern void prep_init(void);
 extern void pmac_init(void);
 extern void chrp_init(void);
@@ -279,7 +279,6 @@ arch_initcall(ppc_init);
 /* Warning, IO base is not yet inited */
 void __init setup_arch(char **cmdline_p)
 {
-        extern char *klimit;
        extern void do_init_bootmem(void);
        /* so udelay does something sensible, assume <= 1000 bogomips */
@@ -303,14 +302,9 @@ void __init setup_arch(char **cmdline_p)
                pmac_feature_init();    /* New cool way */
 #endif
-#ifdef CONFIG_XMON
+#ifdef CONFIG_XMON_DEFAULT
-        xmon_map_scc();
+        xmon_init(1);
-        if (strstr(cmd_line, "xmon")) {
+#endif
-                xmon_init(1);
-                debugger(NULL);
-        }
-#endif /* CONFIG_XMON */
-        if ( ppc_md.progress ) ppc_md.progress("setup_arch: enter", 0x3eab);
 #if defined(CONFIG_KGDB)
        if (ppc_md.kgdb_map_scc)
@@ -343,7 +337,7 @@ void __init setup_arch(char **cmdline_p)
        init_mm.start_code = PAGE_OFFSET;
        init_mm.end_code = (unsigned long) _etext;
        init_mm.end_data = (unsigned long) _edata;
-        init_mm.brk = (unsigned long) klimit;
+        init_mm.brk = klimit;
        /* Save unparsed command line copy for /proc/cmdline */
        strlcpy(saved_command_line, cmd_line, COMMAND_LINE_SIZE);
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 0471e843b6c5..fdbd9f9122f2 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -57,10 +57,11 @@
 #include <asm/lmb.h>
 #include <asm/iseries/it_lp_naca.h>
 #include <asm/firmware.h>
-#include <asm/systemcfg.h>
 #include <asm/xmon.h>
 #include <asm/udbg.h>
+#include "setup.h"
 #ifdef DEBUG
 #define DBG(fmt...) udbg_printf(fmt)
 #else
@@ -94,15 +95,6 @@ extern void udbg_init_maple_realmode(void);
        do { udbg_putc = call_rtas_display_status_delay; } while(0)
 #endif
-/* extern void *stab; */
-extern unsigned long klimit;
-extern void mm_init_ppc64(void);
-extern void stab_initialize(unsigned long stab);
-extern void htab_initialize(void);
-extern void early_init_devtree(void *flat_dt);
-extern void unflatten_device_tree(void);
 int have_of = 1;
 int boot_cpuid = 0;
 int boot_cpuid_phys = 0;
@@ -254,11 +246,10 @@ void __init early_setup(unsigned long dt_ptr)
         * Iterate all ppc_md structures until we find the proper
         * one for the current machine type
         */
-        DBG("Probing machine type for platform %x...\n",
+        DBG("Probing machine type for platform %x...\n", _machine);
-            systemcfg->platform);
        for (mach = machines; *mach; mach++) {
-                if ((*mach)->probe(systemcfg->platform))
+                if ((*mach)->probe(_machine))
                        break;
        }
        /* What can we do if we didn't find ? */
@@ -290,6 +281,28 @@ void __init early_setup(unsigned long dt_ptr)
        DBG(" <- early_setup()\n");
 }
+#ifdef CONFIG_SMP
+void early_setup_secondary(void)
+{
+        struct paca_struct *lpaca = get_paca();
+        /* Mark enabled in PACA */
+        lpaca->proc_enabled = 0;
+        /* Initialize hash table for that CPU */
+        htab_initialize_secondary();
+        /* Initialize STAB/SLB. We use a virtual address as it works
+         * in real mode on pSeries and we want a virutal address on
+         * iSeries anyway
+         */
+        if (cpu_has_feature(CPU_FTR_SLB))
+                slb_initialize();
+        else
+                stab_initialize(lpaca->stab_addr);
+}
+#endif /* CONFIG_SMP */
 #if defined(CONFIG_SMP) || defined(CONFIG_KEXEC)
 void smp_release_cpus(void)
@@ -315,7 +328,8 @@ void smp_release_cpus(void)
 #endif /* CONFIG_SMP || CONFIG_KEXEC */
 /*
- * Initialize some remaining members of the ppc64_caches and systemcfg structures
+ * Initialize some remaining members of the ppc64_caches and systemcfg
+ * structures
 * (at least until we get rid of them completely). This is mostly some
 * cache informations about the CPU that will be used by cache flush
 * routines and/or provided to userland
@@ -340,7 +354,7 @@ static void __init initialize_cache_info(void)
                        const char *dc, *ic;
                        /* Then read cache informations */
-                        if (systemcfg->platform == PLATFORM_POWERMAC) {
+                        if (_machine == PLATFORM_POWERMAC) {
                                dc = "d-cache-block-size";
                                ic = "i-cache-block-size";
                        } else {
@@ -360,9 +374,8 @@ static void __init initialize_cache_info(void)
                                DBG("Argh, can't find dcache properties ! "
                                    "sizep: %p, lsizep: %p\n", sizep, lsizep);
-                        systemcfg->dcache_size = ppc64_caches.dsize = size;
+                        ppc64_caches.dsize = size;
-                        systemcfg->dcache_line_size =
+                        ppc64_caches.dline_size = lsize;
-                                ppc64_caches.dline_size = lsize;
                        ppc64_caches.log_dline_size = __ilog2(lsize);
                        ppc64_caches.dlines_per_page = PAGE_SIZE / lsize;
@@ -378,20 +391,13 @@ static void __init initialize_cache_info(void)
                                DBG("Argh, can't find icache properties ! "
                                    "sizep: %p, lsizep: %p\n", sizep, lsizep);
-                        systemcfg->icache_size = ppc64_caches.isize = size;
+                        ppc64_caches.isize = size;
-                        systemcfg->icache_line_size =
+                        ppc64_caches.iline_size = lsize;
-                                ppc64_caches.iline_size = lsize;
                        ppc64_caches.log_iline_size = __ilog2(lsize);
                        ppc64_caches.ilines_per_page = PAGE_SIZE / lsize;
                }
        }
-        /* Add an eye catcher and the systemcfg layout version number */
-        strcpy(systemcfg->eye_catcher, "SYSTEMCFG:PPC64");
-        systemcfg->version.major = SYSTEMCFG_MAJOR;
-        systemcfg->version.minor = SYSTEMCFG_MINOR;
-        systemcfg->processor = mfspr(SPRN_PVR);
        DBG(" <- initialize_cache_info()\n");
 }
@@ -478,15 +484,14 @@ void __init setup_system(void)
        printk("-----------------------------------------------------\n");
        printk("ppc64_pft_size                = 0x%lx\n", ppc64_pft_size);
-        printk("ppc64_interrupt_controller    = 0x%ld\n", ppc64_interrupt_controller);
+        printk("ppc64_interrupt_controller    = 0x%ld\n",
-        printk("systemcfg                     = 0x%p\n", systemcfg);
+               ppc64_interrupt_controller);
-        printk("systemcfg->platform           = 0x%x\n", systemcfg->platform);
+        printk("platform                      = 0x%x\n", _machine);
-        printk("systemcfg->processorCount     = 0x%lx\n", systemcfg->processorCount);
+        printk("physicalMemorySize            = 0x%lx\n", lmb_phys_mem_size());
-        printk("systemcfg->physicalMemorySize = 0x%lx\n", systemcfg->physicalMemorySize);
        printk("ppc64_caches.dcache_line_size = 0x%x\n",
-                        ppc64_caches.dline_size);
+               ppc64_caches.dline_size);
        printk("ppc64_caches.icache_line_size = 0x%x\n",
-                        ppc64_caches.iline_size);
+               ppc64_caches.iline_size);
        printk("htab_address                  = 0x%p\n", htab_address);
        printk("htab_hash_mask                = 0x%lx\n", htab_hash_mask);
        printk("-----------------------------------------------------\n");
@@ -551,33 +556,6 @@ static void __init emergency_stack_init(void)
 }
 /*
- * Called from setup_arch to initialize the bitmap of available
- * syscalls in the systemcfg page
- */
-void __init setup_syscall_map(void)
-{
-        unsigned int i, count64 = 0, count32 = 0;
-        extern unsigned long *sys_call_table;
-        extern unsigned long sys_ni_syscall;
-        for (i = 0; i < __NR_syscalls; i++) {
-                if (sys_call_table[i*2] != sys_ni_syscall) {
-                        count64++;
-                        systemcfg->syscall_map_64[i >> 5] |=
-                                0x80000000UL >> (i & 0x1f);
-                }
-                if (sys_call_table[i*2+1] != sys_ni_syscall) {
-                        count32++;
-                        systemcfg->syscall_map_32[i >> 5] |=
-                                0x80000000UL >> (i & 0x1f);
-                }
-        }
-        printk(KERN_INFO "Syscall map setup, %d 32-bit and %d 64-bit syscalls\n",
-               count32, count64);
-}
-/*
 * Called into from start_kernel, after lock_kernel has been called.
 * Initializes bootmem, which is unsed to manage page allocation until
 * mem_init is called.
@@ -618,9 +596,6 @@ void __init setup_arch(char **cmdline_p)
        do_init_bootmem();
        sparse_init();
-        /* initialize the syscall map in systemcfg */
-        setup_syscall_map();
 #ifdef CONFIG_DUMMY_CONSOLE
        conswitchp = &dummy_con;
 #endif
@@ -858,26 +833,6 @@ int check_legacy_ioport(unsigned long base_port)
 }
 EXPORT_SYMBOL(check_legacy_ioport);
-#ifdef CONFIG_XMON
-static int __init early_xmon(char *p)
-{
-        /* ensure xmon is enabled */
-        if (p) {
-                if (strncmp(p, "on", 2) == 0)
-                        xmon_init(1);
-                if (strncmp(p, "off", 3) == 0)
-                        xmon_init(0);
-                if (strncmp(p, "early", 5) != 0)
-                        return 0;
-        }
-        xmon_init(1);
-        debugger(NULL);
-        return 0;
-}
-early_param("xmon", early_xmon);
-#endif
 void cpu_die(void)
 {
        if (ppc_md.cpu_die)
diff --git a/arch/powerpc/kernel/signal_32.c b/arch/powerpc/kernel/signal_32.c
index 081d931eae48..8bdf95b7e420 100644
--- a/arch/powerpc/kernel/signal_32.c
+++ b/arch/powerpc/kernel/signal_32.c
@@ -42,10 +42,11 @@
 #include <asm/uaccess.h>
 #include <asm/cacheflush.h>
+#include <asm/sigcontext.h>
+#include <asm/vdso.h>
 #ifdef CONFIG_PPC64
 #include "ppc32.h"
 #include <asm/unistd.h>
-#include <asm/vdso.h>
 #else
 #include <asm/ucontext.h>
 #include <asm/pgtable.h>
@@ -808,14 +809,11 @@ static int handle_rt_signal(unsigned long sig, struct k_sigaction *ka,
        /* Save user registers on the stack */
        frame = &rt_sf->uc.uc_mcontext;
-#ifdef CONFIG_PPC64
        if (vdso32_rt_sigtramp && current->thread.vdso_base) {
                if (save_user_regs(regs, frame, 0))
                        goto badframe;
                regs->link = current->thread.vdso_base + vdso32_rt_sigtramp;
-        } else
+        } else {
-#endif
-        {
                if (save_user_regs(regs, frame, __NR_rt_sigreturn))
                        goto badframe;
                regs->link = (unsigned long) frame->tramp;
@@ -1089,14 +1087,11 @@ static int handle_signal(unsigned long sig, struct k_sigaction *ka,
            || __put_user(sig, &sc->signal))
                goto badframe;
-#ifdef CONFIG_PPC64
        if (vdso32_sigtramp && current->thread.vdso_base) {
                if (save_user_regs(regs, &frame->mctx, 0))
                        goto badframe;
                regs->link = current->thread.vdso_base + vdso32_sigtramp;
-        } else
+        } else {
-#endif
-        {
                if (save_user_regs(regs, &frame->mctx, __NR_sigreturn))
                        goto badframe;
                regs->link = (unsigned long) frame->mctx.tramp;
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index 5c330c3366e4..62dfc5b8d765 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc/kernel/smp.c
@@ -44,6 +44,7 @@
 #include <asm/cputable.h>
 #include <asm/system.h>
 #include <asm/mpic.h>
+#include <asm/vdso_datapage.h>
 #ifdef CONFIG_PPC64
 #include <asm/paca.h>
 #endif
@@ -368,9 +369,11 @@ int generic_cpu_disable(void)
        if (cpu == boot_cpuid)
                return -EBUSY;
-        systemcfg->processorCount--;
        cpu_clear(cpu, cpu_online_map);
+#ifdef CONFIG_PPC64
+        vdso_data->processorCount--;
        fixup_irqs(cpu_online_map);
+#endif
        return 0;
 }
@@ -388,9 +391,11 @@ int generic_cpu_enable(unsigned int cpu)
        while (!cpu_online(cpu))
                cpu_relax();
+#ifdef CONFIG_PPC64
        fixup_irqs(cpu_online_map);
        /* counter the irq disable in fixup_irqs */
        local_irq_enable();
+#endif
        return 0;
 }
@@ -419,7 +424,9 @@ void generic_mach_cpu_die(void)
        while (__get_cpu_var(cpu_state) != CPU_UP_PREPARE)
                cpu_relax();
+#ifdef CONFIG_PPC64
        flush_tlb_pending();
+#endif
        cpu_set(cpu, cpu_online_map);
        local_irq_enable();
 }
@@ -510,6 +517,7 @@ int __devinit start_secondary(void *unused)
        smp_store_cpu_info(cpu);
        set_dec(tb_ticks_per_jiffy);
+        preempt_disable();
        cpu_callin_map[cpu] = 1;
        smp_ops->setup_cpu(cpu);
diff --git a/arch/powerpc/kernel/sys_ppc32.c b/arch/powerpc/kernel/sys_ppc32.c
index a8210ed5c686..9c921d1c4084 100644
--- a/arch/powerpc/kernel/sys_ppc32.c
+++ b/arch/powerpc/kernel/sys_ppc32.c
@@ -52,7 +52,6 @@
 #include <asm/semaphore.h>
 #include <asm/time.h>
 #include <asm/mmu_context.h>
-#include <asm/systemcfg.h>
 #include <asm/ppc-pci.h>
 /* readdir & getdents */
diff --git a/arch/ppc64/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c
index e99ec62c2c52..0f0c3a9ae2e5 100644
--- a/arch/ppc64/kernel/sysfs.c
+++ b/arch/powerpc/kernel/sysfs.c
@@ -16,7 +16,6 @@
 #include <asm/firmware.h>
 #include <asm/hvcall.h>
 #include <asm/prom.h>
-#include <asm/systemcfg.h>
 #include <asm/paca.h>
 #include <asm/lppaca.h>
 #include <asm/machdep.h>
@@ -232,7 +231,7 @@ static void register_cpu_online(unsigned int cpu)
                sysdev_create_file(s, &attr_pmc7);
        if (cur_cpu_spec->num_pmcs >= 8)
                sysdev_create_file(s, &attr_pmc8);
-  
        if (cpu_has_feature(CPU_FTR_SMT))
                sysdev_create_file(s, &attr_purr);
 }
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index a6282b625b44..070b4b458aaf 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -62,8 +62,8 @@
 #include <asm/irq.h>
 #include <asm/div64.h>
 #include <asm/smp.h>
+#include <asm/vdso_datapage.h>
 #ifdef CONFIG_PPC64
-#include <asm/systemcfg.h>
 #include <asm/firmware.h>
 #endif
 #ifdef CONFIG_PPC_ISERIES
@@ -261,7 +261,6 @@ static inline void update_gtod(u64 new_tb_stamp, u64 new_stamp_xsec,
        do_gtod.varp = temp_varp;
        do_gtod.var_idx = temp_idx;
-#ifdef CONFIG_PPC64
        /*
         * tb_update_count is used to allow the userspace gettimeofday code
         * to assure itself that it sees a consistent view of the tb_to_xs and
@@ -271,14 +270,15 @@ static inline void update_gtod(u64 new_tb_stamp, u64 new_stamp_xsec,
         * tb_to_xs and stamp_xsec values are consistent.  If not, then it
         * loops back and reads them again until this criteria is met.
         */
-        ++(systemcfg->tb_update_count);
+        ++(vdso_data->tb_update_count);
        smp_wmb();
-        systemcfg->tb_orig_stamp = new_tb_stamp;
+        vdso_data->tb_orig_stamp = new_tb_stamp;
-        systemcfg->stamp_xsec = new_stamp_xsec;
+        vdso_data->stamp_xsec = new_stamp_xsec;
-        systemcfg->tb_to_xs = new_tb_to_xs;
+        vdso_data->tb_to_xs = new_tb_to_xs;
+        vdso_data->wtom_clock_sec = wall_to_monotonic.tv_sec;
+        vdso_data->wtom_clock_nsec = wall_to_monotonic.tv_nsec;
        smp_wmb();
-        ++(systemcfg->tb_update_count);
+        ++(vdso_data->tb_update_count);
-#endif
 }
 /*
@@ -357,8 +357,8 @@ static void iSeries_tb_recal(void)
                                do_gtod.tb_ticks_per_sec = tb_ticks_per_sec;
                                tb_to_xs = divres.result_low;
                                do_gtod.varp->tb_to_xs = tb_to_xs;
-                                systemcfg->tb_ticks_per_sec = tb_ticks_per_sec;
+                                vdso_data->tb_ticks_per_sec = tb_ticks_per_sec;
-                                systemcfg->tb_to_xs = tb_to_xs;
+                                vdso_data->tb_to_xs = tb_to_xs;
                        }
                        else {
                                printk( "Titan recalibrate: FAILED (difference > 4 percent)\n"
@@ -483,6 +483,8 @@ void __init smp_space_timers(unsigned int max_cpus)
        unsigned long offset = tb_ticks_per_jiffy / max_cpus;
        unsigned long previous_tb = per_cpu(last_jiffy, boot_cpuid);
+        /* make sure tb > per_cpu(last_jiffy, cpu) for all cpus always */
+        previous_tb -= tb_ticks_per_jiffy;
        for_each_cpu(i) {
                if (i != boot_cpuid) {
                        previous_tb += offset;
@@ -558,10 +560,8 @@ int do_settimeofday(struct timespec *tv)
        new_xsec += (u64)new_sec * XSEC_PER_SEC - tb_delta_xs;
        update_gtod(tb_last_jiffy, new_xsec, do_gtod.varp->tb_to_xs);
-#ifdef CONFIG_PPC64
+        vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
-        systemcfg->tz_minuteswest = sys_tz.tz_minuteswest;
+        vdso_data->tz_dsttime = sys_tz.tz_dsttime;
-        systemcfg->tz_dsttime = sys_tz.tz_dsttime;
-#endif
        write_sequnlock_irqrestore(&xtime_lock, flags);
        clock_was_set();
@@ -710,13 +710,12 @@ void __init time_init(void)
        do_gtod.tb_ticks_per_sec = tb_ticks_per_sec;
        do_gtod.varp->tb_to_xs = tb_to_xs;
        do_gtod.tb_to_us = tb_to_us;
-#ifdef CONFIG_PPC64
-        systemcfg->tb_orig_stamp = tb_last_jiffy;
+        vdso_data->tb_orig_stamp = tb_last_jiffy;
-        systemcfg->tb_update_count = 0;
+        vdso_data->tb_update_count = 0;
-        systemcfg->tb_ticks_per_sec = tb_ticks_per_sec;
+        vdso_data->tb_ticks_per_sec = tb_ticks_per_sec;
-        systemcfg->stamp_xsec = xtime.tv_sec * XSEC_PER_SEC;
+        vdso_data->stamp_xsec = xtime.tv_sec * XSEC_PER_SEC;
-        systemcfg->tb_to_xs = tb_to_xs;
+        vdso_data->tb_to_xs = tb_to_xs;
-#endif
        time_freq = 0;
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index 32f215825e8d..1511454c4690 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -49,7 +49,6 @@
 #ifdef CONFIG_PPC64
 #include <asm/firmware.h>
 #include <asm/processor.h>
-#include <asm/systemcfg.h>
 #endif
 #ifdef CONFIG_PPC64     /* XXX */
@@ -129,7 +128,7 @@ int die(const char *str, struct pt_regs *regs, long err)
        nl = 1;
 #endif
 #ifdef CONFIG_PPC64
-        switch (systemcfg->platform) {
+        switch (_machine) {
        case PLATFORM_PSERIES:
                printk("PSERIES ");
                nl = 1;
@@ -887,10 +886,6 @@ void altivec_unavailable_exception(struct pt_regs *regs)
        die("Unrecoverable VMX/Altivec Unavailable Exception", regs, SIGABRT);
 }
-#ifdef CONFIG_PPC64
-extern perf_irq_t perf_irq;
-#endif
 #if defined(CONFIG_PPC64) || defined(CONFIG_E500)
 void performance_monitor_exception(struct pt_regs *regs)
 {
diff --git a/arch/ppc64/kernel/udbg.c b/arch/powerpc/kernel/udbg.c
index 0d878e72fc44..0d878e72fc44 100644
--- a/arch/ppc64/kernel/udbg.c
+++ b/arch/powerpc/kernel/udbg.c
diff --git a/arch/ppc64/kernel/udbg_16550.c b/arch/powerpc/kernel/udbg_16550.c
index 9313574ab935..9313574ab935 100644
--- a/arch/ppc64/kernel/udbg_16550.c
+++ b/arch/powerpc/kernel/udbg_16550.c
diff --git a/arch/ppc64/kernel/udbg_scc.c b/arch/powerpc/kernel/udbg_scc.c
index 820c53551507..820c53551507 100644
--- a/arch/ppc64/kernel/udbg_scc.c
+++ b/arch/powerpc/kernel/udbg_scc.c
diff --git a/arch/powerpc/kernel/vdso.c b/arch/powerpc/kernel/vdso.c
new file mode 100644
index 000000000000..0d4d8bec0df4
--- /dev/null
+++ b/arch/powerpc/kernel/vdso.c
@@ -0,0 +1,746 @@
+/*
+ *  linux/arch/ppc64/kernel/vdso.c
+ *
+ *    Copyright (C) 2004 Benjamin Herrenschmidt, IBM Corp.
+ *                       <benh@kernel.crashing.org>
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ */
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/errno.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/smp.h>
+#include <linux/smp_lock.h>
+#include <linux/stddef.h>
+#include <linux/unistd.h>
+#include <linux/slab.h>
+#include <linux/user.h>
+#include <linux/elf.h>
+#include <linux/security.h>
+#include <linux/bootmem.h>
+#include <asm/pgtable.h>
+#include <asm/system.h>
+#include <asm/processor.h>
+#include <asm/mmu.h>
+#include <asm/mmu_context.h>
+#include <asm/lmb.h>
+#include <asm/machdep.h>
+#include <asm/cputable.h>
+#include <asm/sections.h>
+#include <asm/vdso.h>
+#include <asm/vdso_datapage.h>
+#undef DEBUG
+#ifdef DEBUG
+#define DBG(fmt...) printk(fmt)
+#else
+#define DBG(fmt...)
+#endif
+/* Max supported size for symbol names */
+#define MAX_SYMNAME     64
+extern char vdso32_start, vdso32_end;
+static void *vdso32_kbase = &vdso32_start;
+unsigned int vdso32_pages;
+unsigned long vdso32_sigtramp;
+unsigned long vdso32_rt_sigtramp;
+#ifdef CONFIG_PPC64
+extern char vdso64_start, vdso64_end;
+static void *vdso64_kbase = &vdso64_start;
+unsigned int vdso64_pages;
+unsigned long vdso64_rt_sigtramp;
+#endif /* CONFIG_PPC64 */
+/*
+ * The vdso data page (aka. systemcfg for old ppc64 fans) is here.
+ * Once the early boot kernel code no longer needs to muck around
+ * with it, it will become dynamically allocated
+ */
+static union {
+        struct vdso_data        data;
+        u8                      page[PAGE_SIZE];
+} vdso_data_store __attribute__((__section__(".data.page_aligned")));
+struct vdso_data *vdso_data = &vdso_data_store.data;
+/* Format of the patch table */
+struct vdso_patch_def
+{
+        unsigned long   ftr_mask, ftr_value;
+        const char      *gen_name;
+        const char      *fix_name;
+};
+/* Table of functions to patch based on the CPU type/revision
+ *
+ * Currently, we only change sync_dicache to do nothing on processors
+ * with a coherent icache
+ */
+static struct vdso_patch_def vdso_patches[] = {
+        {
+                CPU_FTR_COHERENT_ICACHE, CPU_FTR_COHERENT_ICACHE,
+                "__kernel_sync_dicache", "__kernel_sync_dicache_p5"
+        },
+        {
+                CPU_FTR_USE_TB, 0,
+                "__kernel_gettimeofday", NULL
+        },
+};
+/*
+ * Some infos carried around for each of them during parsing at
+ * boot time.
+ */
+struct lib32_elfinfo
+{
+        Elf32_Ehdr      *hdr;           /* ptr to ELF */
+        Elf32_Sym       *dynsym;        /* ptr to .dynsym section */
+        unsigned long   dynsymsize;     /* size of .dynsym section */
+        char            *dynstr;        /* ptr to .dynstr section */
+        unsigned long   text;           /* offset of .text section in .so */
+};
+struct lib64_elfinfo
+{
+        Elf64_Ehdr      *hdr;
+        Elf64_Sym       *dynsym;
+        unsigned long   dynsymsize;
+        char            *dynstr;
+        unsigned long   text;
+};
+#ifdef __DEBUG
+static void dump_one_vdso_page(struct page *pg, struct page *upg)
+{
+        printk("kpg: %p (c:%d,f:%08lx)", __va(page_to_pfn(pg) << PAGE_SHIFT),
+               page_count(pg),
+               pg->flags);
+        if (upg/* && pg != upg*/) {
+                printk(" upg: %p (c:%d,f:%08lx)", __va(page_to_pfn(upg)
+                                                       << PAGE_SHIFT),
+                       page_count(upg),
+                       upg->flags);
+        }
+        printk("\n");
+}
+static void dump_vdso_pages(struct vm_area_struct * vma)
+{
+        int i;
+        if (!vma || test_thread_flag(TIF_32BIT)) {
+                printk("vDSO32 @ %016lx:\n", (unsigned long)vdso32_kbase);
+                for (i=0; i<vdso32_pages; i++) {
+                        struct page *pg = virt_to_page(vdso32_kbase +
+                                                       i*PAGE_SIZE);
+                        struct page *upg = (vma && vma->vm_mm) ?
+                                follow_page(vma->vm_mm, vma->vm_start +
+                                            i*PAGE_SIZE, 0)
+                                : NULL;
+                        dump_one_vdso_page(pg, upg);
+                }
+        }
+        if (!vma || !test_thread_flag(TIF_32BIT)) {
+                printk("vDSO64 @ %016lx:\n", (unsigned long)vdso64_kbase);
+                for (i=0; i<vdso64_pages; i++) {
+                        struct page *pg = virt_to_page(vdso64_kbase +
+                                                       i*PAGE_SIZE);
+                        struct page *upg = (vma && vma->vm_mm) ?
+                                follow_page(vma->vm_mm, vma->vm_start +
+                                            i*PAGE_SIZE, 0)
+                                : NULL;
+                        dump_one_vdso_page(pg, upg);
+                }
+        }
+}
+#endif /* DEBUG */
+/*
+ * Keep a dummy vma_close for now, it will prevent VMA merging.
+ */
+static void vdso_vma_close(struct vm_area_struct * vma)
+{
+}
+/*
+ * Our nopage() function, maps in the actual vDSO kernel pages, they will
+ * be mapped read-only by do_no_page(), and eventually COW'ed, either
+ * right away for an initial write access, or by do_wp_page().
+ */
+static struct page * vdso_vma_nopage(struct vm_area_struct * vma,
+                                     unsigned long address, int *type)
+{
+        unsigned long offset = address - vma->vm_start;
+        struct page *pg;
+#ifdef CONFIG_PPC64
+        void *vbase = test_thread_flag(TIF_32BIT) ?
+                vdso32_kbase : vdso64_kbase;
+#else
+        void *vbase = vdso32_kbase;
+#endif
+        DBG("vdso_vma_nopage(current: %s, address: %016lx, off: %lx)\n",
+            current->comm, address, offset);
+        if (address < vma->vm_start || address > vma->vm_end)
+                return NOPAGE_SIGBUS;
+        /*
+         * Last page is systemcfg.
+         */
+        if ((vma->vm_end - address) <= PAGE_SIZE)
+                pg = virt_to_page(vdso_data);
+        else
+                pg = virt_to_page(vbase + offset);
+        get_page(pg);
+        DBG(" ->page count: %d\n", page_count(pg));
+        return pg;
+}
+static struct vm_operations_struct vdso_vmops = {
+        .close  = vdso_vma_close,
+        .nopage = vdso_vma_nopage,
+};
+/*
+ * This is called from binfmt_elf, we create the special vma for the
+ * vDSO and insert it into the mm struct tree
+ */
+int arch_setup_additional_pages(struct linux_binprm *bprm,
+                                int executable_stack)
+{
+        struct mm_struct *mm = current->mm;
+        struct vm_area_struct *vma;
+        unsigned long vdso_pages;
+        unsigned long vdso_base;
+#ifdef CONFIG_PPC64
+        if (test_thread_flag(TIF_32BIT)) {
+                vdso_pages = vdso32_pages;
+                vdso_base = VDSO32_MBASE;
+        } else {
+                vdso_pages = vdso64_pages;
+                vdso_base = VDSO64_MBASE;
+        }
+#else
+        vdso_pages = vdso32_pages;
+        vdso_base = VDSO32_MBASE;
+#endif
+        current->thread.vdso_base = 0;
+        /* vDSO has a problem and was disabled, just don't "enable" it for the
+         * process
+         */
+        if (vdso_pages == 0)
+                return 0;
+        vma = kmem_cache_alloc(vm_area_cachep, SLAB_KERNEL);
+        if (vma == NULL)
+                return -ENOMEM;
+        memset(vma, 0, sizeof(*vma));
+        /* Add a page to the vdso size for the data page */
+        vdso_pages ++;
+        /*
+         * pick a base address for the vDSO in process space. We try to put it
+         * at vdso_base which is the "natural" base for it, but we might fail
+         * and end up putting it elsewhere.
+         */
+        vdso_base = get_unmapped_area(NULL, vdso_base,
+                                      vdso_pages << PAGE_SHIFT, 0, 0);
+        if (vdso_base & ~PAGE_MASK) {
+                kmem_cache_free(vm_area_cachep, vma);
+                return (int)vdso_base;
+        }
+        current->thread.vdso_base = vdso_base;
+        vma->vm_mm = mm;
+        vma->vm_start = current->thread.vdso_base;
+        vma->vm_end = vma->vm_start + (vdso_pages << PAGE_SHIFT);
+        /*
+         * our vma flags don't have VM_WRITE so by default, the process isn't
+         * allowed to write those pages.
+         * gdb can break that with ptrace interface, and thus trigger COW on
+         * those pages but it's then your responsibility to never do that on
+         * the "data" page of the vDSO or you'll stop getting kernel updates
+         * and your nice userland gettimeofday will be totally dead.
+         * It's fine to use that for setting breakpoints in the vDSO code
+         * pages though
+         */
+        vma->vm_flags = VM_READ | VM_EXEC | VM_MAYREAD | VM_MAYWRITE |
+                VM_MAYEXEC | VM_RESERVED;
+        vma->vm_flags |= mm->def_flags;
+        vma->vm_page_prot = protection_map[vma->vm_flags & 0x7];
+        vma->vm_ops = &vdso_vmops;
+        down_write(&mm->mmap_sem);
+        if (insert_vm_struct(mm, vma)) {
+                up_write(&mm->mmap_sem);
+                kmem_cache_free(vm_area_cachep, vma);
+                return -ENOMEM;
+        }
+        mm->total_vm += (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
+        up_write(&mm->mmap_sem);
+        return 0;
+}
+static void * __init find_section32(Elf32_Ehdr *ehdr, const char *secname,
+                                  unsigned long *size)
+{
+        Elf32_Shdr *sechdrs;
+        unsigned int i;
+        char *secnames;
+        /* Grab section headers and strings so we can tell who is who */
+        sechdrs = (void *)ehdr + ehdr->e_shoff;
+        secnames = (void *)ehdr + sechdrs[ehdr->e_shstrndx].sh_offset;
+        /* Find the section they want */
+        for (i = 1; i < ehdr->e_shnum; i++) {
+                if (strcmp(secnames+sechdrs[i].sh_name, secname) == 0) {
+                        if (size)
+                                *size = sechdrs[i].sh_size;
+                        return (void *)ehdr + sechdrs[i].sh_offset;
+                }
+        }
+        *size = 0;
+        return NULL;
+}
+static Elf32_Sym * __init find_symbol32(struct lib32_elfinfo *lib,
+                                        const char *symname)
+{
+        unsigned int i;
+        char name[MAX_SYMNAME], *c;
+        for (i = 0; i < (lib->dynsymsize / sizeof(Elf32_Sym)); i++) {
+                if (lib->dynsym[i].st_name == 0)
+                        continue;
+                strlcpy(name, lib->dynstr + lib->dynsym[i].st_name,
+                        MAX_SYMNAME);
+                c = strchr(name, '@');
+                if (c)
+                        *c = 0;
+                if (strcmp(symname, name) == 0)
+                        return &lib->dynsym[i];
+        }
+        return NULL;
+}
+/* Note that we assume the section is .text and the symbol is relative to
+ * the library base
+ */
+static unsigned long __init find_function32(struct lib32_elfinfo *lib,
+                                            const char *symname)
+{
+        Elf32_Sym *sym = find_symbol32(lib, symname);
+        if (sym == NULL) {
+                printk(KERN_WARNING "vDSO32: function %s not found !\n",
+                       symname);
+                return 0;
+        }
+        return sym->st_value - VDSO32_LBASE;
+}
+static int vdso_do_func_patch32(struct lib32_elfinfo *v32,
+                                struct lib64_elfinfo *v64,
+                                const char *orig, const char *fix)
+{
+        Elf32_Sym *sym32_gen, *sym32_fix;
+        sym32_gen = find_symbol32(v32, orig);
+        if (sym32_gen == NULL) {
+                printk(KERN_ERR "vDSO32: Can't find symbol %s !\n", orig);
+                return -1;
+        }
+        if (fix == NULL) {
+                sym32_gen->st_name = 0;
+                return 0;
+        }
+        sym32_fix = find_symbol32(v32, fix);
+        if (sym32_fix == NULL) {
+                printk(KERN_ERR "vDSO32: Can't find symbol %s !\n", fix);
+                return -1;
+        }
+        sym32_gen->st_value = sym32_fix->st_value;
+        sym32_gen->st_size = sym32_fix->st_size;
+        sym32_gen->st_info = sym32_fix->st_info;
+        sym32_gen->st_other = sym32_fix->st_other;
+        sym32_gen->st_shndx = sym32_fix->st_shndx;
+        return 0;
+}
+#ifdef CONFIG_PPC64
+static void * __init find_section64(Elf64_Ehdr *ehdr, const char *secname,
+                                  unsigned long *size)
+{
+        Elf64_Shdr *sechdrs;
+        unsigned int i;
+        char *secnames;
+        /* Grab section headers and strings so we can tell who is who */
+        sechdrs = (void *)ehdr + ehdr->e_shoff;
+        secnames = (void *)ehdr + sechdrs[ehdr->e_shstrndx].sh_offset;
+        /* Find the section they want */
+        for (i = 1; i < ehdr->e_shnum; i++) {
+                if (strcmp(secnames+sechdrs[i].sh_name, secname) == 0) {
+                        if (size)
+                                *size = sechdrs[i].sh_size;
+                        return (void *)ehdr + sechdrs[i].sh_offset;
+                }
+        }
+        if (size)
+                *size = 0;
+        return NULL;
+}
+static Elf64_Sym * __init find_symbol64(struct lib64_elfinfo *lib,
+                                        const char *symname)
+{
+        unsigned int i;
+        char name[MAX_SYMNAME], *c;
+        for (i = 0; i < (lib->dynsymsize / sizeof(Elf64_Sym)); i++) {
+                if (lib->dynsym[i].st_name == 0)
+                        continue;
+                strlcpy(name, lib->dynstr + lib->dynsym[i].st_name,
+                        MAX_SYMNAME);
+                c = strchr(name, '@');
+                if (c)
+                        *c = 0;
+                if (strcmp(symname, name) == 0)
+                        return &lib->dynsym[i];
+        }
+        return NULL;
+}
+/* Note that we assume the section is .text and the symbol is relative to
+ * the library base
+ */
+static unsigned long __init find_function64(struct lib64_elfinfo *lib,
+                                            const char *symname)
+{
+        Elf64_Sym *sym = find_symbol64(lib, symname);
+        if (sym == NULL) {
+                printk(KERN_WARNING "vDSO64: function %s not found !\n",
+                       symname);
+                return 0;
+        }
+#ifdef VDS64_HAS_DESCRIPTORS
+        return *((u64 *)(vdso64_kbase + sym->st_value - VDSO64_LBASE)) -
+                VDSO64_LBASE;
+#else
+        return sym->st_value - VDSO64_LBASE;
+#endif
+}
+static int vdso_do_func_patch64(struct lib32_elfinfo *v32,
+                                struct lib64_elfinfo *v64,
+                                const char *orig, const char *fix)
+{
+        Elf64_Sym *sym64_gen, *sym64_fix;
+        sym64_gen = find_symbol64(v64, orig);
+        if (sym64_gen == NULL) {
+                printk(KERN_ERR "vDSO64: Can't find symbol %s !\n", orig);
+                return -1;
+        }
+        if (fix == NULL) {
+                sym64_gen->st_name = 0;
+                return 0;
+        }
+        sym64_fix = find_symbol64(v64, fix);
+        if (sym64_fix == NULL) {
+                printk(KERN_ERR "vDSO64: Can't find symbol %s !\n", fix);
+                return -1;
+        }
+        sym64_gen->st_value = sym64_fix->st_value;
+        sym64_gen->st_size = sym64_fix->st_size;
+        sym64_gen->st_info = sym64_fix->st_info;
+        sym64_gen->st_other = sym64_fix->st_other;
+        sym64_gen->st_shndx = sym64_fix->st_shndx;
+        return 0;
+}
+#endif /* CONFIG_PPC64 */
+static __init int vdso_do_find_sections(struct lib32_elfinfo *v32,
+                                        struct lib64_elfinfo *v64)
+{
+        void *sect;
+        /*
+         * Locate symbol tables & text section
+         */
+        v32->dynsym = find_section32(v32->hdr, ".dynsym", &v32->dynsymsize);
+        v32->dynstr = find_section32(v32->hdr, ".dynstr", NULL);
+        if (v32->dynsym == NULL || v32->dynstr == NULL) {
+                printk(KERN_ERR "vDSO32: required symbol section not found\n");
+                return -1;
+        }
+        sect = find_section32(v32->hdr, ".text", NULL);
+        if (sect == NULL) {
+                printk(KERN_ERR "vDSO32: the .text section was not found\n");
+                return -1;
+        }
+        v32->text = sect - vdso32_kbase;
+#ifdef CONFIG_PPC64
+        v64->dynsym = find_section64(v64->hdr, ".dynsym", &v64->dynsymsize);
+        v64->dynstr = find_section64(v64->hdr, ".dynstr", NULL);
+        if (v64->dynsym == NULL || v64->dynstr == NULL) {
+                printk(KERN_ERR "vDSO64: required symbol section not found\n");
+                return -1;
+        }
+        sect = find_section64(v64->hdr, ".text", NULL);
+        if (sect == NULL) {
+                printk(KERN_ERR "vDSO64: the .text section was not found\n");
+                return -1;
+        }
+        v64->text = sect - vdso64_kbase;
+#endif /* CONFIG_PPC64 */
+        return 0;
+}
+static __init void vdso_setup_trampolines(struct lib32_elfinfo *v32,
+                                          struct lib64_elfinfo *v64)
+{
+        /*
+         * Find signal trampolines
+         */
+#ifdef CONFIG_PPC64
+        vdso64_rt_sigtramp = find_function64(v64, "__kernel_sigtramp_rt64");
+#endif
+        vdso32_sigtramp    = find_function32(v32, "__kernel_sigtramp32");
+        vdso32_rt_sigtramp = find_function32(v32, "__kernel_sigtramp_rt32");
+}
+static __init int vdso_fixup_datapage(struct lib32_elfinfo *v32,
+                                       struct lib64_elfinfo *v64)
+{
+        Elf32_Sym *sym32;
+#ifdef CONFIG_PPC64
+        Elf64_Sym *sym64;
+        sym64 = find_symbol64(v64, "__kernel_datapage_offset");
+        if (sym64 == NULL) {
+                printk(KERN_ERR "vDSO64: Can't find symbol "
+                       "__kernel_datapage_offset !\n");
+                return -1;
+        }
+        *((int *)(vdso64_kbase + sym64->st_value - VDSO64_LBASE)) =
+                (vdso64_pages << PAGE_SHIFT) -
+                (sym64->st_value - VDSO64_LBASE);
+#endif /* CONFIG_PPC64 */
+        sym32 = find_symbol32(v32, "__kernel_datapage_offset");
+        if (sym32 == NULL) {
+                printk(KERN_ERR "vDSO32: Can't find symbol "
+                       "__kernel_datapage_offset !\n");
+                return -1;
+        }
+        *((int *)(vdso32_kbase + (sym32->st_value - VDSO32_LBASE))) =
+                (vdso32_pages << PAGE_SHIFT) -
+                (sym32->st_value - VDSO32_LBASE);
+        return 0;
+}
+static __init int vdso_fixup_alt_funcs(struct lib32_elfinfo *v32,
+                                       struct lib64_elfinfo *v64)
+{
+        int i;
+        for (i = 0; i < ARRAY_SIZE(vdso_patches); i++) {
+                struct vdso_patch_def *patch = &vdso_patches[i];
+                int match = (cur_cpu_spec->cpu_features & patch->ftr_mask)
+                        == patch->ftr_value;
+                if (!match)
+                        continue;
+                DBG("replacing %s with %s...\n", patch->gen_name,
+                    patch->fix_name ? "NONE" : patch->fix_name);
+                /*
+                 * Patch the 32 bits and 64 bits symbols. Note that we do not
+                 * patch the "." symbol on 64 bits.
+                 * It would be easy to do, but doesn't seem to be necessary,
+                 * patching the OPD symbol is enough.
+                 */
+                vdso_do_func_patch32(v32, v64, patch->gen_name,
+                                     patch->fix_name);
+#ifdef CONFIG_PPC64
+                vdso_do_func_patch64(v32, v64, patch->gen_name,
+                                     patch->fix_name);
+#endif /* CONFIG_PPC64 */
+        }
+        return 0;
+}
+static __init int vdso_setup(void)
+{
+        struct lib32_elfinfo    v32;
+        struct lib64_elfinfo    v64;
+        v32.hdr = vdso32_kbase;
+#ifdef CONFIG_PPC64
+        v64.hdr = vdso64_kbase;
+#endif
+        if (vdso_do_find_sections(&v32, &v64))
+                return -1;
+        if (vdso_fixup_datapage(&v32, &v64))
+                return -1;
+        if (vdso_fixup_alt_funcs(&v32, &v64))
+                return -1;
+        vdso_setup_trampolines(&v32, &v64);
+        return 0;
+}
+/*
+ * Called from setup_arch to initialize the bitmap of available
+ * syscalls in the systemcfg page
+ */
+static void __init vdso_setup_syscall_map(void)
+{
+        unsigned int i;
+        extern unsigned long *sys_call_table;
+        extern unsigned long sys_ni_syscall;
+        for (i = 0; i < __NR_syscalls; i++) {
+#ifdef CONFIG_PPC64
+                if (sys_call_table[i*2] != sys_ni_syscall)
+                        vdso_data->syscall_map_64[i >> 5] |=
+                                0x80000000UL >> (i & 0x1f);
+                if (sys_call_table[i*2+1] != sys_ni_syscall)
+                        vdso_data->syscall_map_32[i >> 5] |=
+                                0x80000000UL >> (i & 0x1f);
+#else /* CONFIG_PPC64 */
+                if (sys_call_table[i] != sys_ni_syscall)
+                        vdso_data->syscall_map_32[i >> 5] |=
+                                0x80000000UL >> (i & 0x1f);
+#endif /* CONFIG_PPC64 */
+        }
+}
+void __init vdso_init(void)
+{
+        int i;
+#ifdef CONFIG_PPC64
+        /*
+         * Fill up the "systemcfg" stuff for backward compatiblity
+         */
+        strcpy(vdso_data->eye_catcher, "SYSTEMCFG:PPC64");
+        vdso_data->version.major = SYSTEMCFG_MAJOR;
+        vdso_data->version.minor = SYSTEMCFG_MINOR;
+        vdso_data->processor = mfspr(SPRN_PVR);
+        vdso_data->platform = _machine;
+        vdso_data->physicalMemorySize = lmb_phys_mem_size();
+        vdso_data->dcache_size = ppc64_caches.dsize;
+        vdso_data->dcache_line_size = ppc64_caches.dline_size;
+        vdso_data->icache_size = ppc64_caches.isize;
+        vdso_data->icache_line_size = ppc64_caches.iline_size;
+        /*
+         * Calculate the size of the 64 bits vDSO
+         */
+        vdso64_pages = (&vdso64_end - &vdso64_start) >> PAGE_SHIFT;
+        DBG("vdso64_kbase: %p, 0x%x pages\n", vdso64_kbase, vdso64_pages);
+#endif /* CONFIG_PPC64 */
+        /*
+         * Calculate the size of the 32 bits vDSO
+         */
+        vdso32_pages = (&vdso32_end - &vdso32_start) >> PAGE_SHIFT;
+        DBG("vdso32_kbase: %p, 0x%x pages\n", vdso32_kbase, vdso32_pages);
+        /*
+         * Setup the syscall map in the vDOS
+         */
+        vdso_setup_syscall_map();
+        /*
+         * Initialize the vDSO images in memory, that is do necessary
+         * fixups of vDSO symbols, locate trampolines, etc...
+         */
+        if (vdso_setup()) {
+                printk(KERN_ERR "vDSO setup failure, not enabled !\n");
+                vdso32_pages = 0;
+#ifdef CONFIG_PPC64
+                vdso64_pages = 0;
+#endif
+                return;
+        }
+        /* Make sure pages are in the correct state */
+        for (i = 0; i < vdso32_pages; i++) {
+                struct page *pg = virt_to_page(vdso32_kbase + i*PAGE_SIZE);
+                ClearPageReserved(pg);
+                get_page(pg);
+        }
+#ifdef CONFIG_PPC64
+        for (i = 0; i < vdso64_pages; i++) {
+                struct page *pg = virt_to_page(vdso64_kbase + i*PAGE_SIZE);
+                ClearPageReserved(pg);
+                get_page(pg);
+        }
+#endif /* CONFIG_PPC64 */
+        get_page(virt_to_page(vdso_data));
+}
+int in_gate_area_no_task(unsigned long addr)
+{
+        return 0;
+}
+int in_gate_area(struct task_struct *task, unsigned long addr)
+{
+        return 0;
+}
+struct vm_area_struct *get_gate_vma(struct task_struct *tsk)
+{
+        return NULL;
+}
diff --git a/arch/ppc64/kernel/vdso32/Makefile b/arch/powerpc/kernel/vdso32/Makefile
index 0b1b0df973eb..8a3bed5f143a 100644
--- a/arch/ppc64/kernel/vdso32/Makefile
+++ b/arch/powerpc/kernel/vdso32/Makefile
@@ -5,6 +5,10 @@ obj-vdso32 = sigtramp.o gettimeofday.o datapage.o cacheflush.o note.o
 # Build rules
+ifeq ($(CONFIG_PPC32),y)
+CROSS32CC := $(CC)
+endif
 targets := $(obj-vdso32) vdso32.so
 obj-vdso32 := $(addprefix $(obj)/, $(obj-vdso32))
@@ -15,7 +19,7 @@ EXTRA_AFLAGS := -D__VDSO32__ -s
 obj-y += vdso32_wrapper.o
 extra-y += vdso32.lds
-CPPFLAGS_vdso32.lds += -P -C -U$(ARCH)
+CPPFLAGS_vdso32.lds += -P -C -Upowerpc
 # Force dependency (incbin is bad)
 $(obj)/vdso32_wrapper.o : $(obj)/vdso32.so
diff --git a/arch/ppc64/kernel/vdso32/cacheflush.S b/arch/powerpc/kernel/vdso32/cacheflush.S
index c8db993574ee..c8db993574ee 100644
--- a/arch/ppc64/kernel/vdso32/cacheflush.S
+++ b/arch/powerpc/kernel/vdso32/cacheflush.S
diff --git a/arch/ppc64/kernel/vdso32/datapage.S b/arch/powerpc/kernel/vdso32/datapage.S
index 4f4eb0be3992..a08c26e87835 100644
--- a/arch/ppc64/kernel/vdso32/datapage.S
+++ b/arch/powerpc/kernel/vdso32/datapage.S
@@ -66,3 +66,19 @@ V_FUNCTION_BEGIN(__kernel_get_syscall_map)
        blr
  .cfi_endproc
 V_FUNCTION_END(__kernel_get_syscall_map)
+/*
+ * void unsigned long long  __kernel_get_tbfreq(void);
+ *
+ * returns the timebase frequency in HZ
+ */
+V_FUNCTION_BEGIN(__kernel_get_tbfreq)
+  .cfi_startproc
+        mflr    r12
+  .cfi_register lr,r12
+        bl      __get_datapage@local
+        lwz     r3,CFG_TB_TICKS_PER_SEC(r3)
+        lwz     r4,(CFG_TB_TICKS_PER_SEC + 4)(r3)
+        mtlr    r12
+  .cfi_endproc
+V_FUNCTION_END(__kernel_get_tbfreq)
diff --git a/arch/powerpc/kernel/vdso32/gettimeofday.S b/arch/powerpc/kernel/vdso32/gettimeofday.S
new file mode 100644
index 000000000000..aeb5fc9b87b3
--- /dev/null
+++ b/arch/powerpc/kernel/vdso32/gettimeofday.S
@@ -0,0 +1,315 @@
+/*
+ * Userland implementation of gettimeofday() for 32 bits processes in a
+ * ppc64 kernel for use in the vDSO
+ *
+ * Copyright (C) 2004 Benjamin Herrenschmuidt (benh@kernel.crashing.org,
+ *                    IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <linux/config.h>
+#include <asm/processor.h>
+#include <asm/ppc_asm.h>
+#include <asm/vdso.h>
+#include <asm/asm-offsets.h>
+#include <asm/unistd.h>
+        .text
+/*
+ * Exact prototype of gettimeofday
+ *
+ * int __kernel_gettimeofday(struct timeval *tv, struct timezone *tz);
+ *
+ */
+V_FUNCTION_BEGIN(__kernel_gettimeofday)
+  .cfi_startproc
+        mflr    r12
+  .cfi_register lr,r12
+        mr      r10,r3                  /* r10 saves tv */
+        mr      r11,r4                  /* r11 saves tz */
+        bl      __get_datapage@local    /* get data page */
+        mr      r9, r3                  /* datapage ptr in r9 */
+        bl      __do_get_xsec@local     /* get xsec from tb & kernel */
+        bne-    2f                      /* out of line -> do syscall */
+        /* seconds are xsec >> 20 */
+        rlwinm  r5,r4,12,20,31
+        rlwimi  r5,r3,12,0,19
+        stw     r5,TVAL32_TV_SEC(r10)
+        /* get remaining xsec and convert to usec. we scale
+         * up remaining xsec by 12 bits and get the top 32 bits
+         * of the multiplication
+         */
+        rlwinm  r5,r4,12,0,19
+        lis     r6,1000000@h
+        ori     r6,r6,1000000@l
+        mulhwu  r5,r5,r6
+        stw     r5,TVAL32_TV_USEC(r10)
+        cmpli   cr0,r11,0               /* check if tz is NULL */
+        beq     1f
+        lwz     r4,CFG_TZ_MINUTEWEST(r9)/* fill tz */
+        lwz     r5,CFG_TZ_DSTTIME(r9)
+        stw     r4,TZONE_TZ_MINWEST(r11)
+        stw     r5,TZONE_TZ_DSTTIME(r11)
+1:      mtlr    r12
+        li      r3,0
+        blr
+2:
+        mtlr    r12
+        mr      r3,r10
+        mr      r4,r11
+        li      r0,__NR_gettimeofday
+        sc
+        blr
+  .cfi_endproc
+V_FUNCTION_END(__kernel_gettimeofday)
+/*
+ * Exact prototype of clock_gettime()
+ *
+ * int __kernel_clock_gettime(clockid_t clock_id, struct timespec *tp);
+ *
+ */
+V_FUNCTION_BEGIN(__kernel_clock_gettime)
+  .cfi_startproc
+        /* Check for supported clock IDs */
+        cmpli   cr0,r3,CLOCK_REALTIME
+        cmpli   cr1,r3,CLOCK_MONOTONIC
+        cror    cr0,cr0,cr1
+        bne     cr0,99f
+        mflr    r12                     /* r12 saves lr */
+  .cfi_register lr,r12
+        mr      r10,r3                  /* r10 saves id */
+        mr      r11,r4                  /* r11 saves tp */
+        bl      __get_datapage@local    /* get data page */
+        mr      r9, r3                  /* datapage ptr in r9 */
+        beq     cr1,50f                 /* if monotonic -> jump there */
+        /*
+         * CLOCK_REALTIME
+         */
+        bl      __do_get_xsec@local     /* get xsec from tb & kernel */
+        bne-    98f                     /* out of line -> do syscall */
+        /* seconds are xsec >> 20 */
+        rlwinm  r5,r4,12,20,31
+        rlwimi  r5,r3,12,0,19
+        stw     r5,TSPC32_TV_SEC(r11)
+        /* get remaining xsec and convert to nsec. we scale
+         * up remaining xsec by 12 bits and get the top 32 bits
+         * of the multiplication, then we multiply by 1000
+         */
+        rlwinm  r5,r4,12,0,19
+        lis     r6,1000000@h
+        ori     r6,r6,1000000@l
+        mulhwu  r5,r5,r6
+        mulli   r5,r5,1000
+        stw     r5,TSPC32_TV_NSEC(r11)
+        mtlr    r12
+        li      r3,0
+        blr
+        /*
+         * CLOCK_MONOTONIC
+         */
+50:     bl      __do_get_xsec@local     /* get xsec from tb & kernel */
+        bne-    98f                     /* out of line -> do syscall */
+        /* seconds are xsec >> 20 */
+        rlwinm  r6,r4,12,20,31
+        rlwimi  r6,r3,12,0,19
+        /* get remaining xsec and convert to nsec. we scale
+         * up remaining xsec by 12 bits and get the top 32 bits
+         * of the multiplication, then we multiply by 1000
+         */
+        rlwinm  r7,r4,12,0,19
+        lis     r5,1000000@h
+        ori     r5,r5,1000000@l
+        mulhwu  r7,r7,r5
+        mulli   r7,r7,1000
+        /* now we must fixup using wall to monotonic. We need to snapshot
+         * that value and do the counter trick again. Fortunately, we still
+         * have the counter value in r8 that was returned by __do_get_xsec.
+         * At this point, r6,r7 contain our sec/nsec values, r3,r4 and r5
+         * can be used
+         */
+        lwz     r3,WTOM_CLOCK_SEC(r9)
+        lwz     r4,WTOM_CLOCK_NSEC(r9)
+        /* We now have our result in r3,r4. We create a fake dependency
+         * on that result and re-check the counter
+         */
+        or      r5,r4,r3
+        xor     r0,r5,r5
+        add     r9,r9,r0
+#ifdef CONFIG_PPC64
+        lwz     r0,(CFG_TB_UPDATE_COUNT+4)(r9)
+#else
+        lwz     r0,(CFG_TB_UPDATE_COUNT)(r9)
+#endif
+        cmpl    cr0,r8,r0               /* check if updated */
+        bne-    50b
+        /* Calculate and store result. Note that this mimmics the C code,
+         * which may cause funny results if nsec goes negative... is that
+         * possible at all ?
+         */
+        add     r3,r3,r6
+        add     r4,r4,r7
+        lis     r5,NSEC_PER_SEC@h
+        ori     r5,r5,NSEC_PER_SEC@l
+        cmpli   cr0,r4,r5
+        blt     1f
+        subf    r4,r5,r4
+        addi    r3,r3,1
+1:      stw     r3,TSPC32_TV_SEC(r11)
+        stw     r4,TSPC32_TV_NSEC(r11)
+        mtlr    r12
+        li      r3,0
+        blr
+        /*
+         * syscall fallback
+         */
+98:
+        mtlr    r12
+        mr      r3,r10
+        mr      r4,r11
+99:
+        li      r0,__NR_clock_gettime
+        sc
+        blr
+  .cfi_endproc
+V_FUNCTION_END(__kernel_clock_gettime)
+/*
+ * Exact prototype of clock_getres()
+ *
+ * int __kernel_clock_getres(clockid_t clock_id, struct timespec *res);
+ *
+ */
+V_FUNCTION_BEGIN(__kernel_clock_getres)
+  .cfi_startproc
+        /* Check for supported clock IDs */
+        cmpwi   cr0,r3,CLOCK_REALTIME
+        cmpwi   cr1,r3,CLOCK_MONOTONIC
+        cror    cr0,cr0,cr1
+        bne     cr0,99f
+        li      r3,0
+        cmpli   cr0,r4,0
+        beqlr
+        lis     r5,CLOCK_REALTIME_RES@h
+        ori     r5,r5,CLOCK_REALTIME_RES@l
+        stw     r3,TSPC32_TV_SEC(r4)
+        stw     r5,TSPC32_TV_NSEC(r4)
+        blr
+        /*
+         * syscall fallback
+         */
+99:
+        li      r0,__NR_clock_getres
+        sc
+        blr
+  .cfi_endproc
+V_FUNCTION_END(__kernel_clock_getres)
+/*
+ * This is the core of gettimeofday() & friends, it returns the xsec
+ * value in r3 & r4 and expects the datapage ptr (non clobbered)
+ * in r9. clobbers r0,r4,r5,r6,r7,r8.
+ * When returning, r8 contains the counter value that can be reused
+ * by the monotonic clock implementation
+ */
+__do_get_xsec:
+  .cfi_startproc
+        /* Check for update count & load values. We use the low
+         * order 32 bits of the update count
+         */
+#ifdef CONFIG_PPC64
+1:      lwz     r8,(CFG_TB_UPDATE_COUNT+4)(r9)
+#else
+1:      lwz     r8,(CFG_TB_UPDATE_COUNT)(r9)
+#endif
+        andi.   r0,r8,1                 /* pending update ? loop */
+        bne-    1b
+        xor     r0,r8,r8                /* create dependency */
+        add     r9,r9,r0
+        /* Load orig stamp (offset to TB) */
+        lwz     r5,CFG_TB_ORIG_STAMP(r9)
+        lwz     r6,(CFG_TB_ORIG_STAMP+4)(r9)
+        /* Get a stable TB value */
+2:      mftbu   r3
+        mftbl   r4
+        mftbu   r0
+        cmpl    cr0,r3,r0
+        bne-    2b
+        /* Substract tb orig stamp. If the high part is non-zero, we jump to
+         * the slow path which call the syscall.
+         * If it's ok, then we have our 32 bits tb_ticks value in r7
+         */
+        subfc   r7,r6,r4
+        subfe.  r0,r5,r3
+        bne-    3f
+        /* Load scale factor & do multiplication */
+        lwz     r5,CFG_TB_TO_XS(r9)     /* load values */
+        lwz     r6,(CFG_TB_TO_XS+4)(r9)
+        mulhwu  r4,r7,r5
+        mulhwu  r6,r7,r6
+        mullw   r0,r7,r5
+        addc    r6,r6,r0
+        /* At this point, we have the scaled xsec value in r4 + XER:CA
+         * we load & add the stamp since epoch
+         */
+        lwz     r5,CFG_STAMP_XSEC(r9)
+        lwz     r6,(CFG_STAMP_XSEC+4)(r9)
+        adde    r4,r4,r6
+        addze   r3,r5
+        /* We now have our result in r3,r4. We create a fake dependency
+         * on that result and re-check the counter
+         */
+        or      r6,r4,r3
+        xor     r0,r6,r6
+        add     r9,r9,r0
+#ifdef CONFIG_PPC64
+        lwz     r0,(CFG_TB_UPDATE_COUNT+4)(r9)
+#else
+        lwz     r0,(CFG_TB_UPDATE_COUNT)(r9)
+#endif
+        cmpl    cr0,r8,r0               /* check if updated */
+        bne-    1b
+        /* Warning ! The caller expects CR:EQ to be set to indicate a
+         * successful calculation (so it won't fallback to the syscall
+         * method). We have overriden that CR bit in the counter check,
+         * but fortunately, the loop exit condition _is_ CR:EQ set, so
+         * we can exit safely here. If you change this code, be careful
+         * of that side effect.
+         */
+3:      blr
+  .cfi_endproc
diff --git a/arch/ppc64/kernel/vdso32/note.S b/arch/powerpc/kernel/vdso32/note.S
index d4b5be4f3d5f..d4b5be4f3d5f 100644
--- a/arch/ppc64/kernel/vdso32/note.S
+++ b/arch/powerpc/kernel/vdso32/note.S
diff --git a/arch/ppc64/kernel/vdso32/sigtramp.S b/arch/powerpc/kernel/vdso32/sigtramp.S
index e04642781917..e04642781917 100644
--- a/arch/ppc64/kernel/vdso32/sigtramp.S
+++ b/arch/powerpc/kernel/vdso32/sigtramp.S
diff --git a/arch/ppc64/kernel/vdso32/vdso32.lds.S b/arch/powerpc/kernel/vdso32/vdso32.lds.S
index 6f87a916a394..f4bad720cb0a 100644
--- a/arch/ppc64/kernel/vdso32/vdso32.lds.S
+++ b/arch/powerpc/kernel/vdso32/vdso32.lds.S
@@ -102,9 +102,12 @@ VERSION
 {
  VDSO_VERSION_STRING {
    global:
-        __kernel_datapage_offset; /* Has to be there for the kernel to find it */
+        __kernel_datapage_offset; /* Has to be there for the kernel to find */
        __kernel_get_syscall_map;
        __kernel_gettimeofday;
+        __kernel_clock_gettime;
+        __kernel_clock_getres;
+        __kernel_get_tbfreq;
        __kernel_sync_dicache;
        __kernel_sync_dicache_p5;
        __kernel_sigtramp32;
diff --git a/arch/ppc64/kernel/vdso32/vdso32_wrapper.S b/arch/powerpc/kernel/vdso32/vdso32_wrapper.S
index 76ca28e09d29..556f0caa5d84 100644
--- a/arch/ppc64/kernel/vdso32/vdso32_wrapper.S
+++ b/arch/powerpc/kernel/vdso32/vdso32_wrapper.S
@@ -6,7 +6,7 @@
        .globl vdso32_start, vdso32_end
        .balign PAGE_SIZE
 vdso32_start:
-        .incbin "arch/ppc64/kernel/vdso32/vdso32.so"
+        .incbin "arch/powerpc/kernel/vdso32/vdso32.so"
        .balign PAGE_SIZE
 vdso32_end:
diff --git a/arch/ppc64/kernel/vdso64/Makefile b/arch/powerpc/kernel/vdso64/Makefile
index ab39988452cc..ab39988452cc 100644
--- a/arch/ppc64/kernel/vdso64/Makefile
+++ b/arch/powerpc/kernel/vdso64/Makefile
diff --git a/arch/ppc64/kernel/vdso64/cacheflush.S b/arch/powerpc/kernel/vdso64/cacheflush.S
index d4a0ad28d534..d4a0ad28d534 100644
--- a/arch/ppc64/kernel/vdso64/cacheflush.S
+++ b/arch/powerpc/kernel/vdso64/cacheflush.S
diff --git a/arch/ppc64/kernel/vdso64/datapage.S b/arch/powerpc/kernel/vdso64/datapage.S
index ed6e599ae824..e67eda0f8cda 100644
--- a/arch/ppc64/kernel/vdso64/datapage.S
+++ b/arch/powerpc/kernel/vdso64/datapage.S
@@ -66,3 +66,19 @@ V_FUNCTION_BEGIN(__kernel_get_syscall_map)
        blr
  .cfi_endproc
 V_FUNCTION_END(__kernel_get_syscall_map)
+/*
+ * void unsigned long  __kernel_get_tbfreq(void);
+ *
+ * returns the timebase frequency in HZ
+ */
+V_FUNCTION_BEGIN(__kernel_get_tbfreq)
+  .cfi_startproc
+        mflr    r12
+  .cfi_register lr,r12
+        bl      V_LOCAL_FUNC(__get_datapage)
+        ld      r3,CFG_TB_TICKS_PER_SEC(r3)
+        mtlr    r12
+  .cfi_endproc
+V_FUNCTION_END(__kernel_get_tbfreq)
diff --git a/arch/powerpc/kernel/vdso64/gettimeofday.S b/arch/powerpc/kernel/vdso64/gettimeofday.S
new file mode 100644
index 000000000000..d371c02a8c0e
--- /dev/null
+++ b/arch/powerpc/kernel/vdso64/gettimeofday.S
@@ -0,0 +1,242 @@
+/*
+ * Userland implementation of gettimeofday() for 64 bits processes in a
+ * ppc64 kernel for use in the vDSO
+ *
+ * Copyright (C) 2004 Benjamin Herrenschmuidt (benh@kernel.crashing.org),
+ *                    IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <linux/config.h>
+#include <asm/processor.h>
+#include <asm/ppc_asm.h>
+#include <asm/vdso.h>
+#include <asm/asm-offsets.h>
+#include <asm/unistd.h>
+        .text
+/*
+ * Exact prototype of gettimeofday
+ *
+ * int __kernel_gettimeofday(struct timeval *tv, struct timezone *tz);
+ *
+ */
+V_FUNCTION_BEGIN(__kernel_gettimeofday)
+  .cfi_startproc
+        mflr    r12
+  .cfi_register lr,r12
+        mr      r11,r3                  /* r11 holds tv */
+        mr      r10,r4                  /* r10 holds tz */
+        bl      V_LOCAL_FUNC(__get_datapage)    /* get data page */
+        bl      V_LOCAL_FUNC(__do_get_xsec)     /* get xsec from tb & kernel */
+        lis     r7,15                   /* r7 = 1000000 = USEC_PER_SEC */
+        ori     r7,r7,16960
+        rldicl  r5,r4,44,20             /* r5 = sec = xsec / XSEC_PER_SEC */
+        rldicr  r6,r5,20,43             /* r6 = sec * XSEC_PER_SEC */
+        std     r5,TVAL64_TV_SEC(r11)   /* store sec in tv */
+        subf    r0,r6,r4                /* r0 = xsec = (xsec - r6) */
+        mulld   r0,r0,r7                /* usec = (xsec * USEC_PER_SEC) /
+                                         * XSEC_PER_SEC
+                                         */
+        rldicl  r0,r0,44,20
+        cmpldi  cr0,r10,0               /* check if tz is NULL */
+        std     r0,TVAL64_TV_USEC(r11)  /* store usec in tv */
+        beq     1f
+        lwz     r4,CFG_TZ_MINUTEWEST(r3)/* fill tz */
+        lwz     r5,CFG_TZ_DSTTIME(r3)
+        stw     r4,TZONE_TZ_MINWEST(r10)
+        stw     r5,TZONE_TZ_DSTTIME(r10)
+1:      mtlr    r12
+        li      r3,0                    /* always success */
+        blr
+  .cfi_endproc
+V_FUNCTION_END(__kernel_gettimeofday)
+/*
+ * Exact prototype of clock_gettime()
+ *
+ * int __kernel_clock_gettime(clockid_t clock_id, struct timespec *tp);
+ *
+ */
+V_FUNCTION_BEGIN(__kernel_clock_gettime)
+  .cfi_startproc
+        /* Check for supported clock IDs */
+        cmpwi   cr0,r3,CLOCK_REALTIME
+        cmpwi   cr1,r3,CLOCK_MONOTONIC
+        cror    cr0,cr0,cr1
+        bne     cr0,99f
+        mflr    r12                     /* r12 saves lr */
+  .cfi_register lr,r12
+        mr      r10,r3                  /* r10 saves id */
+        mr      r11,r4                  /* r11 saves tp */
+        bl      V_LOCAL_FUNC(__get_datapage)    /* get data page */
+        beq     cr1,50f                 /* if monotonic -> jump there */
+        /*
+         * CLOCK_REALTIME
+         */
+        bl      V_LOCAL_FUNC(__do_get_xsec)     /* get xsec from tb & kernel */
+        lis     r7,0x3b9a               /* r7 = 1000000000 = NSEC_PER_SEC */
+        ori     r7,r7,0xca00
+        rldicl  r5,r4,44,20             /* r5 = sec = xsec / XSEC_PER_SEC */
+        rldicr  r6,r5,20,43             /* r6 = sec * XSEC_PER_SEC */
+        std     r5,TSPC64_TV_SEC(r11)   /* store sec in tv */
+        subf    r0,r6,r4                /* r0 = xsec = (xsec - r6) */
+        mulld   r0,r0,r7                /* nsec = (xsec * NSEC_PER_SEC) /
+                                         * XSEC_PER_SEC
+                                         */
+        rldicl  r0,r0,44,20
+        std     r0,TSPC64_TV_NSEC(r11)  /* store nsec in tp */
+        mtlr    r12
+        li      r3,0
+        blr
+        /*
+         * CLOCK_MONOTONIC
+         */
+50:     bl      V_LOCAL_FUNC(__do_get_xsec)     /* get xsec from tb & kernel */
+        lis     r7,0x3b9a               /* r7 = 1000000000 = NSEC_PER_SEC */
+        ori     r7,r7,0xca00
+        rldicl  r5,r4,44,20             /* r5 = sec = xsec / XSEC_PER_SEC */
+        rldicr  r6,r5,20,43             /* r6 = sec * XSEC_PER_SEC */
+        subf    r0,r6,r4                /* r0 = xsec = (xsec - r6) */
+        mulld   r0,r0,r7                /* nsec = (xsec * NSEC_PER_SEC) /
+                                         * XSEC_PER_SEC
+                                         */
+        rldicl  r6,r0,44,20
+        /* now we must fixup using wall to monotonic. We need to snapshot
+         * that value and do the counter trick again. Fortunately, we still
+         * have the counter value in r8 that was returned by __do_get_xsec.
+         * At this point, r5,r6 contain our sec/nsec values.
+         * can be used
+         */
+        lwz     r4,WTOM_CLOCK_SEC(r9)
+        lwz     r7,WTOM_CLOCK_NSEC(r9)
+        /* We now have our result in r4,r7. We create a fake dependency
+         * on that result and re-check the counter
+         */
+        or      r9,r4,r7
+        xor     r0,r9,r9
+        add     r3,r3,r0
+        ld      r0,CFG_TB_UPDATE_COUNT(r3)
+        cmpld   cr0,r0,r8               /* check if updated */
+        bne-    50b
+        /* Calculate and store result. Note that this mimmics the C code,
+         * which may cause funny results if nsec goes negative... is that
+         * possible at all ?
+         */
+        add     r4,r4,r5
+        add     r7,r7,r6
+        lis     r9,NSEC_PER_SEC@h
+        ori     r9,r9,NSEC_PER_SEC@l
+        cmpli   cr0,r7,r9
+        blt     1f
+        subf    r7,r9,r7
+        addi    r4,r4,1
+1:      std     r4,TSPC64_TV_SEC(r11)
+        std     r7,TSPC64_TV_NSEC(r11)
+        mtlr    r12
+        li      r3,0
+        blr
+        /*
+         * syscall fallback
+         */
+98:
+        mtlr    r12
+        mr      r3,r10
+        mr      r4,r11
+99:
+        li      r0,__NR_clock_gettime
+        sc
+        blr
+  .cfi_endproc
+V_FUNCTION_END(__kernel_clock_gettime)
+/*
+ * Exact prototype of clock_getres()
+ *
+ * int __kernel_clock_getres(clockid_t clock_id, struct timespec *res);
+ *
+ */
+V_FUNCTION_BEGIN(__kernel_clock_getres)
+  .cfi_startproc
+        /* Check for supported clock IDs */
+        cmpwi   cr0,r3,CLOCK_REALTIME
+        cmpwi   cr1,r3,CLOCK_MONOTONIC
+        cror    cr0,cr0,cr1
+        bne     cr0,99f
+        li      r3,0
+        cmpli   cr0,r4,0
+        beqlr
+        lis     r5,CLOCK_REALTIME_RES@h
+        ori     r5,r5,CLOCK_REALTIME_RES@l
+        std     r3,TSPC64_TV_SEC(r4)
+        std     r5,TSPC64_TV_NSEC(r4)
+        blr
+        /*
+         * syscall fallback
+         */
+99:
+        li      r0,__NR_clock_getres
+        sc
+        blr
+  .cfi_endproc
+V_FUNCTION_END(__kernel_clock_getres)
+/*
+ * This is the core of gettimeofday(), it returns the xsec
+ * value in r4 and expects the datapage ptr (non clobbered)
+ * in r3. clobbers r0,r4,r5,r6,r7,r8
+ * When returning, r8 contains the counter value that can be reused
+ */
+V_FUNCTION_BEGIN(__do_get_xsec)
+  .cfi_startproc
+        /* check for update count & load values */
+1:      ld      r8,CFG_TB_UPDATE_COUNT(r3)
+        andi.   r0,r4,1                 /* pending update ? loop */
+        bne-    1b
+        xor     r0,r4,r4                /* create dependency */
+        add     r3,r3,r0
+        /* Get TB & offset it */
+        mftb    r7
+        ld      r9,CFG_TB_ORIG_STAMP(r3)
+        subf    r7,r9,r7
+        /* Scale result */
+        ld      r5,CFG_TB_TO_XS(r3)
+        mulhdu  r7,r7,r5
+        /* Add stamp since epoch */
+        ld      r6,CFG_STAMP_XSEC(r3)
+        add     r4,r6,r7
+        xor     r0,r4,r4
+        add     r3,r3,r0
+        ld      r0,CFG_TB_UPDATE_COUNT(r3)
+        cmpld   cr0,r0,r8               /* check if updated */
+        bne-    1b
+        blr
+  .cfi_endproc
+V_FUNCTION_END(__do_get_xsec)
diff --git a/arch/ppc64/kernel/vdso64/note.S b/arch/powerpc/kernel/vdso64/note.S
index dc2a509f7e8a..dc2a509f7e8a 100644
--- a/arch/ppc64/kernel/vdso64/note.S
+++ b/arch/powerpc/kernel/vdso64/note.S
diff --git a/arch/ppc64/kernel/vdso64/sigtramp.S b/arch/powerpc/kernel/vdso64/sigtramp.S
index 31b604ab56de..31b604ab56de 100644
--- a/arch/ppc64/kernel/vdso64/sigtramp.S
+++ b/arch/powerpc/kernel/vdso64/sigtramp.S
diff --git a/arch/ppc64/kernel/vdso64/vdso64.lds.S b/arch/powerpc/kernel/vdso64/vdso64.lds.S
index 9cb28181da80..4bdf224464ab 100644
--- a/arch/ppc64/kernel/vdso64/vdso64.lds.S
+++ b/arch/powerpc/kernel/vdso64/vdso64.lds.S
@@ -102,9 +102,12 @@ VERSION
 {
  VDSO_VERSION_STRING {
    global:
-        __kernel_datapage_offset; /* Has to be there for the kernel to find it */
+        __kernel_datapage_offset; /* Has to be there for the kernel to find */
        __kernel_get_syscall_map;
        __kernel_gettimeofday;
+        __kernel_clock_gettime;
+        __kernel_clock_getres;
+        __kernel_get_tbfreq;
        __kernel_sync_dicache;
        __kernel_sync_dicache_p5;
        __kernel_sigtramp_rt64;
diff --git a/arch/ppc64/kernel/vdso64/vdso64_wrapper.S b/arch/powerpc/kernel/vdso64/vdso64_wrapper.S
index 771c2741c492..0529cb9e3b97 100644
--- a/arch/ppc64/kernel/vdso64/vdso64_wrapper.S
+++ b/arch/powerpc/kernel/vdso64/vdso64_wrapper.S
@@ -6,7 +6,7 @@
        .globl vdso64_start, vdso64_end
        .balign PAGE_SIZE
 vdso64_start:
-        .incbin "arch/ppc64/kernel/vdso64/vdso64.so"
+        .incbin "arch/powerpc/kernel/vdso64/vdso64.so"
        .balign PAGE_SIZE
 vdso64_end:
diff --git a/arch/powerpc/kernel/vio.c b/arch/powerpc/kernel/vio.c
index 97082a4203ad..71a6addf9f7f 100644
--- a/arch/powerpc/kernel/vio.c
+++ b/arch/powerpc/kernel/vio.c
@@ -21,6 +21,7 @@
 #include <asm/iommu.h>
 #include <asm/dma.h>
 #include <asm/vio.h>
+#include <asm/prom.h>
 static const struct vio_device_id *vio_match_device(
                const struct vio_device_id *, const struct vio_dev *);
@@ -265,7 +266,33 @@ static int vio_bus_match(struct device *dev, struct device_driver *drv)
        return (ids != NULL) && (vio_match_device(ids, vio_dev) != NULL);
 }
+static int vio_hotplug(struct device *dev, char **envp, int num_envp,
+                        char *buffer, int buffer_size)
+{
+        const struct vio_dev *vio_dev = to_vio_dev(dev);
+        char *cp;
+        int length;
+        if (!num_envp)
+                return -ENOMEM;
+        if (!vio_dev->dev.platform_data)
+                return -ENODEV;
+        cp = (char *)get_property(vio_dev->dev.platform_data, "compatible", &length);
+        if (!cp)
+                return -ENODEV;
+        envp[0] = buffer;
+        length = scnprintf(buffer, buffer_size, "MODALIAS=vio:T%sS%s",
+                                vio_dev->type, cp);
+        if (buffer_size - length <= 0)
+                return -ENOMEM;
+        envp[1] = NULL;
+        return 0;
+}
 struct bus_type vio_bus_type = {
        .name = "vio",
+        .hotplug = vio_hotplug,
        .match = vio_bus_match,
 };
diff --git a/arch/powerpc/lib/bitops.c b/arch/powerpc/lib/bitops.c
index b67ce3004ebf..f68ad71a0187 100644
--- a/arch/powerpc/lib/bitops.c
+++ b/arch/powerpc/lib/bitops.c
@@ -41,7 +41,7 @@ unsigned long find_next_bit(const unsigned long *addr, unsigned long size,
        tmp = *p;
 found_first:
-        tmp &= (~0UL >> (64 - size));
+        tmp &= (~0UL >> (BITS_PER_LONG - size));
        if (tmp == 0UL)         /* Are any bits set? */
                return result + size;   /* Nope. */
 found_middle:
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index 22e474876133..706e8a63ced9 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -84,10 +84,11 @@
 extern unsigned long dart_tablebase;
 #endif /* CONFIG_U3_DART */
+static unsigned long _SDR1;
+struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];
 hpte_t *htab_address;
 unsigned long htab_hash_mask;
-unsigned long _SDR1;
-struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];
 int mmu_linear_psize = MMU_PAGE_4K;
 int mmu_virtual_psize = MMU_PAGE_4K;
 #ifdef CONFIG_HUGETLB_PAGE
@@ -165,7 +166,7 @@ int htab_bolt_mapping(unsigned long vstart, unsigned long vend,
                 * normal insert callback here.
                 */
 #ifdef CONFIG_PPC_ISERIES
-                if (systemcfg->platform == PLATFORM_ISERIES_LPAR)
+                if (_machine == PLATFORM_ISERIES_LPAR)
                        ret = iSeries_hpte_insert(hpteg, va,
                                                  virt_to_abs(paddr),
                                                  tmp_mode,
@@ -174,7 +175,7 @@ int htab_bolt_mapping(unsigned long vstart, unsigned long vend,
                else
 #endif
 #ifdef CONFIG_PPC_PSERIES
-                if (systemcfg->platform & PLATFORM_LPAR)
+                if (_machine & PLATFORM_LPAR)
                        ret = pSeries_lpar_hpte_insert(hpteg, va,
                                                       virt_to_abs(paddr),
                                                       tmp_mode,
@@ -293,7 +294,7 @@ static void __init htab_init_page_sizes(void)
         * Not in the device-tree, let's fallback on known size
         * list for 16M capable GP & GR
         */
-        if ((systemcfg->platform != PLATFORM_ISERIES_LPAR) &&
+        if ((_machine != PLATFORM_ISERIES_LPAR) &&
            cpu_has_feature(CPU_FTR_16M_PAGE))
                memcpy(mmu_psize_defs, mmu_psize_defaults_gp,
                       sizeof(mmu_psize_defaults_gp));
@@ -364,7 +365,7 @@ static int __init htab_dt_scan_pftsize(unsigned long node,
 static unsigned long __init htab_get_table_size(void)
 {
-        unsigned long rnd_mem_size, pteg_count;
+        unsigned long mem_size, rnd_mem_size, pteg_count;
        /* If hash size isn't already provided by the platform, we try to
         * retreive it from the device-tree. If it's not there neither, we
@@ -376,8 +377,9 @@ static unsigned long __init htab_get_table_size(void)
                return 1UL << ppc64_pft_size;
        /* round mem_size up to next power of 2 */
-        rnd_mem_size = 1UL << __ilog2(systemcfg->physicalMemorySize);
+        mem_size = lmb_phys_mem_size();
-        if (rnd_mem_size < systemcfg->physicalMemorySize)
+        rnd_mem_size = 1UL << __ilog2(mem_size);
+        if (rnd_mem_size < mem_size)
                rnd_mem_size <<= 1;
        /* # pages / 2 */
@@ -386,6 +388,15 @@ static unsigned long __init htab_get_table_size(void)
        return pteg_count << 7;
 }
+#ifdef CONFIG_MEMORY_HOTPLUG
+void create_section_mapping(unsigned long start, unsigned long end)
+{
+                BUG_ON(htab_bolt_mapping(start, end, start,
+                        _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_COHERENT | PP_RWXX,
+                        mmu_linear_psize));
+}
+#endif /* CONFIG_MEMORY_HOTPLUG */
 void __init htab_initialize(void)
 {
        unsigned long table, htab_size_bytes;
@@ -410,7 +421,7 @@ void __init htab_initialize(void)
        htab_hash_mask = pteg_count - 1;
-        if (systemcfg->platform & PLATFORM_LPAR) {
+        if (platform_is_lpar()) {
                /* Using a hypervisor which owns the htab */
                htab_address = NULL;
                _SDR1 = 0; 
@@ -431,6 +442,9 @@ void __init htab_initialize(void)
                /* Initialize the HPT with no entries */
                memset((void *)table, 0, htab_size_bytes);
+                /* Set SDR1 */
+                mtspr(SPRN_SDR1, _SDR1);
        }
        mode_rw = _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_COHERENT | PP_RWXX;
@@ -500,6 +514,12 @@ void __init htab_initialize(void)
 #undef KB
 #undef MB
+void __init htab_initialize_secondary(void)
+{
+        if (!platform_is_lpar())
+                mtspr(SPRN_SDR1, _SDR1);
+}
 /*
 * Called by asm hashtable.S for doing lazy icache flush
 */
diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
index 4612a79dfb6e..7d4b8b5f0606 100644
--- a/arch/powerpc/mm/init_32.c
+++ b/arch/powerpc/mm/init_32.c
@@ -84,9 +84,6 @@ void MMU_init(void);
 /* XXX should be in current.h  -- paulus */
 extern struct task_struct *current_set[NR_CPUS];
-char *klimit = _end;
-struct device_node *memory_node;
 extern int init_bootmem_done;
 /*
diff --git a/arch/powerpc/mm/init_64.c b/arch/powerpc/mm/init_64.c
index ce974c83d88a..1134f70f231d 100644
--- a/arch/powerpc/mm/init_64.c
+++ b/arch/powerpc/mm/init_64.c
@@ -20,6 +20,8 @@
 *
 */
+#undef DEBUG
 #include <linux/config.h>
 #include <linux/signal.h>
 #include <linux/sched.h>
@@ -64,6 +66,12 @@
 #include <asm/vdso.h>
 #include <asm/imalloc.h>
+#ifdef DEBUG
+#define DBG(fmt...) printk(fmt)
+#else
+#define DBG(fmt...)
+#endif
 #if PGTABLE_RANGE > USER_VSID_RANGE
 #warning Limited user VSID range means pagetable space is wasted
 #endif
@@ -72,8 +80,6 @@
 #warning TASK_SIZE is smaller than it needs to be.
 #endif
-unsigned long klimit = (unsigned long)_end;
 /* max amount of RAM to use */
 unsigned long __max_memory;
@@ -188,14 +194,14 @@ static void zero_ctor(void *addr, kmem_cache_t *cache, unsigned long flags)
 }
 #ifdef CONFIG_PPC_64K_PAGES
-static const int pgtable_cache_size[2] = {
+static const unsigned int pgtable_cache_size[3] = {
-        PTE_TABLE_SIZE, PGD_TABLE_SIZE
+        PTE_TABLE_SIZE, PMD_TABLE_SIZE, PGD_TABLE_SIZE
 };
 static const char *pgtable_cache_name[ARRAY_SIZE(pgtable_cache_size)] = {
-        "pte_pmd_cache", "pgd_cache",
+        "pte_pmd_cache", "pmd_cache", "pgd_cache",
 };
 #else
-static const int pgtable_cache_size[2] = {
+static const unsigned int pgtable_cache_size[2] = {
        PTE_TABLE_SIZE, PMD_TABLE_SIZE
 };
 static const char *pgtable_cache_name[ARRAY_SIZE(pgtable_cache_size)] = {
@@ -213,6 +219,8 @@ void pgtable_cache_init(void)
                int size = pgtable_cache_size[i];
                const char *name = pgtable_cache_name[i];
+                DBG("Allocating page table cache %s (#%d) "
+                    "for size: %08x...\n", name, i, size);
                pgtable_cache[i] = kmem_cache_create(name,
                                                     size, size,
                                                     SLAB_HWCACHE_ALIGN |
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index 6f55efd9be95..e2c95fcb8055 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -46,9 +46,7 @@
 #include <asm/prom.h>
 #include <asm/lmb.h>
 #include <asm/sections.h>
-#ifdef CONFIG_PPC64
 #include <asm/vdso.h>
-#endif
 #include "mmu_decl.h"
@@ -110,6 +108,7 @@ EXPORT_SYMBOL(phys_mem_access_prot);
 void online_page(struct page *page)
 {
        ClearPageReserved(page);
+        set_page_count(page, 0);
        free_cold_page(page);
        totalram_pages++;
        num_physpages++;
@@ -127,6 +126,9 @@ int __devinit add_memory(u64 start, u64 size)
        unsigned long start_pfn = start >> PAGE_SHIFT;
        unsigned long nr_pages = size >> PAGE_SHIFT;
+        start += KERNELBASE;
+        create_section_mapping(start, start + size);
        /* this should work for most non-highmem platforms */
        zone = pgdata->node_zones;
@@ -393,10 +395,8 @@ void __init mem_init(void)
        mem_init_done = 1;
-#ifdef CONFIG_PPC64
        /* Initialize the vDSO */
        vdso_init();
-#endif
 }
 /*
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index da09ba03c424..bd2cf1336885 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -17,9 +17,8 @@
 #include <linux/nodemask.h>
 #include <linux/cpu.h>
 #include <linux/notifier.h>
+#include <asm/sparsemem.h>
 #include <asm/lmb.h>
-#include <asm/machdep.h>
-#include <asm/abs_addr.h>
 #include <asm/system.h>
 #include <asm/smp.h>
@@ -28,45 +27,113 @@ static int numa_enabled = 1;
 static int numa_debug;
 #define dbg(args...) if (numa_debug) { printk(KERN_INFO args); }
-#ifdef DEBUG_NUMA
+int numa_cpu_lookup_table[NR_CPUS];
-#define ARRAY_INITIALISER -1
-#else
-#define ARRAY_INITIALISER 0
-#endif
-int numa_cpu_lookup_table[NR_CPUS] = { [ 0 ... (NR_CPUS - 1)] =
-        ARRAY_INITIALISER};
-char *numa_memory_lookup_table;
 cpumask_t numa_cpumask_lookup_table[MAX_NUMNODES];
-int nr_cpus_in_node[MAX_NUMNODES] = { [0 ... (MAX_NUMNODES -1)] = 0};
 struct pglist_data *node_data[MAX_NUMNODES];
-bootmem_data_t __initdata plat_node_bdata[MAX_NUMNODES];
+EXPORT_SYMBOL(numa_cpu_lookup_table);
+EXPORT_SYMBOL(numa_cpumask_lookup_table);
+EXPORT_SYMBOL(node_data);
+static bootmem_data_t __initdata plat_node_bdata[MAX_NUMNODES];
 static int min_common_depth;
 /*
- * We need somewhere to store start/span for each node until we have
+ * We need somewhere to store start/end/node for each region until we have
 * allocated the real node_data structures.
 */
+#define MAX_REGIONS     (MAX_LMB_REGIONS*2)
 static struct {
-        unsigned long node_start_pfn;
+        unsigned long start_pfn;
-        unsigned long node_end_pfn;
+        unsigned long end_pfn;
-        unsigned long node_present_pages;
+        int nid;
-} init_node_data[MAX_NUMNODES] __initdata;
+} init_node_data[MAX_REGIONS] __initdata;
-EXPORT_SYMBOL(node_data);
+int __init early_pfn_to_nid(unsigned long pfn)
-EXPORT_SYMBOL(numa_cpu_lookup_table);
+{
-EXPORT_SYMBOL(numa_memory_lookup_table);
+        unsigned int i;
-EXPORT_SYMBOL(numa_cpumask_lookup_table);
-EXPORT_SYMBOL(nr_cpus_in_node);
+        for (i = 0; init_node_data[i].end_pfn; i++) {
+                unsigned long start_pfn = init_node_data[i].start_pfn;
+                unsigned long end_pfn = init_node_data[i].end_pfn;
+                if ((start_pfn <= pfn) && (pfn < end_pfn))
+                        return init_node_data[i].nid;
+        }
+        return -1;
+}
+void __init add_region(unsigned int nid, unsigned long start_pfn,
+                       unsigned long pages)
+{
+        unsigned int i;
+        dbg("add_region nid %d start_pfn 0x%lx pages 0x%lx\n",
+                nid, start_pfn, pages);
+        for (i = 0; init_node_data[i].end_pfn; i++) {
+                if (init_node_data[i].nid != nid)
+                        continue;
+                if (init_node_data[i].end_pfn == start_pfn) {
+                        init_node_data[i].end_pfn += pages;
+                        return;
+                }
+                if (init_node_data[i].start_pfn == (start_pfn + pages)) {
+                        init_node_data[i].start_pfn -= pages;
+                        return;
+                }
+        }
+        /*
+         * Leave last entry NULL so we dont iterate off the end (we use
+         * entry.end_pfn to terminate the walk).
+         */
+        if (i >= (MAX_REGIONS - 1)) {
+                printk(KERN_ERR "WARNING: too many memory regions in "
+                                "numa code, truncating\n");
+                return;
+        }
+        init_node_data[i].start_pfn = start_pfn;
+        init_node_data[i].end_pfn = start_pfn + pages;
+        init_node_data[i].nid = nid;
+}
+/* We assume init_node_data has no overlapping regions */
+void __init get_region(unsigned int nid, unsigned long *start_pfn,
+                       unsigned long *end_pfn, unsigned long *pages_present)
+{
+        unsigned int i;
+        *start_pfn = -1UL;
+        *end_pfn = *pages_present = 0;
+        for (i = 0; init_node_data[i].end_pfn; i++) {
+                if (init_node_data[i].nid != nid)
+                        continue;
+                *pages_present += init_node_data[i].end_pfn -
+                        init_node_data[i].start_pfn;
+                if (init_node_data[i].start_pfn < *start_pfn)
+                        *start_pfn = init_node_data[i].start_pfn;
+                if (init_node_data[i].end_pfn > *end_pfn)
+                        *end_pfn = init_node_data[i].end_pfn;
+        }
+        /* We didnt find a matching region, return start/end as 0 */
+        if (*start_pfn == -1UL)
+                start_pfn = 0;
+}
 static inline void map_cpu_to_node(int cpu, int node)
 {
        numa_cpu_lookup_table[cpu] = node;
-        if (!(cpu_isset(cpu, numa_cpumask_lookup_table[node]))) {
+        if (!(cpu_isset(cpu, numa_cpumask_lookup_table[node])))
                cpu_set(cpu, numa_cpumask_lookup_table[node]);
-                nr_cpus_in_node[node]++;
-        }
 }
 #ifdef CONFIG_HOTPLUG_CPU
@@ -78,7 +145,6 @@ static void unmap_cpu_from_node(unsigned long cpu)
        if (cpu_isset(cpu, numa_cpumask_lookup_table[node])) {
                cpu_clear(cpu, numa_cpumask_lookup_table[node]);
-                nr_cpus_in_node[node]--;
        } else {
                printk(KERN_ERR "WARNING: cpu %lu not found in node %d\n",
                       cpu, node);
@@ -86,7 +152,7 @@ static void unmap_cpu_from_node(unsigned long cpu)
 }
 #endif /* CONFIG_HOTPLUG_CPU */
-static struct device_node * __devinit find_cpu_node(unsigned int cpu)
+static struct device_node *find_cpu_node(unsigned int cpu)
 {
        unsigned int hw_cpuid = get_hard_smp_processor_id(cpu);
        struct device_node *cpu_node = NULL;
@@ -213,7 +279,7 @@ static int __init get_mem_size_cells(void)
        return rc;
 }
-static unsigned long read_n_cells(int n, unsigned int **buf)
+static unsigned long __init read_n_cells(int n, unsigned int **buf)
 {
        unsigned long result = 0;
@@ -295,7 +361,8 @@ static int cpu_numa_callback(struct notifier_block *nfb,
 * or zero. If the returned value of size is 0 the region should be
 * discarded as it lies wholy above the memory limit.
 */
-static unsigned long __init numa_enforce_memory_limit(unsigned long start, unsigned long size)
+static unsigned long __init numa_enforce_memory_limit(unsigned long start,
+                                                      unsigned long size)
 {
        /*
         * We use lmb_end_of_DRAM() in here instead of memory_limit because
@@ -320,8 +387,7 @@ static int __init parse_numa_properties(void)
        struct device_node *cpu = NULL;
        struct device_node *memory = NULL;
        int addr_cells, size_cells;
-        int max_domain = 0;
+        int max_domain;
-        long entries = lmb_end_of_DRAM() >> MEMORY_INCREMENT_SHIFT;
        unsigned long i;
        if (numa_enabled == 0) {
@@ -329,13 +395,6 @@ static int __init parse_numa_properties(void)
                return -1;
        }
-        numa_memory_lookup_table =
-                (char *)abs_to_virt(lmb_alloc(entries * sizeof(char), 1));
-        memset(numa_memory_lookup_table, 0, entries * sizeof(char));
-        for (i = 0; i < entries ; i++)
-                numa_memory_lookup_table[i] = ARRAY_INITIALISER;
        min_common_depth = find_min_common_depth();
        dbg("NUMA associativity depth for CPU/Memory: %d\n", min_common_depth);
@@ -387,9 +446,6 @@ new_range:
                start = read_n_cells(addr_cells, &memcell_buf);
                size = read_n_cells(size_cells, &memcell_buf);
-                start = _ALIGN_DOWN(start, MEMORY_INCREMENT);
-                size = _ALIGN_UP(size, MEMORY_INCREMENT);
                numa_domain = of_node_numa_domain(memory);
                if (numa_domain >= MAX_NUMNODES) {
@@ -403,44 +459,15 @@ new_range:
                if (max_domain < numa_domain)
                        max_domain = numa_domain;
-                if (! (size = numa_enforce_memory_limit(start, size))) {
+                if (!(size = numa_enforce_memory_limit(start, size))) {
                        if (--ranges)
                                goto new_range;
                        else
                                continue;
                }
-                /*
+                add_region(numa_domain, start >> PAGE_SHIFT,
-                 * Initialize new node struct, or add to an existing one.
+                           size >> PAGE_SHIFT);
-                 */
-                if (init_node_data[numa_domain].node_end_pfn) {
-                        if ((start / PAGE_SIZE) <
-                            init_node_data[numa_domain].node_start_pfn)
-                                init_node_data[numa_domain].node_start_pfn =
-                                        start / PAGE_SIZE;
-                        if (((start / PAGE_SIZE) + (size / PAGE_SIZE)) >
-                            init_node_data[numa_domain].node_end_pfn)
-                                init_node_data[numa_domain].node_end_pfn =
-                                        (start / PAGE_SIZE) +
-                                        (size / PAGE_SIZE);
-                        init_node_data[numa_domain].node_present_pages +=
-                                size / PAGE_SIZE;
-                } else {
-                        node_set_online(numa_domain);
-                        init_node_data[numa_domain].node_start_pfn =
-                                start / PAGE_SIZE;
-                        init_node_data[numa_domain].node_end_pfn =
-                                init_node_data[numa_domain].node_start_pfn +
-                                size / PAGE_SIZE;
-                        init_node_data[numa_domain].node_present_pages =
-                                size / PAGE_SIZE;
-                }
-                for (i = start ; i < (start+size); i += MEMORY_INCREMENT)
-                        numa_memory_lookup_table[i >> MEMORY_INCREMENT_SHIFT] =
-                                numa_domain;
                if (--ranges)
                        goto new_range;
@@ -456,32 +483,15 @@ static void __init setup_nonnuma(void)
 {
        unsigned long top_of_ram = lmb_end_of_DRAM();
        unsigned long total_ram = lmb_phys_mem_size();
-        unsigned long i;
        printk(KERN_INFO "Top of RAM: 0x%lx, Total RAM: 0x%lx\n",
               top_of_ram, total_ram);
        printk(KERN_INFO "Memory hole size: %ldMB\n",
               (top_of_ram - total_ram) >> 20);
-        if (!numa_memory_lookup_table) {
-                long entries = top_of_ram >> MEMORY_INCREMENT_SHIFT;
-                numa_memory_lookup_table =
-                        (char *)abs_to_virt(lmb_alloc(entries * sizeof(char), 1));
-                memset(numa_memory_lookup_table, 0, entries * sizeof(char));
-                for (i = 0; i < entries ; i++)
-                        numa_memory_lookup_table[i] = ARRAY_INITIALISER;
-        }
        map_cpu_to_node(boot_cpuid, 0);
+        add_region(0, 0, lmb_end_of_DRAM() >> PAGE_SHIFT);
        node_set_online(0);
-        init_node_data[0].node_start_pfn = 0;
-        init_node_data[0].node_end_pfn = lmb_end_of_DRAM() / PAGE_SIZE;
-        init_node_data[0].node_present_pages = total_ram / PAGE_SIZE;
-        for (i = 0 ; i < top_of_ram; i += MEMORY_INCREMENT)
-                numa_memory_lookup_table[i >> MEMORY_INCREMENT_SHIFT] = 0;
 }
 static void __init dump_numa_topology(void)
@@ -499,8 +509,9 @@ static void __init dump_numa_topology(void)
                count = 0;
-                for (i = 0; i < lmb_end_of_DRAM(); i += MEMORY_INCREMENT) {
+                for (i = 0; i < lmb_end_of_DRAM();
-                        if (numa_memory_lookup_table[i >> MEMORY_INCREMENT_SHIFT] == node) {
+                     i += (1 << SECTION_SIZE_BITS)) {
+                        if (early_pfn_to_nid(i >> PAGE_SHIFT) == node) {
                                if (count == 0)
                                        printk(" 0x%lx", i);
                                ++count;
@@ -525,10 +536,12 @@ static void __init dump_numa_topology(void)
 *
 * Returns the physical address of the memory.
 */
-static unsigned long careful_allocation(int nid, unsigned long size,
+static void __init *careful_allocation(int nid, unsigned long size,
-                                        unsigned long align, unsigned long end)
+                                       unsigned long align,
+                                       unsigned long end_pfn)
 {
-        unsigned long ret = lmb_alloc_base(size, align, end);
+        int new_nid;
+        unsigned long ret = lmb_alloc_base(size, align, end_pfn << PAGE_SHIFT);
        /* retry over all memory */
        if (!ret)
@@ -542,28 +555,27 @@ static unsigned long careful_allocation(int nid, unsigned long size,
         * If the memory came from a previously allocated node, we must
         * retry with the bootmem allocator.
         */
-        if (pa_to_nid(ret) < nid) {
+        new_nid = early_pfn_to_nid(ret >> PAGE_SHIFT);
-                nid = pa_to_nid(ret);
+        if (new_nid < nid) {
-                ret = (unsigned long)__alloc_bootmem_node(NODE_DATA(nid),
+                ret = (unsigned long)__alloc_bootmem_node(NODE_DATA(new_nid),
                                size, align, 0);
                if (!ret)
                        panic("numa.c: cannot allocate %lu bytes on node %d",
-                              size, nid);
+                              size, new_nid);
-                ret = virt_to_abs(ret);
+                ret = __pa(ret);
                dbg("alloc_bootmem %lx %lx\n", ret, size);
        }
-        return ret;
+        return (void *)ret;
 }
 void __init do_init_bootmem(void)
 {
        int nid;
-        int addr_cells, size_cells;
+        unsigned int i;
-        struct device_node *memory = NULL;
        static struct notifier_block ppc64_numa_nb = {
                .notifier_call = cpu_numa_callback,
                .priority = 1 /* Must run before sched domains notifier. */
@@ -581,99 +593,66 @@ void __init do_init_bootmem(void)
        register_cpu_notifier(&ppc64_numa_nb);
        for_each_online_node(nid) {
-                unsigned long start_paddr, end_paddr;
+                unsigned long start_pfn, end_pfn, pages_present;
-                int i;
                unsigned long bootmem_paddr;
                unsigned long bootmap_pages;
-                start_paddr = init_node_data[nid].node_start_pfn * PAGE_SIZE;
+                get_region(nid, &start_pfn, &end_pfn, &pages_present);
-                end_paddr = init_node_data[nid].node_end_pfn * PAGE_SIZE;
                /* Allocate the node structure node local if possible */
-                NODE_DATA(nid) = (struct pglist_data *)careful_allocation(nid,
+                NODE_DATA(nid) = careful_allocation(nid,
                                        sizeof(struct pglist_data),
-                                        SMP_CACHE_BYTES, end_paddr);
+                                        SMP_CACHE_BYTES, end_pfn);
-                NODE_DATA(nid) = abs_to_virt(NODE_DATA(nid));
+                NODE_DATA(nid) = __va(NODE_DATA(nid));
                memset(NODE_DATA(nid), 0, sizeof(struct pglist_data));
                dbg("node %d\n", nid);
                dbg("NODE_DATA() = %p\n", NODE_DATA(nid));
                NODE_DATA(nid)->bdata = &plat_node_bdata[nid];
-                NODE_DATA(nid)->node_start_pfn =
+                NODE_DATA(nid)->node_start_pfn = start_pfn;
-                        init_node_data[nid].node_start_pfn;
+                NODE_DATA(nid)->node_spanned_pages = end_pfn - start_pfn;
-                NODE_DATA(nid)->node_spanned_pages =
-                        end_paddr - start_paddr;
                if (NODE_DATA(nid)->node_spanned_pages == 0)
                        continue;
-                dbg("start_paddr = %lx\n", start_paddr);
+                dbg("start_paddr = %lx\n", start_pfn << PAGE_SHIFT);
-                dbg("end_paddr = %lx\n", end_paddr);
+                dbg("end_paddr = %lx\n", end_pfn << PAGE_SHIFT);
-                bootmap_pages = bootmem_bootmap_pages((end_paddr - start_paddr) >> PAGE_SHIFT);
+                bootmap_pages = bootmem_bootmap_pages(end_pfn - start_pfn);
+                bootmem_paddr = (unsigned long)careful_allocation(nid,
+                                        bootmap_pages << PAGE_SHIFT,
+                                        PAGE_SIZE, end_pfn);
+                memset(__va(bootmem_paddr), 0, bootmap_pages << PAGE_SHIFT);
-                bootmem_paddr = careful_allocation(nid,
-                                bootmap_pages << PAGE_SHIFT,
-                                PAGE_SIZE, end_paddr);
-                memset(abs_to_virt(bootmem_paddr), 0,
-                       bootmap_pages << PAGE_SHIFT);
                dbg("bootmap_paddr = %lx\n", bootmem_paddr);
                init_bootmem_node(NODE_DATA(nid), bootmem_paddr >> PAGE_SHIFT,
-                                  start_paddr >> PAGE_SHIFT,
+                                  start_pfn, end_pfn);
-                                  end_paddr >> PAGE_SHIFT);
-                /*
+                /* Add free regions on this node */
-                 * We need to do another scan of all memory sections to
+                for (i = 0; init_node_data[i].end_pfn; i++) {
-                 * associate memory with the correct node.
+                        unsigned long start, end;
-                 */
-                addr_cells = get_mem_addr_cells();
-                size_cells = get_mem_size_cells();
-                memory = NULL;
-                while ((memory = of_find_node_by_type(memory, "memory")) != NULL) {
-                        unsigned long mem_start, mem_size;
-                        int numa_domain, ranges;
-                        unsigned int *memcell_buf;
-                        unsigned int len;
-                        memcell_buf = (unsigned int *)get_property(memory, "reg", &len);
-                        if (!memcell_buf || len <= 0)
-                                continue;
-                        ranges = memory->n_addrs;       /* ranges in cell */
+                        if (init_node_data[i].nid != nid)
-new_range:
-                        mem_start = read_n_cells(addr_cells, &memcell_buf);
-                        mem_size = read_n_cells(size_cells, &memcell_buf);
-                        if (numa_enabled) {
-                                numa_domain = of_node_numa_domain(memory);
-                                if (numa_domain  >= MAX_NUMNODES)
-                                        numa_domain = 0;
-                        } else
-                                numa_domain =  0;
-                        if (numa_domain != nid)
                                continue;
-                        mem_size = numa_enforce_memory_limit(mem_start, mem_size);
+                        start = init_node_data[i].start_pfn << PAGE_SHIFT;
-                        if (mem_size) {
+                        end = init_node_data[i].end_pfn << PAGE_SHIFT;
-                                dbg("free_bootmem %lx %lx\n", mem_start, mem_size);
-                                free_bootmem_node(NODE_DATA(nid), mem_start, mem_size);
-                        }
-                        if (--ranges)           /* process all ranges in cell */
+                        dbg("free_bootmem %lx %lx\n", start, end - start);
-                                goto new_range;
+                        free_bootmem_node(NODE_DATA(nid), start, end - start);
                }
-                /*
+                /* Mark reserved regions on this node */
-                 * Mark reserved regions on this node
-                 */
                for (i = 0; i < lmb.reserved.cnt; i++) {
                        unsigned long physbase = lmb.reserved.region[i].base;
                        unsigned long size = lmb.reserved.region[i].size;
+                        unsigned long start_paddr = start_pfn << PAGE_SHIFT;
+                        unsigned long end_paddr = end_pfn << PAGE_SHIFT;
-                        if (pa_to_nid(physbase) != nid &&
+                        if (early_pfn_to_nid(physbase >> PAGE_SHIFT) != nid &&
-                            pa_to_nid(physbase+size-1) != nid)
+                            early_pfn_to_nid((physbase+size-1) >> PAGE_SHIFT) != nid)
                                continue;
                        if (physbase < end_paddr &&
@@ -693,46 +672,19 @@ new_range:
                                                     size);
                        }
                }
-                /*
-                 * This loop may look famaliar, but we have to do it again
-                 * after marking our reserved memory to mark memory present
-                 * for sparsemem.
-                 */
-                addr_cells = get_mem_addr_cells();
-                size_cells = get_mem_size_cells();
-                memory = NULL;
-                while ((memory = of_find_node_by_type(memory, "memory")) != NULL) {
-                        unsigned long mem_start, mem_size;
-                        int numa_domain, ranges;
-                        unsigned int *memcell_buf;
-                        unsigned int len;
-                        memcell_buf = (unsigned int *)get_property(memory, "reg", &len);
-                        if (!memcell_buf || len <= 0)
-                                continue;
-                        ranges = memory->n_addrs;       /* ranges in cell */
+                /* Add regions into sparsemem */
-new_range2:
+                for (i = 0; init_node_data[i].end_pfn; i++) {
-                        mem_start = read_n_cells(addr_cells, &memcell_buf);
+                        unsigned long start, end;
-                        mem_size = read_n_cells(size_cells, &memcell_buf);
-                        if (numa_enabled) {
+                        if (init_node_data[i].nid != nid)
-                                numa_domain = of_node_numa_domain(memory);
-                                if (numa_domain  >= MAX_NUMNODES)
-                                        numa_domain = 0;
-                        } else
-                                numa_domain =  0;
-                        if (numa_domain != nid)
                                continue;
-                        mem_size = numa_enforce_memory_limit(mem_start, mem_size);
+                        start = init_node_data[i].start_pfn;
-                        memory_present(numa_domain, mem_start >> PAGE_SHIFT,
+                        end = init_node_data[i].end_pfn;
-                                       (mem_start + mem_size) >> PAGE_SHIFT);
-                        if (--ranges)           /* process all ranges in cell */
+                        memory_present(nid, start, end);
-                                goto new_range2;
                }
        }
 }
@@ -746,21 +698,18 @@ void __init paging_init(void)
        memset(zholes_size, 0, sizeof(zholes_size));
        for_each_online_node(nid) {
-                unsigned long start_pfn;
+                unsigned long start_pfn, end_pfn, pages_present;
-                unsigned long end_pfn;
-                start_pfn = init_node_data[nid].node_start_pfn;
+                get_region(nid, &start_pfn, &end_pfn, &pages_present);
-                end_pfn = init_node_data[nid].node_end_pfn;
                zones_size[ZONE_DMA] = end_pfn - start_pfn;
-                zholes_size[ZONE_DMA] = zones_size[ZONE_DMA] -
+                zholes_size[ZONE_DMA] = zones_size[ZONE_DMA] - pages_present;
-                        init_node_data[nid].node_present_pages;
                dbg("free_area_init node %d %lx %lx (hole: %lx)\n", nid,
                    zones_size[ZONE_DMA], start_pfn, zholes_size[ZONE_DMA]);
-                free_area_init_node(nid, NODE_DATA(nid), zones_size,
+                free_area_init_node(nid, NODE_DATA(nid), zones_size, start_pfn,
-                                                        start_pfn, zholes_size);
+                                    zholes_size);
        }
 }
diff --git a/arch/powerpc/mm/pgtable_64.c b/arch/powerpc/mm/pgtable_64.c
index 900842451bd3..c7f7bb6f30b3 100644
--- a/arch/powerpc/mm/pgtable_64.c
+++ b/arch/powerpc/mm/pgtable_64.c
@@ -122,8 +122,11 @@ static int map_io_page(unsigned long ea, unsigned long pa, int flags)
                 *
                 */
                if (htab_bolt_mapping(ea, ea + PAGE_SIZE, pa, flags,
-                                      mmu_virtual_psize))
+                                      mmu_virtual_psize)) {
-                        panic("Can't map bolted IO mapping");
+                        printk(KERN_ERR "Failed to do bolted mapping IO "
+                               "memory at %016lx !\n", pa);
+                        return -ENOMEM;
+                }
        }
        return 0;
 }
diff --git a/arch/powerpc/mm/stab.c b/arch/powerpc/mm/stab.c
index fa325dbf98fc..cfbb4e1f966b 100644
--- a/arch/powerpc/mm/stab.c
+++ b/arch/powerpc/mm/stab.c
@@ -20,6 +20,7 @@
 #include <asm/cputable.h>
 #include <asm/lmb.h>
 #include <asm/abs_addr.h>
+#include <asm/firmware.h>
 struct stab_entry {
        unsigned long esid_data;
@@ -256,7 +257,7 @@ void stabs_alloc(void)
                paca[cpu].stab_addr = newstab;
                paca[cpu].stab_real = virt_to_abs(newstab);
-                printk(KERN_DEBUG "Segment table for CPU %d at 0x%lx "
+                printk(KERN_INFO "Segment table for CPU %d at 0x%lx "
                       "virtual, 0x%lx absolute\n",
                       cpu, paca[cpu].stab_addr, paca[cpu].stab_real);
        }
@@ -270,10 +271,28 @@ void stabs_alloc(void)
 void stab_initialize(unsigned long stab)
 {
        unsigned long vsid = get_kernel_vsid(KERNELBASE);
+        unsigned long stabreal;
        asm volatile("isync; slbia; isync":::"memory");
        make_ste(stab, GET_ESID(KERNELBASE), vsid);
        /* Order update */
        asm volatile("sync":::"memory");
+        /* Set ASR */
+        stabreal = get_paca()->stab_real | 0x1ul;
+#ifdef CONFIG_PPC_ISERIES
+        if (firmware_has_feature(FW_FEATURE_ISERIES)) {
+                HvCall1(HvCallBaseSetASR, stabreal);
+                return;
+        }
+#endif /* CONFIG_PPC_ISERIES */
+#ifdef CONFIG_PPC_PSERIES
+        if (platform_is_lpar()) {
+                plpar_hcall_norets(H_SET_ASR, stabreal);
+                return;
+        }
+#endif
+        mtspr(SPRN_ASR, stabreal);
 }
diff --git a/arch/powerpc/oprofile/op_model_power4.c b/arch/powerpc/oprofile/op_model_power4.c
index c4ee5478427b..a3401b46f3ba 100644
--- a/arch/powerpc/oprofile/op_model_power4.c
+++ b/arch/powerpc/oprofile/op_model_power4.c
@@ -14,7 +14,6 @@
 #include <asm/system.h>
 #include <asm/processor.h>
 #include <asm/cputable.h>
-#include <asm/systemcfg.h>
 #include <asm/rtas.h>
 #include <asm/oprofile_impl.h>
 #include <asm/reg.h>
@@ -233,8 +232,7 @@ static unsigned long get_pc(struct pt_regs *regs)
        mmcra = mfspr(SPRN_MMCRA);
        /* Were we in the hypervisor? */
-        if ((systemcfg->platform == PLATFORM_PSERIES_LPAR) &&
+        if (platform_is_lpar() && (mmcra & MMCRA_SIHV))
-            (mmcra & MMCRA_SIHV))
                /* function descriptor madness */
                return *((unsigned long *)hypervisor_bucket);
diff --git a/arch/powerpc/platforms/chrp/setup.c b/arch/powerpc/platforms/chrp/setup.c
index ecd32d5d85f4..4099ddab9205 100644
--- a/arch/powerpc/platforms/chrp/setup.c
+++ b/arch/powerpc/platforms/chrp/setup.c
@@ -361,7 +361,9 @@ static void __init chrp_find_openpic(void)
        printk(KERN_INFO "OpenPIC at %lx\n", opaddr);
        irq_count = NR_IRQS - NUM_ISA_INTERRUPTS - 4; /* leave room for IPIs */
-        prom_get_irq_senses(init_senses, NUM_8259_INTERRUPTS, NR_IRQS - 4);
+        prom_get_irq_senses(init_senses, NUM_ISA_INTERRUPTS, NR_IRQS - 4);
+        /* i8259 cascade is always positive level */
+        init_senses[0] = IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE;
        iranges = (unsigned int *) get_property(np, "interrupt-ranges", &len);
        if (iranges == NULL)
diff --git a/arch/powerpc/platforms/iseries/irq.c b/arch/powerpc/platforms/iseries/irq.c
index a06603d84a45..01090e9ce0cf 100644
--- a/arch/powerpc/platforms/iseries/irq.c
+++ b/arch/powerpc/platforms/iseries/irq.c
@@ -103,6 +103,9 @@ static void intReceived(struct XmPciLpEvent *eventParm,
                struct pt_regs *regsParm)
 {
        int irq;
+#ifdef CONFIG_IRQSTACKS
+        struct thread_info *curtp, *irqtp;
+#endif
        ++Pci_Interrupt_Count;
@@ -110,7 +113,20 @@ static void intReceived(struct XmPciLpEvent *eventParm,
        case XmPciLpEvent_SlotInterrupt:
                irq = eventParm->hvLpEvent.xCorrelationToken;
                /* Dispatch the interrupt handlers for this irq */
-                ppc_irq_dispatch_handler(regsParm, irq);
+#ifdef CONFIG_IRQSTACKS
+                /* Switch to the irq stack to handle this */
+                curtp = current_thread_info();
+                irqtp = hardirq_ctx[smp_processor_id()];
+                if (curtp != irqtp) {
+                        irqtp->task = curtp->task;
+                        irqtp->flags = 0;
+                        call___do_IRQ(irq, regsParm, irqtp);
+                        irqtp->task = NULL;
+                        if (irqtp->flags)
+                                set_bits(irqtp->flags, &curtp->flags);
+                } else
+#endif
+                        __do_IRQ(irq, regsParm);
                HvCallPci_eoi(eventParm->eventData.slotInterrupt.busNumber,
                        eventParm->eventData.slotInterrupt.subBusNumber,
                        eventParm->eventData.slotInterrupt.deviceId);
@@ -310,10 +326,8 @@ static void iSeries_disable_IRQ(unsigned int irq)
 }
 /*
- * Need to define this so ppc_irq_dispatch_handler will NOT call
+ * This does nothing because there is not enough information
- * enable_IRQ at the end of interrupt handling.  However, this does
+ * provided to do the EOI HvCall.  This is done by XmPciLpEvent.c
- * nothing because there is not enough information provided to do
- * the EOI HvCall.  This is done by XmPciLpEvent.c
 */
 static void iSeries_end_IRQ(unsigned int irq)
 {
diff --git a/arch/powerpc/platforms/iseries/misc.S b/arch/powerpc/platforms/iseries/misc.S
index 09f14522e176..dfe7aa1ba098 100644
--- a/arch/powerpc/platforms/iseries/misc.S
+++ b/arch/powerpc/platforms/iseries/misc.S
@@ -15,6 +15,7 @@
 #include <asm/processor.h>
 #include <asm/asm-offsets.h>
+#include <asm/ppc_asm.h>
        .text
diff --git a/arch/powerpc/platforms/iseries/setup.c b/arch/powerpc/platforms/iseries/setup.c
index d3e4bf756c83..6a29f301436b 100644
--- a/arch/powerpc/platforms/iseries/setup.c
+++ b/arch/powerpc/platforms/iseries/setup.c
@@ -39,7 +39,8 @@
 #include <asm/sections.h>
 #include <asm/iommu.h>
 #include <asm/firmware.h>
+#include <asm/systemcfg.h>
+#include <asm/system.h>
 #include <asm/time.h>
 #include <asm/paca.h>
 #include <asm/cache.h>
@@ -71,7 +72,7 @@ extern void hvlog(char *fmt, ...);
 #endif
 /* Function Prototypes */
-static void build_iSeries_Memory_Map(void);
+static unsigned long build_iSeries_Memory_Map(void);
 static void iseries_shared_idle(void);
 static void iseries_dedicated_idle(void);
 #ifdef CONFIG_PCI
@@ -84,7 +85,6 @@ static void iSeries_pci_final_fixup(void) { }
 int piranha_simulator;
 extern int rd_size;             /* Defined in drivers/block/rd.c */
-extern unsigned long klimit;
 extern unsigned long embedded_sysmap_start;
 extern unsigned long embedded_sysmap_end;
@@ -403,9 +403,11 @@ void mschunks_alloc(unsigned long num_chunks)
 * a table used to translate Linux's physical addresses to these
 * absolute addresses.  Absolute addresses are needed when
 * communicating with the hypervisor (e.g. to build HPT entries)
+ *
+ * Returns the physical memory size
 */
-static void __init build_iSeries_Memory_Map(void)
+static unsigned long __init build_iSeries_Memory_Map(void)
 {
        u32 loadAreaFirstChunk, loadAreaLastChunk, loadAreaSize;
        u32 nextPhysChunk;
@@ -538,7 +540,7 @@ static void __init build_iSeries_Memory_Map(void)
         * which should be equal to
         *   nextPhysChunk
         */
-        systemcfg->physicalMemorySize = chunk_to_addr(nextPhysChunk);
+        return chunk_to_addr(nextPhysChunk);
 }
 /*
@@ -564,8 +566,8 @@ static void __init iSeries_setup_arch(void)
        printk("Max physical processors = %d\n",
                        itVpdAreas.xSlicMaxPhysicalProcs);
-        systemcfg->processor = xIoHriProcessorVpd[procIx].xPVR;
+        _systemcfg->processor = xIoHriProcessorVpd[procIx].xPVR;
-        printk("Processor version = %x\n", systemcfg->processor);
+        printk("Processor version = %x\n", _systemcfg->processor);
 }
 static void iSeries_show_cpuinfo(struct seq_file *m)
@@ -694,20 +696,18 @@ static void iseries_shared_idle(void)
                if (hvlpevent_is_pending())
                        process_iSeries_events();
+                preempt_enable_no_resched();
                schedule();
+                preempt_disable();
        }
 }
 static void iseries_dedicated_idle(void)
 {
-        long oldval;
+        set_thread_flag(TIF_POLLING_NRFLAG);
        while (1) {
-                oldval = test_and_clear_thread_flag(TIF_NEED_RESCHED);
+                if (!need_resched()) {
-                if (!oldval) {
-                        set_thread_flag(TIF_POLLING_NRFLAG);
                        while (!need_resched()) {
                                ppc64_runlatch_off();
                                HMT_low();
@@ -720,13 +720,12 @@ static void iseries_dedicated_idle(void)
                        }
                        HMT_medium();
-                        clear_thread_flag(TIF_POLLING_NRFLAG);
-                } else {
-                        set_need_resched();
                }
                ppc64_runlatch_on();
+                preempt_enable_no_resched();
                schedule();
+                preempt_disable();
        }
 }
@@ -931,7 +930,7 @@ void dt_cpus(struct iseries_flat_dt *dt)
        dt_end_node(dt);
 }
-void build_flat_dt(struct iseries_flat_dt *dt)
+void build_flat_dt(struct iseries_flat_dt *dt, unsigned long phys_mem_size)
 {
        u64 tmp[2];
@@ -947,7 +946,7 @@ void build_flat_dt(struct iseries_flat_dt *dt)
        dt_prop_str(dt, "name", "memory");
        dt_prop_str(dt, "device_type", "memory");
        tmp[0] = 0;
-        tmp[1] = systemcfg->physicalMemorySize;
+        tmp[1] = phys_mem_size;
        dt_prop_u64_list(dt, "reg", tmp, 2);
        dt_end_node(dt);
@@ -967,13 +966,15 @@ void build_flat_dt(struct iseries_flat_dt *dt)
 void * __init iSeries_early_setup(void)
 {
+        unsigned long phys_mem_size;
        iSeries_fixup_klimit();
        /*
         * Initialize the table which translate Linux physical addresses to
         * AS/400 absolute addresses
         */
-        build_iSeries_Memory_Map();
+        phys_mem_size = build_iSeries_Memory_Map();
        iSeries_get_cmdline();
@@ -983,7 +984,7 @@ void * __init iSeries_early_setup(void)
        /* Parse early parameters, in particular mem=x */
        parse_early_param();
-        build_flat_dt(&iseries_dt);
+        build_flat_dt(&iseries_dt, phys_mem_size);
        return (void *) __pa(&iseries_dt);
 }
diff --git a/arch/powerpc/platforms/maple/pci.c b/arch/powerpc/platforms/maple/pci.c
index 340c21caeae2..895aeb3f75d0 100644
--- a/arch/powerpc/platforms/maple/pci.c
+++ b/arch/powerpc/platforms/maple/pci.c
@@ -380,9 +380,6 @@ void __init maple_pcibios_fixup(void)
        for_each_pci_dev(dev)
                pci_read_irq_line(dev);
-        /* Do the mapping of the IO space */
-        phbs_remap_io();
        DBG(" <- maple_pcibios_fixup\n");
 }
diff --git a/arch/powerpc/platforms/powermac/pci.c b/arch/powerpc/platforms/powermac/pci.c
index 8f818d092e2b..dfd41b9781a9 100644
--- a/arch/powerpc/platforms/powermac/pci.c
+++ b/arch/powerpc/platforms/powermac/pci.c
@@ -918,9 +918,6 @@ void __init pmac_pci_init(void)
                        PCI_DN(np)->busno = 0xf0;
        }
-        /* map in PCI I/O space */
-        phbs_remap_io();
        /* pmac_check_ht_link(); */
        /* Tell pci.c to not use the common resource allocation mechanism */
diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c
index 83a49e80ac29..90040c49494d 100644
--- a/arch/powerpc/platforms/powermac/pic.c
+++ b/arch/powerpc/platforms/powermac/pic.c
@@ -74,6 +74,9 @@ static DEFINE_SPINLOCK(pmac_pic_lock);
 #define GATWICK_IRQ_POOL_SIZE        10
 static struct interrupt_info gatwick_int_pool[GATWICK_IRQ_POOL_SIZE];
+#define NR_MASK_WORDS   ((NR_IRQS + 31) / 32)
+static unsigned long ppc_lost_interrupts[NR_MASK_WORDS];
 /*
 * Mark an irq as "lost".  This is only used on the pmac
 * since it can lose interrupts (see pmac_set_irq_mask).
diff --git a/arch/powerpc/platforms/powermac/smp.c b/arch/powerpc/platforms/powermac/smp.c
index e1f9443cc872..957b09103422 100644
--- a/arch/powerpc/platforms/powermac/smp.c
+++ b/arch/powerpc/platforms/powermac/smp.c
@@ -305,9 +305,19 @@ static int __init smp_psurge_probe(void)
        psurge_start = ioremap(PSURGE_START, 4);
        psurge_pri_intr = ioremap(PSURGE_PRI_INTR, 4);
-        /* this is not actually strictly necessary -- paulus. */
+        /*
-        for (i = 1; i < ncpus; ++i)
+         * This is necessary because OF doesn't know about the
-                smp_hw_index[i] = i;
+         * secondary cpu(s), and thus there aren't nodes in the
+         * device tree for them, and smp_setup_cpu_maps hasn't
+         * set their bits in cpu_possible_map and cpu_present_map.
+         */
+        if (ncpus > NR_CPUS)
+                ncpus = NR_CPUS;
+        for (i = 1; i < ncpus ; ++i) {
+                cpu_set(i, cpu_present_map);
+                cpu_set(i, cpu_possible_map);
+                set_hard_smp_processor_id(i, i);
+        }
        if (ppc_md.progress) ppc_md.progress("smp_psurge_probe - done", 0x352);
@@ -348,6 +358,7 @@ static void __init psurge_dual_sync_tb(int cpu_nr)
        int t;
        set_dec(tb_ticks_per_jiffy);
+        /* XXX fixme */
        set_tb(0, 0);
        last_jiffy_stamp(cpu_nr) = 0;
@@ -363,8 +374,6 @@ static void __init psurge_dual_sync_tb(int cpu_nr)
        /* now interrupt the secondary, starting both TBs */
        psurge_set_ipi(1);
-        smp_tb_synchronized = 1;
 }
 static struct irqaction psurge_irqaction = {
@@ -625,9 +634,8 @@ void smp_core99_give_timebase(void)
        for (t = 100000; t > 0 && sec_tb_reset; --t)
                udelay(10);
        if (sec_tb_reset)
+                /* XXX BUG_ON here? */
                printk(KERN_WARNING "Timeout waiting sync(2) on second CPU\n");
-        else
-                smp_tb_synchronized = 1;
        /* Now, restart the timebase by leaving the GPIO to an open collector */
        pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, core99_tb_gpio, 0);
@@ -810,19 +818,9 @@ static void __devinit smp_core99_setup_cpu(int cpu_nr)
 }
-/* Core99 Macs (dual G4s and G5s) */
-struct smp_ops_t core99_smp_ops = {
-        .message_pass   = smp_mpic_message_pass,
-        .probe          = smp_core99_probe,
-        .kick_cpu       = smp_core99_kick_cpu,
-        .setup_cpu      = smp_core99_setup_cpu,
-        .give_timebase  = smp_core99_give_timebase,
-        .take_timebase  = smp_core99_take_timebase,
-};
 #if defined(CONFIG_HOTPLUG_CPU) && defined(CONFIG_PPC32)
-int __cpu_disable(void)
+int smp_core99_cpu_disable(void)
 {
        cpu_clear(smp_processor_id(), cpu_online_map);
@@ -846,7 +844,7 @@ void cpu_die(void)
        low_cpu_die();
 }
-void __cpu_die(unsigned int cpu)
+void smp_core99_cpu_die(unsigned int cpu)
 {
        int timeout;
@@ -858,8 +856,21 @@ void __cpu_die(unsigned int cpu)
                }
                msleep(1);
        }
-        cpu_callin_map[cpu] = 0;
        cpu_dead[cpu] = 0;
 }
 #endif
+/* Core99 Macs (dual G4s and G5s) */
+struct smp_ops_t core99_smp_ops = {
+        .message_pass   = smp_mpic_message_pass,
+        .probe          = smp_core99_probe,
+        .kick_cpu       = smp_core99_kick_cpu,
+        .setup_cpu      = smp_core99_setup_cpu,
+        .give_timebase  = smp_core99_give_timebase,
+        .take_timebase  = smp_core99_take_timebase,
+#if defined(CONFIG_HOTPLUG_CPU) && defined(CONFIG_PPC32)
+        .cpu_disable    = smp_core99_cpu_disable,
+        .cpu_die        = smp_core99_cpu_die,
+#endif
+};
diff --git a/arch/powerpc/platforms/pseries/Makefile b/arch/powerpc/platforms/pseries/Makefile
index b9938fece781..e7ca5b1f591e 100644
--- a/arch/powerpc/platforms/pseries/Makefile
+++ b/arch/powerpc/platforms/pseries/Makefile
@@ -3,3 +3,5 @@ obj-y			:= pci.o lpar.o hvCall.o nvram.o reconfig.o \
 obj-$(CONFIG_SMP)       += smp.o
 obj-$(CONFIG_IBMVIO)    += vio.o
 obj-$(CONFIG_XICS)      += xics.o
+obj-$(CONFIG_SCANLOG)   += scanlog.o
+obj-$(CONFIG_EEH)    += eeh.o eeh_event.o
diff --git a/arch/ppc64/kernel/eeh.c b/arch/powerpc/platforms/pseries/eeh.c
index 035d1b14a207..79de2310e70b 100644
--- a/arch/ppc64/kernel/eeh.c
+++ b/arch/powerpc/platforms/pseries/eeh.c
@@ -1,39 +1,37 @@
 /*
 * eeh.c
 * Copyright (C) 2001 Dave Engebretsen & Todd Inglett IBM Corporation
- * 
+ *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
- * 
+ *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
- * 
+ *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 */
-#include <linux/bootmem.h>
+#include <linux/delay.h>
 #include <linux/init.h>
 #include <linux/list.h>
-#include <linux/mm.h>
-#include <linux/notifier.h>
 #include <linux/pci.h>
 #include <linux/proc_fs.h>
 #include <linux/rbtree.h>
 #include <linux/seq_file.h>
 #include <linux/spinlock.h>
+#include <asm/atomic.h>
 #include <asm/eeh.h>
+#include <asm/eeh_event.h>
 #include <asm/io.h>
 #include <asm/machdep.h>
-#include <asm/rtas.h>
-#include <asm/atomic.h>
-#include <asm/systemcfg.h>
 #include <asm/ppc-pci.h>
+#include <asm/rtas.h>
 #undef DEBUG
@@ -49,8 +47,8 @@
 *  were "empty": all reads return 0xff's and all writes are silently
 *  ignored.  EEH slot isolation events can be triggered by parity
 *  errors on the address or data busses (e.g. during posted writes),
- *  which in turn might be caused by dust, vibration, humidity,
+ *  which in turn might be caused by low voltage on the bus, dust,
- *  radioactivity or plain-old failed hardware.
+ *  vibration, humidity, radioactivity or plain-old failed hardware.
 *
 *  Note, however, that one of the leading causes of EEH slot
 *  freeze events are buggy device drivers, buggy device microcode,
@@ -71,26 +69,15 @@
 *  and sent out for processing.
 */
-/** Bus Unit ID macros; get low and hi 32-bits of the 64-bit BUID */
+/* If a device driver keeps reading an MMIO register in an interrupt
-#define BUID_HI(buid) ((buid) >> 32)
-#define BUID_LO(buid) ((buid) & 0xffffffff)
-/* EEH event workqueue setup. */
-static DEFINE_SPINLOCK(eeh_eventlist_lock);
-LIST_HEAD(eeh_eventlist);
-static void eeh_event_handler(void *);
-DECLARE_WORK(eeh_event_wq, eeh_event_handler, NULL);
-static struct notifier_block *eeh_notifier_chain;
-/*
- * If a device driver keeps reading an MMIO register in an interrupt
 * handler after a slot isolation event has occurred, we assume it
 * is broken and panic.  This sets the threshold for how many read
 * attempts we allow before panicking.
 */
-#define EEH_MAX_FAILS   1000
+#define EEH_MAX_FAILS   100000
-static atomic_t eeh_fail_count;
+/* Misc forward declaraions */
+static void eeh_save_bars(struct pci_dev * pdev, struct pci_dn *pdn);
 /* RTAS tokens */
 static int ibm_set_eeh_option;
@@ -101,12 +88,19 @@ static int ibm_slot_error_detail;
 static int eeh_subsystem_enabled;
+/* Lock to avoid races due to multiple reports of an error */
+static DEFINE_SPINLOCK(confirm_error_lock);
 /* Buffer for reporting slot-error-detail rtas calls */
 static unsigned char slot_errbuf[RTAS_ERROR_LOG_MAX];
 static DEFINE_SPINLOCK(slot_errbuf_lock);
 static int eeh_error_buf_size;
 /* System monitoring statistics */
+static DEFINE_PER_CPU(unsigned long, no_device);
+static DEFINE_PER_CPU(unsigned long, no_dn);
+static DEFINE_PER_CPU(unsigned long, no_cfg_addr);
+static DEFINE_PER_CPU(unsigned long, ignored_check);
 static DEFINE_PER_CPU(unsigned long, total_mmio_ffs);
 static DEFINE_PER_CPU(unsigned long, false_positives);
 static DEFINE_PER_CPU(unsigned long, ignored_failures);
@@ -224,9 +218,9 @@ pci_addr_cache_insert(struct pci_dev *dev, unsigned long alo,
        while (*p) {
                parent = *p;
                piar = rb_entry(parent, struct pci_io_addr_range, rb_node);
-                if (alo < piar->addr_lo) {
+                if (ahi < piar->addr_lo) {
                        p = &parent->rb_left;
-                } else if (ahi > piar->addr_hi) {
+                } else if (alo > piar->addr_hi) {
                        p = &parent->rb_right;
                } else {
                        if (dev != piar->pcidev ||
@@ -245,6 +239,11 @@ pci_addr_cache_insert(struct pci_dev *dev, unsigned long alo,
        piar->pcidev = dev;
        piar->flags = flags;
+#ifdef DEBUG
+        printk(KERN_DEBUG "PIAR: insert range=[%lx:%lx] dev=%s\n",
+                          alo, ahi, pci_name (dev));
+#endif
        rb_link_node(&piar->rb_node, parent, p);
        rb_insert_color(&piar->rb_node, &pci_io_addr_cache_root.rb_root);
@@ -260,18 +259,17 @@ static void __pci_addr_cache_insert_device(struct pci_dev *dev)
        dn = pci_device_to_OF_node(dev);
        if (!dn) {
-                printk(KERN_WARNING "PCI: no pci dn found for dev=%s\n",
+                printk(KERN_WARNING "PCI: no pci dn found for dev=%s\n", pci_name(dev));
-                        pci_name(dev));
                return;
        }
        /* Skip any devices for which EEH is not enabled. */
-        pdn = dn->data;
+        pdn = PCI_DN(dn);
        if (!(pdn->eeh_mode & EEH_MODE_SUPPORTED) ||
            pdn->eeh_mode & EEH_MODE_NOCHECK) {
 #ifdef DEBUG
-                printk(KERN_INFO "PCI: skip building address cache for=%s\n",
+                printk(KERN_INFO "PCI: skip building address cache for=%s - %s\n",
-                       pci_name(dev));
+                       pci_name(dev), pdn->node->full_name);
 #endif
                return;
        }
@@ -307,7 +305,7 @@ static void __pci_addr_cache_insert_device(struct pci_dev *dev)
 * we maintain a cache of devices that can be quickly searched.
 * This routine adds a device to that cache.
 */
-void pci_addr_cache_insert_device(struct pci_dev *dev)
+static void pci_addr_cache_insert_device(struct pci_dev *dev)
 {
        unsigned long flags;
@@ -350,7 +348,7 @@ restart:
 * the tree multiple times (once per resource).
 * But so what; device removal doesn't need to be that fast.
 */
-void pci_addr_cache_remove_device(struct pci_dev *dev)
+static void pci_addr_cache_remove_device(struct pci_dev *dev)
 {
        unsigned long flags;
@@ -370,8 +368,12 @@ void pci_addr_cache_remove_device(struct pci_dev *dev)
 */
 void __init pci_addr_cache_build(void)
 {
+        struct device_node *dn;
        struct pci_dev *dev = NULL;
+        if (!eeh_subsystem_enabled)
+                return;
        spin_lock_init(&pci_io_addr_cache_root.piar_lock);
        while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
@@ -380,6 +382,10 @@ void __init pci_addr_cache_build(void)
                        continue;
                }
                pci_addr_cache_insert_device(dev);
+                /* Save the BAR's; firmware doesn't restore these after EEH reset */
+                dn = pci_device_to_OF_node(dev);
+                eeh_save_bars(dev, PCI_DN(dn));
        }
 #ifdef DEBUG
@@ -391,22 +397,26 @@ void __init pci_addr_cache_build(void)
 /* --------------------------------------------------------------- */
 /* Above lies the PCI Address Cache. Below lies the EEH event infrastructure */
-/**
+void eeh_slot_error_detail (struct pci_dn *pdn, int severity)
- * eeh_register_notifier - Register to find out about EEH events.
- * @nb: notifier block to callback on events
- */
-int eeh_register_notifier(struct notifier_block *nb)
 {
-        return notifier_chain_register(&eeh_notifier_chain, nb);
+        unsigned long flags;
-}
+        int rc;
-/**
+        /* Log the error with the rtas logger */
- * eeh_unregister_notifier - Unregister to an EEH event notifier.
+        spin_lock_irqsave(&slot_errbuf_lock, flags);
- * @nb: notifier block to callback on events
+        memset(slot_errbuf, 0, eeh_error_buf_size);
- */
-int eeh_unregister_notifier(struct notifier_block *nb)
+        rc = rtas_call(ibm_slot_error_detail,
-{
+                       8, 1, NULL, pdn->eeh_config_addr,
-        return notifier_chain_unregister(&eeh_notifier_chain, nb);
+                       BUID_HI(pdn->phb->buid),
+                       BUID_LO(pdn->phb->buid), NULL, 0,
+                       virt_to_phys(slot_errbuf),
+                       eeh_error_buf_size,
+                       severity);
+        if (rc == 0)
+                log_error(slot_errbuf, ERR_TYPE_RTAS_LOG, 0);
+        spin_unlock_irqrestore(&slot_errbuf_lock, flags);
 }
 /**
@@ -414,16 +424,16 @@ int eeh_unregister_notifier(struct notifier_block *nb)
 * @dn: device node to read
 * @rets: array to return results in
 */
-static int read_slot_reset_state(struct device_node *dn, int rets[])
+static int read_slot_reset_state(struct pci_dn *pdn, int rets[])
 {
        int token, outputs;
-        struct pci_dn *pdn = dn->data;
        if (ibm_read_slot_reset_state2 != RTAS_UNKNOWN_SERVICE) {
                token = ibm_read_slot_reset_state2;
                outputs = 4;
        } else {
                token = ibm_read_slot_reset_state;
+                rets[2] = 0; /* fake PE Unavailable info */
                outputs = 3;
        }
@@ -432,87 +442,84 @@ static int read_slot_reset_state(struct device_node *dn, int rets[])
 }
 /**
- * eeh_panic - call panic() for an eeh event that cannot be handled.
+ * eeh_token_to_phys - convert EEH address token to phys address
- * The philosophy of this routine is that it is better to panic and
+ * @token i/o token, should be address in the form 0xA....
- * halt the OS than it is to risk possible data corruption by
- * oblivious device drivers that don't know better.
- *
- * @dev pci device that had an eeh event
- * @reset_state current reset state of the device slot
 */
-static void eeh_panic(struct pci_dev *dev, int reset_state)
+static inline unsigned long eeh_token_to_phys(unsigned long token)
 {
-        /*
+        pte_t *ptep;
-         * XXX We should create a separate sysctl for this.
+        unsigned long pa;
-         *
-         * Since the panic_on_oops sysctl is used to halt the system
+        ptep = find_linux_pte(init_mm.pgd, token);
-         * in light of potential corruption, we can use it here.
+        if (!ptep)
-         */
+                return token;
-        if (panic_on_oops)
+        pa = pte_pfn(*ptep) << PAGE_SHIFT;
-                panic("EEH: MMIO failure (%d) on device:%s\n", reset_state,
-                      pci_name(dev));
+        return pa | (token & (PAGE_SIZE-1));
-        else {
-                __get_cpu_var(ignored_failures)++;
-                printk(KERN_INFO "EEH: Ignored MMIO failure (%d) on device:%s\n",
-                       reset_state, pci_name(dev));
-        }
 }
-/**
+/** 
- * eeh_event_handler - dispatch EEH events.  The detection of a frozen
+ * Return the "partitionable endpoint" (pe) under which this device lies
- * slot can occur inside an interrupt, where it can be hard to do
- * anything about it.  The goal of this routine is to pull these
- * detection events out of the context of the interrupt handler, and
- * re-dispatch them for processing at a later time in a normal context.
- *
- * @dummy - unused
 */
-static void eeh_event_handler(void *dummy)
+static struct device_node * find_device_pe(struct device_node *dn)
 {
-        unsigned long flags;
+        while ((dn->parent) && PCI_DN(dn->parent) &&
-        struct eeh_event        *event;
+              (PCI_DN(dn->parent)->eeh_mode & EEH_MODE_SUPPORTED)) {
+                dn = dn->parent;
-        while (1) {
+        }
-                spin_lock_irqsave(&eeh_eventlist_lock, flags);
+        return dn;
-                event = NULL;
+}
-                if (!list_empty(&eeh_eventlist)) {
-                        event = list_entry(eeh_eventlist.next, struct eeh_event, list);
-                        list_del(&event->list);
-                }
-                spin_unlock_irqrestore(&eeh_eventlist_lock, flags);
-                if (event == NULL)
-                        break;
-                printk(KERN_INFO "EEH: MMIO failure (%d), notifiying device "
-                       "%s\n", event->reset_state,
-                       pci_name(event->dev));
-                atomic_set(&eeh_fail_count, 0);
+/** Mark all devices that are peers of this device as failed.
-                notifier_call_chain (&eeh_notifier_chain,
+ *  Mark the device driver too, so that it can see the failure
-                                     EEH_NOTIFY_FREEZE, event);
+ *  immediately; this is critical, since some drivers poll
+ *  status registers in interrupts ... If a driver is polling,
+ *  and the slot is frozen, then the driver can deadlock in
+ *  an interrupt context, which is bad.
+ */
-                __get_cpu_var(slot_resets)++;
+static void __eeh_mark_slot (struct device_node *dn, int mode_flag)
+{
+        while (dn) {
+                if (PCI_DN(dn)) {
+                        PCI_DN(dn)->eeh_mode |= mode_flag;
-                pci_dev_put(event->dev);
+                        if (dn->child)
-                kfree(event);
+                                __eeh_mark_slot (dn->child, mode_flag);
+                }
+                dn = dn->sibling;
        }
 }
-/**
+void eeh_mark_slot (struct device_node *dn, int mode_flag)
- * eeh_token_to_phys - convert EEH address token to phys address
- * @token i/o token, should be address in the form 0xE....
- */
-static inline unsigned long eeh_token_to_phys(unsigned long token)
 {
-        pte_t *ptep;
+        dn = find_device_pe (dn);
-        unsigned long pa;
+        PCI_DN(dn)->eeh_mode |= mode_flag;
+        __eeh_mark_slot (dn->child, mode_flag);
+}
-        ptep = find_linux_pte(init_mm.pgd, token);
+static void __eeh_clear_slot (struct device_node *dn, int mode_flag)
-        if (!ptep)
+{
-                return token;
+        while (dn) {
-        pa = pte_pfn(*ptep) << PAGE_SHIFT;
+                if (PCI_DN(dn)) {
+                        PCI_DN(dn)->eeh_mode &= ~mode_flag;
+                        PCI_DN(dn)->eeh_check_count = 0;
+                        if (dn->child)
+                                __eeh_clear_slot (dn->child, mode_flag);
+                }
+                dn = dn->sibling;
+        }
+}
-        return pa | (token & (PAGE_SIZE-1));
+void eeh_clear_slot (struct device_node *dn, int mode_flag)
+{
+        unsigned long flags;
+        spin_lock_irqsave(&confirm_error_lock, flags);
+        dn = find_device_pe (dn);
+        PCI_DN(dn)->eeh_mode &= ~mode_flag;
+        PCI_DN(dn)->eeh_check_count = 0;
+        __eeh_clear_slot (dn->child, mode_flag);
+        spin_unlock_irqrestore(&confirm_error_lock, flags);
 }
 /**
@@ -526,7 +533,7 @@ static inline unsigned long eeh_token_to_phys(unsigned long token)
 * will query firmware for the EEH status.
 *
 * Returns 0 if there has not been an EEH error; otherwise returns
- * a non-zero value and queues up a solt isolation event notification.
+ * a non-zero value and queues up a slot isolation event notification.
 *
 * It is safe to call this routine in an interrupt context.
 */
@@ -535,42 +542,59 @@ int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev)
        int ret;
        int rets[3];
        unsigned long flags;
-        int rc, reset_state;
-        struct eeh_event  *event;
        struct pci_dn *pdn;
+        int rc = 0;
        __get_cpu_var(total_mmio_ffs)++;
        if (!eeh_subsystem_enabled)
                return 0;
-        if (!dn)
+        if (!dn) {
+                __get_cpu_var(no_dn)++;
                return 0;
-        pdn = dn->data;
+        }
+        pdn = PCI_DN(dn);
        /* Access to IO BARs might get this far and still not want checking. */
-        if (!pdn->eeh_capable || !(pdn->eeh_mode & EEH_MODE_SUPPORTED) ||
+        if (!(pdn->eeh_mode & EEH_MODE_SUPPORTED) ||
            pdn->eeh_mode & EEH_MODE_NOCHECK) {
+                __get_cpu_var(ignored_check)++;
+#ifdef DEBUG
+                printk ("EEH:ignored check (%x) for %s %s\n", 
+                        pdn->eeh_mode, pci_name (dev), dn->full_name);
+#endif
                return 0;
        }
        if (!pdn->eeh_config_addr) {
+                __get_cpu_var(no_cfg_addr)++;
                return 0;
        }
-        /*
+        /* If we already have a pending isolation event for this
-         * If we already have a pending isolation event for this
+         * slot, we know it's bad already, we don't need to check.
-         * slot, we know it's bad already, we don't need to check...
+         * Do this checking under a lock; as multiple PCI devices
+         * in one slot might report errors simultaneously, and we
+         * only want one error recovery routine running.
         */
+        spin_lock_irqsave(&confirm_error_lock, flags);
+        rc = 1;
        if (pdn->eeh_mode & EEH_MODE_ISOLATED) {
-                atomic_inc(&eeh_fail_count);
+                pdn->eeh_check_count ++;
-                if (atomic_read(&eeh_fail_count) >= EEH_MAX_FAILS) {
+                if (pdn->eeh_check_count >= EEH_MAX_FAILS) {
+                        printk (KERN_ERR "EEH: Device driver ignored %d bad reads, panicing\n",
+                                pdn->eeh_check_count);
+                        dump_stack();
+                        
                        /* re-read the slot reset state */
-                        if (read_slot_reset_state(dn, rets) != 0)
+                        if (read_slot_reset_state(pdn, rets) != 0)
                                rets[0] = -1;   /* reset state unknown */
-                        eeh_panic(dev, rets[0]);
+                        /* If we are here, then we hit an infinite loop. Stop. */
+                        panic("EEH: MMIO halt (%d) on device:%s\n", rets[0], pci_name(dev));
                }
-                return 0;
+                goto dn_unlock;
        }
        /*
@@ -580,66 +604,69 @@ int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev)
         * function zero of a multi-function device.
         * In any case they must share a common PHB.
         */
-        ret = read_slot_reset_state(dn, rets);
+        ret = read_slot_reset_state(pdn, rets);
-        if (!(ret == 0 && rets[1] == 1 && (rets[0] == 2 || rets[0] == 4))) {
+        /* If the call to firmware failed, punt */
+        if (ret != 0) {
+                printk(KERN_WARNING "EEH: read_slot_reset_state() failed; rc=%d dn=%s\n",
+                       ret, dn->full_name);
                __get_cpu_var(false_positives)++;
-                return 0;
+                rc = 0;
+                goto dn_unlock;
        }
-        /* prevent repeated reports of this failure */
+        /* If EEH is not supported on this device, punt. */
-        pdn->eeh_mode |= EEH_MODE_ISOLATED;
+        if (rets[1] != 1) {
+                printk(KERN_WARNING "EEH: event on unsupported device, rc=%d dn=%s\n",
-        reset_state = rets[0];
+                       ret, dn->full_name);
+                __get_cpu_var(false_positives)++;
-        spin_lock_irqsave(&slot_errbuf_lock, flags);
+                rc = 0;
-        memset(slot_errbuf, 0, eeh_error_buf_size);
+                goto dn_unlock;
+        }
-        rc = rtas_call(ibm_slot_error_detail,
-                       8, 1, NULL, pdn->eeh_config_addr,
-                       BUID_HI(pdn->phb->buid),
-                       BUID_LO(pdn->phb->buid), NULL, 0,
-                       virt_to_phys(slot_errbuf),
-                       eeh_error_buf_size,
-                       1 /* Temporary Error */);
-        if (rc == 0)
-                log_error(slot_errbuf, ERR_TYPE_RTAS_LOG, 0);
-        spin_unlock_irqrestore(&slot_errbuf_lock, flags);
-        printk(KERN_INFO "EEH: MMIO failure (%d) on device: %s %s\n",
+        /* If not the kind of error we know about, punt. */
-               rets[0], dn->name, dn->full_name);
+        if (rets[0] != 2 && rets[0] != 4 && rets[0] != 5) {
-        event = kmalloc(sizeof(*event), GFP_ATOMIC);
+                __get_cpu_var(false_positives)++;
-        if (event == NULL) {
+                rc = 0;
-                eeh_panic(dev, reset_state);
+                goto dn_unlock;
-                return 1;
+        }
-        }
-        event->dev = dev;
+        /* Note that config-io to empty slots may fail;
-        event->dn = dn;
+         * we recognize empty because they don't have children. */
-        event->reset_state = reset_state;
+        if ((rets[0] == 5) && (dn->child == NULL)) {
+                __get_cpu_var(false_positives)++;
+                rc = 0;
+                goto dn_unlock;
+        }
-        /* We may or may not be called in an interrupt context */
+        __get_cpu_var(slot_resets)++;
-        spin_lock_irqsave(&eeh_eventlist_lock, flags);
+ 
-        list_add(&event->list, &eeh_eventlist);
+        /* Avoid repeated reports of this failure, including problems
-        spin_unlock_irqrestore(&eeh_eventlist_lock, flags);
+         * with other functions on this device, and functions under
+         * bridges. */
+        eeh_mark_slot (dn, EEH_MODE_ISOLATED);
+        spin_unlock_irqrestore(&confirm_error_lock, flags);
+        eeh_send_failure_event (dn, dev, rets[0], rets[2]);
+        
        /* Most EEH events are due to device driver bugs.  Having
         * a stack trace will help the device-driver authors figure
         * out what happened.  So print that out. */
-        dump_stack();
+        if (rets[0] != 5) dump_stack();
-        schedule_work(&eeh_event_wq);
+        return 1;
-        return 0;
+dn_unlock:
+        spin_unlock_irqrestore(&confirm_error_lock, flags);
+        return rc;
 }
-EXPORT_SYMBOL(eeh_dn_check_failure);
+EXPORT_SYMBOL_GPL(eeh_dn_check_failure);
 /**
 * eeh_check_failure - check if all 1's data is due to EEH slot freeze
 * @token i/o token, should be address in the form 0xA....
 * @val value, should be all 1's (XXX why do we need this arg??)
 *
- * Check for an eeh failure at the given token address.
 * Check for an EEH failure at the given token address.  Call this
 * routine if the result of a read was all 0xff's and you want to
 * find out if this is due to an EEH slot freeze event.  This routine
@@ -656,8 +683,10 @@ unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned lon
        /* Finding the phys addr + pci device; this is pretty quick. */
        addr = eeh_token_to_phys((unsigned long __force) token);
        dev = pci_get_device_by_addr(addr);
-        if (!dev)
+        if (!dev) {
+                __get_cpu_var(no_device)++;
                return val;
+        }
        dn = pci_device_to_OF_node(dev);
        eeh_dn_check_failure (dn, dev);
@@ -668,6 +697,217 @@ unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned lon
 EXPORT_SYMBOL(eeh_check_failure);
+/* ------------------------------------------------------------- */
+/* The code below deals with error recovery */
+/** Return negative value if a permanent error, else return
+ * a number of milliseconds to wait until the PCI slot is
+ * ready to be used.
+ */
+static int
+eeh_slot_availability(struct pci_dn *pdn)
+{
+        int rc;
+        int rets[3];
+        rc = read_slot_reset_state(pdn, rets);
+        if (rc) return rc;
+        if (rets[1] == 0) return -1;  /* EEH is not supported */
+        if (rets[0] == 0)  return 0;  /* Oll Korrect */
+        if (rets[0] == 5) {
+                if (rets[2] == 0) return -1; /* permanently unavailable */
+                return rets[2]; /* number of millisecs to wait */
+        }
+        return -1;
+}
+/** rtas_pci_slot_reset raises/lowers the pci #RST line
+ *  state: 1/0 to raise/lower the #RST
+ *
+ * Clear the EEH-frozen condition on a slot.  This routine
+ * asserts the PCI #RST line if the 'state' argument is '1',
+ * and drops the #RST line if 'state is '0'.  This routine is
+ * safe to call in an interrupt context.
+ *
+ */
+static void
+rtas_pci_slot_reset(struct pci_dn *pdn, int state)
+{
+        int rc;
+        BUG_ON (pdn==NULL); 
+        if (!pdn->phb) {
+                printk (KERN_WARNING "EEH: in slot reset, device node %s has no phb\n",
+                        pdn->node->full_name);
+                return;
+        }
+        rc = rtas_call(ibm_set_slot_reset,4,1, NULL,
+                       pdn->eeh_config_addr,
+                       BUID_HI(pdn->phb->buid),
+                       BUID_LO(pdn->phb->buid),
+                       state);
+        if (rc) {
+                printk (KERN_WARNING "EEH: Unable to reset the failed slot, (%d) #RST=%d dn=%s\n", 
+                        rc, state, pdn->node->full_name);
+                return;
+        }
+}
+/** rtas_set_slot_reset -- assert the pci #RST line for 1/4 second
+ *  dn -- device node to be reset.
+ */
+void
+rtas_set_slot_reset(struct pci_dn *pdn)
+{
+        int i, rc;
+        rtas_pci_slot_reset (pdn, 1);
+        /* The PCI bus requires that the reset be held high for at least
+         * a 100 milliseconds. We wait a bit longer 'just in case'.  */
+#define PCI_BUS_RST_HOLD_TIME_MSEC 250
+        msleep (PCI_BUS_RST_HOLD_TIME_MSEC);
+        
+        /* We might get hit with another EEH freeze as soon as the 
+         * pci slot reset line is dropped. Make sure we don't miss
+         * these, and clear the flag now. */
+        eeh_clear_slot (pdn->node, EEH_MODE_ISOLATED);
+        rtas_pci_slot_reset (pdn, 0);
+        /* After a PCI slot has been reset, the PCI Express spec requires
+         * a 1.5 second idle time for the bus to stabilize, before starting
+         * up traffic. */
+#define PCI_BUS_SETTLE_TIME_MSEC 1800
+        msleep (PCI_BUS_SETTLE_TIME_MSEC);
+        /* Now double check with the firmware to make sure the device is
+         * ready to be used; if not, wait for recovery. */
+        for (i=0; i<10; i++) {
+                rc = eeh_slot_availability (pdn);
+                if (rc <= 0) break;
+                msleep (rc+100);
+        }
+}
+/* ------------------------------------------------------- */
+/** Save and restore of PCI BARs
+ *
+ * Although firmware will set up BARs during boot, it doesn't
+ * set up device BAR's after a device reset, although it will,
+ * if requested, set up bridge configuration. Thus, we need to
+ * configure the PCI devices ourselves.  
+ */
+/**
+ * __restore_bars - Restore the Base Address Registers
+ * Loads the PCI configuration space base address registers,
+ * the expansion ROM base address, the latency timer, and etc.
+ * from the saved values in the device node.
+ */
+static inline void __restore_bars (struct pci_dn *pdn)
+{
+        int i;
+        if (NULL==pdn->phb) return;
+        for (i=4; i<10; i++) {
+                rtas_write_config(pdn, i*4, 4, pdn->config_space[i]);
+        }
+        /* 12 == Expansion ROM Address */
+        rtas_write_config(pdn, 12*4, 4, pdn->config_space[12]);
+#define BYTE_SWAP(OFF) (8*((OFF)/4)+3-(OFF))
+#define SAVED_BYTE(OFF) (((u8 *)(pdn->config_space))[BYTE_SWAP(OFF)])
+        rtas_write_config (pdn, PCI_CACHE_LINE_SIZE, 1,
+                    SAVED_BYTE(PCI_CACHE_LINE_SIZE));
+        rtas_write_config (pdn, PCI_LATENCY_TIMER, 1,
+                    SAVED_BYTE(PCI_LATENCY_TIMER));
+        /* max latency, min grant, interrupt pin and line */
+        rtas_write_config(pdn, 15*4, 4, pdn->config_space[15]);
+}
+/**
+ * eeh_restore_bars - restore the PCI config space info
+ *
+ * This routine performs a recursive walk to the children
+ * of this device as well.
+ */
+void eeh_restore_bars(struct pci_dn *pdn)
+{
+        struct device_node *dn;
+        if (!pdn) 
+                return;
+        
+        if (! pdn->eeh_is_bridge)
+                __restore_bars (pdn);
+        dn = pdn->node->child;
+        while (dn) {
+                eeh_restore_bars (PCI_DN(dn));
+                dn = dn->sibling;
+        }
+}
+/**
+ * eeh_save_bars - save device bars
+ *
+ * Save the values of the device bars. Unlike the restore
+ * routine, this routine is *not* recursive. This is because
+ * PCI devices are added individuallly; but, for the restore,
+ * an entire slot is reset at a time.
+ */
+static void eeh_save_bars(struct pci_dev * pdev, struct pci_dn *pdn)
+{
+        int i;
+        if (!pdev || !pdn )
+                return;
+        
+        for (i = 0; i < 16; i++)
+                pci_read_config_dword(pdev, i * 4, &pdn->config_space[i]);
+        if (pdev->hdr_type == PCI_HEADER_TYPE_BRIDGE)
+                pdn->eeh_is_bridge = 1;
+}
+void
+rtas_configure_bridge(struct pci_dn *pdn)
+{
+        int token = rtas_token ("ibm,configure-bridge");
+        int rc;
+        if (token == RTAS_UNKNOWN_SERVICE)
+                return;
+        rc = rtas_call(token,3,1, NULL,
+                       pdn->eeh_config_addr,
+                       BUID_HI(pdn->phb->buid),
+                       BUID_LO(pdn->phb->buid));
+        if (rc) {
+                printk (KERN_WARNING "EEH: Unable to configure device bridge (%d) for %s\n",
+                        rc, pdn->node->full_name);
+        }
+}
+/* ------------------------------------------------------------- */
+/* The code below deals with enabling EEH for devices during  the
+ * early boot sequence.  EEH must be enabled before any PCI probing
+ * can be done.
+ */
+#define EEH_ENABLE 1
 struct eeh_early_enable_info {
        unsigned int buid_hi;
        unsigned int buid_lo;
@@ -684,9 +924,11 @@ static void *early_enable_eeh(struct device_node *dn, void *data)
        u32 *device_id = (u32 *)get_property(dn, "device-id", NULL);
        u32 *regs;
        int enable;
-        struct pci_dn *pdn = dn->data;
+        struct pci_dn *pdn = PCI_DN(dn);
        pdn->eeh_mode = 0;
+        pdn->eeh_check_count = 0;
+        pdn->eeh_freeze_count = 0;
        if (status && strcmp(status, "ok") != 0)
                return NULL;    /* ignore devices with bad status */
@@ -723,8 +965,9 @@ static void *early_enable_eeh(struct device_node *dn, void *data)
                /* First register entry is addr (00BBSS00)  */
                /* Try to enable eeh */
                ret = rtas_call(ibm_set_eeh_option, 4, 1, NULL,
-                                regs[0], info->buid_hi, info->buid_lo,
+                                regs[0], info->buid_hi, info->buid_lo,
-                                EEH_ENABLE);
+                                EEH_ENABLE);
                if (ret == 0) {
                        eeh_subsystem_enabled = 1;
                        pdn->eeh_mode |= EEH_MODE_SUPPORTED;
@@ -736,7 +979,7 @@ static void *early_enable_eeh(struct device_node *dn, void *data)
                        /* This device doesn't support EEH, but it may have an
                         * EEH parent, in which case we mark it as supported. */
-                        if (dn->parent && dn->parent->data
+                        if (dn->parent && PCI_DN(dn->parent)
                            && (PCI_DN(dn->parent)->eeh_mode & EEH_MODE_SUPPORTED)) {
                                /* Parent supports EEH. */
                                pdn->eeh_mode |= EEH_MODE_SUPPORTED;
@@ -749,7 +992,7 @@ static void *early_enable_eeh(struct device_node *dn, void *data)
                       dn->full_name);
        }
-        return NULL; 
+        return NULL;
 }
 /*
@@ -770,6 +1013,9 @@ void __init eeh_init(void)
        struct device_node *phb, *np;
        struct eeh_early_enable_info info;
+        spin_lock_init(&confirm_error_lock);
+        spin_lock_init(&slot_errbuf_lock);
        np = of_find_node_by_path("/rtas");
        if (np == NULL)
                return;
@@ -797,13 +1043,11 @@ void __init eeh_init(void)
        for (phb = of_find_node_by_name(NULL, "pci"); phb;
             phb = of_find_node_by_name(phb, "pci")) {
                unsigned long buid;
-                struct pci_dn *pci;
                buid = get_phb_buid(phb);
-                if (buid == 0 || phb->data == NULL)
+                if (buid == 0 || PCI_DN(phb) == NULL)
                        continue;
-                pci = phb->data;
                info.buid_lo = BUID_LO(buid);
                info.buid_hi = BUID_HI(buid);
                traverse_pci_devices(phb, early_enable_eeh, &info);
@@ -832,11 +1076,13 @@ void eeh_add_device_early(struct device_node *dn)
        struct pci_controller *phb;
        struct eeh_early_enable_info info;
-        if (!dn || !dn->data)
+        if (!dn || !PCI_DN(dn))
                return;
        phb = PCI_DN(dn)->phb;
        if (NULL == phb || 0 == phb->buid) {
-                printk(KERN_WARNING "EEH: Expected buid but found none\n");
+                printk(KERN_WARNING "EEH: Expected buid but found none for %s\n",
+                       dn->full_name);
+                dump_stack();
                return;
        }
@@ -844,7 +1090,7 @@ void eeh_add_device_early(struct device_node *dn)
        info.buid_lo = BUID_LO(phb->buid);
        early_enable_eeh(dn, &info);
 }
-EXPORT_SYMBOL(eeh_add_device_early);
+EXPORT_SYMBOL_GPL(eeh_add_device_early);
 /**
 * eeh_add_device_late - perform EEH initialization for the indicated pci device
@@ -855,6 +1101,9 @@ EXPORT_SYMBOL(eeh_add_device_early);
 */
 void eeh_add_device_late(struct pci_dev *dev)
 {
+        struct device_node *dn;
+        struct pci_dn *pdn;
        if (!dev || !eeh_subsystem_enabled)
                return;
@@ -862,9 +1111,15 @@ void eeh_add_device_late(struct pci_dev *dev)
        printk(KERN_DEBUG "EEH: adding device %s\n", pci_name(dev));
 #endif
+        pci_dev_get (dev);
+        dn = pci_device_to_OF_node(dev);
+        pdn = PCI_DN(dn);
+        pdn->pcidev = dev;
        pci_addr_cache_insert_device (dev);
+        eeh_save_bars(dev, pdn);
 }
-EXPORT_SYMBOL(eeh_add_device_late);
+EXPORT_SYMBOL_GPL(eeh_add_device_late);
 /**
 * eeh_remove_device - undo EEH setup for the indicated pci device
@@ -875,6 +1130,7 @@ EXPORT_SYMBOL(eeh_add_device_late);
 */
 void eeh_remove_device(struct pci_dev *dev)
 {
+        struct device_node *dn;
        if (!dev || !eeh_subsystem_enabled)
                return;
@@ -883,20 +1139,29 @@ void eeh_remove_device(struct pci_dev *dev)
        printk(KERN_DEBUG "EEH: remove device %s\n", pci_name(dev));
 #endif
        pci_addr_cache_remove_device(dev);
+        dn = pci_device_to_OF_node(dev);
+        PCI_DN(dn)->pcidev = NULL;
+        pci_dev_put (dev);
 }
-EXPORT_SYMBOL(eeh_remove_device);
+EXPORT_SYMBOL_GPL(eeh_remove_device);
 static int proc_eeh_show(struct seq_file *m, void *v)
 {
        unsigned int cpu;
        unsigned long ffs = 0, positives = 0, failures = 0;
        unsigned long resets = 0;
+        unsigned long no_dev = 0, no_dn = 0, no_cfg = 0, no_check = 0;
        for_each_cpu(cpu) {
                ffs += per_cpu(total_mmio_ffs, cpu);
                positives += per_cpu(false_positives, cpu);
                failures += per_cpu(ignored_failures, cpu);
                resets += per_cpu(slot_resets, cpu);
+                no_dev += per_cpu(no_device, cpu);
+                no_dn += per_cpu(no_dn, cpu);
+                no_cfg += per_cpu(no_cfg_addr, cpu);
+                no_check += per_cpu(ignored_check, cpu);
        }
        if (0 == eeh_subsystem_enabled) {
@@ -904,13 +1169,17 @@ static int proc_eeh_show(struct seq_file *m, void *v)
                seq_printf(m, "eeh_total_mmio_ffs=%ld\n", ffs);
        } else {
                seq_printf(m, "EEH Subsystem is enabled\n");
-                seq_printf(m, "eeh_total_mmio_ffs=%ld\n"
+                seq_printf(m,
-                           "eeh_false_positives=%ld\n"
+                                "no device=%ld\n"
-                           "eeh_ignored_failures=%ld\n"
+                                "no device node=%ld\n"
-                           "eeh_slot_resets=%ld\n"
+                                "no config address=%ld\n"
-                                "eeh_fail_count=%d\n",
+                                "check not wanted=%ld\n"
-                           ffs, positives, failures, resets,
+                                "eeh_total_mmio_ffs=%ld\n"
-                                eeh_fail_count.counter);
+                                "eeh_false_positives=%ld\n"
+                                "eeh_ignored_failures=%ld\n"
+                                "eeh_slot_resets=%ld\n",
+                                no_dev, no_dn, no_cfg, no_check,
+                                ffs, positives, failures, resets);
        }
        return 0;
@@ -932,7 +1201,7 @@ static int __init eeh_init_proc(void)
 {
        struct proc_dir_entry *e;
-        if (systemcfg->platform & PLATFORM_PSERIES) {
+        if (platform_is_pseries()) {
                e = create_proc_entry("ppc64/eeh", 0, NULL);
                if (e)
                        e->proc_fops = &proc_eeh_operations;
diff --git a/arch/powerpc/platforms/pseries/eeh_event.c b/arch/powerpc/platforms/pseries/eeh_event.c
new file mode 100644
index 000000000000..92497333c2b6
--- /dev/null
+++ b/arch/powerpc/platforms/pseries/eeh_event.c
@@ -0,0 +1,155 @@
+/*
+ * eeh_event.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ *
+ * Copyright (c) 2005 Linas Vepstas <linas@linas.org>
+ */
+#include <linux/list.h>
+#include <linux/pci.h>
+#include <asm/eeh_event.h>
+/** Overview:
+ *  EEH error states may be detected within exception handlers;
+ *  however, the recovery processing needs to occur asynchronously
+ *  in a normal kernel context and not an interrupt context.
+ *  This pair of routines creates an event and queues it onto a
+ *  work-queue, where a worker thread can drive recovery.
+ */
+/* EEH event workqueue setup. */
+static spinlock_t eeh_eventlist_lock = SPIN_LOCK_UNLOCKED;
+LIST_HEAD(eeh_eventlist);
+static void eeh_thread_launcher(void *);
+DECLARE_WORK(eeh_event_wq, eeh_thread_launcher, NULL);
+/**
+ * eeh_panic - call panic() for an eeh event that cannot be handled.
+ * The philosophy of this routine is that it is better to panic and
+ * halt the OS than it is to risk possible data corruption by
+ * oblivious device drivers that don't know better.
+ *
+ * @dev pci device that had an eeh event
+ * @reset_state current reset state of the device slot
+ */
+static void eeh_panic(struct pci_dev *dev, int reset_state)
+{
+        /*
+         * Since the panic_on_oops sysctl is used to halt the system
+         * in light of potential corruption, we can use it here.
+         */
+        if (panic_on_oops) {
+                panic("EEH: MMIO failure (%d) on device:%s\n", reset_state,
+                      pci_name(dev));
+        }
+        else {
+                printk(KERN_INFO "EEH: Ignored MMIO failure (%d) on device:%s\n",
+                       reset_state, pci_name(dev));
+        }
+}
+/**
+ * eeh_event_handler - dispatch EEH events.  The detection of a frozen
+ * slot can occur inside an interrupt, where it can be hard to do
+ * anything about it.  The goal of this routine is to pull these
+ * detection events out of the context of the interrupt handler, and
+ * re-dispatch them for processing at a later time in a normal context.
+ *
+ * @dummy - unused
+ */
+static int eeh_event_handler(void * dummy)
+{
+        unsigned long flags;
+        struct eeh_event        *event;
+        daemonize ("eehd");
+        while (1) {
+                set_current_state(TASK_INTERRUPTIBLE);
+                spin_lock_irqsave(&eeh_eventlist_lock, flags);
+                event = NULL;
+                if (!list_empty(&eeh_eventlist)) {
+                        event = list_entry(eeh_eventlist.next, struct eeh_event, list);
+                        list_del(&event->list);
+                }
+                spin_unlock_irqrestore(&eeh_eventlist_lock, flags);
+                if (event == NULL)
+                        break;
+                printk(KERN_INFO "EEH: Detected PCI bus error on device %s\n",
+                       pci_name(event->dev));
+                eeh_panic (event->dev, event->state);
+                kfree(event);
+        }
+        return 0;
+}
+/**
+ * eeh_thread_launcher
+ *
+ * @dummy - unused
+ */
+static void eeh_thread_launcher(void *dummy)
+{
+        if (kernel_thread(eeh_event_handler, NULL, CLONE_KERNEL) < 0)
+                printk(KERN_ERR "Failed to start EEH daemon\n");
+}
+/**
+ * eeh_send_failure_event - generate a PCI error event
+ * @dev pci device
+ *
+ * This routine can be called within an interrupt context;
+ * the actual event will be delivered in a normal context
+ * (from a workqueue).
+ */
+int eeh_send_failure_event (struct device_node *dn,
+                            struct pci_dev *dev,
+                            int state,
+                            int time_unavail)
+{
+        unsigned long flags;
+        struct eeh_event *event;
+        event = kmalloc(sizeof(*event), GFP_ATOMIC);
+        if (event == NULL) {
+                printk (KERN_ERR "EEH: out of memory, event not handled\n");
+                return 1;
+        }
+        if (dev)
+                pci_dev_get(dev);
+        event->dn = dn;
+        event->dev = dev;
+        event->state = state;
+        event->time_unavail = time_unavail;
+        /* We may or may not be called in an interrupt context */
+        spin_lock_irqsave(&eeh_eventlist_lock, flags);
+        list_add(&event->list, &eeh_eventlist);
+        spin_unlock_irqrestore(&eeh_eventlist_lock, flags);
+        schedule_work(&eeh_event_wq);
+        return 0;
+}
+/********************** END OF FILE ******************************/
diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c
index fcc50bfd43fd..97ba5214417f 100644
--- a/arch/powerpc/platforms/pseries/iommu.c
+++ b/arch/powerpc/platforms/pseries/iommu.c
@@ -42,7 +42,6 @@
 #include <asm/machdep.h>
 #include <asm/abs_addr.h>
 #include <asm/pSeries_reconfig.h>
-#include <asm/systemcfg.h>
 #include <asm/firmware.h>
 #include <asm/tce.h>
 #include <asm/ppc-pci.h>
@@ -582,7 +581,7 @@ void iommu_init_early_pSeries(void)
                return;
        }
-        if (systemcfg->platform & PLATFORM_LPAR) {
+        if (platform_is_lpar()) {
                if (firmware_has_feature(FW_FEATURE_MULTITCE)) {
                        ppc_md.tce_build = tce_buildmulti_pSeriesLP;
                        ppc_md.tce_free  = tce_freemulti_pSeriesLP;
diff --git a/arch/powerpc/platforms/pseries/pci.c b/arch/powerpc/platforms/pseries/pci.c
index c198656a3bb5..999a9620b5ce 100644
--- a/arch/powerpc/platforms/pseries/pci.c
+++ b/arch/powerpc/platforms/pseries/pci.c
@@ -107,7 +107,6 @@ static void __init pSeries_request_regions(void)
 void __init pSeries_final_fixup(void)
 {
-        phbs_remap_io();
        pSeries_request_regions();
        pci_addr_cache_build();
@@ -123,7 +122,7 @@ static void fixup_winbond_82c105(struct pci_dev* dev)
        int i;
        unsigned int reg;
-        if (!(systemcfg->platform & PLATFORM_PSERIES))
+        if (!platform_is_pseries())
                return;
        printk("Using INTC for W82c105 IDE controller.\n");
diff --git a/arch/powerpc/platforms/pseries/reconfig.c b/arch/powerpc/platforms/pseries/reconfig.c
index d7d400339458..d8864164dbe8 100644
--- a/arch/powerpc/platforms/pseries/reconfig.c
+++ b/arch/powerpc/platforms/pseries/reconfig.c
@@ -408,7 +408,7 @@ static int proc_ppc64_create_ofdt(void)
 {
        struct proc_dir_entry *ent;
-        if (!(systemcfg->platform & PLATFORM_PSERIES))
+        if (!platform_is_pseries())
                return 0;
        ent = create_proc_entry("ppc64/ofdt", S_IWUSR, NULL);
diff --git a/arch/powerpc/platforms/pseries/rtasd.c b/arch/powerpc/platforms/pseries/rtasd.c
index e26b0420b6dd..a6f628d4c9dc 100644
--- a/arch/powerpc/platforms/pseries/rtasd.c
+++ b/arch/powerpc/platforms/pseries/rtasd.c
@@ -27,7 +27,6 @@
 #include <asm/prom.h>
 #include <asm/nvram.h>
 #include <asm/atomic.h>
-#include <asm/systemcfg.h>
 #if 0
 #define DEBUG(A...)     printk(KERN_ERR A)
@@ -482,10 +481,12 @@ static int __init rtas_init(void)
 {
        struct proc_dir_entry *entry;
-        /* No RTAS, only warn if we are on a pSeries box  */
+        if (!platform_is_pseries())
+                return 0;
+        /* No RTAS */
        if (rtas_token("event-scan") == RTAS_UNKNOWN_SERVICE) {
-                if (systemcfg->platform & PLATFORM_PSERIES)
+                printk(KERN_INFO "rtasd: no event-scan on system\n");
-                        printk(KERN_INFO "rtasd: no event-scan on system\n");
                return 1;
        }
diff --git a/arch/ppc64/kernel/scanlog.c b/arch/powerpc/platforms/pseries/scanlog.c
index 2edc947f7c44..2edc947f7c44 100644
--- a/arch/ppc64/kernel/scanlog.c
+++ b/arch/powerpc/platforms/pseries/scanlog.c
diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c
index e78c39368841..31990829310c 100644
--- a/arch/powerpc/platforms/pseries/setup.c
+++ b/arch/powerpc/platforms/pseries/setup.c
@@ -249,7 +249,7 @@ static void __init pSeries_setup_arch(void)
                ppc_md.idle_loop = default_idle;
        }
-        if (systemcfg->platform & PLATFORM_LPAR)
+        if (platform_is_lpar())
                ppc_md.enable_pmcs = pseries_lpar_enable_pmcs;
        else
                ppc_md.enable_pmcs = power4_enable_pmcs;
@@ -306,9 +306,7 @@ static void __init fw_feature_init(void)
        }
        of_node_put(dn);
- no_rtas:
+no_rtas:
-        printk(KERN_INFO "firmware_features = 0x%lx\n", 
-               ppc64_firmware_features);
        DBG(" <- fw_feature_init()\n");
 }
@@ -378,7 +376,7 @@ static void __init pSeries_init_early(void)
        fw_feature_init();
        
-        if (systemcfg->platform & PLATFORM_LPAR)
+        if (platform_is_lpar())
                hpte_init_lpar();
        else {
                hpte_init_native();
@@ -388,7 +386,7 @@ static void __init pSeries_init_early(void)
        generic_find_legacy_serial_ports(&physport, &default_speed);
-        if (systemcfg->platform & PLATFORM_LPAR)
+        if (platform_is_lpar())
                find_udbg_vterm();
        else if (physport) {
                /* Map the uart for udbg. */
@@ -469,6 +467,7 @@ static inline void dedicated_idle_sleep(unsigned int cpu)
                 * more.
                 */
                clear_thread_flag(TIF_POLLING_NRFLAG);
+                smp_mb__after_clear_bit();
                /*
                 * SMT dynamic mode. Cede will result in this thread going
@@ -481,6 +480,7 @@ static inline void dedicated_idle_sleep(unsigned int cpu)
                        cede_processor();
                else
                        local_irq_enable();
+                set_thread_flag(TIF_POLLING_NRFLAG);
        } else {
                /*
                 * Give the HV an opportunity at the processor, since we are
@@ -492,11 +492,11 @@ static inline void dedicated_idle_sleep(unsigned int cpu)
 static void pseries_dedicated_idle(void)
 { 
-        long oldval;
        struct paca_struct *lpaca = get_paca();
        unsigned int cpu = smp_processor_id();
        unsigned long start_snooze;
        unsigned long *smt_snooze_delay = &__get_cpu_var(smt_snooze_delay);
+        set_thread_flag(TIF_POLLING_NRFLAG);
        while (1) {
                /*
@@ -505,10 +505,7 @@ static void pseries_dedicated_idle(void)
                 */
                lpaca->lppaca.idle = 1;
-                oldval = test_and_clear_thread_flag(TIF_NEED_RESCHED);
+                if (!need_resched()) {
-                if (!oldval) {
-                        set_thread_flag(TIF_POLLING_NRFLAG);
                        start_snooze = __get_tb() +
                                *smt_snooze_delay * tb_ticks_per_usec;
@@ -531,15 +528,14 @@ static void pseries_dedicated_idle(void)
                        }
                        HMT_medium();
-                        clear_thread_flag(TIF_POLLING_NRFLAG);
-                } else {
-                        set_need_resched();
                }
                lpaca->lppaca.idle = 0;
                ppc64_runlatch_on();
+                preempt_enable_no_resched();
                schedule();
+                preempt_disable();
                if (cpu_is_offline(cpu) && system_state == SYSTEM_RUNNING)
                        cpu_die();
@@ -583,7 +579,9 @@ static void pseries_shared_idle(void)
                lpaca->lppaca.idle = 0;
                ppc64_runlatch_on();
+                preempt_enable_no_resched();
                schedule();
+                preempt_disable();
                if (cpu_is_offline(cpu) && system_state == SYSTEM_RUNNING)
                        cpu_die();
@@ -592,7 +590,7 @@ static void pseries_shared_idle(void)
 static int pSeries_pci_probe_mode(struct pci_bus *bus)
 {
-        if (systemcfg->platform & PLATFORM_LPAR)
+        if (platform_is_lpar())
                return PCI_PROBE_DEVTREE;
        return PCI_PROBE_NORMAL;
 }
diff --git a/arch/powerpc/platforms/pseries/smp.c b/arch/powerpc/platforms/pseries/smp.c
index 7a243e8ccd7e..5800cde7d5ad 100644
--- a/arch/powerpc/platforms/pseries/smp.c
+++ b/arch/powerpc/platforms/pseries/smp.c
@@ -46,6 +46,7 @@
 #include <asm/rtas.h>
 #include <asm/pSeries_reconfig.h>
 #include <asm/mpic.h>
+#include <asm/vdso_datapage.h>
 #include "plpar_wrappers.h"
@@ -96,7 +97,7 @@ int pSeries_cpu_disable(void)
        int cpu = smp_processor_id();
        cpu_clear(cpu, cpu_online_map);
-        systemcfg->processorCount--;
+        vdso_data->processorCount--;
        /*fix boot_cpuid here*/
        if (cpu == boot_cpuid)
@@ -441,7 +442,7 @@ void __init smp_init_pSeries(void)
        smp_ops->cpu_die = pSeries_cpu_die;
        /* Processors can be added/removed only on LPAR */
-        if (systemcfg->platform == PLATFORM_PSERIES_LPAR)
+        if (platform_is_lpar())
                pSeries_reconfig_notifier_register(&pSeries_smp_nb);
 #endif
diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c
index c72c86f05cb6..72ac18067ece 100644
--- a/arch/powerpc/platforms/pseries/xics.c
+++ b/arch/powerpc/platforms/pseries/xics.c
@@ -545,7 +545,9 @@ nextnode:
                of_node_put(np);
        }
-        if (systemcfg->platform == PLATFORM_PSERIES) {
+        if (platform_is_lpar())
+                ops = &pSeriesLP_ops;
+        else {
 #ifdef CONFIG_SMP
                for_each_cpu(i) {
                        int hard_id;
@@ -561,12 +563,11 @@ nextnode:
 #else
                xics_per_cpu[0] = ioremap(intr_base, intr_size);
 #endif /* CONFIG_SMP */
-        } else if (systemcfg->platform == PLATFORM_PSERIES_LPAR) {
-                ops = &pSeriesLP_ops;
        }
        xics_8259_pic.enable = i8259_pic.enable;
        xics_8259_pic.disable = i8259_pic.disable;
+        xics_8259_pic.end = i8259_pic.end;
        for (i = 0; i < 16; ++i)
                get_irq_desc(i)->handler = &xics_8259_pic;
        for (; i < NR_IRQS; ++i)
diff --git a/arch/powerpc/sysdev/u3_iommu.c b/arch/powerpc/sysdev/u3_iommu.c
index 543d65909812..f32baf7f4693 100644
--- a/arch/powerpc/sysdev/u3_iommu.c
+++ b/arch/powerpc/sysdev/u3_iommu.c
@@ -226,7 +226,7 @@ static void iommu_table_u3_setup(void)
        iommu_table_u3.it_busno = 0;
        iommu_table_u3.it_offset = 0;
        /* it_size is in number of entries */
-        iommu_table_u3.it_size = dart_tablesize / sizeof(u32);
+        iommu_table_u3.it_size = (dart_tablesize / sizeof(u32)) >> DART_PAGE_FACTOR;
        /* Initialize the common IOMMU code */
        iommu_table_u3.it_base = (unsigned long)dart_vbase;
diff --git a/arch/powerpc/xmon/Makefile b/arch/powerpc/xmon/Makefile
index 79a784f0e7a9..b20312e5ed27 100644
--- a/arch/powerpc/xmon/Makefile
+++ b/arch/powerpc/xmon/Makefile
@@ -8,4 +8,4 @@ obj-$(CONFIG_8xx)	+= start_8xx.o
 obj-$(CONFIG_6xx)       += start_32.o
 obj-$(CONFIG_4xx)       += start_32.o
 obj-$(CONFIG_PPC64)     += start_64.o
-obj-y                   += xmon.o ppc-dis.o ppc-opc.o subr_prf.o setjmp.o
+obj-y                   += xmon.o ppc-dis.o ppc-opc.o setjmp.o nonstdio.o
diff --git a/arch/powerpc/xmon/nonstdio.c b/arch/powerpc/xmon/nonstdio.c
new file mode 100644
index 000000000000..78765833f4c0
--- /dev/null
+++ b/arch/powerpc/xmon/nonstdio.c
@@ -0,0 +1,134 @@
+/*
+ * Copyright (C) 1996-2005 Paul Mackerras.
+ *
+ *      This program is free software; you can redistribute it and/or
+ *      modify it under the terms of the GNU General Public License
+ *      as published by the Free Software Foundation; either version
+ *      2 of the License, or (at your option) any later version.
+ */
+#include <linux/string.h>
+#include <asm/time.h>
+#include "nonstdio.h"
+int xmon_putchar(int c)
+{
+        char ch = c;
+        if (c == '\n')
+                xmon_putchar('\r');
+        return xmon_write(&ch, 1) == 1? c: -1;
+}
+static char line[256];
+static char *lineptr;
+static int lineleft;
+int xmon_expect(const char *str, unsigned long timeout)
+{
+        int c;
+        unsigned long t0;
+        /* assume 25MHz default timebase if tb_ticks_per_sec not set yet */
+        timeout *= tb_ticks_per_sec? tb_ticks_per_sec: 25000000;
+        t0 = get_tbl();
+        do {
+                lineptr = line;
+                for (;;) {
+                        c = xmon_read_poll();
+                        if (c == -1) {
+                                if (get_tbl() - t0 > timeout)
+                                        return 0;
+                                continue;
+                        }
+                        if (c == '\n')
+                                break;
+                        if (c != '\r' && lineptr < &line[sizeof(line) - 1])
+                                *lineptr++ = c;
+                }
+                *lineptr = 0;
+        } while (strstr(line, str) == NULL);
+        return 1;
+}
+int xmon_getchar(void)
+{
+        int c;
+        if (lineleft == 0) {
+                lineptr = line;
+                for (;;) {
+                        c = xmon_readchar();
+                        if (c == -1 || c == 4)
+                                break;
+                        if (c == '\r' || c == '\n') {
+                                *lineptr++ = '\n';
+                                xmon_putchar('\n');
+                                break;
+                        }
+                        switch (c) {
+                        case 0177:
+                        case '\b':
+                                if (lineptr > line) {
+                                        xmon_putchar('\b');
+                                        xmon_putchar(' ');
+                                        xmon_putchar('\b');
+                                        --lineptr;
+                                }
+                                break;
+                        case 'U' & 0x1F:
+                                while (lineptr > line) {
+                                        xmon_putchar('\b');
+                                        xmon_putchar(' ');
+                                        xmon_putchar('\b');
+                                        --lineptr;
+                                }
+                                break;
+                        default:
+                                if (lineptr >= &line[sizeof(line) - 1])
+                                        xmon_putchar('\a');
+                                else {
+                                        xmon_putchar(c);
+                                        *lineptr++ = c;
+                                }
+                        }
+                }
+                lineleft = lineptr - line;
+                lineptr = line;
+        }
+        if (lineleft == 0)
+                return -1;
+        --lineleft;
+        return *lineptr++;
+}
+char *xmon_gets(char *str, int nb)
+{
+        char *p;
+        int c;
+        for (p = str; p < str + nb - 1; ) {
+                c = xmon_getchar();
+                if (c == -1) {
+                        if (p == str)
+                                return NULL;
+                        break;
+                }
+                *p++ = c;
+                if (c == '\n')
+                        break;
+        }
+        *p = 0;
+        return str;
+}
+void xmon_printf(const char *format, ...)
+{
+        va_list args;
+        int n;
+        static char xmon_outbuf[1024];
+        va_start(args, format);
+        n = vsnprintf(xmon_outbuf, sizeof(xmon_outbuf), format, args);
+        va_end(args);
+        xmon_write(xmon_outbuf, n);
+}
diff --git a/arch/powerpc/xmon/nonstdio.h b/arch/powerpc/xmon/nonstdio.h
index 84211a21c6f4..47cebbd2b1b1 100644
--- a/arch/powerpc/xmon/nonstdio.h
+++ b/arch/powerpc/xmon/nonstdio.h
@@ -1,22 +1,14 @@
-typedef int     FILE;
-extern FILE *xmon_stdin, *xmon_stdout;
 #define EOF     (-1)
-#define stdin   xmon_stdin
-#define stdout  xmon_stdout
 #define printf  xmon_printf
-#define fprintf xmon_fprintf
-#define fputs   xmon_fputs
-#define fgets   xmon_fgets
 #define putchar xmon_putchar
-#define getchar xmon_getchar
-#define putc    xmon_putc
-#define getc    xmon_getc
-#define fopen(n, m)     NULL
-#define fflush(f)       do {} while (0)
-#define fclose(f)       do {} while (0)
-extern char *fgets(char *, int, void *);
-extern void xmon_printf(const char *, ...);
-extern void xmon_fprintf(void *, const char *, ...);
-extern void xmon_sprintf(char *, const char *, ...);
-#define perror(s)       printf("%s: no files!\n", (s))
+extern int xmon_putchar(int c);
+extern int xmon_getchar(void);
+extern char *xmon_gets(char *, int);
+extern void xmon_printf(const char *, ...);
+extern void xmon_map_scc(void);
+extern int xmon_expect(const char *str, unsigned long timeout);
+extern int xmon_write(void *ptr, int nb);
+extern int xmon_readchar(void);
+extern int xmon_read_poll(void);
diff --git a/arch/powerpc/xmon/setjmp.S b/arch/powerpc/xmon/setjmp.S
index f8e40dfd2bff..96a91f10e2ec 100644
--- a/arch/powerpc/xmon/setjmp.S
+++ b/arch/powerpc/xmon/setjmp.S
@@ -14,61 +14,61 @@
 _GLOBAL(xmon_setjmp)
        mflr    r0
-        STL     r0,0(r3)
+        PPC_STL r0,0(r3)
-        STL     r1,SZL(r3)
+        PPC_STL r1,SZL(r3)
-        STL     r2,2*SZL(r3)
+        PPC_STL r2,2*SZL(r3)
        mfcr    r0
-        STL     r0,3*SZL(r3)
+        PPC_STL r0,3*SZL(r3)
-        STL     r13,4*SZL(r3)
+        PPC_STL r13,4*SZL(r3)
-        STL     r14,5*SZL(r3)
+        PPC_STL r14,5*SZL(r3)
-        STL     r15,6*SZL(r3)
+        PPC_STL r15,6*SZL(r3)
-        STL     r16,7*SZL(r3)
+        PPC_STL r16,7*SZL(r3)
-        STL     r17,8*SZL(r3)
+        PPC_STL r17,8*SZL(r3)
-        STL     r18,9*SZL(r3)
+        PPC_STL r18,9*SZL(r3)
-        STL     r19,10*SZL(r3)
+        PPC_STL r19,10*SZL(r3)
-        STL     r20,11*SZL(r3)
+        PPC_STL r20,11*SZL(r3)
-        STL     r21,12*SZL(r3)
+        PPC_STL r21,12*SZL(r3)
-        STL     r22,13*SZL(r3)
+        PPC_STL r22,13*SZL(r3)
-        STL     r23,14*SZL(r3)
+        PPC_STL r23,14*SZL(r3)
-        STL     r24,15*SZL(r3)
+        PPC_STL r24,15*SZL(r3)
-        STL     r25,16*SZL(r3)
+        PPC_STL r25,16*SZL(r3)
-        STL     r26,17*SZL(r3)
+        PPC_STL r26,17*SZL(r3)
-        STL     r27,18*SZL(r3)
+        PPC_STL r27,18*SZL(r3)
-        STL     r28,19*SZL(r3)
+        PPC_STL r28,19*SZL(r3)
-        STL     r29,20*SZL(r3)
+        PPC_STL r29,20*SZL(r3)
-        STL     r30,21*SZL(r3)
+        PPC_STL r30,21*SZL(r3)
-        STL     r31,22*SZL(r3)
+        PPC_STL r31,22*SZL(r3)
        li      r3,0
        blr
 _GLOBAL(xmon_longjmp)
-        CMPI    r4,0
+        PPC_LCMPI r4,0
        bne     1f
        li      r4,1
-1:      LDL     r13,4*SZL(r3)
+1:      PPC_LL  r13,4*SZL(r3)
-        LDL     r14,5*SZL(r3)
+        PPC_LL  r14,5*SZL(r3)
-        LDL     r15,6*SZL(r3)
+        PPC_LL  r15,6*SZL(r3)
-        LDL     r16,7*SZL(r3)
+        PPC_LL  r16,7*SZL(r3)
-        LDL     r17,8*SZL(r3)
+        PPC_LL  r17,8*SZL(r3)
-        LDL     r18,9*SZL(r3)
+        PPC_LL  r18,9*SZL(r3)
-        LDL     r19,10*SZL(r3)
+        PPC_LL  r19,10*SZL(r3)
-        LDL     r20,11*SZL(r3)
+        PPC_LL  r20,11*SZL(r3)
-        LDL     r21,12*SZL(r3)
+        PPC_LL  r21,12*SZL(r3)
-        LDL     r22,13*SZL(r3)
+        PPC_LL  r22,13*SZL(r3)
-        LDL     r23,14*SZL(r3)
+        PPC_LL  r23,14*SZL(r3)
-        LDL     r24,15*SZL(r3)
+        PPC_LL  r24,15*SZL(r3)
-        LDL     r25,16*SZL(r3)
+        PPC_LL  r25,16*SZL(r3)
-        LDL     r26,17*SZL(r3)
+        PPC_LL  r26,17*SZL(r3)
-        LDL     r27,18*SZL(r3)
+        PPC_LL  r27,18*SZL(r3)
-        LDL     r28,19*SZL(r3)
+        PPC_LL  r28,19*SZL(r3)
-        LDL     r29,20*SZL(r3)
+        PPC_LL  r29,20*SZL(r3)
-        LDL     r30,21*SZL(r3)
+        PPC_LL  r30,21*SZL(r3)
-        LDL     r31,22*SZL(r3)
+        PPC_LL  r31,22*SZL(r3)
-        LDL     r0,3*SZL(r3)
+        PPC_LL  r0,3*SZL(r3)
        mtcrf   0x38,r0
-        LDL     r0,0(r3)
+        PPC_LL  r0,0(r3)
-        LDL     r1,SZL(r3)
+        PPC_LL  r1,SZL(r3)
-        LDL     r2,2*SZL(r3)
+        PPC_LL  r2,2*SZL(r3)
        mtlr    r0
        mr      r3,r4
        blr
@@ -84,52 +84,52 @@ _GLOBAL(xmon_longjmp)
 * different ABIs, though).
 */
 _GLOBAL(xmon_save_regs)
-        STL     r0,0*SZL(r3)
+        PPC_STL r0,0*SZL(r3)
-        STL     r2,2*SZL(r3)
+        PPC_STL r2,2*SZL(r3)
-        STL     r3,3*SZL(r3)
+        PPC_STL r3,3*SZL(r3)
-        STL     r4,4*SZL(r3)
+        PPC_STL r4,4*SZL(r3)
-        STL     r5,5*SZL(r3)
+        PPC_STL r5,5*SZL(r3)
-        STL     r6,6*SZL(r3)
+        PPC_STL r6,6*SZL(r3)
-        STL     r7,7*SZL(r3)
+        PPC_STL r7,7*SZL(r3)
-        STL     r8,8*SZL(r3)
+        PPC_STL r8,8*SZL(r3)
-        STL     r9,9*SZL(r3)
+        PPC_STL r9,9*SZL(r3)
-        STL     r10,10*SZL(r3)
+        PPC_STL r10,10*SZL(r3)
-        STL     r11,11*SZL(r3)
+        PPC_STL r11,11*SZL(r3)
-        STL     r12,12*SZL(r3)
+        PPC_STL r12,12*SZL(r3)
-        STL     r13,13*SZL(r3)
+        PPC_STL r13,13*SZL(r3)
-        STL     r14,14*SZL(r3)
+        PPC_STL r14,14*SZL(r3)
-        STL     r15,15*SZL(r3)
+        PPC_STL r15,15*SZL(r3)
-        STL     r16,16*SZL(r3)
+        PPC_STL r16,16*SZL(r3)
-        STL     r17,17*SZL(r3)
+        PPC_STL r17,17*SZL(r3)
-        STL     r18,18*SZL(r3)
+        PPC_STL r18,18*SZL(r3)
-        STL     r19,19*SZL(r3)
+        PPC_STL r19,19*SZL(r3)
-        STL     r20,20*SZL(r3)
+        PPC_STL r20,20*SZL(r3)
-        STL     r21,21*SZL(r3)
+        PPC_STL r21,21*SZL(r3)
-        STL     r22,22*SZL(r3)
+        PPC_STL r22,22*SZL(r3)
-        STL     r23,23*SZL(r3)
+        PPC_STL r23,23*SZL(r3)
-        STL     r24,24*SZL(r3)
+        PPC_STL r24,24*SZL(r3)
-        STL     r25,25*SZL(r3)
+        PPC_STL r25,25*SZL(r3)
-        STL     r26,26*SZL(r3)
+        PPC_STL r26,26*SZL(r3)
-        STL     r27,27*SZL(r3)
+        PPC_STL r27,27*SZL(r3)
-        STL     r28,28*SZL(r3)
+        PPC_STL r28,28*SZL(r3)
-        STL     r29,29*SZL(r3)
+        PPC_STL r29,29*SZL(r3)
-        STL     r30,30*SZL(r3)
+        PPC_STL r30,30*SZL(r3)
-        STL     r31,31*SZL(r3)
+        PPC_STL r31,31*SZL(r3)
        /* go up one stack frame for SP */
-        LDL     r4,0(r1)
+        PPC_LL  r4,0(r1)
-        STL     r4,1*SZL(r3)
+        PPC_STL r4,1*SZL(r3)
        /* get caller's LR */
-        LDL     r0,LRSAVE(r4)
+        PPC_LL  r0,LRSAVE(r4)
-        STL     r0,_NIP-STACK_FRAME_OVERHEAD(r3)
+        PPC_STL r0,_NIP-STACK_FRAME_OVERHEAD(r3)
-        STL     r0,_LINK-STACK_FRAME_OVERHEAD(r3)
+        PPC_STL r0,_LINK-STACK_FRAME_OVERHEAD(r3)
        mfmsr   r0
-        STL     r0,_MSR-STACK_FRAME_OVERHEAD(r3)
+        PPC_STL r0,_MSR-STACK_FRAME_OVERHEAD(r3)
        mfctr   r0
-        STL     r0,_CTR-STACK_FRAME_OVERHEAD(r3)
+        PPC_STL r0,_CTR-STACK_FRAME_OVERHEAD(r3)
        mfxer   r0
-        STL     r0,_XER-STACK_FRAME_OVERHEAD(r3)
+        PPC_STL r0,_XER-STACK_FRAME_OVERHEAD(r3)
        mfcr    r0
-        STL     r0,_CCR-STACK_FRAME_OVERHEAD(r3)
+        PPC_STL r0,_CCR-STACK_FRAME_OVERHEAD(r3)
        li      r0,0
-        STL     r0,_TRAP-STACK_FRAME_OVERHEAD(r3)
+        PPC_STL r0,_TRAP-STACK_FRAME_OVERHEAD(r3)
        blr
diff --git a/arch/powerpc/xmon/start_32.c b/arch/powerpc/xmon/start_32.c
index 69b658c0f760..c2464df4217e 100644
--- a/arch/powerpc/xmon/start_32.c
+++ b/arch/powerpc/xmon/start_32.c
@@ -11,7 +11,6 @@
 #include <linux/cuda.h>
 #include <linux/kernel.h>
 #include <linux/errno.h>
-#include <linux/sysrq.h>
 #include <linux/bitops.h>
 #include <asm/xmon.h>
 #include <asm/prom.h>
@@ -22,10 +21,11 @@
 #include <asm/processor.h>
 #include <asm/delay.h>
 #include <asm/btext.h>
+#include <asm/time.h>
+#include "nonstdio.h"
 static volatile unsigned char __iomem *sccc, *sccd;
 unsigned int TXRDY, RXRDY, DLAB;
-static int xmon_expect(const char *str, unsigned int timeout);
 static int use_serial;
 static int use_screen;
@@ -33,16 +33,6 @@ static int via_modem;
 static int xmon_use_sccb;
 static struct device_node *channel_node;
-#define TB_SPEED        25000000
-static inline unsigned int readtb(void)
-{
-        unsigned int ret;
-        asm volatile("mftb %0" : "=r" (ret) :);
-        return ret;
-}
 void buf_access(void)
 {
        if (DLAB)
@@ -91,23 +81,7 @@ static unsigned long chrp_find_phys_io_base(void)
 }
 #endif /* CONFIG_PPC_CHRP */
-#ifdef CONFIG_MAGIC_SYSRQ
+void xmon_map_scc(void)
-static void sysrq_handle_xmon(int key, struct pt_regs *regs,
-                              struct tty_struct *tty)
-{
-        xmon(regs);
-}
-static struct sysrq_key_op sysrq_xmon_op =
-{
-        .handler =      sysrq_handle_xmon,
-        .help_msg =     "Xmon",
-        .action_msg =   "Entering xmon",
-};
-#endif
-void
-xmon_map_scc(void)
 {
 #ifdef CONFIG_PPC_MULTIPLATFORM
        volatile unsigned char __iomem *base;
@@ -217,8 +191,6 @@ xmon_map_scc(void)
        RXRDY = 1;
        DLAB = 0x80;
 #endif /* platform */
-        register_sysrq_key('x', &sysrq_xmon_op);
 }
 static int scc_initialized = 0;
@@ -238,8 +210,7 @@ static inline void do_poll_adb(void)
 #endif /* CONFIG_ADB_CUDA */
 }
-int
+int xmon_write(void *ptr, int nb)
-xmon_write(void *handle, void *ptr, int nb)
 {
        char *p = ptr;
        int i, c, ct;
@@ -311,8 +282,7 @@ static unsigned char xmon_shift_keytab[128] =
        "\0.\0*\0+\0\0\0\0\0/\r\0-\0"                   /* 0x40 - 0x4f */
        "\0\0000123456789\0\0\0";                       /* 0x50 - 0x5f */
-static int
+static int xmon_get_adb_key(void)
-xmon_get_adb_key(void)
 {
        int k, t, on;
@@ -350,32 +320,21 @@ xmon_get_adb_key(void)
 }
 #endif /* CONFIG_BOOTX_TEXT */
-int
+int xmon_readchar(void)
-xmon_read(void *handle, void *ptr, int nb)
 {
-    char *p = ptr;
-    int i;
 #ifdef CONFIG_BOOTX_TEXT
-    if (use_screen) {
+        if (use_screen)
-        for (i = 0; i < nb; ++i)
+                return xmon_get_adb_key();
-            *p++ = xmon_get_adb_key();
-        return i;
-    }
 #endif
-    if (!scc_initialized)
+        if (!scc_initialized)
-        xmon_init_scc();
+                xmon_init_scc();
-    for (i = 0; i < nb; ++i) {
        while ((*sccc & RXRDY) == 0)
-            do_poll_adb();
+                do_poll_adb();
        buf_access();
-        *p++ = *sccd;
+        return *sccd;
-    }
-    return i;
 }
-int
+int xmon_read_poll(void)
-xmon_read_poll(void)
 {
        if ((*sccc & RXRDY) == 0) {
                do_poll_adb();
@@ -395,8 +354,7 @@ static unsigned char scc_inittab[] = {
    3,  0xc1,           /* rx enable, 8 bits */
 };
-void
+void xmon_init_scc(void)
-xmon_init_scc(void)
 {
        if ( _machine == _MACH_chrp )
        {
@@ -410,6 +368,7 @@ xmon_init_scc(void)
        else if ( _machine == _MACH_Pmac )
        {
                int i, x;
+                unsigned long timeout;
                if (channel_node != 0)
                        pmac_call_feature(
@@ -424,8 +383,12 @@ xmon_init_scc(void)
                                PMAC_FTR_MODEM_ENABLE,
                                channel_node, 0, 1);
                        printk(KERN_INFO "Modem powered up by debugger !\n");
-                        t0 = readtb();
+                        t0 = get_tbl();
-                        while (readtb() - t0 < 3*TB_SPEED)
+                        timeout = 3 * tb_ticks_per_sec;
+                        if (timeout == 0)
+                                /* assume 25MHz if tb_ticks_per_sec not set */
+                                timeout = 75000000;
+                        while (get_tbl() - t0 < timeout)
                                eieio();
                }
                /* use the B channel if requested */
@@ -447,164 +410,19 @@ xmon_init_scc(void)
        scc_initialized = 1;
        if (via_modem) {
                for (;;) {
-                        xmon_write(NULL, "ATE1V1\r", 7);
+                        xmon_write("ATE1V1\r", 7);
                        if (xmon_expect("OK", 5)) {
-                                xmon_write(NULL, "ATA\r", 4);
+                                xmon_write("ATA\r", 4);
                                if (xmon_expect("CONNECT", 40))
                                        break;
                        }
-                        xmon_write(NULL, "+++", 3);
+                        xmon_write("+++", 3);
                        xmon_expect("OK", 3);
                }
        }
 }
-void *xmon_stdin;
+void xmon_enter(void)
-void *xmon_stdout;
-void *xmon_stderr;
-int xmon_putc(int c, void *f)
-{
-    char ch = c;
-    if (c == '\n')
-        xmon_putc('\r', f);
-    return xmon_write(f, &ch, 1) == 1? c: -1;
-}
-int xmon_putchar(int c)
-{
-        return xmon_putc(c, xmon_stdout);
-}
-int xmon_fputs(char *str, void *f)
-{
-        int n = strlen(str);
-        return xmon_write(f, str, n) == n? 0: -1;
-}
-int
-xmon_readchar(void)
-{
-        char ch;
-        for (;;) {
-                switch (xmon_read(xmon_stdin, &ch, 1)) {
-                case 1:
-                        return ch;
-                case -1:
-                        xmon_printf("read(stdin) returned -1\r\n", 0, 0);
-                        return -1;
-                }
-        }
-}
-static char line[256];
-static char *lineptr;
-static int lineleft;
-int xmon_expect(const char *str, unsigned int timeout)
-{
-        int c;
-        unsigned int t0;
-        timeout *= TB_SPEED;
-        t0 = readtb();
-        do {
-                lineptr = line;
-                for (;;) {
-                        c = xmon_read_poll();
-                        if (c == -1) {
-                                if (readtb() - t0 > timeout)
-                                        return 0;
-                                continue;
-                        }
-                        if (c == '\n')
-                                break;
-                        if (c != '\r' && lineptr < &line[sizeof(line) - 1])
-                                *lineptr++ = c;
-                }
-                *lineptr = 0;
-        } while (strstr(line, str) == NULL);
-        return 1;
-}
-int
-xmon_getchar(void)
-{
-    int c;
-    if (lineleft == 0) {
-        lineptr = line;
-        for (;;) {
-            c = xmon_readchar();
-            if (c == -1 || c == 4)
-                break;
-            if (c == '\r' || c == '\n') {
-                *lineptr++ = '\n';
-                xmon_putchar('\n');
-                break;
-            }
-            switch (c) {
-            case 0177:
-            case '\b':
-                if (lineptr > line) {
-                    xmon_putchar('\b');
-                    xmon_putchar(' ');
-                    xmon_putchar('\b');
-                    --lineptr;
-                }
-                break;
-            case 'U' & 0x1F:
-                while (lineptr > line) {
-                    xmon_putchar('\b');
-                    xmon_putchar(' ');
-                    xmon_putchar('\b');
-                    --lineptr;
-                }
-                break;
-            default:
-                if (lineptr >= &line[sizeof(line) - 1])
-                    xmon_putchar('\a');
-                else {
-                    xmon_putchar(c);
-                    *lineptr++ = c;
-                }
-            }
-        }
-        lineleft = lineptr - line;
-        lineptr = line;
-    }
-    if (lineleft == 0)
-        return -1;
-    --lineleft;
-    return *lineptr++;
-}
-char *
-xmon_fgets(char *str, int nb, void *f)
-{
-    char *p;
-    int c;
-    for (p = str; p < str + nb - 1; ) {
-        c = xmon_getchar();
-        if (c == -1) {
-            if (p == str)
-                return NULL;
-            break;
-        }
-        *p++ = c;
-        if (c == '\n')
-            break;
-    }
-    *p = 0;
-    return str;
-}
-void
-xmon_enter(void)
 {
 #ifdef CONFIG_ADB_PMU
        if (_machine == _MACH_Pmac) {
@@ -613,8 +431,7 @@ xmon_enter(void)
 #endif
 }
-void
+void xmon_leave(void)
-xmon_leave(void)
 {
 #ifdef CONFIG_ADB_PMU
        if (_machine == _MACH_Pmac) {
diff --git a/arch/powerpc/xmon/start_64.c b/arch/powerpc/xmon/start_64.c
index e50c158191e1..712552c4f242 100644
--- a/arch/powerpc/xmon/start_64.c
+++ b/arch/powerpc/xmon/start_64.c
@@ -6,182 +6,29 @@
 *      as published by the Free Software Foundation; either version
 *      2 of the License, or (at your option) any later version.
 */
-#include <linux/config.h>
-#include <linux/string.h>
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/sysrq.h>
-#include <linux/init.h>
 #include <asm/machdep.h>
-#include <asm/io.h>
-#include <asm/page.h>
-#include <asm/prom.h>
-#include <asm/processor.h>
 #include <asm/udbg.h>
-#include <asm/system.h>
 #include "nonstdio.h"
-#ifdef CONFIG_MAGIC_SYSRQ
+void xmon_map_scc(void)
-static void sysrq_handle_xmon(int key, struct pt_regs *pt_regs,
-                              struct tty_struct *tty) 
-{
-        /* ensure xmon is enabled */
-        xmon_init(1);
-        debugger(pt_regs);
-}
-static struct sysrq_key_op sysrq_xmon_op = 
 {
-        .handler =      sysrq_handle_xmon,
-        .help_msg =     "Xmon",
-        .action_msg =   "Entering xmon",
-};
-static int __init setup_xmon_sysrq(void)
-{
-        register_sysrq_key('x', &sysrq_xmon_op);
-        return 0;
 }
-__initcall(setup_xmon_sysrq);
-#endif /* CONFIG_MAGIC_SYSRQ */
-int
+int xmon_write(void *ptr, int nb)
-xmon_write(void *handle, void *ptr, int nb)
 {
        return udbg_write(ptr, nb);
 }
-int
+int xmon_readchar(void)
-xmon_read(void *handle, void *ptr, int nb)
 {
-        return udbg_read(ptr, nb);
+        if (udbg_getc)
+                return udbg_getc();
+        return -1;
 }
-int
+int xmon_read_poll(void)
-xmon_read_poll(void)
 {
        if (udbg_getc_poll)
                return udbg_getc_poll();
        return -1;
 }
- 
-FILE *xmon_stdin;
-FILE *xmon_stdout;
-int
-xmon_putc(int c, void *f)
-{
-        char ch = c;
-        if (c == '\n')
-                xmon_putc('\r', f);
-        return xmon_write(f, &ch, 1) == 1? c: -1;
-}
-int
-xmon_putchar(int c)
-{
-        return xmon_putc(c, xmon_stdout);
-}
-int
-xmon_fputs(char *str, void *f)
-{
-        int n = strlen(str);
-        return xmon_write(f, str, n) == n? 0: -1;
-}
-int
-xmon_readchar(void)
-{
-        char ch;
-        for (;;) {
-                switch (xmon_read(xmon_stdin, &ch, 1)) {
-                case 1:
-                        return ch;
-                case -1:
-                        xmon_printf("read(stdin) returned -1\r\n", 0, 0);
-                        return -1;
-                }
-        }
-}
-static char line[256];
-static char *lineptr;
-static int lineleft;
-int
-xmon_getchar(void)
-{
-        int c;
-        if (lineleft == 0) {
-                lineptr = line;
-                for (;;) {
-                        c = xmon_readchar();
-                        if (c == -1 || c == 4)
-                                break;
-                        if (c == '\r' || c == '\n') {
-                                *lineptr++ = '\n';
-                                xmon_putchar('\n');
-                                break;
-                        }
-                        switch (c) {
-                        case 0177:
-                        case '\b':
-                                if (lineptr > line) {
-                                        xmon_putchar('\b');
-                                        xmon_putchar(' ');
-                                        xmon_putchar('\b');
-                                        --lineptr;
-                                }
-                                break;
-                        case 'U' & 0x1F:
-                                while (lineptr > line) {
-                                        xmon_putchar('\b');
-                                        xmon_putchar(' ');
-                                        xmon_putchar('\b');
-                                        --lineptr;
-                                }
-                                break;
-                        default:
-                                if (lineptr >= &line[sizeof(line) - 1])
-                                        xmon_putchar('\a');
-                                else {
-                                        xmon_putchar(c);
-                                        *lineptr++ = c;
-                                }
-                        }
-                }
-                lineleft = lineptr - line;
-                lineptr = line;
-        }
-        if (lineleft == 0)
-                return -1;
-        --lineleft;
-        return *lineptr++;
-}
-char *
-xmon_fgets(char *str, int nb, void *f)
-{
-        char *p;
-        int c;
-        for (p = str; p < str + nb - 1; ) {
-                c = xmon_getchar();
-                if (c == -1) {
-                        if (p == str)
-                                return NULL;
-                        break;
-                }
-                *p++ = c;
-                if (c == '\n')
-                        break;
-        }
-        *p = 0;
-        return str;
-}
diff --git a/arch/powerpc/xmon/start_8xx.c b/arch/powerpc/xmon/start_8xx.c
index a48bd594cf61..4c17b0486ad5 100644
--- a/arch/powerpc/xmon/start_8xx.c
+++ b/arch/powerpc/xmon/start_8xx.c
@@ -15,273 +15,30 @@
 #include <asm/8xx_immap.h>
 #include <asm/mpc8xx.h>
 #include <asm/commproc.h>
+#include "nonstdio.h"
-extern void xmon_printf(const char *fmt, ...);
 extern int xmon_8xx_write(char *str, int nb);
 extern int xmon_8xx_read_poll(void);
 extern int xmon_8xx_read_char(void);
-void prom_drawhex(uint);
-void prom_drawstring(const char *str);
-static int use_screen = 1; /* default */
+void xmon_map_scc(void)
-#define TB_SPEED        25000000
-static inline unsigned int readtb(void)
-{
-        unsigned int ret;
-        asm volatile("mftb %0" : "=r" (ret) :);
-        return ret;
-}
-void buf_access(void)
-{
-}
-void
-xmon_map_scc(void)
 {
        cpmp = (cpm8xx_t *)&(((immap_t *)IMAP_ADDR)->im_cpm);
-        use_screen = 0;
-        
-        prom_drawstring("xmon uses serial port\n");
 }
-static int scc_initialized = 0;
 void xmon_init_scc(void);
-int
+int xmon_write(void *ptr, int nb)
-xmon_write(void *handle, void *ptr, int nb)
 {
-        char *p = ptr;
-        int i, c, ct;
-        if (!scc_initialized)
-                xmon_init_scc();
        return(xmon_8xx_write(ptr, nb));
 }
-int xmon_wants_key;
+int xmon_readchar(void)
-int
-xmon_read(void *handle, void *ptr, int nb)
 {
-        char *p = ptr;
+        return xmon_8xx_read_char();
-        int i;
-        if (!scc_initialized)
-                xmon_init_scc();
-        for (i = 0; i < nb; ++i) {
-                *p++ = xmon_8xx_read_char();
-        }
-        return i;
 }
-int
+int xmon_read_poll(void)
-xmon_read_poll(void)
 {
        return(xmon_8xx_read_poll());
 }
-void
-xmon_init_scc()
-{
-        scc_initialized = 1;
-}
-#if 0
-extern int (*prom_entry)(void *);
-int
-xmon_exit(void)
-{
-    struct prom_args {
-        char *service;
-    } args;
-    for (;;) {
-        args.service = "exit";
-        (*prom_entry)(&args);
-    }
-}
-#endif
-void *xmon_stdin;
-void *xmon_stdout;
-void *xmon_stderr;
-void
-xmon_init(void)
-{
-}
-int
-xmon_putc(int c, void *f)
-{
-    char ch = c;
-    if (c == '\n')
-        xmon_putc('\r', f);
-    return xmon_write(f, &ch, 1) == 1? c: -1;
-}
-int
-xmon_putchar(int c)
-{
-    return xmon_putc(c, xmon_stdout);
-}
-int
-xmon_fputs(char *str, void *f)
-{
-    int n = strlen(str);
-    return xmon_write(f, str, n) == n? 0: -1;
-}
-int
-xmon_readchar(void)
-{
-    char ch;
-    for (;;) {
-        switch (xmon_read(xmon_stdin, &ch, 1)) {
-        case 1:
-            return ch;
-        case -1:
-            xmon_printf("read(stdin) returned -1\r\n", 0, 0);
-            return -1;
-        }
-    }
-}
-static char line[256];
-static char *lineptr;
-static int lineleft;
-#if 0
-int xmon_expect(const char *str, unsigned int timeout)
-{
-        int c;
-        unsigned int t0;
-        timeout *= TB_SPEED;
-        t0 = readtb();
-        do {
-                lineptr = line;
-                for (;;) {
-                        c = xmon_read_poll();
-                        if (c == -1) {
-                                if (readtb() - t0 > timeout)
-                                        return 0;
-                                continue;
-                        }
-                        if (c == '\n')
-                                break;
-                        if (c != '\r' && lineptr < &line[sizeof(line) - 1])
-                                *lineptr++ = c;
-                }
-                *lineptr = 0;
-        } while (strstr(line, str) == NULL);
-        return 1;
-}
-#endif
-int
-xmon_getchar(void)
-{
-    int c;
-    if (lineleft == 0) {
-        lineptr = line;
-        for (;;) {
-            c = xmon_readchar();
-            if (c == -1 || c == 4)
-                break;
-            if (c == '\r' || c == '\n') {
-                *lineptr++ = '\n';
-                xmon_putchar('\n');
-                break;
-            }
-            switch (c) {
-            case 0177:
-            case '\b':
-                if (lineptr > line) {
-                    xmon_putchar('\b');
-                    xmon_putchar(' ');
-                    xmon_putchar('\b');
-                    --lineptr;
-                }
-                break;
-            case 'U' & 0x1F:
-                while (lineptr > line) {
-                    xmon_putchar('\b');
-                    xmon_putchar(' ');
-                    xmon_putchar('\b');
-                    --lineptr;
-                }
-                break;
-            default:
-                if (lineptr >= &line[sizeof(line) - 1])
-                    xmon_putchar('\a');
-                else {
-                    xmon_putchar(c);
-                    *lineptr++ = c;
-                }
-            }
-        }
-        lineleft = lineptr - line;
-        lineptr = line;
-    }
-    if (lineleft == 0)
-        return -1;
-    --lineleft;
-    return *lineptr++;
-}
-char *
-xmon_fgets(char *str, int nb, void *f)
-{
-    char *p;
-    int c;
-    for (p = str; p < str + nb - 1; ) {
-        c = xmon_getchar();
-        if (c == -1) {
-            if (p == str)
-                return 0;
-            break;
-        }
-        *p++ = c;
-        if (c == '\n')
-            break;
-    }
-    *p = 0;
-    return str;
-}
-void
-prom_drawhex(uint val)
-{
-        unsigned char buf[10];
-        int i;
-        for (i = 7;  i >= 0;  i--)
-        {
-                buf[i] = "0123456789abcdef"[val & 0x0f];
-                val >>= 4;
-        }
-        buf[8] = '\0';
-        xmon_fputs(buf, xmon_stdout);
-}
-void
-prom_drawstring(const char *str)
-{
-        xmon_fputs(str, xmon_stdout);
-}
diff --git a/arch/powerpc/xmon/subr_prf.c b/arch/powerpc/xmon/subr_prf.c
deleted file mode 100644
index b48738c6dd33..000000000000
--- a/arch/powerpc/xmon/subr_prf.c
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
- * Written by Cort Dougan to replace the version originally used
- * by Paul Mackerras, which came from NetBSD and thus had copyright
- * conflicts with Linux.
- *
- * This file makes liberal use of the standard linux utility
- * routines to reduce the size of the binary.  We assume we can
- * trust some parts of Linux inside the debugger.
- *   -- Cort (cort@cs.nmt.edu)
- *
- * Copyright (C) 1999 Cort Dougan.
- *
- *      This program is free software; you can redistribute it and/or
- *      modify it under the terms of the GNU General Public License
- *      as published by the Free Software Foundation; either version
- *      2 of the License, or (at your option) any later version.
- */
-#include <linux/kernel.h>
-#include <linux/string.h>
-#include <linux/module.h>
-#include <stdarg.h>
-#include "nonstdio.h"
-extern int xmon_write(void *, void *, int);
-void xmon_vfprintf(void *f, const char *fmt, va_list ap)
-{
-        static char xmon_buf[2048];
-        int n;
-        n = vsprintf(xmon_buf, fmt, ap);
-        xmon_write(f, xmon_buf, n);
-}
-void xmon_printf(const char *fmt, ...)
-{
-        va_list ap;
-        va_start(ap, fmt);
-        xmon_vfprintf(stdout, fmt, ap);
-        va_end(ap);
-}
-EXPORT_SYMBOL(xmon_printf);
-void xmon_fprintf(void *f, const char *fmt, ...)
-{
-        va_list ap;
-        va_start(ap, fmt);
-        xmon_vfprintf(f, fmt, ap);
-        va_end(ap);
-}
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index 1124f1146202..ef4356b29a97 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -1,7 +1,7 @@
 /*
 * Routines providing a simple monitor for use on the PowerMac.
 *
- * Copyright (C) 1996 Paul Mackerras.
+ * Copyright (C) 1996-2005 Paul Mackerras.
 *
 *      This program is free software; you can redistribute it and/or
 *      modify it under the terms of the GNU General Public License
@@ -18,6 +18,7 @@
 #include <linux/kallsyms.h>
 #include <linux/cpumask.h>
 #include <linux/module.h>
+#include <linux/sysrq.h>
 #include <asm/ptrace.h>
 #include <asm/string.h>
@@ -144,15 +145,10 @@ static void xmon_print_symbol(unsigned long address, const char *mid,
 static const char *getvecname(unsigned long vec);
 extern int print_insn_powerpc(unsigned long, unsigned long, int);
-extern void printf(const char *fmt, ...);
-extern void xmon_vfprintf(void *f, const char *fmt, va_list ap);
-extern int xmon_putc(int c, void *f);
-extern int putchar(int ch);
 extern void xmon_enter(void);
 extern void xmon_leave(void);
-extern int xmon_read_poll(void);
 extern long setjmp(long *);
 extern void longjmp(long *, long);
 extern void xmon_save_regs(struct pt_regs *);
@@ -748,7 +744,6 @@ cmds(struct pt_regs *excp)
                printf("%x:", smp_processor_id());
 #endif /* CONFIG_SMP */
                printf("mon> ");
-                fflush(stdout);
                flush_input();
                termch = 0;
                cmd = skipbl();
@@ -1472,17 +1467,23 @@ read_spr(int n)
 {
        unsigned int instrs[2];
        unsigned long (*code)(void);
-        unsigned long opd[3];
        unsigned long ret = -1UL;
+#ifdef CONFIG_PPC64
+        unsigned long opd[3];
-        instrs[0] = 0x7c6002a6 + ((n & 0x1F) << 16) + ((n & 0x3e0) << 6);
-        instrs[1] = 0x4e800020;
        opd[0] = (unsigned long)instrs;
        opd[1] = 0;
        opd[2] = 0;
+        code = (unsigned long (*)(void)) opd;
+#else
+        code = (unsigned long (*)(void)) instrs;
+#endif
+        /* mfspr r3,n; blr */
+        instrs[0] = 0x7c6002a6 + ((n & 0x1F) << 16) + ((n & 0x3e0) << 6);
+        instrs[1] = 0x4e800020;
        store_inst(instrs);
        store_inst(instrs+1);
-        code = (unsigned long (*)(void)) opd;
        if (setjmp(bus_error_jmp) == 0) {
                catch_memory_errors = 1;
@@ -1504,16 +1505,21 @@ write_spr(int n, unsigned long val)
 {
        unsigned int instrs[2];
        unsigned long (*code)(unsigned long);
+#ifdef CONFIG_PPC64
        unsigned long opd[3];
-        instrs[0] = 0x7c6003a6 + ((n & 0x1F) << 16) + ((n & 0x3e0) << 6);
-        instrs[1] = 0x4e800020;
        opd[0] = (unsigned long)instrs;
        opd[1] = 0;
        opd[2] = 0;
+        code = (unsigned long (*)(unsigned long)) opd;
+#else
+        code = (unsigned long (*)(unsigned long)) instrs;
+#endif
+        instrs[0] = 0x7c6003a6 + ((n & 0x1F) << 16) + ((n & 0x3e0) << 6);
+        instrs[1] = 0x4e800020;
        store_inst(instrs);
        store_inst(instrs+1);
-        code = (unsigned long (*)(unsigned long)) opd;
        if (setjmp(bus_error_jmp) == 0) {
                catch_memory_errors = 1;
@@ -1797,7 +1803,7 @@ memex(void)
        for(;;){
                if (!mnoread)
                        n = mread(adrs, val, size);
-                printf("%.16x%c", adrs, brev? 'r': ' ');
+                printf(REG"%c", adrs, brev? 'r': ' ');
                if (!mnoread) {
                        if (brev)
                                byterev(val, size);
@@ -1976,17 +1982,18 @@ prdump(unsigned long adrs, long ndump)
                nr = mread(adrs, temp, r);
                adrs += nr;
                for (m = 0; m < r; ++m) {
-                        if ((m & 7) == 0 && m > 0)
+                        if ((m & (sizeof(long) - 1)) == 0 && m > 0)
-                            putchar(' ');
+                                putchar(' ');
                        if (m < nr)
                                printf("%.2x", temp[m]);
                        else
                                printf("%s", fault_chars[fault_type]);
                }
-                if (m <= 8)
+                for (; m < 16; ++m) {
-                        printf(" ");
+                        if ((m & (sizeof(long) - 1)) == 0)
-                for (; m < 16; ++m)
+                                putchar(' ');
                        printf("  ");
+                }
                printf("  |");
                for (m = 0; m < r; ++m) {
                        if (m < nr) {
@@ -2151,7 +2158,6 @@ memzcan(void)
                ok = mread(a, &v, 1);
                if (ok && !ook) {
                        printf("%.8x .. ", a);
-                        fflush(stdout);
                } else if (!ok && ook)
                        printf("%.8x\n", a - mskip);
                ook = ok;
@@ -2372,7 +2378,7 @@ int
 inchar(void)
 {
        if (lineptr == NULL || *lineptr == 0) {
-                if (fgets(line, sizeof(line), stdin) == NULL) {
+                if (xmon_gets(line, sizeof(line)) == NULL) {
                        lineptr = NULL;
                        return EOF;
                }
@@ -2526,4 +2532,29 @@ void xmon_init(int enable)
                __debugger_dabr_match = NULL;
                __debugger_fault_handler = NULL;
        }
+        xmon_map_scc();
+}
+#ifdef CONFIG_MAGIC_SYSRQ
+static void sysrq_handle_xmon(int key, struct pt_regs *pt_regs,
+                              struct tty_struct *tty) 
+{
+        /* ensure xmon is enabled */
+        xmon_init(1);
+        debugger(pt_regs);
+}
+static struct sysrq_key_op sysrq_xmon_op = 
+{
+        .handler =      sysrq_handle_xmon,
+        .help_msg =     "Xmon",
+        .action_msg =   "Entering xmon",
+};
+static int __init setup_xmon_sysrq(void)
+{
+        register_sysrq_key('x', &sysrq_xmon_op);
+        return 0;
 }
+__initcall(setup_xmon_sysrq);
+#endif /* CONFIG_MAGIC_SYSRQ */
diff --git a/arch/ppc/boot/include/of1275.h b/arch/ppc/boot/include/of1275.h
index 69173df76db0..4ed88acfa73a 100644
--- a/arch/ppc/boot/include/of1275.h
+++ b/arch/ppc/boot/include/of1275.h
@@ -19,6 +19,9 @@ extern prom_entry of_prom_entry;
 /* function declarations */
+int     call_prom(const char *service, int nargs, int nret, ...);
+int     call_prom_ret(const char *service, int nargs, int nret,
+                      unsigned int *rets, ...);
 void *  claim(unsigned int virt, unsigned int size, unsigned int align);
 int     map(unsigned int phys, unsigned int virt, unsigned int size);
 void    enter(void);
diff --git a/arch/ppc/boot/of1275/Makefile b/arch/ppc/boot/of1275/Makefile
index 02e6f235d7cb..0b979c004972 100644
--- a/arch/ppc/boot/of1275/Makefile
+++ b/arch/ppc/boot/of1275/Makefile
@@ -3,4 +3,4 @@
 #
 lib-y := claim.o enter.o exit.o finddevice.o getprop.o ofinit.o \
-         ofstdio.o read.o release.o write.o map.o
+         ofstdio.o read.o release.o write.o map.o call_prom.o
diff --git a/arch/ppc/boot/of1275/call_prom.c b/arch/ppc/boot/of1275/call_prom.c
new file mode 100644
index 000000000000..9479a3a2b8c7
--- /dev/null
+++ b/arch/ppc/boot/of1275/call_prom.c
@@ -0,0 +1,74 @@
+/*
+ * Copyright (C) 1996-2005 Paul Mackerras.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "of1275.h"
+#include <stdarg.h>
+int call_prom(const char *service, int nargs, int nret, ...)
+{
+        int i;
+        struct prom_args {
+                const char *service;
+                int nargs;
+                int nret;
+                unsigned int args[12];
+        } args;
+        va_list list;
+        args.service = service;
+        args.nargs = nargs;
+        args.nret = nret;
+        va_start(list, nret);
+        for (i = 0; i < nargs; i++)
+                args.args[i] = va_arg(list, unsigned int);
+        va_end(list);
+        for (i = 0; i < nret; i++)
+                args.args[nargs+i] = 0;
+        if (of_prom_entry(&args) < 0)
+                return -1;
+        return (nret > 0)? args.args[nargs]: 0;
+}
+int call_prom_ret(const char *service, int nargs, int nret,
+                  unsigned int *rets, ...)
+{
+        int i;
+        struct prom_args {
+                const char *service;
+                int nargs;
+                int nret;
+                unsigned int args[12];
+        } args;
+        va_list list;
+        args.service = service;
+        args.nargs = nargs;
+        args.nret = nret;
+        va_start(list, rets);
+        for (i = 0; i < nargs; i++)
+                args.args[i] = va_arg(list, unsigned int);
+        va_end(list);
+        for (i = 0; i < nret; i++)
+                args.args[nargs+i] = 0;
+        if (of_prom_entry(&args) < 0)
+                return -1;
+        if (rets != (void *) 0)
+                for (i = 1; i < nret; ++i)
+                        rets[i-1] = args.args[nargs+i];
+        return (nret > 0)? args.args[nargs]: 0;
+}
diff --git a/arch/ppc/boot/of1275/claim.c b/arch/ppc/boot/of1275/claim.c
index 13169a5c4339..1ed3aeeff8ae 100644
--- a/arch/ppc/boot/of1275/claim.c
+++ b/arch/ppc/boot/of1275/claim.c
@@ -9,27 +9,84 @@
 */
 #include "of1275.h"
+#include "nonstdio.h"
-void *
+/*
-claim(unsigned int virt, unsigned int size, unsigned int align)
+ * Older OF's require that when claiming a specific range of addresses,
+ * we claim the physical space in the /memory node and the virtual
+ * space in the chosen mmu node, and then do a map operation to
+ * map virtual to physical.
+ */
+static int need_map = -1;
+static ihandle chosen_mmu;
+static phandle memory;
+/* returns true if s2 is a prefix of s1 */
+static int string_match(const char *s1, const char *s2)
+{
+        for (; *s2; ++s2)
+                if (*s1++ != *s2)
+                        return 0;
+        return 1;
+}
+static int check_of_version(void)
+{
+        phandle oprom, chosen;
+        char version[64];
+        oprom = finddevice("/openprom");
+        if (oprom == OF_INVALID_HANDLE)
+                return 0;
+        if (getprop(oprom, "model", version, sizeof(version)) <= 0)
+                return 0;
+        version[sizeof(version)-1] = 0;
+        printf("OF version = '%s'\n", version);
+        if (!string_match(version, "Open Firmware, 1.")
+            && !string_match(version, "FirmWorks,3."))
+                return 0;
+        chosen = finddevice("/chosen");
+        if (chosen == OF_INVALID_HANDLE) {
+                chosen = finddevice("/chosen@0");
+                if (chosen == OF_INVALID_HANDLE) {
+                        printf("no chosen\n");
+                        return 0;
+                }
+        }
+        if (getprop(chosen, "mmu", &chosen_mmu, sizeof(chosen_mmu)) <= 0) {
+                printf("no mmu\n");
+                return 0;
+        }
+        memory = (ihandle) call_prom("open", 1, 1, "/memory");
+        if (memory == OF_INVALID_HANDLE) {
+                memory = (ihandle) call_prom("open", 1, 1, "/memory@0");
+                if (memory == OF_INVALID_HANDLE) {
+                        printf("no memory node\n");
+                        return 0;
+                }
+        }
+        printf("old OF detected\n");
+        return 1;
+}
+void *claim(unsigned int virt, unsigned int size, unsigned int align)
 {
-    struct prom_args {
+        int ret;
-        char *service;
+        unsigned int result;
-        int nargs;
-        int nret;
-        unsigned int virt;
-        unsigned int size;
-        unsigned int align;
-        void *ret;
-    } args;
-    args.service = "claim";
+        if (need_map < 0)
-    args.nargs = 3;
+                need_map = check_of_version();
-    args.nret = 1;
+        if (align || !need_map)
-    args.virt = virt;
+                return (void *) call_prom("claim", 3, 1, virt, size, align);
-    args.size = size;
+        
-    args.align = align;
+        ret = call_prom_ret("call-method", 5, 2, &result, "claim", memory,
-    args.ret = (void *) 0;
+                            align, size, virt);
-    (*of_prom_entry)(&args);
+        if (ret != 0 || result == -1)
-    return args.ret;
+                return (void *) -1;
+        ret = call_prom_ret("call-method", 5, 2, &result, "claim", chosen_mmu,
+                            align, size, virt);
+        /* 0x12 == coherent + read/write */
+        ret = call_prom("call-method", 6, 1, "map", chosen_mmu,
+                        0x12, size, virt, virt);
+        return virt;
 }
diff --git a/arch/ppc/boot/of1275/finddevice.c b/arch/ppc/boot/of1275/finddevice.c
index 2c0f7cbb793e..0dcb1201b772 100644
--- a/arch/ppc/boot/of1275/finddevice.c
+++ b/arch/ppc/boot/of1275/finddevice.c
@@ -10,22 +10,7 @@
 #include "of1275.h"
-phandle
+phandle finddevice(const char *name)
-finddevice(const char *name)
 {
-    struct prom_args {
+        return (phandle) call_prom("finddevice", 1, 1, name);
-        char *service;
-        int nargs;
-        int nret;
-        const char *devspec;
-        phandle device;
-    } args;
-    args.service = "finddevice";
-    args.nargs = 1;
-    args.nret = 1;
-    args.devspec = name;
-    args.device = OF_INVALID_HANDLE;
-    (*of_prom_entry)(&args);
-    return args.device;
 }
diff --git a/arch/ppc/boot/openfirmware/Makefile b/arch/ppc/boot/openfirmware/Makefile
index 03415238fabf..83a6433459ce 100644
--- a/arch/ppc/boot/openfirmware/Makefile
+++ b/arch/ppc/boot/openfirmware/Makefile
@@ -80,8 +80,7 @@ $(obj)/note: $(utils)/mknote FORCE
        $(call if_changed,mknote)
-$(obj)/coffcrt0.o: EXTRA_AFLAGS := -traditional -DXCOFF
+$(obj)/coffcrt0.o: EXTRA_AFLAGS := -DXCOFF
-$(obj)/crt0.o:     EXTRA_AFLAGS := -traditional
 targets += coffcrt0.o crt0.o
 $(obj)/coffcrt0.o $(obj)/crt0.o: $(common)/crt0.S FORCE
        $(call if_changed_dep,as_o_S)
diff --git a/arch/ppc/configs/mpc834x_sys_defconfig b/arch/ppc/configs/mpc834x_sys_defconfig
index 4a5522ca8207..673dc64ebcb1 100644
--- a/arch/ppc/configs/mpc834x_sys_defconfig
+++ b/arch/ppc/configs/mpc834x_sys_defconfig
@@ -1,16 +1,17 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc4
+# Linux kernel version: 2.6.14
-# Thu Feb 17 16:12:23 2005
+# Mon Nov  7 15:38:29 2005
 #
 CONFIG_MMU=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_RWSEM_XCHGADD_ALGORITHM=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
-CONFIG_HAVE_DEC_LOCK=y
 CONFIG_PPC=y
 CONFIG_PPC32=y
 CONFIG_GENERIC_NVRAM=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
 #
 # Code maturity level options
@@ -18,23 +19,28 @@ CONFIG_GENERIC_NVRAM=y
 CONFIG_EXPERIMENTAL=y
 CONFIG_CLEAN_COMPILE=y
 CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
 #
 # General setup
 #
 CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 # CONFIG_POSIX_MQUEUE is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
 CONFIG_SYSCTL=y
 # CONFIG_AUDIT is not set
-CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_HOTPLUG is not set
 CONFIG_KOBJECT_UEVENT=y
 # CONFIG_IKCONFIG is not set
+CONFIG_INITRAMFS_SOURCE=""
 CONFIG_EMBEDDED=y
 # CONFIG_KALLSYMS is not set
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
 # CONFIG_EPOLL is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -44,6 +50,7 @@ CONFIG_CC_ALIGN_LABELS=0
 CONFIG_CC_ALIGN_LOOPS=0
 CONFIG_CC_ALIGN_JUMPS=0
 # CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
 #
 # Loadable module support
@@ -59,34 +66,84 @@ CONFIG_6xx=y
 # CONFIG_POWER3 is not set
 # CONFIG_POWER4 is not set
 # CONFIG_8xx is not set
+# CONFIG_E200 is not set
 # CONFIG_E500 is not set
+CONFIG_PPC_FPU=y
+# CONFIG_KEXEC is not set
 # CONFIG_CPU_FREQ is not set
+# CONFIG_WANT_EARLY_SERIAL is not set
 CONFIG_PPC_GEN550=y
-CONFIG_83xx=y
-#
-# Freescale 83xx options
-#
-CONFIG_MPC834x_SYS=y
-CONFIG_MPC834x=y
 CONFIG_PPC_STD_MMU=y
 #
 # Platform options
 #
+# CONFIG_PPC_MULTIPLATFORM is not set
+# CONFIG_APUS is not set
+# CONFIG_KATANA is not set
+# CONFIG_WILLOW is not set
+# CONFIG_CPCI690 is not set
+# CONFIG_POWERPMC250 is not set
+# CONFIG_CHESTNUT is not set
+# CONFIG_SPRUCE is not set
+# CONFIG_HDPU is not set
+# CONFIG_EV64260 is not set
+# CONFIG_LOPEC is not set
+# CONFIG_MVME5100 is not set
+# CONFIG_PPLUS is not set
+# CONFIG_PRPMC750 is not set
+# CONFIG_PRPMC800 is not set
+# CONFIG_SANDPOINT is not set
+# CONFIG_RADSTONE_PPC7D is not set
+# CONFIG_PAL4 is not set
+# CONFIG_GEMINI is not set
+# CONFIG_EST8260 is not set
+# CONFIG_SBC82xx is not set
+# CONFIG_SBS8260 is not set
+# CONFIG_RPX8260 is not set
+# CONFIG_TQM8260 is not set
+# CONFIG_ADS8272 is not set
+# CONFIG_PQ2FADS is not set
+# CONFIG_LITE5200 is not set
+CONFIG_MPC834x_SYS=y
+# CONFIG_EV64360 is not set
+CONFIG_83xx=y
+CONFIG_MPC834x=y
 # CONFIG_SMP is not set
-# CONFIG_PREEMPT is not set
 # CONFIG_HIGHMEM is not set
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4
 CONFIG_BINFMT_ELF=y
 # CONFIG_BINFMT_MISC is not set
 # CONFIG_CMDLINE_BOOL is not set
+# CONFIG_PM is not set
+# CONFIG_SOFTWARE_SUSPEND is not set
+CONFIG_SECCOMP=y
+CONFIG_ISA_DMA_API=y
 #
 # Bus options
 #
 CONFIG_GENERIC_ISA_DMA=y
-# CONFIG_PCI is not set
+# CONFIG_PPC_I8259 is not set
-# CONFIG_PCI_DOMAINS is not set
+CONFIG_PPC_INDIRECT_PCI=y
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+# CONFIG_MPC83xx_PCI2 is not set
+CONFIG_PCI_LEGACY_PROC=y
 #
 # PCCARD (PCMCIA/CardBus) support
@@ -94,10 +151,6 @@ CONFIG_GENERIC_ISA_DMA=y
 # CONFIG_PCCARD is not set
 #
-# PC-card bridges
-#
-#
 # Advanced setup
 #
 # CONFIG_ADVANCED_OPTIONS is not set
@@ -112,6 +165,75 @@ CONFIG_TASK_SIZE=0x80000000
 CONFIG_BOOT_LOAD=0x00800000
 #
+# Networking
+#
+CONFIG_NET=y
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_BIC=y
+# CONFIG_IPV6 is not set
+# CONFIG_NETFILTER is not set
+#
+# DCCP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_DCCP is not set
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_NET_CLS_ROUTE is not set
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_IEEE80211 is not set
+#
 # Device Drivers
 #
@@ -123,6 +245,11 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_FW_LOADER is not set
 #
+# Connector - unified userspace <-> kernelspace linker
+#
+# CONFIG_CONNECTOR is not set
+#
 # Memory Technology Devices (MTD)
 #
 # CONFIG_MTD is not set
@@ -140,15 +267,19 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 # Block devices
 #
 # CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
 # CONFIG_BLK_DEV_COW_COMMON is not set
 CONFIG_BLK_DEV_LOOP=y
 # CONFIG_BLK_DEV_CRYPTOLOOP is not set
 # CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=16
 CONFIG_BLK_DEV_RAM_SIZE=32768
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_INITRAMFS_SOURCE=""
 # CONFIG_LBD is not set
 # CONFIG_CDROM_PKTCDVD is not set
@@ -159,6 +290,11 @@ CONFIG_IOSCHED_NOOP=y
 CONFIG_IOSCHED_AS=y
 CONFIG_IOSCHED_DEADLINE=y
 CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
 # CONFIG_ATA_OVER_ETH is not set
 #
@@ -169,6 +305,7 @@ CONFIG_IOSCHED_CFQ=y
 #
 # SCSI device support
 #
+# CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
 #
@@ -179,110 +316,116 @@ CONFIG_IOSCHED_CFQ=y
 #
 # Fusion MPT device support
 #
+# CONFIG_FUSION is not set
 #
 # IEEE 1394 (FireWire) support
 #
+# CONFIG_IEEE1394 is not set
 #
 # I2O device support
 #
+# CONFIG_I2O is not set
 #
 # Macintosh device drivers
 #
 #
-# Networking support
+# Network device support
 #
-CONFIG_NET=y
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
-#
+# CONFIG_BONDING is not set
-# Networking options
+# CONFIG_EQUALIZER is not set
-#
+# CONFIG_TUN is not set
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK_DEV is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_INET_TUNNEL is not set
-CONFIG_IP_TCPDIAG=y
-# CONFIG_IP_TCPDIAG_IPV6 is not set
-# CONFIG_IPV6 is not set
-# CONFIG_NETFILTER is not set
 #
-# SCTP Configuration (EXPERIMENTAL)
+# ARCnet devices
 #
-# CONFIG_IP_SCTP is not set
+# CONFIG_ARCNET is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
 #
-# QoS and/or fair queueing
+# PHY device support
 #
-# CONFIG_NET_SCHED is not set
+CONFIG_PHYLIB=y
-# CONFIG_NET_CLS_ROUTE is not set
 #
-# Network testing
+# MII PHY device drivers
 #
-# CONFIG_NET_PKTGEN is not set
+CONFIG_MARVELL_PHY=y
-# CONFIG_NETPOLL is not set
+# CONFIG_DAVICOM_PHY is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_QSEMI_PHY is not set
-# CONFIG_HAMRADIO is not set
+# CONFIG_LXT_PHY is not set
-# CONFIG_IRDA is not set
+# CONFIG_CICADA_PHY is not set
-# CONFIG_BT is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
 #
 # Ethernet (10 or 100Mbit)
 #
 CONFIG_NET_ETHERNET=y
 CONFIG_MII=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_CASSINI is not set
+# CONFIG_NET_VENDOR_3COM is not set
+#
+# Tulip family network device support
+#
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+CONFIG_NET_PCI=y
+# CONFIG_PCNET32 is not set
+# CONFIG_AMD8111_ETH is not set
+# CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_B44 is not set
+# CONFIG_FORCEDETH is not set
+# CONFIG_DGRS is not set
+# CONFIG_EEPRO100 is not set
+CONFIG_E100=y
+# CONFIG_FEALNX is not set
+# CONFIG_NATSEMI is not set
+# CONFIG_NE2K_PCI is not set
+# CONFIG_8139CP is not set
+# CONFIG_8139TOO is not set
+# CONFIG_SIS900 is not set
+# CONFIG_EPIC100 is not set
+# CONFIG_SUNDANCE is not set
+# CONFIG_TLAN is not set
+# CONFIG_VIA_RHINE is not set
 #
 # Ethernet (1000 Mbit)
 #
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+CONFIG_E1000=y
+# CONFIG_E1000_NAPI is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SKGE is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_VIA_VELOCITY is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
 CONFIG_GIANFAR=y
 # CONFIG_GFAR_NAPI is not set
 #
 # Ethernet (10000 Mbit)
 #
+# CONFIG_CHELSIO_T1 is not set
+# CONFIG_IXGB is not set
+# CONFIG_S2IO is not set
 #
 # Token Ring devices
 #
+# CONFIG_TR is not set
 #
 # Wireless LAN (non-hamradio)
@@ -293,10 +436,14 @@ CONFIG_GIANFAR=y
 # Wan interfaces
 #
 # CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
 # CONFIG_PPP is not set
 # CONFIG_SLIP is not set
 # CONFIG_SHAPER is not set
 # CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
 #
 # ISDN subsystem
@@ -323,14 +470,6 @@ CONFIG_INPUT=y
 # CONFIG_INPUT_EVBUG is not set
 #
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-# CONFIG_SERIO is not set
-# CONFIG_SERIO_I8042 is not set
-#
 # Input Device Drivers
 #
 # CONFIG_INPUT_KEYBOARD is not set
@@ -340,6 +479,12 @@ CONFIG_SOUND_GAMEPORT=y
 # CONFIG_INPUT_MISC is not set
 #
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+#
 # Character devices
 #
 # CONFIG_VT is not set
@@ -358,6 +503,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
 #
 CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
 CONFIG_UNIX98_PTYS=y
 CONFIG_LEGACY_PTYS=y
 CONFIG_LEGACY_PTY_COUNT=256
@@ -376,6 +522,7 @@ CONFIG_GEN_RTC=y
 # CONFIG_GEN_RTC_X is not set
 # CONFIG_DTLK is not set
 # CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
 #
 # Ftape, the floppy tape device driver
@@ -385,6 +532,12 @@ CONFIG_GEN_RTC=y
 # CONFIG_RAW_DRIVER is not set
 #
+# TPM devices
+#
+# CONFIG_TCG_TPM is not set
+# CONFIG_TELCLOCK is not set
+#
 # I2C support
 #
 CONFIG_I2C=y
@@ -400,23 +553,68 @@ CONFIG_I2C_CHARDEV=y
 #
 # I2C Hardware Bus support
 #
-# CONFIG_I2C_ISA is not set
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_I810 is not set
+# CONFIG_I2C_PIIX4 is not set
 CONFIG_I2C_MPC=y
+# CONFIG_I2C_NFORCE2 is not set
 # CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_PROSAVAGE is not set
+# CONFIG_I2C_SAVAGE4 is not set
+# CONFIG_SCx200_ACB is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+# CONFIG_I2C_VOODOO3 is not set
 # CONFIG_I2C_PCA_ISA is not set
 #
-# Hardware Sensors Chip support
+# Miscellaneous I2C Chip support
+#
+# CONFIG_SENSORS_DS1337 is not set
+# CONFIG_SENSORS_DS1374 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_RTC8564 is not set
+# CONFIG_SENSORS_M41T00 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_RTC_X1205_I2C is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+#
+# Hardware Monitoring support
 #
-# CONFIG_I2C_SENSOR is not set
+CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
 # CONFIG_SENSORS_ADM1021 is not set
 # CONFIG_SENSORS_ADM1025 is not set
 # CONFIG_SENSORS_ADM1026 is not set
 # CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ADM9240 is not set
 # CONFIG_SENSORS_ASB100 is not set
+# CONFIG_SENSORS_ATXP1 is not set
 # CONFIG_SENSORS_DS1621 is not set
 # CONFIG_SENSORS_FSCHER is not set
+# CONFIG_SENSORS_FSCPOS is not set
 # CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
 # CONFIG_SENSORS_IT87 is not set
 # CONFIG_SENSORS_LM63 is not set
 # CONFIG_SENSORS_LM75 is not set
@@ -427,33 +625,26 @@ CONFIG_I2C_MPC=y
 # CONFIG_SENSORS_LM85 is not set
 # CONFIG_SENSORS_LM87 is not set
 # CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_LM92 is not set
 # CONFIG_SENSORS_MAX1619 is not set
 # CONFIG_SENSORS_PC87360 is not set
-# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_SIS5595 is not set
 # CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_VIA686A is not set
 # CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83792D is not set
 # CONFIG_SENSORS_W83L785TS is not set
 # CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
 #
-# Other I2C Chip support
+# Misc devices
-#
-# CONFIG_SENSORS_EEPROM is not set
-# CONFIG_SENSORS_PCF8574 is not set
-# CONFIG_SENSORS_PCF8591 is not set
-# CONFIG_SENSORS_RTC8564 is not set
-# CONFIG_I2C_DEBUG_CORE is not set
-# CONFIG_I2C_DEBUG_ALGO is not set
-# CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
-#
-# Dallas's 1-wire bus
 #
-# CONFIG_W1 is not set
 #
-# Misc devices
+# Multimedia Capabilities Port drivers
 #
 #
@@ -479,11 +670,12 @@ CONFIG_I2C_MPC=y
 #
 # USB support
 #
-# CONFIG_USB_ARCH_HAS_HCD is not set
+CONFIG_USB_ARCH_HAS_HCD=y
-# CONFIG_USB_ARCH_HAS_OHCI is not set
+CONFIG_USB_ARCH_HAS_OHCI=y
+# CONFIG_USB is not set
 #
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
 #
 #
@@ -502,10 +694,15 @@ CONFIG_I2C_MPC=y
 # CONFIG_INFINIBAND is not set
 #
+# SN Devices
+#
+#
 # File systems
 #
 CONFIG_EXT2_FS=y
 # CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
 CONFIG_EXT3_FS=y
 CONFIG_EXT3_FS_XATTR=y
 # CONFIG_EXT3_FS_POSIX_ACL is not set
@@ -515,17 +712,16 @@ CONFIG_JBD=y
 CONFIG_FS_MBCACHE=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
-#
-# XFS support
-#
 # CONFIG_XFS_FS is not set
 # CONFIG_MINIX_FS is not set
 # CONFIG_ROMFS_FS is not set
+CONFIG_INOTIFY=y
 # CONFIG_QUOTA is not set
 CONFIG_DNOTIFY=y
 # CONFIG_AUTOFS_FS is not set
 # CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
 #
 # CD-ROM/DVD Filesystems
@@ -546,12 +742,10 @@ CONFIG_DNOTIFY=y
 CONFIG_PROC_FS=y
 CONFIG_PROC_KCORE=y
 CONFIG_SYSFS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVPTS_FS_XATTR is not set
 CONFIG_TMPFS=y
-# CONFIG_TMPFS_XATTR is not set
 # CONFIG_HUGETLB_PAGE is not set
 CONFIG_RAMFS=y
+# CONFIG_RELAYFS_FS is not set
 #
 # Miscellaneous filesystems
@@ -580,6 +774,7 @@ CONFIG_NFS_FS=y
 # CONFIG_NFSD is not set
 CONFIG_ROOT_NFS=y
 CONFIG_LOCKD=y
+CONFIG_NFS_COMMON=y
 CONFIG_SUNRPC=y
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
@@ -588,6 +783,7 @@ CONFIG_SUNRPC=y
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
 # CONFIG_AFS_FS is not set
+# CONFIG_9P_FS is not set
 #
 # Partition Types
@@ -614,6 +810,7 @@ CONFIG_PARTITION_ADVANCED=y
 # Library routines
 #
 # CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
 CONFIG_CRC32=y
 # CONFIG_LIBCRC32C is not set
@@ -625,7 +822,9 @@ CONFIG_CRC32=y
 #
 # Kernel hacking
 #
+# CONFIG_PRINTK_TIME is not set
 # CONFIG_DEBUG_KERNEL is not set
+CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_SERIAL_TEXT_DEBUG is not set
 #
diff --git a/arch/ppc/kernel/Makefile b/arch/ppc/kernel/Makefile
index 76a55a438f23..17a4da65e275 100644
--- a/arch/ppc/kernel/Makefile
+++ b/arch/ppc/kernel/Makefile
@@ -12,7 +12,7 @@ extra-$(CONFIG_6xx)		+= idle_6xx.o
 extra-$(CONFIG_POWER4)          += idle_power4.o
 extra-y                         += vmlinux.lds
-obj-y                           := entry.o traps.o irq.o idle.o time.o misc.o \
+obj-y                           := entry.o traps.o idle.o time.o misc.o \
                                        process.o align.o \
                                        setup.o \
                                        ppc_htab.o
@@ -38,8 +38,7 @@ endif
 # These are here while we do the architecture merge
 else
-obj-y                           := irq.o idle.o \
+obj-y                           := idle.o align.o
-                                        align.o
 obj-$(CONFIG_6xx)               += l2cr.o cpu_setup_6xx.o
 obj-$(CONFIG_SOFTWARE_SUSPEND)  += swsusp.o
 obj-$(CONFIG_MODULES)           += module.o
diff --git a/arch/ppc/kernel/asm-offsets.c b/arch/ppc/kernel/asm-offsets.c
index 968261d69572..fe0e767fb94e 100644
--- a/arch/ppc/kernel/asm-offsets.c
+++ b/arch/ppc/kernel/asm-offsets.c
@@ -25,6 +25,7 @@
 #include <asm/processor.h>
 #include <asm/cputable.h>
 #include <asm/thread_info.h>
+#include <asm/vdso_datapage.h>
 #define DEFINE(sym, val) \
        asm volatile("\n->" #sym " %0 " #val : : "i" (val))
@@ -143,5 +144,32 @@ main(void)
        DEFINE(TASK_SIZE, TASK_SIZE);
        DEFINE(NUM_USER_SEGMENTS, TASK_SIZE>>28);
+        /* datapage offsets for use by vdso */
+        DEFINE(CFG_TB_ORIG_STAMP, offsetof(struct vdso_data, tb_orig_stamp));
+        DEFINE(CFG_TB_TICKS_PER_SEC, offsetof(struct vdso_data, tb_ticks_per_sec));
+        DEFINE(CFG_TB_TO_XS, offsetof(struct vdso_data, tb_to_xs));
+        DEFINE(CFG_STAMP_XSEC, offsetof(struct vdso_data, stamp_xsec));
+        DEFINE(CFG_TB_UPDATE_COUNT, offsetof(struct vdso_data, tb_update_count));
+        DEFINE(CFG_TZ_MINUTEWEST, offsetof(struct vdso_data, tz_minuteswest));
+        DEFINE(CFG_TZ_DSTTIME, offsetof(struct vdso_data, tz_dsttime));
+        DEFINE(CFG_SYSCALL_MAP32, offsetof(struct vdso_data, syscall_map_32));
+        DEFINE(WTOM_CLOCK_SEC, offsetof(struct vdso_data, wtom_clock_sec));
+        DEFINE(WTOM_CLOCK_NSEC, offsetof(struct vdso_data, wtom_clock_nsec));
+        DEFINE(TVAL32_TV_SEC, offsetof(struct timeval, tv_sec));
+        DEFINE(TVAL32_TV_USEC, offsetof(struct timeval, tv_usec));
+        DEFINE(TSPEC32_TV_SEC, offsetof(struct timespec, tv_sec));
+        DEFINE(TSPEC32_TV_NSEC, offsetof(struct timespec, tv_nsec));
+        /* timeval/timezone offsets for use by vdso */
+        DEFINE(TZONE_TZ_MINWEST, offsetof(struct timezone, tz_minuteswest));
+        DEFINE(TZONE_TZ_DSTTIME, offsetof(struct timezone, tz_dsttime));
+        /* Other bits used by the vdso */
+        DEFINE(CLOCK_REALTIME, CLOCK_REALTIME);
+        DEFINE(CLOCK_MONOTONIC, CLOCK_MONOTONIC);
+        DEFINE(NSEC_PER_SEC, NSEC_PER_SEC);
+        DEFINE(CLOCK_REALTIME_RES, TICK_NSEC);
        return 0;
 }
diff --git a/arch/ppc/kernel/head_booke.h b/arch/ppc/kernel/head_booke.h
index aeb349b47af3..f3d274c6b231 100644
--- a/arch/ppc/kernel/head_booke.h
+++ b/arch/ppc/kernel/head_booke.h
@@ -358,6 +358,6 @@ label:
        NORMAL_EXCEPTION_PROLOG;                                              \
        bne     load_up_fpu;            /* if from user, just load it up */   \
        addi    r3,r1,STACK_FRAME_OVERHEAD;                                   \
-        EXC_XFER_EE_LITE(0x800, KernelFP)
+        EXC_XFER_EE_LITE(0x800, kernel_fp_unavailable_exception)
 #endif /* __HEAD_BOOKE_H__ */
diff --git a/arch/ppc/kernel/idle.c b/arch/ppc/kernel/idle.c
index 11e5b44713f7..821a75e45602 100644
--- a/arch/ppc/kernel/idle.c
+++ b/arch/ppc/kernel/idle.c
@@ -53,10 +53,6 @@ void default_idle(void)
                }
 #endif
        }
-        if (need_resched())
-                schedule();
-        if (cpu_is_offline(cpu) && system_state == SYSTEM_RUNNING)
-                cpu_die();
 }
 /*
@@ -64,11 +60,22 @@ void default_idle(void)
 */
 void cpu_idle(void)
 {
-        for (;;)
+        int cpu = smp_processor_id();
-                if (ppc_md.idle != NULL)
-                        ppc_md.idle();
+        for (;;) {
-                else
+                while (!need_resched()) {
-                        default_idle();
+                        if (ppc_md.idle != NULL)
+                                ppc_md.idle();
+                        else
+                                default_idle();
+                }
+                if (cpu_is_offline(cpu) && system_state == SYSTEM_RUNNING)
+                        cpu_die();
+                preempt_enable_no_resched();
+                schedule();
+                preempt_disable();
+        }
 }
 #if defined(CONFIG_SYSCTL) && defined(CONFIG_6xx)
diff --git a/arch/ppc/kernel/irq.c b/arch/ppc/kernel/irq.c
deleted file mode 100644
index fbb2b9f8922c..000000000000
--- a/arch/ppc/kernel/irq.c
+++ /dev/null
@@ -1,165 +0,0 @@
-/*
- *  arch/ppc/kernel/irq.c
- *
- *  Derived from arch/i386/kernel/irq.c
- *    Copyright (C) 1992 Linus Torvalds
- *  Adapted from arch/i386 by Gary Thomas
- *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
- *  Updated and modified by Cort Dougan <cort@fsmlabs.com>
- *    Copyright (C) 1996-2001 Cort Dougan
- *  Adapted for Power Macintosh by Paul Mackerras
- *    Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au)
- *  Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
- *
- * This file contains the code used by various IRQ handling routines:
- * asking for different IRQ's should be done through these routines
- * instead of just grabbing them. Thus setups with different IRQ numbers
- * shouldn't result in any weird surprises, and installing new handlers
- * should be easier.
- *
- * The MPC8xx has an interrupt mask in the SIU.  If a bit is set, the
- * interrupt is _enabled_.  As expected, IRQ0 is bit 0 in the 32-bit
- * mask register (of which only 16 are defined), hence the weird shifting
- * and complement of the cached_irq_mask.  I want to be able to stuff
- * this right into the SIU SMASK register.
- * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx
- * to reduce code space and undefined function references.
- */
-#include <linux/errno.h>
-#include <linux/module.h>
-#include <linux/threads.h>
-#include <linux/kernel_stat.h>
-#include <linux/signal.h>
-#include <linux/sched.h>
-#include <linux/ptrace.h>
-#include <linux/ioport.h>
-#include <linux/interrupt.h>
-#include <linux/timex.h>
-#include <linux/config.h>
-#include <linux/init.h>
-#include <linux/slab.h>
-#include <linux/pci.h>
-#include <linux/delay.h>
-#include <linux/irq.h>
-#include <linux/proc_fs.h>
-#include <linux/random.h>
-#include <linux/seq_file.h>
-#include <linux/cpumask.h>
-#include <linux/profile.h>
-#include <linux/bitops.h>
-#include <asm/uaccess.h>
-#include <asm/system.h>
-#include <asm/io.h>
-#include <asm/pgtable.h>
-#include <asm/irq.h>
-#include <asm/cache.h>
-#include <asm/prom.h>
-#include <asm/ptrace.h>
-#include <asm/machdep.h>
-#define NR_MASK_WORDS   ((NR_IRQS + 31) / 32)
-extern atomic_t ipi_recv;
-extern atomic_t ipi_sent;
-#define MAXCOUNT 10000000
-int ppc_spurious_interrupts = 0;
-struct irqaction *ppc_irq_action[NR_IRQS];
-unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];
-unsigned long ppc_lost_interrupts[NR_MASK_WORDS];
-atomic_t ppc_n_lost_interrupts;
-#ifdef CONFIG_TAU_INT
-extern int tau_initialized;
-extern int tau_interrupts(int);
-#endif
-int show_interrupts(struct seq_file *p, void *v)
-{
-        int i = *(loff_t *) v, j;
-        struct irqaction * action;
-        unsigned long flags;
-        if (i == 0) {
-                seq_puts(p, "           ");
-                for (j=0; j<NR_CPUS; j++)
-                        if (cpu_online(j))
-                                seq_printf(p, "CPU%d       ", j);
-                seq_putc(p, '\n');
-        }
-        if (i < NR_IRQS) {
-                spin_lock_irqsave(&irq_desc[i].lock, flags);
-                action = irq_desc[i].action;
-                if ( !action || !action->handler )
-                        goto skip;
-                seq_printf(p, "%3d: ", i);
-#ifdef CONFIG_SMP
-                for (j = 0; j < NR_CPUS; j++)
-                        if (cpu_online(j))
-                                seq_printf(p, "%10u ",
-                                           kstat_cpu(j).irqs[i]);
-#else
-                seq_printf(p, "%10u ", kstat_irqs(i));
-#endif /* CONFIG_SMP */
-                if (irq_desc[i].handler)
-                        seq_printf(p, " %s ", irq_desc[i].handler->typename);
-                else
-                        seq_puts(p, "  None      ");
-                seq_printf(p, "%s", (irq_desc[i].status & IRQ_LEVEL) ? "Level " : "Edge  ");
-                seq_printf(p, "    %s", action->name);
-                for (action = action->next; action; action = action->next)
-                        seq_printf(p, ", %s", action->name);
-                seq_putc(p, '\n');
-skip:
-                spin_unlock_irqrestore(&irq_desc[i].lock, flags);
-        } else if (i == NR_IRQS) {
-#ifdef CONFIG_TAU_INT
-                if (tau_initialized){
-                        seq_puts(p, "TAU: ");
-                        for (j = 0; j < NR_CPUS; j++)
-                                if (cpu_online(j))
-                                        seq_printf(p, "%10u ", tau_interrupts(j));
-                        seq_puts(p, "  PowerPC             Thermal Assist (cpu temp)\n");
-                }
-#endif
-#if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE)
-                /* should this be per processor send/receive? */
-                seq_printf(p, "IPI (recv/sent): %10u/%u\n",
-                                atomic_read(&ipi_recv), atomic_read(&ipi_sent));
-#endif
-                seq_printf(p, "BAD: %10u\n", ppc_spurious_interrupts);
-        }
-        return 0;
-}
-void do_IRQ(struct pt_regs *regs)
-{
-        int irq, first = 1;
-        irq_enter();
-        /*
-         * Every platform is required to implement ppc_md.get_irq.
-         * This function will either return an irq number or -1 to
-         * indicate there are no more pending.  But the first time
-         * through the loop this means there wasn't and IRQ pending.
-         * The value -2 is for buggy hardware and means that this IRQ
-         * has already been handled. -- Tom
-         */
-        while ((irq = ppc_md.get_irq(regs)) >= 0) {
-                __do_IRQ(irq, regs);
-                first = 0;
-        }
-        if (irq != -2 && first)
-                /* That's not SMP safe ... but who cares ? */
-                ppc_spurious_interrupts++;
-        irq_exit();
-}
-void __init init_IRQ(void)
-{
-        ppc_md.init_IRQ();
-}
diff --git a/arch/ppc/kernel/misc.S b/arch/ppc/kernel/misc.S
index ae6af29938a1..5e61124581d0 100644
--- a/arch/ppc/kernel/misc.S
+++ b/arch/ppc/kernel/misc.S
@@ -497,9 +497,9 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
 * and invalidate the corresponding instruction cache blocks.
 * This is a no-op on the 601.
 *
- * flush_icache_range(unsigned long start, unsigned long stop)
+ * __flush_icache_range(unsigned long start, unsigned long stop)
 */
-_GLOBAL(flush_icache_range)
+_GLOBAL(__flush_icache_range)
 BEGIN_FTR_SECTION
        blr                             /* for 601, do nothing */
 END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
diff --git a/arch/ppc/kernel/pci.c b/arch/ppc/kernel/pci.c
index e8f4e576750a..48ed58f995c0 100644
--- a/arch/ppc/kernel/pci.c
+++ b/arch/ppc/kernel/pci.c
@@ -62,20 +62,6 @@ struct pci_controller** hose_tail = &hose_head;
 static int pci_bus_count;
 static void
-fixup_rev1_53c810(struct pci_dev* dev)
-{
-        /* rev 1 ncr53c810 chips don't set the class at all which means
-         * they don't get their resources remapped. Fix that here.
-         */
-        if ((dev->class == PCI_CLASS_NOT_DEFINED)) {
-                printk("NCR 53c810 rev 1 detected, setting PCI class.\n");
-                dev->class = PCI_CLASS_STORAGE_SCSI;
-        }
-}
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NCR,     PCI_DEVICE_ID_NCR_53C810,       fixup_rev1_53c810);
-static void
 fixup_broken_pcnet32(struct pci_dev* dev)
 {
        if ((dev->class>>8 == PCI_CLASS_NETWORK_ETHERNET)) {
diff --git a/arch/ppc/kernel/ppc_ksyms.c b/arch/ppc/kernel/ppc_ksyms.c
index e0ca61b37f4f..66073f775193 100644
--- a/arch/ppc/kernel/ppc_ksyms.c
+++ b/arch/ppc/kernel/ppc_ksyms.c
@@ -46,6 +46,7 @@
 #include <asm/btext.h>
 #include <asm/div64.h>
 #include <asm/xmon.h>
+#include <asm/signal.h>
 #ifdef  CONFIG_8xx
 #include <asm/commproc.h>
@@ -57,7 +58,6 @@ extern void machine_check_exception(struct pt_regs *regs);
 extern void alignment_exception(struct pt_regs *regs);
 extern void program_check_exception(struct pt_regs *regs);
 extern void single_step_exception(struct pt_regs *regs);
-extern int do_signal(sigset_t *, struct pt_regs *);
 extern int pmac_newworld;
 extern int sys_sigreturn(struct pt_regs *regs);
@@ -78,7 +78,6 @@ EXPORT_SYMBOL(program_check_exception);
 EXPORT_SYMBOL(single_step_exception);
 EXPORT_SYMBOL(sys_sigreturn);
 EXPORT_SYMBOL(ppc_n_lost_interrupts);
-EXPORT_SYMBOL(ppc_lost_interrupts);
 EXPORT_SYMBOL(ISA_DMA_THRESHOLD);
 EXPORT_SYMBOL(DMA_MODE_READ);
@@ -176,6 +175,7 @@ EXPORT_SYMBOL(pci_bus_to_phys);
 #endif /* CONFIG_PCI */
 #ifdef CONFIG_NOT_COHERENT_CACHE
+extern void flush_dcache_all(void);
 EXPORT_SYMBOL(flush_dcache_all);
 #endif
@@ -217,9 +217,6 @@ EXPORT_SYMBOL(adb_try_handler_change);
 EXPORT_SYMBOL(cuda_request);
 EXPORT_SYMBOL(cuda_poll);
 #endif /* CONFIG_ADB_CUDA */
-#ifdef CONFIG_PPC_MULTIPLATFORM
-EXPORT_SYMBOL(_machine);
-#endif
 #ifdef CONFIG_PPC_PMAC
 EXPORT_SYMBOL(sys_ctrler);
 EXPORT_SYMBOL(pmac_newworld);
diff --git a/arch/ppc/kernel/setup.c b/arch/ppc/kernel/setup.c
index 6bcb85d2b7fd..dc55e1abc45b 100644
--- a/arch/ppc/kernel/setup.c
+++ b/arch/ppc/kernel/setup.c
@@ -76,6 +76,7 @@ unsigned int DMA_MODE_WRITE;
 #ifdef CONFIG_PPC_MULTIPLATFORM
 int _machine = 0;
+EXPORT_SYMBOL(_machine);
 extern void prep_init(unsigned long r3, unsigned long r4,
                unsigned long r5, unsigned long r6, unsigned long r7);
diff --git a/arch/ppc/kernel/smp.c b/arch/ppc/kernel/smp.c
index bc5bf1124836..43b8fc2ca591 100644
--- a/arch/ppc/kernel/smp.c
+++ b/arch/ppc/kernel/smp.c
@@ -341,6 +341,7 @@ int __devinit start_secondary(void *unused)
        cpu = smp_processor_id();
        smp_store_cpu_info(cpu);
        set_dec(tb_ticks_per_jiffy);
+        preempt_disable();
        cpu_callin_map[cpu] = 1;
        printk("CPU %d done callin...\n", cpu);
diff --git a/arch/ppc/platforms/83xx/mpc834x_sys.c b/arch/ppc/platforms/83xx/mpc834x_sys.c
index 79b3f533d0a3..98edc75f4105 100644
--- a/arch/ppc/platforms/83xx/mpc834x_sys.c
+++ b/arch/ppc/platforms/83xx/mpc834x_sys.c
@@ -51,6 +51,9 @@
 #include <syslib/ppc83xx_setup.h>
+static const char *GFAR_PHY_0 = "phy0:0";
+static const char *GFAR_PHY_1 = "phy0:1";
 #ifndef CONFIG_PCI
 unsigned long isa_io_base = 0;
 unsigned long isa_mem_base = 0;
@@ -97,6 +100,7 @@ mpc834x_sys_setup_arch(void)
        bd_t *binfo = (bd_t *) __res;
        unsigned int freq;
        struct gianfar_platform_data *pdata;
+        struct gianfar_mdio_data *mdata;
        /* get the core frequency */
        freq = binfo->bi_intfreq;
@@ -111,24 +115,27 @@ mpc834x_sys_setup_arch(void)
 #endif
        mpc83xx_early_serial_map();
+        /* setup the board related info for the MDIO bus */
+        mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC83xx_MDIO);
+        mdata->irq[0] = MPC83xx_IRQ_EXT1;
+        mdata->irq[1] = MPC83xx_IRQ_EXT2;
+        mdata->irq[2] = -1;
+        mdata->irq[31] = -1;
+        mdata->paddr += binfo->bi_immr_base;
        /* setup the board related information for the enet controllers */
        pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC83xx_TSEC1);
        if (pdata) {
                pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
-                pdata->interruptPHY = MPC83xx_IRQ_EXT1;
+                pdata->bus_id = GFAR_PHY_0;
-                pdata->phyid = 0;
-                /* fixup phy address */
-                pdata->phy_reg_addr += binfo->bi_immr_base;
                memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
        }
        pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC83xx_TSEC2);
        if (pdata) {
                pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
-                pdata->interruptPHY = MPC83xx_IRQ_EXT2;
+                pdata->bus_id = GFAR_PHY_1;
-                pdata->phyid = 1;
-                /* fixup phy address */
-                pdata->phy_reg_addr += binfo->bi_immr_base;
                memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
        }
diff --git a/arch/ppc/platforms/85xx/stx_gp3.h b/arch/ppc/platforms/85xx/stx_gp3.h
index 95fdf4b0680b..7bcc6c35a417 100644
--- a/arch/ppc/platforms/85xx/stx_gp3.h
+++ b/arch/ppc/platforms/85xx/stx_gp3.h
@@ -21,6 +21,7 @@
 #include <linux/config.h>
 #include <linux/init.h>
+#include <linux/seq_file.h>
 #include <asm/ppcboot.h>
 #define BOARD_CCSRBAR           ((uint)0xe0000000)
diff --git a/arch/ppc/platforms/pmac_pic.c b/arch/ppc/platforms/pmac_pic.c
index 9f2d95ea8564..4742bf609357 100644
--- a/arch/ppc/platforms/pmac_pic.c
+++ b/arch/ppc/platforms/pmac_pic.c
@@ -75,6 +75,9 @@ static DEFINE_SPINLOCK(pmac_pic_lock);
 #define GATWICK_IRQ_POOL_SIZE        10
 static struct interrupt_info gatwick_int_pool[GATWICK_IRQ_POOL_SIZE];
+#define NR_MASK_WORDS   ((NR_IRQS + 31) / 32)
+static unsigned long ppc_lost_interrupts[NR_MASK_WORDS];
 /*
 * Mark an irq as "lost".  This is only used on the pmac
 * since it can lose interrupts (see pmac_set_irq_mask).
diff --git a/arch/ppc/platforms/prep_setup.c b/arch/ppc/platforms/prep_setup.c
index 067d7d53b81e..4415748071dc 100644
--- a/arch/ppc/platforms/prep_setup.c
+++ b/arch/ppc/platforms/prep_setup.c
@@ -61,6 +61,15 @@
 #include <asm/pci-bridge.h>
 #include <asm/todc.h>
+/* prep registers for L2 */
+#define CACHECRBA       0x80000823      /* Cache configuration register address */
+#define L2CACHE_MASK    0x03    /* Mask for 2 L2 Cache bits */
+#define L2CACHE_512KB   0x00    /* 512KB */
+#define L2CACHE_256KB   0x01    /* 256KB */
+#define L2CACHE_1MB     0x02    /* 1MB */
+#define L2CACHE_NONE    0x03    /* NONE */
+#define L2CACHE_PARITY  0x08    /* Mask for L2 Cache Parity Protected bit */
 TODC_ALLOC();
 unsigned char ucSystemType;
diff --git a/arch/ppc/syslib/Makefile b/arch/ppc/syslib/Makefile
index 5bd33baac243..5b7f2b80e56e 100644
--- a/arch/ppc/syslib/Makefile
+++ b/arch/ppc/syslib/Makefile
@@ -33,7 +33,6 @@ obj-$(CONFIG_PPC4xx_DMA)	+= ppc4xx_dma.o
 obj-$(CONFIG_PPC4xx_EDMA)       += ppc4xx_sgdma.o
 ifeq ($(CONFIG_40x),y)
 obj-$(CONFIG_PCI)               += pci_auto.o ppc405_pci.o
-obj-$(CONFIG_RAPIDIO)           += ppc85xx_rio.o
 endif
 endif
 obj-$(CONFIG_8xx)               += m8xx_setup.o ppc8xx_pic.o $(wdt-mpc8xx-y) \
@@ -96,6 +95,7 @@ obj-$(CONFIG_85xx)		+= open_pic.o ppc85xx_common.o ppc85xx_setup.o \
 ifeq ($(CONFIG_85xx),y)
 obj-$(CONFIG_PCI)               += pci_auto.o
 endif
+obj-$(CONFIG_RAPIDIO)           += ppc85xx_rio.o
 obj-$(CONFIG_83xx)              += ipic.o ppc83xx_setup.o ppc_sys.o \
                                        mpc83xx_sys.o mpc83xx_devices.o
 ifeq ($(CONFIG_83xx),y)
diff --git a/arch/ppc/syslib/cpm2_pic.c b/arch/ppc/syslib/cpm2_pic.c
index c867be6981cb..29d95d415ceb 100644
--- a/arch/ppc/syslib/cpm2_pic.c
+++ b/arch/ppc/syslib/cpm2_pic.c
@@ -37,7 +37,7 @@ static	u_char	irq_to_siureg[] = {
 static  u_char  irq_to_siubit[] = {
         0, 15, 14, 13, 12, 11, 10,  9,
         8,  7,  6,  5,  4,  3,  2,  1,
-         2,  1, 15, 14, 13, 12, 11, 10,
+         2,  1,  0, 14, 13, 12, 11, 10,
         9,  8,  7,  6,  5,  4,  3,  0,
        31, 30, 29, 28, 27, 26, 25, 24,
        23, 22, 21, 20, 19, 18, 17, 16,
diff --git a/arch/ppc/syslib/mpc83xx_devices.c b/arch/ppc/syslib/mpc83xx_devices.c
index dbf8acac507f..f43fbf9a9389 100644
--- a/arch/ppc/syslib/mpc83xx_devices.c
+++ b/arch/ppc/syslib/mpc83xx_devices.c
@@ -27,18 +27,20 @@
 * what IMMRBAR is, will get fixed up by mach_mpc83xx_fixup
 */
+struct gianfar_mdio_data mpc83xx_mdio_pdata = {
+        .paddr = 0x24520,
+};
 static struct gianfar_platform_data mpc83xx_tsec1_pdata = {
        .device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT |
            FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON |
            FSL_GIANFAR_DEV_HAS_MULTI_INTR,
-        .phy_reg_addr = 0x24000,
 };
 static struct gianfar_platform_data mpc83xx_tsec2_pdata = {
        .device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT |
            FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON |
            FSL_GIANFAR_DEV_HAS_MULTI_INTR,
-        .phy_reg_addr = 0x24000,
 };
 static struct fsl_i2c_platform_data mpc83xx_fsl_i2c1_pdata = {
@@ -220,6 +222,12 @@ struct platform_device ppc_sys_platform_devices[] = {
                        },
                },
        },
+        [MPC83xx_MDIO] = {
+                .name = "fsl-gianfar_mdio",
+                .id = 0,
+                .dev.platform_data = &mpc83xx_mdio_pdata,
+                .num_resources = 0,
+        },
 };
 static int __init mach_mpc83xx_fixup(struct platform_device *pdev)
diff --git a/arch/ppc/syslib/mpc83xx_sys.c b/arch/ppc/syslib/mpc83xx_sys.c
index 29aa63350025..da743446789b 100644
--- a/arch/ppc/syslib/mpc83xx_sys.c
+++ b/arch/ppc/syslib/mpc83xx_sys.c
@@ -24,72 +24,72 @@ struct ppc_sys_spec ppc_sys_specs[] = {
                .ppc_sys_name   = "8349E",
                .mask           = 0xFFFF0000,
                .value          = 0x80500000,
-                .num_devices    = 8,
+                .num_devices    = 9,
                .device_list    = (enum ppc_sys_devices[])
                {
                        MPC83xx_TSEC1, MPC83xx_TSEC2, MPC83xx_IIC1,
                        MPC83xx_IIC2, MPC83xx_DUART, MPC83xx_SEC2,
-                        MPC83xx_USB2_DR, MPC83xx_USB2_MPH
+                        MPC83xx_USB2_DR, MPC83xx_USB2_MPH, MPC83xx_MDIO
                },
        },
        {
                .ppc_sys_name   = "8349",
                .mask           = 0xFFFF0000,
                .value          = 0x80510000,
-                .num_devices    = 7,
+                .num_devices    = 8,
                .device_list    = (enum ppc_sys_devices[])
                {
                        MPC83xx_TSEC1, MPC83xx_TSEC2, MPC83xx_IIC1,
                        MPC83xx_IIC2, MPC83xx_DUART,
-                        MPC83xx_USB2_DR, MPC83xx_USB2_MPH
+                        MPC83xx_USB2_DR, MPC83xx_USB2_MPH, MPC83xx_MDIO
                },
        },
        {
                .ppc_sys_name   = "8347E",
                .mask           = 0xFFFF0000,
                .value          = 0x80520000,
-                .num_devices    = 8,
+                .num_devices    = 9,
                .device_list    = (enum ppc_sys_devices[])
                {
                        MPC83xx_TSEC1, MPC83xx_TSEC2, MPC83xx_IIC1,
                        MPC83xx_IIC2, MPC83xx_DUART, MPC83xx_SEC2,
-                        MPC83xx_USB2_DR, MPC83xx_USB2_MPH
+                        MPC83xx_USB2_DR, MPC83xx_USB2_MPH, MPC83xx_MDIO
                },
        },
        {
                .ppc_sys_name   = "8347",
                .mask           = 0xFFFF0000,
                .value          = 0x80530000,
-                .num_devices    = 7,
+                .num_devices    = 8,
                .device_list    = (enum ppc_sys_devices[])
                {
                        MPC83xx_TSEC1, MPC83xx_TSEC2, MPC83xx_IIC1,
                        MPC83xx_IIC2, MPC83xx_DUART,
-                        MPC83xx_USB2_DR, MPC83xx_USB2_MPH
+                        MPC83xx_USB2_DR, MPC83xx_USB2_MPH, MPC83xx_MDIO
                },
        },
        {
                .ppc_sys_name   = "8343E",
                .mask           = 0xFFFF0000,
                .value          = 0x80540000,
-                .num_devices    = 7,
+                .num_devices    = 8,
                .device_list    = (enum ppc_sys_devices[])
                {
                        MPC83xx_TSEC1, MPC83xx_TSEC2, MPC83xx_IIC1,
                        MPC83xx_IIC2, MPC83xx_DUART, MPC83xx_SEC2,
-                        MPC83xx_USB2_DR,
+                        MPC83xx_USB2_DR, MPC83xx_MDIO
                },
        },
        {
                .ppc_sys_name   = "8343",
                .mask           = 0xFFFF0000,
                .value          = 0x80550000,
-                .num_devices    = 6,
+                .num_devices    = 7,
                .device_list    = (enum ppc_sys_devices[])
                {
                        MPC83xx_TSEC1, MPC83xx_TSEC2, MPC83xx_IIC1,
                        MPC83xx_IIC2, MPC83xx_DUART,
-                        MPC83xx_USB2_DR,
+                        MPC83xx_USB2_DR, MPC83xx_MDIO
                },
        },
        {       /* default match */
diff --git a/arch/ppc/syslib/prom.c b/arch/ppc/syslib/prom.c
index 03b1fc9b9501..af4deace49e0 100644
--- a/arch/ppc/syslib/prom.c
+++ b/arch/ppc/syslib/prom.c
@@ -13,7 +13,6 @@
 #include <linux/kernel.h>
 #include <linux/string.h>
 #include <linux/init.h>
-#include <linux/version.h>
 #include <linux/threads.h>
 #include <linux/spinlock.h>
 #include <linux/ioport.h>
diff --git a/arch/ppc/syslib/prom_init.c b/arch/ppc/syslib/prom_init.c
index 7f15136830f4..df14422ae1c6 100644
--- a/arch/ppc/syslib/prom_init.c
+++ b/arch/ppc/syslib/prom_init.c
@@ -9,7 +9,6 @@
 #include <linux/kernel.h>
 #include <linux/string.h>
 #include <linux/init.h>
-#include <linux/version.h>
 #include <linux/threads.h>
 #include <linux/spinlock.h>
 #include <linux/ioport.h>
diff --git a/arch/ppc64/Kconfig b/arch/ppc64/Kconfig
index 29552348e581..9d10c12e87fe 100644
--- a/arch/ppc64/Kconfig
+++ b/arch/ppc64/Kconfig
@@ -279,17 +279,12 @@ config ARCH_FLATMEM_ENABLE
       def_bool y
       depends on !NUMA
-config ARCH_DISCONTIGMEM_ENABLE
+config ARCH_SPARSEMEM_ENABLE
-        def_bool y
-        depends on SMP && PPC_PSERIES
-config ARCH_DISCONTIGMEM_DEFAULT
        def_bool y
-        depends on ARCH_DISCONTIGMEM_ENABLE
-config ARCH_SPARSEMEM_ENABLE
+config ARCH_SPARSEMEM_DEFAULT
        def_bool y
-        depends on ARCH_DISCONTIGMEM_ENABLE
+        depends on NUMA
 source "mm/Kconfig"
@@ -297,6 +292,10 @@ config HAVE_ARCH_EARLY_PFN_TO_NID
        def_bool y
        depends on NEED_MULTIPLE_NODES
+config ARCH_MEMORY_PROBE
+        def_bool y
+        depends on MEMORY_HOTPLUG
 # Some NUMA nodes have memory ranges that span
 # other nodes.  Even though a pfn is valid and
 # between a node's start and end pfns, it may not
diff --git a/arch/ppc64/boot/addRamDisk.c b/arch/ppc64/boot/addRamDisk.c
index 7f2c09473394..c02a99952be7 100644
--- a/arch/ppc64/boot/addRamDisk.c
+++ b/arch/ppc64/boot/addRamDisk.c
@@ -5,11 +5,59 @@
 #include <sys/types.h>
 #include <sys/stat.h>
 #include <string.h>
+#include <elf.h>
 #define ElfHeaderSize  (64 * 1024)
 #define ElfPages  (ElfHeaderSize / 4096)
 #define KERNELBASE (0xc000000000000000)
+#define _ALIGN_UP(addr,size)    (((addr)+((size)-1))&(~((size)-1)))
+struct addr_range {
+        unsigned long long addr;
+        unsigned long memsize;
+        unsigned long offset;
+};
+static int check_elf64(void *p, int size, struct addr_range *r)
+{
+        Elf64_Ehdr *elf64 = p;
+        Elf64_Phdr *elf64ph;
+        if (elf64->e_ident[EI_MAG0] != ELFMAG0 ||
+            elf64->e_ident[EI_MAG1] != ELFMAG1 ||
+            elf64->e_ident[EI_MAG2] != ELFMAG2 ||
+            elf64->e_ident[EI_MAG3] != ELFMAG3 ||
+            elf64->e_ident[EI_CLASS] != ELFCLASS64 ||
+            elf64->e_ident[EI_DATA] != ELFDATA2MSB ||
+            elf64->e_type != ET_EXEC || elf64->e_machine != EM_PPC64)
+                return 0;
+        if ((elf64->e_phoff + sizeof(Elf64_Phdr)) > size)
+                return 0;
+        elf64ph = (Elf64_Phdr *) ((unsigned long)elf64 +
+                                  (unsigned long)elf64->e_phoff);
+        r->memsize = (unsigned long)elf64ph->p_memsz;
+        r->offset = (unsigned long)elf64ph->p_offset;
+        r->addr = (unsigned long long)elf64ph->p_vaddr;
+#ifdef DEBUG
+        printf("PPC64 ELF file, ph:\n");
+        printf("p_type   0x%08x\n", elf64ph->p_type);
+        printf("p_flags  0x%08x\n", elf64ph->p_flags);
+        printf("p_offset 0x%016llx\n", elf64ph->p_offset);
+        printf("p_vaddr  0x%016llx\n", elf64ph->p_vaddr);
+        printf("p_paddr  0x%016llx\n", elf64ph->p_paddr);
+        printf("p_filesz 0x%016llx\n", elf64ph->p_filesz);
+        printf("p_memsz  0x%016llx\n", elf64ph->p_memsz);
+        printf("p_align  0x%016llx\n", elf64ph->p_align);
+        printf("... skipping 0x%08lx bytes of ELF header\n",
+               (unsigned long)elf64ph->p_offset);
+#endif
+        return 64;
+}
 void get4k(FILE *file, char *buf )
 {
        unsigned j;
@@ -34,97 +82,92 @@ void death(const char *msg, FILE *fdesc, const char *fname)
 int main(int argc, char **argv)
 {
        char inbuf[4096];
-        FILE *ramDisk = NULL;
+        struct addr_range vmlinux;
-        FILE *sysmap = NULL;
+        FILE *ramDisk;
-        FILE *inputVmlinux = NULL;
+        FILE *inputVmlinux;
-        FILE *outputVmlinux = NULL;
+        FILE *outputVmlinux;
-  
-        unsigned i = 0;
+        char *rd_name, *lx_name, *out_name;
-        unsigned long ramFileLen = 0;
-        unsigned long ramLen = 0;
+        size_t i;
-        unsigned long roundR = 0;
+        unsigned long ramFileLen;
-  
+        unsigned long ramLen;
-        unsigned long sysmapFileLen = 0;
+        unsigned long roundR;
-        unsigned long sysmapLen = 0;
+        unsigned long offset_end;
-        unsigned long sysmapPages = 0;
-        char* ptr_end = NULL; 
+        unsigned long kernelLen;
-        unsigned long offset_end = 0;
+        unsigned long actualKernelLen;
+        unsigned long round;
-        unsigned long kernelLen = 0;
+        unsigned long roundedKernelLen;
-        unsigned long actualKernelLen = 0;
+        unsigned long ramStartOffs;
-        unsigned long round = 0;
+        unsigned long ramPages;
-        unsigned long roundedKernelLen = 0;
+        unsigned long roundedKernelPages;
-        unsigned long ramStartOffs = 0;
+        unsigned long hvReleaseData;
-        unsigned long ramPages = 0;
-        unsigned long roundedKernelPages = 0;
-        unsigned long hvReleaseData = 0;
        u_int32_t eyeCatcher = 0xc8a5d9c4;
-        unsigned long naca = 0;
+        unsigned long naca;
-        unsigned long xRamDisk = 0;
+        unsigned long xRamDisk;
-        unsigned long xRamDiskSize = 0;
+        unsigned long xRamDiskSize;
-        long padPages = 0;
+        long padPages;
  
  
        if (argc < 2) {
                fprintf(stderr, "Name of RAM disk file missing.\n");
                exit(1);
        }
+        rd_name = argv[1];
        if (argc < 3) {
-                fprintf(stderr, "Name of System Map input file is missing.\n");
-                exit(1);
-        }
-  
-        if (argc < 4) {
                fprintf(stderr, "Name of vmlinux file missing.\n");
                exit(1);
        }
+        lx_name = argv[2];
-        if (argc < 5) {
+        if (argc < 4) {
                fprintf(stderr, "Name of vmlinux output file missing.\n");
                exit(1);
        }
+        out_name = argv[3];
-        ramDisk = fopen(argv[1], "r");
+        ramDisk = fopen(rd_name, "r");
        if ( ! ramDisk ) {
-                fprintf(stderr, "RAM disk file \"%s\" failed to open.\n", argv[1]);
+                fprintf(stderr, "RAM disk file \"%s\" failed to open.\n", rd_name);
                exit(1);
        }
-        sysmap = fopen(argv[2], "r");
+        inputVmlinux = fopen(lx_name, "r");
-        if ( ! sysmap ) {
-                fprintf(stderr, "System Map file \"%s\" failed to open.\n", argv[2]);
-                exit(1);
-        }
-  
-        inputVmlinux = fopen(argv[3], "r");
        if ( ! inputVmlinux ) {
-                fprintf(stderr, "vmlinux file \"%s\" failed to open.\n", argv[3]);
+                fprintf(stderr, "vmlinux file \"%s\" failed to open.\n", lx_name);
                exit(1);
        }
  
-        outputVmlinux = fopen(argv[4], "w+");
+        outputVmlinux = fopen(out_name, "w+");
        if ( ! outputVmlinux ) {
-                fprintf(stderr, "output vmlinux file \"%s\" failed to open.\n", argv[4]);
+                fprintf(stderr, "output vmlinux file \"%s\" failed to open.\n", out_name);
                exit(1);
        }
-  
-  
+        i = fread(inbuf, 1, sizeof(inbuf), inputVmlinux);
-  
+        if (i != sizeof(inbuf)) {
+                fprintf(stderr, "can not read vmlinux file %s: %u\n", lx_name, i);
+                exit(1);
+        }
+        i = check_elf64(inbuf, sizeof(inbuf), &vmlinux);
+        if (i == 0) {
+                fprintf(stderr, "You must have a linux kernel specified as argv[2]\n");
+                exit(1);
+        }
        /* Input Vmlinux file */
        fseek(inputVmlinux, 0, SEEK_END);
        kernelLen = ftell(inputVmlinux);
        fseek(inputVmlinux, 0, SEEK_SET);
-        printf("kernel file size = %d\n", kernelLen);
+        printf("kernel file size = %lu\n", kernelLen);
-        if ( kernelLen == 0 ) {
-                fprintf(stderr, "You must have a linux kernel specified as argv[3]\n");
-                exit(1);
-        }
        actualKernelLen = kernelLen - ElfHeaderSize;
-        printf("actual kernel length (minus ELF header) = %d\n", actualKernelLen);
+        printf("actual kernel length (minus ELF header) = %lu\n", actualKernelLen);
        round = actualKernelLen % 4096;
        roundedKernelLen = actualKernelLen;
@@ -134,39 +177,7 @@ int main(int argc, char **argv)
        roundedKernelPages = roundedKernelLen / 4096;
        printf("Vmlinux pages to copy = %ld/0x%lx \n", roundedKernelPages, roundedKernelPages);
+        offset_end = _ALIGN_UP(vmlinux.memsize, 4096);
-        /* Input System Map file */
-        /* (needs to be processed simply to determine if we need to add pad pages due to the static variables not being included in the vmlinux) */
-        fseek(sysmap, 0, SEEK_END);
-        sysmapFileLen = ftell(sysmap);
-        fseek(sysmap, 0, SEEK_SET);
-        printf("%s file size = %ld/0x%lx \n", argv[2], sysmapFileLen, sysmapFileLen);
-        sysmapLen = sysmapFileLen;
-        roundR = 4096 - (sysmapLen % 4096);
-        if (roundR) {
-                printf("Rounding System Map file up to a multiple of 4096, adding %ld/0x%lx \n", roundR, roundR);
-                sysmapLen += roundR;
-        }
-        printf("Rounded System Map size is %ld/0x%lx \n", sysmapLen, sysmapLen);
-  
-        /* Process the Sysmap file to determine where _end is */
-        sysmapPages = sysmapLen / 4096;
-        /* read the whole file line by line, expect that it doesn't fail */
-        while ( fgets(inbuf, 4096, sysmap) )  ;
-        /* search for _end in the last page of the system map */
-        ptr_end = strstr(inbuf, " _end");
-        if (!ptr_end) {
-                fprintf(stderr, "Unable to find _end in the sysmap file \n");
-                fprintf(stderr, "inbuf: \n");
-                fprintf(stderr, "%s \n", inbuf);
-                exit(1);
-        }
-        printf("Found _end in the last page of the sysmap - backing up 10 characters it looks like %s", ptr_end-10);
-        /* convert address of _end in system map to hex offset. */
-        offset_end = (unsigned int)strtol(ptr_end-10, NULL, 16);
        /* calc how many pages we need to insert between the vmlinux and the start of the ram disk */
        padPages = offset_end/4096 - roundedKernelPages;
@@ -194,7 +205,7 @@ int main(int argc, char **argv)
        fseek(ramDisk, 0, SEEK_END);
        ramFileLen = ftell(ramDisk);
        fseek(ramDisk, 0, SEEK_SET);
-        printf("%s file size = %ld/0x%lx \n", argv[1], ramFileLen, ramFileLen);
+        printf("%s file size = %ld/0x%lx \n", rd_name, ramFileLen, ramFileLen);
        ramLen = ramFileLen;
@@ -248,19 +259,19 @@ int main(int argc, char **argv)
        /* fseek to the hvReleaseData pointer */
        fseek(outputVmlinux, ElfHeaderSize + 0x24, SEEK_SET);
        if (fread(&hvReleaseData, 4, 1, outputVmlinux) != 1) {
-                death("Could not read hvReleaseData pointer\n", outputVmlinux, argv[4]);
+                death("Could not read hvReleaseData pointer\n", outputVmlinux, out_name);
        }
        hvReleaseData = ntohl(hvReleaseData); /* Convert to native int */
-        printf("hvReleaseData is at %08x\n", hvReleaseData);
+        printf("hvReleaseData is at %08lx\n", hvReleaseData);
        /* fseek to the hvReleaseData */
        fseek(outputVmlinux, ElfHeaderSize + hvReleaseData, SEEK_SET);
        if (fread(inbuf, 0x40, 1, outputVmlinux) != 1) {
-                death("Could not read hvReleaseData\n", outputVmlinux, argv[4]);
+                death("Could not read hvReleaseData\n", outputVmlinux, out_name);
        }
        /* Check hvReleaseData sanity */
        if (memcmp(inbuf, &eyeCatcher, 4) != 0) {
-                death("hvReleaseData is invalid\n", outputVmlinux, argv[4]);
+                death("hvReleaseData is invalid\n", outputVmlinux, out_name);
        }
        /* Get the naca pointer */
        naca = ntohl(*((u_int32_t*) &inbuf[0x0C])) - KERNELBASE;
@@ -269,13 +280,13 @@ int main(int argc, char **argv)
        /* fseek to the naca */
        fseek(outputVmlinux, ElfHeaderSize + naca, SEEK_SET);
        if (fread(inbuf, 0x18, 1, outputVmlinux) != 1) {
-                death("Could not read naca\n", outputVmlinux, argv[4]);
+                death("Could not read naca\n", outputVmlinux, out_name);
        }
        xRamDisk = ntohl(*((u_int32_t *) &inbuf[0x0c]));
        xRamDiskSize = ntohl(*((u_int32_t *) &inbuf[0x14]));
        /* Make sure a RAM disk isn't already present */
        if ((xRamDisk != 0) || (xRamDiskSize != 0)) {
-                death("RAM disk is already attached to this kernel\n", outputVmlinux, argv[4]);
+                death("RAM disk is already attached to this kernel\n", outputVmlinux, out_name);
        }
        /* Fill in the values */
        *((u_int32_t *) &inbuf[0x0c]) = htonl(ramStartOffs);
@@ -285,15 +296,15 @@ int main(int argc, char **argv)
        fflush(outputVmlinux);
        fseek(outputVmlinux, ElfHeaderSize + naca, SEEK_SET);
        if (fwrite(inbuf, 0x18, 1, outputVmlinux) != 1) {
-                death("Could not write naca\n", outputVmlinux, argv[4]);
+                death("Could not write naca\n", outputVmlinux, out_name);
        }
-        printf("Ram Disk of 0x%lx pages is attached to the kernel at offset 0x%08x\n",
+        printf("Ram Disk of 0x%lx pages is attached to the kernel at offset 0x%08lx\n",
               ramPages, ramStartOffs);
        /* Done */
        fclose(outputVmlinux);
        /* Set permission to executable */
-        chmod(argv[4], S_IRUSR|S_IWUSR|S_IXUSR|S_IRGRP|S_IXGRP|S_IROTH|S_IXOTH);
+        chmod(out_name, S_IRUSR|S_IWUSR|S_IXUSR|S_IRGRP|S_IXGRP|S_IROTH|S_IXOTH);
        return 0;
 }
diff --git a/arch/ppc64/kernel/Makefile b/arch/ppc64/kernel/Makefile
index c441aebe7648..dac4cc20fa93 100644
--- a/arch/ppc64/kernel/Makefile
+++ b/arch/ppc64/kernel/Makefile
@@ -11,13 +11,10 @@ obj-y               :=	misc.o prom.o
 endif
-obj-y               +=  irq.o idle.o dma.o \
+obj-y               +=  idle.o dma.o \
-                        align.o pacaData.o \
+                        align.o \
-                        udbg.o ioctl32.o \
                        rtc.o \
-                        cpu_setup_power4.o \
+                        iommu.o
-                        iommu.o sysfs.o vdso.o firmware.o
-obj-y += vdso32/ vdso64/
 pci-obj-$(CONFIG_PPC_MULTIPLATFORM)     += pci_dn.o pci_direct_iommu.o
@@ -28,32 +25,19 @@ ifneq ($(CONFIG_PPC_MERGE),y)
 obj-$(CONFIG_PPC_MULTIPLATFORM) += prom_init.o
 endif
-obj-$(CONFIG_PPC_PSERIES) += udbg_16550.o
 obj-$(CONFIG_KEXEC)             += machine_kexec.o
-obj-$(CONFIG_EEH)               += eeh.o
-obj-$(CONFIG_PROC_FS)           += proc_ppc64.o
 obj-$(CONFIG_MODULES)           += module.o
 ifneq ($(CONFIG_PPC_MERGE),y)
 obj-$(CONFIG_MODULES)           += ppc_ksyms.o
 endif
-obj-$(CONFIG_PPC_RTAS)          += rtas_pci.o
-obj-$(CONFIG_SCANLOG)           += scanlog.o
-obj-$(CONFIG_LPARCFG)           += lparcfg.o
 obj-$(CONFIG_HVC_CONSOLE)       += hvconsole.o
 ifneq ($(CONFIG_PPC_MERGE),y)
 obj-$(CONFIG_BOOTX_TEXT)        += btext.o
 endif
 obj-$(CONFIG_HVCS)              += hvcserver.o
-obj-$(CONFIG_PPC_PMAC)          += udbg_scc.o
-obj-$(CONFIG_PPC_MAPLE)         += udbg_16550.o
 obj-$(CONFIG_KPROBES)           += kprobes.o
-CFLAGS_ioctl32.o += -Ifs/
 ifneq ($(CONFIG_PPC_MERGE),y)
 ifeq ($(CONFIG_PPC_ISERIES),y)
 arch/ppc64/kernel/head.o: arch/powerpc/kernel/lparmap.s
diff --git a/arch/ppc64/kernel/asm-offsets.c b/arch/ppc64/kernel/asm-offsets.c
index bce9065da6cb..84ab5c18ef52 100644
--- a/arch/ppc64/kernel/asm-offsets.c
+++ b/arch/ppc64/kernel/asm-offsets.c
@@ -74,7 +74,6 @@ int main(void)
        DEFINE(ICACHEL1LINESIZE, offsetof(struct ppc64_caches, iline_size));
        DEFINE(ICACHEL1LOGLINESIZE, offsetof(struct ppc64_caches, log_iline_size));
        DEFINE(ICACHEL1LINESPERPAGE, offsetof(struct ppc64_caches, ilines_per_page));
-        DEFINE(PLATFORM, offsetof(struct systemcfg, platform));
        DEFINE(PLATFORM_LPAR, PLATFORM_LPAR);
        /* paca */
diff --git a/arch/ppc64/kernel/head.S b/arch/ppc64/kernel/head.S
index 9e8050ea1225..1c869ea72d28 100644
--- a/arch/ppc64/kernel/head.S
+++ b/arch/ppc64/kernel/head.S
@@ -28,7 +28,6 @@
 #include <asm/processor.h>
 #include <asm/page.h>
 #include <asm/mmu.h>
-#include <asm/systemcfg.h>
 #include <asm/ppc_asm.h>
 #include <asm/asm-offsets.h>
 #include <asm/bug.h>
@@ -1701,21 +1700,9 @@ _GLOBAL(__secondary_start)
        HMT_MEDIUM                      /* Set thread priority to MEDIUM */
        ld      r2,PACATOC(r13)
-        li      r6,0
-        stb     r6,PACAPROCENABLED(r13)
+        /* Do early setup for that CPU */
+        bl      .early_setup_secondary
-#ifndef CONFIG_PPC_ISERIES
-        /* Initialize the page table pointer register. */
-        LOADADDR(r6,_SDR1)
-        ld      r6,0(r6)                /* get the value of _SDR1        */
-        mtspr   SPRN_SDR1,r6                    /* set the htab location         */
-#endif
-        /* Initialize the first segment table (or SLB) entry             */
-        ld      r3,PACASTABVIRT(r13)    /* get addr of segment table     */
-BEGIN_FTR_SECTION
-        bl      .stab_initialize
-END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
-        bl      .slb_initialize
        /* Initialize the kernel stack.  Just a repeat for iSeries.      */
        LOADADDR(r3,current_set)
@@ -1724,37 +1711,6 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
        addi    r1,r1,THREAD_SIZE-STACK_FRAME_OVERHEAD
        std     r1,PACAKSAVE(r13)
-        ld      r3,PACASTABREAL(r13)    /* get raddr of segment table    */
-        ori     r4,r3,1                 /* turn on valid bit             */
-#ifdef CONFIG_PPC_ISERIES
-        li      r0,-1                   /* hypervisor call */
-        li      r3,1
-        sldi    r3,r3,63                /* 0x8000000000000000 */
-        ori     r3,r3,4                 /* 0x8000000000000004 */
-        sc                              /* HvCall_setASR */
-#else
-        /* set the ASR */
-        ld      r3,systemcfg@got(r2)    /* r3 = ptr to systemcfg         */
-        ld      r3,0(r3)
-        lwz     r3,PLATFORM(r3)         /* r3 = platform flags           */
-        andi.   r3,r3,PLATFORM_LPAR     /* Test if bit 0 is set (LPAR bit) */
-        beq     98f                     /* branch if result is 0  */
-        mfspr   r3,SPRN_PVR
-        srwi    r3,r3,16
-        cmpwi   r3,0x37                 /* SStar  */
-        beq     97f
-        cmpwi   r3,0x36                 /* IStar  */
-        beq     97f
-        cmpwi   r3,0x34                 /* Pulsar */
-        bne     98f
-97:     li      r3,H_SET_ASR            /* hcall = H_SET_ASR */
-        HVSC                            /* Invoking hcall */
-        b       99f
-98:                                     /* !(rpa hypervisor) || !(star)  */
-        mtasr   r4                      /* set the stab location         */
-99:
-#endif
        li      r7,0
        mtlr    r7
@@ -1896,40 +1852,6 @@ _STATIC(start_here_multiplatform)
        mr      r3,r31
        bl      .early_setup
-        /* set the ASR */
-        ld      r3,PACASTABREAL(r13)
-        ori     r4,r3,1                 /* turn on valid bit             */
-        ld      r3,systemcfg@got(r2)    /* r3 = ptr to systemcfg */
-        ld      r3,0(r3)
-        lwz     r3,PLATFORM(r3)         /* r3 = platform flags */
-        andi.   r3,r3,PLATFORM_LPAR     /* Test if bit 0 is set (LPAR bit) */
-        beq     98f                     /* branch if result is 0  */
-        mfspr   r3,SPRN_PVR
-        srwi    r3,r3,16
-        cmpwi   r3,0x37                 /* SStar */
-        beq     97f
-        cmpwi   r3,0x36                 /* IStar  */
-        beq     97f
-        cmpwi   r3,0x34                 /* Pulsar */
-        bne     98f
-97:     li      r3,H_SET_ASR            /* hcall = H_SET_ASR */
-        HVSC                            /* Invoking hcall */
-        b       99f
-98:                                     /* !(rpa hypervisor) || !(star) */
-        mtasr   r4                      /* set the stab location        */
-99:
-        /* Set SDR1 (hash table pointer) */
-        ld      r3,systemcfg@got(r2)    /* r3 = ptr to systemcfg */
-        ld      r3,0(r3)
-        lwz     r3,PLATFORM(r3)         /* r3 = platform flags */
-        /* Test if bit 0 is set (LPAR bit) */
-        andi.   r3,r3,PLATFORM_LPAR
-        bne     98f                     /* branch if result is !0  */
-        LOADADDR(r6,_SDR1)              /* Only if NOT LPAR */
-        sub     r6,r6,r26
-        ld      r6,0(r6)                /* get the value of _SDR1 */
-        mtspr   SPRN_SDR1,r6                    /* set the htab location  */
-98: 
        LOADADDR(r3,.start_here_common)
        SET_REG_TO_CONST(r4, MSR_KERNEL)
        mtspr   SPRN_SRR0,r3
diff --git a/arch/ppc64/kernel/idle.c b/arch/ppc64/kernel/idle.c
index 8fec27469802..b879d3057ef8 100644
--- a/arch/ppc64/kernel/idle.c
+++ b/arch/ppc64/kernel/idle.c
@@ -26,7 +26,6 @@
 #include <asm/processor.h>
 #include <asm/cputable.h>
 #include <asm/time.h>
-#include <asm/systemcfg.h>
 #include <asm/machdep.h>
 #include <asm/smp.h>
@@ -34,15 +33,11 @@ extern void power4_idle(void);
 void default_idle(void)
 {
-        long oldval;
        unsigned int cpu = smp_processor_id();
+        set_thread_flag(TIF_POLLING_NRFLAG);
        while (1) {
-                oldval = test_and_clear_thread_flag(TIF_NEED_RESCHED);
+                if (!need_resched()) {
-                if (!oldval) {
-                        set_thread_flag(TIF_POLLING_NRFLAG);
                        while (!need_resched() && !cpu_is_offline(cpu)) {
                                ppc64_runlatch_off();
@@ -55,13 +50,12 @@ void default_idle(void)
                        }
                        HMT_medium();
-                        clear_thread_flag(TIF_POLLING_NRFLAG);
-                } else {
-                        set_need_resched();
                }
                ppc64_runlatch_on();
+                preempt_enable_no_resched();
                schedule();
+                preempt_disable();
                if (cpu_is_offline(cpu) && system_state == SYSTEM_RUNNING)
                        cpu_die();
        }
@@ -77,7 +71,9 @@ void native_idle(void)
                if (need_resched()) {
                        ppc64_runlatch_on();
+                        preempt_enable_no_resched();
                        schedule();
+                        preempt_disable();
                }
                if (cpu_is_offline(smp_processor_id()) &&
diff --git a/arch/ppc64/kernel/misc.S b/arch/ppc64/kernel/misc.S
index 914632ec587d..5e089deb0a2b 100644
--- a/arch/ppc64/kernel/misc.S
+++ b/arch/ppc64/kernel/misc.S
@@ -78,12 +78,12 @@ _GLOBAL(call_do_softirq)
        mtlr    r0
        blr
-_GLOBAL(call_handle_IRQ_event)
+_GLOBAL(call___do_IRQ)
        mflr    r0
        std     r0,16(r1)
-        stdu    r1,THREAD_SIZE-112(r6)
+        stdu    r1,THREAD_SIZE-112(r5)
-        mr      r1,r6
+        mr      r1,r5
-        bl      .handle_IRQ_event
+        bl      .__do_IRQ
        ld      r1,0(r1)
        ld      r0,16(r1)
        mtlr    r0
@@ -186,7 +186,8 @@ _KPROBE(__flush_icache_range)
        bdnz    2b
        isync
        blr
-        .previous .text
+        .text
 /*
 * Like above, but only do the D-cache.
 *
diff --git a/arch/ppc64/kernel/nvram.c b/arch/ppc64/kernel/nvram.c
index 4fb1a9f5060d..c0fcd29918ce 100644
--- a/arch/ppc64/kernel/nvram.c
+++ b/arch/ppc64/kernel/nvram.c
@@ -31,7 +31,6 @@
 #include <asm/rtas.h>
 #include <asm/prom.h>
 #include <asm/machdep.h>
-#include <asm/systemcfg.h>
 #undef DEBUG_NVRAM
@@ -167,7 +166,7 @@ static int dev_nvram_ioctl(struct inode *inode, struct file *file,
        case IOC_NVRAM_GET_OFFSET: {
                int part, offset;
-                if (systemcfg->platform != PLATFORM_POWERMAC)
+                if (_machine != PLATFORM_POWERMAC)
                        return -EINVAL;
                if (copy_from_user(&part, (void __user*)arg, sizeof(part)) != 0)
                        return -EFAULT;
@@ -450,7 +449,7 @@ static int nvram_setup_partition(void)
         * in our nvram, as Apple defined partitions use pretty much
         * all of the space
         */
-        if (systemcfg->platform == PLATFORM_POWERMAC)
+        if (_machine == PLATFORM_POWERMAC)
                return -ENOSPC;
        /* see if we have an OS partition that meets our needs.
diff --git a/arch/ppc64/kernel/pci.c b/arch/ppc64/kernel/pci.c
index 30247ff74972..3cef1b8f57f0 100644
--- a/arch/ppc64/kernel/pci.c
+++ b/arch/ppc64/kernel/pci.c
@@ -548,6 +548,11 @@ static int __init pcibios_init(void)
        if (ppc64_isabridge_dev != NULL)
                printk("ISA bridge at %s\n", pci_name(ppc64_isabridge_dev));
+#ifdef CONFIG_PPC_MULTIPLATFORM
+        /* map in PCI I/O space */
+        phbs_remap_io();
+#endif
        printk("PCI: Probing PCI hardware done\n");
        return 0;
@@ -1277,12 +1282,9 @@ long sys_pciconfig_iobase(long which, unsigned long in_bus,
         * G5 machines... So when something asks for bus 0 io base
         * (bus 0 is HT root), we return the AGP one instead.
         */
-#ifdef CONFIG_PPC_PMAC
+        if (machine_is_compatible("MacRISC4"))
-        if (systemcfg->platform == PLATFORM_POWERMAC &&
-            machine_is_compatible("MacRISC4"))
                if (in_bus == 0)
                        in_bus = 0xf0;
-#endif /* CONFIG_PPC_PMAC */
        /* That syscall isn't quite compatible with PCI domains, but it's
         * used on pre-domains setup. We return the first match
diff --git a/arch/ppc64/kernel/pci_dn.c b/arch/ppc64/kernel/pci_dn.c
index 1a443a7ada4c..12c4c9e9bbc7 100644
--- a/arch/ppc64/kernel/pci_dn.c
+++ b/arch/ppc64/kernel/pci_dn.c
@@ -43,7 +43,7 @@ static void * __devinit update_dn_pci_info(struct device_node *dn, void *data)
        u32 *regs;
        struct pci_dn *pdn;
-        if (phb->is_dynamic)
+        if (mem_init_done)
                pdn = kmalloc(sizeof(*pdn), GFP_KERNEL);
        else
                pdn = alloc_bootmem(sizeof(*pdn));
@@ -120,6 +120,14 @@ void *traverse_pci_devices(struct device_node *start, traverse_func pre,
        return NULL;
 }
+/** 
+ * pci_devs_phb_init_dynamic - setup pci devices under this PHB
+ * phb: pci-to-host bridge (top-level bridge connecting to cpu)
+ *
+ * This routine is called both during boot, (before the memory
+ * subsystem is set up, before kmalloc is valid) and during the 
+ * dynamic lpar operation of adding a PHB to a running system.
+ */
 void __devinit pci_devs_phb_init_dynamic(struct pci_controller *phb)
 {
        struct device_node * dn = (struct device_node *) phb->arch_data;
@@ -201,9 +209,14 @@ static struct notifier_block pci_dn_reconfig_nb = {
        .notifier_call = pci_dn_reconfig_notifier,
 };
-/*
+/** 
- * Actually initialize the phbs.
+ * pci_devs_phb_init - Initialize phbs and pci devs under them.
- * The buswalk on this phb has not happened yet.
+ * 
+ * This routine walks over all phb's (pci-host bridges) on the
+ * system, and sets up assorted pci-related structures 
+ * (including pci info in the device node structs) for each
+ * pci device found underneath.  This routine runs once,
+ * early in the boot sequence.
 */
 void __init pci_devs_phb_init(void)
 {
diff --git a/arch/ppc64/kernel/prom.c b/arch/ppc64/kernel/prom.c
index 3402fbee62c7..fbad2c360784 100644
--- a/arch/ppc64/kernel/prom.c
+++ b/arch/ppc64/kernel/prom.c
@@ -318,7 +318,7 @@ static int __devinit finish_node_interrupts(struct device_node *np,
                }
                /* We offset irq numbers for the u3 MPIC by 128 in PowerMac */
-                if (systemcfg->platform == PLATFORM_POWERMAC && ic && ic->parent) {
+                if (_machine == PLATFORM_POWERMAC && ic && ic->parent) {
                        char *name = get_property(ic->parent, "name", NULL);
                        if (name && !strcmp(name, "u3"))
                                np->intrs[intrcount].line += 128;
@@ -1065,7 +1065,7 @@ static int __init early_init_dt_scan_chosen(unsigned long node,
        prop = (u32 *)of_get_flat_dt_prop(node, "linux,platform", NULL);
        if (prop == NULL)
                return 0;
-        systemcfg->platform = *prop;
+        _machine = *prop;
        /* check if iommu is forced on or off */
        if (of_get_flat_dt_prop(node, "linux,iommu-off", NULL) != NULL)
@@ -1230,11 +1230,8 @@ void __init early_init_devtree(void *params)
        of_scan_flat_dt(early_init_dt_scan_memory, NULL);
        lmb_enforce_memory_limit(memory_limit);
        lmb_analyze();
-        systemcfg->physicalMemorySize = lmb_phys_mem_size();
        lmb_reserve(0, __pa(klimit));
-        DBG("Phys. mem: %lx\n", systemcfg->physicalMemorySize);
        /* Reserve LMB regions used by kernel, initrd, dt, etc... */
        early_reserve_mem();
@@ -1753,7 +1750,7 @@ static int of_finish_dynamic_node(struct device_node *node,
        /* We don't support that function on PowerMac, at least
         * not yet
         */
-        if (systemcfg->platform == PLATFORM_POWERMAC)
+        if (_machine == PLATFORM_POWERMAC)
                return -ENODEV;
        /* fix up new node's linux_phandle field */
diff --git a/arch/ppc64/kernel/prom_init.c b/arch/ppc64/kernel/prom_init.c
index e4c880dab997..6375f40b23db 100644
--- a/arch/ppc64/kernel/prom_init.c
+++ b/arch/ppc64/kernel/prom_init.c
@@ -1934,7 +1934,8 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4, unsigned long
        /*
         * On pSeries, inform the firmware about our capabilities
         */
-        if (RELOC(of_platform) & PLATFORM_PSERIES)
+        if (RELOC(of_platform) == PLATFORM_PSERIES ||
+            RELOC(of_platform) == PLATFORM_PSERIES_LPAR)
                prom_send_capabilities();
        /*
diff --git a/arch/ppc64/kernel/vdso.c b/arch/ppc64/kernel/vdso.c
index 4aacf521e3e4..1bbacac44988 100644
--- a/arch/ppc64/kernel/vdso.c
+++ b/arch/ppc64/kernel/vdso.c
@@ -34,6 +34,7 @@
 #include <asm/machdep.h>
 #include <asm/cputable.h>
 #include <asm/sections.h>
+#include <asm/systemcfg.h>
 #include <asm/vdso.h>
 #undef DEBUG
@@ -179,7 +180,7 @@ static struct page * vdso_vma_nopage(struct vm_area_struct * vma,
         * Last page is systemcfg.
         */
        if ((vma->vm_end - address) <= PAGE_SIZE)
-                pg = virt_to_page(systemcfg);
+                pg = virt_to_page(_systemcfg);
        else
                pg = virt_to_page(vbase + offset);
@@ -604,7 +605,7 @@ void __init vdso_init(void)
                get_page(pg);
        }
-        get_page(virt_to_page(systemcfg));
+        get_page(virt_to_page(_systemcfg));
 }
 int in_gate_area_no_task(unsigned long addr)
diff --git a/arch/ppc64/kernel/vdso32/gettimeofday.S b/arch/ppc64/kernel/vdso32/gettimeofday.S
deleted file mode 100644
index e243c1d24af7..000000000000
--- a/arch/ppc64/kernel/vdso32/gettimeofday.S
+++ /dev/null
@@ -1,140 +0,0 @@
-/*
- * Userland implementation of gettimeofday() for 32 bits processes in a
- * ppc64 kernel for use in the vDSO
- *
- * Copyright (C) 2004 Benjamin Herrenschmuidt (benh@kernel.crashing.org), IBM Corp.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-#include <linux/config.h>
-#include <asm/processor.h>
-#include <asm/ppc_asm.h>
-#include <asm/vdso.h>
-#include <asm/asm-offsets.h>
-#include <asm/unistd.h>
-        .text
-/*
- * Exact prototype of gettimeofday
- *
- * int __kernel_gettimeofday(struct timeval *tv, struct timezone *tz);
- *
- */
-V_FUNCTION_BEGIN(__kernel_gettimeofday)
-  .cfi_startproc
-        mflr    r12
-  .cfi_register lr,r12
-        mr      r10,r3                  /* r10 saves tv */
-        mr      r11,r4                  /* r11 saves tz */
-        bl      __get_datapage@local    /* get data page */
-        mr      r9, r3                  /* datapage ptr in r9 */
-        bl      __do_get_xsec@local     /* get xsec from tb & kernel */
-        bne-    2f                      /* out of line -> do syscall */
-        /* seconds are xsec >> 20 */
-        rlwinm  r5,r4,12,20,31
-        rlwimi  r5,r3,12,0,19
-        stw     r5,TVAL32_TV_SEC(r10)
-        /* get remaining xsec and convert to usec. we scale
-         * up remaining xsec by 12 bits and get the top 32 bits
-         * of the multiplication
-         */
-        rlwinm  r5,r4,12,0,19
-        lis     r6,1000000@h
-        ori     r6,r6,1000000@l
-        mulhwu  r5,r5,r6
-        stw     r5,TVAL32_TV_USEC(r10)
-        cmpli   cr0,r11,0               /* check if tz is NULL */
-        beq     1f
-        lwz     r4,CFG_TZ_MINUTEWEST(r9)/* fill tz */
-        lwz     r5,CFG_TZ_DSTTIME(r9)
-        stw     r4,TZONE_TZ_MINWEST(r11)
-        stw     r5,TZONE_TZ_DSTTIME(r11)
-1:      mtlr    r12
-        li      r3,0
-        blr
-2:      mr      r3,r10
-        mr      r4,r11
-        li      r0,__NR_gettimeofday
-        sc
-        b       1b
-  .cfi_endproc
-V_FUNCTION_END(__kernel_gettimeofday)
-/*
- * This is the core of gettimeofday(), it returns the xsec
- * value in r3 & r4 and expects the datapage ptr (non clobbered)
- * in r9. clobbers r0,r4,r5,r6,r7,r8
-*/
-__do_get_xsec:
-  .cfi_startproc
-        /* Check for update count & load values. We use the low
-         * order 32 bits of the update count
-         */
-1:      lwz     r8,(CFG_TB_UPDATE_COUNT+4)(r9)
-        andi.   r0,r8,1                 /* pending update ? loop */
-        bne-    1b
-        xor     r0,r8,r8                /* create dependency */
-        add     r9,r9,r0
-        /* Load orig stamp (offset to TB) */
-        lwz     r5,CFG_TB_ORIG_STAMP(r9)
-        lwz     r6,(CFG_TB_ORIG_STAMP+4)(r9)
-        /* Get a stable TB value */
-2:      mftbu   r3
-        mftbl   r4
-        mftbu   r0
-        cmpl    cr0,r3,r0
-        bne-    2b
-        /* Substract tb orig stamp. If the high part is non-zero, we jump to the
-         * slow path which call the syscall. If it's ok, then we have our 32 bits
-         * tb_ticks value in r7
-         */
-        subfc   r7,r6,r4
-        subfe.  r0,r5,r3
-        bne-    3f
-        /* Load scale factor & do multiplication */
-        lwz     r5,CFG_TB_TO_XS(r9)     /* load values */
-        lwz     r6,(CFG_TB_TO_XS+4)(r9)
-        mulhwu  r4,r7,r5
-        mulhwu  r6,r7,r6
-        mullw   r0,r7,r5
-        addc    r6,r6,r0
-        /* At this point, we have the scaled xsec value in r4 + XER:CA
-         * we load & add the stamp since epoch
-         */
-        lwz     r5,CFG_STAMP_XSEC(r9)
-        lwz     r6,(CFG_STAMP_XSEC+4)(r9)
-        adde    r4,r4,r6
-        addze   r3,r5
-        /* We now have our result in r3,r4. We create a fake dependency
-         * on that result and re-check the counter
-         */
-        xor     r0,r4,r4
-        add     r9,r9,r0
-        lwz     r0,(CFG_TB_UPDATE_COUNT+4)(r9)
-        cmpl    cr0,r8,r0               /* check if updated */
-        bne-    1b
-        /* Warning ! The caller expects CR:EQ to be set to indicate a
-         * successful calculation (so it won't fallback to the syscall
-         * method). We have overriden that CR bit in the counter check,
-         * but fortunately, the loop exit condition _is_ CR:EQ set, so
-         * we can exit safely here. If you change this code, be careful
-         * of that side effect.
-         */
-3:      blr
-  .cfi_endproc
diff --git a/arch/ppc64/kernel/vdso64/gettimeofday.S b/arch/ppc64/kernel/vdso64/gettimeofday.S
deleted file mode 100644
index f6df8028570a..000000000000
--- a/arch/ppc64/kernel/vdso64/gettimeofday.S
+++ /dev/null
@@ -1,91 +0,0 @@
-/*
- * Userland implementation of gettimeofday() for 64 bits processes in a
- * ppc64 kernel for use in the vDSO
- *
- * Copyright (C) 2004 Benjamin Herrenschmuidt (benh@kernel.crashing.org),
- *                    IBM Corp.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-#include <linux/config.h>
-#include <asm/processor.h>
-#include <asm/ppc_asm.h>
-#include <asm/vdso.h>
-#include <asm/asm-offsets.h>
-        .text
-/*
- * Exact prototype of gettimeofday
- *
- * int __kernel_gettimeofday(struct timeval *tv, struct timezone *tz);
- *
- */
-V_FUNCTION_BEGIN(__kernel_gettimeofday)
-  .cfi_startproc
-        mflr    r12
-  .cfi_register lr,r12
-        mr      r11,r3                  /* r11 holds tv */
-        mr      r10,r4                  /* r10 holds tz */
-        bl      V_LOCAL_FUNC(__get_datapage)            /* get data page */
-        bl      V_LOCAL_FUNC(__do_get_xsec)             /* get xsec from tb & kernel */
-        lis     r7,15                   /* r7 = 1000000 = USEC_PER_SEC */
-        ori     r7,r7,16960
-        rldicl  r5,r4,44,20             /* r5 = sec = xsec / XSEC_PER_SEC */
-        rldicr  r6,r5,20,43             /* r6 = sec * XSEC_PER_SEC */
-        std     r5,TVAL64_TV_SEC(r11)   /* store sec in tv */
-        subf    r0,r6,r4                /* r0 = xsec = (xsec - r6) */
-        mulld   r0,r0,r7                /* usec = (xsec * USEC_PER_SEC) / XSEC_PER_SEC */
-        rldicl  r0,r0,44,20
-        cmpldi  cr0,r10,0               /* check if tz is NULL */
-        std     r0,TVAL64_TV_USEC(r11)  /* store usec in tv */
-        beq     1f
-        lwz     r4,CFG_TZ_MINUTEWEST(r3)/* fill tz */
-        lwz     r5,CFG_TZ_DSTTIME(r3)
-        stw     r4,TZONE_TZ_MINWEST(r10)
-        stw     r5,TZONE_TZ_DSTTIME(r10)
-1:      mtlr    r12
-        li      r3,0                    /* always success */
-        blr
-  .cfi_endproc
-V_FUNCTION_END(__kernel_gettimeofday)
-/*
- * This is the core of gettimeofday(), it returns the xsec
- * value in r4 and expects the datapage ptr (non clobbered)
- * in r3. clobbers r0,r4,r5,r6,r7,r8
-*/
-V_FUNCTION_BEGIN(__do_get_xsec)
-  .cfi_startproc
-        /* check for update count & load values */
-1:      ld      r7,CFG_TB_UPDATE_COUNT(r3)
-        andi.   r0,r4,1                 /* pending update ? loop */
-        bne-    1b
-        xor     r0,r4,r4                /* create dependency */
-        add     r3,r3,r0
-        /* Get TB & offset it */
-        mftb    r8
-        ld      r9,CFG_TB_ORIG_STAMP(r3)
-        subf    r8,r9,r8
-        /* Scale result */
-        ld      r5,CFG_TB_TO_XS(r3)
-        mulhdu  r8,r8,r5
-        /* Add stamp since epoch */
-        ld      r6,CFG_STAMP_XSEC(r3)
-        add     r4,r6,r8
-        xor     r0,r4,r4
-        add     r3,r3,r0
-        ld      r0,CFG_TB_UPDATE_COUNT(r3)
-        cmpld   cr0,r0,r7               /* check if updated */
-        bne-    1b
-        blr
-  .cfi_endproc
-V_FUNCTION_END(__do_get_xsec)
diff --git a/arch/s390/kernel/debug.c b/arch/s390/kernel/debug.c
index bc59282da762..896d39d0e4ce 100644
--- a/arch/s390/kernel/debug.c
+++ b/arch/s390/kernel/debug.c
@@ -486,7 +486,7 @@ out:
 * - goto next entry in p_info
 */
-extern inline int
+static inline int
 debug_next_entry(file_private_info_t *p_info)
 {
        debug_info_t *id;
@@ -800,7 +800,7 @@ debug_set_level(debug_info_t* id, int new_level)
 * - set active entry to next in the ring buffer
 */
-extern inline void
+static inline void
 proceed_active_entry(debug_info_t * id)
 {
        if ((id->active_entries[id->active_area] += id->entry_size)
@@ -817,7 +817,7 @@ proceed_active_entry(debug_info_t * id)
 * - set active area to next in the ring buffer
 */
-extern inline void
+static inline void
 proceed_active_area(debug_info_t * id)
 {
        id->active_area++;
@@ -828,7 +828,7 @@ proceed_active_area(debug_info_t * id)
 * get_active_entry:
 */
-extern inline debug_entry_t*
+static inline debug_entry_t*
 get_active_entry(debug_info_t * id)
 {
        return (debug_entry_t *) (((char *) id->areas[id->active_area]
@@ -841,7 +841,7 @@ get_active_entry(debug_info_t * id)
 * - set timestamp, caller address, cpu number etc.
 */
-extern inline void
+static inline void
 debug_finish_entry(debug_info_t * id, debug_entry_t* active, int level,
                        int exception)
 {
@@ -971,7 +971,7 @@ debug_entry_t
 * counts arguments in format string for sprintf view
 */
-extern inline int
+static inline int
 debug_count_numargs(char *string)
 {
        int numargs=0;
diff --git a/arch/s390/kernel/process.c b/arch/s390/kernel/process.c
index 9f3dff6c0b72..78b64fe5e7c2 100644
--- a/arch/s390/kernel/process.c
+++ b/arch/s390/kernel/process.c
@@ -99,15 +99,15 @@ void default_idle(void)
 {
        int cpu, rc;
+        /* CPU is going idle. */
+        cpu = smp_processor_id();
        local_irq_disable();
-        if (need_resched()) {
+        if (need_resched()) {
                local_irq_enable();
-                schedule();
+                return;
-                return;
+        }
-        }
-        /* CPU is going idle. */
-        cpu = smp_processor_id();
        rc = notifier_call_chain(&idle_chain, CPU_IDLE, (void *)(long) cpu);
        if (rc != NOTIFY_OK && rc != NOTIFY_DONE)
                BUG();
@@ -120,7 +120,7 @@ void default_idle(void)
        __ctl_set_bit(8, 15);
 #ifdef CONFIG_HOTPLUG_CPU
-        if (cpu_is_offline(smp_processor_id()))
+        if (cpu_is_offline(cpu))
                cpu_die();
 #endif
@@ -139,8 +139,14 @@ void default_idle(void)
 void cpu_idle(void)
 {
-        for (;;)
+        for (;;) {
-                default_idle();
+                while (!need_resched())
+                        default_idle();
+                preempt_enable_no_resched();
+                schedule();
+                preempt_disable();
+        }
 }
 void show_regs(struct pt_regs *regs)
diff --git a/arch/s390/kernel/smp.c b/arch/s390/kernel/smp.c
index e13c87b446b2..5856b3fda6bf 100644
--- a/arch/s390/kernel/smp.c
+++ b/arch/s390/kernel/smp.c
@@ -533,6 +533,7 @@ int __devinit start_secondary(void *cpuvoid)
 {
        /* Setup the cpu */
        cpu_init();
+        preempt_disable();
        /* init per CPU timer */
        init_cpu_timer();
 #ifdef CONFIG_VIRT_TIMER
diff --git a/arch/s390/mm/fault.c b/arch/s390/mm/fault.c
index 64e32da77754..fb2607c369ed 100644
--- a/arch/s390/mm/fault.c
+++ b/arch/s390/mm/fault.c
@@ -160,7 +160,7 @@ static void do_sigsegv(struct pt_regs *regs, unsigned long error_code,
 *   11       Page translation     ->  Not present       (nullification)
 *   3b       Region third trans.  ->  Not present       (nullification)
 */
-extern inline void
+static inline void
 do_exception(struct pt_regs *regs, unsigned long error_code, int is_protection)
 {
        struct task_struct *tsk;
diff --git a/arch/sh/kernel/process.c b/arch/sh/kernel/process.c
index 6dce9d0b81f8..fd4f240b833d 100644
--- a/arch/sh/kernel/process.c
+++ b/arch/sh/kernel/process.c
@@ -51,28 +51,24 @@ void enable_hlt(void)
 EXPORT_SYMBOL(enable_hlt);
-void default_idle(void)
+void cpu_idle(void)
 {
        /* endless idle loop with no priority at all */
        while (1) {
                if (hlt_counter) {
-                        while (1)
+                        while (!need_resched())
-                                if (need_resched())
+                                cpu_relax();
-                                        break;
                } else {
                        while (!need_resched())
                                cpu_sleep();
                }
+                preempt_enable_no_resched();
                schedule();
+                preempt_disable();
        }
 }
-void cpu_idle(void)
-{
-        default_idle();
-}
 void machine_restart(char * __unused)
 {
        /* SR.BL=1 and invoke address error to let CPU reset (manual reset) */
diff --git a/arch/sh/kernel/smp.c b/arch/sh/kernel/smp.c
index 5ecefc02896a..59e49b18252c 100644
--- a/arch/sh/kernel/smp.c
+++ b/arch/sh/kernel/smp.c
@@ -112,7 +112,9 @@ int __cpu_up(unsigned int cpu)
 int start_secondary(void *unused)
 {
-        unsigned int cpu = smp_processor_id();
+        unsigned int cpu;
+        cpu = smp_processor_id();
        atomic_inc(&init_mm.mm_count);
        current->active_mm = &init_mm;
@@ -120,6 +122,7 @@ int start_secondary(void *unused)
        smp_store_cpu_info(cpu);
        __smp_slave_init(cpu);
+        preempt_disable();
        per_cpu_trap_init();
        
        atomic_inc(&cpus_booted);
diff --git a/arch/sh64/kernel/process.c b/arch/sh64/kernel/process.c
index efde41c0cd66..b95d04141855 100644
--- a/arch/sh64/kernel/process.c
+++ b/arch/sh64/kernel/process.c
@@ -307,23 +307,19 @@ __setup("hlt", hlt_setup);
 static inline void hlt(void)
 {
-        if (hlt_counter)
-                return;
        __asm__ __volatile__ ("sleep" : : : "memory");
 }
 /*
 * The idle loop on a uniprocessor SH..
 */
-void default_idle(void)
+void cpu_idle(void)
 {
        /* endless idle loop with no priority at all */
        while (1) {
                if (hlt_counter) {
-                        while (1)
+                        while (!need_resched())
-                                if (need_resched())
+                                cpu_relax();
-                                        break;
                } else {
                        local_irq_disable();
                        while (!need_resched()) {
@@ -334,13 +330,11 @@ void default_idle(void)
                        }
                        local_irq_enable();
                }
+                preempt_enable_no_resched();
                schedule();
+                preempt_disable();
        }
-}
-void cpu_idle(void)
-{
-        default_idle();
 }
 void machine_restart(char * __unused)
diff --git a/arch/sparc/kernel/cpu.c b/arch/sparc/kernel/cpu.c
index 6a4ebc62193e..d7bfc61d2879 100644
--- a/arch/sparc/kernel/cpu.c
+++ b/arch/sparc/kernel/cpu.c
@@ -75,7 +75,7 @@ struct cpu_fp_info linux_sparc_fpu[] = {
  { 9, 3, "Fujitsu or Weitek on-chip FPU"},
 };
-#define NSPARCFPU  (sizeof(linux_sparc_fpu)/sizeof(struct cpu_fp_info))
+#define NSPARCFPU  ARRAY_SIZE(linux_sparc_fpu)
 struct cpu_iu_info linux_sparc_chips[] = {
  /* Sun4/100, 4/200, SLC */
@@ -120,7 +120,7 @@ struct cpu_iu_info linux_sparc_chips[] = {
  { 0xf, 0, "UNKNOWN CPU-VENDOR/TYPE"},
 };
-#define NSPARCCHIPS  (sizeof(linux_sparc_chips)/sizeof(struct cpu_iu_info))
+#define NSPARCCHIPS  ARRAY_SIZE(linux_sparc_chips)
 char *sparc_cpu_type;
 char *sparc_fpu_type;
diff --git a/arch/sparc/kernel/pcic.c b/arch/sparc/kernel/pcic.c
index 25e31d5ec99b..cccfc12802ed 100644
--- a/arch/sparc/kernel/pcic.c
+++ b/arch/sparc/kernel/pcic.c
@@ -143,7 +143,7 @@ static struct pcic_ca2irq pcic_i_jk[] = {
 * as several PROMs may be installed on the same physical board.
 */
 #define SN2L_INIT(name, map)    \
-  { name, map, sizeof(map)/sizeof(struct pcic_ca2irq) }
+  { name, map, ARRAY_SIZE(map) }
 static struct pcic_sn2list pcic_known_sysnames[] = {
        SN2L_INIT("SUNW,JavaEngine1", pcic_i_je1a),     /* JE1, PROM 2.32 */
diff --git a/arch/sparc/kernel/process.c b/arch/sparc/kernel/process.c
index 29e72b57d4fd..ea8647411462 100644
--- a/arch/sparc/kernel/process.c
+++ b/arch/sparc/kernel/process.c
@@ -67,13 +67,6 @@ extern void fpsave(unsigned long *, unsigned long *, void *, unsigned long *);
 struct task_struct *last_task_used_math = NULL;
 struct thread_info *current_set[NR_CPUS];
-/*
- * default_idle is new in 2.5. XXX Review, currently stolen from sparc64.
- */
-void default_idle(void)
-{
-}
 #ifndef CONFIG_SMP
 #define SUN4C_FAULT_HIGH 100
@@ -92,12 +85,11 @@ void cpu_idle(void)
                        static unsigned long fps;
                        unsigned long now;
                        unsigned long faults;
-                        unsigned long flags;
                        extern unsigned long sun4c_kernel_faults;
                        extern void sun4c_grow_kernel_ring(void);
-                        local_irq_save(flags);
+                        local_irq_disable();
                        now = jiffies;
                        count -= (now - last_jiffies);
                        last_jiffies = now;
@@ -113,14 +105,19 @@ void cpu_idle(void)
                                        sun4c_grow_kernel_ring();
                                }
                        }
-                        local_irq_restore(flags);
+                        local_irq_enable();
                }
-                while((!need_resched()) && pm_idle) {
+                if (pm_idle) {
-                        (*pm_idle)();
+                        while (!need_resched())
+                                (*pm_idle)();
+                } else {
+                        while (!need_resched())
+                                cpu_relax();
                }
+                preempt_enable_no_resched();
                schedule();
+                preempt_disable();
                check_pgt_cache();
        }
 }
@@ -130,13 +127,15 @@ void cpu_idle(void)
 /* This is being executed in task 0 'user space'. */
 void cpu_idle(void)
 {
+        set_thread_flag(TIF_POLLING_NRFLAG);
        /* endless idle loop with no priority at all */
        while(1) {
-                if(need_resched()) {
+                while (!need_resched())
-                        schedule();
+                        cpu_relax();
-                        check_pgt_cache();
+                preempt_enable_no_resched();
-                }
+                schedule();
-                barrier(); /* or else gcc optimizes... */
+                preempt_disable();
+                check_pgt_cache();
        }
 }
diff --git a/arch/sparc/mm/fault.c b/arch/sparc/mm/fault.c
index 2bbd53f3cafb..9eeed3347df3 100644
--- a/arch/sparc/mm/fault.c
+++ b/arch/sparc/mm/fault.c
@@ -33,8 +33,6 @@
 #include <asm/kdebug.h>
 #include <asm/uaccess.h>
-#define ELEMENTS(arr) (sizeof (arr)/sizeof (arr[0]))
 extern int prom_node_root;
 /* At boot time we determine these two values necessary for setting
diff --git a/arch/sparc64/kernel/cpu.c b/arch/sparc64/kernel/cpu.c
index 77ef5df4e5a7..00eed88ef2e8 100644
--- a/arch/sparc64/kernel/cpu.c
+++ b/arch/sparc64/kernel/cpu.c
@@ -43,7 +43,7 @@ struct cpu_fp_info linux_sparc_fpu[] = {
  { 0x3e, 0x22, 0, "UltraSparc IIIi+ integrated FPU"},
 };
-#define NSPARCFPU  (sizeof(linux_sparc_fpu)/sizeof(struct cpu_fp_info))
+#define NSPARCFPU  ARRAY_SIZE(linux_sparc_fpu)
 struct cpu_iu_info linux_sparc_chips[] = {
  { 0x17, 0x10, "TI UltraSparc I   (SpitFire)"},
@@ -59,7 +59,7 @@ struct cpu_iu_info linux_sparc_chips[] = {
  { 0x3e, 0x22, "TI UltraSparc IIIi+ (Serrano)"},
 };
-#define NSPARCCHIPS  (sizeof(linux_sparc_chips)/sizeof(struct cpu_iu_info))
+#define NSPARCCHIPS  ARRAY_SIZE(linux_sparc_chips)
 char *sparc_cpu_type = "cpu-oops";
 char *sparc_fpu_type = "fpu-oops";
diff --git a/arch/sparc64/kernel/ioctl32.c b/arch/sparc64/kernel/ioctl32.c
index 92e26304de90..e62214354bb5 100644
--- a/arch/sparc64/kernel/ioctl32.c
+++ b/arch/sparc64/kernel/ioctl32.c
@@ -92,10 +92,8 @@ static int fbiogscursor(unsigned int fd, unsigned int cmd, unsigned long arg)
        return sys_ioctl (fd, FBIOSCURSOR, (unsigned long)p);
 }
-typedef int (* ioctl32_handler_t)(unsigned int, unsigned int, unsigned long, struct file *);
 #define COMPATIBLE_IOCTL(cmd)           HANDLE_IOCTL((cmd),sys_ioctl)
-#define HANDLE_IOCTL(cmd,handler)       { (cmd), (ioctl32_handler_t)(handler), NULL },
+#define HANDLE_IOCTL(cmd,handler)       { (cmd), (ioctl_trans_handler_t)(handler), NULL },
 #define IOCTL_TABLE_START \
        struct ioctl_trans ioctl_start[] = {
 #define IOCTL_TABLE_END \
@@ -116,8 +114,6 @@ COMPATIBLE_IOCTL(FBIOGCURPOS)
 COMPATIBLE_IOCTL(FBIOGCURMAX)
 /* Little k */
 /* Little v, the video4linux ioctls */
-COMPATIBLE_IOCTL(_IOR('p', 20, int[7])) /* RTCGET */
-COMPATIBLE_IOCTL(_IOW('p', 21, int[7])) /* RTCSET */
 /* And these ioctls need translation */
 /* Note SIOCRTMSG is no longer, so this is safe and * the user would have seen just an -EINVAL anyways. */
 HANDLE_IOCTL(FBIOPUTCMAP32, fbiogetputcmap)
diff --git a/arch/sparc64/kernel/process.c b/arch/sparc64/kernel/process.c
index 7d10b0397091..02f9dec1d459 100644
--- a/arch/sparc64/kernel/process.c
+++ b/arch/sparc64/kernel/process.c
@@ -74,7 +74,9 @@ void cpu_idle(void)
                while (!need_resched())
                        barrier();
+                preempt_enable_no_resched();
                schedule();
+                preempt_disable();
                check_pgt_cache();
        }
 }
@@ -83,21 +85,31 @@ void cpu_idle(void)
 /*
 * the idle loop on a UltraMultiPenguin...
+ *
+ * TIF_POLLING_NRFLAG is set because we do not sleep the cpu
+ * inside of the idler task, so an interrupt is not needed
+ * to get a clean fast response.
+ *
+ * XXX Reverify this assumption... -DaveM
+ *
+ * Addendum: We do want it to do something for the signal
+ *           delivery case, we detect that by just seeing
+ *           if we are trying to send this to an idler or not.
 */
-#define idle_me_harder()        (cpu_data(smp_processor_id()).idle_volume += 1)
-#define unidle_me()             (cpu_data(smp_processor_id()).idle_volume = 0)
 void cpu_idle(void)
 {
+        cpuinfo_sparc *cpuinfo = &local_cpu_data();
        set_thread_flag(TIF_POLLING_NRFLAG);
        while(1) {
                if (need_resched()) {
-                        unidle_me();
+                        cpuinfo->idle_volume = 0;
-                        clear_thread_flag(TIF_POLLING_NRFLAG);
+                        preempt_enable_no_resched();
                        schedule();
-                        set_thread_flag(TIF_POLLING_NRFLAG);
+                        preempt_disable();
                        check_pgt_cache();
                }
-                idle_me_harder();
+                cpuinfo->idle_volume++;
                /* The store ordering is so that IRQ handlers on
                 * other cpus see our increasing idleness for the buddy
diff --git a/arch/sparc64/kernel/sbus.c b/arch/sparc64/kernel/sbus.c
index e09ddf927655..96b825055668 100644
--- a/arch/sparc64/kernel/sbus.c
+++ b/arch/sparc64/kernel/sbus.c
@@ -790,7 +790,7 @@ static unsigned long sysio_irq_offsets[] = {
 #undef bogon
-#define NUM_SYSIO_OFFSETS (sizeof(sysio_irq_offsets) / sizeof(sysio_irq_offsets[0]))
+#define NUM_SYSIO_OFFSETS ARRAY_SIZE(sysio_irq_offsets)
 /* Convert Interrupt Mapping register pointer to associated
 * Interrupt Clear register pointer, SYSIO specific version.
diff --git a/arch/sparc64/kernel/setup.c b/arch/sparc64/kernel/setup.c
index bf1849dd9c49..48180531562f 100644
--- a/arch/sparc64/kernel/setup.c
+++ b/arch/sparc64/kernel/setup.c
@@ -587,6 +587,8 @@ extern void mmu_info(struct seq_file *);
 unsigned int dcache_parity_tl1_occurred;
 unsigned int icache_parity_tl1_occurred;
+static int ncpus_probed;
 static int show_cpuinfo(struct seq_file *m, void *__unused)
 {
        seq_printf(m, 
@@ -595,8 +597,8 @@ static int show_cpuinfo(struct seq_file *m, void *__unused)
                   "promlib\t\t: Version 3 Revision %d\n"
                   "prom\t\t: %d.%d.%d\n"
                   "type\t\t: sun4u\n"
-                   "ncpus probed\t: %ld\n"
+                   "ncpus probed\t: %d\n"
-                   "ncpus active\t: %ld\n"
+                   "ncpus active\t: %d\n"
                   "D$ parity tl1\t: %u\n"
                   "I$ parity tl1\t: %u\n"
 #ifndef CONFIG_SMP
@@ -610,8 +612,8 @@ static int show_cpuinfo(struct seq_file *m, void *__unused)
                   prom_prev >> 16,
                   (prom_prev >> 8) & 0xff,
                   prom_prev & 0xff,
-                   (long)num_possible_cpus(),
+                   ncpus_probed,
-                   (long)num_online_cpus(),
+                   num_online_cpus(),
                   dcache_parity_tl1_occurred,
                   icache_parity_tl1_occurred
 #ifndef CONFIG_SMP
@@ -677,6 +679,15 @@ static int __init topology_init(void)
        int i, err;
        err = -ENOMEM;
+        /* Count the number of physically present processors in
+         * the machine, even on uniprocessor, so that /proc/cpuinfo
+         * output is consistent with 2.4.x
+         */
+        ncpus_probed = 0;
+        while (!cpu_find_by_instance(ncpus_probed, NULL, NULL))
+                ncpus_probed++;
        for (i = 0; i < NR_CPUS; i++) {
                if (cpu_possible(i)) {
                        struct cpu *p = kmalloc(sizeof(*p), GFP_KERNEL);
diff --git a/arch/sparc64/kernel/smp.c b/arch/sparc64/kernel/smp.c
index 5d90ee9aebf1..6efc03df51c3 100644
--- a/arch/sparc64/kernel/smp.c
+++ b/arch/sparc64/kernel/smp.c
@@ -39,7 +39,6 @@
 #include <asm/starfire.h>
 #include <asm/tlb.h>
-extern int linux_num_cpus;
 extern void calibrate_delay(void);
 /* Please don't make this stuff initdata!!!  --DaveM */
@@ -168,6 +167,9 @@ void __init smp_callin(void)
                rmb();
        cpu_set(cpuid, cpu_online_map);
+        /* idle thread is expected to have preempt disabled */
+        preempt_disable();
 }
 void cpu_panic(void)
@@ -1149,20 +1151,9 @@ void __init smp_cpus_done(unsigned int max_cpus)
               (bogosum/(5000/HZ))%100);
 }
-/* This needn't do anything as we do not sleep the cpu
- * inside of the idler task, so an interrupt is not needed
- * to get a clean fast response.
- *
- * XXX Reverify this assumption... -DaveM
- *
- * Addendum: We do want it to do something for the signal
- *           delivery case, we detect that by just seeing
- *           if we are trying to send this to an idler or not.
- */
 void smp_send_reschedule(int cpu)
 {
-        if (cpu_data(cpu).idle_volume == 0)
+        smp_receive_signal(cpu);
-                smp_receive_signal(cpu);
 }
 /* This is a nop because we capture all other cpus
diff --git a/arch/sparc64/mm/fault.c b/arch/sparc64/mm/fault.c
index 3be278d916db..6f0539aa44d0 100644
--- a/arch/sparc64/mm/fault.c
+++ b/arch/sparc64/mm/fault.c
@@ -30,8 +30,6 @@
 #include <asm/sections.h>
 #include <asm/kdebug.h>
-#define ELEMENTS(arr) (sizeof (arr)/sizeof (arr[0]))
 /*
 * To debug kernel to catch accesses to certain virtual/physical addresses.
 * Mode = 0 selects physical watchpoints, mode = 1 selects virtual watchpoints.
diff --git a/arch/um/drivers/net_kern.c b/arch/um/drivers/net_kern.c
index fe865d9a3721..84c73a300acb 100644
--- a/arch/um/drivers/net_kern.c
+++ b/arch/um/drivers/net_kern.c
@@ -243,34 +243,18 @@ static int uml_net_change_mtu(struct net_device *dev, int new_mtu)
        return err;
 }
-static int uml_net_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
+static void uml_net_get_drvinfo(struct net_device *dev,
-{
+                                struct ethtool_drvinfo *info)
-        static const struct ethtool_drvinfo info = {
+{
-                .cmd     = ETHTOOL_GDRVINFO,
+        strcpy(info->driver, DRIVER_NAME);
-                .driver  = DRIVER_NAME,
+        strcpy(info->version, "42");
-                .version = "42",
-        };
-        void *useraddr;
-        u32 ethcmd;
-        switch (cmd) {
-        case SIOCETHTOOL:
-                useraddr = ifr->ifr_data;
-                if (copy_from_user(&ethcmd, useraddr, sizeof(ethcmd)))
-                        return -EFAULT;
-                switch (ethcmd) {
-                case ETHTOOL_GDRVINFO:
-                        if (copy_to_user(useraddr, &info, sizeof(info)))
-                                return -EFAULT;
-                        return 0;
-                default:
-                        return -EOPNOTSUPP;
-                }
-        default:
-                return -EINVAL;
-        }
 }
+static struct ethtool_ops uml_net_ethtool_ops = {
+        .get_drvinfo    = uml_net_get_drvinfo,
+        .get_link       = ethtool_op_get_link,
+};
 void uml_net_user_timer_expire(unsigned long _conn)
 {
 #ifdef undef
@@ -284,9 +268,10 @@ void uml_net_user_timer_expire(unsigned long _conn)
 static DEFINE_SPINLOCK(devices_lock);
 static struct list_head devices = LIST_HEAD_INIT(devices);
-static struct device_driver uml_net_driver = {
+static struct platform_driver uml_net_driver = {
-        .name  = DRIVER_NAME,
+        .driver = {
-        .bus   = &platform_bus_type,
+                .name  = DRIVER_NAME,
+        },
 };
 static int driver_registered;
@@ -333,7 +318,7 @@ static int eth_configure(int n, void *init, char *mac,
        /* sysfs register */
        if (!driver_registered) {
-                driver_register(&uml_net_driver);
+                platform_driver_register(&uml_net_driver);
                driver_registered = 1;
        }
        device->pdev.id = n;
@@ -359,7 +344,7 @@ static int eth_configure(int n, void *init, char *mac,
        dev->tx_timeout = uml_net_tx_timeout;
        dev->set_mac_address = uml_net_set_mac;
        dev->change_mtu = uml_net_change_mtu;
-        dev->do_ioctl = uml_net_ioctl;
+        dev->ethtool_ops = &uml_net_ethtool_ops;
        dev->watchdog_timeo = (HZ >> 1);
        dev->irq = UM_ETH_IRQ;
diff --git a/arch/um/drivers/ubd_kern.c b/arch/um/drivers/ubd_kern.c
index b2c86257b0f8..93898917cbe5 100644
--- a/arch/um/drivers/ubd_kern.c
+++ b/arch/um/drivers/ubd_kern.c
@@ -823,9 +823,10 @@ static int ubd_mc_init(void)
 __initcall(ubd_mc_init);
-static struct device_driver ubd_driver = {
+static struct platform_driver ubd_driver = {
-        .name  = DRIVER_NAME,
+        .driver = {
-        .bus   = &platform_bus_type,
+                .name  = DRIVER_NAME,
+        },
 };
 int ubd_init(void)
@@ -850,7 +851,7 @@ int ubd_init(void)
                if (register_blkdev(fake_major, "ubd"))
                        return -1;
        }
-        driver_register(&ubd_driver);
+        platform_driver_register(&ubd_driver);
        for (i = 0; i < MAX_DEV; i++) 
                ubd_add(i);
        return 0;
diff --git a/arch/v850/kernel/process.c b/arch/v850/kernel/process.c
index 9c708c32c1f0..39cf247cdae4 100644
--- a/arch/v850/kernel/process.c
+++ b/arch/v850/kernel/process.c
@@ -36,11 +36,8 @@ extern void ret_from_fork (void);
 /* The idle loop.  */
 void default_idle (void)
 {
-        while (1) {
+        while (! need_resched ())
-                while (! need_resched ())
+                asm ("halt; nop; nop; nop; nop; nop" ::: "cc");
-                        asm ("halt; nop; nop; nop; nop; nop" ::: "cc");
-                schedule ();
-        }
 }
 void (*idle)(void) = default_idle;
@@ -54,7 +51,14 @@ void (*idle)(void) = default_idle;
 void cpu_idle (void)
 {
        /* endless idle loop with no priority at all */
-        (*idle) ();
+        while (1) {
+                while (!need_resched())
+                        (*idle) ();
+                preempt_enable_no_resched();
+                schedule();
+                preempt_disable();
+        }
 }
 /*
diff --git a/arch/x86_64/ia32/ia32_ioctl.c b/arch/x86_64/ia32/ia32_ioctl.c
index 4ba0e293d5e5..e335bd0b637d 100644
--- a/arch/x86_64/ia32/ia32_ioctl.c
+++ b/arch/x86_64/ia32/ia32_ioctl.c
@@ -64,12 +64,6 @@ struct ioctl_trans ioctl_start[] = {
 #include <linux/compat_ioctl.h>
 #define DECLARES
 #include "compat_ioctl.c"
-COMPATIBLE_IOCTL(HDIO_SET_KEEPSETTINGS)
-COMPATIBLE_IOCTL(HDIO_SCAN_HWIF)
-COMPATIBLE_IOCTL(BLKRASET)
-COMPATIBLE_IOCTL(0x4B50)   /* KDGHWCLK - not in the kernel, but don't complain */
-COMPATIBLE_IOCTL(0x4B51)   /* KDSHWCLK - not in the kernel, but don't complain */
-COMPATIBLE_IOCTL(FIOQSIZE)
 /* And these ioctls need translation */
 /* realtime device */
diff --git a/arch/x86_64/kernel/process.c b/arch/x86_64/kernel/process.c
index b5a89c0bdf59..59be85d9a4bc 100644
--- a/arch/x86_64/kernel/process.c
+++ b/arch/x86_64/kernel/process.c
@@ -86,12 +86,22 @@ EXPORT_SYMBOL(enable_hlt);
 */
 void default_idle(void)
 {
+        local_irq_enable();
        if (!atomic_read(&hlt_counter)) {
-                local_irq_disable();
+                clear_thread_flag(TIF_POLLING_NRFLAG);
-                if (!need_resched())
+                smp_mb__after_clear_bit();
-                        safe_halt();
+                while (!need_resched()) {
-                else
+                        local_irq_disable();
-                        local_irq_enable();
+                        if (!need_resched())
+                                safe_halt();
+                        else
+                                local_irq_enable();
+                }
+                set_thread_flag(TIF_POLLING_NRFLAG);
+        } else {
+                while (!need_resched())
+                        cpu_relax();
        }
 }
@@ -102,30 +112,16 @@ void default_idle(void)
 */
 static void poll_idle (void)
 {
-        int oldval;
        local_irq_enable();
-        /*
+        asm volatile(
-         * Deal with another CPU just having chosen a thread to
+                "2:"
-         * run here:
+                "testl %0,%1;"
-         */
+                "rep; nop;"
-        oldval = test_and_clear_thread_flag(TIF_NEED_RESCHED);
+                "je 2b;"
+                : :
-        if (!oldval) {
+                "i" (_TIF_NEED_RESCHED),
-                set_thread_flag(TIF_POLLING_NRFLAG); 
+                "m" (current_thread_info()->flags));
-                asm volatile(
-                        "2:"
-                        "testl %0,%1;"
-                        "rep; nop;"
-                        "je 2b;"
-                        : :
-                        "i" (_TIF_NEED_RESCHED), 
-                        "m" (current_thread_info()->flags));
-                clear_thread_flag(TIF_POLLING_NRFLAG);
-        } else {
-                set_need_resched();
-        }
 }
 void cpu_idle_wait(void)
@@ -187,6 +183,8 @@ static inline void play_dead(void)
 */
 void cpu_idle (void)
 {
+        set_thread_flag(TIF_POLLING_NRFLAG);
        /* endless idle loop with no priority at all */
        while (1) {
                while (!need_resched()) {
@@ -204,7 +202,9 @@ void cpu_idle (void)
                        idle();
                }
+                preempt_enable_no_resched();
                schedule();
+                preempt_disable();
        }
 }
@@ -219,15 +219,12 @@ static void mwait_idle(void)
 {
        local_irq_enable();
-        if (!need_resched()) {
+        while (!need_resched()) {
-                set_thread_flag(TIF_POLLING_NRFLAG);
+                __monitor((void *)&current_thread_info()->flags, 0, 0);
-                do {
+                smp_mb();
-                        __monitor((void *)&current_thread_info()->flags, 0, 0);
+                if (need_resched())
-                        if (need_resched())
+                        break;
-                                break;
+                __mwait(0, 0);
-                        __mwait(0, 0);
-                } while (!need_resched());
-                clear_thread_flag(TIF_POLLING_NRFLAG);
        }
 }
diff --git a/arch/x86_64/kernel/smpboot.c b/arch/x86_64/kernel/smpboot.c
index 4b5b088ec102..c4e59bbdc187 100644
--- a/arch/x86_64/kernel/smpboot.c
+++ b/arch/x86_64/kernel/smpboot.c
@@ -472,6 +472,7 @@ void __cpuinit start_secondary(void)
         * things done here to the most necessary things.
         */
        cpu_init();
+        preempt_disable();
        smp_callin();
        /* otherwise gcc will move up the smp_processor_id before the cpu_init */
diff --git a/arch/xtensa/kernel/process.c b/arch/xtensa/kernel/process.c
index 08ef6d82ee51..6a44b54ae817 100644
--- a/arch/xtensa/kernel/process.c
+++ b/arch/xtensa/kernel/process.c
@@ -96,8 +96,9 @@ void cpu_idle(void)
        while (1) {
                while (!need_resched())
                        platform_idle();
-                preempt_enable();
+                preempt_enable_no_resched();
                schedule();
+                preempt_disable();
        }
 }
diff --git a/arch/xtensa/platform-iss/network.c b/arch/xtensa/platform-iss/network.c
index 0682ffd38175..0dc55cc8691b 100644
--- a/arch/xtensa/platform-iss/network.c
+++ b/arch/xtensa/platform-iss/network.c
@@ -611,46 +611,15 @@ static int iss_net_change_mtu(struct net_device *dev, int new_mtu)
        return -EINVAL;
 }
-static int iss_net_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
-{
-#if 0
-        static const struct ethtool_drvinfo info = {
-                .cmd     = ETHTOOL_GDRVINFO,
-                .driver  = DRIVER_NAME,
-                .version = "42",
-        };
-        void *useraddr;
-        u32 ethcmd;
-        switch (cmd) {
-        case SIOCETHTOOL:
-                useraddr = ifr->ifr_data;
-                if (copy_from_user(&ethcmd, useraddr, sizeof(ethcmd)))
-                        return -EFAULT;
-                switch (ethcmd) {
-                        case ETHTOOL_GDRVINFO:
-                                if (copy_to_user(useraddr, &info, sizeof(info)))
-                                        return -EFAULT;
-                                return 0;
-                        default:
-                                return -EOPNOTSUPP;
-                }
-        default:
-                return -EINVAL;
-        }
-#endif
-        return -EINVAL;
-}
 void iss_net_user_timer_expire(unsigned long _conn)
 {
 }
-static struct device_driver iss_net_driver = {
+static struct platform_driver iss_net_driver = {
-        .name  = DRIVER_NAME,
+        .driver = {
-        .bus   = &platform_bus_type,
+                .name  = DRIVER_NAME,
+        },
 };
 static int driver_registered;
@@ -701,7 +670,7 @@ static int iss_net_configure(int index, char *init)
        /* sysfs register */
        if (!driver_registered) {
-                driver_register(&iss_net_driver);
+                platform_driver_register(&iss_net_driver);
                driver_registered = 1;
        }
@@ -730,7 +699,6 @@ static int iss_net_configure(int index, char *init)
        dev->tx_timeout = iss_net_tx_timeout;
        dev->set_mac_address = iss_net_set_mac;
        dev->change_mtu = iss_net_change_mtu;
-        dev->do_ioctl = iss_net_ioctl;
        dev->watchdog_timeo = (HZ >> 1);
        dev->irq = -1;
author	Jeff Garzik <jgarzik@pobox.com>	2005-11-11 23:39:35 -0500
committer	Jeff Garzik <jgarzik@pobox.com>	2005-11-11 23:39:35 -0500
commit	f4256e301d9800b1e0276404cb01b3ac85b51067 (patch)
tree	975f56627b78f757608b31684311a24ca1478481 /arch
parent	fb2a26b9f8f5eda6b96ba9753edf105e5999d6d9 (diff)
parent	cd52d1ee9a92587b242d946a2300a3245d3b885a (diff)