diff options
author | Prabhakar Kushwaha <prabhakar@freescale.com> | 2011-04-20 00:12:44 -0400 |
---|---|---|
committer | Kumar Gala <galak@kernel.crashing.org> | 2011-05-19 02:15:42 -0400 |
commit | bc99d09abe14b4841454701c47e45f22444a890a (patch) | |
tree | 5ac103e873a71c79aaac561678f96816e187e77a /arch | |
parent | eb2c5d9965adec2d7cd1946fa39f2dece073dab7 (diff) |
powerpc/85xx: Fix PCIe IDSEL for Px020RDB
PCIe device in legacy mode can trigger interrupts using the wires #INTA,
#INTB ,#INTC and #INTD. PCI devices are obligated to use #INTx for
interrupts under legacy mode. Each PCI slot or device is typically wired
to different inputs on the interrupt controller.
So, Define interrupt-map and interrupt-map-mask properties for device tree
to of map each PCI interrupt signal to the inputs of the interrupt
controller.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/powerpc/boot/dts/p1020rdb.dts | 16 | ||||
-rw-r--r-- | arch/powerpc/boot/dts/p2020rdb.dts | 16 | ||||
-rw-r--r-- | arch/powerpc/boot/dts/p2020rdb_camp_core0.dts | 8 | ||||
-rw-r--r-- | arch/powerpc/boot/dts/p2020rdb_camp_core1.dts | 8 |
4 files changed, 48 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/p1020rdb.dts b/arch/powerpc/boot/dts/p1020rdb.dts index 7ed4793489ce..d6a8ae458137 100644 --- a/arch/powerpc/boot/dts/p1020rdb.dts +++ b/arch/powerpc/boot/dts/p1020rdb.dts | |||
@@ -257,6 +257,14 @@ | |||
257 | pci0: pcie@ffe09000 { | 257 | pci0: pcie@ffe09000 { |
258 | ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 | 258 | ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 |
259 | 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; | 259 | 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; |
260 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | ||
261 | interrupt-map = < | ||
262 | /* IDSEL 0x0 */ | ||
263 | 0000 0x0 0x0 0x1 &mpic 0x4 0x1 | ||
264 | 0000 0x0 0x0 0x2 &mpic 0x5 0x1 | ||
265 | 0000 0x0 0x0 0x3 &mpic 0x6 0x1 | ||
266 | 0000 0x0 0x0 0x4 &mpic 0x7 0x1 | ||
267 | >; | ||
260 | pcie@0 { | 268 | pcie@0 { |
261 | reg = <0x0 0x0 0x0 0x0 0x0>; | 269 | reg = <0x0 0x0 0x0 0x0 0x0>; |
262 | #size-cells = <2>; | 270 | #size-cells = <2>; |
@@ -275,6 +283,14 @@ | |||
275 | pci1: pcie@ffe0a000 { | 283 | pci1: pcie@ffe0a000 { |
276 | ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 | 284 | ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 |
277 | 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; | 285 | 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; |
286 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | ||
287 | interrupt-map = < | ||
288 | /* IDSEL 0x0 */ | ||
289 | 0000 0x0 0x0 0x1 &mpic 0x0 0x1 | ||
290 | 0000 0x0 0x0 0x2 &mpic 0x1 0x1 | ||
291 | 0000 0x0 0x0 0x3 &mpic 0x2 0x1 | ||
292 | 0000 0x0 0x0 0x4 &mpic 0x3 0x1 | ||
293 | >; | ||
278 | pcie@0 { | 294 | pcie@0 { |
279 | reg = <0x0 0x0 0x0 0x0 0x0>; | 295 | reg = <0x0 0x0 0x0 0x0 0x0>; |
280 | #size-cells = <2>; | 296 | #size-cells = <2>; |
diff --git a/arch/powerpc/boot/dts/p2020rdb.dts b/arch/powerpc/boot/dts/p2020rdb.dts index 60a0a8c725d6..3782a58f13be 100644 --- a/arch/powerpc/boot/dts/p2020rdb.dts +++ b/arch/powerpc/boot/dts/p2020rdb.dts | |||
@@ -249,6 +249,14 @@ | |||
249 | pci1: pcie@ffe09000 { | 249 | pci1: pcie@ffe09000 { |
250 | ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 | 250 | ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 |
251 | 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; | 251 | 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; |
252 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | ||
253 | interrupt-map = < | ||
254 | /* IDSEL 0x0 */ | ||
255 | 0000 0x0 0x0 0x1 &mpic 0x4 0x1 | ||
256 | 0000 0x0 0x0 0x2 &mpic 0x5 0x1 | ||
257 | 0000 0x0 0x0 0x3 &mpic 0x6 0x1 | ||
258 | 0000 0x0 0x0 0x4 &mpic 0x7 0x1 | ||
259 | >; | ||
252 | pcie@0 { | 260 | pcie@0 { |
253 | reg = <0x0 0x0 0x0 0x0 0x0>; | 261 | reg = <0x0 0x0 0x0 0x0 0x0>; |
254 | #size-cells = <2>; | 262 | #size-cells = <2>; |
@@ -267,6 +275,14 @@ | |||
267 | pci2: pcie@ffe0a000 { | 275 | pci2: pcie@ffe0a000 { |
268 | ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 | 276 | ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 |
269 | 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; | 277 | 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; |
278 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | ||
279 | interrupt-map = < | ||
280 | /* IDSEL 0x0 */ | ||
281 | 0000 0x0 0x0 0x1 &mpic 0x0 0x1 | ||
282 | 0000 0x0 0x0 0x2 &mpic 0x1 0x1 | ||
283 | 0000 0x0 0x0 0x3 &mpic 0x2 0x1 | ||
284 | 0000 0x0 0x0 0x4 &mpic 0x3 0x1 | ||
285 | >; | ||
270 | pcie@0 { | 286 | pcie@0 { |
271 | reg = <0x0 0x0 0x0 0x0 0x0>; | 287 | reg = <0x0 0x0 0x0 0x0 0x0>; |
272 | #size-cells = <2>; | 288 | #size-cells = <2>; |
diff --git a/arch/powerpc/boot/dts/p2020rdb_camp_core0.dts b/arch/powerpc/boot/dts/p2020rdb_camp_core0.dts index 72c912fd3dd9..fc8ddddfccb6 100644 --- a/arch/powerpc/boot/dts/p2020rdb_camp_core0.dts +++ b/arch/powerpc/boot/dts/p2020rdb_camp_core0.dts | |||
@@ -175,6 +175,14 @@ | |||
175 | pci1: pcie@ffe09000 { | 175 | pci1: pcie@ffe09000 { |
176 | ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 | 176 | ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 |
177 | 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; | 177 | 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; |
178 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | ||
179 | interrupt-map = < | ||
180 | /* IDSEL 0x0 */ | ||
181 | 0000 0x0 0x0 0x1 &mpic 0x4 0x1 | ||
182 | 0000 0x0 0x0 0x2 &mpic 0x5 0x1 | ||
183 | 0000 0x0 0x0 0x3 &mpic 0x6 0x1 | ||
184 | 0000 0x0 0x0 0x4 &mpic 0x7 0x1 | ||
185 | >; | ||
178 | pcie@0 { | 186 | pcie@0 { |
179 | reg = <0x0 0x0 0x0 0x0 0x0>; | 187 | reg = <0x0 0x0 0x0 0x0 0x0>; |
180 | #size-cells = <2>; | 188 | #size-cells = <2>; |
diff --git a/arch/powerpc/boot/dts/p2020rdb_camp_core1.dts b/arch/powerpc/boot/dts/p2020rdb_camp_core1.dts index eb572ccecb3d..261c34ba45ec 100644 --- a/arch/powerpc/boot/dts/p2020rdb_camp_core1.dts +++ b/arch/powerpc/boot/dts/p2020rdb_camp_core1.dts | |||
@@ -203,6 +203,14 @@ | |||
203 | pci2: pcie@ffe0a000 { | 203 | pci2: pcie@ffe0a000 { |
204 | ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 | 204 | ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 |
205 | 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; | 205 | 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; |
206 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | ||
207 | interrupt-map = < | ||
208 | /* IDSEL 0x0 */ | ||
209 | 0000 0x0 0x0 0x1 &mpic 0x0 0x1 | ||
210 | 0000 0x0 0x0 0x2 &mpic 0x1 0x1 | ||
211 | 0000 0x0 0x0 0x3 &mpic 0x2 0x1 | ||
212 | 0000 0x0 0x0 0x4 &mpic 0x3 0x1 | ||
213 | >; | ||
206 | pcie@0 { | 214 | pcie@0 { |
207 | reg = <0x0 0x0 0x0 0x0 0x0>; | 215 | reg = <0x0 0x0 0x0 0x0 0x0>; |
208 | #size-cells = <2>; | 216 | #size-cells = <2>; |