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authorFlorian Fainelli <florian@openwrt.org>2008-08-22 11:00:22 -0400
committerRalf Baechle <ralf@linux-mips.org>2008-10-11 11:18:44 -0400
commit3cd4e067a3e548a56a8b5e202552dcd18a2783a9 (patch)
tree90aec37b9415ac73f82e6cbb7ff80ca4e2c10d06 /arch
parent021635280d4572b9d9bb5481b00afea8a66b295f (diff)
MIPS: RB532: Cleanup and group definitions to their right places
This patch moves GPIO related definitions to gpio.h and IRQ related to irq.h Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/rb532/devices.c16
1 files changed, 2 insertions, 14 deletions
diff --git a/arch/mips/rb532/devices.c b/arch/mips/rb532/devices.c
index 82ab395efa33..7090dc97606f 100644
--- a/arch/mips/rb532/devices.c
+++ b/arch/mips/rb532/devices.c
@@ -34,21 +34,11 @@
34#include <asm/mach-rc32434/rb.h> 34#include <asm/mach-rc32434/rb.h>
35#include <asm/mach-rc32434/integ.h> 35#include <asm/mach-rc32434/integ.h>
36#include <asm/mach-rc32434/gpio.h> 36#include <asm/mach-rc32434/gpio.h>
37 37#include <asm/mach-rc32434/irq.h>
38#define ETH0_DMA_RX_IRQ (GROUP1_IRQ_BASE + 0)
39#define ETH0_DMA_TX_IRQ (GROUP1_IRQ_BASE + 1)
40#define ETH0_RX_OVR_IRQ (GROUP3_IRQ_BASE + 9)
41#define ETH0_TX_UND_IRQ (GROUP3_IRQ_BASE + 10)
42 38
43#define ETH0_RX_DMA_ADDR (DMA0_BASE_ADDR + 0 * DMA_CHAN_OFFSET) 39#define ETH0_RX_DMA_ADDR (DMA0_BASE_ADDR + 0 * DMA_CHAN_OFFSET)
44#define ETH0_TX_DMA_ADDR (DMA0_BASE_ADDR + 1 * DMA_CHAN_OFFSET) 40#define ETH0_TX_DMA_ADDR (DMA0_BASE_ADDR + 1 * DMA_CHAN_OFFSET)
45 41
46/* NAND definitions */
47#define GPIO_RDY (1 << 0x08)
48#define GPIO_WPX (1 << 0x09)
49#define GPIO_ALE (1 << 0x0a)
50#define GPIO_CLE (1 << 0x0b)
51
52static struct resource korina_dev0_res[] = { 42static struct resource korina_dev0_res[] = {
53 { 43 {
54 .name = "korina_regs", 44 .name = "korina_regs",
@@ -101,8 +91,6 @@ static struct platform_device korina_dev0 = {
101 .num_resources = ARRAY_SIZE(korina_dev0_res), 91 .num_resources = ARRAY_SIZE(korina_dev0_res),
102}; 92};
103 93
104#define CF_GPIO_NUM 13
105
106static struct resource cf_slot0_res[] = { 94static struct resource cf_slot0_res[] = {
107 { 95 {
108 .name = "cf_membase", 96 .name = "cf_membase",
@@ -116,7 +104,7 @@ static struct resource cf_slot0_res[] = {
116}; 104};
117 105
118static struct cf_device cf_slot0_data = { 106static struct cf_device cf_slot0_data = {
119 .gpio_pin = 13 107 .gpio_pin = CF_GPIO_NUM
120}; 108};
121 109
122static struct platform_device cf_slot0 = { 110static struct platform_device cf_slot0 = {