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authorStephen Rothwell <sfr@canb.auug.org.au>2007-07-24 19:27:35 -0400
committerPaul Mackerras <paulus@samba.org>2007-07-26 02:12:17 -0400
commitc40b91b59de079583cde5f0c8e2c96d8af0f76a7 (patch)
tree8766c87b6d8578630859ba094b28367a89de2f49 /arch
parent56a4c6e31a25a218c066d8da27558a86310bbfd7 (diff)
[POWERPC] iSeries: Fix section mismatch warnings
WARNING: vmlinux.o(.text+0x8124): Section mismatch: reference to .init.text:.iSeries_early_setup (between '.__start_initialization_iSeries' and '.__mmu_off') WARNING: vmlinux.o(.text+0x8128): Section mismatch: reference to .init.text:.early_setup (between '.__start_initialization_iSeries' and '.__mmu_off') Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/kernel/head_64.S7
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index 8cdd48ea4391..1448af92c6a9 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -809,8 +809,9 @@ system_reset_iSeries:
809 mtmsrd r24 /* RI on */ 809 mtmsrd r24 /* RI on */
810 lhz r24,PACAPACAINDEX(r13) /* Get processor # */ 810 lhz r24,PACAPACAINDEX(r13) /* Get processor # */
811 cmpwi 0,r24,0 /* Are we processor 0? */ 811 cmpwi 0,r24,0 /* Are we processor 0? */
812 beq .__start_initialization_iSeries /* Start up the first processor */ 812 bne 1f
813 mfspr r4,SPRN_CTRLF 813 b .__start_initialization_iSeries /* Start up the first processor */
8141: mfspr r4,SPRN_CTRLF
814 li r5,CTRL_RUNLATCH /* Turn off the run light */ 815 li r5,CTRL_RUNLATCH /* Turn off the run light */
815 andc r4,r4,r5 816 andc r4,r4,r5
816 mtspr SPRN_CTRLT,r4 817 mtspr SPRN_CTRLT,r4
@@ -1611,7 +1612,7 @@ _GLOBAL(generic_secondary_smp_init)
1611#endif 1612#endif
1612 1613
1613#ifdef CONFIG_PPC_ISERIES 1614#ifdef CONFIG_PPC_ISERIES
1614_STATIC(__start_initialization_iSeries) 1615_INIT_STATIC(__start_initialization_iSeries)
1615 /* Clear out the BSS */ 1616 /* Clear out the BSS */
1616 LOAD_REG_IMMEDIATE(r11,__bss_stop) 1617 LOAD_REG_IMMEDIATE(r11,__bss_stop)
1617 LOAD_REG_IMMEDIATE(r8,__bss_start) 1618 LOAD_REG_IMMEDIATE(r8,__bss_start)