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authorLinus Torvalds <torvalds@linux-foundation.org>2008-10-11 13:09:45 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2008-10-11 13:09:45 -0400
commit7cc4e87f912bbefa440a51856b8d076e5d1f554a (patch)
tree1b8df8683f3de37d2e8211ffa8d151f60d59af62 /arch
parent5ba2f67afb02c5302b2898949ed6fc3b3d37dcf1 (diff)
parent69fc7eed5f56bce15b239e5110de2575a6970df4 (diff)
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (236 commits) [ARM] 5300/1: fixup spitz reset during boot [ARM] 5295/1: make ZONE_DMA optional [ARM] 5239/1: Palm Zire 72 power management support [ARM] 5298/1: Drop desc_handle_irq() [ARM] 5297/1: [KS8695] Fix two compile-time warnings [ARM] 5296/1: [KS8695] Replace macro's with trailing underscores. [ARM] pxa: allow multi-machine PCMCIA builds [ARM] pxa: add preliminary CPUFREQ support for PXA3xx [ARM] pxa: add missing ACCR bit definitions to pxa3xx-regs.h [ARM] pxa: rename cpu-pxa.c to cpufreq-pxa2xx.c [ARM] pxa/zylonite: add support for USB OHCI [ARM] ohci-pxa27x: use ioremap() and offset for register access [ARM] ohci-pxa27x: introduce pxa27x_clear_otgph() [ARM] ohci-pxa27x: use platform_get_{irq,resource} for the resource [ARM] ohci-pxa27x: move OHCI controller specific registers into the driver [ARM] ohci-pxa27x: introduce flags to avoid direct access to OHCI registers [ARM] pxa: move I2S register and bit definitions into pxa2xx-i2s.c [ARM] pxa: simplify DMA register definitions [ARM] pxa: make additional DCSR bits valid for PXA3xx [ARM] pxa: move i2c register and bit definitions into i2c-pxa.c ... Fixed up conflicts in arch/arm/mach-versatile/core.c sound/soc/pxa/pxa2xx-ac97.c sound/soc/pxa/pxa2xx-i2s.c manually.
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/Kconfig74
-rw-r--r--arch/arm/Makefile2
-rw-r--r--arch/arm/boot/compressed/Makefile2
-rw-r--r--arch/arm/boot/compressed/head.S3
-rw-r--r--arch/arm/common/Kconfig3
-rw-r--r--arch/arm/common/dmabounce.c287
-rw-r--r--arch/arm/common/gic.c2
-rw-r--r--arch/arm/common/it8152.c14
-rw-r--r--arch/arm/common/locomo.c28
-rw-r--r--arch/arm/common/sa1111.c2
-rw-r--r--arch/arm/common/scoop.c2
-rw-r--r--arch/arm/common/sharpsl_param.c2
-rw-r--r--arch/arm/common/time-acorn.c2
-rw-r--r--arch/arm/common/uengine.c2
-rw-r--r--arch/arm/common/via82c505.c2
-rw-r--r--arch/arm/common/vic.c2
-rw-r--r--arch/arm/configs/afeb9260_defconfig1259
-rw-r--r--arch/arm/configs/at91sam9rlek_defconfig1
-rw-r--r--arch/arm/configs/cm_x300_defconfig1466
-rw-r--r--arch/arm/configs/jornada720_defconfig1057
-rw-r--r--arch/arm/configs/orion5x_defconfig3
-rw-r--r--arch/arm/configs/palmz72_defconfig951
-rw-r--r--arch/arm/configs/viper_defconfig1678
-rw-r--r--arch/arm/configs/xm_x2xx_defconfig (renamed from arch/arm/configs/xm_x270_defconfig)237
-rw-r--r--arch/arm/include/asm/bug.h2
-rw-r--r--arch/arm/include/asm/cacheflush.h90
-rw-r--r--arch/arm/include/asm/cachetype.h52
-rw-r--r--arch/arm/include/asm/cputype.h64
-rw-r--r--arch/arm/include/asm/dma-mapping.h378
-rw-r--r--arch/arm/include/asm/elf.h72
-rw-r--r--arch/arm/include/asm/futex.h124
-rw-r--r--arch/arm/include/asm/io.h5
-rw-r--r--arch/arm/include/asm/irq.h4
-rw-r--r--arch/arm/include/asm/kprobes.h1
-rw-r--r--arch/arm/include/asm/mach/map.h17
-rw-r--r--arch/arm/include/asm/mach/udc_pxa2xx.h3
-rw-r--r--arch/arm/include/asm/mc146818rtc.h2
-rw-r--r--arch/arm/include/asm/memory.h40
-rw-r--r--arch/arm/include/asm/mmu_context.h1
-rw-r--r--arch/arm/include/asm/page.h5
-rw-r--r--arch/arm/include/asm/pgtable.h88
-rw-r--r--arch/arm/include/asm/ptrace.h7
-rw-r--r--arch/arm/include/asm/setup.h11
-rw-r--r--arch/arm/include/asm/sparsemem.h20
-rw-r--r--arch/arm/include/asm/system.h58
-rw-r--r--arch/arm/include/asm/thread_info.h2
-rw-r--r--arch/arm/include/asm/uaccess.h10
-rw-r--r--arch/arm/include/asm/vga.h2
-rw-r--r--arch/arm/kernel/Makefile2
-rw-r--r--arch/arm/kernel/armksyms.c4
-rw-r--r--arch/arm/kernel/bios32.c2
-rw-r--r--arch/arm/kernel/crunch.c2
-rw-r--r--arch/arm/kernel/debug.S5
-rw-r--r--arch/arm/kernel/dma-isa.c3
-rw-r--r--arch/arm/kernel/ecard.c6
-rw-r--r--arch/arm/kernel/elf.c79
-rw-r--r--arch/arm/kernel/entry-armv.S16
-rw-r--r--arch/arm/kernel/entry-common.S25
-rw-r--r--arch/arm/kernel/fiq.c1
-rw-r--r--arch/arm/kernel/head-common.S19
-rw-r--r--arch/arm/kernel/head-nommu.S4
-rw-r--r--arch/arm/kernel/head.S12
-rw-r--r--arch/arm/kernel/init_task.c2
-rw-r--r--arch/arm/kernel/io.c3
-rw-r--r--arch/arm/kernel/irq.c11
-rw-r--r--arch/arm/kernel/kprobes-decode.c4
-rw-r--r--arch/arm/kernel/kprobes.c5
-rw-r--r--arch/arm/kernel/machine_kexec.c2
-rw-r--r--arch/arm/kernel/module.c2
-rw-r--r--arch/arm/kernel/process.c33
-rw-r--r--arch/arm/kernel/ptrace.c10
-rw-r--r--arch/arm/kernel/setup.c279
-rw-r--r--arch/arm/kernel/signal.c2
-rw-r--r--arch/arm/kernel/sys_arm.c3
-rw-r--r--arch/arm/kernel/sys_oabi-compat.c2
-rw-r--r--arch/arm/kernel/time.c2
-rw-r--r--arch/arm/kernel/traps.c18
-rw-r--r--arch/arm/kernel/xscale-cp0.c2
-rw-r--r--arch/arm/lib/ashldi3.S2
-rw-r--r--arch/arm/lib/ashrdi3.S2
-rw-r--r--arch/arm/lib/backtrace.S4
-rw-r--r--arch/arm/lib/changebit.S2
-rw-r--r--arch/arm/lib/clear_user.S3
-rw-r--r--arch/arm/lib/clearbit.S2
-rw-r--r--arch/arm/lib/copy_from_user.S2
-rw-r--r--arch/arm/lib/copy_page.S1
-rw-r--r--arch/arm/lib/copy_to_user.S2
-rw-r--r--arch/arm/lib/csumipv6.S1
-rw-r--r--arch/arm/lib/csumpartial.S1
-rw-r--r--arch/arm/lib/csumpartialcopy.S7
-rw-r--r--arch/arm/lib/csumpartialcopygeneric.S1
-rw-r--r--arch/arm/lib/csumpartialcopyuser.S7
-rw-r--r--arch/arm/lib/delay.S3
-rw-r--r--arch/arm/lib/div64.S1
-rw-r--r--arch/arm/lib/findbit.S8
-rw-r--r--arch/arm/lib/getuser.S14
-rw-r--r--arch/arm/lib/io-readsb.S1
-rw-r--r--arch/arm/lib/io-readsl.S1
-rw-r--r--arch/arm/lib/io-readsw-armv4.S1
-rw-r--r--arch/arm/lib/io-writesb.S1
-rw-r--r--arch/arm/lib/io-writesl.S1
-rw-r--r--arch/arm/lib/io-writesw-armv4.S1
-rw-r--r--arch/arm/lib/lib1funcs.S11
-rw-r--r--arch/arm/lib/lshrdi3.S2
-rw-r--r--arch/arm/lib/memchr.S1
-rw-r--r--arch/arm/lib/memcpy.S1
-rw-r--r--arch/arm/lib/memmove.S1
-rw-r--r--arch/arm/lib/memset.S1
-rw-r--r--arch/arm/lib/memzero.S1
-rw-r--r--arch/arm/lib/muldi3.S2
-rw-r--r--arch/arm/lib/putuser.S18
-rw-r--r--arch/arm/lib/setbit.S2
-rw-r--r--arch/arm/lib/sha1.S3
-rw-r--r--arch/arm/lib/strchr.S1
-rw-r--r--arch/arm/lib/strncpy_from_user.S1
-rw-r--r--arch/arm/lib/strnlen_user.S1
-rw-r--r--arch/arm/lib/strrchr.S1
-rw-r--r--arch/arm/lib/testchangebit.S2
-rw-r--r--arch/arm/lib/testclearbit.S2
-rw-r--r--arch/arm/lib/testsetbit.S2
-rw-r--r--arch/arm/lib/uaccess.S2
-rw-r--r--arch/arm/lib/ucmpdi2.S4
-rw-r--r--arch/arm/mach-at91/Kconfig22
-rw-r--r--arch/arm/mach-at91/Makefile2
-rw-r--r--arch/arm/mach-at91/at91cap9.c6
-rw-r--r--arch/arm/mach-at91/at91cap9_devices.c54
-rw-r--r--arch/arm/mach-at91/at91sam9263.c6
-rw-r--r--arch/arm/mach-at91/at91sam9263_devices.c53
-rw-r--r--arch/arm/mach-at91/at91sam9rl.c6
-rw-r--r--arch/arm/mach-at91/at91sam9rl_devices.c98
-rw-r--r--arch/arm/mach-at91/at91x40_time.c2
-rw-r--r--arch/arm/mach-at91/board-afeb-9260v1.c210
-rw-r--r--arch/arm/mach-at91/board-cap9adk.c2
-rw-r--r--arch/arm/mach-at91/board-carmeva.c28
-rw-r--r--arch/arm/mach-at91/board-csb337.c12
-rw-r--r--arch/arm/mach-at91/board-csb637.c4
-rw-r--r--arch/arm/mach-at91/board-dk.c4
-rw-r--r--arch/arm/mach-at91/board-ecbat91.c2
-rw-r--r--arch/arm/mach-at91/board-ek.c4
-rw-r--r--arch/arm/mach-at91/board-picotux200.c2
-rw-r--r--arch/arm/mach-at91/board-qil-a9260.c14
-rw-r--r--arch/arm/mach-at91/board-sam9-l9260.c4
-rw-r--r--arch/arm/mach-at91/board-sam9260ek.c80
-rw-r--r--arch/arm/mach-at91/board-sam9261ek.c18
-rw-r--r--arch/arm/mach-at91/board-sam9263ek.c64
-rw-r--r--arch/arm/mach-at91/board-sam9g20ek.c8
-rw-r--r--arch/arm/mach-at91/board-sam9rlek.c8
-rw-r--r--arch/arm/mach-at91/board-usb-a9260.c14
-rw-r--r--arch/arm/mach-at91/board-usb-a9263.c14
-rw-r--r--arch/arm/mach-at91/board-yl-9200.c50
-rw-r--r--arch/arm/mach-at91/clock.c3
-rw-r--r--arch/arm/mach-at91/gpio.c5
-rw-r--r--arch/arm/mach-at91/include/mach/at91_pit.h3
-rw-r--r--arch/arm/mach-at91/include/mach/at91_rstc.h3
-rw-r--r--arch/arm/mach-at91/include/mach/at91_rtt.h3
-rw-r--r--arch/arm/mach-at91/include/mach/at91_shdwc.h3
-rw-r--r--arch/arm/mach-at91/include/mach/at91_wdt.h3
-rw-r--r--arch/arm/mach-at91/include/mach/at91cap9_ddrsdr.h2
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9260_matrix.h2
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9261_matrix.h2
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9_sdramc.h3
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9_smc.h3
-rw-r--r--arch/arm/mach-at91/include/mach/board.h14
-rw-r--r--arch/arm/mach-at91/include/mach/irqs.h2
-rw-r--r--arch/arm/mach-at91/include/mach/uncompress.h2
-rw-r--r--arch/arm/mach-at91/leds.c45
-rw-r--r--arch/arm/mach-at91/pm.c2
-rw-r--r--arch/arm/mach-at91/pm_slowclock.S283
-rw-r--r--arch/arm/mach-clps711x/autcpu12.c2
-rw-r--r--arch/arm/mach-clps711x/cdb89712.c2
-rw-r--r--arch/arm/mach-clps711x/include/mach/system.h2
-rw-r--r--arch/arm/mach-clps711x/irq.c2
-rw-r--r--arch/arm/mach-clps711x/p720t-leds.c2
-rw-r--r--arch/arm/mach-clps711x/p720t.c2
-rw-r--r--arch/arm/mach-clps711x/time.c2
-rw-r--r--arch/arm/mach-clps7500/core.c2
-rw-r--r--arch/arm/mach-clps7500/include/mach/irq.h2
-rw-r--r--arch/arm/mach-clps7500/include/mach/memory.h8
-rw-r--r--arch/arm/mach-clps7500/include/mach/system.h2
-rw-r--r--arch/arm/mach-davinci/Makefile2
-rw-r--r--arch/arm/mach-davinci/board-evm.c341
-rw-r--r--arch/arm/mach-davinci/clock.c2
-rw-r--r--arch/arm/mach-davinci/devices.c48
-rw-r--r--arch/arm/mach-davinci/gpio.c138
-rw-r--r--arch/arm/mach-davinci/id.c3
-rw-r--r--arch/arm/mach-davinci/include/mach/common.h3
-rw-r--r--arch/arm/mach-davinci/include/mach/gpio.h73
-rw-r--r--arch/arm/mach-davinci/include/mach/i2c.h7
-rw-r--r--arch/arm/mach-davinci/include/mach/io.h43
-rw-r--r--arch/arm/mach-davinci/include/mach/system.h2
-rw-r--r--arch/arm/mach-davinci/io.c2
-rw-r--r--arch/arm/mach-davinci/irq.c2
-rw-r--r--arch/arm/mach-davinci/psc.c2
-rw-r--r--arch/arm/mach-davinci/serial.c2
-rw-r--r--arch/arm/mach-davinci/time.c2
-rw-r--r--arch/arm/mach-davinci/usb.c116
-rw-r--r--arch/arm/mach-ebsa110/core.c2
-rw-r--r--arch/arm/mach-ebsa110/io.c2
-rw-r--r--arch/arm/mach-ep93xx/Kconfig14
-rw-r--r--arch/arm/mach-ep93xx/adssphere.c28
-rw-r--r--arch/arm/mach-ep93xx/clock.c2
-rw-r--r--arch/arm/mach-ep93xx/core.c46
-rw-r--r--arch/arm/mach-ep93xx/edb9302.c8
-rw-r--r--arch/arm/mach-ep93xx/edb9302a.c28
-rw-r--r--arch/arm/mach-ep93xx/edb9307.c28
-rw-r--r--arch/arm/mach-ep93xx/edb9312.c8
-rw-r--r--arch/arm/mach-ep93xx/edb9315.c8
-rw-r--r--arch/arm/mach-ep93xx/edb9315a.c28
-rw-r--r--arch/arm/mach-ep93xx/gesbc9312.c29
-rw-r--r--arch/arm/mach-ep93xx/gpio.c6
-rw-r--r--arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h34
-rw-r--r--arch/arm/mach-ep93xx/include/mach/platform.h12
-rw-r--r--arch/arm/mach-ep93xx/include/mach/ts72xx.h2
-rw-r--r--arch/arm/mach-ep93xx/include/mach/uncompress.h21
-rw-r--r--arch/arm/mach-ep93xx/micro9.c34
-rw-r--r--arch/arm/mach-ep93xx/ts72xx.c28
-rw-r--r--arch/arm/mach-footbridge/cats-hw.c2
-rw-r--r--arch/arm/mach-footbridge/common.c2
-rw-r--r--arch/arm/mach-footbridge/dc21285.c2
-rw-r--r--arch/arm/mach-footbridge/dma.c2
-rw-r--r--arch/arm/mach-footbridge/include/mach/memory.h10
-rw-r--r--arch/arm/mach-footbridge/include/mach/system.h2
-rw-r--r--arch/arm/mach-footbridge/isa-irq.c5
-rw-r--r--arch/arm/mach-footbridge/isa-timer.c2
-rw-r--r--arch/arm/mach-footbridge/netwinder-hw.c2
-rw-r--r--arch/arm/mach-footbridge/time.c2
-rw-r--r--arch/arm/mach-h720x/common.c6
-rw-r--r--arch/arm/mach-h720x/cpu-h7202.c4
-rw-r--r--arch/arm/mach-imx/clock.c2
-rw-r--r--arch/arm/mach-imx/include/mach/irqs.h5
-rw-r--r--arch/arm/mach-imx/irq.c38
-rw-r--r--arch/arm/mach-imx/leds-mx1ads.c2
-rw-r--r--arch/arm/mach-imx/time.c2
-rw-r--r--arch/arm/mach-integrator/core.c2
-rw-r--r--arch/arm/mach-integrator/cpu.c2
-rw-r--r--arch/arm/mach-integrator/impd1.c2
-rw-r--r--arch/arm/mach-integrator/integrator_ap.c2
-rw-r--r--arch/arm/mach-integrator/integrator_cp.c5
-rw-r--r--arch/arm/mach-integrator/leds.c2
-rw-r--r--arch/arm/mach-integrator/pci_v3.c2
-rw-r--r--arch/arm/mach-iop13xx/include/mach/memory.h61
-rw-r--r--arch/arm/mach-iop13xx/include/mach/pci.h2
-rw-r--r--arch/arm/mach-iop13xx/io.c2
-rw-r--r--arch/arm/mach-iop13xx/msi.c3
-rw-r--r--arch/arm/mach-iop13xx/setup.c2
-rw-r--r--arch/arm/mach-iop13xx/tpmi.c2
-rw-r--r--arch/arm/mach-iop32x/glantank.c2
-rw-r--r--arch/arm/mach-iop32x/iq31244.c6
-rw-r--r--arch/arm/mach-iop32x/iq80321.c2
-rw-r--r--arch/arm/mach-iop32x/n2100.c2
-rw-r--r--arch/arm/mach-iop33x/iq80331.c2
-rw-r--r--arch/arm/mach-iop33x/iq80332.c2
-rw-r--r--arch/arm/mach-iop33x/uart.c2
-rw-r--r--arch/arm/mach-ixp2000/core.c33
-rw-r--r--arch/arm/mach-ixp2000/enp2611.c8
-rw-r--r--arch/arm/mach-ixp2000/include/mach/ixp2000-regs.h8
-rw-r--r--arch/arm/mach-ixp2000/ixdp2400.c2
-rw-r--r--arch/arm/mach-ixp2000/ixdp2800.c2
-rw-r--r--arch/arm/mach-ixp2000/ixdp2x00.c6
-rw-r--r--arch/arm/mach-ixp2000/ixdp2x01.c6
-rw-r--r--arch/arm/mach-ixp2000/pci.c2
-rw-r--r--arch/arm/mach-ixp23xx/core.c4
-rw-r--r--arch/arm/mach-ixp23xx/ixdp2351.c8
-rw-r--r--arch/arm/mach-ixp23xx/pci.c2
-rw-r--r--arch/arm/mach-ixp4xx/common-pci.c9
-rw-r--r--arch/arm/mach-ixp4xx/common.c2
-rw-r--r--arch/arm/mach-ixp4xx/fsg-setup.c2
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/cpu.h9
-rw-r--r--arch/arm/mach-ixp4xx/ixdp425-setup.c2
-rw-r--r--arch/arm/mach-ixp4xx/nas100d-setup.c2
-rw-r--r--arch/arm/mach-ixp4xx/nslu2-setup.c2
-rw-r--r--arch/arm/mach-kirkwood/addr-map.c8
-rw-r--r--arch/arm/mach-kirkwood/common.c84
-rw-r--r--arch/arm/mach-kirkwood/common.h7
-rw-r--r--arch/arm/mach-kirkwood/db88f6281-bp-setup.c1
-rw-r--r--arch/arm/mach-kirkwood/include/mach/irqs.h1
-rw-r--r--arch/arm/mach-kirkwood/include/mach/kirkwood.h14
-rw-r--r--arch/arm/mach-kirkwood/include/mach/timex.h1
-rw-r--r--arch/arm/mach-kirkwood/pcie.c6
-rw-r--r--arch/arm/mach-kirkwood/rd88f6281-setup.c1
-rw-r--r--arch/arm/mach-ks8695/cpu.c2
-rw-r--r--arch/arm/mach-ks8695/gpio.c22
-rw-r--r--arch/arm/mach-ks8695/include/mach/memory.h4
-rw-r--r--arch/arm/mach-ks8695/include/mach/regs-gpio.h4
-rw-r--r--arch/arm/mach-ks8695/include/mach/regs-lan.h4
-rw-r--r--arch/arm/mach-ks8695/include/mach/regs-wan.h4
-rw-r--r--arch/arm/mach-ks8695/include/mach/system.h2
-rw-r--r--arch/arm/mach-ks8695/include/mach/uncompress.h2
-rw-r--r--arch/arm/mach-ks8695/irq.c2
-rw-r--r--arch/arm/mach-ks8695/pci.c4
-rw-r--r--arch/arm/mach-ks8695/time.c2
-rw-r--r--arch/arm/mach-lh7a40x/Kconfig13
-rw-r--r--arch/arm/mach-lh7a40x/arch-kev7a400.c2
-rw-r--r--arch/arm/mach-lh7a40x/arch-lpd7a40x.c4
-rw-r--r--arch/arm/mach-lh7a40x/common.h1
-rw-r--r--arch/arm/mach-lh7a40x/include/mach/memory.h6
-rw-r--r--arch/arm/mach-lh7a40x/irq-lpd7a40x.c4
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-rw-r--r--arch/arm/oprofile/op_model_mpcore.c2
-rw-r--r--arch/arm/oprofile/op_model_v7.c411
-rw-r--r--arch/arm/oprofile/op_model_v7.h103
-rw-r--r--arch/arm/oprofile/op_model_xscale.c2
-rw-r--r--arch/arm/plat-iop/i2c.c2
-rw-r--r--arch/arm/plat-iop/io.c2
-rw-r--r--arch/arm/plat-iop/pci.c2
-rw-r--r--arch/arm/plat-iop/time.c2
-rw-r--r--arch/arm/plat-mxc/Kconfig11
-rw-r--r--arch/arm/plat-mxc/Makefile4
-rw-r--r--arch/arm/plat-mxc/devices.c36
-rw-r--r--arch/arm/plat-mxc/dma-mx1-mx2.c840
-rw-r--r--arch/arm/plat-mxc/include/mach/board-mx31ads.h3
-rw-r--r--arch/arm/plat-mxc/include/mach/clock.h2
-rw-r--r--arch/arm/plat-mxc/include/mach/common.h3
-rw-r--r--arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h89
-rw-r--r--arch/arm/plat-mxc/include/mach/entry-macro.S12
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h24
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-mx3.h20
-rw-r--r--arch/arm/plat-mxc/include/mach/irqs.h1
-rw-r--r--arch/arm/plat-mxc/include/mach/mx27.h1
-rw-r--r--arch/arm/plat-mxc/include/mach/mx31.h1
-rw-r--r--arch/arm/plat-mxc/include/mach/mxc.h6
-rw-r--r--arch/arm/plat-mxc/irq.c36
-rw-r--r--arch/arm/plat-omap/clock.c3
-rw-r--r--arch/arm/plat-omap/common.c2
-rw-r--r--arch/arm/plat-omap/cpu-omap.c2
-rw-r--r--arch/arm/plat-omap/debug-devices.c2
-rw-r--r--arch/arm/plat-omap/debug-leds.c2
-rw-r--r--arch/arm/plat-omap/devices.c2
-rw-r--r--arch/arm/plat-omap/dmtimer.c2
-rw-r--r--arch/arm/plat-omap/fb.c2
-rw-r--r--arch/arm/plat-omap/gpio.c8
-rw-r--r--arch/arm/plat-omap/include/mach/gpio.h2
-rw-r--r--arch/arm/plat-omap/include/mach/irqs.h2
-rw-r--r--arch/arm/plat-omap/mailbox.c2
-rw-r--r--arch/arm/plat-omap/mux.c2
-rw-r--r--arch/arm/plat-omap/ocpi.c2
-rw-r--r--arch/arm/plat-omap/sram.c2
-rw-r--r--arch/arm/plat-omap/usb.c2
-rw-r--r--arch/arm/plat-s3c24xx/clock.c2
-rw-r--r--arch/arm/plat-s3c24xx/common-smdk.c2
-rw-r--r--arch/arm/plat-s3c24xx/cpu.c4
-rw-r--r--arch/arm/plat-s3c24xx/devs.c2
-rw-r--r--arch/arm/plat-s3c24xx/dma.c2
-rw-r--r--arch/arm/plat-s3c24xx/gpio.c2
-rw-r--r--arch/arm/plat-s3c24xx/irq.c26
-rw-r--r--arch/arm/plat-s3c24xx/pm-simtec.c2
-rw-r--r--arch/arm/plat-s3c24xx/pm.c2
-rw-r--r--arch/arm/plat-s3c24xx/s3c244x-clock.c2
-rw-r--r--arch/arm/plat-s3c24xx/s3c244x-irq.c9
-rw-r--r--arch/arm/plat-s3c24xx/s3c244x.c2
-rw-r--r--arch/arm/plat-s3c24xx/time.c2
-rw-r--r--arch/arm/tools/mach-types44
-rw-r--r--arch/arm/vfp/entry.S8
-rw-r--r--arch/arm/vfp/vfphw.S25
664 files changed, 20568 insertions, 7114 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 70dba1668907..efeed65b4a66 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -148,7 +148,6 @@ config ARCH_MAY_HAVE_PC_FDC
148 148
149config ZONE_DMA 149config ZONE_DMA
150 bool 150 bool
151 default y
152 151
153config GENERIC_ISA_DMA 152config GENERIC_ISA_DMA
154 bool 153 bool
@@ -178,6 +177,11 @@ config OPROFILE_MPCORE
178config OPROFILE_ARM11_CORE 177config OPROFILE_ARM11_CORE
179 bool 178 bool
180 179
180config OPROFILE_ARMV7
181 def_bool y
182 depends on CPU_V7 && !SMP
183 bool
184
181endif 185endif
182 186
183config VECTORS_BASE 187config VECTORS_BASE
@@ -245,6 +249,7 @@ config ARCH_CLPS7500
245 select TIMER_ACORN 249 select TIMER_ACORN
246 select ISA 250 select ISA
247 select NO_IOPORT 251 select NO_IOPORT
252 select ARCH_SPARSEMEM_ENABLE
248 help 253 help
249 Support for the Cirrus Logic PS7500FE system-on-a-chip. 254 Support for the Cirrus Logic PS7500FE system-on-a-chip.
250 255
@@ -306,6 +311,7 @@ config ARCH_IOP13XX
306 select PLAT_IOP 311 select PLAT_IOP
307 select PCI 312 select PCI
308 select ARCH_SUPPORTS_MSI 313 select ARCH_SUPPORTS_MSI
314 select VMSPLIT_1G
309 help 315 help
310 Support for Intel's IOP13XX (XScale) family of processors. 316 Support for Intel's IOP13XX (XScale) family of processors.
311 317
@@ -350,6 +356,7 @@ config ARCH_IXP4XX
350 select GENERIC_GPIO 356 select GENERIC_GPIO
351 select GENERIC_TIME 357 select GENERIC_TIME
352 select GENERIC_CLOCKEVENTS 358 select GENERIC_CLOCKEVENTS
359 select ZONE_DMA if PCI
353 help 360 help
354 Support for Intel's IXP4XX (XScale) family of processors. 361 Support for Intel's IXP4XX (XScale) family of processors.
355 362
@@ -434,7 +441,7 @@ config ARCH_ORION5X
434 help 441 help
435 Support for the following Marvell Orion 5x series SoCs: 442 Support for the following Marvell Orion 5x series SoCs:
436 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182), 443 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
437 Orion-2 (5281). 444 Orion-2 (5281), Orion-1-90 (6183).
438 445
439config ARCH_PNX4008 446config ARCH_PNX4008
440 bool "Philips Nexperia PNX4008 Mobile" 447 bool "Philips Nexperia PNX4008 Mobile"
@@ -464,6 +471,7 @@ config ARCH_RPC
464 select HAVE_PATA_PLATFORM 471 select HAVE_PATA_PLATFORM
465 select ISA_DMA_API 472 select ISA_DMA_API
466 select NO_IOPORT 473 select NO_IOPORT
474 select ARCH_SPARSEMEM_ENABLE
467 help 475 help
468 On the Acorn Risc-PC, Linux can support the internal IDE disk and 476 On the Acorn Risc-PC, Linux can support the internal IDE disk and
469 CD-ROM interface, serial and parallel port, and the floppy drive. 477 CD-ROM interface, serial and parallel port, and the floppy drive.
@@ -471,9 +479,7 @@ config ARCH_RPC
471config ARCH_SA1100 479config ARCH_SA1100
472 bool "SA1100-based" 480 bool "SA1100-based"
473 select ISA 481 select ISA
474 select ARCH_DISCONTIGMEM_ENABLE
475 select ARCH_SPARSEMEM_ENABLE 482 select ARCH_SPARSEMEM_ENABLE
476 select ARCH_SELECT_MEMORY_MODEL
477 select ARCH_MTD_XIP 483 select ARCH_MTD_XIP
478 select GENERIC_GPIO 484 select GENERIC_GPIO
479 select GENERIC_TIME 485 select GENERIC_TIME
@@ -497,6 +503,7 @@ config ARCH_SHARK
497 bool "Shark" 503 bool "Shark"
498 select ISA 504 select ISA
499 select ISA_DMA 505 select ISA_DMA
506 select ZONE_DMA
500 select PCI 507 select PCI
501 help 508 help
502 Support for the StrongARM based Digital DNARD machine, also known 509 Support for the StrongARM based Digital DNARD machine, also known
@@ -504,6 +511,8 @@ config ARCH_SHARK
504 511
505config ARCH_LH7A40X 512config ARCH_LH7A40X
506 bool "Sharp LH7A40X" 513 bool "Sharp LH7A40X"
514 select ARCH_DISCONTIGMEM_ENABLE if !LH7A40X_CONTIGMEM
515 select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
507 help 516 help
508 Say Y here for systems based on one of the Sharp LH7A40X 517 Say Y here for systems based on one of the Sharp LH7A40X
509 System on a Chip processors. These CPUs include an ARM922T 518 System on a Chip processors. These CPUs include an ARM922T
@@ -515,7 +524,9 @@ config ARCH_DAVINCI
515 select GENERIC_TIME 524 select GENERIC_TIME
516 select GENERIC_CLOCKEVENTS 525 select GENERIC_CLOCKEVENTS
517 select GENERIC_GPIO 526 select GENERIC_GPIO
527 select ARCH_REQUIRE_GPIOLIB
518 select HAVE_CLK 528 select HAVE_CLK
529 select ZONE_DMA
519 help 530 help
520 Support for TI's DaVinci platform. 531 Support for TI's DaVinci platform.
521 532
@@ -734,6 +745,29 @@ config SMP
734 745
735 If you don't know what to do here, say N. 746 If you don't know what to do here, say N.
736 747
748choice
749 prompt "Memory split"
750 default VMSPLIT_3G
751 help
752 Select the desired split between kernel and user memory.
753
754 If you are not absolutely sure what you are doing, leave this
755 option alone!
756
757 config VMSPLIT_3G
758 bool "3G/1G user/kernel split"
759 config VMSPLIT_2G
760 bool "2G/2G user/kernel split"
761 config VMSPLIT_1G
762 bool "1G/3G user/kernel split"
763endchoice
764
765config PAGE_OFFSET
766 hex
767 default 0x40000000 if VMSPLIT_1G
768 default 0x80000000 if VMSPLIT_2G
769 default 0xC0000000
770
737config NR_CPUS 771config NR_CPUS
738 int "Maximum number of CPUs (2-32)" 772 int "Maximum number of CPUs (2-32)"
739 range 2 32 773 range 2 32
@@ -815,20 +849,18 @@ config ARCH_FLATMEM_HAS_HOLES
815 default y 849 default y
816 depends on FLATMEM 850 depends on FLATMEM
817 851
852# Discontigmem is deprecated
818config ARCH_DISCONTIGMEM_ENABLE 853config ARCH_DISCONTIGMEM_ENABLE
819 bool 854 bool
820 default (ARCH_LH7A40X && !LH7A40X_CONTIGMEM)
821 help
822 Say Y to support efficient handling of discontiguous physical memory,
823 for architectures which are either NUMA (Non-Uniform Memory Access)
824 or have huge holes in the physical address space for other reasons.
825 See <file:Documentation/vm/numa> for more.
826 855
827config ARCH_SPARSEMEM_ENABLE 856config ARCH_SPARSEMEM_ENABLE
828 bool 857 bool
829 858
859config ARCH_SPARSEMEM_DEFAULT
860 def_bool ARCH_SPARSEMEM_ENABLE
861
830config ARCH_SELECT_MEMORY_MODEL 862config ARCH_SELECT_MEMORY_MODEL
831 bool 863 def_bool ARCH_DISCONTIGMEM_ENABLE && ARCH_SPARSEMEM_ENABLE
832 864
833config NODES_SHIFT 865config NODES_SHIFT
834 int 866 int
@@ -845,7 +877,7 @@ config LEDS
845 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \ 877 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
846 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \ 878 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
847 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \ 879 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
848 ARCH_AT91 || MACH_TRIZEPS4 || ARCH_DAVINCI || \ 880 ARCH_AT91 || ARCH_DAVINCI || \
849 ARCH_KS8695 || MACH_RD88F5182 881 ARCH_KS8695 || MACH_RD88F5182
850 help 882 help
851 If you say Y here, the LEDs on your machine will be used 883 If you say Y here, the LEDs on your machine will be used
@@ -1005,9 +1037,9 @@ config ATAGS_PROC
1005 1037
1006endmenu 1038endmenu
1007 1039
1008if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP || ARCH_IMX || ARCH_PXA) 1040menu "CPU Power Management"
1009 1041
1010menu "CPU Frequency scaling" 1042if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP || ARCH_IMX || ARCH_PXA)
1011 1043
1012source "drivers/cpufreq/Kconfig" 1044source "drivers/cpufreq/Kconfig"
1013 1045
@@ -1047,10 +1079,12 @@ config CPU_FREQ_PXA
1047 default y 1079 default y
1048 select CPU_FREQ_DEFAULT_GOV_USERSPACE 1080 select CPU_FREQ_DEFAULT_GOV_USERSPACE
1049 1081
1050endmenu
1051
1052endif 1082endif
1053 1083
1084source "drivers/cpuidle/Kconfig"
1085
1086endmenu
1087
1054menu "Floating point emulation" 1088menu "Floating point emulation"
1055 1089
1056comment "At least one emulation must be selected" 1090comment "At least one emulation must be selected"
@@ -1202,6 +1236,8 @@ source "drivers/power/Kconfig"
1202 1236
1203source "drivers/hwmon/Kconfig" 1237source "drivers/hwmon/Kconfig"
1204 1238
1239source "drivers/thermal/Kconfig"
1240
1205source "drivers/watchdog/Kconfig" 1241source "drivers/watchdog/Kconfig"
1206 1242
1207source "drivers/ssb/Kconfig" 1243source "drivers/ssb/Kconfig"
@@ -1222,6 +1258,10 @@ source "drivers/usb/Kconfig"
1222 1258
1223source "drivers/mmc/Kconfig" 1259source "drivers/mmc/Kconfig"
1224 1260
1261source "drivers/memstick/Kconfig"
1262
1263source "drivers/accessibility/Kconfig"
1264
1225source "drivers/leds/Kconfig" 1265source "drivers/leds/Kconfig"
1226 1266
1227source "drivers/rtc/Kconfig" 1267source "drivers/rtc/Kconfig"
@@ -1230,6 +1270,8 @@ source "drivers/dma/Kconfig"
1230 1270
1231source "drivers/dca/Kconfig" 1271source "drivers/dca/Kconfig"
1232 1272
1273source "drivers/auxdisplay/Kconfig"
1274
1233source "drivers/regulator/Kconfig" 1275source "drivers/regulator/Kconfig"
1234 1276
1235source "drivers/uio/Kconfig" 1277source "drivers/uio/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 703a44fa0f9b..e2274bc0b544 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -47,7 +47,7 @@ comma = ,
47# Note that GCC does not numerically define an architecture version 47# Note that GCC does not numerically define an architecture version
48# macro, but instead defines a whole series of macros which makes 48# macro, but instead defines a whole series of macros which makes
49# testing for a specific architecture or later rather impossible. 49# testing for a specific architecture or later rather impossible.
50arch-$(CONFIG_CPU_32v7) :=-D__LINUX_ARM_ARCH__=7 $(call cc-option,-march=armv7a,-march=armv5t -Wa$(comma)-march=armv7a) 50arch-$(CONFIG_CPU_32v7) :=-D__LINUX_ARM_ARCH__=7 $(call cc-option,-march=armv7-a,-march=armv5t -Wa$(comma)-march=armv7-a)
51arch-$(CONFIG_CPU_32v6) :=-D__LINUX_ARM_ARCH__=6 $(call cc-option,-march=armv6,-march=armv5t -Wa$(comma)-march=armv6) 51arch-$(CONFIG_CPU_32v6) :=-D__LINUX_ARM_ARCH__=6 $(call cc-option,-march=armv6,-march=armv5t -Wa$(comma)-march=armv6)
52# Only override the compiler option if ARMv6. The ARMv6K extensions are 52# Only override the compiler option if ARMv6. The ARMv6K extensions are
53# always available in ARMv7 53# always available in ARMv7
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index 94462a097f86..7a03f2007882 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -76,7 +76,7 @@ KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS))
76endif 76endif
77 77
78EXTRA_CFLAGS := -fpic -fno-builtin 78EXTRA_CFLAGS := -fpic -fno-builtin
79EXTRA_AFLAGS := 79EXTRA_AFLAGS := -Wa,-march=all
80 80
81# Supply ZRELADDR, INITRD_PHYS and PARAMS_PHYS to the decompressor via 81# Supply ZRELADDR, INITRD_PHYS and PARAMS_PHYS to the decompressor via
82# linker symbols. We only define initrd_phys and params_phys if the 82# linker symbols. We only define initrd_phys and params_phys if the
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index d42f89b7760b..84a1e0496a3c 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -421,6 +421,7 @@ __setup_mmu: sub r3, r4, #16384 @ Page directory size
421 add r1, r1, #1048576 421 add r1, r1, #1048576
422 str r1, [r0] 422 str r1, [r0]
423 mov pc, lr 423 mov pc, lr
424ENDPROC(__setup_mmu)
424 425
425__armv4_mmu_cache_on: 426__armv4_mmu_cache_on:
426 mov r12, lr 427 mov r12, lr
@@ -801,7 +802,7 @@ loop1:
801 add r2, r2, #4 @ add 4 (line length offset) 802 add r2, r2, #4 @ add 4 (line length offset)
802 ldr r4, =0x3ff 803 ldr r4, =0x3ff
803 ands r4, r4, r1, lsr #3 @ find maximum number on the way size 804 ands r4, r4, r1, lsr #3 @ find maximum number on the way size
804 .word 0xe16f5f14 @ clz r5, r4 - find bit position of way size increment 805 clz r5, r4 @ find bit position of way size increment
805 ldr r7, =0x7fff 806 ldr r7, =0x7fff
806 ands r7, r7, r1, lsr #13 @ extract max number of the index size 807 ands r7, r7, r1, lsr #13 @ extract max number of the index size
807loop2: 808loop2:
diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig
index 3e073467caca..2e32acca02fb 100644
--- a/arch/arm/common/Kconfig
+++ b/arch/arm/common/Kconfig
@@ -12,7 +12,8 @@ config ICST307
12 12
13config SA1111 13config SA1111
14 bool 14 bool
15 select DMABOUNCE 15 select DMABOUNCE if !ARCH_PXA
16 select ZONE_DMA if !ARCH_PXA
16 17
17config DMABOUNCE 18config DMABOUNCE
18 bool 19 bool
diff --git a/arch/arm/common/dmabounce.c b/arch/arm/common/dmabounce.c
index aecc6c3f908f..f030f0775be7 100644
--- a/arch/arm/common/dmabounce.c
+++ b/arch/arm/common/dmabounce.c
@@ -154,9 +154,7 @@ alloc_safe_buffer(struct dmabounce_device_info *device_info, void *ptr,
154#endif 154#endif
155 155
156 write_lock_irqsave(&device_info->lock, flags); 156 write_lock_irqsave(&device_info->lock, flags);
157
158 list_add(&buf->node, &device_info->safe_buffers); 157 list_add(&buf->node, &device_info->safe_buffers);
159
160 write_unlock_irqrestore(&device_info->lock, flags); 158 write_unlock_irqrestore(&device_info->lock, flags);
161 159
162 return buf; 160 return buf;
@@ -205,8 +203,22 @@ free_safe_buffer(struct dmabounce_device_info *device_info, struct safe_buffer *
205 203
206/* ************************************************** */ 204/* ************************************************** */
207 205
208static inline dma_addr_t 206static struct safe_buffer *find_safe_buffer_dev(struct device *dev,
209map_single(struct device *dev, void *ptr, size_t size, 207 dma_addr_t dma_addr, const char *where)
208{
209 if (!dev || !dev->archdata.dmabounce)
210 return NULL;
211 if (dma_mapping_error(dev, dma_addr)) {
212 if (dev)
213 dev_err(dev, "Trying to %s invalid mapping\n", where);
214 else
215 pr_err("unknown device: Trying to %s invalid mapping\n", where);
216 return NULL;
217 }
218 return find_safe_buffer(dev->archdata.dmabounce, dma_addr);
219}
220
221static inline dma_addr_t map_single(struct device *dev, void *ptr, size_t size,
210 enum dma_data_direction dir) 222 enum dma_data_direction dir)
211{ 223{
212 struct dmabounce_device_info *device_info = dev->archdata.dmabounce; 224 struct dmabounce_device_info *device_info = dev->archdata.dmabounce;
@@ -270,33 +282,21 @@ map_single(struct device *dev, void *ptr, size_t size,
270 return dma_addr; 282 return dma_addr;
271} 283}
272 284
273static inline void 285static inline void unmap_single(struct device *dev, dma_addr_t dma_addr,
274unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, 286 size_t size, enum dma_data_direction dir)
275 enum dma_data_direction dir)
276{ 287{
277 struct dmabounce_device_info *device_info = dev->archdata.dmabounce; 288 struct safe_buffer *buf = find_safe_buffer_dev(dev, dma_addr, "unmap");
278 struct safe_buffer *buf = NULL;
279
280 /*
281 * Trying to unmap an invalid mapping
282 */
283 if (dma_mapping_error(dev, dma_addr)) {
284 dev_err(dev, "Trying to unmap invalid mapping\n");
285 return;
286 }
287
288 if (device_info)
289 buf = find_safe_buffer(device_info, dma_addr);
290 289
291 if (buf) { 290 if (buf) {
292 BUG_ON(buf->size != size); 291 BUG_ON(buf->size != size);
292 BUG_ON(buf->direction != dir);
293 293
294 dev_dbg(dev, 294 dev_dbg(dev,
295 "%s: unsafe buffer %p (dma=%#x) mapped to %p (dma=%#x)\n", 295 "%s: unsafe buffer %p (dma=%#x) mapped to %p (dma=%#x)\n",
296 __func__, buf->ptr, virt_to_dma(dev, buf->ptr), 296 __func__, buf->ptr, virt_to_dma(dev, buf->ptr),
297 buf->safe, buf->safe_dma_addr); 297 buf->safe, buf->safe_dma_addr);
298 298
299 DO_STATS ( device_info->bounce_count++ ); 299 DO_STATS(dev->archdata.dmabounce->bounce_count++);
300 300
301 if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL) { 301 if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL) {
302 void *ptr = buf->ptr; 302 void *ptr = buf->ptr;
@@ -317,74 +317,7 @@ unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
317 dmac_clean_range(ptr, ptr + size); 317 dmac_clean_range(ptr, ptr + size);
318 outer_clean_range(__pa(ptr), __pa(ptr) + size); 318 outer_clean_range(__pa(ptr), __pa(ptr) + size);
319 } 319 }
320 free_safe_buffer(device_info, buf); 320 free_safe_buffer(dev->archdata.dmabounce, buf);
321 }
322}
323
324static int sync_single(struct device *dev, dma_addr_t dma_addr, size_t size,
325 enum dma_data_direction dir)
326{
327 struct dmabounce_device_info *device_info = dev->archdata.dmabounce;
328 struct safe_buffer *buf = NULL;
329
330 if (device_info)
331 buf = find_safe_buffer(device_info, dma_addr);
332
333 if (buf) {
334 /*
335 * Both of these checks from original code need to be
336 * commented out b/c some drivers rely on the following:
337 *
338 * 1) Drivers may map a large chunk of memory into DMA space
339 * but only sync a small portion of it. Good example is
340 * allocating a large buffer, mapping it, and then
341 * breaking it up into small descriptors. No point
342 * in syncing the whole buffer if you only have to
343 * touch one descriptor.
344 *
345 * 2) Buffers that are mapped as DMA_BIDIRECTIONAL are
346 * usually only synced in one dir at a time.
347 *
348 * See drivers/net/eepro100.c for examples of both cases.
349 *
350 * -ds
351 *
352 * BUG_ON(buf->size != size);
353 * BUG_ON(buf->direction != dir);
354 */
355
356 dev_dbg(dev,
357 "%s: unsafe buffer %p (dma=%#x) mapped to %p (dma=%#x)\n",
358 __func__, buf->ptr, virt_to_dma(dev, buf->ptr),
359 buf->safe, buf->safe_dma_addr);
360
361 DO_STATS ( device_info->bounce_count++ );
362
363 switch (dir) {
364 case DMA_FROM_DEVICE:
365 dev_dbg(dev,
366 "%s: copy back safe %p to unsafe %p size %d\n",
367 __func__, buf->safe, buf->ptr, size);
368 memcpy(buf->ptr, buf->safe, size);
369 break;
370 case DMA_TO_DEVICE:
371 dev_dbg(dev,
372 "%s: copy out unsafe %p to safe %p, size %d\n",
373 __func__,buf->ptr, buf->safe, size);
374 memcpy(buf->safe, buf->ptr, size);
375 break;
376 case DMA_BIDIRECTIONAL:
377 BUG(); /* is this allowed? what does it mean? */
378 default:
379 BUG();
380 }
381 /*
382 * No need to sync the safe buffer - it was allocated
383 * via the coherent allocators.
384 */
385 return 0;
386 } else {
387 return 1;
388 } 321 }
389} 322}
390 323
@@ -396,21 +329,29 @@ static int sync_single(struct device *dev, dma_addr_t dma_addr, size_t size,
396 * substitute the safe buffer for the unsafe one. 329 * substitute the safe buffer for the unsafe one.
397 * (basically move the buffer from an unsafe area to a safe one) 330 * (basically move the buffer from an unsafe area to a safe one)
398 */ 331 */
399dma_addr_t 332dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
400dma_map_single(struct device *dev, void *ptr, size_t size,
401 enum dma_data_direction dir) 333 enum dma_data_direction dir)
402{ 334{
403 dma_addr_t dma_addr;
404
405 dev_dbg(dev, "%s(ptr=%p,size=%d,dir=%x)\n", 335 dev_dbg(dev, "%s(ptr=%p,size=%d,dir=%x)\n",
406 __func__, ptr, size, dir); 336 __func__, ptr, size, dir);
407 337
408 BUG_ON(dir == DMA_NONE); 338 BUG_ON(!valid_dma_direction(dir));
409 339
410 dma_addr = map_single(dev, ptr, size, dir); 340 return map_single(dev, ptr, size, dir);
341}
342EXPORT_SYMBOL(dma_map_single);
411 343
412 return dma_addr; 344dma_addr_t dma_map_page(struct device *dev, struct page *page,
345 unsigned long offset, size_t size, enum dma_data_direction dir)
346{
347 dev_dbg(dev, "%s(page=%p,off=%#lx,size=%zx,dir=%x)\n",
348 __func__, page, offset, size, dir);
349
350 BUG_ON(!valid_dma_direction(dir));
351
352 return map_single(dev, page_address(page) + offset, size, dir);
413} 353}
354EXPORT_SYMBOL(dma_map_page);
414 355
415/* 356/*
416 * see if a mapped address was really a "safe" buffer and if so, copy 357 * see if a mapped address was really a "safe" buffer and if so, copy
@@ -419,126 +360,76 @@ dma_map_single(struct device *dev, void *ptr, size_t size,
419 * should be) 360 * should be)
420 */ 361 */
421 362
422void 363void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
423dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, 364 enum dma_data_direction dir)
424 enum dma_data_direction dir)
425{ 365{
426 dev_dbg(dev, "%s(ptr=%p,size=%d,dir=%x)\n", 366 dev_dbg(dev, "%s(ptr=%p,size=%d,dir=%x)\n",
427 __func__, (void *) dma_addr, size, dir); 367 __func__, (void *) dma_addr, size, dir);
428 368
429 BUG_ON(dir == DMA_NONE);
430
431 unmap_single(dev, dma_addr, size, dir); 369 unmap_single(dev, dma_addr, size, dir);
432} 370}
371EXPORT_SYMBOL(dma_unmap_single);
433 372
434int 373int dmabounce_sync_for_cpu(struct device *dev, dma_addr_t addr,
435dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, 374 unsigned long off, size_t sz, enum dma_data_direction dir)
436 enum dma_data_direction dir)
437{ 375{
438 int i; 376 struct safe_buffer *buf;
439
440 dev_dbg(dev, "%s(sg=%p,nents=%d,dir=%x)\n",
441 __func__, sg, nents, dir);
442
443 BUG_ON(dir == DMA_NONE);
444
445 for (i = 0; i < nents; i++, sg++) {
446 struct page *page = sg_page(sg);
447 unsigned int offset = sg->offset;
448 unsigned int length = sg->length;
449 void *ptr = page_address(page) + offset;
450 377
451 sg->dma_address = 378 dev_dbg(dev, "%s(dma=%#x,off=%#lx,sz=%zx,dir=%x)\n",
452 map_single(dev, ptr, length, dir); 379 __func__, addr, off, sz, dir);
453 }
454 380
455 return nents; 381 buf = find_safe_buffer_dev(dev, addr, __func__);
456} 382 if (!buf)
457 383 return 1;
458void
459dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
460 enum dma_data_direction dir)
461{
462 int i;
463 384
464 dev_dbg(dev, "%s(sg=%p,nents=%d,dir=%x)\n", 385 BUG_ON(buf->direction != dir);
465 __func__, sg, nents, dir);
466 386
467 BUG_ON(dir == DMA_NONE); 387 dev_dbg(dev, "%s: unsafe buffer %p (dma=%#x) mapped to %p (dma=%#x)\n",
388 __func__, buf->ptr, virt_to_dma(dev, buf->ptr),
389 buf->safe, buf->safe_dma_addr);
468 390
469 for (i = 0; i < nents; i++, sg++) { 391 DO_STATS(dev->archdata.dmabounce->bounce_count++);
470 dma_addr_t dma_addr = sg->dma_address;
471 unsigned int length = sg->length;
472 392
473 unmap_single(dev, dma_addr, length, dir); 393 if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL) {
394 dev_dbg(dev, "%s: copy back safe %p to unsafe %p size %d\n",
395 __func__, buf->safe + off, buf->ptr + off, sz);
396 memcpy(buf->ptr + off, buf->safe + off, sz);
474 } 397 }
398 return 0;
475} 399}
400EXPORT_SYMBOL(dmabounce_sync_for_cpu);
476 401
477void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_addr, 402int dmabounce_sync_for_device(struct device *dev, dma_addr_t addr,
478 unsigned long offset, size_t size, 403 unsigned long off, size_t sz, enum dma_data_direction dir)
479 enum dma_data_direction dir)
480{
481 dev_dbg(dev, "%s(dma=%#x,off=%#lx,size=%zx,dir=%x)\n",
482 __func__, dma_addr, offset, size, dir);
483
484 if (sync_single(dev, dma_addr, offset + size, dir))
485 dma_cache_maint(dma_to_virt(dev, dma_addr) + offset, size, dir);
486}
487EXPORT_SYMBOL(dma_sync_single_range_for_cpu);
488
489void dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_addr,
490 unsigned long offset, size_t size,
491 enum dma_data_direction dir)
492{
493 dev_dbg(dev, "%s(dma=%#x,off=%#lx,size=%zx,dir=%x)\n",
494 __func__, dma_addr, offset, size, dir);
495
496 if (sync_single(dev, dma_addr, offset + size, dir))
497 dma_cache_maint(dma_to_virt(dev, dma_addr) + offset, size, dir);
498}
499EXPORT_SYMBOL(dma_sync_single_range_for_device);
500
501void
502dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents,
503 enum dma_data_direction dir)
504{ 404{
505 int i; 405 struct safe_buffer *buf;
506
507 dev_dbg(dev, "%s(sg=%p,nents=%d,dir=%x)\n",
508 __func__, sg, nents, dir);
509
510 BUG_ON(dir == DMA_NONE);
511 406
512 for (i = 0; i < nents; i++, sg++) { 407 dev_dbg(dev, "%s(dma=%#x,off=%#lx,sz=%zx,dir=%x)\n",
513 dma_addr_t dma_addr = sg->dma_address; 408 __func__, addr, off, sz, dir);
514 unsigned int length = sg->length;
515 409
516 sync_single(dev, dma_addr, length, dir); 410 buf = find_safe_buffer_dev(dev, addr, __func__);
517 } 411 if (!buf)
518} 412 return 1;
519
520void
521dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,
522 enum dma_data_direction dir)
523{
524 int i;
525 413
526 dev_dbg(dev, "%s(sg=%p,nents=%d,dir=%x)\n", 414 BUG_ON(buf->direction != dir);
527 __func__, sg, nents, dir);
528 415
529 BUG_ON(dir == DMA_NONE); 416 dev_dbg(dev, "%s: unsafe buffer %p (dma=%#x) mapped to %p (dma=%#x)\n",
417 __func__, buf->ptr, virt_to_dma(dev, buf->ptr),
418 buf->safe, buf->safe_dma_addr);
530 419
531 for (i = 0; i < nents; i++, sg++) { 420 DO_STATS(dev->archdata.dmabounce->bounce_count++);
532 dma_addr_t dma_addr = sg->dma_address;
533 unsigned int length = sg->length;
534 421
535 sync_single(dev, dma_addr, length, dir); 422 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL) {
423 dev_dbg(dev, "%s: copy out unsafe %p to safe %p, size %d\n",
424 __func__,buf->ptr + off, buf->safe + off, sz);
425 memcpy(buf->safe + off, buf->ptr + off, sz);
536 } 426 }
427 return 0;
537} 428}
429EXPORT_SYMBOL(dmabounce_sync_for_device);
538 430
539static int 431static int dmabounce_init_pool(struct dmabounce_pool *pool, struct device *dev,
540dmabounce_init_pool(struct dmabounce_pool *pool, struct device *dev, const char *name, 432 const char *name, unsigned long size)
541 unsigned long size)
542{ 433{
543 pool->size = size; 434 pool->size = size;
544 DO_STATS(pool->allocs = 0); 435 DO_STATS(pool->allocs = 0);
@@ -549,9 +440,8 @@ dmabounce_init_pool(struct dmabounce_pool *pool, struct device *dev, const char
549 return pool->pool ? 0 : -ENOMEM; 440 return pool->pool ? 0 : -ENOMEM;
550} 441}
551 442
552int 443int dmabounce_register_dev(struct device *dev, unsigned long small_buffer_size,
553dmabounce_register_dev(struct device *dev, unsigned long small_buffer_size, 444 unsigned long large_buffer_size)
554 unsigned long large_buffer_size)
555{ 445{
556 struct dmabounce_device_info *device_info; 446 struct dmabounce_device_info *device_info;
557 int ret; 447 int ret;
@@ -607,9 +497,9 @@ dmabounce_register_dev(struct device *dev, unsigned long small_buffer_size,
607 kfree(device_info); 497 kfree(device_info);
608 return ret; 498 return ret;
609} 499}
500EXPORT_SYMBOL(dmabounce_register_dev);
610 501
611void 502void dmabounce_unregister_dev(struct device *dev)
612dmabounce_unregister_dev(struct device *dev)
613{ 503{
614 struct dmabounce_device_info *device_info = dev->archdata.dmabounce; 504 struct dmabounce_device_info *device_info = dev->archdata.dmabounce;
615 505
@@ -642,15 +532,6 @@ dmabounce_unregister_dev(struct device *dev)
642 532
643 dev_info(dev, "dmabounce: device unregistered\n"); 533 dev_info(dev, "dmabounce: device unregistered\n");
644} 534}
645
646
647EXPORT_SYMBOL(dma_map_single);
648EXPORT_SYMBOL(dma_unmap_single);
649EXPORT_SYMBOL(dma_map_sg);
650EXPORT_SYMBOL(dma_unmap_sg);
651EXPORT_SYMBOL(dma_sync_sg_for_cpu);
652EXPORT_SYMBOL(dma_sync_sg_for_device);
653EXPORT_SYMBOL(dmabounce_register_dev);
654EXPORT_SYMBOL(dmabounce_unregister_dev); 535EXPORT_SYMBOL(dmabounce_unregister_dev);
655 536
656MODULE_AUTHOR("Christopher Hoover <ch@hpl.hp.com>, Deepak Saxena <dsaxena@plexity.net>"); 537MODULE_AUTHOR("Christopher Hoover <ch@hpl.hp.com>, Deepak Saxena <dsaxena@plexity.net>");
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index 0c89bd35e06f..7fc9860a97d7 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -27,9 +27,9 @@
27#include <linux/list.h> 27#include <linux/list.h>
28#include <linux/smp.h> 28#include <linux/smp.h>
29#include <linux/cpumask.h> 29#include <linux/cpumask.h>
30#include <linux/io.h>
30 31
31#include <asm/irq.h> 32#include <asm/irq.h>
32#include <asm/io.h>
33#include <asm/mach/irq.h> 33#include <asm/mach/irq.h>
34#include <asm/hardware/gic.h> 34#include <asm/hardware/gic.h>
35 35
diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c
index 5fe9588db077..2793447621c3 100644
--- a/arch/arm/common/it8152.c
+++ b/arch/arm/common/it8152.c
@@ -66,14 +66,6 @@ static void it8152_unmask_irq(unsigned int irq)
66 } 66 }
67} 67}
68 68
69static inline void it8152_irq(int irq)
70{
71 struct irq_desc *desc;
72
73 desc = irq_desc + irq;
74 desc_handle_irq(irq, desc);
75}
76
77static struct irq_chip it8152_irq_chip = { 69static struct irq_chip it8152_irq_chip = {
78 .name = "it8152", 70 .name = "it8152",
79 .ack = it8152_mask_irq, 71 .ack = it8152_mask_irq,
@@ -128,21 +120,21 @@ void it8152_irq_demux(unsigned int irq, struct irq_desc *desc)
128 bits_pd &= ((1 << IT8152_PD_IRQ_COUNT) - 1); 120 bits_pd &= ((1 << IT8152_PD_IRQ_COUNT) - 1);
129 while (bits_pd) { 121 while (bits_pd) {
130 i = __ffs(bits_pd); 122 i = __ffs(bits_pd);
131 it8152_irq(IT8152_PD_IRQ(i)); 123 generic_handle_irq(IT8152_PD_IRQ(i));
132 bits_pd &= ~(1 << i); 124 bits_pd &= ~(1 << i);
133 } 125 }
134 126
135 bits_lp &= ((1 << IT8152_LP_IRQ_COUNT) - 1); 127 bits_lp &= ((1 << IT8152_LP_IRQ_COUNT) - 1);
136 while (bits_lp) { 128 while (bits_lp) {
137 i = __ffs(bits_lp); 129 i = __ffs(bits_lp);
138 it8152_irq(IT8152_LP_IRQ(i)); 130 generic_handle_irq(IT8152_LP_IRQ(i));
139 bits_lp &= ~(1 << i); 131 bits_lp &= ~(1 << i);
140 } 132 }
141 133
142 bits_ld &= ((1 << IT8152_LD_IRQ_COUNT) - 1); 134 bits_ld &= ((1 << IT8152_LD_IRQ_COUNT) - 1);
143 while (bits_ld) { 135 while (bits_ld) {
144 i = __ffs(bits_ld); 136 i = __ffs(bits_ld);
145 it8152_irq(IT8152_LD_IRQ(i)); 137 generic_handle_irq(IT8152_LD_IRQ(i));
146 bits_ld &= ~(1 << i); 138 bits_ld &= ~(1 << i);
147 } 139 }
148 } 140 }
diff --git a/arch/arm/common/locomo.c b/arch/arm/common/locomo.c
index 283051eaf931..7c6b4b99a2df 100644
--- a/arch/arm/common/locomo.c
+++ b/arch/arm/common/locomo.c
@@ -24,9 +24,9 @@
24#include <linux/platform_device.h> 24#include <linux/platform_device.h>
25#include <linux/slab.h> 25#include <linux/slab.h>
26#include <linux/spinlock.h> 26#include <linux/spinlock.h>
27#include <linux/io.h>
27 28
28#include <mach/hardware.h> 29#include <mach/hardware.h>
29#include <asm/io.h>
30#include <asm/irq.h> 30#include <asm/irq.h>
31#include <asm/mach/irq.h> 31#include <asm/mach/irq.h>
32 32
@@ -169,7 +169,6 @@ static struct locomo_dev_info locomo_devices[] = {
169static void locomo_handler(unsigned int irq, struct irq_desc *desc) 169static void locomo_handler(unsigned int irq, struct irq_desc *desc)
170{ 170{
171 int req, i; 171 int req, i;
172 struct irq_desc *d;
173 void __iomem *mapbase = get_irq_chip_data(irq); 172 void __iomem *mapbase = get_irq_chip_data(irq);
174 173
175 /* Acknowledge the parent IRQ */ 174 /* Acknowledge the parent IRQ */
@@ -181,10 +180,9 @@ static void locomo_handler(unsigned int irq, struct irq_desc *desc)
181 if (req) { 180 if (req) {
182 /* generate the next interrupt(s) */ 181 /* generate the next interrupt(s) */
183 irq = LOCOMO_IRQ_START; 182 irq = LOCOMO_IRQ_START;
184 d = irq_desc + irq; 183 for (i = 0; i <= 3; i++, irq++) {
185 for (i = 0; i <= 3; i++, d++, irq++) {
186 if (req & (0x0100 << i)) { 184 if (req & (0x0100 << i)) {
187 desc_handle_irq(irq, d); 185 generic_handle_irq(irq);
188 } 186 }
189 187
190 } 188 }
@@ -222,12 +220,10 @@ static struct irq_chip locomo_chip = {
222 220
223static void locomo_key_handler(unsigned int irq, struct irq_desc *desc) 221static void locomo_key_handler(unsigned int irq, struct irq_desc *desc)
224{ 222{
225 struct irq_desc *d;
226 void __iomem *mapbase = get_irq_chip_data(irq); 223 void __iomem *mapbase = get_irq_chip_data(irq);
227 224
228 if (locomo_readl(mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC) & 0x0001) { 225 if (locomo_readl(mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC) & 0x0001) {
229 d = irq_desc + LOCOMO_IRQ_KEY_START; 226 generic_handle_irq(LOCOMO_IRQ_KEY_START);
230 desc_handle_irq(LOCOMO_IRQ_KEY_START, d);
231 } 227 }
232} 228}
233 229
@@ -268,7 +264,6 @@ static struct irq_chip locomo_key_chip = {
268static void locomo_gpio_handler(unsigned int irq, struct irq_desc *desc) 264static void locomo_gpio_handler(unsigned int irq, struct irq_desc *desc)
269{ 265{
270 int req, i; 266 int req, i;
271 struct irq_desc *d;
272 void __iomem *mapbase = get_irq_chip_data(irq); 267 void __iomem *mapbase = get_irq_chip_data(irq);
273 268
274 req = locomo_readl(mapbase + LOCOMO_GIR) & 269 req = locomo_readl(mapbase + LOCOMO_GIR) &
@@ -277,10 +272,9 @@ static void locomo_gpio_handler(unsigned int irq, struct irq_desc *desc)
277 272
278 if (req) { 273 if (req) {
279 irq = LOCOMO_IRQ_GPIO_START; 274 irq = LOCOMO_IRQ_GPIO_START;
280 d = irq_desc + LOCOMO_IRQ_GPIO_START; 275 for (i = 0; i <= 15; i++, irq++) {
281 for (i = 0; i <= 15; i++, irq++, d++) {
282 if (req & (0x0001 << i)) { 276 if (req & (0x0001 << i)) {
283 desc_handle_irq(irq, d); 277 generic_handle_irq(irq);
284 } 278 }
285 } 279 }
286 } 280 }
@@ -361,12 +355,10 @@ static struct irq_chip locomo_gpio_chip = {
361 355
362static void locomo_lt_handler(unsigned int irq, struct irq_desc *desc) 356static void locomo_lt_handler(unsigned int irq, struct irq_desc *desc)
363{ 357{
364 struct irq_desc *d;
365 void __iomem *mapbase = get_irq_chip_data(irq); 358 void __iomem *mapbase = get_irq_chip_data(irq);
366 359
367 if (locomo_readl(mapbase + LOCOMO_LTINT) & 0x0001) { 360 if (locomo_readl(mapbase + LOCOMO_LTINT) & 0x0001) {
368 d = irq_desc + LOCOMO_IRQ_LT_START; 361 generic_handle_irq(LOCOMO_IRQ_LT_START);
369 desc_handle_irq(LOCOMO_IRQ_LT_START, d);
370 } 362 }
371} 363}
372 364
@@ -407,17 +399,15 @@ static struct irq_chip locomo_lt_chip = {
407static void locomo_spi_handler(unsigned int irq, struct irq_desc *desc) 399static void locomo_spi_handler(unsigned int irq, struct irq_desc *desc)
408{ 400{
409 int req, i; 401 int req, i;
410 struct irq_desc *d;
411 void __iomem *mapbase = get_irq_chip_data(irq); 402 void __iomem *mapbase = get_irq_chip_data(irq);
412 403
413 req = locomo_readl(mapbase + LOCOMO_SPI + LOCOMO_SPIIR) & 0x000F; 404 req = locomo_readl(mapbase + LOCOMO_SPI + LOCOMO_SPIIR) & 0x000F;
414 if (req) { 405 if (req) {
415 irq = LOCOMO_IRQ_SPI_START; 406 irq = LOCOMO_IRQ_SPI_START;
416 d = irq_desc + irq;
417 407
418 for (i = 0; i <= 3; i++, irq++, d++) { 408 for (i = 0; i <= 3; i++, irq++) {
419 if (req & (0x0001 << i)) { 409 if (req & (0x0001 << i)) {
420 desc_handle_irq(irq, d); 410 generic_handle_irq(irq);
421 } 411 }
422 } 412 }
423 } 413 }
diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c
index ec8a5471bf06..fb86f248aab8 100644
--- a/arch/arm/common/sa1111.c
+++ b/arch/arm/common/sa1111.c
@@ -25,10 +25,10 @@
25#include <linux/spinlock.h> 25#include <linux/spinlock.h>
26#include <linux/dma-mapping.h> 26#include <linux/dma-mapping.h>
27#include <linux/clk.h> 27#include <linux/clk.h>
28#include <linux/io.h>
28 29
29#include <mach/hardware.h> 30#include <mach/hardware.h>
30#include <asm/mach-types.h> 31#include <asm/mach-types.h>
31#include <asm/io.h>
32#include <asm/irq.h> 32#include <asm/irq.h>
33#include <asm/mach/irq.h> 33#include <asm/mach/irq.h>
34#include <asm/sizes.h> 34#include <asm/sizes.h>
diff --git a/arch/arm/common/scoop.c b/arch/arm/common/scoop.c
index ae39553589dd..697c64913990 100644
--- a/arch/arm/common/scoop.c
+++ b/arch/arm/common/scoop.c
@@ -15,7 +15,7 @@
15#include <linux/string.h> 15#include <linux/string.h>
16#include <linux/slab.h> 16#include <linux/slab.h>
17#include <linux/platform_device.h> 17#include <linux/platform_device.h>
18#include <asm/io.h> 18#include <linux/io.h>
19#include <asm/gpio.h> 19#include <asm/gpio.h>
20#include <asm/hardware/scoop.h> 20#include <asm/hardware/scoop.h>
21 21
diff --git a/arch/arm/common/sharpsl_param.c b/arch/arm/common/sharpsl_param.c
index aad4d94ba8f5..d56c932580eb 100644
--- a/arch/arm/common/sharpsl_param.c
+++ b/arch/arm/common/sharpsl_param.c
@@ -12,6 +12,7 @@
12 */ 12 */
13 13
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/module.h>
15#include <linux/string.h> 16#include <linux/string.h>
16#include <asm/mach/sharpsl_param.h> 17#include <asm/mach/sharpsl_param.h>
17 18
@@ -36,6 +37,7 @@
36#define PHAD_MAGIC MAGIC_CHG('P','H','A','D') 37#define PHAD_MAGIC MAGIC_CHG('P','H','A','D')
37 38
38struct sharpsl_param_info sharpsl_param; 39struct sharpsl_param_info sharpsl_param;
40EXPORT_SYMBOL(sharpsl_param);
39 41
40void sharpsl_save_param(void) 42void sharpsl_save_param(void)
41{ 43{
diff --git a/arch/arm/common/time-acorn.c b/arch/arm/common/time-acorn.c
index df0983aafe69..deeed561b168 100644
--- a/arch/arm/common/time-acorn.c
+++ b/arch/arm/common/time-acorn.c
@@ -17,9 +17,9 @@
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/interrupt.h> 18#include <linux/interrupt.h>
19#include <linux/irq.h> 19#include <linux/irq.h>
20#include <linux/io.h>
20 21
21#include <mach/hardware.h> 22#include <mach/hardware.h>
22#include <asm/io.h>
23#include <asm/hardware/ioc.h> 23#include <asm/hardware/ioc.h>
24 24
25#include <asm/mach/time.h> 25#include <asm/mach/time.h>
diff --git a/arch/arm/common/uengine.c b/arch/arm/common/uengine.c
index 7ecd3c0ab011..b520e56216a9 100644
--- a/arch/arm/common/uengine.c
+++ b/arch/arm/common/uengine.c
@@ -16,9 +16,9 @@
16#include <linux/slab.h> 16#include <linux/slab.h>
17#include <linux/module.h> 17#include <linux/module.h>
18#include <linux/string.h> 18#include <linux/string.h>
19#include <linux/io.h>
19#include <mach/hardware.h> 20#include <mach/hardware.h>
20#include <asm/hardware/uengine.h> 21#include <asm/hardware/uengine.h>
21#include <asm/io.h>
22 22
23#if defined(CONFIG_ARCH_IXP2000) 23#if defined(CONFIG_ARCH_IXP2000)
24#define IXP_UENGINE_CSR_VIRT_BASE IXP2000_UENGINE_CSR_VIRT_BASE 24#define IXP_UENGINE_CSR_VIRT_BASE IXP2000_UENGINE_CSR_VIRT_BASE
diff --git a/arch/arm/common/via82c505.c b/arch/arm/common/via82c505.c
index 79a8206e62ac..8421d39109b3 100644
--- a/arch/arm/common/via82c505.c
+++ b/arch/arm/common/via82c505.c
@@ -4,8 +4,8 @@
4#include <linux/mm.h> 4#include <linux/mm.h>
5#include <linux/init.h> 5#include <linux/init.h>
6#include <linux/ioport.h> 6#include <linux/ioport.h>
7#include <linux/io.h>
7 8
8#include <asm/io.h>
9#include <asm/system.h> 9#include <asm/system.h>
10 10
11#include <asm/mach/pci.h> 11#include <asm/mach/pci.h>
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
index c026fa2214a3..f1e4b8f60cab 100644
--- a/arch/arm/common/vic.c
+++ b/arch/arm/common/vic.c
@@ -20,8 +20,8 @@
20 */ 20 */
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/list.h> 22#include <linux/list.h>
23#include <linux/io.h>
23 24
24#include <asm/io.h>
25#include <asm/mach/irq.h> 25#include <asm/mach/irq.h>
26#include <asm/hardware/vic.h> 26#include <asm/hardware/vic.h>
27 27
diff --git a/arch/arm/configs/afeb9260_defconfig b/arch/arm/configs/afeb9260_defconfig
new file mode 100644
index 000000000000..ce909586a34f
--- /dev/null
+++ b/arch/arm/configs/afeb9260_defconfig
@@ -0,0 +1,1259 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.27-rc2
4# Tue Aug 12 22:30:16 2008
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y
10CONFIG_GENERIC_CLOCKEVENTS=y
11CONFIG_MMU=y
12# CONFIG_NO_IOPORT is not set
13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_STACKTRACE_SUPPORT=y
15CONFIG_HAVE_LATENCYTOP_SUPPORT=y
16CONFIG_LOCKDEP_SUPPORT=y
17CONFIG_TRACE_IRQFLAGS_SUPPORT=y
18CONFIG_HARDIRQS_SW_RESEND=y
19CONFIG_GENERIC_IRQ_PROBE=y
20CONFIG_RWSEM_GENERIC_SPINLOCK=y
21# CONFIG_ARCH_HAS_ILOG2_U32 is not set
22# CONFIG_ARCH_HAS_ILOG2_U64 is not set
23CONFIG_GENERIC_HWEIGHT=y
24CONFIG_GENERIC_CALIBRATE_DELAY=y
25CONFIG_ARCH_SUPPORTS_AOUT=y
26CONFIG_ZONE_DMA=y
27CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
28CONFIG_VECTORS_BASE=0xffff0000
29CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
30
31#
32# General setup
33#
34CONFIG_EXPERIMENTAL=y
35CONFIG_BROKEN_ON_SMP=y
36CONFIG_LOCK_KERNEL=y
37CONFIG_INIT_ENV_ARG_LIMIT=32
38CONFIG_LOCALVERSION=""
39# CONFIG_LOCALVERSION_AUTO is not set
40CONFIG_SWAP=y
41CONFIG_SYSVIPC=y
42CONFIG_SYSVIPC_SYSCTL=y
43# CONFIG_POSIX_MQUEUE is not set
44# CONFIG_BSD_PROCESS_ACCT is not set
45# CONFIG_TASKSTATS is not set
46# CONFIG_AUDIT is not set
47# CONFIG_IKCONFIG is not set
48CONFIG_LOG_BUF_SHIFT=14
49# CONFIG_CGROUPS is not set
50# CONFIG_GROUP_SCHED is not set
51CONFIG_SYSFS_DEPRECATED=y
52CONFIG_SYSFS_DEPRECATED_V2=y
53# CONFIG_RELAY is not set
54CONFIG_NAMESPACES=y
55# CONFIG_UTS_NS is not set
56# CONFIG_IPC_NS is not set
57# CONFIG_USER_NS is not set
58# CONFIG_PID_NS is not set
59CONFIG_BLK_DEV_INITRD=y
60CONFIG_INITRAMFS_SOURCE=""
61CONFIG_CC_OPTIMIZE_FOR_SIZE=y
62CONFIG_SYSCTL=y
63# CONFIG_EMBEDDED is not set
64CONFIG_UID16=y
65CONFIG_SYSCTL_SYSCALL=y
66CONFIG_SYSCTL_SYSCALL_CHECK=y
67CONFIG_KALLSYMS=y
68# CONFIG_KALLSYMS_ALL is not set
69# CONFIG_KALLSYMS_EXTRA_PASS is not set
70CONFIG_HOTPLUG=y
71CONFIG_PRINTK=y
72CONFIG_BUG=y
73CONFIG_ELF_CORE=y
74CONFIG_COMPAT_BRK=y
75CONFIG_BASE_FULL=y
76CONFIG_FUTEX=y
77CONFIG_ANON_INODES=y
78CONFIG_EPOLL=y
79CONFIG_SIGNALFD=y
80CONFIG_TIMERFD=y
81CONFIG_EVENTFD=y
82CONFIG_SHMEM=y
83CONFIG_VM_EVENT_COUNTERS=y
84CONFIG_SLAB=y
85# CONFIG_SLUB is not set
86# CONFIG_SLOB is not set
87# CONFIG_PROFILING is not set
88# CONFIG_MARKERS is not set
89CONFIG_HAVE_OPROFILE=y
90# CONFIG_KPROBES is not set
91# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
92# CONFIG_HAVE_IOREMAP_PROT is not set
93CONFIG_HAVE_KPROBES=y
94CONFIG_HAVE_KRETPROBES=y
95# CONFIG_HAVE_ARCH_TRACEHOOK is not set
96# CONFIG_HAVE_DMA_ATTRS is not set
97# CONFIG_USE_GENERIC_SMP_HELPERS is not set
98CONFIG_HAVE_CLK=y
99CONFIG_PROC_PAGE_MONITOR=y
100CONFIG_HAVE_GENERIC_DMA_COHERENT=y
101CONFIG_SLABINFO=y
102CONFIG_RT_MUTEXES=y
103# CONFIG_TINY_SHMEM is not set
104CONFIG_BASE_SMALL=0
105CONFIG_MODULES=y
106# CONFIG_MODULE_FORCE_LOAD is not set
107CONFIG_MODULE_UNLOAD=y
108# CONFIG_MODULE_FORCE_UNLOAD is not set
109# CONFIG_MODVERSIONS is not set
110# CONFIG_MODULE_SRCVERSION_ALL is not set
111CONFIG_KMOD=y
112CONFIG_BLOCK=y
113# CONFIG_LBD is not set
114# CONFIG_BLK_DEV_IO_TRACE is not set
115# CONFIG_LSF is not set
116# CONFIG_BLK_DEV_BSG is not set
117# CONFIG_BLK_DEV_INTEGRITY is not set
118
119#
120# IO Schedulers
121#
122CONFIG_IOSCHED_NOOP=y
123CONFIG_IOSCHED_AS=y
124# CONFIG_IOSCHED_DEADLINE is not set
125# CONFIG_IOSCHED_CFQ is not set
126CONFIG_DEFAULT_AS=y
127# CONFIG_DEFAULT_DEADLINE is not set
128# CONFIG_DEFAULT_CFQ is not set
129# CONFIG_DEFAULT_NOOP is not set
130CONFIG_DEFAULT_IOSCHED="anticipatory"
131CONFIG_CLASSIC_RCU=y
132
133#
134# System Type
135#
136# CONFIG_ARCH_AAEC2000 is not set
137# CONFIG_ARCH_INTEGRATOR is not set
138# CONFIG_ARCH_REALVIEW is not set
139# CONFIG_ARCH_VERSATILE is not set
140CONFIG_ARCH_AT91=y
141# CONFIG_ARCH_CLPS7500 is not set
142# CONFIG_ARCH_CLPS711X is not set
143# CONFIG_ARCH_EBSA110 is not set
144# CONFIG_ARCH_EP93XX is not set
145# CONFIG_ARCH_FOOTBRIDGE is not set
146# CONFIG_ARCH_NETX is not set
147# CONFIG_ARCH_H720X is not set
148# CONFIG_ARCH_IMX is not set
149# CONFIG_ARCH_IOP13XX is not set
150# CONFIG_ARCH_IOP32X is not set
151# CONFIG_ARCH_IOP33X is not set
152# CONFIG_ARCH_IXP23XX is not set
153# CONFIG_ARCH_IXP2000 is not set
154# CONFIG_ARCH_IXP4XX is not set
155# CONFIG_ARCH_L7200 is not set
156# CONFIG_ARCH_KIRKWOOD is not set
157# CONFIG_ARCH_KS8695 is not set
158# CONFIG_ARCH_NS9XXX is not set
159# CONFIG_ARCH_LOKI is not set
160# CONFIG_ARCH_MV78XX0 is not set
161# CONFIG_ARCH_MXC is not set
162# CONFIG_ARCH_ORION5X is not set
163# CONFIG_ARCH_PNX4008 is not set
164# CONFIG_ARCH_PXA is not set
165# CONFIG_ARCH_RPC is not set
166# CONFIG_ARCH_SA1100 is not set
167# CONFIG_ARCH_S3C2410 is not set
168# CONFIG_ARCH_SHARK is not set
169# CONFIG_ARCH_LH7A40X is not set
170# CONFIG_ARCH_DAVINCI is not set
171# CONFIG_ARCH_OMAP is not set
172# CONFIG_ARCH_MSM7X00A is not set
173
174#
175# Boot options
176#
177
178#
179# Power management
180#
181
182#
183# Atmel AT91 System-on-Chip
184#
185# CONFIG_ARCH_AT91RM9200 is not set
186CONFIG_ARCH_AT91SAM9260=y
187# CONFIG_ARCH_AT91SAM9261 is not set
188# CONFIG_ARCH_AT91SAM9263 is not set
189# CONFIG_ARCH_AT91SAM9RL is not set
190# CONFIG_ARCH_AT91SAM9G20 is not set
191# CONFIG_ARCH_AT91CAP9 is not set
192# CONFIG_ARCH_AT91X40 is not set
193CONFIG_AT91_PMC_UNIT=y
194
195#
196# AT91SAM9260 Variants
197#
198# CONFIG_ARCH_AT91SAM9260_SAM9XE is not set
199
200#
201# AT91SAM9260 / AT91SAM9XE Board Type
202#
203# CONFIG_MACH_AT91SAM9260EK is not set
204# CONFIG_MACH_CAM60 is not set
205# CONFIG_MACH_SAM9_L9260 is not set
206CONFIG_MACH_AFEB9260=y
207# CONFIG_MACH_USB_A9260 is not set
208# CONFIG_MACH_QIL_A9260 is not set
209
210#
211# AT91 Board Options
212#
213
214#
215# AT91 Feature Selections
216#
217CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
218CONFIG_AT91_TIMER_HZ=100
219CONFIG_AT91_EARLY_DBGU=y
220# CONFIG_AT91_EARLY_USART0 is not set
221# CONFIG_AT91_EARLY_USART1 is not set
222# CONFIG_AT91_EARLY_USART2 is not set
223# CONFIG_AT91_EARLY_USART3 is not set
224# CONFIG_AT91_EARLY_USART4 is not set
225# CONFIG_AT91_EARLY_USART5 is not set
226
227#
228# Processor Type
229#
230CONFIG_CPU_32=y
231CONFIG_CPU_ARM926T=y
232CONFIG_CPU_32v5=y
233CONFIG_CPU_ABRT_EV5TJ=y
234CONFIG_CPU_PABRT_NOIFAR=y
235CONFIG_CPU_CACHE_VIVT=y
236CONFIG_CPU_COPY_V4WB=y
237CONFIG_CPU_TLB_V4WBI=y
238CONFIG_CPU_CP15=y
239CONFIG_CPU_CP15_MMU=y
240
241#
242# Processor Features
243#
244CONFIG_ARM_THUMB=y
245# CONFIG_CPU_ICACHE_DISABLE is not set
246# CONFIG_CPU_DCACHE_DISABLE is not set
247# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
248# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
249# CONFIG_OUTER_CACHE is not set
250
251#
252# Bus support
253#
254# CONFIG_PCI_SYSCALL is not set
255# CONFIG_ARCH_SUPPORTS_MSI is not set
256# CONFIG_PCCARD is not set
257
258#
259# Kernel Features
260#
261# CONFIG_TICK_ONESHOT is not set
262# CONFIG_NO_HZ is not set
263# CONFIG_HIGH_RES_TIMERS is not set
264CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
265CONFIG_PREEMPT=y
266CONFIG_HZ=100
267CONFIG_AEABI=y
268CONFIG_OABI_COMPAT=y
269# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
270CONFIG_SELECT_MEMORY_MODEL=y
271CONFIG_FLATMEM_MANUAL=y
272# CONFIG_DISCONTIGMEM_MANUAL is not set
273# CONFIG_SPARSEMEM_MANUAL is not set
274CONFIG_FLATMEM=y
275CONFIG_FLAT_NODE_MEM_MAP=y
276# CONFIG_SPARSEMEM_STATIC is not set
277# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
278CONFIG_PAGEFLAGS_EXTENDED=y
279CONFIG_SPLIT_PTLOCK_CPUS=4096
280# CONFIG_RESOURCES_64BIT is not set
281CONFIG_ZONE_DMA_FLAG=1
282CONFIG_BOUNCE=y
283CONFIG_VIRT_TO_BUS=y
284# CONFIG_LEDS is not set
285CONFIG_ALIGNMENT_TRAP=y
286
287#
288# Boot options
289#
290CONFIG_ZBOOT_ROM_TEXT=0x0
291CONFIG_ZBOOT_ROM_BSS=0x0
292CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
293# CONFIG_XIP_KERNEL is not set
294# CONFIG_KEXEC is not set
295
296#
297# Floating point emulation
298#
299
300#
301# At least one emulation must be selected
302#
303CONFIG_FPE_NWFPE=y
304# CONFIG_FPE_NWFPE_XP is not set
305# CONFIG_FPE_FASTFPE is not set
306# CONFIG_VFP is not set
307
308#
309# Userspace binary formats
310#
311CONFIG_BINFMT_ELF=y
312# CONFIG_BINFMT_AOUT is not set
313# CONFIG_BINFMT_MISC is not set
314
315#
316# Power management options
317#
318# CONFIG_PM is not set
319CONFIG_ARCH_SUSPEND_POSSIBLE=y
320CONFIG_NET=y
321
322#
323# Networking options
324#
325CONFIG_PACKET=y
326# CONFIG_PACKET_MMAP is not set
327CONFIG_UNIX=y
328# CONFIG_NET_KEY is not set
329CONFIG_INET=y
330# CONFIG_IP_MULTICAST is not set
331# CONFIG_IP_ADVANCED_ROUTER is not set
332CONFIG_IP_FIB_HASH=y
333CONFIG_IP_PNP=y
334# CONFIG_IP_PNP_DHCP is not set
335CONFIG_IP_PNP_BOOTP=y
336# CONFIG_IP_PNP_RARP is not set
337# CONFIG_NET_IPIP is not set
338# CONFIG_NET_IPGRE is not set
339# CONFIG_ARPD is not set
340# CONFIG_SYN_COOKIES is not set
341# CONFIG_INET_AH is not set
342# CONFIG_INET_ESP is not set
343# CONFIG_INET_IPCOMP is not set
344# CONFIG_INET_XFRM_TUNNEL is not set
345# CONFIG_INET_TUNNEL is not set
346# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
347# CONFIG_INET_XFRM_MODE_TUNNEL is not set
348# CONFIG_INET_XFRM_MODE_BEET is not set
349# CONFIG_INET_LRO is not set
350CONFIG_INET_DIAG=y
351CONFIG_INET_TCP_DIAG=y
352# CONFIG_TCP_CONG_ADVANCED is not set
353CONFIG_TCP_CONG_CUBIC=y
354CONFIG_DEFAULT_TCP_CONG="cubic"
355# CONFIG_TCP_MD5SIG is not set
356# CONFIG_IPV6 is not set
357# CONFIG_NETWORK_SECMARK is not set
358# CONFIG_NETFILTER is not set
359# CONFIG_IP_DCCP is not set
360# CONFIG_IP_SCTP is not set
361# CONFIG_TIPC is not set
362# CONFIG_ATM is not set
363# CONFIG_BRIDGE is not set
364# CONFIG_VLAN_8021Q is not set
365# CONFIG_DECNET is not set
366# CONFIG_LLC2 is not set
367# CONFIG_IPX is not set
368# CONFIG_ATALK is not set
369# CONFIG_X25 is not set
370# CONFIG_LAPB is not set
371# CONFIG_ECONET is not set
372# CONFIG_WAN_ROUTER is not set
373# CONFIG_NET_SCHED is not set
374
375#
376# Network testing
377#
378# CONFIG_NET_PKTGEN is not set
379# CONFIG_HAMRADIO is not set
380# CONFIG_CAN is not set
381# CONFIG_IRDA is not set
382# CONFIG_BT is not set
383# CONFIG_AF_RXRPC is not set
384
385#
386# Wireless
387#
388# CONFIG_CFG80211 is not set
389# CONFIG_WIRELESS_EXT is not set
390# CONFIG_MAC80211 is not set
391# CONFIG_IEEE80211 is not set
392# CONFIG_RFKILL is not set
393# CONFIG_NET_9P is not set
394
395#
396# Device Drivers
397#
398
399#
400# Generic Driver Options
401#
402CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
403CONFIG_STANDALONE=y
404CONFIG_PREVENT_FIRMWARE_BUILD=y
405CONFIG_FW_LOADER=y
406CONFIG_FIRMWARE_IN_KERNEL=y
407CONFIG_EXTRA_FIRMWARE=""
408# CONFIG_DEBUG_DRIVER is not set
409# CONFIG_DEBUG_DEVRES is not set
410# CONFIG_SYS_HYPERVISOR is not set
411# CONFIG_CONNECTOR is not set
412CONFIG_MTD=y
413# CONFIG_MTD_DEBUG is not set
414# CONFIG_MTD_CONCAT is not set
415CONFIG_MTD_PARTITIONS=y
416# CONFIG_MTD_REDBOOT_PARTS is not set
417# CONFIG_MTD_CMDLINE_PARTS is not set
418# CONFIG_MTD_AFS_PARTS is not set
419# CONFIG_MTD_AR7_PARTS is not set
420
421#
422# User Modules And Translation Layers
423#
424CONFIG_MTD_CHAR=y
425CONFIG_MTD_BLKDEVS=y
426CONFIG_MTD_BLOCK=y
427# CONFIG_FTL is not set
428# CONFIG_NFTL is not set
429# CONFIG_INFTL is not set
430# CONFIG_RFD_FTL is not set
431# CONFIG_SSFDC is not set
432# CONFIG_MTD_OOPS is not set
433
434#
435# RAM/ROM/Flash chip drivers
436#
437# CONFIG_MTD_CFI is not set
438# CONFIG_MTD_JEDECPROBE is not set
439CONFIG_MTD_MAP_BANK_WIDTH_1=y
440CONFIG_MTD_MAP_BANK_WIDTH_2=y
441CONFIG_MTD_MAP_BANK_WIDTH_4=y
442# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
443# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
444# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
445CONFIG_MTD_CFI_I1=y
446CONFIG_MTD_CFI_I2=y
447# CONFIG_MTD_CFI_I4 is not set
448# CONFIG_MTD_CFI_I8 is not set
449# CONFIG_MTD_RAM is not set
450# CONFIG_MTD_ROM is not set
451# CONFIG_MTD_ABSENT is not set
452
453#
454# Mapping drivers for chip access
455#
456# CONFIG_MTD_COMPLEX_MAPPINGS is not set
457# CONFIG_MTD_PLATRAM is not set
458
459#
460# Self-contained MTD device drivers
461#
462CONFIG_MTD_DATAFLASH=y
463# CONFIG_MTD_M25P80 is not set
464# CONFIG_MTD_SLRAM is not set
465# CONFIG_MTD_PHRAM is not set
466# CONFIG_MTD_MTDRAM is not set
467# CONFIG_MTD_BLOCK2MTD is not set
468
469#
470# Disk-On-Chip Device Drivers
471#
472# CONFIG_MTD_DOC2000 is not set
473# CONFIG_MTD_DOC2001 is not set
474# CONFIG_MTD_DOC2001PLUS is not set
475CONFIG_MTD_NAND=y
476# CONFIG_MTD_NAND_VERIFY_WRITE is not set
477# CONFIG_MTD_NAND_ECC_SMC is not set
478# CONFIG_MTD_NAND_MUSEUM_IDS is not set
479CONFIG_MTD_NAND_IDS=y
480# CONFIG_MTD_NAND_DISKONCHIP is not set
481CONFIG_MTD_NAND_ATMEL=y
482# CONFIG_MTD_NAND_ATMEL_ECC_HW is not set
483CONFIG_MTD_NAND_ATMEL_ECC_SOFT=y
484# CONFIG_MTD_NAND_ATMEL_ECC_NONE is not set
485# CONFIG_MTD_NAND_NANDSIM is not set
486# CONFIG_MTD_NAND_PLATFORM is not set
487# CONFIG_MTD_ALAUDA is not set
488# CONFIG_MTD_ONENAND is not set
489
490#
491# UBI - Unsorted block images
492#
493# CONFIG_MTD_UBI is not set
494# CONFIG_PARPORT is not set
495CONFIG_BLK_DEV=y
496# CONFIG_BLK_DEV_COW_COMMON is not set
497# CONFIG_BLK_DEV_LOOP is not set
498# CONFIG_BLK_DEV_NBD is not set
499# CONFIG_BLK_DEV_UB is not set
500CONFIG_BLK_DEV_RAM=y
501CONFIG_BLK_DEV_RAM_COUNT=16
502CONFIG_BLK_DEV_RAM_SIZE=8192
503# CONFIG_BLK_DEV_XIP is not set
504# CONFIG_CDROM_PKTCDVD is not set
505# CONFIG_ATA_OVER_ETH is not set
506CONFIG_MISC_DEVICES=y
507# CONFIG_ATMEL_PWM is not set
508# CONFIG_ATMEL_TCLIB is not set
509# CONFIG_EEPROM_93CX6 is not set
510CONFIG_ATMEL_SSC=y
511# CONFIG_ENCLOSURE_SERVICES is not set
512CONFIG_HAVE_IDE=y
513# CONFIG_IDE is not set
514
515#
516# SCSI device support
517#
518# CONFIG_RAID_ATTRS is not set
519CONFIG_SCSI=y
520CONFIG_SCSI_DMA=y
521# CONFIG_SCSI_TGT is not set
522# CONFIG_SCSI_NETLINK is not set
523CONFIG_SCSI_PROC_FS=y
524
525#
526# SCSI support type (disk, tape, CD-ROM)
527#
528CONFIG_BLK_DEV_SD=y
529# CONFIG_CHR_DEV_ST is not set
530# CONFIG_CHR_DEV_OSST is not set
531# CONFIG_BLK_DEV_SR is not set
532# CONFIG_CHR_DEV_SG is not set
533# CONFIG_CHR_DEV_SCH is not set
534
535#
536# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
537#
538CONFIG_SCSI_MULTI_LUN=y
539# CONFIG_SCSI_CONSTANTS is not set
540# CONFIG_SCSI_LOGGING is not set
541# CONFIG_SCSI_SCAN_ASYNC is not set
542CONFIG_SCSI_WAIT_SCAN=m
543
544#
545# SCSI Transports
546#
547# CONFIG_SCSI_SPI_ATTRS is not set
548# CONFIG_SCSI_FC_ATTRS is not set
549# CONFIG_SCSI_ISCSI_ATTRS is not set
550# CONFIG_SCSI_SAS_LIBSAS is not set
551# CONFIG_SCSI_SRP_ATTRS is not set
552CONFIG_SCSI_LOWLEVEL=y
553# CONFIG_ISCSI_TCP is not set
554# CONFIG_SCSI_DEBUG is not set
555# CONFIG_SCSI_DH is not set
556# CONFIG_ATA is not set
557# CONFIG_MD is not set
558CONFIG_NETDEVICES=y
559# CONFIG_DUMMY is not set
560# CONFIG_BONDING is not set
561# CONFIG_MACVLAN is not set
562# CONFIG_EQUALIZER is not set
563# CONFIG_TUN is not set
564# CONFIG_VETH is not set
565CONFIG_PHYLIB=y
566
567#
568# MII PHY device drivers
569#
570# CONFIG_MARVELL_PHY is not set
571# CONFIG_DAVICOM_PHY is not set
572# CONFIG_QSEMI_PHY is not set
573# CONFIG_LXT_PHY is not set
574# CONFIG_CICADA_PHY is not set
575# CONFIG_VITESSE_PHY is not set
576# CONFIG_SMSC_PHY is not set
577# CONFIG_BROADCOM_PHY is not set
578# CONFIG_ICPLUS_PHY is not set
579# CONFIG_REALTEK_PHY is not set
580# CONFIG_FIXED_PHY is not set
581# CONFIG_MDIO_BITBANG is not set
582CONFIG_NET_ETHERNET=y
583CONFIG_MII=y
584CONFIG_MACB=y
585# CONFIG_AX88796 is not set
586# CONFIG_SMC91X is not set
587# CONFIG_DM9000 is not set
588# CONFIG_ENC28J60 is not set
589# CONFIG_IBM_NEW_EMAC_ZMII is not set
590# CONFIG_IBM_NEW_EMAC_RGMII is not set
591# CONFIG_IBM_NEW_EMAC_TAH is not set
592# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
593# CONFIG_B44 is not set
594# CONFIG_NETDEV_1000 is not set
595# CONFIG_NETDEV_10000 is not set
596
597#
598# Wireless LAN
599#
600# CONFIG_WLAN_PRE80211 is not set
601# CONFIG_WLAN_80211 is not set
602# CONFIG_IWLWIFI_LEDS is not set
603
604#
605# USB Network Adapters
606#
607# CONFIG_USB_CATC is not set
608# CONFIG_USB_KAWETH is not set
609# CONFIG_USB_PEGASUS is not set
610# CONFIG_USB_RTL8150 is not set
611# CONFIG_USB_USBNET is not set
612# CONFIG_WAN is not set
613# CONFIG_PPP is not set
614# CONFIG_SLIP is not set
615# CONFIG_NETCONSOLE is not set
616# CONFIG_NETPOLL is not set
617# CONFIG_NET_POLL_CONTROLLER is not set
618# CONFIG_ISDN is not set
619
620#
621# Input device support
622#
623CONFIG_INPUT=y
624# CONFIG_INPUT_FF_MEMLESS is not set
625# CONFIG_INPUT_POLLDEV is not set
626
627#
628# Userland interfaces
629#
630CONFIG_INPUT_MOUSEDEV=y
631# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
632CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
633CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
634# CONFIG_INPUT_JOYDEV is not set
635# CONFIG_INPUT_EVDEV is not set
636# CONFIG_INPUT_EVBUG is not set
637
638#
639# Input Device Drivers
640#
641# CONFIG_INPUT_KEYBOARD is not set
642# CONFIG_INPUT_MOUSE is not set
643# CONFIG_INPUT_JOYSTICK is not set
644# CONFIG_INPUT_TABLET is not set
645# CONFIG_INPUT_TOUCHSCREEN is not set
646# CONFIG_INPUT_MISC is not set
647
648#
649# Hardware I/O ports
650#
651# CONFIG_SERIO is not set
652# CONFIG_GAMEPORT is not set
653
654#
655# Character devices
656#
657CONFIG_VT=y
658CONFIG_CONSOLE_TRANSLATIONS=y
659CONFIG_VT_CONSOLE=y
660CONFIG_HW_CONSOLE=y
661# CONFIG_VT_HW_CONSOLE_BINDING is not set
662CONFIG_DEVKMEM=y
663# CONFIG_SERIAL_NONSTANDARD is not set
664
665#
666# Serial drivers
667#
668# CONFIG_SERIAL_8250 is not set
669
670#
671# Non-8250 serial port support
672#
673CONFIG_SERIAL_ATMEL=y
674CONFIG_SERIAL_ATMEL_CONSOLE=y
675CONFIG_SERIAL_ATMEL_PDC=y
676# CONFIG_SERIAL_ATMEL_TTYAT is not set
677CONFIG_SERIAL_CORE=y
678CONFIG_SERIAL_CORE_CONSOLE=y
679CONFIG_UNIX98_PTYS=y
680CONFIG_LEGACY_PTYS=y
681CONFIG_LEGACY_PTY_COUNT=256
682# CONFIG_IPMI_HANDLER is not set
683# CONFIG_HW_RANDOM is not set
684# CONFIG_NVRAM is not set
685# CONFIG_R3964 is not set
686# CONFIG_RAW_DRIVER is not set
687# CONFIG_TCG_TPM is not set
688CONFIG_I2C=y
689CONFIG_I2C_BOARDINFO=y
690CONFIG_I2C_CHARDEV=y
691CONFIG_I2C_HELPER_AUTO=y
692CONFIG_I2C_ALGOBIT=y
693
694#
695# I2C Hardware Bus support
696#
697
698#
699# I2C system bus drivers (mostly embedded / system-on-chip)
700#
701CONFIG_I2C_GPIO=y
702# CONFIG_I2C_OCORES is not set
703# CONFIG_I2C_SIMTEC is not set
704
705#
706# External I2C/SMBus adapter drivers
707#
708# CONFIG_I2C_PARPORT_LIGHT is not set
709# CONFIG_I2C_TAOS_EVM is not set
710# CONFIG_I2C_TINY_USB is not set
711
712#
713# Other I2C/SMBus bus drivers
714#
715# CONFIG_I2C_PCA_PLATFORM is not set
716# CONFIG_I2C_STUB is not set
717
718#
719# Miscellaneous I2C Chip support
720#
721# CONFIG_DS1682 is not set
722CONFIG_AT24=y
723# CONFIG_SENSORS_EEPROM is not set
724# CONFIG_SENSORS_PCF8574 is not set
725# CONFIG_PCF8575 is not set
726# CONFIG_SENSORS_PCA9539 is not set
727# CONFIG_SENSORS_PCF8591 is not set
728# CONFIG_SENSORS_MAX6875 is not set
729# CONFIG_SENSORS_TSL2550 is not set
730# CONFIG_I2C_DEBUG_CORE is not set
731# CONFIG_I2C_DEBUG_ALGO is not set
732# CONFIG_I2C_DEBUG_BUS is not set
733# CONFIG_I2C_DEBUG_CHIP is not set
734CONFIG_SPI=y
735CONFIG_SPI_DEBUG=y
736CONFIG_SPI_MASTER=y
737
738#
739# SPI Master Controller Drivers
740#
741CONFIG_SPI_ATMEL=y
742# CONFIG_SPI_BITBANG is not set
743
744#
745# SPI Protocol Masters
746#
747# CONFIG_SPI_AT25 is not set
748CONFIG_SPI_SPIDEV=y
749# CONFIG_SPI_TLE62X0 is not set
750# CONFIG_W1 is not set
751# CONFIG_POWER_SUPPLY is not set
752# CONFIG_HWMON is not set
753CONFIG_WATCHDOG=y
754CONFIG_WATCHDOG_NOWAYOUT=y
755
756#
757# Watchdog Device Drivers
758#
759# CONFIG_SOFT_WATCHDOG is not set
760
761#
762# USB-based Watchdog Cards
763#
764# CONFIG_USBPCWATCHDOG is not set
765
766#
767# Sonics Silicon Backplane
768#
769CONFIG_SSB_POSSIBLE=y
770# CONFIG_SSB is not set
771
772#
773# Multifunction device drivers
774#
775# CONFIG_MFD_CORE is not set
776# CONFIG_MFD_SM501 is not set
777# CONFIG_HTC_PASIC3 is not set
778# CONFIG_MFD_TMIO is not set
779# CONFIG_MFD_T7L66XB is not set
780# CONFIG_MFD_TC6387XB is not set
781
782#
783# Multimedia devices
784#
785
786#
787# Multimedia core support
788#
789# CONFIG_VIDEO_DEV is not set
790# CONFIG_DVB_CORE is not set
791# CONFIG_VIDEO_MEDIA is not set
792
793#
794# Multimedia drivers
795#
796# CONFIG_DAB is not set
797
798#
799# Graphics support
800#
801# CONFIG_VGASTATE is not set
802# CONFIG_VIDEO_OUTPUT_CONTROL is not set
803# CONFIG_FB is not set
804# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
805
806#
807# Display device support
808#
809# CONFIG_DISPLAY_SUPPORT is not set
810
811#
812# Console display driver support
813#
814# CONFIG_VGA_CONSOLE is not set
815CONFIG_DUMMY_CONSOLE=y
816# CONFIG_SOUND is not set
817CONFIG_HID_SUPPORT=y
818CONFIG_HID=y
819# CONFIG_HID_DEBUG is not set
820# CONFIG_HIDRAW is not set
821
822#
823# USB Input Devices
824#
825# CONFIG_USB_HID is not set
826
827#
828# USB HID Boot Protocol drivers
829#
830# CONFIG_USB_KBD is not set
831# CONFIG_USB_MOUSE is not set
832CONFIG_USB_SUPPORT=y
833CONFIG_USB_ARCH_HAS_HCD=y
834CONFIG_USB_ARCH_HAS_OHCI=y
835# CONFIG_USB_ARCH_HAS_EHCI is not set
836CONFIG_USB=y
837# CONFIG_USB_DEBUG is not set
838# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
839
840#
841# Miscellaneous USB options
842#
843CONFIG_USB_DEVICEFS=y
844CONFIG_USB_DEVICE_CLASS=y
845# CONFIG_USB_DYNAMIC_MINORS is not set
846# CONFIG_USB_OTG is not set
847
848#
849# USB Host Controller Drivers
850#
851# CONFIG_USB_C67X00_HCD is not set
852# CONFIG_USB_ISP116X_HCD is not set
853# CONFIG_USB_ISP1760_HCD is not set
854CONFIG_USB_OHCI_HCD=y
855# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
856# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
857CONFIG_USB_OHCI_LITTLE_ENDIAN=y
858# CONFIG_USB_SL811_HCD is not set
859# CONFIG_USB_R8A66597_HCD is not set
860
861#
862# USB Device Class drivers
863#
864# CONFIG_USB_ACM is not set
865# CONFIG_USB_PRINTER is not set
866# CONFIG_USB_WDM is not set
867
868#
869# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
870#
871
872#
873# may also be needed; see USB_STORAGE Help for more information
874#
875CONFIG_USB_STORAGE=y
876# CONFIG_USB_STORAGE_DEBUG is not set
877# CONFIG_USB_STORAGE_DATAFAB is not set
878# CONFIG_USB_STORAGE_FREECOM is not set
879# CONFIG_USB_STORAGE_ISD200 is not set
880# CONFIG_USB_STORAGE_DPCM is not set
881# CONFIG_USB_STORAGE_USBAT is not set
882# CONFIG_USB_STORAGE_SDDR09 is not set
883# CONFIG_USB_STORAGE_SDDR55 is not set
884# CONFIG_USB_STORAGE_JUMPSHOT is not set
885# CONFIG_USB_STORAGE_ALAUDA is not set
886# CONFIG_USB_STORAGE_ONETOUCH is not set
887# CONFIG_USB_STORAGE_KARMA is not set
888# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
889# CONFIG_USB_LIBUSUAL is not set
890
891#
892# USB Imaging devices
893#
894# CONFIG_USB_MDC800 is not set
895# CONFIG_USB_MICROTEK is not set
896CONFIG_USB_MON=y
897
898#
899# USB port drivers
900#
901# CONFIG_USB_SERIAL is not set
902
903#
904# USB Miscellaneous drivers
905#
906# CONFIG_USB_EMI62 is not set
907# CONFIG_USB_EMI26 is not set
908# CONFIG_USB_ADUTUX is not set
909# CONFIG_USB_AUERSWALD is not set
910# CONFIG_USB_RIO500 is not set
911# CONFIG_USB_LEGOTOWER is not set
912# CONFIG_USB_LCD is not set
913# CONFIG_USB_BERRY_CHARGE is not set
914# CONFIG_USB_LED is not set
915# CONFIG_USB_CYPRESS_CY7C63 is not set
916# CONFIG_USB_CYTHERM is not set
917# CONFIG_USB_PHIDGET is not set
918# CONFIG_USB_IDMOUSE is not set
919# CONFIG_USB_FTDI_ELAN is not set
920# CONFIG_USB_APPLEDISPLAY is not set
921# CONFIG_USB_LD is not set
922# CONFIG_USB_TRANCEVIBRATOR is not set
923# CONFIG_USB_IOWARRIOR is not set
924# CONFIG_USB_TEST is not set
925# CONFIG_USB_ISIGHTFW is not set
926CONFIG_USB_GADGET=y
927# CONFIG_USB_GADGET_DEBUG is not set
928# CONFIG_USB_GADGET_DEBUG_FILES is not set
929CONFIG_USB_GADGET_SELECTED=y
930# CONFIG_USB_GADGET_AMD5536UDC is not set
931# CONFIG_USB_GADGET_ATMEL_USBA is not set
932# CONFIG_USB_GADGET_FSL_USB2 is not set
933# CONFIG_USB_GADGET_NET2280 is not set
934# CONFIG_USB_GADGET_PXA25X is not set
935# CONFIG_USB_GADGET_M66592 is not set
936# CONFIG_USB_GADGET_PXA27X is not set
937# CONFIG_USB_GADGET_GOKU is not set
938# CONFIG_USB_GADGET_LH7A40X is not set
939# CONFIG_USB_GADGET_OMAP is not set
940# CONFIG_USB_GADGET_S3C2410 is not set
941CONFIG_USB_GADGET_AT91=y
942CONFIG_USB_AT91=y
943# CONFIG_USB_GADGET_DUMMY_HCD is not set
944# CONFIG_USB_GADGET_DUALSPEED is not set
945CONFIG_USB_ZERO=m
946# CONFIG_USB_ETH is not set
947CONFIG_USB_GADGETFS=m
948CONFIG_USB_FILE_STORAGE=m
949# CONFIG_USB_FILE_STORAGE_TEST is not set
950CONFIG_USB_G_SERIAL=m
951# CONFIG_USB_MIDI_GADGET is not set
952# CONFIG_USB_G_PRINTER is not set
953# CONFIG_USB_CDC_COMPOSITE is not set
954# CONFIG_MMC is not set
955# CONFIG_NEW_LEDS is not set
956CONFIG_RTC_LIB=y
957CONFIG_RTC_CLASS=y
958CONFIG_RTC_HCTOSYS=y
959CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
960CONFIG_RTC_DEBUG=y
961
962#
963# RTC interfaces
964#
965CONFIG_RTC_INTF_SYSFS=y
966CONFIG_RTC_INTF_PROC=y
967CONFIG_RTC_INTF_DEV=y
968# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
969# CONFIG_RTC_DRV_TEST is not set
970
971#
972# I2C RTC drivers
973#
974# CONFIG_RTC_DRV_DS1307 is not set
975# CONFIG_RTC_DRV_DS1374 is not set
976# CONFIG_RTC_DRV_DS1672 is not set
977# CONFIG_RTC_DRV_MAX6900 is not set
978# CONFIG_RTC_DRV_RS5C372 is not set
979# CONFIG_RTC_DRV_ISL1208 is not set
980# CONFIG_RTC_DRV_X1205 is not set
981# CONFIG_RTC_DRV_PCF8563 is not set
982# CONFIG_RTC_DRV_PCF8583 is not set
983# CONFIG_RTC_DRV_M41T80 is not set
984# CONFIG_RTC_DRV_S35390A is not set
985CONFIG_RTC_DRV_FM3130=y
986
987#
988# SPI RTC drivers
989#
990# CONFIG_RTC_DRV_M41T94 is not set
991# CONFIG_RTC_DRV_DS1305 is not set
992# CONFIG_RTC_DRV_MAX6902 is not set
993# CONFIG_RTC_DRV_R9701 is not set
994# CONFIG_RTC_DRV_RS5C348 is not set
995
996#
997# Platform RTC drivers
998#
999# CONFIG_RTC_DRV_CMOS is not set
1000# CONFIG_RTC_DRV_DS1511 is not set
1001# CONFIG_RTC_DRV_DS1553 is not set
1002# CONFIG_RTC_DRV_DS1742 is not set
1003# CONFIG_RTC_DRV_STK17TA8 is not set
1004# CONFIG_RTC_DRV_M48T86 is not set
1005# CONFIG_RTC_DRV_M48T59 is not set
1006# CONFIG_RTC_DRV_V3020 is not set
1007
1008#
1009# on-CPU RTC drivers
1010#
1011# CONFIG_RTC_DRV_AT91SAM9 is not set
1012# CONFIG_DMADEVICES is not set
1013
1014#
1015# Voltage and Current regulators
1016#
1017# CONFIG_REGULATOR is not set
1018# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
1019# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
1020# CONFIG_REGULATOR_BQ24022 is not set
1021# CONFIG_UIO is not set
1022
1023#
1024# File systems
1025#
1026CONFIG_EXT2_FS=y
1027# CONFIG_EXT2_FS_XATTR is not set
1028# CONFIG_EXT2_FS_XIP is not set
1029CONFIG_EXT3_FS=y
1030CONFIG_EXT3_FS_XATTR=y
1031# CONFIG_EXT3_FS_POSIX_ACL is not set
1032# CONFIG_EXT3_FS_SECURITY is not set
1033# CONFIG_EXT4DEV_FS is not set
1034CONFIG_JBD=y
1035CONFIG_FS_MBCACHE=y
1036# CONFIG_REISERFS_FS is not set
1037# CONFIG_JFS_FS is not set
1038# CONFIG_FS_POSIX_ACL is not set
1039# CONFIG_XFS_FS is not set
1040# CONFIG_OCFS2_FS is not set
1041CONFIG_DNOTIFY=y
1042CONFIG_INOTIFY=y
1043CONFIG_INOTIFY_USER=y
1044# CONFIG_QUOTA is not set
1045# CONFIG_AUTOFS_FS is not set
1046# CONFIG_AUTOFS4_FS is not set
1047# CONFIG_FUSE_FS is not set
1048
1049#
1050# CD-ROM/DVD Filesystems
1051#
1052# CONFIG_ISO9660_FS is not set
1053# CONFIG_UDF_FS is not set
1054
1055#
1056# DOS/FAT/NT Filesystems
1057#
1058CONFIG_FAT_FS=y
1059# CONFIG_MSDOS_FS is not set
1060CONFIG_VFAT_FS=y
1061CONFIG_FAT_DEFAULT_CODEPAGE=437
1062CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1063# CONFIG_NTFS_FS is not set
1064
1065#
1066# Pseudo filesystems
1067#
1068CONFIG_PROC_FS=y
1069CONFIG_PROC_SYSCTL=y
1070CONFIG_SYSFS=y
1071CONFIG_TMPFS=y
1072# CONFIG_TMPFS_POSIX_ACL is not set
1073# CONFIG_HUGETLB_PAGE is not set
1074# CONFIG_CONFIGFS_FS is not set
1075
1076#
1077# Miscellaneous filesystems
1078#
1079# CONFIG_ADFS_FS is not set
1080# CONFIG_AFFS_FS is not set
1081# CONFIG_HFS_FS is not set
1082# CONFIG_HFSPLUS_FS is not set
1083# CONFIG_BEFS_FS is not set
1084# CONFIG_BFS_FS is not set
1085# CONFIG_EFS_FS is not set
1086CONFIG_JFFS2_FS=y
1087CONFIG_JFFS2_FS_DEBUG=0
1088CONFIG_JFFS2_FS_WRITEBUFFER=y
1089# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
1090# CONFIG_JFFS2_SUMMARY is not set
1091# CONFIG_JFFS2_FS_XATTR is not set
1092# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
1093CONFIG_JFFS2_ZLIB=y
1094# CONFIG_JFFS2_LZO is not set
1095CONFIG_JFFS2_RTIME=y
1096# CONFIG_JFFS2_RUBIN is not set
1097CONFIG_CRAMFS=y
1098# CONFIG_VXFS_FS is not set
1099# CONFIG_MINIX_FS is not set
1100# CONFIG_OMFS_FS is not set
1101# CONFIG_HPFS_FS is not set
1102# CONFIG_QNX4FS_FS is not set
1103# CONFIG_ROMFS_FS is not set
1104# CONFIG_SYSV_FS is not set
1105# CONFIG_UFS_FS is not set
1106CONFIG_NETWORK_FILESYSTEMS=y
1107CONFIG_NFS_FS=y
1108CONFIG_NFS_V3=y
1109# CONFIG_NFS_V3_ACL is not set
1110# CONFIG_NFS_V4 is not set
1111CONFIG_ROOT_NFS=y
1112# CONFIG_NFSD is not set
1113CONFIG_LOCKD=y
1114CONFIG_LOCKD_V4=y
1115CONFIG_NFS_COMMON=y
1116CONFIG_SUNRPC=y
1117# CONFIG_RPCSEC_GSS_KRB5 is not set
1118# CONFIG_RPCSEC_GSS_SPKM3 is not set
1119# CONFIG_SMB_FS is not set
1120# CONFIG_CIFS is not set
1121# CONFIG_NCP_FS is not set
1122# CONFIG_CODA_FS is not set
1123# CONFIG_AFS_FS is not set
1124
1125#
1126# Partition Types
1127#
1128# CONFIG_PARTITION_ADVANCED is not set
1129CONFIG_MSDOS_PARTITION=y
1130CONFIG_NLS=y
1131CONFIG_NLS_DEFAULT="iso8859-1"
1132CONFIG_NLS_CODEPAGE_437=y
1133# CONFIG_NLS_CODEPAGE_737 is not set
1134# CONFIG_NLS_CODEPAGE_775 is not set
1135CONFIG_NLS_CODEPAGE_850=y
1136# CONFIG_NLS_CODEPAGE_852 is not set
1137# CONFIG_NLS_CODEPAGE_855 is not set
1138# CONFIG_NLS_CODEPAGE_857 is not set
1139# CONFIG_NLS_CODEPAGE_860 is not set
1140# CONFIG_NLS_CODEPAGE_861 is not set
1141# CONFIG_NLS_CODEPAGE_862 is not set
1142# CONFIG_NLS_CODEPAGE_863 is not set
1143# CONFIG_NLS_CODEPAGE_864 is not set
1144# CONFIG_NLS_CODEPAGE_865 is not set
1145# CONFIG_NLS_CODEPAGE_866 is not set
1146# CONFIG_NLS_CODEPAGE_869 is not set
1147# CONFIG_NLS_CODEPAGE_936 is not set
1148# CONFIG_NLS_CODEPAGE_950 is not set
1149# CONFIG_NLS_CODEPAGE_932 is not set
1150# CONFIG_NLS_CODEPAGE_949 is not set
1151# CONFIG_NLS_CODEPAGE_874 is not set
1152# CONFIG_NLS_ISO8859_8 is not set
1153# CONFIG_NLS_CODEPAGE_1250 is not set
1154# CONFIG_NLS_CODEPAGE_1251 is not set
1155# CONFIG_NLS_ASCII is not set
1156CONFIG_NLS_ISO8859_1=y
1157# CONFIG_NLS_ISO8859_2 is not set
1158# CONFIG_NLS_ISO8859_3 is not set
1159# CONFIG_NLS_ISO8859_4 is not set
1160# CONFIG_NLS_ISO8859_5 is not set
1161# CONFIG_NLS_ISO8859_6 is not set
1162# CONFIG_NLS_ISO8859_7 is not set
1163# CONFIG_NLS_ISO8859_9 is not set
1164# CONFIG_NLS_ISO8859_13 is not set
1165# CONFIG_NLS_ISO8859_14 is not set
1166# CONFIG_NLS_ISO8859_15 is not set
1167# CONFIG_NLS_KOI8_R is not set
1168# CONFIG_NLS_KOI8_U is not set
1169# CONFIG_NLS_UTF8 is not set
1170# CONFIG_DLM is not set
1171
1172#
1173# Kernel hacking
1174#
1175# CONFIG_PRINTK_TIME is not set
1176CONFIG_ENABLE_WARN_DEPRECATED=y
1177CONFIG_ENABLE_MUST_CHECK=y
1178CONFIG_FRAME_WARN=1024
1179# CONFIG_MAGIC_SYSRQ is not set
1180# CONFIG_UNUSED_SYMBOLS is not set
1181# CONFIG_DEBUG_FS is not set
1182# CONFIG_HEADERS_CHECK is not set
1183CONFIG_DEBUG_KERNEL=y
1184# CONFIG_DEBUG_SHIRQ is not set
1185CONFIG_DETECT_SOFTLOCKUP=y
1186# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
1187CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
1188CONFIG_SCHED_DEBUG=y
1189# CONFIG_SCHEDSTATS is not set
1190# CONFIG_TIMER_STATS is not set
1191# CONFIG_DEBUG_OBJECTS is not set
1192# CONFIG_DEBUG_SLAB is not set
1193CONFIG_DEBUG_PREEMPT=y
1194# CONFIG_DEBUG_RT_MUTEXES is not set
1195# CONFIG_RT_MUTEX_TESTER is not set
1196# CONFIG_DEBUG_SPINLOCK is not set
1197# CONFIG_DEBUG_MUTEXES is not set
1198# CONFIG_DEBUG_LOCK_ALLOC is not set
1199# CONFIG_PROVE_LOCKING is not set
1200# CONFIG_LOCK_STAT is not set
1201# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1202# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1203# CONFIG_DEBUG_KOBJECT is not set
1204CONFIG_DEBUG_BUGVERBOSE=y
1205CONFIG_DEBUG_INFO=y
1206# CONFIG_DEBUG_VM is not set
1207# CONFIG_DEBUG_WRITECOUNT is not set
1208CONFIG_DEBUG_MEMORY_INIT=y
1209# CONFIG_DEBUG_LIST is not set
1210# CONFIG_DEBUG_SG is not set
1211CONFIG_FRAME_POINTER=y
1212# CONFIG_BOOT_PRINTK_DELAY is not set
1213# CONFIG_RCU_TORTURE_TEST is not set
1214# CONFIG_BACKTRACE_SELF_TEST is not set
1215# CONFIG_FAULT_INJECTION is not set
1216# CONFIG_LATENCYTOP is not set
1217CONFIG_HAVE_FTRACE=y
1218CONFIG_HAVE_DYNAMIC_FTRACE=y
1219# CONFIG_FTRACE is not set
1220# CONFIG_IRQSOFF_TRACER is not set
1221# CONFIG_PREEMPT_TRACER is not set
1222# CONFIG_SCHED_TRACER is not set
1223# CONFIG_CONTEXT_SWITCH_TRACER is not set
1224# CONFIG_SAMPLES is not set
1225CONFIG_HAVE_ARCH_KGDB=y
1226# CONFIG_KGDB is not set
1227CONFIG_DEBUG_USER=y
1228# CONFIG_DEBUG_ERRORS is not set
1229# CONFIG_DEBUG_STACK_USAGE is not set
1230CONFIG_DEBUG_LL=y
1231# CONFIG_DEBUG_ICEDCC is not set
1232
1233#
1234# Security options
1235#
1236# CONFIG_KEYS is not set
1237# CONFIG_SECURITY is not set
1238# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1239# CONFIG_CRYPTO is not set
1240
1241#
1242# Library routines
1243#
1244CONFIG_BITREVERSE=y
1245# CONFIG_GENERIC_FIND_FIRST_BIT is not set
1246# CONFIG_GENERIC_FIND_NEXT_BIT is not set
1247# CONFIG_CRC_CCITT is not set
1248# CONFIG_CRC16 is not set
1249CONFIG_CRC_T10DIF=y
1250# CONFIG_CRC_ITU_T is not set
1251CONFIG_CRC32=y
1252# CONFIG_CRC7 is not set
1253# CONFIG_LIBCRC32C is not set
1254CONFIG_ZLIB_INFLATE=y
1255CONFIG_ZLIB_DEFLATE=y
1256CONFIG_PLIST=y
1257CONFIG_HAS_IOMEM=y
1258CONFIG_HAS_IOPORT=y
1259CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/at91sam9rlek_defconfig b/arch/arm/configs/at91sam9rlek_defconfig
index 1c76642272a1..811bebbdc784 100644
--- a/arch/arm/configs/at91sam9rlek_defconfig
+++ b/arch/arm/configs/at91sam9rlek_defconfig
@@ -496,6 +496,7 @@ CONFIG_INPUT_TOUCHSCREEN=y
496# CONFIG_TOUCHSCREEN_PENMOUNT is not set 496# CONFIG_TOUCHSCREEN_PENMOUNT is not set
497# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set 497# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
498# CONFIG_TOUCHSCREEN_TOUCHWIN is not set 498# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
499CONFIG_TOUCHSCREEN_ATMEL_TSADCC=y
499# CONFIG_TOUCHSCREEN_UCB1400 is not set 500# CONFIG_TOUCHSCREEN_UCB1400 is not set
500# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set 501# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
501# CONFIG_INPUT_MISC is not set 502# CONFIG_INPUT_MISC is not set
diff --git a/arch/arm/configs/cm_x300_defconfig b/arch/arm/configs/cm_x300_defconfig
new file mode 100644
index 000000000000..46f1c9dc350c
--- /dev/null
+++ b/arch/arm/configs/cm_x300_defconfig
@@ -0,0 +1,1466 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.27-rc3
4# Tue Aug 19 11:26:54 2008
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y
10CONFIG_GENERIC_CLOCKEVENTS=y
11CONFIG_MMU=y
12# CONFIG_NO_IOPORT is not set
13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_STACKTRACE_SUPPORT=y
15CONFIG_HAVE_LATENCYTOP_SUPPORT=y
16CONFIG_LOCKDEP_SUPPORT=y
17CONFIG_TRACE_IRQFLAGS_SUPPORT=y
18CONFIG_HARDIRQS_SW_RESEND=y
19CONFIG_GENERIC_IRQ_PROBE=y
20CONFIG_RWSEM_GENERIC_SPINLOCK=y
21# CONFIG_ARCH_HAS_ILOG2_U32 is not set
22# CONFIG_ARCH_HAS_ILOG2_U64 is not set
23CONFIG_GENERIC_HWEIGHT=y
24CONFIG_GENERIC_CALIBRATE_DELAY=y
25CONFIG_ARCH_SUPPORTS_AOUT=y
26CONFIG_ZONE_DMA=y
27CONFIG_ARCH_MTD_XIP=y
28CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
29CONFIG_VECTORS_BASE=0xffff0000
30CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
31
32#
33# General setup
34#
35CONFIG_EXPERIMENTAL=y
36CONFIG_BROKEN_ON_SMP=y
37CONFIG_INIT_ENV_ARG_LIMIT=32
38CONFIG_LOCALVERSION="-cm-x300"
39# CONFIG_LOCALVERSION_AUTO is not set
40CONFIG_SWAP=y
41CONFIG_SYSVIPC=y
42CONFIG_SYSVIPC_SYSCTL=y
43# CONFIG_POSIX_MQUEUE is not set
44# CONFIG_BSD_PROCESS_ACCT is not set
45# CONFIG_TASKSTATS is not set
46# CONFIG_AUDIT is not set
47CONFIG_IKCONFIG=y
48CONFIG_IKCONFIG_PROC=y
49CONFIG_LOG_BUF_SHIFT=18
50# CONFIG_CGROUPS is not set
51CONFIG_GROUP_SCHED=y
52CONFIG_FAIR_GROUP_SCHED=y
53# CONFIG_RT_GROUP_SCHED is not set
54CONFIG_USER_SCHED=y
55# CONFIG_CGROUP_SCHED is not set
56CONFIG_SYSFS_DEPRECATED=y
57CONFIG_SYSFS_DEPRECATED_V2=y
58# CONFIG_RELAY is not set
59CONFIG_NAMESPACES=y
60# CONFIG_UTS_NS is not set
61# CONFIG_IPC_NS is not set
62# CONFIG_USER_NS is not set
63# CONFIG_PID_NS is not set
64CONFIG_BLK_DEV_INITRD=y
65CONFIG_INITRAMFS_SOURCE=""
66# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
67CONFIG_SYSCTL=y
68# CONFIG_EMBEDDED is not set
69CONFIG_UID16=y
70CONFIG_SYSCTL_SYSCALL=y
71CONFIG_KALLSYMS=y
72# CONFIG_KALLSYMS_ALL is not set
73# CONFIG_KALLSYMS_EXTRA_PASS is not set
74CONFIG_HOTPLUG=y
75CONFIG_PRINTK=y
76CONFIG_BUG=y
77CONFIG_ELF_CORE=y
78CONFIG_COMPAT_BRK=y
79CONFIG_BASE_FULL=y
80CONFIG_FUTEX=y
81CONFIG_ANON_INODES=y
82CONFIG_EPOLL=y
83CONFIG_SIGNALFD=y
84CONFIG_TIMERFD=y
85CONFIG_EVENTFD=y
86CONFIG_SHMEM=y
87CONFIG_VM_EVENT_COUNTERS=y
88CONFIG_SLUB_DEBUG=y
89# CONFIG_SLAB is not set
90CONFIG_SLUB=y
91# CONFIG_SLOB is not set
92# CONFIG_PROFILING is not set
93# CONFIG_MARKERS is not set
94CONFIG_HAVE_OPROFILE=y
95# CONFIG_KPROBES is not set
96# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
97# CONFIG_HAVE_IOREMAP_PROT is not set
98CONFIG_HAVE_KPROBES=y
99CONFIG_HAVE_KRETPROBES=y
100# CONFIG_HAVE_ARCH_TRACEHOOK is not set
101# CONFIG_HAVE_DMA_ATTRS is not set
102# CONFIG_USE_GENERIC_SMP_HELPERS is not set
103CONFIG_HAVE_CLK=y
104CONFIG_PROC_PAGE_MONITOR=y
105CONFIG_HAVE_GENERIC_DMA_COHERENT=y
106CONFIG_SLABINFO=y
107CONFIG_RT_MUTEXES=y
108# CONFIG_TINY_SHMEM is not set
109CONFIG_BASE_SMALL=0
110CONFIG_MODULES=y
111# CONFIG_MODULE_FORCE_LOAD is not set
112CONFIG_MODULE_UNLOAD=y
113# CONFIG_MODULE_FORCE_UNLOAD is not set
114# CONFIG_MODVERSIONS is not set
115# CONFIG_MODULE_SRCVERSION_ALL is not set
116CONFIG_KMOD=y
117CONFIG_BLOCK=y
118# CONFIG_LBD is not set
119# CONFIG_BLK_DEV_IO_TRACE is not set
120# CONFIG_LSF is not set
121# CONFIG_BLK_DEV_BSG is not set
122# CONFIG_BLK_DEV_INTEGRITY is not set
123
124#
125# IO Schedulers
126#
127CONFIG_IOSCHED_NOOP=y
128CONFIG_IOSCHED_AS=y
129CONFIG_IOSCHED_DEADLINE=y
130CONFIG_IOSCHED_CFQ=y
131# CONFIG_DEFAULT_AS is not set
132# CONFIG_DEFAULT_DEADLINE is not set
133CONFIG_DEFAULT_CFQ=y
134# CONFIG_DEFAULT_NOOP is not set
135CONFIG_DEFAULT_IOSCHED="cfq"
136CONFIG_CLASSIC_RCU=y
137
138#
139# System Type
140#
141# CONFIG_ARCH_AAEC2000 is not set
142# CONFIG_ARCH_INTEGRATOR is not set
143# CONFIG_ARCH_REALVIEW is not set
144# CONFIG_ARCH_VERSATILE is not set
145# CONFIG_ARCH_AT91 is not set
146# CONFIG_ARCH_CLPS7500 is not set
147# CONFIG_ARCH_CLPS711X is not set
148# CONFIG_ARCH_EBSA110 is not set
149# CONFIG_ARCH_EP93XX is not set
150# CONFIG_ARCH_FOOTBRIDGE is not set
151# CONFIG_ARCH_NETX is not set
152# CONFIG_ARCH_H720X is not set
153# CONFIG_ARCH_IMX is not set
154# CONFIG_ARCH_IOP13XX is not set
155# CONFIG_ARCH_IOP32X is not set
156# CONFIG_ARCH_IOP33X is not set
157# CONFIG_ARCH_IXP23XX is not set
158# CONFIG_ARCH_IXP2000 is not set
159# CONFIG_ARCH_IXP4XX is not set
160# CONFIG_ARCH_L7200 is not set
161# CONFIG_ARCH_KIRKWOOD is not set
162# CONFIG_ARCH_KS8695 is not set
163# CONFIG_ARCH_NS9XXX is not set
164# CONFIG_ARCH_LOKI is not set
165# CONFIG_ARCH_MV78XX0 is not set
166# CONFIG_ARCH_MXC is not set
167# CONFIG_ARCH_ORION5X is not set
168# CONFIG_ARCH_PNX4008 is not set
169CONFIG_ARCH_PXA=y
170# CONFIG_ARCH_RPC is not set
171# CONFIG_ARCH_SA1100 is not set
172# CONFIG_ARCH_S3C2410 is not set
173# CONFIG_ARCH_SHARK is not set
174# CONFIG_ARCH_LH7A40X is not set
175# CONFIG_ARCH_DAVINCI is not set
176# CONFIG_ARCH_OMAP is not set
177# CONFIG_ARCH_MSM7X00A is not set
178
179#
180# Intel PXA2xx/PXA3xx Implementations
181#
182
183#
184# Supported PXA3xx Processor Variants
185#
186CONFIG_CPU_PXA300=y
187# CONFIG_CPU_PXA310 is not set
188# CONFIG_CPU_PXA320 is not set
189# CONFIG_CPU_PXA930 is not set
190# CONFIG_ARCH_GUMSTIX is not set
191# CONFIG_ARCH_LUBBOCK is not set
192# CONFIG_MACH_LOGICPD_PXA270 is not set
193# CONFIG_MACH_MAINSTONE is not set
194# CONFIG_ARCH_PXA_IDP is not set
195# CONFIG_PXA_SHARPSL is not set
196# CONFIG_ARCH_PXA_ESERIES is not set
197# CONFIG_MACH_TRIZEPS4 is not set
198# CONFIG_MACH_EM_X270 is not set
199# CONFIG_MACH_COLIBRI is not set
200# CONFIG_MACH_ZYLONITE is not set
201# CONFIG_MACH_LITTLETON is not set
202# CONFIG_MACH_TAVOREVB is not set
203# CONFIG_MACH_SAAR is not set
204# CONFIG_MACH_ARMCORE is not set
205CONFIG_MACH_CM_X300=y
206# CONFIG_MACH_MAGICIAN is not set
207# CONFIG_MACH_PCM027 is not set
208# CONFIG_ARCH_PXA_PALM is not set
209# CONFIG_PXA_EZX is not set
210CONFIG_PXA3xx=y
211# CONFIG_PXA_PWM is not set
212
213#
214# Boot options
215#
216
217#
218# Power management
219#
220
221#
222# Processor Type
223#
224CONFIG_CPU_32=y
225CONFIG_CPU_XSC3=y
226CONFIG_CPU_32v5=y
227CONFIG_CPU_ABRT_EV5T=y
228CONFIG_CPU_PABRT_NOIFAR=y
229CONFIG_CPU_CACHE_VIVT=y
230CONFIG_CPU_TLB_V4WBI=y
231CONFIG_CPU_CP15=y
232CONFIG_CPU_CP15_MMU=y
233CONFIG_IO_36=y
234
235#
236# Processor Features
237#
238# CONFIG_ARM_THUMB is not set
239# CONFIG_CPU_DCACHE_DISABLE is not set
240# CONFIG_CPU_BPREDICT_DISABLE is not set
241CONFIG_OUTER_CACHE=y
242CONFIG_CACHE_XSC3L2=y
243CONFIG_IWMMXT=y
244
245#
246# Bus support
247#
248# CONFIG_PCI_SYSCALL is not set
249# CONFIG_ARCH_SUPPORTS_MSI is not set
250# CONFIG_PCCARD is not set
251
252#
253# Kernel Features
254#
255CONFIG_TICK_ONESHOT=y
256CONFIG_NO_HZ=y
257# CONFIG_HIGH_RES_TIMERS is not set
258CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
259# CONFIG_PREEMPT is not set
260CONFIG_HZ=100
261CONFIG_AEABI=y
262CONFIG_OABI_COMPAT=y
263# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
264CONFIG_SELECT_MEMORY_MODEL=y
265CONFIG_FLATMEM_MANUAL=y
266# CONFIG_DISCONTIGMEM_MANUAL is not set
267# CONFIG_SPARSEMEM_MANUAL is not set
268CONFIG_FLATMEM=y
269CONFIG_FLAT_NODE_MEM_MAP=y
270# CONFIG_SPARSEMEM_STATIC is not set
271# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
272CONFIG_PAGEFLAGS_EXTENDED=y
273CONFIG_SPLIT_PTLOCK_CPUS=4096
274# CONFIG_RESOURCES_64BIT is not set
275CONFIG_ZONE_DMA_FLAG=1
276CONFIG_BOUNCE=y
277CONFIG_VIRT_TO_BUS=y
278CONFIG_ALIGNMENT_TRAP=y
279
280#
281# Boot options
282#
283CONFIG_ZBOOT_ROM_TEXT=0x0
284CONFIG_ZBOOT_ROM_BSS=0x0
285CONFIG_CMDLINE="root=/dev/mtdblock5 rootfstype=jffs2 console=ttyS2,38400"
286# CONFIG_XIP_KERNEL is not set
287# CONFIG_KEXEC is not set
288
289#
290# CPU Frequency scaling
291#
292CONFIG_CPU_FREQ=y
293CONFIG_CPU_FREQ_TABLE=y
294# CONFIG_CPU_FREQ_DEBUG is not set
295CONFIG_CPU_FREQ_STAT=y
296# CONFIG_CPU_FREQ_STAT_DETAILS is not set
297CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
298# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
299# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
300# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
301# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
302CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
303# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
304CONFIG_CPU_FREQ_GOV_USERSPACE=y
305# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set
306# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
307
308#
309# Floating point emulation
310#
311
312#
313# At least one emulation must be selected
314#
315CONFIG_FPE_NWFPE=y
316# CONFIG_FPE_NWFPE_XP is not set
317# CONFIG_FPE_FASTFPE is not set
318
319#
320# Userspace binary formats
321#
322CONFIG_BINFMT_ELF=y
323# CONFIG_BINFMT_AOUT is not set
324# CONFIG_BINFMT_MISC is not set
325
326#
327# Power management options
328#
329CONFIG_PM=y
330# CONFIG_PM_DEBUG is not set
331CONFIG_PM_SLEEP=y
332CONFIG_SUSPEND=y
333CONFIG_SUSPEND_FREEZER=y
334CONFIG_APM_EMULATION=y
335CONFIG_ARCH_SUSPEND_POSSIBLE=y
336CONFIG_NET=y
337
338#
339# Networking options
340#
341CONFIG_PACKET=y
342# CONFIG_PACKET_MMAP is not set
343CONFIG_UNIX=y
344# CONFIG_NET_KEY is not set
345CONFIG_INET=y
346# CONFIG_IP_MULTICAST is not set
347# CONFIG_IP_ADVANCED_ROUTER is not set
348CONFIG_IP_FIB_HASH=y
349CONFIG_IP_PNP=y
350CONFIG_IP_PNP_DHCP=y
351CONFIG_IP_PNP_BOOTP=y
352CONFIG_IP_PNP_RARP=y
353# CONFIG_NET_IPIP is not set
354# CONFIG_NET_IPGRE is not set
355# CONFIG_ARPD is not set
356# CONFIG_SYN_COOKIES is not set
357# CONFIG_INET_AH is not set
358# CONFIG_INET_ESP is not set
359# CONFIG_INET_IPCOMP is not set
360# CONFIG_INET_XFRM_TUNNEL is not set
361# CONFIG_INET_TUNNEL is not set
362# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
363# CONFIG_INET_XFRM_MODE_TUNNEL is not set
364# CONFIG_INET_XFRM_MODE_BEET is not set
365# CONFIG_INET_LRO is not set
366# CONFIG_INET_DIAG is not set
367# CONFIG_TCP_CONG_ADVANCED is not set
368CONFIG_TCP_CONG_CUBIC=y
369CONFIG_DEFAULT_TCP_CONG="cubic"
370# CONFIG_TCP_MD5SIG is not set
371# CONFIG_IPV6 is not set
372# CONFIG_NETWORK_SECMARK is not set
373# CONFIG_NETFILTER is not set
374# CONFIG_IP_DCCP is not set
375# CONFIG_IP_SCTP is not set
376# CONFIG_TIPC is not set
377# CONFIG_ATM is not set
378# CONFIG_BRIDGE is not set
379# CONFIG_VLAN_8021Q is not set
380# CONFIG_DECNET is not set
381# CONFIG_LLC2 is not set
382# CONFIG_IPX is not set
383# CONFIG_ATALK is not set
384# CONFIG_X25 is not set
385# CONFIG_LAPB is not set
386# CONFIG_ECONET is not set
387# CONFIG_WAN_ROUTER is not set
388# CONFIG_NET_SCHED is not set
389
390#
391# Network testing
392#
393# CONFIG_NET_PKTGEN is not set
394# CONFIG_HAMRADIO is not set
395# CONFIG_CAN is not set
396# CONFIG_IRDA is not set
397CONFIG_BT=m
398CONFIG_BT_L2CAP=m
399CONFIG_BT_SCO=m
400CONFIG_BT_RFCOMM=m
401CONFIG_BT_RFCOMM_TTY=y
402CONFIG_BT_BNEP=m
403CONFIG_BT_BNEP_MC_FILTER=y
404CONFIG_BT_BNEP_PROTO_FILTER=y
405CONFIG_BT_HIDP=m
406
407#
408# Bluetooth device drivers
409#
410CONFIG_BT_HCIUSB=m
411CONFIG_BT_HCIUSB_SCO=y
412# CONFIG_BT_HCIBTSDIO is not set
413# CONFIG_BT_HCIUART is not set
414# CONFIG_BT_HCIBCM203X is not set
415# CONFIG_BT_HCIBPA10X is not set
416# CONFIG_BT_HCIBFUSB is not set
417# CONFIG_BT_HCIVHCI is not set
418# CONFIG_AF_RXRPC is not set
419
420#
421# Wireless
422#
423# CONFIG_CFG80211 is not set
424CONFIG_WIRELESS_EXT=y
425CONFIG_WIRELESS_EXT_SYSFS=y
426# CONFIG_MAC80211 is not set
427CONFIG_IEEE80211=m
428# CONFIG_IEEE80211_DEBUG is not set
429CONFIG_IEEE80211_CRYPT_WEP=m
430CONFIG_IEEE80211_CRYPT_CCMP=m
431CONFIG_IEEE80211_CRYPT_TKIP=m
432# CONFIG_RFKILL is not set
433# CONFIG_NET_9P is not set
434
435#
436# Device Drivers
437#
438
439#
440# Generic Driver Options
441#
442CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
443CONFIG_STANDALONE=y
444CONFIG_PREVENT_FIRMWARE_BUILD=y
445CONFIG_FW_LOADER=y
446CONFIG_FIRMWARE_IN_KERNEL=y
447CONFIG_EXTRA_FIRMWARE=""
448# CONFIG_DEBUG_DRIVER is not set
449# CONFIG_DEBUG_DEVRES is not set
450# CONFIG_SYS_HYPERVISOR is not set
451# CONFIG_CONNECTOR is not set
452CONFIG_MTD=y
453# CONFIG_MTD_DEBUG is not set
454# CONFIG_MTD_CONCAT is not set
455CONFIG_MTD_PARTITIONS=y
456# CONFIG_MTD_REDBOOT_PARTS is not set
457# CONFIG_MTD_CMDLINE_PARTS is not set
458# CONFIG_MTD_AFS_PARTS is not set
459# CONFIG_MTD_AR7_PARTS is not set
460
461#
462# User Modules And Translation Layers
463#
464CONFIG_MTD_CHAR=y
465CONFIG_MTD_BLKDEVS=y
466CONFIG_MTD_BLOCK=y
467# CONFIG_FTL is not set
468# CONFIG_NFTL is not set
469# CONFIG_INFTL is not set
470# CONFIG_RFD_FTL is not set
471# CONFIG_SSFDC is not set
472# CONFIG_MTD_OOPS is not set
473
474#
475# RAM/ROM/Flash chip drivers
476#
477# CONFIG_MTD_CFI is not set
478# CONFIG_MTD_JEDECPROBE is not set
479CONFIG_MTD_MAP_BANK_WIDTH_1=y
480CONFIG_MTD_MAP_BANK_WIDTH_2=y
481CONFIG_MTD_MAP_BANK_WIDTH_4=y
482# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
483# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
484# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
485CONFIG_MTD_CFI_I1=y
486CONFIG_MTD_CFI_I2=y
487# CONFIG_MTD_CFI_I4 is not set
488# CONFIG_MTD_CFI_I8 is not set
489# CONFIG_MTD_RAM is not set
490# CONFIG_MTD_ROM is not set
491# CONFIG_MTD_ABSENT is not set
492
493#
494# Mapping drivers for chip access
495#
496# CONFIG_MTD_COMPLEX_MAPPINGS is not set
497# CONFIG_MTD_SHARP_SL is not set
498# CONFIG_MTD_PLATRAM is not set
499
500#
501# Self-contained MTD device drivers
502#
503# CONFIG_MTD_SLRAM is not set
504# CONFIG_MTD_PHRAM is not set
505# CONFIG_MTD_MTDRAM is not set
506# CONFIG_MTD_BLOCK2MTD is not set
507
508#
509# Disk-On-Chip Device Drivers
510#
511# CONFIG_MTD_DOC2000 is not set
512# CONFIG_MTD_DOC2001 is not set
513# CONFIG_MTD_DOC2001PLUS is not set
514CONFIG_MTD_NAND=y
515# CONFIG_MTD_NAND_VERIFY_WRITE is not set
516# CONFIG_MTD_NAND_ECC_SMC is not set
517# CONFIG_MTD_NAND_MUSEUM_IDS is not set
518# CONFIG_MTD_NAND_H1900 is not set
519CONFIG_MTD_NAND_IDS=y
520# CONFIG_MTD_NAND_DISKONCHIP is not set
521# CONFIG_MTD_NAND_SHARPSL is not set
522CONFIG_MTD_NAND_PXA3xx=y
523# CONFIG_MTD_NAND_NANDSIM is not set
524# CONFIG_MTD_NAND_PLATFORM is not set
525# CONFIG_MTD_ALAUDA is not set
526# CONFIG_MTD_ONENAND is not set
527
528#
529# UBI - Unsorted block images
530#
531# CONFIG_MTD_UBI is not set
532# CONFIG_PARPORT is not set
533CONFIG_BLK_DEV=y
534# CONFIG_BLK_DEV_COW_COMMON is not set
535CONFIG_BLK_DEV_LOOP=y
536# CONFIG_BLK_DEV_CRYPTOLOOP is not set
537# CONFIG_BLK_DEV_NBD is not set
538# CONFIG_BLK_DEV_UB is not set
539CONFIG_BLK_DEV_RAM=y
540CONFIG_BLK_DEV_RAM_COUNT=16
541CONFIG_BLK_DEV_RAM_SIZE=4096
542# CONFIG_BLK_DEV_XIP is not set
543# CONFIG_CDROM_PKTCDVD is not set
544# CONFIG_ATA_OVER_ETH is not set
545# CONFIG_MISC_DEVICES is not set
546CONFIG_HAVE_IDE=y
547# CONFIG_IDE is not set
548
549#
550# SCSI device support
551#
552# CONFIG_RAID_ATTRS is not set
553CONFIG_SCSI=y
554CONFIG_SCSI_DMA=y
555# CONFIG_SCSI_TGT is not set
556# CONFIG_SCSI_NETLINK is not set
557CONFIG_SCSI_PROC_FS=y
558
559#
560# SCSI support type (disk, tape, CD-ROM)
561#
562CONFIG_BLK_DEV_SD=y
563# CONFIG_CHR_DEV_ST is not set
564# CONFIG_CHR_DEV_OSST is not set
565# CONFIG_BLK_DEV_SR is not set
566# CONFIG_CHR_DEV_SG is not set
567# CONFIG_CHR_DEV_SCH is not set
568
569#
570# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
571#
572# CONFIG_SCSI_MULTI_LUN is not set
573# CONFIG_SCSI_CONSTANTS is not set
574# CONFIG_SCSI_LOGGING is not set
575# CONFIG_SCSI_SCAN_ASYNC is not set
576CONFIG_SCSI_WAIT_SCAN=m
577
578#
579# SCSI Transports
580#
581# CONFIG_SCSI_SPI_ATTRS is not set
582# CONFIG_SCSI_FC_ATTRS is not set
583# CONFIG_SCSI_ISCSI_ATTRS is not set
584# CONFIG_SCSI_SAS_LIBSAS is not set
585# CONFIG_SCSI_SRP_ATTRS is not set
586CONFIG_SCSI_LOWLEVEL=y
587# CONFIG_ISCSI_TCP is not set
588# CONFIG_SCSI_DEBUG is not set
589# CONFIG_SCSI_DH is not set
590# CONFIG_ATA is not set
591# CONFIG_MD is not set
592CONFIG_NETDEVICES=y
593# CONFIG_DUMMY is not set
594# CONFIG_BONDING is not set
595# CONFIG_MACVLAN is not set
596# CONFIG_EQUALIZER is not set
597# CONFIG_TUN is not set
598# CONFIG_VETH is not set
599# CONFIG_PHYLIB is not set
600CONFIG_NET_ETHERNET=y
601CONFIG_MII=y
602# CONFIG_AX88796 is not set
603# CONFIG_SMC91X is not set
604CONFIG_DM9000=y
605CONFIG_DM9000_DEBUGLEVEL=0
606CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL=y
607# CONFIG_SMC911X is not set
608# CONFIG_IBM_NEW_EMAC_ZMII is not set
609# CONFIG_IBM_NEW_EMAC_RGMII is not set
610# CONFIG_IBM_NEW_EMAC_TAH is not set
611# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
612# CONFIG_B44 is not set
613# CONFIG_NETDEV_1000 is not set
614# CONFIG_NETDEV_10000 is not set
615
616#
617# Wireless LAN
618#
619# CONFIG_WLAN_PRE80211 is not set
620CONFIG_WLAN_80211=y
621CONFIG_LIBERTAS=m
622# CONFIG_LIBERTAS_USB is not set
623CONFIG_LIBERTAS_SDIO=m
624# CONFIG_LIBERTAS_DEBUG is not set
625# CONFIG_USB_ZD1201 is not set
626# CONFIG_USB_NET_RNDIS_WLAN is not set
627# CONFIG_IWLWIFI_LEDS is not set
628# CONFIG_HOSTAP is not set
629
630#
631# USB Network Adapters
632#
633# CONFIG_USB_CATC is not set
634# CONFIG_USB_KAWETH is not set
635# CONFIG_USB_PEGASUS is not set
636# CONFIG_USB_RTL8150 is not set
637# CONFIG_USB_USBNET is not set
638# CONFIG_WAN is not set
639# CONFIG_PPP is not set
640# CONFIG_SLIP is not set
641# CONFIG_NETCONSOLE is not set
642# CONFIG_NETPOLL is not set
643# CONFIG_NET_POLL_CONTROLLER is not set
644# CONFIG_ISDN is not set
645
646#
647# Input device support
648#
649CONFIG_INPUT=y
650# CONFIG_INPUT_FF_MEMLESS is not set
651# CONFIG_INPUT_POLLDEV is not set
652
653#
654# Userland interfaces
655#
656CONFIG_INPUT_MOUSEDEV=y
657# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
658CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
659CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
660# CONFIG_INPUT_JOYDEV is not set
661CONFIG_INPUT_EVDEV=y
662# CONFIG_INPUT_EVBUG is not set
663
664#
665# Input Device Drivers
666#
667CONFIG_INPUT_KEYBOARD=y
668# CONFIG_KEYBOARD_ATKBD is not set
669# CONFIG_KEYBOARD_SUNKBD is not set
670# CONFIG_KEYBOARD_LKKBD is not set
671# CONFIG_KEYBOARD_XTKBD is not set
672# CONFIG_KEYBOARD_NEWTON is not set
673# CONFIG_KEYBOARD_STOWAWAY is not set
674CONFIG_KEYBOARD_PXA27x=m
675# CONFIG_KEYBOARD_GPIO is not set
676# CONFIG_INPUT_MOUSE is not set
677# CONFIG_INPUT_JOYSTICK is not set
678# CONFIG_INPUT_TABLET is not set
679CONFIG_INPUT_TOUCHSCREEN=y
680# CONFIG_TOUCHSCREEN_FUJITSU is not set
681# CONFIG_TOUCHSCREEN_GUNZE is not set
682# CONFIG_TOUCHSCREEN_ELO is not set
683# CONFIG_TOUCHSCREEN_MTOUCH is not set
684# CONFIG_TOUCHSCREEN_INEXIO is not set
685# CONFIG_TOUCHSCREEN_MK712 is not set
686# CONFIG_TOUCHSCREEN_PENMOUNT is not set
687# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
688# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
689# CONFIG_TOUCHSCREEN_UCB1400 is not set
690# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
691# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
692# CONFIG_INPUT_MISC is not set
693
694#
695# Hardware I/O ports
696#
697# CONFIG_SERIO is not set
698# CONFIG_GAMEPORT is not set
699
700#
701# Character devices
702#
703CONFIG_VT=y
704CONFIG_CONSOLE_TRANSLATIONS=y
705CONFIG_VT_CONSOLE=y
706CONFIG_HW_CONSOLE=y
707# CONFIG_VT_HW_CONSOLE_BINDING is not set
708CONFIG_DEVKMEM=y
709# CONFIG_SERIAL_NONSTANDARD is not set
710
711#
712# Serial drivers
713#
714# CONFIG_SERIAL_8250 is not set
715
716#
717# Non-8250 serial port support
718#
719CONFIG_SERIAL_PXA=y
720CONFIG_SERIAL_PXA_CONSOLE=y
721CONFIG_SERIAL_CORE=y
722CONFIG_SERIAL_CORE_CONSOLE=y
723CONFIG_UNIX98_PTYS=y
724# CONFIG_LEGACY_PTYS is not set
725# CONFIG_IPMI_HANDLER is not set
726# CONFIG_HW_RANDOM is not set
727# CONFIG_NVRAM is not set
728# CONFIG_R3964 is not set
729# CONFIG_RAW_DRIVER is not set
730# CONFIG_TCG_TPM is not set
731CONFIG_I2C=y
732CONFIG_I2C_BOARDINFO=y
733# CONFIG_I2C_CHARDEV is not set
734CONFIG_I2C_HELPER_AUTO=y
735
736#
737# I2C Hardware Bus support
738#
739
740#
741# I2C system bus drivers (mostly embedded / system-on-chip)
742#
743# CONFIG_I2C_GPIO is not set
744# CONFIG_I2C_OCORES is not set
745CONFIG_I2C_PXA=y
746# CONFIG_I2C_PXA_SLAVE is not set
747# CONFIG_I2C_SIMTEC is not set
748
749#
750# External I2C/SMBus adapter drivers
751#
752# CONFIG_I2C_PARPORT_LIGHT is not set
753# CONFIG_I2C_TAOS_EVM is not set
754# CONFIG_I2C_TINY_USB is not set
755
756#
757# Other I2C/SMBus bus drivers
758#
759# CONFIG_I2C_PCA_PLATFORM is not set
760# CONFIG_I2C_STUB is not set
761
762#
763# Miscellaneous I2C Chip support
764#
765# CONFIG_DS1682 is not set
766# CONFIG_AT24 is not set
767# CONFIG_SENSORS_EEPROM is not set
768# CONFIG_SENSORS_PCF8574 is not set
769# CONFIG_PCF8575 is not set
770# CONFIG_SENSORS_PCF8591 is not set
771# CONFIG_TPS65010 is not set
772# CONFIG_SENSORS_MAX6875 is not set
773# CONFIG_SENSORS_TSL2550 is not set
774# CONFIG_I2C_DEBUG_CORE is not set
775# CONFIG_I2C_DEBUG_ALGO is not set
776# CONFIG_I2C_DEBUG_BUS is not set
777# CONFIG_I2C_DEBUG_CHIP is not set
778# CONFIG_SPI is not set
779CONFIG_ARCH_REQUIRE_GPIOLIB=y
780CONFIG_GPIOLIB=y
781# CONFIG_DEBUG_GPIO is not set
782# CONFIG_GPIO_SYSFS is not set
783
784#
785# I2C GPIO expanders:
786#
787# CONFIG_GPIO_MAX732X is not set
788CONFIG_GPIO_PCA953X=y
789# CONFIG_GPIO_PCF857X is not set
790
791#
792# PCI GPIO expanders:
793#
794
795#
796# SPI GPIO expanders:
797#
798# CONFIG_W1 is not set
799# CONFIG_POWER_SUPPLY is not set
800# CONFIG_HWMON is not set
801# CONFIG_WATCHDOG is not set
802
803#
804# Sonics Silicon Backplane
805#
806CONFIG_SSB_POSSIBLE=y
807# CONFIG_SSB is not set
808
809#
810# Multifunction device drivers
811#
812# CONFIG_MFD_CORE is not set
813# CONFIG_MFD_SM501 is not set
814# CONFIG_HTC_EGPIO is not set
815# CONFIG_HTC_PASIC3 is not set
816# CONFIG_MFD_TMIO is not set
817# CONFIG_MFD_T7L66XB is not set
818# CONFIG_MFD_TC6387XB is not set
819# CONFIG_MFD_TC6393XB is not set
820
821#
822# Multimedia devices
823#
824
825#
826# Multimedia core support
827#
828# CONFIG_VIDEO_DEV is not set
829# CONFIG_DVB_CORE is not set
830# CONFIG_VIDEO_MEDIA is not set
831
832#
833# Multimedia drivers
834#
835# CONFIG_DAB is not set
836
837#
838# Graphics support
839#
840# CONFIG_VGASTATE is not set
841# CONFIG_VIDEO_OUTPUT_CONTROL is not set
842CONFIG_FB=y
843# CONFIG_FIRMWARE_EDID is not set
844# CONFIG_FB_DDC is not set
845CONFIG_FB_CFB_FILLRECT=y
846CONFIG_FB_CFB_COPYAREA=y
847CONFIG_FB_CFB_IMAGEBLIT=y
848# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
849# CONFIG_FB_SYS_FILLRECT is not set
850# CONFIG_FB_SYS_COPYAREA is not set
851# CONFIG_FB_SYS_IMAGEBLIT is not set
852# CONFIG_FB_FOREIGN_ENDIAN is not set
853# CONFIG_FB_SYS_FOPS is not set
854# CONFIG_FB_SVGALIB is not set
855# CONFIG_FB_MACMODES is not set
856# CONFIG_FB_BACKLIGHT is not set
857# CONFIG_FB_MODE_HELPERS is not set
858# CONFIG_FB_TILEBLITTING is not set
859
860#
861# Frame buffer hardware drivers
862#
863# CONFIG_FB_S1D13XXX is not set
864CONFIG_FB_PXA=y
865# CONFIG_FB_PXA_SMARTPANEL is not set
866# CONFIG_FB_PXA_PARAMETERS is not set
867# CONFIG_FB_MBX is not set
868# CONFIG_FB_W100 is not set
869# CONFIG_FB_AM200EPD is not set
870# CONFIG_FB_VIRTUAL is not set
871# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
872
873#
874# Display device support
875#
876# CONFIG_DISPLAY_SUPPORT is not set
877
878#
879# Console display driver support
880#
881# CONFIG_VGA_CONSOLE is not set
882CONFIG_DUMMY_CONSOLE=y
883CONFIG_FRAMEBUFFER_CONSOLE=y
884CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
885# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
886CONFIG_FONTS=y
887# CONFIG_FONT_8x8 is not set
888# CONFIG_FONT_8x16 is not set
889CONFIG_FONT_6x11=y
890# CONFIG_FONT_7x14 is not set
891# CONFIG_FONT_PEARL_8x8 is not set
892# CONFIG_FONT_ACORN_8x8 is not set
893# CONFIG_FONT_MINI_4x6 is not set
894# CONFIG_FONT_SUN8x16 is not set
895# CONFIG_FONT_SUN12x22 is not set
896# CONFIG_FONT_10x18 is not set
897CONFIG_LOGO=y
898CONFIG_LOGO_LINUX_MONO=y
899CONFIG_LOGO_LINUX_VGA16=y
900CONFIG_LOGO_LINUX_CLUT224=y
901CONFIG_SOUND=m
902CONFIG_SND=m
903CONFIG_SND_TIMER=m
904CONFIG_SND_PCM=m
905# CONFIG_SND_SEQUENCER is not set
906# CONFIG_SND_MIXER_OSS is not set
907# CONFIG_SND_PCM_OSS is not set
908# CONFIG_SND_DYNAMIC_MINORS is not set
909CONFIG_SND_SUPPORT_OLD_API=y
910CONFIG_SND_VERBOSE_PROCFS=y
911# CONFIG_SND_VERBOSE_PRINTK is not set
912# CONFIG_SND_DEBUG is not set
913CONFIG_SND_DRIVERS=y
914# CONFIG_SND_DUMMY is not set
915# CONFIG_SND_MTPAV is not set
916# CONFIG_SND_SERIAL_U16550 is not set
917# CONFIG_SND_MPU401 is not set
918CONFIG_SND_ARM=y
919# CONFIG_SND_PXA2XX_AC97 is not set
920CONFIG_SND_USB=y
921# CONFIG_SND_USB_AUDIO is not set
922# CONFIG_SND_USB_CAIAQ is not set
923CONFIG_SND_SOC=m
924CONFIG_SND_PXA2XX_SOC=m
925# CONFIG_SOUND_PRIME is not set
926CONFIG_HID_SUPPORT=y
927CONFIG_HID=y
928CONFIG_HID_DEBUG=y
929# CONFIG_HIDRAW is not set
930
931#
932# USB Input Devices
933#
934CONFIG_USB_HID=y
935# CONFIG_USB_HIDINPUT_POWERBOOK is not set
936# CONFIG_HID_FF is not set
937# CONFIG_USB_HIDDEV is not set
938CONFIG_USB_SUPPORT=y
939CONFIG_USB_ARCH_HAS_HCD=y
940CONFIG_USB_ARCH_HAS_OHCI=y
941# CONFIG_USB_ARCH_HAS_EHCI is not set
942CONFIG_USB=y
943# CONFIG_USB_DEBUG is not set
944# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
945
946#
947# Miscellaneous USB options
948#
949CONFIG_USB_DEVICEFS=y
950# CONFIG_USB_DEVICE_CLASS is not set
951# CONFIG_USB_DYNAMIC_MINORS is not set
952# CONFIG_USB_SUSPEND is not set
953# CONFIG_USB_OTG is not set
954CONFIG_USB_MON=y
955
956#
957# USB Host Controller Drivers
958#
959# CONFIG_USB_C67X00_HCD is not set
960# CONFIG_USB_ISP116X_HCD is not set
961# CONFIG_USB_ISP1760_HCD is not set
962CONFIG_USB_OHCI_HCD=y
963# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
964# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
965CONFIG_USB_OHCI_LITTLE_ENDIAN=y
966# CONFIG_USB_SL811_HCD is not set
967# CONFIG_USB_R8A66597_HCD is not set
968# CONFIG_USB_MUSB_HDRC is not set
969
970#
971# USB Device Class drivers
972#
973# CONFIG_USB_ACM is not set
974# CONFIG_USB_PRINTER is not set
975# CONFIG_USB_WDM is not set
976
977#
978# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
979#
980
981#
982# may also be needed; see USB_STORAGE Help for more information
983#
984CONFIG_USB_STORAGE=y
985# CONFIG_USB_STORAGE_DEBUG is not set
986# CONFIG_USB_STORAGE_DATAFAB is not set
987# CONFIG_USB_STORAGE_FREECOM is not set
988# CONFIG_USB_STORAGE_ISD200 is not set
989# CONFIG_USB_STORAGE_DPCM is not set
990# CONFIG_USB_STORAGE_USBAT is not set
991# CONFIG_USB_STORAGE_SDDR09 is not set
992# CONFIG_USB_STORAGE_SDDR55 is not set
993# CONFIG_USB_STORAGE_JUMPSHOT is not set
994# CONFIG_USB_STORAGE_ALAUDA is not set
995# CONFIG_USB_STORAGE_ONETOUCH is not set
996# CONFIG_USB_STORAGE_KARMA is not set
997# CONFIG_USB_STORAGE_SIERRA is not set
998# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
999# CONFIG_USB_LIBUSUAL is not set
1000
1001#
1002# USB Imaging devices
1003#
1004# CONFIG_USB_MDC800 is not set
1005# CONFIG_USB_MICROTEK is not set
1006
1007#
1008# USB port drivers
1009#
1010# CONFIG_USB_SERIAL is not set
1011
1012#
1013# USB Miscellaneous drivers
1014#
1015# CONFIG_USB_EMI62 is not set
1016# CONFIG_USB_EMI26 is not set
1017# CONFIG_USB_ADUTUX is not set
1018# CONFIG_USB_RIO500 is not set
1019# CONFIG_USB_LEGOTOWER is not set
1020# CONFIG_USB_LCD is not set
1021# CONFIG_USB_BERRY_CHARGE is not set
1022# CONFIG_USB_LED is not set
1023# CONFIG_USB_CYPRESS_CY7C63 is not set
1024# CONFIG_USB_CYTHERM is not set
1025# CONFIG_USB_PHIDGET is not set
1026# CONFIG_USB_IDMOUSE is not set
1027# CONFIG_USB_FTDI_ELAN is not set
1028# CONFIG_USB_APPLEDISPLAY is not set
1029# CONFIG_USB_LD is not set
1030# CONFIG_USB_TRANCEVIBRATOR is not set
1031# CONFIG_USB_IOWARRIOR is not set
1032# CONFIG_USB_TEST is not set
1033# CONFIG_USB_ISIGHTFW is not set
1034# CONFIG_USB_GADGET is not set
1035CONFIG_MMC=m
1036# CONFIG_MMC_DEBUG is not set
1037# CONFIG_MMC_UNSAFE_RESUME is not set
1038
1039#
1040# MMC/SD Card Drivers
1041#
1042CONFIG_MMC_BLOCK=m
1043CONFIG_MMC_BLOCK_BOUNCE=y
1044# CONFIG_SDIO_UART is not set
1045# CONFIG_MMC_TEST is not set
1046
1047#
1048# MMC/SD Host Controller Drivers
1049#
1050CONFIG_MMC_PXA=m
1051# CONFIG_MMC_SDHCI is not set
1052CONFIG_NEW_LEDS=y
1053CONFIG_LEDS_CLASS=y
1054
1055#
1056# LED drivers
1057#
1058# CONFIG_LEDS_PCA9532 is not set
1059CONFIG_LEDS_GPIO=y
1060# CONFIG_LEDS_PCA955X is not set
1061
1062#
1063# LED Triggers
1064#
1065CONFIG_LEDS_TRIGGERS=y
1066# CONFIG_LEDS_TRIGGER_TIMER is not set
1067CONFIG_LEDS_TRIGGER_HEARTBEAT=y
1068# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set
1069CONFIG_RTC_LIB=y
1070CONFIG_RTC_CLASS=y
1071CONFIG_RTC_HCTOSYS=y
1072CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
1073# CONFIG_RTC_DEBUG is not set
1074
1075#
1076# RTC interfaces
1077#
1078CONFIG_RTC_INTF_SYSFS=y
1079CONFIG_RTC_INTF_PROC=y
1080CONFIG_RTC_INTF_DEV=y
1081# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1082# CONFIG_RTC_DRV_TEST is not set
1083
1084#
1085# I2C RTC drivers
1086#
1087# CONFIG_RTC_DRV_DS1307 is not set
1088# CONFIG_RTC_DRV_DS1374 is not set
1089# CONFIG_RTC_DRV_DS1672 is not set
1090# CONFIG_RTC_DRV_MAX6900 is not set
1091# CONFIG_RTC_DRV_RS5C372 is not set
1092# CONFIG_RTC_DRV_ISL1208 is not set
1093# CONFIG_RTC_DRV_X1205 is not set
1094# CONFIG_RTC_DRV_PCF8563 is not set
1095# CONFIG_RTC_DRV_PCF8583 is not set
1096# CONFIG_RTC_DRV_M41T80 is not set
1097# CONFIG_RTC_DRV_S35390A is not set
1098# CONFIG_RTC_DRV_FM3130 is not set
1099
1100#
1101# SPI RTC drivers
1102#
1103
1104#
1105# Platform RTC drivers
1106#
1107# CONFIG_RTC_DRV_CMOS is not set
1108# CONFIG_RTC_DRV_DS1511 is not set
1109# CONFIG_RTC_DRV_DS1553 is not set
1110# CONFIG_RTC_DRV_DS1742 is not set
1111# CONFIG_RTC_DRV_STK17TA8 is not set
1112# CONFIG_RTC_DRV_M48T86 is not set
1113# CONFIG_RTC_DRV_M48T59 is not set
1114# CONFIG_RTC_DRV_V3020 is not set
1115
1116#
1117# on-CPU RTC drivers
1118#
1119CONFIG_RTC_DRV_SA1100=y
1120# CONFIG_DMADEVICES is not set
1121
1122#
1123# Voltage and Current regulators
1124#
1125# CONFIG_REGULATOR is not set
1126# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
1127# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
1128# CONFIG_REGULATOR_BQ24022 is not set
1129# CONFIG_UIO is not set
1130
1131#
1132# File systems
1133#
1134CONFIG_EXT2_FS=y
1135# CONFIG_EXT2_FS_XATTR is not set
1136# CONFIG_EXT2_FS_XIP is not set
1137CONFIG_EXT3_FS=y
1138# CONFIG_EXT3_FS_XATTR is not set
1139# CONFIG_EXT4DEV_FS is not set
1140CONFIG_JBD=y
1141# CONFIG_JBD_DEBUG is not set
1142# CONFIG_REISERFS_FS is not set
1143# CONFIG_JFS_FS is not set
1144CONFIG_FS_POSIX_ACL=y
1145# CONFIG_XFS_FS is not set
1146# CONFIG_OCFS2_FS is not set
1147CONFIG_DNOTIFY=y
1148CONFIG_INOTIFY=y
1149CONFIG_INOTIFY_USER=y
1150# CONFIG_QUOTA is not set
1151# CONFIG_AUTOFS_FS is not set
1152# CONFIG_AUTOFS4_FS is not set
1153# CONFIG_FUSE_FS is not set
1154
1155#
1156# CD-ROM/DVD Filesystems
1157#
1158# CONFIG_ISO9660_FS is not set
1159# CONFIG_UDF_FS is not set
1160
1161#
1162# DOS/FAT/NT Filesystems
1163#
1164CONFIG_FAT_FS=m
1165CONFIG_MSDOS_FS=m
1166CONFIG_VFAT_FS=m
1167CONFIG_FAT_DEFAULT_CODEPAGE=437
1168CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1169# CONFIG_NTFS_FS is not set
1170
1171#
1172# Pseudo filesystems
1173#
1174CONFIG_PROC_FS=y
1175CONFIG_PROC_SYSCTL=y
1176CONFIG_SYSFS=y
1177CONFIG_TMPFS=y
1178# CONFIG_TMPFS_POSIX_ACL is not set
1179# CONFIG_HUGETLB_PAGE is not set
1180# CONFIG_CONFIGFS_FS is not set
1181
1182#
1183# Miscellaneous filesystems
1184#
1185# CONFIG_ADFS_FS is not set
1186# CONFIG_AFFS_FS is not set
1187# CONFIG_HFS_FS is not set
1188# CONFIG_HFSPLUS_FS is not set
1189# CONFIG_BEFS_FS is not set
1190# CONFIG_BFS_FS is not set
1191# CONFIG_EFS_FS is not set
1192CONFIG_JFFS2_FS=y
1193CONFIG_JFFS2_FS_DEBUG=0
1194CONFIG_JFFS2_FS_WRITEBUFFER=y
1195# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
1196CONFIG_JFFS2_SUMMARY=y
1197# CONFIG_JFFS2_FS_XATTR is not set
1198# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
1199CONFIG_JFFS2_ZLIB=y
1200# CONFIG_JFFS2_LZO is not set
1201CONFIG_JFFS2_RTIME=y
1202# CONFIG_JFFS2_RUBIN is not set
1203# CONFIG_CRAMFS is not set
1204# CONFIG_VXFS_FS is not set
1205# CONFIG_MINIX_FS is not set
1206# CONFIG_OMFS_FS is not set
1207# CONFIG_HPFS_FS is not set
1208# CONFIG_QNX4FS_FS is not set
1209# CONFIG_ROMFS_FS is not set
1210# CONFIG_SYSV_FS is not set
1211# CONFIG_UFS_FS is not set
1212CONFIG_NETWORK_FILESYSTEMS=y
1213CONFIG_NFS_FS=y
1214CONFIG_NFS_V3=y
1215CONFIG_NFS_V3_ACL=y
1216CONFIG_NFS_V4=y
1217CONFIG_ROOT_NFS=y
1218# CONFIG_NFSD is not set
1219CONFIG_LOCKD=y
1220CONFIG_LOCKD_V4=y
1221CONFIG_NFS_ACL_SUPPORT=y
1222CONFIG_NFS_COMMON=y
1223CONFIG_SUNRPC=y
1224CONFIG_SUNRPC_GSS=y
1225CONFIG_RPCSEC_GSS_KRB5=y
1226# CONFIG_RPCSEC_GSS_SPKM3 is not set
1227CONFIG_SMB_FS=m
1228# CONFIG_SMB_NLS_DEFAULT is not set
1229CONFIG_CIFS=m
1230# CONFIG_CIFS_STATS is not set
1231CONFIG_CIFS_WEAK_PW_HASH=y
1232# CONFIG_CIFS_XATTR is not set
1233# CONFIG_CIFS_DEBUG2 is not set
1234# CONFIG_CIFS_EXPERIMENTAL is not set
1235# CONFIG_NCP_FS is not set
1236# CONFIG_CODA_FS is not set
1237# CONFIG_AFS_FS is not set
1238
1239#
1240# Partition Types
1241#
1242CONFIG_PARTITION_ADVANCED=y
1243# CONFIG_ACORN_PARTITION is not set
1244# CONFIG_OSF_PARTITION is not set
1245# CONFIG_AMIGA_PARTITION is not set
1246# CONFIG_ATARI_PARTITION is not set
1247# CONFIG_MAC_PARTITION is not set
1248CONFIG_MSDOS_PARTITION=y
1249# CONFIG_BSD_DISKLABEL is not set
1250# CONFIG_MINIX_SUBPARTITION is not set
1251# CONFIG_SOLARIS_X86_PARTITION is not set
1252# CONFIG_UNIXWARE_DISKLABEL is not set
1253# CONFIG_LDM_PARTITION is not set
1254# CONFIG_SGI_PARTITION is not set
1255# CONFIG_ULTRIX_PARTITION is not set
1256# CONFIG_SUN_PARTITION is not set
1257# CONFIG_KARMA_PARTITION is not set
1258# CONFIG_EFI_PARTITION is not set
1259# CONFIG_SYSV68_PARTITION is not set
1260CONFIG_NLS=m
1261CONFIG_NLS_DEFAULT="iso8859-1"
1262CONFIG_NLS_CODEPAGE_437=m
1263# CONFIG_NLS_CODEPAGE_737 is not set
1264# CONFIG_NLS_CODEPAGE_775 is not set
1265# CONFIG_NLS_CODEPAGE_850 is not set
1266# CONFIG_NLS_CODEPAGE_852 is not set
1267# CONFIG_NLS_CODEPAGE_855 is not set
1268# CONFIG_NLS_CODEPAGE_857 is not set
1269# CONFIG_NLS_CODEPAGE_860 is not set
1270# CONFIG_NLS_CODEPAGE_861 is not set
1271# CONFIG_NLS_CODEPAGE_862 is not set
1272# CONFIG_NLS_CODEPAGE_863 is not set
1273# CONFIG_NLS_CODEPAGE_864 is not set
1274# CONFIG_NLS_CODEPAGE_865 is not set
1275# CONFIG_NLS_CODEPAGE_866 is not set
1276# CONFIG_NLS_CODEPAGE_869 is not set
1277# CONFIG_NLS_CODEPAGE_936 is not set
1278# CONFIG_NLS_CODEPAGE_950 is not set
1279# CONFIG_NLS_CODEPAGE_932 is not set
1280# CONFIG_NLS_CODEPAGE_949 is not set
1281# CONFIG_NLS_CODEPAGE_874 is not set
1282# CONFIG_NLS_ISO8859_8 is not set
1283# CONFIG_NLS_CODEPAGE_1250 is not set
1284# CONFIG_NLS_CODEPAGE_1251 is not set
1285# CONFIG_NLS_ASCII is not set
1286CONFIG_NLS_ISO8859_1=m
1287# CONFIG_NLS_ISO8859_2 is not set
1288# CONFIG_NLS_ISO8859_3 is not set
1289# CONFIG_NLS_ISO8859_4 is not set
1290# CONFIG_NLS_ISO8859_5 is not set
1291# CONFIG_NLS_ISO8859_6 is not set
1292# CONFIG_NLS_ISO8859_7 is not set
1293# CONFIG_NLS_ISO8859_9 is not set
1294# CONFIG_NLS_ISO8859_13 is not set
1295# CONFIG_NLS_ISO8859_14 is not set
1296# CONFIG_NLS_ISO8859_15 is not set
1297# CONFIG_NLS_KOI8_R is not set
1298# CONFIG_NLS_KOI8_U is not set
1299# CONFIG_NLS_UTF8 is not set
1300# CONFIG_DLM is not set
1301
1302#
1303# Kernel hacking
1304#
1305# CONFIG_PRINTK_TIME is not set
1306CONFIG_ENABLE_WARN_DEPRECATED=y
1307CONFIG_ENABLE_MUST_CHECK=y
1308CONFIG_FRAME_WARN=1024
1309# CONFIG_MAGIC_SYSRQ is not set
1310# CONFIG_UNUSED_SYMBOLS is not set
1311CONFIG_DEBUG_FS=y
1312# CONFIG_HEADERS_CHECK is not set
1313CONFIG_DEBUG_KERNEL=y
1314# CONFIG_DEBUG_SHIRQ is not set
1315# CONFIG_DETECT_SOFTLOCKUP is not set
1316# CONFIG_SCHED_DEBUG is not set
1317# CONFIG_SCHEDSTATS is not set
1318# CONFIG_TIMER_STATS is not set
1319# CONFIG_DEBUG_OBJECTS is not set
1320# CONFIG_SLUB_DEBUG_ON is not set
1321# CONFIG_SLUB_STATS is not set
1322# CONFIG_DEBUG_RT_MUTEXES is not set
1323# CONFIG_RT_MUTEX_TESTER is not set
1324# CONFIG_DEBUG_SPINLOCK is not set
1325# CONFIG_DEBUG_MUTEXES is not set
1326# CONFIG_DEBUG_LOCK_ALLOC is not set
1327# CONFIG_PROVE_LOCKING is not set
1328# CONFIG_LOCK_STAT is not set
1329# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1330# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1331# CONFIG_DEBUG_KOBJECT is not set
1332CONFIG_DEBUG_BUGVERBOSE=y
1333# CONFIG_DEBUG_INFO is not set
1334# CONFIG_DEBUG_VM is not set
1335# CONFIG_DEBUG_WRITECOUNT is not set
1336CONFIG_DEBUG_MEMORY_INIT=y
1337# CONFIG_DEBUG_LIST is not set
1338# CONFIG_DEBUG_SG is not set
1339CONFIG_FRAME_POINTER=y
1340# CONFIG_BOOT_PRINTK_DELAY is not set
1341# CONFIG_RCU_TORTURE_TEST is not set
1342# CONFIG_BACKTRACE_SELF_TEST is not set
1343# CONFIG_FAULT_INJECTION is not set
1344# CONFIG_LATENCYTOP is not set
1345CONFIG_SYSCTL_SYSCALL_CHECK=y
1346CONFIG_HAVE_FTRACE=y
1347CONFIG_HAVE_DYNAMIC_FTRACE=y
1348# CONFIG_FTRACE is not set
1349# CONFIG_IRQSOFF_TRACER is not set
1350# CONFIG_SCHED_TRACER is not set
1351# CONFIG_CONTEXT_SWITCH_TRACER is not set
1352# CONFIG_SAMPLES is not set
1353CONFIG_HAVE_ARCH_KGDB=y
1354# CONFIG_KGDB is not set
1355CONFIG_DEBUG_USER=y
1356# CONFIG_DEBUG_ERRORS is not set
1357# CONFIG_DEBUG_STACK_USAGE is not set
1358CONFIG_DEBUG_LL=y
1359# CONFIG_DEBUG_ICEDCC is not set
1360
1361#
1362# Security options
1363#
1364# CONFIG_KEYS is not set
1365# CONFIG_SECURITY is not set
1366# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1367CONFIG_CRYPTO=y
1368
1369#
1370# Crypto core or helper
1371#
1372CONFIG_CRYPTO_ALGAPI=y
1373CONFIG_CRYPTO_BLKCIPHER=y
1374CONFIG_CRYPTO_MANAGER=y
1375# CONFIG_CRYPTO_GF128MUL is not set
1376# CONFIG_CRYPTO_NULL is not set
1377# CONFIG_CRYPTO_CRYPTD is not set
1378# CONFIG_CRYPTO_AUTHENC is not set
1379# CONFIG_CRYPTO_TEST is not set
1380
1381#
1382# Authenticated Encryption with Associated Data
1383#
1384# CONFIG_CRYPTO_CCM is not set
1385# CONFIG_CRYPTO_GCM is not set
1386# CONFIG_CRYPTO_SEQIV is not set
1387
1388#
1389# Block modes
1390#
1391CONFIG_CRYPTO_CBC=y
1392# CONFIG_CRYPTO_CTR is not set
1393# CONFIG_CRYPTO_CTS is not set
1394CONFIG_CRYPTO_ECB=m
1395# CONFIG_CRYPTO_LRW is not set
1396# CONFIG_CRYPTO_PCBC is not set
1397# CONFIG_CRYPTO_XTS is not set
1398
1399#
1400# Hash modes
1401#
1402# CONFIG_CRYPTO_HMAC is not set
1403# CONFIG_CRYPTO_XCBC is not set
1404
1405#
1406# Digest
1407#
1408# CONFIG_CRYPTO_CRC32C is not set
1409# CONFIG_CRYPTO_MD4 is not set
1410CONFIG_CRYPTO_MD5=y
1411CONFIG_CRYPTO_MICHAEL_MIC=m
1412# CONFIG_CRYPTO_RMD128 is not set
1413# CONFIG_CRYPTO_RMD160 is not set
1414# CONFIG_CRYPTO_RMD256 is not set
1415# CONFIG_CRYPTO_RMD320 is not set
1416# CONFIG_CRYPTO_SHA1 is not set
1417# CONFIG_CRYPTO_SHA256 is not set
1418# CONFIG_CRYPTO_SHA512 is not set
1419# CONFIG_CRYPTO_TGR192 is not set
1420# CONFIG_CRYPTO_WP512 is not set
1421
1422#
1423# Ciphers
1424#
1425CONFIG_CRYPTO_AES=m
1426# CONFIG_CRYPTO_ANUBIS is not set
1427CONFIG_CRYPTO_ARC4=m
1428# CONFIG_CRYPTO_BLOWFISH is not set
1429# CONFIG_CRYPTO_CAMELLIA is not set
1430# CONFIG_CRYPTO_CAST5 is not set
1431# CONFIG_CRYPTO_CAST6 is not set
1432CONFIG_CRYPTO_DES=y
1433# CONFIG_CRYPTO_FCRYPT is not set
1434# CONFIG_CRYPTO_KHAZAD is not set
1435# CONFIG_CRYPTO_SALSA20 is not set
1436# CONFIG_CRYPTO_SEED is not set
1437# CONFIG_CRYPTO_SERPENT is not set
1438# CONFIG_CRYPTO_TEA is not set
1439# CONFIG_CRYPTO_TWOFISH is not set
1440
1441#
1442# Compression
1443#
1444# CONFIG_CRYPTO_DEFLATE is not set
1445# CONFIG_CRYPTO_LZO is not set
1446# CONFIG_CRYPTO_HW is not set
1447
1448#
1449# Library routines
1450#
1451CONFIG_BITREVERSE=y
1452# CONFIG_GENERIC_FIND_FIRST_BIT is not set
1453# CONFIG_GENERIC_FIND_NEXT_BIT is not set
1454# CONFIG_CRC_CCITT is not set
1455# CONFIG_CRC16 is not set
1456CONFIG_CRC_T10DIF=y
1457# CONFIG_CRC_ITU_T is not set
1458CONFIG_CRC32=y
1459# CONFIG_CRC7 is not set
1460# CONFIG_LIBCRC32C is not set
1461CONFIG_ZLIB_INFLATE=y
1462CONFIG_ZLIB_DEFLATE=y
1463CONFIG_PLIST=y
1464CONFIG_HAS_IOMEM=y
1465CONFIG_HAS_IOPORT=y
1466CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/jornada720_defconfig b/arch/arm/configs/jornada720_defconfig
index 0c556289a3f4..81fadafae02d 100644
--- a/arch/arm/configs/jornada720_defconfig
+++ b/arch/arm/configs/jornada720_defconfig
@@ -1,84 +1,174 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.12-rc1-bk2 3# Linux kernel version: 2.6.27-rc6
4# Sun Mar 27 23:10:35 2005 4# Tue Sep 16 18:56:58 2008
5# 5#
6CONFIG_ARM=y 6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y
10CONFIG_GENERIC_CLOCKEVENTS=y
7CONFIG_MMU=y 11CONFIG_MMU=y
8CONFIG_UID16=y 12# CONFIG_NO_IOPORT is not set
13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_STACKTRACE_SUPPORT=y
15CONFIG_HAVE_LATENCYTOP_SUPPORT=y
16CONFIG_LOCKDEP_SUPPORT=y
17CONFIG_TRACE_IRQFLAGS_SUPPORT=y
18CONFIG_HARDIRQS_SW_RESEND=y
19CONFIG_GENERIC_IRQ_PROBE=y
9CONFIG_RWSEM_GENERIC_SPINLOCK=y 20CONFIG_RWSEM_GENERIC_SPINLOCK=y
21# CONFIG_ARCH_HAS_ILOG2_U32 is not set
22# CONFIG_ARCH_HAS_ILOG2_U64 is not set
23CONFIG_GENERIC_HWEIGHT=y
10CONFIG_GENERIC_CALIBRATE_DELAY=y 24CONFIG_GENERIC_CALIBRATE_DELAY=y
11CONFIG_GENERIC_IOMAP=y 25CONFIG_ARCH_SUPPORTS_AOUT=y
26CONFIG_ZONE_DMA=y
27CONFIG_ARCH_MTD_XIP=y
28CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
29CONFIG_VECTORS_BASE=0xffff0000
30CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
12 31
13# 32#
14# Code maturity level options 33# General setup
15# 34#
16CONFIG_EXPERIMENTAL=y 35CONFIG_EXPERIMENTAL=y
17CONFIG_CLEAN_COMPILE=y
18CONFIG_BROKEN_ON_SMP=y 36CONFIG_BROKEN_ON_SMP=y
19 37CONFIG_INIT_ENV_ARG_LIMIT=32
20#
21# General setup
22#
23CONFIG_LOCALVERSION="" 38CONFIG_LOCALVERSION=""
39CONFIG_LOCALVERSION_AUTO=y
24CONFIG_SWAP=y 40CONFIG_SWAP=y
25CONFIG_SYSVIPC=y 41CONFIG_SYSVIPC=y
42CONFIG_SYSVIPC_SYSCTL=y
26# CONFIG_POSIX_MQUEUE is not set 43# CONFIG_POSIX_MQUEUE is not set
27# CONFIG_BSD_PROCESS_ACCT is not set 44# CONFIG_BSD_PROCESS_ACCT is not set
28CONFIG_SYSCTL=y 45# CONFIG_TASKSTATS is not set
29# CONFIG_AUDIT is not set 46# CONFIG_AUDIT is not set
30CONFIG_HOTPLUG=y
31CONFIG_KOBJECT_UEVENT=y
32# CONFIG_IKCONFIG is not set 47# CONFIG_IKCONFIG is not set
48CONFIG_LOG_BUF_SHIFT=14
49# CONFIG_CGROUPS is not set
50# CONFIG_GROUP_SCHED is not set
51CONFIG_SYSFS_DEPRECATED=y
52CONFIG_SYSFS_DEPRECATED_V2=y
53# CONFIG_RELAY is not set
54CONFIG_NAMESPACES=y
55# CONFIG_UTS_NS is not set
56# CONFIG_IPC_NS is not set
57# CONFIG_USER_NS is not set
58# CONFIG_PID_NS is not set
59# CONFIG_BLK_DEV_INITRD is not set
60CONFIG_CC_OPTIMIZE_FOR_SIZE=y
61CONFIG_SYSCTL=y
33# CONFIG_EMBEDDED is not set 62# CONFIG_EMBEDDED is not set
63CONFIG_UID16=y
64CONFIG_SYSCTL_SYSCALL=y
34CONFIG_KALLSYMS=y 65CONFIG_KALLSYMS=y
35# CONFIG_KALLSYMS_ALL is not set 66# CONFIG_KALLSYMS_ALL is not set
36# CONFIG_KALLSYMS_EXTRA_PASS is not set 67# CONFIG_KALLSYMS_EXTRA_PASS is not set
68CONFIG_HOTPLUG=y
69CONFIG_PRINTK=y
70CONFIG_BUG=y
71CONFIG_ELF_CORE=y
72CONFIG_COMPAT_BRK=y
37CONFIG_BASE_FULL=y 73CONFIG_BASE_FULL=y
38CONFIG_FUTEX=y 74CONFIG_FUTEX=y
75CONFIG_ANON_INODES=y
39CONFIG_EPOLL=y 76CONFIG_EPOLL=y
40CONFIG_CC_OPTIMIZE_FOR_SIZE=y 77CONFIG_SIGNALFD=y
78CONFIG_TIMERFD=y
79CONFIG_EVENTFD=y
41CONFIG_SHMEM=y 80CONFIG_SHMEM=y
42CONFIG_CC_ALIGN_FUNCTIONS=0 81CONFIG_VM_EVENT_COUNTERS=y
43CONFIG_CC_ALIGN_LABELS=0 82CONFIG_SLUB_DEBUG=y
44CONFIG_CC_ALIGN_LOOPS=0 83# CONFIG_SLAB is not set
45CONFIG_CC_ALIGN_JUMPS=0 84CONFIG_SLUB=y
85# CONFIG_SLOB is not set
86# CONFIG_PROFILING is not set
87# CONFIG_MARKERS is not set
88CONFIG_HAVE_OPROFILE=y
89# CONFIG_KPROBES is not set
90# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
91# CONFIG_HAVE_IOREMAP_PROT is not set
92CONFIG_HAVE_KPROBES=y
93CONFIG_HAVE_KRETPROBES=y
94# CONFIG_HAVE_ARCH_TRACEHOOK is not set
95# CONFIG_HAVE_DMA_ATTRS is not set
96# CONFIG_USE_GENERIC_SMP_HELPERS is not set
97CONFIG_HAVE_CLK=y
98CONFIG_PROC_PAGE_MONITOR=y
99CONFIG_HAVE_GENERIC_DMA_COHERENT=y
100CONFIG_SLABINFO=y
101CONFIG_RT_MUTEXES=y
46# CONFIG_TINY_SHMEM is not set 102# CONFIG_TINY_SHMEM is not set
47CONFIG_BASE_SMALL=0 103CONFIG_BASE_SMALL=0
48
49#
50# Loadable module support
51#
52CONFIG_MODULES=y 104CONFIG_MODULES=y
105# CONFIG_MODULE_FORCE_LOAD is not set
53# CONFIG_MODULE_UNLOAD is not set 106# CONFIG_MODULE_UNLOAD is not set
54CONFIG_OBSOLETE_MODPARM=y
55# CONFIG_MODVERSIONS is not set 107# CONFIG_MODVERSIONS is not set
56# CONFIG_MODULE_SRCVERSION_ALL is not set 108# CONFIG_MODULE_SRCVERSION_ALL is not set
57CONFIG_KMOD=y 109CONFIG_KMOD=y
110CONFIG_BLOCK=y
111# CONFIG_LBD is not set
112# CONFIG_BLK_DEV_IO_TRACE is not set
113# CONFIG_LSF is not set
114# CONFIG_BLK_DEV_BSG is not set
115# CONFIG_BLK_DEV_INTEGRITY is not set
116
117#
118# IO Schedulers
119#
120CONFIG_IOSCHED_NOOP=y
121CONFIG_IOSCHED_AS=y
122CONFIG_IOSCHED_DEADLINE=y
123CONFIG_IOSCHED_CFQ=y
124# CONFIG_DEFAULT_AS is not set
125# CONFIG_DEFAULT_DEADLINE is not set
126CONFIG_DEFAULT_CFQ=y
127# CONFIG_DEFAULT_NOOP is not set
128CONFIG_DEFAULT_IOSCHED="cfq"
129CONFIG_CLASSIC_RCU=y
58 130
59# 131#
60# System Type 132# System Type
61# 133#
134# CONFIG_ARCH_AAEC2000 is not set
135# CONFIG_ARCH_INTEGRATOR is not set
136# CONFIG_ARCH_REALVIEW is not set
137# CONFIG_ARCH_VERSATILE is not set
138# CONFIG_ARCH_AT91 is not set
62# CONFIG_ARCH_CLPS7500 is not set 139# CONFIG_ARCH_CLPS7500 is not set
63# CONFIG_ARCH_CLPS711X is not set 140# CONFIG_ARCH_CLPS711X is not set
64# CONFIG_ARCH_CO285 is not set
65# CONFIG_ARCH_EBSA110 is not set 141# CONFIG_ARCH_EBSA110 is not set
142# CONFIG_ARCH_EP93XX is not set
66# CONFIG_ARCH_FOOTBRIDGE is not set 143# CONFIG_ARCH_FOOTBRIDGE is not set
67# CONFIG_ARCH_INTEGRATOR is not set 144# CONFIG_ARCH_NETX is not set
68# CONFIG_ARCH_IOP3XX is not set 145# CONFIG_ARCH_H720X is not set
69# CONFIG_ARCH_IXP4XX is not set 146# CONFIG_ARCH_IMX is not set
147# CONFIG_ARCH_IOP13XX is not set
148# CONFIG_ARCH_IOP32X is not set
149# CONFIG_ARCH_IOP33X is not set
150# CONFIG_ARCH_IXP23XX is not set
70# CONFIG_ARCH_IXP2000 is not set 151# CONFIG_ARCH_IXP2000 is not set
152# CONFIG_ARCH_IXP4XX is not set
71# CONFIG_ARCH_L7200 is not set 153# CONFIG_ARCH_L7200 is not set
154# CONFIG_ARCH_KIRKWOOD is not set
155# CONFIG_ARCH_KS8695 is not set
156# CONFIG_ARCH_NS9XXX is not set
157# CONFIG_ARCH_LOKI is not set
158# CONFIG_ARCH_MV78XX0 is not set
159# CONFIG_ARCH_MXC is not set
160# CONFIG_ARCH_ORION5X is not set
161# CONFIG_ARCH_PNX4008 is not set
72# CONFIG_ARCH_PXA is not set 162# CONFIG_ARCH_PXA is not set
73# CONFIG_ARCH_RPC is not set 163# CONFIG_ARCH_RPC is not set
74CONFIG_ARCH_SA1100=y 164CONFIG_ARCH_SA1100=y
75# CONFIG_ARCH_S3C2410 is not set 165# CONFIG_ARCH_S3C2410 is not set
76# CONFIG_ARCH_SHARK is not set 166# CONFIG_ARCH_SHARK is not set
77# CONFIG_ARCH_LH7A40X is not set 167# CONFIG_ARCH_LH7A40X is not set
168# CONFIG_ARCH_DAVINCI is not set
78# CONFIG_ARCH_OMAP is not set 169# CONFIG_ARCH_OMAP is not set
79# CONFIG_ARCH_VERSATILE is not set 170# CONFIG_ARCH_MSM7X00A is not set
80# CONFIG_ARCH_IMX is not set 171CONFIG_DMABOUNCE=y
81# CONFIG_ARCH_H720X is not set
82 172
83# 173#
84# SA11x0 Implementations 174# SA11x0 Implementations
@@ -91,12 +181,21 @@ CONFIG_ARCH_SA1100=y
91# CONFIG_SA1100_H3800 is not set 181# CONFIG_SA1100_H3800 is not set
92# CONFIG_SA1100_BADGE4 is not set 182# CONFIG_SA1100_BADGE4 is not set
93CONFIG_SA1100_JORNADA720=y 183CONFIG_SA1100_JORNADA720=y
184CONFIG_SA1100_JORNADA720_SSP=y
94# CONFIG_SA1100_HACKKIT is not set 185# CONFIG_SA1100_HACKKIT is not set
95# CONFIG_SA1100_LART is not set 186# CONFIG_SA1100_LART is not set
96# CONFIG_SA1100_PLEB is not set 187# CONFIG_SA1100_PLEB is not set
97# CONFIG_SA1100_SHANNON is not set 188# CONFIG_SA1100_SHANNON is not set
98# CONFIG_SA1100_SIMPAD is not set 189# CONFIG_SA1100_SIMPAD is not set
99# CONFIG_SA1100_SSP is not set 190CONFIG_SA1100_SSP=y
191
192#
193# Boot options
194#
195
196#
197# Power management
198#
100 199
101# 200#
102# Processor Type 201# Processor Type
@@ -105,44 +204,71 @@ CONFIG_CPU_32=y
105CONFIG_CPU_SA1100=y 204CONFIG_CPU_SA1100=y
106CONFIG_CPU_32v4=y 205CONFIG_CPU_32v4=y
107CONFIG_CPU_ABRT_EV4=y 206CONFIG_CPU_ABRT_EV4=y
207CONFIG_CPU_PABRT_NOIFAR=y
108CONFIG_CPU_CACHE_V4WB=y 208CONFIG_CPU_CACHE_V4WB=y
109CONFIG_CPU_CACHE_VIVT=y 209CONFIG_CPU_CACHE_VIVT=y
110CONFIG_CPU_TLB_V4WB=y 210CONFIG_CPU_TLB_V4WB=y
111CONFIG_CPU_MINICACHE=y 211CONFIG_CPU_CP15=y
212CONFIG_CPU_CP15_MMU=y
112 213
113# 214#
114# Processor Features 215# Processor Features
115# 216#
217# CONFIG_CPU_ICACHE_DISABLE is not set
218# CONFIG_CPU_DCACHE_DISABLE is not set
219# CONFIG_OUTER_CACHE is not set
116CONFIG_SA1111=y 220CONFIG_SA1111=y
117CONFIG_DMABOUNCE=y
118CONFIG_FORCE_MAX_ZONEORDER=9 221CONFIG_FORCE_MAX_ZONEORDER=9
119 222
120# 223#
121# Bus support 224# Bus support
122# 225#
123CONFIG_ISA=y 226CONFIG_ISA=y
124 227# CONFIG_PCI_SYSCALL is not set
125# 228# CONFIG_ARCH_SUPPORTS_MSI is not set
126# PCCARD (PCMCIA/CardBus) support
127#
128CONFIG_PCCARD=y 229CONFIG_PCCARD=y
129# CONFIG_PCMCIA_DEBUG is not set 230# CONFIG_PCMCIA_DEBUG is not set
130CONFIG_PCMCIA=y 231CONFIG_PCMCIA=y
232CONFIG_PCMCIA_LOAD_CIS=y
233CONFIG_PCMCIA_IOCTL=y
131 234
132# 235#
133# PC-card bridges 236# PC-card bridges
134# 237#
135CONFIG_I82365=y 238# CONFIG_I82365 is not set
136# CONFIG_TCIC is not set 239# CONFIG_TCIC is not set
137CONFIG_PCMCIA_SA1100=y 240CONFIG_PCMCIA_SA1100=y
138# CONFIG_PCMCIA_SA1111 is not set 241# CONFIG_PCMCIA_SA1111 is not set
139CONFIG_PCCARD_NONSTATIC=y
140 242
141# 243#
142# Kernel Features 244# Kernel Features
143# 245#
246CONFIG_TICK_ONESHOT=y
247# CONFIG_NO_HZ is not set
248# CONFIG_HIGH_RES_TIMERS is not set
249CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
144# CONFIG_PREEMPT is not set 250# CONFIG_PREEMPT is not set
251CONFIG_HZ=100
252# CONFIG_AEABI is not set
253CONFIG_ARCH_DISCONTIGMEM_ENABLE=y
254CONFIG_ARCH_SPARSEMEM_ENABLE=y
255CONFIG_ARCH_SELECT_MEMORY_MODEL=y
256CONFIG_NODES_SHIFT=2
257CONFIG_SELECT_MEMORY_MODEL=y
258# CONFIG_FLATMEM_MANUAL is not set
259CONFIG_DISCONTIGMEM_MANUAL=y
260# CONFIG_SPARSEMEM_MANUAL is not set
145CONFIG_DISCONTIGMEM=y 261CONFIG_DISCONTIGMEM=y
262CONFIG_FLAT_NODE_MEM_MAP=y
263CONFIG_NEED_MULTIPLE_NODES=y
264# CONFIG_SPARSEMEM_STATIC is not set
265# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
266CONFIG_PAGEFLAGS_EXTENDED=y
267CONFIG_SPLIT_PTLOCK_CPUS=4096
268# CONFIG_RESOURCES_64BIT is not set
269CONFIG_ZONE_DMA_FLAG=1
270CONFIG_BOUNCE=y
271CONFIG_VIRT_TO_BUS=y
146# CONFIG_LEDS is not set 272# CONFIG_LEDS is not set
147CONFIG_ALIGNMENT_TRAP=y 273CONFIG_ALIGNMENT_TRAP=y
148 274
@@ -151,8 +277,9 @@ CONFIG_ALIGNMENT_TRAP=y
151# 277#
152CONFIG_ZBOOT_ROM_TEXT=0x0 278CONFIG_ZBOOT_ROM_TEXT=0x0
153CONFIG_ZBOOT_ROM_BSS=0x0 279CONFIG_ZBOOT_ROM_BSS=0x0
154CONFIG_CMDLINE="keepinitrd mem=32M" 280CONFIG_CMDLINE=""
155# CONFIG_XIP_KERNEL is not set 281# CONFIG_XIP_KERNEL is not set
282# CONFIG_KEXEC is not set
156 283
157# 284#
158# CPU Frequency scaling 285# CPU Frequency scaling
@@ -174,7 +301,7 @@ CONFIG_FPE_FASTFPE=y
174# Userspace binary formats 301# Userspace binary formats
175# 302#
176CONFIG_BINFMT_ELF=y 303CONFIG_BINFMT_ELF=y
177CONFIG_BINFMT_AOUT=m 304CONFIG_BINFMT_AOUT=y
178# CONFIG_BINFMT_MISC is not set 305# CONFIG_BINFMT_MISC is not set
179# CONFIG_ARTHUR is not set 306# CONFIG_ARTHUR is not set
180 307
@@ -182,188 +309,12 @@ CONFIG_BINFMT_AOUT=m
182# Power management options 309# Power management options
183# 310#
184CONFIG_PM=y 311CONFIG_PM=y
185# CONFIG_PM_LEGACY is not set 312# CONFIG_PM_DEBUG is not set
186# CONFIG_APM is not set 313CONFIG_PM_SLEEP=y
187 314CONFIG_SUSPEND=y
188# 315CONFIG_SUSPEND_FREEZER=y
189# Device Drivers 316# CONFIG_APM_EMULATION is not set
190# 317CONFIG_ARCH_SUSPEND_POSSIBLE=y
191
192#
193# Generic Driver Options
194#
195CONFIG_STANDALONE=y
196CONFIG_PREVENT_FIRMWARE_BUILD=y
197# CONFIG_FW_LOADER is not set
198# CONFIG_DEBUG_DRIVER is not set
199
200#
201# Memory Technology Devices (MTD)
202#
203CONFIG_MTD=y
204CONFIG_MTD_DEBUG=y
205CONFIG_MTD_DEBUG_VERBOSE=1
206# CONFIG_MTD_CONCAT is not set
207CONFIG_MTD_PARTITIONS=y
208# CONFIG_MTD_REDBOOT_PARTS is not set
209# CONFIG_MTD_CMDLINE_PARTS is not set
210# CONFIG_MTD_AFS_PARTS is not set
211
212#
213# User Modules And Translation Layers
214#
215CONFIG_MTD_CHAR=m
216CONFIG_MTD_BLOCK=y
217# CONFIG_FTL is not set
218# CONFIG_NFTL is not set
219# CONFIG_INFTL is not set
220
221#
222# RAM/ROM/Flash chip drivers
223#
224CONFIG_MTD_CFI=y
225# CONFIG_MTD_JEDECPROBE is not set
226CONFIG_MTD_GEN_PROBE=y
227CONFIG_MTD_CFI_ADV_OPTIONS=y
228CONFIG_MTD_CFI_NOSWAP=y
229# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
230# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
231CONFIG_MTD_CFI_GEOMETRY=y
232CONFIG_MTD_MAP_BANK_WIDTH_1=y
233CONFIG_MTD_MAP_BANK_WIDTH_2=y
234CONFIG_MTD_MAP_BANK_WIDTH_4=y
235# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
236# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
237# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
238CONFIG_MTD_CFI_I1=y
239CONFIG_MTD_CFI_I2=y
240# CONFIG_MTD_CFI_I4 is not set
241# CONFIG_MTD_CFI_I8 is not set
242CONFIG_MTD_CFI_INTELEXT=y
243# CONFIG_MTD_CFI_AMDSTD is not set
244# CONFIG_MTD_CFI_STAA is not set
245CONFIG_MTD_CFI_UTIL=y
246# CONFIG_MTD_RAM is not set
247# CONFIG_MTD_ROM is not set
248# CONFIG_MTD_ABSENT is not set
249# CONFIG_MTD_XIP is not set
250
251#
252# Mapping drivers for chip access
253#
254# CONFIG_MTD_COMPLEX_MAPPINGS is not set
255# CONFIG_MTD_PHYSMAP is not set
256# CONFIG_MTD_ARM_INTEGRATOR is not set
257CONFIG_MTD_SA1100=y
258# CONFIG_MTD_EDB7312 is not set
259
260#
261# Self-contained MTD device drivers
262#
263# CONFIG_MTD_SLRAM is not set
264# CONFIG_MTD_PHRAM is not set
265# CONFIG_MTD_MTDRAM is not set
266# CONFIG_MTD_BLKMTD is not set
267# CONFIG_MTD_BLOCK2MTD is not set
268
269#
270# Disk-On-Chip Device Drivers
271#
272# CONFIG_MTD_DOC2000 is not set
273# CONFIG_MTD_DOC2001 is not set
274# CONFIG_MTD_DOC2001PLUS is not set
275
276#
277# NAND Flash Device Drivers
278#
279# CONFIG_MTD_NAND is not set
280
281#
282# Parallel port support
283#
284# CONFIG_PARPORT is not set
285
286#
287# Plug and Play support
288#
289# CONFIG_PNP is not set
290
291#
292# Block devices
293#
294# CONFIG_BLK_DEV_FD is not set
295# CONFIG_BLK_DEV_XD is not set
296# CONFIG_BLK_DEV_COW_COMMON is not set
297CONFIG_BLK_DEV_LOOP=m
298# CONFIG_BLK_DEV_CRYPTOLOOP is not set
299CONFIG_BLK_DEV_NBD=m
300# CONFIG_BLK_DEV_RAM is not set
301CONFIG_BLK_DEV_RAM_COUNT=16
302CONFIG_INITRAMFS_SOURCE=""
303# CONFIG_CDROM_PKTCDVD is not set
304
305#
306# IO Schedulers
307#
308CONFIG_IOSCHED_NOOP=y
309CONFIG_IOSCHED_AS=y
310CONFIG_IOSCHED_DEADLINE=y
311CONFIG_IOSCHED_CFQ=y
312# CONFIG_ATA_OVER_ETH is not set
313
314#
315# ATA/ATAPI/MFM/RLL support
316#
317CONFIG_IDE=m
318CONFIG_BLK_DEV_IDE=m
319
320#
321# Please see Documentation/ide.txt for help/info on IDE drives
322#
323# CONFIG_BLK_DEV_IDE_SATA is not set
324CONFIG_BLK_DEV_IDEDISK=m
325# CONFIG_IDEDISK_MULTI_MODE is not set
326# CONFIG_BLK_DEV_IDECS is not set
327CONFIG_BLK_DEV_IDECD=m
328# CONFIG_BLK_DEV_IDETAPE is not set
329# CONFIG_BLK_DEV_IDEFLOPPY is not set
330# CONFIG_IDE_TASK_IOCTL is not set
331
332#
333# IDE chipset support/bugfixes
334#
335CONFIG_IDE_GENERIC=m
336# CONFIG_IDE_ARM is not set
337# CONFIG_IDE_CHIPSETS is not set
338# CONFIG_BLK_DEV_IDEDMA is not set
339# CONFIG_IDEDMA_AUTO is not set
340# CONFIG_BLK_DEV_HD is not set
341
342#
343# SCSI device support
344#
345# CONFIG_SCSI is not set
346
347#
348# Multi-device support (RAID and LVM)
349#
350# CONFIG_MD is not set
351
352#
353# Fusion MPT device support
354#
355
356#
357# IEEE 1394 (FireWire) support
358#
359
360#
361# I2O device support
362#
363
364#
365# Networking support
366#
367CONFIG_NET=y 318CONFIG_NET=y
368 319
369# 320#
@@ -371,12 +322,17 @@ CONFIG_NET=y
371# 322#
372CONFIG_PACKET=y 323CONFIG_PACKET=y
373CONFIG_PACKET_MMAP=y 324CONFIG_PACKET_MMAP=y
374# CONFIG_NETLINK_DEV is not set
375CONFIG_UNIX=y 325CONFIG_UNIX=y
326CONFIG_XFRM=y
327# CONFIG_XFRM_USER is not set
328# CONFIG_XFRM_SUB_POLICY is not set
329# CONFIG_XFRM_MIGRATE is not set
330# CONFIG_XFRM_STATISTICS is not set
376# CONFIG_NET_KEY is not set 331# CONFIG_NET_KEY is not set
377CONFIG_INET=y 332CONFIG_INET=y
378CONFIG_IP_MULTICAST=y 333CONFIG_IP_MULTICAST=y
379# CONFIG_IP_ADVANCED_ROUTER is not set 334# CONFIG_IP_ADVANCED_ROUTER is not set
335CONFIG_IP_FIB_HASH=y
380# CONFIG_IP_PNP is not set 336# CONFIG_IP_PNP is not set
381# CONFIG_NET_IPIP is not set 337# CONFIG_NET_IPIP is not set
382# CONFIG_NET_IPGRE is not set 338# CONFIG_NET_IPGRE is not set
@@ -386,31 +342,42 @@ CONFIG_IP_MULTICAST=y
386# CONFIG_INET_AH is not set 342# CONFIG_INET_AH is not set
387# CONFIG_INET_ESP is not set 343# CONFIG_INET_ESP is not set
388# CONFIG_INET_IPCOMP is not set 344# CONFIG_INET_IPCOMP is not set
345# CONFIG_INET_XFRM_TUNNEL is not set
389# CONFIG_INET_TUNNEL is not set 346# CONFIG_INET_TUNNEL is not set
390# CONFIG_IP_TCPDIAG is not set 347CONFIG_INET_XFRM_MODE_TRANSPORT=y
391# CONFIG_IP_TCPDIAG_IPV6 is not set 348CONFIG_INET_XFRM_MODE_TUNNEL=y
392 349CONFIG_INET_XFRM_MODE_BEET=y
393# 350# CONFIG_INET_LRO is not set
394# IP: Virtual Server Configuration 351CONFIG_INET_DIAG=y
395# 352CONFIG_INET_TCP_DIAG=y
353# CONFIG_TCP_CONG_ADVANCED is not set
354CONFIG_TCP_CONG_CUBIC=y
355CONFIG_DEFAULT_TCP_CONG="cubic"
356# CONFIG_TCP_MD5SIG is not set
396# CONFIG_IP_VS is not set 357# CONFIG_IP_VS is not set
397# CONFIG_IPV6 is not set 358# CONFIG_IPV6 is not set
359# CONFIG_NETWORK_SECMARK is not set
398CONFIG_NETFILTER=y 360CONFIG_NETFILTER=y
399# CONFIG_NETFILTER_DEBUG is not set 361# CONFIG_NETFILTER_DEBUG is not set
362CONFIG_NETFILTER_ADVANCED=y
363
364#
365# Core Netfilter Configuration
366#
367# CONFIG_NETFILTER_NETLINK_QUEUE is not set
368# CONFIG_NETFILTER_NETLINK_LOG is not set
369# CONFIG_NF_CONNTRACK is not set
370# CONFIG_NETFILTER_XTABLES is not set
400 371
401# 372#
402# IP: Netfilter Configuration 373# IP: Netfilter Configuration
403# 374#
404# CONFIG_IP_NF_CONNTRACK is not set
405# CONFIG_IP_NF_CONNTRACK_MARK is not set
406# CONFIG_IP_NF_QUEUE is not set 375# CONFIG_IP_NF_QUEUE is not set
407# CONFIG_IP_NF_IPTABLES is not set 376# CONFIG_IP_NF_IPTABLES is not set
408# CONFIG_IP_NF_ARPTABLES is not set 377# CONFIG_IP_NF_ARPTABLES is not set
409 378# CONFIG_IP_DCCP is not set
410#
411# SCTP Configuration (EXPERIMENTAL)
412#
413# CONFIG_IP_SCTP is not set 379# CONFIG_IP_SCTP is not set
380# CONFIG_TIPC is not set
414# CONFIG_ATM is not set 381# CONFIG_ATM is not set
415# CONFIG_BRIDGE is not set 382# CONFIG_BRIDGE is not set
416# CONFIG_VLAN_8021Q is not set 383# CONFIG_VLAN_8021Q is not set
@@ -420,30 +387,22 @@ CONFIG_NETFILTER=y
420# CONFIG_ATALK is not set 387# CONFIG_ATALK is not set
421# CONFIG_X25 is not set 388# CONFIG_X25 is not set
422# CONFIG_LAPB is not set 389# CONFIG_LAPB is not set
423# CONFIG_NET_DIVERT is not set
424# CONFIG_ECONET is not set 390# CONFIG_ECONET is not set
425# CONFIG_WAN_ROUTER is not set 391# CONFIG_WAN_ROUTER is not set
426
427#
428# QoS and/or fair queueing
429#
430# CONFIG_NET_SCHED is not set 392# CONFIG_NET_SCHED is not set
431# CONFIG_NET_CLS_ROUTE is not set
432 393
433# 394#
434# Network testing 395# Network testing
435# 396#
436# CONFIG_NET_PKTGEN is not set 397# CONFIG_NET_PKTGEN is not set
437# CONFIG_NETPOLL is not set
438# CONFIG_NET_POLL_CONTROLLER is not set
439# CONFIG_HAMRADIO is not set 398# CONFIG_HAMRADIO is not set
399# CONFIG_CAN is not set
440CONFIG_IRDA=m 400CONFIG_IRDA=m
441 401
442# 402#
443# IrDA protocols 403# IrDA protocols
444# 404#
445CONFIG_IRLAN=m 405CONFIG_IRLAN=m
446# CONFIG_IRNET is not set
447CONFIG_IRCOMM=m 406CONFIG_IRCOMM=m
448# CONFIG_IRDA_ULTRA is not set 407# CONFIG_IRDA_ULTRA is not set
449 408
@@ -468,89 +427,105 @@ CONFIG_IRCOMM=m
468# 427#
469 428
470# 429#
471# Old SIR device drivers
472#
473# CONFIG_IRPORT_SIR is not set
474
475#
476# Old Serial dongle support
477#
478
479#
480# FIR device drivers 430# FIR device drivers
481# 431#
482# CONFIG_NSC_FIR is not set
483# CONFIG_WINBOND_FIR is not set
484# CONFIG_SMC_IRCC_FIR is not set
485# CONFIG_ALI_FIR is not set
486CONFIG_SA1100_FIR=m 432CONFIG_SA1100_FIR=m
487# CONFIG_BT is not set 433# CONFIG_BT is not set
488CONFIG_NETDEVICES=y 434# CONFIG_AF_RXRPC is not set
489# CONFIG_DUMMY is not set
490# CONFIG_BONDING is not set
491# CONFIG_EQUALIZER is not set
492# CONFIG_TUN is not set
493
494#
495# ARCnet devices
496#
497# CONFIG_ARCNET is not set
498
499#
500# Ethernet (10 or 100Mbit)
501#
502# CONFIG_NET_ETHERNET is not set
503CONFIG_MII=m
504 435
505# 436#
506# Ethernet (1000 Mbit) 437# Wireless
507# 438#
439# CONFIG_CFG80211 is not set
440# CONFIG_WIRELESS_EXT is not set
441# CONFIG_MAC80211 is not set
442# CONFIG_IEEE80211 is not set
443# CONFIG_RFKILL is not set
444# CONFIG_NET_9P is not set
508 445
509# 446#
510# Ethernet (10000 Mbit) 447# Device Drivers
511#
512
513#
514# Token Ring devices
515#
516# CONFIG_TR is not set
517
518#
519# Wireless LAN (non-hamradio)
520# 448#
521CONFIG_NET_RADIO=y
522 449
523# 450#
524# Obsolete Wireless cards support (pre-802.11) 451# Generic Driver Options
525# 452#
526# CONFIG_STRIP is not set 453CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
527CONFIG_ARLAN=m 454CONFIG_STANDALONE=y
528CONFIG_WAVELAN=m 455CONFIG_PREVENT_FIRMWARE_BUILD=y
529CONFIG_PCMCIA_WAVELAN=m 456CONFIG_FW_LOADER=y
530# CONFIG_PCMCIA_NETWAVE is not set 457CONFIG_FIRMWARE_IN_KERNEL=y
458CONFIG_EXTRA_FIRMWARE=""
459# CONFIG_DEBUG_DRIVER is not set
460# CONFIG_DEBUG_DEVRES is not set
461# CONFIG_SYS_HYPERVISOR is not set
462# CONFIG_CONNECTOR is not set
463# CONFIG_MTD is not set
464# CONFIG_PARPORT is not set
465# CONFIG_PNP is not set
466CONFIG_BLK_DEV=y
467# CONFIG_BLK_DEV_COW_COMMON is not set
468CONFIG_BLK_DEV_LOOP=m
469# CONFIG_BLK_DEV_CRYPTOLOOP is not set
470CONFIG_BLK_DEV_NBD=m
471# CONFIG_BLK_DEV_RAM is not set
472# CONFIG_CDROM_PKTCDVD is not set
473# CONFIG_ATA_OVER_ETH is not set
474CONFIG_MISC_DEVICES=y
475# CONFIG_EEPROM_93CX6 is not set
476# CONFIG_ENCLOSURE_SERVICES is not set
477CONFIG_HAVE_IDE=y
478CONFIG_IDE=y
479CONFIG_BLK_DEV_IDE=y
531 480
532# 481#
533# Wireless 802.11 Frequency Hopping cards support 482# Please see Documentation/ide/ide.txt for help/info on IDE drives
534# 483#
535# CONFIG_PCMCIA_RAYCS is not set 484# CONFIG_BLK_DEV_IDE_SATA is not set
485CONFIG_BLK_DEV_IDEDISK=y
486# CONFIG_IDEDISK_MULTI_MODE is not set
487CONFIG_BLK_DEV_IDECS=y
488# CONFIG_BLK_DEV_IDECD is not set
489# CONFIG_BLK_DEV_IDETAPE is not set
490# CONFIG_BLK_DEV_IDEFLOPPY is not set
491# CONFIG_IDE_TASK_IOCTL is not set
492CONFIG_IDE_PROC_FS=y
536 493
537# 494#
538# Wireless 802.11b ISA/PCI cards support 495# IDE chipset support/bugfixes
539# 496#
540CONFIG_HERMES=m 497# CONFIG_BLK_DEV_PLATFORM is not set
541# CONFIG_ATMEL is not set 498# CONFIG_BLK_DEV_IDEDMA is not set
542 499
543# 500#
544# Wireless 802.11b Pcmcia/Cardbus cards support 501# SCSI device support
545# 502#
546CONFIG_PCMCIA_HERMES=m 503# CONFIG_RAID_ATTRS is not set
547CONFIG_AIRO_CS=m 504# CONFIG_SCSI is not set
548# CONFIG_PCMCIA_WL3501 is not set 505# CONFIG_SCSI_DMA is not set
549CONFIG_NET_WIRELESS=y 506# CONFIG_SCSI_NETLINK is not set
507# CONFIG_ATA is not set
508# CONFIG_MD is not set
509CONFIG_NETDEVICES=y
510CONFIG_DUMMY=y
511# CONFIG_BONDING is not set
512# CONFIG_MACVLAN is not set
513# CONFIG_EQUALIZER is not set
514# CONFIG_TUN is not set
515# CONFIG_VETH is not set
516# CONFIG_ARCNET is not set
517# CONFIG_NET_ETHERNET is not set
518CONFIG_MII=m
519# CONFIG_NETDEV_1000 is not set
520# CONFIG_NETDEV_10000 is not set
521# CONFIG_TR is not set
550 522
551# 523#
552# PCMCIA network device support 524# Wireless LAN
553# 525#
526# CONFIG_WLAN_PRE80211 is not set
527# CONFIG_WLAN_80211 is not set
528# CONFIG_IWLWIFI_LEDS is not set
554CONFIG_NET_PCMCIA=y 529CONFIG_NET_PCMCIA=y
555CONFIG_PCMCIA_3C589=m 530CONFIG_PCMCIA_3C589=m
556CONFIG_PCMCIA_3C574=m 531CONFIG_PCMCIA_3C574=m
@@ -560,32 +535,20 @@ CONFIG_PCMCIA_NMCLAN=m
560CONFIG_PCMCIA_SMC91C92=m 535CONFIG_PCMCIA_SMC91C92=m
561CONFIG_PCMCIA_XIRC2PS=m 536CONFIG_PCMCIA_XIRC2PS=m
562CONFIG_PCMCIA_AXNET=m 537CONFIG_PCMCIA_AXNET=m
563
564#
565# Wan interfaces
566#
567# CONFIG_WAN is not set 538# CONFIG_WAN is not set
568CONFIG_PPP=m 539# CONFIG_PPP is not set
569# CONFIG_PPP_MULTILINK is not set
570# CONFIG_PPP_FILTER is not set
571CONFIG_PPP_ASYNC=m
572# CONFIG_PPP_SYNC_TTY is not set
573CONFIG_PPP_DEFLATE=m
574CONFIG_PPP_BSDCOMP=m
575# CONFIG_PPPOE is not set
576# CONFIG_SLIP is not set 540# CONFIG_SLIP is not set
577# CONFIG_SHAPER is not set
578# CONFIG_NETCONSOLE is not set 541# CONFIG_NETCONSOLE is not set
579 542# CONFIG_NETPOLL is not set
580# 543# CONFIG_NET_POLL_CONTROLLER is not set
581# ISDN subsystem
582#
583# CONFIG_ISDN is not set 544# CONFIG_ISDN is not set
584 545
585# 546#
586# Input device support 547# Input device support
587# 548#
588CONFIG_INPUT=y 549CONFIG_INPUT=y
550# CONFIG_INPUT_FF_MEMLESS is not set
551# CONFIG_INPUT_POLLDEV is not set
589 552
590# 553#
591# Userland interfaces 554# Userland interfaces
@@ -595,7 +558,6 @@ CONFIG_INPUT_MOUSEDEV_PSAUX=y
595CONFIG_INPUT_MOUSEDEV_SCREEN_X=640 558CONFIG_INPUT_MOUSEDEV_SCREEN_X=640
596CONFIG_INPUT_MOUSEDEV_SCREEN_Y=240 559CONFIG_INPUT_MOUSEDEV_SCREEN_Y=240
597# CONFIG_INPUT_JOYDEV is not set 560# CONFIG_INPUT_JOYDEV is not set
598# CONFIG_INPUT_TSDEV is not set
599# CONFIG_INPUT_EVDEV is not set 561# CONFIG_INPUT_EVDEV is not set
600# CONFIG_INPUT_EVBUG is not set 562# CONFIG_INPUT_EVBUG is not set
601 563
@@ -603,20 +565,31 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=240
603# Input Device Drivers 565# Input Device Drivers
604# 566#
605CONFIG_INPUT_KEYBOARD=y 567CONFIG_INPUT_KEYBOARD=y
606CONFIG_KEYBOARD_ATKBD=y 568# CONFIG_KEYBOARD_ATKBD is not set
607# CONFIG_KEYBOARD_SUNKBD is not set 569# CONFIG_KEYBOARD_SUNKBD is not set
608# CONFIG_KEYBOARD_LKKBD is not set 570# CONFIG_KEYBOARD_LKKBD is not set
609# CONFIG_KEYBOARD_XTKBD is not set 571# CONFIG_KEYBOARD_XTKBD is not set
610# CONFIG_KEYBOARD_NEWTON is not set 572# CONFIG_KEYBOARD_NEWTON is not set
611CONFIG_INPUT_MOUSE=y 573# CONFIG_KEYBOARD_STOWAWAY is not set
612CONFIG_MOUSE_PS2=y 574CONFIG_KEYBOARD_HP7XX=y
613# CONFIG_MOUSE_SERIAL is not set 575# CONFIG_KEYBOARD_GPIO is not set
614# CONFIG_MOUSE_INPORT is not set 576# CONFIG_INPUT_MOUSE is not set
615# CONFIG_MOUSE_LOGIBM is not set
616# CONFIG_MOUSE_PC110PAD is not set
617# CONFIG_MOUSE_VSXXXAA is not set
618# CONFIG_INPUT_JOYSTICK is not set 577# CONFIG_INPUT_JOYSTICK is not set
619# CONFIG_INPUT_TOUCHSCREEN is not set 578# CONFIG_INPUT_TABLET is not set
579CONFIG_INPUT_TOUCHSCREEN=y
580# CONFIG_TOUCHSCREEN_FUJITSU is not set
581# CONFIG_TOUCHSCREEN_GUNZE is not set
582# CONFIG_TOUCHSCREEN_ELO is not set
583# CONFIG_TOUCHSCREEN_MTOUCH is not set
584# CONFIG_TOUCHSCREEN_INEXIO is not set
585# CONFIG_TOUCHSCREEN_MK712 is not set
586CONFIG_TOUCHSCREEN_HP7XX=y
587# CONFIG_TOUCHSCREEN_HTCPEN is not set
588# CONFIG_TOUCHSCREEN_PENMOUNT is not set
589# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
590# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
591# CONFIG_TOUCHSCREEN_UCB1400 is not set
592# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
620# CONFIG_INPUT_MISC is not set 593# CONFIG_INPUT_MISC is not set
621 594
622# 595#
@@ -625,17 +598,18 @@ CONFIG_MOUSE_PS2=y
625CONFIG_SERIO=y 598CONFIG_SERIO=y
626CONFIG_SERIO_SERPORT=y 599CONFIG_SERIO_SERPORT=y
627# CONFIG_SERIO_SA1111 is not set 600# CONFIG_SERIO_SA1111 is not set
628CONFIG_SERIO_LIBPS2=y
629# CONFIG_SERIO_RAW is not set 601# CONFIG_SERIO_RAW is not set
630# CONFIG_GAMEPORT is not set 602# CONFIG_GAMEPORT is not set
631CONFIG_SOUND_GAMEPORT=y
632 603
633# 604#
634# Character devices 605# Character devices
635# 606#
636CONFIG_VT=y 607CONFIG_VT=y
608CONFIG_CONSOLE_TRANSLATIONS=y
637CONFIG_VT_CONSOLE=y 609CONFIG_VT_CONSOLE=y
638CONFIG_HW_CONSOLE=y 610CONFIG_HW_CONSOLE=y
611# CONFIG_VT_HW_CONSOLE_BINDING is not set
612CONFIG_DEVKMEM=y
639# CONFIG_SERIAL_NONSTANDARD is not set 613# CONFIG_SERIAL_NONSTANDARD is not set
640 614
641# 615#
@@ -652,69 +626,120 @@ CONFIG_SERIAL_CORE=y
652CONFIG_SERIAL_CORE_CONSOLE=y 626CONFIG_SERIAL_CORE_CONSOLE=y
653CONFIG_UNIX98_PTYS=y 627CONFIG_UNIX98_PTYS=y
654CONFIG_LEGACY_PTYS=y 628CONFIG_LEGACY_PTYS=y
655CONFIG_LEGACY_PTY_COUNT=256 629CONFIG_LEGACY_PTY_COUNT=32
630# CONFIG_IPMI_HANDLER is not set
631CONFIG_HW_RANDOM=m
632# CONFIG_NVRAM is not set
633# CONFIG_DTLK is not set
634# CONFIG_R3964 is not set
656 635
657# 636#
658# IPMI 637# PCMCIA character devices
659# 638#
660# CONFIG_IPMI_HANDLER is not set 639# CONFIG_SYNCLINK_CS is not set
640# CONFIG_CARDMAN_4000 is not set
641# CONFIG_CARDMAN_4040 is not set
642# CONFIG_IPWIRELESS is not set
643# CONFIG_RAW_DRIVER is not set
644# CONFIG_TCG_TPM is not set
645CONFIG_DEVPORT=y
646# CONFIG_I2C is not set
647# CONFIG_SPI is not set
648CONFIG_ARCH_REQUIRE_GPIOLIB=y
649CONFIG_GPIOLIB=y
650# CONFIG_DEBUG_GPIO is not set
651# CONFIG_GPIO_SYSFS is not set
661 652
662# 653#
663# Watchdog Cards 654# I2C GPIO expanders:
664# 655#
665# CONFIG_WATCHDOG is not set
666# CONFIG_NVRAM is not set
667# CONFIG_RTC is not set
668# CONFIG_DTLK is not set
669# CONFIG_R3964 is not set
670 656
671# 657#
672# Ftape, the floppy tape device driver 658# PCI GPIO expanders:
673# 659#
674# CONFIG_DRM is not set
675 660
676# 661#
677# PCMCIA character devices 662# SPI GPIO expanders:
678# 663#
679# CONFIG_SYNCLINK_CS is not set 664# CONFIG_W1 is not set
680# CONFIG_RAW_DRIVER is not set 665# CONFIG_POWER_SUPPLY is not set
666# CONFIG_HWMON is not set
667# CONFIG_WATCHDOG is not set
681 668
682# 669#
683# TPM devices 670# Sonics Silicon Backplane
684# 671#
685# CONFIG_TCG_TPM is not set 672CONFIG_SSB_POSSIBLE=y
673# CONFIG_SSB is not set
686 674
687# 675#
688# I2C support 676# Multifunction device drivers
689# 677#
690# CONFIG_I2C is not set 678# CONFIG_MFD_CORE is not set
679# CONFIG_MFD_SM501 is not set
680# CONFIG_HTC_EGPIO is not set
681# CONFIG_HTC_PASIC3 is not set
682# CONFIG_MFD_TMIO is not set
683# CONFIG_MFD_T7L66XB is not set
684# CONFIG_MFD_TC6387XB is not set
685# CONFIG_MFD_TC6393XB is not set
691 686
692# 687#
693# Misc devices 688# Multimedia Capabilities Port drivers
694# 689#
690# CONFIG_MCP_SA11X0 is not set
695 691
696# 692#
697# Multimedia devices 693# Multimedia devices
698# 694#
695
696#
697# Multimedia core support
698#
699# CONFIG_VIDEO_DEV is not set 699# CONFIG_VIDEO_DEV is not set
700# CONFIG_DVB_CORE is not set
701# CONFIG_VIDEO_MEDIA is not set
700 702
701# 703#
702# Digital Video Broadcasting Devices 704# Multimedia drivers
703# 705#
704# CONFIG_DVB is not set 706# CONFIG_DAB is not set
705 707
706# 708#
707# Graphics support 709# Graphics support
708# 710#
711# CONFIG_VGASTATE is not set
712# CONFIG_VIDEO_OUTPUT_CONTROL is not set
709CONFIG_FB=y 713CONFIG_FB=y
710# CONFIG_FB_CFB_FILLRECT is not set 714# CONFIG_FIRMWARE_EDID is not set
711# CONFIG_FB_CFB_COPYAREA is not set 715# CONFIG_FB_DDC is not set
712# CONFIG_FB_CFB_IMAGEBLIT is not set 716CONFIG_FB_CFB_FILLRECT=y
713# CONFIG_FB_SOFT_CURSOR is not set 717CONFIG_FB_CFB_COPYAREA=y
718CONFIG_FB_CFB_IMAGEBLIT=y
719# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
720# CONFIG_FB_SYS_FILLRECT is not set
721# CONFIG_FB_SYS_COPYAREA is not set
722# CONFIG_FB_SYS_IMAGEBLIT is not set
723# CONFIG_FB_FOREIGN_ENDIAN is not set
724# CONFIG_FB_SYS_FOPS is not set
725# CONFIG_FB_SVGALIB is not set
726# CONFIG_FB_MACMODES is not set
727# CONFIG_FB_BACKLIGHT is not set
714# CONFIG_FB_MODE_HELPERS is not set 728# CONFIG_FB_MODE_HELPERS is not set
715# CONFIG_FB_TILEBLITTING is not set 729# CONFIG_FB_TILEBLITTING is not set
730
731#
732# Frame buffer hardware drivers
733#
716# CONFIG_FB_SA1100 is not set 734# CONFIG_FB_SA1100 is not set
735CONFIG_FB_S1D13XXX=y
717# CONFIG_FB_VIRTUAL is not set 736# CONFIG_FB_VIRTUAL is not set
737# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
738
739#
740# Display device support
741#
742# CONFIG_DISPLAY_SUPPORT is not set
718 743
719# 744#
720# Console display driver support 745# Console display driver support
@@ -722,94 +747,110 @@ CONFIG_FB=y
722# CONFIG_VGA_CONSOLE is not set 747# CONFIG_VGA_CONSOLE is not set
723# CONFIG_MDA_CONSOLE is not set 748# CONFIG_MDA_CONSOLE is not set
724CONFIG_DUMMY_CONSOLE=y 749CONFIG_DUMMY_CONSOLE=y
725# CONFIG_FRAMEBUFFER_CONSOLE is not set 750CONFIG_FRAMEBUFFER_CONSOLE=y
726 751CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
727# 752# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
728# Logo configuration 753# CONFIG_FONTS is not set
729# 754CONFIG_FONT_8x8=y
755CONFIG_FONT_8x16=y
730# CONFIG_LOGO is not set 756# CONFIG_LOGO is not set
731# CONFIG_BACKLIGHT_LCD_SUPPORT is not set 757# CONFIG_SOUND is not set
732 758# CONFIG_HID_SUPPORT is not set
733# 759# CONFIG_USB_SUPPORT is not set
734# Sound 760# CONFIG_MMC is not set
735# 761# CONFIG_NEW_LEDS is not set
736CONFIG_SOUND=m 762CONFIG_RTC_LIB=y
763CONFIG_RTC_CLASS=y
764CONFIG_RTC_HCTOSYS=y
765CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
766# CONFIG_RTC_DEBUG is not set
737 767
738# 768#
739# Advanced Linux Sound Architecture 769# RTC interfaces
740# 770#
741# CONFIG_SND is not set 771CONFIG_RTC_INTF_SYSFS=y
772CONFIG_RTC_INTF_PROC=y
773CONFIG_RTC_INTF_DEV=y
774# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
775# CONFIG_RTC_DRV_TEST is not set
742 776
743# 777#
744# Open Sound System 778# SPI RTC drivers
745# 779#
746# CONFIG_SOUND_PRIME is not set
747 780
748# 781#
749# USB support 782# Platform RTC drivers
750# 783#
751CONFIG_USB_ARCH_HAS_HCD=y 784# CONFIG_RTC_DRV_CMOS is not set
752CONFIG_USB_ARCH_HAS_OHCI=y 785# CONFIG_RTC_DRV_DS1511 is not set
753# CONFIG_USB is not set 786# CONFIG_RTC_DRV_DS1553 is not set
787# CONFIG_RTC_DRV_DS1742 is not set
788# CONFIG_RTC_DRV_STK17TA8 is not set
789# CONFIG_RTC_DRV_M48T86 is not set
790# CONFIG_RTC_DRV_M48T59 is not set
791# CONFIG_RTC_DRV_V3020 is not set
754 792
755# 793#
756# USB Gadget Support 794# on-CPU RTC drivers
757# 795#
758# CONFIG_USB_GADGET is not set 796CONFIG_RTC_DRV_SA1100=y
797# CONFIG_DMADEVICES is not set
759 798
760# 799#
761# MMC/SD Card support 800# Voltage and Current regulators
762# 801#
763# CONFIG_MMC is not set 802# CONFIG_REGULATOR is not set
803# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
804# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
805# CONFIG_REGULATOR_BQ24022 is not set
806# CONFIG_UIO is not set
764 807
765# 808#
766# File systems 809# File systems
767# 810#
768CONFIG_EXT2_FS=y 811CONFIG_EXT2_FS=y
769# CONFIG_EXT2_FS_XATTR is not set 812# CONFIG_EXT2_FS_XATTR is not set
813# CONFIG_EXT2_FS_XIP is not set
770# CONFIG_EXT3_FS is not set 814# CONFIG_EXT3_FS is not set
771# CONFIG_JBD is not set 815# CONFIG_EXT4DEV_FS is not set
772# CONFIG_REISERFS_FS is not set 816# CONFIG_REISERFS_FS is not set
773# CONFIG_JFS_FS is not set 817# CONFIG_JFS_FS is not set
774 818# CONFIG_FS_POSIX_ACL is not set
775#
776# XFS support
777#
778# CONFIG_XFS_FS is not set 819# CONFIG_XFS_FS is not set
779# CONFIG_MINIX_FS is not set 820# CONFIG_OCFS2_FS is not set
780# CONFIG_ROMFS_FS is not set
781# CONFIG_QUOTA is not set
782CONFIG_DNOTIFY=y 821CONFIG_DNOTIFY=y
822CONFIG_INOTIFY=y
823CONFIG_INOTIFY_USER=y
824# CONFIG_QUOTA is not set
783# CONFIG_AUTOFS_FS is not set 825# CONFIG_AUTOFS_FS is not set
784# CONFIG_AUTOFS4_FS is not set 826# CONFIG_AUTOFS4_FS is not set
827# CONFIG_FUSE_FS is not set
785 828
786# 829#
787# CD-ROM/DVD Filesystems 830# CD-ROM/DVD Filesystems
788# 831#
789CONFIG_ISO9660_FS=m 832# CONFIG_ISO9660_FS is not set
790# CONFIG_JOLIET is not set
791# CONFIG_ZISOFS is not set
792# CONFIG_UDF_FS is not set 833# CONFIG_UDF_FS is not set
793 834
794# 835#
795# DOS/FAT/NT Filesystems 836# DOS/FAT/NT Filesystems
796# 837#
797# CONFIG_MSDOS_FS is not set 838CONFIG_FAT_FS=y
798# CONFIG_VFAT_FS is not set 839CONFIG_MSDOS_FS=y
840CONFIG_VFAT_FS=y
841CONFIG_FAT_DEFAULT_CODEPAGE=437
842CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
799# CONFIG_NTFS_FS is not set 843# CONFIG_NTFS_FS is not set
800 844
801# 845#
802# Pseudo filesystems 846# Pseudo filesystems
803# 847#
804CONFIG_PROC_FS=y 848CONFIG_PROC_FS=y
849CONFIG_PROC_SYSCTL=y
805CONFIG_SYSFS=y 850CONFIG_SYSFS=y
806CONFIG_DEVFS_FS=y
807CONFIG_DEVFS_MOUNT=y
808CONFIG_DEVFS_DEBUG=y
809# CONFIG_DEVPTS_FS_XATTR is not set
810# CONFIG_TMPFS is not set 851# CONFIG_TMPFS is not set
811# CONFIG_HUGETLB_PAGE is not set 852# CONFIG_HUGETLB_PAGE is not set
812CONFIG_RAMFS=y 853# CONFIG_CONFIGFS_FS is not set
813 854
814# 855#
815# Miscellaneous filesystems 856# Miscellaneous filesystems
@@ -821,75 +862,122 @@ CONFIG_RAMFS=y
821# CONFIG_BEFS_FS is not set 862# CONFIG_BEFS_FS is not set
822# CONFIG_BFS_FS is not set 863# CONFIG_BFS_FS is not set
823# CONFIG_EFS_FS is not set 864# CONFIG_EFS_FS is not set
824# CONFIG_JFFS_FS is not set
825CONFIG_JFFS2_FS=y
826CONFIG_JFFS2_FS_DEBUG=2
827# CONFIG_JFFS2_FS_NAND is not set
828# CONFIG_JFFS2_FS_NOR_ECC is not set
829# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
830CONFIG_JFFS2_ZLIB=y
831CONFIG_JFFS2_RTIME=y
832# CONFIG_JFFS2_RUBIN is not set
833# CONFIG_CRAMFS is not set 865# CONFIG_CRAMFS is not set
834# CONFIG_VXFS_FS is not set 866# CONFIG_VXFS_FS is not set
867# CONFIG_MINIX_FS is not set
868# CONFIG_OMFS_FS is not set
835# CONFIG_HPFS_FS is not set 869# CONFIG_HPFS_FS is not set
836# CONFIG_QNX4FS_FS is not set 870# CONFIG_QNX4FS_FS is not set
871# CONFIG_ROMFS_FS is not set
837# CONFIG_SYSV_FS is not set 872# CONFIG_SYSV_FS is not set
838# CONFIG_UFS_FS is not set 873# CONFIG_UFS_FS is not set
839 874# CONFIG_NETWORK_FILESYSTEMS is not set
840#
841# Network File Systems
842#
843CONFIG_NFS_FS=m
844CONFIG_NFS_V3=y
845# CONFIG_NFS_V4 is not set
846# CONFIG_NFS_DIRECTIO is not set
847# CONFIG_NFSD is not set
848CONFIG_LOCKD=m
849CONFIG_LOCKD_V4=y
850CONFIG_SUNRPC=m
851# CONFIG_RPCSEC_GSS_KRB5 is not set
852# CONFIG_RPCSEC_GSS_SPKM3 is not set
853# CONFIG_SMB_FS is not set
854# CONFIG_CIFS is not set
855# CONFIG_NCP_FS is not set
856# CONFIG_CODA_FS is not set
857# CONFIG_AFS_FS is not set
858 875
859# 876#
860# Partition Types 877# Partition Types
861# 878#
862# CONFIG_PARTITION_ADVANCED is not set 879# CONFIG_PARTITION_ADVANCED is not set
863CONFIG_MSDOS_PARTITION=y 880CONFIG_MSDOS_PARTITION=y
864 881CONFIG_NLS=y
865# 882CONFIG_NLS_DEFAULT="iso8859-1"
866# Native Language Support 883CONFIG_NLS_CODEPAGE_437=m
867# 884CONFIG_NLS_CODEPAGE_737=m
868# CONFIG_NLS is not set 885CONFIG_NLS_CODEPAGE_775=m
869 886CONFIG_NLS_CODEPAGE_850=m
870# 887CONFIG_NLS_CODEPAGE_852=m
871# Profiling support 888CONFIG_NLS_CODEPAGE_855=m
872# 889CONFIG_NLS_CODEPAGE_857=m
873# CONFIG_PROFILING is not set 890CONFIG_NLS_CODEPAGE_860=m
891CONFIG_NLS_CODEPAGE_861=m
892CONFIG_NLS_CODEPAGE_862=m
893CONFIG_NLS_CODEPAGE_863=m
894CONFIG_NLS_CODEPAGE_864=m
895CONFIG_NLS_CODEPAGE_865=m
896CONFIG_NLS_CODEPAGE_866=m
897CONFIG_NLS_CODEPAGE_869=m
898CONFIG_NLS_CODEPAGE_936=m
899CONFIG_NLS_CODEPAGE_950=m
900CONFIG_NLS_CODEPAGE_932=m
901CONFIG_NLS_CODEPAGE_949=m
902CONFIG_NLS_CODEPAGE_874=m
903CONFIG_NLS_ISO8859_8=m
904CONFIG_NLS_CODEPAGE_1250=m
905CONFIG_NLS_CODEPAGE_1251=m
906CONFIG_NLS_ASCII=m
907CONFIG_NLS_ISO8859_1=m
908CONFIG_NLS_ISO8859_2=m
909CONFIG_NLS_ISO8859_3=m
910CONFIG_NLS_ISO8859_4=m
911CONFIG_NLS_ISO8859_5=m
912CONFIG_NLS_ISO8859_6=m
913CONFIG_NLS_ISO8859_7=m
914CONFIG_NLS_ISO8859_9=m
915CONFIG_NLS_ISO8859_13=m
916CONFIG_NLS_ISO8859_14=m
917CONFIG_NLS_ISO8859_15=m
918CONFIG_NLS_KOI8_R=m
919CONFIG_NLS_KOI8_U=m
920CONFIG_NLS_UTF8=m
921# CONFIG_DLM is not set
874 922
875# 923#
876# Kernel hacking 924# Kernel hacking
877# 925#
878# CONFIG_PRINTK_TIME is not set 926# CONFIG_PRINTK_TIME is not set
879CONFIG_DEBUG_KERNEL=y 927CONFIG_ENABLE_WARN_DEPRECATED=y
928CONFIG_ENABLE_MUST_CHECK=y
929CONFIG_FRAME_WARN=1024
880# CONFIG_MAGIC_SYSRQ is not set 930# CONFIG_MAGIC_SYSRQ is not set
881CONFIG_LOG_BUF_SHIFT=14 931# CONFIG_UNUSED_SYMBOLS is not set
932# CONFIG_DEBUG_FS is not set
933# CONFIG_HEADERS_CHECK is not set
934CONFIG_DEBUG_KERNEL=y
935# CONFIG_DEBUG_SHIRQ is not set
936CONFIG_DETECT_SOFTLOCKUP=y
937# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
938CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
939CONFIG_SCHED_DEBUG=y
882# CONFIG_SCHEDSTATS is not set 940# CONFIG_SCHEDSTATS is not set
883CONFIG_DEBUG_SLAB=y 941# CONFIG_TIMER_STATS is not set
942# CONFIG_DEBUG_OBJECTS is not set
943# CONFIG_SLUB_DEBUG_ON is not set
944# CONFIG_SLUB_STATS is not set
945# CONFIG_DEBUG_RT_MUTEXES is not set
946# CONFIG_RT_MUTEX_TESTER is not set
884# CONFIG_DEBUG_SPINLOCK is not set 947# CONFIG_DEBUG_SPINLOCK is not set
948# CONFIG_DEBUG_MUTEXES is not set
949# CONFIG_DEBUG_LOCK_ALLOC is not set
950# CONFIG_PROVE_LOCKING is not set
951# CONFIG_LOCK_STAT is not set
885# CONFIG_DEBUG_SPINLOCK_SLEEP is not set 952# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
953# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
886# CONFIG_DEBUG_KOBJECT is not set 954# CONFIG_DEBUG_KOBJECT is not set
887CONFIG_DEBUG_BUGVERBOSE=y 955CONFIG_DEBUG_BUGVERBOSE=y
888# CONFIG_DEBUG_INFO is not set 956# CONFIG_DEBUG_INFO is not set
889# CONFIG_DEBUG_FS is not set 957# CONFIG_DEBUG_VM is not set
958# CONFIG_DEBUG_WRITECOUNT is not set
959CONFIG_DEBUG_MEMORY_INIT=y
960# CONFIG_DEBUG_LIST is not set
961# CONFIG_DEBUG_SG is not set
890CONFIG_FRAME_POINTER=y 962CONFIG_FRAME_POINTER=y
963# CONFIG_BOOT_PRINTK_DELAY is not set
964# CONFIG_RCU_TORTURE_TEST is not set
965# CONFIG_BACKTRACE_SELF_TEST is not set
966# CONFIG_FAULT_INJECTION is not set
967# CONFIG_LATENCYTOP is not set
968# CONFIG_SYSCTL_SYSCALL_CHECK is not set
969CONFIG_HAVE_FTRACE=y
970CONFIG_HAVE_DYNAMIC_FTRACE=y
971# CONFIG_FTRACE is not set
972# CONFIG_IRQSOFF_TRACER is not set
973# CONFIG_SCHED_TRACER is not set
974# CONFIG_CONTEXT_SWITCH_TRACER is not set
975# CONFIG_SAMPLES is not set
976CONFIG_HAVE_ARCH_KGDB=y
977# CONFIG_KGDB is not set
891# CONFIG_DEBUG_USER is not set 978# CONFIG_DEBUG_USER is not set
892CONFIG_DEBUG_ERRORS=y 979CONFIG_DEBUG_ERRORS=y
980# CONFIG_DEBUG_STACK_USAGE is not set
893CONFIG_DEBUG_LL=y 981CONFIG_DEBUG_LL=y
894# CONFIG_DEBUG_ICEDCC is not set 982# CONFIG_DEBUG_ICEDCC is not set
895 983
@@ -898,21 +986,100 @@ CONFIG_DEBUG_LL=y
898# 986#
899# CONFIG_KEYS is not set 987# CONFIG_KEYS is not set
900# CONFIG_SECURITY is not set 988# CONFIG_SECURITY is not set
989# CONFIG_SECURITY_FILE_CAPABILITIES is not set
990CONFIG_CRYPTO=y
991
992#
993# Crypto core or helper
994#
995# CONFIG_CRYPTO_MANAGER is not set
996# CONFIG_CRYPTO_GF128MUL is not set
997# CONFIG_CRYPTO_NULL is not set
998# CONFIG_CRYPTO_CRYPTD is not set
999# CONFIG_CRYPTO_AUTHENC is not set
1000# CONFIG_CRYPTO_TEST is not set
1001
1002#
1003# Authenticated Encryption with Associated Data
1004#
1005# CONFIG_CRYPTO_CCM is not set
1006# CONFIG_CRYPTO_GCM is not set
1007# CONFIG_CRYPTO_SEQIV is not set
1008
1009#
1010# Block modes
1011#
1012# CONFIG_CRYPTO_CBC is not set
1013# CONFIG_CRYPTO_CTR is not set
1014# CONFIG_CRYPTO_CTS is not set
1015# CONFIG_CRYPTO_ECB is not set
1016# CONFIG_CRYPTO_LRW is not set
1017# CONFIG_CRYPTO_PCBC is not set
1018# CONFIG_CRYPTO_XTS is not set
1019
1020#
1021# Hash modes
1022#
1023# CONFIG_CRYPTO_HMAC is not set
1024# CONFIG_CRYPTO_XCBC is not set
1025
1026#
1027# Digest
1028#
1029# CONFIG_CRYPTO_CRC32C is not set
1030# CONFIG_CRYPTO_MD4 is not set
1031# CONFIG_CRYPTO_MD5 is not set
1032# CONFIG_CRYPTO_MICHAEL_MIC is not set
1033# CONFIG_CRYPTO_RMD128 is not set
1034# CONFIG_CRYPTO_RMD160 is not set
1035# CONFIG_CRYPTO_RMD256 is not set
1036# CONFIG_CRYPTO_RMD320 is not set
1037# CONFIG_CRYPTO_SHA1 is not set
1038# CONFIG_CRYPTO_SHA256 is not set
1039# CONFIG_CRYPTO_SHA512 is not set
1040# CONFIG_CRYPTO_TGR192 is not set
1041# CONFIG_CRYPTO_WP512 is not set
901 1042
902# 1043#
903# Cryptographic options 1044# Ciphers
904# 1045#
905# CONFIG_CRYPTO is not set 1046# CONFIG_CRYPTO_AES is not set
1047# CONFIG_CRYPTO_ANUBIS is not set
1048# CONFIG_CRYPTO_ARC4 is not set
1049# CONFIG_CRYPTO_BLOWFISH is not set
1050# CONFIG_CRYPTO_CAMELLIA is not set
1051# CONFIG_CRYPTO_CAST5 is not set
1052# CONFIG_CRYPTO_CAST6 is not set
1053# CONFIG_CRYPTO_DES is not set
1054# CONFIG_CRYPTO_FCRYPT is not set
1055# CONFIG_CRYPTO_KHAZAD is not set
1056# CONFIG_CRYPTO_SALSA20 is not set
1057# CONFIG_CRYPTO_SEED is not set
1058# CONFIG_CRYPTO_SERPENT is not set
1059# CONFIG_CRYPTO_TEA is not set
1060# CONFIG_CRYPTO_TWOFISH is not set
906 1061
907# 1062#
908# Hardware crypto devices 1063# Compression
909# 1064#
1065# CONFIG_CRYPTO_DEFLATE is not set
1066# CONFIG_CRYPTO_LZO is not set
1067CONFIG_CRYPTO_HW=y
910 1068
911# 1069#
912# Library routines 1070# Library routines
913# 1071#
1072CONFIG_BITREVERSE=y
1073# CONFIG_GENERIC_FIND_FIRST_BIT is not set
1074# CONFIG_GENERIC_FIND_NEXT_BIT is not set
914CONFIG_CRC_CCITT=m 1075CONFIG_CRC_CCITT=m
1076# CONFIG_CRC16 is not set
1077# CONFIG_CRC_T10DIF is not set
1078# CONFIG_CRC_ITU_T is not set
915CONFIG_CRC32=y 1079CONFIG_CRC32=y
1080# CONFIG_CRC7 is not set
916# CONFIG_LIBCRC32C is not set 1081# CONFIG_LIBCRC32C is not set
917CONFIG_ZLIB_INFLATE=y 1082CONFIG_PLIST=y
918CONFIG_ZLIB_DEFLATE=y 1083CONFIG_HAS_IOMEM=y
1084CONFIG_HAS_IOPORT=y
1085CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/orion5x_defconfig b/arch/arm/configs/orion5x_defconfig
index 4017d83c9d2d..b2456ca544c9 100644
--- a/arch/arm/configs/orion5x_defconfig
+++ b/arch/arm/configs/orion5x_defconfig
@@ -176,14 +176,17 @@ CONFIG_MACH_KUROBOX_PRO=y
176CONFIG_MACH_DNS323=y 176CONFIG_MACH_DNS323=y
177CONFIG_MACH_TS209=y 177CONFIG_MACH_TS209=y
178CONFIG_MACH_LINKSTATION_PRO=y 178CONFIG_MACH_LINKSTATION_PRO=y
179CONFIG_MACH_LINKSTATION_MINI=y
179CONFIG_MACH_TS409=y 180CONFIG_MACH_TS409=y
180CONFIG_MACH_WRT350N_V2=y 181CONFIG_MACH_WRT350N_V2=y
181CONFIG_MACH_TS78XX=y 182CONFIG_MACH_TS78XX=y
182CONFIG_MACH_MV2120=y 183CONFIG_MACH_MV2120=y
184CONFIG_MACH_EDMINI_V2=y
183CONFIG_MACH_MSS2=y 185CONFIG_MACH_MSS2=y
184CONFIG_MACH_WNR854T=y 186CONFIG_MACH_WNR854T=y
185CONFIG_MACH_RD88F5181L_GE=y 187CONFIG_MACH_RD88F5181L_GE=y
186CONFIG_MACH_RD88F5181L_FXO=y 188CONFIG_MACH_RD88F5181L_FXO=y
189CONFIG_MACH_RD88F6183AP_GE=y
187 190
188# 191#
189# Boot options 192# Boot options
diff --git a/arch/arm/configs/palmz72_defconfig b/arch/arm/configs/palmz72_defconfig
new file mode 100644
index 000000000000..3245f8f33e0a
--- /dev/null
+++ b/arch/arm/configs/palmz72_defconfig
@@ -0,0 +1,951 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.27-rc4
4# Sun Aug 24 02:29:27 2008
5#
6CONFIG_ARM=y
7CONFIG_HAVE_PWM=y
8CONFIG_SYS_SUPPORTS_APM_EMULATION=y
9CONFIG_GENERIC_GPIO=y
10CONFIG_GENERIC_TIME=y
11CONFIG_GENERIC_CLOCKEVENTS=y
12CONFIG_MMU=y
13# CONFIG_NO_IOPORT is not set
14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_STACKTRACE_SUPPORT=y
16CONFIG_HAVE_LATENCYTOP_SUPPORT=y
17CONFIG_LOCKDEP_SUPPORT=y
18CONFIG_TRACE_IRQFLAGS_SUPPORT=y
19CONFIG_HARDIRQS_SW_RESEND=y
20CONFIG_GENERIC_IRQ_PROBE=y
21CONFIG_RWSEM_GENERIC_SPINLOCK=y
22# CONFIG_ARCH_HAS_ILOG2_U32 is not set
23# CONFIG_ARCH_HAS_ILOG2_U64 is not set
24CONFIG_GENERIC_HWEIGHT=y
25CONFIG_GENERIC_CALIBRATE_DELAY=y
26CONFIG_ARCH_SUPPORTS_AOUT=y
27CONFIG_ZONE_DMA=y
28CONFIG_ARCH_MTD_XIP=y
29CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
30CONFIG_VECTORS_BASE=0xffff0000
31CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
32
33#
34# General setup
35#
36CONFIG_EXPERIMENTAL=y
37CONFIG_BROKEN_ON_SMP=y
38CONFIG_LOCK_KERNEL=y
39CONFIG_INIT_ENV_ARG_LIMIT=32
40CONFIG_LOCALVERSION=""
41# CONFIG_LOCALVERSION_AUTO is not set
42CONFIG_SWAP=y
43CONFIG_SYSVIPC=y
44CONFIG_SYSVIPC_SYSCTL=y
45# CONFIG_POSIX_MQUEUE is not set
46# CONFIG_BSD_PROCESS_ACCT is not set
47# CONFIG_TASKSTATS is not set
48# CONFIG_AUDIT is not set
49# CONFIG_IKCONFIG is not set
50CONFIG_LOG_BUF_SHIFT=14
51# CONFIG_CGROUPS is not set
52# CONFIG_GROUP_SCHED is not set
53CONFIG_SYSFS_DEPRECATED=y
54CONFIG_SYSFS_DEPRECATED_V2=y
55# CONFIG_RELAY is not set
56CONFIG_NAMESPACES=y
57# CONFIG_UTS_NS is not set
58# CONFIG_IPC_NS is not set
59# CONFIG_USER_NS is not set
60# CONFIG_PID_NS is not set
61CONFIG_BLK_DEV_INITRD=y
62CONFIG_INITRAMFS_SOURCE=""
63CONFIG_CC_OPTIMIZE_FOR_SIZE=y
64CONFIG_SYSCTL=y
65# CONFIG_EMBEDDED is not set
66CONFIG_UID16=y
67CONFIG_SYSCTL_SYSCALL=y
68CONFIG_KALLSYMS=y
69# CONFIG_KALLSYMS_EXTRA_PASS is not set
70CONFIG_HOTPLUG=y
71CONFIG_PRINTK=y
72CONFIG_BUG=y
73CONFIG_ELF_CORE=y
74CONFIG_COMPAT_BRK=y
75CONFIG_BASE_FULL=y
76CONFIG_FUTEX=y
77CONFIG_ANON_INODES=y
78CONFIG_EPOLL=y
79CONFIG_SIGNALFD=y
80CONFIG_TIMERFD=y
81CONFIG_EVENTFD=y
82CONFIG_SHMEM=y
83CONFIG_VM_EVENT_COUNTERS=y
84CONFIG_SLAB=y
85# CONFIG_SLUB is not set
86# CONFIG_SLOB is not set
87# CONFIG_PROFILING is not set
88# CONFIG_MARKERS is not set
89CONFIG_HAVE_OPROFILE=y
90# CONFIG_KPROBES is not set
91# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
92# CONFIG_HAVE_IOREMAP_PROT is not set
93CONFIG_HAVE_KPROBES=y
94CONFIG_HAVE_KRETPROBES=y
95# CONFIG_HAVE_ARCH_TRACEHOOK is not set
96# CONFIG_HAVE_DMA_ATTRS is not set
97# CONFIG_USE_GENERIC_SMP_HELPERS is not set
98CONFIG_HAVE_CLK=y
99CONFIG_PROC_PAGE_MONITOR=y
100CONFIG_HAVE_GENERIC_DMA_COHERENT=y
101CONFIG_SLABINFO=y
102CONFIG_RT_MUTEXES=y
103# CONFIG_TINY_SHMEM is not set
104CONFIG_BASE_SMALL=0
105CONFIG_MODULES=y
106# CONFIG_MODULE_FORCE_LOAD is not set
107CONFIG_MODULE_UNLOAD=y
108# CONFIG_MODULE_FORCE_UNLOAD is not set
109# CONFIG_MODVERSIONS is not set
110# CONFIG_MODULE_SRCVERSION_ALL is not set
111CONFIG_KMOD=y
112CONFIG_BLOCK=y
113# CONFIG_LBD is not set
114# CONFIG_BLK_DEV_IO_TRACE is not set
115# CONFIG_LSF is not set
116# CONFIG_BLK_DEV_BSG is not set
117# CONFIG_BLK_DEV_INTEGRITY is not set
118
119#
120# IO Schedulers
121#
122CONFIG_IOSCHED_NOOP=y
123CONFIG_IOSCHED_AS=y
124# CONFIG_IOSCHED_DEADLINE is not set
125# CONFIG_IOSCHED_CFQ is not set
126CONFIG_DEFAULT_AS=y
127# CONFIG_DEFAULT_DEADLINE is not set
128# CONFIG_DEFAULT_CFQ is not set
129# CONFIG_DEFAULT_NOOP is not set
130CONFIG_DEFAULT_IOSCHED="anticipatory"
131CONFIG_CLASSIC_RCU=y
132
133#
134# System Type
135#
136# CONFIG_ARCH_AAEC2000 is not set
137# CONFIG_ARCH_INTEGRATOR is not set
138# CONFIG_ARCH_REALVIEW is not set
139# CONFIG_ARCH_VERSATILE is not set
140# CONFIG_ARCH_AT91 is not set
141# CONFIG_ARCH_CLPS7500 is not set
142# CONFIG_ARCH_CLPS711X is not set
143# CONFIG_ARCH_EBSA110 is not set
144# CONFIG_ARCH_EP93XX is not set
145# CONFIG_ARCH_FOOTBRIDGE is not set
146# CONFIG_ARCH_NETX is not set
147# CONFIG_ARCH_H720X is not set
148# CONFIG_ARCH_IMX is not set
149# CONFIG_ARCH_IOP13XX is not set
150# CONFIG_ARCH_IOP32X is not set
151# CONFIG_ARCH_IOP33X is not set
152# CONFIG_ARCH_IXP23XX is not set
153# CONFIG_ARCH_IXP2000 is not set
154# CONFIG_ARCH_IXP4XX is not set
155# CONFIG_ARCH_L7200 is not set
156# CONFIG_ARCH_KIRKWOOD is not set
157# CONFIG_ARCH_KS8695 is not set
158# CONFIG_ARCH_NS9XXX is not set
159# CONFIG_ARCH_LOKI is not set
160# CONFIG_ARCH_MV78XX0 is not set
161# CONFIG_ARCH_MXC is not set
162# CONFIG_ARCH_ORION5X is not set
163# CONFIG_ARCH_PNX4008 is not set
164CONFIG_ARCH_PXA=y
165# CONFIG_ARCH_RPC is not set
166# CONFIG_ARCH_SA1100 is not set
167# CONFIG_ARCH_S3C2410 is not set
168# CONFIG_ARCH_SHARK is not set
169# CONFIG_ARCH_LH7A40X is not set
170# CONFIG_ARCH_DAVINCI is not set
171# CONFIG_ARCH_OMAP is not set
172# CONFIG_ARCH_MSM7X00A is not set
173
174#
175# Intel PXA2xx/PXA3xx Implementations
176#
177# CONFIG_ARCH_GUMSTIX is not set
178# CONFIG_ARCH_LUBBOCK is not set
179# CONFIG_MACH_LOGICPD_PXA270 is not set
180# CONFIG_MACH_MAINSTONE is not set
181# CONFIG_ARCH_PXA_IDP is not set
182# CONFIG_PXA_SHARPSL is not set
183# CONFIG_ARCH_PXA_ESERIES is not set
184# CONFIG_MACH_TRIZEPS4 is not set
185# CONFIG_MACH_EM_X270 is not set
186# CONFIG_MACH_COLIBRI is not set
187# CONFIG_MACH_ZYLONITE is not set
188# CONFIG_MACH_LITTLETON is not set
189# CONFIG_MACH_TAVOREVB is not set
190# CONFIG_MACH_SAAR is not set
191# CONFIG_MACH_ARMCORE is not set
192# CONFIG_MACH_MAGICIAN is not set
193# CONFIG_MACH_PCM027 is not set
194CONFIG_ARCH_PXA_PALM=y
195# CONFIG_MACH_PALMTX is not set
196CONFIG_MACH_PALMZ72=y
197# CONFIG_PXA_EZX is not set
198CONFIG_PXA27x=y
199CONFIG_PXA_PWM=y
200
201#
202# Boot options
203#
204
205#
206# Power management
207#
208
209#
210# Processor Type
211#
212CONFIG_CPU_32=y
213CONFIG_CPU_XSCALE=y
214CONFIG_CPU_32v5=y
215CONFIG_CPU_ABRT_EV5T=y
216CONFIG_CPU_PABRT_NOIFAR=y
217CONFIG_CPU_CACHE_VIVT=y
218CONFIG_CPU_TLB_V4WBI=y
219CONFIG_CPU_CP15=y
220CONFIG_CPU_CP15_MMU=y
221
222#
223# Processor Features
224#
225CONFIG_ARM_THUMB=y
226# CONFIG_CPU_DCACHE_DISABLE is not set
227# CONFIG_OUTER_CACHE is not set
228CONFIG_IWMMXT=y
229CONFIG_XSCALE_PMU=y
230
231#
232# Bus support
233#
234# CONFIG_PCI_SYSCALL is not set
235# CONFIG_ARCH_SUPPORTS_MSI is not set
236# CONFIG_PCCARD is not set
237
238#
239# Kernel Features
240#
241CONFIG_TICK_ONESHOT=y
242# CONFIG_NO_HZ is not set
243# CONFIG_HIGH_RES_TIMERS is not set
244CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
245CONFIG_PREEMPT=y
246CONFIG_HZ=100
247CONFIG_AEABI=y
248CONFIG_OABI_COMPAT=y
249# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
250CONFIG_SELECT_MEMORY_MODEL=y
251CONFIG_FLATMEM_MANUAL=y
252# CONFIG_DISCONTIGMEM_MANUAL is not set
253# CONFIG_SPARSEMEM_MANUAL is not set
254CONFIG_FLATMEM=y
255CONFIG_FLAT_NODE_MEM_MAP=y
256# CONFIG_SPARSEMEM_STATIC is not set
257# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
258CONFIG_PAGEFLAGS_EXTENDED=y
259CONFIG_SPLIT_PTLOCK_CPUS=4096
260# CONFIG_RESOURCES_64BIT is not set
261CONFIG_ZONE_DMA_FLAG=1
262CONFIG_BOUNCE=y
263CONFIG_VIRT_TO_BUS=y
264CONFIG_ALIGNMENT_TRAP=y
265
266#
267# Boot options
268#
269CONFIG_ZBOOT_ROM_TEXT=0x0
270CONFIG_ZBOOT_ROM_BSS=0x0
271CONFIG_CMDLINE="mem=32M console=tty root=/dev/mmcblk0"
272# CONFIG_XIP_KERNEL is not set
273# CONFIG_KEXEC is not set
274
275#
276# CPU Frequency scaling
277#
278# CONFIG_CPU_FREQ is not set
279
280#
281# Floating point emulation
282#
283
284#
285# At least one emulation must be selected
286#
287CONFIG_FPE_NWFPE=y
288# CONFIG_FPE_NWFPE_XP is not set
289# CONFIG_FPE_FASTFPE is not set
290
291#
292# Userspace binary formats
293#
294CONFIG_BINFMT_ELF=y
295# CONFIG_BINFMT_AOUT is not set
296# CONFIG_BINFMT_MISC is not set
297
298#
299# Power management options
300#
301CONFIG_PM=y
302# CONFIG_PM_DEBUG is not set
303CONFIG_PM_SLEEP=y
304CONFIG_SUSPEND=y
305CONFIG_SUSPEND_FREEZER=y
306CONFIG_APM_EMULATION=y
307CONFIG_ARCH_SUSPEND_POSSIBLE=y
308CONFIG_NET=y
309
310#
311# Networking options
312#
313CONFIG_PACKET=y
314# CONFIG_PACKET_MMAP is not set
315CONFIG_UNIX=y
316# CONFIG_NET_KEY is not set
317CONFIG_INET=y
318# CONFIG_IP_MULTICAST is not set
319# CONFIG_IP_ADVANCED_ROUTER is not set
320CONFIG_IP_FIB_HASH=y
321CONFIG_IP_PNP=y
322# CONFIG_IP_PNP_DHCP is not set
323CONFIG_IP_PNP_BOOTP=y
324# CONFIG_IP_PNP_RARP is not set
325# CONFIG_NET_IPIP is not set
326# CONFIG_NET_IPGRE is not set
327# CONFIG_ARPD is not set
328# CONFIG_SYN_COOKIES is not set
329# CONFIG_INET_AH is not set
330# CONFIG_INET_ESP is not set
331# CONFIG_INET_IPCOMP is not set
332# CONFIG_INET_XFRM_TUNNEL is not set
333# CONFIG_INET_TUNNEL is not set
334# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
335# CONFIG_INET_XFRM_MODE_TUNNEL is not set
336# CONFIG_INET_XFRM_MODE_BEET is not set
337# CONFIG_INET_LRO is not set
338CONFIG_INET_DIAG=y
339CONFIG_INET_TCP_DIAG=y
340# CONFIG_TCP_CONG_ADVANCED is not set
341CONFIG_TCP_CONG_CUBIC=y
342CONFIG_DEFAULT_TCP_CONG="cubic"
343# CONFIG_TCP_MD5SIG is not set
344# CONFIG_IPV6 is not set
345# CONFIG_NETWORK_SECMARK is not set
346# CONFIG_NETFILTER is not set
347# CONFIG_IP_DCCP is not set
348# CONFIG_IP_SCTP is not set
349# CONFIG_TIPC is not set
350# CONFIG_ATM is not set
351# CONFIG_BRIDGE is not set
352# CONFIG_VLAN_8021Q is not set
353# CONFIG_DECNET is not set
354# CONFIG_LLC2 is not set
355# CONFIG_IPX is not set
356# CONFIG_ATALK is not set
357# CONFIG_X25 is not set
358# CONFIG_LAPB is not set
359# CONFIG_ECONET is not set
360# CONFIG_WAN_ROUTER is not set
361# CONFIG_NET_SCHED is not set
362
363#
364# Network testing
365#
366# CONFIG_NET_PKTGEN is not set
367# CONFIG_HAMRADIO is not set
368# CONFIG_CAN is not set
369# CONFIG_IRDA is not set
370# CONFIG_BT is not set
371# CONFIG_AF_RXRPC is not set
372
373#
374# Wireless
375#
376# CONFIG_CFG80211 is not set
377# CONFIG_WIRELESS_EXT is not set
378# CONFIG_MAC80211 is not set
379# CONFIG_IEEE80211 is not set
380# CONFIG_RFKILL is not set
381# CONFIG_NET_9P is not set
382
383#
384# Device Drivers
385#
386
387#
388# Generic Driver Options
389#
390CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
391CONFIG_STANDALONE=y
392CONFIG_PREVENT_FIRMWARE_BUILD=y
393CONFIG_FW_LOADER=y
394CONFIG_FIRMWARE_IN_KERNEL=y
395CONFIG_EXTRA_FIRMWARE=""
396# CONFIG_SYS_HYPERVISOR is not set
397# CONFIG_CONNECTOR is not set
398# CONFIG_MTD is not set
399# CONFIG_PARPORT is not set
400CONFIG_BLK_DEV=y
401# CONFIG_BLK_DEV_COW_COMMON is not set
402CONFIG_BLK_DEV_LOOP=y
403# CONFIG_BLK_DEV_CRYPTOLOOP is not set
404# CONFIG_BLK_DEV_NBD is not set
405# CONFIG_BLK_DEV_RAM is not set
406# CONFIG_CDROM_PKTCDVD is not set
407# CONFIG_ATA_OVER_ETH is not set
408# CONFIG_MISC_DEVICES is not set
409CONFIG_HAVE_IDE=y
410# CONFIG_IDE is not set
411
412#
413# SCSI device support
414#
415# CONFIG_RAID_ATTRS is not set
416# CONFIG_SCSI is not set
417# CONFIG_SCSI_DMA is not set
418# CONFIG_SCSI_NETLINK is not set
419# CONFIG_ATA is not set
420# CONFIG_MD is not set
421# CONFIG_NETDEVICES is not set
422# CONFIG_ISDN is not set
423
424#
425# Input device support
426#
427CONFIG_INPUT=y
428# CONFIG_INPUT_FF_MEMLESS is not set
429# CONFIG_INPUT_POLLDEV is not set
430
431#
432# Userland interfaces
433#
434CONFIG_INPUT_MOUSEDEV=y
435# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
436CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
437CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
438# CONFIG_INPUT_JOYDEV is not set
439CONFIG_INPUT_EVDEV=y
440# CONFIG_INPUT_EVBUG is not set
441
442#
443# Input Device Drivers
444#
445CONFIG_INPUT_KEYBOARD=y
446# CONFIG_KEYBOARD_ATKBD is not set
447# CONFIG_KEYBOARD_SUNKBD is not set
448# CONFIG_KEYBOARD_LKKBD is not set
449# CONFIG_KEYBOARD_XTKBD is not set
450# CONFIG_KEYBOARD_NEWTON is not set
451# CONFIG_KEYBOARD_STOWAWAY is not set
452CONFIG_KEYBOARD_PXA27x=y
453# CONFIG_KEYBOARD_GPIO is not set
454# CONFIG_KEYBOARD_MATRIX is not set
455# CONFIG_INPUT_MOUSE is not set
456# CONFIG_INPUT_JOYSTICK is not set
457# CONFIG_INPUT_TABLET is not set
458# CONFIG_INPUT_TOUCHSCREEN is not set
459# CONFIG_INPUT_MISC is not set
460
461#
462# Hardware I/O ports
463#
464# CONFIG_SERIO is not set
465# CONFIG_GAMEPORT is not set
466
467#
468# Character devices
469#
470CONFIG_VT=y
471CONFIG_CONSOLE_TRANSLATIONS=y
472CONFIG_VT_CONSOLE=y
473CONFIG_HW_CONSOLE=y
474# CONFIG_VT_HW_CONSOLE_BINDING is not set
475CONFIG_DEVKMEM=y
476# CONFIG_SERIAL_NONSTANDARD is not set
477
478#
479# Serial drivers
480#
481# CONFIG_SERIAL_8250 is not set
482
483#
484# Non-8250 serial port support
485#
486# CONFIG_SERIAL_PXA is not set
487CONFIG_UNIX98_PTYS=y
488CONFIG_LEGACY_PTYS=y
489CONFIG_LEGACY_PTY_COUNT=256
490# CONFIG_IPMI_HANDLER is not set
491# CONFIG_HW_RANDOM is not set
492# CONFIG_NVRAM is not set
493# CONFIG_R3964 is not set
494# CONFIG_RAW_DRIVER is not set
495# CONFIG_TCG_TPM is not set
496CONFIG_I2C=y
497CONFIG_I2C_BOARDINFO=y
498# CONFIG_I2C_CHARDEV is not set
499CONFIG_I2C_HELPER_AUTO=y
500
501#
502# I2C Hardware Bus support
503#
504
505#
506# I2C system bus drivers (mostly embedded / system-on-chip)
507#
508# CONFIG_I2C_GPIO is not set
509# CONFIG_I2C_OCORES is not set
510CONFIG_I2C_PXA=y
511# CONFIG_I2C_PXA_SLAVE is not set
512# CONFIG_I2C_SIMTEC is not set
513
514#
515# External I2C/SMBus adapter drivers
516#
517# CONFIG_I2C_PARPORT_LIGHT is not set
518# CONFIG_I2C_TAOS_EVM is not set
519
520#
521# Other I2C/SMBus bus drivers
522#
523# CONFIG_I2C_PCA_PLATFORM is not set
524# CONFIG_I2C_STUB is not set
525
526#
527# Miscellaneous I2C Chip support
528#
529# CONFIG_DS1682 is not set
530# CONFIG_AT24 is not set
531# CONFIG_SENSORS_EEPROM is not set
532# CONFIG_SENSORS_PCF8574 is not set
533# CONFIG_PCF8575 is not set
534# CONFIG_SENSORS_PCA9539 is not set
535# CONFIG_SENSORS_PCF8591 is not set
536# CONFIG_TPS65010 is not set
537# CONFIG_SENSORS_MAX6875 is not set
538# CONFIG_SENSORS_TSL2550 is not set
539# CONFIG_I2C_DEBUG_CORE is not set
540# CONFIG_I2C_DEBUG_ALGO is not set
541# CONFIG_I2C_DEBUG_BUS is not set
542# CONFIG_I2C_DEBUG_CHIP is not set
543CONFIG_SPI=y
544CONFIG_SPI_MASTER=y
545
546#
547# SPI Master Controller Drivers
548#
549# CONFIG_SPI_BITBANG is not set
550# CONFIG_SPI_PXA2XX is not set
551
552#
553# SPI Protocol Masters
554#
555# CONFIG_SPI_AT25 is not set
556CONFIG_SPI_SPIDEV=y
557# CONFIG_SPI_TLE62X0 is not set
558CONFIG_ARCH_REQUIRE_GPIOLIB=y
559CONFIG_GPIOLIB=y
560CONFIG_GPIO_SYSFS=y
561
562#
563# I2C GPIO expanders:
564#
565# CONFIG_GPIO_MAX732X is not set
566# CONFIG_GPIO_PCA953X is not set
567# CONFIG_GPIO_PCF857X is not set
568
569#
570# PCI GPIO expanders:
571#
572
573#
574# SPI GPIO expanders:
575#
576# CONFIG_GPIO_MAX7301 is not set
577# CONFIG_GPIO_MCP23S08 is not set
578# CONFIG_W1 is not set
579CONFIG_POWER_SUPPLY=y
580# CONFIG_POWER_SUPPLY_DEBUG is not set
581CONFIG_PDA_POWER=y
582# CONFIG_APM_POWER is not set
583# CONFIG_BATTERY_DS2760 is not set
584# CONFIG_HWMON is not set
585# CONFIG_WATCHDOG is not set
586
587#
588# Sonics Silicon Backplane
589#
590CONFIG_SSB_POSSIBLE=y
591# CONFIG_SSB is not set
592
593#
594# Multifunction device drivers
595#
596# CONFIG_MFD_CORE is not set
597# CONFIG_MFD_SM501 is not set
598# CONFIG_HTC_EGPIO is not set
599# CONFIG_HTC_PASIC3 is not set
600# CONFIG_MFD_TMIO is not set
601# CONFIG_MFD_T7L66XB is not set
602# CONFIG_MFD_TC6387XB is not set
603# CONFIG_MFD_TC6393XB is not set
604
605#
606# Multimedia devices
607#
608
609#
610# Multimedia core support
611#
612# CONFIG_VIDEO_DEV is not set
613# CONFIG_DVB_CORE is not set
614# CONFIG_VIDEO_MEDIA is not set
615
616#
617# Multimedia drivers
618#
619# CONFIG_DAB is not set
620
621#
622# Graphics support
623#
624# CONFIG_VGASTATE is not set
625# CONFIG_VIDEO_OUTPUT_CONTROL is not set
626CONFIG_FB=y
627# CONFIG_FIRMWARE_EDID is not set
628# CONFIG_FB_DDC is not set
629CONFIG_FB_CFB_FILLRECT=y
630CONFIG_FB_CFB_COPYAREA=y
631CONFIG_FB_CFB_IMAGEBLIT=y
632# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
633# CONFIG_FB_SYS_FILLRECT is not set
634# CONFIG_FB_SYS_COPYAREA is not set
635# CONFIG_FB_SYS_IMAGEBLIT is not set
636# CONFIG_FB_FOREIGN_ENDIAN is not set
637# CONFIG_FB_SYS_FOPS is not set
638# CONFIG_FB_SVGALIB is not set
639# CONFIG_FB_MACMODES is not set
640# CONFIG_FB_BACKLIGHT is not set
641# CONFIG_FB_MODE_HELPERS is not set
642# CONFIG_FB_TILEBLITTING is not set
643
644#
645# Frame buffer hardware drivers
646#
647# CONFIG_FB_S1D13XXX is not set
648CONFIG_FB_PXA=y
649# CONFIG_FB_PXA_SMARTPANEL is not set
650# CONFIG_FB_PXA_PARAMETERS is not set
651# CONFIG_FB_MBX is not set
652# CONFIG_FB_W100 is not set
653# CONFIG_FB_AM200EPD is not set
654# CONFIG_FB_VIRTUAL is not set
655CONFIG_BACKLIGHT_LCD_SUPPORT=y
656# CONFIG_LCD_CLASS_DEVICE is not set
657CONFIG_BACKLIGHT_CLASS_DEVICE=y
658# CONFIG_BACKLIGHT_CORGI is not set
659CONFIG_BACKLIGHT_PWM=y
660
661#
662# Display device support
663#
664CONFIG_DISPLAY_SUPPORT=y
665
666#
667# Display hardware drivers
668#
669
670#
671# Console display driver support
672#
673# CONFIG_VGA_CONSOLE is not set
674CONFIG_DUMMY_CONSOLE=y
675CONFIG_FRAMEBUFFER_CONSOLE=y
676# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
677# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
678CONFIG_FONTS=y
679CONFIG_FONT_8x8=y
680# CONFIG_FONT_8x16 is not set
681# CONFIG_FONT_6x11 is not set
682# CONFIG_FONT_7x14 is not set
683# CONFIG_FONT_PEARL_8x8 is not set
684# CONFIG_FONT_ACORN_8x8 is not set
685# CONFIG_FONT_MINI_4x6 is not set
686# CONFIG_FONT_SUN8x16 is not set
687# CONFIG_FONT_SUN12x22 is not set
688# CONFIG_FONT_10x18 is not set
689# CONFIG_LOGO is not set
690# CONFIG_SOUND is not set
691# CONFIG_HID_SUPPORT is not set
692# CONFIG_USB_SUPPORT is not set
693CONFIG_MMC=y
694CONFIG_MMC_DEBUG=y
695# CONFIG_MMC_UNSAFE_RESUME is not set
696
697#
698# MMC/SD Card Drivers
699#
700CONFIG_MMC_BLOCK=y
701CONFIG_MMC_BLOCK_BOUNCE=y
702# CONFIG_SDIO_UART is not set
703# CONFIG_MMC_TEST is not set
704
705#
706# MMC/SD Host Controller Drivers
707#
708CONFIG_MMC_PXA=y
709# CONFIG_MMC_SDHCI is not set
710# CONFIG_MMC_SPI is not set
711# CONFIG_NEW_LEDS is not set
712CONFIG_RTC_LIB=y
713CONFIG_RTC_CLASS=y
714CONFIG_RTC_HCTOSYS=y
715CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
716# CONFIG_RTC_DEBUG is not set
717
718#
719# RTC interfaces
720#
721CONFIG_RTC_INTF_SYSFS=y
722CONFIG_RTC_INTF_PROC=y
723CONFIG_RTC_INTF_DEV=y
724# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
725# CONFIG_RTC_DRV_TEST is not set
726
727#
728# I2C RTC drivers
729#
730# CONFIG_RTC_DRV_DS1307 is not set
731# CONFIG_RTC_DRV_DS1374 is not set
732# CONFIG_RTC_DRV_DS1672 is not set
733# CONFIG_RTC_DRV_MAX6900 is not set
734# CONFIG_RTC_DRV_RS5C372 is not set
735# CONFIG_RTC_DRV_ISL1208 is not set
736# CONFIG_RTC_DRV_X1205 is not set
737# CONFIG_RTC_DRV_PCF8563 is not set
738# CONFIG_RTC_DRV_PCF8583 is not set
739# CONFIG_RTC_DRV_M41T80 is not set
740# CONFIG_RTC_DRV_S35390A is not set
741# CONFIG_RTC_DRV_FM3130 is not set
742
743#
744# SPI RTC drivers
745#
746# CONFIG_RTC_DRV_M41T94 is not set
747# CONFIG_RTC_DRV_DS1305 is not set
748# CONFIG_RTC_DRV_MAX6902 is not set
749# CONFIG_RTC_DRV_R9701 is not set
750# CONFIG_RTC_DRV_RS5C348 is not set
751
752#
753# Platform RTC drivers
754#
755# CONFIG_RTC_DRV_CMOS is not set
756# CONFIG_RTC_DRV_DS1511 is not set
757# CONFIG_RTC_DRV_DS1553 is not set
758# CONFIG_RTC_DRV_DS1742 is not set
759# CONFIG_RTC_DRV_STK17TA8 is not set
760# CONFIG_RTC_DRV_M48T86 is not set
761# CONFIG_RTC_DRV_M48T59 is not set
762# CONFIG_RTC_DRV_V3020 is not set
763
764#
765# on-CPU RTC drivers
766#
767CONFIG_RTC_DRV_SA1100=y
768# CONFIG_DMADEVICES is not set
769
770#
771# Voltage and Current regulators
772#
773# CONFIG_REGULATOR is not set
774# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
775# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
776# CONFIG_REGULATOR_BQ24022 is not set
777# CONFIG_UIO is not set
778
779#
780# File systems
781#
782CONFIG_EXT2_FS=y
783# CONFIG_EXT2_FS_XATTR is not set
784# CONFIG_EXT2_FS_XIP is not set
785CONFIG_EXT3_FS=y
786CONFIG_EXT3_FS_XATTR=y
787# CONFIG_EXT3_FS_POSIX_ACL is not set
788# CONFIG_EXT3_FS_SECURITY is not set
789# CONFIG_EXT4DEV_FS is not set
790CONFIG_JBD=y
791CONFIG_FS_MBCACHE=y
792# CONFIG_REISERFS_FS is not set
793# CONFIG_JFS_FS is not set
794# CONFIG_FS_POSIX_ACL is not set
795# CONFIG_XFS_FS is not set
796# CONFIG_OCFS2_FS is not set
797# CONFIG_DNOTIFY is not set
798# CONFIG_INOTIFY is not set
799# CONFIG_QUOTA is not set
800# CONFIG_AUTOFS_FS is not set
801# CONFIG_AUTOFS4_FS is not set
802# CONFIG_FUSE_FS is not set
803
804#
805# CD-ROM/DVD Filesystems
806#
807# CONFIG_ISO9660_FS is not set
808# CONFIG_UDF_FS is not set
809
810#
811# DOS/FAT/NT Filesystems
812#
813CONFIG_FAT_FS=y
814CONFIG_MSDOS_FS=y
815CONFIG_VFAT_FS=y
816CONFIG_FAT_DEFAULT_CODEPAGE=866
817CONFIG_FAT_DEFAULT_IOCHARSET="utf8"
818# CONFIG_NTFS_FS is not set
819
820#
821# Pseudo filesystems
822#
823CONFIG_PROC_FS=y
824CONFIG_PROC_SYSCTL=y
825CONFIG_SYSFS=y
826CONFIG_TMPFS=y
827# CONFIG_TMPFS_POSIX_ACL is not set
828# CONFIG_HUGETLB_PAGE is not set
829# CONFIG_CONFIGFS_FS is not set
830
831#
832# Miscellaneous filesystems
833#
834# CONFIG_ADFS_FS is not set
835# CONFIG_AFFS_FS is not set
836# CONFIG_HFS_FS is not set
837# CONFIG_HFSPLUS_FS is not set
838# CONFIG_BEFS_FS is not set
839# CONFIG_BFS_FS is not set
840# CONFIG_EFS_FS is not set
841# CONFIG_CRAMFS is not set
842# CONFIG_VXFS_FS is not set
843# CONFIG_MINIX_FS is not set
844# CONFIG_OMFS_FS is not set
845# CONFIG_HPFS_FS is not set
846# CONFIG_QNX4FS_FS is not set
847# CONFIG_ROMFS_FS is not set
848# CONFIG_SYSV_FS is not set
849# CONFIG_UFS_FS is not set
850# CONFIG_NETWORK_FILESYSTEMS is not set
851
852#
853# Partition Types
854#
855# CONFIG_PARTITION_ADVANCED is not set
856CONFIG_MSDOS_PARTITION=y
857CONFIG_NLS=y
858CONFIG_NLS_DEFAULT="utf8"
859# CONFIG_NLS_CODEPAGE_437 is not set
860# CONFIG_NLS_CODEPAGE_737 is not set
861# CONFIG_NLS_CODEPAGE_775 is not set
862# CONFIG_NLS_CODEPAGE_850 is not set
863# CONFIG_NLS_CODEPAGE_852 is not set
864# CONFIG_NLS_CODEPAGE_855 is not set
865# CONFIG_NLS_CODEPAGE_857 is not set
866# CONFIG_NLS_CODEPAGE_860 is not set
867# CONFIG_NLS_CODEPAGE_861 is not set
868# CONFIG_NLS_CODEPAGE_862 is not set
869# CONFIG_NLS_CODEPAGE_863 is not set
870# CONFIG_NLS_CODEPAGE_864 is not set
871# CONFIG_NLS_CODEPAGE_865 is not set
872CONFIG_NLS_CODEPAGE_866=y
873# CONFIG_NLS_CODEPAGE_869 is not set
874# CONFIG_NLS_CODEPAGE_936 is not set
875# CONFIG_NLS_CODEPAGE_950 is not set
876# CONFIG_NLS_CODEPAGE_932 is not set
877# CONFIG_NLS_CODEPAGE_949 is not set
878# CONFIG_NLS_CODEPAGE_874 is not set
879# CONFIG_NLS_ISO8859_8 is not set
880# CONFIG_NLS_CODEPAGE_1250 is not set
881# CONFIG_NLS_CODEPAGE_1251 is not set
882# CONFIG_NLS_ASCII is not set
883# CONFIG_NLS_ISO8859_1 is not set
884# CONFIG_NLS_ISO8859_2 is not set
885# CONFIG_NLS_ISO8859_3 is not set
886# CONFIG_NLS_ISO8859_4 is not set
887# CONFIG_NLS_ISO8859_5 is not set
888# CONFIG_NLS_ISO8859_6 is not set
889# CONFIG_NLS_ISO8859_7 is not set
890# CONFIG_NLS_ISO8859_9 is not set
891# CONFIG_NLS_ISO8859_13 is not set
892# CONFIG_NLS_ISO8859_14 is not set
893# CONFIG_NLS_ISO8859_15 is not set
894# CONFIG_NLS_KOI8_R is not set
895# CONFIG_NLS_KOI8_U is not set
896CONFIG_NLS_UTF8=y
897# CONFIG_DLM is not set
898
899#
900# Kernel hacking
901#
902# CONFIG_PRINTK_TIME is not set
903CONFIG_ENABLE_WARN_DEPRECATED=y
904CONFIG_ENABLE_MUST_CHECK=y
905CONFIG_FRAME_WARN=1024
906# CONFIG_MAGIC_SYSRQ is not set
907# CONFIG_UNUSED_SYMBOLS is not set
908# CONFIG_DEBUG_FS is not set
909# CONFIG_HEADERS_CHECK is not set
910# CONFIG_DEBUG_KERNEL is not set
911CONFIG_DEBUG_BUGVERBOSE=y
912CONFIG_DEBUG_MEMORY_INIT=y
913CONFIG_FRAME_POINTER=y
914# CONFIG_LATENCYTOP is not set
915CONFIG_SYSCTL_SYSCALL_CHECK=y
916CONFIG_HAVE_FTRACE=y
917CONFIG_HAVE_DYNAMIC_FTRACE=y
918# CONFIG_FTRACE is not set
919# CONFIG_IRQSOFF_TRACER is not set
920# CONFIG_PREEMPT_TRACER is not set
921# CONFIG_SCHED_TRACER is not set
922# CONFIG_CONTEXT_SWITCH_TRACER is not set
923# CONFIG_SAMPLES is not set
924CONFIG_HAVE_ARCH_KGDB=y
925CONFIG_DEBUG_USER=y
926
927#
928# Security options
929#
930# CONFIG_KEYS is not set
931# CONFIG_SECURITY is not set
932# CONFIG_SECURITY_FILE_CAPABILITIES is not set
933# CONFIG_CRYPTO is not set
934
935#
936# Library routines
937#
938CONFIG_BITREVERSE=y
939# CONFIG_GENERIC_FIND_FIRST_BIT is not set
940# CONFIG_GENERIC_FIND_NEXT_BIT is not set
941# CONFIG_CRC_CCITT is not set
942# CONFIG_CRC16 is not set
943CONFIG_CRC_T10DIF=y
944# CONFIG_CRC_ITU_T is not set
945CONFIG_CRC32=y
946# CONFIG_CRC7 is not set
947# CONFIG_LIBCRC32C is not set
948CONFIG_PLIST=y
949CONFIG_HAS_IOMEM=y
950CONFIG_HAS_IOPORT=y
951CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/viper_defconfig b/arch/arm/configs/viper_defconfig
new file mode 100644
index 000000000000..d01fecb8673e
--- /dev/null
+++ b/arch/arm/configs/viper_defconfig
@@ -0,0 +1,1678 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.27-rc4
4# Thu Aug 21 17:12:07 2008
5#
6CONFIG_ARM=y
7CONFIG_HAVE_PWM=y
8CONFIG_SYS_SUPPORTS_APM_EMULATION=y
9CONFIG_GENERIC_GPIO=y
10CONFIG_GENERIC_TIME=y
11CONFIG_GENERIC_CLOCKEVENTS=y
12CONFIG_MMU=y
13# CONFIG_NO_IOPORT is not set
14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_STACKTRACE_SUPPORT=y
16CONFIG_HAVE_LATENCYTOP_SUPPORT=y
17CONFIG_LOCKDEP_SUPPORT=y
18CONFIG_TRACE_IRQFLAGS_SUPPORT=y
19CONFIG_HARDIRQS_SW_RESEND=y
20CONFIG_GENERIC_IRQ_PROBE=y
21CONFIG_RWSEM_GENERIC_SPINLOCK=y
22# CONFIG_ARCH_HAS_ILOG2_U32 is not set
23# CONFIG_ARCH_HAS_ILOG2_U64 is not set
24CONFIG_GENERIC_HWEIGHT=y
25CONFIG_GENERIC_CALIBRATE_DELAY=y
26CONFIG_ARCH_SUPPORTS_AOUT=y
27CONFIG_ZONE_DMA=y
28CONFIG_ARCH_MTD_XIP=y
29CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
30CONFIG_VECTORS_BASE=0xffff0000
31CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
32
33#
34# General setup
35#
36CONFIG_EXPERIMENTAL=y
37CONFIG_BROKEN_ON_SMP=y
38CONFIG_INIT_ENV_ARG_LIMIT=32
39CONFIG_LOCALVERSION=""
40CONFIG_LOCALVERSION_AUTO=y
41# CONFIG_SWAP is not set
42CONFIG_SYSVIPC=y
43CONFIG_SYSVIPC_SYSCTL=y
44# CONFIG_POSIX_MQUEUE is not set
45# CONFIG_BSD_PROCESS_ACCT is not set
46# CONFIG_TASKSTATS is not set
47# CONFIG_AUDIT is not set
48# CONFIG_IKCONFIG is not set
49CONFIG_LOG_BUF_SHIFT=13
50# CONFIG_CGROUPS is not set
51# CONFIG_GROUP_SCHED is not set
52CONFIG_SYSFS_DEPRECATED=y
53CONFIG_SYSFS_DEPRECATED_V2=y
54# CONFIG_RELAY is not set
55# CONFIG_NAMESPACES is not set
56# CONFIG_BLK_DEV_INITRD is not set
57CONFIG_CC_OPTIMIZE_FOR_SIZE=y
58CONFIG_SYSCTL=y
59CONFIG_EMBEDDED=y
60CONFIG_UID16=y
61CONFIG_SYSCTL_SYSCALL=y
62CONFIG_KALLSYMS=y
63# CONFIG_KALLSYMS_ALL is not set
64# CONFIG_KALLSYMS_EXTRA_PASS is not set
65CONFIG_HOTPLUG=y
66CONFIG_PRINTK=y
67CONFIG_BUG=y
68# CONFIG_ELF_CORE is not set
69CONFIG_COMPAT_BRK=y
70CONFIG_BASE_FULL=y
71CONFIG_FUTEX=y
72CONFIG_ANON_INODES=y
73CONFIG_EPOLL=y
74CONFIG_SIGNALFD=y
75CONFIG_TIMERFD=y
76CONFIG_EVENTFD=y
77# CONFIG_SHMEM is not set
78CONFIG_VM_EVENT_COUNTERS=y
79CONFIG_SLAB=y
80# CONFIG_SLUB is not set
81# CONFIG_SLOB is not set
82# CONFIG_PROFILING is not set
83# CONFIG_MARKERS is not set
84CONFIG_HAVE_OPROFILE=y
85# CONFIG_KPROBES is not set
86# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
87# CONFIG_HAVE_IOREMAP_PROT is not set
88CONFIG_HAVE_KPROBES=y
89CONFIG_HAVE_KRETPROBES=y
90# CONFIG_HAVE_ARCH_TRACEHOOK is not set
91# CONFIG_HAVE_DMA_ATTRS is not set
92# CONFIG_USE_GENERIC_SMP_HELPERS is not set
93CONFIG_HAVE_CLK=y
94CONFIG_PROC_PAGE_MONITOR=y
95CONFIG_HAVE_GENERIC_DMA_COHERENT=y
96CONFIG_SLABINFO=y
97CONFIG_RT_MUTEXES=y
98CONFIG_TINY_SHMEM=y
99CONFIG_BASE_SMALL=0
100CONFIG_MODULES=y
101# CONFIG_MODULE_FORCE_LOAD is not set
102CONFIG_MODULE_UNLOAD=y
103# CONFIG_MODULE_FORCE_UNLOAD is not set
104# CONFIG_MODVERSIONS is not set
105# CONFIG_MODULE_SRCVERSION_ALL is not set
106CONFIG_KMOD=y
107CONFIG_BLOCK=y
108# CONFIG_LBD is not set
109# CONFIG_BLK_DEV_IO_TRACE is not set
110# CONFIG_LSF is not set
111# CONFIG_BLK_DEV_BSG is not set
112# CONFIG_BLK_DEV_INTEGRITY is not set
113
114#
115# IO Schedulers
116#
117CONFIG_IOSCHED_NOOP=y
118# CONFIG_IOSCHED_AS is not set
119CONFIG_IOSCHED_DEADLINE=y
120# CONFIG_IOSCHED_CFQ is not set
121# CONFIG_DEFAULT_AS is not set
122CONFIG_DEFAULT_DEADLINE=y
123# CONFIG_DEFAULT_CFQ is not set
124# CONFIG_DEFAULT_NOOP is not set
125CONFIG_DEFAULT_IOSCHED="deadline"
126CONFIG_CLASSIC_RCU=y
127
128#
129# System Type
130#
131# CONFIG_ARCH_AAEC2000 is not set
132# CONFIG_ARCH_INTEGRATOR is not set
133# CONFIG_ARCH_REALVIEW is not set
134# CONFIG_ARCH_VERSATILE is not set
135# CONFIG_ARCH_AT91 is not set
136# CONFIG_ARCH_CLPS7500 is not set
137# CONFIG_ARCH_CLPS711X is not set
138# CONFIG_ARCH_EBSA110 is not set
139# CONFIG_ARCH_EP93XX is not set
140# CONFIG_ARCH_FOOTBRIDGE is not set
141# CONFIG_ARCH_NETX is not set
142# CONFIG_ARCH_H720X is not set
143# CONFIG_ARCH_IMX is not set
144# CONFIG_ARCH_IOP13XX is not set
145# CONFIG_ARCH_IOP32X is not set
146# CONFIG_ARCH_IOP33X is not set
147# CONFIG_ARCH_IXP23XX is not set
148# CONFIG_ARCH_IXP2000 is not set
149# CONFIG_ARCH_IXP4XX is not set
150# CONFIG_ARCH_L7200 is not set
151# CONFIG_ARCH_KIRKWOOD is not set
152# CONFIG_ARCH_KS8695 is not set
153# CONFIG_ARCH_NS9XXX is not set
154# CONFIG_ARCH_LOKI is not set
155# CONFIG_ARCH_MV78XX0 is not set
156# CONFIG_ARCH_MXC is not set
157# CONFIG_ARCH_ORION5X is not set
158# CONFIG_ARCH_PNX4008 is not set
159CONFIG_ARCH_PXA=y
160# CONFIG_ARCH_RPC is not set
161# CONFIG_ARCH_SA1100 is not set
162# CONFIG_ARCH_S3C2410 is not set
163# CONFIG_ARCH_SHARK is not set
164# CONFIG_ARCH_LH7A40X is not set
165# CONFIG_ARCH_DAVINCI is not set
166# CONFIG_ARCH_OMAP is not set
167# CONFIG_ARCH_MSM7X00A is not set
168
169#
170# Intel PXA2xx/PXA3xx Implementations
171#
172# CONFIG_ARCH_GUMSTIX is not set
173# CONFIG_ARCH_LUBBOCK is not set
174# CONFIG_MACH_LOGICPD_PXA270 is not set
175# CONFIG_MACH_MAINSTONE is not set
176# CONFIG_ARCH_PXA_IDP is not set
177# CONFIG_PXA_SHARPSL is not set
178CONFIG_ARCH_VIPER=y
179# CONFIG_ARCH_PXA_ESERIES is not set
180# CONFIG_MACH_TRIZEPS4 is not set
181# CONFIG_MACH_EM_X270 is not set
182# CONFIG_MACH_COLIBRI is not set
183# CONFIG_MACH_ZYLONITE is not set
184# CONFIG_MACH_LITTLETON is not set
185# CONFIG_MACH_TAVOREVB is not set
186# CONFIG_MACH_SAAR is not set
187# CONFIG_MACH_ARMCORE is not set
188# CONFIG_MACH_MAGICIAN is not set
189# CONFIG_MACH_PCM027 is not set
190# CONFIG_ARCH_PXA_PALM is not set
191# CONFIG_PXA_EZX is not set
192CONFIG_PXA25x=y
193CONFIG_PXA_PWM=m
194CONFIG_PXA_HAVE_ISA_IRQS=y
195
196#
197# Boot options
198#
199
200#
201# Power management
202#
203
204#
205# Processor Type
206#
207CONFIG_CPU_32=y
208CONFIG_CPU_XSCALE=y
209CONFIG_CPU_32v5=y
210CONFIG_CPU_ABRT_EV5T=y
211CONFIG_CPU_PABRT_NOIFAR=y
212CONFIG_CPU_CACHE_VIVT=y
213CONFIG_CPU_TLB_V4WBI=y
214CONFIG_CPU_CP15=y
215CONFIG_CPU_CP15_MMU=y
216
217#
218# Processor Features
219#
220CONFIG_ARM_THUMB=y
221# CONFIG_CPU_DCACHE_DISABLE is not set
222# CONFIG_OUTER_CACHE is not set
223CONFIG_IWMMXT=y
224CONFIG_XSCALE_PMU=y
225
226#
227# Bus support
228#
229CONFIG_ISA=y
230# CONFIG_PCI_SYSCALL is not set
231# CONFIG_ARCH_SUPPORTS_MSI is not set
232CONFIG_PCCARD=m
233# CONFIG_PCMCIA_DEBUG is not set
234CONFIG_PCMCIA=m
235CONFIG_PCMCIA_LOAD_CIS=y
236CONFIG_PCMCIA_IOCTL=y
237
238#
239# PC-card bridges
240#
241# CONFIG_I82365 is not set
242# CONFIG_TCIC is not set
243CONFIG_PCMCIA_PXA2XX=m
244CONFIG_PCMCIA_PROBE=y
245
246#
247# Kernel Features
248#
249CONFIG_TICK_ONESHOT=y
250# CONFIG_NO_HZ is not set
251# CONFIG_HIGH_RES_TIMERS is not set
252CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
253# CONFIG_PREEMPT is not set
254CONFIG_HZ=100
255CONFIG_AEABI=y
256CONFIG_OABI_COMPAT=y
257# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
258CONFIG_SELECT_MEMORY_MODEL=y
259CONFIG_FLATMEM_MANUAL=y
260# CONFIG_DISCONTIGMEM_MANUAL is not set
261# CONFIG_SPARSEMEM_MANUAL is not set
262CONFIG_FLATMEM=y
263CONFIG_FLAT_NODE_MEM_MAP=y
264# CONFIG_SPARSEMEM_STATIC is not set
265# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
266CONFIG_PAGEFLAGS_EXTENDED=y
267CONFIG_SPLIT_PTLOCK_CPUS=4096
268# CONFIG_RESOURCES_64BIT is not set
269CONFIG_ZONE_DMA_FLAG=1
270CONFIG_BOUNCE=y
271CONFIG_VIRT_TO_BUS=y
272CONFIG_ALIGNMENT_TRAP=y
273
274#
275# Boot options
276#
277CONFIG_ZBOOT_ROM_TEXT=0x0
278CONFIG_ZBOOT_ROM_BSS=0x0
279CONFIG_CMDLINE="root=31:02 rootfstype=jffs2 ro console=ttyS0,115200"
280# CONFIG_XIP_KERNEL is not set
281# CONFIG_KEXEC is not set
282
283#
284# CPU Frequency scaling
285#
286CONFIG_CPU_FREQ=y
287CONFIG_CPU_FREQ_TABLE=y
288# CONFIG_CPU_FREQ_DEBUG is not set
289CONFIG_CPU_FREQ_STAT=y
290# CONFIG_CPU_FREQ_STAT_DETAILS is not set
291CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
292# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
293# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
294# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
295# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
296CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
297CONFIG_CPU_FREQ_GOV_POWERSAVE=m
298CONFIG_CPU_FREQ_GOV_USERSPACE=m
299CONFIG_CPU_FREQ_GOV_ONDEMAND=m
300CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m
301CONFIG_CPU_FREQ_PXA=y
302
303#
304# Floating point emulation
305#
306
307#
308# At least one emulation must be selected
309#
310# CONFIG_FPE_NWFPE is not set
311CONFIG_FPE_FASTFPE=y
312
313#
314# Userspace binary formats
315#
316CONFIG_BINFMT_ELF=y
317# CONFIG_BINFMT_AOUT is not set
318# CONFIG_BINFMT_MISC is not set
319
320#
321# Power management options
322#
323CONFIG_PM=y
324# CONFIG_PM_DEBUG is not set
325CONFIG_PM_SLEEP=y
326CONFIG_SUSPEND=y
327CONFIG_SUSPEND_FREEZER=y
328# CONFIG_APM_EMULATION is not set
329CONFIG_ARCH_SUSPEND_POSSIBLE=y
330CONFIG_NET=y
331
332#
333# Networking options
334#
335CONFIG_PACKET=y
336# CONFIG_PACKET_MMAP is not set
337CONFIG_UNIX=y
338CONFIG_XFRM=y
339# CONFIG_XFRM_USER is not set
340# CONFIG_XFRM_SUB_POLICY is not set
341# CONFIG_XFRM_MIGRATE is not set
342# CONFIG_XFRM_STATISTICS is not set
343# CONFIG_NET_KEY is not set
344CONFIG_INET=y
345# CONFIG_IP_MULTICAST is not set
346# CONFIG_IP_ADVANCED_ROUTER is not set
347CONFIG_IP_FIB_HASH=y
348CONFIG_IP_PNP=y
349CONFIG_IP_PNP_DHCP=y
350# CONFIG_IP_PNP_BOOTP is not set
351# CONFIG_IP_PNP_RARP is not set
352# CONFIG_NET_IPIP is not set
353# CONFIG_NET_IPGRE is not set
354# CONFIG_ARPD is not set
355CONFIG_SYN_COOKIES=y
356# CONFIG_INET_AH is not set
357# CONFIG_INET_ESP is not set
358# CONFIG_INET_IPCOMP is not set
359# CONFIG_INET_XFRM_TUNNEL is not set
360# CONFIG_INET_TUNNEL is not set
361CONFIG_INET_XFRM_MODE_TRANSPORT=y
362CONFIG_INET_XFRM_MODE_TUNNEL=y
363CONFIG_INET_XFRM_MODE_BEET=y
364# CONFIG_INET_LRO is not set
365CONFIG_INET_DIAG=y
366CONFIG_INET_TCP_DIAG=y
367# CONFIG_TCP_CONG_ADVANCED is not set
368CONFIG_TCP_CONG_CUBIC=y
369CONFIG_DEFAULT_TCP_CONG="cubic"
370# CONFIG_TCP_MD5SIG is not set
371# CONFIG_IPV6 is not set
372# CONFIG_NETWORK_SECMARK is not set
373# CONFIG_NETFILTER is not set
374# CONFIG_IP_DCCP is not set
375# CONFIG_IP_SCTP is not set
376# CONFIG_TIPC is not set
377# CONFIG_ATM is not set
378# CONFIG_BRIDGE is not set
379# CONFIG_VLAN_8021Q is not set
380# CONFIG_DECNET is not set
381# CONFIG_LLC2 is not set
382# CONFIG_IPX is not set
383# CONFIG_ATALK is not set
384# CONFIG_X25 is not set
385# CONFIG_LAPB is not set
386# CONFIG_ECONET is not set
387# CONFIG_WAN_ROUTER is not set
388# CONFIG_NET_SCHED is not set
389
390#
391# Network testing
392#
393# CONFIG_NET_PKTGEN is not set
394# CONFIG_HAMRADIO is not set
395# CONFIG_CAN is not set
396# CONFIG_IRDA is not set
397CONFIG_BT=m
398CONFIG_BT_L2CAP=m
399# CONFIG_BT_SCO is not set
400CONFIG_BT_RFCOMM=m
401CONFIG_BT_RFCOMM_TTY=y
402CONFIG_BT_BNEP=m
403# CONFIG_BT_BNEP_MC_FILTER is not set
404# CONFIG_BT_BNEP_PROTO_FILTER is not set
405# CONFIG_BT_HIDP is not set
406
407#
408# Bluetooth device drivers
409#
410CONFIG_BT_HCIUSB=m
411# CONFIG_BT_HCIUSB_SCO is not set
412# CONFIG_BT_HCIBTUSB is not set
413CONFIG_BT_HCIUART=m
414CONFIG_BT_HCIUART_H4=y
415CONFIG_BT_HCIUART_BCSP=y
416# CONFIG_BT_HCIUART_LL is not set
417# CONFIG_BT_HCIBCM203X is not set
418# CONFIG_BT_HCIBPA10X is not set
419# CONFIG_BT_HCIBFUSB is not set
420# CONFIG_BT_HCIDTL1 is not set
421# CONFIG_BT_HCIBT3C is not set
422# CONFIG_BT_HCIBLUECARD is not set
423# CONFIG_BT_HCIBTUART is not set
424# CONFIG_BT_HCIVHCI is not set
425# CONFIG_AF_RXRPC is not set
426
427#
428# Wireless
429#
430# CONFIG_CFG80211 is not set
431# CONFIG_WIRELESS_EXT is not set
432# CONFIG_MAC80211 is not set
433CONFIG_IEEE80211=m
434# CONFIG_IEEE80211_DEBUG is not set
435CONFIG_IEEE80211_CRYPT_WEP=m
436# CONFIG_IEEE80211_CRYPT_CCMP is not set
437# CONFIG_IEEE80211_CRYPT_TKIP is not set
438# CONFIG_RFKILL is not set
439# CONFIG_NET_9P is not set
440
441#
442# Device Drivers
443#
444
445#
446# Generic Driver Options
447#
448CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
449CONFIG_STANDALONE=y
450CONFIG_PREVENT_FIRMWARE_BUILD=y
451CONFIG_FW_LOADER=m
452CONFIG_FIRMWARE_IN_KERNEL=y
453CONFIG_EXTRA_FIRMWARE=""
454# CONFIG_DEBUG_DRIVER is not set
455# CONFIG_DEBUG_DEVRES is not set
456# CONFIG_SYS_HYPERVISOR is not set
457# CONFIG_CONNECTOR is not set
458CONFIG_MTD=y
459# CONFIG_MTD_DEBUG is not set
460# CONFIG_MTD_CONCAT is not set
461CONFIG_MTD_PARTITIONS=y
462CONFIG_MTD_REDBOOT_PARTS=y
463CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=0
464# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
465# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
466# CONFIG_MTD_CMDLINE_PARTS is not set
467# CONFIG_MTD_AFS_PARTS is not set
468# CONFIG_MTD_AR7_PARTS is not set
469
470#
471# User Modules And Translation Layers
472#
473CONFIG_MTD_CHAR=m
474CONFIG_MTD_BLKDEVS=y
475CONFIG_MTD_BLOCK=y
476# CONFIG_FTL is not set
477# CONFIG_NFTL is not set
478# CONFIG_INFTL is not set
479# CONFIG_RFD_FTL is not set
480# CONFIG_SSFDC is not set
481# CONFIG_MTD_OOPS is not set
482
483#
484# RAM/ROM/Flash chip drivers
485#
486CONFIG_MTD_CFI=y
487CONFIG_MTD_JEDECPROBE=y
488CONFIG_MTD_GEN_PROBE=y
489CONFIG_MTD_CFI_ADV_OPTIONS=y
490CONFIG_MTD_CFI_NOSWAP=y
491# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
492# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
493CONFIG_MTD_CFI_GEOMETRY=y
494CONFIG_MTD_MAP_BANK_WIDTH_1=y
495CONFIG_MTD_MAP_BANK_WIDTH_2=y
496# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
497# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
498# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
499# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
500CONFIG_MTD_CFI_I1=y
501# CONFIG_MTD_CFI_I2 is not set
502# CONFIG_MTD_CFI_I4 is not set
503# CONFIG_MTD_CFI_I8 is not set
504# CONFIG_MTD_OTP is not set
505CONFIG_MTD_CFI_INTELEXT=y
506CONFIG_MTD_CFI_AMDSTD=y
507# CONFIG_MTD_CFI_STAA is not set
508CONFIG_MTD_CFI_UTIL=y
509CONFIG_MTD_RAM=y
510# CONFIG_MTD_ROM is not set
511# CONFIG_MTD_ABSENT is not set
512# CONFIG_MTD_XIP is not set
513
514#
515# Mapping drivers for chip access
516#
517CONFIG_MTD_COMPLEX_MAPPINGS=y
518CONFIG_MTD_PHYSMAP=y
519CONFIG_MTD_PHYSMAP_START=0x8000000
520CONFIG_MTD_PHYSMAP_LEN=0
521CONFIG_MTD_PHYSMAP_BANKWIDTH=2
522CONFIG_MTD_PXA2XX=y
523# CONFIG_MTD_ARM_INTEGRATOR is not set
524# CONFIG_MTD_IMPA7 is not set
525# CONFIG_MTD_SHARP_SL is not set
526# CONFIG_MTD_PLATRAM is not set
527CONFIG_MTD_SPARSE_RAM=y
528
529#
530# Self-contained MTD device drivers
531#
532# CONFIG_MTD_SLRAM is not set
533# CONFIG_MTD_PHRAM is not set
534# CONFIG_MTD_MTDRAM is not set
535# CONFIG_MTD_BLOCK2MTD is not set
536
537#
538# Disk-On-Chip Device Drivers
539#
540# CONFIG_MTD_DOC2000 is not set
541# CONFIG_MTD_DOC2001 is not set
542# CONFIG_MTD_DOC2001PLUS is not set
543# CONFIG_MTD_NAND is not set
544# CONFIG_MTD_ONENAND is not set
545
546#
547# UBI - Unsorted block images
548#
549# CONFIG_MTD_UBI is not set
550# CONFIG_PARPORT is not set
551# CONFIG_PNP is not set
552CONFIG_BLK_DEV=y
553# CONFIG_BLK_DEV_COW_COMMON is not set
554CONFIG_BLK_DEV_LOOP=m
555# CONFIG_BLK_DEV_CRYPTOLOOP is not set
556# CONFIG_BLK_DEV_NBD is not set
557# CONFIG_BLK_DEV_UB is not set
558# CONFIG_BLK_DEV_RAM is not set
559# CONFIG_CDROM_PKTCDVD is not set
560# CONFIG_ATA_OVER_ETH is not set
561CONFIG_MISC_DEVICES=y
562# CONFIG_EEPROM_93CX6 is not set
563# CONFIG_ENCLOSURE_SERVICES is not set
564CONFIG_HAVE_IDE=y
565# CONFIG_IDE is not set
566
567#
568# SCSI device support
569#
570# CONFIG_RAID_ATTRS is not set
571CONFIG_SCSI=m
572CONFIG_SCSI_DMA=y
573# CONFIG_SCSI_TGT is not set
574# CONFIG_SCSI_NETLINK is not set
575# CONFIG_SCSI_PROC_FS is not set
576
577#
578# SCSI support type (disk, tape, CD-ROM)
579#
580CONFIG_BLK_DEV_SD=m
581# CONFIG_CHR_DEV_ST is not set
582# CONFIG_CHR_DEV_OSST is not set
583# CONFIG_BLK_DEV_SR is not set
584# CONFIG_CHR_DEV_SG is not set
585# CONFIG_CHR_DEV_SCH is not set
586
587#
588# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
589#
590# CONFIG_SCSI_MULTI_LUN is not set
591# CONFIG_SCSI_CONSTANTS is not set
592# CONFIG_SCSI_LOGGING is not set
593# CONFIG_SCSI_SCAN_ASYNC is not set
594CONFIG_SCSI_WAIT_SCAN=m
595
596#
597# SCSI Transports
598#
599# CONFIG_SCSI_SPI_ATTRS is not set
600# CONFIG_SCSI_FC_ATTRS is not set
601# CONFIG_SCSI_ISCSI_ATTRS is not set
602# CONFIG_SCSI_SAS_LIBSAS is not set
603# CONFIG_SCSI_SRP_ATTRS is not set
604CONFIG_SCSI_LOWLEVEL=y
605# CONFIG_ISCSI_TCP is not set
606# CONFIG_SCSI_AHA152X is not set
607# CONFIG_SCSI_AIC7XXX_OLD is not set
608# CONFIG_SCSI_ADVANSYS is not set
609# CONFIG_SCSI_IN2000 is not set
610# CONFIG_SCSI_DTC3280 is not set
611# CONFIG_SCSI_FUTURE_DOMAIN is not set
612# CONFIG_SCSI_GENERIC_NCR5380 is not set
613# CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set
614# CONFIG_SCSI_NCR53C406A is not set
615# CONFIG_SCSI_PAS16 is not set
616# CONFIG_SCSI_QLOGIC_FAS is not set
617# CONFIG_SCSI_SYM53C416 is not set
618# CONFIG_SCSI_T128 is not set
619# CONFIG_SCSI_DEBUG is not set
620# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set
621# CONFIG_SCSI_DH is not set
622CONFIG_ATA=m
623# CONFIG_ATA_NONSTANDARD is not set
624# CONFIG_SATA_PMP is not set
625CONFIG_ATA_SFF=y
626# CONFIG_SATA_MV is not set
627# CONFIG_PATA_LEGACY is not set
628CONFIG_PATA_PCMCIA=m
629# CONFIG_PATA_QDI is not set
630# CONFIG_PATA_WINBOND_VLB is not set
631# CONFIG_PATA_PLATFORM is not set
632# CONFIG_MD is not set
633CONFIG_NETDEVICES=y
634# CONFIG_DUMMY is not set
635# CONFIG_BONDING is not set
636# CONFIG_MACVLAN is not set
637# CONFIG_EQUALIZER is not set
638# CONFIG_TUN is not set
639# CONFIG_VETH is not set
640# CONFIG_ARCNET is not set
641# CONFIG_PHYLIB is not set
642CONFIG_NET_ETHERNET=y
643CONFIG_MII=y
644# CONFIG_AX88796 is not set
645# CONFIG_NET_VENDOR_3COM is not set
646# CONFIG_NET_VENDOR_SMC is not set
647CONFIG_SMC91X=y
648# CONFIG_DM9000 is not set
649# CONFIG_SMC911X is not set
650# CONFIG_NET_VENDOR_RACAL is not set
651# CONFIG_AT1700 is not set
652# CONFIG_DEPCA is not set
653# CONFIG_HP100 is not set
654# CONFIG_NET_ISA is not set
655# CONFIG_IBM_NEW_EMAC_ZMII is not set
656# CONFIG_IBM_NEW_EMAC_RGMII is not set
657# CONFIG_IBM_NEW_EMAC_TAH is not set
658# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
659# CONFIG_NET_PCI is not set
660# CONFIG_B44 is not set
661# CONFIG_NETDEV_1000 is not set
662# CONFIG_NETDEV_10000 is not set
663# CONFIG_TR is not set
664
665#
666# Wireless LAN
667#
668# CONFIG_WLAN_PRE80211 is not set
669# CONFIG_WLAN_80211 is not set
670# CONFIG_IWLWIFI_LEDS is not set
671
672#
673# USB Network Adapters
674#
675# CONFIG_USB_CATC is not set
676# CONFIG_USB_KAWETH is not set
677CONFIG_USB_PEGASUS=m
678# CONFIG_USB_RTL8150 is not set
679CONFIG_USB_USBNET=m
680CONFIG_USB_NET_AX8817X=m
681CONFIG_USB_NET_CDCETHER=m
682# CONFIG_USB_NET_DM9601 is not set
683# CONFIG_USB_NET_GL620A is not set
684CONFIG_USB_NET_NET1080=m
685# CONFIG_USB_NET_PLUSB is not set
686# CONFIG_USB_NET_MCS7830 is not set
687# CONFIG_USB_NET_RNDIS_HOST is not set
688# CONFIG_USB_NET_CDC_SUBSET is not set
689CONFIG_USB_NET_ZAURUS=m
690CONFIG_NET_PCMCIA=y
691# CONFIG_PCMCIA_3C589 is not set
692# CONFIG_PCMCIA_3C574 is not set
693# CONFIG_PCMCIA_FMVJ18X is not set
694# CONFIG_PCMCIA_PCNET is not set
695# CONFIG_PCMCIA_NMCLAN is not set
696# CONFIG_PCMCIA_SMC91C92 is not set
697# CONFIG_PCMCIA_XIRC2PS is not set
698# CONFIG_PCMCIA_AXNET is not set
699# CONFIG_WAN is not set
700CONFIG_PPP=m
701# CONFIG_PPP_MULTILINK is not set
702# CONFIG_PPP_FILTER is not set
703CONFIG_PPP_ASYNC=m
704# CONFIG_PPP_SYNC_TTY is not set
705CONFIG_PPP_DEFLATE=m
706CONFIG_PPP_BSDCOMP=m
707# CONFIG_PPP_MPPE is not set
708# CONFIG_PPPOE is not set
709# CONFIG_PPPOL2TP is not set
710# CONFIG_SLIP is not set
711CONFIG_SLHC=m
712# CONFIG_NETCONSOLE is not set
713# CONFIG_NETPOLL is not set
714# CONFIG_NET_POLL_CONTROLLER is not set
715# CONFIG_ISDN is not set
716
717#
718# Input device support
719#
720CONFIG_INPUT=y
721# CONFIG_INPUT_FF_MEMLESS is not set
722# CONFIG_INPUT_POLLDEV is not set
723
724#
725# Userland interfaces
726#
727CONFIG_INPUT_MOUSEDEV=m
728# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
729CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
730CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
731# CONFIG_INPUT_JOYDEV is not set
732CONFIG_INPUT_EVDEV=m
733# CONFIG_INPUT_EVBUG is not set
734
735#
736# Input Device Drivers
737#
738# CONFIG_INPUT_KEYBOARD is not set
739# CONFIG_INPUT_MOUSE is not set
740# CONFIG_INPUT_JOYSTICK is not set
741# CONFIG_INPUT_TABLET is not set
742CONFIG_INPUT_TOUCHSCREEN=y
743CONFIG_TOUCHSCREEN_FUJITSU=m
744# CONFIG_TOUCHSCREEN_GUNZE is not set
745CONFIG_TOUCHSCREEN_ELO=m
746CONFIG_TOUCHSCREEN_MTOUCH=m
747CONFIG_TOUCHSCREEN_INEXIO=m
748# CONFIG_TOUCHSCREEN_MK712 is not set
749CONFIG_TOUCHSCREEN_HTCPEN=m
750CONFIG_TOUCHSCREEN_PENMOUNT=m
751CONFIG_TOUCHSCREEN_TOUCHRIGHT=m
752CONFIG_TOUCHSCREEN_TOUCHWIN=m
753# CONFIG_TOUCHSCREEN_UCB1400 is not set
754# CONFIG_TOUCHSCREEN_WM97XX is not set
755# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
756CONFIG_TOUCHSCREEN_TOUCHIT213=m
757CONFIG_INPUT_MISC=y
758# CONFIG_INPUT_ATI_REMOTE is not set
759# CONFIG_INPUT_ATI_REMOTE2 is not set
760# CONFIG_INPUT_KEYSPAN_REMOTE is not set
761# CONFIG_INPUT_POWERMATE is not set
762# CONFIG_INPUT_YEALINK is not set
763CONFIG_INPUT_UINPUT=m
764
765#
766# Hardware I/O ports
767#
768CONFIG_SERIO=y
769CONFIG_SERIO_SERPORT=y
770# CONFIG_SERIO_LIBPS2 is not set
771# CONFIG_SERIO_RAW is not set
772# CONFIG_GAMEPORT is not set
773
774#
775# Character devices
776#
777CONFIG_VT=y
778# CONFIG_CONSOLE_TRANSLATIONS is not set
779# CONFIG_VT_CONSOLE is not set
780CONFIG_HW_CONSOLE=y
781# CONFIG_VT_HW_CONSOLE_BINDING is not set
782CONFIG_DEVKMEM=y
783# CONFIG_SERIAL_NONSTANDARD is not set
784
785#
786# Serial drivers
787#
788CONFIG_SERIAL_8250=m
789# CONFIG_SERIAL_8250_CS is not set
790CONFIG_SERIAL_8250_NR_UARTS=5
791CONFIG_SERIAL_8250_RUNTIME_UARTS=5
792# CONFIG_SERIAL_8250_EXTENDED is not set
793
794#
795# Non-8250 serial port support
796#
797CONFIG_SERIAL_PXA=y
798CONFIG_SERIAL_PXA_CONSOLE=y
799CONFIG_SERIAL_CORE=y
800CONFIG_SERIAL_CORE_CONSOLE=y
801CONFIG_UNIX98_PTYS=y
802# CONFIG_LEGACY_PTYS is not set
803# CONFIG_IPMI_HANDLER is not set
804CONFIG_HW_RANDOM=m
805# CONFIG_NVRAM is not set
806# CONFIG_DTLK is not set
807# CONFIG_R3964 is not set
808
809#
810# PCMCIA character devices
811#
812# CONFIG_SYNCLINK_CS is not set
813# CONFIG_CARDMAN_4000 is not set
814# CONFIG_CARDMAN_4040 is not set
815# CONFIG_IPWIRELESS is not set
816# CONFIG_RAW_DRIVER is not set
817# CONFIG_TCG_TPM is not set
818CONFIG_DEVPORT=y
819CONFIG_I2C=y
820CONFIG_I2C_BOARDINFO=y
821CONFIG_I2C_CHARDEV=y
822# CONFIG_I2C_HELPER_AUTO is not set
823
824#
825# I2C Algorithms
826#
827CONFIG_I2C_ALGOBIT=y
828# CONFIG_I2C_ALGOPCF is not set
829# CONFIG_I2C_ALGOPCA is not set
830
831#
832# I2C Hardware Bus support
833#
834
835#
836# I2C system bus drivers (mostly embedded / system-on-chip)
837#
838CONFIG_I2C_GPIO=y
839# CONFIG_I2C_OCORES is not set
840CONFIG_I2C_PXA=y
841# CONFIG_I2C_PXA_SLAVE is not set
842# CONFIG_I2C_SIMTEC is not set
843
844#
845# External I2C/SMBus adapter drivers
846#
847# CONFIG_I2C_PARPORT_LIGHT is not set
848# CONFIG_I2C_TAOS_EVM is not set
849# CONFIG_I2C_TINY_USB is not set
850
851#
852# Other I2C/SMBus bus drivers
853#
854# CONFIG_I2C_ELEKTOR is not set
855# CONFIG_I2C_PCA_ISA is not set
856# CONFIG_I2C_PCA_PLATFORM is not set
857# CONFIG_I2C_STUB is not set
858
859#
860# Miscellaneous I2C Chip support
861#
862# CONFIG_DS1682 is not set
863# CONFIG_AT24 is not set
864# CONFIG_SENSORS_EEPROM is not set
865# CONFIG_SENSORS_PCF8574 is not set
866# CONFIG_PCF8575 is not set
867# CONFIG_SENSORS_PCA9539 is not set
868# CONFIG_SENSORS_PCF8591 is not set
869# CONFIG_TPS65010 is not set
870# CONFIG_SENSORS_MAX6875 is not set
871# CONFIG_SENSORS_TSL2550 is not set
872# CONFIG_I2C_DEBUG_CORE is not set
873# CONFIG_I2C_DEBUG_ALGO is not set
874# CONFIG_I2C_DEBUG_BUS is not set
875# CONFIG_I2C_DEBUG_CHIP is not set
876# CONFIG_SPI is not set
877CONFIG_ARCH_REQUIRE_GPIOLIB=y
878CONFIG_GPIOLIB=y
879# CONFIG_DEBUG_GPIO is not set
880CONFIG_GPIO_SYSFS=y
881
882#
883# I2C GPIO expanders:
884#
885# CONFIG_GPIO_MAX732X is not set
886# CONFIG_GPIO_PCA953X is not set
887# CONFIG_GPIO_PCF857X is not set
888
889#
890# PCI GPIO expanders:
891#
892
893#
894# SPI GPIO expanders:
895#
896# CONFIG_W1 is not set
897# CONFIG_POWER_SUPPLY is not set
898CONFIG_HWMON=y
899# CONFIG_HWMON_VID is not set
900# CONFIG_SENSORS_AD7414 is not set
901# CONFIG_SENSORS_AD7418 is not set
902# CONFIG_SENSORS_ADM1021 is not set
903# CONFIG_SENSORS_ADM1025 is not set
904# CONFIG_SENSORS_ADM1026 is not set
905# CONFIG_SENSORS_ADM1029 is not set
906# CONFIG_SENSORS_ADM1031 is not set
907# CONFIG_SENSORS_ADM9240 is not set
908# CONFIG_SENSORS_ADT7470 is not set
909# CONFIG_SENSORS_ADT7473 is not set
910# CONFIG_SENSORS_ATXP1 is not set
911# CONFIG_SENSORS_DS1621 is not set
912# CONFIG_SENSORS_F71805F is not set
913# CONFIG_SENSORS_F71882FG is not set
914# CONFIG_SENSORS_F75375S is not set
915# CONFIG_SENSORS_GL518SM is not set
916# CONFIG_SENSORS_GL520SM is not set
917# CONFIG_SENSORS_IT87 is not set
918# CONFIG_SENSORS_LM63 is not set
919# CONFIG_SENSORS_LM75 is not set
920# CONFIG_SENSORS_LM77 is not set
921# CONFIG_SENSORS_LM78 is not set
922# CONFIG_SENSORS_LM80 is not set
923# CONFIG_SENSORS_LM83 is not set
924# CONFIG_SENSORS_LM85 is not set
925# CONFIG_SENSORS_LM87 is not set
926# CONFIG_SENSORS_LM90 is not set
927# CONFIG_SENSORS_LM92 is not set
928# CONFIG_SENSORS_LM93 is not set
929# CONFIG_SENSORS_MAX1619 is not set
930# CONFIG_SENSORS_MAX6650 is not set
931# CONFIG_SENSORS_PC87360 is not set
932# CONFIG_SENSORS_PC87427 is not set
933# CONFIG_SENSORS_DME1737 is not set
934# CONFIG_SENSORS_SMSC47M1 is not set
935# CONFIG_SENSORS_SMSC47M192 is not set
936# CONFIG_SENSORS_SMSC47B397 is not set
937# CONFIG_SENSORS_ADS7828 is not set
938# CONFIG_SENSORS_THMC50 is not set
939# CONFIG_SENSORS_VT1211 is not set
940# CONFIG_SENSORS_W83781D is not set
941# CONFIG_SENSORS_W83791D is not set
942# CONFIG_SENSORS_W83792D is not set
943# CONFIG_SENSORS_W83793 is not set
944# CONFIG_SENSORS_W83L785TS is not set
945# CONFIG_SENSORS_W83L786NG is not set
946# CONFIG_SENSORS_W83627HF is not set
947# CONFIG_SENSORS_W83627EHF is not set
948# CONFIG_HWMON_DEBUG_CHIP is not set
949CONFIG_WATCHDOG=y
950# CONFIG_WATCHDOG_NOWAYOUT is not set
951
952#
953# Watchdog Device Drivers
954#
955# CONFIG_SOFT_WATCHDOG is not set
956# CONFIG_SA1100_WATCHDOG is not set
957
958#
959# ISA-based Watchdog Cards
960#
961# CONFIG_PCWATCHDOG is not set
962# CONFIG_MIXCOMWD is not set
963# CONFIG_WDT is not set
964
965#
966# USB-based Watchdog Cards
967#
968# CONFIG_USBPCWATCHDOG is not set
969
970#
971# Sonics Silicon Backplane
972#
973CONFIG_SSB_POSSIBLE=y
974# CONFIG_SSB is not set
975
976#
977# Multifunction device drivers
978#
979# CONFIG_MFD_CORE is not set
980# CONFIG_MFD_SM501 is not set
981# CONFIG_HTC_EGPIO is not set
982# CONFIG_HTC_PASIC3 is not set
983# CONFIG_MFD_TMIO is not set
984# CONFIG_MFD_T7L66XB is not set
985# CONFIG_MFD_TC6387XB is not set
986# CONFIG_MFD_TC6393XB is not set
987
988#
989# Multimedia devices
990#
991
992#
993# Multimedia core support
994#
995# CONFIG_VIDEO_DEV is not set
996# CONFIG_DVB_CORE is not set
997# CONFIG_VIDEO_MEDIA is not set
998
999#
1000# Multimedia drivers
1001#
1002# CONFIG_DAB is not set
1003
1004#
1005# Graphics support
1006#
1007# CONFIG_VGASTATE is not set
1008# CONFIG_VIDEO_OUTPUT_CONTROL is not set
1009CONFIG_FB=y
1010# CONFIG_FIRMWARE_EDID is not set
1011# CONFIG_FB_DDC is not set
1012CONFIG_FB_CFB_FILLRECT=m
1013CONFIG_FB_CFB_COPYAREA=m
1014CONFIG_FB_CFB_IMAGEBLIT=m
1015# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
1016# CONFIG_FB_SYS_FILLRECT is not set
1017# CONFIG_FB_SYS_COPYAREA is not set
1018# CONFIG_FB_SYS_IMAGEBLIT is not set
1019# CONFIG_FB_FOREIGN_ENDIAN is not set
1020# CONFIG_FB_SYS_FOPS is not set
1021# CONFIG_FB_SVGALIB is not set
1022# CONFIG_FB_MACMODES is not set
1023# CONFIG_FB_BACKLIGHT is not set
1024# CONFIG_FB_MODE_HELPERS is not set
1025# CONFIG_FB_TILEBLITTING is not set
1026
1027#
1028# Frame buffer hardware drivers
1029#
1030# CONFIG_FB_S1D13XXX is not set
1031CONFIG_FB_PXA=m
1032# CONFIG_FB_PXA_SMARTPANEL is not set
1033CONFIG_FB_PXA_PARAMETERS=y
1034# CONFIG_FB_MBX is not set
1035# CONFIG_FB_W100 is not set
1036# CONFIG_FB_AM200EPD is not set
1037# CONFIG_FB_VIRTUAL is not set
1038CONFIG_BACKLIGHT_LCD_SUPPORT=y
1039CONFIG_LCD_CLASS_DEVICE=m
1040# CONFIG_LCD_ILI9320 is not set
1041# CONFIG_LCD_PLATFORM is not set
1042CONFIG_BACKLIGHT_CLASS_DEVICE=m
1043# CONFIG_BACKLIGHT_CORGI is not set
1044CONFIG_BACKLIGHT_PWM=m
1045
1046#
1047# Display device support
1048#
1049# CONFIG_DISPLAY_SUPPORT is not set
1050
1051#
1052# Console display driver support
1053#
1054# CONFIG_VGA_CONSOLE is not set
1055# CONFIG_MDA_CONSOLE is not set
1056CONFIG_DUMMY_CONSOLE=y
1057CONFIG_FRAMEBUFFER_CONSOLE=m
1058# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
1059# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
1060# CONFIG_FONTS is not set
1061CONFIG_FONT_8x8=y
1062CONFIG_FONT_8x16=y
1063CONFIG_LOGO=y
1064CONFIG_LOGO_LINUX_MONO=y
1065CONFIG_LOGO_LINUX_VGA16=y
1066CONFIG_LOGO_LINUX_CLUT224=y
1067CONFIG_SOUND=m
1068CONFIG_SND=m
1069CONFIG_SND_TIMER=m
1070CONFIG_SND_PCM=m
1071# CONFIG_SND_SEQUENCER is not set
1072CONFIG_SND_OSSEMUL=y
1073CONFIG_SND_MIXER_OSS=m
1074CONFIG_SND_PCM_OSS=m
1075CONFIG_SND_PCM_OSS_PLUGINS=y
1076# CONFIG_SND_DYNAMIC_MINORS is not set
1077CONFIG_SND_SUPPORT_OLD_API=y
1078CONFIG_SND_VERBOSE_PROCFS=y
1079# CONFIG_SND_VERBOSE_PRINTK is not set
1080# CONFIG_SND_DEBUG is not set
1081CONFIG_SND_VMASTER=y
1082CONFIG_SND_AC97_CODEC=m
1083CONFIG_SND_DRIVERS=y
1084# CONFIG_SND_DUMMY is not set
1085# CONFIG_SND_MTPAV is not set
1086# CONFIG_SND_SERIAL_U16550 is not set
1087# CONFIG_SND_MPU401 is not set
1088# CONFIG_SND_AC97_POWER_SAVE is not set
1089CONFIG_SND_ARM=y
1090CONFIG_SND_PXA2XX_PCM=m
1091CONFIG_SND_PXA2XX_AC97=m
1092CONFIG_SND_USB=y
1093# CONFIG_SND_USB_AUDIO is not set
1094# CONFIG_SND_USB_CAIAQ is not set
1095CONFIG_SND_PCMCIA=y
1096# CONFIG_SND_VXPOCKET is not set
1097# CONFIG_SND_PDAUDIOCF is not set
1098# CONFIG_SND_SOC is not set
1099# CONFIG_SOUND_PRIME is not set
1100CONFIG_AC97_BUS=m
1101CONFIG_HID_SUPPORT=y
1102CONFIG_HID=y
1103# CONFIG_HID_DEBUG is not set
1104# CONFIG_HIDRAW is not set
1105
1106#
1107# USB Input Devices
1108#
1109CONFIG_USB_HID=m
1110# CONFIG_USB_HIDINPUT_POWERBOOK is not set
1111# CONFIG_HID_FF is not set
1112# CONFIG_USB_HIDDEV is not set
1113
1114#
1115# USB HID Boot Protocol drivers
1116#
1117# CONFIG_USB_KBD is not set
1118# CONFIG_USB_MOUSE is not set
1119CONFIG_USB_SUPPORT=y
1120CONFIG_USB_ARCH_HAS_HCD=y
1121# CONFIG_USB_ARCH_HAS_OHCI is not set
1122# CONFIG_USB_ARCH_HAS_EHCI is not set
1123CONFIG_USB=m
1124# CONFIG_USB_DEBUG is not set
1125# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
1126
1127#
1128# Miscellaneous USB options
1129#
1130CONFIG_USB_DEVICEFS=y
1131CONFIG_USB_DEVICE_CLASS=y
1132# CONFIG_USB_DYNAMIC_MINORS is not set
1133CONFIG_USB_SUSPEND=y
1134# CONFIG_USB_OTG is not set
1135# CONFIG_USB_OTG_WHITELIST is not set
1136# CONFIG_USB_OTG_BLACKLIST_HUB is not set
1137# CONFIG_USB_MON is not set
1138
1139#
1140# USB Host Controller Drivers
1141#
1142# CONFIG_USB_C67X00_HCD is not set
1143CONFIG_USB_ISP116X_HCD=m
1144# CONFIG_USB_ISP1760_HCD is not set
1145CONFIG_USB_SL811_HCD=m
1146# CONFIG_USB_SL811_CS is not set
1147CONFIG_USB_R8A66597_HCD=m
1148# CONFIG_USB_MUSB_HDRC is not set
1149# CONFIG_USB_GADGET_MUSB_HDRC is not set
1150
1151#
1152# USB Device Class drivers
1153#
1154CONFIG_USB_ACM=m
1155# CONFIG_USB_PRINTER is not set
1156# CONFIG_USB_WDM is not set
1157
1158#
1159# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
1160#
1161
1162#
1163# may also be needed; see USB_STORAGE Help for more information
1164#
1165CONFIG_USB_STORAGE=m
1166# CONFIG_USB_STORAGE_DEBUG is not set
1167# CONFIG_USB_STORAGE_DATAFAB is not set
1168# CONFIG_USB_STORAGE_FREECOM is not set
1169# CONFIG_USB_STORAGE_ISD200 is not set
1170# CONFIG_USB_STORAGE_DPCM is not set
1171# CONFIG_USB_STORAGE_USBAT is not set
1172# CONFIG_USB_STORAGE_SDDR09 is not set
1173# CONFIG_USB_STORAGE_SDDR55 is not set
1174# CONFIG_USB_STORAGE_JUMPSHOT is not set
1175# CONFIG_USB_STORAGE_ALAUDA is not set
1176# CONFIG_USB_STORAGE_ONETOUCH is not set
1177# CONFIG_USB_STORAGE_KARMA is not set
1178# CONFIG_USB_STORAGE_SIERRA is not set
1179# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
1180# CONFIG_USB_LIBUSUAL is not set
1181
1182#
1183# USB Imaging devices
1184#
1185# CONFIG_USB_MDC800 is not set
1186# CONFIG_USB_MICROTEK is not set
1187
1188#
1189# USB port drivers
1190#
1191CONFIG_USB_SERIAL=m
1192# CONFIG_USB_EZUSB is not set
1193CONFIG_USB_SERIAL_GENERIC=y
1194# CONFIG_USB_SERIAL_AIRCABLE is not set
1195# CONFIG_USB_SERIAL_ARK3116 is not set
1196# CONFIG_USB_SERIAL_BELKIN is not set
1197# CONFIG_USB_SERIAL_CH341 is not set
1198# CONFIG_USB_SERIAL_WHITEHEAT is not set
1199# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
1200# CONFIG_USB_SERIAL_CP2101 is not set
1201# CONFIG_USB_SERIAL_CYPRESS_M8 is not set
1202# CONFIG_USB_SERIAL_EMPEG is not set
1203# CONFIG_USB_SERIAL_FTDI_SIO is not set
1204# CONFIG_USB_SERIAL_FUNSOFT is not set
1205# CONFIG_USB_SERIAL_VISOR is not set
1206# CONFIG_USB_SERIAL_IPAQ is not set
1207# CONFIG_USB_SERIAL_IR is not set
1208# CONFIG_USB_SERIAL_EDGEPORT is not set
1209# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
1210# CONFIG_USB_SERIAL_GARMIN is not set
1211# CONFIG_USB_SERIAL_IPW is not set
1212# CONFIG_USB_SERIAL_IUU is not set
1213# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
1214# CONFIG_USB_SERIAL_KEYSPAN is not set
1215# CONFIG_USB_SERIAL_KLSI is not set
1216# CONFIG_USB_SERIAL_KOBIL_SCT is not set
1217CONFIG_USB_SERIAL_MCT_U232=m
1218# CONFIG_USB_SERIAL_MOS7720 is not set
1219# CONFIG_USB_SERIAL_MOS7840 is not set
1220# CONFIG_USB_SERIAL_MOTOROLA is not set
1221# CONFIG_USB_SERIAL_NAVMAN is not set
1222# CONFIG_USB_SERIAL_PL2303 is not set
1223# CONFIG_USB_SERIAL_OTI6858 is not set
1224# CONFIG_USB_SERIAL_SPCP8X5 is not set
1225# CONFIG_USB_SERIAL_HP4X is not set
1226# CONFIG_USB_SERIAL_SAFE is not set
1227# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set
1228# CONFIG_USB_SERIAL_TI is not set
1229# CONFIG_USB_SERIAL_CYBERJACK is not set
1230# CONFIG_USB_SERIAL_XIRCOM is not set
1231# CONFIG_USB_SERIAL_OPTION is not set
1232# CONFIG_USB_SERIAL_OMNINET is not set
1233# CONFIG_USB_SERIAL_DEBUG is not set
1234
1235#
1236# USB Miscellaneous drivers
1237#
1238# CONFIG_USB_EMI62 is not set
1239# CONFIG_USB_EMI26 is not set
1240# CONFIG_USB_ADUTUX is not set
1241# CONFIG_USB_RIO500 is not set
1242# CONFIG_USB_LEGOTOWER is not set
1243# CONFIG_USB_LCD is not set
1244# CONFIG_USB_BERRY_CHARGE is not set
1245# CONFIG_USB_LED is not set
1246# CONFIG_USB_CYPRESS_CY7C63 is not set
1247# CONFIG_USB_CYTHERM is not set
1248# CONFIG_USB_PHIDGET is not set
1249# CONFIG_USB_IDMOUSE is not set
1250# CONFIG_USB_FTDI_ELAN is not set
1251# CONFIG_USB_APPLEDISPLAY is not set
1252# CONFIG_USB_LD is not set
1253# CONFIG_USB_TRANCEVIBRATOR is not set
1254# CONFIG_USB_IOWARRIOR is not set
1255# CONFIG_USB_TEST is not set
1256# CONFIG_USB_ISIGHTFW is not set
1257CONFIG_USB_GADGET=m
1258# CONFIG_USB_GADGET_DEBUG is not set
1259# CONFIG_USB_GADGET_DEBUG_FILES is not set
1260CONFIG_USB_GADGET_SELECTED=y
1261# CONFIG_USB_GADGET_AMD5536UDC is not set
1262# CONFIG_USB_GADGET_ATMEL_USBA is not set
1263# CONFIG_USB_GADGET_FSL_USB2 is not set
1264# CONFIG_USB_GADGET_NET2280 is not set
1265CONFIG_USB_GADGET_PXA25X=y
1266CONFIG_USB_PXA25X=m
1267# CONFIG_USB_PXA25X_SMALL is not set
1268# CONFIG_USB_GADGET_M66592 is not set
1269# CONFIG_USB_GADGET_PXA27X is not set
1270# CONFIG_USB_GADGET_GOKU is not set
1271# CONFIG_USB_GADGET_LH7A40X is not set
1272# CONFIG_USB_GADGET_OMAP is not set
1273# CONFIG_USB_GADGET_S3C2410 is not set
1274# CONFIG_USB_GADGET_AT91 is not set
1275# CONFIG_USB_GADGET_DUMMY_HCD is not set
1276# CONFIG_USB_GADGET_DUALSPEED is not set
1277# CONFIG_USB_ZERO is not set
1278CONFIG_USB_ETH=m
1279CONFIG_USB_ETH_RNDIS=y
1280CONFIG_USB_GADGETFS=m
1281CONFIG_USB_FILE_STORAGE=m
1282# CONFIG_USB_FILE_STORAGE_TEST is not set
1283CONFIG_USB_G_SERIAL=m
1284# CONFIG_USB_MIDI_GADGET is not set
1285CONFIG_USB_G_PRINTER=m
1286# CONFIG_USB_CDC_COMPOSITE is not set
1287# CONFIG_MMC is not set
1288# CONFIG_NEW_LEDS is not set
1289CONFIG_RTC_LIB=y
1290CONFIG_RTC_CLASS=m
1291
1292#
1293# RTC interfaces
1294#
1295CONFIG_RTC_INTF_SYSFS=y
1296CONFIG_RTC_INTF_PROC=y
1297CONFIG_RTC_INTF_DEV=y
1298# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1299# CONFIG_RTC_DRV_TEST is not set
1300
1301#
1302# I2C RTC drivers
1303#
1304CONFIG_RTC_DRV_DS1307=m
1305# CONFIG_RTC_DRV_DS1374 is not set
1306# CONFIG_RTC_DRV_DS1672 is not set
1307# CONFIG_RTC_DRV_MAX6900 is not set
1308# CONFIG_RTC_DRV_RS5C372 is not set
1309# CONFIG_RTC_DRV_ISL1208 is not set
1310# CONFIG_RTC_DRV_X1205 is not set
1311# CONFIG_RTC_DRV_PCF8563 is not set
1312# CONFIG_RTC_DRV_PCF8583 is not set
1313# CONFIG_RTC_DRV_M41T80 is not set
1314# CONFIG_RTC_DRV_S35390A is not set
1315# CONFIG_RTC_DRV_FM3130 is not set
1316
1317#
1318# SPI RTC drivers
1319#
1320
1321#
1322# Platform RTC drivers
1323#
1324# CONFIG_RTC_DRV_CMOS is not set
1325# CONFIG_RTC_DRV_DS1511 is not set
1326# CONFIG_RTC_DRV_DS1553 is not set
1327# CONFIG_RTC_DRV_DS1742 is not set
1328# CONFIG_RTC_DRV_STK17TA8 is not set
1329# CONFIG_RTC_DRV_M48T86 is not set
1330# CONFIG_RTC_DRV_M48T59 is not set
1331# CONFIG_RTC_DRV_V3020 is not set
1332
1333#
1334# on-CPU RTC drivers
1335#
1336CONFIG_RTC_DRV_SA1100=m
1337# CONFIG_DMADEVICES is not set
1338
1339#
1340# Voltage and Current regulators
1341#
1342# CONFIG_REGULATOR is not set
1343# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
1344# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
1345# CONFIG_REGULATOR_BQ24022 is not set
1346# CONFIG_UIO is not set
1347
1348#
1349# File systems
1350#
1351CONFIG_EXT2_FS=m
1352# CONFIG_EXT2_FS_XATTR is not set
1353# CONFIG_EXT2_FS_XIP is not set
1354CONFIG_EXT3_FS=m
1355# CONFIG_EXT3_FS_XATTR is not set
1356# CONFIG_EXT4DEV_FS is not set
1357CONFIG_JBD=m
1358# CONFIG_REISERFS_FS is not set
1359# CONFIG_JFS_FS is not set
1360# CONFIG_FS_POSIX_ACL is not set
1361# CONFIG_XFS_FS is not set
1362# CONFIG_OCFS2_FS is not set
1363# CONFIG_DNOTIFY is not set
1364CONFIG_INOTIFY=y
1365CONFIG_INOTIFY_USER=y
1366# CONFIG_QUOTA is not set
1367# CONFIG_AUTOFS_FS is not set
1368# CONFIG_AUTOFS4_FS is not set
1369# CONFIG_FUSE_FS is not set
1370
1371#
1372# CD-ROM/DVD Filesystems
1373#
1374# CONFIG_ISO9660_FS is not set
1375# CONFIG_UDF_FS is not set
1376
1377#
1378# DOS/FAT/NT Filesystems
1379#
1380CONFIG_FAT_FS=m
1381# CONFIG_MSDOS_FS is not set
1382CONFIG_VFAT_FS=m
1383CONFIG_FAT_DEFAULT_CODEPAGE=437
1384CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1385# CONFIG_NTFS_FS is not set
1386
1387#
1388# Pseudo filesystems
1389#
1390CONFIG_PROC_FS=y
1391CONFIG_PROC_SYSCTL=y
1392CONFIG_SYSFS=y
1393CONFIG_TMPFS=y
1394# CONFIG_TMPFS_POSIX_ACL is not set
1395# CONFIG_HUGETLB_PAGE is not set
1396# CONFIG_CONFIGFS_FS is not set
1397
1398#
1399# Miscellaneous filesystems
1400#
1401# CONFIG_ADFS_FS is not set
1402# CONFIG_AFFS_FS is not set
1403# CONFIG_HFS_FS is not set
1404# CONFIG_HFSPLUS_FS is not set
1405# CONFIG_BEFS_FS is not set
1406# CONFIG_BFS_FS is not set
1407# CONFIG_EFS_FS is not set
1408CONFIG_JFFS2_FS=y
1409CONFIG_JFFS2_FS_DEBUG=0
1410CONFIG_JFFS2_FS_WRITEBUFFER=y
1411# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
1412# CONFIG_JFFS2_SUMMARY is not set
1413# CONFIG_JFFS2_FS_XATTR is not set
1414# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
1415CONFIG_JFFS2_ZLIB=y
1416# CONFIG_JFFS2_LZO is not set
1417CONFIG_JFFS2_RTIME=y
1418# CONFIG_JFFS2_RUBIN is not set
1419# CONFIG_CRAMFS is not set
1420# CONFIG_VXFS_FS is not set
1421# CONFIG_MINIX_FS is not set
1422# CONFIG_OMFS_FS is not set
1423# CONFIG_HPFS_FS is not set
1424# CONFIG_QNX4FS_FS is not set
1425# CONFIG_ROMFS_FS is not set
1426# CONFIG_SYSV_FS is not set
1427# CONFIG_UFS_FS is not set
1428CONFIG_NETWORK_FILESYSTEMS=y
1429CONFIG_NFS_FS=y
1430CONFIG_NFS_V3=y
1431# CONFIG_NFS_V3_ACL is not set
1432# CONFIG_NFS_V4 is not set
1433CONFIG_ROOT_NFS=y
1434CONFIG_NFSD=m
1435CONFIG_NFSD_V3=y
1436# CONFIG_NFSD_V3_ACL is not set
1437# CONFIG_NFSD_V4 is not set
1438CONFIG_LOCKD=y
1439CONFIG_LOCKD_V4=y
1440CONFIG_EXPORTFS=m
1441CONFIG_NFS_COMMON=y
1442CONFIG_SUNRPC=y
1443# CONFIG_RPCSEC_GSS_KRB5 is not set
1444# CONFIG_RPCSEC_GSS_SPKM3 is not set
1445# CONFIG_SMB_FS is not set
1446# CONFIG_CIFS is not set
1447# CONFIG_NCP_FS is not set
1448# CONFIG_CODA_FS is not set
1449# CONFIG_AFS_FS is not set
1450
1451#
1452# Partition Types
1453#
1454CONFIG_PARTITION_ADVANCED=y
1455# CONFIG_ACORN_PARTITION is not set
1456# CONFIG_OSF_PARTITION is not set
1457# CONFIG_AMIGA_PARTITION is not set
1458# CONFIG_ATARI_PARTITION is not set
1459# CONFIG_MAC_PARTITION is not set
1460CONFIG_MSDOS_PARTITION=y
1461# CONFIG_BSD_DISKLABEL is not set
1462# CONFIG_MINIX_SUBPARTITION is not set
1463# CONFIG_SOLARIS_X86_PARTITION is not set
1464# CONFIG_UNIXWARE_DISKLABEL is not set
1465# CONFIG_LDM_PARTITION is not set
1466# CONFIG_SGI_PARTITION is not set
1467# CONFIG_ULTRIX_PARTITION is not set
1468# CONFIG_SUN_PARTITION is not set
1469# CONFIG_KARMA_PARTITION is not set
1470# CONFIG_EFI_PARTITION is not set
1471# CONFIG_SYSV68_PARTITION is not set
1472CONFIG_NLS=m
1473CONFIG_NLS_DEFAULT="iso8859-1"
1474CONFIG_NLS_CODEPAGE_437=m
1475# CONFIG_NLS_CODEPAGE_737 is not set
1476# CONFIG_NLS_CODEPAGE_775 is not set
1477CONFIG_NLS_CODEPAGE_850=m
1478# CONFIG_NLS_CODEPAGE_852 is not set
1479# CONFIG_NLS_CODEPAGE_855 is not set
1480# CONFIG_NLS_CODEPAGE_857 is not set
1481# CONFIG_NLS_CODEPAGE_860 is not set
1482# CONFIG_NLS_CODEPAGE_861 is not set
1483# CONFIG_NLS_CODEPAGE_862 is not set
1484# CONFIG_NLS_CODEPAGE_863 is not set
1485# CONFIG_NLS_CODEPAGE_864 is not set
1486# CONFIG_NLS_CODEPAGE_865 is not set
1487# CONFIG_NLS_CODEPAGE_866 is not set
1488# CONFIG_NLS_CODEPAGE_869 is not set
1489# CONFIG_NLS_CODEPAGE_936 is not set
1490# CONFIG_NLS_CODEPAGE_950 is not set
1491# CONFIG_NLS_CODEPAGE_932 is not set
1492# CONFIG_NLS_CODEPAGE_949 is not set
1493# CONFIG_NLS_CODEPAGE_874 is not set
1494# CONFIG_NLS_ISO8859_8 is not set
1495# CONFIG_NLS_CODEPAGE_1250 is not set
1496# CONFIG_NLS_CODEPAGE_1251 is not set
1497# CONFIG_NLS_ASCII is not set
1498CONFIG_NLS_ISO8859_1=m
1499# CONFIG_NLS_ISO8859_2 is not set
1500# CONFIG_NLS_ISO8859_3 is not set
1501# CONFIG_NLS_ISO8859_4 is not set
1502# CONFIG_NLS_ISO8859_5 is not set
1503# CONFIG_NLS_ISO8859_6 is not set
1504# CONFIG_NLS_ISO8859_7 is not set
1505# CONFIG_NLS_ISO8859_9 is not set
1506# CONFIG_NLS_ISO8859_13 is not set
1507# CONFIG_NLS_ISO8859_14 is not set
1508CONFIG_NLS_ISO8859_15=m
1509# CONFIG_NLS_KOI8_R is not set
1510# CONFIG_NLS_KOI8_U is not set
1511CONFIG_NLS_UTF8=m
1512# CONFIG_DLM is not set
1513
1514#
1515# Kernel hacking
1516#
1517# CONFIG_PRINTK_TIME is not set
1518CONFIG_ENABLE_WARN_DEPRECATED=y
1519CONFIG_ENABLE_MUST_CHECK=y
1520CONFIG_FRAME_WARN=1024
1521CONFIG_MAGIC_SYSRQ=y
1522# CONFIG_UNUSED_SYMBOLS is not set
1523# CONFIG_DEBUG_FS is not set
1524# CONFIG_HEADERS_CHECK is not set
1525CONFIG_DEBUG_KERNEL=y
1526# CONFIG_DEBUG_SHIRQ is not set
1527CONFIG_DETECT_SOFTLOCKUP=y
1528# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
1529CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
1530CONFIG_SCHED_DEBUG=y
1531# CONFIG_SCHEDSTATS is not set
1532# CONFIG_TIMER_STATS is not set
1533# CONFIG_DEBUG_OBJECTS is not set
1534# CONFIG_DEBUG_SLAB is not set
1535# CONFIG_DEBUG_RT_MUTEXES is not set
1536# CONFIG_RT_MUTEX_TESTER is not set
1537# CONFIG_DEBUG_SPINLOCK is not set
1538CONFIG_DEBUG_MUTEXES=y
1539# CONFIG_DEBUG_LOCK_ALLOC is not set
1540# CONFIG_PROVE_LOCKING is not set
1541# CONFIG_LOCK_STAT is not set
1542# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1543# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1544# CONFIG_DEBUG_KOBJECT is not set
1545CONFIG_DEBUG_BUGVERBOSE=y
1546# CONFIG_DEBUG_INFO is not set
1547# CONFIG_DEBUG_VM is not set
1548# CONFIG_DEBUG_WRITECOUNT is not set
1549# CONFIG_DEBUG_MEMORY_INIT is not set
1550# CONFIG_DEBUG_LIST is not set
1551# CONFIG_DEBUG_SG is not set
1552CONFIG_FRAME_POINTER=y
1553# CONFIG_BOOT_PRINTK_DELAY is not set
1554# CONFIG_RCU_TORTURE_TEST is not set
1555# CONFIG_BACKTRACE_SELF_TEST is not set
1556# CONFIG_FAULT_INJECTION is not set
1557# CONFIG_LATENCYTOP is not set
1558CONFIG_SYSCTL_SYSCALL_CHECK=y
1559CONFIG_HAVE_FTRACE=y
1560CONFIG_HAVE_DYNAMIC_FTRACE=y
1561# CONFIG_FTRACE is not set
1562# CONFIG_IRQSOFF_TRACER is not set
1563# CONFIG_SCHED_TRACER is not set
1564# CONFIG_CONTEXT_SWITCH_TRACER is not set
1565# CONFIG_SAMPLES is not set
1566CONFIG_HAVE_ARCH_KGDB=y
1567# CONFIG_KGDB is not set
1568# CONFIG_DEBUG_USER is not set
1569CONFIG_DEBUG_ERRORS=y
1570# CONFIG_DEBUG_STACK_USAGE is not set
1571# CONFIG_DEBUG_LL is not set
1572
1573#
1574# Security options
1575#
1576# CONFIG_KEYS is not set
1577# CONFIG_SECURITY is not set
1578# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1579CONFIG_CRYPTO=y
1580
1581#
1582# Crypto core or helper
1583#
1584CONFIG_CRYPTO_ALGAPI=m
1585CONFIG_CRYPTO_BLKCIPHER=m
1586CONFIG_CRYPTO_MANAGER=m
1587# CONFIG_CRYPTO_GF128MUL is not set
1588# CONFIG_CRYPTO_NULL is not set
1589# CONFIG_CRYPTO_CRYPTD is not set
1590# CONFIG_CRYPTO_AUTHENC is not set
1591# CONFIG_CRYPTO_TEST is not set
1592
1593#
1594# Authenticated Encryption with Associated Data
1595#
1596# CONFIG_CRYPTO_CCM is not set
1597# CONFIG_CRYPTO_GCM is not set
1598# CONFIG_CRYPTO_SEQIV is not set
1599
1600#
1601# Block modes
1602#
1603# CONFIG_CRYPTO_CBC is not set
1604# CONFIG_CRYPTO_CTR is not set
1605# CONFIG_CRYPTO_CTS is not set
1606CONFIG_CRYPTO_ECB=m
1607# CONFIG_CRYPTO_LRW is not set
1608# CONFIG_CRYPTO_PCBC is not set
1609# CONFIG_CRYPTO_XTS is not set
1610
1611#
1612# Hash modes
1613#
1614# CONFIG_CRYPTO_HMAC is not set
1615# CONFIG_CRYPTO_XCBC is not set
1616
1617#
1618# Digest
1619#
1620# CONFIG_CRYPTO_CRC32C is not set
1621# CONFIG_CRYPTO_MD4 is not set
1622# CONFIG_CRYPTO_MD5 is not set
1623# CONFIG_CRYPTO_MICHAEL_MIC is not set
1624# CONFIG_CRYPTO_RMD128 is not set
1625# CONFIG_CRYPTO_RMD160 is not set
1626# CONFIG_CRYPTO_RMD256 is not set
1627# CONFIG_CRYPTO_RMD320 is not set
1628# CONFIG_CRYPTO_SHA1 is not set
1629# CONFIG_CRYPTO_SHA256 is not set
1630# CONFIG_CRYPTO_SHA512 is not set
1631# CONFIG_CRYPTO_TGR192 is not set
1632# CONFIG_CRYPTO_WP512 is not set
1633
1634#
1635# Ciphers
1636#
1637# CONFIG_CRYPTO_AES is not set
1638# CONFIG_CRYPTO_ANUBIS is not set
1639CONFIG_CRYPTO_ARC4=m
1640# CONFIG_CRYPTO_BLOWFISH is not set
1641# CONFIG_CRYPTO_CAMELLIA is not set
1642# CONFIG_CRYPTO_CAST5 is not set
1643# CONFIG_CRYPTO_CAST6 is not set
1644# CONFIG_CRYPTO_DES is not set
1645# CONFIG_CRYPTO_FCRYPT is not set
1646# CONFIG_CRYPTO_KHAZAD is not set
1647# CONFIG_CRYPTO_SALSA20 is not set
1648# CONFIG_CRYPTO_SEED is not set
1649# CONFIG_CRYPTO_SERPENT is not set
1650# CONFIG_CRYPTO_TEA is not set
1651# CONFIG_CRYPTO_TWOFISH is not set
1652
1653#
1654# Compression
1655#
1656# CONFIG_CRYPTO_DEFLATE is not set
1657# CONFIG_CRYPTO_LZO is not set
1658CONFIG_CRYPTO_HW=y
1659
1660#
1661# Library routines
1662#
1663CONFIG_BITREVERSE=y
1664# CONFIG_GENERIC_FIND_FIRST_BIT is not set
1665# CONFIG_GENERIC_FIND_NEXT_BIT is not set
1666CONFIG_CRC_CCITT=m
1667# CONFIG_CRC16 is not set
1668CONFIG_CRC_T10DIF=m
1669# CONFIG_CRC_ITU_T is not set
1670CONFIG_CRC32=y
1671# CONFIG_CRC7 is not set
1672# CONFIG_LIBCRC32C is not set
1673CONFIG_ZLIB_INFLATE=y
1674CONFIG_ZLIB_DEFLATE=y
1675CONFIG_PLIST=y
1676CONFIG_HAS_IOMEM=y
1677CONFIG_HAS_IOPORT=y
1678CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/xm_x270_defconfig b/arch/arm/configs/xm_x2xx_defconfig
index aa40d91ce599..f891364deceb 100644
--- a/arch/arm/configs/xm_x270_defconfig
+++ b/arch/arm/configs/xm_x2xx_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.25 3# Linux kernel version: 2.6.27-rc8
4# Sun May 11 15:12:52 2008 4# Sun Oct 5 11:05:36 2008
5# 5#
6CONFIG_ARM=y 6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y 7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
@@ -12,6 +12,7 @@ CONFIG_MMU=y
12# CONFIG_NO_IOPORT is not set 12# CONFIG_NO_IOPORT is not set
13CONFIG_GENERIC_HARDIRQS=y 13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_STACKTRACE_SUPPORT=y 14CONFIG_STACKTRACE_SUPPORT=y
15CONFIG_HAVE_LATENCYTOP_SUPPORT=y
15CONFIG_LOCKDEP_SUPPORT=y 16CONFIG_LOCKDEP_SUPPORT=y
16CONFIG_TRACE_IRQFLAGS_SUPPORT=y 17CONFIG_TRACE_IRQFLAGS_SUPPORT=y
17CONFIG_HARDIRQS_SW_RESEND=y 18CONFIG_HARDIRQS_SW_RESEND=y
@@ -24,6 +25,7 @@ CONFIG_GENERIC_CALIBRATE_DELAY=y
24CONFIG_ARCH_SUPPORTS_AOUT=y 25CONFIG_ARCH_SUPPORTS_AOUT=y
25CONFIG_ZONE_DMA=y 26CONFIG_ZONE_DMA=y
26CONFIG_ARCH_MTD_XIP=y 27CONFIG_ARCH_MTD_XIP=y
28CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
27CONFIG_VECTORS_BASE=0xffff0000 29CONFIG_VECTORS_BASE=0xffff0000
28CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 30CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
29 31
@@ -62,7 +64,6 @@ CONFIG_SYSCTL=y
62CONFIG_EMBEDDED=y 64CONFIG_EMBEDDED=y
63CONFIG_UID16=y 65CONFIG_UID16=y
64CONFIG_SYSCTL_SYSCALL=y 66CONFIG_SYSCTL_SYSCALL=y
65CONFIG_SYSCTL_SYSCALL_CHECK=y
66CONFIG_KALLSYMS=y 67CONFIG_KALLSYMS=y
67# CONFIG_KALLSYMS_ALL is not set 68# CONFIG_KALLSYMS_ALL is not set
68# CONFIG_KALLSYMS_EXTRA_PASS is not set 69# CONFIG_KALLSYMS_EXTRA_PASS is not set
@@ -88,14 +89,21 @@ CONFIG_SLUB=y
88# CONFIG_MARKERS is not set 89# CONFIG_MARKERS is not set
89CONFIG_HAVE_OPROFILE=y 90CONFIG_HAVE_OPROFILE=y
90# CONFIG_KPROBES is not set 91# CONFIG_KPROBES is not set
92# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
93# CONFIG_HAVE_IOREMAP_PROT is not set
91CONFIG_HAVE_KPROBES=y 94CONFIG_HAVE_KPROBES=y
92CONFIG_HAVE_KRETPROBES=y 95CONFIG_HAVE_KRETPROBES=y
96# CONFIG_HAVE_ARCH_TRACEHOOK is not set
93# CONFIG_HAVE_DMA_ATTRS is not set 97# CONFIG_HAVE_DMA_ATTRS is not set
98# CONFIG_USE_GENERIC_SMP_HELPERS is not set
99CONFIG_HAVE_CLK=y
94# CONFIG_PROC_PAGE_MONITOR is not set 100# CONFIG_PROC_PAGE_MONITOR is not set
101CONFIG_HAVE_GENERIC_DMA_COHERENT=y
95CONFIG_RT_MUTEXES=y 102CONFIG_RT_MUTEXES=y
96# CONFIG_TINY_SHMEM is not set 103# CONFIG_TINY_SHMEM is not set
97CONFIG_BASE_SMALL=0 104CONFIG_BASE_SMALL=0
98CONFIG_MODULES=y 105CONFIG_MODULES=y
106# CONFIG_MODULE_FORCE_LOAD is not set
99CONFIG_MODULE_UNLOAD=y 107CONFIG_MODULE_UNLOAD=y
100# CONFIG_MODULE_FORCE_UNLOAD is not set 108# CONFIG_MODULE_FORCE_UNLOAD is not set
101# CONFIG_MODVERSIONS is not set 109# CONFIG_MODVERSIONS is not set
@@ -106,6 +114,7 @@ CONFIG_BLOCK=y
106# CONFIG_BLK_DEV_IO_TRACE is not set 114# CONFIG_BLK_DEV_IO_TRACE is not set
107# CONFIG_LSF is not set 115# CONFIG_LSF is not set
108# CONFIG_BLK_DEV_BSG is not set 116# CONFIG_BLK_DEV_BSG is not set
117# CONFIG_BLK_DEV_INTEGRITY is not set
109 118
110# 119#
111# IO Schedulers 120# IO Schedulers
@@ -131,7 +140,6 @@ CONFIG_CLASSIC_RCU=y
131# CONFIG_ARCH_AT91 is not set 140# CONFIG_ARCH_AT91 is not set
132# CONFIG_ARCH_CLPS7500 is not set 141# CONFIG_ARCH_CLPS7500 is not set
133# CONFIG_ARCH_CLPS711X is not set 142# CONFIG_ARCH_CLPS711X is not set
134# CONFIG_ARCH_CO285 is not set
135# CONFIG_ARCH_EBSA110 is not set 143# CONFIG_ARCH_EBSA110 is not set
136# CONFIG_ARCH_EP93XX is not set 144# CONFIG_ARCH_EP93XX is not set
137# CONFIG_ARCH_FOOTBRIDGE is not set 145# CONFIG_ARCH_FOOTBRIDGE is not set
@@ -145,8 +153,11 @@ CONFIG_CLASSIC_RCU=y
145# CONFIG_ARCH_IXP2000 is not set 153# CONFIG_ARCH_IXP2000 is not set
146# CONFIG_ARCH_IXP4XX is not set 154# CONFIG_ARCH_IXP4XX is not set
147# CONFIG_ARCH_L7200 is not set 155# CONFIG_ARCH_L7200 is not set
156# CONFIG_ARCH_KIRKWOOD is not set
148# CONFIG_ARCH_KS8695 is not set 157# CONFIG_ARCH_KS8695 is not set
149# CONFIG_ARCH_NS9XXX is not set 158# CONFIG_ARCH_NS9XXX is not set
159# CONFIG_ARCH_LOKI is not set
160# CONFIG_ARCH_MV78XX0 is not set
150# CONFIG_ARCH_MXC is not set 161# CONFIG_ARCH_MXC is not set
151# CONFIG_ARCH_ORION5X is not set 162# CONFIG_ARCH_ORION5X is not set
152# CONFIG_ARCH_PNX4008 is not set 163# CONFIG_ARCH_PNX4008 is not set
@@ -164,26 +175,32 @@ CONFIG_DMABOUNCE=y
164# 175#
165# Intel PXA2xx/PXA3xx Implementations 176# Intel PXA2xx/PXA3xx Implementations
166# 177#
167
168#
169# Select target boards
170#
171# CONFIG_ARCH_GUMSTIX is not set 178# CONFIG_ARCH_GUMSTIX is not set
172# CONFIG_ARCH_LUBBOCK is not set 179# CONFIG_ARCH_LUBBOCK is not set
173# CONFIG_MACH_LOGICPD_PXA270 is not set 180# CONFIG_MACH_LOGICPD_PXA270 is not set
174# CONFIG_MACH_MAINSTONE is not set 181# CONFIG_MACH_MAINSTONE is not set
182# CONFIG_MACH_MP900C is not set
175# CONFIG_ARCH_PXA_IDP is not set 183# CONFIG_ARCH_PXA_IDP is not set
176# CONFIG_PXA_SHARPSL is not set 184# CONFIG_PXA_SHARPSL is not set
185# CONFIG_ARCH_VIPER is not set
177# CONFIG_ARCH_PXA_ESERIES is not set 186# CONFIG_ARCH_PXA_ESERIES is not set
178# CONFIG_MACH_TRIZEPS4 is not set 187# CONFIG_TRIZEPS_PXA is not set
179CONFIG_MACH_EM_X270=y 188CONFIG_MACH_EM_X270=y
180# CONFIG_MACH_COLIBRI is not set 189# CONFIG_MACH_COLIBRI is not set
181# CONFIG_MACH_ZYLONITE is not set 190# CONFIG_MACH_ZYLONITE is not set
182# CONFIG_MACH_LITTLETON is not set 191# CONFIG_MACH_LITTLETON is not set
192# CONFIG_MACH_TAVOREVB is not set
193# CONFIG_MACH_SAAR is not set
183CONFIG_MACH_ARMCORE=y 194CONFIG_MACH_ARMCORE=y
195# CONFIG_MACH_CM_X300 is not set
184# CONFIG_MACH_MAGICIAN is not set 196# CONFIG_MACH_MAGICIAN is not set
197# CONFIG_MACH_MIOA701 is not set
185# CONFIG_MACH_PCM027 is not set 198# CONFIG_MACH_PCM027 is not set
199# CONFIG_ARCH_PXA_PALM is not set
200# CONFIG_PXA_EZX is not set
201CONFIG_PXA25x=y
186CONFIG_PXA27x=y 202CONFIG_PXA27x=y
203CONFIG_PXA_SSP=y
187# CONFIG_PXA_PWM is not set 204# CONFIG_PXA_PWM is not set
188 205
189# 206#
@@ -253,11 +270,17 @@ CONFIG_TICK_ONESHOT=y
253CONFIG_NO_HZ=y 270CONFIG_NO_HZ=y
254# CONFIG_HIGH_RES_TIMERS is not set 271# CONFIG_HIGH_RES_TIMERS is not set
255CONFIG_GENERIC_CLOCKEVENTS_BUILD=y 272CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
273CONFIG_VMSPLIT_3G=y
274# CONFIG_VMSPLIT_2G is not set
275# CONFIG_VMSPLIT_1G is not set
276CONFIG_PAGE_OFFSET=0xC0000000
256# CONFIG_PREEMPT is not set 277# CONFIG_PREEMPT is not set
257CONFIG_HZ=100 278CONFIG_HZ=100
258CONFIG_AEABI=y 279CONFIG_AEABI=y
259CONFIG_OABI_COMPAT=y 280CONFIG_OABI_COMPAT=y
260# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set 281CONFIG_ARCH_FLATMEM_HAS_HOLES=y
282# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
283# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
261CONFIG_SELECT_MEMORY_MODEL=y 284CONFIG_SELECT_MEMORY_MODEL=y
262CONFIG_FLATMEM_MANUAL=y 285CONFIG_FLATMEM_MANUAL=y
263# CONFIG_DISCONTIGMEM_MANUAL is not set 286# CONFIG_DISCONTIGMEM_MANUAL is not set
@@ -284,9 +307,10 @@ CONFIG_CMDLINE="root=1f03 mem=32M"
284# CONFIG_KEXEC is not set 307# CONFIG_KEXEC is not set
285 308
286# 309#
287# CPU Frequency scaling 310# CPU Power Management
288# 311#
289# CONFIG_CPU_FREQ is not set 312# CONFIG_CPU_FREQ is not set
313# CONFIG_CPU_IDLE is not set
290 314
291# 315#
292# Floating point emulation 316# Floating point emulation
@@ -316,10 +340,6 @@ CONFIG_SUSPEND=y
316CONFIG_SUSPEND_FREEZER=y 340CONFIG_SUSPEND_FREEZER=y
317CONFIG_APM_EMULATION=m 341CONFIG_APM_EMULATION=m
318CONFIG_ARCH_SUSPEND_POSSIBLE=y 342CONFIG_ARCH_SUSPEND_POSSIBLE=y
319
320#
321# Networking
322#
323CONFIG_NET=y 343CONFIG_NET=y
324 344
325# 345#
@@ -402,6 +422,7 @@ CONFIG_BT_HIDP=m
402# 422#
403CONFIG_BT_HCIUSB=m 423CONFIG_BT_HCIUSB=m
404CONFIG_BT_HCIUSB_SCO=y 424CONFIG_BT_HCIUSB_SCO=y
425# CONFIG_BT_HCIBTUSB is not set
405# CONFIG_BT_HCIBTSDIO is not set 426# CONFIG_BT_HCIBTSDIO is not set
406# CONFIG_BT_HCIUART is not set 427# CONFIG_BT_HCIUART is not set
407# CONFIG_BT_HCIBCM203X is not set 428# CONFIG_BT_HCIBCM203X is not set
@@ -419,6 +440,7 @@ CONFIG_BT_HCIUSB_SCO=y
419# 440#
420# CONFIG_CFG80211 is not set 441# CONFIG_CFG80211 is not set
421CONFIG_WIRELESS_EXT=y 442CONFIG_WIRELESS_EXT=y
443CONFIG_WIRELESS_EXT_SYSFS=y
422# CONFIG_MAC80211 is not set 444# CONFIG_MAC80211 is not set
423# CONFIG_IEEE80211 is not set 445# CONFIG_IEEE80211 is not set
424# CONFIG_RFKILL is not set 446# CONFIG_RFKILL is not set
@@ -435,6 +457,8 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
435CONFIG_STANDALONE=y 457CONFIG_STANDALONE=y
436CONFIG_PREVENT_FIRMWARE_BUILD=y 458CONFIG_PREVENT_FIRMWARE_BUILD=y
437CONFIG_FW_LOADER=m 459CONFIG_FW_LOADER=m
460CONFIG_FIRMWARE_IN_KERNEL=y
461CONFIG_EXTRA_FIRMWARE=""
438# CONFIG_DEBUG_DRIVER is not set 462# CONFIG_DEBUG_DRIVER is not set
439# CONFIG_DEBUG_DEVRES is not set 463# CONFIG_DEBUG_DEVRES is not set
440# CONFIG_SYS_HYPERVISOR is not set 464# CONFIG_SYS_HYPERVISOR is not set
@@ -527,6 +551,7 @@ CONFIG_MTD_NAND=y
527# CONFIG_MTD_NAND_ECC_SMC is not set 551# CONFIG_MTD_NAND_ECC_SMC is not set
528# CONFIG_MTD_NAND_MUSEUM_IDS is not set 552# CONFIG_MTD_NAND_MUSEUM_IDS is not set
529# CONFIG_MTD_NAND_H1900 is not set 553# CONFIG_MTD_NAND_H1900 is not set
554CONFIG_MTD_NAND_GPIO=m
530CONFIG_MTD_NAND_IDS=y 555CONFIG_MTD_NAND_IDS=y
531# CONFIG_MTD_NAND_DISKONCHIP is not set 556# CONFIG_MTD_NAND_DISKONCHIP is not set
532# CONFIG_MTD_NAND_SHARPSL is not set 557# CONFIG_MTD_NAND_SHARPSL is not set
@@ -636,6 +661,7 @@ CONFIG_SCSI_LOWLEVEL=y
636# CONFIG_SCSI_DEBUG is not set 661# CONFIG_SCSI_DEBUG is not set
637# CONFIG_SCSI_SRP is not set 662# CONFIG_SCSI_SRP is not set
638# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set 663# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set
664# CONFIG_SCSI_DH is not set
639CONFIG_ATA=m 665CONFIG_ATA=m
640# CONFIG_ATA_NONSTANDARD is not set 666# CONFIG_ATA_NONSTANDARD is not set
641# CONFIG_SATA_PMP is not set 667# CONFIG_SATA_PMP is not set
@@ -696,17 +722,21 @@ CONFIG_PATA_PCMCIA=m
696# CONFIG_PATA_VIA is not set 722# CONFIG_PATA_VIA is not set
697# CONFIG_PATA_WINBOND is not set 723# CONFIG_PATA_WINBOND is not set
698# CONFIG_PATA_PLATFORM is not set 724# CONFIG_PATA_PLATFORM is not set
725# CONFIG_PATA_SCH is not set
699# CONFIG_MD is not set 726# CONFIG_MD is not set
700# CONFIG_FUSION is not set 727# CONFIG_FUSION is not set
701 728
702# 729#
703# IEEE 1394 (FireWire) support 730# IEEE 1394 (FireWire) support
704# 731#
732
733#
734# Enable only one of the two stacks, unless you know what you are doing
735#
705# CONFIG_FIREWIRE is not set 736# CONFIG_FIREWIRE is not set
706# CONFIG_IEEE1394 is not set 737# CONFIG_IEEE1394 is not set
707# CONFIG_I2O is not set 738# CONFIG_I2O is not set
708CONFIG_NETDEVICES=y 739CONFIG_NETDEVICES=y
709# CONFIG_NETDEVICES_MULTIQUEUE is not set
710# CONFIG_DUMMY is not set 740# CONFIG_DUMMY is not set
711# CONFIG_BONDING is not set 741# CONFIG_BONDING is not set
712# CONFIG_MACVLAN is not set 742# CONFIG_MACVLAN is not set
@@ -725,6 +755,7 @@ CONFIG_MII=y
725# CONFIG_SMC91X is not set 755# CONFIG_SMC91X is not set
726CONFIG_DM9000=y 756CONFIG_DM9000=y
727CONFIG_DM9000_DEBUGLEVEL=1 757CONFIG_DM9000_DEBUGLEVEL=1
758# CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL is not set
728# CONFIG_SMC911X is not set 759# CONFIG_SMC911X is not set
729# CONFIG_NET_TULIP is not set 760# CONFIG_NET_TULIP is not set
730# CONFIG_HP100 is not set 761# CONFIG_HP100 is not set
@@ -780,7 +811,6 @@ CONFIG_LIBERTAS_SDIO=m
780# CONFIG_PRISM54 is not set 811# CONFIG_PRISM54 is not set
781# CONFIG_USB_ZD1201 is not set 812# CONFIG_USB_ZD1201 is not set
782# CONFIG_USB_NET_RNDIS_WLAN is not set 813# CONFIG_USB_NET_RNDIS_WLAN is not set
783# CONFIG_IWLWIFI is not set
784# CONFIG_IWLWIFI_LEDS is not set 814# CONFIG_IWLWIFI_LEDS is not set
785# CONFIG_HOSTAP is not set 815# CONFIG_HOSTAP is not set
786 816
@@ -853,17 +883,18 @@ CONFIG_INPUT_TOUCHSCREEN=y
853# CONFIG_TOUCHSCREEN_GUNZE is not set 883# CONFIG_TOUCHSCREEN_GUNZE is not set
854# CONFIG_TOUCHSCREEN_ELO is not set 884# CONFIG_TOUCHSCREEN_ELO is not set
855# CONFIG_TOUCHSCREEN_MTOUCH is not set 885# CONFIG_TOUCHSCREEN_MTOUCH is not set
886# CONFIG_TOUCHSCREEN_INEXIO is not set
856# CONFIG_TOUCHSCREEN_MK712 is not set 887# CONFIG_TOUCHSCREEN_MK712 is not set
857# CONFIG_TOUCHSCREEN_PENMOUNT is not set 888# CONFIG_TOUCHSCREEN_PENMOUNT is not set
858# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set 889# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
859# CONFIG_TOUCHSCREEN_TOUCHWIN is not set 890# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
860CONFIG_TOUCHSCREEN_UCB1400=m
861CONFIG_TOUCHSCREEN_WM97XX=m 891CONFIG_TOUCHSCREEN_WM97XX=m
862# CONFIG_TOUCHSCREEN_WM9705 is not set 892# CONFIG_TOUCHSCREEN_WM9705 is not set
863CONFIG_TOUCHSCREEN_WM9712=y 893CONFIG_TOUCHSCREEN_WM9712=y
864# CONFIG_TOUCHSCREEN_WM9713 is not set 894# CONFIG_TOUCHSCREEN_WM9713 is not set
865# CONFIG_TOUCHSCREEN_WM97XX_MAINSTONE is not set 895# CONFIG_TOUCHSCREEN_WM97XX_MAINSTONE is not set
866# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set 896# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
897# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
867# CONFIG_INPUT_MISC is not set 898# CONFIG_INPUT_MISC is not set
868 899
869# 900#
@@ -880,6 +911,7 @@ CONFIG_SERIO_LIBPS2=y
880# Character devices 911# Character devices
881# 912#
882CONFIG_VT=y 913CONFIG_VT=y
914CONFIG_CONSOLE_TRANSLATIONS=y
883CONFIG_VT_CONSOLE=y 915CONFIG_VT_CONSOLE=y
884CONFIG_HW_CONSOLE=y 916CONFIG_HW_CONSOLE=y
885# CONFIG_VT_HW_CONSOLE_BINDING is not set 917# CONFIG_VT_HW_CONSOLE_BINDING is not set
@@ -922,45 +954,66 @@ CONFIG_DEVPORT=y
922CONFIG_I2C=y 954CONFIG_I2C=y
923CONFIG_I2C_BOARDINFO=y 955CONFIG_I2C_BOARDINFO=y
924CONFIG_I2C_CHARDEV=m 956CONFIG_I2C_CHARDEV=m
957CONFIG_I2C_HELPER_AUTO=y
925 958
926# 959#
927# I2C Hardware Bus support 960# I2C Hardware Bus support
928# 961#
962
963#
964# PC SMBus host controller drivers
965#
929# CONFIG_I2C_ALI1535 is not set 966# CONFIG_I2C_ALI1535 is not set
930# CONFIG_I2C_ALI1563 is not set 967# CONFIG_I2C_ALI1563 is not set
931# CONFIG_I2C_ALI15X3 is not set 968# CONFIG_I2C_ALI15X3 is not set
932# CONFIG_I2C_AMD756 is not set 969# CONFIG_I2C_AMD756 is not set
933# CONFIG_I2C_AMD8111 is not set 970# CONFIG_I2C_AMD8111 is not set
934# CONFIG_I2C_GPIO is not set
935# CONFIG_I2C_I801 is not set 971# CONFIG_I2C_I801 is not set
936# CONFIG_I2C_I810 is not set 972# CONFIG_I2C_ISCH is not set
937CONFIG_I2C_PXA=y
938# CONFIG_I2C_PXA_SLAVE is not set
939# CONFIG_I2C_PIIX4 is not set 973# CONFIG_I2C_PIIX4 is not set
940# CONFIG_I2C_NFORCE2 is not set 974# CONFIG_I2C_NFORCE2 is not set
941# CONFIG_I2C_OCORES is not set
942# CONFIG_I2C_PARPORT_LIGHT is not set
943# CONFIG_I2C_PROSAVAGE is not set
944# CONFIG_I2C_SAVAGE4 is not set
945# CONFIG_I2C_SIMTEC is not set
946# CONFIG_I2C_SIS5595 is not set 975# CONFIG_I2C_SIS5595 is not set
947# CONFIG_I2C_SIS630 is not set 976# CONFIG_I2C_SIS630 is not set
948# CONFIG_I2C_SIS96X is not set 977# CONFIG_I2C_SIS96X is not set
949# CONFIG_I2C_TAOS_EVM is not set
950# CONFIG_I2C_STUB is not set
951# CONFIG_I2C_TINY_USB is not set
952# CONFIG_I2C_VIA is not set 978# CONFIG_I2C_VIA is not set
953# CONFIG_I2C_VIAPRO is not set 979# CONFIG_I2C_VIAPRO is not set
980
981#
982# I2C system bus drivers (mostly embedded / system-on-chip)
983#
984# CONFIG_I2C_GPIO is not set
985# CONFIG_I2C_OCORES is not set
986CONFIG_I2C_PXA=y
987# CONFIG_I2C_PXA_SLAVE is not set
988# CONFIG_I2C_SIMTEC is not set
989
990#
991# External I2C/SMBus adapter drivers
992#
993# CONFIG_I2C_PARPORT_LIGHT is not set
994# CONFIG_I2C_TAOS_EVM is not set
995# CONFIG_I2C_TINY_USB is not set
996
997#
998# Graphics adapter I2C/DDC channel drivers
999#
954# CONFIG_I2C_VOODOO3 is not set 1000# CONFIG_I2C_VOODOO3 is not set
1001
1002#
1003# Other I2C/SMBus bus drivers
1004#
955# CONFIG_I2C_PCA_PLATFORM is not set 1005# CONFIG_I2C_PCA_PLATFORM is not set
1006# CONFIG_I2C_STUB is not set
956 1007
957# 1008#
958# Miscellaneous I2C Chip support 1009# Miscellaneous I2C Chip support
959# 1010#
960# CONFIG_DS1682 is not set 1011# CONFIG_DS1682 is not set
1012# CONFIG_AT24 is not set
961# CONFIG_SENSORS_EEPROM is not set 1013# CONFIG_SENSORS_EEPROM is not set
962# CONFIG_SENSORS_PCF8574 is not set 1014# CONFIG_SENSORS_PCF8574 is not set
963# CONFIG_PCF8575 is not set 1015# CONFIG_PCF8575 is not set
1016# CONFIG_SENSORS_PCA9539 is not set
964# CONFIG_SENSORS_PCF8591 is not set 1017# CONFIG_SENSORS_PCF8591 is not set
965# CONFIG_TPS65010 is not set 1018# CONFIG_TPS65010 is not set
966# CONFIG_SENSORS_MAX6875 is not set 1019# CONFIG_SENSORS_MAX6875 is not set
@@ -970,25 +1023,31 @@ CONFIG_I2C_PXA=y
970# CONFIG_I2C_DEBUG_BUS is not set 1023# CONFIG_I2C_DEBUG_BUS is not set
971# CONFIG_I2C_DEBUG_CHIP is not set 1024# CONFIG_I2C_DEBUG_CHIP is not set
972# CONFIG_SPI is not set 1025# CONFIG_SPI is not set
973CONFIG_HAVE_GPIO_LIB=y 1026CONFIG_ARCH_REQUIRE_GPIOLIB=y
974 1027CONFIG_GPIOLIB=y
975#
976# GPIO Support
977#
978# CONFIG_DEBUG_GPIO is not set 1028# CONFIG_DEBUG_GPIO is not set
1029# CONFIG_GPIO_SYSFS is not set
979 1030
980# 1031#
981# I2C GPIO expanders: 1032# I2C GPIO expanders:
982# 1033#
1034# CONFIG_GPIO_MAX732X is not set
983# CONFIG_GPIO_PCA953X is not set 1035# CONFIG_GPIO_PCA953X is not set
984# CONFIG_GPIO_PCF857X is not set 1036# CONFIG_GPIO_PCF857X is not set
985 1037
986# 1038#
1039# PCI GPIO expanders:
1040#
1041# CONFIG_GPIO_BT8XX is not set
1042
1043#
987# SPI GPIO expanders: 1044# SPI GPIO expanders:
988# 1045#
989# CONFIG_W1 is not set 1046# CONFIG_W1 is not set
990# CONFIG_POWER_SUPPLY is not set 1047# CONFIG_POWER_SUPPLY is not set
991# CONFIG_HWMON is not set 1048# CONFIG_HWMON is not set
1049# CONFIG_THERMAL is not set
1050# CONFIG_THERMAL_HWMON is not set
992# CONFIG_WATCHDOG is not set 1051# CONFIG_WATCHDOG is not set
993 1052
994# 1053#
@@ -1000,10 +1059,16 @@ CONFIG_SSB_POSSIBLE=y
1000# 1059#
1001# Multifunction device drivers 1060# Multifunction device drivers
1002# 1061#
1062# CONFIG_MFD_CORE is not set
1003# CONFIG_MFD_SM501 is not set 1063# CONFIG_MFD_SM501 is not set
1004# CONFIG_MFD_ASIC3 is not set 1064# CONFIG_MFD_ASIC3 is not set
1005# CONFIG_HTC_EGPIO is not set 1065# CONFIG_HTC_EGPIO is not set
1006# CONFIG_HTC_PASIC3 is not set 1066# CONFIG_HTC_PASIC3 is not set
1067# CONFIG_UCB1400_CORE is not set
1068# CONFIG_MFD_TMIO is not set
1069# CONFIG_MFD_T7L66XB is not set
1070# CONFIG_MFD_TC6387XB is not set
1071# CONFIG_MFD_TC6393XB is not set
1007 1072
1008# 1073#
1009# Multimedia devices 1074# Multimedia devices
@@ -1014,6 +1079,7 @@ CONFIG_SSB_POSSIBLE=y
1014# 1079#
1015# CONFIG_VIDEO_DEV is not set 1080# CONFIG_VIDEO_DEV is not set
1016# CONFIG_DVB_CORE is not set 1081# CONFIG_DVB_CORE is not set
1082# CONFIG_VIDEO_MEDIA is not set
1017 1083
1018# 1084#
1019# Multimedia drivers 1085# Multimedia drivers
@@ -1038,7 +1104,6 @@ CONFIG_FB_CFB_IMAGEBLIT=y
1038# CONFIG_FB_SYS_IMAGEBLIT is not set 1104# CONFIG_FB_SYS_IMAGEBLIT is not set
1039# CONFIG_FB_FOREIGN_ENDIAN is not set 1105# CONFIG_FB_FOREIGN_ENDIAN is not set
1040# CONFIG_FB_SYS_FOPS is not set 1106# CONFIG_FB_SYS_FOPS is not set
1041CONFIG_FB_DEFERRED_IO=y
1042# CONFIG_FB_SVGALIB is not set 1107# CONFIG_FB_SVGALIB is not set
1043# CONFIG_FB_MACMODES is not set 1108# CONFIG_FB_MACMODES is not set
1044# CONFIG_FB_BACKLIGHT is not set 1109# CONFIG_FB_BACKLIGHT is not set
@@ -1071,12 +1136,14 @@ CONFIG_FB_DEFERRED_IO=y
1071# CONFIG_FB_TRIDENT is not set 1136# CONFIG_FB_TRIDENT is not set
1072# CONFIG_FB_ARK is not set 1137# CONFIG_FB_ARK is not set
1073# CONFIG_FB_PM3 is not set 1138# CONFIG_FB_PM3 is not set
1139# CONFIG_FB_CARMINE is not set
1074CONFIG_FB_PXA=y 1140CONFIG_FB_PXA=y
1075# CONFIG_FB_PXA_SMARTPANEL is not set 1141# CONFIG_FB_PXA_SMARTPANEL is not set
1076CONFIG_FB_PXA_PARAMETERS=y 1142CONFIG_FB_PXA_PARAMETERS=y
1077CONFIG_FB_MBX=m 1143CONFIG_FB_MBX=m
1078# CONFIG_FB_AM200EPD is not set 1144# CONFIG_FB_W100 is not set
1079# CONFIG_FB_VIRTUAL is not set 1145# CONFIG_FB_VIRTUAL is not set
1146# CONFIG_FB_METRONOME is not set
1080# CONFIG_BACKLIGHT_LCD_SUPPORT is not set 1147# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
1081 1148
1082# 1149#
@@ -1099,15 +1166,7 @@ CONFIG_LOGO=y
1099CONFIG_LOGO_LINUX_MONO=y 1166CONFIG_LOGO_LINUX_MONO=y
1100CONFIG_LOGO_LINUX_VGA16=y 1167CONFIG_LOGO_LINUX_VGA16=y
1101CONFIG_LOGO_LINUX_CLUT224=y 1168CONFIG_LOGO_LINUX_CLUT224=y
1102
1103#
1104# Sound
1105#
1106CONFIG_SOUND=m 1169CONFIG_SOUND=m
1107
1108#
1109# Advanced Linux Sound Architecture
1110#
1111CONFIG_SND=m 1170CONFIG_SND=m
1112CONFIG_SND_TIMER=m 1171CONFIG_SND_TIMER=m
1113CONFIG_SND_PCM=m 1172CONFIG_SND_PCM=m
@@ -1121,19 +1180,15 @@ CONFIG_SND_SUPPORT_OLD_API=y
1121CONFIG_SND_VERBOSE_PROCFS=y 1180CONFIG_SND_VERBOSE_PROCFS=y
1122# CONFIG_SND_VERBOSE_PRINTK is not set 1181# CONFIG_SND_VERBOSE_PRINTK is not set
1123# CONFIG_SND_DEBUG is not set 1182# CONFIG_SND_DEBUG is not set
1124 1183CONFIG_SND_VMASTER=y
1125#
1126# Generic devices
1127#
1128CONFIG_SND_AC97_CODEC=m 1184CONFIG_SND_AC97_CODEC=m
1185CONFIG_SND_DRIVERS=y
1129# CONFIG_SND_DUMMY is not set 1186# CONFIG_SND_DUMMY is not set
1130# CONFIG_SND_MTPAV is not set 1187# CONFIG_SND_MTPAV is not set
1131# CONFIG_SND_SERIAL_U16550 is not set 1188# CONFIG_SND_SERIAL_U16550 is not set
1132# CONFIG_SND_MPU401 is not set 1189# CONFIG_SND_MPU401 is not set
1133 1190# CONFIG_SND_AC97_POWER_SAVE is not set
1134# 1191CONFIG_SND_PCI=y
1135# PCI devices
1136#
1137# CONFIG_SND_AD1889 is not set 1192# CONFIG_SND_AD1889 is not set
1138# CONFIG_SND_ALS300 is not set 1193# CONFIG_SND_ALS300 is not set
1139# CONFIG_SND_ALI5451 is not set 1194# CONFIG_SND_ALI5451 is not set
@@ -1193,42 +1248,16 @@ CONFIG_SND_AC97_CODEC=m
1193# CONFIG_SND_VIRTUOSO is not set 1248# CONFIG_SND_VIRTUOSO is not set
1194# CONFIG_SND_VX222 is not set 1249# CONFIG_SND_VX222 is not set
1195# CONFIG_SND_YMFPCI is not set 1250# CONFIG_SND_YMFPCI is not set
1196# CONFIG_SND_AC97_POWER_SAVE is not set 1251CONFIG_SND_ARM=y
1197
1198#
1199# ALSA ARM devices
1200#
1201CONFIG_SND_PXA2XX_PCM=m 1252CONFIG_SND_PXA2XX_PCM=m
1202CONFIG_SND_PXA2XX_AC97=m 1253CONFIG_SND_PXA2XX_AC97=m
1203 1254CONFIG_SND_USB=y
1204#
1205# USB devices
1206#
1207# CONFIG_SND_USB_AUDIO is not set 1255# CONFIG_SND_USB_AUDIO is not set
1208# CONFIG_SND_USB_CAIAQ is not set 1256# CONFIG_SND_USB_CAIAQ is not set
1209 1257CONFIG_SND_PCMCIA=y
1210#
1211# PCMCIA devices
1212#
1213# CONFIG_SND_VXPOCKET is not set 1258# CONFIG_SND_VXPOCKET is not set
1214# CONFIG_SND_PDAUDIOCF is not set 1259# CONFIG_SND_PDAUDIOCF is not set
1215
1216#
1217# System on Chip audio support
1218#
1219# CONFIG_SND_SOC is not set 1260# CONFIG_SND_SOC is not set
1220
1221#
1222# ALSA SoC audio for Freescale SOCs
1223#
1224
1225#
1226# SoC Audio for the Texas Instruments OMAP
1227#
1228
1229#
1230# Open Sound System
1231#
1232# CONFIG_SOUND_PRIME is not set 1261# CONFIG_SOUND_PRIME is not set
1233CONFIG_AC97_BUS=m 1262CONFIG_AC97_BUS=m
1234CONFIG_HID_SUPPORT=y 1263CONFIG_HID_SUPPORT=y
@@ -1261,12 +1290,15 @@ CONFIG_USB_DEVICEFS=y
1261# CONFIG_USB_OTG is not set 1290# CONFIG_USB_OTG is not set
1262# CONFIG_USB_OTG_WHITELIST is not set 1291# CONFIG_USB_OTG_WHITELIST is not set
1263# CONFIG_USB_OTG_BLACKLIST_HUB is not set 1292# CONFIG_USB_OTG_BLACKLIST_HUB is not set
1293CONFIG_USB_MON=y
1264 1294
1265# 1295#
1266# USB Host Controller Drivers 1296# USB Host Controller Drivers
1267# 1297#
1298# CONFIG_USB_C67X00_HCD is not set
1268# CONFIG_USB_EHCI_HCD is not set 1299# CONFIG_USB_EHCI_HCD is not set
1269# CONFIG_USB_ISP116X_HCD is not set 1300# CONFIG_USB_ISP116X_HCD is not set
1301# CONFIG_USB_ISP1760_HCD is not set
1270CONFIG_USB_OHCI_HCD=y 1302CONFIG_USB_OHCI_HCD=y
1271# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set 1303# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
1272# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set 1304# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
@@ -1274,12 +1306,14 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y
1274# CONFIG_USB_UHCI_HCD is not set 1306# CONFIG_USB_UHCI_HCD is not set
1275# CONFIG_USB_SL811_HCD is not set 1307# CONFIG_USB_SL811_HCD is not set
1276# CONFIG_USB_R8A66597_HCD is not set 1308# CONFIG_USB_R8A66597_HCD is not set
1309# CONFIG_USB_MUSB_HDRC is not set
1277 1310
1278# 1311#
1279# USB Device Class drivers 1312# USB Device Class drivers
1280# 1313#
1281# CONFIG_USB_ACM is not set 1314# CONFIG_USB_ACM is not set
1282# CONFIG_USB_PRINTER is not set 1315# CONFIG_USB_PRINTER is not set
1316# CONFIG_USB_WDM is not set
1283 1317
1284# 1318#
1285# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' 1319# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
@@ -1309,7 +1343,6 @@ CONFIG_USB_STORAGE=y
1309# 1343#
1310# CONFIG_USB_MDC800 is not set 1344# CONFIG_USB_MDC800 is not set
1311# CONFIG_USB_MICROTEK is not set 1345# CONFIG_USB_MICROTEK is not set
1312CONFIG_USB_MON=y
1313 1346
1314# 1347#
1315# USB port drivers 1348# USB port drivers
@@ -1322,7 +1355,6 @@ CONFIG_USB_MON=y
1322# CONFIG_USB_EMI62 is not set 1355# CONFIG_USB_EMI62 is not set
1323# CONFIG_USB_EMI26 is not set 1356# CONFIG_USB_EMI26 is not set
1324# CONFIG_USB_ADUTUX is not set 1357# CONFIG_USB_ADUTUX is not set
1325# CONFIG_USB_AUERSWALD is not set
1326# CONFIG_USB_RIO500 is not set 1358# CONFIG_USB_RIO500 is not set
1327# CONFIG_USB_LEGOTOWER is not set 1359# CONFIG_USB_LEGOTOWER is not set
1328# CONFIG_USB_LCD is not set 1360# CONFIG_USB_LCD is not set
@@ -1338,6 +1370,7 @@ CONFIG_USB_MON=y
1338# CONFIG_USB_TRANCEVIBRATOR is not set 1370# CONFIG_USB_TRANCEVIBRATOR is not set
1339# CONFIG_USB_IOWARRIOR is not set 1371# CONFIG_USB_IOWARRIOR is not set
1340# CONFIG_USB_TEST is not set 1372# CONFIG_USB_TEST is not set
1373# CONFIG_USB_ISIGHTFW is not set
1341# CONFIG_USB_GADGET is not set 1374# CONFIG_USB_GADGET is not set
1342CONFIG_MMC=m 1375CONFIG_MMC=m
1343# CONFIG_MMC_DEBUG is not set 1376# CONFIG_MMC_DEBUG is not set
@@ -1349,6 +1382,7 @@ CONFIG_MMC=m
1349CONFIG_MMC_BLOCK=m 1382CONFIG_MMC_BLOCK=m
1350CONFIG_MMC_BLOCK_BOUNCE=y 1383CONFIG_MMC_BLOCK_BOUNCE=y
1351# CONFIG_SDIO_UART is not set 1384# CONFIG_SDIO_UART is not set
1385# CONFIG_MMC_TEST is not set
1352 1386
1353# 1387#
1354# MMC/SD Host Controller Drivers 1388# MMC/SD Host Controller Drivers
@@ -1356,14 +1390,19 @@ CONFIG_MMC_BLOCK_BOUNCE=y
1356CONFIG_MMC_PXA=m 1390CONFIG_MMC_PXA=m
1357# CONFIG_MMC_SDHCI is not set 1391# CONFIG_MMC_SDHCI is not set
1358# CONFIG_MMC_TIFM_SD is not set 1392# CONFIG_MMC_TIFM_SD is not set
1393# CONFIG_MMC_SDRICOH_CS is not set
1394# CONFIG_MEMSTICK is not set
1395# CONFIG_ACCESSIBILITY is not set
1359CONFIG_NEW_LEDS=y 1396CONFIG_NEW_LEDS=y
1360CONFIG_LEDS_CLASS=y 1397CONFIG_LEDS_CLASS=y
1361 1398
1362# 1399#
1363# LED drivers 1400# LED drivers
1364# 1401#
1402# CONFIG_LEDS_PCA9532 is not set
1365# CONFIG_LEDS_GPIO is not set 1403# CONFIG_LEDS_GPIO is not set
1366CONFIG_LEDS_CM_X270=y 1404CONFIG_LEDS_CM_X270=y
1405# CONFIG_LEDS_PCA955X is not set
1367 1406
1368# 1407#
1369# LED Triggers 1408# LED Triggers
@@ -1401,6 +1440,7 @@ CONFIG_RTC_INTF_DEV=y
1401# CONFIG_RTC_DRV_PCF8583 is not set 1440# CONFIG_RTC_DRV_PCF8583 is not set
1402# CONFIG_RTC_DRV_M41T80 is not set 1441# CONFIG_RTC_DRV_M41T80 is not set
1403# CONFIG_RTC_DRV_S35390A is not set 1442# CONFIG_RTC_DRV_S35390A is not set
1443# CONFIG_RTC_DRV_FM3130 is not set
1404 1444
1405# 1445#
1406# SPI RTC drivers 1446# SPI RTC drivers
@@ -1422,6 +1462,15 @@ CONFIG_RTC_DRV_V3020=y
1422# on-CPU RTC drivers 1462# on-CPU RTC drivers
1423# 1463#
1424CONFIG_RTC_DRV_SA1100=y 1464CONFIG_RTC_DRV_SA1100=y
1465# CONFIG_DMADEVICES is not set
1466
1467#
1468# Voltage and Current regulators
1469#
1470# CONFIG_REGULATOR is not set
1471# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
1472# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
1473# CONFIG_REGULATOR_BQ24022 is not set
1425# CONFIG_UIO is not set 1474# CONFIG_UIO is not set
1426 1475
1427# 1476#
@@ -1501,6 +1550,7 @@ CONFIG_JFFS2_RTIME=y
1501# CONFIG_CRAMFS is not set 1550# CONFIG_CRAMFS is not set
1502# CONFIG_VXFS_FS is not set 1551# CONFIG_VXFS_FS is not set
1503# CONFIG_MINIX_FS is not set 1552# CONFIG_MINIX_FS is not set
1553# CONFIG_OMFS_FS is not set
1504# CONFIG_HPFS_FS is not set 1554# CONFIG_HPFS_FS is not set
1505# CONFIG_QNX4FS_FS is not set 1555# CONFIG_QNX4FS_FS is not set
1506# CONFIG_ROMFS_FS is not set 1556# CONFIG_ROMFS_FS is not set
@@ -1511,13 +1561,12 @@ CONFIG_NFS_FS=y
1511CONFIG_NFS_V3=y 1561CONFIG_NFS_V3=y
1512# CONFIG_NFS_V3_ACL is not set 1562# CONFIG_NFS_V3_ACL is not set
1513# CONFIG_NFS_V4 is not set 1563# CONFIG_NFS_V4 is not set
1514# CONFIG_NFSD is not set
1515CONFIG_ROOT_NFS=y 1564CONFIG_ROOT_NFS=y
1565# CONFIG_NFSD is not set
1516CONFIG_LOCKD=y 1566CONFIG_LOCKD=y
1517CONFIG_LOCKD_V4=y 1567CONFIG_LOCKD_V4=y
1518CONFIG_NFS_COMMON=y 1568CONFIG_NFS_COMMON=y
1519CONFIG_SUNRPC=y 1569CONFIG_SUNRPC=y
1520# CONFIG_SUNRPC_BIND34 is not set
1521# CONFIG_RPCSEC_GSS_KRB5 is not set 1570# CONFIG_RPCSEC_GSS_KRB5 is not set
1522# CONFIG_RPCSEC_GSS_SPKM3 is not set 1571# CONFIG_RPCSEC_GSS_SPKM3 is not set
1523# CONFIG_SMB_FS is not set 1572# CONFIG_SMB_FS is not set
@@ -1626,6 +1675,7 @@ CONFIG_DEBUG_KERNEL=y
1626# CONFIG_DEBUG_INFO is not set 1675# CONFIG_DEBUG_INFO is not set
1627# CONFIG_DEBUG_VM is not set 1676# CONFIG_DEBUG_VM is not set
1628# CONFIG_DEBUG_WRITECOUNT is not set 1677# CONFIG_DEBUG_WRITECOUNT is not set
1678# CONFIG_DEBUG_MEMORY_INIT is not set
1629# CONFIG_DEBUG_LIST is not set 1679# CONFIG_DEBUG_LIST is not set
1630# CONFIG_DEBUG_SG is not set 1680# CONFIG_DEBUG_SG is not set
1631CONFIG_FRAME_POINTER=y 1681CONFIG_FRAME_POINTER=y
@@ -1633,7 +1683,17 @@ CONFIG_FRAME_POINTER=y
1633# CONFIG_RCU_TORTURE_TEST is not set 1683# CONFIG_RCU_TORTURE_TEST is not set
1634# CONFIG_BACKTRACE_SELF_TEST is not set 1684# CONFIG_BACKTRACE_SELF_TEST is not set
1635# CONFIG_FAULT_INJECTION is not set 1685# CONFIG_FAULT_INJECTION is not set
1686# CONFIG_LATENCYTOP is not set
1687CONFIG_SYSCTL_SYSCALL_CHECK=y
1688CONFIG_HAVE_FTRACE=y
1689CONFIG_HAVE_DYNAMIC_FTRACE=y
1690# CONFIG_FTRACE is not set
1691# CONFIG_IRQSOFF_TRACER is not set
1692# CONFIG_SCHED_TRACER is not set
1693# CONFIG_CONTEXT_SWITCH_TRACER is not set
1636# CONFIG_SAMPLES is not set 1694# CONFIG_SAMPLES is not set
1695CONFIG_HAVE_ARCH_KGDB=y
1696# CONFIG_KGDB is not set
1637CONFIG_DEBUG_USER=y 1697CONFIG_DEBUG_USER=y
1638CONFIG_DEBUG_ERRORS=y 1698CONFIG_DEBUG_ERRORS=y
1639# CONFIG_DEBUG_STACK_USAGE is not set 1699# CONFIG_DEBUG_STACK_USAGE is not set
@@ -1689,6 +1749,10 @@ CONFIG_CRYPTO=y
1689# CONFIG_CRYPTO_MD4 is not set 1749# CONFIG_CRYPTO_MD4 is not set
1690# CONFIG_CRYPTO_MD5 is not set 1750# CONFIG_CRYPTO_MD5 is not set
1691# CONFIG_CRYPTO_MICHAEL_MIC is not set 1751# CONFIG_CRYPTO_MICHAEL_MIC is not set
1752# CONFIG_CRYPTO_RMD128 is not set
1753# CONFIG_CRYPTO_RMD160 is not set
1754# CONFIG_CRYPTO_RMD256 is not set
1755# CONFIG_CRYPTO_RMD320 is not set
1692# CONFIG_CRYPTO_SHA1 is not set 1756# CONFIG_CRYPTO_SHA1 is not set
1693# CONFIG_CRYPTO_SHA256 is not set 1757# CONFIG_CRYPTO_SHA256 is not set
1694# CONFIG_CRYPTO_SHA512 is not set 1758# CONFIG_CRYPTO_SHA512 is not set
@@ -1729,6 +1793,7 @@ CONFIG_BITREVERSE=y
1729# CONFIG_GENERIC_FIND_NEXT_BIT is not set 1793# CONFIG_GENERIC_FIND_NEXT_BIT is not set
1730CONFIG_CRC_CCITT=m 1794CONFIG_CRC_CCITT=m
1731# CONFIG_CRC16 is not set 1795# CONFIG_CRC16 is not set
1796# CONFIG_CRC_T10DIF is not set
1732# CONFIG_CRC_ITU_T is not set 1797# CONFIG_CRC_ITU_T is not set
1733CONFIG_CRC32=y 1798CONFIG_CRC32=y
1734# CONFIG_CRC7 is not set 1799# CONFIG_CRC7 is not set
diff --git a/arch/arm/include/asm/bug.h b/arch/arm/include/asm/bug.h
index 7b62351f097d..4d88425a4169 100644
--- a/arch/arm/include/asm/bug.h
+++ b/arch/arm/include/asm/bug.h
@@ -12,7 +12,7 @@ extern void __bug(const char *file, int line) __attribute__((noreturn));
12#else 12#else
13 13
14/* this just causes an oops */ 14/* this just causes an oops */
15#define BUG() (*(int *)0 = 0) 15#define BUG() do { *(int *)0 = 0; } while (1)
16 16
17#endif 17#endif
18 18
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h
index 9073d9c6567e..de6c59f814a1 100644
--- a/arch/arm/include/asm/cacheflush.h
+++ b/arch/arm/include/asm/cacheflush.h
@@ -444,94 +444,4 @@ static inline void flush_ioremap_region(unsigned long phys, void __iomem *virt,
444 dmac_inv_range(start, start + size); 444 dmac_inv_range(start, start + size);
445} 445}
446 446
447#define __cacheid_present(val) (val != read_cpuid(CPUID_ID))
448#define __cacheid_type_v7(val) ((val & (7 << 29)) == (4 << 29))
449
450#define __cacheid_vivt_prev7(val) ((val & (15 << 25)) != (14 << 25))
451#define __cacheid_vipt_prev7(val) ((val & (15 << 25)) == (14 << 25))
452#define __cacheid_vipt_nonaliasing_prev7(val) ((val & (15 << 25 | 1 << 23)) == (14 << 25))
453#define __cacheid_vipt_aliasing_prev7(val) ((val & (15 << 25 | 1 << 23)) == (14 << 25 | 1 << 23))
454
455#define __cacheid_vivt(val) (__cacheid_type_v7(val) ? 0 : __cacheid_vivt_prev7(val))
456#define __cacheid_vipt(val) (__cacheid_type_v7(val) ? 1 : __cacheid_vipt_prev7(val))
457#define __cacheid_vipt_nonaliasing(val) (__cacheid_type_v7(val) ? 1 : __cacheid_vipt_nonaliasing_prev7(val))
458#define __cacheid_vipt_aliasing(val) (__cacheid_type_v7(val) ? 0 : __cacheid_vipt_aliasing_prev7(val))
459#define __cacheid_vivt_asid_tagged_instr(val) (__cacheid_type_v7(val) ? ((val & (3 << 14)) == (1 << 14)) : 0)
460
461#if defined(CONFIG_CPU_CACHE_VIVT) && !defined(CONFIG_CPU_CACHE_VIPT)
462/*
463 * VIVT caches only
464 */
465#define cache_is_vivt() 1
466#define cache_is_vipt() 0
467#define cache_is_vipt_nonaliasing() 0
468#define cache_is_vipt_aliasing() 0
469#define icache_is_vivt_asid_tagged() 0
470
471#elif !defined(CONFIG_CPU_CACHE_VIVT) && defined(CONFIG_CPU_CACHE_VIPT)
472/*
473 * VIPT caches only
474 */
475#define cache_is_vivt() 0
476#define cache_is_vipt() 1
477#define cache_is_vipt_nonaliasing() \
478 ({ \
479 unsigned int __val = read_cpuid(CPUID_CACHETYPE); \
480 __cacheid_vipt_nonaliasing(__val); \
481 })
482
483#define cache_is_vipt_aliasing() \
484 ({ \
485 unsigned int __val = read_cpuid(CPUID_CACHETYPE); \
486 __cacheid_vipt_aliasing(__val); \
487 })
488
489#define icache_is_vivt_asid_tagged() \
490 ({ \
491 unsigned int __val = read_cpuid(CPUID_CACHETYPE); \
492 __cacheid_vivt_asid_tagged_instr(__val); \
493 })
494
495#else
496/*
497 * VIVT or VIPT caches. Note that this is unreliable since ARM926
498 * and V6 CPUs satisfy the "(val & (15 << 25)) == (14 << 25)" test.
499 * There's no way to tell from the CacheType register what type (!)
500 * the cache is.
501 */
502#define cache_is_vivt() \
503 ({ \
504 unsigned int __val = read_cpuid(CPUID_CACHETYPE); \
505 (!__cacheid_present(__val)) || __cacheid_vivt(__val); \
506 })
507
508#define cache_is_vipt() \
509 ({ \
510 unsigned int __val = read_cpuid(CPUID_CACHETYPE); \
511 __cacheid_present(__val) && __cacheid_vipt(__val); \
512 })
513
514#define cache_is_vipt_nonaliasing() \
515 ({ \
516 unsigned int __val = read_cpuid(CPUID_CACHETYPE); \
517 __cacheid_present(__val) && \
518 __cacheid_vipt_nonaliasing(__val); \
519 })
520
521#define cache_is_vipt_aliasing() \
522 ({ \
523 unsigned int __val = read_cpuid(CPUID_CACHETYPE); \
524 __cacheid_present(__val) && \
525 __cacheid_vipt_aliasing(__val); \
526 })
527
528#define icache_is_vivt_asid_tagged() \
529 ({ \
530 unsigned int __val = read_cpuid(CPUID_CACHETYPE); \
531 __cacheid_present(__val) && \
532 __cacheid_vivt_asid_tagged_instr(__val); \
533 })
534
535#endif
536
537#endif 447#endif
diff --git a/arch/arm/include/asm/cachetype.h b/arch/arm/include/asm/cachetype.h
new file mode 100644
index 000000000000..d3a4c2cb9f2f
--- /dev/null
+++ b/arch/arm/include/asm/cachetype.h
@@ -0,0 +1,52 @@
1#ifndef __ASM_ARM_CACHETYPE_H
2#define __ASM_ARM_CACHETYPE_H
3
4#define CACHEID_VIVT (1 << 0)
5#define CACHEID_VIPT_NONALIASING (1 << 1)
6#define CACHEID_VIPT_ALIASING (1 << 2)
7#define CACHEID_VIPT (CACHEID_VIPT_ALIASING|CACHEID_VIPT_NONALIASING)
8#define CACHEID_ASID_TAGGED (1 << 3)
9
10extern unsigned int cacheid;
11
12#define cache_is_vivt() cacheid_is(CACHEID_VIVT)
13#define cache_is_vipt() cacheid_is(CACHEID_VIPT)
14#define cache_is_vipt_nonaliasing() cacheid_is(CACHEID_VIPT_NONALIASING)
15#define cache_is_vipt_aliasing() cacheid_is(CACHEID_VIPT_ALIASING)
16#define icache_is_vivt_asid_tagged() cacheid_is(CACHEID_ASID_TAGGED)
17
18/*
19 * __LINUX_ARM_ARCH__ is the minimum supported CPU architecture
20 * Mask out support which will never be present on newer CPUs.
21 * - v6+ is never VIVT
22 * - v7+ VIPT never aliases
23 */
24#if __LINUX_ARM_ARCH__ >= 7
25#define __CACHEID_ARCH_MIN (CACHEID_VIPT_NONALIASING | CACHEID_ASID_TAGGED)
26#elif __LINUX_ARM_ARCH__ >= 6
27#define __CACHEID_ARCH_MIN (~CACHEID_VIVT)
28#else
29#define __CACHEID_ARCH_MIN (~0)
30#endif
31
32/*
33 * Mask out support which isn't configured
34 */
35#if defined(CONFIG_CPU_CACHE_VIVT) && !defined(CONFIG_CPU_CACHE_VIPT)
36#define __CACHEID_ALWAYS (CACHEID_VIVT)
37#define __CACHEID_NEVER (~CACHEID_VIVT)
38#elif !defined(CONFIG_CPU_CACHE_VIVT) && defined(CONFIG_CPU_CACHE_VIPT)
39#define __CACHEID_ALWAYS (0)
40#define __CACHEID_NEVER (CACHEID_VIVT)
41#else
42#define __CACHEID_ALWAYS (0)
43#define __CACHEID_NEVER (0)
44#endif
45
46static inline unsigned int __attribute__((pure)) cacheid_is(unsigned int mask)
47{
48 return (__CACHEID_ALWAYS & mask) |
49 (~__CACHEID_NEVER & __CACHEID_ARCH_MIN & mask & cacheid);
50}
51
52#endif
diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h
new file mode 100644
index 000000000000..7b9d27e749b8
--- /dev/null
+++ b/arch/arm/include/asm/cputype.h
@@ -0,0 +1,64 @@
1#ifndef __ASM_ARM_CPUTYPE_H
2#define __ASM_ARM_CPUTYPE_H
3
4#include <linux/stringify.h>
5
6#define CPUID_ID 0
7#define CPUID_CACHETYPE 1
8#define CPUID_TCM 2
9#define CPUID_TLBTYPE 3
10
11#ifdef CONFIG_CPU_CP15
12#define read_cpuid(reg) \
13 ({ \
14 unsigned int __val; \
15 asm("mrc p15, 0, %0, c0, c0, " __stringify(reg) \
16 : "=r" (__val) \
17 : \
18 : "cc"); \
19 __val; \
20 })
21#else
22extern unsigned int processor_id;
23#define read_cpuid(reg) (processor_id)
24#endif
25
26/*
27 * The CPU ID never changes at run time, so we might as well tell the
28 * compiler that it's constant. Use this function to read the CPU ID
29 * rather than directly reading processor_id or read_cpuid() directly.
30 */
31static inline unsigned int __attribute_const__ read_cpuid_id(void)
32{
33 return read_cpuid(CPUID_ID);
34}
35
36static inline unsigned int __attribute_const__ read_cpuid_cachetype(void)
37{
38 return read_cpuid(CPUID_CACHETYPE);
39}
40
41/*
42 * Intel's XScale3 core supports some v6 features (supersections, L2)
43 * but advertises itself as v5 as it does not support the v6 ISA. For
44 * this reason, we need a way to explicitly test for this type of CPU.
45 */
46#ifndef CONFIG_CPU_XSC3
47#define cpu_is_xsc3() 0
48#else
49static inline int cpu_is_xsc3(void)
50{
51 if ((read_cpuid_id() & 0xffffe000) == 0x69056000)
52 return 1;
53
54 return 0;
55}
56#endif
57
58#if !defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_CPU_XSC3)
59#define cpu_is_xscale() 0
60#else
61#define cpu_is_xscale() 1
62#endif
63
64#endif
diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h
index 7b95d2058395..1cb8602dd9d5 100644
--- a/arch/arm/include/asm/dma-mapping.h
+++ b/arch/arm/include/asm/dma-mapping.h
@@ -104,15 +104,14 @@ static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
104 * Dummy noncoherent implementation. We don't provide a dma_cache_sync 104 * Dummy noncoherent implementation. We don't provide a dma_cache_sync
105 * function so drivers using this API are highlighted with build warnings. 105 * function so drivers using this API are highlighted with build warnings.
106 */ 106 */
107static inline void * 107static inline void *dma_alloc_noncoherent(struct device *dev, size_t size,
108dma_alloc_noncoherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp) 108 dma_addr_t *handle, gfp_t gfp)
109{ 109{
110 return NULL; 110 return NULL;
111} 111}
112 112
113static inline void 113static inline void dma_free_noncoherent(struct device *dev, size_t size,
114dma_free_noncoherent(struct device *dev, size_t size, void *cpu_addr, 114 void *cpu_addr, dma_addr_t handle)
115 dma_addr_t handle)
116{ 115{
117} 116}
118 117
@@ -127,8 +126,7 @@ dma_free_noncoherent(struct device *dev, size_t size, void *cpu_addr,
127 * return the CPU-viewed address, and sets @handle to be the 126 * return the CPU-viewed address, and sets @handle to be the
128 * device-viewed address. 127 * device-viewed address.
129 */ 128 */
130extern void * 129extern void *dma_alloc_coherent(struct device *, size_t, dma_addr_t *, gfp_t);
131dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp);
132 130
133/** 131/**
134 * dma_free_coherent - free memory allocated by dma_alloc_coherent 132 * dma_free_coherent - free memory allocated by dma_alloc_coherent
@@ -143,9 +141,7 @@ dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gf
143 * References to memory and mappings associated with cpu_addr/handle 141 * References to memory and mappings associated with cpu_addr/handle
144 * during and after this call executing are illegal. 142 * during and after this call executing are illegal.
145 */ 143 */
146extern void 144extern void dma_free_coherent(struct device *, size_t, void *, dma_addr_t);
147dma_free_coherent(struct device *dev, size_t size, void *cpu_addr,
148 dma_addr_t handle);
149 145
150/** 146/**
151 * dma_mmap_coherent - map a coherent DMA allocation into user space 147 * dma_mmap_coherent - map a coherent DMA allocation into user space
@@ -159,8 +155,8 @@ dma_free_coherent(struct device *dev, size_t size, void *cpu_addr,
159 * into user space. The coherent DMA buffer must not be freed by the 155 * into user space. The coherent DMA buffer must not be freed by the
160 * driver until the user space mapping has been released. 156 * driver until the user space mapping has been released.
161 */ 157 */
162int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma, 158int dma_mmap_coherent(struct device *, struct vm_area_struct *,
163 void *cpu_addr, dma_addr_t handle, size_t size); 159 void *, dma_addr_t, size_t);
164 160
165 161
166/** 162/**
@@ -174,14 +170,94 @@ int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma,
174 * return the CPU-viewed address, and sets @handle to be the 170 * return the CPU-viewed address, and sets @handle to be the
175 * device-viewed address. 171 * device-viewed address.
176 */ 172 */
177extern void * 173extern void *dma_alloc_writecombine(struct device *, size_t, dma_addr_t *,
178dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp); 174 gfp_t);
179 175
180#define dma_free_writecombine(dev,size,cpu_addr,handle) \ 176#define dma_free_writecombine(dev,size,cpu_addr,handle) \
181 dma_free_coherent(dev,size,cpu_addr,handle) 177 dma_free_coherent(dev,size,cpu_addr,handle)
182 178
183int dma_mmap_writecombine(struct device *dev, struct vm_area_struct *vma, 179int dma_mmap_writecombine(struct device *, struct vm_area_struct *,
184 void *cpu_addr, dma_addr_t handle, size_t size); 180 void *, dma_addr_t, size_t);
181
182
183#ifdef CONFIG_DMABOUNCE
184/*
185 * For SA-1111, IXP425, and ADI systems the dma-mapping functions are "magic"
186 * and utilize bounce buffers as needed to work around limited DMA windows.
187 *
188 * On the SA-1111, a bug limits DMA to only certain regions of RAM.
189 * On the IXP425, the PCI inbound window is 64MB (256MB total RAM)
190 * On some ADI engineering systems, PCI inbound window is 32MB (12MB total RAM)
191 *
192 * The following are helper functions used by the dmabounce subystem
193 *
194 */
195
196/**
197 * dmabounce_register_dev
198 *
199 * @dev: valid struct device pointer
200 * @small_buf_size: size of buffers to use with small buffer pool
201 * @large_buf_size: size of buffers to use with large buffer pool (can be 0)
202 *
203 * This function should be called by low-level platform code to register
204 * a device as requireing DMA buffer bouncing. The function will allocate
205 * appropriate DMA pools for the device.
206 *
207 */
208extern int dmabounce_register_dev(struct device *, unsigned long,
209 unsigned long);
210
211/**
212 * dmabounce_unregister_dev
213 *
214 * @dev: valid struct device pointer
215 *
216 * This function should be called by low-level platform code when device
217 * that was previously registered with dmabounce_register_dev is removed
218 * from the system.
219 *
220 */
221extern void dmabounce_unregister_dev(struct device *);
222
223/**
224 * dma_needs_bounce
225 *
226 * @dev: valid struct device pointer
227 * @dma_handle: dma_handle of unbounced buffer
228 * @size: size of region being mapped
229 *
230 * Platforms that utilize the dmabounce mechanism must implement
231 * this function.
232 *
233 * The dmabounce routines call this function whenever a dma-mapping
234 * is requested to determine whether a given buffer needs to be bounced
235 * or not. The function must return 0 if the buffer is OK for
236 * DMA access and 1 if the buffer needs to be bounced.
237 *
238 */
239extern int dma_needs_bounce(struct device*, dma_addr_t, size_t);
240
241/*
242 * The DMA API, implemented by dmabounce.c. See below for descriptions.
243 */
244extern dma_addr_t dma_map_single(struct device *, void *, size_t,
245 enum dma_data_direction);
246extern dma_addr_t dma_map_page(struct device *, struct page *,
247 unsigned long, size_t, enum dma_data_direction);
248extern void dma_unmap_single(struct device *, dma_addr_t, size_t,
249 enum dma_data_direction);
250
251/*
252 * Private functions
253 */
254int dmabounce_sync_for_cpu(struct device *, dma_addr_t, unsigned long,
255 size_t, enum dma_data_direction);
256int dmabounce_sync_for_device(struct device *, dma_addr_t, unsigned long,
257 size_t, enum dma_data_direction);
258#else
259#define dmabounce_sync_for_cpu(dev,dma,off,sz,dir) (1)
260#define dmabounce_sync_for_device(dev,dma,off,sz,dir) (1)
185 261
186 262
187/** 263/**
@@ -198,19 +274,16 @@ int dma_mmap_writecombine(struct device *dev, struct vm_area_struct *vma,
198 * can regain ownership by calling dma_unmap_single() or 274 * can regain ownership by calling dma_unmap_single() or
199 * dma_sync_single_for_cpu(). 275 * dma_sync_single_for_cpu().
200 */ 276 */
201#ifndef CONFIG_DMABOUNCE 277static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
202static inline dma_addr_t 278 size_t size, enum dma_data_direction dir)
203dma_map_single(struct device *dev, void *cpu_addr, size_t size,
204 enum dma_data_direction dir)
205{ 279{
280 BUG_ON(!valid_dma_direction(dir));
281
206 if (!arch_is_coherent()) 282 if (!arch_is_coherent())
207 dma_cache_maint(cpu_addr, size, dir); 283 dma_cache_maint(cpu_addr, size, dir);
208 284
209 return virt_to_dma(dev, cpu_addr); 285 return virt_to_dma(dev, cpu_addr);
210} 286}
211#else
212extern dma_addr_t dma_map_single(struct device *,void *, size_t, enum dma_data_direction);
213#endif
214 287
215/** 288/**
216 * dma_map_page - map a portion of a page for streaming DMA 289 * dma_map_page - map a portion of a page for streaming DMA
@@ -224,23 +297,25 @@ extern dma_addr_t dma_map_single(struct device *,void *, size_t, enum dma_data_d
224 * or written back. 297 * or written back.
225 * 298 *
226 * The device owns this memory once this call has completed. The CPU 299 * The device owns this memory once this call has completed. The CPU
227 * can regain ownership by calling dma_unmap_page() or 300 * can regain ownership by calling dma_unmap_page().
228 * dma_sync_single_for_cpu().
229 */ 301 */
230static inline dma_addr_t 302static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
231dma_map_page(struct device *dev, struct page *page, 303 unsigned long offset, size_t size, enum dma_data_direction dir)
232 unsigned long offset, size_t size,
233 enum dma_data_direction dir)
234{ 304{
235 return dma_map_single(dev, page_address(page) + offset, size, dir); 305 BUG_ON(!valid_dma_direction(dir));
306
307 if (!arch_is_coherent())
308 dma_cache_maint(page_address(page) + offset, size, dir);
309
310 return page_to_dma(dev, page) + offset;
236} 311}
237 312
238/** 313/**
239 * dma_unmap_single - unmap a single buffer previously mapped 314 * dma_unmap_single - unmap a single buffer previously mapped
240 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices 315 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
241 * @handle: DMA address of buffer 316 * @handle: DMA address of buffer
242 * @size: size of buffer to map 317 * @size: size of buffer (same as passed to dma_map_single)
243 * @dir: DMA transfer direction 318 * @dir: DMA transfer direction (same as passed to dma_map_single)
244 * 319 *
245 * Unmap a single streaming mode DMA translation. The handle and size 320 * Unmap a single streaming mode DMA translation. The handle and size
246 * must match what was provided in the previous dma_map_single() call. 321 * must match what was provided in the previous dma_map_single() call.
@@ -249,108 +324,34 @@ dma_map_page(struct device *dev, struct page *page,
249 * After this call, reads by the CPU to the buffer are guaranteed to see 324 * After this call, reads by the CPU to the buffer are guaranteed to see
250 * whatever the device wrote there. 325 * whatever the device wrote there.
251 */ 326 */
252#ifndef CONFIG_DMABOUNCE 327static inline void dma_unmap_single(struct device *dev, dma_addr_t handle,
253static inline void 328 size_t size, enum dma_data_direction dir)
254dma_unmap_single(struct device *dev, dma_addr_t handle, size_t size,
255 enum dma_data_direction dir)
256{ 329{
257 /* nothing to do */ 330 /* nothing to do */
258} 331}
259#else 332#endif /* CONFIG_DMABOUNCE */
260extern void dma_unmap_single(struct device *, dma_addr_t, size_t, enum dma_data_direction);
261#endif
262 333
263/** 334/**
264 * dma_unmap_page - unmap a buffer previously mapped through dma_map_page() 335 * dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
265 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices 336 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
266 * @handle: DMA address of buffer 337 * @handle: DMA address of buffer
267 * @size: size of buffer to map 338 * @size: size of buffer (same as passed to dma_map_page)
268 * @dir: DMA transfer direction 339 * @dir: DMA transfer direction (same as passed to dma_map_page)
269 * 340 *
270 * Unmap a single streaming mode DMA translation. The handle and size 341 * Unmap a page streaming mode DMA translation. The handle and size
271 * must match what was provided in the previous dma_map_single() call. 342 * must match what was provided in the previous dma_map_page() call.
272 * All other usages are undefined. 343 * All other usages are undefined.
273 * 344 *
274 * After this call, reads by the CPU to the buffer are guaranteed to see 345 * After this call, reads by the CPU to the buffer are guaranteed to see
275 * whatever the device wrote there. 346 * whatever the device wrote there.
276 */ 347 */
277static inline void 348static inline void dma_unmap_page(struct device *dev, dma_addr_t handle,
278dma_unmap_page(struct device *dev, dma_addr_t handle, size_t size, 349 size_t size, enum dma_data_direction dir)
279 enum dma_data_direction dir)
280{ 350{
281 dma_unmap_single(dev, handle, size, dir); 351 dma_unmap_single(dev, handle, size, dir);
282} 352}
283 353
284/** 354/**
285 * dma_map_sg - map a set of SG buffers for streaming mode DMA
286 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
287 * @sg: list of buffers
288 * @nents: number of buffers to map
289 * @dir: DMA transfer direction
290 *
291 * Map a set of buffers described by scatterlist in streaming
292 * mode for DMA. This is the scatter-gather version of the
293 * above dma_map_single interface. Here the scatter gather list
294 * elements are each tagged with the appropriate dma address
295 * and length. They are obtained via sg_dma_{address,length}(SG).
296 *
297 * NOTE: An implementation may be able to use a smaller number of
298 * DMA address/length pairs than there are SG table elements.
299 * (for example via virtual mapping capabilities)
300 * The routine returns the number of addr/length pairs actually
301 * used, at most nents.
302 *
303 * Device ownership issues as mentioned above for dma_map_single are
304 * the same here.
305 */
306#ifndef CONFIG_DMABOUNCE
307static inline int
308dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
309 enum dma_data_direction dir)
310{
311 int i;
312
313 for (i = 0; i < nents; i++, sg++) {
314 char *virt;
315
316 sg->dma_address = page_to_dma(dev, sg_page(sg)) + sg->offset;
317 virt = sg_virt(sg);
318
319 if (!arch_is_coherent())
320 dma_cache_maint(virt, sg->length, dir);
321 }
322
323 return nents;
324}
325#else
326extern int dma_map_sg(struct device *, struct scatterlist *, int, enum dma_data_direction);
327#endif
328
329/**
330 * dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
331 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
332 * @sg: list of buffers
333 * @nents: number of buffers to map
334 * @dir: DMA transfer direction
335 *
336 * Unmap a set of streaming mode DMA translations.
337 * Again, CPU read rules concerning calls here are the same as for
338 * dma_unmap_single() above.
339 */
340#ifndef CONFIG_DMABOUNCE
341static inline void
342dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
343 enum dma_data_direction dir)
344{
345
346 /* nothing to do */
347}
348#else
349extern void dma_unmap_sg(struct device *, struct scatterlist *, int, enum dma_data_direction);
350#endif
351
352
353/**
354 * dma_sync_single_range_for_cpu 355 * dma_sync_single_range_for_cpu
355 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices 356 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
356 * @handle: DMA address of buffer 357 * @handle: DMA address of buffer
@@ -368,145 +369,52 @@ extern void dma_unmap_sg(struct device *, struct scatterlist *, int, enum dma_da
368 * must first the perform a dma_sync_for_device, and then the 369 * must first the perform a dma_sync_for_device, and then the
369 * device again owns the buffer. 370 * device again owns the buffer.
370 */ 371 */
371#ifndef CONFIG_DMABOUNCE 372static inline void dma_sync_single_range_for_cpu(struct device *dev,
372static inline void 373 dma_addr_t handle, unsigned long offset, size_t size,
373dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t handle, 374 enum dma_data_direction dir)
374 unsigned long offset, size_t size,
375 enum dma_data_direction dir)
376{ 375{
377 if (!arch_is_coherent()) 376 BUG_ON(!valid_dma_direction(dir));
378 dma_cache_maint(dma_to_virt(dev, handle) + offset, size, dir); 377
378 dmabounce_sync_for_cpu(dev, handle, offset, size, dir);
379} 379}
380 380
381static inline void 381static inline void dma_sync_single_range_for_device(struct device *dev,
382dma_sync_single_range_for_device(struct device *dev, dma_addr_t handle, 382 dma_addr_t handle, unsigned long offset, size_t size,
383 unsigned long offset, size_t size, 383 enum dma_data_direction dir)
384 enum dma_data_direction dir)
385{ 384{
385 BUG_ON(!valid_dma_direction(dir));
386
387 if (!dmabounce_sync_for_device(dev, handle, offset, size, dir))
388 return;
389
386 if (!arch_is_coherent()) 390 if (!arch_is_coherent())
387 dma_cache_maint(dma_to_virt(dev, handle) + offset, size, dir); 391 dma_cache_maint(dma_to_virt(dev, handle) + offset, size, dir);
388} 392}
389#else
390extern void dma_sync_single_range_for_cpu(struct device *, dma_addr_t, unsigned long, size_t, enum dma_data_direction);
391extern void dma_sync_single_range_for_device(struct device *, dma_addr_t, unsigned long, size_t, enum dma_data_direction);
392#endif
393 393
394static inline void 394static inline void dma_sync_single_for_cpu(struct device *dev,
395dma_sync_single_for_cpu(struct device *dev, dma_addr_t handle, size_t size, 395 dma_addr_t handle, size_t size, enum dma_data_direction dir)
396 enum dma_data_direction dir)
397{ 396{
398 dma_sync_single_range_for_cpu(dev, handle, 0, size, dir); 397 dma_sync_single_range_for_cpu(dev, handle, 0, size, dir);
399} 398}
400 399
401static inline void 400static inline void dma_sync_single_for_device(struct device *dev,
402dma_sync_single_for_device(struct device *dev, dma_addr_t handle, size_t size, 401 dma_addr_t handle, size_t size, enum dma_data_direction dir)
403 enum dma_data_direction dir)
404{ 402{
405 dma_sync_single_range_for_device(dev, handle, 0, size, dir); 403 dma_sync_single_range_for_device(dev, handle, 0, size, dir);
406} 404}
407 405
408
409/**
410 * dma_sync_sg_for_cpu
411 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
412 * @sg: list of buffers
413 * @nents: number of buffers to map
414 * @dir: DMA transfer direction
415 *
416 * Make physical memory consistent for a set of streaming
417 * mode DMA translations after a transfer.
418 *
419 * The same as dma_sync_single_for_* but for a scatter-gather list,
420 * same rules and usage.
421 */
422#ifndef CONFIG_DMABOUNCE
423static inline void
424dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents,
425 enum dma_data_direction dir)
426{
427 int i;
428
429 for (i = 0; i < nents; i++, sg++) {
430 char *virt = sg_virt(sg);
431 if (!arch_is_coherent())
432 dma_cache_maint(virt, sg->length, dir);
433 }
434}
435
436static inline void
437dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,
438 enum dma_data_direction dir)
439{
440 int i;
441
442 for (i = 0; i < nents; i++, sg++) {
443 char *virt = sg_virt(sg);
444 if (!arch_is_coherent())
445 dma_cache_maint(virt, sg->length, dir);
446 }
447}
448#else
449extern void dma_sync_sg_for_cpu(struct device*, struct scatterlist*, int, enum dma_data_direction);
450extern void dma_sync_sg_for_device(struct device*, struct scatterlist*, int, enum dma_data_direction);
451#endif
452
453#ifdef CONFIG_DMABOUNCE
454/* 406/*
455 * For SA-1111, IXP425, and ADI systems the dma-mapping functions are "magic" 407 * The scatter list versions of the above methods.
456 * and utilize bounce buffers as needed to work around limited DMA windows.
457 *
458 * On the SA-1111, a bug limits DMA to only certain regions of RAM.
459 * On the IXP425, the PCI inbound window is 64MB (256MB total RAM)
460 * On some ADI engineering systems, PCI inbound window is 32MB (12MB total RAM)
461 *
462 * The following are helper functions used by the dmabounce subystem
463 *
464 */
465
466/**
467 * dmabounce_register_dev
468 *
469 * @dev: valid struct device pointer
470 * @small_buf_size: size of buffers to use with small buffer pool
471 * @large_buf_size: size of buffers to use with large buffer pool (can be 0)
472 *
473 * This function should be called by low-level platform code to register
474 * a device as requireing DMA buffer bouncing. The function will allocate
475 * appropriate DMA pools for the device.
476 *
477 */
478extern int dmabounce_register_dev(struct device *, unsigned long, unsigned long);
479
480/**
481 * dmabounce_unregister_dev
482 *
483 * @dev: valid struct device pointer
484 *
485 * This function should be called by low-level platform code when device
486 * that was previously registered with dmabounce_register_dev is removed
487 * from the system.
488 *
489 */ 408 */
490extern void dmabounce_unregister_dev(struct device *); 409extern int dma_map_sg(struct device *, struct scatterlist *, int,
410 enum dma_data_direction);
411extern void dma_unmap_sg(struct device *, struct scatterlist *, int,
412 enum dma_data_direction);
413extern void dma_sync_sg_for_cpu(struct device *, struct scatterlist *, int,
414 enum dma_data_direction);
415extern void dma_sync_sg_for_device(struct device *, struct scatterlist *, int,
416 enum dma_data_direction);
491 417
492/**
493 * dma_needs_bounce
494 *
495 * @dev: valid struct device pointer
496 * @dma_handle: dma_handle of unbounced buffer
497 * @size: size of region being mapped
498 *
499 * Platforms that utilize the dmabounce mechanism must implement
500 * this function.
501 *
502 * The dmabounce routines call this function whenever a dma-mapping
503 * is requested to determine whether a given buffer needs to be bounced
504 * or not. The function must return 0 if the buffer is OK for
505 * DMA access and 1 if the buffer needs to be bounced.
506 *
507 */
508extern int dma_needs_bounce(struct device*, dma_addr_t, size_t);
509#endif /* CONFIG_DMABOUNCE */
510 418
511#endif /* __KERNEL__ */ 419#endif /* __KERNEL__ */
512#endif 420#endif
diff --git a/arch/arm/include/asm/elf.h b/arch/arm/include/asm/elf.h
index 4ca751627489..5be016980c19 100644
--- a/arch/arm/include/asm/elf.h
+++ b/arch/arm/include/asm/elf.h
@@ -3,7 +3,6 @@
3 3
4#include <asm/hwcap.h> 4#include <asm/hwcap.h>
5 5
6#ifndef __ASSEMBLY__
7/* 6/*
8 * ELF register definitions.. 7 * ELF register definitions..
9 */ 8 */
@@ -17,12 +16,34 @@ typedef unsigned long elf_freg_t[3];
17typedef elf_greg_t elf_gregset_t[ELF_NGREG]; 16typedef elf_greg_t elf_gregset_t[ELF_NGREG];
18 17
19typedef struct user_fp elf_fpregset_t; 18typedef struct user_fp elf_fpregset_t;
20#endif
21 19
22#define EM_ARM 40 20#define EM_ARM 40
23#define EF_ARM_APCS26 0x08 21
24#define EF_ARM_SOFT_FLOAT 0x200 22#define EF_ARM_EABI_MASK 0xff000000
25#define EF_ARM_EABI_MASK 0xFF000000 23#define EF_ARM_EABI_UNKNOWN 0x00000000
24#define EF_ARM_EABI_VER1 0x01000000
25#define EF_ARM_EABI_VER2 0x02000000
26#define EF_ARM_EABI_VER3 0x03000000
27#define EF_ARM_EABI_VER4 0x04000000
28#define EF_ARM_EABI_VER5 0x05000000
29
30#define EF_ARM_BE8 0x00800000 /* ABI 4,5 */
31#define EF_ARM_LE8 0x00400000 /* ABI 4,5 */
32#define EF_ARM_MAVERICK_FLOAT 0x00000800 /* ABI 0 */
33#define EF_ARM_VFP_FLOAT 0x00000400 /* ABI 0 */
34#define EF_ARM_SOFT_FLOAT 0x00000200 /* ABI 0 */
35#define EF_ARM_OLD_ABI 0x00000100 /* ABI 0 */
36#define EF_ARM_NEW_ABI 0x00000080 /* ABI 0 */
37#define EF_ARM_ALIGN8 0x00000040 /* ABI 0 */
38#define EF_ARM_PIC 0x00000020 /* ABI 0 */
39#define EF_ARM_MAPSYMSFIRST 0x00000010 /* ABI 2 */
40#define EF_ARM_APCS_FLOAT 0x00000010 /* ABI 0, floats in fp regs */
41#define EF_ARM_DYNSYMSUSESEGIDX 0x00000008 /* ABI 2 */
42#define EF_ARM_APCS_26 0x00000008 /* ABI 0 */
43#define EF_ARM_SYMSARESORTED 0x00000004 /* ABI 1,2 */
44#define EF_ARM_INTERWORK 0x00000004 /* ABI 0 */
45#define EF_ARM_HASENTRY 0x00000002 /* All */
46#define EF_ARM_RELEXEC 0x00000001 /* All */
26 47
27#define R_ARM_NONE 0 48#define R_ARM_NONE 0
28#define R_ARM_PC24 1 49#define R_ARM_PC24 1
@@ -41,7 +62,6 @@ typedef struct user_fp elf_fpregset_t;
41#endif 62#endif
42#define ELF_ARCH EM_ARM 63#define ELF_ARCH EM_ARM
43 64
44#ifndef __ASSEMBLY__
45/* 65/*
46 * This yields a string that ld.so will use to load implementation 66 * This yields a string that ld.so will use to load implementation
47 * specific libraries for optimization. This is more specific in 67 * specific libraries for optimization. This is more specific in
@@ -59,25 +79,17 @@ typedef struct user_fp elf_fpregset_t;
59#define ELF_PLATFORM (elf_platform) 79#define ELF_PLATFORM (elf_platform)
60 80
61extern char elf_platform[]; 81extern char elf_platform[];
62#endif
63 82
64/* 83struct elf32_hdr;
65 * This is used to ensure we don't load something for the wrong architecture.
66 */
67#define elf_check_arch(x) ((x)->e_machine == EM_ARM && ELF_PROC_OK(x))
68 84
69/* 85/*
70 * 32-bit code is always OK. Some cpus can do 26-bit, some can't. 86 * This is used to ensure we don't load something for the wrong architecture.
71 */ 87 */
72#define ELF_PROC_OK(x) (ELF_THUMB_OK(x) && ELF_26BIT_OK(x)) 88extern int elf_check_arch(const struct elf32_hdr *);
73 89#define elf_check_arch elf_check_arch
74#define ELF_THUMB_OK(x) \
75 ((elf_hwcap & HWCAP_THUMB && ((x)->e_entry & 1) == 1) || \
76 ((x)->e_entry & 3) == 0)
77 90
78#define ELF_26BIT_OK(x) \ 91extern int arm_elf_read_implies_exec(const struct elf32_hdr *, int);
79 ((elf_hwcap & HWCAP_26BIT && (x)->e_flags & EF_ARM_APCS26) || \ 92#define elf_read_implies_exec(ex,stk) arm_elf_read_implies_exec(&(ex), stk)
80 ((x)->e_flags & EF_ARM_APCS26) == 0)
81 93
82#define USE_ELF_CORE_DUMP 94#define USE_ELF_CORE_DUMP
83#define ELF_EXEC_PAGESIZE 4096 95#define ELF_EXEC_PAGESIZE 4096
@@ -94,23 +106,7 @@ extern char elf_platform[];
94 have no such handler. */ 106 have no such handler. */
95#define ELF_PLAT_INIT(_r, load_addr) (_r)->ARM_r0 = 0 107#define ELF_PLAT_INIT(_r, load_addr) (_r)->ARM_r0 = 0
96 108
97/* 109extern void elf_set_personality(const struct elf32_hdr *);
98 * Since the FPA coprocessor uses CP1 and CP2, and iWMMXt uses CP0 110#define SET_PERSONALITY(ex, ibcs2) elf_set_personality(&(ex))
99 * and CP1, we only enable access to the iWMMXt coprocessor if the
100 * binary is EABI or softfloat (and thus, guaranteed not to use
101 * FPA instructions.)
102 */
103#define SET_PERSONALITY(ex, ibcs2) \
104 do { \
105 if ((ex).e_flags & EF_ARM_APCS26) { \
106 set_personality(PER_LINUX); \
107 } else { \
108 set_personality(PER_LINUX_32BIT); \
109 if (elf_hwcap & HWCAP_IWMMXT && (ex).e_flags & (EF_ARM_EABI_MASK | EF_ARM_SOFT_FLOAT)) \
110 set_thread_flag(TIF_USING_IWMMXT); \
111 else \
112 clear_thread_flag(TIF_USING_IWMMXT); \
113 } \
114 } while (0)
115 111
116#endif 112#endif
diff --git a/arch/arm/include/asm/futex.h b/arch/arm/include/asm/futex.h
index 6a332a9f099c..9ee743b95de8 100644
--- a/arch/arm/include/asm/futex.h
+++ b/arch/arm/include/asm/futex.h
@@ -1,6 +1,124 @@
1#ifndef _ASM_FUTEX_H 1#ifndef _ASM_ARM_FUTEX_H
2#define _ASM_FUTEX_H 2#define _ASM_ARM_FUTEX_H
3
4#ifdef __KERNEL__
5
6#ifdef CONFIG_SMP
3 7
4#include <asm-generic/futex.h> 8#include <asm-generic/futex.h>
5 9
6#endif 10#else /* !SMP, we can work around lack of atomic ops by disabling preemption */
11
12#include <linux/futex.h>
13#include <linux/preempt.h>
14#include <linux/uaccess.h>
15#include <asm/errno.h>
16
17#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \
18 __asm__ __volatile__( \
19 "1: ldrt %1, [%2]\n" \
20 " " insn "\n" \
21 "2: strt %0, [%2]\n" \
22 " mov %0, #0\n" \
23 "3:\n" \
24 " .section __ex_table,\"a\"\n" \
25 " .align 3\n" \
26 " .long 1b, 4f, 2b, 4f\n" \
27 " .previous\n" \
28 " .section .fixup,\"ax\"\n" \
29 "4: mov %0, %4\n" \
30 " b 3b\n" \
31 " .previous" \
32 : "=&r" (ret), "=&r" (oldval) \
33 : "r" (uaddr), "r" (oparg), "Ir" (-EFAULT) \
34 : "cc", "memory")
35
36static inline int
37futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
38{
39 int op = (encoded_op >> 28) & 7;
40 int cmp = (encoded_op >> 24) & 15;
41 int oparg = (encoded_op << 8) >> 20;
42 int cmparg = (encoded_op << 20) >> 20;
43 int oldval = 0, ret;
44
45 if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
46 oparg = 1 << oparg;
47
48 if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))
49 return -EFAULT;
50
51 pagefault_disable(); /* implies preempt_disable() */
52
53 switch (op) {
54 case FUTEX_OP_SET:
55 __futex_atomic_op("mov %0, %3", ret, oldval, uaddr, oparg);
56 break;
57 case FUTEX_OP_ADD:
58 __futex_atomic_op("add %0, %1, %3", ret, oldval, uaddr, oparg);
59 break;
60 case FUTEX_OP_OR:
61 __futex_atomic_op("orr %0, %1, %3", ret, oldval, uaddr, oparg);
62 break;
63 case FUTEX_OP_ANDN:
64 __futex_atomic_op("and %0, %1, %3", ret, oldval, uaddr, ~oparg);
65 break;
66 case FUTEX_OP_XOR:
67 __futex_atomic_op("eor %0, %1, %3", ret, oldval, uaddr, oparg);
68 break;
69 default:
70 ret = -ENOSYS;
71 }
72
73 pagefault_enable(); /* subsumes preempt_enable() */
74
75 if (!ret) {
76 switch (cmp) {
77 case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
78 case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
79 case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
80 case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
81 case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
82 case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
83 default: ret = -ENOSYS;
84 }
85 }
86 return ret;
87}
88
89static inline int
90futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
91{
92 int val;
93
94 if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))
95 return -EFAULT;
96
97 pagefault_disable(); /* implies preempt_disable() */
98
99 __asm__ __volatile__("@futex_atomic_cmpxchg_inatomic\n"
100 "1: ldrt %0, [%3]\n"
101 " teq %0, %1\n"
102 "2: streqt %2, [%3]\n"
103 "3:\n"
104 " .section __ex_table,\"a\"\n"
105 " .align 3\n"
106 " .long 1b, 4f, 2b, 4f\n"
107 " .previous\n"
108 " .section .fixup,\"ax\"\n"
109 "4: mov %0, %4\n"
110 " b 3b\n"
111 " .previous"
112 : "=&r" (val)
113 : "r" (oldval), "r" (newval), "r" (uaddr), "Ir" (-EFAULT)
114 : "cc", "memory");
115
116 pagefault_enable(); /* subsumes preempt_enable() */
117
118 return val;
119}
120
121#endif /* !SMP */
122
123#endif /* __KERNEL__ */
124#endif /* _ASM_ARM_FUTEX_H */
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index 71934856fc22..a8094451be57 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -60,10 +60,9 @@ extern void __raw_readsl(const void __iomem *addr, void *data, int longlen);
60#define MT_DEVICE 0 60#define MT_DEVICE 0
61#define MT_DEVICE_NONSHARED 1 61#define MT_DEVICE_NONSHARED 1
62#define MT_DEVICE_CACHED 2 62#define MT_DEVICE_CACHED 2
63#define MT_DEVICE_IXP2000 3 63#define MT_DEVICE_WC 3
64#define MT_DEVICE_WC 4
65/* 64/*
66 * types 5 onwards can be found in asm/mach/map.h and are undefined 65 * types 4 onwards can be found in asm/mach/map.h and are undefined
67 * for ioremap 66 * for ioremap
68 */ 67 */
69 68
diff --git a/arch/arm/include/asm/irq.h b/arch/arm/include/asm/irq.h
index d6786090d02c..a0009aa5d157 100644
--- a/arch/arm/include/asm/irq.h
+++ b/arch/arm/include/asm/irq.h
@@ -22,6 +22,10 @@
22#ifndef __ASSEMBLY__ 22#ifndef __ASSEMBLY__
23struct irqaction; 23struct irqaction;
24extern void migrate_irqs(void); 24extern void migrate_irqs(void);
25
26extern void asm_do_IRQ(unsigned int, struct pt_regs *);
27void init_IRQ(void);
28
25#endif 29#endif
26 30
27#endif 31#endif
diff --git a/arch/arm/include/asm/kprobes.h b/arch/arm/include/asm/kprobes.h
index a5d0d99ad387..bb8a19bd5822 100644
--- a/arch/arm/include/asm/kprobes.h
+++ b/arch/arm/include/asm/kprobes.h
@@ -61,7 +61,6 @@ struct kprobe_ctlblk {
61void arch_remove_kprobe(struct kprobe *); 61void arch_remove_kprobe(struct kprobe *);
62void kretprobe_trampoline(void); 62void kretprobe_trampoline(void);
63 63
64int kprobe_trap_handler(struct pt_regs *regs, unsigned int instr);
65int kprobe_fault_handler(struct pt_regs *regs, unsigned int fsr); 64int kprobe_fault_handler(struct pt_regs *regs, unsigned int fsr);
66int kprobe_exceptions_notify(struct notifier_block *self, 65int kprobe_exceptions_notify(struct notifier_block *self,
67 unsigned long val, void *data); 66 unsigned long val, void *data);
diff --git a/arch/arm/include/asm/mach/map.h b/arch/arm/include/asm/mach/map.h
index 9eb936e49cc3..cb1139ac1943 100644
--- a/arch/arm/include/asm/mach/map.h
+++ b/arch/arm/include/asm/mach/map.h
@@ -18,16 +18,13 @@ struct map_desc {
18 unsigned int type; 18 unsigned int type;
19}; 19};
20 20
21/* types 0-4 are defined in asm/io.h */ 21/* types 0-3 are defined in asm/io.h */
22#define MT_CACHECLEAN 5 22#define MT_CACHECLEAN 4
23#define MT_MINICLEAN 6 23#define MT_MINICLEAN 5
24#define MT_LOW_VECTORS 7 24#define MT_LOW_VECTORS 6
25#define MT_HIGH_VECTORS 8 25#define MT_HIGH_VECTORS 7
26#define MT_MEMORY 9 26#define MT_MEMORY 8
27#define MT_ROM 10 27#define MT_ROM 9
28
29#define MT_NONSHARED_DEVICE MT_DEVICE_NONSHARED
30#define MT_IXP2000_DEVICE MT_DEVICE_IXP2000
31 28
32#ifdef CONFIG_MMU 29#ifdef CONFIG_MMU
33extern void iotable_init(struct map_desc *, int); 30extern void iotable_init(struct map_desc *, int);
diff --git a/arch/arm/include/asm/mach/udc_pxa2xx.h b/arch/arm/include/asm/mach/udc_pxa2xx.h
index 270902c353fd..f3eabf1ecec3 100644
--- a/arch/arm/include/asm/mach/udc_pxa2xx.h
+++ b/arch/arm/include/asm/mach/udc_pxa2xx.h
@@ -18,8 +18,7 @@ struct pxa2xx_udc_mach_info {
18 /* Boards following the design guidelines in the developer's manual, 18 /* Boards following the design guidelines in the developer's manual,
19 * with on-chip GPIOs not Lubbock's weird hardware, can have a sane 19 * with on-chip GPIOs not Lubbock's weird hardware, can have a sane
20 * VBUS IRQ and omit the methods above. Store the GPIO number 20 * VBUS IRQ and omit the methods above. Store the GPIO number
21 * here; for GPIO 0, also mask in one of the pxa_gpio_mode() bits. 21 * here. Note that sometimes the signals go through inverters...
22 * Note that sometimes the signals go through inverters...
23 */ 22 */
24 bool gpio_vbus_inverted; 23 bool gpio_vbus_inverted;
25 u16 gpio_vbus; /* high == vbus present */ 24 u16 gpio_vbus; /* high == vbus present */
diff --git a/arch/arm/include/asm/mc146818rtc.h b/arch/arm/include/asm/mc146818rtc.h
index e1ca48a9e973..6b884d2b0b69 100644
--- a/arch/arm/include/asm/mc146818rtc.h
+++ b/arch/arm/include/asm/mc146818rtc.h
@@ -4,8 +4,8 @@
4#ifndef _ASM_MC146818RTC_H 4#ifndef _ASM_MC146818RTC_H
5#define _ASM_MC146818RTC_H 5#define _ASM_MC146818RTC_H
6 6
7#include <linux/io.h>
7#include <mach/irqs.h> 8#include <mach/irqs.h>
8#include <asm/io.h>
9 9
10#ifndef RTC_PORT 10#ifndef RTC_PORT
11#define RTC_PORT(x) (0x70 + (x)) 11#define RTC_PORT(x) (0x70 + (x))
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index bf7c737c9226..809ff9ab853a 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -13,30 +13,27 @@
13#ifndef __ASM_ARM_MEMORY_H 13#ifndef __ASM_ARM_MEMORY_H
14#define __ASM_ARM_MEMORY_H 14#define __ASM_ARM_MEMORY_H
15 15
16#include <linux/compiler.h>
17#include <linux/const.h>
18#include <mach/memory.h>
19#include <asm/sizes.h>
20
16/* 21/*
17 * Allow for constants defined here to be used from assembly code 22 * Allow for constants defined here to be used from assembly code
18 * by prepending the UL suffix only with actual C code compilation. 23 * by prepending the UL suffix only with actual C code compilation.
19 */ 24 */
20#ifndef __ASSEMBLY__ 25#define UL(x) _AC(x, UL)
21#define UL(x) (x##UL)
22#else
23#define UL(x) (x)
24#endif
25
26#include <linux/compiler.h>
27#include <mach/memory.h>
28#include <asm/sizes.h>
29 26
30#ifdef CONFIG_MMU 27#ifdef CONFIG_MMU
31 28
32#ifndef TASK_SIZE
33/* 29/*
30 * PAGE_OFFSET - the virtual address of the start of the kernel image
34 * TASK_SIZE - the maximum size of a user space task. 31 * TASK_SIZE - the maximum size of a user space task.
35 * TASK_UNMAPPED_BASE - the lower boundary of the mmap VM area 32 * TASK_UNMAPPED_BASE - the lower boundary of the mmap VM area
36 */ 33 */
37#define TASK_SIZE UL(0xbf000000) 34#define PAGE_OFFSET UL(CONFIG_PAGE_OFFSET)
38#define TASK_UNMAPPED_BASE UL(0x40000000) 35#define TASK_SIZE (UL(CONFIG_PAGE_OFFSET) - UL(0x01000000))
39#endif 36#define TASK_UNMAPPED_BASE (UL(CONFIG_PAGE_OFFSET) / 3)
40 37
41/* 38/*
42 * The maximum size of a 26-bit user space task. 39 * The maximum size of a 26-bit user space task.
@@ -44,13 +41,6 @@
44#define TASK_SIZE_26 UL(0x04000000) 41#define TASK_SIZE_26 UL(0x04000000)
45 42
46/* 43/*
47 * Page offset: 3GB
48 */
49#ifndef PAGE_OFFSET
50#define PAGE_OFFSET UL(0xc0000000)
51#endif
52
53/*
54 * The module space lives between the addresses given by TASK_SIZE 44 * The module space lives between the addresses given by TASK_SIZE
55 * and PAGE_OFFSET - it must be within 32MB of the kernel text. 45 * and PAGE_OFFSET - it must be within 32MB of the kernel text.
56 */ 46 */
@@ -147,17 +137,11 @@
147 137
148#ifndef arch_adjust_zones 138#ifndef arch_adjust_zones
149#define arch_adjust_zones(node,size,holes) do { } while (0) 139#define arch_adjust_zones(node,size,holes) do { } while (0)
140#elif !defined(CONFIG_ZONE_DMA)
141#error "custom arch_adjust_zones() requires CONFIG_ZONE_DMA"
150#endif 142#endif
151 143
152/* 144/*
153 * Amount of memory reserved for the vmalloc() area, and minimum
154 * address for vmalloc mappings.
155 */
156extern unsigned long vmalloc_reserve;
157
158#define VMALLOC_MIN (void *)(VMALLOC_END - vmalloc_reserve)
159
160/*
161 * PFNs are used to describe any physical page; this means 145 * PFNs are used to describe any physical page; this means
162 * PFN 0 == physical address 0. 146 * PFN 0 == physical address 0.
163 * 147 *
diff --git a/arch/arm/include/asm/mmu_context.h b/arch/arm/include/asm/mmu_context.h
index a301e446007f..0559f37c2a27 100644
--- a/arch/arm/include/asm/mmu_context.h
+++ b/arch/arm/include/asm/mmu_context.h
@@ -15,6 +15,7 @@
15 15
16#include <linux/compiler.h> 16#include <linux/compiler.h>
17#include <asm/cacheflush.h> 17#include <asm/cacheflush.h>
18#include <asm/cachetype.h>
18#include <asm/proc-fns.h> 19#include <asm/proc-fns.h>
19#include <asm-generic/mm_hooks.h> 20#include <asm-generic/mm_hooks.h>
20 21
diff --git a/arch/arm/include/asm/page.h b/arch/arm/include/asm/page.h
index cf2e2680daaa..bed1c0a00368 100644
--- a/arch/arm/include/asm/page.h
+++ b/arch/arm/include/asm/page.h
@@ -184,8 +184,9 @@ typedef struct page *pgtable_t;
184 184
185#endif /* !__ASSEMBLY__ */ 185#endif /* !__ASSEMBLY__ */
186 186
187#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ 187#define VM_DATA_DEFAULT_FLAGS \
188 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) 188 (((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0) | \
189 VM_READ | VM_WRITE | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
189 190
190/* 191/*
191 * With EABI on ARMv5 and above we must have 64-bit aligned slab pointers. 192 * With EABI on ARMv5 and above we must have 64-bit aligned slab pointers.
diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h
index 8e21ef15bd74..110295c5461d 100644
--- a/arch/arm/include/asm/pgtable.h
+++ b/arch/arm/include/asm/pgtable.h
@@ -164,14 +164,30 @@ extern void __pgd_error(const char *file, int line, unsigned long val);
164#define L_PTE_PRESENT (1 << 0) 164#define L_PTE_PRESENT (1 << 0)
165#define L_PTE_FILE (1 << 1) /* only when !PRESENT */ 165#define L_PTE_FILE (1 << 1) /* only when !PRESENT */
166#define L_PTE_YOUNG (1 << 1) 166#define L_PTE_YOUNG (1 << 1)
167#define L_PTE_BUFFERABLE (1 << 2) /* matches PTE */ 167#define L_PTE_BUFFERABLE (1 << 2) /* obsolete, matches PTE */
168#define L_PTE_CACHEABLE (1 << 3) /* matches PTE */ 168#define L_PTE_CACHEABLE (1 << 3) /* obsolete, matches PTE */
169#define L_PTE_USER (1 << 4) 169#define L_PTE_DIRTY (1 << 6)
170#define L_PTE_WRITE (1 << 5) 170#define L_PTE_WRITE (1 << 7)
171#define L_PTE_EXEC (1 << 6) 171#define L_PTE_USER (1 << 8)
172#define L_PTE_DIRTY (1 << 7) 172#define L_PTE_EXEC (1 << 9)
173#define L_PTE_SHARED (1 << 10) /* shared(v6), coherent(xsc3) */ 173#define L_PTE_SHARED (1 << 10) /* shared(v6), coherent(xsc3) */
174 174
175/*
176 * These are the memory types, defined to be compatible with
177 * pre-ARMv6 CPUs cacheable and bufferable bits: XXCB
178 */
179#define L_PTE_MT_UNCACHED (0x00 << 2) /* 0000 */
180#define L_PTE_MT_BUFFERABLE (0x01 << 2) /* 0001 */
181#define L_PTE_MT_WRITETHROUGH (0x02 << 2) /* 0010 */
182#define L_PTE_MT_WRITEBACK (0x03 << 2) /* 0011 */
183#define L_PTE_MT_MINICACHE (0x06 << 2) /* 0110 (sa1100, xscale) */
184#define L_PTE_MT_WRITEALLOC (0x07 << 2) /* 0111 */
185#define L_PTE_MT_DEV_SHARED (0x04 << 2) /* 0100 */
186#define L_PTE_MT_DEV_NONSHARED (0x0c << 2) /* 1100 */
187#define L_PTE_MT_DEV_WC (0x09 << 2) /* 1001 */
188#define L_PTE_MT_DEV_CACHED (0x0b << 2) /* 1011 */
189#define L_PTE_MT_MASK (0x0f << 2)
190
175#ifndef __ASSEMBLY__ 191#ifndef __ASSEMBLY__
176 192
177/* 193/*
@@ -180,23 +196,30 @@ extern void __pgd_error(const char *file, int line, unsigned long val);
180 * as well as any architecture dependent bits like global/ASID and SMP 196 * as well as any architecture dependent bits like global/ASID and SMP
181 * shared mapping bits. 197 * shared mapping bits.
182 */ 198 */
183#define _L_PTE_DEFAULT L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_CACHEABLE | L_PTE_BUFFERABLE 199#define _L_PTE_DEFAULT L_PTE_PRESENT | L_PTE_YOUNG
184#define _L_PTE_READ L_PTE_USER | L_PTE_EXEC
185 200
186extern pgprot_t pgprot_user; 201extern pgprot_t pgprot_user;
187extern pgprot_t pgprot_kernel; 202extern pgprot_t pgprot_kernel;
188 203
189#define PAGE_NONE pgprot_user 204#define _MOD_PROT(p, b) __pgprot(pgprot_val(p) | (b))
190#define PAGE_COPY __pgprot(pgprot_val(pgprot_user) | _L_PTE_READ) 205
191#define PAGE_SHARED __pgprot(pgprot_val(pgprot_user) | _L_PTE_READ | \ 206#define PAGE_NONE pgprot_user
192 L_PTE_WRITE) 207#define PAGE_SHARED _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_WRITE)
193#define PAGE_READONLY __pgprot(pgprot_val(pgprot_user) | _L_PTE_READ) 208#define PAGE_SHARED_EXEC _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_WRITE | L_PTE_EXEC)
194#define PAGE_KERNEL pgprot_kernel 209#define PAGE_COPY _MOD_PROT(pgprot_user, L_PTE_USER)
195 210#define PAGE_COPY_EXEC _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_EXEC)
196#define __PAGE_NONE __pgprot(_L_PTE_DEFAULT) 211#define PAGE_READONLY _MOD_PROT(pgprot_user, L_PTE_USER)
197#define __PAGE_COPY __pgprot(_L_PTE_DEFAULT | _L_PTE_READ) 212#define PAGE_READONLY_EXEC _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_EXEC)
198#define __PAGE_SHARED __pgprot(_L_PTE_DEFAULT | _L_PTE_READ | L_PTE_WRITE) 213#define PAGE_KERNEL pgprot_kernel
199#define __PAGE_READONLY __pgprot(_L_PTE_DEFAULT | _L_PTE_READ) 214#define PAGE_KERNEL_EXEC _MOD_PROT(pgprot_kernel, L_PTE_EXEC)
215
216#define __PAGE_NONE __pgprot(_L_PTE_DEFAULT)
217#define __PAGE_SHARED __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_WRITE)
218#define __PAGE_SHARED_EXEC __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_WRITE | L_PTE_EXEC)
219#define __PAGE_COPY __pgprot(_L_PTE_DEFAULT | L_PTE_USER)
220#define __PAGE_COPY_EXEC __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_EXEC)
221#define __PAGE_READONLY __pgprot(_L_PTE_DEFAULT | L_PTE_USER)
222#define __PAGE_READONLY_EXEC __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_EXEC)
200 223
201#endif /* __ASSEMBLY__ */ 224#endif /* __ASSEMBLY__ */
202 225
@@ -212,19 +235,19 @@ extern pgprot_t pgprot_kernel;
212#define __P001 __PAGE_READONLY 235#define __P001 __PAGE_READONLY
213#define __P010 __PAGE_COPY 236#define __P010 __PAGE_COPY
214#define __P011 __PAGE_COPY 237#define __P011 __PAGE_COPY
215#define __P100 __PAGE_READONLY 238#define __P100 __PAGE_READONLY_EXEC
216#define __P101 __PAGE_READONLY 239#define __P101 __PAGE_READONLY_EXEC
217#define __P110 __PAGE_COPY 240#define __P110 __PAGE_COPY_EXEC
218#define __P111 __PAGE_COPY 241#define __P111 __PAGE_COPY_EXEC
219 242
220#define __S000 __PAGE_NONE 243#define __S000 __PAGE_NONE
221#define __S001 __PAGE_READONLY 244#define __S001 __PAGE_READONLY
222#define __S010 __PAGE_SHARED 245#define __S010 __PAGE_SHARED
223#define __S011 __PAGE_SHARED 246#define __S011 __PAGE_SHARED
224#define __S100 __PAGE_READONLY 247#define __S100 __PAGE_READONLY_EXEC
225#define __S101 __PAGE_READONLY 248#define __S101 __PAGE_READONLY_EXEC
226#define __S110 __PAGE_SHARED 249#define __S110 __PAGE_SHARED_EXEC
227#define __S111 __PAGE_SHARED 250#define __S111 __PAGE_SHARED_EXEC
228 251
229#ifndef __ASSEMBLY__ 252#ifndef __ASSEMBLY__
230/* 253/*
@@ -286,8 +309,10 @@ static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
286/* 309/*
287 * Mark the prot value as uncacheable and unbufferable. 310 * Mark the prot value as uncacheable and unbufferable.
288 */ 311 */
289#define pgprot_noncached(prot) __pgprot(pgprot_val(prot) & ~(L_PTE_CACHEABLE | L_PTE_BUFFERABLE)) 312#define pgprot_noncached(prot) \
290#define pgprot_writecombine(prot) __pgprot(pgprot_val(prot) & ~L_PTE_CACHEABLE) 313 __pgprot((pgprot_val(prot) & ~L_PTE_MT_MASK) | L_PTE_MT_UNCACHED)
314#define pgprot_writecombine(prot) \
315 __pgprot((pgprot_val(prot) & ~L_PTE_MT_MASK) | L_PTE_MT_BUFFERABLE)
291 316
292#define pmd_none(pmd) (!pmd_val(pmd)) 317#define pmd_none(pmd) (!pmd_val(pmd))
293#define pmd_present(pmd) (pmd_val(pmd)) 318#define pmd_present(pmd) (pmd_val(pmd))
@@ -320,11 +345,6 @@ static inline pte_t *pmd_page_vaddr(pmd_t pmd)
320#define pmd_page(pmd) virt_to_page(__va(pmd_val(pmd))) 345#define pmd_page(pmd) virt_to_page(__va(pmd_val(pmd)))
321 346
322/* 347/*
323 * Permanent address of a page. We never have highmem, so this is trivial.
324 */
325#define pages_to_mb(x) ((x) >> (20 - PAGE_SHIFT))
326
327/*
328 * Conversion functions: convert a page and protection to a page entry, 348 * Conversion functions: convert a page and protection to a page entry,
329 * and a page entry and page directory to the page they refer to. 349 * and a page entry and page directory to the page they refer to.
330 */ 350 */
diff --git a/arch/arm/include/asm/ptrace.h b/arch/arm/include/asm/ptrace.h
index b415c0e85458..73192618f1c2 100644
--- a/arch/arm/include/asm/ptrace.h
+++ b/arch/arm/include/asm/ptrace.h
@@ -54,7 +54,6 @@
54#define PSR_C_BIT 0x20000000 54#define PSR_C_BIT 0x20000000
55#define PSR_Z_BIT 0x40000000 55#define PSR_Z_BIT 0x40000000
56#define PSR_N_BIT 0x80000000 56#define PSR_N_BIT 0x80000000
57#define PCMASK 0
58 57
59/* 58/*
60 * Groups of PSR bits 59 * Groups of PSR bits
@@ -139,11 +138,7 @@ static inline int valid_user_regs(struct pt_regs *regs)
139 return 0; 138 return 0;
140} 139}
141 140
142#define pc_pointer(v) \ 141#define instruction_pointer(regs) (regs)->ARM_pc
143 ((v) & ~PCMASK)
144
145#define instruction_pointer(regs) \
146 (pc_pointer((regs)->ARM_pc))
147 142
148#ifdef CONFIG_SMP 143#ifdef CONFIG_SMP
149extern unsigned long profile_pc(struct pt_regs *regs); 144extern unsigned long profile_pc(struct pt_regs *regs);
diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h
index 7bbf105463f1..a65413ba121d 100644
--- a/arch/arm/include/asm/setup.h
+++ b/arch/arm/include/asm/setup.h
@@ -209,6 +209,17 @@ struct meminfo {
209 struct membank bank[NR_BANKS]; 209 struct membank bank[NR_BANKS];
210}; 210};
211 211
212#define for_each_nodebank(iter,mi,no) \
213 for (iter = 0; iter < mi->nr_banks; iter++) \
214 if (mi->bank[iter].node == no)
215
216#define bank_pfn_start(bank) __phys_to_pfn((bank)->start)
217#define bank_pfn_end(bank) __phys_to_pfn((bank)->start + (bank)->size)
218#define bank_pfn_size(bank) ((bank)->size >> PAGE_SHIFT)
219#define bank_phys_start(bank) (bank)->start
220#define bank_phys_end(bank) ((bank)->start + (bank)->size)
221#define bank_phys_size(bank) (bank)->size
222
212/* 223/*
213 * Early command line parameters. 224 * Early command line parameters.
214 */ 225 */
diff --git a/arch/arm/include/asm/sparsemem.h b/arch/arm/include/asm/sparsemem.h
index 277158191a0d..00098615c6f0 100644
--- a/arch/arm/include/asm/sparsemem.h
+++ b/arch/arm/include/asm/sparsemem.h
@@ -3,8 +3,22 @@
3 3
4#include <asm/memory.h> 4#include <asm/memory.h>
5 5
6#define MAX_PHYSADDR_BITS 32 6/*
7#define MAX_PHYSMEM_BITS 32 7 * Two definitions are required for sparsemem:
8#define SECTION_SIZE_BITS NODE_MEM_SIZE_BITS 8 *
9 * MAX_PHYSMEM_BITS: The number of physical address bits required
10 * to address the last byte of memory.
11 *
12 * SECTION_SIZE_BITS: The number of physical address bits to cover
13 * the maximum amount of memory in a section.
14 *
15 * Eg, if you have 2 banks of up to 64MB at 0x80000000, 0x84000000,
16 * then MAX_PHYSMEM_BITS is 32, SECTION_SIZE_BITS is 26.
17 *
18 * Define these in your mach/memory.h.
19 */
20#if !defined(SECTION_SIZE_BITS) || !defined(MAX_PHYSMEM_BITS)
21#error Sparsemem is not supported on this platform
22#endif
9 23
10#endif 24#endif
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 514af792a598..7aad78420f18 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -43,11 +43,6 @@
43#define CR_XP (1 << 23) /* Extended page tables */ 43#define CR_XP (1 << 23) /* Extended page tables */
44#define CR_VE (1 << 24) /* Vectored interrupts */ 44#define CR_VE (1 << 24) /* Vectored interrupts */
45 45
46#define CPUID_ID 0
47#define CPUID_CACHETYPE 1
48#define CPUID_TCM 2
49#define CPUID_TLBTYPE 3
50
51/* 46/*
52 * This is used to ensure the compiler did actually allocate the register we 47 * This is used to ensure the compiler did actually allocate the register we
53 * asked it for some inline assembly sequences. Apparently we can't trust 48 * asked it for some inline assembly sequences. Apparently we can't trust
@@ -61,36 +56,8 @@
61#ifndef __ASSEMBLY__ 56#ifndef __ASSEMBLY__
62 57
63#include <linux/linkage.h> 58#include <linux/linkage.h>
64#include <linux/stringify.h>
65#include <linux/irqflags.h> 59#include <linux/irqflags.h>
66 60
67#ifdef CONFIG_CPU_CP15
68#define read_cpuid(reg) \
69 ({ \
70 unsigned int __val; \
71 asm("mrc p15, 0, %0, c0, c0, " __stringify(reg) \
72 : "=r" (__val) \
73 : \
74 : "cc"); \
75 __val; \
76 })
77#else
78extern unsigned int processor_id;
79#define read_cpuid(reg) (processor_id)
80#endif
81
82/*
83 * The CPU ID never changes at run time, so we might as well tell the
84 * compiler that it's constant. Use this function to read the CPU ID
85 * rather than directly reading processor_id or read_cpuid() directly.
86 */
87static inline unsigned int read_cpuid_id(void) __attribute_const__;
88
89static inline unsigned int read_cpuid_id(void)
90{
91 return read_cpuid(CPUID_ID);
92}
93
94#define __exception __attribute__((section(".exception.text"))) 61#define __exception __attribute__((section(".exception.text")))
95 62
96struct thread_info; 63struct thread_info;
@@ -131,31 +98,6 @@ extern void cpu_init(void);
131void arm_machine_restart(char mode); 98void arm_machine_restart(char mode);
132extern void (*arm_pm_restart)(char str); 99extern void (*arm_pm_restart)(char str);
133 100
134/*
135 * Intel's XScale3 core supports some v6 features (supersections, L2)
136 * but advertises itself as v5 as it does not support the v6 ISA. For
137 * this reason, we need a way to explicitly test for this type of CPU.
138 */
139#ifndef CONFIG_CPU_XSC3
140#define cpu_is_xsc3() 0
141#else
142static inline int cpu_is_xsc3(void)
143{
144 extern unsigned int processor_id;
145
146 if ((processor_id & 0xffffe000) == 0x69056000)
147 return 1;
148
149 return 0;
150}
151#endif
152
153#if !defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_CPU_XSC3)
154#define cpu_is_xscale() 0
155#else
156#define cpu_is_xscale() 1
157#endif
158
159#define UDBG_UNDEFINED (1 << 0) 101#define UDBG_UNDEFINED (1 << 0)
160#define UDBG_SYSCALL (1 << 1) 102#define UDBG_SYSCALL (1 << 1)
161#define UDBG_BADABORT (1 << 2) 103#define UDBG_BADABORT (1 << 2)
diff --git a/arch/arm/include/asm/thread_info.h b/arch/arm/include/asm/thread_info.h
index e56fa48e4ae7..68b9ec82a37f 100644
--- a/arch/arm/include/asm/thread_info.h
+++ b/arch/arm/include/asm/thread_info.h
@@ -98,7 +98,7 @@ static inline struct thread_info *current_thread_info(void)
98} 98}
99 99
100#define thread_saved_pc(tsk) \ 100#define thread_saved_pc(tsk) \
101 ((unsigned long)(pc_pointer(task_thread_info(tsk)->cpu_context.pc))) 101 ((unsigned long)(task_thread_info(tsk)->cpu_context.pc))
102#define thread_saved_fp(tsk) \ 102#define thread_saved_fp(tsk) \
103 ((unsigned long)(task_thread_info(tsk)->cpu_context.fp)) 103 ((unsigned long)(task_thread_info(tsk)->cpu_context.fp))
104 104
diff --git a/arch/arm/include/asm/uaccess.h b/arch/arm/include/asm/uaccess.h
index d0f51ff900b5..e98ec60b3400 100644
--- a/arch/arm/include/asm/uaccess.h
+++ b/arch/arm/include/asm/uaccess.h
@@ -225,7 +225,7 @@ do { \
225 225
226#define __get_user_asm_byte(x,addr,err) \ 226#define __get_user_asm_byte(x,addr,err) \
227 __asm__ __volatile__( \ 227 __asm__ __volatile__( \
228 "1: ldrbt %1,[%2],#0\n" \ 228 "1: ldrbt %1,[%2]\n" \
229 "2:\n" \ 229 "2:\n" \
230 " .section .fixup,\"ax\"\n" \ 230 " .section .fixup,\"ax\"\n" \
231 " .align 2\n" \ 231 " .align 2\n" \
@@ -261,7 +261,7 @@ do { \
261 261
262#define __get_user_asm_word(x,addr,err) \ 262#define __get_user_asm_word(x,addr,err) \
263 __asm__ __volatile__( \ 263 __asm__ __volatile__( \
264 "1: ldrt %1,[%2],#0\n" \ 264 "1: ldrt %1,[%2]\n" \
265 "2:\n" \ 265 "2:\n" \
266 " .section .fixup,\"ax\"\n" \ 266 " .section .fixup,\"ax\"\n" \
267 " .align 2\n" \ 267 " .align 2\n" \
@@ -306,7 +306,7 @@ do { \
306 306
307#define __put_user_asm_byte(x,__pu_addr,err) \ 307#define __put_user_asm_byte(x,__pu_addr,err) \
308 __asm__ __volatile__( \ 308 __asm__ __volatile__( \
309 "1: strbt %1,[%2],#0\n" \ 309 "1: strbt %1,[%2]\n" \
310 "2:\n" \ 310 "2:\n" \
311 " .section .fixup,\"ax\"\n" \ 311 " .section .fixup,\"ax\"\n" \
312 " .align 2\n" \ 312 " .align 2\n" \
@@ -339,7 +339,7 @@ do { \
339 339
340#define __put_user_asm_word(x,__pu_addr,err) \ 340#define __put_user_asm_word(x,__pu_addr,err) \
341 __asm__ __volatile__( \ 341 __asm__ __volatile__( \
342 "1: strt %1,[%2],#0\n" \ 342 "1: strt %1,[%2]\n" \
343 "2:\n" \ 343 "2:\n" \
344 " .section .fixup,\"ax\"\n" \ 344 " .section .fixup,\"ax\"\n" \
345 " .align 2\n" \ 345 " .align 2\n" \
@@ -365,7 +365,7 @@ do { \
365#define __put_user_asm_dword(x,__pu_addr,err) \ 365#define __put_user_asm_dword(x,__pu_addr,err) \
366 __asm__ __volatile__( \ 366 __asm__ __volatile__( \
367 "1: strt " __reg_oper1 ", [%1], #4\n" \ 367 "1: strt " __reg_oper1 ", [%1], #4\n" \
368 "2: strt " __reg_oper0 ", [%1], #0\n" \ 368 "2: strt " __reg_oper0 ", [%1]\n" \
369 "3:\n" \ 369 "3:\n" \
370 " .section .fixup,\"ax\"\n" \ 370 " .section .fixup,\"ax\"\n" \
371 " .align 2\n" \ 371 " .align 2\n" \
diff --git a/arch/arm/include/asm/vga.h b/arch/arm/include/asm/vga.h
index 6a3cd2a2f670..250a4dd00630 100644
--- a/arch/arm/include/asm/vga.h
+++ b/arch/arm/include/asm/vga.h
@@ -1,8 +1,8 @@
1#ifndef ASMARM_VGA_H 1#ifndef ASMARM_VGA_H
2#define ASMARM_VGA_H 2#define ASMARM_VGA_H
3 3
4#include <linux/io.h>
4#include <mach/hardware.h> 5#include <mach/hardware.h>
5#include <asm/io.h>
6 6
7#define VGA_MAP_MEM(x,s) (PCIMEM_BASE + (x)) 7#define VGA_MAP_MEM(x,s) (PCIMEM_BASE + (x))
8 8
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index 1d296fc8494e..4305345987d3 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -10,7 +10,7 @@ endif
10 10
11# Object file lists. 11# Object file lists.
12 12
13obj-y := compat.o entry-armv.o entry-common.o irq.o \ 13obj-y := compat.o elf.o entry-armv.o entry-common.o irq.o \
14 process.o ptrace.o setup.o signal.o \ 14 process.o ptrace.o setup.o signal.o \
15 sys_arm.o stacktrace.o time.o traps.o 15 sys_arm.o stacktrace.o time.o traps.o
16 16
diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c
index cc7b246e9652..2357b1cf1cf9 100644
--- a/arch/arm/kernel/armksyms.c
+++ b/arch/arm/kernel/armksyms.c
@@ -13,11 +13,11 @@
13#include <linux/delay.h> 13#include <linux/delay.h>
14#include <linux/in6.h> 14#include <linux/in6.h>
15#include <linux/syscalls.h> 15#include <linux/syscalls.h>
16#include <linux/uaccess.h>
17#include <linux/io.h>
16 18
17#include <asm/checksum.h> 19#include <asm/checksum.h>
18#include <asm/io.h>
19#include <asm/system.h> 20#include <asm/system.h>
20#include <asm/uaccess.h>
21#include <asm/ftrace.h> 21#include <asm/ftrace.h>
22 22
23/* 23/*
diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c
index e5747547b44c..17a59b6e521f 100644
--- a/arch/arm/kernel/bios32.c
+++ b/arch/arm/kernel/bios32.c
@@ -10,8 +10,8 @@
10#include <linux/pci.h> 10#include <linux/pci.h>
11#include <linux/slab.h> 11#include <linux/slab.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/io.h>
13 14
14#include <asm/io.h>
15#include <asm/mach-types.h> 15#include <asm/mach-types.h>
16#include <asm/mach/pci.h> 16#include <asm/mach/pci.h>
17 17
diff --git a/arch/arm/kernel/crunch.c b/arch/arm/kernel/crunch.c
index 3b6a1c293ee4..99995c2b2312 100644
--- a/arch/arm/kernel/crunch.c
+++ b/arch/arm/kernel/crunch.c
@@ -15,9 +15,9 @@
15#include <linux/signal.h> 15#include <linux/signal.h>
16#include <linux/sched.h> 16#include <linux/sched.h>
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/io.h>
18#include <mach/ep93xx-regs.h> 19#include <mach/ep93xx-regs.h>
19#include <asm/thread_notify.h> 20#include <asm/thread_notify.h>
20#include <asm/io.h>
21 21
22struct crunch_state *crunch_owner; 22struct crunch_state *crunch_owner;
23 23
diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S
index 9550ff0ddde4..f53c58290543 100644
--- a/arch/arm/kernel/debug.S
+++ b/arch/arm/kernel/debug.S
@@ -89,10 +89,12 @@
89ENTRY(printhex8) 89ENTRY(printhex8)
90 mov r1, #8 90 mov r1, #8
91 b printhex 91 b printhex
92ENDPROC(printhex8)
92 93
93ENTRY(printhex4) 94ENTRY(printhex4)
94 mov r1, #4 95 mov r1, #4
95 b printhex 96 b printhex
97ENDPROC(printhex4)
96 98
97ENTRY(printhex2) 99ENTRY(printhex2)
98 mov r1, #2 100 mov r1, #2
@@ -110,6 +112,7 @@ printhex: adr r2, hexbuf
110 bne 1b 112 bne 1b
111 mov r0, r2 113 mov r0, r2
112 b printascii 114 b printascii
115ENDPROC(printhex2)
113 116
114 .ltorg 117 .ltorg
115 118
@@ -127,11 +130,13 @@ ENTRY(printascii)
127 teqne r1, #0 130 teqne r1, #0
128 bne 1b 131 bne 1b
129 mov pc, lr 132 mov pc, lr
133ENDPROC(printascii)
130 134
131ENTRY(printch) 135ENTRY(printch)
132 addruart r3 136 addruart r3
133 mov r1, r0 137 mov r1, r0
134 mov r0, #0 138 mov r0, #0
135 b 1b 139 b 1b
140ENDPROC(printch)
136 141
137hexbuf: .space 16 142hexbuf: .space 16
diff --git a/arch/arm/kernel/dma-isa.c b/arch/arm/kernel/dma-isa.c
index 2f080a35a2d9..4a3a50495c60 100644
--- a/arch/arm/kernel/dma-isa.c
+++ b/arch/arm/kernel/dma-isa.c
@@ -19,10 +19,9 @@
19#include <linux/ioport.h> 19#include <linux/ioport.h>
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/dma-mapping.h> 21#include <linux/dma-mapping.h>
22#include <linux/io.h>
22 23
23#include <asm/dma.h> 24#include <asm/dma.h>
24#include <asm/io.h>
25
26#include <asm/mach/dma.h> 25#include <asm/mach/dma.h>
27 26
28#define ISA_DMA_MODE_READ 0x44 27#define ISA_DMA_MODE_READ 0x44
diff --git a/arch/arm/kernel/ecard.c b/arch/arm/kernel/ecard.c
index 7a50575a8d4d..60c079d85355 100644
--- a/arch/arm/kernel/ecard.c
+++ b/arch/arm/kernel/ecard.c
@@ -587,8 +587,7 @@ ecard_irq_handler(unsigned int irq, struct irq_desc *desc)
587 pending = ecard_default_ops.irqpending(ec); 587 pending = ecard_default_ops.irqpending(ec);
588 588
589 if (pending) { 589 if (pending) {
590 struct irq_desc *d = irq_desc + ec->irq; 590 generic_handle_irq(ec->irq);
591 desc_handle_irq(ec->irq, d);
592 called ++; 591 called ++;
593 } 592 }
594 } 593 }
@@ -622,7 +621,6 @@ ecard_irqexp_handler(unsigned int irq, struct irq_desc *desc)
622 ecard_t *ec = slot_to_ecard(slot); 621 ecard_t *ec = slot_to_ecard(slot);
623 622
624 if (ec->claimed) { 623 if (ec->claimed) {
625 struct irq_desc *d = irq_desc + ec->irq;
626 /* 624 /*
627 * this ugly code is so that we can operate a 625 * this ugly code is so that we can operate a
628 * prioritorising system: 626 * prioritorising system:
@@ -635,7 +633,7 @@ ecard_irqexp_handler(unsigned int irq, struct irq_desc *desc)
635 * Serial cards should go in 0/1, ethernet/scsi in 2/3 633 * Serial cards should go in 0/1, ethernet/scsi in 2/3
636 * otherwise you will lose serial data at high speeds! 634 * otherwise you will lose serial data at high speeds!
637 */ 635 */
638 desc_handle_irq(ec->irq, d); 636 generic_handle_irq(ec->irq);
639 } else { 637 } else {
640 printk(KERN_WARNING "card%d: interrupt from unclaimed " 638 printk(KERN_WARNING "card%d: interrupt from unclaimed "
641 "card???\n", slot); 639 "card???\n", slot);
diff --git a/arch/arm/kernel/elf.c b/arch/arm/kernel/elf.c
new file mode 100644
index 000000000000..513f332f040d
--- /dev/null
+++ b/arch/arm/kernel/elf.c
@@ -0,0 +1,79 @@
1#include <linux/module.h>
2#include <linux/sched.h>
3#include <linux/personality.h>
4#include <linux/binfmts.h>
5#include <linux/elf.h>
6
7int elf_check_arch(const struct elf32_hdr *x)
8{
9 unsigned int eflags;
10
11 /* Make sure it's an ARM executable */
12 if (x->e_machine != EM_ARM)
13 return 0;
14
15 /* Make sure the entry address is reasonable */
16 if (x->e_entry & 1) {
17 if (!(elf_hwcap & HWCAP_THUMB))
18 return 0;
19 } else if (x->e_entry & 3)
20 return 0;
21
22 eflags = x->e_flags;
23 if ((eflags & EF_ARM_EABI_MASK) == EF_ARM_EABI_UNKNOWN) {
24 /* APCS26 is only allowed if the CPU supports it */
25 if ((eflags & EF_ARM_APCS_26) && !(elf_hwcap & HWCAP_26BIT))
26 return 0;
27
28 /* VFP requires the supporting code */
29 if ((eflags & EF_ARM_VFP_FLOAT) && !(elf_hwcap & HWCAP_VFP))
30 return 0;
31 }
32 return 1;
33}
34EXPORT_SYMBOL(elf_check_arch);
35
36void elf_set_personality(const struct elf32_hdr *x)
37{
38 unsigned int eflags = x->e_flags;
39 unsigned int personality = PER_LINUX_32BIT;
40
41 /*
42 * APCS-26 is only valid for OABI executables
43 */
44 if ((eflags & EF_ARM_EABI_MASK) == EF_ARM_EABI_UNKNOWN) {
45 if (eflags & EF_ARM_APCS_26)
46 personality = PER_LINUX;
47 }
48
49 set_personality(personality);
50
51 /*
52 * Since the FPA coprocessor uses CP1 and CP2, and iWMMXt uses CP0
53 * and CP1, we only enable access to the iWMMXt coprocessor if the
54 * binary is EABI or softfloat (and thus, guaranteed not to use
55 * FPA instructions.)
56 */
57 if (elf_hwcap & HWCAP_IWMMXT &&
58 eflags & (EF_ARM_EABI_MASK | EF_ARM_SOFT_FLOAT)) {
59 set_thread_flag(TIF_USING_IWMMXT);
60 } else {
61 clear_thread_flag(TIF_USING_IWMMXT);
62 }
63}
64EXPORT_SYMBOL(elf_set_personality);
65
66/*
67 * Set READ_IMPLIES_EXEC if:
68 * - the binary requires an executable stack
69 * - we're running on a CPU which doesn't support NX.
70 */
71int arm_elf_read_implies_exec(const struct elf32_hdr *x, int executable_stack)
72{
73 if (executable_stack != EXSTACK_ENABLE_X)
74 return 1;
75 if (cpu_architecture() <= CPU_ARCH_ARMv6)
76 return 1;
77 return 0;
78}
79EXPORT_SYMBOL(arm_elf_read_implies_exec);
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 617e509d60df..77b047475539 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -76,14 +76,17 @@
76__pabt_invalid: 76__pabt_invalid:
77 inv_entry BAD_PREFETCH 77 inv_entry BAD_PREFETCH
78 b common_invalid 78 b common_invalid
79ENDPROC(__pabt_invalid)
79 80
80__dabt_invalid: 81__dabt_invalid:
81 inv_entry BAD_DATA 82 inv_entry BAD_DATA
82 b common_invalid 83 b common_invalid
84ENDPROC(__dabt_invalid)
83 85
84__irq_invalid: 86__irq_invalid:
85 inv_entry BAD_IRQ 87 inv_entry BAD_IRQ
86 b common_invalid 88 b common_invalid
89ENDPROC(__irq_invalid)
87 90
88__und_invalid: 91__und_invalid:
89 inv_entry BAD_UNDEFINSTR 92 inv_entry BAD_UNDEFINSTR
@@ -107,6 +110,7 @@ common_invalid:
107 110
108 mov r0, sp 111 mov r0, sp
109 b bad_mode 112 b bad_mode
113ENDPROC(__und_invalid)
110 114
111/* 115/*
112 * SVC mode handlers 116 * SVC mode handlers
@@ -192,6 +196,7 @@ __dabt_svc:
192 ldr r0, [sp, #S_PSR] 196 ldr r0, [sp, #S_PSR]
193 msr spsr_cxsf, r0 197 msr spsr_cxsf, r0
194 ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr 198 ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
199ENDPROC(__dabt_svc)
195 200
196 .align 5 201 .align 5
197__irq_svc: 202__irq_svc:
@@ -223,6 +228,7 @@ __irq_svc:
223 bleq trace_hardirqs_on 228 bleq trace_hardirqs_on
224#endif 229#endif
225 ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr 230 ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
231ENDPROC(__irq_svc)
226 232
227 .ltorg 233 .ltorg
228 234
@@ -272,6 +278,7 @@ __und_svc:
272 ldr lr, [sp, #S_PSR] @ Get SVC cpsr 278 ldr lr, [sp, #S_PSR] @ Get SVC cpsr
273 msr spsr_cxsf, lr 279 msr spsr_cxsf, lr
274 ldmia sp, {r0 - pc}^ @ Restore SVC registers 280 ldmia sp, {r0 - pc}^ @ Restore SVC registers
281ENDPROC(__und_svc)
275 282
276 .align 5 283 .align 5
277__pabt_svc: 284__pabt_svc:
@@ -313,6 +320,7 @@ __pabt_svc:
313 ldr r0, [sp, #S_PSR] 320 ldr r0, [sp, #S_PSR]
314 msr spsr_cxsf, r0 321 msr spsr_cxsf, r0
315 ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr 322 ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
323ENDPROC(__pabt_svc)
316 324
317 .align 5 325 .align 5
318.LCcralign: 326.LCcralign:
@@ -412,6 +420,7 @@ __dabt_usr:
412 mov r2, sp 420 mov r2, sp
413 adr lr, ret_from_exception 421 adr lr, ret_from_exception
414 b do_DataAbort 422 b do_DataAbort
423ENDPROC(__dabt_usr)
415 424
416 .align 5 425 .align 5
417__irq_usr: 426__irq_usr:
@@ -441,6 +450,7 @@ __irq_usr:
441 450
442 mov why, #0 451 mov why, #0
443 b ret_to_user 452 b ret_to_user
453ENDPROC(__irq_usr)
444 454
445 .ltorg 455 .ltorg
446 456
@@ -474,6 +484,7 @@ __und_usr:
474#else 484#else
475 b __und_usr_unknown 485 b __und_usr_unknown
476#endif 486#endif
487ENDPROC(__und_usr)
477 488
478 @ 489 @
479 @ fallthrough to call_fpe 490 @ fallthrough to call_fpe
@@ -642,6 +653,7 @@ __und_usr_unknown:
642 mov r0, sp 653 mov r0, sp
643 adr lr, ret_from_exception 654 adr lr, ret_from_exception
644 b do_undefinstr 655 b do_undefinstr
656ENDPROC(__und_usr_unknown)
645 657
646 .align 5 658 .align 5
647__pabt_usr: 659__pabt_usr:
@@ -666,6 +678,8 @@ ENTRY(ret_from_exception)
666 get_thread_info tsk 678 get_thread_info tsk
667 mov why, #0 679 mov why, #0
668 b ret_to_user 680 b ret_to_user
681ENDPROC(__pabt_usr)
682ENDPROC(ret_from_exception)
669 683
670/* 684/*
671 * Register switch for ARMv3 and ARMv4 processors 685 * Register switch for ARMv3 and ARMv4 processors
@@ -702,6 +716,7 @@ ENTRY(__switch_to)
702 bl atomic_notifier_call_chain 716 bl atomic_notifier_call_chain
703 mov r0, r5 717 mov r0, r5
704 ldmia r4, {r4 - sl, fp, sp, pc} @ Load all regs saved previously 718 ldmia r4, {r4 - sl, fp, sp, pc} @ Load all regs saved previously
719ENDPROC(__switch_to)
705 720
706 __INIT 721 __INIT
707 722
@@ -1029,6 +1044,7 @@ vector_\name:
1029 mov r0, sp 1044 mov r0, sp
1030 ldr lr, [pc, lr, lsl #2] 1045 ldr lr, [pc, lr, lsl #2]
1031 movs pc, lr @ branch to handler in SVC mode 1046 movs pc, lr @ branch to handler in SVC mode
1047ENDPROC(vector_\name)
1032 .endm 1048 .endm
1033 1049
1034 .globl __stubs_start 1050 .globl __stubs_start
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
index 060d7e2e9f64..3aa14dcc5bab 100644
--- a/arch/arm/kernel/entry-common.S
+++ b/arch/arm/kernel/entry-common.S
@@ -77,6 +77,7 @@ no_work_pending:
77 mov r0, r0 77 mov r0, r0
78 add sp, sp, #S_FRAME_SIZE - S_PC 78 add sp, sp, #S_FRAME_SIZE - S_PC
79 movs pc, lr @ return & move spsr_svc into cpsr 79 movs pc, lr @ return & move spsr_svc into cpsr
80ENDPROC(ret_to_user)
80 81
81/* 82/*
82 * This is how we return from a fork. 83 * This is how we return from a fork.
@@ -92,7 +93,7 @@ ENTRY(ret_from_fork)
92 mov r0, #1 @ trace exit [IP = 1] 93 mov r0, #1 @ trace exit [IP = 1]
93 bl syscall_trace 94 bl syscall_trace
94 b ret_slow_syscall 95 b ret_slow_syscall
95 96ENDPROC(ret_from_fork)
96 97
97 .equ NR_syscalls,0 98 .equ NR_syscalls,0
98#define CALL(x) .equ NR_syscalls,NR_syscalls+1 99#define CALL(x) .equ NR_syscalls,NR_syscalls+1
@@ -269,6 +270,7 @@ ENTRY(vector_swi)
269 eor r0, scno, #__NR_SYSCALL_BASE @ put OS number back 270 eor r0, scno, #__NR_SYSCALL_BASE @ put OS number back
270 bcs arm_syscall 271 bcs arm_syscall
271 b sys_ni_syscall @ not private func 272 b sys_ni_syscall @ not private func
273ENDPROC(vector_swi)
272 274
273 /* 275 /*
274 * This is the really slow path. We're going to be doing 276 * This is the really slow path. We're going to be doing
@@ -326,7 +328,6 @@ ENTRY(sys_call_table)
326 */ 328 */
327@ r0 = syscall number 329@ r0 = syscall number
328@ r8 = syscall table 330@ r8 = syscall table
329 .type sys_syscall, #function
330sys_syscall: 331sys_syscall:
331 bic scno, r0, #__NR_OABI_SYSCALL_BASE 332 bic scno, r0, #__NR_OABI_SYSCALL_BASE
332 cmp scno, #__NR_syscall - __NR_SYSCALL_BASE 333 cmp scno, #__NR_syscall - __NR_SYSCALL_BASE
@@ -338,53 +339,65 @@ sys_syscall:
338 movlo r3, r4 339 movlo r3, r4
339 ldrlo pc, [tbl, scno, lsl #2] 340 ldrlo pc, [tbl, scno, lsl #2]
340 b sys_ni_syscall 341 b sys_ni_syscall
342ENDPROC(sys_syscall)
341 343
342sys_fork_wrapper: 344sys_fork_wrapper:
343 add r0, sp, #S_OFF 345 add r0, sp, #S_OFF
344 b sys_fork 346 b sys_fork
347ENDPROC(sys_fork_wrapper)
345 348
346sys_vfork_wrapper: 349sys_vfork_wrapper:
347 add r0, sp, #S_OFF 350 add r0, sp, #S_OFF
348 b sys_vfork 351 b sys_vfork
352ENDPROC(sys_vfork_wrapper)
349 353
350sys_execve_wrapper: 354sys_execve_wrapper:
351 add r3, sp, #S_OFF 355 add r3, sp, #S_OFF
352 b sys_execve 356 b sys_execve
357ENDPROC(sys_execve_wrapper)
353 358
354sys_clone_wrapper: 359sys_clone_wrapper:
355 add ip, sp, #S_OFF 360 add ip, sp, #S_OFF
356 str ip, [sp, #4] 361 str ip, [sp, #4]
357 b sys_clone 362 b sys_clone
363ENDPROC(sys_clone_wrapper)
358 364
359sys_sigsuspend_wrapper: 365sys_sigsuspend_wrapper:
360 add r3, sp, #S_OFF 366 add r3, sp, #S_OFF
361 b sys_sigsuspend 367 b sys_sigsuspend
368ENDPROC(sys_sigsuspend_wrapper)
362 369
363sys_rt_sigsuspend_wrapper: 370sys_rt_sigsuspend_wrapper:
364 add r2, sp, #S_OFF 371 add r2, sp, #S_OFF
365 b sys_rt_sigsuspend 372 b sys_rt_sigsuspend
373ENDPROC(sys_rt_sigsuspend_wrapper)
366 374
367sys_sigreturn_wrapper: 375sys_sigreturn_wrapper:
368 add r0, sp, #S_OFF 376 add r0, sp, #S_OFF
369 b sys_sigreturn 377 b sys_sigreturn
378ENDPROC(sys_sigreturn_wrapper)
370 379
371sys_rt_sigreturn_wrapper: 380sys_rt_sigreturn_wrapper:
372 add r0, sp, #S_OFF 381 add r0, sp, #S_OFF
373 b sys_rt_sigreturn 382 b sys_rt_sigreturn
383ENDPROC(sys_rt_sigreturn_wrapper)
374 384
375sys_sigaltstack_wrapper: 385sys_sigaltstack_wrapper:
376 ldr r2, [sp, #S_OFF + S_SP] 386 ldr r2, [sp, #S_OFF + S_SP]
377 b do_sigaltstack 387 b do_sigaltstack
388ENDPROC(sys_sigaltstack_wrapper)
378 389
379sys_statfs64_wrapper: 390sys_statfs64_wrapper:
380 teq r1, #88 391 teq r1, #88
381 moveq r1, #84 392 moveq r1, #84
382 b sys_statfs64 393 b sys_statfs64
394ENDPROC(sys_statfs64_wrapper)
383 395
384sys_fstatfs64_wrapper: 396sys_fstatfs64_wrapper:
385 teq r1, #88 397 teq r1, #88
386 moveq r1, #84 398 moveq r1, #84
387 b sys_fstatfs64 399 b sys_fstatfs64
400ENDPROC(sys_fstatfs64_wrapper)
388 401
389/* 402/*
390 * Note: off_4k (r5) is always units of 4K. If we can't do the requested 403 * Note: off_4k (r5) is always units of 4K. If we can't do the requested
@@ -402,11 +415,14 @@ sys_mmap2:
402 str r5, [sp, #4] 415 str r5, [sp, #4]
403 b do_mmap2 416 b do_mmap2
404#endif 417#endif
418ENDPROC(sys_mmap2)
405 419
406ENTRY(pabort_ifar) 420ENTRY(pabort_ifar)
407 mrc p15, 0, r0, cr6, cr0, 2 421 mrc p15, 0, r0, cr6, cr0, 2
408ENTRY(pabort_noifar) 422ENTRY(pabort_noifar)
409 mov pc, lr 423 mov pc, lr
424ENDPROC(pabort_ifar)
425ENDPROC(pabort_noifar)
410 426
411#ifdef CONFIG_OABI_COMPAT 427#ifdef CONFIG_OABI_COMPAT
412 428
@@ -417,26 +433,31 @@ ENTRY(pabort_noifar)
417sys_oabi_pread64: 433sys_oabi_pread64:
418 stmia sp, {r3, r4} 434 stmia sp, {r3, r4}
419 b sys_pread64 435 b sys_pread64
436ENDPROC(sys_oabi_pread64)
420 437
421sys_oabi_pwrite64: 438sys_oabi_pwrite64:
422 stmia sp, {r3, r4} 439 stmia sp, {r3, r4}
423 b sys_pwrite64 440 b sys_pwrite64
441ENDPROC(sys_oabi_pwrite64)
424 442
425sys_oabi_truncate64: 443sys_oabi_truncate64:
426 mov r3, r2 444 mov r3, r2
427 mov r2, r1 445 mov r2, r1
428 b sys_truncate64 446 b sys_truncate64
447ENDPROC(sys_oabi_truncate64)
429 448
430sys_oabi_ftruncate64: 449sys_oabi_ftruncate64:
431 mov r3, r2 450 mov r3, r2
432 mov r2, r1 451 mov r2, r1
433 b sys_ftruncate64 452 b sys_ftruncate64
453ENDPROC(sys_oabi_ftruncate64)
434 454
435sys_oabi_readahead: 455sys_oabi_readahead:
436 str r3, [sp] 456 str r3, [sp]
437 mov r3, r2 457 mov r3, r2
438 mov r2, r1 458 mov r2, r1
439 b sys_readahead 459 b sys_readahead
460ENDPROC(sys_oabi_readahead)
440 461
441/* 462/*
442 * Let's declare a second syscall table for old ABI binaries 463 * Let's declare a second syscall table for old ABI binaries
diff --git a/arch/arm/kernel/fiq.c b/arch/arm/kernel/fiq.c
index e8e90346f11c..36f81d967979 100644
--- a/arch/arm/kernel/fiq.c
+++ b/arch/arm/kernel/fiq.c
@@ -45,7 +45,6 @@
45#include <asm/fiq.h> 45#include <asm/fiq.h>
46#include <asm/irq.h> 46#include <asm/irq.h>
47#include <asm/system.h> 47#include <asm/system.h>
48#include <asm/uaccess.h>
49 48
50static unsigned long no_fiq_insn; 49static unsigned long no_fiq_insn;
51 50
diff --git a/arch/arm/kernel/head-common.S b/arch/arm/kernel/head-common.S
index 1c3c6ea5f9e7..bde52df1c668 100644
--- a/arch/arm/kernel/head-common.S
+++ b/arch/arm/kernel/head-common.S
@@ -36,7 +36,6 @@ __switch_data:
36 * r2 = atags pointer 36 * r2 = atags pointer
37 * r9 = processor ID 37 * r9 = processor ID
38 */ 38 */
39 .type __mmap_switched, %function
40__mmap_switched: 39__mmap_switched:
41 adr r3, __switch_data + 4 40 adr r3, __switch_data + 4
42 41
@@ -59,6 +58,7 @@ __mmap_switched:
59 bic r4, r0, #CR_A @ Clear 'A' bit 58 bic r4, r0, #CR_A @ Clear 'A' bit
60 stmia r7, {r0, r4} @ Save control register values 59 stmia r7, {r0, r4} @ Save control register values
61 b start_kernel 60 b start_kernel
61ENDPROC(__mmap_switched)
62 62
63/* 63/*
64 * Exception handling. Something went wrong and we can't proceed. We 64 * Exception handling. Something went wrong and we can't proceed. We
@@ -69,8 +69,6 @@ __mmap_switched:
69 * and hope for the best (useful if bootloader fails to pass a proper 69 * and hope for the best (useful if bootloader fails to pass a proper
70 * machine ID for example). 70 * machine ID for example).
71 */ 71 */
72
73 .type __error_p, %function
74__error_p: 72__error_p:
75#ifdef CONFIG_DEBUG_LL 73#ifdef CONFIG_DEBUG_LL
76 adr r0, str_p1 74 adr r0, str_p1
@@ -84,8 +82,8 @@ str_p1: .asciz "\nError: unrecognized/unsupported processor variant (0x"
84str_p2: .asciz ").\n" 82str_p2: .asciz ").\n"
85 .align 83 .align
86#endif 84#endif
85ENDPROC(__error_p)
87 86
88 .type __error_a, %function
89__error_a: 87__error_a:
90#ifdef CONFIG_DEBUG_LL 88#ifdef CONFIG_DEBUG_LL
91 mov r4, r1 @ preserve machine ID 89 mov r4, r1 @ preserve machine ID
@@ -115,13 +113,14 @@ __error_a:
115 adr r0, str_a3 113 adr r0, str_a3
116 bl printascii 114 bl printascii
117 b __error 115 b __error
116ENDPROC(__error_a)
117
118str_a1: .asciz "\nError: unrecognized/unsupported machine ID (r1 = 0x" 118str_a1: .asciz "\nError: unrecognized/unsupported machine ID (r1 = 0x"
119str_a2: .asciz ").\n\nAvailable machine support:\n\nID (hex)\tNAME\n" 119str_a2: .asciz ").\n\nAvailable machine support:\n\nID (hex)\tNAME\n"
120str_a3: .asciz "\nPlease check your kernel config and/or bootloader.\n" 120str_a3: .asciz "\nPlease check your kernel config and/or bootloader.\n"
121 .align 121 .align
122#endif 122#endif
123 123
124 .type __error, %function
125__error: 124__error:
126#ifdef CONFIG_ARCH_RPC 125#ifdef CONFIG_ARCH_RPC
127/* 126/*
@@ -138,6 +137,7 @@ __error:
138#endif 137#endif
1391: mov r0, r0 1381: mov r0, r0
140 b 1b 139 b 1b
140ENDPROC(__error)
141 141
142 142
143/* 143/*
@@ -153,7 +153,6 @@ __error:
153 * r5 = proc_info pointer in physical address space 153 * r5 = proc_info pointer in physical address space
154 * r9 = cpuid (preserved) 154 * r9 = cpuid (preserved)
155 */ 155 */
156 .type __lookup_processor_type, %function
157__lookup_processor_type: 156__lookup_processor_type:
158 adr r3, 3f 157 adr r3, 3f
159 ldmda r3, {r5 - r7} 158 ldmda r3, {r5 - r7}
@@ -169,6 +168,7 @@ __lookup_processor_type:
169 blo 1b 168 blo 1b
170 mov r5, #0 @ unknown processor 169 mov r5, #0 @ unknown processor
1712: mov pc, lr 1702: mov pc, lr
171ENDPROC(__lookup_processor_type)
172 172
173/* 173/*
174 * This provides a C-API version of the above function. 174 * This provides a C-API version of the above function.
@@ -179,6 +179,7 @@ ENTRY(lookup_processor_type)
179 bl __lookup_processor_type 179 bl __lookup_processor_type
180 mov r0, r5 180 mov r0, r5
181 ldmfd sp!, {r4 - r7, r9, pc} 181 ldmfd sp!, {r4 - r7, r9, pc}
182ENDPROC(lookup_processor_type)
182 183
183/* 184/*
184 * Look in <asm/procinfo.h> and arch/arm/kernel/arch.[ch] for 185 * Look in <asm/procinfo.h> and arch/arm/kernel/arch.[ch] for
@@ -201,7 +202,6 @@ ENTRY(lookup_processor_type)
201 * r3, r4, r6 corrupted 202 * r3, r4, r6 corrupted
202 * r5 = mach_info pointer in physical address space 203 * r5 = mach_info pointer in physical address space
203 */ 204 */
204 .type __lookup_machine_type, %function
205__lookup_machine_type: 205__lookup_machine_type:
206 adr r3, 3b 206 adr r3, 3b
207 ldmia r3, {r4, r5, r6} 207 ldmia r3, {r4, r5, r6}
@@ -216,6 +216,7 @@ __lookup_machine_type:
216 blo 1b 216 blo 1b
217 mov r5, #0 @ unknown machine 217 mov r5, #0 @ unknown machine
2182: mov pc, lr 2182: mov pc, lr
219ENDPROC(__lookup_machine_type)
219 220
220/* 221/*
221 * This provides a C-API version of the above function. 222 * This provides a C-API version of the above function.
@@ -226,6 +227,7 @@ ENTRY(lookup_machine_type)
226 bl __lookup_machine_type 227 bl __lookup_machine_type
227 mov r0, r5 228 mov r0, r5
228 ldmfd sp!, {r4 - r6, pc} 229 ldmfd sp!, {r4 - r6, pc}
230ENDPROC(lookup_machine_type)
229 231
230/* Determine validity of the r2 atags pointer. The heuristic requires 232/* Determine validity of the r2 atags pointer. The heuristic requires
231 * that the pointer be aligned, in the first 16k of physical RAM and 233 * that the pointer be aligned, in the first 16k of physical RAM and
@@ -239,8 +241,6 @@ ENTRY(lookup_machine_type)
239 * r2 either valid atags pointer, or zero 241 * r2 either valid atags pointer, or zero
240 * r5, r6 corrupted 242 * r5, r6 corrupted
241 */ 243 */
242
243 .type __vet_atags, %function
244__vet_atags: 244__vet_atags:
245 tst r2, #0x3 @ aligned? 245 tst r2, #0x3 @ aligned?
246 bne 1f 246 bne 1f
@@ -257,3 +257,4 @@ __vet_atags:
257 257
2581: mov r2, #0 2581: mov r2, #0
259 mov pc, lr 259 mov pc, lr
260ENDPROC(__vet_atags)
diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S
index 27329bd32037..cc87e1765ed2 100644
--- a/arch/arm/kernel/head-nommu.S
+++ b/arch/arm/kernel/head-nommu.S
@@ -33,7 +33,6 @@
33 * 33 *
34 */ 34 */
35 .section ".text.head", "ax" 35 .section ".text.head", "ax"
36 .type stext, %function
37ENTRY(stext) 36ENTRY(stext)
38 msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE @ ensure svc mode 37 msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE @ ensure svc mode
39 @ and irqs disabled 38 @ and irqs disabled
@@ -53,11 +52,11 @@ ENTRY(stext)
53 @ the initialization is done 52 @ the initialization is done
54 adr lr, __after_proc_init @ return (PIC) address 53 adr lr, __after_proc_init @ return (PIC) address
55 add pc, r10, #PROCINFO_INITFUNC 54 add pc, r10, #PROCINFO_INITFUNC
55ENDPROC(stext)
56 56
57/* 57/*
58 * Set the Control Register and Read the process ID. 58 * Set the Control Register and Read the process ID.
59 */ 59 */
60 .type __after_proc_init, %function
61__after_proc_init: 60__after_proc_init:
62#ifdef CONFIG_CPU_CP15 61#ifdef CONFIG_CPU_CP15
63 mrc p15, 0, r0, c1, c0, 0 @ read control reg 62 mrc p15, 0, r0, c1, c0, 0 @ read control reg
@@ -85,6 +84,7 @@ __after_proc_init:
85 84
86 mov pc, r13 @ clear the BSS and jump 85 mov pc, r13 @ clear the BSS and jump
87 @ to start_kernel 86 @ to start_kernel
87ENDPROC(__after_proc_init)
88 .ltorg 88 .ltorg
89 89
90#include "head-common.S" 90#include "head-common.S"
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index bff4c6e90dd5..21e17dc94cb5 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -75,7 +75,6 @@
75 * circumstances, zImage) is for. 75 * circumstances, zImage) is for.
76 */ 76 */
77 .section ".text.head", "ax" 77 .section ".text.head", "ax"
78 .type stext, %function
79ENTRY(stext) 78ENTRY(stext)
80 msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE @ ensure svc mode 79 msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE @ ensure svc mode
81 @ and irqs disabled 80 @ and irqs disabled
@@ -100,9 +99,9 @@ ENTRY(stext)
100 @ mmu has been enabled 99 @ mmu has been enabled
101 adr lr, __enable_mmu @ return (PIC) address 100 adr lr, __enable_mmu @ return (PIC) address
102 add pc, r10, #PROCINFO_INITFUNC 101 add pc, r10, #PROCINFO_INITFUNC
102ENDPROC(stext)
103 103
104#if defined(CONFIG_SMP) 104#if defined(CONFIG_SMP)
105 .type secondary_startup, #function
106ENTRY(secondary_startup) 105ENTRY(secondary_startup)
107 /* 106 /*
108 * Common entry point for secondary CPUs. 107 * Common entry point for secondary CPUs.
@@ -128,6 +127,7 @@ ENTRY(secondary_startup)
128 adr lr, __enable_mmu @ return address 127 adr lr, __enable_mmu @ return address
129 add pc, r10, #PROCINFO_INITFUNC @ initialise processor 128 add pc, r10, #PROCINFO_INITFUNC @ initialise processor
130 @ (return control reg) 129 @ (return control reg)
130ENDPROC(secondary_startup)
131 131
132 /* 132 /*
133 * r6 = &secondary_data 133 * r6 = &secondary_data
@@ -136,6 +136,7 @@ ENTRY(__secondary_switched)
136 ldr sp, [r7, #4] @ get secondary_data.stack 136 ldr sp, [r7, #4] @ get secondary_data.stack
137 mov fp, #0 137 mov fp, #0
138 b secondary_start_kernel 138 b secondary_start_kernel
139ENDPROC(__secondary_switched)
139 140
140 .type __secondary_data, %object 141 .type __secondary_data, %object
141__secondary_data: 142__secondary_data:
@@ -151,7 +152,6 @@ __secondary_data:
151 * this is just loading the page table pointer and domain access 152 * this is just loading the page table pointer and domain access
152 * registers. 153 * registers.
153 */ 154 */
154 .type __enable_mmu, %function
155__enable_mmu: 155__enable_mmu:
156#ifdef CONFIG_ALIGNMENT_TRAP 156#ifdef CONFIG_ALIGNMENT_TRAP
157 orr r0, r0, #CR_A 157 orr r0, r0, #CR_A
@@ -174,6 +174,7 @@ __enable_mmu:
174 mcr p15, 0, r5, c3, c0, 0 @ load domain access register 174 mcr p15, 0, r5, c3, c0, 0 @ load domain access register
175 mcr p15, 0, r4, c2, c0, 0 @ load page table pointer 175 mcr p15, 0, r4, c2, c0, 0 @ load page table pointer
176 b __turn_mmu_on 176 b __turn_mmu_on
177ENDPROC(__enable_mmu)
177 178
178/* 179/*
179 * Enable the MMU. This completely changes the structure of the visible 180 * Enable the MMU. This completely changes the structure of the visible
@@ -187,7 +188,6 @@ __enable_mmu:
187 * other registers depend on the function called upon completion 188 * other registers depend on the function called upon completion
188 */ 189 */
189 .align 5 190 .align 5
190 .type __turn_mmu_on, %function
191__turn_mmu_on: 191__turn_mmu_on:
192 mov r0, r0 192 mov r0, r0
193 mcr p15, 0, r0, c1, c0, 0 @ write control reg 193 mcr p15, 0, r0, c1, c0, 0 @ write control reg
@@ -195,7 +195,7 @@ __turn_mmu_on:
195 mov r3, r3 195 mov r3, r3
196 mov r3, r3 196 mov r3, r3
197 mov pc, r13 197 mov pc, r13
198 198ENDPROC(__turn_mmu_on)
199 199
200 200
201/* 201/*
@@ -211,7 +211,6 @@ __turn_mmu_on:
211 * r0, r3, r6, r7 corrupted 211 * r0, r3, r6, r7 corrupted
212 * r4 = physical page table address 212 * r4 = physical page table address
213 */ 213 */
214 .type __create_page_tables, %function
215__create_page_tables: 214__create_page_tables:
216 pgtbl r4 @ page table address 215 pgtbl r4 @ page table address
217 216
@@ -325,6 +324,7 @@ __create_page_tables:
325#endif 324#endif
326#endif 325#endif
327 mov pc, lr 326 mov pc, lr
327ENDPROC(__create_page_tables)
328 .ltorg 328 .ltorg
329 329
330#include "head-common.S" 330#include "head-common.S"
diff --git a/arch/arm/kernel/init_task.c b/arch/arm/kernel/init_task.c
index 8b8c9d38a761..0bbf80625395 100644
--- a/arch/arm/kernel/init_task.c
+++ b/arch/arm/kernel/init_task.c
@@ -8,8 +8,8 @@
8#include <linux/init.h> 8#include <linux/init.h>
9#include <linux/init_task.h> 9#include <linux/init_task.h>
10#include <linux/mqueue.h> 10#include <linux/mqueue.h>
11#include <linux/uaccess.h>
11 12
12#include <asm/uaccess.h>
13#include <asm/pgtable.h> 13#include <asm/pgtable.h>
14 14
15static struct fs_struct init_fs = INIT_FS; 15static struct fs_struct init_fs = INIT_FS;
diff --git a/arch/arm/kernel/io.c b/arch/arm/kernel/io.c
index 1f6822dfae74..f4470307edb8 100644
--- a/arch/arm/kernel/io.c
+++ b/arch/arm/kernel/io.c
@@ -1,7 +1,6 @@
1#include <linux/module.h> 1#include <linux/module.h>
2#include <linux/types.h> 2#include <linux/types.h>
3 3#include <linux/io.h>
4#include <asm/io.h>
5 4
6/* 5/*
7 * Copy data from IO memory space to "real" memory space. 6 * Copy data from IO memory space to "real" memory space.
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index f88efb135b70..2f3eb795fa6e 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -112,18 +112,17 @@ static struct irq_desc bad_irq_desc = {
112asmlinkage void __exception asm_do_IRQ(unsigned int irq, struct pt_regs *regs) 112asmlinkage void __exception asm_do_IRQ(unsigned int irq, struct pt_regs *regs)
113{ 113{
114 struct pt_regs *old_regs = set_irq_regs(regs); 114 struct pt_regs *old_regs = set_irq_regs(regs);
115 struct irq_desc *desc = irq_desc + irq; 115
116 irq_enter();
116 117
117 /* 118 /*
118 * Some hardware gives randomly wrong interrupts. Rather 119 * Some hardware gives randomly wrong interrupts. Rather
119 * than crashing, do something sensible. 120 * than crashing, do something sensible.
120 */ 121 */
121 if (irq >= NR_IRQS) 122 if (irq >= NR_IRQS)
122 desc = &bad_irq_desc; 123 handle_bad_irq(irq, &bad_irq_desc);
123 124 else
124 irq_enter(); 125 generic_handle_irq(irq);
125
126 desc_handle_irq(irq, desc);
127 126
128 /* AT91 specific workaround */ 127 /* AT91 specific workaround */
129 irq_finish(irq); 128 irq_finish(irq);
diff --git a/arch/arm/kernel/kprobes-decode.c b/arch/arm/kernel/kprobes-decode.c
index b4565bb133c1..da1f94906a4e 100644
--- a/arch/arm/kernel/kprobes-decode.c
+++ b/arch/arm/kernel/kprobes-decode.c
@@ -488,7 +488,7 @@ static void __kprobes simulate_ldm1stm1(struct kprobe *p, struct pt_regs *regs)
488 488
489 if (!ubit) 489 if (!ubit)
490 addr -= reg_count; 490 addr -= reg_count;
491 addr += (!pbit ^ !ubit); 491 addr += (!pbit == !ubit);
492 492
493 reg_bit_vector = insn & 0xffff; 493 reg_bit_vector = insn & 0xffff;
494 while (reg_bit_vector) { 494 while (reg_bit_vector) {
@@ -503,7 +503,7 @@ static void __kprobes simulate_ldm1stm1(struct kprobe *p, struct pt_regs *regs)
503 if (wbit) { 503 if (wbit) {
504 if (!ubit) 504 if (!ubit)
505 addr -= reg_count; 505 addr -= reg_count;
506 addr -= (!pbit ^ !ubit); 506 addr -= (!pbit == !ubit);
507 regs->uregs[rn] = (long)addr; 507 regs->uregs[rn] = (long)addr;
508 } 508 }
509} 509}
diff --git a/arch/arm/kernel/kprobes.c b/arch/arm/kernel/kprobes.c
index d28513f14d05..3f9abe0e9aff 100644
--- a/arch/arm/kernel/kprobes.c
+++ b/arch/arm/kernel/kprobes.c
@@ -200,9 +200,12 @@ void __kprobes kprobe_handler(struct pt_regs *regs)
200 } 200 }
201} 201}
202 202
203int kprobe_trap_handler(struct pt_regs *regs, unsigned int instr) 203static int __kprobes kprobe_trap_handler(struct pt_regs *regs, unsigned int instr)
204{ 204{
205 unsigned long flags;
206 local_irq_save(flags);
205 kprobe_handler(regs); 207 kprobe_handler(regs);
208 local_irq_restore(flags);
206 return 0; 209 return 0;
207} 210}
208 211
diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c
index fae5beb3c3d6..440dc62cdc3a 100644
--- a/arch/arm/kernel/machine_kexec.c
+++ b/arch/arm/kernel/machine_kexec.c
@@ -6,10 +6,10 @@
6#include <linux/kexec.h> 6#include <linux/kexec.h>
7#include <linux/delay.h> 7#include <linux/delay.h>
8#include <linux/reboot.h> 8#include <linux/reboot.h>
9#include <linux/io.h>
9#include <asm/pgtable.h> 10#include <asm/pgtable.h>
10#include <asm/pgalloc.h> 11#include <asm/pgalloc.h>
11#include <asm/mmu_context.h> 12#include <asm/mmu_context.h>
12#include <asm/io.h>
13#include <asm/cacheflush.h> 13#include <asm/cacheflush.h>
14#include <asm/mach-types.h> 14#include <asm/mach-types.h>
15 15
diff --git a/arch/arm/kernel/module.c b/arch/arm/kernel/module.c
index a68259a0cccd..9203ba7d58ee 100644
--- a/arch/arm/kernel/module.c
+++ b/arch/arm/kernel/module.c
@@ -47,7 +47,7 @@ void *module_alloc(unsigned long size)
47 if (!area) 47 if (!area)
48 return NULL; 48 return NULL;
49 49
50 return __vmalloc_area(area, GFP_KERNEL, PAGE_KERNEL); 50 return __vmalloc_area(area, GFP_KERNEL, PAGE_KERNEL_EXEC);
51} 51}
52#else /* CONFIG_MMU */ 52#else /* CONFIG_MMU */
53void *module_alloc(unsigned long size) 53void *module_alloc(unsigned long size)
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 3fd882337064..d3ea6fa89521 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -28,12 +28,12 @@
28#include <linux/pm.h> 28#include <linux/pm.h>
29#include <linux/tick.h> 29#include <linux/tick.h>
30#include <linux/utsname.h> 30#include <linux/utsname.h>
31#include <linux/uaccess.h>
31 32
32#include <asm/leds.h> 33#include <asm/leds.h>
33#include <asm/processor.h> 34#include <asm/processor.h>
34#include <asm/system.h> 35#include <asm/system.h>
35#include <asm/thread_notify.h> 36#include <asm/thread_notify.h>
36#include <asm/uaccess.h>
37#include <asm/mach/time.h> 37#include <asm/mach/time.h>
38 38
39static const char *processor_modes[] = { 39static const char *processor_modes[] = {
@@ -267,35 +267,6 @@ void show_regs(struct pt_regs * regs)
267 __backtrace(); 267 __backtrace();
268} 268}
269 269
270void show_fpregs(struct user_fp *regs)
271{
272 int i;
273
274 for (i = 0; i < 8; i++) {
275 unsigned long *p;
276 char type;
277
278 p = (unsigned long *)(regs->fpregs + i);
279
280 switch (regs->ftype[i]) {
281 case 1: type = 'f'; break;
282 case 2: type = 'd'; break;
283 case 3: type = 'e'; break;
284 default: type = '?'; break;
285 }
286 if (regs->init_flag)
287 type = '?';
288
289 printk(" f%d(%c): %08lx %08lx %08lx%c",
290 i, type, p[0], p[1], p[2], i & 1 ? '\n' : ' ');
291 }
292
293
294 printk("FPSR: %08lx FPCR: %08lx\n",
295 (unsigned long)regs->fpsr,
296 (unsigned long)regs->fpcr);
297}
298
299/* 270/*
300 * Free current thread data structures etc.. 271 * Free current thread data structures etc..
301 */ 272 */
@@ -414,7 +385,7 @@ unsigned long get_wchan(struct task_struct *p)
414 do { 385 do {
415 if (fp < stack_start || fp > stack_end) 386 if (fp < stack_start || fp > stack_end)
416 return 0; 387 return 0;
417 lr = pc_pointer (((unsigned long *)fp)[-1]); 388 lr = ((unsigned long *)fp)[-1];
418 if (!in_sched_functions(lr)) 389 if (!in_sched_functions(lr))
419 return lr; 390 return lr;
420 fp = *(unsigned long *) (fp - 12); 391 fp = *(unsigned long *) (fp - 12);
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c
index 4b05dc5c1023..df653ea59250 100644
--- a/arch/arm/kernel/ptrace.c
+++ b/arch/arm/kernel/ptrace.c
@@ -18,8 +18,8 @@
18#include <linux/security.h> 18#include <linux/security.h>
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/signal.h> 20#include <linux/signal.h>
21#include <linux/uaccess.h>
21 22
22#include <asm/uaccess.h>
23#include <asm/pgtable.h> 23#include <asm/pgtable.h>
24#include <asm/system.h> 24#include <asm/system.h>
25#include <asm/traps.h> 25#include <asm/traps.h>
@@ -126,7 +126,7 @@ ptrace_getrn(struct task_struct *child, unsigned long insn)
126 126
127 val = get_user_reg(child, reg); 127 val = get_user_reg(child, reg);
128 if (reg == 15) 128 if (reg == 15)
129 val = pc_pointer(val + 8); 129 val += 8;
130 130
131 return val; 131 return val;
132} 132}
@@ -278,8 +278,7 @@ get_branch_address(struct task_struct *child, unsigned long pc, unsigned long in
278 else 278 else
279 base -= aluop2; 279 base -= aluop2;
280 } 280 }
281 if (read_u32(child, base, &alt) == 0) 281 read_u32(child, base, &alt);
282 alt = pc_pointer(alt);
283 } 282 }
284 break; 283 break;
285 284
@@ -305,8 +304,7 @@ get_branch_address(struct task_struct *child, unsigned long pc, unsigned long in
305 304
306 base = ptrace_getrn(child, insn); 305 base = ptrace_getrn(child, insn);
307 306
308 if (read_u32(child, base + nr_regs, &alt) == 0) 307 read_u32(child, base + nr_regs, &alt);
309 alt = pc_pointer(alt);
310 break; 308 break;
311 } 309 }
312 break; 310 break;
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 2ca7038b67a7..1f1eecca7f55 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -26,11 +26,13 @@
26#include <linux/fs.h> 26#include <linux/fs.h>
27 27
28#include <asm/cpu.h> 28#include <asm/cpu.h>
29#include <asm/cputype.h>
29#include <asm/elf.h> 30#include <asm/elf.h>
30#include <asm/procinfo.h> 31#include <asm/procinfo.h>
31#include <asm/setup.h> 32#include <asm/setup.h>
32#include <asm/mach-types.h> 33#include <asm/mach-types.h>
33#include <asm/cacheflush.h> 34#include <asm/cacheflush.h>
35#include <asm/cachetype.h>
34#include <asm/tlbflush.h> 36#include <asm/tlbflush.h>
35 37
36#include <asm/mach/arch.h> 38#include <asm/mach/arch.h>
@@ -59,13 +61,14 @@ __setup("fpe=", fpe_setup);
59 61
60extern void paging_init(struct meminfo *, struct machine_desc *desc); 62extern void paging_init(struct meminfo *, struct machine_desc *desc);
61extern void reboot_setup(char *str); 63extern void reboot_setup(char *str);
62extern int root_mountflags; 64extern void _text, _etext, __data_start, _edata, _end;
63extern void _stext, _text, _etext, __data_start, _edata, _end;
64 65
65unsigned int processor_id; 66unsigned int processor_id;
66EXPORT_SYMBOL(processor_id); 67EXPORT_SYMBOL(processor_id);
67unsigned int __machine_arch_type; 68unsigned int __machine_arch_type;
68EXPORT_SYMBOL(__machine_arch_type); 69EXPORT_SYMBOL(__machine_arch_type);
70unsigned int cacheid;
71EXPORT_SYMBOL(cacheid);
69 72
70unsigned int __atags_pointer __initdata; 73unsigned int __atags_pointer __initdata;
71 74
@@ -81,8 +84,6 @@ EXPORT_SYMBOL(system_serial_high);
81unsigned int elf_hwcap; 84unsigned int elf_hwcap;
82EXPORT_SYMBOL(elf_hwcap); 85EXPORT_SYMBOL(elf_hwcap);
83 86
84unsigned long __initdata vmalloc_reserve = 128 << 20;
85
86 87
87#ifdef MULTI_CPU 88#ifdef MULTI_CPU
88struct processor processor; 89struct processor processor;
@@ -111,9 +112,6 @@ static struct stack stacks[NR_CPUS];
111char elf_platform[ELF_PLATFORM_SIZE]; 112char elf_platform[ELF_PLATFORM_SIZE];
112EXPORT_SYMBOL(elf_platform); 113EXPORT_SYMBOL(elf_platform);
113 114
114unsigned long phys_initrd_start __initdata = 0;
115unsigned long phys_initrd_size __initdata = 0;
116
117static struct meminfo meminfo __initdata = { 0, }; 115static struct meminfo meminfo __initdata = { 0, };
118static const char *cpu_name; 116static const char *cpu_name;
119static const char *machine_name; 117static const char *machine_name;
@@ -178,63 +176,6 @@ static struct resource io_res[] = {
178#define lp1 io_res[1] 176#define lp1 io_res[1]
179#define lp2 io_res[2] 177#define lp2 io_res[2]
180 178
181static const char *cache_types[16] = {
182 "write-through",
183 "write-back",
184 "write-back",
185 "undefined 3",
186 "undefined 4",
187 "undefined 5",
188 "write-back",
189 "write-back",
190 "undefined 8",
191 "undefined 9",
192 "undefined 10",
193 "undefined 11",
194 "undefined 12",
195 "undefined 13",
196 "write-back",
197 "undefined 15",
198};
199
200static const char *cache_clean[16] = {
201 "not required",
202 "read-block",
203 "cp15 c7 ops",
204 "undefined 3",
205 "undefined 4",
206 "undefined 5",
207 "cp15 c7 ops",
208 "cp15 c7 ops",
209 "undefined 8",
210 "undefined 9",
211 "undefined 10",
212 "undefined 11",
213 "undefined 12",
214 "undefined 13",
215 "cp15 c7 ops",
216 "undefined 15",
217};
218
219static const char *cache_lockdown[16] = {
220 "not supported",
221 "not supported",
222 "not supported",
223 "undefined 3",
224 "undefined 4",
225 "undefined 5",
226 "format A",
227 "format B",
228 "undefined 8",
229 "undefined 9",
230 "undefined 10",
231 "undefined 11",
232 "undefined 12",
233 "undefined 13",
234 "format C",
235 "undefined 15",
236};
237
238static const char *proc_arch[] = { 179static const char *proc_arch[] = {
239 "undefined/unknown", 180 "undefined/unknown",
240 "3", 181 "3",
@@ -255,61 +196,19 @@ static const char *proc_arch[] = {
255 "?(17)", 196 "?(17)",
256}; 197};
257 198
258#define CACHE_TYPE(x) (((x) >> 25) & 15)
259#define CACHE_S(x) ((x) & (1 << 24))
260#define CACHE_DSIZE(x) (((x) >> 12) & 4095) /* only if S=1 */
261#define CACHE_ISIZE(x) ((x) & 4095)
262
263#define CACHE_SIZE(y) (((y) >> 6) & 7)
264#define CACHE_ASSOC(y) (((y) >> 3) & 7)
265#define CACHE_M(y) ((y) & (1 << 2))
266#define CACHE_LINE(y) ((y) & 3)
267
268static inline void dump_cache(const char *prefix, int cpu, unsigned int cache)
269{
270 unsigned int mult = 2 + (CACHE_M(cache) ? 1 : 0);
271
272 printk("CPU%u: %s: %d bytes, associativity %d, %d byte lines, %d sets\n",
273 cpu, prefix,
274 mult << (8 + CACHE_SIZE(cache)),
275 (mult << CACHE_ASSOC(cache)) >> 1,
276 8 << CACHE_LINE(cache),
277 1 << (6 + CACHE_SIZE(cache) - CACHE_ASSOC(cache) -
278 CACHE_LINE(cache)));
279}
280
281static void __init dump_cpu_info(int cpu)
282{
283 unsigned int info = read_cpuid(CPUID_CACHETYPE);
284
285 if (info != processor_id) {
286 printk("CPU%u: D %s %s cache\n", cpu, cache_is_vivt() ? "VIVT" : "VIPT",
287 cache_types[CACHE_TYPE(info)]);
288 if (CACHE_S(info)) {
289 dump_cache("I cache", cpu, CACHE_ISIZE(info));
290 dump_cache("D cache", cpu, CACHE_DSIZE(info));
291 } else {
292 dump_cache("cache", cpu, CACHE_ISIZE(info));
293 }
294 }
295
296 if (arch_is_coherent())
297 printk("Cache coherency enabled\n");
298}
299
300int cpu_architecture(void) 199int cpu_architecture(void)
301{ 200{
302 int cpu_arch; 201 int cpu_arch;
303 202
304 if ((processor_id & 0x0008f000) == 0) { 203 if ((read_cpuid_id() & 0x0008f000) == 0) {
305 cpu_arch = CPU_ARCH_UNKNOWN; 204 cpu_arch = CPU_ARCH_UNKNOWN;
306 } else if ((processor_id & 0x0008f000) == 0x00007000) { 205 } else if ((read_cpuid_id() & 0x0008f000) == 0x00007000) {
307 cpu_arch = (processor_id & (1 << 23)) ? CPU_ARCH_ARMv4T : CPU_ARCH_ARMv3; 206 cpu_arch = (read_cpuid_id() & (1 << 23)) ? CPU_ARCH_ARMv4T : CPU_ARCH_ARMv3;
308 } else if ((processor_id & 0x00080000) == 0x00000000) { 207 } else if ((read_cpuid_id() & 0x00080000) == 0x00000000) {
309 cpu_arch = (processor_id >> 16) & 7; 208 cpu_arch = (read_cpuid_id() >> 16) & 7;
310 if (cpu_arch) 209 if (cpu_arch)
311 cpu_arch += CPU_ARCH_ARMv3; 210 cpu_arch += CPU_ARCH_ARMv3;
312 } else if ((processor_id & 0x000f0000) == 0x000f0000) { 211 } else if ((read_cpuid_id() & 0x000f0000) == 0x000f0000) {
313 unsigned int mmfr0; 212 unsigned int mmfr0;
314 213
315 /* Revised CPUID format. Read the Memory Model Feature 214 /* Revised CPUID format. Read the Memory Model Feature
@@ -330,6 +229,34 @@ int cpu_architecture(void)
330 return cpu_arch; 229 return cpu_arch;
331} 230}
332 231
232static void __init cacheid_init(void)
233{
234 unsigned int cachetype = read_cpuid_cachetype();
235 unsigned int arch = cpu_architecture();
236
237 if (arch >= CPU_ARCH_ARMv7) {
238 cacheid = CACHEID_VIPT_NONALIASING;
239 if ((cachetype & (3 << 14)) == 1 << 14)
240 cacheid |= CACHEID_ASID_TAGGED;
241 } else if (arch >= CPU_ARCH_ARMv6) {
242 if (cachetype & (1 << 23))
243 cacheid = CACHEID_VIPT_ALIASING;
244 else
245 cacheid = CACHEID_VIPT_NONALIASING;
246 } else {
247 cacheid = CACHEID_VIVT;
248 }
249
250 printk("CPU: %s data cache, %s instruction cache\n",
251 cache_is_vivt() ? "VIVT" :
252 cache_is_vipt_aliasing() ? "VIPT aliasing" :
253 cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown",
254 cache_is_vivt() ? "VIVT" :
255 icache_is_vivt_asid_tagged() ? "VIVT ASID tagged" :
256 cache_is_vipt_aliasing() ? "VIPT aliasing" :
257 cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown");
258}
259
333/* 260/*
334 * These functions re-use the assembly code in head.S, which 261 * These functions re-use the assembly code in head.S, which
335 * already provide the required functionality. 262 * already provide the required functionality.
@@ -346,10 +273,10 @@ static void __init setup_processor(void)
346 * types. The linker builds this table for us from the 273 * types. The linker builds this table for us from the
347 * entries in arch/arm/mm/proc-*.S 274 * entries in arch/arm/mm/proc-*.S
348 */ 275 */
349 list = lookup_processor_type(processor_id); 276 list = lookup_processor_type(read_cpuid_id());
350 if (!list) { 277 if (!list) {
351 printk("CPU configuration botched (ID %08x), unable " 278 printk("CPU configuration botched (ID %08x), unable "
352 "to continue.\n", processor_id); 279 "to continue.\n", read_cpuid_id());
353 while (1); 280 while (1);
354 } 281 }
355 282
@@ -369,7 +296,7 @@ static void __init setup_processor(void)
369#endif 296#endif
370 297
371 printk("CPU: %s [%08x] revision %d (ARMv%s), cr=%08lx\n", 298 printk("CPU: %s [%08x] revision %d (ARMv%s), cr=%08lx\n",
372 cpu_name, processor_id, (int)processor_id & 15, 299 cpu_name, read_cpuid_id(), read_cpuid_id() & 15,
373 proc_arch[cpu_architecture()], cr_alignment); 300 proc_arch[cpu_architecture()], cr_alignment);
374 301
375 sprintf(init_utsname()->machine, "%s%c", list->arch_name, ENDIANNESS); 302 sprintf(init_utsname()->machine, "%s%c", list->arch_name, ENDIANNESS);
@@ -379,14 +306,14 @@ static void __init setup_processor(void)
379 elf_hwcap &= ~HWCAP_THUMB; 306 elf_hwcap &= ~HWCAP_THUMB;
380#endif 307#endif
381 308
309 cacheid_init();
382 cpu_proc_init(); 310 cpu_proc_init();
383} 311}
384 312
385/* 313/*
386 * cpu_init - initialise one CPU. 314 * cpu_init - initialise one CPU.
387 * 315 *
388 * cpu_init dumps the cache information, initialises SMP specific 316 * cpu_init sets up the per-CPU stacks.
389 * information, and sets up the per-CPU stacks.
390 */ 317 */
391void cpu_init(void) 318void cpu_init(void)
392{ 319{
@@ -398,9 +325,6 @@ void cpu_init(void)
398 BUG(); 325 BUG();
399 } 326 }
400 327
401 if (system_state == SYSTEM_BOOTING)
402 dump_cpu_info(cpu);
403
404 /* 328 /*
405 * setup stacks for re-entrant exception handlers 329 * setup stacks for re-entrant exception handlers
406 */ 330 */
@@ -443,20 +367,6 @@ static struct machine_desc * __init setup_machine(unsigned int nr)
443 return list; 367 return list;
444} 368}
445 369
446static void __init early_initrd(char **p)
447{
448 unsigned long start, size;
449
450 start = memparse(*p, p);
451 if (**p == ',') {
452 size = memparse((*p) + 1, p);
453
454 phys_initrd_start = start;
455 phys_initrd_size = size;
456 }
457}
458__early_param("initrd=", early_initrd);
459
460static void __init arm_add_memory(unsigned long start, unsigned long size) 370static void __init arm_add_memory(unsigned long start, unsigned long size)
461{ 371{
462 struct membank *bank; 372 struct membank *bank;
@@ -503,17 +413,6 @@ static void __init early_mem(char **p)
503__early_param("mem=", early_mem); 413__early_param("mem=", early_mem);
504 414
505/* 415/*
506 * vmalloc=size forces the vmalloc area to be exactly 'size'
507 * bytes. This can be used to increase (or decrease) the vmalloc
508 * area - the default is 128m.
509 */
510static void __init early_vmalloc(char **arg)
511{
512 vmalloc_reserve = memparse(*arg, arg);
513}
514__early_param("vmalloc=", early_vmalloc);
515
516/*
517 * Initial parsing of the command line. 416 * Initial parsing of the command line.
518 */ 417 */
519static void __init parse_cmdline(char **cmdline_p, char *from) 418static void __init parse_cmdline(char **cmdline_p, char *from)
@@ -527,12 +426,12 @@ static void __init parse_cmdline(char **cmdline_p, char *from)
527 struct early_params *p; 426 struct early_params *p;
528 427
529 for (p = &__early_begin; p < &__early_end; p++) { 428 for (p = &__early_begin; p < &__early_end; p++) {
530 int len = strlen(p->arg); 429 int arglen = strlen(p->arg);
531 430
532 if (memcmp(from, p->arg, len) == 0) { 431 if (memcmp(from, p->arg, arglen) == 0) {
533 if (to != command_line) 432 if (to != command_line)
534 to -= 1; 433 to -= 1;
535 from += len; 434 from += arglen;
536 p->fn(&from); 435 p->fn(&from);
537 436
538 while (*from != ' ' && *from != '\0') 437 while (*from != ' ' && *from != '\0')
@@ -579,18 +478,13 @@ request_standard_resources(struct meminfo *mi, struct machine_desc *mdesc)
579 kernel_data.end = virt_to_phys(&_end - 1); 478 kernel_data.end = virt_to_phys(&_end - 1);
580 479
581 for (i = 0; i < mi->nr_banks; i++) { 480 for (i = 0; i < mi->nr_banks; i++) {
582 unsigned long virt_start, virt_end;
583
584 if (mi->bank[i].size == 0) 481 if (mi->bank[i].size == 0)
585 continue; 482 continue;
586 483
587 virt_start = __phys_to_virt(mi->bank[i].start);
588 virt_end = virt_start + mi->bank[i].size - 1;
589
590 res = alloc_bootmem_low(sizeof(*res)); 484 res = alloc_bootmem_low(sizeof(*res));
591 res->name = "System RAM"; 485 res->name = "System RAM";
592 res->start = __virt_to_phys(virt_start); 486 res->start = mi->bank[i].start;
593 res->end = __virt_to_phys(virt_end); 487 res->end = mi->bank[i].start + mi->bank[i].size - 1;
594 res->flags = IORESOURCE_MEM | IORESOURCE_BUSY; 488 res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
595 489
596 request_resource(&iomem_resource, res); 490 request_resource(&iomem_resource, res);
@@ -694,26 +588,6 @@ static int __init parse_tag_ramdisk(const struct tag *tag)
694 588
695__tagtable(ATAG_RAMDISK, parse_tag_ramdisk); 589__tagtable(ATAG_RAMDISK, parse_tag_ramdisk);
696 590
697static int __init parse_tag_initrd(const struct tag *tag)
698{
699 printk(KERN_WARNING "ATAG_INITRD is deprecated; "
700 "please update your bootloader.\n");
701 phys_initrd_start = __virt_to_phys(tag->u.initrd.start);
702 phys_initrd_size = tag->u.initrd.size;
703 return 0;
704}
705
706__tagtable(ATAG_INITRD, parse_tag_initrd);
707
708static int __init parse_tag_initrd2(const struct tag *tag)
709{
710 phys_initrd_start = tag->u.initrd.start;
711 phys_initrd_size = tag->u.initrd.size;
712 return 0;
713}
714
715__tagtable(ATAG_INITRD2, parse_tag_initrd2);
716
717static int __init parse_tag_serialnr(const struct tag *tag) 591static int __init parse_tag_serialnr(const struct tag *tag)
718{ 592{
719 system_serial_low = tag->u.serialnr.low; 593 system_serial_low = tag->u.serialnr.low;
@@ -901,28 +775,12 @@ static const char *hwcap_str[] = {
901 NULL 775 NULL
902}; 776};
903 777
904static void
905c_show_cache(struct seq_file *m, const char *type, unsigned int cache)
906{
907 unsigned int mult = 2 + (CACHE_M(cache) ? 1 : 0);
908
909 seq_printf(m, "%s size\t\t: %d\n"
910 "%s assoc\t\t: %d\n"
911 "%s line length\t: %d\n"
912 "%s sets\t\t: %d\n",
913 type, mult << (8 + CACHE_SIZE(cache)),
914 type, (mult << CACHE_ASSOC(cache)) >> 1,
915 type, 8 << CACHE_LINE(cache),
916 type, 1 << (6 + CACHE_SIZE(cache) - CACHE_ASSOC(cache) -
917 CACHE_LINE(cache)));
918}
919
920static int c_show(struct seq_file *m, void *v) 778static int c_show(struct seq_file *m, void *v)
921{ 779{
922 int i; 780 int i;
923 781
924 seq_printf(m, "Processor\t: %s rev %d (%s)\n", 782 seq_printf(m, "Processor\t: %s rev %d (%s)\n",
925 cpu_name, (int)processor_id & 15, elf_platform); 783 cpu_name, read_cpuid_id() & 15, elf_platform);
926 784
927#if defined(CONFIG_SMP) 785#if defined(CONFIG_SMP)
928 for_each_online_cpu(i) { 786 for_each_online_cpu(i) {
@@ -949,47 +807,26 @@ static int c_show(struct seq_file *m, void *v)
949 if (elf_hwcap & (1 << i)) 807 if (elf_hwcap & (1 << i))
950 seq_printf(m, "%s ", hwcap_str[i]); 808 seq_printf(m, "%s ", hwcap_str[i]);
951 809
952 seq_printf(m, "\nCPU implementer\t: 0x%02x\n", processor_id >> 24); 810 seq_printf(m, "\nCPU implementer\t: 0x%02x\n", read_cpuid_id() >> 24);
953 seq_printf(m, "CPU architecture: %s\n", proc_arch[cpu_architecture()]); 811 seq_printf(m, "CPU architecture: %s\n", proc_arch[cpu_architecture()]);
954 812
955 if ((processor_id & 0x0008f000) == 0x00000000) { 813 if ((read_cpuid_id() & 0x0008f000) == 0x00000000) {
956 /* pre-ARM7 */ 814 /* pre-ARM7 */
957 seq_printf(m, "CPU part\t: %07x\n", processor_id >> 4); 815 seq_printf(m, "CPU part\t: %07x\n", read_cpuid_id() >> 4);
958 } else { 816 } else {
959 if ((processor_id & 0x0008f000) == 0x00007000) { 817 if ((read_cpuid_id() & 0x0008f000) == 0x00007000) {
960 /* ARM7 */ 818 /* ARM7 */
961 seq_printf(m, "CPU variant\t: 0x%02x\n", 819 seq_printf(m, "CPU variant\t: 0x%02x\n",
962 (processor_id >> 16) & 127); 820 (read_cpuid_id() >> 16) & 127);
963 } else { 821 } else {
964 /* post-ARM7 */ 822 /* post-ARM7 */
965 seq_printf(m, "CPU variant\t: 0x%x\n", 823 seq_printf(m, "CPU variant\t: 0x%x\n",
966 (processor_id >> 20) & 15); 824 (read_cpuid_id() >> 20) & 15);
967 } 825 }
968 seq_printf(m, "CPU part\t: 0x%03x\n", 826 seq_printf(m, "CPU part\t: 0x%03x\n",
969 (processor_id >> 4) & 0xfff); 827 (read_cpuid_id() >> 4) & 0xfff);
970 }
971 seq_printf(m, "CPU revision\t: %d\n", processor_id & 15);
972
973 {
974 unsigned int cache_info = read_cpuid(CPUID_CACHETYPE);
975 if (cache_info != processor_id) {
976 seq_printf(m, "Cache type\t: %s\n"
977 "Cache clean\t: %s\n"
978 "Cache lockdown\t: %s\n"
979 "Cache format\t: %s\n",
980 cache_types[CACHE_TYPE(cache_info)],
981 cache_clean[CACHE_TYPE(cache_info)],
982 cache_lockdown[CACHE_TYPE(cache_info)],
983 CACHE_S(cache_info) ? "Harvard" : "Unified");
984
985 if (CACHE_S(cache_info)) {
986 c_show_cache(m, "I", CACHE_ISIZE(cache_info));
987 c_show_cache(m, "D", CACHE_DSIZE(cache_info));
988 } else {
989 c_show_cache(m, "Cache", CACHE_ISIZE(cache_info));
990 }
991 }
992 } 828 }
829 seq_printf(m, "CPU revision\t: %d\n", read_cpuid_id() & 15);
993 830
994 seq_puts(m, "\n"); 831 seq_puts(m, "\n");
995 832
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c
index ef2f86a5e78a..80b8b5c7e07a 100644
--- a/arch/arm/kernel/signal.c
+++ b/arch/arm/kernel/signal.c
@@ -11,11 +11,11 @@
11#include <linux/signal.h> 11#include <linux/signal.h>
12#include <linux/personality.h> 12#include <linux/personality.h>
13#include <linux/freezer.h> 13#include <linux/freezer.h>
14#include <linux/uaccess.h>
14 15
15#include <asm/elf.h> 16#include <asm/elf.h>
16#include <asm/cacheflush.h> 17#include <asm/cacheflush.h>
17#include <asm/ucontext.h> 18#include <asm/ucontext.h>
18#include <asm/uaccess.h>
19#include <asm/unistd.h> 19#include <asm/unistd.h>
20 20
21#include "ptrace.h" 21#include "ptrace.h"
diff --git a/arch/arm/kernel/sys_arm.c b/arch/arm/kernel/sys_arm.c
index 0128687ba0f7..b3ec641b5cf8 100644
--- a/arch/arm/kernel/sys_arm.c
+++ b/arch/arm/kernel/sys_arm.c
@@ -27,8 +27,7 @@
27#include <linux/file.h> 27#include <linux/file.h>
28#include <linux/utsname.h> 28#include <linux/utsname.h>
29#include <linux/ipc.h> 29#include <linux/ipc.h>
30 30#include <linux/uaccess.h>
31#include <asm/uaccess.h>
32 31
33extern unsigned long do_mremap(unsigned long addr, unsigned long old_len, 32extern unsigned long do_mremap(unsigned long addr, unsigned long old_len,
34 unsigned long new_len, unsigned long flags, 33 unsigned long new_len, unsigned long flags,
diff --git a/arch/arm/kernel/sys_oabi-compat.c b/arch/arm/kernel/sys_oabi-compat.c
index 96ab5f52949c..42623db7f870 100644
--- a/arch/arm/kernel/sys_oabi-compat.c
+++ b/arch/arm/kernel/sys_oabi-compat.c
@@ -82,7 +82,7 @@
82#include <linux/socket.h> 82#include <linux/socket.h>
83#include <linux/net.h> 83#include <linux/net.h>
84#include <linux/ipc.h> 84#include <linux/ipc.h>
85#include <asm/uaccess.h> 85#include <linux/uaccess.h>
86 86
87struct oldabi_stat64 { 87struct oldabi_stat64 {
88 unsigned long long st_dev; 88 unsigned long long st_dev;
diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c
index 368d171754cf..c68b44aa88d2 100644
--- a/arch/arm/kernel/time.c
+++ b/arch/arm/kernel/time.c
@@ -59,7 +59,7 @@ unsigned long profile_pc(struct pt_regs *regs)
59 59
60 if (in_lock_functions(pc)) { 60 if (in_lock_functions(pc)) {
61 fp = regs->ARM_fp; 61 fp = regs->ARM_fp;
62 pc = pc_pointer(((unsigned long *)fp)[-1]); 62 pc = ((unsigned long *)fp)[-1];
63 } 63 }
64 64
65 return pc; 65 return pc;
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index 872f1f8fbb57..57e6874d0b80 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -19,15 +19,13 @@
19#include <linux/kallsyms.h> 19#include <linux/kallsyms.h>
20#include <linux/delay.h> 20#include <linux/delay.h>
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/kprobes.h> 22#include <linux/uaccess.h>
23 23
24#include <asm/atomic.h> 24#include <asm/atomic.h>
25#include <asm/cacheflush.h> 25#include <asm/cacheflush.h>
26#include <asm/system.h> 26#include <asm/system.h>
27#include <asm/uaccess.h>
28#include <asm/unistd.h> 27#include <asm/unistd.h>
29#include <asm/traps.h> 28#include <asm/traps.h>
30#include <asm/io.h>
31 29
32#include "ptrace.h" 30#include "ptrace.h"
33#include "signal.h" 31#include "signal.h"
@@ -69,7 +67,8 @@ void dump_backtrace_entry(unsigned long where, unsigned long from, unsigned long
69 */ 67 */
70static int verify_stack(unsigned long sp) 68static int verify_stack(unsigned long sp)
71{ 69{
72 if (sp < PAGE_OFFSET || (sp > (unsigned long)high_memory && high_memory != 0)) 70 if (sp < PAGE_OFFSET ||
71 (sp > (unsigned long)high_memory && high_memory != NULL))
73 return -EFAULT; 72 return -EFAULT;
74 73
75 return 0; 74 return 0;
@@ -328,17 +327,6 @@ asmlinkage void __exception do_undefinstr(struct pt_regs *regs)
328 get_user(instr, (u32 __user *)pc); 327 get_user(instr, (u32 __user *)pc);
329 } 328 }
330 329
331#ifdef CONFIG_KPROBES
332 /*
333 * It is possible to have recursive kprobes, so we can't call
334 * the kprobe trap handler with the undef_lock held.
335 */
336 if (instr == KPROBE_BREAKPOINT_INSTRUCTION && !user_mode(regs)) {
337 kprobe_trap_handler(regs, instr);
338 return;
339 }
340#endif
341
342 if (call_undef_hook(regs, instr) == 0) 330 if (call_undef_hook(regs, instr) == 0)
343 return; 331 return;
344 332
diff --git a/arch/arm/kernel/xscale-cp0.c b/arch/arm/kernel/xscale-cp0.c
index 180000bfdc8f..17127db906fa 100644
--- a/arch/arm/kernel/xscale-cp0.c
+++ b/arch/arm/kernel/xscale-cp0.c
@@ -14,8 +14,8 @@
14#include <linux/signal.h> 14#include <linux/signal.h>
15#include <linux/sched.h> 15#include <linux/sched.h>
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/io.h>
17#include <asm/thread_notify.h> 18#include <asm/thread_notify.h>
18#include <asm/io.h>
19 19
20static inline void dsp_save_state(u32 *state) 20static inline void dsp_save_state(u32 *state)
21{ 21{
diff --git a/arch/arm/lib/ashldi3.S b/arch/arm/lib/ashldi3.S
index 55e57a1c2e6d..1154d924080b 100644
--- a/arch/arm/lib/ashldi3.S
+++ b/arch/arm/lib/ashldi3.S
@@ -47,3 +47,5 @@ ENTRY(__aeabi_llsl)
47 mov al, al, lsl r2 47 mov al, al, lsl r2
48 mov pc, lr 48 mov pc, lr
49 49
50ENDPROC(__ashldi3)
51ENDPROC(__aeabi_llsl)
diff --git a/arch/arm/lib/ashrdi3.S b/arch/arm/lib/ashrdi3.S
index 0b31398f89b2..9f8b35572f8c 100644
--- a/arch/arm/lib/ashrdi3.S
+++ b/arch/arm/lib/ashrdi3.S
@@ -47,3 +47,5 @@ ENTRY(__aeabi_lasr)
47 mov ah, ah, asr r2 47 mov ah, ah, asr r2
48 mov pc, lr 48 mov pc, lr
49 49
50ENDPROC(__ashrdi3)
51ENDPROC(__aeabi_lasr)
diff --git a/arch/arm/lib/backtrace.S b/arch/arm/lib/backtrace.S
index 84dc890d2bf3..b0951d0e8b2c 100644
--- a/arch/arm/lib/backtrace.S
+++ b/arch/arm/lib/backtrace.S
@@ -30,6 +30,8 @@ ENTRY(c_backtrace)
30 30
31#if !defined(CONFIG_FRAME_POINTER) || !defined(CONFIG_PRINTK) 31#if !defined(CONFIG_FRAME_POINTER) || !defined(CONFIG_PRINTK)
32 mov pc, lr 32 mov pc, lr
33ENDPROC(__backtrace)
34ENDPROC(c_backtrace)
33#else 35#else
34 stmfd sp!, {r4 - r8, lr} @ Save an extra register so we have a location... 36 stmfd sp!, {r4 - r8, lr} @ Save an extra register so we have a location...
35 movs frame, r0 @ if frame pointer is zero 37 movs frame, r0 @ if frame pointer is zero
@@ -103,6 +105,8 @@ for_each_frame: tst frame, mask @ Check for address exceptions
103 mov r1, frame 105 mov r1, frame
104 bl printk 106 bl printk
105no_frame: ldmfd sp!, {r4 - r8, pc} 107no_frame: ldmfd sp!, {r4 - r8, pc}
108ENDPROC(__backtrace)
109ENDPROC(c_backtrace)
106 110
107 .section __ex_table,"a" 111 .section __ex_table,"a"
108 .align 3 112 .align 3
diff --git a/arch/arm/lib/changebit.S b/arch/arm/lib/changebit.S
index 389567c24090..80f3115cbee2 100644
--- a/arch/arm/lib/changebit.S
+++ b/arch/arm/lib/changebit.S
@@ -19,3 +19,5 @@ ENTRY(_change_bit_be)
19 eor r0, r0, #0x18 @ big endian byte ordering 19 eor r0, r0, #0x18 @ big endian byte ordering
20ENTRY(_change_bit_le) 20ENTRY(_change_bit_le)
21 bitop eor 21 bitop eor
22ENDPROC(_change_bit_be)
23ENDPROC(_change_bit_le)
diff --git a/arch/arm/lib/clear_user.S b/arch/arm/lib/clear_user.S
index ecb28dcdaf7b..4d6bc71231f3 100644
--- a/arch/arm/lib/clear_user.S
+++ b/arch/arm/lib/clear_user.S
@@ -41,9 +41,10 @@ USER( strplt r2, [r0], #4)
41USER( strnebt r2, [r0], #1) 41USER( strnebt r2, [r0], #1)
42USER( strnebt r2, [r0], #1) 42USER( strnebt r2, [r0], #1)
43 tst r1, #1 @ x1 x0 x1 x0 x1 x0 x1 43 tst r1, #1 @ x1 x0 x1 x0 x1 x0 x1
44USER( strnebt r2, [r0], #1) 44USER( strnebt r2, [r0])
45 mov r0, #0 45 mov r0, #0
46 ldmfd sp!, {r1, pc} 46 ldmfd sp!, {r1, pc}
47ENDPROC(__clear_user)
47 48
48 .section .fixup,"ax" 49 .section .fixup,"ax"
49 .align 0 50 .align 0
diff --git a/arch/arm/lib/clearbit.S b/arch/arm/lib/clearbit.S
index 347516533025..1a63e43a1df0 100644
--- a/arch/arm/lib/clearbit.S
+++ b/arch/arm/lib/clearbit.S
@@ -20,3 +20,5 @@ ENTRY(_clear_bit_be)
20 eor r0, r0, #0x18 @ big endian byte ordering 20 eor r0, r0, #0x18 @ big endian byte ordering
21ENTRY(_clear_bit_le) 21ENTRY(_clear_bit_le)
22 bitop bic 22 bitop bic
23ENDPROC(_clear_bit_be)
24ENDPROC(_clear_bit_le)
diff --git a/arch/arm/lib/copy_from_user.S b/arch/arm/lib/copy_from_user.S
index 6b7363ce749c..56799a165cc4 100644
--- a/arch/arm/lib/copy_from_user.S
+++ b/arch/arm/lib/copy_from_user.S
@@ -87,6 +87,8 @@ ENTRY(__copy_from_user)
87 87
88#include "copy_template.S" 88#include "copy_template.S"
89 89
90ENDPROC(__copy_from_user)
91
90 .section .fixup,"ax" 92 .section .fixup,"ax"
91 .align 0 93 .align 0
92 copy_abort_preamble 94 copy_abort_preamble
diff --git a/arch/arm/lib/copy_page.S b/arch/arm/lib/copy_page.S
index 666c99cc0744..6ae04db1ca4f 100644
--- a/arch/arm/lib/copy_page.S
+++ b/arch/arm/lib/copy_page.S
@@ -44,3 +44,4 @@ ENTRY(copy_page)
44 PLD( ldmeqia r1!, {r3, r4, ip, lr} ) 44 PLD( ldmeqia r1!, {r3, r4, ip, lr} )
45 PLD( beq 2b ) 45 PLD( beq 2b )
46 ldmfd sp!, {r4, pc} @ 3 46 ldmfd sp!, {r4, pc} @ 3
47ENDPROC(copy_page)
diff --git a/arch/arm/lib/copy_to_user.S b/arch/arm/lib/copy_to_user.S
index 5224d94688d9..22f968bbdffd 100644
--- a/arch/arm/lib/copy_to_user.S
+++ b/arch/arm/lib/copy_to_user.S
@@ -90,6 +90,8 @@ ENTRY(__copy_to_user)
90 90
91#include "copy_template.S" 91#include "copy_template.S"
92 92
93ENDPROC(__copy_to_user)
94
93 .section .fixup,"ax" 95 .section .fixup,"ax"
94 .align 0 96 .align 0
95 copy_abort_preamble 97 copy_abort_preamble
diff --git a/arch/arm/lib/csumipv6.S b/arch/arm/lib/csumipv6.S
index 9621469beec1..3ac6ef01bc43 100644
--- a/arch/arm/lib/csumipv6.S
+++ b/arch/arm/lib/csumipv6.S
@@ -29,4 +29,5 @@ ENTRY(__csum_ipv6_magic)
29 adcs r0, r0, r2 29 adcs r0, r0, r2
30 adcs r0, r0, #0 30 adcs r0, r0, #0
31 ldmfd sp!, {pc} 31 ldmfd sp!, {pc}
32ENDPROC(__csum_ipv6_magic)
32 33
diff --git a/arch/arm/lib/csumpartial.S b/arch/arm/lib/csumpartial.S
index a78dae5a7b28..31d3cb34740d 100644
--- a/arch/arm/lib/csumpartial.S
+++ b/arch/arm/lib/csumpartial.S
@@ -139,3 +139,4 @@ ENTRY(csum_partial)
139 tst len, #0x1c 139 tst len, #0x1c
140 bne 4b 140 bne 4b
141 b .Lless4 141 b .Lless4
142ENDPROC(csum_partial)
diff --git a/arch/arm/lib/csumpartialcopy.S b/arch/arm/lib/csumpartialcopy.S
index 21effe0dbf97..d03fc71fc88c 100644
--- a/arch/arm/lib/csumpartialcopy.S
+++ b/arch/arm/lib/csumpartialcopy.S
@@ -18,13 +18,11 @@
18 */ 18 */
19 19
20 .macro save_regs 20 .macro save_regs
21 mov ip, sp 21 stmfd sp!, {r1, r4 - r8, lr}
22 stmfd sp!, {r1, r4 - r8, fp, ip, lr, pc}
23 sub fp, ip, #4
24 .endm 22 .endm
25 23
26 .macro load_regs 24 .macro load_regs
27 ldmfd sp, {r1, r4 - r8, fp, sp, pc} 25 ldmfd sp!, {r1, r4 - r8, pc}
28 .endm 26 .endm
29 27
30 .macro load1b, reg1 28 .macro load1b, reg1
@@ -50,5 +48,6 @@
50 .endm 48 .endm
51 49
52#define FN_ENTRY ENTRY(csum_partial_copy_nocheck) 50#define FN_ENTRY ENTRY(csum_partial_copy_nocheck)
51#define FN_EXIT ENDPROC(csum_partial_copy_nocheck)
53 52
54#include "csumpartialcopygeneric.S" 53#include "csumpartialcopygeneric.S"
diff --git a/arch/arm/lib/csumpartialcopygeneric.S b/arch/arm/lib/csumpartialcopygeneric.S
index c50e8f5285d1..d620a5f22a09 100644
--- a/arch/arm/lib/csumpartialcopygeneric.S
+++ b/arch/arm/lib/csumpartialcopygeneric.S
@@ -329,3 +329,4 @@ FN_ENTRY
329 adcs sum, sum, r4, push #24 329 adcs sum, sum, r4, push #24
330 mov r5, r4, get_byte_1 330 mov r5, r4, get_byte_1
331 b .Lexit 331 b .Lexit
332FN_EXIT
diff --git a/arch/arm/lib/csumpartialcopyuser.S b/arch/arm/lib/csumpartialcopyuser.S
index c3b93e22ea25..14677fb4b0c4 100644
--- a/arch/arm/lib/csumpartialcopyuser.S
+++ b/arch/arm/lib/csumpartialcopyuser.S
@@ -18,13 +18,11 @@
18 .text 18 .text
19 19
20 .macro save_regs 20 .macro save_regs
21 mov ip, sp 21 stmfd sp!, {r1, r2, r4 - r8, lr}
22 stmfd sp!, {r1 - r2, r4 - r8, fp, ip, lr, pc}
23 sub fp, ip, #4
24 .endm 22 .endm
25 23
26 .macro load_regs 24 .macro load_regs
27 ldmfd sp, {r1, r2, r4-r8, fp, sp, pc} 25 ldmfd sp!, {r1, r2, r4 - r8, pc}
28 .endm 26 .endm
29 27
30 .macro load1b, reg1 28 .macro load1b, reg1
@@ -82,6 +80,7 @@
82 */ 80 */
83 81
84#define FN_ENTRY ENTRY(csum_partial_copy_from_user) 82#define FN_ENTRY ENTRY(csum_partial_copy_from_user)
83#define FN_EXIT ENDPROC(csum_partial_copy_from_user)
85 84
86#include "csumpartialcopygeneric.S" 85#include "csumpartialcopygeneric.S"
87 86
diff --git a/arch/arm/lib/delay.S b/arch/arm/lib/delay.S
index 930a70259220..8d6a8762ab88 100644
--- a/arch/arm/lib/delay.S
+++ b/arch/arm/lib/delay.S
@@ -60,3 +60,6 @@ ENTRY(__delay)
60#endif 60#endif
61 bhi __delay 61 bhi __delay
62 mov pc, lr 62 mov pc, lr
63ENDPROC(__udelay)
64ENDPROC(__const_udelay)
65ENDPROC(__delay)
diff --git a/arch/arm/lib/div64.S b/arch/arm/lib/div64.S
index 58eef6607629..1425e789ba86 100644
--- a/arch/arm/lib/div64.S
+++ b/arch/arm/lib/div64.S
@@ -198,3 +198,4 @@ ENTRY(__do_div64)
198 mov xh, #0 198 mov xh, #0
199 ldr pc, [sp], #8 199 ldr pc, [sp], #8
200 200
201ENDPROC(__do_div64)
diff --git a/arch/arm/lib/findbit.S b/arch/arm/lib/findbit.S
index a5ca0248aa4e..8c4defc4f3c4 100644
--- a/arch/arm/lib/findbit.S
+++ b/arch/arm/lib/findbit.S
@@ -33,6 +33,7 @@ ENTRY(_find_first_zero_bit_le)
33 blo 1b 33 blo 1b
343: mov r0, r1 @ no free bits 343: mov r0, r1 @ no free bits
35 mov pc, lr 35 mov pc, lr
36ENDPROC(_find_first_zero_bit_le)
36 37
37/* 38/*
38 * Purpose : Find next 'zero' bit 39 * Purpose : Find next 'zero' bit
@@ -50,6 +51,7 @@ ENTRY(_find_next_zero_bit_le)
50 orr r2, r2, #7 @ if zero, then no bits here 51 orr r2, r2, #7 @ if zero, then no bits here
51 add r2, r2, #1 @ align bit pointer 52 add r2, r2, #1 @ align bit pointer
52 b 2b @ loop for next bit 53 b 2b @ loop for next bit
54ENDPROC(_find_next_zero_bit_le)
53 55
54/* 56/*
55 * Purpose : Find a 'one' bit 57 * Purpose : Find a 'one' bit
@@ -67,6 +69,7 @@ ENTRY(_find_first_bit_le)
67 blo 1b 69 blo 1b
683: mov r0, r1 @ no free bits 703: mov r0, r1 @ no free bits
69 mov pc, lr 71 mov pc, lr
72ENDPROC(_find_first_bit_le)
70 73
71/* 74/*
72 * Purpose : Find next 'one' bit 75 * Purpose : Find next 'one' bit
@@ -83,6 +86,7 @@ ENTRY(_find_next_bit_le)
83 orr r2, r2, #7 @ if zero, then no bits here 86 orr r2, r2, #7 @ if zero, then no bits here
84 add r2, r2, #1 @ align bit pointer 87 add r2, r2, #1 @ align bit pointer
85 b 2b @ loop for next bit 88 b 2b @ loop for next bit
89ENDPROC(_find_next_bit_le)
86 90
87#ifdef __ARMEB__ 91#ifdef __ARMEB__
88 92
@@ -99,6 +103,7 @@ ENTRY(_find_first_zero_bit_be)
99 blo 1b 103 blo 1b
1003: mov r0, r1 @ no free bits 1043: mov r0, r1 @ no free bits
101 mov pc, lr 105 mov pc, lr
106ENDPROC(_find_first_zero_bit_be)
102 107
103ENTRY(_find_next_zero_bit_be) 108ENTRY(_find_next_zero_bit_be)
104 teq r1, #0 109 teq r1, #0
@@ -113,6 +118,7 @@ ENTRY(_find_next_zero_bit_be)
113 orr r2, r2, #7 @ if zero, then no bits here 118 orr r2, r2, #7 @ if zero, then no bits here
114 add r2, r2, #1 @ align bit pointer 119 add r2, r2, #1 @ align bit pointer
115 b 2b @ loop for next bit 120 b 2b @ loop for next bit
121ENDPROC(_find_next_zero_bit_be)
116 122
117ENTRY(_find_first_bit_be) 123ENTRY(_find_first_bit_be)
118 teq r1, #0 124 teq r1, #0
@@ -127,6 +133,7 @@ ENTRY(_find_first_bit_be)
127 blo 1b 133 blo 1b
1283: mov r0, r1 @ no free bits 1343: mov r0, r1 @ no free bits
129 mov pc, lr 135 mov pc, lr
136ENDPROC(_find_first_bit_be)
130 137
131ENTRY(_find_next_bit_be) 138ENTRY(_find_next_bit_be)
132 teq r1, #0 139 teq r1, #0
@@ -140,6 +147,7 @@ ENTRY(_find_next_bit_be)
140 orr r2, r2, #7 @ if zero, then no bits here 147 orr r2, r2, #7 @ if zero, then no bits here
141 add r2, r2, #1 @ align bit pointer 148 add r2, r2, #1 @ align bit pointer
142 b 2b @ loop for next bit 149 b 2b @ loop for next bit
150ENDPROC(_find_next_bit_be)
143 151
144#endif 152#endif
145 153
diff --git a/arch/arm/lib/getuser.S b/arch/arm/lib/getuser.S
index 2034d4dbe6ad..6763088b7607 100644
--- a/arch/arm/lib/getuser.S
+++ b/arch/arm/lib/getuser.S
@@ -26,16 +26,16 @@
26 * Note that ADDR_LIMIT is either 0 or 0xc0000000. 26 * Note that ADDR_LIMIT is either 0 or 0xc0000000.
27 * Note also that it is intended that __get_user_bad is not global. 27 * Note also that it is intended that __get_user_bad is not global.
28 */ 28 */
29#include <linux/linkage.h>
29#include <asm/errno.h> 30#include <asm/errno.h>
30 31
31 .global __get_user_1 32ENTRY(__get_user_1)
32__get_user_1:
331: ldrbt r2, [r0] 331: ldrbt r2, [r0]
34 mov r0, #0 34 mov r0, #0
35 mov pc, lr 35 mov pc, lr
36ENDPROC(__get_user_1)
36 37
37 .global __get_user_2 38ENTRY(__get_user_2)
38__get_user_2:
392: ldrbt r2, [r0], #1 392: ldrbt r2, [r0], #1
403: ldrbt r3, [r0] 403: ldrbt r3, [r0]
41#ifndef __ARMEB__ 41#ifndef __ARMEB__
@@ -45,17 +45,19 @@ __get_user_2:
45#endif 45#endif
46 mov r0, #0 46 mov r0, #0
47 mov pc, lr 47 mov pc, lr
48ENDPROC(__get_user_2)
48 49
49 .global __get_user_4 50ENTRY(__get_user_4)
50__get_user_4:
514: ldrt r2, [r0] 514: ldrt r2, [r0]
52 mov r0, #0 52 mov r0, #0
53 mov pc, lr 53 mov pc, lr
54ENDPROC(__get_user_4)
54 55
55__get_user_bad: 56__get_user_bad:
56 mov r2, #0 57 mov r2, #0
57 mov r0, #-EFAULT 58 mov r0, #-EFAULT
58 mov pc, lr 59 mov pc, lr
60ENDPROC(__get_user_bad)
59 61
60.section __ex_table, "a" 62.section __ex_table, "a"
61 .long 1b, __get_user_bad 63 .long 1b, __get_user_bad
diff --git a/arch/arm/lib/io-readsb.S b/arch/arm/lib/io-readsb.S
index fb966ad0276f..9f4238987fe9 100644
--- a/arch/arm/lib/io-readsb.S
+++ b/arch/arm/lib/io-readsb.S
@@ -120,3 +120,4 @@ ENTRY(__raw_readsb)
120 strgtb r3, [r1] 120 strgtb r3, [r1]
121 121
122 ldmfd sp!, {r4 - r6, pc} 122 ldmfd sp!, {r4 - r6, pc}
123ENDPROC(__raw_readsb)
diff --git a/arch/arm/lib/io-readsl.S b/arch/arm/lib/io-readsl.S
index 75a9121cb23f..5fb97e7f9f4b 100644
--- a/arch/arm/lib/io-readsl.S
+++ b/arch/arm/lib/io-readsl.S
@@ -76,3 +76,4 @@ ENTRY(__raw_readsl)
768: mov r3, ip, get_byte_0 768: mov r3, ip, get_byte_0
77 strb r3, [r1, #0] 77 strb r3, [r1, #0]
78 mov pc, lr 78 mov pc, lr
79ENDPROC(__raw_readsl)
diff --git a/arch/arm/lib/io-readsw-armv4.S b/arch/arm/lib/io-readsw-armv4.S
index 4db1c5f0b219..1f393d42593d 100644
--- a/arch/arm/lib/io-readsw-armv4.S
+++ b/arch/arm/lib/io-readsw-armv4.S
@@ -128,3 +128,4 @@ ENTRY(__raw_readsw)
128 _BE_ONLY_( movne ip, ip, lsr #24 ) 128 _BE_ONLY_( movne ip, ip, lsr #24 )
129 strneb ip, [r1] 129 strneb ip, [r1]
130 ldmfd sp!, {r4, pc} 130 ldmfd sp!, {r4, pc}
131ENDPROC(__raw_readsw)
diff --git a/arch/arm/lib/io-writesb.S b/arch/arm/lib/io-writesb.S
index 7eba2b6cc69f..68b92f4acaeb 100644
--- a/arch/arm/lib/io-writesb.S
+++ b/arch/arm/lib/io-writesb.S
@@ -91,3 +91,4 @@ ENTRY(__raw_writesb)
91 strgtb r3, [r0] 91 strgtb r3, [r0]
92 92
93 ldmfd sp!, {r4, r5, pc} 93 ldmfd sp!, {r4, r5, pc}
94ENDPROC(__raw_writesb)
diff --git a/arch/arm/lib/io-writesl.S b/arch/arm/lib/io-writesl.S
index f8f14dd227ca..8d3b7813725c 100644
--- a/arch/arm/lib/io-writesl.S
+++ b/arch/arm/lib/io-writesl.S
@@ -64,3 +64,4 @@ ENTRY(__raw_writesl)
64 str ip, [r0] 64 str ip, [r0]
65 bne 6b 65 bne 6b
66 mov pc, lr 66 mov pc, lr
67ENDPROC(__raw_writesl)
diff --git a/arch/arm/lib/io-writesw-armv4.S b/arch/arm/lib/io-writesw-armv4.S
index c8e85bd653b7..d6585612c86b 100644
--- a/arch/arm/lib/io-writesw-armv4.S
+++ b/arch/arm/lib/io-writesw-armv4.S
@@ -94,3 +94,4 @@ ENTRY(__raw_writesw)
943: movne ip, r3, lsr #8 943: movne ip, r3, lsr #8
95 strneh ip, [r0] 95 strneh ip, [r0]
96 mov pc, lr 96 mov pc, lr
97ENDPROC(__raw_writesw)
diff --git a/arch/arm/lib/lib1funcs.S b/arch/arm/lib/lib1funcs.S
index 4e492f4b3f0e..67964bcfc854 100644
--- a/arch/arm/lib/lib1funcs.S
+++ b/arch/arm/lib/lib1funcs.S
@@ -230,6 +230,8 @@ ENTRY(__aeabi_uidiv)
230 mov r0, r0, lsr r2 230 mov r0, r0, lsr r2
231 mov pc, lr 231 mov pc, lr
232 232
233ENDPROC(__udivsi3)
234ENDPROC(__aeabi_uidiv)
233 235
234ENTRY(__umodsi3) 236ENTRY(__umodsi3)
235 237
@@ -245,6 +247,7 @@ ENTRY(__umodsi3)
245 247
246 mov pc, lr 248 mov pc, lr
247 249
250ENDPROC(__umodsi3)
248 251
249ENTRY(__divsi3) 252ENTRY(__divsi3)
250ENTRY(__aeabi_idiv) 253ENTRY(__aeabi_idiv)
@@ -284,6 +287,8 @@ ENTRY(__aeabi_idiv)
284 rsbmi r0, r0, #0 287 rsbmi r0, r0, #0
285 mov pc, lr 288 mov pc, lr
286 289
290ENDPROC(__divsi3)
291ENDPROC(__aeabi_idiv)
287 292
288ENTRY(__modsi3) 293ENTRY(__modsi3)
289 294
@@ -305,6 +310,8 @@ ENTRY(__modsi3)
305 rsbmi r0, r0, #0 310 rsbmi r0, r0, #0
306 mov pc, lr 311 mov pc, lr
307 312
313ENDPROC(__modsi3)
314
308#ifdef CONFIG_AEABI 315#ifdef CONFIG_AEABI
309 316
310ENTRY(__aeabi_uidivmod) 317ENTRY(__aeabi_uidivmod)
@@ -316,6 +323,8 @@ ENTRY(__aeabi_uidivmod)
316 sub r1, r1, r3 323 sub r1, r1, r3
317 mov pc, lr 324 mov pc, lr
318 325
326ENDPROC(__aeabi_uidivmod)
327
319ENTRY(__aeabi_idivmod) 328ENTRY(__aeabi_idivmod)
320 329
321 stmfd sp!, {r0, r1, ip, lr} 330 stmfd sp!, {r0, r1, ip, lr}
@@ -325,6 +334,8 @@ ENTRY(__aeabi_idivmod)
325 sub r1, r1, r3 334 sub r1, r1, r3
326 mov pc, lr 335 mov pc, lr
327 336
337ENDPROC(__aeabi_idivmod)
338
328#endif 339#endif
329 340
330Ldiv0: 341Ldiv0:
diff --git a/arch/arm/lib/lshrdi3.S b/arch/arm/lib/lshrdi3.S
index a86dbdd59cc4..99ea338bf87c 100644
--- a/arch/arm/lib/lshrdi3.S
+++ b/arch/arm/lib/lshrdi3.S
@@ -47,3 +47,5 @@ ENTRY(__aeabi_llsr)
47 mov ah, ah, lsr r2 47 mov ah, ah, lsr r2
48 mov pc, lr 48 mov pc, lr
49 49
50ENDPROC(__lshrdi3)
51ENDPROC(__aeabi_llsr)
diff --git a/arch/arm/lib/memchr.S b/arch/arm/lib/memchr.S
index e7ab1ea8ebaa..1da86991d700 100644
--- a/arch/arm/lib/memchr.S
+++ b/arch/arm/lib/memchr.S
@@ -23,3 +23,4 @@ ENTRY(memchr)
23 sub r0, r0, #1 23 sub r0, r0, #1
242: movne r0, #0 242: movne r0, #0
25 mov pc, lr 25 mov pc, lr
26ENDPROC(memchr)
diff --git a/arch/arm/lib/memcpy.S b/arch/arm/lib/memcpy.S
index 7e71d6708a8d..e0d002641d3f 100644
--- a/arch/arm/lib/memcpy.S
+++ b/arch/arm/lib/memcpy.S
@@ -57,3 +57,4 @@ ENTRY(memcpy)
57 57
58#include "copy_template.S" 58#include "copy_template.S"
59 59
60ENDPROC(memcpy)
diff --git a/arch/arm/lib/memmove.S b/arch/arm/lib/memmove.S
index 2e301b7bd8f1..12549187088c 100644
--- a/arch/arm/lib/memmove.S
+++ b/arch/arm/lib/memmove.S
@@ -196,3 +196,4 @@ ENTRY(memmove)
196 196
19718: backward_copy_shift push=24 pull=8 19718: backward_copy_shift push=24 pull=8
198 198
199ENDPROC(memmove)
diff --git a/arch/arm/lib/memset.S b/arch/arm/lib/memset.S
index b477d4ac88ef..761eefa76243 100644
--- a/arch/arm/lib/memset.S
+++ b/arch/arm/lib/memset.S
@@ -124,3 +124,4 @@ ENTRY(memset)
124 tst r2, #1 124 tst r2, #1
125 strneb r1, [r0], #1 125 strneb r1, [r0], #1
126 mov pc, lr 126 mov pc, lr
127ENDPROC(memset)
diff --git a/arch/arm/lib/memzero.S b/arch/arm/lib/memzero.S
index b8f79d80ee9b..3fbdef5f802a 100644
--- a/arch/arm/lib/memzero.S
+++ b/arch/arm/lib/memzero.S
@@ -122,3 +122,4 @@ ENTRY(__memzero)
122 tst r1, #1 @ 1 a byte left over 122 tst r1, #1 @ 1 a byte left over
123 strneb r2, [r0], #1 @ 1 123 strneb r2, [r0], #1 @ 1
124 mov pc, lr @ 1 124 mov pc, lr @ 1
125ENDPROC(__memzero)
diff --git a/arch/arm/lib/muldi3.S b/arch/arm/lib/muldi3.S
index d89c60615794..36c91b4957e2 100644
--- a/arch/arm/lib/muldi3.S
+++ b/arch/arm/lib/muldi3.S
@@ -43,3 +43,5 @@ ENTRY(__aeabi_lmul)
43 adc xh, xh, ip, lsr #16 43 adc xh, xh, ip, lsr #16
44 mov pc, lr 44 mov pc, lr
45 45
46ENDPROC(__muldi3)
47ENDPROC(__aeabi_lmul)
diff --git a/arch/arm/lib/putuser.S b/arch/arm/lib/putuser.S
index 08ec7dffa52e..864f3c1c4f18 100644
--- a/arch/arm/lib/putuser.S
+++ b/arch/arm/lib/putuser.S
@@ -26,16 +26,16 @@
26 * Note that ADDR_LIMIT is either 0 or 0xc0000000 26 * Note that ADDR_LIMIT is either 0 or 0xc0000000
27 * Note also that it is intended that __put_user_bad is not global. 27 * Note also that it is intended that __put_user_bad is not global.
28 */ 28 */
29#include <linux/linkage.h>
29#include <asm/errno.h> 30#include <asm/errno.h>
30 31
31 .global __put_user_1 32ENTRY(__put_user_1)
32__put_user_1:
331: strbt r2, [r0] 331: strbt r2, [r0]
34 mov r0, #0 34 mov r0, #0
35 mov pc, lr 35 mov pc, lr
36ENDPROC(__put_user_1)
36 37
37 .global __put_user_2 38ENTRY(__put_user_2)
38__put_user_2:
39 mov ip, r2, lsr #8 39 mov ip, r2, lsr #8
40#ifndef __ARMEB__ 40#ifndef __ARMEB__
412: strbt r2, [r0], #1 412: strbt r2, [r0], #1
@@ -46,23 +46,25 @@ __put_user_2:
46#endif 46#endif
47 mov r0, #0 47 mov r0, #0
48 mov pc, lr 48 mov pc, lr
49ENDPROC(__put_user_2)
49 50
50 .global __put_user_4 51ENTRY(__put_user_4)
51__put_user_4:
524: strt r2, [r0] 524: strt r2, [r0]
53 mov r0, #0 53 mov r0, #0
54 mov pc, lr 54 mov pc, lr
55ENDPROC(__put_user_4)
55 56
56 .global __put_user_8 57ENTRY(__put_user_8)
57__put_user_8:
585: strt r2, [r0], #4 585: strt r2, [r0], #4
596: strt r3, [r0] 596: strt r3, [r0]
60 mov r0, #0 60 mov r0, #0
61 mov pc, lr 61 mov pc, lr
62ENDPROC(__put_user_8)
62 63
63__put_user_bad: 64__put_user_bad:
64 mov r0, #-EFAULT 65 mov r0, #-EFAULT
65 mov pc, lr 66 mov pc, lr
67ENDPROC(__put_user_bad)
66 68
67.section __ex_table, "a" 69.section __ex_table, "a"
68 .long 1b, __put_user_bad 70 .long 1b, __put_user_bad
diff --git a/arch/arm/lib/setbit.S b/arch/arm/lib/setbit.S
index 83bc23d5b037..1dd7176c4b2b 100644
--- a/arch/arm/lib/setbit.S
+++ b/arch/arm/lib/setbit.S
@@ -20,3 +20,5 @@ ENTRY(_set_bit_be)
20 eor r0, r0, #0x18 @ big endian byte ordering 20 eor r0, r0, #0x18 @ big endian byte ordering
21ENTRY(_set_bit_le) 21ENTRY(_set_bit_le)
22 bitop orr 22 bitop orr
23ENDPROC(_set_bit_be)
24ENDPROC(_set_bit_le)
diff --git a/arch/arm/lib/sha1.S b/arch/arm/lib/sha1.S
index 67c2bf4774b7..a16fb208c841 100644
--- a/arch/arm/lib/sha1.S
+++ b/arch/arm/lib/sha1.S
@@ -185,6 +185,8 @@ ENTRY(sha_transform)
185 185
186 ldmfd sp!, {r4 - r8, pc} 186 ldmfd sp!, {r4 - r8, pc}
187 187
188ENDPROC(sha_transform)
189
188.L_sha_K: 190.L_sha_K:
189 .word 0x5a827999, 0x6ed9eba1, 0x8f1bbcdc, 0xca62c1d6 191 .word 0x5a827999, 0x6ed9eba1, 0x8f1bbcdc, 0xca62c1d6
190 192
@@ -204,3 +206,4 @@ ENTRY(sha_init)
204 stmia r0, {r1, r2, r3, ip, lr} 206 stmia r0, {r1, r2, r3, ip, lr}
205 ldr pc, [sp], #4 207 ldr pc, [sp], #4
206 208
209ENDPROC(sha_init)
diff --git a/arch/arm/lib/strchr.S b/arch/arm/lib/strchr.S
index 9f18d6fdee6a..d8f2a1c1aea4 100644
--- a/arch/arm/lib/strchr.S
+++ b/arch/arm/lib/strchr.S
@@ -24,3 +24,4 @@ ENTRY(strchr)
24 movne r0, #0 24 movne r0, #0
25 subeq r0, r0, #1 25 subeq r0, r0, #1
26 mov pc, lr 26 mov pc, lr
27ENDPROC(strchr)
diff --git a/arch/arm/lib/strncpy_from_user.S b/arch/arm/lib/strncpy_from_user.S
index 36e3741a3772..330373c26dd9 100644
--- a/arch/arm/lib/strncpy_from_user.S
+++ b/arch/arm/lib/strncpy_from_user.S
@@ -31,6 +31,7 @@ USER( ldrplbt r3, [r1], #1)
31 sub r1, r1, #1 @ take NUL character out of count 31 sub r1, r1, #1 @ take NUL character out of count
322: sub r0, r1, ip 322: sub r0, r1, ip
33 mov pc, lr 33 mov pc, lr
34ENDPROC(__strncpy_from_user)
34 35
35 .section .fixup,"ax" 36 .section .fixup,"ax"
36 .align 0 37 .align 0
diff --git a/arch/arm/lib/strnlen_user.S b/arch/arm/lib/strnlen_user.S
index 18d8fa4f925a..90bb9d020836 100644
--- a/arch/arm/lib/strnlen_user.S
+++ b/arch/arm/lib/strnlen_user.S
@@ -31,6 +31,7 @@ USER( ldrbt r3, [r0], #1)
31 add r0, r0, #1 31 add r0, r0, #1
322: sub r0, r0, r2 322: sub r0, r0, r2
33 mov pc, lr 33 mov pc, lr
34ENDPROC(__strnlen_user)
34 35
35 .section .fixup,"ax" 36 .section .fixup,"ax"
36 .align 0 37 .align 0
diff --git a/arch/arm/lib/strrchr.S b/arch/arm/lib/strrchr.S
index 538df220aa48..302f20cd2423 100644
--- a/arch/arm/lib/strrchr.S
+++ b/arch/arm/lib/strrchr.S
@@ -23,3 +23,4 @@ ENTRY(strrchr)
23 bne 1b 23 bne 1b
24 mov r0, r3 24 mov r0, r3
25 mov pc, lr 25 mov pc, lr
26ENDPROC(strrchr)
diff --git a/arch/arm/lib/testchangebit.S b/arch/arm/lib/testchangebit.S
index b25dcd2be53e..5c98dc567f0f 100644
--- a/arch/arm/lib/testchangebit.S
+++ b/arch/arm/lib/testchangebit.S
@@ -16,3 +16,5 @@ ENTRY(_test_and_change_bit_be)
16 eor r0, r0, #0x18 @ big endian byte ordering 16 eor r0, r0, #0x18 @ big endian byte ordering
17ENTRY(_test_and_change_bit_le) 17ENTRY(_test_and_change_bit_le)
18 testop eor, strb 18 testop eor, strb
19ENDPROC(_test_and_change_bit_be)
20ENDPROC(_test_and_change_bit_le)
diff --git a/arch/arm/lib/testclearbit.S b/arch/arm/lib/testclearbit.S
index 2dcc4b16b68e..543d7094d18e 100644
--- a/arch/arm/lib/testclearbit.S
+++ b/arch/arm/lib/testclearbit.S
@@ -16,3 +16,5 @@ ENTRY(_test_and_clear_bit_be)
16 eor r0, r0, #0x18 @ big endian byte ordering 16 eor r0, r0, #0x18 @ big endian byte ordering
17ENTRY(_test_and_clear_bit_le) 17ENTRY(_test_and_clear_bit_le)
18 testop bicne, strneb 18 testop bicne, strneb
19ENDPROC(_test_and_clear_bit_be)
20ENDPROC(_test_and_clear_bit_le)
diff --git a/arch/arm/lib/testsetbit.S b/arch/arm/lib/testsetbit.S
index 9011c969761a..0b3f390401ce 100644
--- a/arch/arm/lib/testsetbit.S
+++ b/arch/arm/lib/testsetbit.S
@@ -16,3 +16,5 @@ ENTRY(_test_and_set_bit_be)
16 eor r0, r0, #0x18 @ big endian byte ordering 16 eor r0, r0, #0x18 @ big endian byte ordering
17ENTRY(_test_and_set_bit_le) 17ENTRY(_test_and_set_bit_le)
18 testop orreq, streqb 18 testop orreq, streqb
19ENDPROC(_test_and_set_bit_be)
20ENDPROC(_test_and_set_bit_le)
diff --git a/arch/arm/lib/uaccess.S b/arch/arm/lib/uaccess.S
index b48bd6d5fd83..ffdd27498cee 100644
--- a/arch/arm/lib/uaccess.S
+++ b/arch/arm/lib/uaccess.S
@@ -277,6 +277,7 @@ USER( strgebt r3, [r0], #1) @ May fault
277 ldrgtb r3, [r1], #0 277 ldrgtb r3, [r1], #0
278USER( strgtbt r3, [r0], #1) @ May fault 278USER( strgtbt r3, [r0], #1) @ May fault
279 b .Lc2u_finished 279 b .Lc2u_finished
280ENDPROC(__copy_to_user)
280 281
281 .section .fixup,"ax" 282 .section .fixup,"ax"
282 .align 0 283 .align 0
@@ -542,6 +543,7 @@ USER( ldrgebt r3, [r1], #1) @ May fault
542USER( ldrgtbt r3, [r1], #1) @ May fault 543USER( ldrgtbt r3, [r1], #1) @ May fault
543 strgtb r3, [r0], #1 544 strgtb r3, [r0], #1
544 b .Lcfu_finished 545 b .Lcfu_finished
546ENDPROC(__copy_from_user)
545 547
546 .section .fixup,"ax" 548 .section .fixup,"ax"
547 .align 0 549 .align 0
diff --git a/arch/arm/lib/ucmpdi2.S b/arch/arm/lib/ucmpdi2.S
index f76de07ac182..f0df6a91db04 100644
--- a/arch/arm/lib/ucmpdi2.S
+++ b/arch/arm/lib/ucmpdi2.S
@@ -33,6 +33,8 @@ ENTRY(__ucmpdi2)
33 movhi r0, #2 33 movhi r0, #2
34 mov pc, lr 34 mov pc, lr
35 35
36ENDPROC(__ucmpdi2)
37
36#ifdef CONFIG_AEABI 38#ifdef CONFIG_AEABI
37 39
38ENTRY(__aeabi_ulcmp) 40ENTRY(__aeabi_ulcmp)
@@ -44,5 +46,7 @@ ENTRY(__aeabi_ulcmp)
44 movhi r0, #1 46 movhi r0, #1
45 mov pc, lr 47 mov pc, lr
46 48
49ENDPROC(__aeabi_ulcmp)
50
47#endif 51#endif
48 52
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index a048b92cb407..5aafb2e2ca7a 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -175,6 +175,15 @@ config MACH_SAM9_L9260
175 Select this if you are using Olimex's SAM9-L9260 board based on the Atmel AT91SAM9260. 175 Select this if you are using Olimex's SAM9-L9260 board based on the Atmel AT91SAM9260.
176 <http://www.olimex.com/dev/sam9-L9260.html> 176 <http://www.olimex.com/dev/sam9-L9260.html>
177 177
178config MACH_AFEB9260
179 bool "Custom afeb9260 board v1"
180 depends on ARCH_AT91SAM9260
181 help
182 Select this if you are using custom afeb9260 board based on
183 open hardware design. Select this for revision 1 of the board.
184 <svn://194.85.238.22/home/users/george/svn/arm9eb>
185 <http://groups.google.com/group/arm9fpga-evolution-board>
186
178config MACH_USB_A9260 187config MACH_USB_A9260
179 bool "CALAO USB-A9260" 188 bool "CALAO USB-A9260"
180 depends on ARCH_AT91SAM9260 189 depends on ARCH_AT91SAM9260
@@ -314,6 +323,19 @@ config AT91_PROGRAMMABLE_CLOCKS
314 Select this if you need to program one or more of the PCK0..PCK3 323 Select this if you need to program one or more of the PCK0..PCK3
315 programmable clock outputs. 324 programmable clock outputs.
316 325
326config AT91_SLOW_CLOCK
327 bool "Suspend-to-RAM disables main oscillator"
328 depends on SUSPEND
329 help
330 Select this if you want Suspend-to-RAM to save the most power
331 possible (without powering off the CPU) by disabling the PLLs
332 and main oscillator so that only the 32 KiHz clock is available.
333
334 When only that slow-clock is available, some peripherals lose
335 functionality. Many can't issue wakeup events unless faster
336 clocks are available. Some lose their operating state and
337 need to be completely re-initialized.
338
317config AT91_TIMER_HZ 339config AT91_TIMER_HZ
318 int "Kernel HZ (jiffies per second)" 340 int "Kernel HZ (jiffies per second)"
319 range 32 1024 341 range 32 1024
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 7d641f97516b..cca612d97ca2 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -39,6 +39,7 @@ obj-$(CONFIG_MACH_CAM60) += board-cam60.o
39obj-$(CONFIG_MACH_SAM9_L9260) += board-sam9-l9260.o 39obj-$(CONFIG_MACH_SAM9_L9260) += board-sam9-l9260.o
40obj-$(CONFIG_MACH_USB_A9260) += board-usb-a9260.o 40obj-$(CONFIG_MACH_USB_A9260) += board-usb-a9260.o
41obj-$(CONFIG_MACH_QIL_A9260) += board-qil-a9260.o 41obj-$(CONFIG_MACH_QIL_A9260) += board-qil-a9260.o
42obj-$(CONFIG_MACH_AFEB9260) += board-afeb-9260v1.o
42 43
43# AT91SAM9261 board-specific support 44# AT91SAM9261 board-specific support
44obj-$(CONFIG_MACH_AT91SAM9261EK) += board-sam9261ek.o 45obj-$(CONFIG_MACH_AT91SAM9261EK) += board-sam9261ek.o
@@ -64,6 +65,7 @@ obj-y += leds.o
64 65
65# Power Management 66# Power Management
66obj-$(CONFIG_PM) += pm.o 67obj-$(CONFIG_PM) += pm.o
68obj-$(CONFIG_AT91_SLOW_CLOCK) += pm_slowclock.o
67 69
68ifeq ($(CONFIG_PM_DEBUG),y) 70ifeq ($(CONFIG_PM_DEBUG),y)
69CFLAGS_pm.o += -DDEBUG 71CFLAGS_pm.o += -DDEBUG
diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c
index 638948c16770..0fc0adaebd58 100644
--- a/arch/arm/mach-at91/at91cap9.c
+++ b/arch/arm/mach-at91/at91cap9.c
@@ -141,8 +141,8 @@ static struct clk tcb_clk = {
141 .pmc_mask = 1 << AT91CAP9_ID_TCB, 141 .pmc_mask = 1 << AT91CAP9_ID_TCB,
142 .type = CLK_TYPE_PERIPHERAL, 142 .type = CLK_TYPE_PERIPHERAL,
143}; 143};
144static struct clk pwmc_clk = { 144static struct clk pwm_clk = {
145 .name = "pwmc_clk", 145 .name = "pwm_clk",
146 .pmc_mask = 1 << AT91CAP9_ID_PWMC, 146 .pmc_mask = 1 << AT91CAP9_ID_PWMC,
147 .type = CLK_TYPE_PERIPHERAL, 147 .type = CLK_TYPE_PERIPHERAL,
148}; 148};
@@ -207,7 +207,7 @@ static struct clk *periph_clocks[] __initdata = {
207 &ssc1_clk, 207 &ssc1_clk,
208 &ac97_clk, 208 &ac97_clk,
209 &tcb_clk, 209 &tcb_clk,
210 &pwmc_clk, 210 &pwm_clk,
211 &macb_clk, 211 &macb_clk,
212 &aestdes_clk, 212 &aestdes_clk,
213 &adc_clk, 213 &adc_clk,
diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c
index abb4aac8fa98..5ebd4273d353 100644
--- a/arch/arm/mach-at91/at91cap9_devices.c
+++ b/arch/arm/mach-at91/at91cap9_devices.c
@@ -719,6 +719,60 @@ static void __init at91_add_device_watchdog(void) {}
719 719
720 720
721/* -------------------------------------------------------------------- 721/* --------------------------------------------------------------------
722 * PWM
723 * --------------------------------------------------------------------*/
724
725#if defined(CONFIG_ATMEL_PWM)
726static u32 pwm_mask;
727
728static struct resource pwm_resources[] = {
729 [0] = {
730 .start = AT91CAP9_BASE_PWMC,
731 .end = AT91CAP9_BASE_PWMC + SZ_16K - 1,
732 .flags = IORESOURCE_MEM,
733 },
734 [1] = {
735 .start = AT91CAP9_ID_PWMC,
736 .end = AT91CAP9_ID_PWMC,
737 .flags = IORESOURCE_IRQ,
738 },
739};
740
741static struct platform_device at91cap9_pwm0_device = {
742 .name = "atmel_pwm",
743 .id = -1,
744 .dev = {
745 .platform_data = &pwm_mask,
746 },
747 .resource = pwm_resources,
748 .num_resources = ARRAY_SIZE(pwm_resources),
749};
750
751void __init at91_add_device_pwm(u32 mask)
752{
753 if (mask & (1 << AT91_PWM0))
754 at91_set_A_periph(AT91_PIN_PB19, 1); /* enable PWM0 */
755
756 if (mask & (1 << AT91_PWM1))
757 at91_set_B_periph(AT91_PIN_PB8, 1); /* enable PWM1 */
758
759 if (mask & (1 << AT91_PWM2))
760 at91_set_B_periph(AT91_PIN_PC29, 1); /* enable PWM2 */
761
762 if (mask & (1 << AT91_PWM3))
763 at91_set_B_periph(AT91_PIN_PA11, 1); /* enable PWM3 */
764
765 pwm_mask = mask;
766
767 platform_device_register(&at91cap9_pwm0_device);
768}
769#else
770void __init at91_add_device_pwm(u32 mask) {}
771#endif
772
773
774
775/* --------------------------------------------------------------------
722 * AC97 776 * AC97
723 * -------------------------------------------------------------------- */ 777 * -------------------------------------------------------------------- */
724 778
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index 80bfab5680e2..ada4b6769107 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -129,8 +129,8 @@ static struct clk tcb_clk = {
129 .pmc_mask = 1 << AT91SAM9263_ID_TCB, 129 .pmc_mask = 1 << AT91SAM9263_ID_TCB,
130 .type = CLK_TYPE_PERIPHERAL, 130 .type = CLK_TYPE_PERIPHERAL,
131}; 131};
132static struct clk pwmc_clk = { 132static struct clk pwm_clk = {
133 .name = "pwmc_clk", 133 .name = "pwm_clk",
134 .pmc_mask = 1 << AT91SAM9263_ID_PWMC, 134 .pmc_mask = 1 << AT91SAM9263_ID_PWMC,
135 .type = CLK_TYPE_PERIPHERAL, 135 .type = CLK_TYPE_PERIPHERAL,
136}; 136};
@@ -187,7 +187,7 @@ static struct clk *periph_clocks[] __initdata = {
187 &ssc1_clk, 187 &ssc1_clk,
188 &ac97_clk, 188 &ac97_clk,
189 &tcb_clk, 189 &tcb_clk,
190 &pwmc_clk, 190 &pwm_clk,
191 &macb_clk, 191 &macb_clk,
192 &twodge_clk, 192 &twodge_clk,
193 &udc_clk, 193 &udc_clk,
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index c93992f55dc9..8b884083f76d 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -886,6 +886,59 @@ static void __init at91_add_device_watchdog(void) {}
886 886
887 887
888/* -------------------------------------------------------------------- 888/* --------------------------------------------------------------------
889 * PWM
890 * --------------------------------------------------------------------*/
891
892#if defined(CONFIG_ATMEL_PWM)
893static u32 pwm_mask;
894
895static struct resource pwm_resources[] = {
896 [0] = {
897 .start = AT91SAM9263_BASE_PWMC,
898 .end = AT91SAM9263_BASE_PWMC + SZ_16K - 1,
899 .flags = IORESOURCE_MEM,
900 },
901 [1] = {
902 .start = AT91SAM9263_ID_PWMC,
903 .end = AT91SAM9263_ID_PWMC,
904 .flags = IORESOURCE_IRQ,
905 },
906};
907
908static struct platform_device at91sam9263_pwm0_device = {
909 .name = "atmel_pwm",
910 .id = -1,
911 .dev = {
912 .platform_data = &pwm_mask,
913 },
914 .resource = pwm_resources,
915 .num_resources = ARRAY_SIZE(pwm_resources),
916};
917
918void __init at91_add_device_pwm(u32 mask)
919{
920 if (mask & (1 << AT91_PWM0))
921 at91_set_B_periph(AT91_PIN_PB7, 1); /* enable PWM0 */
922
923 if (mask & (1 << AT91_PWM1))
924 at91_set_B_periph(AT91_PIN_PB8, 1); /* enable PWM1 */
925
926 if (mask & (1 << AT91_PWM2))
927 at91_set_B_periph(AT91_PIN_PC29, 1); /* enable PWM2 */
928
929 if (mask & (1 << AT91_PWM3))
930 at91_set_B_periph(AT91_PIN_PB29, 1); /* enable PWM3 */
931
932 pwm_mask = mask;
933
934 platform_device_register(&at91sam9263_pwm0_device);
935}
936#else
937void __init at91_add_device_pwm(u32 mask) {}
938#endif
939
940
941/* --------------------------------------------------------------------
889 * SSC -- Synchronous Serial Controller 942 * SSC -- Synchronous Serial Controller
890 * -------------------------------------------------------------------- */ 943 * -------------------------------------------------------------------- */
891 944
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index 556bddf35b45..252e954b49fd 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -131,8 +131,8 @@ static struct clk tc2_clk = {
131 .pmc_mask = 1 << AT91SAM9RL_ID_TC2, 131 .pmc_mask = 1 << AT91SAM9RL_ID_TC2,
132 .type = CLK_TYPE_PERIPHERAL, 132 .type = CLK_TYPE_PERIPHERAL,
133}; 133};
134static struct clk pwmc_clk = { 134static struct clk pwm_clk = {
135 .name = "pwmc_clk", 135 .name = "pwm_clk",
136 .pmc_mask = 1 << AT91SAM9RL_ID_PWMC, 136 .pmc_mask = 1 << AT91SAM9RL_ID_PWMC,
137 .type = CLK_TYPE_PERIPHERAL, 137 .type = CLK_TYPE_PERIPHERAL,
138}; 138};
@@ -180,7 +180,7 @@ static struct clk *periph_clocks[] __initdata = {
180 &tc0_clk, 180 &tc0_clk,
181 &tc1_clk, 181 &tc1_clk,
182 &tc2_clk, 182 &tc2_clk,
183 &pwmc_clk, 183 &pwm_clk,
184 &tsc_clk, 184 &tsc_clk,
185 &dma_clk, 185 &dma_clk,
186 &udphs_clk, 186 &udphs_clk,
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index 620886341fb5..87deb1e1b529 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -527,6 +527,51 @@ static void __init at91_add_device_tc(void) { }
527 527
528 528
529/* -------------------------------------------------------------------- 529/* --------------------------------------------------------------------
530 * Touchscreen
531 * -------------------------------------------------------------------- */
532
533#if defined(CONFIG_TOUCHSCREEN_ATMEL_TSADCC) || defined(CONFIG_TOUCHSCREEN_ATMEL_TSADCC_MODULE)
534static u64 tsadcc_dmamask = DMA_BIT_MASK(32);
535
536static struct resource tsadcc_resources[] = {
537 [0] = {
538 .start = AT91SAM9RL_BASE_TSC,
539 .end = AT91SAM9RL_BASE_TSC + SZ_16K - 1,
540 .flags = IORESOURCE_MEM,
541 },
542 [1] = {
543 .start = AT91SAM9RL_ID_TSC,
544 .end = AT91SAM9RL_ID_TSC,
545 .flags = IORESOURCE_IRQ,
546 }
547};
548
549static struct platform_device at91sam9rl_tsadcc_device = {
550 .name = "atmel_tsadcc",
551 .id = -1,
552 .dev = {
553 .dma_mask = &tsadcc_dmamask,
554 .coherent_dma_mask = DMA_BIT_MASK(32),
555 },
556 .resource = tsadcc_resources,
557 .num_resources = ARRAY_SIZE(tsadcc_resources),
558};
559
560void __init at91_add_device_tsadcc(void)
561{
562 at91_set_A_periph(AT91_PIN_PA17, 0); /* AD0_XR */
563 at91_set_A_periph(AT91_PIN_PA18, 0); /* AD1_XL */
564 at91_set_A_periph(AT91_PIN_PA19, 0); /* AD2_YT */
565 at91_set_A_periph(AT91_PIN_PA20, 0); /* AD3_TB */
566
567 platform_device_register(&at91sam9rl_tsadcc_device);
568}
569#else
570void __init at91_add_device_tsadcc(void) {}
571#endif
572
573
574/* --------------------------------------------------------------------
530 * RTC 575 * RTC
531 * -------------------------------------------------------------------- */ 576 * -------------------------------------------------------------------- */
532 577
@@ -592,6 +637,59 @@ static void __init at91_add_device_watchdog(void) {}
592 637
593 638
594/* -------------------------------------------------------------------- 639/* --------------------------------------------------------------------
640 * PWM
641 * --------------------------------------------------------------------*/
642
643#if defined(CONFIG_ATMEL_PWM)
644static u32 pwm_mask;
645
646static struct resource pwm_resources[] = {
647 [0] = {
648 .start = AT91SAM9RL_BASE_PWMC,
649 .end = AT91SAM9RL_BASE_PWMC + SZ_16K - 1,
650 .flags = IORESOURCE_MEM,
651 },
652 [1] = {
653 .start = AT91SAM9RL_ID_PWMC,
654 .end = AT91SAM9RL_ID_PWMC,
655 .flags = IORESOURCE_IRQ,
656 },
657};
658
659static struct platform_device at91sam9rl_pwm0_device = {
660 .name = "atmel_pwm",
661 .id = -1,
662 .dev = {
663 .platform_data = &pwm_mask,
664 },
665 .resource = pwm_resources,
666 .num_resources = ARRAY_SIZE(pwm_resources),
667};
668
669void __init at91_add_device_pwm(u32 mask)
670{
671 if (mask & (1 << AT91_PWM0))
672 at91_set_B_periph(AT91_PIN_PB8, 1); /* enable PWM0 */
673
674 if (mask & (1 << AT91_PWM1))
675 at91_set_B_periph(AT91_PIN_PB9, 1); /* enable PWM1 */
676
677 if (mask & (1 << AT91_PWM2))
678 at91_set_B_periph(AT91_PIN_PD5, 1); /* enable PWM2 */
679
680 if (mask & (1 << AT91_PWM3))
681 at91_set_B_periph(AT91_PIN_PD8, 1); /* enable PWM3 */
682
683 pwm_mask = mask;
684
685 platform_device_register(&at91sam9rl_pwm0_device);
686}
687#else
688void __init at91_add_device_pwm(u32 mask) {}
689#endif
690
691
692/* --------------------------------------------------------------------
595 * SSC -- Synchronous Serial Controller 693 * SSC -- Synchronous Serial Controller
596 * -------------------------------------------------------------------- */ 694 * -------------------------------------------------------------------- */
597 695
diff --git a/arch/arm/mach-at91/at91x40_time.c b/arch/arm/mach-at91/at91x40_time.c
index 869b5e28d195..dfff2895f4b2 100644
--- a/arch/arm/mach-at91/at91x40_time.c
+++ b/arch/arm/mach-at91/at91x40_time.c
@@ -23,8 +23,8 @@
23#include <linux/interrupt.h> 23#include <linux/interrupt.h>
24#include <linux/irq.h> 24#include <linux/irq.h>
25#include <linux/time.h> 25#include <linux/time.h>
26#include <linux/io.h>
26#include <mach/hardware.h> 27#include <mach/hardware.h>
27#include <asm/io.h>
28#include <asm/mach/time.h> 28#include <asm/mach/time.h>
29#include <mach/at91_tc.h> 29#include <mach/at91_tc.h>
30 30
diff --git a/arch/arm/mach-at91/board-afeb-9260v1.c b/arch/arm/mach-at91/board-afeb-9260v1.c
new file mode 100644
index 000000000000..9c040c78889a
--- /dev/null
+++ b/arch/arm/mach-at91/board-afeb-9260v1.c
@@ -0,0 +1,210 @@
1/*
2 * linux/arch/arm/mach-at91/board-afeb-9260v1.c
3 *
4 * Copyright (C) 2005 SAN People
5 * Copyright (C) 2006 Atmel
6 * Copyright (C) 2008 Sergey Lapin
7 *
8 * A custom board designed as open hardware; PCBs and various information
9 * is available at http://groups.google.com/group/arm9fpga-evolution-board/
10 * Subversion repository: svn://194.85.238.22/home/users/george/svn/arm9eb
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
27#include <linux/types.h>
28#include <linux/init.h>
29#include <linux/mm.h>
30#include <linux/module.h>
31#include <linux/platform_device.h>
32#include <linux/spi/spi.h>
33#include <linux/clk.h>
34#include <linux/dma-mapping.h>
35
36#include <mach/hardware.h>
37#include <asm/setup.h>
38#include <asm/mach-types.h>
39#include <asm/irq.h>
40
41#include <asm/mach/arch.h>
42#include <asm/mach/map.h>
43#include <asm/mach/irq.h>
44
45#include <mach/board.h>
46#include <mach/gpio.h>
47
48#include "generic.h"
49
50
51static void __init afeb9260_map_io(void)
52{
53 /* Initialize processor: 18.432 MHz crystal */
54 at91sam9260_initialize(18432000);
55
56 /* DGBU on ttyS0. (Rx & Tx only) */
57 at91_register_uart(0, 0, 0);
58
59 /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
60 at91_register_uart(AT91SAM9260_ID_US0, 1,
61 ATMEL_UART_CTS | ATMEL_UART_RTS
62 | ATMEL_UART_DTR | ATMEL_UART_DSR
63 | ATMEL_UART_DCD | ATMEL_UART_RI);
64
65 /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
66 at91_register_uart(AT91SAM9260_ID_US1, 2,
67 ATMEL_UART_CTS | ATMEL_UART_RTS);
68
69 /* set serial console to ttyS0 (ie, DBGU) */
70 at91_set_serial_console(0);
71}
72
73static void __init afeb9260_init_irq(void)
74{
75 at91sam9260_init_interrupts(NULL);
76}
77
78
79/*
80 * USB Host port
81 */
82static struct at91_usbh_data __initdata afeb9260_usbh_data = {
83 .ports = 1,
84};
85
86/*
87 * USB Device port
88 */
89static struct at91_udc_data __initdata afeb9260_udc_data = {
90 .vbus_pin = AT91_PIN_PC5,
91 .pullup_pin = 0, /* pull-up driven by UDC */
92};
93
94
95
96/*
97 * SPI devices.
98 */
99static struct spi_board_info afeb9260_spi_devices[] = {
100 { /* DataFlash chip */
101 .modalias = "mtd_dataflash",
102 .chip_select = 1,
103 .max_speed_hz = 15 * 1000 * 1000,
104 .bus_num = 0,
105 },
106};
107
108
109/*
110 * MACB Ethernet device
111 */
112static struct at91_eth_data __initdata afeb9260_macb_data = {
113 .phy_irq_pin = AT91_PIN_PA9,
114 .is_rmii = 0,
115};
116
117
118/*
119 * NAND flash
120 */
121static struct mtd_partition __initdata afeb9260_nand_partition[] = {
122 {
123 .name = "bootloader",
124 .offset = 0,
125 .size = (640 * SZ_1K),
126 },
127 {
128 .name = "kernel",
129 .offset = MTDPART_OFS_NXTBLK,
130 .size = SZ_2M,
131 },
132 {
133 .name = "rootfs",
134 .offset = MTDPART_OFS_NXTBLK,
135 .size = MTDPART_SIZ_FULL,
136 },
137};
138
139static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
140{
141 *num_partitions = ARRAY_SIZE(afeb9260_nand_partition);
142 return afeb9260_nand_partition;
143}
144
145static struct atmel_nand_data __initdata afeb9260_nand_data = {
146 .ale = 21,
147 .cle = 22,
148 .rdy_pin = AT91_PIN_PC13,
149 .enable_pin = AT91_PIN_PC14,
150 .partition_info = nand_partitions,
151 .bus_width_16 = 0,
152};
153
154
155/*
156 * MCI (SD/MMC)
157 */
158static struct at91_mmc_data __initdata afeb9260_mmc_data = {
159 .slot_b = 1,
160 .wire4 = 1,
161};
162
163
164
165static struct i2c_board_info __initdata afeb9260_i2c_devices[] = {
166 {
167 I2C_BOARD_INFO("fm3130", 0x68),
168 I2C_BOARD_INFO("24c64", 0x50),
169 },
170};
171
172static void __init afeb9260_board_init(void)
173{
174 /* Serial */
175 at91_add_device_serial();
176 /* USB Host */
177 at91_add_device_usbh(&afeb9260_usbh_data);
178 /* USB Device */
179 at91_add_device_udc(&afeb9260_udc_data);
180 /* SPI */
181 at91_add_device_spi(afeb9260_spi_devices,
182 ARRAY_SIZE(afeb9260_spi_devices));
183 /* NAND */
184 at91_add_device_nand(&afeb9260_nand_data);
185 /* Ethernet */
186 at91_add_device_eth(&afeb9260_macb_data);
187
188 /* Standard function's pin assignments are not
189 * appropriate for us and generic code provide
190 * no API to configure these pins any other way */
191 at91_set_B_periph(AT91_PIN_PA10, 0); /* ETX2 */
192 at91_set_B_periph(AT91_PIN_PA11, 0); /* ETX3 */
193 /* MMC */
194 at91_add_device_mmc(0, &afeb9260_mmc_data);
195 /* I2C */
196 at91_add_device_i2c(afeb9260_i2c_devices,
197 ARRAY_SIZE(afeb9260_i2c_devices));
198}
199
200MACHINE_START(AFEB9260, "Custom afeb9260 board")
201 /* Maintainer: Sergey Lapin <slapin@ossfans.org> */
202 .phys_io = AT91_BASE_SYS,
203 .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
204 .boot_params = AT91_SDRAM_BASE + 0x100,
205 .timer = &at91sam926x_timer,
206 .map_io = afeb9260_map_io,
207 .init_irq = afeb9260_init_irq,
208 .init_machine = afeb9260_board_init,
209MACHINE_END
210
diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c
index 196199552eb6..201b89392dcc 100644
--- a/arch/arm/mach-at91/board-cap9adk.c
+++ b/arch/arm/mach-at91/board-cap9adk.c
@@ -214,7 +214,7 @@ static struct physmap_flash_data cap9adk_nor_data = {
214}; 214};
215 215
216#define NOR_BASE AT91_CHIPSELECT_0 216#define NOR_BASE AT91_CHIPSELECT_0
217#define NOR_SIZE 0x800000 217#define NOR_SIZE SZ_8M
218 218
219static struct resource nor_flash_resources[] = { 219static struct resource nor_flash_resources[] = {
220 { 220 {
diff --git a/arch/arm/mach-at91/board-carmeva.c b/arch/arm/mach-at91/board-carmeva.c
index afa1ff0e9577..db1f9544d2e0 100644
--- a/arch/arm/mach-at91/board-carmeva.c
+++ b/arch/arm/mach-at91/board-carmeva.c
@@ -25,7 +25,6 @@
25#include <linux/module.h> 25#include <linux/module.h>
26#include <linux/platform_device.h> 26#include <linux/platform_device.h>
27 27
28#include <mach/hardware.h>
29#include <asm/setup.h> 28#include <asm/setup.h>
30#include <asm/mach-types.h> 29#include <asm/mach-types.h>
31#include <asm/irq.h> 30#include <asm/irq.h>
@@ -34,6 +33,7 @@
34#include <asm/mach/map.h> 33#include <asm/mach/map.h>
35#include <asm/mach/irq.h> 34#include <asm/mach/irq.h>
36 35
36#include <mach/hardware.h>
37#include <mach/board.h> 37#include <mach/board.h>
38#include <mach/gpio.h> 38#include <mach/gpio.h>
39 39
@@ -114,6 +114,30 @@ static struct spi_board_info carmeva_spi_devices[] = {
114 }, 114 },
115}; 115};
116 116
117static struct gpio_led carmeva_leds[] = {
118 { /* "user led 1", LED9 */
119 .name = "led9",
120 .gpio = AT91_PIN_PA21,
121 .active_low = 1,
122 .default_trigger = "heartbeat",
123 },
124 { /* "user led 2", LED10 */
125 .name = "led10",
126 .gpio = AT91_PIN_PA25,
127 .active_low = 1,
128 },
129 { /* "user led 3", LED11 */
130 .name = "led11",
131 .gpio = AT91_PIN_PA26,
132 .active_low = 1,
133 },
134 { /* "user led 4", LED12 */
135 .name = "led12",
136 .gpio = AT91_PIN_PA18,
137 .active_low = 1,
138 }
139};
140
117static void __init carmeva_board_init(void) 141static void __init carmeva_board_init(void)
118{ 142{
119 /* Serial */ 143 /* Serial */
@@ -132,6 +156,8 @@ static void __init carmeva_board_init(void)
132// at91_add_device_cf(&carmeva_cf_data); 156// at91_add_device_cf(&carmeva_cf_data);
133 /* MMC */ 157 /* MMC */
134 at91_add_device_mmc(0, &carmeva_mmc_data); 158 at91_add_device_mmc(0, &carmeva_mmc_data);
159 /* LEDs */
160 at91_gpio_leds(carmeva_leds, ARRAY_SIZE(carmeva_leds));
135} 161}
136 162
137MACHINE_START(CARMEVA, "Carmeva") 163MACHINE_START(CARMEVA, "Carmeva")
diff --git a/arch/arm/mach-at91/board-csb337.c b/arch/arm/mach-at91/board-csb337.c
index cb7c9a8fa487..fea2529ebcf9 100644
--- a/arch/arm/mach-at91/board-csb337.c
+++ b/arch/arm/mach-at91/board-csb337.c
@@ -28,7 +28,6 @@
28#include <linux/input.h> 28#include <linux/input.h>
29#include <linux/gpio_keys.h> 29#include <linux/gpio_keys.h>
30 30
31#include <mach/hardware.h>
32#include <asm/setup.h> 31#include <asm/setup.h>
33#include <asm/mach-types.h> 32#include <asm/mach-types.h>
34#include <asm/irq.h> 33#include <asm/irq.h>
@@ -37,6 +36,7 @@
37#include <asm/mach/map.h> 36#include <asm/mach/map.h>
38#include <asm/mach/irq.h> 37#include <asm/mach/irq.h>
39 38
39#include <mach/hardware.h>
40#include <mach/board.h> 40#include <mach/board.h>
41#include <mach/gpio.h> 41#include <mach/gpio.h>
42 42
@@ -114,7 +114,7 @@ static struct spi_board_info csb337_spi_devices[] = {
114}; 114};
115 115
116#define CSB_FLASH_BASE AT91_CHIPSELECT_0 116#define CSB_FLASH_BASE AT91_CHIPSELECT_0
117#define CSB_FLASH_SIZE 0x800000 117#define CSB_FLASH_SIZE SZ_8M
118 118
119static struct mtd_partition csb_flash_partitions[] = { 119static struct mtd_partition csb_flash_partitions[] = {
120 { 120 {
@@ -193,11 +193,11 @@ static struct platform_device csb300_button_device = {
193 193
194static void __init csb300_add_device_buttons(void) 194static void __init csb300_add_device_buttons(void)
195{ 195{
196 at91_set_gpio_input(AT91_PIN_PB29, 0); /* sw0 */ 196 at91_set_gpio_input(AT91_PIN_PB29, 1); /* sw0 */
197 at91_set_deglitch(AT91_PIN_PB29, 1); 197 at91_set_deglitch(AT91_PIN_PB29, 1);
198 at91_set_gpio_input(AT91_PIN_PB28, 0); /* sw1 */ 198 at91_set_gpio_input(AT91_PIN_PB28, 1); /* sw1 */
199 at91_set_deglitch(AT91_PIN_PB28, 1); 199 at91_set_deglitch(AT91_PIN_PB28, 1);
200 at91_set_gpio_input(AT91_PIN_PA21, 0); /* sw2 */ 200 at91_set_gpio_input(AT91_PIN_PA21, 1); /* sw2 */
201 at91_set_deglitch(AT91_PIN_PA21, 1); 201 at91_set_deglitch(AT91_PIN_PA21, 1);
202 202
203 platform_device_register(&csb300_button_device); 203 platform_device_register(&csb300_button_device);
@@ -224,7 +224,7 @@ static struct gpio_led csb_leds[] = {
224 .gpio = AT91_PIN_PB0, 224 .gpio = AT91_PIN_PB0,
225 .active_low = 1, 225 .active_low = 1,
226 .default_trigger = "ide-disk", 226 .default_trigger = "ide-disk",
227 }, 227 }
228}; 228};
229 229
230 230
diff --git a/arch/arm/mach-at91/board-csb637.c b/arch/arm/mach-at91/board-csb637.c
index 8db8bd8babd9..cfa3f04b2205 100644
--- a/arch/arm/mach-at91/board-csb637.c
+++ b/arch/arm/mach-at91/board-csb637.c
@@ -25,7 +25,6 @@
25#include <linux/platform_device.h> 25#include <linux/platform_device.h>
26#include <linux/mtd/physmap.h> 26#include <linux/mtd/physmap.h>
27 27
28#include <mach/hardware.h>
29#include <asm/setup.h> 28#include <asm/setup.h>
30#include <asm/mach-types.h> 29#include <asm/mach-types.h>
31#include <asm/irq.h> 30#include <asm/irq.h>
@@ -34,6 +33,7 @@
34#include <asm/mach/map.h> 33#include <asm/mach/map.h>
35#include <asm/mach/irq.h> 34#include <asm/mach/irq.h>
36 35
36#include <mach/hardware.h>
37#include <mach/board.h> 37#include <mach/board.h>
38#include <mach/gpio.h> 38#include <mach/gpio.h>
39 39
@@ -72,7 +72,7 @@ static struct at91_udc_data __initdata csb637_udc_data = {
72}; 72};
73 73
74#define CSB_FLASH_BASE AT91_CHIPSELECT_0 74#define CSB_FLASH_BASE AT91_CHIPSELECT_0
75#define CSB_FLASH_SIZE 0x1000000 75#define CSB_FLASH_SIZE SZ_16M
76 76
77static struct mtd_partition csb_flash_partitions[] = { 77static struct mtd_partition csb_flash_partitions[] = {
78 { 78 {
diff --git a/arch/arm/mach-at91/board-dk.c b/arch/arm/mach-at91/board-dk.c
index 43e1aa7ecef7..0fd0f5bc77ea 100644
--- a/arch/arm/mach-at91/board-dk.c
+++ b/arch/arm/mach-at91/board-dk.c
@@ -29,7 +29,6 @@
29#include <linux/spi/spi.h> 29#include <linux/spi/spi.h>
30#include <linux/mtd/physmap.h> 30#include <linux/mtd/physmap.h>
31 31
32#include <mach/hardware.h>
33#include <asm/setup.h> 32#include <asm/setup.h>
34#include <asm/mach-types.h> 33#include <asm/mach-types.h>
35#include <asm/irq.h> 34#include <asm/irq.h>
@@ -38,6 +37,7 @@
38#include <asm/mach/map.h> 37#include <asm/mach/map.h>
39#include <asm/mach/irq.h> 38#include <asm/mach/irq.h>
40 39
40#include <mach/hardware.h>
41#include <mach/board.h> 41#include <mach/board.h>
42#include <mach/gpio.h> 42#include <mach/gpio.h>
43#include <mach/at91rm9200_mc.h> 43#include <mach/at91rm9200_mc.h>
@@ -157,7 +157,7 @@ static struct atmel_nand_data __initdata dk_nand_data = {
157}; 157};
158 158
159#define DK_FLASH_BASE AT91_CHIPSELECT_0 159#define DK_FLASH_BASE AT91_CHIPSELECT_0
160#define DK_FLASH_SIZE 0x200000 160#define DK_FLASH_SIZE SZ_2M
161 161
162static struct physmap_flash_data dk_flash_data = { 162static struct physmap_flash_data dk_flash_data = {
163 .width = 2, 163 .width = 2,
diff --git a/arch/arm/mach-at91/board-ecbat91.c b/arch/arm/mach-at91/board-ecbat91.c
index bfeee8a2af28..1d69908617f0 100644
--- a/arch/arm/mach-at91/board-ecbat91.c
+++ b/arch/arm/mach-at91/board-ecbat91.c
@@ -86,7 +86,7 @@ static struct mtd_partition __initdata my_flash0_partitions[] =
86 { /* 0x8400 */ 86 { /* 0x8400 */
87 .name = "Darrell-loader", 87 .name = "Darrell-loader",
88 .offset = 0, 88 .offset = 0,
89 .size = 12* 1056, 89 .size = 12 * 1056,
90 }, 90 },
91 { 91 {
92 .name = "U-boot", 92 .name = "U-boot",
diff --git a/arch/arm/mach-at91/board-ek.c b/arch/arm/mach-at91/board-ek.c
index 60626e7a3490..4cdfaac8e590 100644
--- a/arch/arm/mach-at91/board-ek.c
+++ b/arch/arm/mach-at91/board-ek.c
@@ -29,7 +29,6 @@
29#include <linux/spi/spi.h> 29#include <linux/spi/spi.h>
30#include <linux/mtd/physmap.h> 30#include <linux/mtd/physmap.h>
31 31
32#include <mach/hardware.h>
33#include <asm/setup.h> 32#include <asm/setup.h>
34#include <asm/mach-types.h> 33#include <asm/mach-types.h>
35#include <asm/irq.h> 34#include <asm/irq.h>
@@ -38,6 +37,7 @@
38#include <asm/mach/map.h> 37#include <asm/mach/map.h>
39#include <asm/mach/irq.h> 38#include <asm/mach/irq.h>
40 39
40#include <mach/hardware.h>
41#include <mach/board.h> 41#include <mach/board.h>
42#include <mach/gpio.h> 42#include <mach/gpio.h>
43#include <mach/at91rm9200_mc.h> 43#include <mach/at91rm9200_mc.h>
@@ -116,7 +116,7 @@ static struct i2c_board_info __initdata ek_i2c_devices[] = {
116}; 116};
117 117
118#define EK_FLASH_BASE AT91_CHIPSELECT_0 118#define EK_FLASH_BASE AT91_CHIPSELECT_0
119#define EK_FLASH_SIZE 0x200000 119#define EK_FLASH_SIZE SZ_2M
120 120
121static struct physmap_flash_data ek_flash_data = { 121static struct physmap_flash_data ek_flash_data = {
122 .width = 2, 122 .width = 2,
diff --git a/arch/arm/mach-at91/board-picotux200.c b/arch/arm/mach-at91/board-picotux200.c
index dbc912d633c7..859727e7ea30 100644
--- a/arch/arm/mach-at91/board-picotux200.c
+++ b/arch/arm/mach-at91/board-picotux200.c
@@ -105,7 +105,7 @@ static struct at91_mmc_data __initdata picotux200_mmc_data = {
105// }; 105// };
106 106
107#define PICOTUX200_FLASH_BASE AT91_CHIPSELECT_0 107#define PICOTUX200_FLASH_BASE AT91_CHIPSELECT_0
108#define PICOTUX200_FLASH_SIZE 0x400000 108#define PICOTUX200_FLASH_SIZE SZ_4M
109 109
110static struct physmap_flash_data picotux200_flash_data = { 110static struct physmap_flash_data picotux200_flash_data = {
111 .width = 2, 111 .width = 2,
diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c
index 4c28413426c2..cfb4571a2e27 100644
--- a/arch/arm/mach-at91/board-qil-a9260.c
+++ b/arch/arm/mach-at91/board-qil-a9260.c
@@ -30,7 +30,6 @@
30#include <linux/input.h> 30#include <linux/input.h>
31#include <linux/clk.h> 31#include <linux/clk.h>
32 32
33#include <mach/hardware.h>
34#include <asm/setup.h> 33#include <asm/setup.h>
35#include <asm/mach-types.h> 34#include <asm/mach-types.h>
36#include <asm/irq.h> 35#include <asm/irq.h>
@@ -39,6 +38,7 @@
39#include <asm/mach/map.h> 38#include <asm/mach/map.h>
40#include <asm/mach/irq.h> 39#include <asm/mach/irq.h>
41 40
41#include <mach/hardware.h>
42#include <mach/board.h> 42#include <mach/board.h>
43#include <mach/gpio.h> 43#include <mach/gpio.h>
44#include <mach/at91_shdwc.h> 44#include <mach/at91_shdwc.h>
@@ -119,18 +119,18 @@ static struct at91_eth_data __initdata ek_macb_data = {
119static struct mtd_partition __initdata ek_nand_partition[] = { 119static struct mtd_partition __initdata ek_nand_partition[] = {
120 { 120 {
121 .name = "Uboot & Kernel", 121 .name = "Uboot & Kernel",
122 .offset = 0x00000000, 122 .offset = 0,
123 .size = 16 * 1024 * 1024, 123 .size = SZ_16M,
124 }, 124 },
125 { 125 {
126 .name = "Root FS", 126 .name = "Root FS",
127 .offset = 0x01000000, 127 .offset = MTDPART_OFS_NXTBLK,
128 .size = 120 * 1024 * 1024, 128 .size = 120 * SZ_1M,
129 }, 129 },
130 { 130 {
131 .name = "FS", 131 .name = "FS",
132 .offset = 0x08800000, 132 .offset = MTDPART_OFS_NXTBLK,
133 .size = 120 * 1024 * 1024, 133 .size = 120 * SZ_1M,
134 }, 134 },
135}; 135};
136 136
diff --git a/arch/arm/mach-at91/board-sam9-l9260.c b/arch/arm/mach-at91/board-sam9-l9260.c
index e4910cb26c16..99bb4cc23a09 100644
--- a/arch/arm/mach-at91/board-sam9-l9260.c
+++ b/arch/arm/mach-at91/board-sam9-l9260.c
@@ -126,11 +126,11 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
126 { 126 {
127 .name = "Bootloader Area", 127 .name = "Bootloader Area",
128 .offset = 0, 128 .offset = 0,
129 .size = 10 * 1024 * 1024, 129 .size = 10 * SZ_1M,
130 }, 130 },
131 { 131 {
132 .name = "User Area", 132 .name = "User Area",
133 .offset = 10 * 1024 * 1024, 133 .offset = MTDPART_OFS_NXTBLK,
134 .size = MTDPART_SIZ_FULL, 134 .size = MTDPART_SIZ_FULL,
135 }, 135 },
136}; 136};
diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c
index cb20e70b3b06..b49eb6e4918a 100644
--- a/arch/arm/mach-at91/board-sam9260ek.c
+++ b/arch/arm/mach-at91/board-sam9260ek.c
@@ -27,8 +27,10 @@
27#include <linux/spi/spi.h> 27#include <linux/spi/spi.h>
28#include <linux/spi/at73c213.h> 28#include <linux/spi/at73c213.h>
29#include <linux/clk.h> 29#include <linux/clk.h>
30#include <linux/i2c/at24.h>
31#include <linux/gpio_keys.h>
32#include <linux/input.h>
30 33
31#include <mach/hardware.h>
32#include <asm/setup.h> 34#include <asm/setup.h>
33#include <asm/mach-types.h> 35#include <asm/mach-types.h>
34#include <asm/irq.h> 36#include <asm/irq.h>
@@ -37,6 +39,7 @@
37#include <asm/mach/map.h> 39#include <asm/mach/map.h>
38#include <asm/mach/irq.h> 40#include <asm/mach/irq.h>
39 41
42#include <mach/hardware.h>
40#include <mach/board.h> 43#include <mach/board.h>
41#include <mach/gpio.h> 44#include <mach/gpio.h>
42 45
@@ -163,11 +166,11 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
163 { 166 {
164 .name = "Partition 1", 167 .name = "Partition 1",
165 .offset = 0, 168 .offset = 0,
166 .size = 256 * 1024, 169 .size = SZ_256K,
167 }, 170 },
168 { 171 {
169 .name = "Partition 2", 172 .name = "Partition 2",
170 .offset = 256 * 1024, 173 .offset = MTDPART_OFS_NXTBLK,
171 .size = MTDPART_SIZ_FULL, 174 .size = MTDPART_SIZ_FULL,
172 }, 175 },
173}; 176};
@@ -222,6 +225,73 @@ static struct gpio_led ek_leds[] = {
222 } 225 }
223}; 226};
224 227
228/*
229 * I2C devices
230 */
231static struct at24_platform_data at24c512 = {
232 .byte_len = SZ_512K / 8,
233 .page_size = 128,
234 .flags = AT24_FLAG_ADDR16,
235};
236
237static struct i2c_board_info __initdata ek_i2c_devices[] = {
238 {
239 I2C_BOARD_INFO("24c512", 0x50),
240 .platform_data = &at24c512,
241 },
242 /* more devices can be added using expansion connectors */
243};
244
245
246/*
247 * GPIO Buttons
248 */
249#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
250static struct gpio_keys_button ek_buttons[] = {
251 {
252 .gpio = AT91_PIN_PA30,
253 .code = BTN_3,
254 .desc = "Button 3",
255 .active_low = 1,
256 .wakeup = 1,
257 },
258 {
259 .gpio = AT91_PIN_PA31,
260 .code = BTN_4,
261 .desc = "Button 4",
262 .active_low = 1,
263 .wakeup = 1,
264 }
265};
266
267static struct gpio_keys_platform_data ek_button_data = {
268 .buttons = ek_buttons,
269 .nbuttons = ARRAY_SIZE(ek_buttons),
270};
271
272static struct platform_device ek_button_device = {
273 .name = "gpio-keys",
274 .id = -1,
275 .num_resources = 0,
276 .dev = {
277 .platform_data = &ek_button_data,
278 }
279};
280
281static void __init ek_add_device_buttons(void)
282{
283 at91_set_gpio_input(AT91_PIN_PA30, 1); /* btn3 */
284 at91_set_deglitch(AT91_PIN_PA30, 1);
285 at91_set_gpio_input(AT91_PIN_PA31, 1); /* btn4 */
286 at91_set_deglitch(AT91_PIN_PA31, 1);
287
288 platform_device_register(&ek_button_device);
289}
290#else
291static void __init ek_add_device_buttons(void) {}
292#endif
293
294
225static void __init ek_board_init(void) 295static void __init ek_board_init(void)
226{ 296{
227 /* Serial */ 297 /* Serial */
@@ -239,12 +309,14 @@ static void __init ek_board_init(void)
239 /* MMC */ 309 /* MMC */
240 at91_add_device_mmc(0, &ek_mmc_data); 310 at91_add_device_mmc(0, &ek_mmc_data);
241 /* I2C */ 311 /* I2C */
242 at91_add_device_i2c(NULL, 0); 312 at91_add_device_i2c(ek_i2c_devices, ARRAY_SIZE(ek_i2c_devices));
243 /* SSC (to AT73C213) */ 313 /* SSC (to AT73C213) */
244 at73c213_set_clk(&at73c213_data); 314 at73c213_set_clk(&at73c213_data);
245 at91_add_device_ssc(AT91SAM9260_ID_SSC, ATMEL_SSC_TX); 315 at91_add_device_ssc(AT91SAM9260_ID_SSC, ATMEL_SSC_TX);
246 /* LEDs */ 316 /* LEDs */
247 at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds)); 317 at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
318 /* Push Buttons */
319 ek_add_device_buttons();
248} 320}
249 321
250MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK") 322MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK")
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c
index 1a9963b811c7..4977409d4fc6 100644
--- a/arch/arm/mach-at91/board-sam9261ek.c
+++ b/arch/arm/mach-at91/board-sam9261ek.c
@@ -35,7 +35,6 @@
35 35
36#include <video/atmel_lcdc.h> 36#include <video/atmel_lcdc.h>
37 37
38#include <mach/hardware.h>
39#include <asm/setup.h> 38#include <asm/setup.h>
40#include <asm/mach-types.h> 39#include <asm/mach-types.h>
41#include <asm/irq.h> 40#include <asm/irq.h>
@@ -44,6 +43,7 @@
44#include <asm/mach/map.h> 43#include <asm/mach/map.h>
45#include <asm/mach/irq.h> 44#include <asm/mach/irq.h>
46 45
46#include <mach/hardware.h>
47#include <mach/board.h> 47#include <mach/board.h>
48#include <mach/gpio.h> 48#include <mach/gpio.h>
49#include <mach/at91sam9_smc.h> 49#include <mach/at91sam9_smc.h>
@@ -168,11 +168,11 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
168 { 168 {
169 .name = "Partition 1", 169 .name = "Partition 1",
170 .offset = 0, 170 .offset = 0,
171 .size = 256 * 1024, 171 .size = SZ_256K,
172 }, 172 },
173 { 173 {
174 .name = "Partition 2", 174 .name = "Partition 2",
175 .offset = 256 * 1024 , 175 .offset = MTDPART_OFS_NXTBLK,
176 .size = MTDPART_SIZ_FULL, 176 .size = MTDPART_SIZ_FULL,
177 }, 177 },
178}; 178};
@@ -435,24 +435,28 @@ static struct gpio_keys_button ek_buttons[] = {
435 .code = BTN_0, 435 .code = BTN_0,
436 .desc = "Button 0", 436 .desc = "Button 0",
437 .active_low = 1, 437 .active_low = 1,
438 .wakeup = 1,
438 }, 439 },
439 { 440 {
440 .gpio = AT91_PIN_PA26, 441 .gpio = AT91_PIN_PA26,
441 .code = BTN_1, 442 .code = BTN_1,
442 .desc = "Button 1", 443 .desc = "Button 1",
443 .active_low = 1, 444 .active_low = 1,
445 .wakeup = 1,
444 }, 446 },
445 { 447 {
446 .gpio = AT91_PIN_PA25, 448 .gpio = AT91_PIN_PA25,
447 .code = BTN_2, 449 .code = BTN_2,
448 .desc = "Button 2", 450 .desc = "Button 2",
449 .active_low = 1, 451 .active_low = 1,
452 .wakeup = 1,
450 }, 453 },
451 { 454 {
452 .gpio = AT91_PIN_PA24, 455 .gpio = AT91_PIN_PA24,
453 .code = BTN_3, 456 .code = BTN_3,
454 .desc = "Button 3", 457 .desc = "Button 3",
455 .active_low = 1, 458 .active_low = 1,
459 .wakeup = 1,
456 } 460 }
457}; 461};
458 462
@@ -472,13 +476,13 @@ static struct platform_device ek_button_device = {
472 476
473static void __init ek_add_device_buttons(void) 477static void __init ek_add_device_buttons(void)
474{ 478{
475 at91_set_gpio_input(AT91_PIN_PA27, 0); /* btn0 */ 479 at91_set_gpio_input(AT91_PIN_PA27, 1); /* btn0 */
476 at91_set_deglitch(AT91_PIN_PA27, 1); 480 at91_set_deglitch(AT91_PIN_PA27, 1);
477 at91_set_gpio_input(AT91_PIN_PA26, 0); /* btn1 */ 481 at91_set_gpio_input(AT91_PIN_PA26, 1); /* btn1 */
478 at91_set_deglitch(AT91_PIN_PA26, 1); 482 at91_set_deglitch(AT91_PIN_PA26, 1);
479 at91_set_gpio_input(AT91_PIN_PA25, 0); /* btn2 */ 483 at91_set_gpio_input(AT91_PIN_PA25, 1); /* btn2 */
480 at91_set_deglitch(AT91_PIN_PA25, 1); 484 at91_set_deglitch(AT91_PIN_PA25, 1);
481 at91_set_gpio_input(AT91_PIN_PA24, 0); /* btn3 */ 485 at91_set_gpio_input(AT91_PIN_PA24, 1); /* btn3 */
482 at91_set_deglitch(AT91_PIN_PA24, 1); 486 at91_set_deglitch(AT91_PIN_PA24, 1);
483 487
484 platform_device_register(&ek_button_device); 488 platform_device_register(&ek_button_device);
diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c
index b1d11960a735..8354015c6a23 100644
--- a/arch/arm/mach-at91/board-sam9263ek.c
+++ b/arch/arm/mach-at91/board-sam9263ek.c
@@ -26,13 +26,14 @@
26#include <linux/platform_device.h> 26#include <linux/platform_device.h>
27#include <linux/spi/spi.h> 27#include <linux/spi/spi.h>
28#include <linux/spi/ads7846.h> 28#include <linux/spi/ads7846.h>
29#include <linux/i2c/at24.h>
29#include <linux/fb.h> 30#include <linux/fb.h>
30#include <linux/gpio_keys.h> 31#include <linux/gpio_keys.h>
31#include <linux/input.h> 32#include <linux/input.h>
33#include <linux/leds.h>
32 34
33#include <video/atmel_lcdc.h> 35#include <video/atmel_lcdc.h>
34 36
35#include <mach/hardware.h>
36#include <asm/setup.h> 37#include <asm/setup.h>
37#include <asm/mach-types.h> 38#include <asm/mach-types.h>
38#include <asm/irq.h> 39#include <asm/irq.h>
@@ -41,6 +42,7 @@
41#include <asm/mach/map.h> 42#include <asm/mach/map.h>
42#include <asm/mach/irq.h> 43#include <asm/mach/irq.h>
43 44
45#include <mach/hardware.h>
44#include <mach/board.h> 46#include <mach/board.h>
45#include <mach/gpio.h> 47#include <mach/gpio.h>
46#include <mach/at91sam9_smc.h> 48#include <mach/at91sam9_smc.h>
@@ -172,11 +174,11 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
172 { 174 {
173 .name = "Partition 1", 175 .name = "Partition 1",
174 .offset = 0, 176 .offset = 0,
175 .size = 64 * 1024 * 1024, 177 .size = SZ_64M,
176 }, 178 },
177 { 179 {
178 .name = "Partition 2", 180 .name = "Partition 2",
179 .offset = 64 * 1024 * 1024, 181 .offset = MTDPART_OFS_NXTBLK,
180 .size = MTDPART_SIZ_FULL, 182 .size = MTDPART_SIZ_FULL,
181 }, 183 },
182}; 184};
@@ -203,12 +205,30 @@ static struct atmel_nand_data __initdata ek_nand_data = {
203 205
204 206
205/* 207/*
208 * I2C devices
209 */
210static struct at24_platform_data at24c512 = {
211 .byte_len = SZ_512K / 8,
212 .page_size = 128,
213 .flags = AT24_FLAG_ADDR16,
214};
215
216
217static struct i2c_board_info __initdata ek_i2c_devices[] = {
218 {
219 I2C_BOARD_INFO("24c512", 0x50),
220 .platform_data = &at24c512,
221 },
222 /* more devices can be added using expansion connectors */
223};
224
225/*
206 * LCD Controller 226 * LCD Controller
207 */ 227 */
208#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE) 228#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
209static struct fb_videomode at91_tft_vga_modes[] = { 229static struct fb_videomode at91_tft_vga_modes[] = {
210 { 230 {
211 .name = "TX09D50VM1CCA @ 60", 231 .name = "TX09D50VM1CCA @ 60",
212 .refresh = 60, 232 .refresh = 60,
213 .xres = 240, .yres = 320, 233 .xres = 240, .yres = 320,
214 .pixclock = KHZ2PICOS(4965), 234 .pixclock = KHZ2PICOS(4965),
@@ -224,7 +244,7 @@ static struct fb_videomode at91_tft_vga_modes[] = {
224 244
225static struct fb_monspecs at91fb_default_monspecs = { 245static struct fb_monspecs at91fb_default_monspecs = {
226 .manufacturer = "HIT", 246 .manufacturer = "HIT",
227 .monitor = "TX09D70VM1CCA", 247 .monitor = "TX09D70VM1CCA",
228 248
229 .modedb = at91_tft_vga_modes, 249 .modedb = at91_tft_vga_modes,
230 .modedb_len = ARRAY_SIZE(at91_tft_vga_modes), 250 .modedb_len = ARRAY_SIZE(at91_tft_vga_modes),
@@ -235,7 +255,7 @@ static struct fb_monspecs at91fb_default_monspecs = {
235}; 255};
236 256
237#define AT91SAM9263_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \ 257#define AT91SAM9263_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \
238 | ATMEL_LCDC_DISTYPE_TFT \ 258 | ATMEL_LCDC_DISTYPE_TFT \
239 | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE) 259 | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
240 260
241static void at91_lcdc_power_control(int on) 261static void at91_lcdc_power_control(int on)
@@ -277,7 +297,7 @@ static struct gpio_keys_button ek_buttons[] = {
277 .active_low = 1, 297 .active_low = 1,
278 .desc = "right_click", 298 .desc = "right_click",
279 .wakeup = 1, 299 .wakeup = 1,
280 }, 300 }
281}; 301};
282 302
283static struct gpio_keys_platform_data ek_button_data = { 303static struct gpio_keys_platform_data ek_button_data = {
@@ -296,9 +316,9 @@ static struct platform_device ek_button_device = {
296 316
297static void __init ek_add_device_buttons(void) 317static void __init ek_add_device_buttons(void)
298{ 318{
299 at91_set_GPIO_periph(AT91_PIN_PC5, 0); /* left button */ 319 at91_set_GPIO_periph(AT91_PIN_PC5, 1); /* left button */
300 at91_set_deglitch(AT91_PIN_PC5, 1); 320 at91_set_deglitch(AT91_PIN_PC5, 1);
301 at91_set_GPIO_periph(AT91_PIN_PC4, 0); /* right button */ 321 at91_set_GPIO_periph(AT91_PIN_PC4, 1); /* right button */
302 at91_set_deglitch(AT91_PIN_PC4, 1); 322 at91_set_deglitch(AT91_PIN_PC4, 1);
303 323
304 platform_device_register(&ek_button_device); 324 platform_device_register(&ek_button_device);
@@ -320,25 +340,32 @@ static struct atmel_ac97_data ek_ac97_data = {
320 * LEDs ... these could all be PWM-driven, for variable brightness 340 * LEDs ... these could all be PWM-driven, for variable brightness
321 */ 341 */
322static struct gpio_led ek_leds[] = { 342static struct gpio_led ek_leds[] = {
323 { /* "left" led, green, userled1, pwm1 */ 343 { /* "right" led, green, userled2 (could be driven by pwm2) */
324 .name = "ds1",
325 .gpio = AT91_PIN_PB8,
326 .active_low = 1,
327 .default_trigger = "mmc0",
328 },
329 { /* "right" led, green, userled2, pwm2 */
330 .name = "ds2", 344 .name = "ds2",
331 .gpio = AT91_PIN_PC29, 345 .gpio = AT91_PIN_PC29,
332 .active_low = 1, 346 .active_low = 1,
333 .default_trigger = "nand-disk", 347 .default_trigger = "nand-disk",
334 }, 348 },
335 { /* "power" led, yellow, pwm0 */ 349 { /* "power" led, yellow (could be driven by pwm0) */
336 .name = "ds3", 350 .name = "ds3",
337 .gpio = AT91_PIN_PB7, 351 .gpio = AT91_PIN_PB7,
338 .default_trigger = "heartbeat", 352 .default_trigger = "heartbeat",
339 } 353 }
340}; 354};
341 355
356/*
357 * PWM Leds
358 */
359static struct gpio_led ek_pwm_led[] = {
360 /* For now only DS1 is PWM-driven (by pwm1) */
361 {
362 .name = "ds1",
363 .gpio = 1, /* is PWM channel number */
364 .active_low = 1,
365 .default_trigger = "none",
366 }
367};
368
342 369
343static void __init ek_board_init(void) 370static void __init ek_board_init(void)
344{ 371{
@@ -360,7 +387,7 @@ static void __init ek_board_init(void)
360 /* NAND */ 387 /* NAND */
361 at91_add_device_nand(&ek_nand_data); 388 at91_add_device_nand(&ek_nand_data);
362 /* I2C */ 389 /* I2C */
363 at91_add_device_i2c(NULL, 0); 390 at91_add_device_i2c(ek_i2c_devices, ARRAY_SIZE(ek_i2c_devices));
364 /* LCD Controller */ 391 /* LCD Controller */
365 at91_add_device_lcdc(&ek_lcdc_data); 392 at91_add_device_lcdc(&ek_lcdc_data);
366 /* Push Buttons */ 393 /* Push Buttons */
@@ -369,6 +396,7 @@ static void __init ek_board_init(void)
369 at91_add_device_ac97(&ek_ac97_data); 396 at91_add_device_ac97(&ek_ac97_data);
370 /* LEDs */ 397 /* LEDs */
371 at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds)); 398 at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
399 at91_pwm_leds(ek_pwm_led, ARRAY_SIZE(ek_pwm_led));
372} 400}
373 401
374MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK") 402MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK")
diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c
index d4eba5c0ce02..b588ead14d68 100644
--- a/arch/arm/mach-at91/board-sam9g20ek.c
+++ b/arch/arm/mach-at91/board-sam9g20ek.c
@@ -122,16 +122,16 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
122 { 122 {
123 .name = "Bootstrap", 123 .name = "Bootstrap",
124 .offset = 0, 124 .offset = 0,
125 .size = 4 * 1024 * 1024, 125 .size = 4 * SZ_1M,
126 }, 126 },
127 { 127 {
128 .name = "Partition 1", 128 .name = "Partition 1",
129 .offset = 4 * 1024 * 1024, 129 .offset = MTDPART_OFS_NXTBLK,
130 .size = 60 * 1024 * 1024, 130 .size = 60 * SZ_1M,
131 }, 131 },
132 { 132 {
133 .name = "Partition 2", 133 .name = "Partition 2",
134 .offset = 64 * 1024 * 1024, 134 .offset = MTDPART_OFS_NXTBLK,
135 .size = MTDPART_SIZ_FULL, 135 .size = MTDPART_SIZ_FULL,
136 }, 136 },
137}; 137};
diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c
index c6dce49c388c..270851864308 100644
--- a/arch/arm/mach-at91/board-sam9rlek.c
+++ b/arch/arm/mach-at91/board-sam9rlek.c
@@ -18,7 +18,6 @@
18 18
19#include <video/atmel_lcdc.h> 19#include <video/atmel_lcdc.h>
20 20
21#include <mach/hardware.h>
22#include <asm/setup.h> 21#include <asm/setup.h>
23#include <asm/mach-types.h> 22#include <asm/mach-types.h>
24#include <asm/irq.h> 23#include <asm/irq.h>
@@ -27,6 +26,7 @@
27#include <asm/mach/map.h> 26#include <asm/mach/map.h>
28#include <asm/mach/irq.h> 27#include <asm/mach/irq.h>
29 28
29#include <mach/hardware.h>
30#include <mach/board.h> 30#include <mach/board.h>
31#include <mach/gpio.h> 31#include <mach/gpio.h>
32#include <mach/at91sam9_smc.h> 32#include <mach/at91sam9_smc.h>
@@ -81,11 +81,11 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
81 { 81 {
82 .name = "Partition 1", 82 .name = "Partition 1",
83 .offset = 0, 83 .offset = 0,
84 .size = 256 * 1024, 84 .size = SZ_256K,
85 }, 85 },
86 { 86 {
87 .name = "Partition 2", 87 .name = "Partition 2",
88 .offset = 256 * 1024 , 88 .offset = MTDPART_OFS_NXTBLK,
89 .size = MTDPART_SIZ_FULL, 89 .size = MTDPART_SIZ_FULL,
90 }, 90 },
91}; 91};
@@ -195,6 +195,8 @@ static void __init ek_board_init(void)
195 at91_add_device_mmc(0, &ek_mmc_data); 195 at91_add_device_mmc(0, &ek_mmc_data);
196 /* LCD Controller */ 196 /* LCD Controller */
197 at91_add_device_lcdc(&ek_lcdc_data); 197 at91_add_device_lcdc(&ek_lcdc_data);
198 /* Touch Screen Controller */
199 at91_add_device_tsadcc();
198} 200}
199 201
200MACHINE_START(AT91SAM9RLEK, "Atmel AT91SAM9RL-EK") 202MACHINE_START(AT91SAM9RLEK, "Atmel AT91SAM9RL-EK")
diff --git a/arch/arm/mach-at91/board-usb-a9260.c b/arch/arm/mach-at91/board-usb-a9260.c
index f9d0b65da40b..7c350357333a 100644
--- a/arch/arm/mach-at91/board-usb-a9260.c
+++ b/arch/arm/mach-at91/board-usb-a9260.c
@@ -30,7 +30,6 @@
30#include <linux/input.h> 30#include <linux/input.h>
31#include <linux/clk.h> 31#include <linux/clk.h>
32 32
33#include <mach/hardware.h>
34#include <asm/setup.h> 33#include <asm/setup.h>
35#include <asm/mach-types.h> 34#include <asm/mach-types.h>
36#include <asm/irq.h> 35#include <asm/irq.h>
@@ -39,6 +38,7 @@
39#include <asm/mach/map.h> 38#include <asm/mach/map.h>
40#include <asm/mach/irq.h> 39#include <asm/mach/irq.h>
41 40
41#include <mach/hardware.h>
42#include <mach/board.h> 42#include <mach/board.h>
43#include <mach/gpio.h> 43#include <mach/gpio.h>
44#include <mach/at91_shdwc.h> 44#include <mach/at91_shdwc.h>
@@ -93,18 +93,18 @@ static struct at91_eth_data __initdata ek_macb_data = {
93static struct mtd_partition __initdata ek_nand_partition[] = { 93static struct mtd_partition __initdata ek_nand_partition[] = {
94 { 94 {
95 .name = "Uboot & Kernel", 95 .name = "Uboot & Kernel",
96 .offset = 0x00000000, 96 .offset = 0,
97 .size = 16 * 1024 * 1024, 97 .size = SZ_16M,
98 }, 98 },
99 { 99 {
100 .name = "Root FS", 100 .name = "Root FS",
101 .offset = 0x01000000, 101 .offset = MTDPART_OFS_NXTBLK,
102 .size = 120 * 1024 * 1024, 102 .size = 120 * SZ_1M,
103 }, 103 },
104 { 104 {
105 .name = "FS", 105 .name = "FS",
106 .offset = 0x08800000, 106 .offset = MTDPART_OFS_NXTBLK,
107 .size = 120 * 1024 * 1024, 107 .size = 120 * SZ_1M,
108 } 108 }
109}; 109};
110 110
diff --git a/arch/arm/mach-at91/board-usb-a9263.c b/arch/arm/mach-at91/board-usb-a9263.c
index 673e5c27214d..391b566c4571 100644
--- a/arch/arm/mach-at91/board-usb-a9263.c
+++ b/arch/arm/mach-at91/board-usb-a9263.c
@@ -29,7 +29,6 @@
29#include <linux/gpio_keys.h> 29#include <linux/gpio_keys.h>
30#include <linux/input.h> 30#include <linux/input.h>
31 31
32#include <mach/hardware.h>
33#include <asm/setup.h> 32#include <asm/setup.h>
34#include <asm/mach-types.h> 33#include <asm/mach-types.h>
35#include <asm/irq.h> 34#include <asm/irq.h>
@@ -38,6 +37,7 @@
38#include <asm/mach/map.h> 37#include <asm/mach/map.h>
39#include <asm/mach/irq.h> 38#include <asm/mach/irq.h>
40 39
40#include <mach/hardware.h>
41#include <mach/board.h> 41#include <mach/board.h>
42#include <mach/gpio.h> 42#include <mach/gpio.h>
43#include <mach/at91_shdwc.h> 43#include <mach/at91_shdwc.h>
@@ -106,18 +106,18 @@ static struct at91_eth_data __initdata ek_macb_data = {
106static struct mtd_partition __initdata ek_nand_partition[] = { 106static struct mtd_partition __initdata ek_nand_partition[] = {
107 { 107 {
108 .name = "Linux Kernel", 108 .name = "Linux Kernel",
109 .offset = 0x00000000, 109 .offset = 0,
110 .size = 16 * 1024 * 1024, 110 .size = SZ_16M,
111 }, 111 },
112 { 112 {
113 .name = "Root FS", 113 .name = "Root FS",
114 .offset = 0x01000000, 114 .offset = MTDPART_OFS_NXTBLK,
115 .size = 120 * 1024 * 1024, 115 .size = 120 * SZ_1M,
116 }, 116 },
117 { 117 {
118 .name = "FS", 118 .name = "FS",
119 .offset = 0x08800000, 119 .offset = MTDPART_OFS_NXTBLK,
120 .size = 120 * 1024 * 1024, 120 .size = 120 * SZ_1M,
121 } 121 }
122}; 122};
123 123
diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c
index 36b380aad006..e22bf051f835 100644
--- a/arch/arm/mach-at91/board-yl-9200.c
+++ b/arch/arm/mach-at91/board-yl-9200.c
@@ -33,7 +33,6 @@
33#include <linux/gpio_keys.h> 33#include <linux/gpio_keys.h>
34#include <linux/input.h> 34#include <linux/input.h>
35 35
36#include <mach/hardware.h>
37#include <asm/setup.h> 36#include <asm/setup.h>
38#include <asm/mach-types.h> 37#include <asm/mach-types.h>
39#include <asm/irq.h> 38#include <asm/irq.h>
@@ -42,6 +41,7 @@
42#include <asm/mach/map.h> 41#include <asm/mach/map.h>
43#include <asm/mach/irq.h> 42#include <asm/mach/irq.h>
44 43
44#include <mach/hardware.h>
45#include <mach/board.h> 45#include <mach/board.h>
46#include <mach/gpio.h> 46#include <mach/gpio.h>
47#include <mach/at91rm9200_mc.h> 47#include <mach/at91rm9200_mc.h>
@@ -150,27 +150,27 @@ static struct mtd_partition __initdata yl9200_nand_partition[] = {
150 { 150 {
151 .name = "AT91 NAND partition 1, boot", 151 .name = "AT91 NAND partition 1, boot",
152 .offset = 0, 152 .offset = 0,
153 .size = 1 * SZ_256K 153 .size = SZ_256K
154 }, 154 },
155 { 155 {
156 .name = "AT91 NAND partition 2, kernel", 156 .name = "AT91 NAND partition 2, kernel",
157 .offset = 1 * SZ_256K, 157 .offset = MTDPART_OFS_NXTBLK,
158 .size = 2 * SZ_1M - 1 * SZ_256K 158 .size = (2 * SZ_1M) - SZ_256K
159 }, 159 },
160 { 160 {
161 .name = "AT91 NAND partition 3, filesystem", 161 .name = "AT91 NAND partition 3, filesystem",
162 .offset = 2 * SZ_1M, 162 .offset = MTDPART_OFS_NXTBLK,
163 .size = 14 * SZ_1M 163 .size = 14 * SZ_1M
164 }, 164 },
165 { 165 {
166 .name = "AT91 NAND partition 4, storage", 166 .name = "AT91 NAND partition 4, storage",
167 .offset = 16 * SZ_1M, 167 .offset = MTDPART_OFS_NXTBLK,
168 .size = 16 * SZ_1M 168 .size = SZ_16M
169 }, 169 },
170 { 170 {
171 .name = "AT91 NAND partition 5, ext-fs", 171 .name = "AT91 NAND partition 5, ext-fs",
172 .offset = 32 * SZ_1M, 172 .offset = MTDPART_OFS_NXTBLK,
173 .size = 32 * SZ_1M 173 .size = SZ_32M
174 } 174 }
175}; 175};
176 176
@@ -193,24 +193,24 @@ static struct atmel_nand_data __initdata yl9200_nand_data = {
193 * NOR Flash 193 * NOR Flash
194 */ 194 */
195#define YL9200_FLASH_BASE AT91_CHIPSELECT_0 195#define YL9200_FLASH_BASE AT91_CHIPSELECT_0
196#define YL9200_FLASH_SIZE 0x1000000 196#define YL9200_FLASH_SIZE SZ_16M
197 197
198static struct mtd_partition yl9200_flash_partitions[] = { 198static struct mtd_partition yl9200_flash_partitions[] = {
199 { 199 {
200 .name = "Bootloader", 200 .name = "Bootloader",
201 .size = 0x00040000,
202 .offset = 0, 201 .offset = 0,
202 .size = SZ_256K,
203 .mask_flags = MTD_WRITEABLE, /* force read-only */ 203 .mask_flags = MTD_WRITEABLE, /* force read-only */
204 }, 204 },
205 { 205 {
206 .name = "Kernel", 206 .name = "Kernel",
207 .size = 0x001C0000, 207 .offset = MTDPART_OFS_NXTBLK,
208 .offset = 0x00040000, 208 .size = (2 * SZ_1M) - SZ_256K
209 }, 209 },
210 { 210 {
211 .name = "Filesystem", 211 .name = "Filesystem",
212 .size = MTDPART_SIZ_FULL, 212 .offset = MTDPART_OFS_NXTBLK,
213 .offset = 0x00200000 213 .size = MTDPART_SIZ_FULL
214 } 214 }
215}; 215};
216 216
@@ -390,10 +390,6 @@ static struct spi_board_info yl9200_spi_devices[] = {
390#if defined(CONFIG_FB_S1D135XX) || defined(CONFIG_FB_S1D13XXX_MODULE) 390#if defined(CONFIG_FB_S1D135XX) || defined(CONFIG_FB_S1D13XXX_MODULE)
391#include <video/s1d13xxxfb.h> 391#include <video/s1d13xxxfb.h>
392 392
393#define AT91_FB_REG_BASE 0x80000000L
394#define AT91_FB_REG_SIZE 0x200
395#define AT91_FB_VMEM_BASE 0x80200000L
396#define AT91_FB_VMEM_SIZE 0x200000L
397 393
398static void __init yl9200_init_video(void) 394static void __init yl9200_init_video(void)
399{ 395{
@@ -516,29 +512,33 @@ static struct s1d13xxxfb_regval yl9200_s1dfb_initregs[] =
516 {S1DREG_COM_DISP_MODE, 0x01}, /* Display Mode Register, LCD only*/ 512 {S1DREG_COM_DISP_MODE, 0x01}, /* Display Mode Register, LCD only*/
517}; 513};
518 514
519static u64 s1dfb_dmamask = DMA_BIT_MASK(32);
520
521static struct s1d13xxxfb_pdata yl9200_s1dfb_pdata = { 515static struct s1d13xxxfb_pdata yl9200_s1dfb_pdata = {
522 .initregs = yl9200_s1dfb_initregs, 516 .initregs = yl9200_s1dfb_initregs,
523 .initregssize = ARRAY_SIZE(yl9200_s1dfb_initregs), 517 .initregssize = ARRAY_SIZE(yl9200_s1dfb_initregs),
524 .platform_init_video = yl9200_init_video, 518 .platform_init_video = yl9200_init_video,
525}; 519};
526 520
521#define YL9200_FB_REG_BASE AT91_CHIPSELECT_7
522#define YL9200_FB_VMEM_BASE YL9200_FB_REG_BASE + SZ_2M
523#define YL9200_FB_VMEM_SIZE SZ_2M
524
527static struct resource yl9200_s1dfb_resource[] = { 525static struct resource yl9200_s1dfb_resource[] = {
528 [0] = { /* video mem */ 526 [0] = { /* video mem */
529 .name = "s1d13xxxfb memory", 527 .name = "s1d13xxxfb memory",
530 .start = AT91_FB_VMEM_BASE, 528 .start = YL9200_FB_VMEM_BASE,
531 .end = AT91_FB_VMEM_BASE + AT91_FB_VMEM_SIZE -1, 529 .end = YL9200_FB_VMEM_BASE + YL9200_FB_VMEM_SIZE -1,
532 .flags = IORESOURCE_MEM, 530 .flags = IORESOURCE_MEM,
533 }, 531 },
534 [1] = { /* video registers */ 532 [1] = { /* video registers */
535 .name = "s1d13xxxfb registers", 533 .name = "s1d13xxxfb registers",
536 .start = AT91_FB_REG_BASE, 534 .start = YL9200_FB_REG_BASE,
537 .end = AT91_FB_REG_BASE + AT91_FB_REG_SIZE -1, 535 .end = YL9200_FB_REG_BASE + SZ_512 -1,
538 .flags = IORESOURCE_MEM, 536 .flags = IORESOURCE_MEM,
539 }, 537 },
540}; 538};
541 539
540static u64 s1dfb_dmamask = DMA_BIT_MASK(32);
541
542static struct platform_device yl9200_s1dfb_device = { 542static struct platform_device yl9200_s1dfb_device = {
543 .name = "s1d13806fb", 543 .name = "s1d13806fb",
544 .id = -1, 544 .id = -1,
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
index f5c2847161f5..e4345106ee57 100644
--- a/arch/arm/mach-at91/clock.c
+++ b/arch/arm/mach-at91/clock.c
@@ -22,8 +22,7 @@
22#include <linux/spinlock.h> 22#include <linux/spinlock.h>
23#include <linux/delay.h> 23#include <linux/delay.h>
24#include <linux/clk.h> 24#include <linux/clk.h>
25 25#include <linux/io.h>
26#include <asm/io.h>
27 26
28#include <mach/hardware.h> 27#include <mach/hardware.h>
29#include <mach/at91_pmc.h> 28#include <mach/at91_pmc.h>
diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c
index 8392d5b517f1..7e5ebb5bdd17 100644
--- a/arch/arm/mach-at91/gpio.c
+++ b/arch/arm/mach-at91/gpio.c
@@ -18,8 +18,8 @@
18#include <linux/kernel.h> 18#include <linux/kernel.h>
19#include <linux/list.h> 19#include <linux/list.h>
20#include <linux/module.h> 20#include <linux/module.h>
21#include <linux/io.h>
21 22
22#include <asm/io.h>
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24#include <mach/at91_pio.h> 24#include <mach/at91_pio.h>
25#include <mach/gpio.h> 25#include <mach/gpio.h>
@@ -404,7 +404,6 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
404 } 404 }
405 405
406 pin = bank->chipbase; 406 pin = bank->chipbase;
407 gpio = &irq_desc[pin];
408 407
409 while (isr) { 408 while (isr) {
410 if (isr & 1) { 409 if (isr & 1) {
@@ -417,7 +416,7 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
417 gpio_irq_mask(pin); 416 gpio_irq_mask(pin);
418 } 417 }
419 else 418 else
420 desc_handle_irq(pin, gpio); 419 generic_handle_irq(pin);
421 } 420 }
422 pin++; 421 pin++;
423 gpio++; 422 gpio++;
diff --git a/arch/arm/mach-at91/include/mach/at91_pit.h b/arch/arm/mach-at91/include/mach/at91_pit.h
index 0448ac36eadb..974d0bd05b5b 100644
--- a/arch/arm/mach-at91/include/mach/at91_pit.h
+++ b/arch/arm/mach-at91/include/mach/at91_pit.h
@@ -1,6 +1,9 @@
1/* 1/*
2 * arch/arm/mach-at91/include/mach/at91_pit.h 2 * arch/arm/mach-at91/include/mach/at91_pit.h
3 * 3 *
4 * Copyright (C) 2007 Andrew Victor
5 * Copyright (C) 2007 Atmel Corporation.
6 *
4 * Periodic Interval Timer (PIT) - System peripherals regsters. 7 * Periodic Interval Timer (PIT) - System peripherals regsters.
5 * Based on AT91SAM9261 datasheet revision D. 8 * Based on AT91SAM9261 datasheet revision D.
6 * 9 *
diff --git a/arch/arm/mach-at91/include/mach/at91_rstc.h b/arch/arm/mach-at91/include/mach/at91_rstc.h
index 7cd1b39aaa43..cbd2bf052c1f 100644
--- a/arch/arm/mach-at91/include/mach/at91_rstc.h
+++ b/arch/arm/mach-at91/include/mach/at91_rstc.h
@@ -1,6 +1,9 @@
1/* 1/*
2 * arch/arm/mach-at91/include/mach/at91_rstc.h 2 * arch/arm/mach-at91/include/mach/at91_rstc.h
3 * 3 *
4 * Copyright (C) 2007 Andrew Victor
5 * Copyright (C) 2007 Atmel Corporation.
6 *
4 * Reset Controller (RSTC) - System peripherals regsters. 7 * Reset Controller (RSTC) - System peripherals regsters.
5 * Based on AT91SAM9261 datasheet revision D. 8 * Based on AT91SAM9261 datasheet revision D.
6 * 9 *
diff --git a/arch/arm/mach-at91/include/mach/at91_rtt.h b/arch/arm/mach-at91/include/mach/at91_rtt.h
index 71782e5d2159..7ec75de8bbb6 100644
--- a/arch/arm/mach-at91/include/mach/at91_rtt.h
+++ b/arch/arm/mach-at91/include/mach/at91_rtt.h
@@ -1,6 +1,9 @@
1/* 1/*
2 * arch/arm/mach-at91/include/mach/at91_rtt.h 2 * arch/arm/mach-at91/include/mach/at91_rtt.h
3 * 3 *
4 * Copyright (C) 2007 Andrew Victor
5 * Copyright (C) 2007 Atmel Corporation.
6 *
4 * Real-time Timer (RTT) - System peripherals regsters. 7 * Real-time Timer (RTT) - System peripherals regsters.
5 * Based on AT91SAM9261 datasheet revision D. 8 * Based on AT91SAM9261 datasheet revision D.
6 * 9 *
diff --git a/arch/arm/mach-at91/include/mach/at91_shdwc.h b/arch/arm/mach-at91/include/mach/at91_shdwc.h
index 60be5ae624f1..c4ce07e8a8fa 100644
--- a/arch/arm/mach-at91/include/mach/at91_shdwc.h
+++ b/arch/arm/mach-at91/include/mach/at91_shdwc.h
@@ -1,6 +1,9 @@
1/* 1/*
2 * arch/arm/mach-at91/include/mach/at91_shdwc.h 2 * arch/arm/mach-at91/include/mach/at91_shdwc.h
3 * 3 *
4 * Copyright (C) 2007 Andrew Victor
5 * Copyright (C) 2007 Atmel Corporation.
6 *
4 * Shutdown Controller (SHDWC) - System peripherals regsters. 7 * Shutdown Controller (SHDWC) - System peripherals regsters.
5 * Based on AT91SAM9261 datasheet revision D. 8 * Based on AT91SAM9261 datasheet revision D.
6 * 9 *
diff --git a/arch/arm/mach-at91/include/mach/at91_wdt.h b/arch/arm/mach-at91/include/mach/at91_wdt.h
index 973b4526a98e..fecc2e9f0ca8 100644
--- a/arch/arm/mach-at91/include/mach/at91_wdt.h
+++ b/arch/arm/mach-at91/include/mach/at91_wdt.h
@@ -1,6 +1,9 @@
1/* 1/*
2 * arch/arm/mach-at91/include/mach/at91_wdt.h 2 * arch/arm/mach-at91/include/mach/at91_wdt.h
3 * 3 *
4 * Copyright (C) 2007 Andrew Victor
5 * Copyright (C) 2007 Atmel Corporation.
6 *
4 * Watchdog Timer (WDT) - System peripherals regsters. 7 * Watchdog Timer (WDT) - System peripherals regsters.
5 * Based on AT91SAM9261 datasheet revision D. 8 * Based on AT91SAM9261 datasheet revision D.
6 * 9 *
diff --git a/arch/arm/mach-at91/include/mach/at91cap9_ddrsdr.h b/arch/arm/mach-at91/include/mach/at91cap9_ddrsdr.h
index bca878f3bd87..1499b1cbffdd 100644
--- a/arch/arm/mach-at91/include/mach/at91cap9_ddrsdr.h
+++ b/arch/arm/mach-at91/include/mach/at91cap9_ddrsdr.h
@@ -1,6 +1,8 @@
1/* 1/*
2 * arch/arm/mach-at91/include/mach/at91cap9_ddrsdr.h 2 * arch/arm/mach-at91/include/mach/at91cap9_ddrsdr.h
3 * 3 *
4 * (C) 2008 Andrew Victor
5 *
4 * DDR/SDR Controller (DDRSDRC) - System peripherals registers. 6 * DDR/SDR Controller (DDRSDRC) - System peripherals registers.
5 * Based on AT91CAP9 datasheet revision B. 7 * Based on AT91CAP9 datasheet revision B.
6 * 8 *
diff --git a/arch/arm/mach-at91/include/mach/at91sam9260_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9260_matrix.h
index f027de5df956..020f02ed921a 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9260_matrix.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9260_matrix.h
@@ -1,6 +1,8 @@
1/* 1/*
2 * arch/arm/mach-at91/include/mach/at91sam9260_matrix.h 2 * arch/arm/mach-at91/include/mach/at91sam9260_matrix.h
3 * 3 *
4 * Copyright (C) 2007 Atmel Corporation.
5 *
4 * Memory Controllers (MATRIX, EBI) - System peripherals registers. 6 * Memory Controllers (MATRIX, EBI) - System peripherals registers.
5 * Based on AT91SAM9260 datasheet revision B. 7 * Based on AT91SAM9260 datasheet revision B.
6 * 8 *
diff --git a/arch/arm/mach-at91/include/mach/at91sam9261_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9261_matrix.h
index db62b1f18300..69c6501915d9 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9261_matrix.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9261_matrix.h
@@ -1,6 +1,8 @@
1/* 1/*
2 * arch/arm/mach-at91/include/mach/at91sam9261_matrix.h 2 * arch/arm/mach-at91/include/mach/at91sam9261_matrix.h
3 * 3 *
4 * Copyright (C) 2007 Atmel Corporation.
5 *
4 * Memory Controllers (MATRIX, EBI) - System peripherals registers. 6 * Memory Controllers (MATRIX, EBI) - System peripherals registers.
5 * Based on AT91SAM9261 datasheet revision D. 7 * Based on AT91SAM9261 datasheet revision D.
6 * 8 *
diff --git a/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h b/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h
index 1921181c63ca..b7260389f7ca 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h
@@ -1,6 +1,9 @@
1/* 1/*
2 * arch/arm/mach-at91/include/mach/at91sam9_sdramc.h 2 * arch/arm/mach-at91/include/mach/at91sam9_sdramc.h
3 * 3 *
4 * Copyright (C) 2007 Andrew Victor
5 * Copyright (C) 2007 Atmel Corporation.
6 *
4 * SDRAM Controllers (SDRAMC) - System peripherals registers. 7 * SDRAM Controllers (SDRAMC) - System peripherals registers.
5 * Based on AT91SAM9261 datasheet revision D. 8 * Based on AT91SAM9261 datasheet revision D.
6 * 9 *
diff --git a/arch/arm/mach-at91/include/mach/at91sam9_smc.h b/arch/arm/mach-at91/include/mach/at91sam9_smc.h
index ec6ad1338b5a..57de6207e57e 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9_smc.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9_smc.h
@@ -1,6 +1,9 @@
1/* 1/*
2 * arch/arm/mach-at91/include/mach/at91sam9_smc.h 2 * arch/arm/mach-at91/include/mach/at91sam9_smc.h
3 * 3 *
4 * Copyright (C) 2007 Andrew Victor
5 * Copyright (C) 2007 Atmel Corporation.
6 *
4 * Static Memory Controllers (SMC) - System peripherals registers. 7 * Static Memory Controllers (SMC) - System peripherals registers.
5 * Based on AT91SAM9261 datasheet revision D. 8 * Based on AT91SAM9261 datasheet revision D.
6 * 9 *
diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h
index acd60f2a0724..fb51f0e0a83f 100644
--- a/arch/arm/mach-at91/include/mach/board.h
+++ b/arch/arm/mach-at91/include/mach/board.h
@@ -133,6 +133,16 @@ struct atmel_uart_data {
133extern void __init at91_add_device_serial(void); 133extern void __init at91_add_device_serial(void);
134 134
135/* 135/*
136 * PWM
137 */
138#define AT91_PWM0 0
139#define AT91_PWM1 1
140#define AT91_PWM2 2
141#define AT91_PWM3 3
142
143extern void __init at91_add_device_pwm(u32 mask);
144
145/*
136 * SSC -- accessed through ssc_request(id). Drivers don't bind to SSC 146 * SSC -- accessed through ssc_request(id). Drivers don't bind to SSC
137 * platform devices. Their SSC ID is part of their configuration data, 147 * platform devices. Their SSC ID is part of their configuration data,
138 * along with information about which SSC signals they should use. 148 * along with information about which SSC signals they should use.
@@ -162,9 +172,13 @@ extern void __init at91_add_device_ac97(struct atmel_ac97_data *data);
162 /* ISI */ 172 /* ISI */
163extern void __init at91_add_device_isi(void); 173extern void __init at91_add_device_isi(void);
164 174
175 /* Touchscreen Controller */
176extern void __init at91_add_device_tsadcc(void);
177
165 /* LEDs */ 178 /* LEDs */
166extern void __init at91_init_leds(u8 cpu_led, u8 timer_led); 179extern void __init at91_init_leds(u8 cpu_led, u8 timer_led);
167extern void __init at91_gpio_leds(struct gpio_led *leds, int nr); 180extern void __init at91_gpio_leds(struct gpio_led *leds, int nr);
181extern void __init at91_pwm_leds(struct gpio_led *leds, int nr);
168 182
169/* FIXME: this needs a better location, but gets stuff building again */ 183/* FIXME: this needs a better location, but gets stuff building again */
170extern int at91_suspend_entering_slow_clock(void); 184extern int at91_suspend_entering_slow_clock(void);
diff --git a/arch/arm/mach-at91/include/mach/irqs.h b/arch/arm/mach-at91/include/mach/irqs.h
index bda29ccbcd94..36bd55f3fc6e 100644
--- a/arch/arm/mach-at91/include/mach/irqs.h
+++ b/arch/arm/mach-at91/include/mach/irqs.h
@@ -21,7 +21,7 @@
21#ifndef __ASM_ARCH_IRQS_H 21#ifndef __ASM_ARCH_IRQS_H
22#define __ASM_ARCH_IRQS_H 22#define __ASM_ARCH_IRQS_H
23 23
24#include <asm/io.h> 24#include <linux/io.h>
25#include <mach/at91_aic.h> 25#include <mach/at91_aic.h>
26 26
27#define NR_AIC_IRQS 32 27#define NR_AIC_IRQS 32
diff --git a/arch/arm/mach-at91/include/mach/uncompress.h b/arch/arm/mach-at91/include/mach/uncompress.h
index 0410d548e9b1..18bdcdeb474f 100644
--- a/arch/arm/mach-at91/include/mach/uncompress.h
+++ b/arch/arm/mach-at91/include/mach/uncompress.h
@@ -21,7 +21,7 @@
21#ifndef __ASM_ARCH_UNCOMPRESS_H 21#ifndef __ASM_ARCH_UNCOMPRESS_H
22#define __ASM_ARCH_UNCOMPRESS_H 22#define __ASM_ARCH_UNCOMPRESS_H
23 23
24#include <asm/io.h> 24#include <linux/io.h>
25#include <linux/atmel_serial.h> 25#include <linux/atmel_serial.h>
26 26
27#if defined(CONFIG_AT91_EARLY_DBGU) 27#if defined(CONFIG_AT91_EARLY_DBGU)
diff --git a/arch/arm/mach-at91/leds.c b/arch/arm/mach-at91/leds.c
index fec03c59ff94..0415a839e1ad 100644
--- a/arch/arm/mach-at91/leds.c
+++ b/arch/arm/mach-at91/leds.c
@@ -12,6 +12,7 @@
12#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/platform_device.h>
15 16
16#include <mach/board.h> 17#include <mach/board.h>
17#include <mach/gpio.h> 18#include <mach/gpio.h>
@@ -21,15 +22,13 @@
21 22
22#if defined(CONFIG_NEW_LEDS) 23#if defined(CONFIG_NEW_LEDS)
23 24
24#include <linux/platform_device.h>
25
26/* 25/*
27 * New cross-platform LED support. 26 * New cross-platform LED support.
28 */ 27 */
29 28
30static struct gpio_led_platform_data led_data; 29static struct gpio_led_platform_data led_data;
31 30
32static struct platform_device at91_leds = { 31static struct platform_device at91_gpio_leds_device = {
33 .name = "leds-gpio", 32 .name = "leds-gpio",
34 .id = -1, 33 .id = -1,
35 .dev.platform_data = &led_data, 34 .dev.platform_data = &led_data,
@@ -47,7 +46,7 @@ void __init at91_gpio_leds(struct gpio_led *leds, int nr)
47 46
48 led_data.leds = leds; 47 led_data.leds = leds;
49 led_data.num_leds = nr; 48 led_data.num_leds = nr;
50 platform_device_register(&at91_leds); 49 platform_device_register(&at91_gpio_leds_device);
51} 50}
52 51
53#else 52#else
@@ -57,6 +56,44 @@ void __init at91_gpio_leds(struct gpio_led *leds, int nr) {}
57 56
58/* ------------------------------------------------------------------------- */ 57/* ------------------------------------------------------------------------- */
59 58
59#if defined (CONFIG_LEDS_ATMEL_PWM)
60
61/*
62 * PWM Leds
63 */
64
65static struct gpio_led_platform_data pwm_led_data;
66
67static struct platform_device at91_pwm_leds_device = {
68 .name = "leds-atmel-pwm",
69 .id = -1,
70 .dev.platform_data = &pwm_led_data,
71};
72
73void __init at91_pwm_leds(struct gpio_led *leds, int nr)
74{
75 int i;
76 u32 pwm_mask = 0;
77
78 if (!nr)
79 return;
80
81 for (i = 0; i < nr; i++)
82 pwm_mask |= (1 << leds[i].gpio);
83
84 pwm_led_data.leds = leds;
85 pwm_led_data.num_leds = nr;
86
87 at91_add_device_pwm(pwm_mask);
88 platform_device_register(&at91_pwm_leds_device);
89}
90#else
91void __init at91_pwm_leds(struct gpio_led *leds, int nr){}
92#endif
93
94
95/* ------------------------------------------------------------------------- */
96
60#if defined(CONFIG_LEDS) 97#if defined(CONFIG_LEDS)
61 98
62#include <asm/leds.h> 99#include <asm/leds.h>
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index ec2fe4ca1e27..9bb4f043aa22 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -17,8 +17,8 @@
17#include <linux/sysfs.h> 17#include <linux/sysfs.h>
18#include <linux/module.h> 18#include <linux/module.h>
19#include <linux/platform_device.h> 19#include <linux/platform_device.h>
20#include <linux/io.h>
20 21
21#include <asm/io.h>
22#include <asm/irq.h> 22#include <asm/irq.h>
23#include <asm/atomic.h> 23#include <asm/atomic.h>
24#include <asm/mach/time.h> 24#include <asm/mach/time.h>
diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S
new file mode 100644
index 000000000000..987fab3d846a
--- /dev/null
+++ b/arch/arm/mach-at91/pm_slowclock.S
@@ -0,0 +1,283 @@
1/*
2 * arch/arm/mach-at91/pm_slow_clock.S
3 *
4 * Copyright (C) 2006 Savin Zlobec
5 *
6 * AT91SAM9 support:
7 * Copyright (C) 2007 Anti Sullin <anti.sullin@artecdesign.ee
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 */
14
15#include <linux/linkage.h>
16#include <mach/hardware.h>
17#include <mach/at91_pmc.h>
18
19#ifdef CONFIG_ARCH_AT91RM9200
20#include <mach/at91rm9200_mc.h>
21#elif defined(CONFIG_ARCH_AT91CAP9)
22#include <mach/at91cap9_ddrsdr.h>
23#else
24#include <mach/at91sam9_sdramc.h>
25#endif
26
27
28#ifdef CONFIG_ARCH_AT91SAM9263
29/*
30 * FIXME either or both the SDRAM controllers (EB0, EB1) might be in use;
31 * handle those cases both here and in the Suspend-To-RAM support.
32 */
33#define AT91_SDRAMC AT91_SDRAMC0
34#warning Assuming EB1 SDRAM controller is *NOT* used
35#endif
36
37/*
38 * When SLOWDOWN_MASTER_CLOCK is defined we will also slow down the Master
39 * clock during suspend by adjusting its prescalar and divisor.
40 * NOTE: This hasn't been shown to be stable on SAM9s; and on the RM9200 there
41 * are errata regarding adjusting the prescalar and divisor.
42 */
43#undef SLOWDOWN_MASTER_CLOCK
44
45#define MCKRDY_TIMEOUT 1000
46#define MOSCRDY_TIMEOUT 1000
47#define PLLALOCK_TIMEOUT 1000
48#define PLLBLOCK_TIMEOUT 1000
49
50
51/*
52 * Wait until master clock is ready (after switching master clock source)
53 */
54 .macro wait_mckrdy
55 mov r4, #MCKRDY_TIMEOUT
561: sub r4, r4, #1
57 cmp r4, #0
58 beq 2f
59 ldr r3, [r1, #(AT91_PMC_SR - AT91_PMC)]
60 tst r3, #AT91_PMC_MCKRDY
61 beq 1b
622:
63 .endm
64
65/*
66 * Wait until master oscillator has stabilized.
67 */
68 .macro wait_moscrdy
69 mov r4, #MOSCRDY_TIMEOUT
701: sub r4, r4, #1
71 cmp r4, #0
72 beq 2f
73 ldr r3, [r1, #(AT91_PMC_SR - AT91_PMC)]
74 tst r3, #AT91_PMC_MOSCS
75 beq 1b
762:
77 .endm
78
79/*
80 * Wait until PLLA has locked.
81 */
82 .macro wait_pllalock
83 mov r4, #PLLALOCK_TIMEOUT
841: sub r4, r4, #1
85 cmp r4, #0
86 beq 2f
87 ldr r3, [r1, #(AT91_PMC_SR - AT91_PMC)]
88 tst r3, #AT91_PMC_LOCKA
89 beq 1b
902:
91 .endm
92
93/*
94 * Wait until PLLB has locked.
95 */
96 .macro wait_pllblock
97 mov r4, #PLLBLOCK_TIMEOUT
981: sub r4, r4, #1
99 cmp r4, #0
100 beq 2f
101 ldr r3, [r1, #(AT91_PMC_SR - AT91_PMC)]
102 tst r3, #AT91_PMC_LOCKB
103 beq 1b
1042:
105 .endm
106
107 .text
108
109ENTRY(at91_slow_clock)
110 /* Save registers on stack */
111 stmfd sp!, {r0 - r12, lr}
112
113 /*
114 * Register usage:
115 * R1 = Base address of AT91_PMC
116 * R2 = Base address of AT91_SDRAMC (or AT91_SYS on AT91RM9200)
117 * R3 = temporary register
118 * R4 = temporary register
119 */
120 ldr r1, .at91_va_base_pmc
121 ldr r2, .at91_va_base_sdramc
122
123 /* Drain write buffer */
124 mcr p15, 0, r0, c7, c10, 4
125
126#ifdef CONFIG_ARCH_AT91RM9200
127 /* Put SDRAM in self-refresh mode */
128 mov r3, #1
129 str r3, [r2, #AT91_SDRAMC_SRR]
130#elif defined(CONFIG_ARCH_AT91CAP9)
131 /* Enable SDRAM self-refresh mode */
132 ldr r3, [r2, #AT91_DDRSDRC_LPR - AT91_DDRSDRC]
133 str r3, .saved_sam9_lpr
134
135 mov r3, #AT91_DDRSDRC_LPCB_SELF_REFRESH
136 str r3, [r2, #AT91_DDRSDRC_LPR - AT91_DDRSDRC]
137#else
138 /* Enable SDRAM self-refresh mode */
139 ldr r3, [r2, #AT91_SDRAMC_LPR - AT91_SDRAMC]
140 str r3, .saved_sam9_lpr
141
142 mov r3, #AT91_SDRAMC_LPCB_SELF_REFRESH
143 str r3, [r2, #AT91_SDRAMC_LPR - AT91_SDRAMC]
144#endif
145
146 /* Save Master clock setting */
147 ldr r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
148 str r3, .saved_mckr
149
150 /*
151 * Set the Master clock source to slow clock
152 */
153 bic r3, r3, #AT91_PMC_CSS
154 str r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
155
156 wait_mckrdy
157
158#ifdef SLOWDOWN_MASTER_CLOCK
159 /*
160 * Set the Master Clock PRES and MDIV fields.
161 *
162 * See AT91RM9200 errata #27 and #28 for details.
163 */
164 mov r3, #0
165 str r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
166
167 wait_mckrdy
168#endif
169
170 /* Save PLLA setting and disable it */
171 ldr r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)]
172 str r3, .saved_pllar
173
174 mov r3, #AT91_PMC_PLLCOUNT
175 orr r3, r3, #(1 << 29) /* bit 29 always set */
176 str r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)]
177
178 wait_pllalock
179
180 /* Save PLLB setting and disable it */
181 ldr r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)]
182 str r3, .saved_pllbr
183
184 mov r3, #AT91_PMC_PLLCOUNT
185 str r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)]
186
187 wait_pllblock
188
189 /* Turn off the main oscillator */
190 ldr r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)]
191 bic r3, r3, #AT91_PMC_MOSCEN
192 str r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)]
193
194 /* Wait for interrupt */
195 mcr p15, 0, r0, c7, c0, 4
196
197 /* Turn on the main oscillator */
198 ldr r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)]
199 orr r3, r3, #AT91_PMC_MOSCEN
200 str r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)]
201
202 wait_moscrdy
203
204 /* Restore PLLB setting */
205 ldr r3, .saved_pllbr
206 str r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)]
207
208 wait_pllblock
209
210 /* Restore PLLA setting */
211 ldr r3, .saved_pllar
212 str r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)]
213
214 wait_pllalock
215
216#ifdef SLOWDOWN_MASTER_CLOCK
217 /*
218 * First set PRES if it was not 0,
219 * than set CSS and MDIV fields.
220 *
221 * See AT91RM9200 errata #27 and #28 for details.
222 */
223 ldr r3, .saved_mckr
224 tst r3, #AT91_PMC_PRES
225 beq 2f
226 and r3, r3, #AT91_PMC_PRES
227 str r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
228
229 wait_mckrdy
230#endif
231
232 /*
233 * Restore master clock setting
234 */
2352: ldr r3, .saved_mckr
236 str r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
237
238 wait_mckrdy
239
240#ifdef CONFIG_ARCH_AT91RM9200
241 /* Do nothing - self-refresh is automatically disabled. */
242#elif defined(CONFIG_ARCH_AT91CAP9)
243 /* Restore LPR on AT91CAP9 */
244 ldr r3, .saved_sam9_lpr
245 str r3, [r2, #AT91_DDRSDRC_LPR - AT91_DDRSDRC]
246#else
247 /* Restore LPR on AT91SAM9 */
248 ldr r3, .saved_sam9_lpr
249 str r3, [r2, #AT91_SDRAMC_LPR - AT91_SDRAMC]
250#endif
251
252 /* Restore registers, and return */
253 ldmfd sp!, {r0 - r12, pc}
254
255
256.saved_mckr:
257 .word 0
258
259.saved_pllar:
260 .word 0
261
262.saved_pllbr:
263 .word 0
264
265.saved_sam9_lpr:
266 .word 0
267
268.at91_va_base_pmc:
269 .word AT91_VA_BASE_SYS + AT91_PMC
270
271#ifdef CONFIG_ARCH_AT91RM9200
272.at91_va_base_sdramc:
273 .word AT91_VA_BASE_SYS
274#elif defined(CONFIG_ARCH_AT91CAP9)
275.at91_va_base_sdramc:
276 .word AT91_VA_BASE_SYS + AT91_DDRSDRC
277#else
278.at91_va_base_sdramc:
279 .word AT91_VA_BASE_SYS + AT91_SDRAMC
280#endif
281
282ENTRY(at91_slow_clock_sz)
283 .word .-at91_slow_clock
diff --git a/arch/arm/mach-clps711x/autcpu12.c b/arch/arm/mach-clps711x/autcpu12.c
index 474616dcd7a6..5f18eccdc725 100644
--- a/arch/arm/mach-clps711x/autcpu12.c
+++ b/arch/arm/mach-clps711x/autcpu12.c
@@ -22,10 +22,10 @@
22#include <linux/types.h> 22#include <linux/types.h>
23#include <linux/string.h> 23#include <linux/string.h>
24#include <linux/mm.h> 24#include <linux/mm.h>
25#include <linux/io.h>
25 26
26#include <mach/hardware.h> 27#include <mach/hardware.h>
27#include <asm/sizes.h> 28#include <asm/sizes.h>
28#include <asm/io.h>
29#include <asm/setup.h> 29#include <asm/setup.h>
30#include <asm/mach-types.h> 30#include <asm/mach-types.h>
31#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
diff --git a/arch/arm/mach-clps711x/cdb89712.c b/arch/arm/mach-clps711x/cdb89712.c
index aa02aa5a01f4..71a80b5b8ad6 100644
--- a/arch/arm/mach-clps711x/cdb89712.c
+++ b/arch/arm/mach-clps711x/cdb89712.c
@@ -22,9 +22,9 @@
22#include <linux/types.h> 22#include <linux/types.h>
23#include <linux/string.h> 23#include <linux/string.h>
24#include <linux/mm.h> 24#include <linux/mm.h>
25#include <linux/io.h>
25 26
26#include <mach/hardware.h> 27#include <mach/hardware.h>
27#include <asm/io.h>
28#include <asm/pgtable.h> 28#include <asm/pgtable.h>
29#include <asm/page.h> 29#include <asm/page.h>
30#include <asm/setup.h> 30#include <asm/setup.h>
diff --git a/arch/arm/mach-clps711x/include/mach/system.h b/arch/arm/mach-clps711x/include/mach/system.h
index a8eade40317f..24e96159e3e7 100644
--- a/arch/arm/mach-clps711x/include/mach/system.h
+++ b/arch/arm/mach-clps711x/include/mach/system.h
@@ -20,9 +20,9 @@
20#ifndef __ASM_ARCH_SYSTEM_H 20#ifndef __ASM_ARCH_SYSTEM_H
21#define __ASM_ARCH_SYSTEM_H 21#define __ASM_ARCH_SYSTEM_H
22 22
23#include <linux/io.h>
23#include <mach/hardware.h> 24#include <mach/hardware.h>
24#include <asm/hardware/clps7111.h> 25#include <asm/hardware/clps7111.h>
25#include <asm/io.h>
26 26
27static inline void arch_idle(void) 27static inline void arch_idle(void)
28{ 28{
diff --git a/arch/arm/mach-clps711x/irq.c b/arch/arm/mach-clps711x/irq.c
index 38623cfcac5a..9a12d8562284 100644
--- a/arch/arm/mach-clps711x/irq.c
+++ b/arch/arm/mach-clps711x/irq.c
@@ -19,10 +19,10 @@
19 */ 19 */
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/list.h> 21#include <linux/list.h>
22#include <linux/io.h>
22 23
23#include <asm/mach/irq.h> 24#include <asm/mach/irq.h>
24#include <mach/hardware.h> 25#include <mach/hardware.h>
25#include <asm/io.h>
26#include <asm/irq.h> 26#include <asm/irq.h>
27 27
28#include <asm/hardware/clps7111.h> 28#include <asm/hardware/clps7111.h>
diff --git a/arch/arm/mach-clps711x/p720t-leds.c b/arch/arm/mach-clps711x/p720t-leds.c
index 262c3c361453..15121446efc8 100644
--- a/arch/arm/mach-clps711x/p720t-leds.c
+++ b/arch/arm/mach-clps711x/p720t-leds.c
@@ -21,9 +21,9 @@
21 */ 21 */
22#include <linux/kernel.h> 22#include <linux/kernel.h>
23#include <linux/init.h> 23#include <linux/init.h>
24#include <linux/io.h>
24 25
25#include <mach/hardware.h> 26#include <mach/hardware.h>
26#include <asm/io.h>
27#include <asm/leds.h> 27#include <asm/leds.h>
28#include <asm/system.h> 28#include <asm/system.h>
29#include <asm/mach-types.h> 29#include <asm/mach-types.h>
diff --git a/arch/arm/mach-clps711x/p720t.c b/arch/arm/mach-clps711x/p720t.c
index f51f97d4f212..0d94a30fd6fc 100644
--- a/arch/arm/mach-clps711x/p720t.c
+++ b/arch/arm/mach-clps711x/p720t.c
@@ -22,9 +22,9 @@
22#include <linux/types.h> 22#include <linux/types.h>
23#include <linux/string.h> 23#include <linux/string.h>
24#include <linux/mm.h> 24#include <linux/mm.h>
25#include <linux/io.h>
25 26
26#include <mach/hardware.h> 27#include <mach/hardware.h>
27#include <asm/io.h>
28#include <asm/pgtable.h> 28#include <asm/pgtable.h>
29#include <asm/page.h> 29#include <asm/page.h>
30#include <asm/setup.h> 30#include <asm/setup.h>
diff --git a/arch/arm/mach-clps711x/time.c b/arch/arm/mach-clps711x/time.c
index ef1fcd17189e..d581ef0bcd24 100644
--- a/arch/arm/mach-clps711x/time.c
+++ b/arch/arm/mach-clps711x/time.c
@@ -21,11 +21,11 @@
21#include <linux/interrupt.h> 21#include <linux/interrupt.h>
22#include <linux/irq.h> 22#include <linux/irq.h>
23#include <linux/sched.h> 23#include <linux/sched.h>
24#include <linux/io.h>
24 25
25#include <mach/hardware.h> 26#include <mach/hardware.h>
26#include <asm/irq.h> 27#include <asm/irq.h>
27#include <asm/leds.h> 28#include <asm/leds.h>
28#include <asm/io.h>
29#include <asm/hardware/clps7111.h> 29#include <asm/hardware/clps7111.h>
30 30
31#include <asm/mach/time.h> 31#include <asm/mach/time.h>
diff --git a/arch/arm/mach-clps7500/core.c b/arch/arm/mach-clps7500/core.c
index cc1b82179e83..c3a33b8a5aac 100644
--- a/arch/arm/mach-clps7500/core.c
+++ b/arch/arm/mach-clps7500/core.c
@@ -15,6 +15,7 @@
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/device.h> 16#include <linux/device.h>
17#include <linux/serial_8250.h> 17#include <linux/serial_8250.h>
18#include <linux/io.h>
18 19
19#include <asm/mach/arch.h> 20#include <asm/mach/arch.h>
20#include <asm/mach/map.h> 21#include <asm/mach/map.h>
@@ -23,7 +24,6 @@
23 24
24#include <mach/hardware.h> 25#include <mach/hardware.h>
25#include <asm/hardware/iomd.h> 26#include <asm/hardware/iomd.h>
26#include <asm/io.h>
27#include <asm/irq.h> 27#include <asm/irq.h>
28#include <asm/mach-types.h> 28#include <asm/mach-types.h>
29 29
diff --git a/arch/arm/mach-clps7500/include/mach/irq.h b/arch/arm/mach-clps7500/include/mach/irq.h
index e8da3c58df76..d02fcf28ee05 100644
--- a/arch/arm/mach-clps7500/include/mach/irq.h
+++ b/arch/arm/mach-clps7500/include/mach/irq.h
@@ -10,8 +10,8 @@
10 * 11-08-1999 PJB Created ARM7500 version, derived from RiscPC code 10 * 11-08-1999 PJB Created ARM7500 version, derived from RiscPC code
11 */ 11 */
12 12
13#include <linux/io.h>
13#include <asm/hardware/iomd.h> 14#include <asm/hardware/iomd.h>
14#include <asm/io.h>
15 15
16static inline int fixup_irq(unsigned int irq) 16static inline int fixup_irq(unsigned int irq)
17{ 17{
diff --git a/arch/arm/mach-clps7500/include/mach/memory.h b/arch/arm/mach-clps7500/include/mach/memory.h
index 3326aa99d3ec..87b32db470c8 100644
--- a/arch/arm/mach-clps7500/include/mach/memory.h
+++ b/arch/arm/mach-clps7500/include/mach/memory.h
@@ -32,4 +32,12 @@
32#define FLUSH_BASE_PHYS 0x00000000 32#define FLUSH_BASE_PHYS 0x00000000
33#define FLUSH_BASE 0xdf000000 33#define FLUSH_BASE 0xdf000000
34 34
35/*
36 * Sparsemem support. Each section is a maximum of 64MB. The sections
37 * are offset by 128MB and can cover 128MB, so that gives us a maximum
38 * of 29 physmem bits.
39 */
40#define MAX_PHYSMEM_BITS 29
41#define SECTION_SIZE_BITS 26
42
35#endif 43#endif
diff --git a/arch/arm/mach-clps7500/include/mach/system.h b/arch/arm/mach-clps7500/include/mach/system.h
index 624fc2830ae0..6d325fbe8b08 100644
--- a/arch/arm/mach-clps7500/include/mach/system.h
+++ b/arch/arm/mach-clps7500/include/mach/system.h
@@ -6,8 +6,8 @@
6#ifndef __ASM_ARCH_SYSTEM_H 6#ifndef __ASM_ARCH_SYSTEM_H
7#define __ASM_ARCH_SYSTEM_H 7#define __ASM_ARCH_SYSTEM_H
8 8
9#include <linux/io.h>
9#include <asm/hardware/iomd.h> 10#include <asm/hardware/iomd.h>
10#include <asm/io.h>
11 11
12static inline void arch_idle(void) 12static inline void arch_idle(void)
13{ 13{
diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile
index 99ac2e55774d..4dc458597f40 100644
--- a/arch/arm/mach-davinci/Makefile
+++ b/arch/arm/mach-davinci/Makefile
@@ -5,7 +5,7 @@
5 5
6# Common objects 6# Common objects
7obj-y := time.o irq.o clock.o serial.o io.o id.o psc.o \ 7obj-y := time.o irq.o clock.o serial.o io.o id.o psc.o \
8 gpio.o mux.o 8 gpio.o mux.o devices.o usb.o
9 9
10# Board specific 10# Board specific
11obj-$(CONFIG_MACH_DAVINCI_EVM) += board-evm.o 11obj-$(CONFIG_MACH_DAVINCI_EVM) += board-evm.o
diff --git a/arch/arm/mach-davinci/board-evm.c b/arch/arm/mach-davinci/board-evm.c
index 134355787814..a957d239a683 100644
--- a/arch/arm/mach-davinci/board-evm.c
+++ b/arch/arm/mach-davinci/board-evm.c
@@ -13,20 +13,28 @@
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/dma-mapping.h> 14#include <linux/dma-mapping.h>
15#include <linux/platform_device.h> 15#include <linux/platform_device.h>
16#include <linux/gpio.h>
17#include <linux/leds.h>
18
19#include <linux/i2c.h>
20#include <linux/i2c/pcf857x.h>
21#include <linux/i2c/at24.h>
22
16#include <linux/mtd/mtd.h> 23#include <linux/mtd/mtd.h>
17#include <linux/mtd/partitions.h> 24#include <linux/mtd/partitions.h>
18#include <linux/mtd/physmap.h> 25#include <linux/mtd/physmap.h>
26#include <linux/io.h>
19 27
20#include <asm/setup.h> 28#include <asm/setup.h>
21#include <asm/io.h>
22#include <asm/mach-types.h> 29#include <asm/mach-types.h>
23#include <mach/hardware.h>
24 30
25#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
26#include <asm/mach/map.h> 32#include <asm/mach/map.h>
27#include <asm/mach/flash.h> 33#include <asm/mach/flash.h>
28 34
35#include <mach/hardware.h>
29#include <mach/common.h> 36#include <mach/common.h>
37#include <mach/i2c.h>
30 38
31/* other misc. init functions */ 39/* other misc. init functions */
32void __init davinci_psc_init(void); 40void __init davinci_psc_init(void);
@@ -34,10 +42,10 @@ void __init davinci_irq_init(void);
34void __init davinci_map_common_io(void); 42void __init davinci_map_common_io(void);
35void __init davinci_init_common_hw(void); 43void __init davinci_init_common_hw(void);
36 44
37/* NOR Flash base address set to CS0 by default */ 45#if defined(CONFIG_MTD_PHYSMAP) || \
38#define NOR_FLASH_PHYS 0x02000000 46 defined(CONFIG_MTD_PHYSMAP_MODULE)
39 47
40static struct mtd_partition davinci_evm_partitions[] = { 48static struct mtd_partition davinci_evm_norflash_partitions[] = {
41 /* bootloader (U-Boot, etc) in first 4 sectors */ 49 /* bootloader (U-Boot, etc) in first 4 sectors */
42 { 50 {
43 .name = "bootloader", 51 .name = "bootloader",
@@ -68,32 +76,323 @@ static struct mtd_partition davinci_evm_partitions[] = {
68 } 76 }
69}; 77};
70 78
71static struct physmap_flash_data davinci_evm_flash_data = { 79static struct physmap_flash_data davinci_evm_norflash_data = {
72 .width = 2, 80 .width = 2,
73 .parts = davinci_evm_partitions, 81 .parts = davinci_evm_norflash_partitions,
74 .nr_parts = ARRAY_SIZE(davinci_evm_partitions), 82 .nr_parts = ARRAY_SIZE(davinci_evm_norflash_partitions),
75}; 83};
76 84
77/* NOTE: CFI probe will correctly detect flash part as 32M, but EMIF 85/* NOTE: CFI probe will correctly detect flash part as 32M, but EMIF
78 * limits addresses to 16M, so using addresses past 16M will wrap */ 86 * limits addresses to 16M, so using addresses past 16M will wrap */
79static struct resource davinci_evm_flash_resource = { 87static struct resource davinci_evm_norflash_resource = {
80 .start = NOR_FLASH_PHYS, 88 .start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE,
81 .end = NOR_FLASH_PHYS + SZ_16M - 1, 89 .end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
82 .flags = IORESOURCE_MEM, 90 .flags = IORESOURCE_MEM,
83}; 91};
84 92
85static struct platform_device davinci_evm_flash_device = { 93static struct platform_device davinci_evm_norflash_device = {
86 .name = "physmap-flash", 94 .name = "physmap-flash",
87 .id = 0, 95 .id = 0,
88 .dev = { 96 .dev = {
89 .platform_data = &davinci_evm_flash_data, 97 .platform_data = &davinci_evm_norflash_data,
90 }, 98 },
91 .num_resources = 1, 99 .num_resources = 1,
92 .resource = &davinci_evm_flash_resource, 100 .resource = &davinci_evm_norflash_resource,
101};
102
103#endif
104
105#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
106 defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
107
108static struct resource ide_resources[] = {
109 {
110 .start = DAVINCI_CFC_ATA_BASE,
111 .end = DAVINCI_CFC_ATA_BASE + 0x7ff,
112 .flags = IORESOURCE_MEM,
113 },
114 {
115 .start = IRQ_IDE,
116 .end = IRQ_IDE,
117 .flags = IORESOURCE_IRQ,
118 },
119};
120
121static u64 ide_dma_mask = DMA_32BIT_MASK;
122
123static struct platform_device ide_dev = {
124 .name = "palm_bk3710",
125 .id = -1,
126 .resource = ide_resources,
127 .num_resources = ARRAY_SIZE(ide_resources),
128 .dev = {
129 .dma_mask = &ide_dma_mask,
130 .coherent_dma_mask = DMA_32BIT_MASK,
131 },
132};
133
134#endif
135
136/*----------------------------------------------------------------------*/
137
138/*
139 * I2C GPIO expanders
140 */
141
142#define PCF_Uxx_BASE(x) (DAVINCI_N_GPIO + ((x) * 8))
143
144
145/* U2 -- LEDs */
146
147static struct gpio_led evm_leds[] = {
148 { .name = "DS8", .active_low = 1,
149 .default_trigger = "heartbeat", },
150 { .name = "DS7", .active_low = 1, },
151 { .name = "DS6", .active_low = 1, },
152 { .name = "DS5", .active_low = 1, },
153 { .name = "DS4", .active_low = 1, },
154 { .name = "DS3", .active_low = 1, },
155 { .name = "DS2", .active_low = 1,
156 .default_trigger = "mmc0", },
157 { .name = "DS1", .active_low = 1,
158 .default_trigger = "ide-disk", },
159};
160
161static const struct gpio_led_platform_data evm_led_data = {
162 .num_leds = ARRAY_SIZE(evm_leds),
163 .leds = evm_leds,
164};
165
166static struct platform_device *evm_led_dev;
167
168static int
169evm_led_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
170{
171 struct gpio_led *leds = evm_leds;
172 int status;
173
174 while (ngpio--) {
175 leds->gpio = gpio++;
176 leds++;
177 }
178
179 /* what an extremely annoying way to be forced to handle
180 * device unregistration ...
181 */
182 evm_led_dev = platform_device_alloc("leds-gpio", 0);
183 platform_device_add_data(evm_led_dev,
184 &evm_led_data, sizeof evm_led_data);
185
186 evm_led_dev->dev.parent = &client->dev;
187 status = platform_device_add(evm_led_dev);
188 if (status < 0) {
189 platform_device_put(evm_led_dev);
190 evm_led_dev = NULL;
191 }
192 return status;
193}
194
195static int
196evm_led_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
197{
198 if (evm_led_dev) {
199 platform_device_unregister(evm_led_dev);
200 evm_led_dev = NULL;
201 }
202 return 0;
203}
204
205static struct pcf857x_platform_data pcf_data_u2 = {
206 .gpio_base = PCF_Uxx_BASE(0),
207 .setup = evm_led_setup,
208 .teardown = evm_led_teardown,
209};
210
211
212/* U18 - A/V clock generator and user switch */
213
214static int sw_gpio;
215
216static ssize_t
217sw_show(struct device *d, struct device_attribute *a, char *buf)
218{
219 char *s = gpio_get_value_cansleep(sw_gpio) ? "on\n" : "off\n";
220
221 strcpy(buf, s);
222 return strlen(s);
223}
224
225static DEVICE_ATTR(user_sw, S_IRUGO, sw_show, NULL);
226
227static int
228evm_u18_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
229{
230 int status;
231
232 /* export dip switch option */
233 sw_gpio = gpio + 7;
234 status = gpio_request(sw_gpio, "user_sw");
235 if (status == 0)
236 status = gpio_direction_input(sw_gpio);
237 if (status == 0)
238 status = device_create_file(&client->dev, &dev_attr_user_sw);
239 else
240 gpio_free(sw_gpio);
241 if (status != 0)
242 sw_gpio = -EINVAL;
243
244 /* audio PLL: 48 kHz (vs 44.1 or 32), single rate (vs double) */
245 gpio_request(gpio + 3, "pll_fs2");
246 gpio_direction_output(gpio + 3, 0);
247
248 gpio_request(gpio + 2, "pll_fs1");
249 gpio_direction_output(gpio + 2, 0);
250
251 gpio_request(gpio + 1, "pll_sr");
252 gpio_direction_output(gpio + 1, 0);
253
254 return 0;
255}
256
257static int
258evm_u18_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
259{
260 gpio_free(gpio + 1);
261 gpio_free(gpio + 2);
262 gpio_free(gpio + 3);
263
264 if (sw_gpio > 0) {
265 device_remove_file(&client->dev, &dev_attr_user_sw);
266 gpio_free(sw_gpio);
267 }
268 return 0;
269}
270
271static struct pcf857x_platform_data pcf_data_u18 = {
272 .gpio_base = PCF_Uxx_BASE(1),
273 .n_latch = (1 << 3) | (1 << 2) | (1 << 1),
274 .setup = evm_u18_setup,
275 .teardown = evm_u18_teardown,
93}; 276};
94 277
278
279/* U35 - various I/O signals used to manage USB, CF, ATA, etc */
280
281static int
282evm_u35_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
283{
284 /* p0 = nDRV_VBUS (initial: don't supply it) */
285 gpio_request(gpio + 0, "nDRV_VBUS");
286 gpio_direction_output(gpio + 0, 1);
287
288 /* p1 = VDDIMX_EN */
289 gpio_request(gpio + 1, "VDDIMX_EN");
290 gpio_direction_output(gpio + 1, 1);
291
292 /* p2 = VLYNQ_EN */
293 gpio_request(gpio + 2, "VLYNQ_EN");
294 gpio_direction_output(gpio + 2, 1);
295
296 /* p3 = n3V3_CF_RESET (initial: stay in reset) */
297 gpio_request(gpio + 3, "nCF_RESET");
298 gpio_direction_output(gpio + 3, 0);
299
300 /* (p4 unused) */
301
302 /* p5 = 1V8_WLAN_RESET (initial: stay in reset) */
303 gpio_request(gpio + 5, "WLAN_RESET");
304 gpio_direction_output(gpio + 5, 1);
305
306 /* p6 = nATA_SEL (initial: select) */
307 gpio_request(gpio + 6, "nATA_SEL");
308 gpio_direction_output(gpio + 6, 0);
309
310 /* p7 = nCF_SEL (initial: deselect) */
311 gpio_request(gpio + 7, "nCF_SEL");
312 gpio_direction_output(gpio + 7, 1);
313
314 return 0;
315}
316
317static int
318evm_u35_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
319{
320 gpio_free(gpio + 7);
321 gpio_free(gpio + 6);
322 gpio_free(gpio + 5);
323 gpio_free(gpio + 3);
324 gpio_free(gpio + 2);
325 gpio_free(gpio + 1);
326 gpio_free(gpio + 0);
327 return 0;
328}
329
330static struct pcf857x_platform_data pcf_data_u35 = {
331 .gpio_base = PCF_Uxx_BASE(2),
332 .setup = evm_u35_setup,
333 .teardown = evm_u35_teardown,
334};
335
336/*----------------------------------------------------------------------*/
337
338/* Most of this EEPROM is unused, but U-Boot uses some data:
339 * - 0x7f00, 6 bytes Ethernet Address
340 * - 0x0039, 1 byte NTSC vs PAL (bit 0x80 == PAL)
341 * - ... newer boards may have more
342 */
343static struct at24_platform_data eeprom_info = {
344 .byte_len = (256*1024) / 8,
345 .page_size = 64,
346 .flags = AT24_FLAG_ADDR16,
347};
348
349static struct i2c_board_info __initdata i2c_info[] = {
350 {
351 I2C_BOARD_INFO("pcf8574", 0x38),
352 .platform_data = &pcf_data_u2,
353 },
354 {
355 I2C_BOARD_INFO("pcf8574", 0x39),
356 .platform_data = &pcf_data_u18,
357 },
358 {
359 I2C_BOARD_INFO("pcf8574", 0x3a),
360 .platform_data = &pcf_data_u35,
361 },
362 {
363 I2C_BOARD_INFO("24c256", 0x50),
364 .platform_data = &eeprom_info,
365 },
366 /* ALSO:
367 * - tvl320aic33 audio codec (0x1b)
368 * - msp430 microcontroller (0x23)
369 * - tvp5146 video decoder (0x5d)
370 */
371};
372
373/* The msp430 uses a slow bitbanged I2C implementation (ergo 20 KHz),
374 * which requires 100 usec of idle bus after i2c writes sent to it.
375 */
376static struct davinci_i2c_platform_data i2c_pdata = {
377 .bus_freq = 20 /* kHz */,
378 .bus_delay = 100 /* usec */,
379};
380
381static void __init evm_init_i2c(void)
382{
383 davinci_init_i2c(&i2c_pdata);
384 i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
385}
386
95static struct platform_device *davinci_evm_devices[] __initdata = { 387static struct platform_device *davinci_evm_devices[] __initdata = {
96 &davinci_evm_flash_device, 388#if defined(CONFIG_MTD_PHYSMAP) || \
389 defined(CONFIG_MTD_PHYSMAP_MODULE)
390 &davinci_evm_norflash_device,
391#endif
392#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
393 defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
394 &ide_dev,
395#endif
97}; 396};
98 397
99static void __init 398static void __init
@@ -106,13 +405,21 @@ static __init void davinci_evm_init(void)
106{ 405{
107 davinci_psc_init(); 406 davinci_psc_init();
108 407
109#if defined(CONFIG_BLK_DEV_DAVINCI) || defined(CONFIG_BLK_DEV_DAVINCI_MODULE) 408#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
409 defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
410#if defined(CONFIG_MTD_PHYSMAP) || \
411 defined(CONFIG_MTD_PHYSMAP_MODULE)
110 printk(KERN_WARNING "WARNING: both IDE and NOR flash are enabled, " 412 printk(KERN_WARNING "WARNING: both IDE and NOR flash are enabled, "
111 "but share pins.\n\t Disable IDE for NOR support.\n"); 413 "but share pins.\n\t Disable IDE for NOR support.\n");
112#endif 414#endif
415#endif
113 416
114 platform_add_devices(davinci_evm_devices, 417 platform_add_devices(davinci_evm_devices,
115 ARRAY_SIZE(davinci_evm_devices)); 418 ARRAY_SIZE(davinci_evm_devices));
419 evm_init_i2c();
420
421 /* irlml6401 sustains over 3A, switches 5V in under 8 msec */
422 setup_usb(500, 8);
116} 423}
117 424
118static __init void davinci_evm_irq_init(void) 425static __init void davinci_evm_irq_init(void)
@@ -124,7 +431,7 @@ static __init void davinci_evm_irq_init(void)
124MACHINE_START(DAVINCI_EVM, "DaVinci EVM") 431MACHINE_START(DAVINCI_EVM, "DaVinci EVM")
125 /* Maintainer: MontaVista Software <source@mvista.com> */ 432 /* Maintainer: MontaVista Software <source@mvista.com> */
126 .phys_io = IO_PHYS, 433 .phys_io = IO_PHYS,
127 .io_pg_offst = (io_p2v(IO_PHYS) >> 18) & 0xfffc, 434 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
128 .boot_params = (DAVINCI_DDR_BASE + 0x100), 435 .boot_params = (DAVINCI_DDR_BASE + 0x100),
129 .map_io = davinci_evm_map_io, 436 .map_io = davinci_evm_map_io,
130 .init_irq = davinci_evm_irq_init, 437 .init_irq = davinci_evm_irq_init,
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
index d46c69b55aaa..28f6dbc95bd7 100644
--- a/arch/arm/mach-davinci/clock.c
+++ b/arch/arm/mach-davinci/clock.c
@@ -16,9 +16,9 @@
16#include <linux/err.h> 16#include <linux/err.h>
17#include <linux/mutex.h> 17#include <linux/mutex.h>
18#include <linux/platform_device.h> 18#include <linux/platform_device.h>
19#include <linux/io.h>
19 20
20#include <mach/hardware.h> 21#include <mach/hardware.h>
21#include <asm/io.h>
22 22
23#include <mach/psc.h> 23#include <mach/psc.h>
24#include "clock.h" 24#include "clock.h"
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
new file mode 100644
index 000000000000..3d4b1de8f898
--- /dev/null
+++ b/arch/arm/mach-davinci/devices.c
@@ -0,0 +1,48 @@
1/*
2 * mach-davinci/devices.c
3 *
4 * DaVinci platform device setup/initialization
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/platform_device.h>
16#include <linux/dma-mapping.h>
17#include <linux/io.h>
18
19#include <asm/mach/map.h>
20
21#include <mach/hardware.h>
22#include <mach/i2c.h>
23
24static struct resource i2c_resources[] = {
25 {
26 .start = DAVINCI_I2C_BASE,
27 .end = DAVINCI_I2C_BASE + 0x40,
28 .flags = IORESOURCE_MEM,
29 },
30 {
31 .start = IRQ_I2C,
32 .flags = IORESOURCE_IRQ,
33 },
34};
35
36static struct platform_device davinci_i2c_device = {
37 .name = "i2c_davinci",
38 .id = 1,
39 .num_resources = ARRAY_SIZE(i2c_resources),
40 .resource = i2c_resources,
41};
42
43void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata)
44{
45 davinci_i2c_device.dev.platform_data = pdata;
46 (void) platform_device_register(&davinci_i2c_device);
47}
48
diff --git a/arch/arm/mach-davinci/gpio.c b/arch/arm/mach-davinci/gpio.c
index c9cb4f09b18f..b49e9d092aab 100644
--- a/arch/arm/mach-davinci/gpio.c
+++ b/arch/arm/mach-davinci/gpio.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * TI DaVinci GPIO Support 2 * TI DaVinci GPIO Support
3 * 3 *
4 * Copyright (c) 2006 David Brownell 4 * Copyright (c) 2006-2007 David Brownell
5 * Copyright (c) 2007, MontaVista Software, Inc. <source@mvista.com> 5 * Copyright (c) 2007, MontaVista Software, Inc. <source@mvista.com>
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
@@ -26,47 +26,45 @@
26 26
27#include <asm/mach/irq.h> 27#include <asm/mach/irq.h>
28 28
29static DEFINE_SPINLOCK(gpio_lock);
30static DECLARE_BITMAP(gpio_in_use, DAVINCI_N_GPIO);
31 29
32int gpio_request(unsigned gpio, const char *tag) 30static DEFINE_SPINLOCK(gpio_lock);
33{
34 if (gpio >= DAVINCI_N_GPIO)
35 return -EINVAL;
36 31
37 if (test_and_set_bit(gpio, gpio_in_use)) 32struct davinci_gpio {
38 return -EBUSY; 33 struct gpio_chip chip;
34 struct gpio_controller *__iomem regs;
35};
39 36
40 return 0; 37static struct davinci_gpio chips[DIV_ROUND_UP(DAVINCI_N_GPIO, 32)];
41}
42EXPORT_SYMBOL(gpio_request);
43 38
44void gpio_free(unsigned gpio)
45{
46 if (gpio >= DAVINCI_N_GPIO)
47 return;
48
49 clear_bit(gpio, gpio_in_use);
50}
51EXPORT_SYMBOL(gpio_free);
52 39
53/* create a non-inlined version */ 40/* create a non-inlined version */
54static struct gpio_controller *__iomem gpio2controller(unsigned gpio) 41static struct gpio_controller *__iomem __init gpio2controller(unsigned gpio)
55{ 42{
56 return __gpio_to_controller(gpio); 43 return __gpio_to_controller(gpio);
57} 44}
58 45
46
47/*--------------------------------------------------------------------------*/
48
59/* 49/*
60 * Assuming the pin is muxed as a gpio output, set its output value. 50 * board setup code *MUST* set PINMUX0 and PINMUX1 as
51 * needed, and enable the GPIO clock.
61 */ 52 */
62void __gpio_set(unsigned gpio, int value) 53
54static int davinci_direction_in(struct gpio_chip *chip, unsigned offset)
63{ 55{
64 struct gpio_controller *__iomem g = gpio2controller(gpio); 56 struct davinci_gpio *d = container_of(chip, struct davinci_gpio, chip);
57 struct gpio_controller *__iomem g = d->regs;
58 u32 temp;
65 59
66 __raw_writel(__gpio_mask(gpio), value ? &g->set_data : &g->clr_data); 60 spin_lock(&gpio_lock);
67} 61 temp = __raw_readl(&g->dir);
68EXPORT_SYMBOL(__gpio_set); 62 temp |= (1 << offset);
63 __raw_writel(temp, &g->dir);
64 spin_unlock(&gpio_lock);
69 65
66 return 0;
67}
70 68
71/* 69/*
72 * Read the pin's value (works even if it's set up as output); 70 * Read the pin's value (works even if it's set up as output);
@@ -75,61 +73,72 @@ EXPORT_SYMBOL(__gpio_set);
75 * Note that changes are synched to the GPIO clock, so reading values back 73 * Note that changes are synched to the GPIO clock, so reading values back
76 * right after you've set them may give old values. 74 * right after you've set them may give old values.
77 */ 75 */
78int __gpio_get(unsigned gpio) 76static int davinci_gpio_get(struct gpio_chip *chip, unsigned offset)
79{ 77{
80 struct gpio_controller *__iomem g = gpio2controller(gpio); 78 struct davinci_gpio *d = container_of(chip, struct davinci_gpio, chip);
79 struct gpio_controller *__iomem g = d->regs;
81 80
82 return !!(__gpio_mask(gpio) & __raw_readl(&g->in_data)); 81 return (1 << offset) & __raw_readl(&g->in_data);
83} 82}
84EXPORT_SYMBOL(__gpio_get);
85 83
86 84static int
87/*--------------------------------------------------------------------------*/ 85davinci_direction_out(struct gpio_chip *chip, unsigned offset, int value)
88
89/*
90 * board setup code *MUST* set PINMUX0 and PINMUX1 as
91 * needed, and enable the GPIO clock.
92 */
93
94int gpio_direction_input(unsigned gpio)
95{ 86{
96 struct gpio_controller *__iomem g = gpio2controller(gpio); 87 struct davinci_gpio *d = container_of(chip, struct davinci_gpio, chip);
88 struct gpio_controller *__iomem g = d->regs;
97 u32 temp; 89 u32 temp;
98 u32 mask; 90 u32 mask = 1 << offset;
99
100 if (!g)
101 return -EINVAL;
102 91
103 spin_lock(&gpio_lock); 92 spin_lock(&gpio_lock);
104 mask = __gpio_mask(gpio);
105 temp = __raw_readl(&g->dir); 93 temp = __raw_readl(&g->dir);
106 temp |= mask; 94 temp &= ~mask;
95 __raw_writel(mask, value ? &g->set_data : &g->clr_data);
107 __raw_writel(temp, &g->dir); 96 __raw_writel(temp, &g->dir);
108 spin_unlock(&gpio_lock); 97 spin_unlock(&gpio_lock);
109 return 0; 98 return 0;
110} 99}
111EXPORT_SYMBOL(gpio_direction_input);
112 100
113int gpio_direction_output(unsigned gpio, int value) 101/*
102 * Assuming the pin is muxed as a gpio output, set its output value.
103 */
104static void
105davinci_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
114{ 106{
115 struct gpio_controller *__iomem g = gpio2controller(gpio); 107 struct davinci_gpio *d = container_of(chip, struct davinci_gpio, chip);
116 u32 temp; 108 struct gpio_controller *__iomem g = d->regs;
117 u32 mask;
118 109
119 if (!g) 110 __raw_writel((1 << offset), value ? &g->set_data : &g->clr_data);
120 return -EINVAL; 111}
112
113static int __init davinci_gpio_setup(void)
114{
115 int i, base;
116
117 for (i = 0, base = 0;
118 i < ARRAY_SIZE(chips);
119 i++, base += 32) {
120 chips[i].chip.label = "DaVinci";
121
122 chips[i].chip.direction_input = davinci_direction_in;
123 chips[i].chip.get = davinci_gpio_get;
124 chips[i].chip.direction_output = davinci_direction_out;
125 chips[i].chip.set = davinci_gpio_set;
126
127 chips[i].chip.base = base;
128 chips[i].chip.ngpio = DAVINCI_N_GPIO - base;
129 if (chips[i].chip.ngpio > 32)
130 chips[i].chip.ngpio = 32;
131
132 chips[i].regs = gpio2controller(base);
133
134 gpiochip_add(&chips[i].chip);
135 }
121 136
122 spin_lock(&gpio_lock);
123 mask = __gpio_mask(gpio);
124 temp = __raw_readl(&g->dir);
125 temp &= ~mask;
126 __raw_writel(mask, value ? &g->set_data : &g->clr_data);
127 __raw_writel(temp, &g->dir);
128 spin_unlock(&gpio_lock);
129 return 0; 137 return 0;
130} 138}
131EXPORT_SYMBOL(gpio_direction_output); 139pure_initcall(davinci_gpio_setup);
132 140
141/*--------------------------------------------------------------------------*/
133/* 142/*
134 * We expect irqs will normally be set up as input pins, but they can also be 143 * We expect irqs will normally be set up as input pins, but they can also be
135 * used as output pins ... which is convenient for testing. 144 * used as output pins ... which is convenient for testing.
@@ -201,7 +210,6 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc)
201 desc->chip->ack(irq); 210 desc->chip->ack(irq);
202 while (1) { 211 while (1) {
203 u32 status; 212 u32 status;
204 struct irq_desc *gpio;
205 int n; 213 int n;
206 int res; 214 int res;
207 215
@@ -215,12 +223,10 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc)
215 223
216 /* now demux them to the right lowlevel handler */ 224 /* now demux them to the right lowlevel handler */
217 n = (int)get_irq_data(irq); 225 n = (int)get_irq_data(irq);
218 gpio = &irq_desc[n];
219 while (status) { 226 while (status) {
220 res = ffs(status); 227 res = ffs(status);
221 n += res; 228 n += res;
222 gpio += res; 229 generic_handle_irq(n - 1);
223 desc_handle_irq(n - 1, gpio - 1);
224 status >>= res; 230 status >>= res;
225 } 231 }
226 } 232 }
diff --git a/arch/arm/mach-davinci/id.c b/arch/arm/mach-davinci/id.c
index 70608f76aed8..bf067d604918 100644
--- a/arch/arm/mach-davinci/id.c
+++ b/arch/arm/mach-davinci/id.c
@@ -13,8 +13,7 @@
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/init.h> 15#include <linux/init.h>
16 16#include <linux/io.h>
17#include <asm/io.h>
18 17
19#define JTAG_ID_BASE 0x01c40028 18#define JTAG_ID_BASE 0x01c40028
20 19
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index a97dfbb15e57..4b522e5c70ec 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -16,4 +16,7 @@ struct sys_timer;
16 16
17extern struct sys_timer davinci_timer; 17extern struct sys_timer davinci_timer;
18 18
19/* parameters describe VBUS sourcing for host mode */
20extern void setup_usb(unsigned mA, unsigned potpgt_msec);
21
19#endif /* __ARCH_ARM_MACH_DAVINCI_COMMON_H */ 22#endif /* __ARCH_ARM_MACH_DAVINCI_COMMON_H */
diff --git a/arch/arm/mach-davinci/include/mach/gpio.h b/arch/arm/mach-davinci/include/mach/gpio.h
index ec151ccf1e8f..b3a2961f0f46 100644
--- a/arch/arm/mach-davinci/include/mach/gpio.h
+++ b/arch/arm/mach-davinci/include/mach/gpio.h
@@ -14,6 +14,7 @@
14#define __DAVINCI_GPIO_H 14#define __DAVINCI_GPIO_H
15 15
16#include <linux/io.h> 16#include <linux/io.h>
17#include <asm-generic/gpio.h>
17#include <mach/hardware.h> 18#include <mach/hardware.h>
18 19
19/* 20/*
@@ -27,13 +28,16 @@
27 * need to pay attention to PINMUX0 and PINMUX1 to be sure those pins are 28 * need to pay attention to PINMUX0 and PINMUX1 to be sure those pins are
28 * used as gpios, not with other peripherals. 29 * used as gpios, not with other peripherals.
29 * 30 *
30 * GPIOs are numbered 0..(DAVINCI_N_GPIO-1). For documentation, and maybe 31 * On-chip GPIOs are numbered 0..(DAVINCI_N_GPIO-1). For documentation,
31 * for later updates, code should write GPIO(N) or: 32 * and maybe for later updates, code should write GPIO(N) or:
32 * - GPIOV18(N) for 1.8V pins, N in 0..53; same as GPIO(0)..GPIO(53) 33 * - GPIOV18(N) for 1.8V pins, N in 0..53; same as GPIO(0)..GPIO(53)
33 * - GPIOV33(N) for 3.3V pins, N in 0..17; same as GPIO(54)..GPIO(70) 34 * - GPIOV33(N) for 3.3V pins, N in 0..17; same as GPIO(54)..GPIO(70)
34 * 35 *
35 * For GPIO IRQs use gpio_to_irq(GPIO(N)) or gpio_to_irq(GPIOV33(N)) etc 36 * For GPIO IRQs use gpio_to_irq(GPIO(N)) or gpio_to_irq(GPIOV33(N)) etc
36 * for now, that's != GPIO(N) 37 * for now, that's != GPIO(N)
38 *
39 * GPIOs can also be on external chips, numbered after the ones built-in
40 * to the DaVinci chip. For now, they won't be usable as IRQ sources.
37 */ 41 */
38#define GPIO(X) (X) /* 0 <= X <= 70 */ 42#define GPIO(X) (X) /* 0 <= X <= 70 */
39#define GPIOV18(X) (X) /* 1.8V i/o; 0 <= X <= 53 */ 43#define GPIOV18(X) (X) /* 1.8V i/o; 0 <= X <= 53 */
@@ -67,11 +71,11 @@ __gpio_to_controller(unsigned gpio)
67 void *__iomem ptr; 71 void *__iomem ptr;
68 72
69 if (gpio < 32) 73 if (gpio < 32)
70 ptr = (void *__iomem)IO_ADDRESS(DAVINCI_GPIO_BASE + 0x10); 74 ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x10);
71 else if (gpio < 64) 75 else if (gpio < 64)
72 ptr = (void *__iomem)IO_ADDRESS(DAVINCI_GPIO_BASE + 0x38); 76 ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x38);
73 else if (gpio < DAVINCI_N_GPIO) 77 else if (gpio < DAVINCI_N_GPIO)
74 ptr = (void *__iomem)IO_ADDRESS(DAVINCI_GPIO_BASE + 0x60); 78 ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x60);
75 else 79 else
76 ptr = NULL; 80 ptr = NULL;
77 return ptr; 81 return ptr;
@@ -83,25 +87,17 @@ static inline u32 __gpio_mask(unsigned gpio)
83} 87}
84 88
85/* The get/set/clear functions will inline when called with constant 89/* The get/set/clear functions will inline when called with constant
86 * parameters, for low-overhead bitbanging. Illegal constant parameters 90 * parameters referencing built-in GPIOs, for low-overhead bitbanging.
87 * cause link-time errors.
88 * 91 *
89 * Otherwise, calls with variable parameters use outlined functions. 92 * Otherwise, calls with variable parameters or referencing external
93 * GPIOs (e.g. on GPIO expander chips) use outlined functions.
90 */ 94 */
91extern int __error_inval_gpio(void);
92
93extern void __gpio_set(unsigned gpio, int value);
94extern int __gpio_get(unsigned gpio);
95
96static inline void gpio_set_value(unsigned gpio, int value) 95static inline void gpio_set_value(unsigned gpio, int value)
97{ 96{
98 if (__builtin_constant_p(value)) { 97 if (__builtin_constant_p(value) && gpio < DAVINCI_N_GPIO) {
99 struct gpio_controller *__iomem g; 98 struct gpio_controller *__iomem g;
100 u32 mask; 99 u32 mask;
101 100
102 if (gpio >= DAVINCI_N_GPIO)
103 __error_inval_gpio();
104
105 g = __gpio_to_controller(gpio); 101 g = __gpio_to_controller(gpio);
106 mask = __gpio_mask(gpio); 102 mask = __gpio_mask(gpio);
107 if (value) 103 if (value)
@@ -111,48 +107,47 @@ static inline void gpio_set_value(unsigned gpio, int value)
111 return; 107 return;
112 } 108 }
113 109
114 __gpio_set(gpio, value); 110 __gpio_set_value(gpio, value);
115} 111}
116 112
117/* Returns zero or nonzero; works for gpios configured as inputs OR 113/* Returns zero or nonzero; works for gpios configured as inputs OR
118 * as outputs. 114 * as outputs, at least for built-in GPIOs.
119 * 115 *
120 * NOTE: changes in reported values are synchronized to the GPIO clock. 116 * NOTE: for built-in GPIOs, changes in reported values are synchronized
121 * This is most easily seen after calling gpio_set_value() and then immediatly 117 * to the GPIO clock. This is easily seen after calling gpio_set_value()
122 * gpio_get_value(), where the gpio_get_value() would return the old value 118 * and then immediately gpio_get_value(), where the gpio_get_value() will
123 * until the GPIO clock ticks and the new value gets latched. 119 * return the old value until the GPIO clock ticks and the new value gets
120 * latched.
124 */ 121 */
125
126static inline int gpio_get_value(unsigned gpio) 122static inline int gpio_get_value(unsigned gpio)
127{ 123{
128 struct gpio_controller *__iomem g; 124 struct gpio_controller *__iomem g;
129
130 if (!__builtin_constant_p(gpio))
131 return __gpio_get(gpio);
132 125
133 if (gpio >= DAVINCI_N_GPIO) 126 if (!__builtin_constant_p(gpio) || gpio >= DAVINCI_N_GPIO)
134 return __error_inval_gpio(); 127 return __gpio_get_value(gpio);
135 128
136 g = __gpio_to_controller(gpio); 129 g = __gpio_to_controller(gpio);
137 return !!(__gpio_mask(gpio) & __raw_readl(&g->in_data)); 130 return __gpio_mask(gpio) & __raw_readl(&g->in_data);
138} 131}
139 132
140/* powerup default direction is IN */ 133static inline int gpio_cansleep(unsigned gpio)
141extern int gpio_direction_input(unsigned gpio); 134{
142extern int gpio_direction_output(unsigned gpio, int value); 135 if (__builtin_constant_p(gpio) && gpio < DAVINCI_N_GPIO)
143 136 return 0;
144#include <asm-generic/gpio.h> /* cansleep wrappers */ 137 else
145 138 return __gpio_cansleep(gpio);
146extern int gpio_request(unsigned gpio, const char *tag); 139}
147extern void gpio_free(unsigned gpio);
148 140
149static inline int gpio_to_irq(unsigned gpio) 141static inline int gpio_to_irq(unsigned gpio)
150{ 142{
143 if (gpio >= DAVINCI_N_GPIO)
144 return -EINVAL;
151 return DAVINCI_N_AINTC_IRQ + gpio; 145 return DAVINCI_N_AINTC_IRQ + gpio;
152} 146}
153 147
154static inline int irq_to_gpio(unsigned irq) 148static inline int irq_to_gpio(unsigned irq)
155{ 149{
150 /* caller guarantees gpio_to_irq() succeeded */
156 return irq - DAVINCI_N_AINTC_IRQ; 151 return irq - DAVINCI_N_AINTC_IRQ;
157} 152}
158 153
diff --git a/arch/arm/mach-davinci/include/mach/i2c.h b/arch/arm/mach-davinci/include/mach/i2c.h
index e2f54168abd1..c248e9b7e825 100644
--- a/arch/arm/mach-davinci/include/mach/i2c.h
+++ b/arch/arm/mach-davinci/include/mach/i2c.h
@@ -14,8 +14,11 @@
14 14
15/* All frequencies are expressed in kHz */ 15/* All frequencies are expressed in kHz */
16struct davinci_i2c_platform_data { 16struct davinci_i2c_platform_data {
17 unsigned int bus_freq; /* standard bus frequency */ 17 unsigned int bus_freq; /* standard bus frequency (kHz) */
18 unsigned int bus_delay; /* transaction delay */ 18 unsigned int bus_delay; /* post-transaction delay (usec) */
19}; 19};
20 20
21/* for board setup code */
22void davinci_init_i2c(struct davinci_i2c_platform_data *);
23
21#endif /* __ASM_ARCH_I2C_H */ 24#endif /* __ASM_ARCH_I2C_H */
diff --git a/arch/arm/mach-davinci/include/mach/io.h b/arch/arm/mach-davinci/include/mach/io.h
index e7accb910864..b78ee9140496 100644
--- a/arch/arm/mach-davinci/include/mach/io.h
+++ b/arch/arm/mach-davinci/include/mach/io.h
@@ -22,9 +22,8 @@
22#define IO_OFFSET 0xfd000000 /* Virtual IO = 0xfec00000 */ 22#define IO_OFFSET 0xfd000000 /* Virtual IO = 0xfec00000 */
23#define IO_SIZE 0x00400000 23#define IO_SIZE 0x00400000
24#define IO_VIRT (IO_PHYS + IO_OFFSET) 24#define IO_VIRT (IO_PHYS + IO_OFFSET)
25#define io_p2v(pa) ((pa) + IO_OFFSET)
26#define io_v2p(va) ((va) - IO_OFFSET) 25#define io_v2p(va) ((va) - IO_OFFSET)
27#define IO_ADDRESS(x) io_p2v(x) 26#define __IO_ADDRESS(x) ((x) + IO_OFFSET)
28 27
29/* 28/*
30 * We don't actually have real ISA nor PCI buses, but there is so many 29 * We don't actually have real ISA nor PCI buses, but there is so many
@@ -35,7 +34,12 @@
35#define __mem_pci(a) (a) 34#define __mem_pci(a) (a)
36#define __mem_isa(a) (a) 35#define __mem_isa(a) (a)
37 36
38#ifndef __ASSEMBLER__ 37#define IO_ADDRESS(pa) IOMEM(__IO_ADDRESS(pa))
38
39#ifdef __ASSEMBLER__
40#define IOMEM(x) x
41#else
42#define IOMEM(x) ((void __force __iomem *)(x))
39 43
40/* 44/*
41 * Functions to access the DaVinci IO region 45 * Functions to access the DaVinci IO region
@@ -46,34 +50,13 @@
46 * - DO NOT use hardcoded virtual addresses to allow changing the 50 * - DO NOT use hardcoded virtual addresses to allow changing the
47 * IO address space again if needed 51 * IO address space again if needed
48 */ 52 */
49#define davinci_readb(a) (*(volatile unsigned char *)IO_ADDRESS(a)) 53#define davinci_readb(a) __raw_readb(IO_ADDRESS(a))
50#define davinci_readw(a) (*(volatile unsigned short *)IO_ADDRESS(a)) 54#define davinci_readw(a) __raw_readw(IO_ADDRESS(a))
51#define davinci_readl(a) (*(volatile unsigned int *)IO_ADDRESS(a)) 55#define davinci_readl(a) __raw_readl(IO_ADDRESS(a))
52
53#define davinci_writeb(v,a) (*(volatile unsigned char *)IO_ADDRESS(a) = (v))
54#define davinci_writew(v,a) (*(volatile unsigned short *)IO_ADDRESS(a) = (v))
55#define davinci_writel(v,a) (*(volatile unsigned int *)IO_ADDRESS(a) = (v))
56
57/* 16 bit uses LDRH/STRH, base +/- offset_8 */
58typedef struct { volatile u16 offset[256]; } __regbase16;
59#define __REGV16(vaddr) ((__regbase16 *)((vaddr)&~0xff)) \
60 ->offset[((vaddr)&0xff)>>1]
61#define __REG16(paddr) __REGV16(io_p2v(paddr))
62
63/* 8/32 bit uses LDR/STR, base +/- offset_12 */
64typedef struct { volatile u8 offset[4096]; } __regbase8;
65#define __REGV8(vaddr) ((__regbase8 *)((vaddr)&~4095)) \
66 ->offset[((vaddr)&4095)>>0]
67#define __REG8(paddr) __REGV8(io_p2v(paddr))
68
69typedef struct { volatile u32 offset[4096]; } __regbase32;
70#define __REGV32(vaddr) ((__regbase32 *)((vaddr)&~4095)) \
71 ->offset[((vaddr)&4095)>>2]
72
73#define __REG(paddr) __REGV32(io_p2v(paddr))
74#else
75 56
76#define __REG(x) (*((volatile unsigned long *)io_p2v(x))) 57#define davinci_writeb(v, a) __raw_writeb(v, IO_ADDRESS(a))
58#define davinci_writew(v, a) __raw_writew(v, IO_ADDRESS(a))
59#define davinci_writel(v, a) __raw_writel(v, IO_ADDRESS(a))
77 60
78#endif /* __ASSEMBLER__ */ 61#endif /* __ASSEMBLER__ */
79#endif /* __ASM_ARCH_IO_H */ 62#endif /* __ASM_ARCH_IO_H */
diff --git a/arch/arm/mach-davinci/include/mach/system.h b/arch/arm/mach-davinci/include/mach/system.h
index 84ff77aeb738..17ca41dc2c53 100644
--- a/arch/arm/mach-davinci/include/mach/system.h
+++ b/arch/arm/mach-davinci/include/mach/system.h
@@ -11,7 +11,7 @@
11#ifndef __ASM_ARCH_SYSTEM_H 11#ifndef __ASM_ARCH_SYSTEM_H
12#define __ASM_ARCH_SYSTEM_H 12#define __ASM_ARCH_SYSTEM_H
13 13
14#include <asm/io.h> 14#include <linux/io.h>
15#include <mach/hardware.h> 15#include <mach/hardware.h>
16 16
17extern void davinci_watchdog_reset(void); 17extern void davinci_watchdog_reset(void);
diff --git a/arch/arm/mach-davinci/io.c b/arch/arm/mach-davinci/io.c
index 5bb66b61c1a3..299515f70b8b 100644
--- a/arch/arm/mach-davinci/io.c
+++ b/arch/arm/mach-davinci/io.c
@@ -11,9 +11,9 @@
11#include <linux/module.h> 11#include <linux/module.h>
12#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/io.h>
14 15
15#include <asm/tlb.h> 16#include <asm/tlb.h>
16#include <asm/io.h>
17#include <asm/memory.h> 17#include <asm/memory.h>
18 18
19#include <asm/mach/map.h> 19#include <asm/mach/map.h>
diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
index 12ca9f29f847..38021af8359a 100644
--- a/arch/arm/mach-davinci/irq.c
+++ b/arch/arm/mach-davinci/irq.c
@@ -22,9 +22,9 @@
22#include <linux/init.h> 22#include <linux/init.h>
23#include <linux/interrupt.h> 23#include <linux/interrupt.h>
24#include <linux/irq.h> 24#include <linux/irq.h>
25#include <linux/io.h>
25 26
26#include <mach/hardware.h> 27#include <mach/hardware.h>
27#include <asm/io.h>
28#include <asm/mach/irq.h> 28#include <asm/mach/irq.h>
29 29
30#define IRQ_BIT(irq) ((irq) & 0x1f) 30#define IRQ_BIT(irq) ((irq) & 0x1f)
diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c
index aa2fc375a325..58754f066d5b 100644
--- a/arch/arm/mach-davinci/psc.c
+++ b/arch/arm/mach-davinci/psc.c
@@ -21,8 +21,8 @@
21#include <linux/kernel.h> 21#include <linux/kernel.h>
22#include <linux/module.h> 22#include <linux/module.h>
23#include <linux/init.h> 23#include <linux/init.h>
24#include <linux/io.h>
24 25
25#include <asm/io.h>
26#include <mach/hardware.h> 26#include <mach/hardware.h>
27#include <mach/psc.h> 27#include <mach/psc.h>
28#include <mach/mux.h> 28#include <mach/mux.h>
diff --git a/arch/arm/mach-davinci/serial.c b/arch/arm/mach-davinci/serial.c
index caf101e2cc62..3010f9971255 100644
--- a/arch/arm/mach-davinci/serial.c
+++ b/arch/arm/mach-davinci/serial.c
@@ -26,8 +26,8 @@
26#include <linux/platform_device.h> 26#include <linux/platform_device.h>
27#include <linux/delay.h> 27#include <linux/delay.h>
28#include <linux/clk.h> 28#include <linux/clk.h>
29#include <linux/io.h>
29 30
30#include <asm/io.h>
31#include <asm/irq.h> 31#include <asm/irq.h>
32#include <mach/hardware.h> 32#include <mach/hardware.h>
33#include <mach/serial.h> 33#include <mach/serial.h>
diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c
index 206e80d41717..3b9a296b5c4b 100644
--- a/arch/arm/mach-davinci/time.c
+++ b/arch/arm/mach-davinci/time.c
@@ -15,8 +15,8 @@
15#include <linux/clocksource.h> 15#include <linux/clocksource.h>
16#include <linux/clockchips.h> 16#include <linux/clockchips.h>
17#include <linux/spinlock.h> 17#include <linux/spinlock.h>
18#include <linux/io.h>
18 19
19#include <asm/io.h>
20#include <mach/hardware.h> 20#include <mach/hardware.h>
21#include <asm/system.h> 21#include <asm/system.h>
22#include <asm/irq.h> 22#include <asm/irq.h>
diff --git a/arch/arm/mach-davinci/usb.c b/arch/arm/mach-davinci/usb.c
new file mode 100644
index 000000000000..fe182a85159c
--- /dev/null
+++ b/arch/arm/mach-davinci/usb.c
@@ -0,0 +1,116 @@
1/*
2 * USB
3 */
4#include <linux/kernel.h>
5#include <linux/module.h>
6#include <linux/init.h>
7#include <linux/platform_device.h>
8#include <linux/dma-mapping.h>
9
10#include <linux/usb/musb.h>
11#include <linux/usb/otg.h>
12
13#include <mach/common.h>
14#include <mach/hardware.h>
15
16#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
17static struct musb_hdrc_eps_bits musb_eps[] = {
18 { "ep1_tx", 8, },
19 { "ep1_rx", 8, },
20 { "ep2_tx", 8, },
21 { "ep2_rx", 8, },
22 { "ep3_tx", 5, },
23 { "ep3_rx", 5, },
24 { "ep4_tx", 5, },
25 { "ep4_rx", 5, },
26};
27
28static struct musb_hdrc_config musb_config = {
29 .multipoint = true,
30 .dyn_fifo = true,
31 .soft_con = true,
32 .dma = true,
33
34 .num_eps = 5,
35 .dma_channels = 8,
36 .ram_bits = 10,
37 .eps_bits = musb_eps,
38};
39
40static struct musb_hdrc_platform_data usb_data = {
41#if defined(CONFIG_USB_MUSB_OTG)
42 /* OTG requires a Mini-AB connector */
43 .mode = MUSB_OTG,
44#elif defined(CONFIG_USB_MUSB_PERIPHERAL)
45 .mode = MUSB_PERIPHERAL,
46#elif defined(CONFIG_USB_MUSB_HOST)
47 .mode = MUSB_HOST,
48#endif
49 .config = &musb_config,
50};
51
52static struct resource usb_resources[] = {
53 {
54 /* physical address */
55 .start = DAVINCI_USB_OTG_BASE,
56 .end = DAVINCI_USB_OTG_BASE + 0x5ff,
57 .flags = IORESOURCE_MEM,
58 },
59 {
60 .start = IRQ_USBINT,
61 .flags = IORESOURCE_IRQ,
62 },
63};
64
65static u64 usb_dmamask = DMA_32BIT_MASK;
66
67static struct platform_device usb_dev = {
68 .name = "musb_hdrc",
69 .id = -1,
70 .dev = {
71 .platform_data = &usb_data,
72 .dma_mask = &usb_dmamask,
73 .coherent_dma_mask = DMA_32BIT_MASK,
74 },
75 .resource = usb_resources,
76 .num_resources = ARRAY_SIZE(usb_resources),
77};
78
79#ifdef CONFIG_USB_MUSB_OTG
80
81static struct otg_transceiver *xceiv;
82
83struct otg_transceiver *otg_get_transceiver(void)
84{
85 if (xceiv)
86 get_device(xceiv->dev);
87 return xceiv;
88}
89EXPORT_SYMBOL(otg_get_transceiver);
90
91int otg_set_transceiver(struct otg_transceiver *x)
92{
93 if (xceiv && x)
94 return -EBUSY;
95 xceiv = x;
96 return 0;
97}
98EXPORT_SYMBOL(otg_set_transceiver);
99
100#endif
101
102void __init setup_usb(unsigned mA, unsigned potpgt_msec)
103{
104 usb_data.power = mA / 2;
105 usb_data.potpgt = potpgt_msec / 2;
106 platform_device_register(&usb_dev);
107}
108
109#else
110
111void __init setup_usb(unsigned mA, unsigned potpgt_msec)
112{
113}
114
115#endif /* CONFIG_USB_MUSB_HDRC */
116
diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c
index 65cc7c271917..c7bc7fbb11a6 100644
--- a/arch/arm/mach-ebsa110/core.c
+++ b/arch/arm/mach-ebsa110/core.c
@@ -14,10 +14,10 @@
14#include <linux/interrupt.h> 14#include <linux/interrupt.h>
15#include <linux/serial_8250.h> 15#include <linux/serial_8250.h>
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/io.h>
17 18
18#include <mach/hardware.h> 19#include <mach/hardware.h>
19#include <asm/irq.h> 20#include <asm/irq.h>
20#include <asm/io.h>
21#include <asm/setup.h> 21#include <asm/setup.h>
22#include <asm/mach-types.h> 22#include <asm/mach-types.h>
23#include <asm/pgtable.h> 23#include <asm/pgtable.h>
diff --git a/arch/arm/mach-ebsa110/io.c b/arch/arm/mach-ebsa110/io.c
index 53748f5462e9..c52e3047a7eb 100644
--- a/arch/arm/mach-ebsa110/io.c
+++ b/arch/arm/mach-ebsa110/io.c
@@ -23,9 +23,9 @@
23#include <linux/module.h> 23#include <linux/module.h>
24#include <linux/kernel.h> 24#include <linux/kernel.h>
25#include <linux/types.h> 25#include <linux/types.h>
26#include <linux/io.h>
26 27
27#include <mach/hardware.h> 28#include <mach/hardware.h>
28#include <asm/io.h>
29#include <asm/page.h> 29#include <asm/page.h>
30 30
31static void __iomem *__isamem_convert_addr(const volatile void __iomem *addr) 31static void __iomem *__isamem_convert_addr(const volatile void __iomem *addr)
diff --git a/arch/arm/mach-ep93xx/Kconfig b/arch/arm/mach-ep93xx/Kconfig
index ea8549bfbef2..5a1b8c05c958 100644
--- a/arch/arm/mach-ep93xx/Kconfig
+++ b/arch/arm/mach-ep93xx/Kconfig
@@ -88,6 +88,20 @@ config MACH_TS72XX
88 Say 'Y' here if you want your kernel to support the 88 Say 'Y' here if you want your kernel to support the
89 Technologic Systems TS-72xx board. 89 Technologic Systems TS-72xx board.
90 90
91choice
92 prompt "Select a UART for early kernel messages"
93
94config EP93XX_EARLY_UART1
95 bool "UART1"
96
97config EP93XX_EARLY_UART2
98 bool "UART2"
99
100config EP93XX_EARLY_UART3
101 bool "UART3"
102
103endchoice
104
91endmenu 105endmenu
92 106
93endif 107endif
diff --git a/arch/arm/mach-ep93xx/adssphere.c b/arch/arm/mach-ep93xx/adssphere.c
index aa1fb352fb8f..561db73ec1ae 100644
--- a/arch/arm/mach-ep93xx/adssphere.c
+++ b/arch/arm/mach-ep93xx/adssphere.c
@@ -18,7 +18,7 @@
18#include <linux/ioport.h> 18#include <linux/ioport.h>
19#include <linux/mtd/physmap.h> 19#include <linux/mtd/physmap.h>
20#include <linux/platform_device.h> 20#include <linux/platform_device.h>
21#include <asm/io.h> 21#include <linux/io.h>
22#include <mach/hardware.h> 22#include <mach/hardware.h>
23#include <asm/mach-types.h> 23#include <asm/mach-types.h>
24#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
@@ -47,36 +47,12 @@ static struct ep93xx_eth_data adssphere_eth_data = {
47 .phy_id = 1, 47 .phy_id = 1,
48}; 48};
49 49
50static struct resource adssphere_eth_resource[] = {
51 {
52 .start = EP93XX_ETHERNET_PHYS_BASE,
53 .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff,
54 .flags = IORESOURCE_MEM,
55 }, {
56 .start = IRQ_EP93XX_ETHERNET,
57 .end = IRQ_EP93XX_ETHERNET,
58 .flags = IORESOURCE_IRQ,
59 }
60};
61
62static struct platform_device adssphere_eth_device = {
63 .name = "ep93xx-eth",
64 .id = -1,
65 .dev = {
66 .platform_data = &adssphere_eth_data,
67 },
68 .num_resources = 2,
69 .resource = adssphere_eth_resource,
70};
71
72static void __init adssphere_init_machine(void) 50static void __init adssphere_init_machine(void)
73{ 51{
74 ep93xx_init_devices(); 52 ep93xx_init_devices();
75 platform_device_register(&adssphere_flash); 53 platform_device_register(&adssphere_flash);
76 54
77 memcpy(adssphere_eth_data.dev_addr, 55 ep93xx_register_eth(&adssphere_eth_data, 1);
78 (void *)(EP93XX_ETHERNET_BASE + 0x50), 6);
79 platform_device_register(&adssphere_eth_device);
80} 56}
81 57
82MACHINE_START(ADSSPHERE, "ADS Sphere board") 58MACHINE_START(ADSSPHERE, "ADS Sphere board")
diff --git a/arch/arm/mach-ep93xx/clock.c b/arch/arm/mach-ep93xx/clock.c
index 6062e47f2043..8c9f2491dccc 100644
--- a/arch/arm/mach-ep93xx/clock.c
+++ b/arch/arm/mach-ep93xx/clock.c
@@ -15,9 +15,9 @@
15#include <linux/err.h> 15#include <linux/err.h>
16#include <linux/module.h> 16#include <linux/module.h>
17#include <linux/string.h> 17#include <linux/string.h>
18#include <linux/io.h>
18#include <asm/div64.h> 19#include <asm/div64.h>
19#include <mach/hardware.h> 20#include <mach/hardware.h>
20#include <asm/io.h>
21 21
22struct clk { 22struct clk {
23 char *name; 23 char *name;
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index f99f43669392..de53f0be71b9 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -32,6 +32,7 @@
32#include <linux/termios.h> 32#include <linux/termios.h>
33#include <linux/amba/bus.h> 33#include <linux/amba/bus.h>
34#include <linux/amba/serial.h> 34#include <linux/amba/serial.h>
35#include <linux/io.h>
35 36
36#include <asm/types.h> 37#include <asm/types.h>
37#include <asm/setup.h> 38#include <asm/setup.h>
@@ -41,7 +42,6 @@
41#include <asm/system.h> 42#include <asm/system.h>
42#include <asm/tlbflush.h> 43#include <asm/tlbflush.h>
43#include <asm/pgtable.h> 44#include <asm/pgtable.h>
44#include <asm/io.h>
45 45
46#include <asm/mach/map.h> 46#include <asm/mach/map.h>
47#include <asm/mach/time.h> 47#include <asm/mach/time.h>
@@ -157,7 +157,7 @@ static unsigned char gpio_int_type2[3];
157static const u8 int_type1_register_offset[3] = { 0x90, 0xac, 0x4c }; 157static const u8 int_type1_register_offset[3] = { 0x90, 0xac, 0x4c };
158static const u8 int_type2_register_offset[3] = { 0x94, 0xb0, 0x50 }; 158static const u8 int_type2_register_offset[3] = { 0x94, 0xb0, 0x50 };
159static const u8 eoi_register_offset[3] = { 0x98, 0xb4, 0x54 }; 159static const u8 eoi_register_offset[3] = { 0x98, 0xb4, 0x54 };
160static const u8 int_en_register_offset[3] = { 0x9c, 0xb8, 0x5c }; 160static const u8 int_en_register_offset[3] = { 0x9c, 0xb8, 0x58 };
161 161
162void ep93xx_gpio_update_int_params(unsigned port) 162void ep93xx_gpio_update_int_params(unsigned port)
163{ 163{
@@ -192,8 +192,7 @@ static void ep93xx_gpio_ab_irq_handler(unsigned int irq, struct irq_desc *desc)
192 for (i = 0; i < 8; i++) { 192 for (i = 0; i < 8; i++) {
193 if (status & (1 << i)) { 193 if (status & (1 << i)) {
194 int gpio_irq = gpio_to_irq(EP93XX_GPIO_LINE_A(0)) + i; 194 int gpio_irq = gpio_to_irq(EP93XX_GPIO_LINE_A(0)) + i;
195 desc = irq_desc + gpio_irq; 195 generic_handle_irq(gpio_irq);
196 desc_handle_irq(gpio_irq, desc);
197 } 196 }
198 } 197 }
199 198
@@ -202,7 +201,7 @@ static void ep93xx_gpio_ab_irq_handler(unsigned int irq, struct irq_desc *desc)
202 if (status & (1 << i)) { 201 if (status & (1 << i)) {
203 int gpio_irq = gpio_to_irq(EP93XX_GPIO_LINE_B(0)) + i; 202 int gpio_irq = gpio_to_irq(EP93XX_GPIO_LINE_B(0)) + i;
204 desc = irq_desc + gpio_irq; 203 desc = irq_desc + gpio_irq;
205 desc_handle_irq(gpio_irq, desc); 204 generic_handle_irq(gpio_irq);
206 } 205 }
207 } 206 }
208} 207}
@@ -217,7 +216,7 @@ static void ep93xx_gpio_f_irq_handler(unsigned int irq, struct irq_desc *desc)
217 int port_f_idx = ((irq + 1) & 7) ^ 4; /* {19..22,47..50} -> {0..7} */ 216 int port_f_idx = ((irq + 1) & 7) ^ 4; /* {19..22,47..50} -> {0..7} */
218 int gpio_irq = gpio_to_irq(EP93XX_GPIO_LINE_F(0)) + port_f_idx; 217 int gpio_irq = gpio_to_irq(EP93XX_GPIO_LINE_F(0)) + port_f_idx;
219 218
220 desc_handle_irq(gpio_irq, irq_desc + gpio_irq); 219 generic_handle_irq(gpio_irq);
221} 220}
222 221
223static void ep93xx_gpio_irq_ack(unsigned int irq) 222static void ep93xx_gpio_irq_ack(unsigned int irq)
@@ -461,6 +460,41 @@ static struct platform_device ep93xx_ohci_device = {
461 .resource = ep93xx_ohci_resources, 460 .resource = ep93xx_ohci_resources,
462}; 461};
463 462
463static struct ep93xx_eth_data ep93xx_eth_data;
464
465static struct resource ep93xx_eth_resource[] = {
466 {
467 .start = EP93XX_ETHERNET_PHYS_BASE,
468 .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff,
469 .flags = IORESOURCE_MEM,
470 }, {
471 .start = IRQ_EP93XX_ETHERNET,
472 .end = IRQ_EP93XX_ETHERNET,
473 .flags = IORESOURCE_IRQ,
474 }
475};
476
477static struct platform_device ep93xx_eth_device = {
478 .name = "ep93xx-eth",
479 .id = -1,
480 .dev = {
481 .platform_data = &ep93xx_eth_data,
482 },
483 .num_resources = ARRAY_SIZE(ep93xx_eth_resource),
484 .resource = ep93xx_eth_resource,
485};
486
487void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr)
488{
489 if (copy_addr) {
490 memcpy(data->dev_addr,
491 (void *)(EP93XX_ETHERNET_BASE + 0x50), 6);
492 }
493
494 ep93xx_eth_data = *data;
495 platform_device_register(&ep93xx_eth_device);
496}
497
464extern void ep93xx_gpio_init(void); 498extern void ep93xx_gpio_init(void);
465 499
466void __init ep93xx_init_devices(void) 500void __init ep93xx_init_devices(void)
diff --git a/arch/arm/mach-ep93xx/edb9302.c b/arch/arm/mach-ep93xx/edb9302.c
index 97550c0ad7b0..e4add5bdccfd 100644
--- a/arch/arm/mach-ep93xx/edb9302.c
+++ b/arch/arm/mach-ep93xx/edb9302.c
@@ -18,7 +18,7 @@
18#include <linux/ioport.h> 18#include <linux/ioport.h>
19#include <linux/mtd/physmap.h> 19#include <linux/mtd/physmap.h>
20#include <linux/platform_device.h> 20#include <linux/platform_device.h>
21#include <asm/io.h> 21#include <linux/io.h>
22#include <mach/hardware.h> 22#include <mach/hardware.h>
23#include <asm/mach-types.h> 23#include <asm/mach-types.h>
24#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
@@ -43,10 +43,16 @@ static struct platform_device edb9302_flash = {
43 .resource = &edb9302_flash_resource, 43 .resource = &edb9302_flash_resource,
44}; 44};
45 45
46static struct ep93xx_eth_data edb9302_eth_data = {
47 .phy_id = 1,
48};
49
46static void __init edb9302_init_machine(void) 50static void __init edb9302_init_machine(void)
47{ 51{
48 ep93xx_init_devices(); 52 ep93xx_init_devices();
49 platform_device_register(&edb9302_flash); 53 platform_device_register(&edb9302_flash);
54
55 ep93xx_register_eth(&edb9302_eth_data, 1);
50} 56}
51 57
52MACHINE_START(EDB9302, "Cirrus Logic EDB9302 Evaluation Board") 58MACHINE_START(EDB9302, "Cirrus Logic EDB9302 Evaluation Board")
diff --git a/arch/arm/mach-ep93xx/edb9302a.c b/arch/arm/mach-ep93xx/edb9302a.c
index 99b01d44bf1c..02c4405afed7 100644
--- a/arch/arm/mach-ep93xx/edb9302a.c
+++ b/arch/arm/mach-ep93xx/edb9302a.c
@@ -18,7 +18,7 @@
18#include <linux/ioport.h> 18#include <linux/ioport.h>
19#include <linux/mtd/physmap.h> 19#include <linux/mtd/physmap.h>
20#include <linux/platform_device.h> 20#include <linux/platform_device.h>
21#include <asm/io.h> 21#include <linux/io.h>
22#include <mach/hardware.h> 22#include <mach/hardware.h>
23#include <asm/mach-types.h> 23#include <asm/mach-types.h>
24#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
@@ -47,36 +47,12 @@ static struct ep93xx_eth_data edb9302a_eth_data = {
47 .phy_id = 1, 47 .phy_id = 1,
48}; 48};
49 49
50static struct resource edb9302a_eth_resource[] = {
51 {
52 .start = EP93XX_ETHERNET_PHYS_BASE,
53 .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff,
54 .flags = IORESOURCE_MEM,
55 }, {
56 .start = IRQ_EP93XX_ETHERNET,
57 .end = IRQ_EP93XX_ETHERNET,
58 .flags = IORESOURCE_IRQ,
59 }
60};
61
62static struct platform_device edb9302a_eth_device = {
63 .name = "ep93xx-eth",
64 .id = -1,
65 .dev = {
66 .platform_data = &edb9302a_eth_data,
67 },
68 .num_resources = 2,
69 .resource = edb9302a_eth_resource,
70};
71
72static void __init edb9302a_init_machine(void) 50static void __init edb9302a_init_machine(void)
73{ 51{
74 ep93xx_init_devices(); 52 ep93xx_init_devices();
75 platform_device_register(&edb9302a_flash); 53 platform_device_register(&edb9302a_flash);
76 54
77 memcpy(edb9302a_eth_data.dev_addr, 55 ep93xx_register_eth(&edb9302a_eth_data, 1);
78 (void *)(EP93XX_ETHERNET_BASE + 0x50), 6);
79 platform_device_register(&edb9302a_eth_device);
80} 56}
81 57
82MACHINE_START(EDB9302A, "Cirrus Logic EDB9302A Evaluation Board") 58MACHINE_START(EDB9302A, "Cirrus Logic EDB9302A Evaluation Board")
diff --git a/arch/arm/mach-ep93xx/edb9307.c b/arch/arm/mach-ep93xx/edb9307.c
index 9fb72d01a36c..040edbd2ea05 100644
--- a/arch/arm/mach-ep93xx/edb9307.c
+++ b/arch/arm/mach-ep93xx/edb9307.c
@@ -18,7 +18,7 @@
18#include <linux/ioport.h> 18#include <linux/ioport.h>
19#include <linux/mtd/physmap.h> 19#include <linux/mtd/physmap.h>
20#include <linux/platform_device.h> 20#include <linux/platform_device.h>
21#include <asm/io.h> 21#include <linux/io.h>
22#include <mach/hardware.h> 22#include <mach/hardware.h>
23#include <asm/mach-types.h> 23#include <asm/mach-types.h>
24#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
@@ -47,36 +47,12 @@ static struct ep93xx_eth_data edb9307_eth_data = {
47 .phy_id = 1, 47 .phy_id = 1,
48}; 48};
49 49
50static struct resource edb9307_eth_resource[] = {
51 {
52 .start = EP93XX_ETHERNET_PHYS_BASE,
53 .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff,
54 .flags = IORESOURCE_MEM,
55 }, {
56 .start = IRQ_EP93XX_ETHERNET,
57 .end = IRQ_EP93XX_ETHERNET,
58 .flags = IORESOURCE_IRQ,
59 }
60};
61
62static struct platform_device edb9307_eth_device = {
63 .name = "ep93xx-eth",
64 .id = -1,
65 .dev = {
66 .platform_data = &edb9307_eth_data,
67 },
68 .num_resources = 2,
69 .resource = edb9307_eth_resource,
70};
71
72static void __init edb9307_init_machine(void) 50static void __init edb9307_init_machine(void)
73{ 51{
74 ep93xx_init_devices(); 52 ep93xx_init_devices();
75 platform_device_register(&edb9307_flash); 53 platform_device_register(&edb9307_flash);
76 54
77 memcpy(edb9307_eth_data.dev_addr, 55 ep93xx_register_eth(&edb9307_eth_data, 1);
78 (void *)(EP93XX_ETHERNET_BASE + 0x50), 6);
79 platform_device_register(&edb9307_eth_device);
80} 56}
81 57
82MACHINE_START(EDB9307, "Cirrus Logic EDB9307 Evaluation Board") 58MACHINE_START(EDB9307, "Cirrus Logic EDB9307 Evaluation Board")
diff --git a/arch/arm/mach-ep93xx/edb9312.c b/arch/arm/mach-ep93xx/edb9312.c
index 87267a574f5e..6853e302bc3a 100644
--- a/arch/arm/mach-ep93xx/edb9312.c
+++ b/arch/arm/mach-ep93xx/edb9312.c
@@ -19,7 +19,7 @@
19#include <linux/ioport.h> 19#include <linux/ioport.h>
20#include <linux/mtd/physmap.h> 20#include <linux/mtd/physmap.h>
21#include <linux/platform_device.h> 21#include <linux/platform_device.h>
22#include <asm/io.h> 22#include <linux/io.h>
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24#include <asm/mach-types.h> 24#include <asm/mach-types.h>
25#include <asm/mach/arch.h> 25#include <asm/mach/arch.h>
@@ -44,10 +44,16 @@ static struct platform_device edb9312_flash = {
44 .resource = &edb9312_flash_resource, 44 .resource = &edb9312_flash_resource,
45}; 45};
46 46
47static struct ep93xx_eth_data edb9312_eth_data = {
48 .phy_id = 1,
49};
50
47static void __init edb9312_init_machine(void) 51static void __init edb9312_init_machine(void)
48{ 52{
49 ep93xx_init_devices(); 53 ep93xx_init_devices();
50 platform_device_register(&edb9312_flash); 54 platform_device_register(&edb9312_flash);
55
56 ep93xx_register_eth(&edb9312_eth_data, 1);
51} 57}
52 58
53MACHINE_START(EDB9312, "Cirrus Logic EDB9312 Evaluation Board") 59MACHINE_START(EDB9312, "Cirrus Logic EDB9312 Evaluation Board")
diff --git a/arch/arm/mach-ep93xx/edb9315.c b/arch/arm/mach-ep93xx/edb9315.c
index 7e373950be4d..9469b350d253 100644
--- a/arch/arm/mach-ep93xx/edb9315.c
+++ b/arch/arm/mach-ep93xx/edb9315.c
@@ -18,7 +18,7 @@
18#include <linux/ioport.h> 18#include <linux/ioport.h>
19#include <linux/mtd/physmap.h> 19#include <linux/mtd/physmap.h>
20#include <linux/platform_device.h> 20#include <linux/platform_device.h>
21#include <asm/io.h> 21#include <linux/io.h>
22#include <mach/hardware.h> 22#include <mach/hardware.h>
23#include <asm/mach-types.h> 23#include <asm/mach-types.h>
24#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
@@ -43,10 +43,16 @@ static struct platform_device edb9315_flash = {
43 .resource = &edb9315_flash_resource, 43 .resource = &edb9315_flash_resource,
44}; 44};
45 45
46static struct ep93xx_eth_data edb9315_eth_data = {
47 .phy_id = 1,
48};
49
46static void __init edb9315_init_machine(void) 50static void __init edb9315_init_machine(void)
47{ 51{
48 ep93xx_init_devices(); 52 ep93xx_init_devices();
49 platform_device_register(&edb9315_flash); 53 platform_device_register(&edb9315_flash);
54
55 ep93xx_register_eth(&edb9315_eth_data, 1);
50} 56}
51 57
52MACHINE_START(EDB9315, "Cirrus Logic EDB9315 Evaluation Board") 58MACHINE_START(EDB9315, "Cirrus Logic EDB9315 Evaluation Board")
diff --git a/arch/arm/mach-ep93xx/edb9315a.c b/arch/arm/mach-ep93xx/edb9315a.c
index 08a7c9bfb689..584457ce7c80 100644
--- a/arch/arm/mach-ep93xx/edb9315a.c
+++ b/arch/arm/mach-ep93xx/edb9315a.c
@@ -18,7 +18,7 @@
18#include <linux/ioport.h> 18#include <linux/ioport.h>
19#include <linux/mtd/physmap.h> 19#include <linux/mtd/physmap.h>
20#include <linux/platform_device.h> 20#include <linux/platform_device.h>
21#include <asm/io.h> 21#include <linux/io.h>
22#include <mach/hardware.h> 22#include <mach/hardware.h>
23#include <asm/mach-types.h> 23#include <asm/mach-types.h>
24#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
@@ -47,36 +47,12 @@ static struct ep93xx_eth_data edb9315a_eth_data = {
47 .phy_id = 1, 47 .phy_id = 1,
48}; 48};
49 49
50static struct resource edb9315a_eth_resource[] = {
51 {
52 .start = EP93XX_ETHERNET_PHYS_BASE,
53 .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff,
54 .flags = IORESOURCE_MEM,
55 }, {
56 .start = IRQ_EP93XX_ETHERNET,
57 .end = IRQ_EP93XX_ETHERNET,
58 .flags = IORESOURCE_IRQ,
59 }
60};
61
62static struct platform_device edb9315a_eth_device = {
63 .name = "ep93xx-eth",
64 .id = -1,
65 .dev = {
66 .platform_data = &edb9315a_eth_data,
67 },
68 .num_resources = 2,
69 .resource = edb9315a_eth_resource,
70};
71
72static void __init edb9315a_init_machine(void) 50static void __init edb9315a_init_machine(void)
73{ 51{
74 ep93xx_init_devices(); 52 ep93xx_init_devices();
75 platform_device_register(&edb9315a_flash); 53 platform_device_register(&edb9315a_flash);
76 54
77 memcpy(edb9315a_eth_data.dev_addr, 55 ep93xx_register_eth(&edb9315a_eth_data, 1);
78 (void *)(EP93XX_ETHERNET_BASE + 0x50), 6);
79 platform_device_register(&edb9315a_eth_device);
80} 56}
81 57
82MACHINE_START(EDB9315A, "Cirrus Logic EDB9315A Evaluation Board") 58MACHINE_START(EDB9315A, "Cirrus Logic EDB9315A Evaluation Board")
diff --git a/arch/arm/mach-ep93xx/gesbc9312.c b/arch/arm/mach-ep93xx/gesbc9312.c
index 9b41ec1f089e..035b24e31b64 100644
--- a/arch/arm/mach-ep93xx/gesbc9312.c
+++ b/arch/arm/mach-ep93xx/gesbc9312.c
@@ -18,7 +18,7 @@
18#include <linux/ioport.h> 18#include <linux/ioport.h>
19#include <linux/mtd/physmap.h> 19#include <linux/mtd/physmap.h>
20#include <linux/platform_device.h> 20#include <linux/platform_device.h>
21#include <asm/io.h> 21#include <linux/io.h>
22#include <mach/hardware.h> 22#include <mach/hardware.h>
23#include <asm/mach-types.h> 23#include <asm/mach-types.h>
24#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
@@ -44,36 +44,15 @@ static struct platform_device gesbc9312_flash = {
44}; 44};
45 45
46static struct ep93xx_eth_data gesbc9312_eth_data = { 46static struct ep93xx_eth_data gesbc9312_eth_data = {
47 .phy_id = 1, 47 .phy_id = 1,
48};
49
50static struct resource gesbc9312_eth_resource[] = {
51 {
52 .start = EP93XX_ETHERNET_PHYS_BASE,
53 .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff,
54 .flags = IORESOURCE_MEM,
55 }, {
56 .start = IRQ_EP93XX_ETHERNET,
57 .end = IRQ_EP93XX_ETHERNET,
58 .flags = IORESOURCE_IRQ,
59 }
60};
61
62static struct platform_device gesbc9312_eth_device = {
63 .name = "ep93xx-eth",
64 .id = -1,
65 .dev = {
66 .platform_data = &gesbc9312_eth_data,
67 },
68 .num_resources = 2,
69 .resource = gesbc9312_eth_resource,
70}; 48};
71 49
72static void __init gesbc9312_init_machine(void) 50static void __init gesbc9312_init_machine(void)
73{ 51{
74 ep93xx_init_devices(); 52 ep93xx_init_devices();
75 platform_device_register(&gesbc9312_flash); 53 platform_device_register(&gesbc9312_flash);
76 platform_device_register(&gesbc9312_eth_device); 54
55 ep93xx_register_eth(&gesbc9312_eth_data, 0);
77} 56}
78 57
79MACHINE_START(GESBC9312, "Glomation GESBC-9312-sx") 58MACHINE_START(GESBC9312, "Glomation GESBC-9312-sx")
diff --git a/arch/arm/mach-ep93xx/gpio.c b/arch/arm/mach-ep93xx/gpio.c
index 0f3fb87ca4be..482cf3d2fbcd 100644
--- a/arch/arm/mach-ep93xx/gpio.c
+++ b/arch/arm/mach-ep93xx/gpio.c
@@ -16,9 +16,9 @@
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/module.h> 17#include <linux/module.h>
18#include <linux/seq_file.h> 18#include <linux/seq_file.h>
19#include <linux/io.h>
19 20
20#include <mach/ep93xx-regs.h> 21#include <mach/ep93xx-regs.h>
21#include <asm/io.h>
22#include <asm/gpio.h> 22#include <asm/gpio.h>
23 23
24struct ep93xx_gpio_chip { 24struct ep93xx_gpio_chip {
@@ -141,10 +141,10 @@ static void ep93xx_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
141static struct ep93xx_gpio_chip ep93xx_gpio_banks[] = { 141static struct ep93xx_gpio_chip ep93xx_gpio_banks[] = {
142 EP93XX_GPIO_BANK("A", 0x00, 0x10, 0), 142 EP93XX_GPIO_BANK("A", 0x00, 0x10, 0),
143 EP93XX_GPIO_BANK("B", 0x04, 0x14, 8), 143 EP93XX_GPIO_BANK("B", 0x04, 0x14, 8),
144 EP93XX_GPIO_BANK("C", 0x30, 0x34, 40), 144 EP93XX_GPIO_BANK("C", 0x08, 0x18, 40),
145 EP93XX_GPIO_BANK("D", 0x0c, 0x1c, 24), 145 EP93XX_GPIO_BANK("D", 0x0c, 0x1c, 24),
146 EP93XX_GPIO_BANK("E", 0x20, 0x24, 32), 146 EP93XX_GPIO_BANK("E", 0x20, 0x24, 32),
147 EP93XX_GPIO_BANK("F", 0x08, 0x18, 16), 147 EP93XX_GPIO_BANK("F", 0x30, 0x34, 16),
148 EP93XX_GPIO_BANK("G", 0x38, 0x3c, 48), 148 EP93XX_GPIO_BANK("G", 0x38, 0x3c, 48),
149 EP93XX_GPIO_BANK("H", 0x40, 0x44, 56), 149 EP93XX_GPIO_BANK("H", 0x40, 0x44, 56),
150}; 150};
diff --git a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
index 9f4458c8e070..22d6c9a6e4ca 100644
--- a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
+++ b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
@@ -6,6 +6,40 @@
6#define __ASM_ARCH_EP93XX_REGS_H 6#define __ASM_ARCH_EP93XX_REGS_H
7 7
8/* 8/*
9 * EP93xx Physical Memory Map:
10 *
11 * The ASDO pin is sampled at system reset to select a synchronous or
12 * asynchronous boot configuration. When ASDO is "1" (i.e. pulled-up)
13 * the synchronous boot mode is selected. When ASDO is "0" (i.e
14 * pulled-down) the asynchronous boot mode is selected.
15 *
16 * In synchronous boot mode nSDCE3 is decoded starting at physical address
17 * 0x00000000 and nCS0 is decoded starting at 0xf0000000. For asynchronous
18 * boot mode they are swapped with nCS0 decoded at 0x00000000 ann nSDCE3
19 * decoded at 0xf0000000.
20 *
21 * There is known errata for the EP93xx dealing with External Memory
22 * Configurations. Please refer to "AN273: EP93xx Silicon Rev E Design
23 * Guidelines" for more information. This document can be found at:
24 *
25 * http://www.cirrus.com/en/pubs/appNote/AN273REV4.pdf
26 */
27
28#define EP93XX_CS0_PHYS_BASE_ASYNC 0x00000000 /* ASDO Pin = 0 */
29#define EP93XX_SDCE3_PHYS_BASE_SYNC 0x00000000 /* ASDO Pin = 1 */
30#define EP93XX_CS1_PHYS_BASE 0x10000000
31#define EP93XX_CS2_PHYS_BASE 0x20000000
32#define EP93XX_CS3_PHYS_BASE 0x30000000
33#define EP93XX_PCMCIA_PHYS_BASE 0x40000000
34#define EP93XX_CS6_PHYS_BASE 0x60000000
35#define EP93XX_CS7_PHYS_BASE 0x70000000
36#define EP93XX_SDCE0_PHYS_BASE 0xc0000000
37#define EP93XX_SDCE1_PHYS_BASE 0xd0000000
38#define EP93XX_SDCE2_PHYS_BASE 0xe0000000
39#define EP93XX_SDCE3_PHYS_BASE_ASYNC 0xf0000000 /* ASDO Pin = 0 */
40#define EP93XX_CS0_PHYS_BASE_SYNC 0xf0000000 /* ASDO Pin = 1 */
41
42/*
9 * EP93xx linux memory map: 43 * EP93xx linux memory map:
10 * 44 *
11 * virt phys size 45 * virt phys size
diff --git a/arch/arm/mach-ep93xx/include/mach/platform.h b/arch/arm/mach-ep93xx/include/mach/platform.h
index b5c182473f5d..db2489d3bda7 100644
--- a/arch/arm/mach-ep93xx/include/mach/platform.h
+++ b/arch/arm/mach-ep93xx/include/mach/platform.h
@@ -4,17 +4,17 @@
4 4
5#ifndef __ASSEMBLY__ 5#ifndef __ASSEMBLY__
6 6
7void ep93xx_map_io(void);
8void ep93xx_init_irq(void);
9void ep93xx_init_time(unsigned long);
10void ep93xx_init_devices(void);
11extern struct sys_timer ep93xx_timer;
12
13struct ep93xx_eth_data 7struct ep93xx_eth_data
14{ 8{
15 unsigned char dev_addr[6]; 9 unsigned char dev_addr[6];
16 unsigned char phy_id; 10 unsigned char phy_id;
17}; 11};
18 12
13void ep93xx_map_io(void);
14void ep93xx_init_irq(void);
15void ep93xx_init_time(unsigned long);
16void ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr);
17void ep93xx_init_devices(void);
18extern struct sys_timer ep93xx_timer;
19 19
20#endif 20#endif
diff --git a/arch/arm/mach-ep93xx/include/mach/ts72xx.h b/arch/arm/mach-ep93xx/include/mach/ts72xx.h
index 30b318aa1a1f..34ddec081c40 100644
--- a/arch/arm/mach-ep93xx/include/mach/ts72xx.h
+++ b/arch/arm/mach-ep93xx/include/mach/ts72xx.h
@@ -70,7 +70,7 @@
70 70
71 71
72#ifndef __ASSEMBLY__ 72#ifndef __ASSEMBLY__
73#include <asm/io.h> 73#include <linux/io.h>
74 74
75static inline int board_is_ts7200(void) 75static inline int board_is_ts7200(void)
76{ 76{
diff --git a/arch/arm/mach-ep93xx/include/mach/uncompress.h b/arch/arm/mach-ep93xx/include/mach/uncompress.h
index 1fd2f17de325..16026c2b1c8c 100644
--- a/arch/arm/mach-ep93xx/include/mach/uncompress.h
+++ b/arch/arm/mach-ep93xx/include/mach/uncompress.h
@@ -31,10 +31,19 @@ static void __raw_writel(unsigned int value, unsigned int ptr)
31 *((volatile unsigned int *)ptr) = value; 31 *((volatile unsigned int *)ptr) = value;
32} 32}
33 33
34 34#if defined(CONFIG_EP93XX_EARLY_UART1)
35#define PHYS_UART1_DATA 0x808c0000 35#define UART_BASE EP93XX_UART1_PHYS_BASE
36#define PHYS_UART1_FLAG 0x808c0018 36#elif defined(CONFIG_EP93XX_EARLY_UART2)
37#define UART1_FLAG_TXFF 0x20 37#define UART_BASE EP93XX_UART2_PHYS_BASE
38#elif defined(CONFIG_EP93XX_EARLY_UART3)
39#define UART_BASE EP93XX_UART3_PHYS_BASE
40#else
41#define UART_BASE EP93XX_UART1_PHYS_BASE
42#endif
43
44#define PHYS_UART_DATA (UART_BASE + 0x00)
45#define PHYS_UART_FLAG (UART_BASE + 0x18)
46#define UART_FLAG_TXFF 0x20
38 47
39static inline void putc(int c) 48static inline void putc(int c)
40{ 49{
@@ -42,11 +51,11 @@ static inline void putc(int c)
42 51
43 for (i = 0; i < 1000; i++) { 52 for (i = 0; i < 1000; i++) {
44 /* Transmit fifo not full? */ 53 /* Transmit fifo not full? */
45 if (!(__raw_readb(PHYS_UART1_FLAG) & UART1_FLAG_TXFF)) 54 if (!(__raw_readb(PHYS_UART_FLAG) & UART_FLAG_TXFF))
46 break; 55 break;
47 } 56 }
48 57
49 __raw_writeb(c, PHYS_UART1_DATA); 58 __raw_writeb(c, PHYS_UART_DATA);
50} 59}
51 60
52static inline void flush(void) 61static inline void flush(void)
diff --git a/arch/arm/mach-ep93xx/micro9.c b/arch/arm/mach-ep93xx/micro9.c
index de047a5c8112..c2197236b632 100644
--- a/arch/arm/mach-ep93xx/micro9.c
+++ b/arch/arm/mach-ep93xx/micro9.c
@@ -16,10 +16,9 @@
16#include <linux/mm.h> 16#include <linux/mm.h>
17#include <linux/platform_device.h> 17#include <linux/platform_device.h>
18#include <linux/sched.h> 18#include <linux/sched.h>
19 19#include <linux/io.h>
20#include <linux/mtd/physmap.h> 20#include <linux/mtd/physmap.h>
21 21
22#include <asm/io.h>
23#include <mach/hardware.h> 22#include <mach/hardware.h>
24 23
25#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
@@ -29,38 +28,9 @@ static struct ep93xx_eth_data micro9_eth_data = {
29 .phy_id = 0x1f, 28 .phy_id = 0x1f,
30}; 29};
31 30
32static struct resource micro9_eth_resource[] = {
33 {
34 .start = EP93XX_ETHERNET_PHYS_BASE,
35 .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff,
36 .flags = IORESOURCE_MEM,
37 }, {
38 .start = IRQ_EP93XX_ETHERNET,
39 .end = IRQ_EP93XX_ETHERNET,
40 .flags = IORESOURCE_IRQ,
41 }
42};
43
44static struct platform_device micro9_eth_device = {
45 .name = "ep93xx-eth",
46 .id = -1,
47 .dev = {
48 .platform_data = &micro9_eth_data,
49 },
50 .num_resources = ARRAY_SIZE(micro9_eth_resource),
51 .resource = micro9_eth_resource,
52};
53
54static void __init micro9_eth_init(void)
55{
56 memcpy(micro9_eth_data.dev_addr,
57 (void *)(EP93XX_ETHERNET_BASE + 0x50), 6);
58 platform_device_register(&micro9_eth_device);
59}
60
61static void __init micro9_init(void) 31static void __init micro9_init(void)
62{ 32{
63 micro9_eth_init(); 33 ep93xx_register_eth(&micro9_eth_data, 1);
64} 34}
65 35
66/* 36/*
diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c
index c3cbff126d0c..b4aa4c054276 100644
--- a/arch/arm/mach-ep93xx/ts72xx.c
+++ b/arch/arm/mach-ep93xx/ts72xx.c
@@ -19,7 +19,7 @@
19#include <linux/mtd/physmap.h> 19#include <linux/mtd/physmap.h>
20#include <linux/platform_device.h> 20#include <linux/platform_device.h>
21#include <linux/m48t86.h> 21#include <linux/m48t86.h>
22#include <asm/io.h> 22#include <linux/io.h>
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24#include <asm/mach-types.h> 24#include <asm/mach-types.h>
25#include <asm/mach/arch.h> 25#include <asm/mach/arch.h>
@@ -161,28 +161,6 @@ static struct ep93xx_eth_data ts72xx_eth_data = {
161 .phy_id = 1, 161 .phy_id = 1,
162}; 162};
163 163
164static struct resource ts72xx_eth_resource[] = {
165 {
166 .start = EP93XX_ETHERNET_PHYS_BASE,
167 .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff,
168 .flags = IORESOURCE_MEM,
169 }, {
170 .start = IRQ_EP93XX_ETHERNET,
171 .end = IRQ_EP93XX_ETHERNET,
172 .flags = IORESOURCE_IRQ,
173 }
174};
175
176static struct platform_device ts72xx_eth_device = {
177 .name = "ep93xx-eth",
178 .id = -1,
179 .dev = {
180 .platform_data = &ts72xx_eth_data,
181 },
182 .num_resources = 2,
183 .resource = ts72xx_eth_resource,
184};
185
186static void __init ts72xx_init_machine(void) 164static void __init ts72xx_init_machine(void)
187{ 165{
188 ep93xx_init_devices(); 166 ep93xx_init_devices();
@@ -190,9 +168,7 @@ static void __init ts72xx_init_machine(void)
190 platform_device_register(&ts72xx_flash); 168 platform_device_register(&ts72xx_flash);
191 platform_device_register(&ts72xx_rtc_device); 169 platform_device_register(&ts72xx_rtc_device);
192 170
193 memcpy(ts72xx_eth_data.dev_addr, 171 ep93xx_register_eth(&ts72xx_eth_data, 1);
194 (void *)(EP93XX_ETHERNET_BASE + 0x50), 6);
195 platform_device_register(&ts72xx_eth_device);
196} 172}
197 173
198MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC") 174MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC")
diff --git a/arch/arm/mach-footbridge/cats-hw.c b/arch/arm/mach-footbridge/cats-hw.c
index c261472208cb..6a5b437ab86f 100644
--- a/arch/arm/mach-footbridge/cats-hw.c
+++ b/arch/arm/mach-footbridge/cats-hw.c
@@ -9,9 +9,9 @@
9#include <linux/kernel.h> 9#include <linux/kernel.h>
10#include <linux/init.h> 10#include <linux/init.h>
11#include <linux/screen_info.h> 11#include <linux/screen_info.h>
12#include <linux/io.h>
12 13
13#include <asm/hardware/dec21285.h> 14#include <asm/hardware/dec21285.h>
14#include <asm/io.h>
15#include <asm/mach-types.h> 15#include <asm/mach-types.h>
16#include <asm/setup.h> 16#include <asm/setup.h>
17 17
diff --git a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c
index b08ab507c052..818014e09f4a 100644
--- a/arch/arm/mach-footbridge/common.c
+++ b/arch/arm/mach-footbridge/common.c
@@ -13,11 +13,11 @@
13#include <linux/ioport.h> 13#include <linux/ioport.h>
14#include <linux/list.h> 14#include <linux/list.h>
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/io.h>
16 17
17#include <asm/pgtable.h> 18#include <asm/pgtable.h>
18#include <asm/page.h> 19#include <asm/page.h>
19#include <asm/irq.h> 20#include <asm/irq.h>
20#include <asm/io.h>
21#include <asm/mach-types.h> 21#include <asm/mach-types.h>
22#include <asm/setup.h> 22#include <asm/setup.h>
23#include <asm/hardware/dec21285.h> 23#include <asm/hardware/dec21285.h>
diff --git a/arch/arm/mach-footbridge/dc21285.c b/arch/arm/mach-footbridge/dc21285.c
index d0dc51e81338..d4c1e526f59c 100644
--- a/arch/arm/mach-footbridge/dc21285.c
+++ b/arch/arm/mach-footbridge/dc21285.c
@@ -16,8 +16,8 @@
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/ioport.h> 17#include <linux/ioport.h>
18#include <linux/irq.h> 18#include <linux/irq.h>
19#include <linux/io.h>
19 20
20#include <asm/io.h>
21#include <asm/irq.h> 21#include <asm/irq.h>
22#include <asm/system.h> 22#include <asm/system.h>
23#include <asm/mach/pci.h> 23#include <asm/mach/pci.h>
diff --git a/arch/arm/mach-footbridge/dma.c b/arch/arm/mach-footbridge/dma.c
index 1f9b09b8ed88..b653e9cfa3f7 100644
--- a/arch/arm/mach-footbridge/dma.c
+++ b/arch/arm/mach-footbridge/dma.c
@@ -11,9 +11,9 @@
11 * ISA DMA controllers. 11 * ISA DMA controllers.
12 */ 12 */
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/io.h>
14 15
15#include <asm/dma.h> 16#include <asm/dma.h>
16#include <asm/io.h>
17#include <asm/scatterlist.h> 17#include <asm/scatterlist.h>
18 18
19#include <asm/mach/dma.h> 19#include <asm/mach/dma.h>
diff --git a/arch/arm/mach-footbridge/include/mach/memory.h b/arch/arm/mach-footbridge/include/mach/memory.h
index e9cae99dd1f9..6ae2f1a07ab9 100644
--- a/arch/arm/mach-footbridge/include/mach/memory.h
+++ b/arch/arm/mach-footbridge/include/mach/memory.h
@@ -42,10 +42,6 @@ extern unsigned long __bus_to_virt(unsigned long);
42 42
43#endif 43#endif
44 44
45/* Task size and page offset at 3GB */
46#define TASK_SIZE UL(0xbf000000)
47#define PAGE_OFFSET UL(0xc0000000)
48
49/* 45/*
50 * Cache flushing area. 46 * Cache flushing area.
51 */ 47 */
@@ -56,12 +52,6 @@ extern unsigned long __bus_to_virt(unsigned long);
56 */ 52 */
57#define PHYS_OFFSET UL(0x00000000) 53#define PHYS_OFFSET UL(0x00000000)
58 54
59/*
60 * This decides where the kernel will search for a free chunk of vm
61 * space during mmap's.
62 */
63#define TASK_UNMAPPED_BASE ((TASK_SIZE + 0x01000000) / 3)
64
65#define FLUSH_BASE_PHYS 0x50000000 55#define FLUSH_BASE_PHYS 0x50000000
66 56
67#endif 57#endif
diff --git a/arch/arm/mach-footbridge/include/mach/system.h b/arch/arm/mach-footbridge/include/mach/system.h
index 01c9f407f498..2db7f36bd6ca 100644
--- a/arch/arm/mach-footbridge/include/mach/system.h
+++ b/arch/arm/mach-footbridge/include/mach/system.h
@@ -7,8 +7,8 @@
7 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10#include <linux/io.h>
10#include <asm/hardware/dec21285.h> 11#include <asm/hardware/dec21285.h>
11#include <asm/io.h>
12#include <mach/hardware.h> 12#include <mach/hardware.h>
13#include <asm/leds.h> 13#include <asm/leds.h>
14#include <asm/mach-types.h> 14#include <asm/mach-types.h>
diff --git a/arch/arm/mach-footbridge/isa-irq.c b/arch/arm/mach-footbridge/isa-irq.c
index 7132e522c366..54fec9ae28b9 100644
--- a/arch/arm/mach-footbridge/isa-irq.c
+++ b/arch/arm/mach-footbridge/isa-irq.c
@@ -18,13 +18,13 @@
18#include <linux/interrupt.h> 18#include <linux/interrupt.h>
19#include <linux/list.h> 19#include <linux/list.h>
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/io.h>
21 22
22#include <asm/mach/irq.h> 23#include <asm/mach/irq.h>
23 24
24#include <mach/hardware.h> 25#include <mach/hardware.h>
25#include <asm/hardware/dec21285.h> 26#include <asm/hardware/dec21285.h>
26#include <asm/irq.h> 27#include <asm/irq.h>
27#include <asm/io.h>
28#include <asm/mach-types.h> 28#include <asm/mach-types.h>
29 29
30static void isa_mask_pic_lo_irq(unsigned int irq) 30static void isa_mask_pic_lo_irq(unsigned int irq)
@@ -94,8 +94,7 @@ isa_irq_handler(unsigned int irq, struct irq_desc *desc)
94 return; 94 return;
95 } 95 }
96 96
97 desc = irq_desc + isa_irq; 97 generic_handle_irq(isa_irq);
98 desc_handle_irq(isa_irq, desc);
99} 98}
100 99
101static struct irqaction irq_cascade = { 100static struct irqaction irq_cascade = {
diff --git a/arch/arm/mach-footbridge/isa-timer.c b/arch/arm/mach-footbridge/isa-timer.c
index a764e01d3573..0c8390082fa8 100644
--- a/arch/arm/mach-footbridge/isa-timer.c
+++ b/arch/arm/mach-footbridge/isa-timer.c
@@ -7,8 +7,8 @@
7#include <linux/init.h> 7#include <linux/init.h>
8#include <linux/interrupt.h> 8#include <linux/interrupt.h>
9#include <linux/irq.h> 9#include <linux/irq.h>
10#include <linux/io.h>
10 11
11#include <asm/io.h>
12#include <asm/irq.h> 12#include <asm/irq.h>
13 13
14#include <asm/mach/time.h> 14#include <asm/mach/time.h>
diff --git a/arch/arm/mach-footbridge/netwinder-hw.c b/arch/arm/mach-footbridge/netwinder-hw.c
index a1f381c64a30..00b0ddcac283 100644
--- a/arch/arm/mach-footbridge/netwinder-hw.c
+++ b/arch/arm/mach-footbridge/netwinder-hw.c
@@ -10,9 +10,9 @@
10#include <linux/kernel.h> 10#include <linux/kernel.h>
11#include <linux/delay.h> 11#include <linux/delay.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/io.h>
13 14
14#include <asm/hardware/dec21285.h> 15#include <asm/hardware/dec21285.h>
15#include <asm/io.h>
16#include <asm/leds.h> 16#include <asm/leds.h>
17#include <asm/mach-types.h> 17#include <asm/mach-types.h>
18#include <asm/setup.h> 18#include <asm/setup.h>
diff --git a/arch/arm/mach-footbridge/time.c b/arch/arm/mach-footbridge/time.c
index 004819ea85c8..cd1b54ff9fe2 100644
--- a/arch/arm/mach-footbridge/time.c
+++ b/arch/arm/mach-footbridge/time.c
@@ -22,9 +22,9 @@
22#include <linux/sched.h> 22#include <linux/sched.h>
23#include <linux/mc146818rtc.h> 23#include <linux/mc146818rtc.h>
24#include <linux/bcd.h> 24#include <linux/bcd.h>
25#include <linux/io.h>
25 26
26#include <mach/hardware.h> 27#include <mach/hardware.h>
27#include <asm/io.h>
28 28
29#include <asm/mach/time.h> 29#include <asm/mach/time.h>
30#include "common.h" 30#include "common.h"
diff --git a/arch/arm/mach-h720x/common.c b/arch/arm/mach-h720x/common.c
index b5f9741ae13c..7a2614828217 100644
--- a/arch/arm/mach-h720x/common.c
+++ b/arch/arm/mach-h720x/common.c
@@ -18,11 +18,11 @@
18#include <linux/mman.h> 18#include <linux/mman.h>
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/interrupt.h> 20#include <linux/interrupt.h>
21#include <linux/io.h>
21 22
22#include <asm/page.h> 23#include <asm/page.h>
23#include <asm/pgtable.h> 24#include <asm/pgtable.h>
24#include <asm/dma.h> 25#include <asm/dma.h>
25#include <asm/io.h>
26#include <mach/hardware.h> 26#include <mach/hardware.h>
27#include <asm/irq.h> 27#include <asm/irq.h>
28#include <asm/mach/irq.h> 28#include <asm/mach/irq.h>
@@ -104,14 +104,12 @@ h720x_gpio_handler(unsigned int mask, unsigned int irq,
104 struct irq_desc *desc) 104 struct irq_desc *desc)
105{ 105{
106 IRQDBG("%s irq: %d\n", __func__, irq); 106 IRQDBG("%s irq: %d\n", __func__, irq);
107 desc = irq_desc + irq;
108 while (mask) { 107 while (mask) {
109 if (mask & 1) { 108 if (mask & 1) {
110 IRQDBG("handling irq %d\n", irq); 109 IRQDBG("handling irq %d\n", irq);
111 desc_handle_irq(irq, desc); 110 generic_handle_irq(irq);
112 } 111 }
113 irq++; 112 irq++;
114 desc++;
115 mask >>= 1; 113 mask >>= 1;
116 } 114 }
117} 115}
diff --git a/arch/arm/mach-h720x/cpu-h7202.c b/arch/arm/mach-h720x/cpu-h7202.c
index 53e1f62f2e79..fd33a19c813a 100644
--- a/arch/arm/mach-h720x/cpu-h7202.c
+++ b/arch/arm/mach-h720x/cpu-h7202.c
@@ -120,12 +120,10 @@ h7202_timerx_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
120 120
121 mask >>= 1; 121 mask >>= 1;
122 irq = IRQ_TIMER1; 122 irq = IRQ_TIMER1;
123 desc = irq_desc + irq;
124 while (mask) { 123 while (mask) {
125 if (mask & 1) 124 if (mask & 1)
126 desc_handle_irq(irq, desc); 125 generic_handle_irq(irq);
127 irq++; 126 irq++;
128 desc++;
129 mask >>= 1; 127 mask >>= 1;
130 } 128 }
131} 129}
diff --git a/arch/arm/mach-imx/clock.c b/arch/arm/mach-imx/clock.c
index 4b4230db3765..7ec60fc91565 100644
--- a/arch/arm/mach-imx/clock.c
+++ b/arch/arm/mach-imx/clock.c
@@ -21,8 +21,8 @@
21#include <linux/list.h> 21#include <linux/list.h>
22#include <linux/math64.h> 22#include <linux/math64.h>
23#include <linux/err.h> 23#include <linux/err.h>
24#include <linux/io.h>
24 25
25#include <asm/io.h>
26#include <mach/imx-regs.h> 26#include <mach/imx-regs.h>
27 27
28/* 28/*
diff --git a/arch/arm/mach-imx/include/mach/irqs.h b/arch/arm/mach-imx/include/mach/irqs.h
index eb8d5bd05d56..67812c5ac1f9 100644
--- a/arch/arm/mach-imx/include/mach/irqs.h
+++ b/arch/arm/mach-imx/include/mach/irqs.h
@@ -111,6 +111,11 @@
111/* decode irq number to use with IMR(x), ISR(x) and friends */ 111/* decode irq number to use with IMR(x), ISR(x) and friends */
112#define IRQ_TO_REG(irq) ((irq - IMX_IRQS) >> 5) 112#define IRQ_TO_REG(irq) ((irq - IMX_IRQS) >> 5)
113 113
114/* all normal IRQs can be FIQs */
115#define FIQ_START 0
116/* switch betwean IRQ and FIQ */
117extern int imx_set_irq_fiq(unsigned int irq, unsigned int type);
118
114#define NR_IRQS (IRQ_GPIOD(32) + 1) 119#define NR_IRQS (IRQ_GPIOD(32) + 1)
115#define IRQ_GPIO(x) 120#define IRQ_GPIO(x)
116#endif 121#endif
diff --git a/arch/arm/mach-imx/irq.c b/arch/arm/mach-imx/irq.c
index 798f221eb3b7..531b95deadc0 100644
--- a/arch/arm/mach-imx/irq.c
+++ b/arch/arm/mach-imx/irq.c
@@ -26,20 +26,17 @@
26#include <linux/init.h> 26#include <linux/init.h>
27#include <linux/list.h> 27#include <linux/list.h>
28#include <linux/timer.h> 28#include <linux/timer.h>
29#include <linux/io.h>
29 30
30#include <mach/hardware.h> 31#include <mach/hardware.h>
31#include <asm/irq.h> 32#include <asm/irq.h>
32#include <asm/io.h>
33 33
34#include <asm/mach/irq.h> 34#include <asm/mach/irq.h>
35 35
36/* 36/*
37 * 37 *
38 * We simply use the ENABLE DISABLE registers inside of the IMX 38 * We simply use the ENABLE DISABLE registers inside of the IMX
39 * to turn on/off specific interrupts. FIXME- We should 39 * to turn on/off specific interrupts.
40 * also add support for the accelerated interrupt controller
41 * by putting offets to irq jump code in the appropriate
42 * places.
43 * 40 *
44 */ 41 */
45 42
@@ -102,6 +99,28 @@ imx_unmask_irq(unsigned int irq)
102 __raw_writel(irq, IMX_AITC_INTENNUM); 99 __raw_writel(irq, IMX_AITC_INTENNUM);
103} 100}
104 101
102#ifdef CONFIG_FIQ
103int imx_set_irq_fiq(unsigned int irq, unsigned int type)
104{
105 unsigned int irqt;
106
107 if (irq >= IMX_IRQS)
108 return -EINVAL;
109
110 if (irq < IMX_IRQS / 2) {
111 irqt = __raw_readl(IMX_AITC_INTTYPEL) & ~(1 << irq);
112 __raw_writel(irqt | (!!type << irq), IMX_AITC_INTTYPEL);
113 } else {
114 irq -= IMX_IRQS / 2;
115 irqt = __raw_readl(IMX_AITC_INTTYPEH) & ~(1 << irq);
116 __raw_writel(irqt | (!!type << irq), IMX_AITC_INTTYPEH);
117 }
118
119 return 0;
120}
121EXPORT_SYMBOL(imx_set_irq_fiq);
122#endif /* CONFIG_FIQ */
123
105static int 124static int
106imx_gpio_irq_type(unsigned int _irq, unsigned int type) 125imx_gpio_irq_type(unsigned int _irq, unsigned int type)
107{ 126{
@@ -182,14 +201,12 @@ static void
182imx_gpio_handler(unsigned int mask, unsigned int irq, 201imx_gpio_handler(unsigned int mask, unsigned int irq,
183 struct irq_desc *desc) 202 struct irq_desc *desc)
184{ 203{
185 desc = irq_desc + irq;
186 while (mask) { 204 while (mask) {
187 if (mask & 1) { 205 if (mask & 1) {
188 DEBUG_IRQ("handling irq %d\n", irq); 206 DEBUG_IRQ("handling irq %d\n", irq);
189 desc_handle_irq(irq, desc); 207 generic_handle_irq(irq);
190 } 208 }
191 irq++; 209 irq++;
192 desc++;
193 mask >>= 1; 210 mask >>= 1;
194 } 211 }
195} 212}
@@ -286,4 +303,9 @@ imx_init_irq(void)
286 303
287 /* Release masking of interrupts according to priority */ 304 /* Release masking of interrupts according to priority */
288 __raw_writel(-1, IMX_AITC_NIMASK); 305 __raw_writel(-1, IMX_AITC_NIMASK);
306
307#ifdef CONFIG_FIQ
308 /* Initialize FIQ */
309 init_FIQ();
310#endif
289} 311}
diff --git a/arch/arm/mach-imx/leds-mx1ads.c b/arch/arm/mach-imx/leds-mx1ads.c
index af81621f689b..1d48f2762cbc 100644
--- a/arch/arm/mach-imx/leds-mx1ads.c
+++ b/arch/arm/mach-imx/leds-mx1ads.c
@@ -13,9 +13,9 @@
13 13
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/io.h>
16#include <mach/hardware.h> 17#include <mach/hardware.h>
17#include <asm/system.h> 18#include <asm/system.h>
18#include <asm/io.h>
19#include <asm/leds.h> 19#include <asm/leds.h>
20#include "leds.h" 20#include "leds.h"
21 21
diff --git a/arch/arm/mach-imx/time.c b/arch/arm/mach-imx/time.c
index 08be3875c59e..a11765f5f23b 100644
--- a/arch/arm/mach-imx/time.c
+++ b/arch/arm/mach-imx/time.c
@@ -18,9 +18,9 @@
18#include <linux/clocksource.h> 18#include <linux/clocksource.h>
19#include <linux/clockchips.h> 19#include <linux/clockchips.h>
20#include <linux/clk.h> 20#include <linux/clk.h>
21#include <linux/io.h>
21 22
22#include <mach/hardware.h> 23#include <mach/hardware.h>
23#include <asm/io.h>
24#include <asm/leds.h> 24#include <asm/leds.h>
25#include <asm/irq.h> 25#include <asm/irq.h>
26#include <asm/mach/time.h> 26#include <asm/mach/time.h>
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index 8bacf6d4d097..595b7392ee4e 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -19,10 +19,10 @@
19#include <linux/termios.h> 19#include <linux/termios.h>
20#include <linux/amba/bus.h> 20#include <linux/amba/bus.h>
21#include <linux/amba/serial.h> 21#include <linux/amba/serial.h>
22#include <linux/io.h>
22 23
23#include <mach/hardware.h> 24#include <mach/hardware.h>
24#include <asm/irq.h> 25#include <asm/irq.h>
25#include <asm/io.h>
26#include <asm/hardware/arm_timer.h> 26#include <asm/hardware/arm_timer.h>
27#include <mach/cm.h> 27#include <mach/cm.h>
28#include <asm/system.h> 28#include <asm/system.h>
diff --git a/arch/arm/mach-integrator/cpu.c b/arch/arm/mach-integrator/cpu.c
index 7c49d55e6b27..e4f72d202cc0 100644
--- a/arch/arm/mach-integrator/cpu.c
+++ b/arch/arm/mach-integrator/cpu.c
@@ -17,9 +17,9 @@
17#include <linux/sched.h> 17#include <linux/sched.h>
18#include <linux/smp.h> 18#include <linux/smp.h>
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/io.h>
20 21
21#include <mach/hardware.h> 22#include <mach/hardware.h>
22#include <asm/io.h>
23#include <asm/mach-types.h> 23#include <asm/mach-types.h>
24#include <asm/hardware/icst525.h> 24#include <asm/hardware/icst525.h>
25 25
diff --git a/arch/arm/mach-integrator/impd1.c b/arch/arm/mach-integrator/impd1.c
index 3c8383dbe9e6..172299a78302 100644
--- a/arch/arm/mach-integrator/impd1.c
+++ b/arch/arm/mach-integrator/impd1.c
@@ -20,8 +20,8 @@
20#include <linux/mm.h> 20#include <linux/mm.h>
21#include <linux/amba/bus.h> 21#include <linux/amba/bus.h>
22#include <linux/amba/clcd.h> 22#include <linux/amba/clcd.h>
23#include <linux/io.h>
23 24
24#include <asm/io.h>
25#include <asm/hardware/icst525.h> 25#include <asm/hardware/icst525.h>
26#include <mach/lm.h> 26#include <mach/lm.h>
27#include <mach/impd1.h> 27#include <mach/impd1.h>
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index 6e472b5f8f26..8138a7e24562 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -27,9 +27,9 @@
27#include <linux/sysdev.h> 27#include <linux/sysdev.h>
28#include <linux/amba/bus.h> 28#include <linux/amba/bus.h>
29#include <linux/amba/kmi.h> 29#include <linux/amba/kmi.h>
30#include <linux/io.h>
30 31
31#include <mach/hardware.h> 32#include <mach/hardware.h>
32#include <asm/io.h>
33#include <asm/irq.h> 33#include <asm/irq.h>
34#include <asm/setup.h> 34#include <asm/setup.h>
35#include <asm/param.h> /* HZ */ 35#include <asm/param.h> /* HZ */
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index 6b99e9c258bd..88026ccd5ac9 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -19,9 +19,9 @@
19#include <linux/amba/bus.h> 19#include <linux/amba/bus.h>
20#include <linux/amba/kmi.h> 20#include <linux/amba/kmi.h>
21#include <linux/amba/clcd.h> 21#include <linux/amba/clcd.h>
22#include <linux/io.h>
22 23
23#include <mach/hardware.h> 24#include <mach/hardware.h>
24#include <asm/io.h>
25#include <asm/irq.h> 25#include <asm/irq.h>
26#include <asm/setup.h> 26#include <asm/setup.h>
27#include <asm/mach-types.h> 27#include <asm/mach-types.h>
@@ -217,8 +217,7 @@ sic_handle_irq(unsigned int irq, struct irq_desc *desc)
217 217
218 irq += IRQ_SIC_START; 218 irq += IRQ_SIC_START;
219 219
220 desc = irq_desc + irq; 220 generic_handle_irq(irq);
221 desc_handle_irq(irq, desc);
222 } while (status); 221 } while (status);
223} 222}
224 223
diff --git a/arch/arm/mach-integrator/leds.c b/arch/arm/mach-integrator/leds.c
index 7bc6881434ec..8dcc823f4135 100644
--- a/arch/arm/mach-integrator/leds.c
+++ b/arch/arm/mach-integrator/leds.c
@@ -24,9 +24,9 @@
24#include <linux/init.h> 24#include <linux/init.h>
25#include <linux/smp.h> 25#include <linux/smp.h>
26#include <linux/spinlock.h> 26#include <linux/spinlock.h>
27#include <linux/io.h>
27 28
28#include <mach/hardware.h> 29#include <mach/hardware.h>
29#include <asm/io.h>
30#include <asm/leds.h> 30#include <asm/leds.h>
31#include <asm/system.h> 31#include <asm/system.h>
32#include <asm/mach-types.h> 32#include <asm/mach-types.h>
diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c
index 9f2b1ea8fb20..f1d72b225450 100644
--- a/arch/arm/mach-integrator/pci_v3.c
+++ b/arch/arm/mach-integrator/pci_v3.c
@@ -27,9 +27,9 @@
27#include <linux/interrupt.h> 27#include <linux/interrupt.h>
28#include <linux/spinlock.h> 28#include <linux/spinlock.h>
29#include <linux/init.h> 29#include <linux/init.h>
30#include <linux/io.h>
30 31
31#include <mach/hardware.h> 32#include <mach/hardware.h>
32#include <asm/io.h>
33#include <asm/irq.h> 33#include <asm/irq.h>
34#include <asm/system.h> 34#include <asm/system.h>
35#include <asm/mach/pci.h> 35#include <asm/mach/pci.h>
diff --git a/arch/arm/mach-iop13xx/include/mach/memory.h b/arch/arm/mach-iop13xx/include/mach/memory.h
index e8b59d8f1bb9..b82602d529bf 100644
--- a/arch/arm/mach-iop13xx/include/mach/memory.h
+++ b/arch/arm/mach-iop13xx/include/mach/memory.h
@@ -7,9 +7,6 @@
7 * Physical DRAM offset. 7 * Physical DRAM offset.
8 */ 8 */
9#define PHYS_OFFSET UL(0x00000000) 9#define PHYS_OFFSET UL(0x00000000)
10#define TASK_SIZE UL(0x3f000000)
11#define PAGE_OFFSET UL(0x40000000)
12#define TASK_UNMAPPED_BASE ((TASK_SIZE + 0x01000000) / 3)
13 10
14#ifndef __ASSEMBLY__ 11#ifndef __ASSEMBLY__
15 12
@@ -29,32 +26,52 @@
29 26
30/* RAM has 1:1 mapping on the PCIe/x Busses */ 27/* RAM has 1:1 mapping on the PCIe/x Busses */
31#define __virt_to_bus(x) (__virt_to_phys(x)) 28#define __virt_to_bus(x) (__virt_to_phys(x))
32#define __bus_to_virt(x) (__phys_to_virt(x)) 29#define __bus_to_virt(x) (__phys_to_virt(x))
33 30
34#define virt_to_lbus(x) \ 31static inline dma_addr_t __virt_to_lbus(unsigned long x)
35(( ((void*)(x) >= (void*)IOP13XX_PMMR_V_START) && \ 32{
36((void*)(x) < (void*)IOP13XX_PMMR_V_END) ) ? \ 33 return x + IOP13XX_PMMR_PHYS_MEM_BASE - IOP13XX_PMMR_VIRT_MEM_BASE;
37((x) - IOP13XX_PMMR_VIRT_MEM_BASE + IOP13XX_PMMR_PHYS_MEM_BASE) : \ 34}
38((x) - PAGE_OFFSET + PHYS_OFFSET))
39 35
40#define lbus_to_virt(x) \ 36static inline unsigned long __lbus_to_virt(dma_addr_t x)
41(( ((x) >= IOP13XX_PMMR_P_START) && ((x) < IOP13XX_PMMR_P_END) ) ? \ 37{
42((x) - IOP13XX_PMMR_PHYS_MEM_BASE + IOP13XX_PMMR_VIRT_MEM_BASE ) : \ 38 return x + IOP13XX_PMMR_VIRT_MEM_BASE - IOP13XX_PMMR_PHYS_MEM_BASE;
43((x) - PHYS_OFFSET + PAGE_OFFSET)) 39}
40
41#define __is_lbus_dma(a) \
42 ((a) >= IOP13XX_PMMR_P_START && (a) < IOP13XX_PMMR_P_END)
43
44#define __is_lbus_virt(a) \
45 ((a) >= IOP13XX_PMMR_V_START && (a) < IOP13XX_PMMR_V_END)
44 46
45/* Device is an lbus device if it is on the platform bus of the IOP13XX */ 47/* Device is an lbus device if it is on the platform bus of the IOP13XX */
46#define is_lbus_device(dev) (dev &&\ 48#define is_lbus_device(dev) \
47 (strncmp(dev->bus->name, "platform", 8) == 0)) 49 (dev && strncmp(dev->bus->name, "platform", 8) == 0)
48 50
49#define __arch_page_to_dma(dev, page) \ 51#define __arch_dma_to_virt(dev, addr) \
50({is_lbus_device(dev) ? (dma_addr_t)virt_to_lbus(page_address(page)) : \ 52 ({ \
51(dma_addr_t)__virt_to_bus(page_address(page));}) 53 unsigned long __virt; \
54 dma_addr_t __dma = addr; \
55 if (is_lbus_device(dev) && __is_lbus_dma(__dma)) \
56 __virt = __lbus_to_virt(__dma); \
57 else \
58 __virt = __bus_to_virt(__dma); \
59 (void *)__virt; \
60 })
52 61
53#define __arch_dma_to_virt(dev, addr) \ 62#define __arch_virt_to_dma(dev, addr) \
54({is_lbus_device(dev) ? lbus_to_virt(addr) : __bus_to_virt(addr);}) 63 ({ \
64 unsigned long __virt = (unsigned long)addr; \
65 dma_addr_t __dma; \
66 if (is_lbus_device(dev) && __is_lbus_virt(__virt)) \
67 __dma = __virt_to_lbus(__virt); \
68 else \
69 __dma = __virt_to_bus(__virt); \
70 __dma; \
71 })
55 72
56#define __arch_virt_to_dma(dev, addr) \ 73#define __arch_page_to_dma(dev, page) \
57({is_lbus_device(dev) ? virt_to_lbus(addr) : __virt_to_bus(addr);}) 74 __arch_virt_to_dma(dev, page_address(page))
58 75
59#endif /* CONFIG_ARCH_IOP13XX */ 76#endif /* CONFIG_ARCH_IOP13XX */
60#endif /* !ASSEMBLY */ 77#endif /* !ASSEMBLY */
diff --git a/arch/arm/mach-iop13xx/include/mach/pci.h b/arch/arm/mach-iop13xx/include/mach/pci.h
index 17b5515af8b1..59f42b535572 100644
--- a/arch/arm/mach-iop13xx/include/mach/pci.h
+++ b/arch/arm/mach-iop13xx/include/mach/pci.h
@@ -1,7 +1,7 @@
1#ifndef _IOP13XX_PCI_H_ 1#ifndef _IOP13XX_PCI_H_
2#define _IOP13XX_PCI_H_ 2#define _IOP13XX_PCI_H_
3#include <linux/io.h>
3#include <mach/irqs.h> 4#include <mach/irqs.h>
4#include <asm/io.h>
5 5
6struct pci_sys_data; 6struct pci_sys_data;
7struct hw_pci; 7struct hw_pci;
diff --git a/arch/arm/mach-iop13xx/io.c b/arch/arm/mach-iop13xx/io.c
index 26cfa318142c..529580997814 100644
--- a/arch/arm/mach-iop13xx/io.c
+++ b/arch/arm/mach-iop13xx/io.c
@@ -18,8 +18,8 @@
18 */ 18 */
19#include <linux/kernel.h> 19#include <linux/kernel.h>
20#include <linux/module.h> 20#include <linux/module.h>
21#include <linux/io.h>
21#include <mach/hardware.h> 22#include <mach/hardware.h>
22#include <asm/io.h>
23 23
24void * __iomem __iop13xx_io(unsigned long io_addr) 24void * __iomem __iop13xx_io(unsigned long io_addr)
25{ 25{
diff --git a/arch/arm/mach-iop13xx/msi.c b/arch/arm/mach-iop13xx/msi.c
index 63ef1124ca5c..f34b0ed80630 100644
--- a/arch/arm/mach-iop13xx/msi.c
+++ b/arch/arm/mach-iop13xx/msi.c
@@ -110,8 +110,7 @@ static void iop13xx_msi_handler(unsigned int irq, struct irq_desc *desc)
110 do { 110 do {
111 j = find_first_bit(&status, 32); 111 j = find_first_bit(&status, 32);
112 (write_imipr[i])(1 << j); /* write back to clear bit */ 112 (write_imipr[i])(1 << j); /* write back to clear bit */
113 desc = irq_desc + IRQ_IOP13XX_MSI_0 + j + (32*i); 113 generic_handle_irq(IRQ_IOP13XX_MSI_0 + j + (32*i));
114 desc_handle_irq(IRQ_IOP13XX_MSI_0 + j + (32*i), desc);
115 status = (read_imipr[i])(); 114 status = (read_imipr[i])();
116 } while (status); 115 } while (status);
117 } 116 }
diff --git a/arch/arm/mach-iop13xx/setup.c b/arch/arm/mach-iop13xx/setup.c
index b17ccc8cb471..cfd4d2e6dacd 100644
--- a/arch/arm/mach-iop13xx/setup.c
+++ b/arch/arm/mach-iop13xx/setup.c
@@ -18,13 +18,13 @@
18 */ 18 */
19 19
20#include <linux/serial_8250.h> 20#include <linux/serial_8250.h>
21#include <linux/io.h>
21#ifdef CONFIG_MTD_PHYSMAP 22#ifdef CONFIG_MTD_PHYSMAP
22#include <linux/mtd/physmap.h> 23#include <linux/mtd/physmap.h>
23#endif 24#endif
24#include <asm/mach/map.h> 25#include <asm/mach/map.h>
25#include <mach/hardware.h> 26#include <mach/hardware.h>
26#include <asm/irq.h> 27#include <asm/irq.h>
27#include <asm/io.h>
28#include <asm/hardware/iop_adma.h> 28#include <asm/hardware/iop_adma.h>
29 29
30#define IOP13XX_UART_XTAL 33334000 30#define IOP13XX_UART_XTAL 33334000
diff --git a/arch/arm/mach-iop13xx/tpmi.c b/arch/arm/mach-iop13xx/tpmi.c
index 2476347ea62f..c6af1e1bee32 100644
--- a/arch/arm/mach-iop13xx/tpmi.c
+++ b/arch/arm/mach-iop13xx/tpmi.c
@@ -21,7 +21,7 @@
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/platform_device.h> 22#include <linux/platform_device.h>
23#include <linux/dma-mapping.h> 23#include <linux/dma-mapping.h>
24#include <asm/io.h> 24#include <linux/io.h>
25#include <asm/irq.h> 25#include <asm/irq.h>
26#include <asm/sizes.h> 26#include <asm/sizes.h>
27 27
diff --git a/arch/arm/mach-iop32x/glantank.c b/arch/arm/mach-iop32x/glantank.c
index 45d61276d233..a9c2dfdb2507 100644
--- a/arch/arm/mach-iop32x/glantank.c
+++ b/arch/arm/mach-iop32x/glantank.c
@@ -25,8 +25,8 @@
25#include <linux/mtd/physmap.h> 25#include <linux/mtd/physmap.h>
26#include <linux/i2c.h> 26#include <linux/i2c.h>
27#include <linux/platform_device.h> 27#include <linux/platform_device.h>
28#include <linux/io.h>
28#include <mach/hardware.h> 29#include <mach/hardware.h>
29#include <asm/io.h>
30#include <asm/irq.h> 30#include <asm/irq.h>
31#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
32#include <asm/mach/map.h> 32#include <asm/mach/map.h>
diff --git a/arch/arm/mach-iop32x/iq31244.c b/arch/arm/mach-iop32x/iq31244.c
index 082818aaa205..dd1cd9904518 100644
--- a/arch/arm/mach-iop32x/iq31244.c
+++ b/arch/arm/mach-iop32x/iq31244.c
@@ -26,8 +26,9 @@
26#include <linux/serial_8250.h> 26#include <linux/serial_8250.h>
27#include <linux/mtd/physmap.h> 27#include <linux/mtd/physmap.h>
28#include <linux/platform_device.h> 28#include <linux/platform_device.h>
29#include <linux/io.h>
29#include <mach/hardware.h> 30#include <mach/hardware.h>
30#include <asm/io.h> 31#include <asm/cputype.h>
31#include <asm/irq.h> 32#include <asm/irq.h>
32#include <asm/mach/arch.h> 33#include <asm/mach/arch.h>
33#include <asm/mach/map.h> 34#include <asm/mach/map.h>
@@ -49,8 +50,7 @@ static int force_ep80219;
49 50
50static int is_80219(void) 51static int is_80219(void)
51{ 52{
52 extern int processor_id; 53 return !!((read_cpuid_id() & 0xffffffe0) == 0x69052e20);
53 return !!((processor_id & 0xffffffe0) == 0x69052e20);
54} 54}
55 55
56static int is_ep80219(void) 56static int is_ep80219(void)
diff --git a/arch/arm/mach-iop32x/iq80321.c b/arch/arm/mach-iop32x/iq80321.c
index d735539808b4..fbe27798759d 100644
--- a/arch/arm/mach-iop32x/iq80321.c
+++ b/arch/arm/mach-iop32x/iq80321.c
@@ -23,8 +23,8 @@
23#include <linux/serial_8250.h> 23#include <linux/serial_8250.h>
24#include <linux/mtd/physmap.h> 24#include <linux/mtd/physmap.h>
25#include <linux/platform_device.h> 25#include <linux/platform_device.h>
26#include <linux/io.h>
26#include <mach/hardware.h> 27#include <mach/hardware.h>
27#include <asm/io.h>
28#include <asm/irq.h> 28#include <asm/irq.h>
29#include <asm/mach/arch.h> 29#include <asm/mach/arch.h>
30#include <asm/mach/map.h> 30#include <asm/mach/map.h>
diff --git a/arch/arm/mach-iop32x/n2100.c b/arch/arm/mach-iop32x/n2100.c
index 3173f9c5835d..d2e427899729 100644
--- a/arch/arm/mach-iop32x/n2100.c
+++ b/arch/arm/mach-iop32x/n2100.c
@@ -30,8 +30,8 @@
30#include <linux/i2c.h> 30#include <linux/i2c.h>
31#include <linux/platform_device.h> 31#include <linux/platform_device.h>
32#include <linux/reboot.h> 32#include <linux/reboot.h>
33#include <linux/io.h>
33#include <mach/hardware.h> 34#include <mach/hardware.h>
34#include <asm/io.h>
35#include <asm/irq.h> 35#include <asm/irq.h>
36#include <asm/mach/arch.h> 36#include <asm/mach/arch.h>
37#include <asm/mach/map.h> 37#include <asm/mach/map.h>
diff --git a/arch/arm/mach-iop33x/iq80331.c b/arch/arm/mach-iop33x/iq80331.c
index c7d99f9fafed..d51e10cddf20 100644
--- a/arch/arm/mach-iop33x/iq80331.c
+++ b/arch/arm/mach-iop33x/iq80331.c
@@ -22,8 +22,8 @@
22#include <linux/serial_8250.h> 22#include <linux/serial_8250.h>
23#include <linux/mtd/physmap.h> 23#include <linux/mtd/physmap.h>
24#include <linux/platform_device.h> 24#include <linux/platform_device.h>
25#include <linux/io.h>
25#include <mach/hardware.h> 26#include <mach/hardware.h>
26#include <asm/io.h>
27#include <asm/irq.h> 27#include <asm/irq.h>
28#include <asm/mach/arch.h> 28#include <asm/mach/arch.h>
29#include <asm/mach/map.h> 29#include <asm/mach/map.h>
diff --git a/arch/arm/mach-iop33x/iq80332.c b/arch/arm/mach-iop33x/iq80332.c
index af616c5f4fb2..92fb44cdbcad 100644
--- a/arch/arm/mach-iop33x/iq80332.c
+++ b/arch/arm/mach-iop33x/iq80332.c
@@ -22,8 +22,8 @@
22#include <linux/serial_8250.h> 22#include <linux/serial_8250.h>
23#include <linux/mtd/physmap.h> 23#include <linux/mtd/physmap.h>
24#include <linux/platform_device.h> 24#include <linux/platform_device.h>
25#include <linux/io.h>
25#include <mach/hardware.h> 26#include <mach/hardware.h>
26#include <asm/io.h>
27#include <asm/irq.h> 27#include <asm/irq.h>
28#include <asm/mach/arch.h> 28#include <asm/mach/arch.h>
29#include <asm/mach/map.h> 29#include <asm/mach/map.h>
diff --git a/arch/arm/mach-iop33x/uart.c b/arch/arm/mach-iop33x/uart.c
index 8c21870fa808..cdae24e46eea 100644
--- a/arch/arm/mach-iop33x/uart.c
+++ b/arch/arm/mach-iop33x/uart.c
@@ -17,7 +17,7 @@
17#include <linux/serial.h> 17#include <linux/serial.h>
18#include <linux/tty.h> 18#include <linux/tty.h>
19#include <linux/serial_8250.h> 19#include <linux/serial_8250.h>
20#include <asm/io.h> 20#include <linux/io.h>
21#include <asm/pgtable.h> 21#include <asm/pgtable.h>
22#include <asm/page.h> 22#include <asm/page.h>
23#include <asm/mach/map.h> 23#include <asm/mach/map.h>
diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c
index a6a4f93085fd..babb22597163 100644
--- a/arch/arm/mach-ixp2000/core.c
+++ b/arch/arm/mach-ixp2000/core.c
@@ -84,64 +84,57 @@ static struct map_desc ixp2000_io_desc[] __initdata = {
84 .virtual = IXP2000_CAP_VIRT_BASE, 84 .virtual = IXP2000_CAP_VIRT_BASE,
85 .pfn = __phys_to_pfn(IXP2000_CAP_PHYS_BASE), 85 .pfn = __phys_to_pfn(IXP2000_CAP_PHYS_BASE),
86 .length = IXP2000_CAP_SIZE, 86 .length = IXP2000_CAP_SIZE,
87 .type = MT_DEVICE_IXP2000, 87 .type = MT_DEVICE,
88 }, { 88 }, {
89 .virtual = IXP2000_INTCTL_VIRT_BASE, 89 .virtual = IXP2000_INTCTL_VIRT_BASE,
90 .pfn = __phys_to_pfn(IXP2000_INTCTL_PHYS_BASE), 90 .pfn = __phys_to_pfn(IXP2000_INTCTL_PHYS_BASE),
91 .length = IXP2000_INTCTL_SIZE, 91 .length = IXP2000_INTCTL_SIZE,
92 .type = MT_DEVICE_IXP2000, 92 .type = MT_DEVICE,
93 }, { 93 }, {
94 .virtual = IXP2000_PCI_CREG_VIRT_BASE, 94 .virtual = IXP2000_PCI_CREG_VIRT_BASE,
95 .pfn = __phys_to_pfn(IXP2000_PCI_CREG_PHYS_BASE), 95 .pfn = __phys_to_pfn(IXP2000_PCI_CREG_PHYS_BASE),
96 .length = IXP2000_PCI_CREG_SIZE, 96 .length = IXP2000_PCI_CREG_SIZE,
97 .type = MT_DEVICE_IXP2000, 97 .type = MT_DEVICE,
98 }, { 98 }, {
99 .virtual = IXP2000_PCI_CSR_VIRT_BASE, 99 .virtual = IXP2000_PCI_CSR_VIRT_BASE,
100 .pfn = __phys_to_pfn(IXP2000_PCI_CSR_PHYS_BASE), 100 .pfn = __phys_to_pfn(IXP2000_PCI_CSR_PHYS_BASE),
101 .length = IXP2000_PCI_CSR_SIZE, 101 .length = IXP2000_PCI_CSR_SIZE,
102 .type = MT_DEVICE_IXP2000, 102 .type = MT_DEVICE,
103 }, { 103 }, {
104 .virtual = IXP2000_MSF_VIRT_BASE, 104 .virtual = IXP2000_MSF_VIRT_BASE,
105 .pfn = __phys_to_pfn(IXP2000_MSF_PHYS_BASE), 105 .pfn = __phys_to_pfn(IXP2000_MSF_PHYS_BASE),
106 .length = IXP2000_MSF_SIZE, 106 .length = IXP2000_MSF_SIZE,
107 .type = MT_DEVICE_IXP2000, 107 .type = MT_DEVICE,
108 }, { 108 }, {
109 .virtual = IXP2000_SCRATCH_RING_VIRT_BASE, 109 .virtual = IXP2000_SCRATCH_RING_VIRT_BASE,
110 .pfn = __phys_to_pfn(IXP2000_SCRATCH_RING_PHYS_BASE), 110 .pfn = __phys_to_pfn(IXP2000_SCRATCH_RING_PHYS_BASE),
111 .length = IXP2000_SCRATCH_RING_SIZE, 111 .length = IXP2000_SCRATCH_RING_SIZE,
112 .type = MT_DEVICE_IXP2000, 112 .type = MT_DEVICE,
113 }, { 113 }, {
114 .virtual = IXP2000_SRAM0_VIRT_BASE, 114 .virtual = IXP2000_SRAM0_VIRT_BASE,
115 .pfn = __phys_to_pfn(IXP2000_SRAM0_PHYS_BASE), 115 .pfn = __phys_to_pfn(IXP2000_SRAM0_PHYS_BASE),
116 .length = IXP2000_SRAM0_SIZE, 116 .length = IXP2000_SRAM0_SIZE,
117 .type = MT_DEVICE_IXP2000, 117 .type = MT_DEVICE,
118 }, { 118 }, {
119 .virtual = IXP2000_PCI_IO_VIRT_BASE, 119 .virtual = IXP2000_PCI_IO_VIRT_BASE,
120 .pfn = __phys_to_pfn(IXP2000_PCI_IO_PHYS_BASE), 120 .pfn = __phys_to_pfn(IXP2000_PCI_IO_PHYS_BASE),
121 .length = IXP2000_PCI_IO_SIZE, 121 .length = IXP2000_PCI_IO_SIZE,
122 .type = MT_DEVICE_IXP2000, 122 .type = MT_DEVICE,
123 }, { 123 }, {
124 .virtual = IXP2000_PCI_CFG0_VIRT_BASE, 124 .virtual = IXP2000_PCI_CFG0_VIRT_BASE,
125 .pfn = __phys_to_pfn(IXP2000_PCI_CFG0_PHYS_BASE), 125 .pfn = __phys_to_pfn(IXP2000_PCI_CFG0_PHYS_BASE),
126 .length = IXP2000_PCI_CFG0_SIZE, 126 .length = IXP2000_PCI_CFG0_SIZE,
127 .type = MT_DEVICE_IXP2000, 127 .type = MT_DEVICE,
128 }, { 128 }, {
129 .virtual = IXP2000_PCI_CFG1_VIRT_BASE, 129 .virtual = IXP2000_PCI_CFG1_VIRT_BASE,
130 .pfn = __phys_to_pfn(IXP2000_PCI_CFG1_PHYS_BASE), 130 .pfn = __phys_to_pfn(IXP2000_PCI_CFG1_PHYS_BASE),
131 .length = IXP2000_PCI_CFG1_SIZE, 131 .length = IXP2000_PCI_CFG1_SIZE,
132 .type = MT_DEVICE_IXP2000, 132 .type = MT_DEVICE,
133 } 133 }
134}; 134};
135 135
136void __init ixp2000_map_io(void) 136void __init ixp2000_map_io(void)
137{ 137{
138 /*
139 * On IXP2400 CPUs we need to use MT_DEVICE_IXP2000 so that
140 * XCB=101 (to avoid triggering erratum #66), and given that
141 * this mode speeds up I/O accesses and we have write buffer
142 * flushes in the right places anyway, it doesn't hurt to use
143 * XCB=101 for all IXP2000s.
144 */
145 iotable_init(ixp2000_io_desc, ARRAY_SIZE(ixp2000_io_desc)); 138 iotable_init(ixp2000_io_desc, ARRAY_SIZE(ixp2000_io_desc));
146 139
147 /* Set slowport to 8-bit mode. */ 140 /* Set slowport to 8-bit mode. */
@@ -311,8 +304,7 @@ static void ixp2000_GPIO_irq_handler(unsigned int irq, struct irq_desc *desc)
311 304
312 for (i = 0; i <= 7; i++) { 305 for (i = 0; i <= 7; i++) {
313 if (status & (1<<i)) { 306 if (status & (1<<i)) {
314 desc = irq_desc + i + IRQ_IXP2000_GPIO0; 307 generic_handle_irq(i + IRQ_IXP2000_GPIO0);
315 desc_handle_irq(i + IRQ_IXP2000_GPIO0, desc);
316 } 308 }
317 } 309 }
318} 310}
@@ -404,8 +396,7 @@ static void ixp2000_err_irq_handler(unsigned int irq, struct irq_desc *desc)
404 396
405 for(i = 31; i >= 0; i--) { 397 for(i = 31; i >= 0; i--) {
406 if(status & (1 << i)) { 398 if(status & (1 << i)) {
407 desc = irq_desc + IRQ_IXP2000_DRAM0_MIN_ERR + i; 399 generic_handle_irq(IRQ_IXP2000_DRAM0_MIN_ERR + i);
408 desc_handle_irq(IRQ_IXP2000_DRAM0_MIN_ERR + i, desc);
409 } 400 }
410 } 401 }
411} 402}
diff --git a/arch/arm/mach-ixp2000/enp2611.c b/arch/arm/mach-ixp2000/enp2611.c
index c62ed655c1a7..c84dfac13882 100644
--- a/arch/arm/mach-ixp2000/enp2611.c
+++ b/arch/arm/mach-ixp2000/enp2611.c
@@ -32,8 +32,8 @@
32#include <linux/tty.h> 32#include <linux/tty.h>
33#include <linux/serial_core.h> 33#include <linux/serial_core.h>
34#include <linux/platform_device.h> 34#include <linux/platform_device.h>
35#include <linux/io.h>
35 36
36#include <asm/io.h>
37#include <asm/irq.h> 37#include <asm/irq.h>
38#include <asm/pgtable.h> 38#include <asm/pgtable.h>
39#include <asm/page.h> 39#include <asm/page.h>
@@ -70,17 +70,17 @@ static struct map_desc enp2611_io_desc[] __initdata = {
70 .virtual = ENP2611_CALEB_VIRT_BASE, 70 .virtual = ENP2611_CALEB_VIRT_BASE,
71 .pfn = __phys_to_pfn(ENP2611_CALEB_PHYS_BASE), 71 .pfn = __phys_to_pfn(ENP2611_CALEB_PHYS_BASE),
72 .length = ENP2611_CALEB_SIZE, 72 .length = ENP2611_CALEB_SIZE,
73 .type = MT_DEVICE_IXP2000, 73 .type = MT_DEVICE,
74 }, { 74 }, {
75 .virtual = ENP2611_PM3386_0_VIRT_BASE, 75 .virtual = ENP2611_PM3386_0_VIRT_BASE,
76 .pfn = __phys_to_pfn(ENP2611_PM3386_0_PHYS_BASE), 76 .pfn = __phys_to_pfn(ENP2611_PM3386_0_PHYS_BASE),
77 .length = ENP2611_PM3386_0_SIZE, 77 .length = ENP2611_PM3386_0_SIZE,
78 .type = MT_DEVICE_IXP2000, 78 .type = MT_DEVICE,
79 }, { 79 }, {
80 .virtual = ENP2611_PM3386_1_VIRT_BASE, 80 .virtual = ENP2611_PM3386_1_VIRT_BASE,
81 .pfn = __phys_to_pfn(ENP2611_PM3386_1_PHYS_BASE), 81 .pfn = __phys_to_pfn(ENP2611_PM3386_1_PHYS_BASE),
82 .length = ENP2611_PM3386_1_SIZE, 82 .length = ENP2611_PM3386_1_SIZE,
83 .type = MT_DEVICE_IXP2000, 83 .type = MT_DEVICE,
84 } 84 }
85}; 85};
86 86
diff --git a/arch/arm/mach-ixp2000/include/mach/ixp2000-regs.h b/arch/arm/mach-ixp2000/include/mach/ixp2000-regs.h
index 19d80379a3e3..822f63f2f4a2 100644
--- a/arch/arm/mach-ixp2000/include/mach/ixp2000-regs.h
+++ b/arch/arm/mach-ixp2000/include/mach/ixp2000-regs.h
@@ -41,13 +41,7 @@
41 * Most of the registers are clumped in 4K regions spread throughout 41 * Most of the registers are clumped in 4K regions spread throughout
42 * the 0xc0000000 -> 0xc0100000 address range, but we just map in 42 * the 0xc0000000 -> 0xc0100000 address range, but we just map in
43 * the whole range using a single 1 MB section instead of small 43 * the whole range using a single 1 MB section instead of small
44 * 4K pages. This has two advantages for us: 44 * 4K pages.
45 *
46 * 1) We use only one TLB entry for large number of on-chip I/O devices.
47 *
48 * 2) We can easily set the Section attributes to XCB=101 on the IXP2400
49 * as required per erratum #66. We accomplish this by using a
50 * new MT_IXP2000_DEVICE memory type with the bits set as required.
51 * 45 *
52 * CAP stands for CSR Access Proxy. 46 * CAP stands for CSR Access Proxy.
53 * 47 *
diff --git a/arch/arm/mach-ixp2000/ixdp2400.c b/arch/arm/mach-ixp2000/ixdp2400.c
index c673b9ef9f69..4467c4224d73 100644
--- a/arch/arm/mach-ixp2000/ixdp2400.c
+++ b/arch/arm/mach-ixp2000/ixdp2400.c
@@ -25,8 +25,8 @@
25#include <linux/ioport.h> 25#include <linux/ioport.h>
26#include <linux/slab.h> 26#include <linux/slab.h>
27#include <linux/delay.h> 27#include <linux/delay.h>
28#include <linux/io.h>
28 29
29#include <asm/io.h>
30#include <asm/irq.h> 30#include <asm/irq.h>
31#include <asm/pgtable.h> 31#include <asm/pgtable.h>
32#include <asm/page.h> 32#include <asm/page.h>
diff --git a/arch/arm/mach-ixp2000/ixdp2800.c b/arch/arm/mach-ixp2000/ixdp2800.c
index 6715b50829a6..94f68ba9ea50 100644
--- a/arch/arm/mach-ixp2000/ixdp2800.c
+++ b/arch/arm/mach-ixp2000/ixdp2800.c
@@ -25,8 +25,8 @@
25#include <linux/ioport.h> 25#include <linux/ioport.h>
26#include <linux/slab.h> 26#include <linux/slab.h>
27#include <linux/delay.h> 27#include <linux/delay.h>
28#include <linux/io.h>
28 29
29#include <asm/io.h>
30#include <asm/irq.h> 30#include <asm/irq.h>
31#include <asm/pgtable.h> 31#include <asm/pgtable.h>
32#include <asm/page.h> 32#include <asm/page.h>
diff --git a/arch/arm/mach-ixp2000/ixdp2x00.c b/arch/arm/mach-ixp2000/ixdp2x00.c
index 5a781fd9757a..b0653a87159a 100644
--- a/arch/arm/mach-ixp2000/ixdp2x00.c
+++ b/arch/arm/mach-ixp2000/ixdp2x00.c
@@ -25,8 +25,8 @@
25#include <linux/ioport.h> 25#include <linux/ioport.h>
26#include <linux/slab.h> 26#include <linux/slab.h>
27#include <linux/delay.h> 27#include <linux/delay.h>
28#include <linux/io.h>
28 29
29#include <asm/io.h>
30#include <asm/irq.h> 30#include <asm/irq.h>
31#include <asm/pgtable.h> 31#include <asm/pgtable.h>
32#include <asm/page.h> 32#include <asm/page.h>
@@ -129,10 +129,8 @@ static void ixdp2x00_irq_handler(unsigned int irq, struct irq_desc *desc)
129 129
130 for(i = 0; i < board_irq_count; i++) { 130 for(i = 0; i < board_irq_count; i++) {
131 if(ex_interrupt & (1 << i)) { 131 if(ex_interrupt & (1 << i)) {
132 struct irq_desc *cpld_desc;
133 int cpld_irq = IXP2000_BOARD_IRQ(0) + i; 132 int cpld_irq = IXP2000_BOARD_IRQ(0) + i;
134 cpld_desc = irq_desc + cpld_irq; 133 generic_handle_irq(cpld_irq);
135 desc_handle_irq(cpld_irq, cpld_desc);
136 } 134 }
137 } 135 }
138 136
diff --git a/arch/arm/mach-ixp2000/ixdp2x01.c b/arch/arm/mach-ixp2000/ixdp2x01.c
index 78a2341dee2c..4a12327a09a3 100644
--- a/arch/arm/mach-ixp2000/ixdp2x01.c
+++ b/arch/arm/mach-ixp2000/ixdp2x01.c
@@ -30,8 +30,8 @@
30#include <linux/serial_core.h> 30#include <linux/serial_core.h>
31#include <linux/platform_device.h> 31#include <linux/platform_device.h>
32#include <linux/serial_8250.h> 32#include <linux/serial_8250.h>
33#include <linux/io.h>
33 34
34#include <asm/io.h>
35#include <asm/irq.h> 35#include <asm/irq.h>
36#include <asm/pgtable.h> 36#include <asm/pgtable.h>
37#include <asm/page.h> 37#include <asm/page.h>
@@ -79,10 +79,8 @@ static void ixdp2x01_irq_handler(unsigned int irq, struct irq_desc *desc)
79 79
80 for (i = 0; i < IXP2000_BOARD_IRQS; i++) { 80 for (i = 0; i < IXP2000_BOARD_IRQS; i++) {
81 if (ex_interrupt & (1 << i)) { 81 if (ex_interrupt & (1 << i)) {
82 struct irq_desc *cpld_desc;
83 int cpld_irq = IXP2000_BOARD_IRQ(0) + i; 82 int cpld_irq = IXP2000_BOARD_IRQ(0) + i;
84 cpld_desc = irq_desc + cpld_irq; 83 generic_handle_irq(cpld_irq);
85 desc_handle_irq(cpld_irq, cpld_desc);
86 } 84 }
87 } 85 }
88 86
diff --git a/arch/arm/mach-ixp2000/pci.c b/arch/arm/mach-ixp2000/pci.c
index 03d916fbe531..60e9fd08ab80 100644
--- a/arch/arm/mach-ixp2000/pci.c
+++ b/arch/arm/mach-ixp2000/pci.c
@@ -24,8 +24,8 @@
24#include <linux/ioport.h> 24#include <linux/ioport.h>
25#include <linux/slab.h> 25#include <linux/slab.h>
26#include <linux/delay.h> 26#include <linux/delay.h>
27#include <linux/io.h>
27 28
28#include <asm/io.h>
29#include <asm/irq.h> 29#include <asm/irq.h>
30#include <asm/system.h> 30#include <asm/system.h>
31#include <mach/hardware.h> 31#include <mach/hardware.h>
diff --git a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c
index 68b4ac5b2481..aa4c4420ff3d 100644
--- a/arch/arm/mach-ixp23xx/core.c
+++ b/arch/arm/mach-ixp23xx/core.c
@@ -253,7 +253,6 @@ static void pci_handler(unsigned int irq, struct irq_desc *desc)
253{ 253{
254 u32 pci_interrupt; 254 u32 pci_interrupt;
255 unsigned int irqno; 255 unsigned int irqno;
256 struct irq_desc *int_desc;
257 256
258 pci_interrupt = *IXP23XX_PCI_XSCALE_INT_STATUS; 257 pci_interrupt = *IXP23XX_PCI_XSCALE_INT_STATUS;
259 258
@@ -268,8 +267,7 @@ static void pci_handler(unsigned int irq, struct irq_desc *desc)
268 BUG(); 267 BUG();
269 } 268 }
270 269
271 int_desc = irq_desc + irqno; 270 generic_handle_irq(irqno);
272 desc_handle_irq(irqno, int_desc);
273 271
274 desc->chip->unmask(irq); 272 desc->chip->unmask(irq);
275} 273}
diff --git a/arch/arm/mach-ixp23xx/ixdp2351.c b/arch/arm/mach-ixp23xx/ixdp2351.c
index b6e0bfa44df9..f1b124a709ab 100644
--- a/arch/arm/mach-ixp23xx/ixdp2351.c
+++ b/arch/arm/mach-ixp23xx/ixdp2351.c
@@ -68,11 +68,9 @@ static void ixdp2351_inta_handler(unsigned int irq, struct irq_desc *desc)
68 68
69 for (i = 0; i < IXDP2351_INTA_IRQ_NUM; i++) { 69 for (i = 0; i < IXDP2351_INTA_IRQ_NUM; i++) {
70 if (ex_interrupt & (1 << i)) { 70 if (ex_interrupt & (1 << i)) {
71 struct irq_desc *cpld_desc;
72 int cpld_irq = 71 int cpld_irq =
73 IXP23XX_MACH_IRQ(IXDP2351_INTA_IRQ_BASE + i); 72 IXP23XX_MACH_IRQ(IXDP2351_INTA_IRQ_BASE + i);
74 cpld_desc = irq_desc + cpld_irq; 73 generic_handle_irq(cpld_irq);
75 desc_handle_irq(cpld_irq, cpld_desc);
76 } 74 }
77 } 75 }
78 76
@@ -105,11 +103,9 @@ static void ixdp2351_intb_handler(unsigned int irq, struct irq_desc *desc)
105 103
106 for (i = 0; i < IXDP2351_INTB_IRQ_NUM; i++) { 104 for (i = 0; i < IXDP2351_INTB_IRQ_NUM; i++) {
107 if (ex_interrupt & (1 << i)) { 105 if (ex_interrupt & (1 << i)) {
108 struct irq_desc *cpld_desc;
109 int cpld_irq = 106 int cpld_irq =
110 IXP23XX_MACH_IRQ(IXDP2351_INTB_IRQ_BASE + i); 107 IXP23XX_MACH_IRQ(IXDP2351_INTB_IRQ_BASE + i);
111 cpld_desc = irq_desc + cpld_irq; 108 generic_handle_irq(cpld_irq);
112 desc_handle_irq(cpld_irq, cpld_desc);
113 } 109 }
114 } 110 }
115 111
diff --git a/arch/arm/mach-ixp23xx/pci.c b/arch/arm/mach-ixp23xx/pci.c
index 701d60aa0efd..59022becb134 100644
--- a/arch/arm/mach-ixp23xx/pci.c
+++ b/arch/arm/mach-ixp23xx/pci.c
@@ -25,8 +25,8 @@
25#include <linux/ioport.h> 25#include <linux/ioport.h>
26#include <linux/slab.h> 26#include <linux/slab.h>
27#include <linux/delay.h> 27#include <linux/delay.h>
28#include <linux/io.h>
28 29
29#include <asm/io.h>
30#include <asm/irq.h> 30#include <asm/irq.h>
31#include <asm/sizes.h> 31#include <asm/sizes.h>
32#include <asm/system.h> 32#include <asm/system.h>
diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c
index 192538a04575..d816c51320c7 100644
--- a/arch/arm/mach-ixp4xx/common-pci.c
+++ b/arch/arm/mach-ixp4xx/common-pci.c
@@ -25,9 +25,10 @@
25#include <linux/slab.h> 25#include <linux/slab.h>
26#include <linux/delay.h> 26#include <linux/delay.h>
27#include <linux/device.h> 27#include <linux/device.h>
28#include <linux/io.h>
28#include <asm/dma-mapping.h> 29#include <asm/dma-mapping.h>
29 30
30#include <asm/io.h> 31#include <asm/cputype.h>
31#include <asm/irq.h> 32#include <asm/irq.h>
32#include <asm/sizes.h> 33#include <asm/sizes.h>
33#include <asm/system.h> 34#include <asm/system.h>
@@ -366,15 +367,13 @@ void __init ixp4xx_adjust_zones(int node, unsigned long *zone_size,
366 367
367void __init ixp4xx_pci_preinit(void) 368void __init ixp4xx_pci_preinit(void)
368{ 369{
369 unsigned long processor_id; 370 unsigned long cpuid = read_cpuid_id();
370
371 asm("mrc p15, 0, %0, cr0, cr0, 0;" : "=r"(processor_id) :);
372 371
373 /* 372 /*
374 * Determine which PCI read method to use. 373 * Determine which PCI read method to use.
375 * Rev 0 IXP425 requires workaround. 374 * Rev 0 IXP425 requires workaround.
376 */ 375 */
377 if (!(processor_id & 0xf) && cpu_is_ixp42x()) { 376 if (!(cpuid & 0xf) && cpu_is_ixp42x()) {
378 printk("PCI: IXP42x A0 silicon detected - " 377 printk("PCI: IXP42x A0 silicon detected - "
379 "PCI Non-Prefetch Workaround Enabled\n"); 378 "PCI Non-Prefetch Workaround Enabled\n");
380 ixp4xx_pci_read = ixp4xx_pci_read_errata; 379 ixp4xx_pci_read = ixp4xx_pci_read_errata;
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index 58bd2842a6f1..7766f469456b 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -28,11 +28,11 @@
28#include <linux/timex.h> 28#include <linux/timex.h>
29#include <linux/clocksource.h> 29#include <linux/clocksource.h>
30#include <linux/clockchips.h> 30#include <linux/clockchips.h>
31#include <linux/io.h>
31 32
32#include <mach/udc.h> 33#include <mach/udc.h>
33#include <mach/hardware.h> 34#include <mach/hardware.h>
34#include <asm/uaccess.h> 35#include <asm/uaccess.h>
35#include <asm/io.h>
36#include <asm/pgtable.h> 36#include <asm/pgtable.h>
37#include <asm/page.h> 37#include <asm/page.h>
38#include <asm/irq.h> 38#include <asm/irq.h>
diff --git a/arch/arm/mach-ixp4xx/fsg-setup.c b/arch/arm/mach-ixp4xx/fsg-setup.c
index 501dfdcc39fe..e7c6386782ed 100644
--- a/arch/arm/mach-ixp4xx/fsg-setup.c
+++ b/arch/arm/mach-ixp4xx/fsg-setup.c
@@ -23,11 +23,11 @@
23#include <linux/reboot.h> 23#include <linux/reboot.h>
24#include <linux/i2c.h> 24#include <linux/i2c.h>
25#include <linux/i2c-gpio.h> 25#include <linux/i2c-gpio.h>
26#include <linux/io.h>
26 27
27#include <asm/mach-types.h> 28#include <asm/mach-types.h>
28#include <asm/mach/arch.h> 29#include <asm/mach/arch.h>
29#include <asm/mach/flash.h> 30#include <asm/mach/flash.h>
30#include <asm/io.h>
31#include <asm/gpio.h> 31#include <asm/gpio.h>
32 32
33static struct flash_platform_data fsg_flash_data = { 33static struct flash_platform_data fsg_flash_data = {
diff --git a/arch/arm/mach-ixp4xx/include/mach/cpu.h b/arch/arm/mach-ixp4xx/include/mach/cpu.h
index ff8aa2393bf9..51bd69c46d94 100644
--- a/arch/arm/mach-ixp4xx/include/mach/cpu.h
+++ b/arch/arm/mach-ixp4xx/include/mach/cpu.h
@@ -14,18 +14,19 @@
14#ifndef __ASM_ARCH_CPU_H__ 14#ifndef __ASM_ARCH_CPU_H__
15#define __ASM_ARCH_CPU_H__ 15#define __ASM_ARCH_CPU_H__
16 16
17extern unsigned int processor_id; 17#include <asm/cputype.h>
18
18/* Processor id value in CP15 Register 0 */ 19/* Processor id value in CP15 Register 0 */
19#define IXP425_PROCESSOR_ID_VALUE 0x690541c0 20#define IXP425_PROCESSOR_ID_VALUE 0x690541c0
20#define IXP435_PROCESSOR_ID_VALUE 0x69054040 21#define IXP435_PROCESSOR_ID_VALUE 0x69054040
21#define IXP465_PROCESSOR_ID_VALUE 0x69054200 22#define IXP465_PROCESSOR_ID_VALUE 0x69054200
22#define IXP4XX_PROCESSOR_ID_MASK 0xfffffff0 23#define IXP4XX_PROCESSOR_ID_MASK 0xfffffff0
23 24
24#define cpu_is_ixp42x() ((processor_id & IXP4XX_PROCESSOR_ID_MASK) == \ 25#define cpu_is_ixp42x() ((read_cpuid_id() & IXP4XX_PROCESSOR_ID_MASK) == \
25 IXP425_PROCESSOR_ID_VALUE) 26 IXP425_PROCESSOR_ID_VALUE)
26#define cpu_is_ixp43x() ((processor_id & IXP4XX_PROCESSOR_ID_MASK) == \ 27#define cpu_is_ixp43x() ((read_cpuid_id() & IXP4XX_PROCESSOR_ID_MASK) == \
27 IXP435_PROCESSOR_ID_VALUE) 28 IXP435_PROCESSOR_ID_VALUE)
28#define cpu_is_ixp46x() ((processor_id & IXP4XX_PROCESSOR_ID_MASK) == \ 29#define cpu_is_ixp46x() ((read_cpuid_id() & IXP4XX_PROCESSOR_ID_MASK) == \
29 IXP465_PROCESSOR_ID_VALUE) 30 IXP465_PROCESSOR_ID_VALUE)
30 31
31static inline u32 ixp4xx_read_feature_bits(void) 32static inline u32 ixp4xx_read_feature_bits(void)
diff --git a/arch/arm/mach-ixp4xx/ixdp425-setup.c b/arch/arm/mach-ixp4xx/ixdp425-setup.c
index 9b2d2ec14c80..f4a0c1bc1331 100644
--- a/arch/arm/mach-ixp4xx/ixdp425-setup.c
+++ b/arch/arm/mach-ixp4xx/ixdp425-setup.c
@@ -20,6 +20,7 @@
20#include <linux/mtd/mtd.h> 20#include <linux/mtd/mtd.h>
21#include <linux/mtd/nand.h> 21#include <linux/mtd/nand.h>
22#include <linux/mtd/partitions.h> 22#include <linux/mtd/partitions.h>
23#include <linux/delay.h>
23 24
24#include <asm/types.h> 25#include <asm/types.h>
25#include <asm/setup.h> 26#include <asm/setup.h>
@@ -29,7 +30,6 @@
29#include <asm/irq.h> 30#include <asm/irq.h>
30#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
31#include <asm/mach/flash.h> 32#include <asm/mach/flash.h>
32#include <asm/delay.h>
33 33
34static struct flash_platform_data ixdp425_flash_data = { 34static struct flash_platform_data ixdp425_flash_data = {
35 .map_name = "cfi_probe", 35 .map_name = "cfi_probe",
diff --git a/arch/arm/mach-ixp4xx/nas100d-setup.c b/arch/arm/mach-ixp4xx/nas100d-setup.c
index 84b5e62a9c0a..0acd95ecf27e 100644
--- a/arch/arm/mach-ixp4xx/nas100d-setup.c
+++ b/arch/arm/mach-ixp4xx/nas100d-setup.c
@@ -28,11 +28,11 @@
28#include <linux/reboot.h> 28#include <linux/reboot.h>
29#include <linux/i2c.h> 29#include <linux/i2c.h>
30#include <linux/i2c-gpio.h> 30#include <linux/i2c-gpio.h>
31#include <linux/io.h>
31 32
32#include <asm/mach-types.h> 33#include <asm/mach-types.h>
33#include <asm/mach/arch.h> 34#include <asm/mach/arch.h>
34#include <asm/mach/flash.h> 35#include <asm/mach/flash.h>
35#include <asm/io.h>
36#include <asm/gpio.h> 36#include <asm/gpio.h>
37 37
38static struct flash_platform_data nas100d_flash_data = { 38static struct flash_platform_data nas100d_flash_data = {
diff --git a/arch/arm/mach-ixp4xx/nslu2-setup.c b/arch/arm/mach-ixp4xx/nslu2-setup.c
index a48a6655b887..bc9d920ae54f 100644
--- a/arch/arm/mach-ixp4xx/nslu2-setup.c
+++ b/arch/arm/mach-ixp4xx/nslu2-setup.c
@@ -25,12 +25,12 @@
25#include <linux/reboot.h> 25#include <linux/reboot.h>
26#include <linux/i2c.h> 26#include <linux/i2c.h>
27#include <linux/i2c-gpio.h> 27#include <linux/i2c-gpio.h>
28#include <linux/io.h>
28 29
29#include <asm/mach-types.h> 30#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
31#include <asm/mach/flash.h> 32#include <asm/mach/flash.h>
32#include <asm/mach/time.h> 33#include <asm/mach/time.h>
33#include <asm/io.h>
34#include <asm/gpio.h> 34#include <asm/gpio.h>
35 35
36static struct flash_platform_data nslu2_flash_data = { 36static struct flash_platform_data nslu2_flash_data = {
diff --git a/arch/arm/mach-kirkwood/addr-map.c b/arch/arm/mach-kirkwood/addr-map.c
index c79f492072f9..5db4f0bbe5ee 100644
--- a/arch/arm/mach-kirkwood/addr-map.c
+++ b/arch/arm/mach-kirkwood/addr-map.c
@@ -48,6 +48,7 @@
48 48
49 49
50struct mbus_dram_target_info kirkwood_mbus_dram_info; 50struct mbus_dram_target_info kirkwood_mbus_dram_info;
51static int __initdata win_alloc_count;
51 52
52static int __init cpu_win_can_remap(int win) 53static int __init cpu_win_can_remap(int win)
53{ 54{
@@ -111,6 +112,8 @@ void __init kirkwood_setup_cpu_mbus(void)
111 setup_cpu_win(2, KIRKWOOD_NAND_MEM_PHYS_BASE, KIRKWOOD_NAND_MEM_SIZE, 112 setup_cpu_win(2, KIRKWOOD_NAND_MEM_PHYS_BASE, KIRKWOOD_NAND_MEM_SIZE,
112 TARGET_DEV_BUS, ATTR_DEV_NAND, -1); 113 TARGET_DEV_BUS, ATTR_DEV_NAND, -1);
113 114
115 win_alloc_count = 3;
116
114 /* 117 /*
115 * Setup MBUS dram target info. 118 * Setup MBUS dram target info.
116 */ 119 */
@@ -137,3 +140,8 @@ void __init kirkwood_setup_cpu_mbus(void)
137 } 140 }
138 kirkwood_mbus_dram_info.num_cs = cs; 141 kirkwood_mbus_dram_info.num_cs = cs;
139} 142}
143
144void __init kirkwood_setup_sram_win(u32 base, u32 size)
145{
146 setup_cpu_win(win_alloc_count++, base, size, 0x03, 0x00, -1);
147}
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index 189f16f3619d..85cad05d8c5b 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -98,7 +98,6 @@ void __init kirkwood_ehci_init(void)
98 * GE00 98 * GE00
99 ****************************************************************************/ 99 ****************************************************************************/
100struct mv643xx_eth_shared_platform_data kirkwood_ge00_shared_data = { 100struct mv643xx_eth_shared_platform_data kirkwood_ge00_shared_data = {
101 .t_clk = KIRKWOOD_TCLK,
102 .dram = &kirkwood_mbus_dram_info, 101 .dram = &kirkwood_mbus_dram_info,
103}; 102};
104 103
@@ -108,6 +107,11 @@ static struct resource kirkwood_ge00_shared_resources[] = {
108 .start = GE00_PHYS_BASE + 0x2000, 107 .start = GE00_PHYS_BASE + 0x2000,
109 .end = GE00_PHYS_BASE + 0x3fff, 108 .end = GE00_PHYS_BASE + 0x3fff,
110 .flags = IORESOURCE_MEM, 109 .flags = IORESOURCE_MEM,
110 }, {
111 .name = "ge00 err irq",
112 .start = IRQ_KIRKWOOD_GE00_ERR,
113 .end = IRQ_KIRKWOOD_GE00_ERR,
114 .flags = IORESOURCE_IRQ,
111 }, 115 },
112}; 116};
113 117
@@ -117,7 +121,7 @@ static struct platform_device kirkwood_ge00_shared = {
117 .dev = { 121 .dev = {
118 .platform_data = &kirkwood_ge00_shared_data, 122 .platform_data = &kirkwood_ge00_shared_data,
119 }, 123 },
120 .num_resources = 1, 124 .num_resources = ARRAY_SIZE(kirkwood_ge00_shared_resources),
121 .resource = kirkwood_ge00_shared_resources, 125 .resource = kirkwood_ge00_shared_resources,
122}; 126};
123 127
@@ -201,7 +205,6 @@ void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
201 * SPI 205 * SPI
202 ****************************************************************************/ 206 ****************************************************************************/
203static struct orion_spi_info kirkwood_spi_plat_data = { 207static struct orion_spi_info kirkwood_spi_plat_data = {
204 .tclk = KIRKWOOD_TCLK,
205}; 208};
206 209
207static struct resource kirkwood_spi_resources[] = { 210static struct resource kirkwood_spi_resources[] = {
@@ -239,7 +242,7 @@ static struct plat_serial8250_port kirkwood_uart0_data[] = {
239 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, 242 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
240 .iotype = UPIO_MEM, 243 .iotype = UPIO_MEM,
241 .regshift = 2, 244 .regshift = 2,
242 .uartclk = KIRKWOOD_TCLK, 245 .uartclk = 0,
243 }, { 246 }, {
244 }, 247 },
245}; 248};
@@ -283,7 +286,7 @@ static struct plat_serial8250_port kirkwood_uart1_data[] = {
283 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, 286 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
284 .iotype = UPIO_MEM, 287 .iotype = UPIO_MEM,
285 .regshift = 2, 288 .regshift = 2,
286 .uartclk = KIRKWOOD_TCLK, 289 .uartclk = 0,
287 }, { 290 }, {
288 }, 291 },
289}; 292};
@@ -525,9 +528,23 @@ void __init kirkwood_xor1_init(void)
525/***************************************************************************** 528/*****************************************************************************
526 * Time handling 529 * Time handling
527 ****************************************************************************/ 530 ****************************************************************************/
531int kirkwood_tclk;
532
533int __init kirkwood_find_tclk(void)
534{
535 u32 dev, rev;
536
537 kirkwood_pcie_id(&dev, &rev);
538 if (dev == MV88F6281_DEV_ID && rev == MV88F6281_REV_A0)
539 return 200000000;
540
541 return 166666667;
542}
543
528static void kirkwood_timer_init(void) 544static void kirkwood_timer_init(void)
529{ 545{
530 orion_time_init(IRQ_KIRKWOOD_BRIDGE, KIRKWOOD_TCLK); 546 kirkwood_tclk = kirkwood_find_tclk();
547 orion_time_init(IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
531} 548}
532 549
533struct sys_timer kirkwood_timer = { 550struct sys_timer kirkwood_timer = {
@@ -538,33 +555,62 @@ struct sys_timer kirkwood_timer = {
538/***************************************************************************** 555/*****************************************************************************
539 * General 556 * General
540 ****************************************************************************/ 557 ****************************************************************************/
558/*
559 * Identify device ID and revision.
560 */
541static char * __init kirkwood_id(void) 561static char * __init kirkwood_id(void)
542{ 562{
543 switch (readl(DEVICE_ID) & 0x3) { 563 u32 dev, rev;
544 case 0: 564
545 return "88F6180"; 565 kirkwood_pcie_id(&dev, &rev);
546 case 1: 566
547 return "88F6192"; 567 if (dev == MV88F6281_DEV_ID) {
548 case 2: 568 if (rev == MV88F6281_REV_Z0)
549 return "88F6281"; 569 return "MV88F6281-Z0";
570 else if (rev == MV88F6281_REV_A0)
571 return "MV88F6281-A0";
572 else
573 return "MV88F6281-Rev-Unsupported";
574 } else if (dev == MV88F6192_DEV_ID) {
575 if (rev == MV88F6192_REV_Z0)
576 return "MV88F6192-Z0";
577 else if (rev == MV88F6192_REV_A0)
578 return "MV88F6192-A0";
579 else
580 return "MV88F6192-Rev-Unsupported";
581 } else if (dev == MV88F6180_DEV_ID) {
582 if (rev == MV88F6180_REV_A0)
583 return "MV88F6180-Rev-A0";
584 else
585 return "MV88F6180-Rev-Unsupported";
586 } else {
587 return "Device-Unknown";
550 } 588 }
551
552 return "unknown 88F6000 variant";
553} 589}
554 590
555static int __init is_l2_writethrough(void) 591static void __init kirkwood_l2_init(void)
556{ 592{
557 return !!(readl(L2_CONFIG_REG) & L2_WRITETHROUGH); 593#ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
594 writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
595 feroceon_l2_init(1);
596#else
597 writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
598 feroceon_l2_init(0);
599#endif
558} 600}
559 601
560void __init kirkwood_init(void) 602void __init kirkwood_init(void)
561{ 603{
562 printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n", 604 printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n",
563 kirkwood_id(), KIRKWOOD_TCLK); 605 kirkwood_id(), kirkwood_tclk);
606 kirkwood_ge00_shared_data.t_clk = kirkwood_tclk;
607 kirkwood_spi_plat_data.tclk = kirkwood_tclk;
608 kirkwood_uart0_data[0].uartclk = kirkwood_tclk;
609 kirkwood_uart1_data[0].uartclk = kirkwood_tclk;
564 610
565 kirkwood_setup_cpu_mbus(); 611 kirkwood_setup_cpu_mbus();
566 612
567#ifdef CONFIG_CACHE_FEROCEON_L2 613#ifdef CONFIG_CACHE_FEROCEON_L2
568 feroceon_l2_init(is_l2_writethrough()); 614 kirkwood_l2_init();
569#endif 615#endif
570} 616}
diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h
index 69cd113af03a..8fa0f6a27635 100644
--- a/arch/arm/mach-kirkwood/common.h
+++ b/arch/arm/mach-kirkwood/common.h
@@ -23,10 +23,9 @@ void kirkwood_init_irq(void);
23 23
24extern struct mbus_dram_target_info kirkwood_mbus_dram_info; 24extern struct mbus_dram_target_info kirkwood_mbus_dram_info;
25void kirkwood_setup_cpu_mbus(void); 25void kirkwood_setup_cpu_mbus(void);
26void kirkwood_setup_pcie_io_win(int window, u32 base, u32 size, 26void kirkwood_setup_sram_win(u32 base, u32 size);
27 int maj, int min); 27
28void kirkwood_setup_pcie_mem_win(int window, u32 base, u32 size, 28void kirkwood_pcie_id(u32 *dev, u32 *rev);
29 int maj, int min);
30 29
31void kirkwood_ehci_init(void); 30void kirkwood_ehci_init(void);
32void kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data); 31void kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data);
diff --git a/arch/arm/mach-kirkwood/db88f6281-bp-setup.c b/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
index cd317795f355..a14c2948c62a 100644
--- a/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
+++ b/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
@@ -44,7 +44,6 @@ static void __init db88f6281_init(void)
44 kirkwood_rtc_init(); 44 kirkwood_rtc_init();
45 kirkwood_sata_init(&db88f6281_sata_data); 45 kirkwood_sata_init(&db88f6281_sata_data);
46 kirkwood_uart0_init(); 46 kirkwood_uart0_init();
47 kirkwood_uart1_init();
48} 47}
49 48
50static int __init db88f6281_pci_init(void) 49static int __init db88f6281_pci_init(void)
diff --git a/arch/arm/mach-kirkwood/include/mach/irqs.h b/arch/arm/mach-kirkwood/include/mach/irqs.h
index 6fd05838c72d..ffab89f21c11 100644
--- a/arch/arm/mach-kirkwood/include/mach/irqs.h
+++ b/arch/arm/mach-kirkwood/include/mach/irqs.h
@@ -50,6 +50,7 @@
50#define IRQ_KIRKWOOD_GPIO_HIGH_0_7 39 50#define IRQ_KIRKWOOD_GPIO_HIGH_0_7 39
51#define IRQ_KIRKWOOD_GPIO_HIGH_8_15 40 51#define IRQ_KIRKWOOD_GPIO_HIGH_8_15 40
52#define IRQ_KIRKWOOD_GPIO_HIGH_16_23 41 52#define IRQ_KIRKWOOD_GPIO_HIGH_16_23 41
53#define IRQ_KIRKWOOD_GE00_ERR 46
53 54
54/* 55/*
55 * KIRKWOOD General Purpose Pins 56 * KIRKWOOD General Purpose Pins
diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
index 5c69992295e8..eae42406fd86 100644
--- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h
+++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
@@ -68,6 +68,20 @@
68#define L2_WRITETHROUGH 0x00000010 68#define L2_WRITETHROUGH 0x00000010
69 69
70/* 70/*
71 * Supported devices and revisions.
72 */
73#define MV88F6281_DEV_ID 0x6281
74#define MV88F6281_REV_Z0 0
75#define MV88F6281_REV_A0 2
76
77#define MV88F6192_DEV_ID 0x6192
78#define MV88F6192_REV_Z0 0
79#define MV88F6192_REV_A0 2
80
81#define MV88F6180_DEV_ID 0x6180
82#define MV88F6180_REV_A0 2
83
84/*
71 * Register Map 85 * Register Map
72 */ 86 */
73#define DDR_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x00000) 87#define DDR_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x00000)
diff --git a/arch/arm/mach-kirkwood/include/mach/timex.h b/arch/arm/mach-kirkwood/include/mach/timex.h
index f77ef4a32c5f..c923cd169b9c 100644
--- a/arch/arm/mach-kirkwood/include/mach/timex.h
+++ b/arch/arm/mach-kirkwood/include/mach/timex.h
@@ -8,4 +8,3 @@
8 8
9#define CLOCK_TICK_RATE (100 * HZ) 9#define CLOCK_TICK_RATE (100 * HZ)
10 10
11#define KIRKWOOD_TCLK 166666667
diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c
index 2195fa31f6b7..f6b08f207c89 100644
--- a/arch/arm/mach-kirkwood/pcie.c
+++ b/arch/arm/mach-kirkwood/pcie.c
@@ -18,6 +18,12 @@
18 18
19#define PCIE_BASE ((void __iomem *)PCIE_VIRT_BASE) 19#define PCIE_BASE ((void __iomem *)PCIE_VIRT_BASE)
20 20
21void __init kirkwood_pcie_id(u32 *dev, u32 *rev)
22{
23 *dev = orion_pcie_dev_id(PCIE_BASE);
24 *rev = orion_pcie_rev(PCIE_BASE);
25}
26
21static int pcie_valid_config(int bus, int dev) 27static int pcie_valid_config(int bus, int dev)
22{ 28{
23 /* 29 /*
diff --git a/arch/arm/mach-kirkwood/rd88f6281-setup.c b/arch/arm/mach-kirkwood/rd88f6281-setup.c
index b6416615c0b9..f785093e433f 100644
--- a/arch/arm/mach-kirkwood/rd88f6281-setup.c
+++ b/arch/arm/mach-kirkwood/rd88f6281-setup.c
@@ -90,7 +90,6 @@ static void __init rd88f6281_init(void)
90 kirkwood_rtc_init(); 90 kirkwood_rtc_init();
91 kirkwood_sata_init(&rd88f6281_sata_data); 91 kirkwood_sata_init(&rd88f6281_sata_data);
92 kirkwood_uart0_init(); 92 kirkwood_uart0_init();
93 kirkwood_uart1_init();
94 93
95 platform_device_register(&rd88f6281_nand_flash); 94 platform_device_register(&rd88f6281_nand_flash);
96} 95}
diff --git a/arch/arm/mach-ks8695/cpu.c b/arch/arm/mach-ks8695/cpu.c
index c6c08e800233..7f3f24053a00 100644
--- a/arch/arm/mach-ks8695/cpu.c
+++ b/arch/arm/mach-ks8695/cpu.c
@@ -24,9 +24,9 @@
24#include <linux/kernel.h> 24#include <linux/kernel.h>
25#include <linux/module.h> 25#include <linux/module.h>
26#include <linux/init.h> 26#include <linux/init.h>
27#include <linux/io.h>
27 28
28#include <mach/hardware.h> 29#include <mach/hardware.h>
29#include <asm/io.h>
30#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
31#include <asm/mach/map.h> 31#include <asm/mach/map.h>
32 32
diff --git a/arch/arm/mach-ks8695/gpio.c b/arch/arm/mach-ks8695/gpio.c
index 3624e65cd89b..9aecf0c4b8b1 100644
--- a/arch/arm/mach-ks8695/gpio.c
+++ b/arch/arm/mach-ks8695/gpio.c
@@ -23,8 +23,8 @@
23#include <linux/debugfs.h> 23#include <linux/debugfs.h>
24#include <linux/seq_file.h> 24#include <linux/seq_file.h>
25#include <linux/module.h> 25#include <linux/module.h>
26#include <linux/io.h>
26 27
27#include <asm/io.h>
28#include <mach/hardware.h> 28#include <mach/hardware.h>
29#include <asm/mach/irq.h> 29#include <asm/mach/irq.h>
30 30
@@ -72,7 +72,7 @@ int __init_or_module ks8695_gpio_interrupt(unsigned int pin, unsigned int type)
72 72
73 /* set pin as input */ 73 /* set pin as input */
74 x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPM); 74 x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPM);
75 x &= ~IOPM_(pin); 75 x &= ~IOPM(pin);
76 __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPM); 76 __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPM);
77 77
78 local_irq_restore(flags); 78 local_irq_restore(flags);
@@ -108,7 +108,7 @@ int __init_or_module gpio_direction_input(unsigned int pin)
108 108
109 /* set pin as input */ 109 /* set pin as input */
110 x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPM); 110 x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPM);
111 x &= ~IOPM_(pin); 111 x &= ~IOPM(pin);
112 __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPM); 112 __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPM);
113 113
114 local_irq_restore(flags); 114 local_irq_restore(flags);
@@ -136,14 +136,14 @@ int __init_or_module gpio_direction_output(unsigned int pin, unsigned int state)
136 /* set line state */ 136 /* set line state */
137 x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD); 137 x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD);
138 if (state) 138 if (state)
139 x |= (1 << pin); 139 x |= IOPD(pin);
140 else 140 else
141 x &= ~(1 << pin); 141 x &= ~IOPD(pin);
142 __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPD); 142 __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPD);
143 143
144 /* set pin as output */ 144 /* set pin as output */
145 x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPM); 145 x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPM);
146 x |= IOPM_(pin); 146 x |= IOPM(pin);
147 __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPM); 147 __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPM);
148 148
149 local_irq_restore(flags); 149 local_irq_restore(flags);
@@ -168,9 +168,9 @@ void gpio_set_value(unsigned int pin, unsigned int state)
168 /* set output line state */ 168 /* set output line state */
169 x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD); 169 x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD);
170 if (state) 170 if (state)
171 x |= (1 << pin); 171 x |= IOPD(pin);
172 else 172 else
173 x &= ~(1 << pin); 173 x &= ~IOPD(pin);
174 __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPD); 174 __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPD);
175 175
176 local_irq_restore(flags); 176 local_irq_restore(flags);
@@ -189,7 +189,7 @@ int gpio_get_value(unsigned int pin)
189 return -EINVAL; 189 return -EINVAL;
190 190
191 x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD); 191 x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD);
192 return (x & (1 << pin)) != 0; 192 return (x & IOPD(pin)) != 0;
193} 193}
194EXPORT_SYMBOL(gpio_get_value); 194EXPORT_SYMBOL(gpio_get_value);
195 195
@@ -240,7 +240,7 @@ static int ks8695_gpio_show(struct seq_file *s, void *unused)
240 for (i = KS8695_GPIO_0; i <= KS8695_GPIO_15 ; i++) { 240 for (i = KS8695_GPIO_0; i <= KS8695_GPIO_15 ; i++) {
241 seq_printf(s, "%i:\t", i); 241 seq_printf(s, "%i:\t", i);
242 242
243 seq_printf(s, "%s\t", (mode & IOPM_(i)) ? "Output" : "Input"); 243 seq_printf(s, "%s\t", (mode & IOPM(i)) ? "Output" : "Input");
244 244
245 if (i <= KS8695_GPIO_3) { 245 if (i <= KS8695_GPIO_3) {
246 if (ctrl & enable[i]) { 246 if (ctrl & enable[i]) {
@@ -273,7 +273,7 @@ static int ks8695_gpio_show(struct seq_file *s, void *unused)
273 273
274 seq_printf(s, "\t"); 274 seq_printf(s, "\t");
275 275
276 seq_printf(s, "%i\n", (data & IOPD_(i)) ? 1 : 0); 276 seq_printf(s, "%i\n", (data & IOPD(i)) ? 1 : 0);
277 } 277 }
278 return 0; 278 return 0;
279} 279}
diff --git a/arch/arm/mach-ks8695/include/mach/memory.h b/arch/arm/mach-ks8695/include/mach/memory.h
index dadbe66cb75c..8fbc4c76c38b 100644
--- a/arch/arm/mach-ks8695/include/mach/memory.h
+++ b/arch/arm/mach-ks8695/include/mach/memory.h
@@ -31,8 +31,8 @@
31/* Platform-bus mapping */ 31/* Platform-bus mapping */
32extern struct bus_type platform_bus_type; 32extern struct bus_type platform_bus_type;
33#define is_lbus_device(dev) (dev && dev->bus == &platform_bus_type) 33#define is_lbus_device(dev) (dev && dev->bus == &platform_bus_type)
34#define __arch_dma_to_virt(dev, x) ({ is_lbus_device(dev) ? \ 34#define __arch_dma_to_virt(dev, x) ({ (void *) (is_lbus_device(dev) ? \
35 __phys_to_virt(x) : __bus_to_virt(x); }) 35 __phys_to_virt(x) : __bus_to_virt(x)); })
36#define __arch_virt_to_dma(dev, x) ({ is_lbus_device(dev) ? \ 36#define __arch_virt_to_dma(dev, x) ({ is_lbus_device(dev) ? \
37 (dma_addr_t)__virt_to_phys(x) : (dma_addr_t)__virt_to_bus(x); }) 37 (dma_addr_t)__virt_to_phys(x) : (dma_addr_t)__virt_to_bus(x); })
38#define __arch_page_to_dma(dev, x) __arch_virt_to_dma(dev, page_address(x)) 38#define __arch_page_to_dma(dev, x) __arch_virt_to_dma(dev, page_address(x))
diff --git a/arch/arm/mach-ks8695/include/mach/regs-gpio.h b/arch/arm/mach-ks8695/include/mach/regs-gpio.h
index 0df6fe61d1ce..90614a7d0548 100644
--- a/arch/arm/mach-ks8695/include/mach/regs-gpio.h
+++ b/arch/arm/mach-ks8695/include/mach/regs-gpio.h
@@ -24,7 +24,7 @@
24 24
25 25
26/* Port Mode Register */ 26/* Port Mode Register */
27#define IOPM_(x) (1 << (x)) /* Mode for GPIO Pin x */ 27#define IOPM(x) (1 << (x)) /* Mode for GPIO Pin x */
28 28
29/* Port Control Register */ 29/* Port Control Register */
30#define IOPC_IOTIM1EN (1 << 17) /* GPIO Pin for Timer1 Enable */ 30#define IOPC_IOTIM1EN (1 << 17) /* GPIO Pin for Timer1 Enable */
@@ -50,6 +50,6 @@
50#define IOPC_TM_EDGE (6) /* Both Edge Detection */ 50#define IOPC_TM_EDGE (6) /* Both Edge Detection */
51 51
52/* Port Data Register */ 52/* Port Data Register */
53#define IOPD_(x) (1 << (x)) /* Signal Level of GPIO Pin x */ 53#define IOPD(x) (1 << (x)) /* Signal Level of GPIO Pin x */
54 54
55#endif 55#endif
diff --git a/arch/arm/mach-ks8695/include/mach/regs-lan.h b/arch/arm/mach-ks8695/include/mach/regs-lan.h
index 9ef409901e76..82c5f3791afb 100644
--- a/arch/arm/mach-ks8695/include/mach/regs-lan.h
+++ b/arch/arm/mach-ks8695/include/mach/regs-lan.h
@@ -29,8 +29,8 @@
29#define KS8695_LRDLB (0x14) /* Receive Descriptor List Base Address */ 29#define KS8695_LRDLB (0x14) /* Receive Descriptor List Base Address */
30#define KS8695_LMAL (0x18) /* MAC Station Address Low */ 30#define KS8695_LMAL (0x18) /* MAC Station Address Low */
31#define KS8695_LMAH (0x1c) /* MAC Station Address High */ 31#define KS8695_LMAH (0x1c) /* MAC Station Address High */
32#define KS8695_LMAAL_(n) (0x80 + ((n)*8)) /* MAC Additional Station Address (0..15) Low */ 32#define KS8695_LMAAL(n) (0x80 + ((n)*8)) /* MAC Additional Station Address (0..15) Low */
33#define KS8695_LMAAH_(n) (0x84 + ((n)*8)) /* MAC Additional Station Address (0..15) High */ 33#define KS8695_LMAAH(n) (0x84 + ((n)*8)) /* MAC Additional Station Address (0..15) High */
34 34
35 35
36/* DMA Transmit Control Register */ 36/* DMA Transmit Control Register */
diff --git a/arch/arm/mach-ks8695/include/mach/regs-wan.h b/arch/arm/mach-ks8695/include/mach/regs-wan.h
index eb494ec6e956..c475bed22b8e 100644
--- a/arch/arm/mach-ks8695/include/mach/regs-wan.h
+++ b/arch/arm/mach-ks8695/include/mach/regs-wan.h
@@ -29,8 +29,8 @@
29#define KS8695_WRDLB (0x14) /* Receive Descriptor List Base Address */ 29#define KS8695_WRDLB (0x14) /* Receive Descriptor List Base Address */
30#define KS8695_WMAL (0x18) /* MAC Station Address Low */ 30#define KS8695_WMAL (0x18) /* MAC Station Address Low */
31#define KS8695_WMAH (0x1c) /* MAC Station Address High */ 31#define KS8695_WMAH (0x1c) /* MAC Station Address High */
32#define KS8695_WMAAL_(n) (0x80 + ((n)*8)) /* MAC Additional Station Address (0..15) Low */ 32#define KS8695_WMAAL(n) (0x80 + ((n)*8)) /* MAC Additional Station Address (0..15) Low */
33#define KS8695_WMAAH_(n) (0x84 + ((n)*8)) /* MAC Additional Station Address (0..15) High */ 33#define KS8695_WMAAH(n) (0x84 + ((n)*8)) /* MAC Additional Station Address (0..15) High */
34 34
35 35
36/* DMA Transmit Control Register */ 36/* DMA Transmit Control Register */
diff --git a/arch/arm/mach-ks8695/include/mach/system.h b/arch/arm/mach-ks8695/include/mach/system.h
index 2a6f91869056..5a9b032bdbeb 100644
--- a/arch/arm/mach-ks8695/include/mach/system.h
+++ b/arch/arm/mach-ks8695/include/mach/system.h
@@ -14,7 +14,7 @@
14#ifndef __ASM_ARCH_SYSTEM_H 14#ifndef __ASM_ARCH_SYSTEM_H
15#define __ASM_ARCH_SYSTEM_H 15#define __ASM_ARCH_SYSTEM_H
16 16
17#include <asm/io.h> 17#include <linux/io.h>
18#include <mach/regs-timer.h> 18#include <mach/regs-timer.h>
19 19
20static void arch_idle(void) 20static void arch_idle(void)
diff --git a/arch/arm/mach-ks8695/include/mach/uncompress.h b/arch/arm/mach-ks8695/include/mach/uncompress.h
index 0eee37a69075..9495cb4d701a 100644
--- a/arch/arm/mach-ks8695/include/mach/uncompress.h
+++ b/arch/arm/mach-ks8695/include/mach/uncompress.h
@@ -14,7 +14,7 @@
14#ifndef __ASM_ARCH_UNCOMPRESS_H 14#ifndef __ASM_ARCH_UNCOMPRESS_H
15#define __ASM_ARCH_UNCOMPRESS_H 15#define __ASM_ARCH_UNCOMPRESS_H
16 16
17#include <asm/io.h> 17#include <linux/io.h>
18#include <mach/regs-uart.h> 18#include <mach/regs-uart.h>
19 19
20static void putc(char c) 20static void putc(char c)
diff --git a/arch/arm/mach-ks8695/irq.c b/arch/arm/mach-ks8695/irq.c
index e5e71f4dbb84..e375c1d53f81 100644
--- a/arch/arm/mach-ks8695/irq.c
+++ b/arch/arm/mach-ks8695/irq.c
@@ -24,10 +24,10 @@
24#include <linux/interrupt.h> 24#include <linux/interrupt.h>
25#include <linux/ioport.h> 25#include <linux/ioport.h>
26#include <linux/sysdev.h> 26#include <linux/sysdev.h>
27#include <linux/io.h>
27 28
28#include <mach/hardware.h> 29#include <mach/hardware.h>
29#include <asm/irq.h> 30#include <asm/irq.h>
30#include <asm/io.h>
31 31
32#include <asm/mach/irq.h> 32#include <asm/mach/irq.h>
33 33
diff --git a/arch/arm/mach-ks8695/pci.c b/arch/arm/mach-ks8695/pci.c
index 1746c67af176..f5ebcc0fcab9 100644
--- a/arch/arm/mach-ks8695/pci.c
+++ b/arch/arm/mach-ks8695/pci.c
@@ -27,8 +27,8 @@
27#include <linux/init.h> 27#include <linux/init.h>
28#include <linux/irq.h> 28#include <linux/irq.h>
29#include <linux/delay.h> 29#include <linux/delay.h>
30#include <linux/io.h>
30 31
31#include <asm/io.h>
32#include <asm/signal.h> 32#include <asm/signal.h>
33#include <asm/mach/pci.h> 33#include <asm/mach/pci.h>
34#include <mach/hardware.h> 34#include <mach/hardware.h>
@@ -141,7 +141,7 @@ static struct pci_ops ks8695_pci_ops = {
141 .write = ks8695_pci_writeconfig, 141 .write = ks8695_pci_writeconfig,
142}; 142};
143 143
144static struct pci_bus *ks8695_pci_scan_bus(int nr, struct pci_sys_data *sys) 144static struct pci_bus* __init ks8695_pci_scan_bus(int nr, struct pci_sys_data *sys)
145{ 145{
146 return pci_scan_bus(sys->busnr, &ks8695_pci_ops, sys); 146 return pci_scan_bus(sys->busnr, &ks8695_pci_ops, sys);
147} 147}
diff --git a/arch/arm/mach-ks8695/time.c b/arch/arm/mach-ks8695/time.c
index 940888dffc16..69c072c2c0f9 100644
--- a/arch/arm/mach-ks8695/time.c
+++ b/arch/arm/mach-ks8695/time.c
@@ -24,8 +24,8 @@
24#include <linux/irq.h> 24#include <linux/irq.h>
25#include <linux/kernel.h> 25#include <linux/kernel.h>
26#include <linux/sched.h> 26#include <linux/sched.h>
27#include <linux/io.h>
27 28
28#include <asm/io.h>
29#include <asm/mach/time.h> 29#include <asm/mach/time.h>
30 30
31#include <mach/regs-timer.h> 31#include <mach/regs-timer.h>
diff --git a/arch/arm/mach-lh7a40x/Kconfig b/arch/arm/mach-lh7a40x/Kconfig
index 6f4c6a1798c1..9be7466e346c 100644
--- a/arch/arm/mach-lh7a40x/Kconfig
+++ b/arch/arm/mach-lh7a40x/Kconfig
@@ -40,23 +40,22 @@ config LPD7A40X_CPLD_SSP
40 bool 40 bool
41 41
42config LH7A40X_CONTIGMEM 42config LH7A40X_CONTIGMEM
43 bool "Disable NUMA Support" 43 bool "Disable NUMA/SparseMEM Support"
44 depends on ARCH_LH7A40X
45 help 44 help
46 Say Y here if your bootloader sets the SROMLL bit(s) in 45 Say Y here if your bootloader sets the SROMLL bit(s) in
47 the SDRAM controller, organizing memory as a contiguous 46 the SDRAM controller, organizing memory as a contiguous
48 array. This option will disable CONFIG_DISCONTIGMEM and 47 array. This option will disable sparse memory support
49 force the kernel to manage all memory in one node. 48 and force the kernel to manage all memory in one node.
50 49
51 Setting this option incorrectly may prevent the kernel from 50 Setting this option incorrectly may prevent the kernel
52 booting. It is OK to leave it N. 51 from booting. It is OK to leave it N.
53 52
54 For more information, consult 53 For more information, consult
55 <file:Documentation/arm/Sharp-LH/SDRAM>. 54 <file:Documentation/arm/Sharp-LH/SDRAM>.
56 55
57config LH7A40X_ONE_BANK_PER_NODE 56config LH7A40X_ONE_BANK_PER_NODE
58 bool "Optimize NUMA Node Tables for Size" 57 bool "Optimize NUMA Node Tables for Size"
59 depends on ARCH_LH7A40X && !LH7A40X_CONTIGMEM 58 depends on !LH7A40X_CONTIGMEM
60 help 59 help
61 Say Y here to produce compact memory node tables. By 60 Say Y here to produce compact memory node tables. By
62 default pairs of adjacent physical RAM banks are managed 61 default pairs of adjacent physical RAM banks are managed
diff --git a/arch/arm/mach-lh7a40x/arch-kev7a400.c b/arch/arm/mach-lh7a40x/arch-kev7a400.c
index 551b97261826..3d7bd50b9095 100644
--- a/arch/arm/mach-lh7a40x/arch-kev7a400.c
+++ b/arch/arm/mach-lh7a40x/arch-kev7a400.c
@@ -77,7 +77,7 @@ static void kev7a400_cpld_handler (unsigned int irq, struct irq_desc *desc)
77 irq = IRQ_KEV7A400_CPLD; 77 irq = IRQ_KEV7A400_CPLD;
78 for (; mask; mask >>= 1, ++irq) 78 for (; mask; mask >>= 1, ++irq)
79 if (mask & 1) 79 if (mask & 1)
80 desc_handle_irq(irq, desc); 80 generic_handle_irq(irq);
81} 81}
82 82
83void __init lh7a40x_init_board_irq (void) 83void __init lh7a40x_init_board_irq (void)
diff --git a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c
index e373fb8e2699..cb15e5d32120 100644
--- a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c
+++ b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c
@@ -214,11 +214,11 @@ static void lpd7a40x_cpld_handler (unsigned int irq, struct irq_desc *desc)
214 desc->chip->ack (irq); 214 desc->chip->ack (irq);
215 215
216 if ((mask & (1<<0)) == 0) /* WLAN */ 216 if ((mask & (1<<0)) == 0) /* WLAN */
217 IRQ_DISPATCH (IRQ_LPD7A40X_ETH_INT); 217 generic_handle_irq(IRQ_LPD7A40X_ETH_INT);
218 218
219#if defined (IRQ_TOUCH) 219#if defined (IRQ_TOUCH)
220 if ((mask & (1<<1)) == 0) /* Touch */ 220 if ((mask & (1<<1)) == 0) /* Touch */
221 IRQ_DISPATCH (IRQ_TOUCH); 221 generic_handle_irq(IRQ_TOUCH);
222#endif 222#endif
223 223
224 desc->chip->unmask (irq); /* Level-triggered need this */ 224 desc->chip->unmask (irq); /* Level-triggered need this */
diff --git a/arch/arm/mach-lh7a40x/common.h b/arch/arm/mach-lh7a40x/common.h
index 0ca20c6c83b7..6ed3f6b6db76 100644
--- a/arch/arm/mach-lh7a40x/common.h
+++ b/arch/arm/mach-lh7a40x/common.h
@@ -15,4 +15,3 @@ extern void lh7a404_init_irq (void);
15extern void lh7a40x_clcd_init (void); 15extern void lh7a40x_clcd_init (void);
16extern void lh7a40x_init_board_irq (void); 16extern void lh7a40x_init_board_irq (void);
17 17
18#define IRQ_DISPATCH(irq) desc_handle_irq((irq),(irq_desc + irq))
diff --git a/arch/arm/mach-lh7a40x/include/mach/memory.h b/arch/arm/mach-lh7a40x/include/mach/memory.h
index f7107b4c197a..1da14ff66c93 100644
--- a/arch/arm/mach-lh7a40x/include/mach/memory.h
+++ b/arch/arm/mach-lh7a40x/include/mach/memory.h
@@ -73,4 +73,10 @@
73 73
74#endif 74#endif
75 75
76/*
77 * Sparsemem version of the above
78 */
79#define MAX_PHYSMEM_BITS 32
80#define SECTION_SIZE_BITS 24
81
76#endif 82#endif
diff --git a/arch/arm/mach-lh7a40x/irq-lpd7a40x.c b/arch/arm/mach-lh7a40x/irq-lpd7a40x.c
index 0d5063ebda10..fd033bb4342f 100644
--- a/arch/arm/mach-lh7a40x/irq-lpd7a40x.c
+++ b/arch/arm/mach-lh7a40x/irq-lpd7a40x.c
@@ -63,10 +63,10 @@ static void lh7a40x_cpld_handler (unsigned int irq, struct irq_desc *desc)
63 desc->chip->ack (irq); 63 desc->chip->ack (irq);
64 64
65 if ((mask & 0x1) == 0) /* WLAN */ 65 if ((mask & 0x1) == 0) /* WLAN */
66 IRQ_DISPATCH (IRQ_LPD7A40X_ETH_INT); 66 generic_handle_irq(IRQ_LPD7A40X_ETH_INT);
67 67
68 if ((mask & 0x2) == 0) /* Touch */ 68 if ((mask & 0x2) == 0) /* Touch */
69 IRQ_DISPATCH (IRQ_LPD7A400_TS); 69 generic_handle_irq(IRQ_LPD7A400_TS);
70 70
71 desc->chip->unmask (irq); /* Level-triggered need this */ 71 desc->chip->unmask (irq); /* Level-triggered need this */
72} 72}
diff --git a/arch/arm/mach-lh7a40x/ssp-cpld.c b/arch/arm/mach-lh7a40x/ssp-cpld.c
index 51fbef9601b9..2901d49d1484 100644
--- a/arch/arm/mach-lh7a40x/ssp-cpld.c
+++ b/arch/arm/mach-lh7a40x/ssp-cpld.c
@@ -43,8 +43,8 @@
43#include <linux/init.h> 43#include <linux/init.h>
44#include <linux/delay.h> 44#include <linux/delay.h>
45#include <linux/spinlock.h> 45#include <linux/spinlock.h>
46#include <linux/io.h>
46 47
47#include <asm/io.h>
48#include <asm/irq.h> 48#include <asm/irq.h>
49#include <mach/hardware.h> 49#include <mach/hardware.h>
50 50
diff --git a/arch/arm/mach-lh7a40x/time.c b/arch/arm/mach-lh7a40x/time.c
index 7fe9e06cf662..4601e425bae3 100644
--- a/arch/arm/mach-lh7a40x/time.c
+++ b/arch/arm/mach-lh7a40x/time.c
@@ -13,9 +13,9 @@
13#include <linux/interrupt.h> 13#include <linux/interrupt.h>
14#include <linux/irq.h> 14#include <linux/irq.h>
15#include <linux/time.h> 15#include <linux/time.h>
16#include <linux/io.h>
16 17
17#include <mach/hardware.h> 18#include <mach/hardware.h>
18#include <asm/io.h>
19#include <asm/irq.h> 19#include <asm/irq.h>
20#include <asm/leds.h> 20#include <asm/leds.h>
21 21
diff --git a/arch/arm/mach-loki/addr-map.c b/arch/arm/mach-loki/addr-map.c
index 70ca56bb6f33..0332d8f5c18c 100644
--- a/arch/arm/mach-loki/addr-map.c
+++ b/arch/arm/mach-loki/addr-map.c
@@ -11,8 +11,8 @@
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/mbus.h> 13#include <linux/mbus.h>
14#include <linux/io.h>
14#include <mach/hardware.h> 15#include <mach/hardware.h>
15#include <asm/io.h>
16#include "common.h" 16#include "common.h"
17 17
18/* 18/*
diff --git a/arch/arm/mach-loki/irq.c b/arch/arm/mach-loki/irq.c
index 5a487930cb2f..e1f97338d5b7 100644
--- a/arch/arm/mach-loki/irq.c
+++ b/arch/arm/mach-loki/irq.c
@@ -11,7 +11,7 @@
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/irq.h> 13#include <linux/irq.h>
14#include <asm/io.h> 14#include <linux/io.h>
15#include <plat/irq.h> 15#include <plat/irq.h>
16#include "common.h" 16#include "common.h"
17 17
diff --git a/arch/arm/mach-msm/board-halibut.c b/arch/arm/mach-msm/board-halibut.c
index 995afc4ade4b..a24259133e07 100644
--- a/arch/arm/mach-msm/board-halibut.c
+++ b/arch/arm/mach-msm/board-halibut.c
@@ -18,6 +18,8 @@
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/platform_device.h> 19#include <linux/platform_device.h>
20#include <linux/input.h> 20#include <linux/input.h>
21#include <linux/io.h>
22#include <linux/delay.h>
21 23
22#include <mach/hardware.h> 24#include <mach/hardware.h>
23#include <asm/mach-types.h> 25#include <asm/mach-types.h>
@@ -28,9 +30,6 @@
28#include <mach/board.h> 30#include <mach/board.h>
29#include <mach/msm_iomap.h> 31#include <mach/msm_iomap.h>
30 32
31#include <asm/io.h>
32#include <asm/delay.h>
33
34#include <linux/mtd/nand.h> 33#include <linux/mtd/nand.h>
35#include <linux/mtd/partitions.h> 34#include <linux/mtd/partitions.h>
36 35
diff --git a/arch/arm/mach-msm/common.c b/arch/arm/mach-msm/common.c
index 3a511368a5d8..604f8ade9587 100644
--- a/arch/arm/mach-msm/common.c
+++ b/arch/arm/mach-msm/common.c
@@ -19,9 +19,9 @@
19#include <linux/kernel.h> 19#include <linux/kernel.h>
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/platform_device.h> 21#include <linux/platform_device.h>
22#include <linux/io.h>
22 23
23#include <asm/mach/flash.h> 24#include <asm/mach/flash.h>
24#include <asm/io.h>
25 25
26#include <asm/setup.h> 26#include <asm/setup.h>
27 27
diff --git a/arch/arm/mach-msm/dma.c b/arch/arm/mach-msm/dma.c
index 9de08265d974..0c8f252637e1 100644
--- a/arch/arm/mach-msm/dma.c
+++ b/arch/arm/mach-msm/dma.c
@@ -13,7 +13,7 @@
13 * 13 *
14 */ 14 */
15 15
16#include <asm/io.h> 16#include <linux/io.h>
17#include <linux/interrupt.h> 17#include <linux/interrupt.h>
18#include <mach/dma.h> 18#include <mach/dma.h>
19 19
diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c
index 5976200de99b..7999e4ba8e20 100644
--- a/arch/arm/mach-msm/io.c
+++ b/arch/arm/mach-msm/io.c
@@ -18,9 +18,9 @@
18 18
19#include <linux/kernel.h> 19#include <linux/kernel.h>
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/io.h>
21 22
22#include <mach/hardware.h> 23#include <mach/hardware.h>
23#include <asm/io.h>
24#include <asm/page.h> 24#include <asm/page.h>
25#include <mach/msm_iomap.h> 25#include <mach/msm_iomap.h>
26#include <asm/mach/map.h> 26#include <asm/mach/map.h>
diff --git a/arch/arm/mach-msm/irq.c b/arch/arm/mach-msm/irq.c
index 66901baf8c8e..04b8d182ff8a 100644
--- a/arch/arm/mach-msm/irq.c
+++ b/arch/arm/mach-msm/irq.c
@@ -19,11 +19,10 @@
19#include <linux/interrupt.h> 19#include <linux/interrupt.h>
20#include <linux/ptrace.h> 20#include <linux/ptrace.h>
21#include <linux/timer.h> 21#include <linux/timer.h>
22
23#include <linux/irq.h> 22#include <linux/irq.h>
24#include <mach/hardware.h> 23#include <linux/io.h>
25 24
26#include <asm/io.h> 25#include <mach/hardware.h>
27 26
28#include <mach/msm_iomap.h> 27#include <mach/msm_iomap.h>
29 28
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index 9f02d7dca985..2bffe9b7e9fe 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -20,12 +20,11 @@
20#include <linux/clk.h> 20#include <linux/clk.h>
21#include <linux/clockchips.h> 21#include <linux/clockchips.h>
22#include <linux/delay.h> 22#include <linux/delay.h>
23#include <linux/io.h>
23 24
24#include <asm/mach/time.h> 25#include <asm/mach/time.h>
25#include <mach/msm_iomap.h> 26#include <mach/msm_iomap.h>
26 27
27#include <asm/io.h>
28
29#define MSM_DGT_BASE (MSM_GPT_BASE + 0x10) 28#define MSM_DGT_BASE (MSM_GPT_BASE + 0x10)
30#define MSM_DGT_SHIFT (5) 29#define MSM_DGT_SHIFT (5)
31 30
diff --git a/arch/arm/mach-mv78xx0/addr-map.c b/arch/arm/mach-mv78xx0/addr-map.c
index 4004b672a2eb..311d5b0e9bc7 100644
--- a/arch/arm/mach-mv78xx0/addr-map.c
+++ b/arch/arm/mach-mv78xx0/addr-map.c
@@ -11,7 +11,7 @@
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/mbus.h> 13#include <linux/mbus.h>
14#include <asm/io.h> 14#include <linux/io.h>
15#include "common.h" 15#include "common.h"
16 16
17/* 17/*
diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c
index 5842d3bb02b2..238a2f8c2d52 100644
--- a/arch/arm/mach-mv78xx0/common.c
+++ b/arch/arm/mach-mv78xx0/common.c
@@ -285,6 +285,11 @@ static struct resource mv78xx0_ge00_shared_resources[] = {
285 .start = GE00_PHYS_BASE + 0x2000, 285 .start = GE00_PHYS_BASE + 0x2000,
286 .end = GE00_PHYS_BASE + 0x3fff, 286 .end = GE00_PHYS_BASE + 0x3fff,
287 .flags = IORESOURCE_MEM, 287 .flags = IORESOURCE_MEM,
288 }, {
289 .name = "ge err irq",
290 .start = IRQ_MV78XX0_GE_ERR,
291 .end = IRQ_MV78XX0_GE_ERR,
292 .flags = IORESOURCE_IRQ,
288 }, 293 },
289}; 294};
290 295
@@ -294,7 +299,7 @@ static struct platform_device mv78xx0_ge00_shared = {
294 .dev = { 299 .dev = {
295 .platform_data = &mv78xx0_ge00_shared_data, 300 .platform_data = &mv78xx0_ge00_shared_data,
296 }, 301 },
297 .num_resources = 1, 302 .num_resources = ARRAY_SIZE(mv78xx0_ge00_shared_resources),
298 .resource = mv78xx0_ge00_shared_resources, 303 .resource = mv78xx0_ge00_shared_resources,
299}; 304};
300 305
diff --git a/arch/arm/mach-mv78xx0/include/mach/entry-macro.S b/arch/arm/mach-mv78xx0/include/mach/entry-macro.S
index ed4a46bcd3b0..fbfb2693ce6c 100644
--- a/arch/arm/mach-mv78xx0/include/mach/entry-macro.S
+++ b/arch/arm/mach-mv78xx0/include/mach/entry-macro.S
@@ -26,14 +26,22 @@
26 ldr \tmp, [\base, #IRQ_MASK_LOW_OFF] 26 ldr \tmp, [\base, #IRQ_MASK_LOW_OFF]
27 mov \irqnr, #31 27 mov \irqnr, #31
28 ands \irqstat, \irqstat, \tmp 28 ands \irqstat, \irqstat, \tmp
29 bne 1001f
29 30
30 @ if no low interrupts set, check high interrupts 31 @ if no low interrupts set, check high interrupts
31 ldreq \irqstat, [\base, #IRQ_CAUSE_HIGH_OFF] 32 ldr \irqstat, [\base, #IRQ_CAUSE_HIGH_OFF]
32 ldreq \tmp, [\base, #IRQ_MASK_HIGH_OFF] 33 ldr \tmp, [\base, #IRQ_MASK_HIGH_OFF]
33 moveq \irqnr, #63 34 mov \irqnr, #63
34 andeqs \irqstat, \irqstat, \tmp 35 ands \irqstat, \irqstat, \tmp
36 bne 1001f
37
38 @ if no high interrupts set, check error interrupts
39 ldr \irqstat, [\base, #IRQ_CAUSE_ERR_OFF]
40 ldr \tmp, [\base, #IRQ_MASK_ERR_OFF]
41 mov \irqnr, #95
42 ands \irqstat, \irqstat, \tmp
35 43
36 @ find first active interrupt source 44 @ find first active interrupt source
37 clzne \irqstat, \irqstat 451001: clzne \irqstat, \irqstat
38 subne \irqnr, \irqnr, \irqstat 46 subne \irqnr, \irqnr, \irqstat
39 .endm 47 .endm
diff --git a/arch/arm/mach-mv78xx0/include/mach/irqs.h b/arch/arm/mach-mv78xx0/include/mach/irqs.h
index 995d7fb8d06f..bebc330281ec 100644
--- a/arch/arm/mach-mv78xx0/include/mach/irqs.h
+++ b/arch/arm/mach-mv78xx0/include/mach/irqs.h
@@ -80,9 +80,14 @@
80#define IRQ_MV78XX0_DB_OUT 61 80#define IRQ_MV78XX0_DB_OUT 61
81 81
82/* 82/*
83 * MV78xx0 Error Interrupt Controller
84 */
85#define IRQ_MV78XX0_GE_ERR 70
86
87/*
83 * MV78XX0 General Purpose Pins 88 * MV78XX0 General Purpose Pins
84 */ 89 */
85#define IRQ_MV78XX0_GPIO_START 64 90#define IRQ_MV78XX0_GPIO_START 96
86#define NR_GPIO_IRQS GPIO_MAX 91#define NR_GPIO_IRQS GPIO_MAX
87 92
88#define NR_IRQS (IRQ_MV78XX0_GPIO_START + NR_GPIO_IRQS) 93#define NR_IRQS (IRQ_MV78XX0_GPIO_START + NR_GPIO_IRQS)
diff --git a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
index ad664178d6e1..ee9c5593ee92 100644
--- a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
+++ b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
@@ -71,8 +71,10 @@
71#define BRIDGE_INT_TIMER1 0x0004 71#define BRIDGE_INT_TIMER1 0x0004
72#define BRIDGE_INT_TIMER1_CLR (~0x0004) 72#define BRIDGE_INT_TIMER1_CLR (~0x0004)
73#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200) 73#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200)
74#define IRQ_CAUSE_ERR_OFF 0x0000
74#define IRQ_CAUSE_LOW_OFF 0x0004 75#define IRQ_CAUSE_LOW_OFF 0x0004
75#define IRQ_CAUSE_HIGH_OFF 0x0008 76#define IRQ_CAUSE_HIGH_OFF 0x0008
77#define IRQ_MASK_ERR_OFF 0x000c
76#define IRQ_MASK_LOW_OFF 0x0010 78#define IRQ_MASK_LOW_OFF 0x0010
77#define IRQ_MASK_HIGH_OFF 0x0014 79#define IRQ_MASK_HIGH_OFF 0x0014
78#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300) 80#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300)
diff --git a/arch/arm/mach-mv78xx0/irq.c b/arch/arm/mach-mv78xx0/irq.c
index 28248d37b999..503e5d195ae5 100644
--- a/arch/arm/mach-mv78xx0/irq.c
+++ b/arch/arm/mach-mv78xx0/irq.c
@@ -19,4 +19,5 @@ void __init mv78xx0_init_irq(void)
19{ 19{
20 orion_irq_init(0, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF)); 20 orion_irq_init(0, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF));
21 orion_irq_init(32, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF)); 21 orion_irq_init(32, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF));
22 orion_irq_init(64, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_ERR_OFF));
22} 23}
diff --git a/arch/arm/mach-mx2/devices.h b/arch/arm/mach-mx2/devices.h
new file mode 100644
index 000000000000..c77a4b8f73b4
--- /dev/null
+++ b/arch/arm/mach-mx2/devices.h
@@ -0,0 +1,15 @@
1
2extern struct platform_device mxc_gpt1;
3extern struct platform_device mxc_gpt2;
4extern struct platform_device mxc_gpt3;
5extern struct platform_device mxc_gpt4;
6extern struct platform_device mxc_gpt5;
7extern struct platform_device mxc_wdt;
8extern struct platform_device mxc_irda_device;
9extern struct platform_device mxc_uart_device0;
10extern struct platform_device mxc_uart_device1;
11extern struct platform_device mxc_uart_device2;
12extern struct platform_device mxc_uart_device3;
13extern struct platform_device mxc_uart_device4;
14extern struct platform_device mxc_uart_device5;
15
diff --git a/arch/arm/mach-mx2/mx27ads.c b/arch/arm/mach-mx2/mx27ads.c
index 4ce56ef4d8d3..56e22d3ca075 100644
--- a/arch/arm/mach-mx2/mx27ads.c
+++ b/arch/arm/mach-mx2/mx27ads.c
@@ -34,6 +34,8 @@
34#include <mach/iomux-mx1-mx2.h> 34#include <mach/iomux-mx1-mx2.h>
35#include <mach/board-mx27ads.h> 35#include <mach/board-mx27ads.h>
36 36
37#include "devices.h"
38
37/* ADS's NOR flash */ 39/* ADS's NOR flash */
38static struct physmap_flash_data mx27ads_flash_data = { 40static struct physmap_flash_data mx27ads_flash_data = {
39 .width = 2, 41 .width = 2,
@@ -251,12 +253,14 @@ static struct imxuart_platform_data uart_pdata[] = {
251 253
252static void __init mx27ads_board_init(void) 254static void __init mx27ads_board_init(void)
253{ 255{
254 int i;
255
256 gpio_fec_active(); 256 gpio_fec_active();
257 257
258 for (i = 0; i < 6; i++) 258 mxc_register_device(&mxc_uart_device0, &uart_pdata[0]);
259 imx_init_uart(i, &uart_pdata[i]); 259 mxc_register_device(&mxc_uart_device1, &uart_pdata[1]);
260 mxc_register_device(&mxc_uart_device2, &uart_pdata[2]);
261 mxc_register_device(&mxc_uart_device3, &uart_pdata[3]);
262 mxc_register_device(&mxc_uart_device4, &uart_pdata[4]);
263 mxc_register_device(&mxc_uart_device5, &uart_pdata[5]);
260 264
261 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); 265 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
262} 266}
diff --git a/arch/arm/mach-mx2/pcm038.c b/arch/arm/mach-mx2/pcm038.c
index 1028f453cfc8..7f55746e2591 100644
--- a/arch/arm/mach-mx2/pcm038.c
+++ b/arch/arm/mach-mx2/pcm038.c
@@ -28,6 +28,8 @@
28#include <mach/imx-uart.h> 28#include <mach/imx-uart.h>
29#include <mach/board-pcm038.h> 29#include <mach/board-pcm038.h>
30 30
31#include "devices.h"
32
31/* 33/*
32 * Phytec's phyCORE-i.MX27 comes with 32MiB flash, 34 * Phytec's phyCORE-i.MX27 comes with 32MiB flash,
33 * 16 bit width 35 * 16 bit width
@@ -170,11 +172,11 @@ static struct platform_device *platform_devices[] __initdata = {
170 172
171static void __init pcm038_init(void) 173static void __init pcm038_init(void)
172{ 174{
173 int i;
174 gpio_fec_active(); 175 gpio_fec_active();
175 176
176 for (i = 0; i < 3; i++) 177 mxc_register_device(&mxc_uart_device0, &uart_pdata[0]);
177 imx_init_uart(i, &uart_pdata[i]); 178 mxc_register_device(&mxc_uart_device1, &uart_pdata[1]);
179 mxc_register_device(&mxc_uart_device2, &uart_pdata[2]);
178 180
179 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); 181 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
180 182
diff --git a/arch/arm/mach-mx2/serial.c b/arch/arm/mach-mx2/serial.c
index e31fd44f7941..16debc296dad 100644
--- a/arch/arm/mach-mx2/serial.c
+++ b/arch/arm/mach-mx2/serial.c
@@ -35,7 +35,7 @@ static struct resource uart0[] = {
35 }, 35 },
36}; 36};
37 37
38static struct platform_device mxc_uart_device0 = { 38struct platform_device mxc_uart_device0 = {
39 .name = "imx-uart", 39 .name = "imx-uart",
40 .id = 0, 40 .id = 0,
41 .resource = uart0, 41 .resource = uart0,
@@ -54,7 +54,7 @@ static struct resource uart1[] = {
54 }, 54 },
55}; 55};
56 56
57static struct platform_device mxc_uart_device1 = { 57struct platform_device mxc_uart_device1 = {
58 .name = "imx-uart", 58 .name = "imx-uart",
59 .id = 1, 59 .id = 1,
60 .resource = uart1, 60 .resource = uart1,
@@ -73,7 +73,7 @@ static struct resource uart2[] = {
73 }, 73 },
74}; 74};
75 75
76static struct platform_device mxc_uart_device2 = { 76struct platform_device mxc_uart_device2 = {
77 .name = "imx-uart", 77 .name = "imx-uart",
78 .id = 2, 78 .id = 2,
79 .resource = uart2, 79 .resource = uart2,
@@ -92,7 +92,7 @@ static struct resource uart3[] = {
92 }, 92 },
93}; 93};
94 94
95static struct platform_device mxc_uart_device3 = { 95struct platform_device mxc_uart_device3 = {
96 .name = "imx-uart", 96 .name = "imx-uart",
97 .id = 3, 97 .id = 3,
98 .resource = uart3, 98 .resource = uart3,
@@ -111,7 +111,7 @@ static struct resource uart4[] = {
111 }, 111 },
112}; 112};
113 113
114static struct platform_device mxc_uart_device4 = { 114struct platform_device mxc_uart_device4 = {
115 .name = "imx-uart", 115 .name = "imx-uart",
116 .id = 4, 116 .id = 4,
117 .resource = uart4, 117 .resource = uart4,
@@ -130,48 +130,9 @@ static struct resource uart5[] = {
130 }, 130 },
131}; 131};
132 132
133static struct platform_device mxc_uart_device5 = { 133struct platform_device mxc_uart_device5 = {
134 .name = "imx-uart", 134 .name = "imx-uart",
135 .id = 5, 135 .id = 5,
136 .resource = uart5, 136 .resource = uart5,
137 .num_resources = ARRAY_SIZE(uart5), 137 .num_resources = ARRAY_SIZE(uart5),
138}; 138};
139
140/*
141 * Register only those UARTs that physically exists
142 */
143int __init imx_init_uart(int uart_no, struct imxuart_platform_data *pdata)
144{
145 switch (uart_no) {
146 case 0:
147 mxc_uart_device0.dev.platform_data = pdata;
148 platform_device_register(&mxc_uart_device0);
149 break;
150 case 1:
151 mxc_uart_device1.dev.platform_data = pdata;
152 platform_device_register(&mxc_uart_device1);
153 break;
154#ifndef CONFIG_MXC_IRDA
155 case 2:
156 mxc_uart_device2.dev.platform_data = pdata;
157 platform_device_register(&mxc_uart_device2);
158 break;
159#endif
160 case 3:
161 mxc_uart_device3.dev.platform_data = pdata;
162 platform_device_register(&mxc_uart_device3);
163 break;
164 case 4:
165 mxc_uart_device4.dev.platform_data = pdata;
166 platform_device_register(&mxc_uart_device4);
167 break;
168 case 5:
169 mxc_uart_device5.dev.platform_data = pdata;
170 platform_device_register(&mxc_uart_device5);
171 break;
172 default:
173 return -ENODEV;
174 }
175
176 return 0;
177}
diff --git a/arch/arm/mach-mx3/devices.c b/arch/arm/mach-mx3/devices.c
index e08c6a8ac56b..a6bdcc07f3c9 100644
--- a/arch/arm/mach-mx3/devices.c
+++ b/arch/arm/mach-mx3/devices.c
@@ -36,7 +36,7 @@ static struct resource uart0[] = {
36 }, 36 },
37}; 37};
38 38
39static struct platform_device mxc_uart_device0 = { 39struct platform_device mxc_uart_device0 = {
40 .name = "imx-uart", 40 .name = "imx-uart",
41 .id = 0, 41 .id = 0,
42 .resource = uart0, 42 .resource = uart0,
@@ -55,7 +55,7 @@ static struct resource uart1[] = {
55 }, 55 },
56}; 56};
57 57
58static struct platform_device mxc_uart_device1 = { 58struct platform_device mxc_uart_device1 = {
59 .name = "imx-uart", 59 .name = "imx-uart",
60 .id = 1, 60 .id = 1,
61 .resource = uart1, 61 .resource = uart1,
@@ -74,7 +74,7 @@ static struct resource uart2[] = {
74 }, 74 },
75}; 75};
76 76
77static struct platform_device mxc_uart_device2 = { 77struct platform_device mxc_uart_device2 = {
78 .name = "imx-uart", 78 .name = "imx-uart",
79 .id = 2, 79 .id = 2,
80 .resource = uart2, 80 .resource = uart2,
@@ -93,7 +93,7 @@ static struct resource uart3[] = {
93 }, 93 },
94}; 94};
95 95
96static struct platform_device mxc_uart_device3 = { 96struct platform_device mxc_uart_device3 = {
97 .name = "imx-uart", 97 .name = "imx-uart",
98 .id = 3, 98 .id = 3,
99 .resource = uart3, 99 .resource = uart3,
@@ -112,46 +112,13 @@ static struct resource uart4[] = {
112 }, 112 },
113}; 113};
114 114
115static struct platform_device mxc_uart_device4 = { 115struct platform_device mxc_uart_device4 = {
116 .name = "imx-uart", 116 .name = "imx-uart",
117 .id = 4, 117 .id = 4,
118 .resource = uart4, 118 .resource = uart4,
119 .num_resources = ARRAY_SIZE(uart4), 119 .num_resources = ARRAY_SIZE(uart4),
120}; 120};
121 121
122/*
123 * Register only those UARTs that physically exist
124 */
125int __init imx_init_uart(int uart_no, struct imxuart_platform_data *pdata)
126{
127 switch (uart_no) {
128 case 0:
129 mxc_uart_device0.dev.platform_data = pdata;
130 platform_device_register(&mxc_uart_device0);
131 break;
132 case 1:
133 mxc_uart_device1.dev.platform_data = pdata;
134 platform_device_register(&mxc_uart_device1);
135 break;
136 case 2:
137 mxc_uart_device2.dev.platform_data = pdata;
138 platform_device_register(&mxc_uart_device2);
139 break;
140 case 3:
141 mxc_uart_device3.dev.platform_data = pdata;
142 platform_device_register(&mxc_uart_device3);
143 break;
144 case 4:
145 mxc_uart_device4.dev.platform_data = pdata;
146 platform_device_register(&mxc_uart_device4);
147 break;
148 default:
149 return -ENODEV;
150 }
151
152 return 0;
153}
154
155/* GPIO port description */ 122/* GPIO port description */
156static struct mxc_gpio_port imx_gpio_ports[] = { 123static struct mxc_gpio_port imx_gpio_ports[] = {
157 [0] = { 124 [0] = {
diff --git a/arch/arm/mach-mx3/devices.h b/arch/arm/mach-mx3/devices.h
new file mode 100644
index 000000000000..4dc03f9e6001
--- /dev/null
+++ b/arch/arm/mach-mx3/devices.h
@@ -0,0 +1,6 @@
1
2extern struct platform_device mxc_uart_device0;
3extern struct platform_device mxc_uart_device1;
4extern struct platform_device mxc_uart_device2;
5extern struct platform_device mxc_uart_device3;
6extern struct platform_device mxc_uart_device4;
diff --git a/arch/arm/mach-mx3/iomux.c b/arch/arm/mach-mx3/iomux.c
index 3dda1fe23cbf..6e664be8cc13 100644
--- a/arch/arm/mach-mx3/iomux.c
+++ b/arch/arm/mach-mx3/iomux.c
@@ -43,7 +43,8 @@ static DEFINE_SPINLOCK(gpio_mux_lock);
43 */ 43 */
44int mxc_iomux_mode(unsigned int pin_mode) 44int mxc_iomux_mode(unsigned int pin_mode)
45{ 45{
46 u32 reg, field, l, mode, ret = 0; 46 u32 field, l, mode, ret = 0;
47 void __iomem *reg;
47 48
48 reg = IOMUXSW_MUX_CTL + (pin_mode & IOMUX_REG_MASK); 49 reg = IOMUXSW_MUX_CTL + (pin_mode & IOMUX_REG_MASK);
49 field = pin_mode & 0x3; 50 field = pin_mode & 0x3;
@@ -70,7 +71,8 @@ EXPORT_SYMBOL(mxc_iomux_mode);
70 */ 71 */
71void mxc_iomux_set_pad(enum iomux_pins pin, u32 config) 72void mxc_iomux_set_pad(enum iomux_pins pin, u32 config)
72{ 73{
73 u32 reg, field, l; 74 u32 field, l;
75 void __iomem *reg;
74 76
75 reg = IOMUXSW_PAD_CTL + (pin + 2) / 3; 77 reg = IOMUXSW_PAD_CTL + (pin + 2) / 3;
76 field = (pin + 2) % 3; 78 field = (pin + 2) % 3;
diff --git a/arch/arm/mach-mx3/mm.c b/arch/arm/mach-mx3/mm.c
index 30d842bd4d64..0589b5cd33c7 100644
--- a/arch/arm/mach-mx3/mm.c
+++ b/arch/arm/mach-mx3/mm.c
@@ -49,7 +49,7 @@ static struct map_desc mxc_io_desc[] __initdata = {
49 .virtual = AVIC_BASE_ADDR_VIRT, 49 .virtual = AVIC_BASE_ADDR_VIRT,
50 .pfn = __phys_to_pfn(AVIC_BASE_ADDR), 50 .pfn = __phys_to_pfn(AVIC_BASE_ADDR),
51 .length = AVIC_SIZE, 51 .length = AVIC_SIZE,
52 .type = MT_NONSHARED_DEVICE 52 .type = MT_DEVICE_NONSHARED
53 }, 53 },
54}; 54};
55 55
diff --git a/arch/arm/mach-mx3/mx31ads.c b/arch/arm/mach-mx3/mx31ads.c
index 60fb4e0d5acd..1be4a390c63f 100644
--- a/arch/arm/mach-mx3/mx31ads.c
+++ b/arch/arm/mach-mx3/mx31ads.c
@@ -22,6 +22,7 @@
22#include <linux/init.h> 22#include <linux/init.h>
23#include <linux/clk.h> 23#include <linux/clk.h>
24#include <linux/serial_8250.h> 24#include <linux/serial_8250.h>
25#include <linux/irq.h>
25 26
26#include <mach/hardware.h> 27#include <mach/hardware.h>
27#include <asm/mach-types.h> 28#include <asm/mach-types.h>
@@ -31,6 +32,8 @@
31#include <asm/mach/map.h> 32#include <asm/mach/map.h>
32#include <mach/common.h> 33#include <mach/common.h>
33#include <mach/board-mx31ads.h> 34#include <mach/board-mx31ads.h>
35#include <mach/imx-uart.h>
36#include <mach/iomux-mx3.h>
34 37
35/*! 38/*!
36 * @file mx31ads.c 39 * @file mx31ads.c
@@ -84,6 +87,108 @@ static inline int mxc_init_extuart(void)
84} 87}
85#endif 88#endif
86 89
90#if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE)
91static struct imxuart_platform_data uart_pdata = {
92 .flags = IMXUART_HAVE_RTSCTS,
93};
94
95static inline void mxc_init_imx_uart(void)
96{
97 mxc_iomux_mode(MX31_PIN_CTS1__CTS1);
98 mxc_iomux_mode(MX31_PIN_RTS1__RTS1);
99 mxc_iomux_mode(MX31_PIN_TXD1__TXD1);
100 mxc_iomux_mode(MX31_PIN_RXD1__RXD1);
101
102 mxc_register_device(&mxc_uart_device0, &uart_pdata);
103}
104#else /* !SERIAL_IMX */
105static inline void mxc_init_imx_uart(void)
106{
107}
108#endif /* !SERIAL_IMX */
109
110static void mx31ads_expio_irq_handler(u32 irq, struct irq_desc *desc)
111{
112 u32 imr_val;
113 u32 int_valid;
114 u32 expio_irq;
115
116 imr_val = __raw_readw(PBC_INTMASK_SET_REG);
117 int_valid = __raw_readw(PBC_INTSTATUS_REG) & imr_val;
118
119 expio_irq = MXC_EXP_IO_BASE;
120 for (; int_valid != 0; int_valid >>= 1, expio_irq++) {
121 if ((int_valid & 1) == 0)
122 continue;
123
124 generic_handle_irq(expio_irq);
125 }
126}
127
128/*
129 * Disable an expio pin's interrupt by setting the bit in the imr.
130 * @param irq an expio virtual irq number
131 */
132static void expio_mask_irq(u32 irq)
133{
134 u32 expio = MXC_IRQ_TO_EXPIO(irq);
135 /* mask the interrupt */
136 __raw_writew(1 << expio, PBC_INTMASK_CLEAR_REG);
137 __raw_readw(PBC_INTMASK_CLEAR_REG);
138}
139
140/*
141 * Acknowledge an expanded io pin's interrupt by clearing the bit in the isr.
142 * @param irq an expanded io virtual irq number
143 */
144static void expio_ack_irq(u32 irq)
145{
146 u32 expio = MXC_IRQ_TO_EXPIO(irq);
147 /* clear the interrupt status */
148 __raw_writew(1 << expio, PBC_INTSTATUS_REG);
149}
150
151/*
152 * Enable a expio pin's interrupt by clearing the bit in the imr.
153 * @param irq a expio virtual irq number
154 */
155static void expio_unmask_irq(u32 irq)
156{
157 u32 expio = MXC_IRQ_TO_EXPIO(irq);
158 /* unmask the interrupt */
159 __raw_writew(1 << expio, PBC_INTMASK_SET_REG);
160}
161
162static struct irq_chip expio_irq_chip = {
163 .ack = expio_ack_irq,
164 .mask = expio_mask_irq,
165 .unmask = expio_unmask_irq,
166};
167
168static void __init mx31ads_init_expio(void)
169{
170 int i;
171
172 printk(KERN_INFO "MX31ADS EXPIO(CPLD) hardware\n");
173
174 /*
175 * Configure INT line as GPIO input
176 */
177 mxc_iomux_mode(IOMUX_MODE(MX31_PIN_GPIO1_4, IOMUX_CONFIG_GPIO));
178
179 /* disable the interrupt and clear the status */
180 __raw_writew(0xFFFF, PBC_INTMASK_CLEAR_REG);
181 __raw_writew(0xFFFF, PBC_INTSTATUS_REG);
182 for (i = MXC_EXP_IO_BASE; i < (MXC_EXP_IO_BASE + MXC_MAX_EXP_IO_LINES);
183 i++) {
184 set_irq_chip(i, &expio_irq_chip);
185 set_irq_handler(i, handle_level_irq);
186 set_irq_flags(i, IRQF_VALID);
187 }
188 set_irq_type(EXPIO_PARENT_INT, IRQ_TYPE_LEVEL_HIGH);
189 set_irq_chained_handler(EXPIO_PARENT_INT, mx31ads_expio_irq_handler);
190}
191
87/*! 192/*!
88 * This structure defines static mappings for the i.MX31ADS board. 193 * This structure defines static mappings for the i.MX31ADS board.
89 */ 194 */
@@ -92,17 +197,17 @@ static struct map_desc mx31ads_io_desc[] __initdata = {
92 .virtual = AIPS1_BASE_ADDR_VIRT, 197 .virtual = AIPS1_BASE_ADDR_VIRT,
93 .pfn = __phys_to_pfn(AIPS1_BASE_ADDR), 198 .pfn = __phys_to_pfn(AIPS1_BASE_ADDR),
94 .length = AIPS1_SIZE, 199 .length = AIPS1_SIZE,
95 .type = MT_NONSHARED_DEVICE 200 .type = MT_DEVICE_NONSHARED
96 }, { 201 }, {
97 .virtual = SPBA0_BASE_ADDR_VIRT, 202 .virtual = SPBA0_BASE_ADDR_VIRT,
98 .pfn = __phys_to_pfn(SPBA0_BASE_ADDR), 203 .pfn = __phys_to_pfn(SPBA0_BASE_ADDR),
99 .length = SPBA0_SIZE, 204 .length = SPBA0_SIZE,
100 .type = MT_NONSHARED_DEVICE 205 .type = MT_DEVICE_NONSHARED
101 }, { 206 }, {
102 .virtual = AIPS2_BASE_ADDR_VIRT, 207 .virtual = AIPS2_BASE_ADDR_VIRT,
103 .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), 208 .pfn = __phys_to_pfn(AIPS2_BASE_ADDR),
104 .length = AIPS2_SIZE, 209 .length = AIPS2_SIZE,
105 .type = MT_NONSHARED_DEVICE 210 .type = MT_DEVICE_NONSHARED
106 }, { 211 }, {
107 .virtual = CS4_BASE_ADDR_VIRT, 212 .virtual = CS4_BASE_ADDR_VIRT,
108 .pfn = __phys_to_pfn(CS4_BASE_ADDR), 213 .pfn = __phys_to_pfn(CS4_BASE_ADDR),
@@ -120,12 +225,19 @@ void __init mx31ads_map_io(void)
120 iotable_init(mx31ads_io_desc, ARRAY_SIZE(mx31ads_io_desc)); 225 iotable_init(mx31ads_io_desc, ARRAY_SIZE(mx31ads_io_desc));
121} 226}
122 227
228void __init mx31ads_init_irq(void)
229{
230 mxc_init_irq();
231 mx31ads_init_expio();
232}
233
123/*! 234/*!
124 * Board specific initialization. 235 * Board specific initialization.
125 */ 236 */
126static void __init mxc_board_init(void) 237static void __init mxc_board_init(void)
127{ 238{
128 mxc_init_extuart(); 239 mxc_init_extuart();
240 mxc_init_imx_uart();
129} 241}
130 242
131static void __init mx31ads_timer_init(void) 243static void __init mx31ads_timer_init(void)
@@ -148,7 +260,7 @@ MACHINE_START(MX31ADS, "Freescale MX31ADS")
148 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 260 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
149 .boot_params = PHYS_OFFSET + 0x100, 261 .boot_params = PHYS_OFFSET + 0x100,
150 .map_io = mx31ads_map_io, 262 .map_io = mx31ads_map_io,
151 .init_irq = mxc_init_irq, 263 .init_irq = mx31ads_init_irq,
152 .init_machine = mxc_board_init, 264 .init_machine = mxc_board_init,
153 .timer = &mx31ads_timer, 265 .timer = &mx31ads_timer,
154MACHINE_END 266MACHINE_END
diff --git a/arch/arm/mach-mx3/mx31lite.c b/arch/arm/mach-mx3/mx31lite.c
index d363a6e79f80..c43440070143 100644
--- a/arch/arm/mach-mx3/mx31lite.c
+++ b/arch/arm/mach-mx3/mx31lite.c
@@ -45,17 +45,17 @@ static struct map_desc mx31lite_io_desc[] __initdata = {
45 .virtual = AIPS1_BASE_ADDR_VIRT, 45 .virtual = AIPS1_BASE_ADDR_VIRT,
46 .pfn = __phys_to_pfn(AIPS1_BASE_ADDR), 46 .pfn = __phys_to_pfn(AIPS1_BASE_ADDR),
47 .length = AIPS1_SIZE, 47 .length = AIPS1_SIZE,
48 .type = MT_NONSHARED_DEVICE 48 .type = MT_DEVICE_NONSHARED
49 }, { 49 }, {
50 .virtual = SPBA0_BASE_ADDR_VIRT, 50 .virtual = SPBA0_BASE_ADDR_VIRT,
51 .pfn = __phys_to_pfn(SPBA0_BASE_ADDR), 51 .pfn = __phys_to_pfn(SPBA0_BASE_ADDR),
52 .length = SPBA0_SIZE, 52 .length = SPBA0_SIZE,
53 .type = MT_NONSHARED_DEVICE 53 .type = MT_DEVICE_NONSHARED
54 }, { 54 }, {
55 .virtual = AIPS2_BASE_ADDR_VIRT, 55 .virtual = AIPS2_BASE_ADDR_VIRT,
56 .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), 56 .pfn = __phys_to_pfn(AIPS2_BASE_ADDR),
57 .length = AIPS2_SIZE, 57 .length = AIPS2_SIZE,
58 .type = MT_NONSHARED_DEVICE 58 .type = MT_DEVICE_NONSHARED
59 }, { 59 }, {
60 .virtual = CS4_BASE_ADDR_VIRT, 60 .virtual = CS4_BASE_ADDR_VIRT,
61 .pfn = __phys_to_pfn(CS4_BASE_ADDR), 61 .pfn = __phys_to_pfn(CS4_BASE_ADDR),
diff --git a/arch/arm/mach-mx3/pcm037.c b/arch/arm/mach-mx3/pcm037.c
index df8582a6231b..11fda95c86a5 100644
--- a/arch/arm/mach-mx3/pcm037.c
+++ b/arch/arm/mach-mx3/pcm037.c
@@ -33,6 +33,8 @@
33#include <mach/iomux-mx3.h> 33#include <mach/iomux-mx3.h>
34#include <mach/board-pcm037.h> 34#include <mach/board-pcm037.h>
35 35
36#include "devices.h"
37
36static struct physmap_flash_data pcm037_flash_data = { 38static struct physmap_flash_data pcm037_flash_data = {
37 .width = 2, 39 .width = 2,
38}; 40};
@@ -73,12 +75,12 @@ static void __init mxc_board_init(void)
73 mxc_iomux_mode(MX31_PIN_TXD1__TXD1); 75 mxc_iomux_mode(MX31_PIN_TXD1__TXD1);
74 mxc_iomux_mode(MX31_PIN_RXD1__RXD1); 76 mxc_iomux_mode(MX31_PIN_RXD1__RXD1);
75 77
76 imx_init_uart(0, &uart_pdata); 78 mxc_register_device(&mxc_uart_device0, &uart_pdata);
77 79
78 mxc_iomux_mode(MX31_PIN_CSPI3_MOSI__RXD3); 80 mxc_iomux_mode(MX31_PIN_CSPI3_MOSI__RXD3);
79 mxc_iomux_mode(MX31_PIN_CSPI3_MISO__TXD3); 81 mxc_iomux_mode(MX31_PIN_CSPI3_MISO__TXD3);
80 82
81 imx_init_uart(2, &uart_pdata); 83 mxc_register_device(&mxc_uart_device2, &uart_pdata);
82} 84}
83 85
84/* 86/*
diff --git a/arch/arm/mach-netx/generic.c b/arch/arm/mach-netx/generic.c
index 1b40483ea753..79df60c20e70 100644
--- a/arch/arm/mach-netx/generic.c
+++ b/arch/arm/mach-netx/generic.c
@@ -22,10 +22,10 @@
22#include <linux/kernel.h> 22#include <linux/kernel.h>
23#include <linux/module.h> 23#include <linux/module.h>
24#include <linux/platform_device.h> 24#include <linux/platform_device.h>
25#include <linux/io.h>
25#include <mach/hardware.h> 26#include <mach/hardware.h>
26#include <asm/mach/map.h> 27#include <asm/mach/map.h>
27#include <asm/hardware/vic.h> 28#include <asm/hardware/vic.h>
28#include <asm/io.h>
29#include <mach/netx-regs.h> 29#include <mach/netx-regs.h>
30#include <asm/mach/irq.h> 30#include <asm/mach/irq.h>
31 31
@@ -77,15 +77,12 @@ netx_hif_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
77 stat = ((readl(NETX_DPMAS_INT_EN) & 77 stat = ((readl(NETX_DPMAS_INT_EN) &
78 readl(NETX_DPMAS_INT_STAT)) >> 24) & 0x1f; 78 readl(NETX_DPMAS_INT_STAT)) >> 24) & 0x1f;
79 79
80 desc = irq_desc + NETX_IRQ_HIF_CHAINED(0);
81
82 while (stat) { 80 while (stat) {
83 if (stat & 1) { 81 if (stat & 1) {
84 DEBUG_IRQ("handling irq %d\n", irq); 82 DEBUG_IRQ("handling irq %d\n", irq);
85 desc_handle_irq(irq, desc); 83 generic_handle_irq(irq);
86 } 84 }
87 irq++; 85 irq++;
88 desc++;
89 stat >>= 1; 86 stat >>= 1;
90 } 87 }
91} 88}
diff --git a/arch/arm/mach-netx/include/mach/system.h b/arch/arm/mach-netx/include/mach/system.h
index 27d8ef8e8e29..6c1023b8a9ab 100644
--- a/arch/arm/mach-netx/include/mach/system.h
+++ b/arch/arm/mach-netx/include/mach/system.h
@@ -19,7 +19,7 @@
19#ifndef __ASM_ARCH_SYSTEM_H 19#ifndef __ASM_ARCH_SYSTEM_H
20#define __ASM_ARCH_SYSTEM_H 20#define __ASM_ARCH_SYSTEM_H
21 21
22#include <asm/io.h> 22#include <linux/io.h>
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24#include "netx-regs.h" 24#include "netx-regs.h"
25 25
diff --git a/arch/arm/mach-netx/pfifo.c b/arch/arm/mach-netx/pfifo.c
index 19ae0a72bea3..03984943e16d 100644
--- a/arch/arm/mach-netx/pfifo.c
+++ b/arch/arm/mach-netx/pfifo.c
@@ -20,8 +20,8 @@
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/module.h> 21#include <linux/module.h>
22#include <linux/mutex.h> 22#include <linux/mutex.h>
23#include <linux/io.h>
23 24
24#include <asm/io.h>
25#include <mach/hardware.h> 25#include <mach/hardware.h>
26#include <mach/netx-regs.h> 26#include <mach/netx-regs.h>
27#include <mach/pfifo.h> 27#include <mach/pfifo.h>
diff --git a/arch/arm/mach-netx/time.c b/arch/arm/mach-netx/time.c
index ac8e5bfed691..7c540c1f01fa 100644
--- a/arch/arm/mach-netx/time.c
+++ b/arch/arm/mach-netx/time.c
@@ -21,9 +21,9 @@
21#include <linux/interrupt.h> 21#include <linux/interrupt.h>
22#include <linux/irq.h> 22#include <linux/irq.h>
23#include <linux/clocksource.h> 23#include <linux/clocksource.h>
24#include <linux/io.h>
24 25
25#include <mach/hardware.h> 26#include <mach/hardware.h>
26#include <asm/io.h>
27#include <asm/mach/time.h> 27#include <asm/mach/time.h>
28#include <mach/netx-regs.h> 28#include <mach/netx-regs.h>
29 29
diff --git a/arch/arm/mach-netx/xc.c b/arch/arm/mach-netx/xc.c
index 04c34e82fe6d..32eabf5dfa4f 100644
--- a/arch/arm/mach-netx/xc.c
+++ b/arch/arm/mach-netx/xc.c
@@ -21,8 +21,8 @@
21#include <linux/device.h> 21#include <linux/device.h>
22#include <linux/firmware.h> 22#include <linux/firmware.h>
23#include <linux/mutex.h> 23#include <linux/mutex.h>
24#include <linux/io.h>
24 25
25#include <asm/io.h>
26#include <mach/hardware.h> 26#include <mach/hardware.h>
27#include <mach/netx-regs.h> 27#include <mach/netx-regs.h>
28 28
diff --git a/arch/arm/mach-ns9xxx/board-a9m9750dev.c b/arch/arm/mach-ns9xxx/board-a9m9750dev.c
index a22a608a7aba..b45bb3b802f1 100644
--- a/arch/arm/mach-ns9xxx/board-a9m9750dev.c
+++ b/arch/arm/mach-ns9xxx/board-a9m9750dev.c
@@ -86,13 +86,10 @@ static void a9m9750dev_fpga_demux_handler(unsigned int irq,
86 86
87 while (stat != 0) { 87 while (stat != 0) {
88 int irqno = fls(stat) - 1; 88 int irqno = fls(stat) - 1;
89 struct irq_desc *fpgadesc;
90 89
91 stat &= ~(1 << irqno); 90 stat &= ~(1 << irqno);
92 91
93 fpgadesc = irq_desc + FPGA_IRQ(irqno); 92 generic_handle_irq(FPGA_IRQ(irqno));
94
95 desc_handle_irq(FPGA_IRQ(irqno), fpgadesc);
96 } 93 }
97 94
98 desc->chip->unmask(irq); 95 desc->chip->unmask(irq);
diff --git a/arch/arm/mach-ns9xxx/gpio.c b/arch/arm/mach-ns9xxx/gpio.c
index 804c30075960..5241e6a286cc 100644
--- a/arch/arm/mach-ns9xxx/gpio.c
+++ b/arch/arm/mach-ns9xxx/gpio.c
@@ -12,13 +12,13 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/spinlock.h> 13#include <linux/spinlock.h>
14#include <linux/module.h> 14#include <linux/module.h>
15#include <linux/bitops.h>
15 16
16#include <mach/gpio.h> 17#include <mach/gpio.h>
17#include <mach/processor.h> 18#include <mach/processor.h>
18#include <mach/processor-ns9360.h> 19#include <mach/processor-ns9360.h>
19#include <asm/bug.h> 20#include <asm/bug.h>
20#include <asm/types.h> 21#include <asm/types.h>
21#include <asm/bitops.h>
22 22
23#include "gpio-ns9360.h" 23#include "gpio-ns9360.h"
24 24
diff --git a/arch/arm/mach-ns9xxx/include/mach/uncompress.h b/arch/arm/mach-ns9xxx/include/mach/uncompress.h
index 5dbc3c5167c8..1b12d324b087 100644
--- a/arch/arm/mach-ns9xxx/include/mach/uncompress.h
+++ b/arch/arm/mach-ns9xxx/include/mach/uncompress.h
@@ -11,7 +11,7 @@
11#ifndef __ASM_ARCH_UNCOMPRESS_H 11#ifndef __ASM_ARCH_UNCOMPRESS_H
12#define __ASM_ARCH_UNCOMPRESS_H 12#define __ASM_ARCH_UNCOMPRESS_H
13 13
14#include <asm/io.h> 14#include <linux/io.h>
15 15
16#define __REG(x) ((void __iomem __force *)(x)) 16#define __REG(x) ((void __iomem __force *)(x))
17 17
diff --git a/arch/arm/mach-ns9xxx/irq.c b/arch/arm/mach-ns9xxx/irq.c
index 38260d5f849b..22e0eb6e9ec4 100644
--- a/arch/arm/mach-ns9xxx/irq.c
+++ b/arch/arm/mach-ns9xxx/irq.c
@@ -10,7 +10,7 @@
10 */ 10 */
11#include <linux/interrupt.h> 11#include <linux/interrupt.h>
12#include <linux/kernel_stat.h> 12#include <linux/kernel_stat.h>
13#include <asm/io.h> 13#include <linux/io.h>
14#include <asm/mach/irq.h> 14#include <asm/mach/irq.h>
15#include <mach/regs-sys-common.h> 15#include <mach/regs-sys-common.h>
16#include <mach/irqs.h> 16#include <mach/irqs.h>
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c
index 213b48787102..45a01311669a 100644
--- a/arch/arm/mach-omap1/board-voiceblue.c
+++ b/arch/arm/mach-omap1/board-voiceblue.c
@@ -21,6 +21,7 @@
21#include <linux/reboot.h> 21#include <linux/reboot.h>
22#include <linux/serial_8250.h> 22#include <linux/serial_8250.h>
23#include <linux/serial_reg.h> 23#include <linux/serial_reg.h>
24#include <linux/irq.h>
24 25
25#include <mach/hardware.h> 26#include <mach/hardware.h>
26#include <asm/mach-types.h> 27#include <asm/mach-types.h>
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index 5965cf09f8c4..478c2c9a22cb 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -17,8 +17,8 @@
17#include <linux/errno.h> 17#include <linux/errno.h>
18#include <linux/err.h> 18#include <linux/err.h>
19#include <linux/clk.h> 19#include <linux/clk.h>
20#include <linux/io.h>
20 21
21#include <asm/io.h>
22#include <asm/mach-types.h> 22#include <asm/mach-types.h>
23 23
24#include <mach/cpu.h> 24#include <mach/cpu.h>
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index ab708d4c597e..99982d3380c9 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -13,9 +13,9 @@
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/platform_device.h> 15#include <linux/platform_device.h>
16#include <linux/io.h>
16 17
17#include <mach/hardware.h> 18#include <mach/hardware.h>
18#include <asm/io.h>
19#include <asm/mach/map.h> 19#include <asm/mach/map.h>
20 20
21#include <mach/tc.h> 21#include <mach/tc.h>
diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c
index 4449d86095f6..04995381aa5c 100644
--- a/arch/arm/mach-omap1/fpga.c
+++ b/arch/arm/mach-omap1/fpga.c
@@ -21,9 +21,9 @@
21#include <linux/kernel.h> 21#include <linux/kernel.h>
22#include <linux/device.h> 22#include <linux/device.h>
23#include <linux/errno.h> 23#include <linux/errno.h>
24#include <linux/io.h>
24 25
25#include <mach/hardware.h> 26#include <mach/hardware.h>
26#include <asm/io.h>
27#include <asm/irq.h> 27#include <asm/irq.h>
28#include <asm/mach/irq.h> 28#include <asm/mach/irq.h>
29 29
@@ -86,7 +86,6 @@ static void fpga_mask_ack_irq(unsigned int irq)
86 86
87void innovator_fpga_IRQ_demux(unsigned int irq, struct irq_desc *desc) 87void innovator_fpga_IRQ_demux(unsigned int irq, struct irq_desc *desc)
88{ 88{
89 struct irq_desc *d;
90 u32 stat; 89 u32 stat;
91 int fpga_irq; 90 int fpga_irq;
92 91
@@ -99,8 +98,7 @@ void innovator_fpga_IRQ_demux(unsigned int irq, struct irq_desc *desc)
99 (fpga_irq < OMAP_FPGA_IRQ_END) && stat; 98 (fpga_irq < OMAP_FPGA_IRQ_END) && stat;
100 fpga_irq++, stat >>= 1) { 99 fpga_irq++, stat >>= 1) {
101 if (stat & 1) { 100 if (stat & 1) {
102 d = irq_desc + fpga_irq; 101 generic_handle_irq(fpga_irq);
103 desc_handle_irq(fpga_irq, d);
104 } 102 }
105 } 103 }
106} 104}
diff --git a/arch/arm/mach-omap1/id.c b/arch/arm/mach-omap1/id.c
index da13c3e82850..13083d7e692d 100644
--- a/arch/arm/mach-omap1/id.c
+++ b/arch/arm/mach-omap1/id.c
@@ -14,8 +14,7 @@
14#include <linux/module.h> 14#include <linux/module.h>
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/init.h> 16#include <linux/init.h>
17 17#include <linux/io.h>
18#include <asm/io.h>
19 18
20#define OMAP_DIE_ID_0 0xfffe1800 19#define OMAP_DIE_ID_0 0xfffe1800
21#define OMAP_DIE_ID_1 0xfffe1804 20#define OMAP_DIE_ID_1 0xfffe1804
diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c
index 2b9750b200ce..b3bd8ca85118 100644
--- a/arch/arm/mach-omap1/io.c
+++ b/arch/arm/mach-omap1/io.c
@@ -11,10 +11,10 @@
11#include <linux/module.h> 11#include <linux/module.h>
12#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/io.h>
14 15
15#include <asm/tlb.h> 16#include <asm/tlb.h>
16#include <asm/mach/map.h> 17#include <asm/mach/map.h>
17#include <asm/io.h>
18#include <mach/mux.h> 18#include <mach/mux.h>
19#include <mach/tc.h> 19#include <mach/tc.h>
20 20
diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c
index 0ec6c1ec4250..9ad5197075ff 100644
--- a/arch/arm/mach-omap1/irq.c
+++ b/arch/arm/mach-omap1/irq.c
@@ -40,6 +40,7 @@
40#include <linux/module.h> 40#include <linux/module.h>
41#include <linux/sched.h> 41#include <linux/sched.h>
42#include <linux/interrupt.h> 42#include <linux/interrupt.h>
43#include <linux/io.h>
43 44
44#include <mach/hardware.h> 45#include <mach/hardware.h>
45#include <asm/irq.h> 46#include <asm/irq.h>
@@ -47,8 +48,6 @@
47#include <mach/gpio.h> 48#include <mach/gpio.h>
48#include <mach/cpu.h> 49#include <mach/cpu.h>
49 50
50#include <asm/io.h>
51
52#define IRQ_BANK(irq) ((irq) >> 5) 51#define IRQ_BANK(irq) ((irq) >> 5)
53#define IRQ_BIT(irq) ((irq) & 0x1f) 52#define IRQ_BIT(irq) ((irq) & 0x1f)
54 53
diff --git a/arch/arm/mach-omap1/leds-h2p2-debug.c b/arch/arm/mach-omap1/leds-h2p2-debug.c
index 610f51f18741..71fe2cc7f7cf 100644
--- a/arch/arm/mach-omap1/leds-h2p2-debug.c
+++ b/arch/arm/mach-omap1/leds-h2p2-debug.c
@@ -12,8 +12,8 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/kernel_stat.h> 13#include <linux/kernel_stat.h>
14#include <linux/sched.h> 14#include <linux/sched.h>
15#include <linux/io.h>
15 16
16#include <asm/io.h>
17#include <mach/hardware.h> 17#include <mach/hardware.h>
18#include <asm/leds.h> 18#include <asm/leds.h>
19#include <asm/system.h> 19#include <asm/system.h>
diff --git a/arch/arm/mach-omap1/mailbox.c b/arch/arm/mach-omap1/mailbox.c
index af44eab1ed24..59abbf331a96 100644
--- a/arch/arm/mach-omap1/mailbox.c
+++ b/arch/arm/mach-omap1/mailbox.c
@@ -13,9 +13,9 @@
13#include <linux/resource.h> 13#include <linux/resource.h>
14#include <linux/interrupt.h> 14#include <linux/interrupt.h>
15#include <linux/platform_device.h> 15#include <linux/platform_device.h>
16#include <linux/io.h>
16#include <mach/mailbox.h> 17#include <mach/mailbox.h>
17#include <mach/irqs.h> 18#include <mach/irqs.h>
18#include <asm/io.h>
19 19
20#define MAILBOX_ARM2DSP1 0x00 20#define MAILBOX_ARM2DSP1 0x00
21#define MAILBOX_ARM2DSP1b 0x04 21#define MAILBOX_ARM2DSP1b 0x04
diff --git a/arch/arm/mach-omap1/mux.c b/arch/arm/mach-omap1/mux.c
index 898516e362e7..062c905c2ba6 100644
--- a/arch/arm/mach-omap1/mux.c
+++ b/arch/arm/mach-omap1/mux.c
@@ -24,10 +24,11 @@
24 */ 24 */
25#include <linux/module.h> 25#include <linux/module.h>
26#include <linux/init.h> 26#include <linux/init.h>
27#include <asm/system.h> 27#include <linux/io.h>
28#include <asm/io.h>
29#include <linux/spinlock.h> 28#include <linux/spinlock.h>
30 29
30#include <asm/system.h>
31
31#include <mach/mux.h> 32#include <mach/mux.h>
32 33
33#ifdef CONFIG_OMAP_MUX 34#ifdef CONFIG_OMAP_MUX
diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c
index 63c4ea18b1ca..770d256c790b 100644
--- a/arch/arm/mach-omap1/pm.c
+++ b/arch/arm/mach-omap1/pm.c
@@ -41,8 +41,8 @@
41#include <linux/interrupt.h> 41#include <linux/interrupt.h>
42#include <linux/sysfs.h> 42#include <linux/sysfs.h>
43#include <linux/module.h> 43#include <linux/module.h>
44#include <linux/io.h>
44 45
45#include <asm/io.h>
46#include <asm/irq.h> 46#include <asm/irq.h>
47#include <asm/atomic.h> 47#include <asm/atomic.h>
48#include <asm/mach/time.h> 48#include <asm/mach/time.h>
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c
index 0e25a996bb4c..aefc967fc003 100644
--- a/arch/arm/mach-omap1/serial.c
+++ b/arch/arm/mach-omap1/serial.c
@@ -18,8 +18,8 @@
18#include <linux/serial_8250.h> 18#include <linux/serial_8250.h>
19#include <linux/serial_reg.h> 19#include <linux/serial_reg.h>
20#include <linux/clk.h> 20#include <linux/clk.h>
21#include <linux/io.h>
21 22
22#include <asm/io.h>
23#include <asm/mach-types.h> 23#include <asm/mach-types.h>
24 24
25#include <mach/board.h> 25#include <mach/board.h>
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
index e54708595ecf..2cf7e32bd293 100644
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -43,10 +43,10 @@
43#include <linux/err.h> 43#include <linux/err.h>
44#include <linux/clocksource.h> 44#include <linux/clocksource.h>
45#include <linux/clockchips.h> 45#include <linux/clockchips.h>
46#include <linux/io.h>
46 47
47#include <asm/system.h> 48#include <asm/system.h>
48#include <mach/hardware.h> 49#include <mach/hardware.h>
49#include <asm/io.h>
50#include <asm/leds.h> 50#include <asm/leds.h>
51#include <asm/irq.h> 51#include <asm/irq.h>
52#include <asm/mach/irq.h> 52#include <asm/mach/irq.h>
diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c
index e67760189d14..705367ece174 100644
--- a/arch/arm/mach-omap1/timer32k.c
+++ b/arch/arm/mach-omap1/timer32k.c
@@ -44,10 +44,10 @@
44#include <linux/clk.h> 44#include <linux/clk.h>
45#include <linux/clocksource.h> 45#include <linux/clocksource.h>
46#include <linux/clockchips.h> 46#include <linux/clockchips.h>
47#include <linux/io.h>
47 48
48#include <asm/system.h> 49#include <asm/system.h>
49#include <mach/hardware.h> 50#include <mach/hardware.h>
50#include <asm/io.h>
51#include <asm/leds.h> 51#include <asm/leds.h>
52#include <asm/irq.h> 52#include <asm/irq.h>
53#include <asm/mach/irq.h> 53#include <asm/mach/irq.h>
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index b72ca13b3acb..24688efaa445 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -21,6 +21,7 @@
21#include <linux/delay.h> 21#include <linux/delay.h>
22#include <linux/err.h> 22#include <linux/err.h>
23#include <linux/clk.h> 23#include <linux/clk.h>
24#include <linux/io.h>
24 25
25#include <mach/hardware.h> 26#include <mach/hardware.h>
26#include <asm/mach-types.h> 27#include <asm/mach-types.h>
@@ -34,8 +35,6 @@
34#include <mach/common.h> 35#include <mach/common.h>
35#include <mach/gpmc.h> 36#include <mach/gpmc.h>
36 37
37#include <asm/io.h>
38
39 38
40#define SDP2430_FLASH_CS 0 39#define SDP2430_FLASH_CS 0
41#define SDP2430_SMC91X_CS 5 40#define SDP2430_SMC91X_CS 5
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 9e2624ca70a2..d4e3b6fc4705 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -21,6 +21,7 @@
21#include <linux/input.h> 21#include <linux/input.h>
22#include <linux/err.h> 22#include <linux/err.h>
23#include <linux/clk.h> 23#include <linux/clk.h>
24#include <linux/io.h>
24 25
25#include <mach/hardware.h> 26#include <mach/hardware.h>
26#include <asm/mach-types.h> 27#include <asm/mach-types.h>
@@ -41,8 +42,6 @@
41#include <mach/dma.h> 42#include <mach/dma.h>
42#include <mach/gpmc.h> 43#include <mach/gpmc.h>
43 44
44#include <asm/io.h>
45
46#define H4_FLASH_CS 0 45#define H4_FLASH_CS 0
47#define H4_SMC91X_CS 1 46#define H4_SMC91X_CS 1
48 47
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 1d891e4a6933..97cde3d3611d 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -21,9 +21,8 @@
21#include <linux/errno.h> 21#include <linux/errno.h>
22#include <linux/delay.h> 22#include <linux/delay.h>
23#include <linux/clk.h> 23#include <linux/clk.h>
24#include <asm/bitops.h> 24#include <linux/io.h>
25 25#include <linux/bitops.h>
26#include <asm/io.h>
27 26
28#include <mach/clock.h> 27#include <mach/clock.h>
29#include <mach/sram.h> 28#include <mach/sram.h>
diff --git a/arch/arm/mach-omap2/clock24xx.c b/arch/arm/mach-omap2/clock24xx.c
index 295e671e9cfd..d382eb0184ac 100644
--- a/arch/arm/mach-omap2/clock24xx.c
+++ b/arch/arm/mach-omap2/clock24xx.c
@@ -24,14 +24,13 @@
24#include <linux/errno.h> 24#include <linux/errno.h>
25#include <linux/delay.h> 25#include <linux/delay.h>
26#include <linux/clk.h> 26#include <linux/clk.h>
27
28#include <linux/io.h> 27#include <linux/io.h>
29#include <linux/cpufreq.h> 28#include <linux/cpufreq.h>
29#include <linux/bitops.h>
30 30
31#include <mach/clock.h> 31#include <mach/clock.h>
32#include <mach/sram.h> 32#include <mach/sram.h>
33#include <asm/div64.h> 33#include <asm/div64.h>
34#include <asm/bitops.h>
35 34
36#include "memory.h" 35#include "memory.h"
37#include "clock.h" 36#include "clock.h"
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index 3ff74952f835..e5b475f21081 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -25,11 +25,11 @@
25#include <linux/clk.h> 25#include <linux/clk.h>
26#include <linux/io.h> 26#include <linux/io.h>
27#include <linux/limits.h> 27#include <linux/limits.h>
28#include <linux/bitops.h>
28 29
29#include <mach/clock.h> 30#include <mach/clock.h>
30#include <mach/sram.h> 31#include <mach/sram.h>
31#include <asm/div64.h> 32#include <asm/div64.h>
32#include <asm/bitops.h>
33 33
34#include "memory.h" 34#include "memory.h"
35#include "clock.h" 35#include "clock.h"
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 7a7f02559075..2ee954a0bc7c 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -13,9 +13,9 @@
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/platform_device.h> 15#include <linux/platform_device.h>
16#include <linux/io.h>
16 17
17#include <mach/hardware.h> 18#include <mach/hardware.h>
18#include <asm/io.h>
19#include <asm/mach-types.h> 19#include <asm/mach-types.h>
20#include <asm/mach/map.h> 20#include <asm/mach/map.h>
21 21
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index f51d69bc457d..af1081a0b27c 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -15,8 +15,8 @@
15#include <linux/clk.h> 15#include <linux/clk.h>
16#include <linux/ioport.h> 16#include <linux/ioport.h>
17#include <linux/spinlock.h> 17#include <linux/spinlock.h>
18#include <linux/io.h>
18 19
19#include <asm/io.h>
20#include <asm/mach-types.h> 20#include <asm/mach-types.h>
21#include <mach/gpmc.h> 21#include <mach/gpmc.h>
22 22
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index a5d4526ac4d6..209177c7f22f 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -14,8 +14,9 @@
14#include <linux/module.h> 14#include <linux/module.h>
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/io.h>
17 18
18#include <asm/io.h> 19#include <asm/cputype.h>
19 20
20#include <mach/control.h> 21#include <mach/control.h>
21#include <mach/cpu.h> 22#include <mach/cpu.h>
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 987351f07d7b..7c3d6289c05f 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -15,9 +15,9 @@
15#include <linux/module.h> 15#include <linux/module.h>
16#include <linux/kernel.h> 16#include <linux/kernel.h>
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/io.h>
18 19
19#include <asm/tlb.h> 20#include <asm/tlb.h>
20#include <asm/io.h>
21 21
22#include <asm/mach/map.h> 22#include <asm/mach/map.h>
23 23
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 9ef15b31d8fc..196a9565a8dc 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -13,10 +13,10 @@
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/interrupt.h> 15#include <linux/interrupt.h>
16#include <linux/io.h>
16#include <mach/hardware.h> 17#include <mach/hardware.h>
17#include <asm/mach/irq.h> 18#include <asm/mach/irq.h>
18#include <asm/irq.h> 19#include <asm/irq.h>
19#include <asm/io.h>
20 20
21#define INTC_REVISION 0x0000 21#define INTC_REVISION 0x0000
22#define INTC_SYSCONFIG 0x0010 22#define INTC_SYSCONFIG 0x0010
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c
index a480b96948e4..32b7af3c610b 100644
--- a/arch/arm/mach-omap2/mailbox.c
+++ b/arch/arm/mach-omap2/mailbox.c
@@ -14,9 +14,9 @@
14#include <linux/clk.h> 14#include <linux/clk.h>
15#include <linux/err.h> 15#include <linux/err.h>
16#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17#include <linux/io.h>
17#include <mach/mailbox.h> 18#include <mach/mailbox.h>
18#include <mach/irqs.h> 19#include <mach/irqs.h>
19#include <asm/io.h>
20 20
21#define MAILBOX_REVISION 0x00 21#define MAILBOX_REVISION 0x00
22#define MAILBOX_SYSCONFIG 0x10 22#define MAILBOX_SYSCONFIG 0x10
diff --git a/arch/arm/mach-omap2/memory.c b/arch/arm/mach-omap2/memory.c
index 6b49cc9cbdcb..ab1462b02e6e 100644
--- a/arch/arm/mach-omap2/memory.c
+++ b/arch/arm/mach-omap2/memory.c
@@ -21,8 +21,7 @@
21#include <linux/errno.h> 21#include <linux/errno.h>
22#include <linux/delay.h> 22#include <linux/delay.h>
23#include <linux/clk.h> 23#include <linux/clk.h>
24 24#include <linux/io.h>
25#include <asm/io.h>
26 25
27#include <mach/common.h> 26#include <mach/common.h>
28#include <mach/clock.h> 27#include <mach/clock.h>
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 443d07fef7f3..6b7d672058b9 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -25,10 +25,11 @@
25 */ 25 */
26#include <linux/module.h> 26#include <linux/module.h>
27#include <linux/init.h> 27#include <linux/init.h>
28#include <asm/system.h> 28#include <linux/io.h>
29#include <asm/io.h>
30#include <linux/spinlock.h> 29#include <linux/spinlock.h>
31 30
31#include <asm/system.h>
32
32#include <mach/control.h> 33#include <mach/control.h>
33#include <mach/mux.h> 34#include <mach/mux.h>
34 35
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 8671e1079ab5..55361c16c9d9 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -24,8 +24,8 @@
24#include <linux/module.h> 24#include <linux/module.h>
25#include <linux/delay.h> 25#include <linux/delay.h>
26#include <linux/clk.h> 26#include <linux/clk.h>
27#include <linux/io.h>
27 28
28#include <asm/io.h>
29#include <asm/irq.h> 29#include <asm/irq.h>
30#include <asm/atomic.h> 30#include <asm/atomic.h>
31#include <asm/mach/time.h> 31#include <asm/mach/time.h>
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index adc8a26a8fb0..7d9444adc5df 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -17,8 +17,7 @@
17#include <linux/serial_8250.h> 17#include <linux/serial_8250.h>
18#include <linux/serial_reg.h> 18#include <linux/serial_reg.h>
19#include <linux/clk.h> 19#include <linux/clk.h>
20 20#include <linux/io.h>
21#include <asm/io.h>
22 21
23#include <mach/common.h> 22#include <mach/common.h>
24#include <mach/board.h> 23#include <mach/board.h>
diff --git a/arch/arm/mach-orion5x/Kconfig b/arch/arm/mach-orion5x/Kconfig
index ddcd41b15d17..f59a8d0e0824 100644
--- a/arch/arm/mach-orion5x/Kconfig
+++ b/arch/arm/mach-orion5x/Kconfig
@@ -36,6 +36,12 @@ config MACH_TS209
36 Say 'Y' here if you want your kernel to support the 36 Say 'Y' here if you want your kernel to support the
37 QNAP TS-109/TS-209 platform. 37 QNAP TS-109/TS-209 platform.
38 38
39config MACH_TERASTATION_PRO2
40 bool "Buffalo Terastation Pro II/Live"
41 help
42 Say 'Y' here if you want your kernel to support the
43 Buffalo Terastation Pro II/Live platform.
44
39config MACH_LINKSTATION_PRO 45config MACH_LINKSTATION_PRO
40 bool "Buffalo Linkstation Pro/Live" 46 bool "Buffalo Linkstation Pro/Live"
41 select I2C_BOARDINFO 47 select I2C_BOARDINFO
@@ -44,6 +50,13 @@ config MACH_LINKSTATION_PRO
44 Buffalo Linkstation Pro/Live platform. Both v1 and 50 Buffalo Linkstation Pro/Live platform. Both v1 and
45 v2 devices are supported. 51 v2 devices are supported.
46 52
53config MACH_LINKSTATION_MINI
54 bool "Buffalo Linkstation Mini"
55 select I2C_BOARDINFO
56 help
57 Say 'Y' here if you want your kernel to support the
58 Buffalo Linkstation Mini platform.
59
47config MACH_TS409 60config MACH_TS409
48 bool "QNAP TS-409" 61 bool "QNAP TS-409"
49 help 62 help
@@ -68,6 +81,13 @@ config MACH_MV2120
68 Say 'Y' here if you want your kernel to support the 81 Say 'Y' here if you want your kernel to support the
69 HP Media Vault mv2120 or mv5100. 82 HP Media Vault mv2120 or mv5100.
70 83
84config MACH_EDMINI_V2
85 bool "LaCie Ethernet Disk mini V2"
86 select I2C_BOARDINFO
87 help
88 Say 'Y' here if you want your kernel to support the
89 LaCie Ethernet Disk mini V2.
90
71config MACH_MSS2 91config MACH_MSS2
72 bool "Maxtor Shared Storage II" 92 bool "Maxtor Shared Storage II"
73 help 93 help
@@ -92,6 +112,12 @@ config MACH_RD88F5181L_FXO
92 Say 'Y' here if you want your kernel to support the 112 Say 'Y' here if you want your kernel to support the
93 Marvell Orion-VoIP FXO (88F5181L) RD. 113 Marvell Orion-VoIP FXO (88F5181L) RD.
94 114
115config MACH_RD88F6183AP_GE
116 bool "Marvell Orion-1-90 AP GE Reference Design"
117 help
118 Say 'Y' here if you want your kernel to support the
119 Marvell Orion-1-90 (88F6183) AP GE RD.
120
95endmenu 121endmenu
96 122
97endif 123endif
diff --git a/arch/arm/mach-orion5x/Makefile b/arch/arm/mach-orion5x/Makefile
index fcc48a8864f3..3d4a1bc12355 100644
--- a/arch/arm/mach-orion5x/Makefile
+++ b/arch/arm/mach-orion5x/Makefile
@@ -2,14 +2,18 @@ obj-y += common.o addr-map.o pci.o gpio.o irq.o mpp.o
2obj-$(CONFIG_MACH_DB88F5281) += db88f5281-setup.o 2obj-$(CONFIG_MACH_DB88F5281) += db88f5281-setup.o
3obj-$(CONFIG_MACH_RD88F5182) += rd88f5182-setup.o 3obj-$(CONFIG_MACH_RD88F5182) += rd88f5182-setup.o
4obj-$(CONFIG_MACH_KUROBOX_PRO) += kurobox_pro-setup.o 4obj-$(CONFIG_MACH_KUROBOX_PRO) += kurobox_pro-setup.o
5obj-$(CONFIG_MACH_TERASTATION_PRO2) += terastation_pro2-setup.o
5obj-$(CONFIG_MACH_LINKSTATION_PRO) += kurobox_pro-setup.o 6obj-$(CONFIG_MACH_LINKSTATION_PRO) += kurobox_pro-setup.o
7obj-$(CONFIG_MACH_LINKSTATION_MINI) += lsmini-setup.o
6obj-$(CONFIG_MACH_DNS323) += dns323-setup.o 8obj-$(CONFIG_MACH_DNS323) += dns323-setup.o
7obj-$(CONFIG_MACH_TS209) += ts209-setup.o tsx09-common.o 9obj-$(CONFIG_MACH_TS209) += ts209-setup.o tsx09-common.o
8obj-$(CONFIG_MACH_TS409) += ts409-setup.o tsx09-common.o 10obj-$(CONFIG_MACH_TS409) += ts409-setup.o tsx09-common.o
9obj-$(CONFIG_MACH_WRT350N_V2) += wrt350n-v2-setup.o 11obj-$(CONFIG_MACH_WRT350N_V2) += wrt350n-v2-setup.o
10obj-$(CONFIG_MACH_TS78XX) += ts78xx-setup.o 12obj-$(CONFIG_MACH_TS78XX) += ts78xx-setup.o
11obj-$(CONFIG_MACH_MV2120) += mv2120-setup.o 13obj-$(CONFIG_MACH_MV2120) += mv2120-setup.o
14obj-$(CONFIG_MACH_EDMINI_V2) += edmini_v2-setup.o
12obj-$(CONFIG_MACH_MSS2) += mss2-setup.o 15obj-$(CONFIG_MACH_MSS2) += mss2-setup.o
13obj-$(CONFIG_MACH_WNR854T) += wnr854t-setup.o 16obj-$(CONFIG_MACH_WNR854T) += wnr854t-setup.o
14obj-$(CONFIG_MACH_RD88F5181L_GE) += rd88f5181l-ge-setup.o 17obj-$(CONFIG_MACH_RD88F5181L_GE) += rd88f5181l-ge-setup.o
15obj-$(CONFIG_MACH_RD88F5181L_FXO) += rd88f5181l-fxo-setup.o 18obj-$(CONFIG_MACH_RD88F5181L_FXO) += rd88f5181l-fxo-setup.o
19obj-$(CONFIG_MACH_RD88F6183AP_GE) += rd88f6183ap-ge-setup.o
diff --git a/arch/arm/mach-orion5x/addr-map.c b/arch/arm/mach-orion5x/addr-map.c
index bea37972120a..719957e05d9e 100644
--- a/arch/arm/mach-orion5x/addr-map.c
+++ b/arch/arm/mach-orion5x/addr-map.c
@@ -13,8 +13,8 @@
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/mbus.h> 15#include <linux/mbus.h>
16#include <linux/io.h>
16#include <mach/hardware.h> 17#include <mach/hardware.h>
17#include <asm/io.h>
18#include "common.h" 18#include "common.h"
19 19
20/* 20/*
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 7b11e552bc5a..9625ef5975d0 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -18,6 +18,7 @@
18#include <linux/mv643xx_eth.h> 18#include <linux/mv643xx_eth.h>
19#include <linux/mv643xx_i2c.h> 19#include <linux/mv643xx_i2c.h>
20#include <linux/ata_platform.h> 20#include <linux/ata_platform.h>
21#include <linux/spi/orion_spi.h>
21#include <asm/page.h> 22#include <asm/page.h>
22#include <asm/setup.h> 23#include <asm/setup.h>
23#include <asm/timex.h> 24#include <asm/timex.h>
@@ -146,7 +147,6 @@ void __init orion5x_ehci1_init(void)
146 ****************************************************************************/ 147 ****************************************************************************/
147struct mv643xx_eth_shared_platform_data orion5x_eth_shared_data = { 148struct mv643xx_eth_shared_platform_data orion5x_eth_shared_data = {
148 .dram = &orion5x_mbus_dram_info, 149 .dram = &orion5x_mbus_dram_info,
149 .t_clk = ORION5X_TCLK,
150}; 150};
151 151
152static struct resource orion5x_eth_shared_resources[] = { 152static struct resource orion5x_eth_shared_resources[] = {
@@ -154,6 +154,10 @@ static struct resource orion5x_eth_shared_resources[] = {
154 .start = ORION5X_ETH_PHYS_BASE + 0x2000, 154 .start = ORION5X_ETH_PHYS_BASE + 0x2000,
155 .end = ORION5X_ETH_PHYS_BASE + 0x3fff, 155 .end = ORION5X_ETH_PHYS_BASE + 0x3fff,
156 .flags = IORESOURCE_MEM, 156 .flags = IORESOURCE_MEM,
157 }, {
158 .start = IRQ_ORION5X_ETH_ERR,
159 .end = IRQ_ORION5X_ETH_ERR,
160 .flags = IORESOURCE_IRQ,
157 }, 161 },
158}; 162};
159 163
@@ -163,7 +167,7 @@ static struct platform_device orion5x_eth_shared = {
163 .dev = { 167 .dev = {
164 .platform_data = &orion5x_eth_shared_data, 168 .platform_data = &orion5x_eth_shared_data,
165 }, 169 },
166 .num_resources = 1, 170 .num_resources = ARRAY_SIZE(orion5x_eth_shared_resources),
167 .resource = orion5x_eth_shared_resources, 171 .resource = orion5x_eth_shared_resources,
168}; 172};
169 173
@@ -268,6 +272,38 @@ void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data)
268 272
269 273
270/***************************************************************************** 274/*****************************************************************************
275 * SPI
276 ****************************************************************************/
277static struct orion_spi_info orion5x_spi_plat_data = {
278 .tclk = 0,
279};
280
281static struct resource orion5x_spi_resources[] = {
282 {
283 .name = "spi base",
284 .start = SPI_PHYS_BASE,
285 .end = SPI_PHYS_BASE + 0x1f,
286 .flags = IORESOURCE_MEM,
287 },
288};
289
290static struct platform_device orion5x_spi = {
291 .name = "orion_spi",
292 .id = 0,
293 .dev = {
294 .platform_data = &orion5x_spi_plat_data,
295 },
296 .num_resources = ARRAY_SIZE(orion5x_spi_resources),
297 .resource = orion5x_spi_resources,
298};
299
300void __init orion5x_spi_init()
301{
302 platform_device_register(&orion5x_spi);
303}
304
305
306/*****************************************************************************
271 * UART0 307 * UART0
272 ****************************************************************************/ 308 ****************************************************************************/
273static struct plat_serial8250_port orion5x_uart0_data[] = { 309static struct plat_serial8250_port orion5x_uart0_data[] = {
@@ -278,7 +314,7 @@ static struct plat_serial8250_port orion5x_uart0_data[] = {
278 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, 314 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
279 .iotype = UPIO_MEM, 315 .iotype = UPIO_MEM,
280 .regshift = 2, 316 .regshift = 2,
281 .uartclk = ORION5X_TCLK, 317 .uartclk = 0,
282 }, { 318 }, {
283 }, 319 },
284}; 320};
@@ -322,7 +358,7 @@ static struct plat_serial8250_port orion5x_uart1_data[] = {
322 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, 358 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
323 .iotype = UPIO_MEM, 359 .iotype = UPIO_MEM,
324 .regshift = 2, 360 .regshift = 2,
325 .uartclk = ORION5X_TCLK, 361 .uartclk = 0,
326 }, { 362 }, {
327 }, 363 },
328}; 364};
@@ -455,9 +491,24 @@ void __init orion5x_xor_init(void)
455/***************************************************************************** 491/*****************************************************************************
456 * Time handling 492 * Time handling
457 ****************************************************************************/ 493 ****************************************************************************/
494int orion5x_tclk;
495
496int __init orion5x_find_tclk(void)
497{
498 u32 dev, rev;
499
500 orion5x_pcie_id(&dev, &rev);
501 if (dev == MV88F6183_DEV_ID &&
502 (readl(MPP_RESET_SAMPLE) & 0x00000200) == 0)
503 return 133333333;
504
505 return 166666667;
506}
507
458static void orion5x_timer_init(void) 508static void orion5x_timer_init(void)
459{ 509{
460 orion_time_init(IRQ_ORION5X_BRIDGE, ORION5X_TCLK); 510 orion5x_tclk = orion5x_find_tclk();
511 orion_time_init(IRQ_ORION5X_BRIDGE, orion5x_tclk);
461} 512}
462 513
463struct sys_timer orion5x_timer = { 514struct sys_timer orion5x_timer = {
@@ -499,6 +550,12 @@ static void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name)
499 } else { 550 } else {
500 *dev_name = "MV88F5181(L)-Rev-Unsupported"; 551 *dev_name = "MV88F5181(L)-Rev-Unsupported";
501 } 552 }
553 } else if (*dev == MV88F6183_DEV_ID) {
554 if (*rev == MV88F6183_REV_B0) {
555 *dev_name = "MV88F6183-Rev-B0";
556 } else {
557 *dev_name = "MV88F6183-Rev-Unsupported";
558 }
502 } else { 559 } else {
503 *dev_name = "Device-Unknown"; 560 *dev_name = "Device-Unknown";
504 } 561 }
@@ -510,7 +567,12 @@ void __init orion5x_init(void)
510 u32 dev, rev; 567 u32 dev, rev;
511 568
512 orion5x_id(&dev, &rev, &dev_name); 569 orion5x_id(&dev, &rev, &dev_name);
513 printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, ORION5X_TCLK); 570 printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, orion5x_tclk);
571
572 orion5x_eth_shared_data.t_clk = orion5x_tclk;
573 orion5x_spi_plat_data.tclk = orion5x_tclk;
574 orion5x_uart0_data[0].uartclk = orion5x_tclk;
575 orion5x_uart1_data[0].uartclk = orion5x_tclk;
514 576
515 /* 577 /*
516 * Setup Orion address map 578 * Setup Orion address map
diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h
index 0bd195551a27..1f8b2da676a5 100644
--- a/arch/arm/mach-orion5x/common.h
+++ b/arch/arm/mach-orion5x/common.h
@@ -10,6 +10,7 @@ struct mv_sata_platform_data;
10void orion5x_map_io(void); 10void orion5x_map_io(void);
11void orion5x_init_irq(void); 11void orion5x_init_irq(void);
12void orion5x_init(void); 12void orion5x_init(void);
13extern int orion5x_tclk;
13extern struct sys_timer orion5x_timer; 14extern struct sys_timer orion5x_timer;
14 15
15/* 16/*
@@ -30,6 +31,7 @@ void orion5x_ehci1_init(void);
30void orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data); 31void orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data);
31void orion5x_i2c_init(void); 32void orion5x_i2c_init(void);
32void orion5x_sata_init(struct mv_sata_platform_data *sata_data); 33void orion5x_sata_init(struct mv_sata_platform_data *sata_data);
34void orion5x_spi_init(void);
33void orion5x_uart0_init(void); 35void orion5x_uart0_init(void);
34void orion5x_uart1_init(void); 36void orion5x_uart1_init(void);
35void orion5x_xor_init(void); 37void orion5x_xor_init(void);
diff --git a/arch/arm/mach-orion5x/edmini_v2-setup.c b/arch/arm/mach-orion5x/edmini_v2-setup.c
new file mode 100644
index 000000000000..b24ee0c2cd61
--- /dev/null
+++ b/arch/arm/mach-orion5x/edmini_v2-setup.c
@@ -0,0 +1,262 @@
1/*
2 * arch/arm/mach-orion5x/edmini_v2-setup.c
3 *
4 * LaCie Ethernet Disk mini V2 Setup
5 *
6 * Copyright (C) 2008 Christopher Moore <moore@free.fr>
7 * Copyright (C) 2008 Albert Aribaud <albert.aribaud@free.fr>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14/*
15 * TODO: add Orion USB device port init when kernel.org support is added.
16 * TODO: add flash write support: see below.
17 * TODO: add power-off support.
18 * TODO: add I2C EEPROM support.
19 */
20
21#include <linux/kernel.h>
22#include <linux/init.h>
23#include <linux/platform_device.h>
24#include <linux/pci.h>
25#include <linux/irq.h>
26#include <linux/mtd/physmap.h>
27#include <linux/mv643xx_eth.h>
28#include <linux/leds.h>
29#include <linux/gpio_keys.h>
30#include <linux/input.h>
31#include <linux/i2c.h>
32#include <linux/ata_platform.h>
33#include <linux/gpio.h>
34#include <asm/mach-types.h>
35#include <asm/mach/arch.h>
36#include <asm/mach/pci.h>
37#include <mach/orion5x.h>
38#include "common.h"
39#include "mpp.h"
40
41/*****************************************************************************
42 * EDMINI_V2 Info
43 ****************************************************************************/
44
45/*
46 * 512KB NOR flash Device bus boot chip select
47 */
48
49#define EDMINI_V2_NOR_BOOT_BASE 0xfff80000
50#define EDMINI_V2_NOR_BOOT_SIZE SZ_512K
51
52/*****************************************************************************
53 * 512KB NOR Flash on BOOT Device
54 ****************************************************************************/
55
56/*
57 * Currently the MTD code does not recognize the MX29LV400CBCT as a bottom
58 * -type device. This could cause risks of accidentally erasing critical
59 * flash sectors. We thus define a single, write-protected partition covering
60 * the whole flash.
61 * TODO: once the flash part TOP/BOTTOM detection issue is sorted out in the MTD
62 * code, break this into at least three partitions: 'u-boot code', 'u-boot
63 * environment' and 'whatever is left'.
64 */
65
66static struct mtd_partition edmini_v2_partitions[] = {
67 {
68 .name = "Full512kb",
69 .size = 0x00080000,
70 .offset = 0x00000000,
71 .mask_flags = MTD_WRITEABLE,
72 },
73};
74
75static struct physmap_flash_data edmini_v2_nor_flash_data = {
76 .width = 1,
77 .parts = edmini_v2_partitions,
78 .nr_parts = ARRAY_SIZE(edmini_v2_partitions),
79};
80
81static struct resource edmini_v2_nor_flash_resource = {
82 .flags = IORESOURCE_MEM,
83 .start = EDMINI_V2_NOR_BOOT_BASE,
84 .end = EDMINI_V2_NOR_BOOT_BASE
85 + EDMINI_V2_NOR_BOOT_SIZE - 1,
86};
87
88static struct platform_device edmini_v2_nor_flash = {
89 .name = "physmap-flash",
90 .id = 0,
91 .dev = {
92 .platform_data = &edmini_v2_nor_flash_data,
93 },
94 .num_resources = 1,
95 .resource = &edmini_v2_nor_flash_resource,
96};
97
98/*****************************************************************************
99 * Ethernet
100 ****************************************************************************/
101
102static struct mv643xx_eth_platform_data edmini_v2_eth_data = {
103 .phy_addr = 8,
104};
105
106/*****************************************************************************
107 * RTC 5C372a on I2C bus
108 ****************************************************************************/
109
110#define EDMINIV2_RTC_GPIO 3
111
112static struct i2c_board_info __initdata edmini_v2_i2c_rtc = {
113 I2C_BOARD_INFO("rs5c372a", 0x32),
114 .irq = 0,
115};
116
117/*****************************************************************************
118 * Sata
119 ****************************************************************************/
120
121static struct mv_sata_platform_data edmini_v2_sata_data = {
122 .n_ports = 2,
123};
124
125/*****************************************************************************
126 * GPIO LED (simple - doesn't use hardware blinking support)
127 ****************************************************************************/
128
129#define EDMINI_V2_GPIO_LED_POWER 16
130
131static struct gpio_led edmini_v2_leds[] = {
132 {
133 .name = "power:blue",
134 .gpio = EDMINI_V2_GPIO_LED_POWER,
135 .active_low = 1,
136 },
137};
138
139static struct gpio_led_platform_data edmini_v2_led_data = {
140 .num_leds = ARRAY_SIZE(edmini_v2_leds),
141 .leds = edmini_v2_leds,
142};
143
144static struct platform_device edmini_v2_gpio_leds = {
145 .name = "leds-gpio",
146 .id = -1,
147 .dev = {
148 .platform_data = &edmini_v2_led_data,
149 },
150};
151
152/****************************************************************************
153 * GPIO key
154 ****************************************************************************/
155
156#define EDMINI_V2_GPIO_KEY_POWER 18
157
158static struct gpio_keys_button edmini_v2_buttons[] = {
159 {
160 .code = KEY_POWER,
161 .gpio = EDMINI_V2_GPIO_KEY_POWER,
162 .desc = "Power Button",
163 .active_low = 0,
164 },
165};
166
167static struct gpio_keys_platform_data edmini_v2_button_data = {
168 .buttons = edmini_v2_buttons,
169 .nbuttons = ARRAY_SIZE(edmini_v2_buttons),
170};
171
172static struct platform_device edmini_v2_gpio_buttons = {
173 .name = "gpio-keys",
174 .id = -1,
175 .dev = {
176 .platform_data = &edmini_v2_button_data,
177 },
178};
179
180/*****************************************************************************
181 * General Setup
182 ****************************************************************************/
183static struct orion5x_mpp_mode edminiv2_mpp_modes[] __initdata = {
184 { 0, MPP_UNUSED },
185 { 1, MPP_UNUSED },
186 { 2, MPP_UNUSED },
187 { 3, MPP_GPIO }, /* RTC interrupt */
188 { 4, MPP_UNUSED },
189 { 5, MPP_UNUSED },
190 { 6, MPP_UNUSED },
191 { 7, MPP_UNUSED },
192 { 8, MPP_UNUSED },
193 { 9, MPP_UNUSED },
194 { 10, MPP_UNUSED },
195 { 11, MPP_UNUSED },
196 { 12, MPP_SATA_LED }, /* SATA 0 presence */
197 { 13, MPP_SATA_LED }, /* SATA 1 presence */
198 { 14, MPP_SATA_LED }, /* SATA 0 active */
199 { 15, MPP_SATA_LED }, /* SATA 1 active */
200 /* 16: Power LED control (0 = On, 1 = Off) */
201 { 16, MPP_GPIO },
202 /* 17: Power LED control select (0 = CPLD, 1 = GPIO16) */
203 { 17, MPP_GPIO },
204 /* 18: Power button status (0 = Released, 1 = Pressed) */
205 { 18, MPP_GPIO },
206 { 19, MPP_UNUSED },
207 { -1 }
208};
209
210static void __init edmini_v2_init(void)
211{
212 /*
213 * Setup basic Orion functions. Need to be called early.
214 */
215 orion5x_init();
216
217 orion5x_mpp_conf(edminiv2_mpp_modes);
218
219 /*
220 * Configure peripherals.
221 */
222 orion5x_ehci0_init();
223 orion5x_eth_init(&edmini_v2_eth_data);
224 orion5x_i2c_init();
225 orion5x_sata_init(&edmini_v2_sata_data);
226 orion5x_uart0_init();
227
228 orion5x_setup_dev_boot_win(EDMINI_V2_NOR_BOOT_BASE,
229 EDMINI_V2_NOR_BOOT_SIZE);
230 platform_device_register(&edmini_v2_nor_flash);
231 platform_device_register(&edmini_v2_gpio_leds);
232 platform_device_register(&edmini_v2_gpio_buttons);
233
234 pr_notice("edmini_v2: USB device port, flash write and power-off "
235 "are not yet supported.\n");
236
237 /* Get RTC IRQ and register the chip */
238 if (gpio_request(EDMINIV2_RTC_GPIO, "rtc") == 0) {
239 if (gpio_direction_input(EDMINIV2_RTC_GPIO) == 0)
240 edmini_v2_i2c_rtc.irq = gpio_to_irq(EDMINIV2_RTC_GPIO);
241 else
242 gpio_free(EDMINIV2_RTC_GPIO);
243 }
244
245 if (edmini_v2_i2c_rtc.irq == 0)
246 pr_warning("edmini_v2: failed to get RTC IRQ\n");
247
248 i2c_register_board_info(0, &edmini_v2_i2c_rtc, 1);
249}
250
251/* Warning: LaCie use a wrong mach-type (0x20e=526) in their bootloader. */
252MACHINE_START(EDMINI_V2, "LaCie Ethernet Disk mini V2")
253 /* Maintainer: Christopher Moore <moore@free.fr> */
254 .phys_io = ORION5X_REGS_PHYS_BASE,
255 .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC,
256 .boot_params = 0x00000100,
257 .init_machine = edmini_v2_init,
258 .map_io = orion5x_map_io,
259 .init_irq = orion5x_init_irq,
260 .timer = &orion5x_timer,
261 .fixup = tag_fixup_mem32,
262MACHINE_END
diff --git a/arch/arm/mach-orion5x/gpio.c b/arch/arm/mach-orion5x/gpio.c
index cd8a16f67d2b..fc419868e39f 100644
--- a/arch/arm/mach-orion5x/gpio.c
+++ b/arch/arm/mach-orion5x/gpio.c
@@ -15,8 +15,8 @@
15#include <linux/module.h> 15#include <linux/module.h>
16#include <linux/spinlock.h> 16#include <linux/spinlock.h>
17#include <linux/bitops.h> 17#include <linux/bitops.h>
18#include <linux/io.h>
18#include <asm/gpio.h> 19#include <asm/gpio.h>
19#include <asm/io.h>
20#include <mach/orion5x.h> 20#include <mach/orion5x.h>
21#include "common.h" 21#include "common.h"
22 22
diff --git a/arch/arm/mach-orion5x/include/mach/orion5x.h b/arch/arm/mach-orion5x/include/mach/orion5x.h
index 61eb74a88862..e67c843baa02 100644
--- a/arch/arm/mach-orion5x/include/mach/orion5x.h
+++ b/arch/arm/mach-orion5x/include/mach/orion5x.h
@@ -2,7 +2,7 @@
2 * arch/arm/mach-orion5x/include/mach/orion5x.h 2 * arch/arm/mach-orion5x/include/mach/orion5x.h
3 * 3 *
4 * Generic definitions of Orion SoC flavors: 4 * Generic definitions of Orion SoC flavors:
5 * Orion-1, Orion-VoIP, Orion-NAS, and Orion-2. 5 * Orion-1, Orion-VoIP, Orion-NAS, Orion-2, and Orion-1-90.
6 * 6 *
7 * Maintainer: Tzachi Perelstein <tzachi@marvell.com> 7 * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
8 * 8 *
@@ -76,6 +76,9 @@
76#define MV88F5281_REV_D0 4 76#define MV88F5281_REV_D0 4
77#define MV88F5281_REV_D1 5 77#define MV88F5281_REV_D1 5
78#define MV88F5281_REV_D2 6 78#define MV88F5281_REV_D2 6
79/* Orion-1-90 (88F6183) */
80#define MV88F6183_DEV_ID 0x6183
81#define MV88F6183_REV_B0 3
79 82
80/******************************************************************************* 83/*******************************************************************************
81 * Orion Registers Map 84 * Orion Registers Map
@@ -86,6 +89,7 @@
86#define ORION5X_DEV_BUS_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x10000) 89#define ORION5X_DEV_BUS_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x10000)
87#define ORION5X_DEV_BUS_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x10000) 90#define ORION5X_DEV_BUS_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x10000)
88#define ORION5X_DEV_BUS_REG(x) (ORION5X_DEV_BUS_VIRT_BASE | (x)) 91#define ORION5X_DEV_BUS_REG(x) (ORION5X_DEV_BUS_VIRT_BASE | (x))
92#define SPI_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x0600)
89#define I2C_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x1000) 93#define I2C_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x1000)
90#define UART0_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x2000) 94#define UART0_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x2000)
91#define UART0_VIRT_BASE (ORION5X_DEV_BUS_VIRT_BASE | 0x2000) 95#define UART0_VIRT_BASE (ORION5X_DEV_BUS_VIRT_BASE | 0x2000)
diff --git a/arch/arm/mach-orion5x/include/mach/timex.h b/arch/arm/mach-orion5x/include/mach/timex.h
index e82e44db7629..4c69820e0810 100644
--- a/arch/arm/mach-orion5x/include/mach/timex.h
+++ b/arch/arm/mach-orion5x/include/mach/timex.h
@@ -9,5 +9,3 @@
9 */ 9 */
10 10
11#define CLOCK_TICK_RATE (100 * HZ) 11#define CLOCK_TICK_RATE (100 * HZ)
12
13#define ORION5X_TCLK 166666667
diff --git a/arch/arm/mach-orion5x/irq.c b/arch/arm/mach-orion5x/irq.c
index 2545ff9e5830..632a36f5cf14 100644
--- a/arch/arm/mach-orion5x/irq.c
+++ b/arch/arm/mach-orion5x/irq.c
@@ -13,8 +13,8 @@
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/irq.h> 15#include <linux/irq.h>
16#include <linux/io.h>
16#include <asm/gpio.h> 17#include <asm/gpio.h>
17#include <asm/io.h>
18#include <mach/orion5x.h> 18#include <mach/orion5x.h>
19#include <plat/irq.h> 19#include <plat/irq.h>
20#include "common.h" 20#include "common.h"
@@ -162,7 +162,7 @@ static void orion5x_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
162 polarity ^= 1 << pin; 162 polarity ^= 1 << pin;
163 writel(polarity, GPIO_IN_POL); 163 writel(polarity, GPIO_IN_POL);
164 } 164 }
165 desc_handle_irq(irq, desc); 165 generic_handle_irq(irq);
166 } 166 }
167 } 167 }
168} 168}
diff --git a/arch/arm/mach-orion5x/kurobox_pro-setup.c b/arch/arm/mach-orion5x/kurobox_pro-setup.c
index 610f2a6297f8..dfbb68df7b09 100644
--- a/arch/arm/mach-orion5x/kurobox_pro-setup.c
+++ b/arch/arm/mach-orion5x/kurobox_pro-setup.c
@@ -293,7 +293,7 @@ static void kurobox_pro_power_off(void)
293 const unsigned char shutdownwait[] = {0x00, 0x0c}; 293 const unsigned char shutdownwait[] = {0x00, 0x0c};
294 const unsigned char poweroff[] = {0x00, 0x06}; 294 const unsigned char poweroff[] = {0x00, 0x06};
295 /* 38400 baud divisor */ 295 /* 38400 baud divisor */
296 const unsigned divisor = ((ORION5X_TCLK + (8 * 38400)) / (16 * 38400)); 296 const unsigned divisor = ((orion5x_tclk + (8 * 38400)) / (16 * 38400));
297 297
298 pr_info("%s: triggering power-off...\n", __func__); 298 pr_info("%s: triggering power-off...\n", __func__);
299 299
diff --git a/arch/arm/mach-orion5x/lsmini-setup.c b/arch/arm/mach-orion5x/lsmini-setup.c
new file mode 100644
index 000000000000..e0c43b8beb72
--- /dev/null
+++ b/arch/arm/mach-orion5x/lsmini-setup.c
@@ -0,0 +1,279 @@
1/*
2 * arch/arm/mach-orion5x/lsmini-setup.c
3 *
4 * Maintainer: Alexey Kopytko <alexey@kopytko.ru>
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/pci.h>
15#include <linux/mtd/physmap.h>
16#include <linux/mv643xx_eth.h>
17#include <linux/leds.h>
18#include <linux/gpio_keys.h>
19#include <linux/input.h>
20#include <linux/i2c.h>
21#include <linux/ata_platform.h>
22#include <asm/mach-types.h>
23#include <linux/gpio.h>
24#include <asm/mach/arch.h>
25#include "common.h"
26#include "mpp.h"
27#include "include/mach/system.h"
28
29/*****************************************************************************
30 * Linkstation Mini Info
31 ****************************************************************************/
32
33/*
34 * 256K NOR flash Device bus boot chip select
35 */
36
37#define LSMINI_NOR_BOOT_BASE 0xf4000000
38#define LSMINI_NOR_BOOT_SIZE SZ_256K
39
40/*****************************************************************************
41 * 256KB NOR Flash on BOOT Device
42 ****************************************************************************/
43
44static struct physmap_flash_data lsmini_nor_flash_data = {
45 .width = 1,
46};
47
48static struct resource lsmini_nor_flash_resource = {
49 .flags = IORESOURCE_MEM,
50 .start = LSMINI_NOR_BOOT_BASE,
51 .end = LSMINI_NOR_BOOT_BASE + LSMINI_NOR_BOOT_SIZE - 1,
52};
53
54static struct platform_device lsmini_nor_flash = {
55 .name = "physmap-flash",
56 .id = 0,
57 .dev = {
58 .platform_data = &lsmini_nor_flash_data,
59 },
60 .num_resources = 1,
61 .resource = &lsmini_nor_flash_resource,
62};
63
64/*****************************************************************************
65 * Ethernet
66 ****************************************************************************/
67
68static struct mv643xx_eth_platform_data lsmini_eth_data = {
69 .phy_addr = 8,
70};
71
72/*****************************************************************************
73 * RTC 5C372a on I2C bus
74 ****************************************************************************/
75
76static struct i2c_board_info __initdata lsmini_i2c_rtc = {
77 I2C_BOARD_INFO("rs5c372a", 0x32),
78};
79
80/*****************************************************************************
81 * LEDs attached to GPIO
82 ****************************************************************************/
83
84#define LSMINI_GPIO_LED_ALARM 2
85#define LSMINI_GPIO_LED_INFO 3
86#define LSMINI_GPIO_LED_FUNC 9
87#define LSMINI_GPIO_LED_PWR 14
88
89static struct gpio_led lsmini_led_pins[] = {
90 {
91 .name = "alarm:red",
92 .gpio = LSMINI_GPIO_LED_ALARM,
93 .active_low = 1,
94 }, {
95 .name = "info:amber",
96 .gpio = LSMINI_GPIO_LED_INFO,
97 .active_low = 1,
98 }, {
99 .name = "func:blue:top",
100 .gpio = LSMINI_GPIO_LED_FUNC,
101 .active_low = 1,
102 }, {
103 .name = "power:blue:bottom",
104 .gpio = LSMINI_GPIO_LED_PWR,
105 },
106};
107
108static struct gpio_led_platform_data lsmini_led_data = {
109 .leds = lsmini_led_pins,
110 .num_leds = ARRAY_SIZE(lsmini_led_pins),
111};
112
113static struct platform_device lsmini_leds = {
114 .name = "leds-gpio",
115 .id = -1,
116 .dev = {
117 .platform_data = &lsmini_led_data,
118 },
119};
120
121/****************************************************************************
122 * GPIO Attached Keys
123 ****************************************************************************/
124
125#define LSMINI_GPIO_KEY_FUNC 15
126#define LSMINI_GPIO_KEY_POWER 18
127#define LSMINI_GPIO_KEY_AUTOPOWER 17
128
129#define LSMINI_SW_POWER 0x00
130#define LSMINI_SW_AUTOPOWER 0x01
131
132static struct gpio_keys_button lsmini_buttons[] = {
133 {
134 .code = KEY_OPTION,
135 .gpio = LSMINI_GPIO_KEY_FUNC,
136 .desc = "Function Button",
137 .active_low = 1,
138 }, {
139 .type = EV_SW,
140 .code = LSMINI_SW_POWER,
141 .gpio = LSMINI_GPIO_KEY_POWER,
142 .desc = "Power-on Switch",
143 .active_low = 1,
144 }, {
145 .type = EV_SW,
146 .code = LSMINI_SW_AUTOPOWER,
147 .gpio = LSMINI_GPIO_KEY_AUTOPOWER,
148 .desc = "Power-auto Switch",
149 .active_low = 1,
150 },
151};
152
153static struct gpio_keys_platform_data lsmini_button_data = {
154 .buttons = lsmini_buttons,
155 .nbuttons = ARRAY_SIZE(lsmini_buttons),
156};
157
158static struct platform_device lsmini_button_device = {
159 .name = "gpio-keys",
160 .id = -1,
161 .num_resources = 0,
162 .dev = {
163 .platform_data = &lsmini_button_data,
164 },
165};
166
167
168/*****************************************************************************
169 * SATA
170 ****************************************************************************/
171static struct mv_sata_platform_data lsmini_sata_data = {
172 .n_ports = 2,
173};
174
175
176/*****************************************************************************
177 * Linkstation Mini specific power off method: reboot
178 ****************************************************************************/
179/*
180 * On the Linkstation Mini, the shutdown process is following:
181 * - Userland monitors key events until the power switch goes to off position
182 * - The board reboots
183 * - U-boot starts and goes into an idle mode waiting for the user
184 * to move the switch to ON position
185 */
186
187static void lsmini_power_off(void)
188{
189 arch_reset(0);
190}
191
192
193/*****************************************************************************
194 * General Setup
195 ****************************************************************************/
196
197#define LSMINI_GPIO_USB_POWER 16
198#define LSMINI_GPIO_AUTO_POWER 17
199#define LSMINI_GPIO_POWER 18
200
201#define LSMINI_GPIO_HDD_POWER0 1
202#define LSMINI_GPIO_HDD_POWER1 19
203
204static struct orion5x_mpp_mode lsmini_mpp_modes[] __initdata = {
205 { 0, MPP_UNUSED }, /* LED_RESERVE1 (unused) */
206 { 1, MPP_GPIO }, /* HDD_PWR */
207 { 2, MPP_GPIO }, /* LED_ALARM */
208 { 3, MPP_GPIO }, /* LED_INFO */
209 { 4, MPP_UNUSED },
210 { 5, MPP_UNUSED },
211 { 6, MPP_UNUSED },
212 { 7, MPP_UNUSED },
213 { 8, MPP_UNUSED },
214 { 9, MPP_GPIO }, /* LED_FUNC */
215 { 10, MPP_UNUSED },
216 { 11, MPP_UNUSED }, /* LED_ETH (dummy) */
217 { 12, MPP_UNUSED },
218 { 13, MPP_UNUSED },
219 { 14, MPP_GPIO }, /* LED_PWR */
220 { 15, MPP_GPIO }, /* FUNC */
221 { 16, MPP_GPIO }, /* USB_PWR */
222 { 17, MPP_GPIO }, /* AUTO_POWER */
223 { 18, MPP_GPIO }, /* POWER */
224 { 19, MPP_GPIO }, /* HDD_PWR1 */
225 { -1 },
226};
227
228static void __init lsmini_init(void)
229{
230 /*
231 * Setup basic Orion functions. Need to be called early.
232 */
233 orion5x_init();
234
235 orion5x_mpp_conf(lsmini_mpp_modes);
236
237 /*
238 * Configure peripherals.
239 */
240 orion5x_ehci0_init();
241 orion5x_ehci1_init();
242 orion5x_eth_init(&lsmini_eth_data);
243 orion5x_i2c_init();
244 orion5x_sata_init(&lsmini_sata_data);
245 orion5x_uart0_init();
246 orion5x_xor_init();
247
248 orion5x_setup_dev_boot_win(LSMINI_NOR_BOOT_BASE,
249 LSMINI_NOR_BOOT_SIZE);
250 platform_device_register(&lsmini_nor_flash);
251
252 platform_device_register(&lsmini_button_device);
253
254 platform_device_register(&lsmini_leds);
255
256 i2c_register_board_info(0, &lsmini_i2c_rtc, 1);
257
258 /* enable USB power */
259 gpio_set_value(LSMINI_GPIO_USB_POWER, 1);
260
261 /* register power-off method */
262 pm_power_off = lsmini_power_off;
263
264 pr_info("%s: finished\n", __func__);
265}
266
267#ifdef CONFIG_MACH_LINKSTATION_MINI
268MACHINE_START(LINKSTATION_MINI, "Buffalo Linkstation Mini")
269 /* Maintainer: Alexey Kopytko <alexey@kopytko.ru> */
270 .phys_io = ORION5X_REGS_PHYS_BASE,
271 .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC,
272 .boot_params = 0x00000100,
273 .init_machine = lsmini_init,
274 .map_io = orion5x_map_io,
275 .init_irq = orion5x_init_irq,
276 .timer = &orion5x_timer,
277 .fixup = tag_fixup_mem32,
278MACHINE_END
279#endif
diff --git a/arch/arm/mach-orion5x/mpp.c b/arch/arm/mach-orion5x/mpp.c
index c04ab0e16ea1..640ea2a3fc6c 100644
--- a/arch/arm/mach-orion5x/mpp.c
+++ b/arch/arm/mach-orion5x/mpp.c
@@ -11,8 +11,8 @@
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/mbus.h> 13#include <linux/mbus.h>
14#include <linux/io.h>
14#include <mach/hardware.h> 15#include <mach/hardware.h>
15#include <asm/io.h>
16#include "common.h" 16#include "common.h"
17#include "mpp.h" 17#include "mpp.h"
18 18
diff --git a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
new file mode 100644
index 000000000000..40e049539091
--- /dev/null
+++ b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
@@ -0,0 +1,117 @@
1/*
2 * arch/arm/mach-orion5x/rd88f6183-ap-ge-setup.c
3 *
4 * Marvell Orion-1-90 AP GE Reference Design Setup
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/pci.h>
15#include <linux/irq.h>
16#include <linux/mtd/physmap.h>
17#include <linux/mv643xx_eth.h>
18#include <linux/spi/spi.h>
19#include <linux/spi/orion_spi.h>
20#include <linux/spi/flash.h>
21#include <linux/ethtool.h>
22#include <asm/mach-types.h>
23#include <asm/gpio.h>
24#include <asm/leds.h>
25#include <asm/mach/arch.h>
26#include <asm/mach/pci.h>
27#include <mach/orion5x.h>
28#include "common.h"
29#include "mpp.h"
30
31static struct mv643xx_eth_platform_data rd88f6183ap_ge_eth_data = {
32 .phy_addr = -1,
33 .speed = SPEED_1000,
34 .duplex = DUPLEX_FULL,
35};
36
37static struct mtd_partition rd88f6183ap_ge_partitions[] = {
38 {
39 .name = "kernel",
40 .offset = 0x00000000,
41 .size = 0x00200000,
42 }, {
43 .name = "rootfs",
44 .offset = 0x00200000,
45 .size = 0x00500000,
46 }, {
47 .name = "nvram",
48 .offset = 0x00700000,
49 .size = 0x00080000,
50 },
51};
52
53static struct flash_platform_data rd88f6183ap_ge_spi_slave_data = {
54 .type = "m25p64",
55 .nr_parts = ARRAY_SIZE(rd88f6183ap_ge_partitions),
56 .parts = rd88f6183ap_ge_partitions,
57};
58
59static struct spi_board_info __initdata rd88f6183ap_ge_spi_slave_info[] = {
60 {
61 .modalias = "m25p80",
62 .platform_data = &rd88f6183ap_ge_spi_slave_data,
63 .irq = NO_IRQ,
64 .max_speed_hz = 20000000,
65 .bus_num = 0,
66 .chip_select = 0,
67 },
68};
69
70static void __init rd88f6183ap_ge_init(void)
71{
72 /*
73 * Setup basic Orion functions. Need to be called early.
74 */
75 orion5x_init();
76
77 /*
78 * Configure peripherals.
79 */
80 orion5x_ehci0_init();
81 orion5x_eth_init(&rd88f6183ap_ge_eth_data);
82 spi_register_board_info(rd88f6183ap_ge_spi_slave_info,
83 ARRAY_SIZE(rd88f6183ap_ge_spi_slave_info));
84 orion5x_spi_init();
85 orion5x_uart0_init();
86}
87
88static struct hw_pci rd88f6183ap_ge_pci __initdata = {
89 .nr_controllers = 2,
90 .swizzle = pci_std_swizzle,
91 .setup = orion5x_pci_sys_setup,
92 .scan = orion5x_pci_sys_scan_bus,
93 .map_irq = orion5x_pci_map_irq,
94};
95
96static int __init rd88f6183ap_ge_pci_init(void)
97{
98 if (machine_is_rd88f6183ap_ge()) {
99 orion5x_pci_disable();
100 pci_common_init(&rd88f6183ap_ge_pci);
101 }
102
103 return 0;
104}
105subsys_initcall(rd88f6183ap_ge_pci_init);
106
107MACHINE_START(RD88F6183AP_GE, "Marvell Orion-1-90 AP GE Reference Design")
108 /* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */
109 .phys_io = ORION5X_REGS_PHYS_BASE,
110 .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC,
111 .boot_params = 0x00000100,
112 .init_machine = rd88f6183ap_ge_init,
113 .map_io = orion5x_map_io,
114 .init_irq = orion5x_init_irq,
115 .timer = &orion5x_timer,
116 .fixup = tag_fixup_mem32,
117MACHINE_END
diff --git a/arch/arm/mach-orion5x/terastation_pro2-setup.c b/arch/arm/mach-orion5x/terastation_pro2-setup.c
new file mode 100644
index 000000000000..0b101d7d41c2
--- /dev/null
+++ b/arch/arm/mach-orion5x/terastation_pro2-setup.c
@@ -0,0 +1,369 @@
1/*
2 * Buffalo Terastation Pro II/Live Board Setup
3 *
4 * Maintainer: Sylver Bruneau <sylver.bruneau@googlemail.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/platform_device.h>
15#include <linux/pci.h>
16#include <linux/irq.h>
17#include <linux/delay.h>
18#include <linux/mtd/physmap.h>
19#include <linux/mv643xx_eth.h>
20#include <linux/i2c.h>
21#include <linux/serial_reg.h>
22#include <asm/mach-types.h>
23#include <asm/gpio.h>
24#include <asm/mach/arch.h>
25#include <asm/mach/pci.h>
26#include <mach/orion5x.h>
27#include "common.h"
28#include "mpp.h"
29
30/*****************************************************************************
31 * Terastation Pro 2/Live Info
32 ****************************************************************************/
33
34/*
35 * Terastation Pro 2 hardware :
36 * - Marvell 88F5281-D0
37 * - Marvell 88SX6042 SATA controller (PCI)
38 * - Marvell 88E1118 Gigabit Ethernet PHY
39 * - 256KB NOR flash
40 * - 128MB of DDR RAM
41 * - PCIe port (not equipped)
42 */
43
44/*
45 * 256K NOR flash Device bus boot chip select
46 */
47
48#define TSP2_NOR_BOOT_BASE 0xf4000000
49#define TSP2_NOR_BOOT_SIZE SZ_256K
50
51/*****************************************************************************
52 * 256KB NOR Flash on BOOT Device
53 ****************************************************************************/
54
55static struct physmap_flash_data tsp2_nor_flash_data = {
56 .width = 1,
57};
58
59static struct resource tsp2_nor_flash_resource = {
60 .flags = IORESOURCE_MEM,
61 .start = TSP2_NOR_BOOT_BASE,
62 .end = TSP2_NOR_BOOT_BASE + TSP2_NOR_BOOT_SIZE - 1,
63};
64
65static struct platform_device tsp2_nor_flash = {
66 .name = "physmap-flash",
67 .id = 0,
68 .dev = {
69 .platform_data = &tsp2_nor_flash_data,
70 },
71 .num_resources = 1,
72 .resource = &tsp2_nor_flash_resource,
73};
74
75/*****************************************************************************
76 * PCI
77 ****************************************************************************/
78#define TSP2_PCI_SLOT0_OFFS 7
79#define TSP2_PCI_SLOT0_IRQ_PIN 11
80
81void __init tsp2_pci_preinit(void)
82{
83 int pin;
84
85 /*
86 * Configure PCI GPIO IRQ pins
87 */
88 pin = TSP2_PCI_SLOT0_IRQ_PIN;
89 if (gpio_request(pin, "PCI Int1") == 0) {
90 if (gpio_direction_input(pin) == 0) {
91 set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
92 } else {
93 printk(KERN_ERR "tsp2_pci_preinit failed "
94 "to set_irq_type pin %d\n", pin);
95 gpio_free(pin);
96 }
97 } else {
98 printk(KERN_ERR "tsp2_pci_preinit failed to "
99 "gpio_request %d\n", pin);
100 }
101}
102
103static int __init tsp2_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
104{
105 int irq;
106
107 /*
108 * Check for devices with hard-wired IRQs.
109 */
110 irq = orion5x_pci_map_irq(dev, slot, pin);
111 if (irq != -1)
112 return irq;
113
114 /*
115 * PCI IRQs are connected via GPIOs.
116 */
117 if (slot == TSP2_PCI_SLOT0_OFFS)
118 return gpio_to_irq(TSP2_PCI_SLOT0_IRQ_PIN);
119
120 return -1;
121}
122
123static struct hw_pci tsp2_pci __initdata = {
124 .nr_controllers = 2,
125 .preinit = tsp2_pci_preinit,
126 .swizzle = pci_std_swizzle,
127 .setup = orion5x_pci_sys_setup,
128 .scan = orion5x_pci_sys_scan_bus,
129 .map_irq = tsp2_pci_map_irq,
130};
131
132static int __init tsp2_pci_init(void)
133{
134 if (machine_is_terastation_pro2())
135 pci_common_init(&tsp2_pci);
136
137 return 0;
138}
139
140subsys_initcall(tsp2_pci_init);
141
142/*****************************************************************************
143 * Ethernet
144 ****************************************************************************/
145
146static struct mv643xx_eth_platform_data tsp2_eth_data = {
147 .phy_addr = 0,
148};
149
150/*****************************************************************************
151 * RTC 5C372a on I2C bus
152 ****************************************************************************/
153
154#define TSP2_RTC_GPIO 9
155
156static struct i2c_board_info __initdata tsp2_i2c_rtc = {
157 I2C_BOARD_INFO("rs5c372a", 0x32),
158};
159
160/*****************************************************************************
161 * Terastation Pro II specific power off method via UART1-attached
162 * microcontroller
163 ****************************************************************************/
164
165#define UART1_REG(x) (UART1_VIRT_BASE + ((UART_##x) << 2))
166
167static int tsp2_miconread(unsigned char *buf, int count)
168{
169 int i;
170 int timeout;
171
172 for (i = 0; i < count; i++) {
173 timeout = 10;
174
175 while (!(readl(UART1_REG(LSR)) & UART_LSR_DR)) {
176 if (--timeout == 0)
177 break;
178 udelay(1000);
179 }
180
181 if (timeout == 0)
182 break;
183 buf[i] = readl(UART1_REG(RX));
184 }
185
186 /* return read bytes */
187 return i;
188}
189
190static int tsp2_miconwrite(const unsigned char *buf, int count)
191{
192 int i = 0;
193
194 while (count--) {
195 while (!(readl(UART1_REG(LSR)) & UART_LSR_THRE))
196 barrier();
197 writel(buf[i++], UART1_REG(TX));
198 }
199
200 return 0;
201}
202
203static int tsp2_miconsend(const unsigned char *data, int count)
204{
205 int i;
206 unsigned char checksum = 0;
207 unsigned char recv_buf[40];
208 unsigned char send_buf[40];
209 unsigned char correct_ack[3];
210 int retry = 2;
211
212 /* Generate checksum */
213 for (i = 0; i < count; i++)
214 checksum -= data[i];
215
216 do {
217 /* Send data */
218 tsp2_miconwrite(data, count);
219
220 /* send checksum */
221 tsp2_miconwrite(&checksum, 1);
222
223 if (tsp2_miconread(recv_buf, sizeof(recv_buf)) <= 3) {
224 printk(KERN_ERR ">%s: receive failed.\n", __func__);
225
226 /* send preamble to clear the receive buffer */
227 memset(&send_buf, 0xff, sizeof(send_buf));
228 tsp2_miconwrite(send_buf, sizeof(send_buf));
229
230 /* make dummy reads */
231 mdelay(100);
232 tsp2_miconread(recv_buf, sizeof(recv_buf));
233 } else {
234 /* Generate expected ack */
235 correct_ack[0] = 0x01;
236 correct_ack[1] = data[1];
237 correct_ack[2] = 0x00;
238
239 /* checksum Check */
240 if ((recv_buf[0] + recv_buf[1] + recv_buf[2] +
241 recv_buf[3]) & 0xFF) {
242 printk(KERN_ERR ">%s: Checksum Error : "
243 "Received data[%02x, %02x, %02x, %02x]"
244 "\n", __func__, recv_buf[0],
245 recv_buf[1], recv_buf[2], recv_buf[3]);
246 } else {
247 /* Check Received Data */
248 if (correct_ack[0] == recv_buf[0] &&
249 correct_ack[1] == recv_buf[1] &&
250 correct_ack[2] == recv_buf[2]) {
251 /* Interval for next command */
252 mdelay(10);
253
254 /* Receive ACK */
255 return 0;
256 }
257 }
258 /* Received NAK or illegal Data */
259 printk(KERN_ERR ">%s: Error : NAK or Illegal Data "
260 "Received\n", __func__);
261 }
262 } while (retry--);
263
264 /* Interval for next command */
265 mdelay(10);
266
267 return -1;
268}
269
270static void tsp2_power_off(void)
271{
272 const unsigned char watchdogkill[] = {0x01, 0x35, 0x00};
273 const unsigned char shutdownwait[] = {0x00, 0x0c};
274 const unsigned char poweroff[] = {0x00, 0x06};
275 /* 38400 baud divisor */
276 const unsigned divisor = ((orion5x_tclk + (8 * 38400)) / (16 * 38400));
277
278 pr_info("%s: triggering power-off...\n", __func__);
279
280 /* hijack uart1 and reset into sane state (38400,8n1,even parity) */
281 writel(0x83, UART1_REG(LCR));
282 writel(divisor & 0xff, UART1_REG(DLL));
283 writel((divisor >> 8) & 0xff, UART1_REG(DLM));
284 writel(0x1b, UART1_REG(LCR));
285 writel(0x00, UART1_REG(IER));
286 writel(0x07, UART1_REG(FCR));
287 writel(0x00, UART1_REG(MCR));
288
289 /* Send the commands to shutdown the Terastation Pro II */
290 tsp2_miconsend(watchdogkill, sizeof(watchdogkill)) ;
291 tsp2_miconsend(shutdownwait, sizeof(shutdownwait)) ;
292 tsp2_miconsend(poweroff, sizeof(poweroff));
293}
294
295/*****************************************************************************
296 * General Setup
297 ****************************************************************************/
298static struct orion5x_mpp_mode tsp2_mpp_modes[] __initdata = {
299 { 0, MPP_PCIE_RST_OUTn },
300 { 1, MPP_UNUSED },
301 { 2, MPP_UNUSED },
302 { 3, MPP_UNUSED },
303 { 4, MPP_NAND }, /* BOOT NAND Flash REn */
304 { 5, MPP_NAND }, /* BOOT NAND Flash WEn */
305 { 6, MPP_NAND }, /* BOOT NAND Flash HREn[0] */
306 { 7, MPP_NAND }, /* BOOT NAND Flash WEn[0] */
307 { 8, MPP_GPIO }, /* MICON int */
308 { 9, MPP_GPIO }, /* RTC int */
309 { 10, MPP_UNUSED },
310 { 11, MPP_GPIO }, /* PCI Int A */
311 { 12, MPP_UNUSED },
312 { 13, MPP_GPIO }, /* UPS on UART0 enable */
313 { 14, MPP_GPIO }, /* UPS low battery detection */
314 { 15, MPP_UNUSED },
315 { 16, MPP_UART }, /* UART1 RXD */
316 { 17, MPP_UART }, /* UART1 TXD */
317 { 18, MPP_UART }, /* UART1 CTSn */
318 { 19, MPP_UART }, /* UART1 RTSn */
319 { -1 },
320};
321
322static void __init tsp2_init(void)
323{
324 /*
325 * Setup basic Orion functions. Need to be called early.
326 */
327 orion5x_init();
328
329 orion5x_mpp_conf(tsp2_mpp_modes);
330
331 /*
332 * Configure peripherals.
333 */
334 orion5x_setup_dev_boot_win(TSP2_NOR_BOOT_BASE,
335 TSP2_NOR_BOOT_SIZE);
336 platform_device_register(&tsp2_nor_flash);
337
338 orion5x_ehci0_init();
339 orion5x_eth_init(&tsp2_eth_data);
340 orion5x_i2c_init();
341 orion5x_uart0_init();
342 orion5x_uart1_init();
343
344 /* Get RTC IRQ and register the chip */
345 if (gpio_request(TSP2_RTC_GPIO, "rtc") == 0) {
346 if (gpio_direction_input(TSP2_RTC_GPIO) == 0)
347 tsp2_i2c_rtc.irq = gpio_to_irq(TSP2_RTC_GPIO);
348 else
349 gpio_free(TSP2_RTC_GPIO);
350 }
351 if (tsp2_i2c_rtc.irq == 0)
352 pr_warning("tsp2_init: failed to get RTC IRQ\n");
353 i2c_register_board_info(0, &tsp2_i2c_rtc, 1);
354
355 /* register Terastation Pro II specific power-off method */
356 pm_power_off = tsp2_power_off;
357}
358
359MACHINE_START(TERASTATION_PRO2, "Buffalo Terastation Pro II/Live")
360 /* Maintainer: Sylver Bruneau <sylver.bruneau@googlemail.com> */
361 .phys_io = ORION5X_REGS_PHYS_BASE,
362 .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC,
363 .boot_params = 0x00000100,
364 .init_machine = tsp2_init,
365 .map_io = orion5x_map_io,
366 .init_irq = orion5x_init_irq,
367 .timer = &orion5x_timer,
368 .fixup = tag_fixup_mem32,
369MACHINE_END
diff --git a/arch/arm/mach-orion5x/tsx09-common.c b/arch/arm/mach-orion5x/tsx09-common.c
index 19cde24fbfdf..c9abb8fbfa70 100644
--- a/arch/arm/mach-orion5x/tsx09-common.c
+++ b/arch/arm/mach-orion5x/tsx09-common.c
@@ -16,6 +16,7 @@
16#include <linux/timex.h> 16#include <linux/timex.h>
17#include <linux/serial_reg.h> 17#include <linux/serial_reg.h>
18#include "tsx09-common.h" 18#include "tsx09-common.h"
19#include "common.h"
19 20
20/***************************************************************************** 21/*****************************************************************************
21 * QNAP TS-x09 specific power off method via UART1-attached PIC 22 * QNAP TS-x09 specific power off method via UART1-attached PIC
@@ -26,7 +27,7 @@
26void qnap_tsx09_power_off(void) 27void qnap_tsx09_power_off(void)
27{ 28{
28 /* 19200 baud divisor */ 29 /* 19200 baud divisor */
29 const unsigned divisor = ((ORION5X_TCLK + (8 * 19200)) / (16 * 19200)); 30 const unsigned divisor = ((orion5x_tclk + (8 * 19200)) / (16 * 19200));
30 31
31 pr_info("%s: triggering power-off...\n", __func__); 32 pr_info("%s: triggering power-off...\n", __func__);
32 33
diff --git a/arch/arm/mach-pnx4008/clock.c b/arch/arm/mach-pnx4008/clock.c
index 24d036a24a72..898c0e88acbc 100644
--- a/arch/arm/mach-pnx4008/clock.c
+++ b/arch/arm/mach-pnx4008/clock.c
@@ -20,9 +20,9 @@
20#include <linux/device.h> 20#include <linux/device.h>
21#include <linux/err.h> 21#include <linux/err.h>
22#include <linux/delay.h> 22#include <linux/delay.h>
23#include <linux/io.h>
23 24
24#include <mach/hardware.h> 25#include <mach/hardware.h>
25#include <asm/io.h>
26 26
27#include <mach/clock.h> 27#include <mach/clock.h>
28#include "clock.h" 28#include "clock.h"
diff --git a/arch/arm/mach-pnx4008/core.c b/arch/arm/mach-pnx4008/core.c
index 3ba46ede9bbd..45734bb880a8 100644
--- a/arch/arm/mach-pnx4008/core.c
+++ b/arch/arm/mach-pnx4008/core.c
@@ -25,9 +25,9 @@
25#include <linux/serial_8250.h> 25#include <linux/serial_8250.h>
26#include <linux/device.h> 26#include <linux/device.h>
27#include <linux/spi/spi.h> 27#include <linux/spi/spi.h>
28#include <linux/io.h>
28 29
29#include <mach/hardware.h> 30#include <mach/hardware.h>
30#include <asm/io.h>
31#include <asm/setup.h> 31#include <asm/setup.h>
32#include <asm/mach-types.h> 32#include <asm/mach-types.h>
33#include <asm/pgtable.h> 33#include <asm/pgtable.h>
diff --git a/arch/arm/mach-pnx4008/dma.c b/arch/arm/mach-pnx4008/dma.c
index 833c56be7344..ac2f70eddb9e 100644
--- a/arch/arm/mach-pnx4008/dma.c
+++ b/arch/arm/mach-pnx4008/dma.c
@@ -21,12 +21,12 @@
21#include <linux/err.h> 21#include <linux/err.h>
22#include <linux/dma-mapping.h> 22#include <linux/dma-mapping.h>
23#include <linux/clk.h> 23#include <linux/clk.h>
24#include <linux/io.h>
24 25
25#include <asm/system.h> 26#include <asm/system.h>
26#include <mach/hardware.h> 27#include <mach/hardware.h>
27#include <asm/dma.h> 28#include <asm/dma.h>
28#include <asm/dma-mapping.h> 29#include <asm/dma-mapping.h>
29#include <asm/io.h>
30#include <asm/mach/dma.h> 30#include <asm/mach/dma.h>
31#include <mach/clock.h> 31#include <mach/clock.h>
32 32
diff --git a/arch/arm/mach-pnx4008/gpio.c b/arch/arm/mach-pnx4008/gpio.c
index fb51f7279e95..015cc21d5f55 100644
--- a/arch/arm/mach-pnx4008/gpio.c
+++ b/arch/arm/mach-pnx4008/gpio.c
@@ -17,7 +17,7 @@
17#include <linux/types.h> 17#include <linux/types.h>
18#include <linux/kernel.h> 18#include <linux/kernel.h>
19#include <linux/module.h> 19#include <linux/module.h>
20#include <asm/io.h> 20#include <linux/io.h>
21#include <mach/platform.h> 21#include <mach/platform.h>
22#include <mach/gpio.h> 22#include <mach/gpio.h>
23 23
diff --git a/arch/arm/mach-pnx4008/include/mach/system.h b/arch/arm/mach-pnx4008/include/mach/system.h
index 8985a4622b8c..e12e7abfcbcf 100644
--- a/arch/arm/mach-pnx4008/include/mach/system.h
+++ b/arch/arm/mach-pnx4008/include/mach/system.h
@@ -21,8 +21,8 @@
21#ifndef __ASM_ARCH_SYSTEM_H 21#ifndef __ASM_ARCH_SYSTEM_H
22#define __ASM_ARCH_SYSTEM_H 22#define __ASM_ARCH_SYSTEM_H
23 23
24#include <linux/io.h>
24#include <mach/hardware.h> 25#include <mach/hardware.h>
25#include <asm/io.h>
26#include <mach/platform.h> 26#include <mach/platform.h>
27 27
28static void arch_idle(void) 28static void arch_idle(void)
diff --git a/arch/arm/mach-pnx4008/include/mach/timex.h b/arch/arm/mach-pnx4008/include/mach/timex.h
index 956fbd8e977c..5ff0196c0f16 100644
--- a/arch/arm/mach-pnx4008/include/mach/timex.h
+++ b/arch/arm/mach-pnx4008/include/mach/timex.h
@@ -14,8 +14,8 @@
14#ifndef __PNX4008_TIMEX_H 14#ifndef __PNX4008_TIMEX_H
15#define __PNX4008_TIMEX_H 15#define __PNX4008_TIMEX_H
16 16
17#include <linux/io.h>
17#include <mach/hardware.h> 18#include <mach/hardware.h>
18#include <asm/io.h>
19 19
20#define CLOCK_TICK_RATE 1000000 20#define CLOCK_TICK_RATE 1000000
21 21
diff --git a/arch/arm/mach-pnx4008/irq.c b/arch/arm/mach-pnx4008/irq.c
index 5c4f55af5d4b..a9ce02b4bf17 100644
--- a/arch/arm/mach-pnx4008/irq.c
+++ b/arch/arm/mach-pnx4008/irq.c
@@ -23,8 +23,8 @@
23#include <linux/ioport.h> 23#include <linux/ioport.h>
24#include <linux/device.h> 24#include <linux/device.h>
25#include <linux/irq.h> 25#include <linux/irq.h>
26#include <linux/io.h>
26#include <mach/hardware.h> 27#include <mach/hardware.h>
27#include <asm/io.h>
28#include <asm/setup.h> 28#include <asm/setup.h>
29#include <asm/pgtable.h> 29#include <asm/pgtable.h>
30#include <asm/page.h> 30#include <asm/page.h>
diff --git a/arch/arm/mach-pnx4008/pm.c b/arch/arm/mach-pnx4008/pm.c
index f970906d8848..b3d8d53e32ef 100644
--- a/arch/arm/mach-pnx4008/pm.c
+++ b/arch/arm/mach-pnx4008/pm.c
@@ -18,8 +18,8 @@
18#include <linux/suspend.h> 18#include <linux/suspend.h>
19#include <linux/delay.h> 19#include <linux/delay.h>
20#include <linux/clk.h> 20#include <linux/clk.h>
21#include <linux/io.h>
21 22
22#include <asm/io.h>
23#include <asm/cacheflush.h> 23#include <asm/cacheflush.h>
24#include <mach/pm.h> 24#include <mach/pm.h>
25#include <mach/clock.h> 25#include <mach/clock.h>
diff --git a/arch/arm/mach-pnx4008/serial.c b/arch/arm/mach-pnx4008/serial.c
index 9be84bbb30e8..f40961e51914 100644
--- a/arch/arm/mach-pnx4008/serial.c
+++ b/arch/arm/mach-pnx4008/serial.c
@@ -12,8 +12,7 @@
12 12
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/types.h> 14#include <linux/types.h>
15 15#include <linux/io.h>
16#include <asm/io.h>
17 16
18#include <mach/platform.h> 17#include <mach/platform.h>
19#include <mach/hardware.h> 18#include <mach/hardware.h>
diff --git a/arch/arm/mach-pnx4008/time.c b/arch/arm/mach-pnx4008/time.c
index 180975244f96..fc0ba183fe12 100644
--- a/arch/arm/mach-pnx4008/time.c
+++ b/arch/arm/mach-pnx4008/time.c
@@ -22,10 +22,10 @@
22#include <linux/time.h> 22#include <linux/time.h>
23#include <linux/timex.h> 23#include <linux/timex.h>
24#include <linux/irq.h> 24#include <linux/irq.h>
25#include <linux/io.h>
25 26
26#include <asm/system.h> 27#include <asm/system.h>
27#include <mach/hardware.h> 28#include <mach/hardware.h>
28#include <asm/io.h>
29#include <asm/leds.h> 29#include <asm/leds.h>
30#include <asm/mach/time.h> 30#include <asm/mach/time.h>
31#include <asm/errno.h> 31#include <asm/errno.h>
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index e8ee7ec9ff6d..f27f6b3d6e6f 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -38,16 +38,23 @@ config ARCH_LUBBOCK
38 bool "Intel DBPXA250 Development Platform" 38 bool "Intel DBPXA250 Development Platform"
39 select PXA25x 39 select PXA25x
40 select SA1111 40 select SA1111
41 select PXA_HAVE_BOARD_IRQS
41 42
42config MACH_LOGICPD_PXA270 43config MACH_LOGICPD_PXA270
43 bool "LogicPD PXA270 Card Engine Development Platform" 44 bool "LogicPD PXA270 Card Engine Development Platform"
44 select PXA27x 45 select PXA27x
45 select HAVE_PWM 46 select HAVE_PWM
47 select PXA_HAVE_BOARD_IRQS
46 48
47config MACH_MAINSTONE 49config MACH_MAINSTONE
48 bool "Intel HCDDBBVA0 Development Platform" 50 bool "Intel HCDDBBVA0 Development Platform"
49 select PXA27x 51 select PXA27x
50 select HAVE_PWM 52 select HAVE_PWM
53 select PXA_HAVE_BOARD_IRQS
54
55config MACH_MP900C
56 bool "Nec Mobilepro 900/c"
57 select PXA25x
51 58
52config ARCH_PXA_IDP 59config ARCH_PXA_IDP
53 bool "Accelent Xscale IDP" 60 bool "Accelent Xscale IDP"
@@ -114,10 +121,21 @@ config MACH_TOSA
114 bool "Enable Sharp SL-6000x (Tosa) Support" 121 bool "Enable Sharp SL-6000x (Tosa) Support"
115 depends on PXA_SHARPSL 122 depends on PXA_SHARPSL
116 select PXA25x 123 select PXA25x
124 select PXA_HAVE_BOARD_IRQS
125
126config ARCH_VIPER
127 bool "Arcom/Eurotech VIPER SBC"
128 select PXA25x
129 select ISA
130 select I2C_GPIO
131 select HAVE_PWM
132 select PXA_HAVE_BOARD_IRQS
133 select PXA_HAVE_ISA_IRQS
117 134
118config ARCH_PXA_ESERIES 135config ARCH_PXA_ESERIES
119 bool "PXA based Toshiba e-series PDAs" 136 bool "PXA based Toshiba e-series PDAs"
120 select PXA25x 137 select PXA25x
138 select PXA_HAVE_BOARD_IRQS
121 139
122config MACH_E330 140config MACH_E330
123 bool "Toshiba e330" 141 bool "Toshiba e330"
@@ -170,13 +188,41 @@ config MACH_E800
170 Say Y here if you intend to run this kernel on a Toshiba 188 Say Y here if you intend to run this kernel on a Toshiba
171 e800 family PDA. 189 e800 family PDA.
172 190
191config TRIZEPS_PXA
192 bool "PXA based Keith und Koep Trizeps DIMM-Modules"
193
173config MACH_TRIZEPS4 194config MACH_TRIZEPS4
174 bool "Keith und Koep Trizeps4 DIMM-Module" 195 bool "Keith und Koep Trizeps4 DIMM-Module"
196 depends on TRIZEPS_PXA
197 select TRIZEPS_PCMCIA
175 select PXA27x 198 select PXA27x
176 199
177config MACH_TRIZEPS4_CONXS 200config MACH_TRIZEPS4WL
201 bool "Keith und Koep Trizeps4-WL DIMM-Module"
202 depends on TRIZEPS_PXA
203 select TRIZEPS_PCMCIA
204 select PXA27x
205 select PXA_SSP
206
207choice
208 prompt "Select base board for Trizeps module"
209 depends on TRIZEPS_PXA
210
211config MACH_TRIZEPS_CONXS
178 bool "ConXS Eval Board" 212 bool "ConXS Eval Board"
179 depends on MACH_TRIZEPS4 213
214config MACH_TRIZEPS_UCONXS
215 bool "uConXS Eval Board"
216
217config MACH_TRIZEPS_ANY
218 bool "another Board"
219
220endchoice
221
222config TRIZEPS_PCMCIA
223 bool
224 help
225 Enable PCMCIA support for Trizeps modules
180 226
181config MACH_EM_X270 227config MACH_EM_X270
182 bool "CompuLab EM-x270 platform" 228 bool "CompuLab EM-x270 platform"
@@ -189,6 +235,7 @@ config MACH_COLIBRI
189config MACH_ZYLONITE 235config MACH_ZYLONITE
190 bool "PXA3xx Development Platform (aka Zylonite)" 236 bool "PXA3xx Development Platform (aka Zylonite)"
191 select PXA3xx 237 select PXA3xx
238 select PXA_SSP
192 select HAVE_PWM 239 select HAVE_PWM
193 240
194config MACH_LITTLETON 241config MACH_LITTLETON
@@ -207,20 +254,42 @@ config MACH_SAAR
207 select PXA930 254 select PXA930
208 255
209config MACH_ARMCORE 256config MACH_ARMCORE
210 bool "CompuLab CM-X270 modules" 257 bool "CompuLab CM-X255/CM-X270 modules"
211 select PXA27x 258 select PXA27x
212 select IWMMXT 259 select IWMMXT
260 select ZONE_DMA if PCI
261 select PXA25x
262 select PXA_SSP
263
264config MACH_CM_X300
265 bool "CompuLab CM-X300 modules"
266 select PXA3xx
267 select CPU_PXA300
213 268
214config MACH_MAGICIAN 269config MACH_MAGICIAN
215 bool "Enable HTC Magician Support" 270 bool "Enable HTC Magician Support"
216 select PXA27x 271 select PXA27x
217 select IWMMXT 272 select IWMMXT
273 select PXA_HAVE_BOARD_IRQS
274
275config MACH_MIOA701
276 bool "Mitac Mio A701 Support"
277 select PXA27x
278 select IWMMXT
279 select LEDS_GPIO
280 select HAVE_PWM
281 select GPIO_SYSFS
282 help
283 Say Y here if you intend to run this kernel on a
284 MIO A701. Currently there is only basic support
285 for this PDA.
218 286
219config MACH_PCM027 287config MACH_PCM027
220 bool "Phytec phyCORE-PXA270 CPU module (PCM-027)" 288 bool "Phytec phyCORE-PXA270 CPU module (PCM-027)"
221 select PXA27x 289 select PXA27x
222 select IWMMXT 290 select IWMMXT
223 select PXA_SSP 291 select PXA_SSP
292 select PXA_HAVE_BOARD_IRQS
224 293
225config ARCH_PXA_PALM 294config ARCH_PXA_PALM
226 bool "PXA based Palm PDAs" 295 bool "PXA based Palm PDAs"
@@ -236,6 +305,16 @@ config MACH_PALMTX
236 Say Y here if you intend to run this kernel on a Palm T|X 305 Say Y here if you intend to run this kernel on a Palm T|X
237 handheld computer. 306 handheld computer.
238 307
308config MACH_PALMZ72
309 bool "Palm Zire 72"
310 default y
311 depends on ARCH_PXA_PALM
312 select PXA27x
313 select IWMMXT
314 help
315 Say Y here if you intend to run this kernel on Palm Zire 72
316 handheld computer.
317
239config MACH_PCM990_BASEBOARD 318config MACH_PCM990_BASEBOARD
240 bool "PHYTEC PCM-990 development board" 319 bool "PHYTEC PCM-990 development board"
241 select HAVE_PWM 320 select HAVE_PWM
@@ -256,6 +335,9 @@ config PCM990_DISPLAY_NONE
256 335
257endchoice 336endchoice
258 337
338config MACH_AM200EPD
339 depends on MACH_GUMSTIX_F
340 bool "Enable AM200EPD board support"
259 341
260config PXA_EZX 342config PXA_EZX
261 bool "Motorola EZX Platform" 343 bool "Motorola EZX Platform"
@@ -343,4 +425,10 @@ config TOSA_BT
343 This is a simple driver that is able to control 425 This is a simple driver that is able to control
344 the state of built in bluetooth chip on tosa. 426 the state of built in bluetooth chip on tosa.
345 427
428config PXA_HAVE_BOARD_IRQS
429 bool
430
431config PXA_HAVE_ISA_IRQS
432 bool
433
346endif 434endif
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index 99ecbe7f8506..d31c9979cfa3 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -6,7 +6,12 @@
6obj-y += clock.o devices.o generic.o irq.o dma.o \ 6obj-y += clock.o devices.o generic.o irq.o dma.o \
7 time.o gpio.o reset.o 7 time.o gpio.o reset.o
8obj-$(CONFIG_PM) += pm.o sleep.o standby.o 8obj-$(CONFIG_PM) += pm.o sleep.o standby.o
9obj-$(CONFIG_CPU_FREQ) += cpu-pxa.o 9
10ifeq ($(CONFIG_CPU_FREQ),y)
11obj-$(CONFIG_PXA25x) += cpufreq-pxa2xx.o
12obj-$(CONFIG_PXA27x) += cpufreq-pxa2xx.o
13obj-$(CONFIG_PXA3xx) += cpufreq-pxa3xx.o
14endif
10 15
11# Generic drivers that other drivers may depend upon 16# Generic drivers that other drivers may depend upon
12obj-$(CONFIG_PXA_SSP) += ssp.o 17obj-$(CONFIG_PXA_SSP) += ssp.o
@@ -22,27 +27,33 @@ obj-$(CONFIG_CPU_PXA930) += pxa930.o
22 27
23# Specific board support 28# Specific board support
24obj-$(CONFIG_ARCH_GUMSTIX) += gumstix.o 29obj-$(CONFIG_ARCH_GUMSTIX) += gumstix.o
30obj-$(CONFIG_MACH_AM200EPD) += am200epd.o
25obj-$(CONFIG_ARCH_LUBBOCK) += lubbock.o 31obj-$(CONFIG_ARCH_LUBBOCK) += lubbock.o
26obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o 32obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o
27obj-$(CONFIG_MACH_MAINSTONE) += mainstone.o 33obj-$(CONFIG_MACH_MAINSTONE) += mainstone.o
34obj-$(CONFIG_MACH_MP900C) += mp900.o
28obj-$(CONFIG_ARCH_PXA_IDP) += idp.o 35obj-$(CONFIG_ARCH_PXA_IDP) += idp.o
29obj-$(CONFIG_MACH_TRIZEPS4) += trizeps4.o 36obj-$(CONFIG_MACH_TRIZEPS4) += trizeps4.o
30obj-$(CONFIG_MACH_COLIBRI) += colibri.o 37obj-$(CONFIG_MACH_COLIBRI) += colibri.o
31obj-$(CONFIG_PXA_SHARP_C7xx) += corgi.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o corgi_pm.o 38obj-$(CONFIG_PXA_SHARP_C7xx) += corgi.o sharpsl_pm.o corgi_pm.o
32obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o spitz_pm.o 39obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o sharpsl_pm.o spitz_pm.o
33obj-$(CONFIG_MACH_AKITA) += akita-ioexp.o 40obj-$(CONFIG_MACH_POODLE) += poodle.o
34obj-$(CONFIG_MACH_POODLE) += poodle.o corgi_ssp.o
35obj-$(CONFIG_MACH_PCM027) += pcm027.o 41obj-$(CONFIG_MACH_PCM027) += pcm027.o
36obj-$(CONFIG_MACH_PCM990_BASEBOARD) += pcm990-baseboard.o 42obj-$(CONFIG_MACH_PCM990_BASEBOARD) += pcm990-baseboard.o
37obj-$(CONFIG_MACH_TOSA) += tosa.o 43obj-$(CONFIG_MACH_TOSA) += tosa.o
38obj-$(CONFIG_MACH_EM_X270) += em-x270.o 44obj-$(CONFIG_MACH_EM_X270) += em-x270.o
39obj-$(CONFIG_MACH_MAGICIAN) += magician.o 45obj-$(CONFIG_MACH_MAGICIAN) += magician.o
40obj-$(CONFIG_ARCH_PXA_ESERIES) += eseries.o eseries_udc.o 46obj-$(CONFIG_MACH_MIOA701) += mioa701.o mioa701_bootresume.o
41obj-$(CONFIG_MACH_E740) += e740_lcd.o 47obj-$(CONFIG_ARCH_PXA_ESERIES) += eseries.o
42obj-$(CONFIG_MACH_E750) += e750_lcd.o 48obj-$(CONFIG_MACH_E330) += e330.o
43obj-$(CONFIG_MACH_E400) += e400_lcd.o 49obj-$(CONFIG_MACH_E350) += e350.o
44obj-$(CONFIG_MACH_E800) += e800_lcd.o 50obj-$(CONFIG_MACH_E740) += e740.o
51obj-$(CONFIG_MACH_E750) += e750.o
52obj-$(CONFIG_MACH_E400) += e400.o
53obj-$(CONFIG_MACH_E800) += e800.o
45obj-$(CONFIG_MACH_PALMTX) += palmtx.o 54obj-$(CONFIG_MACH_PALMTX) += palmtx.o
55obj-$(CONFIG_MACH_PALMZ72) += palmz72.o
56obj-$(CONFIG_ARCH_VIPER) += viper.o
46 57
47ifeq ($(CONFIG_MACH_ZYLONITE),y) 58ifeq ($(CONFIG_MACH_ZYLONITE),y)
48 obj-y += zylonite.o 59 obj-y += zylonite.o
@@ -53,7 +64,8 @@ obj-$(CONFIG_MACH_LITTLETON) += littleton.o
53obj-$(CONFIG_MACH_TAVOREVB) += tavorevb.o 64obj-$(CONFIG_MACH_TAVOREVB) += tavorevb.o
54obj-$(CONFIG_MACH_SAAR) += saar.o 65obj-$(CONFIG_MACH_SAAR) += saar.o
55 66
56obj-$(CONFIG_MACH_ARMCORE) += cm-x270.o 67obj-$(CONFIG_MACH_ARMCORE) += cm-x2xx.o cm-x255.o cm-x270.o
68obj-$(CONFIG_MACH_CM_X300) += cm-x300.o
57obj-$(CONFIG_PXA_EZX) += ezx.o 69obj-$(CONFIG_PXA_EZX) += ezx.o
58 70
59# Support for blinky lights 71# Support for blinky lights
@@ -61,12 +73,11 @@ led-y := leds.o
61led-$(CONFIG_ARCH_LUBBOCK) += leds-lubbock.o 73led-$(CONFIG_ARCH_LUBBOCK) += leds-lubbock.o
62led-$(CONFIG_MACH_MAINSTONE) += leds-mainstone.o 74led-$(CONFIG_MACH_MAINSTONE) += leds-mainstone.o
63led-$(CONFIG_ARCH_PXA_IDP) += leds-idp.o 75led-$(CONFIG_ARCH_PXA_IDP) += leds-idp.o
64led-$(CONFIG_MACH_TRIZEPS4) += leds-trizeps4.o
65 76
66obj-$(CONFIG_LEDS) += $(led-y) 77obj-$(CONFIG_LEDS) += $(led-y)
67 78
68ifeq ($(CONFIG_PCI),y) 79ifeq ($(CONFIG_PCI),y)
69obj-$(CONFIG_MACH_ARMCORE) += cm-x270-pci.o 80obj-$(CONFIG_MACH_ARMCORE) += cm-x2xx-pci.o
70endif 81endif
71 82
72obj-$(CONFIG_TOSA_BT) += tosa-bt.o 83obj-$(CONFIG_TOSA_BT) += tosa-bt.o
diff --git a/arch/arm/mach-pxa/akita-ioexp.c b/arch/arm/mach-pxa/akita-ioexp.c
deleted file mode 100644
index 5c67b188a3ba..000000000000
--- a/arch/arm/mach-pxa/akita-ioexp.c
+++ /dev/null
@@ -1,222 +0,0 @@
1/*
2 * Support for the Extra GPIOs on the Sharp SL-C1000 (Akita)
3 * (uses a Maxim MAX7310 8 Port IO Expander)
4 *
5 * Copyright 2005 Openedhand Ltd.
6 *
7 * Author: Richard Purdie <richard@openedhand.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 */
14
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/platform_device.h>
18#include <linux/module.h>
19#include <linux/i2c.h>
20#include <linux/slab.h>
21#include <linux/workqueue.h>
22#include <mach/akita.h>
23
24/* MAX7310 Regiser Map */
25#define MAX7310_INPUT 0x00
26#define MAX7310_OUTPUT 0x01
27#define MAX7310_POLINV 0x02
28#define MAX7310_IODIR 0x03 /* 1 = Input, 0 = Output */
29#define MAX7310_TIMEOUT 0x04
30
31/* Addresses to scan */
32static const unsigned short normal_i2c[] = { 0x18, I2C_CLIENT_END };
33
34/* I2C Magic */
35I2C_CLIENT_INSMOD;
36
37static int max7310_write(struct i2c_client *client, int address, int data);
38static struct i2c_client max7310_template;
39static void akita_ioexp_work(struct work_struct *private_);
40
41static struct device *akita_ioexp_device;
42static unsigned char ioexp_output_value = AKITA_IOEXP_IO_OUT;
43DECLARE_WORK(akita_ioexp, akita_ioexp_work);
44
45
46/*
47 * MAX7310 Access
48 */
49static int max7310_config(struct device *dev, int iomode, int polarity)
50{
51 int ret;
52 struct i2c_client *client = to_i2c_client(dev);
53
54 ret = max7310_write(client, MAX7310_POLINV, polarity);
55 if (ret < 0)
56 return ret;
57 ret = max7310_write(client, MAX7310_IODIR, iomode);
58 return ret;
59}
60
61static int max7310_set_ouputs(struct device *dev, int outputs)
62{
63 struct i2c_client *client = to_i2c_client(dev);
64
65 return max7310_write(client, MAX7310_OUTPUT, outputs);
66}
67
68/*
69 * I2C Functions
70 */
71static int max7310_write(struct i2c_client *client, int address, int value)
72{
73 u8 data[2];
74
75 data[0] = address & 0xff;
76 data[1] = value & 0xff;
77
78 if (i2c_master_send(client, data, 2) == 2)
79 return 0;
80 return -1;
81}
82
83static int max7310_detect(struct i2c_adapter *adapter, int address, int kind)
84{
85 struct i2c_client *new_client;
86 int err;
87
88 if (!(new_client = kmalloc(sizeof(struct i2c_client), GFP_KERNEL)))
89 return -ENOMEM;
90
91 max7310_template.adapter = adapter;
92 max7310_template.addr = address;
93
94 memcpy(new_client, &max7310_template, sizeof(struct i2c_client));
95
96 if ((err = i2c_attach_client(new_client))) {
97 kfree(new_client);
98 return err;
99 }
100
101 max7310_config(&new_client->dev, AKITA_IOEXP_IO_DIR, 0);
102 akita_ioexp_device = &new_client->dev;
103 schedule_work(&akita_ioexp);
104
105 return 0;
106}
107
108static int max7310_attach_adapter(struct i2c_adapter *adapter)
109{
110 return i2c_probe(adapter, &addr_data, max7310_detect);
111}
112
113static int max7310_detach_client(struct i2c_client *client)
114{
115 int err;
116
117 akita_ioexp_device = NULL;
118
119 if ((err = i2c_detach_client(client)))
120 return err;
121
122 kfree(client);
123 return 0;
124}
125
126static struct i2c_driver max7310_i2c_driver = {
127 .driver = {
128 .name = "akita-max7310",
129 },
130 .id = I2C_DRIVERID_AKITAIOEXP,
131 .attach_adapter = max7310_attach_adapter,
132 .detach_client = max7310_detach_client,
133};
134
135static struct i2c_client max7310_template = {
136 name: "akita-max7310",
137 driver: &max7310_i2c_driver,
138};
139
140void akita_set_ioexp(struct device *dev, unsigned char bit)
141{
142 ioexp_output_value |= bit;
143
144 if (akita_ioexp_device)
145 schedule_work(&akita_ioexp);
146 return;
147}
148
149void akita_reset_ioexp(struct device *dev, unsigned char bit)
150{
151 ioexp_output_value &= ~bit;
152
153 if (akita_ioexp_device)
154 schedule_work(&akita_ioexp);
155 return;
156}
157
158EXPORT_SYMBOL(akita_set_ioexp);
159EXPORT_SYMBOL(akita_reset_ioexp);
160
161static void akita_ioexp_work(struct work_struct *private_)
162{
163 if (akita_ioexp_device)
164 max7310_set_ouputs(akita_ioexp_device, ioexp_output_value);
165}
166
167
168#ifdef CONFIG_PM
169static int akita_ioexp_suspend(struct platform_device *pdev, pm_message_t state)
170{
171 flush_scheduled_work();
172 return 0;
173}
174
175static int akita_ioexp_resume(struct platform_device *pdev)
176{
177 schedule_work(&akita_ioexp);
178 return 0;
179}
180#else
181#define akita_ioexp_suspend NULL
182#define akita_ioexp_resume NULL
183#endif
184
185static int __init akita_ioexp_probe(struct platform_device *pdev)
186{
187 return i2c_add_driver(&max7310_i2c_driver);
188}
189
190static int akita_ioexp_remove(struct platform_device *pdev)
191{
192 i2c_del_driver(&max7310_i2c_driver);
193 return 0;
194}
195
196static struct platform_driver akita_ioexp_driver = {
197 .probe = akita_ioexp_probe,
198 .remove = akita_ioexp_remove,
199 .suspend = akita_ioexp_suspend,
200 .resume = akita_ioexp_resume,
201 .driver = {
202 .name = "akita-ioexp",
203 },
204};
205
206static int __init akita_ioexp_init(void)
207{
208 return platform_driver_register(&akita_ioexp_driver);
209}
210
211static void __exit akita_ioexp_exit(void)
212{
213 platform_driver_unregister(&akita_ioexp_driver);
214}
215
216MODULE_AUTHOR("Richard Purdie <rpurdie@openedhand.com>");
217MODULE_DESCRIPTION("Akita IO-Expander driver");
218MODULE_LICENSE("GPL");
219
220fs_initcall(akita_ioexp_init);
221module_exit(akita_ioexp_exit);
222
diff --git a/arch/arm/mach-pxa/am200epd.c b/arch/arm/mach-pxa/am200epd.c
new file mode 100644
index 000000000000..b965085a37b9
--- /dev/null
+++ b/arch/arm/mach-pxa/am200epd.c
@@ -0,0 +1,374 @@
1/*
2 * am200epd.c -- Platform device for AM200 EPD kit
3 *
4 * Copyright (C) 2008, Jaya Kumar
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive for
8 * more details.
9 *
10 * Layout is based on skeletonfb.c by James Simmons and Geert Uytterhoeven.
11 *
12 * This work was made possible by help and equipment support from E-Ink
13 * Corporation. http://support.eink.com/community
14 *
15 * This driver is written to be used with the Metronome display controller.
16 * on the AM200 EPD prototype kit/development kit with an E-Ink 800x600
17 * Vizplex EPD on a Gumstix board using the Lyre interface board.
18 *
19 */
20
21#include <linux/module.h>
22#include <linux/kernel.h>
23#include <linux/errno.h>
24#include <linux/string.h>
25#include <linux/delay.h>
26#include <linux/interrupt.h>
27#include <linux/fb.h>
28#include <linux/init.h>
29#include <linux/platform_device.h>
30#include <linux/irq.h>
31#include <linux/gpio.h>
32
33#include <mach/pxafb.h>
34
35#include <video/metronomefb.h>
36
37static unsigned int panel_type = 6;
38static struct platform_device *am200_device;
39static struct metronome_board am200_board;
40
41static struct pxafb_mode_info am200_fb_mode_9inch7 = {
42 .pixclock = 40000,
43 .xres = 1200,
44 .yres = 842,
45 .bpp = 16,
46 .hsync_len = 2,
47 .left_margin = 2,
48 .right_margin = 2,
49 .vsync_len = 1,
50 .upper_margin = 2,
51 .lower_margin = 25,
52 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
53};
54
55static struct pxafb_mode_info am200_fb_mode_8inch = {
56 .pixclock = 40000,
57 .xres = 1088,
58 .yres = 791,
59 .bpp = 16,
60 .hsync_len = 28,
61 .left_margin = 8,
62 .right_margin = 30,
63 .vsync_len = 8,
64 .upper_margin = 10,
65 .lower_margin = 8,
66 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
67};
68
69static struct pxafb_mode_info am200_fb_mode_6inch = {
70 .pixclock = 40189,
71 .xres = 832,
72 .yres = 622,
73 .bpp = 16,
74 .hsync_len = 28,
75 .left_margin = 34,
76 .right_margin = 34,
77 .vsync_len = 25,
78 .upper_margin = 0,
79 .lower_margin = 2,
80 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
81};
82
83static struct pxafb_mach_info am200_fb_info = {
84 .modes = &am200_fb_mode_6inch,
85 .num_modes = 1,
86 .lcd_conn = LCD_TYPE_COLOR_TFT | LCD_PCLK_EDGE_FALL |
87 LCD_AC_BIAS_FREQ(24),
88};
89
90/* register offsets for gpio control */
91#define LED_GPIO_PIN 51
92#define STDBY_GPIO_PIN 48
93#define RST_GPIO_PIN 49
94#define RDY_GPIO_PIN 32
95#define ERR_GPIO_PIN 17
96#define PCBPWR_GPIO_PIN 16
97static int gpios[] = { LED_GPIO_PIN , STDBY_GPIO_PIN , RST_GPIO_PIN,
98 RDY_GPIO_PIN, ERR_GPIO_PIN, PCBPWR_GPIO_PIN };
99static char *gpio_names[] = { "LED" , "STDBY" , "RST", "RDY", "ERR", "PCBPWR" };
100
101static int am200_init_gpio_regs(struct metronomefb_par *par)
102{
103 int i;
104 int err;
105
106 for (i = 0; i < ARRAY_SIZE(gpios); i++) {
107 err = gpio_request(gpios[i], gpio_names[i]);
108 if (err) {
109 dev_err(&am200_device->dev, "failed requesting "
110 "gpio %s, err=%d\n", gpio_names[i], err);
111 goto err_req_gpio;
112 }
113 }
114
115 gpio_direction_output(LED_GPIO_PIN, 0);
116 gpio_direction_output(STDBY_GPIO_PIN, 0);
117 gpio_direction_output(RST_GPIO_PIN, 0);
118
119 gpio_direction_input(RDY_GPIO_PIN);
120 gpio_direction_input(ERR_GPIO_PIN);
121
122 gpio_direction_output(PCBPWR_GPIO_PIN, 0);
123
124 return 0;
125
126err_req_gpio:
127 while (i > 0)
128 gpio_free(gpios[i--]);
129
130 return err;
131}
132
133static void am200_cleanup(struct metronomefb_par *par)
134{
135 int i;
136
137 free_irq(IRQ_GPIO(RDY_GPIO_PIN), par);
138
139 for (i = 0; i < ARRAY_SIZE(gpios); i++)
140 gpio_free(gpios[i]);
141}
142
143static int am200_share_video_mem(struct fb_info *info)
144{
145 /* rough check if this is our desired fb and not something else */
146 if ((info->var.xres != am200_fb_info.modes->xres)
147 || (info->var.yres != am200_fb_info.modes->yres))
148 return 0;
149
150 /* we've now been notified that we have our new fb */
151 am200_board.metromem = info->screen_base;
152 am200_board.host_fbinfo = info;
153
154 /* try to refcount host drv since we are the consumer after this */
155 if (!try_module_get(info->fbops->owner))
156 return -ENODEV;
157
158 return 0;
159}
160
161static int am200_unshare_video_mem(struct fb_info *info)
162{
163 dev_dbg(&am200_device->dev, "ENTER %s\n", __func__);
164
165 if (info != am200_board.host_fbinfo)
166 return 0;
167
168 module_put(am200_board.host_fbinfo->fbops->owner);
169 return 0;
170}
171
172static int am200_fb_notifier_callback(struct notifier_block *self,
173 unsigned long event, void *data)
174{
175 struct fb_event *evdata = data;
176 struct fb_info *info = evdata->info;
177
178 dev_dbg(&am200_device->dev, "ENTER %s\n", __func__);
179
180 if (event == FB_EVENT_FB_REGISTERED)
181 return am200_share_video_mem(info);
182 else if (event == FB_EVENT_FB_UNREGISTERED)
183 return am200_unshare_video_mem(info);
184
185 return 0;
186}
187
188static struct notifier_block am200_fb_notif = {
189 .notifier_call = am200_fb_notifier_callback,
190};
191
192/* this gets called as part of our init. these steps must be done now so
193 * that we can use set_pxa_fb_info */
194static void __init am200_presetup_fb(void)
195{
196 int fw;
197 int fh;
198 int padding_size;
199 int totalsize;
200
201 switch (panel_type) {
202 case 6:
203 am200_fb_info.modes = &am200_fb_mode_6inch;
204 break;
205 case 8:
206 am200_fb_info.modes = &am200_fb_mode_8inch;
207 break;
208 case 97:
209 am200_fb_info.modes = &am200_fb_mode_9inch7;
210 break;
211 default:
212 dev_err(&am200_device->dev, "invalid panel_type selection,"
213 " setting to 6\n");
214 am200_fb_info.modes = &am200_fb_mode_6inch;
215 break;
216 }
217
218 /* the frame buffer is divided as follows:
219 command | CRC | padding
220 16kb waveform data | CRC | padding
221 image data | CRC
222 */
223
224 fw = am200_fb_info.modes->xres;
225 fh = am200_fb_info.modes->yres;
226
227 /* waveform must be 16k + 2 for checksum */
228 am200_board.wfm_size = roundup(16*1024 + 2, fw);
229
230 padding_size = PAGE_SIZE + (4 * fw);
231
232 /* total is 1 cmd , 1 wfm, padding and image */
233 totalsize = fw + am200_board.wfm_size + padding_size + (fw*fh);
234
235 /* save this off because we're manipulating fw after this and
236 * we'll need it when we're ready to setup the framebuffer */
237 am200_board.fw = fw;
238 am200_board.fh = fh;
239
240 /* the reason we do this adjustment is because we want to acquire
241 * more framebuffer memory without imposing custom awareness on the
242 * underlying pxafb driver */
243 am200_fb_info.modes->yres = DIV_ROUND_UP(totalsize, fw);
244
245 /* we divide since we told the LCD controller we're 16bpp */
246 am200_fb_info.modes->xres /= 2;
247
248 set_pxa_fb_info(&am200_fb_info);
249
250}
251
252/* this gets called by metronomefb as part of its init, in our case, we
253 * have already completed initial framebuffer init in presetup_fb so we
254 * can just setup the fb access pointers */
255static int am200_setup_fb(struct metronomefb_par *par)
256{
257 int fw;
258 int fh;
259
260 fw = am200_board.fw;
261 fh = am200_board.fh;
262
263 /* metromem was set up by the notifier in share_video_mem so now
264 * we can use its value to calculate the other entries */
265 par->metromem_cmd = (struct metromem_cmd *) am200_board.metromem;
266 par->metromem_wfm = am200_board.metromem + fw;
267 par->metromem_img = par->metromem_wfm + am200_board.wfm_size;
268 par->metromem_img_csum = (u16 *) (par->metromem_img + (fw * fh));
269 par->metromem_dma = am200_board.host_fbinfo->fix.smem_start;
270
271 return 0;
272}
273
274static int am200_get_panel_type(void)
275{
276 return panel_type;
277}
278
279static irqreturn_t am200_handle_irq(int irq, void *dev_id)
280{
281 struct metronomefb_par *par = dev_id;
282
283 wake_up_interruptible(&par->waitq);
284 return IRQ_HANDLED;
285}
286
287static int am200_setup_irq(struct fb_info *info)
288{
289 int ret;
290
291 ret = request_irq(IRQ_GPIO(RDY_GPIO_PIN), am200_handle_irq,
292 IRQF_DISABLED|IRQF_TRIGGER_FALLING,
293 "AM200", info->par);
294 if (ret)
295 dev_err(&am200_device->dev, "request_irq failed: %d\n", ret);
296
297 return ret;
298}
299
300static void am200_set_rst(struct metronomefb_par *par, int state)
301{
302 gpio_set_value(RST_GPIO_PIN, state);
303}
304
305static void am200_set_stdby(struct metronomefb_par *par, int state)
306{
307 gpio_set_value(STDBY_GPIO_PIN, state);
308}
309
310static int am200_wait_event(struct metronomefb_par *par)
311{
312 return wait_event_timeout(par->waitq, gpio_get_value(RDY_GPIO_PIN), HZ);
313}
314
315static int am200_wait_event_intr(struct metronomefb_par *par)
316{
317 return wait_event_interruptible_timeout(par->waitq,
318 gpio_get_value(RDY_GPIO_PIN), HZ);
319}
320
321static struct metronome_board am200_board = {
322 .owner = THIS_MODULE,
323 .setup_irq = am200_setup_irq,
324 .setup_io = am200_init_gpio_regs,
325 .setup_fb = am200_setup_fb,
326 .set_rst = am200_set_rst,
327 .set_stdby = am200_set_stdby,
328 .met_wait_event = am200_wait_event,
329 .met_wait_event_intr = am200_wait_event_intr,
330 .get_panel_type = am200_get_panel_type,
331 .cleanup = am200_cleanup,
332};
333
334static int __init am200_init(void)
335{
336 int ret;
337
338 /* before anything else, we request notification for any fb
339 * creation events */
340 fb_register_client(&am200_fb_notif);
341
342 /* request our platform independent driver */
343 request_module("metronomefb");
344
345 am200_device = platform_device_alloc("metronomefb", -1);
346 if (!am200_device)
347 return -ENOMEM;
348
349 /* the am200_board that will be seen by metronomefb is a copy */
350 platform_device_add_data(am200_device, &am200_board,
351 sizeof(am200_board));
352
353 /* this _add binds metronomefb to am200. metronomefb refcounts am200 */
354 ret = platform_device_add(am200_device);
355
356 if (ret) {
357 platform_device_put(am200_device);
358 fb_unregister_client(&am200_fb_notif);
359 return ret;
360 }
361
362 am200_presetup_fb();
363
364 return 0;
365}
366
367module_param(panel_type, uint, 0);
368MODULE_PARM_DESC(panel_type, "Select the panel type: 6, 8, 97");
369
370module_init(am200_init);
371
372MODULE_DESCRIPTION("board driver for am200 metronome epd kit");
373MODULE_AUTHOR("Jaya Kumar");
374MODULE_LICENSE("GPL");
diff --git a/arch/arm/mach-pxa/cm-x255.c b/arch/arm/mach-pxa/cm-x255.c
new file mode 100644
index 000000000000..83a4cdf08176
--- /dev/null
+++ b/arch/arm/mach-pxa/cm-x255.c
@@ -0,0 +1,258 @@
1/*
2 * linux/arch/arm/mach-pxa/cm-x255.c
3 *
4 * Copyright (C) 2007, 2008 CompuLab, Ltd.
5 * Mike Rapoport <mike@compulab.co.il>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/platform_device.h>
13#include <linux/irq.h>
14#include <linux/gpio.h>
15#include <linux/mtd/partitions.h>
16#include <linux/mtd/physmap.h>
17#include <linux/mtd/nand-gpio.h>
18
19#include <linux/spi/spi.h>
20
21#include <asm/mach/arch.h>
22#include <asm/mach-types.h>
23#include <asm/mach/map.h>
24
25#include <mach/pxa2xx-regs.h>
26#include <mach/mfp-pxa25x.h>
27#include <mach/pxa2xx_spi.h>
28#include <mach/bitfield.h>
29
30#include "generic.h"
31
32#define GPIO_NAND_CS (5)
33#define GPIO_NAND_ALE (4)
34#define GPIO_NAND_CLE (3)
35#define GPIO_NAND_RB (10)
36
37static unsigned long cmx255_pin_config[] = {
38 /* AC'97 */
39 GPIO28_AC97_BITCLK,
40 GPIO29_AC97_SDATA_IN_0,
41 GPIO30_AC97_SDATA_OUT,
42 GPIO31_AC97_SYNC,
43
44 /* BTUART */
45 GPIO42_BTUART_RXD,
46 GPIO43_BTUART_TXD,
47 GPIO44_BTUART_CTS,
48 GPIO45_BTUART_RTS,
49
50 /* STUART */
51 GPIO46_STUART_RXD,
52 GPIO47_STUART_TXD,
53
54 /* LCD */
55 GPIO58_LCD_LDD_0,
56 GPIO59_LCD_LDD_1,
57 GPIO60_LCD_LDD_2,
58 GPIO61_LCD_LDD_3,
59 GPIO62_LCD_LDD_4,
60 GPIO63_LCD_LDD_5,
61 GPIO64_LCD_LDD_6,
62 GPIO65_LCD_LDD_7,
63 GPIO66_LCD_LDD_8,
64 GPIO67_LCD_LDD_9,
65 GPIO68_LCD_LDD_10,
66 GPIO69_LCD_LDD_11,
67 GPIO70_LCD_LDD_12,
68 GPIO71_LCD_LDD_13,
69 GPIO72_LCD_LDD_14,
70 GPIO73_LCD_LDD_15,
71 GPIO74_LCD_FCLK,
72 GPIO75_LCD_LCLK,
73 GPIO76_LCD_PCLK,
74 GPIO77_LCD_BIAS,
75
76 /* SSP1 */
77 GPIO23_SSP1_SCLK,
78 GPIO24_SSP1_SFRM,
79 GPIO25_SSP1_TXD,
80 GPIO26_SSP1_RXD,
81
82 /* SSP2 */
83 GPIO81_SSP2_CLK_OUT,
84 GPIO82_SSP2_FRM_OUT,
85 GPIO83_SSP2_TXD,
86 GPIO84_SSP2_RXD,
87
88 /* PC Card */
89 GPIO48_nPOE,
90 GPIO49_nPWE,
91 GPIO50_nPIOR,
92 GPIO51_nPIOW,
93 GPIO52_nPCE_1,
94 GPIO53_nPCE_2,
95 GPIO54_nPSKTSEL,
96 GPIO55_nPREG,
97 GPIO56_nPWAIT,
98 GPIO57_nIOIS16,
99
100 /* SDRAM and local bus */
101 GPIO15_nCS_1,
102 GPIO78_nCS_2,
103 GPIO79_nCS_3,
104 GPIO80_nCS_4,
105 GPIO33_nCS_5,
106 GPIO18_RDY,
107
108 /* GPIO */
109 GPIO0_GPIO | WAKEUP_ON_EDGE_BOTH,
110 GPIO9_GPIO, /* PC card reset */
111
112 /* NAND controls */
113 GPIO5_GPIO | MFP_LPM_DRIVE_HIGH, /* NAND CE# */
114 GPIO4_GPIO | MFP_LPM_DRIVE_LOW, /* NAND ALE */
115 GPIO3_GPIO | MFP_LPM_DRIVE_LOW, /* NAND CLE */
116 GPIO10_GPIO, /* NAND Ready/Busy */
117
118 /* interrupts */
119 GPIO22_GPIO, /* DM9000 interrupt */
120};
121
122#if defined(CONFIG_SPI_PXA2XX)
123static struct pxa2xx_spi_master pxa_ssp_master_info = {
124 .num_chipselect = 1,
125};
126
127static struct spi_board_info spi_board_info[] __initdata = {
128 [0] = {
129 .modalias = "rtc-max6902",
130 .max_speed_hz = 1000000,
131 .bus_num = 1,
132 .chip_select = 0,
133 },
134};
135
136static void __init cmx255_init_rtc(void)
137{
138 pxa2xx_set_spi_info(1, &pxa_ssp_master_info);
139 spi_register_board_info(ARRAY_AND_SIZE(spi_board_info));
140}
141#else
142static inline void cmx255_init_rtc(void) {}
143#endif
144
145#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
146static struct mtd_partition cmx255_nor_partitions[] = {
147 {
148 .name = "ARMmon",
149 .size = 0x00030000,
150 .offset = 0,
151 .mask_flags = MTD_WRITEABLE /* force read-only */
152 } , {
153 .name = "ARMmon setup block",
154 .size = 0x00010000,
155 .offset = MTDPART_OFS_APPEND,
156 .mask_flags = MTD_WRITEABLE /* force read-only */
157 } , {
158 .name = "kernel",
159 .size = 0x00160000,
160 .offset = MTDPART_OFS_APPEND,
161 } , {
162 .name = "ramdisk",
163 .size = MTDPART_SIZ_FULL,
164 .offset = MTDPART_OFS_APPEND
165 }
166};
167
168static struct physmap_flash_data cmx255_nor_flash_data[] = {
169 {
170 .width = 2, /* bankwidth in bytes */
171 .parts = cmx255_nor_partitions,
172 .nr_parts = ARRAY_SIZE(cmx255_nor_partitions)
173 }
174};
175
176static struct resource cmx255_nor_resource = {
177 .start = PXA_CS0_PHYS,
178 .end = PXA_CS0_PHYS + SZ_8M - 1,
179 .flags = IORESOURCE_MEM,
180};
181
182static struct platform_device cmx255_nor = {
183 .name = "physmap-flash",
184 .id = -1,
185 .dev = {
186 .platform_data = cmx255_nor_flash_data,
187 },
188 .resource = &cmx255_nor_resource,
189 .num_resources = 1,
190};
191
192static void __init cmx255_init_nor(void)
193{
194 platform_device_register(&cmx255_nor);
195}
196#else
197static inline void cmx255_init_nor(void) {}
198#endif
199
200#if defined(CONFIG_MTD_NAND_GPIO) || defined(CONFIG_MTD_NAND_GPIO_MODULE)
201static struct resource cmx255_nand_resource[] = {
202 [0] = {
203 .start = PXA_CS1_PHYS,
204 .end = PXA_CS1_PHYS + 11,
205 .flags = IORESOURCE_MEM,
206 },
207 [1] = {
208 .start = PXA_CS5_PHYS,
209 .end = PXA_CS5_PHYS + 3,
210 .flags = IORESOURCE_MEM,
211 },
212};
213
214static struct mtd_partition cmx255_nand_parts[] = {
215 [0] = {
216 .name = "cmx255-nand",
217 .size = MTDPART_SIZ_FULL,
218 .offset = 0,
219 },
220};
221
222static struct gpio_nand_platdata cmx255_nand_platdata = {
223 .gpio_nce = GPIO_NAND_CS,
224 .gpio_cle = GPIO_NAND_CLE,
225 .gpio_ale = GPIO_NAND_ALE,
226 .gpio_rdy = GPIO_NAND_RB,
227 .gpio_nwp = -1,
228 .parts = cmx255_nand_parts,
229 .num_parts = ARRAY_SIZE(cmx255_nand_parts),
230 .chip_delay = 25,
231};
232
233static struct platform_device cmx255_nand = {
234 .name = "gpio-nand",
235 .num_resources = ARRAY_SIZE(cmx255_nand_resource),
236 .resource = cmx255_nand_resource,
237 .id = -1,
238 .dev = {
239 .platform_data = &cmx255_nand_platdata,
240 }
241};
242
243static void __init cmx255_init_nand(void)
244{
245 platform_device_register(&cmx255_nand);
246}
247#else
248static inline void cmx255_init_nand(void) {}
249#endif
250
251void __init cmx255_init(void)
252{
253 pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx255_pin_config));
254
255 cmx255_init_rtc();
256 cmx255_init_nor();
257 cmx255_init_nand();
258}
diff --git a/arch/arm/mach-pxa/cm-x270-pci.h b/arch/arm/mach-pxa/cm-x270-pci.h
deleted file mode 100644
index 48f532f4cb51..000000000000
--- a/arch/arm/mach-pxa/cm-x270-pci.h
+++ /dev/null
@@ -1,13 +0,0 @@
1extern void __cmx270_pci_init_irq(int irq_gpio);
2extern void __cmx270_pci_suspend(void);
3extern void __cmx270_pci_resume(void);
4
5#ifdef CONFIG_PCI
6#define cmx270_pci_init_irq(x) __cmx270_pci_init_irq(x)
7#define cmx270_pci_suspend(x) __cmx270_pci_suspend(x)
8#define cmx270_pci_resume(x) __cmx270_pci_resume(x)
9#else
10#define cmx270_pci_init_irq(x) do {} while (0)
11#define cmx270_pci_suspend(x) do {} while (0)
12#define cmx270_pci_resume(x) do {} while (0)
13#endif
diff --git a/arch/arm/mach-pxa/cm-x270.c b/arch/arm/mach-pxa/cm-x270.c
index af003a269534..a82dad1a8cc8 100644
--- a/arch/arm/mach-pxa/cm-x270.c
+++ b/arch/arm/mach-pxa/cm-x270.c
@@ -14,46 +14,22 @@
14#include <linux/irq.h> 14#include <linux/irq.h>
15#include <linux/gpio.h> 15#include <linux/gpio.h>
16 16
17#include <linux/dm9000.h>
18#include <linux/rtc-v3020.h> 17#include <linux/rtc-v3020.h>
19#include <video/mbxfb.h> 18#include <video/mbxfb.h>
20#include <linux/leds.h>
21 19
22#include <asm/mach/arch.h>
23#include <asm/mach-types.h>
24#include <asm/mach/map.h>
25
26#include <mach/pxa2xx-regs.h>
27#include <mach/mfp-pxa27x.h> 20#include <mach/mfp-pxa27x.h>
28#include <mach/pxa-regs.h>
29#include <mach/audio.h>
30#include <mach/pxafb.h>
31#include <mach/ohci.h> 21#include <mach/ohci.h>
32#include <mach/mmc.h> 22#include <mach/mmc.h>
33#include <mach/bitfield.h>
34
35#include <asm/hardware/it8152.h>
36 23
37#include "generic.h" 24#include "generic.h"
38#include "cm-x270-pci.h"
39
40/* virtual addresses for statically mapped regions */
41#define CMX270_VIRT_BASE (0xe8000000)
42#define CMX270_IT8152_VIRT (CMX270_VIRT_BASE)
43 25
26/* physical address if local-bus attached devices */
44#define RTC_PHYS_BASE (PXA_CS1_PHYS + (5 << 22)) 27#define RTC_PHYS_BASE (PXA_CS1_PHYS + (5 << 22))
45#define DM9000_PHYS_BASE (PXA_CS1_PHYS + (6 << 22))
46 28
47/* GPIO IRQ usage */ 29/* GPIO IRQ usage */
48#define GPIO10_ETHIRQ (10)
49#define GPIO22_IT8152_IRQ (22)
50#define GPIO83_MMC_IRQ (83) 30#define GPIO83_MMC_IRQ (83)
51#define GPIO95_GFXIRQ (95)
52 31
53#define CMX270_ETHIRQ IRQ_GPIO(GPIO10_ETHIRQ)
54#define CMX270_IT8152_IRQ IRQ_GPIO(GPIO22_IT8152_IRQ)
55#define CMX270_MMC_IRQ IRQ_GPIO(GPIO83_MMC_IRQ) 32#define CMX270_MMC_IRQ IRQ_GPIO(GPIO83_MMC_IRQ)
56#define CMX270_GFXIRQ IRQ_GPIO(GPIO95_GFXIRQ)
57 33
58/* MMC power enable */ 34/* MMC power enable */
59#define GPIO105_MMC_POWER (105) 35#define GPIO105_MMC_POWER (105)
@@ -157,62 +133,6 @@ static unsigned long cmx270_pin_config[] = {
157 GPIO83_GPIO, /* MMC card detect */ 133 GPIO83_GPIO, /* MMC card detect */
158}; 134};
159 135
160#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
161static struct resource cmx270_dm9000_resource[] = {
162 [0] = {
163 .start = DM9000_PHYS_BASE,
164 .end = DM9000_PHYS_BASE + 4,
165 .flags = IORESOURCE_MEM,
166 },
167 [1] = {
168 .start = DM9000_PHYS_BASE + 8,
169 .end = DM9000_PHYS_BASE + 8 + 500,
170 .flags = IORESOURCE_MEM,
171 },
172 [2] = {
173 .start = CMX270_ETHIRQ,
174 .end = CMX270_ETHIRQ,
175 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
176 }
177};
178
179static struct dm9000_plat_data cmx270_dm9000_platdata = {
180 .flags = DM9000_PLATF_32BITONLY,
181};
182
183static struct platform_device cmx270_dm9000_device = {
184 .name = "dm9000",
185 .id = 0,
186 .num_resources = ARRAY_SIZE(cmx270_dm9000_resource),
187 .resource = cmx270_dm9000_resource,
188 .dev = {
189 .platform_data = &cmx270_dm9000_platdata,
190 }
191};
192
193static void __init cmx270_init_dm9000(void)
194{
195 platform_device_register(&cmx270_dm9000_device);
196}
197#else
198static inline void cmx270_init_dm9000(void) {}
199#endif
200
201/* UCB1400 touchscreen controller */
202#if defined(CONFIG_TOUCHSCREEN_UCB1400) || defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
203static struct platform_device cmx270_ts_device = {
204 .name = "ucb1400_ts",
205 .id = -1,
206};
207
208static void __init cmx270_init_touchscreen(void)
209{
210 platform_device_register(&cmx270_ts_device);
211}
212#else
213static inline void cmx270_init_touchscreen(void) {}
214#endif
215
216/* V3020 RTC */ 136/* V3020 RTC */
217#if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE) 137#if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE)
218static struct resource cmx270_v3020_resource[] = { 138static struct resource cmx270_v3020_resource[] = {
@@ -242,45 +162,7 @@ static void __init cmx270_init_rtc(void)
242 platform_device_register(&cmx270_rtc_device); 162 platform_device_register(&cmx270_rtc_device);
243} 163}
244#else 164#else
245static inline void cmx270_init_rtc(void) {} 165static inline void cmx2xx_init_rtc(void) {}
246#endif
247
248/* CM-X270 LEDs */
249#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
250static struct gpio_led cmx270_leds[] = {
251 [0] = {
252 .name = "cm-x270:red",
253 .default_trigger = "nand-disk",
254 .gpio = 93,
255 .active_low = 1,
256 },
257 [1] = {
258 .name = "cm-x270:green",
259 .default_trigger = "heartbeat",
260 .gpio = 94,
261 .active_low = 1,
262 },
263};
264
265static struct gpio_led_platform_data cmx270_gpio_led_pdata = {
266 .num_leds = ARRAY_SIZE(cmx270_leds),
267 .leds = cmx270_leds,
268};
269
270static struct platform_device cmx270_led_device = {
271 .name = "leds-gpio",
272 .id = -1,
273 .dev = {
274 .platform_data = &cmx270_gpio_led_pdata,
275 },
276};
277
278static void __init cmx270_init_leds(void)
279{
280 platform_device_register(&cmx270_led_device);
281}
282#else
283static inline void cmx270_init_leds(void) {}
284#endif 166#endif
285 167
286/* 2700G graphics */ 168/* 2700G graphics */
@@ -373,238 +255,11 @@ static void __init cmx270_init_2700G(void)
373static inline void cmx270_init_2700G(void) {} 255static inline void cmx270_init_2700G(void) {}
374#endif 256#endif
375 257
376#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
377/*
378 Display definitions
379 keep these for backwards compatibility, although symbolic names (as
380 e.g. in lpd270.c) looks better
381*/
382#define MTYPE_STN320x240 0
383#define MTYPE_TFT640x480 1
384#define MTYPE_CRT640x480 2
385#define MTYPE_CRT800x600 3
386#define MTYPE_TFT320x240 6
387#define MTYPE_STN640x480 7
388
389static struct pxafb_mode_info generic_stn_320x240_mode = {
390 .pixclock = 76923,
391 .bpp = 8,
392 .xres = 320,
393 .yres = 240,
394 .hsync_len = 3,
395 .vsync_len = 2,
396 .left_margin = 3,
397 .upper_margin = 0,
398 .right_margin = 3,
399 .lower_margin = 0,
400 .sync = (FB_SYNC_HOR_HIGH_ACT |
401 FB_SYNC_VERT_HIGH_ACT),
402 .cmap_greyscale = 0,
403};
404
405static struct pxafb_mach_info generic_stn_320x240 = {
406 .modes = &generic_stn_320x240_mode,
407 .num_modes = 1,
408 .lccr0 = 0,
409 .lccr3 = (LCCR3_PixClkDiv(0x03) |
410 LCCR3_Acb(0xff) |
411 LCCR3_PCP),
412 .cmap_inverse = 0,
413 .cmap_static = 0,
414};
415
416static struct pxafb_mode_info generic_tft_640x480_mode = {
417 .pixclock = 38461,
418 .bpp = 8,
419 .xres = 640,
420 .yres = 480,
421 .hsync_len = 60,
422 .vsync_len = 2,
423 .left_margin = 70,
424 .upper_margin = 10,
425 .right_margin = 70,
426 .lower_margin = 5,
427 .sync = 0,
428 .cmap_greyscale = 0,
429};
430
431static struct pxafb_mach_info generic_tft_640x480 = {
432 .modes = &generic_tft_640x480_mode,
433 .num_modes = 1,
434 .lccr0 = (LCCR0_PAS),
435 .lccr3 = (LCCR3_PixClkDiv(0x01) |
436 LCCR3_Acb(0xff) |
437 LCCR3_PCP),
438 .cmap_inverse = 0,
439 .cmap_static = 0,
440};
441
442static struct pxafb_mode_info generic_crt_640x480_mode = {
443 .pixclock = 38461,
444 .bpp = 8,
445 .xres = 640,
446 .yres = 480,
447 .hsync_len = 63,
448 .vsync_len = 2,
449 .left_margin = 81,
450 .upper_margin = 33,
451 .right_margin = 16,
452 .lower_margin = 10,
453 .sync = (FB_SYNC_HOR_HIGH_ACT |
454 FB_SYNC_VERT_HIGH_ACT),
455 .cmap_greyscale = 0,
456};
457
458static struct pxafb_mach_info generic_crt_640x480 = {
459 .modes = &generic_crt_640x480_mode,
460 .num_modes = 1,
461 .lccr0 = (LCCR0_PAS),
462 .lccr3 = (LCCR3_PixClkDiv(0x01) |
463 LCCR3_Acb(0xff)),
464 .cmap_inverse = 0,
465 .cmap_static = 0,
466};
467
468static struct pxafb_mode_info generic_crt_800x600_mode = {
469 .pixclock = 28846,
470 .bpp = 8,
471 .xres = 800,
472 .yres = 600,
473 .hsync_len = 63,
474 .vsync_len = 2,
475 .left_margin = 26,
476 .upper_margin = 21,
477 .right_margin = 26,
478 .lower_margin = 11,
479 .sync = (FB_SYNC_HOR_HIGH_ACT |
480 FB_SYNC_VERT_HIGH_ACT),
481 .cmap_greyscale = 0,
482};
483
484static struct pxafb_mach_info generic_crt_800x600 = {
485 .modes = &generic_crt_800x600_mode,
486 .num_modes = 1,
487 .lccr0 = (LCCR0_PAS),
488 .lccr3 = (LCCR3_PixClkDiv(0x02) |
489 LCCR3_Acb(0xff)),
490 .cmap_inverse = 0,
491 .cmap_static = 0,
492};
493
494static struct pxafb_mode_info generic_tft_320x240_mode = {
495 .pixclock = 134615,
496 .bpp = 16,
497 .xres = 320,
498 .yres = 240,
499 .hsync_len = 63,
500 .vsync_len = 7,
501 .left_margin = 75,
502 .upper_margin = 0,
503 .right_margin = 15,
504 .lower_margin = 15,
505 .sync = 0,
506 .cmap_greyscale = 0,
507};
508
509static struct pxafb_mach_info generic_tft_320x240 = {
510 .modes = &generic_tft_320x240_mode,
511 .num_modes = 1,
512 .lccr0 = (LCCR0_PAS),
513 .lccr3 = (LCCR3_PixClkDiv(0x06) |
514 LCCR3_Acb(0xff) |
515 LCCR3_PCP),
516 .cmap_inverse = 0,
517 .cmap_static = 0,
518};
519
520static struct pxafb_mode_info generic_stn_640x480_mode = {
521 .pixclock = 57692,
522 .bpp = 8,
523 .xres = 640,
524 .yres = 480,
525 .hsync_len = 4,
526 .vsync_len = 2,
527 .left_margin = 10,
528 .upper_margin = 5,
529 .right_margin = 10,
530 .lower_margin = 5,
531 .sync = (FB_SYNC_HOR_HIGH_ACT |
532 FB_SYNC_VERT_HIGH_ACT),
533 .cmap_greyscale = 0,
534};
535
536static struct pxafb_mach_info generic_stn_640x480 = {
537 .modes = &generic_stn_640x480_mode,
538 .num_modes = 1,
539 .lccr0 = 0,
540 .lccr3 = (LCCR3_PixClkDiv(0x02) |
541 LCCR3_Acb(0xff)),
542 .cmap_inverse = 0,
543 .cmap_static = 0,
544};
545
546static struct pxafb_mach_info *cmx270_display = &generic_crt_640x480;
547
548static int __init cmx270_set_display(char *str)
549{
550 int disp_type = simple_strtol(str, NULL, 0);
551 switch (disp_type) {
552 case MTYPE_STN320x240:
553 cmx270_display = &generic_stn_320x240;
554 break;
555 case MTYPE_TFT640x480:
556 cmx270_display = &generic_tft_640x480;
557 break;
558 case MTYPE_CRT640x480:
559 cmx270_display = &generic_crt_640x480;
560 break;
561 case MTYPE_CRT800x600:
562 cmx270_display = &generic_crt_800x600;
563 break;
564 case MTYPE_TFT320x240:
565 cmx270_display = &generic_tft_320x240;
566 break;
567 case MTYPE_STN640x480:
568 cmx270_display = &generic_stn_640x480;
569 break;
570 default: /* fallback to CRT 640x480 */
571 cmx270_display = &generic_crt_640x480;
572 break;
573 }
574 return 1;
575}
576
577/*
578 This should be done really early to get proper configuration for
579 frame buffer.
580 Indeed, pxafb parameters can be used istead, but CM-X270 bootloader
581 has limitied line length for kernel command line, and also it will
582 break compatibitlty with proprietary releases already in field.
583*/
584__setup("monitor=", cmx270_set_display);
585
586static void __init cmx270_init_display(void)
587{
588 set_pxa_fb_info(cmx270_display);
589}
590#else
591static inline void cmx270_init_display(void) {}
592#endif
593
594/* PXA27x OHCI controller setup */ 258/* PXA27x OHCI controller setup */
595#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) 259#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
596static int cmx270_ohci_init(struct device *dev)
597{
598 /* Set the Power Control Polarity Low */
599 UHCHR = (UHCHR | UHCHR_PCPL) &
600 ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE);
601
602 return 0;
603}
604
605static struct pxaohci_platform_data cmx270_ohci_platform_data = { 260static struct pxaohci_platform_data cmx270_ohci_platform_data = {
606 .port_mode = PMM_PERPORT_MODE, 261 .port_mode = PMM_PERPORT_MODE,
607 .init = cmx270_ohci_init, 262 .flags = ENABLE_PORT1 | ENABLE_PORT2 | POWER_CONTROL_LOW,
608}; 263};
609 264
610static void __init cmx270_init_ohci(void) 265static void __init cmx270_init_ohci(void)
@@ -676,131 +331,12 @@ static void __init cmx270_init_mmc(void)
676static inline void cmx270_init_mmc(void) {} 331static inline void cmx270_init_mmc(void) {}
677#endif 332#endif
678 333
679#ifdef CONFIG_PM 334void __init cmx270_init(void)
680static unsigned long sleep_save_msc[10];
681
682static int cmx270_suspend(struct sys_device *dev, pm_message_t state)
683{
684 cmx270_pci_suspend();
685
686 /* save MSC registers */
687 sleep_save_msc[0] = MSC0;
688 sleep_save_msc[1] = MSC1;
689 sleep_save_msc[2] = MSC2;
690
691 /* setup power saving mode registers */
692 PCFR = 0x0;
693 PSLR = 0xff400000;
694 PMCR = 0x00000005;
695 PWER = 0x80000000;
696 PFER = 0x00000000;
697 PRER = 0x00000000;
698 PGSR0 = 0xC0018800;
699 PGSR1 = 0x004F0002;
700 PGSR2 = 0x6021C000;
701 PGSR3 = 0x00020000;
702
703 return 0;
704}
705
706static int cmx270_resume(struct sys_device *dev)
707{
708 cmx270_pci_resume();
709
710 /* restore MSC registers */
711 MSC0 = sleep_save_msc[0];
712 MSC1 = sleep_save_msc[1];
713 MSC2 = sleep_save_msc[2];
714
715 return 0;
716}
717
718static struct sysdev_class cmx270_pm_sysclass = {
719 .name = "pm",
720 .resume = cmx270_resume,
721 .suspend = cmx270_suspend,
722};
723
724static struct sys_device cmx270_pm_device = {
725 .cls = &cmx270_pm_sysclass,
726};
727
728static int __init cmx270_pm_init(void)
729{
730 int error;
731 error = sysdev_class_register(&cmx270_pm_sysclass);
732 if (error == 0)
733 error = sysdev_register(&cmx270_pm_device);
734 return error;
735}
736#else
737static int __init cmx270_pm_init(void) { return 0; }
738#endif
739
740#if defined(CONFIG_SND_PXA2XX_AC97) || defined(CONFIG_SND_PXA2XX_AC97_MODULE)
741static void __init cmx270_init_ac97(void)
742{
743 pxa_set_ac97_info(NULL);
744}
745#else
746static inline void cmx270_init_ac97(void) {}
747#endif
748
749static void __init cmx270_init(void)
750{ 335{
751 cmx270_pm_init();
752
753 pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx270_pin_config)); 336 pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx270_pin_config));
754 337
755 cmx270_init_dm9000();
756 cmx270_init_rtc(); 338 cmx270_init_rtc();
757 cmx270_init_display();
758 cmx270_init_mmc(); 339 cmx270_init_mmc();
759 cmx270_init_ohci(); 340 cmx270_init_ohci();
760 cmx270_init_ac97();
761 cmx270_init_touchscreen();
762 cmx270_init_leds();
763 cmx270_init_2700G(); 341 cmx270_init_2700G();
764} 342}
765
766static void __init cmx270_init_irq(void)
767{
768 pxa27x_init_irq();
769
770 cmx270_pci_init_irq(GPIO22_IT8152_IRQ);
771}
772
773#ifdef CONFIG_PCI
774/* Map PCI companion statically */
775static struct map_desc cmx270_io_desc[] __initdata = {
776 [0] = { /* PCI bridge */
777 .virtual = CMX270_IT8152_VIRT,
778 .pfn = __phys_to_pfn(PXA_CS4_PHYS),
779 .length = SZ_64M,
780 .type = MT_DEVICE
781 },
782};
783
784static void __init cmx270_map_io(void)
785{
786 pxa_map_io();
787 iotable_init(cmx270_io_desc, ARRAY_SIZE(cmx270_io_desc));
788
789 it8152_base_address = CMX270_IT8152_VIRT;
790}
791#else
792static void __init cmx270_map_io(void)
793{
794 pxa_map_io();
795}
796#endif
797
798MACHINE_START(ARMCORE, "Compulab CM-x270")
799 .boot_params = 0xa0000100,
800 .phys_io = 0x40000000,
801 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
802 .map_io = cmx270_map_io,
803 .init_irq = cmx270_init_irq,
804 .timer = &pxa_timer,
805 .init_machine = cmx270_init,
806MACHINE_END
diff --git a/arch/arm/mach-pxa/cm-x270-pci.c b/arch/arm/mach-pxa/cm-x2xx-pci.c
index 2d5bcea1e520..3156b25f6e9d 100644
--- a/arch/arm/mach-pxa/cm-x270-pci.c
+++ b/arch/arm/mach-pxa/cm-x2xx-pci.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-pxa/cm-x270-pci.c 2 * linux/arch/arm/mach-pxa/cm-x2xx-pci.c
3 * 3 *
4 * PCI bios-type initialisation for PCI machines 4 * PCI bios-type initialisation for PCI machines
5 * 5 *
@@ -28,7 +28,7 @@
28#include <asm/hardware/it8152.h> 28#include <asm/hardware/it8152.h>
29 29
30unsigned long it8152_base_address; 30unsigned long it8152_base_address;
31static int cmx270_it8152_irq_gpio; 31static int cmx2xx_it8152_irq_gpio;
32 32
33/* 33/*
34 * Only first 64MB of memory can be accessed via PCI. 34 * Only first 64MB of memory can be accessed via PCI.
@@ -36,13 +36,13 @@ static int cmx270_it8152_irq_gpio;
36 * This is really ugly and we need a better way of specifying 36 * This is really ugly and we need a better way of specifying
37 * DMA-capable regions of memory. 37 * DMA-capable regions of memory.
38 */ 38 */
39void __init cmx270_pci_adjust_zones(int node, unsigned long *zone_size, 39void __init cmx2xx_pci_adjust_zones(int node, unsigned long *zone_size,
40 unsigned long *zhole_size) 40 unsigned long *zhole_size)
41{ 41{
42 unsigned int sz = SZ_64M >> PAGE_SHIFT; 42 unsigned int sz = SZ_64M >> PAGE_SHIFT;
43 43
44 if (machine_is_armcore()) { 44 if (machine_is_armcore()) {
45 pr_info("Adjusting zones for CM-X270\n"); 45 pr_info("Adjusting zones for CM-X2XX\n");
46 46
47 /* 47 /*
48 * Only adjust if > 64M on current system 48 * Only adjust if > 64M on current system
@@ -57,29 +57,29 @@ void __init cmx270_pci_adjust_zones(int node, unsigned long *zone_size,
57 } 57 }
58} 58}
59 59
60static void cmx270_it8152_irq_demux(unsigned int irq, struct irq_desc *desc) 60static void cmx2xx_it8152_irq_demux(unsigned int irq, struct irq_desc *desc)
61{ 61{
62 /* clear our parent irq */ 62 /* clear our parent irq */
63 GEDR(cmx270_it8152_irq_gpio) = GPIO_bit(cmx270_it8152_irq_gpio); 63 GEDR(cmx2xx_it8152_irq_gpio) = GPIO_bit(cmx2xx_it8152_irq_gpio);
64 64
65 it8152_irq_demux(irq, desc); 65 it8152_irq_demux(irq, desc);
66} 66}
67 67
68void __cmx270_pci_init_irq(int irq_gpio) 68void __cmx2xx_pci_init_irq(int irq_gpio)
69{ 69{
70 it8152_init_irq(); 70 it8152_init_irq();
71 71
72 cmx270_it8152_irq_gpio = irq_gpio; 72 cmx2xx_it8152_irq_gpio = irq_gpio;
73 73
74 set_irq_type(gpio_to_irq(irq_gpio), IRQ_TYPE_EDGE_RISING); 74 set_irq_type(gpio_to_irq(irq_gpio), IRQ_TYPE_EDGE_RISING);
75 75
76 set_irq_chained_handler(gpio_to_irq(irq_gpio), cmx270_it8152_irq_demux); 76 set_irq_chained_handler(gpio_to_irq(irq_gpio), cmx2xx_it8152_irq_demux);
77} 77}
78 78
79#ifdef CONFIG_PM 79#ifdef CONFIG_PM
80static unsigned long sleep_save_ite[10]; 80static unsigned long sleep_save_ite[10];
81 81
82void __cmx270_pci_suspend(void) 82void __cmx2xx_pci_suspend(void)
83{ 83{
84 /* save ITE state */ 84 /* save ITE state */
85 sleep_save_ite[0] = __raw_readl(IT8152_INTC_PDCNIMR); 85 sleep_save_ite[0] = __raw_readl(IT8152_INTC_PDCNIMR);
@@ -91,7 +91,7 @@ void __cmx270_pci_suspend(void)
91 __raw_writel((0), IT8152_INTC_LPCNIRR); 91 __raw_writel((0), IT8152_INTC_LPCNIRR);
92} 92}
93 93
94void __cmx270_pci_resume(void) 94void __cmx2xx_pci_resume(void)
95{ 95{
96 /* restore IT8152 state */ 96 /* restore IT8152 state */
97 __raw_writel((sleep_save_ite[0]), IT8152_INTC_PDCNIMR); 97 __raw_writel((sleep_save_ite[0]), IT8152_INTC_PDCNIMR);
@@ -99,12 +99,12 @@ void __cmx270_pci_resume(void)
99 __raw_writel((sleep_save_ite[2]), IT8152_INTC_LPNIAR); 99 __raw_writel((sleep_save_ite[2]), IT8152_INTC_LPNIAR);
100} 100}
101#else 101#else
102void cmx270_pci_suspend(void) {} 102void cmx2xx_pci_suspend(void) {}
103void cmx270_pci_resume(void) {} 103void cmx2xx_pci_resume(void) {}
104#endif 104#endif
105 105
106/* PCI IRQ mapping*/ 106/* PCI IRQ mapping*/
107static int __init cmx270_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) 107static int __init cmx2xx_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
108{ 108{
109 int irq; 109 int irq;
110 110
@@ -116,14 +116,14 @@ static int __init cmx270_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
116 116
117 /* 117 /*
118 Here comes the ugly part. The routing is baseboard specific, 118 Here comes the ugly part. The routing is baseboard specific,
119 but defining a platform for each possible base of CM-X270 is 119 but defining a platform for each possible base of CM-X2XX is
120 unrealistic. Here we keep mapping for ATXBase and SB-X270. 120 unrealistic. Here we keep mapping for ATXBase and SB-X2XX.
121 */ 121 */
122 /* ATXBASE PCI slot */ 122 /* ATXBASE PCI slot */
123 if (slot == 7) 123 if (slot == 7)
124 return IT8152_PCI_INTA; 124 return IT8152_PCI_INTA;
125 125
126 /* ATXBase/SB-x270 CardBus */ 126 /* ATXBase/SB-X2XX CardBus */
127 if (slot == 8 || slot == 0) 127 if (slot == 8 || slot == 0)
128 return IT8152_PCI_INTB; 128 return IT8152_PCI_INTB;
129 129
@@ -131,7 +131,11 @@ static int __init cmx270_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
131 if (slot == 9) 131 if (slot == 9)
132 return IT8152_PCI_INTA; 132 return IT8152_PCI_INTA;
133 133
134 /* SB-x270 Ethernet */ 134 /* CM-x255 Onboard Ethernet */
135 if (slot == 15)
136 return IT8152_PCI_INTC;
137
138 /* SB-x2xx Ethernet */
135 if (slot == 16) 139 if (slot == 16)
136 return IT8152_PCI_INTA; 140 return IT8152_PCI_INTA;
137 141
@@ -144,9 +148,9 @@ static int __init cmx270_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
144 return(0); 148 return(0);
145} 149}
146 150
147static void cmx270_pci_preinit(void) 151static void cmx2xx_pci_preinit(void)
148{ 152{
149 pr_info("Initializing CM-X270 PCI subsystem\n"); 153 pr_info("Initializing CM-X2XX PCI subsystem\n");
150 154
151 __raw_writel(0x800, IT8152_PCI_CFG_ADDR); 155 __raw_writel(0x800, IT8152_PCI_CFG_ADDR);
152 if (__raw_readl(IT8152_PCI_CFG_DATA) == 0x81521283) { 156 if (__raw_readl(IT8152_PCI_CFG_DATA) == 0x81521283) {
@@ -200,21 +204,21 @@ static void cmx270_pci_preinit(void)
200 } 204 }
201} 205}
202 206
203static struct hw_pci cmx270_pci __initdata = { 207static struct hw_pci cmx2xx_pci __initdata = {
204 .swizzle = pci_std_swizzle, 208 .swizzle = pci_std_swizzle,
205 .map_irq = cmx270_pci_map_irq, 209 .map_irq = cmx2xx_pci_map_irq,
206 .nr_controllers = 1, 210 .nr_controllers = 1,
207 .setup = it8152_pci_setup, 211 .setup = it8152_pci_setup,
208 .scan = it8152_pci_scan_bus, 212 .scan = it8152_pci_scan_bus,
209 .preinit = cmx270_pci_preinit, 213 .preinit = cmx2xx_pci_preinit,
210}; 214};
211 215
212static int __init cmx270_init_pci(void) 216static int __init cmx2xx_init_pci(void)
213{ 217{
214 if (machine_is_armcore()) 218 if (machine_is_armcore())
215 pci_common_init(&cmx270_pci); 219 pci_common_init(&cmx2xx_pci);
216 220
217 return 0; 221 return 0;
218} 222}
219 223
220subsys_initcall(cmx270_init_pci); 224subsys_initcall(cmx2xx_init_pci);
diff --git a/arch/arm/mach-pxa/cm-x2xx-pci.h b/arch/arm/mach-pxa/cm-x2xx-pci.h
new file mode 100644
index 000000000000..e24aad2e3ad7
--- /dev/null
+++ b/arch/arm/mach-pxa/cm-x2xx-pci.h
@@ -0,0 +1,13 @@
1extern void __cmx2xx_pci_init_irq(int irq_gpio);
2extern void __cmx2xx_pci_suspend(void);
3extern void __cmx2xx_pci_resume(void);
4
5#ifdef CONFIG_PCI
6#define cmx2xx_pci_init_irq(x) __cmx2xx_pci_init_irq(x)
7#define cmx2xx_pci_suspend(x) __cmx2xx_pci_suspend(x)
8#define cmx2xx_pci_resume(x) __cmx2xx_pci_resume(x)
9#else
10#define cmx2xx_pci_init_irq(x) do {} while (0)
11#define cmx2xx_pci_suspend(x) do {} while (0)
12#define cmx2xx_pci_resume(x) do {} while (0)
13#endif
diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c
new file mode 100644
index 000000000000..0b3ce3b6d896
--- /dev/null
+++ b/arch/arm/mach-pxa/cm-x2xx.c
@@ -0,0 +1,531 @@
1/*
2 * linux/arch/arm/mach-pxa/cm-x2xx.c
3 *
4 * Copyright (C) 2008 CompuLab, Ltd.
5 * Mike Rapoport <mike@compulab.co.il>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/platform_device.h>
13#include <linux/sysdev.h>
14#include <linux/irq.h>
15#include <linux/gpio.h>
16
17#include <linux/dm9000.h>
18#include <linux/leds.h>
19
20#include <asm/mach/arch.h>
21#include <asm/mach-types.h>
22#include <asm/mach/map.h>
23
24#include <mach/pxa2xx-regs.h>
25#include <mach/mfp-pxa27x.h>
26#include <mach/pxa-regs.h>
27#include <mach/audio.h>
28#include <mach/pxafb.h>
29
30#include <asm/hardware/it8152.h>
31
32#include "generic.h"
33#include "cm-x2xx-pci.h"
34
35extern void cmx255_init(void);
36extern void cmx270_init(void);
37
38/* virtual addresses for statically mapped regions */
39#define CMX2XX_VIRT_BASE (0xe8000000)
40#define CMX2XX_IT8152_VIRT (CMX2XX_VIRT_BASE)
41
42/* physical address if local-bus attached devices */
43#define CMX255_DM9000_PHYS_BASE (PXA_CS1_PHYS + (8 << 22))
44#define CMX270_DM9000_PHYS_BASE (PXA_CS1_PHYS + (6 << 22))
45
46/* leds */
47#define CMX255_GPIO_RED (27)
48#define CMX255_GPIO_GREEN (32)
49#define CMX270_GPIO_RED (93)
50#define CMX270_GPIO_GREEN (94)
51
52/* GPIO IRQ usage */
53#define GPIO22_ETHIRQ (22)
54#define GPIO10_ETHIRQ (10)
55#define CMX255_GPIO_IT8152_IRQ (0)
56#define CMX270_GPIO_IT8152_IRQ (22)
57
58#define CMX255_ETHIRQ IRQ_GPIO(GPIO22_ETHIRQ)
59#define CMX270_ETHIRQ IRQ_GPIO(GPIO10_ETHIRQ)
60
61#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
62static struct resource cmx255_dm9000_resource[] = {
63 [0] = {
64 .start = CMX255_DM9000_PHYS_BASE,
65 .end = CMX255_DM9000_PHYS_BASE + 3,
66 .flags = IORESOURCE_MEM,
67 },
68 [1] = {
69 .start = CMX255_DM9000_PHYS_BASE + 4,
70 .end = CMX255_DM9000_PHYS_BASE + 4 + 500,
71 .flags = IORESOURCE_MEM,
72 },
73 [2] = {
74 .start = CMX255_ETHIRQ,
75 .end = CMX255_ETHIRQ,
76 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
77 }
78};
79
80static struct resource cmx270_dm9000_resource[] = {
81 [0] = {
82 .start = CMX270_DM9000_PHYS_BASE,
83 .end = CMX270_DM9000_PHYS_BASE + 3,
84 .flags = IORESOURCE_MEM,
85 },
86 [1] = {
87 .start = CMX270_DM9000_PHYS_BASE + 8,
88 .end = CMX270_DM9000_PHYS_BASE + 8 + 500,
89 .flags = IORESOURCE_MEM,
90 },
91 [2] = {
92 .start = CMX270_ETHIRQ,
93 .end = CMX270_ETHIRQ,
94 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
95 }
96};
97
98static struct dm9000_plat_data cmx270_dm9000_platdata = {
99 .flags = DM9000_PLATF_32BITONLY,
100};
101
102static struct platform_device cmx2xx_dm9000_device = {
103 .name = "dm9000",
104 .id = 0,
105 .num_resources = ARRAY_SIZE(cmx270_dm9000_resource),
106 .dev = {
107 .platform_data = &cmx270_dm9000_platdata,
108 }
109};
110
111static void __init cmx2xx_init_dm9000(void)
112{
113 if (cpu_is_pxa25x())
114 cmx2xx_dm9000_device.resource = cmx255_dm9000_resource;
115 else
116 cmx2xx_dm9000_device.resource = cmx270_dm9000_resource;
117 platform_device_register(&cmx2xx_dm9000_device);
118}
119#else
120static inline void cmx2xx_init_dm9000(void) {}
121#endif
122
123/* UCB1400 touchscreen controller */
124#if defined(CONFIG_TOUCHSCREEN_UCB1400) || defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
125static struct platform_device cmx2xx_ts_device = {
126 .name = "ucb1400_ts",
127 .id = -1,
128};
129
130static void __init cmx2xx_init_touchscreen(void)
131{
132 platform_device_register(&cmx2xx_ts_device);
133}
134#else
135static inline void cmx2xx_init_touchscreen(void) {}
136#endif
137
138/* CM-X270 LEDs */
139#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
140static struct gpio_led cmx2xx_leds[] = {
141 [0] = {
142 .name = "cm-x2xx:red",
143 .default_trigger = "nand-disk",
144 .active_low = 1,
145 },
146 [1] = {
147 .name = "cm-x2xx:green",
148 .default_trigger = "heartbeat",
149 .active_low = 1,
150 },
151};
152
153static struct gpio_led_platform_data cmx2xx_gpio_led_pdata = {
154 .num_leds = ARRAY_SIZE(cmx2xx_leds),
155 .leds = cmx2xx_leds,
156};
157
158static struct platform_device cmx2xx_led_device = {
159 .name = "leds-gpio",
160 .id = -1,
161 .dev = {
162 .platform_data = &cmx2xx_gpio_led_pdata,
163 },
164};
165
166static void __init cmx2xx_init_leds(void)
167{
168 if (cpu_is_pxa25x()) {
169 cmx2xx_leds[0].gpio = CMX255_GPIO_RED;
170 cmx2xx_leds[1].gpio = CMX255_GPIO_GREEN;
171 } else {
172 cmx2xx_leds[0].gpio = CMX270_GPIO_RED;
173 cmx2xx_leds[1].gpio = CMX270_GPIO_GREEN;
174 }
175 platform_device_register(&cmx2xx_led_device);
176}
177#else
178static inline void cmx2xx_init_leds(void) {}
179#endif
180
181#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
182/*
183 Display definitions
184 keep these for backwards compatibility, although symbolic names (as
185 e.g. in lpd270.c) looks better
186*/
187#define MTYPE_STN320x240 0
188#define MTYPE_TFT640x480 1
189#define MTYPE_CRT640x480 2
190#define MTYPE_CRT800x600 3
191#define MTYPE_TFT320x240 6
192#define MTYPE_STN640x480 7
193
194static struct pxafb_mode_info generic_stn_320x240_mode = {
195 .pixclock = 76923,
196 .bpp = 8,
197 .xres = 320,
198 .yres = 240,
199 .hsync_len = 3,
200 .vsync_len = 2,
201 .left_margin = 3,
202 .upper_margin = 0,
203 .right_margin = 3,
204 .lower_margin = 0,
205 .sync = (FB_SYNC_HOR_HIGH_ACT |
206 FB_SYNC_VERT_HIGH_ACT),
207 .cmap_greyscale = 0,
208};
209
210static struct pxafb_mach_info generic_stn_320x240 = {
211 .modes = &generic_stn_320x240_mode,
212 .num_modes = 1,
213 .lccr0 = 0,
214 .lccr3 = (LCCR3_PixClkDiv(0x03) |
215 LCCR3_Acb(0xff) |
216 LCCR3_PCP),
217 .cmap_inverse = 0,
218 .cmap_static = 0,
219};
220
221static struct pxafb_mode_info generic_tft_640x480_mode = {
222 .pixclock = 38461,
223 .bpp = 8,
224 .xres = 640,
225 .yres = 480,
226 .hsync_len = 60,
227 .vsync_len = 2,
228 .left_margin = 70,
229 .upper_margin = 10,
230 .right_margin = 70,
231 .lower_margin = 5,
232 .sync = 0,
233 .cmap_greyscale = 0,
234};
235
236static struct pxafb_mach_info generic_tft_640x480 = {
237 .modes = &generic_tft_640x480_mode,
238 .num_modes = 1,
239 .lccr0 = (LCCR0_PAS),
240 .lccr3 = (LCCR3_PixClkDiv(0x01) |
241 LCCR3_Acb(0xff) |
242 LCCR3_PCP),
243 .cmap_inverse = 0,
244 .cmap_static = 0,
245};
246
247static struct pxafb_mode_info generic_crt_640x480_mode = {
248 .pixclock = 38461,
249 .bpp = 8,
250 .xres = 640,
251 .yres = 480,
252 .hsync_len = 63,
253 .vsync_len = 2,
254 .left_margin = 81,
255 .upper_margin = 33,
256 .right_margin = 16,
257 .lower_margin = 10,
258 .sync = (FB_SYNC_HOR_HIGH_ACT |
259 FB_SYNC_VERT_HIGH_ACT),
260 .cmap_greyscale = 0,
261};
262
263static struct pxafb_mach_info generic_crt_640x480 = {
264 .modes = &generic_crt_640x480_mode,
265 .num_modes = 1,
266 .lccr0 = (LCCR0_PAS),
267 .lccr3 = (LCCR3_PixClkDiv(0x01) |
268 LCCR3_Acb(0xff)),
269 .cmap_inverse = 0,
270 .cmap_static = 0,
271};
272
273static struct pxafb_mode_info generic_crt_800x600_mode = {
274 .pixclock = 28846,
275 .bpp = 8,
276 .xres = 800,
277 .yres = 600,
278 .hsync_len = 63,
279 .vsync_len = 2,
280 .left_margin = 26,
281 .upper_margin = 21,
282 .right_margin = 26,
283 .lower_margin = 11,
284 .sync = (FB_SYNC_HOR_HIGH_ACT |
285 FB_SYNC_VERT_HIGH_ACT),
286 .cmap_greyscale = 0,
287};
288
289static struct pxafb_mach_info generic_crt_800x600 = {
290 .modes = &generic_crt_800x600_mode,
291 .num_modes = 1,
292 .lccr0 = (LCCR0_PAS),
293 .lccr3 = (LCCR3_PixClkDiv(0x02) |
294 LCCR3_Acb(0xff)),
295 .cmap_inverse = 0,
296 .cmap_static = 0,
297};
298
299static struct pxafb_mode_info generic_tft_320x240_mode = {
300 .pixclock = 134615,
301 .bpp = 16,
302 .xres = 320,
303 .yres = 240,
304 .hsync_len = 63,
305 .vsync_len = 7,
306 .left_margin = 75,
307 .upper_margin = 0,
308 .right_margin = 15,
309 .lower_margin = 15,
310 .sync = 0,
311 .cmap_greyscale = 0,
312};
313
314static struct pxafb_mach_info generic_tft_320x240 = {
315 .modes = &generic_tft_320x240_mode,
316 .num_modes = 1,
317 .lccr0 = (LCCR0_PAS),
318 .lccr3 = (LCCR3_PixClkDiv(0x06) |
319 LCCR3_Acb(0xff) |
320 LCCR3_PCP),
321 .cmap_inverse = 0,
322 .cmap_static = 0,
323};
324
325static struct pxafb_mode_info generic_stn_640x480_mode = {
326 .pixclock = 57692,
327 .bpp = 8,
328 .xres = 640,
329 .yres = 480,
330 .hsync_len = 4,
331 .vsync_len = 2,
332 .left_margin = 10,
333 .upper_margin = 5,
334 .right_margin = 10,
335 .lower_margin = 5,
336 .sync = (FB_SYNC_HOR_HIGH_ACT |
337 FB_SYNC_VERT_HIGH_ACT),
338 .cmap_greyscale = 0,
339};
340
341static struct pxafb_mach_info generic_stn_640x480 = {
342 .modes = &generic_stn_640x480_mode,
343 .num_modes = 1,
344 .lccr0 = 0,
345 .lccr3 = (LCCR3_PixClkDiv(0x02) |
346 LCCR3_Acb(0xff)),
347 .cmap_inverse = 0,
348 .cmap_static = 0,
349};
350
351static struct pxafb_mach_info *cmx2xx_display = &generic_crt_640x480;
352
353static int __init cmx2xx_set_display(char *str)
354{
355 int disp_type = simple_strtol(str, NULL, 0);
356 switch (disp_type) {
357 case MTYPE_STN320x240:
358 cmx2xx_display = &generic_stn_320x240;
359 break;
360 case MTYPE_TFT640x480:
361 cmx2xx_display = &generic_tft_640x480;
362 break;
363 case MTYPE_CRT640x480:
364 cmx2xx_display = &generic_crt_640x480;
365 break;
366 case MTYPE_CRT800x600:
367 cmx2xx_display = &generic_crt_800x600;
368 break;
369 case MTYPE_TFT320x240:
370 cmx2xx_display = &generic_tft_320x240;
371 break;
372 case MTYPE_STN640x480:
373 cmx2xx_display = &generic_stn_640x480;
374 break;
375 default: /* fallback to CRT 640x480 */
376 cmx2xx_display = &generic_crt_640x480;
377 break;
378 }
379 return 1;
380}
381
382/*
383 This should be done really early to get proper configuration for
384 frame buffer.
385 Indeed, pxafb parameters can be used istead, but CM-X2XX bootloader
386 has limitied line length for kernel command line, and also it will
387 break compatibitlty with proprietary releases already in field.
388*/
389__setup("monitor=", cmx2xx_set_display);
390
391static void __init cmx2xx_init_display(void)
392{
393 set_pxa_fb_info(cmx2xx_display);
394}
395#else
396static inline void cmx2xx_init_display(void) {}
397#endif
398
399#ifdef CONFIG_PM
400static unsigned long sleep_save_msc[10];
401
402static int cmx2xx_suspend(struct sys_device *dev, pm_message_t state)
403{
404 cmx2xx_pci_suspend();
405
406 /* save MSC registers */
407 sleep_save_msc[0] = MSC0;
408 sleep_save_msc[1] = MSC1;
409 sleep_save_msc[2] = MSC2;
410
411 /* setup power saving mode registers */
412 PCFR = 0x0;
413 PSLR = 0xff400000;
414 PMCR = 0x00000005;
415 PWER = 0x80000000;
416 PFER = 0x00000000;
417 PRER = 0x00000000;
418 PGSR0 = 0xC0018800;
419 PGSR1 = 0x004F0002;
420 PGSR2 = 0x6021C000;
421 PGSR3 = 0x00020000;
422
423 return 0;
424}
425
426static int cmx2xx_resume(struct sys_device *dev)
427{
428 cmx2xx_pci_resume();
429
430 /* restore MSC registers */
431 MSC0 = sleep_save_msc[0];
432 MSC1 = sleep_save_msc[1];
433 MSC2 = sleep_save_msc[2];
434
435 return 0;
436}
437
438static struct sysdev_class cmx2xx_pm_sysclass = {
439 .name = "pm",
440 .resume = cmx2xx_resume,
441 .suspend = cmx2xx_suspend,
442};
443
444static struct sys_device cmx2xx_pm_device = {
445 .cls = &cmx2xx_pm_sysclass,
446};
447
448static int __init cmx2xx_pm_init(void)
449{
450 int error;
451 error = sysdev_class_register(&cmx2xx_pm_sysclass);
452 if (error == 0)
453 error = sysdev_register(&cmx2xx_pm_device);
454 return error;
455}
456#else
457static int __init cmx2xx_pm_init(void) { return 0; }
458#endif
459
460#if defined(CONFIG_SND_PXA2XX_AC97) || defined(CONFIG_SND_PXA2XX_AC97_MODULE)
461static void __init cmx2xx_init_ac97(void)
462{
463 pxa_set_ac97_info(NULL);
464}
465#else
466static inline void cmx2xx_init_ac97(void) {}
467#endif
468
469static void __init cmx2xx_init(void)
470{
471 cmx2xx_pm_init();
472
473 if (cpu_is_pxa25x())
474 cmx255_init();
475 else
476 cmx270_init();
477
478 cmx2xx_init_dm9000();
479 cmx2xx_init_display();
480 cmx2xx_init_ac97();
481 cmx2xx_init_touchscreen();
482 cmx2xx_init_leds();
483}
484
485static void __init cmx2xx_init_irq(void)
486{
487 pxa27x_init_irq();
488
489 if (cpu_is_pxa25x()) {
490 pxa25x_init_irq();
491 cmx2xx_pci_init_irq(CMX255_GPIO_IT8152_IRQ);
492 } else {
493 pxa27x_init_irq();
494 cmx2xx_pci_init_irq(CMX270_GPIO_IT8152_IRQ);
495 }
496}
497
498#ifdef CONFIG_PCI
499/* Map PCI companion statically */
500static struct map_desc cmx2xx_io_desc[] __initdata = {
501 [0] = { /* PCI bridge */
502 .virtual = CMX2XX_IT8152_VIRT,
503 .pfn = __phys_to_pfn(PXA_CS4_PHYS),
504 .length = SZ_64M,
505 .type = MT_DEVICE
506 },
507};
508
509static void __init cmx2xx_map_io(void)
510{
511 pxa_map_io();
512 iotable_init(cmx2xx_io_desc, ARRAY_SIZE(cmx2xx_io_desc));
513
514 it8152_base_address = CMX2XX_IT8152_VIRT;
515}
516#else
517static void __init cmx2xx_map_io(void)
518{
519 pxa_map_io();
520}
521#endif
522
523MACHINE_START(ARMCORE, "Compulab CM-X2XX")
524 .boot_params = 0xa0000100,
525 .phys_io = 0x40000000,
526 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
527 .map_io = cmx2xx_map_io,
528 .init_irq = cmx2xx_init_irq,
529 .timer = &pxa_timer,
530 .init_machine = cmx2xx_init,
531MACHINE_END
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
new file mode 100644
index 000000000000..deb46cd144bf
--- /dev/null
+++ b/arch/arm/mach-pxa/cm-x300.c
@@ -0,0 +1,465 @@
1/*
2 * linux/arch/arm/mach-pxa/cm-x300.c
3 *
4 * Support for the CompuLab CM-X300 modules
5 *
6 * Copyright (C) 2008 CompuLab Ltd.
7 *
8 * Mike Rapoport <mike@compulab.co.il>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/module.h>
16#include <linux/kernel.h>
17#include <linux/interrupt.h>
18#include <linux/init.h>
19#include <linux/platform_device.h>
20
21#include <linux/gpio.h>
22#include <linux/dm9000.h>
23#include <linux/leds.h>
24
25#include <linux/i2c.h>
26#include <linux/i2c/pca953x.h>
27
28#include <asm/mach-types.h>
29#include <asm/mach/arch.h>
30
31#include <mach/mfp-pxa300.h>
32
33#include <mach/hardware.h>
34#include <mach/gpio.h>
35#include <mach/pxafb.h>
36#include <mach/mmc.h>
37#include <mach/ohci.h>
38#include <mach/i2c.h>
39#include <mach/pxa3xx_nand.h>
40
41#include <asm/mach/map.h>
42
43#include "generic.h"
44
45#define CM_X300_ETH_PHYS 0x08000010
46
47#define GPIO82_MMC2_IRQ (82)
48#define GPIO85_MMC2_WP (85)
49
50#define CM_X300_MMC2_IRQ IRQ_GPIO(GPIO82_MMC2_IRQ)
51
52static mfp_cfg_t cm_x300_mfp_cfg[] __initdata = {
53 /* LCD */
54 GPIO54_LCD_LDD_0,
55 GPIO55_LCD_LDD_1,
56 GPIO56_LCD_LDD_2,
57 GPIO57_LCD_LDD_3,
58 GPIO58_LCD_LDD_4,
59 GPIO59_LCD_LDD_5,
60 GPIO60_LCD_LDD_6,
61 GPIO61_LCD_LDD_7,
62 GPIO62_LCD_LDD_8,
63 GPIO63_LCD_LDD_9,
64 GPIO64_LCD_LDD_10,
65 GPIO65_LCD_LDD_11,
66 GPIO66_LCD_LDD_12,
67 GPIO67_LCD_LDD_13,
68 GPIO68_LCD_LDD_14,
69 GPIO69_LCD_LDD_15,
70 GPIO72_LCD_FCLK,
71 GPIO73_LCD_LCLK,
72 GPIO74_LCD_PCLK,
73 GPIO75_LCD_BIAS,
74
75 /* BTUART */
76 GPIO111_UART2_RTS,
77 GPIO112_UART2_RXD | MFP_LPM_EDGE_FALL,
78 GPIO113_UART2_TXD,
79 GPIO114_UART2_CTS | MFP_LPM_EDGE_BOTH,
80
81 /* STUART */
82 GPIO109_UART3_TXD,
83 GPIO110_UART3_RXD | MFP_LPM_EDGE_FALL,
84
85 /* AC97 */
86 GPIO23_AC97_nACRESET,
87 GPIO24_AC97_SYSCLK,
88 GPIO29_AC97_BITCLK,
89 GPIO25_AC97_SDATA_IN_0,
90 GPIO27_AC97_SDATA_OUT,
91 GPIO28_AC97_SYNC,
92
93 /* Keypad */
94 GPIO115_KP_MKIN_0 | MFP_LPM_EDGE_BOTH,
95 GPIO116_KP_MKIN_1 | MFP_LPM_EDGE_BOTH,
96 GPIO117_KP_MKIN_2 | MFP_LPM_EDGE_BOTH,
97 GPIO118_KP_MKIN_3 | MFP_LPM_EDGE_BOTH,
98 GPIO119_KP_MKIN_4 | MFP_LPM_EDGE_BOTH,
99 GPIO120_KP_MKIN_5 | MFP_LPM_EDGE_BOTH,
100 GPIO2_2_KP_MKIN_6 | MFP_LPM_EDGE_BOTH,
101 GPIO3_2_KP_MKIN_7 | MFP_LPM_EDGE_BOTH,
102 GPIO121_KP_MKOUT_0,
103 GPIO122_KP_MKOUT_1,
104 GPIO123_KP_MKOUT_2,
105 GPIO124_KP_MKOUT_3,
106 GPIO125_KP_MKOUT_4,
107 GPIO4_2_KP_MKOUT_5,
108
109 /* MMC1 */
110 GPIO3_MMC1_DAT0,
111 GPIO4_MMC1_DAT1 | MFP_LPM_EDGE_BOTH,
112 GPIO5_MMC1_DAT2,
113 GPIO6_MMC1_DAT3,
114 GPIO7_MMC1_CLK,
115 GPIO8_MMC1_CMD, /* CMD0 for slot 0 */
116
117 /* MMC2 */
118 GPIO9_MMC2_DAT0,
119 GPIO10_MMC2_DAT1 | MFP_LPM_EDGE_BOTH,
120 GPIO11_MMC2_DAT2,
121 GPIO12_MMC2_DAT3,
122 GPIO13_MMC2_CLK,
123 GPIO14_MMC2_CMD,
124
125 /* FFUART */
126 GPIO30_UART1_RXD | MFP_LPM_EDGE_FALL,
127 GPIO31_UART1_TXD,
128 GPIO32_UART1_CTS,
129 GPIO37_UART1_RTS,
130 GPIO33_UART1_DCD,
131 GPIO34_UART1_DSR | MFP_LPM_EDGE_FALL,
132 GPIO35_UART1_RI,
133 GPIO36_UART1_DTR,
134
135 /* GPIOs */
136 GPIO79_GPIO, /* LED */
137 GPIO82_GPIO | MFP_PULL_HIGH, /* MMC CD */
138 GPIO85_GPIO, /* MMC WP */
139 GPIO99_GPIO, /* Ethernet IRQ */
140};
141
142#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
143static struct resource dm9000_resources[] = {
144 [0] = {
145 .start = CM_X300_ETH_PHYS,
146 .end = CM_X300_ETH_PHYS + 0x3,
147 .flags = IORESOURCE_MEM,
148 },
149 [1] = {
150 .start = CM_X300_ETH_PHYS + 0x4,
151 .end = CM_X300_ETH_PHYS + 0x4 + 500,
152 .flags = IORESOURCE_MEM,
153 },
154 [2] = {
155 .start = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO99)),
156 .end = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO99)),
157 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
158 }
159};
160
161static struct dm9000_plat_data cm_x300_dm9000_platdata = {
162 .flags = DM9000_PLATF_16BITONLY,
163};
164
165static struct platform_device dm9000_device = {
166 .name = "dm9000",
167 .id = 0,
168 .num_resources = ARRAY_SIZE(dm9000_resources),
169 .resource = dm9000_resources,
170 .dev = {
171 .platform_data = &cm_x300_dm9000_platdata,
172 }
173
174};
175
176static void __init cm_x300_init_dm9000(void)
177{
178 platform_device_register(&dm9000_device);
179}
180#else
181static inline void cm_x300_init_dm9000(void) {}
182#endif
183
184#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
185static struct pxafb_mode_info cm_x300_lcd_modes[] = {
186 [0] = {
187 .pixclock = 38000,
188 .bpp = 16,
189 .xres = 480,
190 .yres = 640,
191 .hsync_len = 8,
192 .vsync_len = 2,
193 .left_margin = 8,
194 .upper_margin = 0,
195 .right_margin = 24,
196 .lower_margin = 4,
197 .cmap_greyscale = 0,
198 },
199 [1] = {
200 .pixclock = 153800,
201 .bpp = 16,
202 .xres = 240,
203 .yres = 320,
204 .hsync_len = 8,
205 .vsync_len = 2,
206 .left_margin = 8,
207 .upper_margin = 2,
208 .right_margin = 88,
209 .lower_margin = 2,
210 .cmap_greyscale = 0,
211 },
212};
213
214static struct pxafb_mach_info cm_x300_lcd = {
215 .modes = cm_x300_lcd_modes,
216 .num_modes = 2,
217 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
218};
219
220static void __init cm_x300_init_lcd(void)
221{
222 set_pxa_fb_info(&cm_x300_lcd);
223}
224#else
225static inline void cm_x300_init_lcd(void) {}
226#endif
227
228#if defined(CONFIG_MTD_NAND_PXA3xx) || defined(CONFIG_MTD_NAND_PXA3xx_MODULE)
229static struct mtd_partition cm_x300_nand_partitions[] = {
230 [0] = {
231 .name = "OBM",
232 .offset = 0,
233 .size = SZ_256K,
234 .mask_flags = MTD_WRITEABLE, /* force read-only */
235 },
236 [1] = {
237 .name = "U-Boot",
238 .offset = MTDPART_OFS_APPEND,
239 .size = SZ_256K,
240 .mask_flags = MTD_WRITEABLE, /* force read-only */
241 },
242 [2] = {
243 .name = "Environment",
244 .offset = MTDPART_OFS_APPEND,
245 .size = SZ_256K,
246 },
247 [3] = {
248 .name = "reserved",
249 .offset = MTDPART_OFS_APPEND,
250 .size = SZ_256K + SZ_1M,
251 .mask_flags = MTD_WRITEABLE, /* force read-only */
252 },
253 [4] = {
254 .name = "kernel",
255 .offset = MTDPART_OFS_APPEND,
256 .size = SZ_4M,
257 },
258 [5] = {
259 .name = "fs",
260 .offset = MTDPART_OFS_APPEND,
261 .size = MTDPART_SIZ_FULL,
262 },
263};
264
265static struct pxa3xx_nand_platform_data cm_x300_nand_info = {
266 .enable_arbiter = 1,
267 .parts = cm_x300_nand_partitions,
268 .nr_parts = ARRAY_SIZE(cm_x300_nand_partitions),
269};
270
271static void __init cm_x300_init_nand(void)
272{
273 pxa3xx_set_nand_info(&cm_x300_nand_info);
274}
275#else
276static inline void cm_x300_init_nand(void) {}
277#endif
278
279#if defined(CONFIG_MMC) || defined(CONFIG_MMC_MODULE)
280/* The first MMC slot of CM-X300 is hardwired to Libertas card and has
281 no detection/ro pins */
282static int cm_x300_mci_init(struct device *dev,
283 irq_handler_t cm_x300_detect_int,
284 void *data)
285{
286 return 0;
287}
288
289static void cm_x300_mci_exit(struct device *dev, void *data)
290{
291}
292
293static struct pxamci_platform_data cm_x300_mci_platform_data = {
294 .detect_delay = 20,
295 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
296 .init = cm_x300_mci_init,
297 .exit = cm_x300_mci_exit,
298};
299
300static int cm_x300_mci2_ro(struct device *dev)
301{
302 return gpio_get_value(GPIO85_MMC2_WP);
303}
304
305static int cm_x300_mci2_init(struct device *dev,
306 irq_handler_t cm_x300_detect_int,
307 void *data)
308{
309 int err;
310
311 /*
312 * setup GPIO for CM-X300 MMC controller
313 */
314 err = gpio_request(GPIO82_MMC2_IRQ, "mmc card detect");
315 if (err)
316 goto err_request_cd;
317 gpio_direction_input(GPIO82_MMC2_IRQ);
318
319 err = gpio_request(GPIO85_MMC2_WP, "mmc write protect");
320 if (err)
321 goto err_request_wp;
322 gpio_direction_input(GPIO85_MMC2_WP);
323
324 err = request_irq(CM_X300_MMC2_IRQ, cm_x300_detect_int,
325 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
326 "MMC card detect", data);
327 if (err) {
328 printk(KERN_ERR "%s: MMC/SD/SDIO: "
329 "can't request card detect IRQ\n", __func__);
330 goto err_request_irq;
331 }
332
333 return 0;
334
335err_request_irq:
336 gpio_free(GPIO85_MMC2_WP);
337err_request_wp:
338 gpio_free(GPIO82_MMC2_IRQ);
339err_request_cd:
340 return err;
341}
342
343static void cm_x300_mci2_exit(struct device *dev, void *data)
344{
345 free_irq(CM_X300_MMC2_IRQ, data);
346 gpio_free(GPIO82_MMC2_IRQ);
347 gpio_free(GPIO85_MMC2_WP);
348}
349
350static struct pxamci_platform_data cm_x300_mci2_platform_data = {
351 .detect_delay = 20,
352 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
353 .init = cm_x300_mci2_init,
354 .exit = cm_x300_mci2_exit,
355 .get_ro = cm_x300_mci2_ro,
356};
357
358static void __init cm_x300_init_mmc(void)
359{
360 pxa_set_mci_info(&cm_x300_mci_platform_data);
361 pxa3xx_set_mci2_info(&cm_x300_mci2_platform_data);
362}
363#else
364static inline void cm_x300_init_mmc(void) {}
365#endif
366
367#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
368static struct pxaohci_platform_data cm_x300_ohci_platform_data = {
369 .port_mode = PMM_PERPORT_MODE,
370 .flags = ENABLE_PORT1 | ENABLE_PORT2 | POWER_CONTROL_LOW,
371};
372
373static void __init cm_x300_init_ohci(void)
374{
375 pxa_set_ohci_info(&cm_x300_ohci_platform_data);
376}
377#else
378static inline void cm_x300_init_ohci(void) {}
379#endif
380
381#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
382static struct gpio_led cm_x300_leds[] = {
383 [0] = {
384 .name = "cm-x300:green",
385 .default_trigger = "heartbeat",
386 .gpio = 79,
387 .active_low = 1,
388 },
389};
390
391static struct gpio_led_platform_data cm_x300_gpio_led_pdata = {
392 .num_leds = ARRAY_SIZE(cm_x300_leds),
393 .leds = cm_x300_leds,
394};
395
396static struct platform_device cm_x300_led_device = {
397 .name = "leds-gpio",
398 .id = -1,
399 .dev = {
400 .platform_data = &cm_x300_gpio_led_pdata,
401 },
402};
403
404static void __init cm_x300_init_leds(void)
405{
406 platform_device_register(&cm_x300_led_device);
407}
408#else
409static inline void cm_x300_init_leds(void) {}
410#endif
411
412#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
413/* PCA9555 */
414static struct pca953x_platform_data cm_x300_gpio_ext_pdata_0 = {
415 .gpio_base = 128,
416};
417
418static struct pca953x_platform_data cm_x300_gpio_ext_pdata_1 = {
419 .gpio_base = 144,
420};
421
422static struct i2c_board_info cm_x300_gpio_ext_info[] = {
423 [0] = {
424 I2C_BOARD_INFO("pca9555", 0x24),
425 .platform_data = &cm_x300_gpio_ext_pdata_0,
426 },
427 [1] = {
428 I2C_BOARD_INFO("pca9555", 0x25),
429 .platform_data = &cm_x300_gpio_ext_pdata_1,
430 },
431};
432
433static void __init cm_x300_init_i2c(void)
434{
435 pxa_set_i2c_info(NULL);
436 i2c_register_board_info(0, cm_x300_gpio_ext_info,
437 ARRAY_SIZE(cm_x300_gpio_ext_info));
438}
439#else
440static inline void cm_x300_init_i2c(void) {}
441#endif
442
443static void __init cm_x300_init(void)
444{
445 /* board-processor specific GPIO initialization */
446 pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x300_mfp_cfg));
447
448 cm_x300_init_dm9000();
449 cm_x300_init_lcd();
450 cm_x300_init_ohci();
451 cm_x300_init_mmc();
452 cm_x300_init_nand();
453 cm_x300_init_leds();
454 cm_x300_init_i2c();
455}
456
457MACHINE_START(CM_X300, "CM-X300 module")
458 .phys_io = 0x40000000,
459 .boot_params = 0xa0000100,
460 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
461 .map_io = pxa_map_io,
462 .init_irq = pxa3xx_init_irq,
463 .timer = &pxa_timer,
464 .init_machine = cm_x300_init,
465MACHINE_END
diff --git a/arch/arm/mach-pxa/colibri.c b/arch/arm/mach-pxa/colibri.c
index abce13c846c5..e8473624427e 100644
--- a/arch/arm/mach-pxa/colibri.c
+++ b/arch/arm/mach-pxa/colibri.c
@@ -29,12 +29,17 @@
29#include <asm/mach/irq.h> 29#include <asm/mach/irq.h>
30#include <asm/mach/flash.h> 30#include <asm/mach/flash.h>
31#include <mach/pxa-regs.h> 31#include <mach/pxa-regs.h>
32#include <mach/pxa2xx-gpio.h> 32#include <mach/mfp-pxa27x.h>
33#include <mach/colibri.h> 33#include <mach/colibri.h>
34 34
35#include "generic.h" 35#include "generic.h"
36#include "devices.h" 36#include "devices.h"
37 37
38static unsigned long colibri_pin_config[] __initdata = {
39 GPIO78_nCS_2, /* Ethernet CS */
40 GPIO114_GPIO, /* Ethernet IRQ */
41};
42
38/* 43/*
39 * Flash 44 * Flash
40 */ 45 */
@@ -116,9 +121,7 @@ static struct platform_device *colibri_devices[] __initdata = {
116 121
117static void __init colibri_init(void) 122static void __init colibri_init(void)
118{ 123{
119 /* DM9000 LAN */ 124 pxa2xx_mfp_config(ARRAY_AND_SIZE(colibri_pin_config));
120 pxa_gpio_mode(GPIO78_nCS_2_MD);
121 pxa_gpio_mode(GPIO_DM9000 | GPIO_IN);
122 125
123 platform_add_devices(colibri_devices, ARRAY_SIZE(colibri_devices)); 126 platform_add_devices(colibri_devices, ARRAY_SIZE(colibri_devices));
124} 127}
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index e703a8d209e2..65558d6aa220 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -20,7 +20,12 @@
20#include <linux/interrupt.h> 20#include <linux/interrupt.h>
21#include <linux/mmc/host.h> 21#include <linux/mmc/host.h>
22#include <linux/pm.h> 22#include <linux/pm.h>
23#include <linux/gpio.h>
23#include <linux/backlight.h> 24#include <linux/backlight.h>
25#include <linux/io.h>
26#include <linux/spi/spi.h>
27#include <linux/spi/ads7846.h>
28#include <linux/spi/corgi_lcd.h>
24#include <video/w100fb.h> 29#include <video/w100fb.h>
25 30
26#include <asm/setup.h> 31#include <asm/setup.h>
@@ -28,7 +33,6 @@
28#include <asm/mach-types.h> 33#include <asm/mach-types.h>
29#include <mach/hardware.h> 34#include <mach/hardware.h>
30#include <asm/irq.h> 35#include <asm/irq.h>
31#include <asm/io.h>
32#include <asm/system.h> 36#include <asm/system.h>
33 37
34#include <asm/mach/arch.h> 38#include <asm/mach/arch.h>
@@ -37,11 +41,12 @@
37 41
38#include <mach/pxa-regs.h> 42#include <mach/pxa-regs.h>
39#include <mach/pxa2xx-regs.h> 43#include <mach/pxa2xx-regs.h>
40#include <mach/pxa2xx-gpio.h> 44#include <mach/mfp-pxa25x.h>
41#include <mach/i2c.h> 45#include <mach/i2c.h>
42#include <mach/irda.h> 46#include <mach/irda.h>
43#include <mach/mmc.h> 47#include <mach/mmc.h>
44#include <mach/udc.h> 48#include <mach/udc.h>
49#include <mach/pxa2xx_spi.h>
45#include <mach/corgi.h> 50#include <mach/corgi.h>
46#include <mach/sharpsl.h> 51#include <mach/sharpsl.h>
47 52
@@ -52,6 +57,61 @@
52#include "devices.h" 57#include "devices.h"
53#include "sharpsl.h" 58#include "sharpsl.h"
54 59
60static unsigned long corgi_pin_config[] __initdata = {
61 /* Static Memory I/O */
62 GPIO78_nCS_2, /* w100fb */
63 GPIO80_nCS_4, /* scoop */
64
65 /* SSP1 */
66 GPIO23_SSP1_SCLK,
67 GPIO25_SSP1_TXD,
68 GPIO26_SSP1_RXD,
69 GPIO24_GPIO, /* CORGI_GPIO_ADS7846_CS - SFRM as chip select */
70
71 /* I2S */
72 GPIO28_I2S_BITCLK_OUT,
73 GPIO29_I2S_SDATA_IN,
74 GPIO30_I2S_SDATA_OUT,
75 GPIO31_I2S_SYNC,
76 GPIO32_I2S_SYSCLK,
77
78 /* Infra-Red */
79 GPIO47_FICP_TXD,
80 GPIO46_FICP_RXD,
81
82 /* FFUART */
83 GPIO40_FFUART_DTR,
84 GPIO41_FFUART_RTS,
85 GPIO39_FFUART_TXD,
86 GPIO37_FFUART_DSR,
87 GPIO34_FFUART_RXD,
88 GPIO35_FFUART_CTS,
89
90 /* PC Card */
91 GPIO48_nPOE,
92 GPIO49_nPWE,
93 GPIO50_nPIOR,
94 GPIO51_nPIOW,
95 GPIO52_nPCE_1,
96 GPIO53_nPCE_2,
97 GPIO54_nPSKTSEL,
98 GPIO55_nPREG,
99 GPIO56_nPWAIT,
100 GPIO57_nIOIS16,
101
102 /* MMC */
103 GPIO6_MMC_CLK,
104 GPIO8_MMC_CS0,
105
106 /* GPIO */
107 GPIO9_GPIO, /* CORGI_GPIO_nSD_DETECT */
108 GPIO7_GPIO, /* CORGI_GPIO_nSD_WP */
109 GPIO33_GPIO, /* CORGI_GPIO_SD_PWR */
110 GPIO22_GPIO, /* CORGI_GPIO_IR_ON */
111 GPIO44_GPIO, /* CORGI_GPIO_HSYNC */
112
113 GPIO1_GPIO | WAKEUP_ON_EDGE_RISE,
114};
55 115
56/* 116/*
57 * Corgi SCOOP Device 117 * Corgi SCOOP Device
@@ -67,6 +127,7 @@ static struct resource corgi_scoop_resources[] = {
67static struct scoop_config corgi_scoop_setup = { 127static struct scoop_config corgi_scoop_setup = {
68 .io_dir = CORGI_SCOOP_IO_DIR, 128 .io_dir = CORGI_SCOOP_IO_DIR,
69 .io_out = CORGI_SCOOP_IO_OUT, 129 .io_out = CORGI_SCOOP_IO_OUT,
130 .gpio_base = CORGI_SCOOP_GPIO_BASE,
70}; 131};
71 132
72struct platform_device corgiscoop_device = { 133struct platform_device corgiscoop_device = {
@@ -79,27 +140,6 @@ struct platform_device corgiscoop_device = {
79 .resource = corgi_scoop_resources, 140 .resource = corgi_scoop_resources,
80}; 141};
81 142
82static void corgi_pcmcia_init(void)
83{
84 /* Setup default state of GPIO outputs
85 before we enable them as outputs. */
86 GPSR(GPIO48_nPOE) = GPIO_bit(GPIO48_nPOE) |
87 GPIO_bit(GPIO49_nPWE) | GPIO_bit(GPIO50_nPIOR) |
88 GPIO_bit(GPIO51_nPIOW) | GPIO_bit(GPIO52_nPCE_1) |
89 GPIO_bit(GPIO53_nPCE_2);
90
91 pxa_gpio_mode(GPIO48_nPOE_MD);
92 pxa_gpio_mode(GPIO49_nPWE_MD);
93 pxa_gpio_mode(GPIO50_nPIOR_MD);
94 pxa_gpio_mode(GPIO51_nPIOW_MD);
95 pxa_gpio_mode(GPIO55_nPREG_MD);
96 pxa_gpio_mode(GPIO56_nPWAIT_MD);
97 pxa_gpio_mode(GPIO57_nIOIS16_MD);
98 pxa_gpio_mode(GPIO52_nPCE_1_MD);
99 pxa_gpio_mode(GPIO53_nPCE_2_MD);
100 pxa_gpio_mode(GPIO54_pSKTSEL_MD);
101}
102
103static struct scoop_pcmcia_dev corgi_pcmcia_scoop[] = { 143static struct scoop_pcmcia_dev corgi_pcmcia_scoop[] = {
104{ 144{
105 .dev = &corgiscoop_device.dev, 145 .dev = &corgiscoop_device.dev,
@@ -112,58 +152,10 @@ static struct scoop_pcmcia_dev corgi_pcmcia_scoop[] = {
112static struct scoop_pcmcia_config corgi_pcmcia_config = { 152static struct scoop_pcmcia_config corgi_pcmcia_config = {
113 .devs = &corgi_pcmcia_scoop[0], 153 .devs = &corgi_pcmcia_scoop[0],
114 .num_devs = 1, 154 .num_devs = 1,
115 .pcmcia_init = corgi_pcmcia_init,
116}; 155};
117 156
118EXPORT_SYMBOL(corgiscoop_device); 157EXPORT_SYMBOL(corgiscoop_device);
119 158
120
121/*
122 * Corgi SSP Device
123 *
124 * Set the parent as the scoop device because a lot of SSP devices
125 * also use scoop functions and this makes the power up/down order
126 * work correctly.
127 */
128struct platform_device corgissp_device = {
129 .name = "corgi-ssp",
130 .dev = {
131 .parent = &corgiscoop_device.dev,
132 },
133 .id = -1,
134};
135
136struct corgissp_machinfo corgi_ssp_machinfo = {
137 .port = 1,
138 .cs_lcdcon = CORGI_GPIO_LCDCON_CS,
139 .cs_ads7846 = CORGI_GPIO_ADS7846_CS,
140 .cs_max1111 = CORGI_GPIO_MAX1111_CS,
141 .clk_lcdcon = 76,
142 .clk_ads7846 = 2,
143 .clk_max1111 = 8,
144};
145
146
147/*
148 * LCD/Framebuffer
149 */
150static void w100_lcdtg_suspend(struct w100fb_par *par)
151{
152 corgi_lcdtg_suspend();
153}
154
155static void w100_lcdtg_init(struct w100fb_par *par)
156{
157 corgi_lcdtg_hw_init(par->xres);
158}
159
160
161static struct w100_tg_info corgi_lcdtg_info = {
162 .change = w100_lcdtg_init,
163 .suspend = w100_lcdtg_suspend,
164 .resume = w100_lcdtg_init,
165};
166
167static struct w100_mem_info corgi_fb_mem = { 159static struct w100_mem_info corgi_fb_mem = {
168 .ext_cntl = 0x00040003, 160 .ext_cntl = 0x00040003,
169 .sdram_mode_reg = 0x00650021, 161 .sdram_mode_reg = 0x00650021,
@@ -242,7 +234,6 @@ static struct w100_mode corgi_fb_modes[] = {
242}; 234};
243 235
244static struct w100fb_mach_info corgi_fb_info = { 236static struct w100fb_mach_info corgi_fb_info = {
245 .tg = &corgi_lcdtg_info,
246 .init_mode = INIT_MODE_ROTATED, 237 .init_mode = INIT_MODE_ROTATED,
247 .mem = &corgi_fb_mem, 238 .mem = &corgi_fb_mem,
248 .regs = &corgi_fb_regs, 239 .regs = &corgi_fb_regs,
@@ -268,60 +259,10 @@ static struct platform_device corgifb_device = {
268 .resource = corgi_fb_resources, 259 .resource = corgi_fb_resources,
269 .dev = { 260 .dev = {
270 .platform_data = &corgi_fb_info, 261 .platform_data = &corgi_fb_info,
271 .parent = &corgissp_device.dev,
272 }, 262 },
273 263
274}; 264};
275 265
276
277/*
278 * Corgi Backlight Device
279 */
280static void corgi_bl_kick_battery(void)
281{
282 void (*kick_batt)(void);
283
284 kick_batt = symbol_get(sharpsl_battery_kick);
285 if (kick_batt) {
286 kick_batt();
287 symbol_put(sharpsl_battery_kick);
288 }
289}
290
291static void corgi_bl_set_intensity(int intensity)
292{
293 if (intensity > 0x10)
294 intensity += 0x10;
295
296 /* Bits 0-4 are accessed via the SSP interface */
297 corgi_ssp_blduty_set(intensity & 0x1f);
298
299 /* Bit 5 is via SCOOP */
300 if (intensity & 0x0020)
301 set_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_BACKLIGHT_CONT);
302 else
303 reset_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_BACKLIGHT_CONT);
304}
305
306static struct generic_bl_info corgi_bl_machinfo = {
307 .name = "corgi-bl",
308 .max_intensity = 0x2f,
309 .default_intensity = 0x1f,
310 .limit_mask = 0x0b,
311 .set_bl_intensity = corgi_bl_set_intensity,
312 .kick_battery = corgi_bl_kick_battery,
313};
314
315static struct platform_device corgibl_device = {
316 .name = "generic-bl",
317 .dev = {
318 .parent = &corgifb_device.dev,
319 .platform_data = &corgi_bl_machinfo,
320 },
321 .id = -1,
322};
323
324
325/* 266/*
326 * Corgi Keyboard Device 267 * Corgi Keyboard Device
327 */ 268 */
@@ -330,75 +271,35 @@ static struct platform_device corgikbd_device = {
330 .id = -1, 271 .id = -1,
331}; 272};
332 273
333
334/* 274/*
335 * Corgi LEDs 275 * Corgi LEDs
336 */ 276 */
337static struct platform_device corgiled_device = { 277static struct gpio_led corgi_gpio_leds[] = {
338 .name = "corgi-led", 278 {
339 .id = -1, 279 .name = "corgi:amber:charge",
340}; 280 .default_trigger = "sharpsl-charge",
341 281 .gpio = CORGI_GPIO_LED_ORANGE,
342 282 },
343/* 283 {
344 * Corgi Touch Screen Device 284 .name = "corgi:green:mail",
345 */ 285 .default_trigger = "nand-disk",
346static unsigned long (*get_hsync_invperiod)(struct device *dev); 286 .gpio = CORGI_GPIO_LED_GREEN,
347
348static void inline sharpsl_wait_sync(int gpio)
349{
350 while((GPLR(gpio) & GPIO_bit(gpio)) == 0);
351 while((GPLR(gpio) & GPIO_bit(gpio)) != 0);
352}
353
354static unsigned long corgi_get_hsync_invperiod(void)
355{
356 if (!get_hsync_invperiod)
357 get_hsync_invperiod = symbol_get(w100fb_get_hsynclen);
358 if (!get_hsync_invperiod)
359 return 0;
360
361 return get_hsync_invperiod(&corgifb_device.dev);
362}
363
364static void corgi_put_hsync(void)
365{
366 if (get_hsync_invperiod)
367 symbol_put(w100fb_get_hsynclen);
368 get_hsync_invperiod = NULL;
369}
370
371static void corgi_wait_hsync(void)
372{
373 sharpsl_wait_sync(CORGI_GPIO_HSYNC);
374}
375
376static struct resource corgits_resources[] = {
377 [0] = {
378 .start = CORGI_IRQ_GPIO_TP_INT,
379 .end = CORGI_IRQ_GPIO_TP_INT,
380 .flags = IORESOURCE_IRQ,
381 }, 287 },
382}; 288};
383 289
384static struct corgits_machinfo corgi_ts_machinfo = { 290static struct gpio_led_platform_data corgi_gpio_leds_info = {
385 .get_hsync_invperiod = corgi_get_hsync_invperiod, 291 .leds = corgi_gpio_leds,
386 .put_hsync = corgi_put_hsync, 292 .num_leds = ARRAY_SIZE(corgi_gpio_leds),
387 .wait_hsync = corgi_wait_hsync,
388}; 293};
389 294
390static struct platform_device corgits_device = { 295static struct platform_device corgiled_device = {
391 .name = "corgi-ts", 296 .name = "leds-gpio",
297 .id = -1,
392 .dev = { 298 .dev = {
393 .parent = &corgissp_device.dev, 299 .platform_data = &corgi_gpio_leds_info,
394 .platform_data = &corgi_ts_machinfo,
395 }, 300 },
396 .id = -1,
397 .num_resources = ARRAY_SIZE(corgits_resources),
398 .resource = corgits_resources,
399}; 301};
400 302
401
402/* 303/*
403 * MMC/SD Device 304 * MMC/SD Device
404 * 305 *
@@ -411,20 +312,42 @@ static int corgi_mci_init(struct device *dev, irq_handler_t corgi_detect_int, vo
411{ 312{
412 int err; 313 int err;
413 314
414 /* setup GPIO for PXA25x MMC controller */ 315 err = gpio_request(CORGI_GPIO_nSD_DETECT, "nSD_DETECT");
415 pxa_gpio_mode(GPIO6_MMCCLK_MD); 316 if (err)
416 pxa_gpio_mode(GPIO8_MMCCS0_MD); 317 goto err_out;
417 pxa_gpio_mode(CORGI_GPIO_nSD_DETECT | GPIO_IN);
418 pxa_gpio_mode(CORGI_GPIO_SD_PWR | GPIO_OUT);
419 318
420 corgi_mci_platform_data.detect_delay = msecs_to_jiffies(250); 319 err = gpio_request(CORGI_GPIO_nSD_WP, "nSD_WP");
320 if (err)
321 goto err_free_1;
421 322
422 err = request_irq(CORGI_IRQ_GPIO_nSD_DETECT, corgi_detect_int, 323 err = gpio_request(CORGI_GPIO_SD_PWR, "SD_PWR");
423 IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
424 "MMC card detect", data);
425 if (err) 324 if (err)
426 printk(KERN_ERR "corgi_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); 325 goto err_free_2;
427 326
327 gpio_direction_input(CORGI_GPIO_nSD_DETECT);
328 gpio_direction_input(CORGI_GPIO_nSD_WP);
329 gpio_direction_output(CORGI_GPIO_SD_PWR, 0);
330
331 corgi_mci_platform_data.detect_delay = msecs_to_jiffies(250);
332
333 err = request_irq(CORGI_IRQ_GPIO_nSD_DETECT, corgi_detect_int,
334 IRQF_DISABLED | IRQF_TRIGGER_RISING |
335 IRQF_TRIGGER_FALLING,
336 "MMC card detect", data);
337 if (err) {
338 pr_err("%s: MMC/SD: can't request MMC card detect IRQ\n",
339 __func__);
340 goto err_free_3;
341 }
342 return 0;
343
344err_free_3:
345 gpio_free(CORGI_GPIO_SD_PWR);
346err_free_2:
347 gpio_free(CORGI_GPIO_nSD_WP);
348err_free_1:
349 gpio_free(CORGI_GPIO_nSD_DETECT);
350err_out:
428 return err; 351 return err;
429} 352}
430 353
@@ -432,20 +355,20 @@ static void corgi_mci_setpower(struct device *dev, unsigned int vdd)
432{ 355{
433 struct pxamci_platform_data* p_d = dev->platform_data; 356 struct pxamci_platform_data* p_d = dev->platform_data;
434 357
435 if (( 1 << vdd) & p_d->ocr_mask) 358 gpio_set_value(CORGI_GPIO_SD_PWR, ((1 << vdd) & p_d->ocr_mask));
436 GPSR1 = GPIO_bit(CORGI_GPIO_SD_PWR);
437 else
438 GPCR1 = GPIO_bit(CORGI_GPIO_SD_PWR);
439} 359}
440 360
441static int corgi_mci_get_ro(struct device *dev) 361static int corgi_mci_get_ro(struct device *dev)
442{ 362{
443 return GPLR(CORGI_GPIO_nSD_WP) & GPIO_bit(CORGI_GPIO_nSD_WP); 363 return gpio_get_value(CORGI_GPIO_nSD_WP);
444} 364}
445 365
446static void corgi_mci_exit(struct device *dev, void *data) 366static void corgi_mci_exit(struct device *dev, void *data)
447{ 367{
448 free_irq(CORGI_IRQ_GPIO_nSD_DETECT, data); 368 free_irq(CORGI_IRQ_GPIO_nSD_DETECT, data);
369 gpio_free(CORGI_GPIO_SD_PWR);
370 gpio_free(CORGI_GPIO_nSD_WP);
371 gpio_free(CORGI_GPIO_nSD_DETECT);
449} 372}
450 373
451static struct pxamci_platform_data corgi_mci_platform_data = { 374static struct pxamci_platform_data corgi_mci_platform_data = {
@@ -462,16 +385,32 @@ static struct pxamci_platform_data corgi_mci_platform_data = {
462 */ 385 */
463static void corgi_irda_transceiver_mode(struct device *dev, int mode) 386static void corgi_irda_transceiver_mode(struct device *dev, int mode)
464{ 387{
465 if (mode & IR_OFF) 388 gpio_set_value(CORGI_GPIO_IR_ON, mode & IR_OFF);
466 GPSR(CORGI_GPIO_IR_ON) = GPIO_bit(CORGI_GPIO_IR_ON);
467 else
468 GPCR(CORGI_GPIO_IR_ON) = GPIO_bit(CORGI_GPIO_IR_ON);
469 pxa2xx_transceiver_mode(dev, mode); 389 pxa2xx_transceiver_mode(dev, mode);
470} 390}
471 391
392static int corgi_irda_startup(struct device *dev)
393{
394 int err;
395
396 err = gpio_request(CORGI_GPIO_IR_ON, "IR_ON");
397 if (err)
398 return err;
399
400 gpio_direction_output(CORGI_GPIO_IR_ON, 1);
401 return 0;
402}
403
404static void corgi_irda_shutdown(struct device *dev)
405{
406 gpio_free(CORGI_GPIO_IR_ON);
407}
408
472static struct pxaficp_platform_data corgi_ficp_platform_data = { 409static struct pxaficp_platform_data corgi_ficp_platform_data = {
473 .transceiver_cap = IR_SIRMODE | IR_OFF, 410 .transceiver_cap = IR_SIRMODE | IR_OFF,
474 .transceiver_mode = corgi_irda_transceiver_mode, 411 .transceiver_mode = corgi_irda_transceiver_mode,
412 .startup = corgi_irda_startup,
413 .shutdown = corgi_irda_shutdown,
475}; 414};
476 415
477 416
@@ -483,14 +422,129 @@ static struct pxa2xx_udc_mach_info udc_info __initdata = {
483 .gpio_pullup = CORGI_GPIO_USB_PULLUP, 422 .gpio_pullup = CORGI_GPIO_USB_PULLUP,
484}; 423};
485 424
425#if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MASTER)
426static struct pxa2xx_spi_master corgi_spi_info = {
427 .num_chipselect = 3,
428};
429
430static struct ads7846_platform_data corgi_ads7846_info = {
431 .model = 7846,
432 .vref_delay_usecs = 100,
433 .x_plate_ohms = 419,
434 .y_plate_ohms = 486,
435 .gpio_pendown = CORGI_GPIO_TP_INT,
436};
437
438static void corgi_ads7846_cs(u32 command)
439{
440 gpio_set_value(CORGI_GPIO_ADS7846_CS, !(command == PXA2XX_CS_ASSERT));
441}
442
443static struct pxa2xx_spi_chip corgi_ads7846_chip = {
444 .cs_control = corgi_ads7846_cs,
445};
446
447static void corgi_bl_kick_battery(void)
448{
449 void (*kick_batt)(void);
450
451 kick_batt = symbol_get(sharpsl_battery_kick);
452 if (kick_batt) {
453 kick_batt();
454 symbol_put(sharpsl_battery_kick);
455 }
456}
457
458static struct corgi_lcd_platform_data corgi_lcdcon_info = {
459 .init_mode = CORGI_LCD_MODE_VGA,
460 .max_intensity = 0x2f,
461 .default_intensity = 0x1f,
462 .limit_mask = 0x0b,
463 .gpio_backlight_cont = CORGI_GPIO_BACKLIGHT_CONT,
464 .gpio_backlight_on = -1,
465 .kick_battery = corgi_bl_kick_battery,
466};
467
468static void corgi_lcdcon_cs(u32 command)
469{
470 gpio_set_value(CORGI_GPIO_LCDCON_CS, !(command == PXA2XX_CS_ASSERT));
471}
472
473static struct pxa2xx_spi_chip corgi_lcdcon_chip = {
474 .cs_control = corgi_lcdcon_cs,
475};
476
477static void corgi_max1111_cs(u32 command)
478{
479 gpio_set_value(CORGI_GPIO_MAX1111_CS, !(command == PXA2XX_CS_ASSERT));
480}
481
482static struct pxa2xx_spi_chip corgi_max1111_chip = {
483 .cs_control = corgi_max1111_cs,
484};
485
486static struct spi_board_info corgi_spi_devices[] = {
487 {
488 .modalias = "ads7846",
489 .max_speed_hz = 1200000,
490 .bus_num = 1,
491 .chip_select = 0,
492 .platform_data = &corgi_ads7846_info,
493 .controller_data= &corgi_ads7846_chip,
494 .irq = gpio_to_irq(CORGI_GPIO_TP_INT),
495 }, {
496 .modalias = "corgi-lcd",
497 .max_speed_hz = 50000,
498 .bus_num = 1,
499 .chip_select = 1,
500 .platform_data = &corgi_lcdcon_info,
501 .controller_data= &corgi_lcdcon_chip,
502 }, {
503 .modalias = "max1111",
504 .max_speed_hz = 450000,
505 .bus_num = 1,
506 .chip_select = 2,
507 .controller_data= &corgi_max1111_chip,
508 },
509};
510
511static void __init corgi_init_spi(void)
512{
513 int err;
514
515 err = gpio_request(CORGI_GPIO_ADS7846_CS, "ADS7846_CS");
516 if (err)
517 return;
518
519 err = gpio_request(CORGI_GPIO_LCDCON_CS, "LCDCON_CS");
520 if (err)
521 goto err_free_1;
522
523 err = gpio_request(CORGI_GPIO_MAX1111_CS, "MAX1111_CS");
524 if (err)
525 goto err_free_2;
526
527 gpio_direction_output(CORGI_GPIO_ADS7846_CS, 1);
528 gpio_direction_output(CORGI_GPIO_LCDCON_CS, 1);
529 gpio_direction_output(CORGI_GPIO_MAX1111_CS, 1);
530
531 pxa2xx_set_spi_info(1, &corgi_spi_info);
532 spi_register_board_info(ARRAY_AND_SIZE(corgi_spi_devices));
533 return;
534
535err_free_2:
536 gpio_free(CORGI_GPIO_LCDCON_CS);
537err_free_1:
538 gpio_free(CORGI_GPIO_ADS7846_CS);
539}
540#else
541static inline void corgi_init_spi(void) {}
542#endif
486 543
487static struct platform_device *devices[] __initdata = { 544static struct platform_device *devices[] __initdata = {
488 &corgiscoop_device, 545 &corgiscoop_device,
489 &corgissp_device,
490 &corgifb_device, 546 &corgifb_device,
491 &corgikbd_device, 547 &corgikbd_device,
492 &corgibl_device,
493 &corgits_device,
494 &corgiled_device, 548 &corgiled_device,
495}; 549};
496 550
@@ -498,7 +552,8 @@ static void corgi_poweroff(void)
498{ 552{
499 if (!machine_is_corgi()) 553 if (!machine_is_corgi())
500 /* Green LED off tells the bootloader to halt */ 554 /* Green LED off tells the bootloader to halt */
501 reset_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_LED_GREEN); 555 gpio_set_value(CORGI_GPIO_LED_GREEN, 0);
556
502 arm_machine_restart('h'); 557 arm_machine_restart('h');
503} 558}
504 559
@@ -506,7 +561,8 @@ static void corgi_restart(char mode)
506{ 561{
507 if (!machine_is_corgi()) 562 if (!machine_is_corgi())
508 /* Green LED on tells the bootloader to reboot */ 563 /* Green LED on tells the bootloader to reboot */
509 set_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_LED_GREEN); 564 gpio_set_value(CORGI_GPIO_LED_GREEN, 1);
565
510 arm_machine_restart('h'); 566 arm_machine_restart('h');
511} 567}
512 568
@@ -515,20 +571,12 @@ static void __init corgi_init(void)
515 pm_power_off = corgi_poweroff; 571 pm_power_off = corgi_poweroff;
516 arm_pm_restart = corgi_restart; 572 arm_pm_restart = corgi_restart;
517 573
518 /* setup sleep mode values */
519 PWER = 0x00000002;
520 PFER = 0x00000000;
521 PRER = 0x00000002;
522 PGSR0 = 0x0158C000;
523 PGSR1 = 0x00FF0080;
524 PGSR2 = 0x0001C004;
525 /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */ 574 /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */
526 PCFR |= PCFR_OPDE; 575 PCFR |= PCFR_OPDE;
527 576
528 corgi_ssp_set_machinfo(&corgi_ssp_machinfo); 577 pxa2xx_mfp_config(ARRAY_AND_SIZE(corgi_pin_config));
529 578
530 pxa_gpio_mode(CORGI_GPIO_IR_ON | GPIO_OUT); 579 corgi_init_spi();
531 pxa_gpio_mode(CORGI_GPIO_HSYNC | GPIO_IN);
532 580
533 pxa_set_udc_info(&udc_info); 581 pxa_set_udc_info(&udc_info);
534 pxa_set_mci_info(&corgi_mci_platform_data); 582 pxa_set_mci_info(&corgi_mci_platform_data);
diff --git a/arch/arm/mach-pxa/corgi_lcd.c b/arch/arm/mach-pxa/corgi_lcd.c
deleted file mode 100644
index 311baf149b07..000000000000
--- a/arch/arm/mach-pxa/corgi_lcd.c
+++ /dev/null
@@ -1,290 +0,0 @@
1/*
2 * linux/arch/arm/mach-pxa/corgi_lcd.c
3 *
4 * Corgi/Spitz LCD Specific Code
5 *
6 * Copyright (C) 2005 Richard Purdie
7 *
8 * Connectivity:
9 * Corgi - LCD to ATI Imageon w100 (Wallaby)
10 * Spitz - LCD to PXA Framebuffer
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
16 */
17
18#include <linux/delay.h>
19#include <linux/kernel.h>
20#include <linux/platform_device.h>
21#include <linux/module.h>
22#include <linux/string.h>
23#include <mach/akita.h>
24#include <mach/corgi.h>
25#include <mach/hardware.h>
26#include <mach/pxa-regs.h>
27#include <mach/sharpsl.h>
28#include <mach/spitz.h>
29#include <asm/hardware/scoop.h>
30#include <asm/mach/sharpsl_param.h>
31#include "generic.h"
32
33/* Register Addresses */
34#define RESCTL_ADRS 0x00
35#define PHACTRL_ADRS 0x01
36#define DUTYCTRL_ADRS 0x02
37#define POWERREG0_ADRS 0x03
38#define POWERREG1_ADRS 0x04
39#define GPOR3_ADRS 0x05
40#define PICTRL_ADRS 0x06
41#define POLCTRL_ADRS 0x07
42
43/* Register Bit Definitions */
44#define RESCTL_QVGA 0x01
45#define RESCTL_VGA 0x00
46
47#define POWER1_VW_ON 0x01 /* VW Supply FET ON */
48#define POWER1_GVSS_ON 0x02 /* GVSS(-8V) Power Supply ON */
49#define POWER1_VDD_ON 0x04 /* VDD(8V),SVSS(-4V) Power Supply ON */
50
51#define POWER1_VW_OFF 0x00 /* VW Supply FET OFF */
52#define POWER1_GVSS_OFF 0x00 /* GVSS(-8V) Power Supply OFF */
53#define POWER1_VDD_OFF 0x00 /* VDD(8V),SVSS(-4V) Power Supply OFF */
54
55#define POWER0_COM_DCLK 0x01 /* COM Voltage DC Bias DAC Serial Data Clock */
56#define POWER0_COM_DOUT 0x02 /* COM Voltage DC Bias DAC Serial Data Out */
57#define POWER0_DAC_ON 0x04 /* DAC Power Supply ON */
58#define POWER0_COM_ON 0x08 /* COM Power Supply ON */
59#define POWER0_VCC5_ON 0x10 /* VCC5 Power Supply ON */
60
61#define POWER0_DAC_OFF 0x00 /* DAC Power Supply OFF */
62#define POWER0_COM_OFF 0x00 /* COM Power Supply OFF */
63#define POWER0_VCC5_OFF 0x00 /* VCC5 Power Supply OFF */
64
65#define PICTRL_INIT_STATE 0x01
66#define PICTRL_INIOFF 0x02
67#define PICTRL_POWER_DOWN 0x04
68#define PICTRL_COM_SIGNAL_OFF 0x08
69#define PICTRL_DAC_SIGNAL_OFF 0x10
70
71#define POLCTRL_SYNC_POL_FALL 0x01
72#define POLCTRL_EN_POL_FALL 0x02
73#define POLCTRL_DATA_POL_FALL 0x04
74#define POLCTRL_SYNC_ACT_H 0x08
75#define POLCTRL_EN_ACT_L 0x10
76
77#define POLCTRL_SYNC_POL_RISE 0x00
78#define POLCTRL_EN_POL_RISE 0x00
79#define POLCTRL_DATA_POL_RISE 0x00
80#define POLCTRL_SYNC_ACT_L 0x00
81#define POLCTRL_EN_ACT_H 0x00
82
83#define PHACTRL_PHASE_MANUAL 0x01
84#define DEFAULT_PHAD_QVGA (9)
85#define DEFAULT_COMADJ (125)
86
87/*
88 * This is only a psuedo I2C interface. We can't use the standard kernel
89 * routines as the interface is write only. We just assume the data is acked...
90 */
91static void lcdtg_ssp_i2c_send(u8 data)
92{
93 corgi_ssp_lcdtg_send(POWERREG0_ADRS, data);
94 udelay(10);
95}
96
97static void lcdtg_i2c_send_bit(u8 data)
98{
99 lcdtg_ssp_i2c_send(data);
100 lcdtg_ssp_i2c_send(data | POWER0_COM_DCLK);
101 lcdtg_ssp_i2c_send(data);
102}
103
104static void lcdtg_i2c_send_start(u8 base)
105{
106 lcdtg_ssp_i2c_send(base | POWER0_COM_DCLK | POWER0_COM_DOUT);
107 lcdtg_ssp_i2c_send(base | POWER0_COM_DCLK);
108 lcdtg_ssp_i2c_send(base);
109}
110
111static void lcdtg_i2c_send_stop(u8 base)
112{
113 lcdtg_ssp_i2c_send(base);
114 lcdtg_ssp_i2c_send(base | POWER0_COM_DCLK);
115 lcdtg_ssp_i2c_send(base | POWER0_COM_DCLK | POWER0_COM_DOUT);
116}
117
118static void lcdtg_i2c_send_byte(u8 base, u8 data)
119{
120 int i;
121 for (i = 0; i < 8; i++) {
122 if (data & 0x80)
123 lcdtg_i2c_send_bit(base | POWER0_COM_DOUT);
124 else
125 lcdtg_i2c_send_bit(base);
126 data <<= 1;
127 }
128}
129
130static void lcdtg_i2c_wait_ack(u8 base)
131{
132 lcdtg_i2c_send_bit(base);
133}
134
135static void lcdtg_set_common_voltage(u8 base_data, u8 data)
136{
137 /* Set Common Voltage to M62332FP via I2C */
138 lcdtg_i2c_send_start(base_data);
139 lcdtg_i2c_send_byte(base_data, 0x9c);
140 lcdtg_i2c_wait_ack(base_data);
141 lcdtg_i2c_send_byte(base_data, 0x00);
142 lcdtg_i2c_wait_ack(base_data);
143 lcdtg_i2c_send_byte(base_data, data);
144 lcdtg_i2c_wait_ack(base_data);
145 lcdtg_i2c_send_stop(base_data);
146}
147
148/* Set Phase Adjust */
149static void lcdtg_set_phadadj(int mode)
150{
151 int adj;
152 switch(mode) {
153 case 480:
154 case 640:
155 /* Setting for VGA */
156 adj = sharpsl_param.phadadj;
157 if (adj < 0) {
158 adj = PHACTRL_PHASE_MANUAL;
159 } else {
160 adj = ((adj & 0x0f) << 1) | PHACTRL_PHASE_MANUAL;
161 }
162 break;
163 case 240:
164 case 320:
165 default:
166 /* Setting for QVGA */
167 adj = (DEFAULT_PHAD_QVGA << 1) | PHACTRL_PHASE_MANUAL;
168 break;
169 }
170
171 corgi_ssp_lcdtg_send(PHACTRL_ADRS, adj);
172}
173
174static int lcd_inited;
175
176void corgi_lcdtg_hw_init(int mode)
177{
178 if (!lcd_inited) {
179 int comadj;
180
181 /* Initialize Internal Logic & Port */
182 corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_POWER_DOWN | PICTRL_INIOFF | PICTRL_INIT_STATE
183 | PICTRL_COM_SIGNAL_OFF | PICTRL_DAC_SIGNAL_OFF);
184
185 corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_OFF
186 | POWER0_COM_OFF | POWER0_VCC5_OFF);
187
188 corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_OFF);
189
190 /* VDD(+8V), SVSS(-4V) ON */
191 corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_ON);
192 mdelay(3);
193
194 /* DAC ON */
195 corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON
196 | POWER0_COM_OFF | POWER0_VCC5_OFF);
197
198 /* INIB = H, INI = L */
199 /* PICTL[0] = H , PICTL[1] = PICTL[2] = PICTL[4] = L */
200 corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_INIT_STATE | PICTRL_COM_SIGNAL_OFF);
201
202 /* Set Common Voltage */
203 comadj = sharpsl_param.comadj;
204 if (comadj < 0)
205 comadj = DEFAULT_COMADJ;
206 lcdtg_set_common_voltage((POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_OFF), comadj);
207
208 /* VCC5 ON, DAC ON */
209 corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON |
210 POWER0_COM_OFF | POWER0_VCC5_ON);
211
212 /* GVSS(-8V) ON, VDD ON */
213 corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_ON | POWER1_VDD_ON);
214 mdelay(2);
215
216 /* COM SIGNAL ON (PICTL[3] = L) */
217 corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_INIT_STATE);
218
219 /* COM ON, DAC ON, VCC5_ON */
220 corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON
221 | POWER0_COM_ON | POWER0_VCC5_ON);
222
223 /* VW ON, GVSS ON, VDD ON */
224 corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_ON | POWER1_GVSS_ON | POWER1_VDD_ON);
225
226 /* Signals output enable */
227 corgi_ssp_lcdtg_send(PICTRL_ADRS, 0);
228
229 /* Set Phase Adjust */
230 lcdtg_set_phadadj(mode);
231
232 /* Initialize for Input Signals from ATI */
233 corgi_ssp_lcdtg_send(POLCTRL_ADRS, POLCTRL_SYNC_POL_RISE | POLCTRL_EN_POL_RISE
234 | POLCTRL_DATA_POL_RISE | POLCTRL_SYNC_ACT_L | POLCTRL_EN_ACT_H);
235 udelay(1000);
236
237 lcd_inited=1;
238 } else {
239 lcdtg_set_phadadj(mode);
240 }
241
242 switch(mode) {
243 case 480:
244 case 640:
245 /* Set Lcd Resolution (VGA) */
246 corgi_ssp_lcdtg_send(RESCTL_ADRS, RESCTL_VGA);
247 break;
248 case 240:
249 case 320:
250 default:
251 /* Set Lcd Resolution (QVGA) */
252 corgi_ssp_lcdtg_send(RESCTL_ADRS, RESCTL_QVGA);
253 break;
254 }
255}
256
257void corgi_lcdtg_suspend(void)
258{
259 /* 60Hz x 2 frame = 16.7msec x 2 = 33.4 msec */
260 mdelay(34);
261
262 /* (1)VW OFF */
263 corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_ON | POWER1_VDD_ON);
264
265 /* (2)COM OFF */
266 corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_COM_SIGNAL_OFF);
267 corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_ON);
268
269 /* (3)Set Common Voltage Bias 0V */
270 lcdtg_set_common_voltage(POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_ON, 0);
271
272 /* (4)GVSS OFF */
273 corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_ON);
274
275 /* (5)VCC5 OFF */
276 corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_OFF);
277
278 /* (6)Set PDWN, INIOFF, DACOFF */
279 corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_INIOFF | PICTRL_DAC_SIGNAL_OFF |
280 PICTRL_POWER_DOWN | PICTRL_COM_SIGNAL_OFF);
281
282 /* (7)DAC OFF */
283 corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_DAC_OFF | POWER0_COM_OFF | POWER0_VCC5_OFF);
284
285 /* (8)VDD OFF */
286 corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_OFF);
287
288 lcd_inited = 0;
289}
290
diff --git a/arch/arm/mach-pxa/corgi_pm.c b/arch/arm/mach-pxa/corgi_pm.c
index 35bbfccd2df3..eb7d6c94aa42 100644
--- a/arch/arm/mach-pxa/corgi_pm.c
+++ b/arch/arm/mach-pxa/corgi_pm.c
@@ -21,7 +21,6 @@
21#include <asm/irq.h> 21#include <asm/irq.h>
22#include <asm/mach-types.h> 22#include <asm/mach-types.h>
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24#include <asm/hardware/scoop.h>
25 24
26#include <mach/sharpsl.h> 25#include <mach/sharpsl.h>
27#include <mach/corgi.h> 26#include <mach/corgi.h>
diff --git a/arch/arm/mach-pxa/corgi_ssp.c b/arch/arm/mach-pxa/corgi_ssp.c
deleted file mode 100644
index 8e2f2215c4ba..000000000000
--- a/arch/arm/mach-pxa/corgi_ssp.c
+++ /dev/null
@@ -1,276 +0,0 @@
1/*
2 * SSP control code for Sharp Corgi devices
3 *
4 * Copyright (c) 2004-2005 Richard Purdie
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/kernel.h>
15#include <linux/sched.h>
16#include <linux/slab.h>
17#include <linux/delay.h>
18#include <linux/platform_device.h>
19#include <mach/hardware.h>
20#include <asm/mach-types.h>
21
22#include <mach/ssp.h>
23#include <mach/pxa-regs.h>
24#include <mach/pxa2xx-gpio.h>
25#include <mach/regs-ssp.h>
26#include "sharpsl.h"
27
28static DEFINE_SPINLOCK(corgi_ssp_lock);
29static struct ssp_dev corgi_ssp_dev;
30static struct ssp_state corgi_ssp_state;
31static struct corgissp_machinfo *ssp_machinfo;
32
33/*
34 * There are three devices connected to the SSP interface:
35 * 1. A touchscreen controller (TI ADS7846 compatible)
36 * 2. An LCD controller (with some Backlight functionality)
37 * 3. A battery monitoring IC (Maxim MAX1111)
38 *
39 * Each device uses a different speed/mode of communication.
40 *
41 * The touchscreen is very sensitive and the most frequently used
42 * so the port is left configured for this.
43 *
44 * Devices are selected using Chip Selects on GPIOs.
45 */
46
47/*
48 * ADS7846 Routines
49 */
50unsigned long corgi_ssp_ads7846_putget(ulong data)
51{
52 unsigned long flag;
53 u32 ret = 0;
54
55 spin_lock_irqsave(&corgi_ssp_lock, flag);
56 if (ssp_machinfo->cs_ads7846 >= 0)
57 GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
58
59 ssp_write_word(&corgi_ssp_dev,data);
60 ssp_read_word(&corgi_ssp_dev, &ret);
61
62 if (ssp_machinfo->cs_ads7846 >= 0)
63 GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
64 spin_unlock_irqrestore(&corgi_ssp_lock, flag);
65
66 return ret;
67}
68
69/*
70 * NOTE: These functions should always be called in interrupt context
71 * and use the _lock and _unlock functions. They are very time sensitive.
72 */
73void corgi_ssp_ads7846_lock(void)
74{
75 spin_lock(&corgi_ssp_lock);
76 if (ssp_machinfo->cs_ads7846 >= 0)
77 GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
78}
79
80void corgi_ssp_ads7846_unlock(void)
81{
82 if (ssp_machinfo->cs_ads7846 >= 0)
83 GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
84 spin_unlock(&corgi_ssp_lock);
85}
86
87void corgi_ssp_ads7846_put(ulong data)
88{
89 ssp_write_word(&corgi_ssp_dev,data);
90}
91
92unsigned long corgi_ssp_ads7846_get(void)
93{
94 u32 ret = 0;
95 ssp_read_word(&corgi_ssp_dev, &ret);
96 return ret;
97}
98
99EXPORT_SYMBOL(corgi_ssp_ads7846_putget);
100EXPORT_SYMBOL(corgi_ssp_ads7846_lock);
101EXPORT_SYMBOL(corgi_ssp_ads7846_unlock);
102EXPORT_SYMBOL(corgi_ssp_ads7846_put);
103EXPORT_SYMBOL(corgi_ssp_ads7846_get);
104
105
106/*
107 * LCD/Backlight Routines
108 */
109unsigned long corgi_ssp_dac_put(ulong data)
110{
111 unsigned long flag, sscr1 = SSCR1_SPH;
112 u32 tmp;
113
114 spin_lock_irqsave(&corgi_ssp_lock, flag);
115
116 if (machine_is_spitz() || machine_is_akita() || machine_is_borzoi())
117 sscr1 = 0;
118
119 ssp_disable(&corgi_ssp_dev);
120 ssp_config(&corgi_ssp_dev, (SSCR0_Motorola | (SSCR0_DSS & 0x07 )), sscr1, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_lcdcon));
121 ssp_enable(&corgi_ssp_dev);
122
123 if (ssp_machinfo->cs_lcdcon >= 0)
124 GPCR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon);
125 ssp_write_word(&corgi_ssp_dev,data);
126 /* Read null data back from device to prevent SSP overflow */
127 ssp_read_word(&corgi_ssp_dev, &tmp);
128 if (ssp_machinfo->cs_lcdcon >= 0)
129 GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon);
130
131 ssp_disable(&corgi_ssp_dev);
132 ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846));
133 ssp_enable(&corgi_ssp_dev);
134
135 spin_unlock_irqrestore(&corgi_ssp_lock, flag);
136
137 return 0;
138}
139
140void corgi_ssp_lcdtg_send(u8 adrs, u8 data)
141{
142 corgi_ssp_dac_put(((adrs & 0x07) << 5) | (data & 0x1f));
143}
144
145void corgi_ssp_blduty_set(int duty)
146{
147 corgi_ssp_lcdtg_send(0x02,duty);
148}
149
150EXPORT_SYMBOL(corgi_ssp_lcdtg_send);
151EXPORT_SYMBOL(corgi_ssp_blduty_set);
152
153/*
154 * Max1111 Routines
155 */
156int corgi_ssp_max1111_get(ulong data)
157{
158 unsigned long flag;
159 long voltage = 0, voltage1 = 0, voltage2 = 0;
160
161 spin_lock_irqsave(&corgi_ssp_lock, flag);
162 if (ssp_machinfo->cs_max1111 >= 0)
163 GPCR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111);
164 ssp_disable(&corgi_ssp_dev);
165 ssp_config(&corgi_ssp_dev, (SSCR0_Motorola | (SSCR0_DSS & 0x07 )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_max1111));
166 ssp_enable(&corgi_ssp_dev);
167
168 udelay(1);
169
170 /* TB1/RB1 */
171 ssp_write_word(&corgi_ssp_dev,data);
172 ssp_read_word(&corgi_ssp_dev, (u32*)&voltage1); /* null read */
173
174 /* TB12/RB2 */
175 ssp_write_word(&corgi_ssp_dev,0);
176 ssp_read_word(&corgi_ssp_dev, (u32*)&voltage1);
177
178 /* TB13/RB3*/
179 ssp_write_word(&corgi_ssp_dev,0);
180 ssp_read_word(&corgi_ssp_dev, (u32*)&voltage2);
181
182 ssp_disable(&corgi_ssp_dev);
183 ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846));
184 ssp_enable(&corgi_ssp_dev);
185 if (ssp_machinfo->cs_max1111 >= 0)
186 GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111);
187 spin_unlock_irqrestore(&corgi_ssp_lock, flag);
188
189 if (voltage1 & 0xc0 || voltage2 & 0x3f)
190 voltage = -1;
191 else
192 voltage = ((voltage1 << 2) & 0xfc) | ((voltage2 >> 6) & 0x03);
193
194 return voltage;
195}
196
197EXPORT_SYMBOL(corgi_ssp_max1111_get);
198
199/*
200 * Support Routines
201 */
202
203void __init corgi_ssp_set_machinfo(struct corgissp_machinfo *machinfo)
204{
205 ssp_machinfo = machinfo;
206}
207
208static int __init corgi_ssp_probe(struct platform_device *dev)
209{
210 int ret;
211
212 /* Chip Select - Disable All */
213 if (ssp_machinfo->cs_lcdcon >= 0)
214 pxa_gpio_mode(ssp_machinfo->cs_lcdcon | GPIO_OUT | GPIO_DFLT_HIGH);
215 if (ssp_machinfo->cs_max1111 >= 0)
216 pxa_gpio_mode(ssp_machinfo->cs_max1111 | GPIO_OUT | GPIO_DFLT_HIGH);
217 if (ssp_machinfo->cs_ads7846 >= 0)
218 pxa_gpio_mode(ssp_machinfo->cs_ads7846 | GPIO_OUT | GPIO_DFLT_HIGH);
219
220 ret = ssp_init(&corgi_ssp_dev, ssp_machinfo->port, 0);
221
222 if (ret)
223 printk(KERN_ERR "Unable to register SSP handler!\n");
224 else {
225 ssp_disable(&corgi_ssp_dev);
226 ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846));
227 ssp_enable(&corgi_ssp_dev);
228 }
229
230 return ret;
231}
232
233static int corgi_ssp_remove(struct platform_device *dev)
234{
235 ssp_exit(&corgi_ssp_dev);
236 return 0;
237}
238
239static int corgi_ssp_suspend(struct platform_device *dev, pm_message_t state)
240{
241 ssp_flush(&corgi_ssp_dev);
242 ssp_save_state(&corgi_ssp_dev,&corgi_ssp_state);
243
244 return 0;
245}
246
247static int corgi_ssp_resume(struct platform_device *dev)
248{
249 if (ssp_machinfo->cs_lcdcon >= 0)
250 GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); /* High - Disable LCD Control/Timing Gen */
251 if (ssp_machinfo->cs_max1111 >= 0)
252 GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111); /* High - Disable MAX1111*/
253 if (ssp_machinfo->cs_ads7846 >= 0)
254 GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); /* High - Disable ADS7846*/
255 ssp_restore_state(&corgi_ssp_dev,&corgi_ssp_state);
256 ssp_enable(&corgi_ssp_dev);
257
258 return 0;
259}
260
261static struct platform_driver corgissp_driver = {
262 .probe = corgi_ssp_probe,
263 .remove = corgi_ssp_remove,
264 .suspend = corgi_ssp_suspend,
265 .resume = corgi_ssp_resume,
266 .driver = {
267 .name = "corgi-ssp",
268 },
269};
270
271int __init corgi_ssp_init(void)
272{
273 return platform_driver_register(&corgissp_driver);
274}
275
276arch_initcall(corgi_ssp_init);
diff --git a/arch/arm/mach-pxa/cpu-pxa.c b/arch/arm/mach-pxa/cpufreq-pxa2xx.c
index 6f5569bac131..d82528e74bd0 100644
--- a/arch/arm/mach-pxa/cpu-pxa.c
+++ b/arch/arm/mach-pxa/cpufreq-pxa2xx.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-pxa/cpu-pxa.c 2 * linux/arch/arm/mach-pxa/cpufreq-pxa2xx.c
3 * 3 *
4 * Copyright (C) 2002,2003 Intrinsyc Software 4 * Copyright (C) 2002,2003 Intrinsyc Software
5 * 5 *
diff --git a/arch/arm/mach-pxa/cpufreq-pxa3xx.c b/arch/arm/mach-pxa/cpufreq-pxa3xx.c
new file mode 100644
index 000000000000..1ea0c9c0adaf
--- /dev/null
+++ b/arch/arm/mach-pxa/cpufreq-pxa3xx.c
@@ -0,0 +1,258 @@
1/*
2 * linux/arch/arm/mach-pxa/cpufreq-pxa3xx.c
3 *
4 * Copyright (C) 2008 Marvell International Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <linux/kernel.h>
13#include <linux/module.h>
14#include <linux/sched.h>
15#include <linux/init.h>
16#include <linux/cpufreq.h>
17
18#include <mach/hardware.h>
19#include <mach/pxa-regs.h>
20#include <mach/pxa3xx-regs.h>
21
22#include "generic.h"
23
24#define HSS_104M (0)
25#define HSS_156M (1)
26#define HSS_208M (2)
27#define HSS_312M (3)
28
29#define SMCFS_78M (0)
30#define SMCFS_104M (2)
31#define SMCFS_208M (5)
32
33#define SFLFS_104M (0)
34#define SFLFS_156M (1)
35#define SFLFS_208M (2)
36#define SFLFS_312M (3)
37
38#define XSPCLK_156M (0)
39#define XSPCLK_NONE (3)
40
41#define DMCFS_26M (0)
42#define DMCFS_260M (3)
43
44struct pxa3xx_freq_info {
45 unsigned int cpufreq_mhz;
46 unsigned int core_xl : 5;
47 unsigned int core_xn : 3;
48 unsigned int hss : 2;
49 unsigned int dmcfs : 2;
50 unsigned int smcfs : 3;
51 unsigned int sflfs : 2;
52 unsigned int df_clkdiv : 3;
53
54 int vcc_core; /* in mV */
55 int vcc_sram; /* in mV */
56};
57
58#define OP(cpufreq, _xl, _xn, _hss, _dmc, _smc, _sfl, _dfi, vcore, vsram) \
59{ \
60 .cpufreq_mhz = cpufreq, \
61 .core_xl = _xl, \
62 .core_xn = _xn, \
63 .hss = HSS_##_hss##M, \
64 .dmcfs = DMCFS_##_dmc##M, \
65 .smcfs = SMCFS_##_smc##M, \
66 .sflfs = SFLFS_##_sfl##M, \
67 .df_clkdiv = _dfi, \
68 .vcc_core = vcore, \
69 .vcc_sram = vsram, \
70}
71
72static struct pxa3xx_freq_info pxa300_freqs[] = {
73 /* CPU XL XN HSS DMEM SMEM SRAM DFI VCC_CORE VCC_SRAM */
74 OP(104, 8, 1, 104, 260, 78, 104, 3, 1000, 1100), /* 104MHz */
75 OP(208, 16, 1, 104, 260, 104, 156, 2, 1000, 1100), /* 208MHz */
76 OP(416, 16, 2, 156, 260, 104, 208, 2, 1100, 1200), /* 416MHz */
77 OP(624, 24, 2, 208, 260, 208, 312, 3, 1375, 1400), /* 624MHz */
78};
79
80static struct pxa3xx_freq_info pxa320_freqs[] = {
81 /* CPU XL XN HSS DMEM SMEM SRAM DFI VCC_CORE VCC_SRAM */
82 OP(104, 8, 1, 104, 260, 78, 104, 3, 1000, 1100), /* 104MHz */
83 OP(208, 16, 1, 104, 260, 104, 156, 2, 1000, 1100), /* 208MHz */
84 OP(416, 16, 2, 156, 260, 104, 208, 2, 1100, 1200), /* 416MHz */
85 OP(624, 24, 2, 208, 260, 208, 312, 3, 1375, 1400), /* 624MHz */
86 OP(806, 31, 2, 208, 260, 208, 312, 3, 1400, 1400), /* 806MHz */
87};
88
89static unsigned int pxa3xx_freqs_num;
90static struct pxa3xx_freq_info *pxa3xx_freqs;
91static struct cpufreq_frequency_table *pxa3xx_freqs_table;
92
93static int setup_freqs_table(struct cpufreq_policy *policy,
94 struct pxa3xx_freq_info *freqs, int num)
95{
96 struct cpufreq_frequency_table *table;
97 int i;
98
99 table = kzalloc((num + 1) * sizeof(*table), GFP_KERNEL);
100 if (table == NULL)
101 return -ENOMEM;
102
103 for (i = 0; i < num; i++) {
104 table[i].index = i;
105 table[i].frequency = freqs[i].cpufreq_mhz * 1000;
106 }
107 table[num].frequency = i;
108 table[num].frequency = CPUFREQ_TABLE_END;
109
110 pxa3xx_freqs = freqs;
111 pxa3xx_freqs_num = num;
112 pxa3xx_freqs_table = table;
113
114 return cpufreq_frequency_table_cpuinfo(policy, table);
115}
116
117static void __update_core_freq(struct pxa3xx_freq_info *info)
118{
119 uint32_t mask = ACCR_XN_MASK | ACCR_XL_MASK;
120 uint32_t accr = ACCR;
121 uint32_t xclkcfg;
122
123 accr &= ~(ACCR_XN_MASK | ACCR_XL_MASK | ACCR_XSPCLK_MASK);
124 accr |= ACCR_XN(info->core_xn) | ACCR_XL(info->core_xl);
125
126 /* No clock until core PLL is re-locked */
127 accr |= ACCR_XSPCLK(XSPCLK_NONE);
128
129 xclkcfg = (info->core_xn == 2) ? 0x3 : 0x2; /* turbo bit */
130
131 ACCR = accr;
132 __asm__("mcr p14, 0, %0, c6, c0, 0\n" : : "r"(xclkcfg));
133
134 while ((ACSR & mask) != (accr & mask))
135 cpu_relax();
136}
137
138static void __update_bus_freq(struct pxa3xx_freq_info *info)
139{
140 uint32_t mask;
141 uint32_t accr = ACCR;
142
143 mask = ACCR_SMCFS_MASK | ACCR_SFLFS_MASK | ACCR_HSS_MASK |
144 ACCR_DMCFS_MASK;
145
146 accr &= ~mask;
147 accr |= ACCR_SMCFS(info->smcfs) | ACCR_SFLFS(info->sflfs) |
148 ACCR_HSS(info->hss) | ACCR_DMCFS(info->dmcfs);
149
150 ACCR = accr;
151
152 while ((ACSR & mask) != (accr & mask))
153 cpu_relax();
154}
155
156static int pxa3xx_cpufreq_verify(struct cpufreq_policy *policy)
157{
158 return cpufreq_frequency_table_verify(policy, pxa3xx_freqs_table);
159}
160
161static unsigned int pxa3xx_cpufreq_get(unsigned int cpu)
162{
163 return get_clk_frequency_khz(0);
164}
165
166static int pxa3xx_cpufreq_set(struct cpufreq_policy *policy,
167 unsigned int target_freq,
168 unsigned int relation)
169{
170 struct pxa3xx_freq_info *next;
171 struct cpufreq_freqs freqs;
172 unsigned long flags;
173 int idx;
174
175 if (policy->cpu != 0)
176 return -EINVAL;
177
178 /* Lookup the next frequency */
179 if (cpufreq_frequency_table_target(policy, pxa3xx_freqs_table,
180 target_freq, relation, &idx))
181 return -EINVAL;
182
183 next = &pxa3xx_freqs[idx];
184
185 freqs.old = policy->cur;
186 freqs.new = next->cpufreq_mhz * 1000;
187 freqs.cpu = policy->cpu;
188
189 pr_debug("CPU frequency from %d MHz to %d MHz%s\n",
190 freqs.old / 1000, freqs.new / 1000,
191 (freqs.old == freqs.new) ? " (skipped)" : "");
192
193 if (freqs.old == target_freq)
194 return 0;
195
196 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
197
198 local_irq_save(flags);
199 __update_core_freq(next);
200 __update_bus_freq(next);
201 local_irq_restore(flags);
202
203 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
204
205 return 0;
206}
207
208static __init int pxa3xx_cpufreq_init(struct cpufreq_policy *policy)
209{
210 int ret = -EINVAL;
211
212 /* set default policy and cpuinfo */
213 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
214 policy->cpuinfo.min_freq = 104000;
215 policy->cpuinfo.max_freq = (cpu_is_pxa320()) ? 806000 : 624000;
216 policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */
217 policy->cur = policy->min = policy->max = get_clk_frequency_khz(0);
218
219 if (cpu_is_pxa300() || cpu_is_pxa310())
220 ret = setup_freqs_table(policy, ARRAY_AND_SIZE(pxa300_freqs));
221
222 if (cpu_is_pxa320())
223 ret = setup_freqs_table(policy, ARRAY_AND_SIZE(pxa320_freqs));
224
225 if (ret) {
226 pr_err("failed to setup frequency table\n");
227 return ret;
228 }
229
230 pr_info("CPUFREQ support for PXA3xx initialized\n");
231 return 0;
232}
233
234static struct cpufreq_driver pxa3xx_cpufreq_driver = {
235 .verify = pxa3xx_cpufreq_verify,
236 .target = pxa3xx_cpufreq_set,
237 .init = pxa3xx_cpufreq_init,
238 .get = pxa3xx_cpufreq_get,
239 .name = "pxa3xx-cpufreq",
240};
241
242static int __init cpufreq_init(void)
243{
244 if (cpu_is_pxa3xx())
245 return cpufreq_register_driver(&pxa3xx_cpufreq_driver);
246
247 return 0;
248}
249module_init(cpufreq_init);
250
251static void __exit cpufreq_exit(void)
252{
253 cpufreq_unregister_driver(&pxa3xx_cpufreq_driver);
254}
255module_exit(cpufreq_exit);
256
257MODULE_DESCRIPTION("CPU frequency scaling driver for PXA3xx");
258MODULE_LICENSE("GPL");
diff --git a/arch/arm/mach-pxa/devices.h b/arch/arm/mach-pxa/devices.h
index 887c738f5911..bb04af4b0aa3 100644
--- a/arch/arm/mach-pxa/devices.h
+++ b/arch/arm/mach-pxa/devices.h
@@ -32,5 +32,6 @@ extern struct platform_device pxa27x_device_pwm0;
32extern struct platform_device pxa27x_device_pwm1; 32extern struct platform_device pxa27x_device_pwm1;
33 33
34extern struct platform_device pxa3xx_device_nand; 34extern struct platform_device pxa3xx_device_nand;
35extern struct platform_device pxa3xx_device_i2c_power;
35 36
36void __init pxa_register_device(struct platform_device *dev, void *data); 37void __init pxa_register_device(struct platform_device *dev, void *data);
diff --git a/arch/arm/mach-pxa/e330.c b/arch/arm/mach-pxa/e330.c
new file mode 100644
index 000000000000..d488eded2058
--- /dev/null
+++ b/arch/arm/mach-pxa/e330.c
@@ -0,0 +1,43 @@
1/*
2 * Hardware definitions for the Toshiba eseries PDAs
3 *
4 * Copyright (c) 2003 Ian Molton <spyro@f2s.com>
5 *
6 * This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 *
11 */
12
13#include <linux/kernel.h>
14#include <linux/init.h>
15
16#include <asm/setup.h>
17#include <asm/mach/arch.h>
18#include <asm/mach-types.h>
19
20#include <mach/mfp-pxa25x.h>
21#include <mach/hardware.h>
22#include <mach/udc.h>
23
24#include "generic.h"
25#include "eseries.h"
26
27static void __init e330_init(void)
28{
29 pxa_set_udc_info(&e7xx_udc_mach_info);
30}
31
32MACHINE_START(E330, "Toshiba e330")
33 /* Maintainer: Ian Molton (spyro@f2s.com) */
34 .phys_io = 0x40000000,
35 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
36 .boot_params = 0xa0000100,
37 .map_io = pxa_map_io,
38 .init_irq = pxa25x_init_irq,
39 .fixup = eseries_fixup,
40 .init_machine = e330_init,
41 .timer = &pxa_timer,
42MACHINE_END
43
diff --git a/arch/arm/mach-pxa/e350.c b/arch/arm/mach-pxa/e350.c
new file mode 100644
index 000000000000..8ecbc5479828
--- /dev/null
+++ b/arch/arm/mach-pxa/e350.c
@@ -0,0 +1,43 @@
1/*
2 * Hardware definitions for the Toshiba eseries PDAs
3 *
4 * Copyright (c) 2003 Ian Molton <spyro@f2s.com>
5 *
6 * This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 *
11 */
12
13#include <linux/kernel.h>
14#include <linux/init.h>
15
16#include <asm/setup.h>
17#include <asm/mach/arch.h>
18#include <asm/mach-types.h>
19
20#include <mach/mfp-pxa25x.h>
21#include <mach/hardware.h>
22#include <mach/udc.h>
23
24#include "generic.h"
25#include "eseries.h"
26
27static void __init e350_init(void)
28{
29 pxa_set_udc_info(&e7xx_udc_mach_info);
30}
31
32MACHINE_START(E350, "Toshiba e350")
33 /* Maintainer: Ian Molton (spyro@f2s.com) */
34 .phys_io = 0x40000000,
35 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
36 .boot_params = 0xa0000100,
37 .map_io = pxa_map_io,
38 .init_irq = pxa25x_init_irq,
39 .fixup = eseries_fixup,
40 .init_machine = e350_init,
41 .timer = &pxa_timer,
42MACHINE_END
43
diff --git a/arch/arm/mach-pxa/e400.c b/arch/arm/mach-pxa/e400.c
new file mode 100644
index 000000000000..544bbaa20621
--- /dev/null
+++ b/arch/arm/mach-pxa/e400.c
@@ -0,0 +1,94 @@
1/*
2 * Hardware definitions for the Toshiba eseries PDAs
3 *
4 * Copyright (c) 2003 Ian Molton <spyro@f2s.com>
5 *
6 * This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 *
11 */
12
13#include <linux/kernel.h>
14#include <linux/init.h>
15
16#include <asm/setup.h>
17#include <asm/mach/arch.h>
18#include <asm/mach-types.h>
19
20#include <mach/pxa-regs.h>
21#include <mach/mfp-pxa25x.h>
22#include <mach/hardware.h>
23
24#include <mach/pxafb.h>
25#include <mach/udc.h>
26
27#include "generic.h"
28#include "eseries.h"
29
30/* ------------------------ E400 LCD definitions ------------------------ */
31
32static struct pxafb_mode_info e400_pxafb_mode_info = {
33 .pixclock = 140703,
34 .xres = 240,
35 .yres = 320,
36 .bpp = 16,
37 .hsync_len = 4,
38 .left_margin = 28,
39 .right_margin = 8,
40 .vsync_len = 3,
41 .upper_margin = 5,
42 .lower_margin = 6,
43 .sync = 0,
44};
45
46static struct pxafb_mach_info e400_pxafb_mach_info = {
47 .modes = &e400_pxafb_mode_info,
48 .num_modes = 1,
49 .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
50 .lccr3 = 0,
51 .pxafb_backlight_power = NULL,
52};
53
54/* ------------------------ E400 MFP config ----------------------------- */
55
56static unsigned long e400_pin_config[] __initdata = {
57 /* Chip selects */
58 GPIO15_nCS_1, /* CS1 - Flash */
59 GPIO80_nCS_4, /* CS4 - TMIO */
60
61 /* Clocks */
62 GPIO12_32KHz,
63
64 /* BTUART */
65 GPIO42_BTUART_RXD,
66 GPIO43_BTUART_TXD,
67 GPIO44_BTUART_CTS,
68 GPIO45_GPIO, /* Used by TMIO for #SUSPEND */
69
70 /* wakeup */
71 GPIO0_GPIO | WAKEUP_ON_EDGE_RISE,
72};
73
74/* ---------------------------------------------------------------------- */
75
76static void __init e400_init(void)
77{
78 pxa2xx_mfp_config(ARRAY_AND_SIZE(e400_pin_config));
79 set_pxa_fb_info(&e400_pxafb_mach_info);
80 pxa_set_udc_info(&e7xx_udc_mach_info);
81}
82
83MACHINE_START(E400, "Toshiba e400")
84 /* Maintainer: Ian Molton (spyro@f2s.com) */
85 .phys_io = 0x40000000,
86 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
87 .boot_params = 0xa0000100,
88 .map_io = pxa_map_io,
89 .init_irq = pxa25x_init_irq,
90 .fixup = eseries_fixup,
91 .init_machine = e400_init,
92 .timer = &pxa_timer,
93MACHINE_END
94
diff --git a/arch/arm/mach-pxa/e400_lcd.c b/arch/arm/mach-pxa/e400_lcd.c
deleted file mode 100644
index 263884165f57..000000000000
--- a/arch/arm/mach-pxa/e400_lcd.c
+++ /dev/null
@@ -1,56 +0,0 @@
1/*
2 * e400_lcd.c
3 *
4 * (c) 2005 Ian Molton <spyro@f2s.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/module.h>
15
16#include <asm/mach-types.h>
17#include <mach/pxa-regs.h>
18#include <mach/pxafb.h>
19
20static struct pxafb_mode_info e400_pxafb_mode_info = {
21 .pixclock = 140703,
22 .xres = 240,
23 .yres = 320,
24 .bpp = 16,
25 .hsync_len = 4,
26 .left_margin = 28,
27 .right_margin = 8,
28 .vsync_len = 3,
29 .upper_margin = 5,
30 .lower_margin = 6,
31 .sync = 0,
32};
33
34static struct pxafb_mach_info e400_pxafb_mach_info = {
35 .modes = &e400_pxafb_mode_info,
36 .num_modes = 1,
37 .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
38 .lccr3 = 0,
39 .pxafb_backlight_power = NULL,
40};
41
42static int __init e400_lcd_init(void)
43{
44 if (!machine_is_e400())
45 return -ENODEV;
46
47 set_pxa_fb_info(&e400_pxafb_mach_info);
48 return 0;
49}
50
51module_init(e400_lcd_init);
52
53MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
54MODULE_DESCRIPTION("e400 lcd driver");
55MODULE_LICENSE("GPLv2");
56
diff --git a/arch/arm/mach-pxa/e740.c b/arch/arm/mach-pxa/e740.c
new file mode 100644
index 000000000000..c57a15b37f0d
--- /dev/null
+++ b/arch/arm/mach-pxa/e740.c
@@ -0,0 +1,169 @@
1/*
2 * Hardware definitions for the Toshiba eseries PDAs
3 *
4 * Copyright (c) 2003 Ian Molton <spyro@f2s.com>
5 *
6 * This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 *
11 */
12
13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/device.h>
16#include <linux/platform_device.h>
17#include <linux/fb.h>
18
19#include <video/w100fb.h>
20
21#include <asm/setup.h>
22#include <asm/mach/arch.h>
23#include <asm/mach-types.h>
24
25#include <mach/mfp-pxa25x.h>
26#include <mach/hardware.h>
27#include <mach/udc.h>
28
29#include "generic.h"
30#include "eseries.h"
31
32
33/* ------------------------ e740 video support --------------------------- */
34
35static struct w100_gen_regs e740_lcd_regs = {
36 .lcd_format = 0x00008023,
37 .lcdd_cntl1 = 0x0f000000,
38 .lcdd_cntl2 = 0x0003ffff,
39 .genlcd_cntl1 = 0x00ffff03,
40 .genlcd_cntl2 = 0x003c0f03,
41 .genlcd_cntl3 = 0x000143aa,
42};
43
44static struct w100_mode e740_lcd_mode = {
45 .xres = 240,
46 .yres = 320,
47 .left_margin = 20,
48 .right_margin = 28,
49 .upper_margin = 9,
50 .lower_margin = 8,
51 .crtc_ss = 0x80140013,
52 .crtc_ls = 0x81150110,
53 .crtc_gs = 0x80050005,
54 .crtc_vpos_gs = 0x000a0009,
55 .crtc_rev = 0x0040010a,
56 .crtc_dclk = 0xa906000a,
57 .crtc_gclk = 0x80050108,
58 .crtc_goe = 0x80050108,
59 .pll_freq = 57,
60 .pixclk_divider = 4,
61 .pixclk_divider_rotated = 4,
62 .pixclk_src = CLK_SRC_XTAL,
63 .sysclk_divider = 1,
64 .sysclk_src = CLK_SRC_PLL,
65 .crtc_ps1_active = 0x41060010,
66};
67
68static struct w100_gpio_regs e740_w100_gpio_info = {
69 .init_data1 = 0x21002103,
70 .gpio_dir1 = 0xffffdeff,
71 .gpio_oe1 = 0x03c00643,
72 .init_data2 = 0x003f003f,
73 .gpio_dir2 = 0xffffffff,
74 .gpio_oe2 = 0x000000ff,
75};
76
77static struct w100fb_mach_info e740_fb_info = {
78 .modelist = &e740_lcd_mode,
79 .num_modes = 1,
80 .regs = &e740_lcd_regs,
81 .gpio = &e740_w100_gpio_info,
82 .xtal_freq = 14318000,
83 .xtal_dbl = 1,
84};
85
86static struct resource e740_fb_resources[] = {
87 [0] = {
88 .start = 0x0c000000,
89 .end = 0x0cffffff,
90 .flags = IORESOURCE_MEM,
91 },
92};
93
94static struct platform_device e740_fb_device = {
95 .name = "w100fb",
96 .id = -1,
97 .dev = {
98 .platform_data = &e740_fb_info,
99 },
100 .num_resources = ARRAY_SIZE(e740_fb_resources),
101 .resource = e740_fb_resources,
102};
103
104/* --------------------------- MFP Pin config -------------------------- */
105
106static unsigned long e740_pin_config[] __initdata = {
107 /* Chip selects */
108 GPIO15_nCS_1, /* CS1 - Flash */
109 GPIO79_nCS_3, /* CS3 - IMAGEON */
110 GPIO80_nCS_4, /* CS4 - TMIO */
111
112 /* Clocks */
113 GPIO12_32KHz,
114
115 /* BTUART */
116 GPIO42_BTUART_RXD,
117 GPIO43_BTUART_TXD,
118 GPIO44_BTUART_CTS,
119 GPIO45_GPIO, /* Used by TMIO for #SUSPEND */
120
121 /* PC Card */
122 GPIO8_GPIO, /* CD0 */
123 GPIO44_GPIO, /* CD1 */
124 GPIO11_GPIO, /* IRQ0 */
125 GPIO6_GPIO, /* IRQ1 */
126 GPIO27_GPIO, /* RST0 */
127 GPIO24_GPIO, /* RST1 */
128 GPIO20_GPIO, /* PWR0 */
129 GPIO23_GPIO, /* PWR1 */
130 GPIO48_nPOE,
131 GPIO49_nPWE,
132 GPIO50_nPIOR,
133 GPIO51_nPIOW,
134 GPIO52_nPCE_1,
135 GPIO53_nPCE_2,
136 GPIO54_nPSKTSEL,
137 GPIO55_nPREG,
138 GPIO56_nPWAIT,
139 GPIO57_nIOIS16,
140
141 /* wakeup */
142 GPIO0_GPIO | WAKEUP_ON_EDGE_RISE,
143};
144
145/* ----------------------------------------------------------------------- */
146
147static struct platform_device *devices[] __initdata = {
148 &e740_fb_device,
149};
150
151static void __init e740_init(void)
152{
153 pxa2xx_mfp_config(ARRAY_AND_SIZE(e740_pin_config));
154 platform_add_devices(devices, ARRAY_SIZE(devices));
155 pxa_set_udc_info(&e7xx_udc_mach_info);
156}
157
158MACHINE_START(E740, "Toshiba e740")
159 /* Maintainer: Ian Molton (spyro@f2s.com) */
160 .phys_io = 0x40000000,
161 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
162 .boot_params = 0xa0000100,
163 .map_io = pxa_map_io,
164 .init_irq = pxa25x_init_irq,
165 .fixup = eseries_fixup,
166 .init_machine = e740_init,
167 .timer = &pxa_timer,
168MACHINE_END
169
diff --git a/arch/arm/mach-pxa/e740_lcd.c b/arch/arm/mach-pxa/e740_lcd.c
deleted file mode 100644
index 26bd599af178..000000000000
--- a/arch/arm/mach-pxa/e740_lcd.c
+++ /dev/null
@@ -1,123 +0,0 @@
1/* e740_lcd.c
2 *
3 * This file contains the definitions for the LCD timings and functions
4 * to control the LCD power / frontlighting via the w100fb driver.
5 *
6 * (c) 2005 Ian Molton <spyro@f2s.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13
14#include <linux/module.h>
15#include <linux/device.h>
16#include <linux/fb.h>
17#include <linux/err.h>
18#include <linux/platform_device.h>
19
20#include <asm/mach-types.h>
21
22#include <video/w100fb.h>
23
24/*
25**potential** shutdown routine - to be investigated
26devmem2 0x0c010528 w 0xff3fff00
27devmem2 0x0c010190 w 0x7FFF8000
28devmem2 0x0c0101b0 w 0x00FF0000
29devmem2 0x0c01008c w 0x00000000
30devmem2 0x0c010080 w 0x000000bf
31devmem2 0x0c010098 w 0x00000015
32devmem2 0x0c010088 w 0x4b000204
33devmem2 0x0c010098 w 0x0000001d
34*/
35
36static struct w100_gen_regs e740_lcd_regs = {
37 .lcd_format = 0x00008023,
38 .lcdd_cntl1 = 0x0f000000,
39 .lcdd_cntl2 = 0x0003ffff,
40 .genlcd_cntl1 = 0x00ffff03,
41 .genlcd_cntl2 = 0x003c0f03,
42 .genlcd_cntl3 = 0x000143aa,
43};
44
45static struct w100_mode e740_lcd_mode = {
46 .xres = 240,
47 .yres = 320,
48 .left_margin = 20,
49 .right_margin = 28,
50 .upper_margin = 9,
51 .lower_margin = 8,
52 .crtc_ss = 0x80140013,
53 .crtc_ls = 0x81150110,
54 .crtc_gs = 0x80050005,
55 .crtc_vpos_gs = 0x000a0009,
56 .crtc_rev = 0x0040010a,
57 .crtc_dclk = 0xa906000a,
58 .crtc_gclk = 0x80050108,
59 .crtc_goe = 0x80050108,
60 .pll_freq = 57,
61 .pixclk_divider = 4,
62 .pixclk_divider_rotated = 4,
63 .pixclk_src = CLK_SRC_XTAL,
64 .sysclk_divider = 1,
65 .sysclk_src = CLK_SRC_PLL,
66 .crtc_ps1_active = 0x41060010,
67};
68
69
70static struct w100_gpio_regs e740_w100_gpio_info = {
71 .init_data1 = 0x21002103,
72 .gpio_dir1 = 0xffffdeff,
73 .gpio_oe1 = 0x03c00643,
74 .init_data2 = 0x003f003f,
75 .gpio_dir2 = 0xffffffff,
76 .gpio_oe2 = 0x000000ff,
77};
78
79static struct w100fb_mach_info e740_fb_info = {
80 .modelist = &e740_lcd_mode,
81 .num_modes = 1,
82 .regs = &e740_lcd_regs,
83 .gpio = &e740_w100_gpio_info,
84 .xtal_freq = 14318000,
85 .xtal_dbl = 1,
86};
87
88static struct resource e740_fb_resources[] = {
89 [0] = {
90 .start = 0x0c000000,
91 .end = 0x0cffffff,
92 .flags = IORESOURCE_MEM,
93 },
94};
95
96/* ----------------------- device declarations -------------------------- */
97
98
99static struct platform_device e740_fb_device = {
100 .name = "w100fb",
101 .id = -1,
102 .dev = {
103 .platform_data = &e740_fb_info,
104 },
105 .num_resources = ARRAY_SIZE(e740_fb_resources),
106 .resource = e740_fb_resources,
107};
108
109static int e740_lcd_init(void)
110{
111 int ret;
112
113 if (!machine_is_e740())
114 return -ENODEV;
115
116 return platform_device_register(&e740_fb_device);
117}
118
119module_init(e740_lcd_init);
120
121MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
122MODULE_DESCRIPTION("e740 lcd driver");
123MODULE_LICENSE("GPLv2");
diff --git a/arch/arm/mach-pxa/e750_lcd.c b/arch/arm/mach-pxa/e750.c
index 75edc3b5390f..640e738b85df 100644
--- a/arch/arm/mach-pxa/e750_lcd.c
+++ b/arch/arm/mach-pxa/e750.c
@@ -1,25 +1,35 @@
1/* e750_lcd.c 1/*
2 * Hardware definitions for the Toshiba eseries PDAs
2 * 3 *
3 * This file contains the definitions for the LCD timings and functions 4 * Copyright (c) 2003 Ian Molton <spyro@f2s.com>
4 * to control the LCD power / frontlighting via the w100fb driver.
5 * 5 *
6 * (c) 2005 Ian Molton <spyro@f2s.com> 6 * This file is licensed under
7 * 7 * the terms of the GNU General Public License version 2. This program
8 * This program is free software; you can redistribute it and/or modify 8 * is licensed "as is" without any warranty of any kind, whether express
9 * it under the terms of the GNU General Public License version 2 as 9 * or implied.
10 * published by the Free Software Foundation.
11 * 10 *
12 */ 11 */
13 12
14#include <linux/module.h> 13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/device.h> 15#include <linux/device.h>
16#include <linux/fb.h>
17#include <linux/err.h>
18#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17#include <linux/fb.h>
18
19#include <video/w100fb.h>
19 20
21#include <asm/setup.h>
22#include <asm/mach/arch.h>
20#include <asm/mach-types.h> 23#include <asm/mach-types.h>
21 24
22#include <video/w100fb.h> 25#include <mach/mfp-pxa25x.h>
26#include <mach/hardware.h>
27#include <mach/udc.h>
28
29#include "generic.h"
30#include "eseries.h"
31
32/* ---------------------- E750 LCD definitions -------------------- */
23 33
24static struct w100_gen_regs e750_lcd_regs = { 34static struct w100_gen_regs e750_lcd_regs = {
25 .lcd_format = 0x00008003, 35 .lcd_format = 0x00008003,
@@ -54,7 +64,6 @@ static struct w100_mode e750_lcd_mode = {
54 .sysclk_src = CLK_SRC_PLL, 64 .sysclk_src = CLK_SRC_PLL,
55}; 65};
56 66
57
58static struct w100_gpio_regs e750_w100_gpio_info = { 67static struct w100_gpio_regs e750_w100_gpio_info = {
59 .init_data1 = 0x01192f1b, 68 .init_data1 = 0x01192f1b,
60 .gpio_dir1 = 0xd5ffdeff, 69 .gpio_dir1 = 0xd5ffdeff,
@@ -81,9 +90,6 @@ static struct resource e750_fb_resources[] = {
81 }, 90 },
82}; 91};
83 92
84/* ----------------------- device declarations -------------------------- */
85
86
87static struct platform_device e750_fb_device = { 93static struct platform_device e750_fb_device = {
88 .name = "w100fb", 94 .name = "w100fb",
89 .id = -1, 95 .id = -1,
@@ -94,16 +100,27 @@ static struct platform_device e750_fb_device = {
94 .resource = e750_fb_resources, 100 .resource = e750_fb_resources,
95}; 101};
96 102
97static int e750_lcd_init(void) 103/* ----------------------------------------------------------------------- */
98{
99 if (!machine_is_e750())
100 return -ENODEV;
101 104
102 return platform_device_register(&e750_fb_device); 105static struct platform_device *devices[] __initdata = {
106 &e750_fb_device,
107};
108
109static void __init e750_init(void)
110{
111 platform_add_devices(devices, ARRAY_SIZE(devices));
112 pxa_set_udc_info(&e7xx_udc_mach_info);
103} 113}
104 114
105module_init(e750_lcd_init); 115MACHINE_START(E750, "Toshiba e750")
116 /* Maintainer: Ian Molton (spyro@f2s.com) */
117 .phys_io = 0x40000000,
118 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
119 .boot_params = 0xa0000100,
120 .map_io = pxa_map_io,
121 .init_irq = pxa25x_init_irq,
122 .fixup = eseries_fixup,
123 .init_machine = e750_init,
124 .timer = &pxa_timer,
125MACHINE_END
106 126
107MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
108MODULE_DESCRIPTION("e750 lcd driver");
109MODULE_LICENSE("GPLv2");
diff --git a/arch/arm/mach-pxa/e800_lcd.c b/arch/arm/mach-pxa/e800.c
index e6aeab0ebc22..a293e09bfe25 100644
--- a/arch/arm/mach-pxa/e800_lcd.c
+++ b/arch/arm/mach-pxa/e800.c
@@ -1,25 +1,36 @@
1/* e800_lcd.c 1/*
2 * Hardware definitions for the Toshiba eseries PDAs
2 * 3 *
3 * This file contains the definitions for the LCD timings and functions 4 * Copyright (c) 2003 Ian Molton <spyro@f2s.com>
4 * to control the LCD power / frontlighting via the w100fb driver.
5 * 5 *
6 * (c) 2005 Ian Molton <spyro@f2s.com> 6 * This file is licensed under
7 * 7 * the terms of the GNU General Public License version 2. This program
8 * This program is free software; you can redistribute it and/or modify 8 * is licensed "as is" without any warranty of any kind, whether express
9 * it under the terms of the GNU General Public License version 2 as 9 * or implied.
10 * published by the Free Software Foundation.
11 * 10 *
12 */ 11 */
13 12
14#include <linux/module.h> 13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/device.h> 15#include <linux/device.h>
16#include <linux/fb.h>
17#include <linux/err.h>
18#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17#include <linux/fb.h>
18
19#include <video/w100fb.h>
19 20
21#include <asm/setup.h>
22#include <asm/mach/arch.h>
20#include <asm/mach-types.h> 23#include <asm/mach-types.h>
21 24
22#include <video/w100fb.h> 25#include <mach/mfp-pxa25x.h>
26#include <mach/hardware.h>
27#include <mach/eseries-gpio.h>
28#include <mach/udc.h>
29
30#include "generic.h"
31#include "eseries.h"
32
33/* ------------------------ e800 LCD definitions ------------------------- */
23 34
24static struct w100_gen_regs e800_lcd_regs = { 35static struct w100_gen_regs e800_lcd_regs = {
25 .lcd_format = 0x00008003, 36 .lcd_format = 0x00008003,
@@ -71,8 +82,8 @@ static struct w100_mode e800_lcd_mode[2] = {
71 .crtc_goe = 0x80cc0015, 82 .crtc_goe = 0x80cc0015,
72 .crtc_ps1_active = 0x00000000, 83 .crtc_ps1_active = 0x00000000,
73 .pll_freq = 100, 84 .pll_freq = 100,
74 .pixclk_divider = 6, /* Wince uses 14 which gives a 7MHz pclk. */ 85 .pixclk_divider = 6, /* Wince uses 14 which gives a */
75 .pixclk_divider_rotated = 6, /* we want a 14MHz one (much nicer to look at) */ 86 .pixclk_divider_rotated = 6, /* 7MHz Pclk. We use a 14MHz one */
76 .pixclk_src = CLK_SRC_PLL, 87 .pixclk_src = CLK_SRC_PLL,
77 .sysclk_divider = 0, 88 .sysclk_divider = 0,
78 .sysclk_src = CLK_SRC_PLL, 89 .sysclk_src = CLK_SRC_PLL,
@@ -131,9 +142,6 @@ static struct resource e800_fb_resources[] = {
131 }, 142 },
132}; 143};
133 144
134/* ----------------------- device declarations -------------------------- */
135
136
137static struct platform_device e800_fb_device = { 145static struct platform_device e800_fb_device = {
138 .name = "w100fb", 146 .name = "w100fb",
139 .id = -1, 147 .id = -1,
@@ -144,16 +152,35 @@ static struct platform_device e800_fb_device = {
144 .resource = e800_fb_resources, 152 .resource = e800_fb_resources,
145}; 153};
146 154
147static int e800_lcd_init(void) 155/* --------------------------- UDC definitions --------------------------- */
148{ 156
149 if (!machine_is_e800()) 157static struct pxa2xx_udc_mach_info e800_udc_mach_info = {
150 return -ENODEV; 158 .gpio_vbus = GPIO_E800_USB_DISC,
159 .gpio_pullup = GPIO_E800_USB_PULLUP,
160 .gpio_pullup_inverted = 1
161};
151 162
152 return platform_device_register(&e800_fb_device); 163/* ----------------------------------------------------------------------- */
164
165static struct platform_device *devices[] __initdata = {
166 &e800_fb_device,
167};
168
169static void __init e800_init(void)
170{
171 platform_add_devices(devices, ARRAY_SIZE(devices));
172 pxa_set_udc_info(&e800_udc_mach_info);
153} 173}
154 174
155module_init(e800_lcd_init); 175MACHINE_START(E800, "Toshiba e800")
176 /* Maintainer: Ian Molton (spyro@f2s.com) */
177 .phys_io = 0x40000000,
178 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
179 .boot_params = 0xa0000100,
180 .map_io = pxa_map_io,
181 .init_irq = pxa25x_init_irq,
182 .fixup = eseries_fixup,
183 .init_machine = e800_init,
184 .timer = &pxa_timer,
185MACHINE_END
156 186
157MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
158MODULE_DESCRIPTION("e800 lcd driver");
159MODULE_LICENSE("GPLv2");
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
index 7a0a681a5847..f5ed8038ede5 100644
--- a/arch/arm/mach-pxa/em-x270.c
+++ b/arch/arm/mach-pxa/em-x270.c
@@ -373,10 +373,6 @@ static inline void em_x270_init_nand(void) {}
373#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) 373#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
374static int em_x270_ohci_init(struct device *dev) 374static int em_x270_ohci_init(struct device *dev)
375{ 375{
376 /* Set the Power Control Polarity Low */
377 UHCHR = (UHCHR | UHCHR_PCPL) &
378 ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE);
379
380 /* enable port 2 transiever */ 376 /* enable port 2 transiever */
381 UP2OCR = UP2OCR_HXS | UP2OCR_HXOE; 377 UP2OCR = UP2OCR_HXS | UP2OCR_HXOE;
382 378
@@ -385,6 +381,7 @@ static int em_x270_ohci_init(struct device *dev)
385 381
386static struct pxaohci_platform_data em_x270_ohci_platform_data = { 382static struct pxaohci_platform_data em_x270_ohci_platform_data = {
387 .port_mode = PMM_PERPORT_MODE, 383 .port_mode = PMM_PERPORT_MODE,
384 .flags = ENABLE_PORT1 | ENABLE_PORT2 | POWER_CONTROL_LOW,
388 .init = em_x270_ohci_init, 385 .init = em_x270_ohci_init,
389}; 386};
390 387
diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c
index 001a252bd514..d28849b50a14 100644
--- a/arch/arm/mach-pxa/eseries.c
+++ b/arch/arm/mach-pxa/eseries.c
@@ -19,68 +19,13 @@
19 19
20#include <mach/mfp-pxa25x.h> 20#include <mach/mfp-pxa25x.h>
21#include <mach/hardware.h> 21#include <mach/hardware.h>
22#include <mach/eseries-gpio.h>
23#include <mach/udc.h>
22 24
23#include "generic.h" 25#include "generic.h"
24 26
25static unsigned long e740_pin_config[] __initdata = {
26 /* Chip selects */
27 GPIO15_nCS_1, /* CS1 - Flash */
28 GPIO79_nCS_3, /* CS3 - IMAGEON */
29 GPIO80_nCS_4, /* CS4 - TMIO */
30
31 /* Clocks */
32 GPIO12_32KHz,
33
34 /* BTUART */
35 GPIO42_BTUART_RXD,
36 GPIO43_BTUART_TXD,
37 GPIO44_BTUART_CTS,
38 GPIO45_GPIO, /* Used by TMIO for #SUSPEND */
39
40 /* PC Card */
41 GPIO8_GPIO, /* CD0 */
42 GPIO44_GPIO, /* CD1 */
43 GPIO11_GPIO, /* IRQ0 */
44 GPIO6_GPIO, /* IRQ1 */
45 GPIO27_GPIO, /* RST0 */
46 GPIO24_GPIO, /* RST1 */
47 GPIO20_GPIO, /* PWR0 */
48 GPIO23_GPIO, /* PWR1 */
49 GPIO48_nPOE,
50 GPIO49_nPWE,
51 GPIO50_nPIOR,
52 GPIO51_nPIOW,
53 GPIO52_nPCE_1,
54 GPIO53_nPCE_2,
55 GPIO54_nPSKTSEL,
56 GPIO55_nPREG,
57 GPIO56_nPWAIT,
58 GPIO57_nIOIS16,
59
60 /* wakeup */
61 GPIO0_GPIO | WAKEUP_ON_EDGE_RISE,
62};
63
64static unsigned long e400_pin_config[] __initdata = {
65 /* Chip selects */
66 GPIO15_nCS_1, /* CS1 - Flash */
67 GPIO80_nCS_4, /* CS4 - TMIO */
68
69 /* Clocks */
70 GPIO12_32KHz,
71
72 /* BTUART */
73 GPIO42_BTUART_RXD,
74 GPIO43_BTUART_TXD,
75 GPIO44_BTUART_CTS,
76 GPIO45_GPIO, /* Used by TMIO for #SUSPEND */
77
78 /* wakeup */
79 GPIO0_GPIO | WAKEUP_ON_EDGE_RISE,
80};
81
82/* Only e800 has 128MB RAM */ 27/* Only e800 has 128MB RAM */
83static void __init eseries_fixup(struct machine_desc *desc, 28void __init eseries_fixup(struct machine_desc *desc,
84 struct tag *tags, char **cmdline, struct meminfo *mi) 29 struct tag *tags, char **cmdline, struct meminfo *mi)
85{ 30{
86 mi->nr_banks=1; 31 mi->nr_banks=1;
@@ -92,95 +37,9 @@ static void __init eseries_fixup(struct machine_desc *desc,
92 mi->bank[0].size = (64*1024*1024); 37 mi->bank[0].size = (64*1024*1024);
93} 38}
94 39
95static void __init e740_init(void) 40struct pxa2xx_udc_mach_info e7xx_udc_mach_info = {
96{ 41 .gpio_vbus = GPIO_E7XX_USB_DISC,
97 pxa2xx_mfp_config(ARRAY_AND_SIZE(e740_pin_config)); 42 .gpio_pullup = GPIO_E7XX_USB_PULLUP,
98} 43 .gpio_pullup_inverted = 1
99 44};
100static void __init e400_init(void)
101{
102 pxa2xx_mfp_config(ARRAY_AND_SIZE(e400_pin_config));
103}
104
105/* e-series machine definitions */
106
107#ifdef CONFIG_MACH_E330
108MACHINE_START(E330, "Toshiba e330")
109 /* Maintainer: Ian Molton (spyro@f2s.com) */
110 .phys_io = 0x40000000,
111 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
112 .boot_params = 0xa0000100,
113 .map_io = pxa_map_io,
114 .init_irq = pxa25x_init_irq,
115 .fixup = eseries_fixup,
116 .timer = &pxa_timer,
117MACHINE_END
118#endif
119
120#ifdef CONFIG_MACH_E350
121MACHINE_START(E350, "Toshiba e350")
122 /* Maintainer: Ian Molton (spyro@f2s.com) */
123 .phys_io = 0x40000000,
124 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
125 .boot_params = 0xa0000100,
126 .map_io = pxa_map_io,
127 .init_irq = pxa25x_init_irq,
128 .fixup = eseries_fixup,
129 .timer = &pxa_timer,
130MACHINE_END
131#endif
132
133#ifdef CONFIG_MACH_E740
134MACHINE_START(E740, "Toshiba e740")
135 /* Maintainer: Ian Molton (spyro@f2s.com) */
136 .phys_io = 0x40000000,
137 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
138 .boot_params = 0xa0000100,
139 .map_io = pxa_map_io,
140 .init_irq = pxa25x_init_irq,
141 .fixup = eseries_fixup,
142 .init_machine = e740_init,
143 .timer = &pxa_timer,
144MACHINE_END
145#endif
146
147#ifdef CONFIG_MACH_E750
148MACHINE_START(E750, "Toshiba e750")
149 /* Maintainer: Ian Molton (spyro@f2s.com) */
150 .phys_io = 0x40000000,
151 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
152 .boot_params = 0xa0000100,
153 .map_io = pxa_map_io,
154 .init_irq = pxa25x_init_irq,
155 .fixup = eseries_fixup,
156 .timer = &pxa_timer,
157MACHINE_END
158#endif
159
160#ifdef CONFIG_MACH_E400
161MACHINE_START(E400, "Toshiba e400")
162 /* Maintainer: Ian Molton (spyro@f2s.com) */
163 .phys_io = 0x40000000,
164 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
165 .boot_params = 0xa0000100,
166 .map_io = pxa_map_io,
167 .init_irq = pxa25x_init_irq,
168 .fixup = eseries_fixup,
169 .init_machine = e400_init,
170 .timer = &pxa_timer,
171MACHINE_END
172#endif
173
174#ifdef CONFIG_MACH_E800
175MACHINE_START(E800, "Toshiba e800")
176 /* Maintainer: Ian Molton (spyro@f2s.com) */
177 .phys_io = 0x40000000,
178 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
179 .boot_params = 0xa0000100,
180 .map_io = pxa_map_io,
181 .init_irq = pxa25x_init_irq,
182 .fixup = eseries_fixup,
183 .timer = &pxa_timer,
184MACHINE_END
185#endif
186 45
diff --git a/arch/arm/mach-pxa/eseries.h b/arch/arm/mach-pxa/eseries.h
new file mode 100644
index 000000000000..a83f88d4b6ad
--- /dev/null
+++ b/arch/arm/mach-pxa/eseries.h
@@ -0,0 +1,4 @@
1void __init eseries_fixup(struct machine_desc *desc,
2 struct tag *tags, char **cmdline, struct meminfo *mi);
3
4extern struct pxa2xx_udc_mach_info e7xx_udc_mach_info;
diff --git a/arch/arm/mach-pxa/eseries_udc.c b/arch/arm/mach-pxa/eseries_udc.c
deleted file mode 100644
index d622c04c0d44..000000000000
--- a/arch/arm/mach-pxa/eseries_udc.c
+++ /dev/null
@@ -1,57 +0,0 @@
1/*
2 * UDC functions for the Toshiba e-series PDAs
3 *
4 * Copyright (c) Ian Molton 2003
5 *
6 * This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 *
11 */
12
13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/device.h>
16
17#include <mach/udc.h>
18#include <mach/eseries-gpio.h>
19#include <mach/hardware.h>
20#include <mach/pxa-regs.h>
21#include <asm/mach/arch.h>
22#include <asm/mach-types.h>
23#include <asm/mach/map.h>
24#include <asm/domain.h>
25
26/* local PXA generic code */
27#include "generic.h"
28
29static struct pxa2xx_udc_mach_info e7xx_udc_mach_info = {
30 .gpio_vbus = GPIO_E7XX_USB_DISC,
31 .gpio_pullup = GPIO_E7XX_USB_PULLUP,
32 .gpio_pullup_inverted = 1
33};
34
35static struct pxa2xx_udc_mach_info e800_udc_mach_info = {
36 .gpio_vbus = GPIO_E800_USB_DISC,
37 .gpio_pullup = GPIO_E800_USB_PULLUP,
38 .gpio_pullup_inverted = 1
39};
40
41static int __init eseries_udc_init(void)
42{
43 if (machine_is_e330() || machine_is_e350() ||
44 machine_is_e740() || machine_is_e750() ||
45 machine_is_e400())
46 pxa_set_udc_info(&e7xx_udc_mach_info);
47 else if (machine_is_e800())
48 pxa_set_udc_info(&e800_udc_mach_info);
49
50 return 0;
51}
52
53module_init(eseries_udc_init);
54
55MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
56MODULE_DESCRIPTION("eseries UDC support");
57MODULE_LICENSE("GPLv2");
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c
index ceaed0076366..85ed0b33331f 100644
--- a/arch/arm/mach-pxa/generic.c
+++ b/arch/arm/mach-pxa/generic.c
@@ -46,7 +46,7 @@ void clear_reset_status(unsigned int mask)
46 */ 46 */
47unsigned int get_clk_frequency_khz(int info) 47unsigned int get_clk_frequency_khz(int info)
48{ 48{
49 if (cpu_is_pxa21x() || cpu_is_pxa25x()) 49 if (cpu_is_pxa25x())
50 return pxa25x_get_clk_frequency_khz(info); 50 return pxa25x_get_clk_frequency_khz(info);
51 else if (cpu_is_pxa27x()) 51 else if (cpu_is_pxa27x())
52 return pxa27x_get_clk_frequency_khz(info); 52 return pxa27x_get_clk_frequency_khz(info);
@@ -60,7 +60,7 @@ EXPORT_SYMBOL(get_clk_frequency_khz);
60 */ 60 */
61unsigned int get_memclk_frequency_10khz(void) 61unsigned int get_memclk_frequency_10khz(void)
62{ 62{
63 if (cpu_is_pxa21x() || cpu_is_pxa25x()) 63 if (cpu_is_pxa25x())
64 return pxa25x_get_memclk_frequency_10khz(); 64 return pxa25x_get_memclk_frequency_10khz();
65 else if (cpu_is_pxa27x()) 65 else if (cpu_is_pxa27x())
66 return pxa27x_get_memclk_frequency_10khz(); 66 return pxa27x_get_memclk_frequency_10khz();
@@ -88,11 +88,6 @@ static struct map_desc standard_io_desc[] __initdata = {
88 .pfn = __phys_to_pfn(0x48000000), 88 .pfn = __phys_to_pfn(0x48000000),
89 .length = 0x00200000, 89 .length = 0x00200000,
90 .type = MT_DEVICE 90 .type = MT_DEVICE
91 }, { /* USB host */
92 .virtual = 0xf8000000,
93 .pfn = __phys_to_pfn(0x4c000000),
94 .length = 0x00100000,
95 .type = MT_DEVICE
96 }, { /* Camera */ 91 }, { /* Camera */
97 .virtual = 0xfa000000, 92 .virtual = 0xfa000000,
98 .pfn = __phys_to_pfn(0x50000000), 93 .pfn = __phys_to_pfn(0x50000000),
diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h
index 041c048320e4..dc876a8e6668 100644
--- a/arch/arm/mach-pxa/generic.h
+++ b/arch/arm/mach-pxa/generic.h
@@ -65,4 +65,5 @@ static inline void pxa3xx_clear_reset_status(unsigned int mask) {}
65 65
66extern struct sysdev_class pxa_irq_sysclass; 66extern struct sysdev_class pxa_irq_sysclass;
67extern struct sysdev_class pxa_gpio_sysclass; 67extern struct sysdev_class pxa_gpio_sysclass;
68extern struct sysdev_class pxa2xx_mfp_sysclass;
68extern struct sysdev_class pxa3xx_mfp_sysclass; 69extern struct sysdev_class pxa3xx_mfp_sysclass;
diff --git a/arch/arm/mach-pxa/gpio.c b/arch/arm/mach-pxa/gpio.c
index 07acc1b23857..14930cf8be7b 100644
--- a/arch/arm/mach-pxa/gpio.c
+++ b/arch/arm/mach-pxa/gpio.c
@@ -16,10 +16,10 @@
16#include <linux/module.h> 16#include <linux/module.h>
17#include <linux/irq.h> 17#include <linux/irq.h>
18#include <linux/sysdev.h> 18#include <linux/sysdev.h>
19#include <linux/io.h>
19 20
20#include <asm/gpio.h> 21#include <asm/gpio.h>
21#include <mach/hardware.h> 22#include <mach/hardware.h>
22#include <asm/io.h>
23#include <mach/pxa-regs.h> 23#include <mach/pxa-regs.h>
24#include <mach/pxa2xx-gpio.h> 24#include <mach/pxa2xx-gpio.h>
25 25
@@ -275,7 +275,7 @@ static void pxa_gpio_demux_handler(unsigned int irq, struct irq_desc *desc)
275 loop = 1; 275 loop = 1;
276 276
277 n = PXA_GPIO_IRQ_BASE + bit; 277 n = PXA_GPIO_IRQ_BASE + bit;
278 desc_handle_irq(n, irq_desc + n); 278 generic_handle_irq(n);
279 279
280 bit = find_next_bit(gedr, GEDR_BITS, bit + 1); 280 bit = find_next_bit(gedr, GEDR_BITS, bit + 1);
281 } 281 }
diff --git a/arch/arm/mach-pxa/gumstix.c b/arch/arm/mach-pxa/gumstix.c
index c0092472fa58..d8962a0fb98d 100644
--- a/arch/arm/mach-pxa/gumstix.c
+++ b/arch/arm/mach-pxa/gumstix.c
@@ -20,8 +20,12 @@
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/platform_device.h> 21#include <linux/platform_device.h>
22#include <linux/interrupt.h> 22#include <linux/interrupt.h>
23#include <linux/delay.h>
23#include <linux/mtd/mtd.h> 24#include <linux/mtd/mtd.h>
24#include <linux/mtd/partitions.h> 25#include <linux/mtd/partitions.h>
26#include <linux/gpio.h>
27#include <linux/err.h>
28#include <linux/clk.h>
25 29
26#include <asm/setup.h> 30#include <asm/setup.h>
27#include <asm/memory.h> 31#include <asm/memory.h>
@@ -40,7 +44,7 @@
40 44
41#include <mach/pxa-regs.h> 45#include <mach/pxa-regs.h>
42#include <mach/pxa2xx-regs.h> 46#include <mach/pxa2xx-regs.h>
43#include <mach/pxa2xx-gpio.h> 47#include <mach/mfp-pxa25x.h>
44 48
45#include "generic.h" 49#include "generic.h"
46 50
@@ -85,21 +89,8 @@ static struct platform_device *devices[] __initdata = {
85}; 89};
86 90
87#ifdef CONFIG_MMC_PXA 91#ifdef CONFIG_MMC_PXA
88static struct pxamci_platform_data gumstix_mci_platform_data;
89
90static int gumstix_mci_init(struct device *dev, irq_handler_t detect_int,
91 void *data)
92{
93 pxa_gpio_mode(GPIO6_MMCCLK_MD);
94 pxa_gpio_mode(GPIO53_MMCCLK_MD);
95 pxa_gpio_mode(GPIO8_MMCCS0_MD);
96
97 return 0;
98}
99
100static struct pxamci_platform_data gumstix_mci_platform_data = { 92static struct pxamci_platform_data gumstix_mci_platform_data = {
101 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, 93 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
102 .init = gumstix_mci_init,
103}; 94};
104 95
105static void __init gumstix_mmc_init(void) 96static void __init gumstix_mmc_init(void)
@@ -109,11 +100,11 @@ static void __init gumstix_mmc_init(void)
109#else 100#else
110static void __init gumstix_mmc_init(void) 101static void __init gumstix_mmc_init(void)
111{ 102{
112 printk(KERN_INFO "Gumstix mmc disabled\n"); 103 pr_debug("Gumstix mmc disabled\n");
113} 104}
114#endif 105#endif
115 106
116#ifdef CONFIG_USB_GADGET_PXA2XX 107#ifdef CONFIG_USB_GADGET_PXA25X
117static struct pxa2xx_udc_mach_info gumstix_udc_info __initdata = { 108static struct pxa2xx_udc_mach_info gumstix_udc_info __initdata = {
118 .gpio_vbus = GPIO_GUMSTIX_USB_GPIOn, 109 .gpio_vbus = GPIO_GUMSTIX_USB_GPIOn,
119 .gpio_pullup = GPIO_GUMSTIX_USB_GPIOx, 110 .gpio_pullup = GPIO_GUMSTIX_USB_GPIOx,
@@ -126,12 +117,87 @@ static void __init gumstix_udc_init(void)
126#else 117#else
127static void gumstix_udc_init(void) 118static void gumstix_udc_init(void)
128{ 119{
129 printk(KERN_INFO "Gumstix udc is disabled\n"); 120 pr_debug("Gumstix udc is disabled\n");
130} 121}
131#endif 122#endif
132 123
124#ifdef CONFIG_BT
125/* Normally, the bootloader would have enabled this 32kHz clock but many
126** boards still have u-boot 1.1.4 so we check if it has been turned on and
127** if not, we turn it on with a warning message. */
128static void gumstix_setup_bt_clock(void)
129{
130 int timeout = 500;
131
132 if (!(OSCC & OSCC_OOK))
133 pr_warning("32kHz clock was not on. Bootloader may need to "
134 "be updated\n");
135 else
136 return;
137
138 OSCC |= OSCC_OON;
139 do {
140 if (OSCC & OSCC_OOK)
141 break;
142 udelay(1);
143 } while (--timeout);
144 if (!timeout)
145 pr_err("Failed to start 32kHz clock\n");
146}
147
148static void __init gumstix_bluetooth_init(void)
149{
150 int err;
151
152 gumstix_setup_bt_clock();
153
154 err = gpio_request(GPIO_GUMSTIX_BTRESET, "BTRST");
155 if (err) {
156 pr_err("gumstix: failed request gpio for bluetooth reset\n");
157 return;
158 }
159
160 err = gpio_direction_output(GPIO_GUMSTIX_BTRESET, 1);
161 if (err) {
162 pr_err("gumstix: can't reset bluetooth\n");
163 return;
164 }
165 gpio_set_value(GPIO_GUMSTIX_BTRESET, 0);
166 udelay(100);
167 gpio_set_value(GPIO_GUMSTIX_BTRESET, 1);
168}
169#else
170static void gumstix_bluetooth_init(void)
171{
172 pr_debug("Gumstix Bluetooth is disabled\n");
173}
174#endif
175
176static unsigned long gumstix_pin_config[] __initdata = {
177 GPIO12_32KHz,
178 /* BTUART */
179 GPIO42_HWUART_RXD,
180 GPIO43_HWUART_TXD,
181 GPIO44_HWUART_CTS,
182 GPIO45_HWUART_RTS,
183 /* MMC */
184 GPIO6_MMC_CLK,
185 GPIO53_MMC_CLK,
186 GPIO8_MMC_CS0,
187 /* these are used by AM200EPD */
188 GPIO51_GPIO,
189 GPIO49_GPIO,
190 GPIO48_GPIO,
191 GPIO32_GPIO,
192 GPIO17_GPIO,
193 GPIO16_GPIO,
194};
195
133static void __init gumstix_init(void) 196static void __init gumstix_init(void)
134{ 197{
198 pxa2xx_mfp_config(ARRAY_AND_SIZE(gumstix_pin_config));
199
200 gumstix_bluetooth_init();
135 gumstix_udc_init(); 201 gumstix_udc_init();
136 gumstix_mmc_init(); 202 gumstix_mmc_init();
137 (void) platform_add_devices(devices, ARRAY_SIZE(devices)); 203 (void) platform_add_devices(devices, ARRAY_SIZE(devices));
diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c
index 5aa0270d5605..013b15baa034 100644
--- a/arch/arm/mach-pxa/idp.c
+++ b/arch/arm/mach-pxa/idp.c
@@ -32,7 +32,7 @@
32#include <asm/mach/map.h> 32#include <asm/mach/map.h>
33 33
34#include <mach/pxa-regs.h> 34#include <mach/pxa-regs.h>
35#include <mach/pxa2xx-gpio.h> 35#include <mach/mfp-pxa25x.h>
36#include <mach/idp.h> 36#include <mach/idp.h>
37#include <mach/pxafb.h> 37#include <mach/pxafb.h>
38#include <mach/bitfield.h> 38#include <mach/bitfield.h>
@@ -46,6 +46,47 @@
46 * - Ethernet interrupt 46 * - Ethernet interrupt
47 */ 47 */
48 48
49static unsigned long idp_pin_config[] __initdata = {
50 /* LCD */
51 GPIO58_LCD_LDD_0,
52 GPIO59_LCD_LDD_1,
53 GPIO60_LCD_LDD_2,
54 GPIO61_LCD_LDD_3,
55 GPIO62_LCD_LDD_4,
56 GPIO63_LCD_LDD_5,
57 GPIO64_LCD_LDD_6,
58 GPIO65_LCD_LDD_7,
59 GPIO66_LCD_LDD_8,
60 GPIO67_LCD_LDD_9,
61 GPIO68_LCD_LDD_10,
62 GPIO69_LCD_LDD_11,
63 GPIO70_LCD_LDD_12,
64 GPIO71_LCD_LDD_13,
65 GPIO72_LCD_LDD_14,
66 GPIO73_LCD_LDD_15,
67 GPIO74_LCD_FCLK,
68 GPIO75_LCD_LCLK,
69 GPIO76_LCD_PCLK,
70
71 /* BTUART */
72 GPIO42_BTUART_RXD,
73 GPIO43_BTUART_TXD,
74 GPIO44_BTUART_CTS,
75 GPIO45_BTUART_RTS,
76
77 /* STUART */
78 GPIO46_STUART_RXD,
79 GPIO47_STUART_TXD,
80
81 /* MMC */
82 GPIO6_MMC_CLK,
83 GPIO8_MMC_CS0,
84
85 /* Ethernet */
86 GPIO33_nCS_5, /* Ethernet CS */
87 GPIO4_GPIO, /* Ethernet IRQ */
88};
89
49static struct resource smc91x_resources[] = { 90static struct resource smc91x_resources[] = {
50 [0] = { 91 [0] = {
51 .start = (IDP_ETH_PHYS + 0x300), 92 .start = (IDP_ETH_PHYS + 0x300),
@@ -121,44 +162,28 @@ static struct pxafb_mach_info sharp_lm8v31 = {
121 .num_modes = 1, 162 .num_modes = 1,
122 .cmap_inverse = 0, 163 .cmap_inverse = 0,
123 .cmap_static = 0, 164 .cmap_static = 0,
124 .lccr0 = LCCR0_SDS, 165 .lcd_conn = LCD_COLOR_DSTN_16BPP | LCD_PCLK_EDGE_FALL |
125 .lccr3 = LCCR3_PCP | LCCR3_Acb(255), 166 LCD_AC_BIAS_FREQ(255),
126 .pxafb_backlight_power = &idp_backlight_power, 167 .pxafb_backlight_power = &idp_backlight_power,
127 .pxafb_lcd_power = &idp_lcd_power 168 .pxafb_lcd_power = &idp_lcd_power
128}; 169};
129 170
130static int idp_mci_init(struct device *dev, irq_handler_t idp_detect_int, void *data)
131{
132 /* setup GPIO for PXA25x MMC controller */
133 pxa_gpio_mode(GPIO6_MMCCLK_MD);
134 pxa_gpio_mode(GPIO8_MMCCS0_MD);
135
136 return 0;
137}
138
139static struct pxamci_platform_data idp_mci_platform_data = { 171static struct pxamci_platform_data idp_mci_platform_data = {
140 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, 172 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
141 .init = idp_mci_init,
142}; 173};
143 174
144static void __init idp_init(void) 175static void __init idp_init(void)
145{ 176{
146 printk("idp_init()\n"); 177 printk("idp_init()\n");
147 178
179 pxa2xx_mfp_config(ARRAY_AND_SIZE(idp_pin_config));
180
148 platform_device_register(&smc91x_device); 181 platform_device_register(&smc91x_device);
149 //platform_device_register(&mst_audio_device); 182 //platform_device_register(&mst_audio_device);
150 set_pxa_fb_info(&sharp_lm8v31); 183 set_pxa_fb_info(&sharp_lm8v31);
151 pxa_set_mci_info(&idp_mci_platform_data); 184 pxa_set_mci_info(&idp_mci_platform_data);
152} 185}
153 186
154static void __init idp_init_irq(void)
155{
156
157 pxa25x_init_irq();
158
159 set_irq_type(TOUCH_PANEL_IRQ, TOUCH_PANEL_IRQ_EDGE);
160}
161
162static struct map_desc idp_io_desc[] __initdata = { 187static struct map_desc idp_io_desc[] __initdata = {
163 { 188 {
164 .virtual = IDP_COREVOLT_VIRT, 189 .virtual = IDP_COREVOLT_VIRT,
@@ -177,15 +202,6 @@ static void __init idp_map_io(void)
177{ 202{
178 pxa_map_io(); 203 pxa_map_io();
179 iotable_init(idp_io_desc, ARRAY_SIZE(idp_io_desc)); 204 iotable_init(idp_io_desc, ARRAY_SIZE(idp_io_desc));
180
181 // serial ports 2 & 3
182 pxa_gpio_mode(GPIO42_BTRXD_MD);
183 pxa_gpio_mode(GPIO43_BTTXD_MD);
184 pxa_gpio_mode(GPIO44_BTCTS_MD);
185 pxa_gpio_mode(GPIO45_BTRTS_MD);
186 pxa_gpio_mode(GPIO46_STRXD_MD);
187 pxa_gpio_mode(GPIO47_STTXD_MD);
188
189} 205}
190 206
191 207
@@ -194,7 +210,7 @@ MACHINE_START(PXA_IDP, "Vibren PXA255 IDP")
194 .phys_io = 0x40000000, 210 .phys_io = 0x40000000,
195 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, 211 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
196 .map_io = idp_map_io, 212 .map_io = idp_map_io,
197 .init_irq = idp_init_irq, 213 .init_irq = pxa25x_init_irq,
198 .timer = &pxa_timer, 214 .timer = &pxa_timer,
199 .init_machine = idp_init, 215 .init_machine = idp_init,
200MACHINE_END 216MACHINE_END
diff --git a/arch/arm/mach-pxa/include/mach/akita.h b/arch/arm/mach-pxa/include/mach/akita.h
deleted file mode 100644
index 5d8cc1d9cb10..000000000000
--- a/arch/arm/mach-pxa/include/mach/akita.h
+++ /dev/null
@@ -1,32 +0,0 @@
1/*
2 * Hardware specific definitions for SL-C1000 (Akita)
3 *
4 * Copyright (c) 2005 Richard Purdie
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12/* Akita IO Expander GPIOs */
13
14#define AKITA_IOEXP_RESERVED_7 (1 << 7)
15#define AKITA_IOEXP_IR_ON (1 << 6)
16#define AKITA_IOEXP_AKIN_PULLUP (1 << 5)
17#define AKITA_IOEXP_BACKLIGHT_CONT (1 << 4)
18#define AKITA_IOEXP_BACKLIGHT_ON (1 << 3)
19#define AKITA_IOEXP_MIC_BIAS (1 << 2)
20#define AKITA_IOEXP_RESERVED_1 (1 << 1)
21#define AKITA_IOEXP_RESERVED_0 (1 << 0)
22
23/* Direction Bitfield 0=output 1=input */
24#define AKITA_IOEXP_IO_DIR 0
25/* Default Values */
26#define AKITA_IOEXP_IO_OUT (AKITA_IOEXP_IR_ON | AKITA_IOEXP_AKIN_PULLUP)
27
28extern struct platform_device akitaioexp_device;
29
30void akita_set_ioexp(struct device *dev, unsigned char bitmask);
31void akita_reset_ioexp(struct device *dev, unsigned char bitmask);
32
diff --git a/arch/arm/mach-pxa/include/mach/corgi.h b/arch/arm/mach-pxa/include/mach/corgi.h
index bf856503baf6..585970ef08ce 100644
--- a/arch/arm/mach-pxa/include/mach/corgi.h
+++ b/arch/arm/mach-pxa/include/mach/corgi.h
@@ -98,12 +98,21 @@
98 CORGI_SCP_MIC_BIAS ) 98 CORGI_SCP_MIC_BIAS )
99#define CORGI_SCOOP_IO_OUT ( CORGI_SCP_MUTE_L | CORGI_SCP_MUTE_R ) 99#define CORGI_SCOOP_IO_OUT ( CORGI_SCP_MUTE_L | CORGI_SCP_MUTE_R )
100 100
101#define CORGI_SCOOP_GPIO_BASE (NR_BUILTIN_GPIO)
102#define CORGI_GPIO_LED_GREEN (CORGI_SCOOP_GPIO_BASE + 0)
103#define CORGI_GPIO_SWA (CORGI_SCOOP_GPIO_BASE + 1) /* Hinge Switch A */
104#define CORGI_GPIO_SWB (CORGI_SCOOP_GPIO_BASE + 2) /* Hinge Switch B */
105#define CORGI_GPIO_MUTE_L (CORGI_SCOOP_GPIO_BASE + 3)
106#define CORGI_GPIO_MUTE_R (CORGI_SCOOP_GPIO_BASE + 4)
107#define CORGI_GPIO_AKIN_PULLUP (CORGI_SCOOP_GPIO_BASE + 5)
108#define CORGI_GPIO_APM_ON (CORGI_SCOOP_GPIO_BASE + 6)
109#define CORGI_GPIO_BACKLIGHT_CONT (CORGI_SCOOP_GPIO_BASE + 7)
110#define CORGI_GPIO_MIC_BIAS (CORGI_SCOOP_GPIO_BASE + 8)
101 111
102/* 112/*
103 * Shared data structures 113 * Shared data structures
104 */ 114 */
105extern struct platform_device corgiscoop_device; 115extern struct platform_device corgiscoop_device;
106extern struct platform_device corgissp_device;
107 116
108#endif /* __ASM_ARCH_CORGI_H */ 117#endif /* __ASM_ARCH_CORGI_H */
109 118
diff --git a/arch/arm/mach-pxa/include/mach/entry-macro.S b/arch/arm/mach-pxa/include/mach/entry-macro.S
index de16c12d5232..f6b4bf3e73d2 100644
--- a/arch/arm/mach-pxa/include/mach/entry-macro.S
+++ b/arch/arm/mach-pxa/include/mach/entry-macro.S
@@ -41,7 +41,7 @@
41 and \irqstat, \irqstat, \irqnr 41 and \irqstat, \irqstat, \irqnr
42 clz \irqnr, \irqstat 42 clz \irqnr, \irqstat
43 rsb \irqnr, \irqnr, #31 43 rsb \irqnr, \irqnr, #31
44 add \irqnr, \irqnr, #32 44 add \irqnr, \irqnr, #(32 + PXA_IRQ(0))
45 b 1001f 45 b 1001f
461003: 461003:
47 mrc p6, 0, \irqstat, c0, c0, 0 @ ICIP 47 mrc p6, 0, \irqstat, c0, c0, 0 @ ICIP
@@ -52,6 +52,6 @@
52 rsb \irqstat, \irqnr, #0 52 rsb \irqstat, \irqnr, #0
53 and \irqstat, \irqstat, \irqnr 53 and \irqstat, \irqstat, \irqnr
54 clz \irqnr, \irqstat 54 clz \irqnr, \irqstat
55 rsb \irqnr, \irqnr, #31 55 rsb \irqnr, \irqnr, #(31 + PXA_IRQ(0))
561001: 561001:
57 .endm 57 .endm
diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h
index e89df4d0d239..a582a6d9b92b 100644
--- a/arch/arm/mach-pxa/include/mach/hardware.h
+++ b/arch/arm/mach-pxa/include/mach/hardware.h
@@ -62,26 +62,74 @@
62 62
63#ifndef __ASSEMBLY__ 63#ifndef __ASSEMBLY__
64 64
65#include <asm/cputype.h>
66
67/*
68 * CPU Stepping CPU_ID JTAG_ID
69 *
70 * PXA210 B0 0x69052922 0x2926C013
71 * PXA210 B1 0x69052923 0x3926C013
72 * PXA210 B2 0x69052924 0x4926C013
73 * PXA210 C0 0x69052D25 0x5926C013
74 *
75 * PXA250 A0 0x69052100 0x09264013
76 * PXA250 A1 0x69052101 0x19264013
77 * PXA250 B0 0x69052902 0x29264013
78 * PXA250 B1 0x69052903 0x39264013
79 * PXA250 B2 0x69052904 0x49264013
80 * PXA250 C0 0x69052D05 0x59264013
81 *
82 * PXA255 A0 0x69052D06 0x69264013
83 *
84 * PXA26x A0 0x69052903 0x39264013
85 * PXA26x B0 0x69052D05 0x59264013
86 *
87 * PXA27x A0 0x69054110 0x09265013
88 * PXA27x A1 0x69054111 0x19265013
89 * PXA27x B0 0x69054112 0x29265013
90 * PXA27x B1 0x69054113 0x39265013
91 * PXA27x C0 0x69054114 0x49265013
92 * PXA27x C5 0x69054117 0x79265013
93 *
94 * PXA30x A0 0x69056880 0x0E648013
95 * PXA30x A1 0x69056881 0x1E648013
96 * PXA31x A0 0x69056890 0x0E649013
97 * PXA31x A1 0x69056891 0x1E649013
98 * PXA31x A2 0x69056892 0x2E649013
99 * PXA32x B1 0x69056825 0x5E642013
100 * PXA32x B2 0x69056826 0x6E642013
101 *
102 * PXA930 B0 0x69056835 0x5E643013
103 * PXA930 B1 0x69056837 0x7E643013
104 * PXA930 B2 0x69056838 0x8E643013
105 */
65#ifdef CONFIG_PXA25x 106#ifdef CONFIG_PXA25x
66#define __cpu_is_pxa21x(id) \ 107#define __cpu_is_pxa210(id) \
67 ({ \ 108 ({ \
68 unsigned int _id = (id) >> 4 & 0xf3f; \ 109 unsigned int _id = (id) & 0xf3f0; \
69 _id == 0x212; \ 110 _id == 0x2120; \
70 }) 111 })
71 112
72#define __cpu_is_pxa255(id) \ 113#define __cpu_is_pxa250(id) \
73 ({ \ 114 ({ \
74 unsigned int _id = (id) >> 4 & 0xfff; \ 115 unsigned int _id = (id) & 0xf3ff; \
75 _id == 0x2d0; \ 116 _id <= 0x2105; \
76 }) 117 })
118
119#define __cpu_is_pxa255(id) \
120 ({ \
121 unsigned int _id = (id) & 0xffff; \
122 _id == 0x2d06; \
123 })
77 124
78#define __cpu_is_pxa25x(id) \ 125#define __cpu_is_pxa25x(id) \
79 ({ \ 126 ({ \
80 unsigned int _id = (id) >> 4 & 0xfff; \ 127 unsigned int _id = (id) & 0xf300; \
81 _id == 0x2d0 || _id == 0x290; \ 128 _id == 0x2100; \
82 }) 129 })
83#else 130#else
84#define __cpu_is_pxa21x(id) (0) 131#define __cpu_is_pxa210(id) (0)
132#define __cpu_is_pxa250(id) (0)
85#define __cpu_is_pxa255(id) (0) 133#define __cpu_is_pxa255(id) (0)
86#define __cpu_is_pxa25x(id) (0) 134#define __cpu_is_pxa25x(id) (0)
87#endif 135#endif
@@ -136,9 +184,14 @@
136#define __cpu_is_pxa930(id) (0) 184#define __cpu_is_pxa930(id) (0)
137#endif 185#endif
138 186
139#define cpu_is_pxa21x() \ 187#define cpu_is_pxa210() \
140 ({ \ 188 ({ \
141 __cpu_is_pxa21x(read_cpuid_id()); \ 189 __cpu_is_pxa210(read_cpuid_id()); \
190 })
191
192#define cpu_is_pxa250() \
193 ({ \
194 __cpu_is_pxa250(read_cpuid_id()); \
142 }) 195 })
143 196
144#define cpu_is_pxa255() \ 197#define cpu_is_pxa255() \
@@ -151,6 +204,8 @@
151 __cpu_is_pxa25x(read_cpuid_id()); \ 204 __cpu_is_pxa25x(read_cpuid_id()); \
152 }) 205 })
153 206
207extern int cpu_is_pxa26x(void);
208
154#define cpu_is_pxa27x() \ 209#define cpu_is_pxa27x() \
155 ({ \ 210 ({ \
156 __cpu_is_pxa27x(read_cpuid_id()); \ 211 __cpu_is_pxa27x(read_cpuid_id()); \
diff --git a/arch/arm/mach-pxa/include/mach/i2c.h b/arch/arm/mach-pxa/include/mach/i2c.h
index 80596b013443..1a9f65e6ec0f 100644
--- a/arch/arm/mach-pxa/include/mach/i2c.h
+++ b/arch/arm/mach-pxa/include/mach/i2c.h
@@ -65,13 +65,18 @@ struct i2c_pxa_platform_data {
65 unsigned int slave_addr; 65 unsigned int slave_addr;
66 struct i2c_slave_client *slave; 66 struct i2c_slave_client *slave;
67 unsigned int class; 67 unsigned int class;
68 int use_pio; 68 unsigned int use_pio :1;
69 unsigned int fast_mode :1;
69}; 70};
70 71
71extern void pxa_set_i2c_info(struct i2c_pxa_platform_data *info); 72extern void pxa_set_i2c_info(struct i2c_pxa_platform_data *info);
72 73
73#ifdef CONFIG_PXA27x 74#ifdef CONFIG_PXA27x
74extern void pxa_set_i2c_power_info(struct i2c_pxa_platform_data *info); 75extern void pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info);
76#endif
77
78#ifdef CONFIG_PXA3xx
79extern void pxa3xx_set_i2c_power_info(struct i2c_pxa_platform_data *info);
75#endif 80#endif
76 81
77#endif 82#endif
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h
index 108b5db9b2af..9c163e19ada9 100644
--- a/arch/arm/mach-pxa/include/mach/irqs.h
+++ b/arch/arm/mach-pxa/include/mach/irqs.h
@@ -11,7 +11,14 @@
11 */ 11 */
12 12
13 13
14#define PXA_IRQ(x) (x) 14#ifdef CONFIG_PXA_HAVE_ISA_IRQS
15#define PXA_ISA_IRQ(x) (x)
16#define PXA_ISA_IRQ_NUM (16)
17#else
18#define PXA_ISA_IRQ_NUM (0)
19#endif
20
21#define PXA_IRQ(x) (PXA_ISA_IRQ_NUM + (x))
15 22
16#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) 23#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
17#define IRQ_SSP3 PXA_IRQ(0) /* SSP3 service request */ 24#define IRQ_SSP3 PXA_IRQ(0) /* SSP3 service request */
@@ -73,7 +80,7 @@
73#define IRQ_MMC3 PXA_IRQ(55) /* MMC3 Controller (PXA310) */ 80#define IRQ_MMC3 PXA_IRQ(55) /* MMC3 Controller (PXA310) */
74#endif 81#endif
75 82
76#define PXA_GPIO_IRQ_BASE (64) 83#define PXA_GPIO_IRQ_BASE PXA_IRQ(64)
77#define PXA_GPIO_IRQ_NUM (128) 84#define PXA_GPIO_IRQ_NUM (128)
78 85
79#define GPIO_2_x_TO_IRQ(x) (PXA_GPIO_IRQ_BASE + (x)) 86#define GPIO_2_x_TO_IRQ(x) (PXA_GPIO_IRQ_BASE + (x))
@@ -178,13 +185,7 @@
178#define NR_IRQS (IRQ_S1_BVD1_STSCHG + 1) 185#define NR_IRQS (IRQ_S1_BVD1_STSCHG + 1)
179#elif defined(CONFIG_SHARP_LOCOMO) 186#elif defined(CONFIG_SHARP_LOCOMO)
180#define NR_IRQS (IRQ_LOCOMO_SPI_TEND + 1) 187#define NR_IRQS (IRQ_LOCOMO_SPI_TEND + 1)
181#elif defined(CONFIG_ARCH_LUBBOCK) || \ 188#elif defined(CONFIG_PXA_HAVE_BOARD_IRQS)
182 defined(CONFIG_MACH_LOGICPD_PXA270) || \
183 defined(CONFIG_MACH_TOSA) || \
184 defined(CONFIG_MACH_MAINSTONE) || \
185 defined(CONFIG_MACH_PCM027) || \
186 defined(CONFIG_ARCH_PXA_ESERIES) || \
187 defined(CONFIG_MACH_MAGICIAN)
188#define NR_IRQS (IRQ_BOARD_END) 189#define NR_IRQS (IRQ_BOARD_END)
189#elif defined(CONFIG_MACH_ZYLONITE) 190#elif defined(CONFIG_MACH_ZYLONITE)
190#define NR_IRQS (IRQ_BOARD_START + 32) 191#define NR_IRQS (IRQ_BOARD_START + 32)
diff --git a/arch/arm/mach-pxa/include/mach/littleton.h b/arch/arm/mach-pxa/include/mach/littleton.h
index 79d209b826f4..5c4e320c1437 100644
--- a/arch/arm/mach-pxa/include/mach/littleton.h
+++ b/arch/arm/mach-pxa/include/mach/littleton.h
@@ -3,4 +3,6 @@
3 3
4#define LITTLETON_ETH_PHYS 0x30000000 4#define LITTLETON_ETH_PHYS 0x30000000
5 5
6#define LITTLETON_GPIO_LCD_CS (17)
7
6#endif /* __ASM_ARCH_ZYLONITE_H */ 8#endif /* __ASM_ARCH_ZYLONITE_H */
diff --git a/arch/arm/mach-pxa/include/mach/memory.h b/arch/arm/mach-pxa/include/mach/memory.h
index 552eb7fa6579..59aef89808d6 100644
--- a/arch/arm/mach-pxa/include/mach/memory.h
+++ b/arch/arm/mach-pxa/include/mach/memory.h
@@ -40,11 +40,11 @@
40#define NODE_MEM_SIZE_BITS 26 40#define NODE_MEM_SIZE_BITS 26
41 41
42#if !defined(__ASSEMBLY__) && defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI) 42#if !defined(__ASSEMBLY__) && defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI)
43void cmx270_pci_adjust_zones(int node, unsigned long *size, 43void cmx2xx_pci_adjust_zones(int node, unsigned long *size,
44 unsigned long *holes); 44 unsigned long *holes);
45 45
46#define arch_adjust_zones(node, size, holes) \ 46#define arch_adjust_zones(node, size, holes) \
47 cmx270_pci_adjust_zones(node, size, holes) 47 cmx2xx_pci_adjust_zones(node, size, holes)
48 48
49#define ISA_DMA_THRESHOLD (PHYS_OFFSET + SZ_64M - 1) 49#define ISA_DMA_THRESHOLD (PHYS_OFFSET + SZ_64M - 1)
50#endif 50#endif
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h b/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h
index 6c8e72238bfd..617cab2cc8d0 100644
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h
@@ -17,7 +17,7 @@
17 17
18/* Crystal and Clock Signals */ 18/* Crystal and Clock Signals */
19#define GPIO10_RTCCLK MFP_CFG_OUT(GPIO10, AF1, DRIVE_LOW) 19#define GPIO10_RTCCLK MFP_CFG_OUT(GPIO10, AF1, DRIVE_LOW)
20#define GPIO70_RTC_CLK MFP_CFG_OUT(GPIO70, AF1, DRIVE_LOW) 20#define GPIO70_RTCCLK MFP_CFG_OUT(GPIO70, AF1, DRIVE_LOW)
21#define GPIO7_48MHz MFP_CFG_OUT(GPIO7, AF1, DRIVE_LOW) 21#define GPIO7_48MHz MFP_CFG_OUT(GPIO7, AF1, DRIVE_LOW)
22#define GPIO11_3_6MHz MFP_CFG_OUT(GPIO11, AF1, DRIVE_LOW) 22#define GPIO11_3_6MHz MFP_CFG_OUT(GPIO11, AF1, DRIVE_LOW)
23#define GPIO71_3_6MHz MFP_CFG_OUT(GPIO71, AF1, DRIVE_LOW) 23#define GPIO71_3_6MHz MFP_CFG_OUT(GPIO71, AF1, DRIVE_LOW)
@@ -156,6 +156,6 @@
156#define GPIO74_LCD_FCLK MFP_CFG_OUT(GPIO74, AF2, DRIVE_LOW) 156#define GPIO74_LCD_FCLK MFP_CFG_OUT(GPIO74, AF2, DRIVE_LOW)
157#define GPIO75_LCD_LCLK MFP_CFG_OUT(GPIO75, AF2, DRIVE_LOW) 157#define GPIO75_LCD_LCLK MFP_CFG_OUT(GPIO75, AF2, DRIVE_LOW)
158#define GPIO76_LCD_PCLK MFP_CFG_OUT(GPIO76, AF2, DRIVE_LOW) 158#define GPIO76_LCD_PCLK MFP_CFG_OUT(GPIO76, AF2, DRIVE_LOW)
159#define GPIO77_LCD_ACBIAS MFP_CFG_OUT(GPIO77, AF2, DRIVE_LOW) 159#define GPIO77_LCD_BIAS MFP_CFG_OUT(GPIO77, AF2, DRIVE_LOW)
160 160
161#endif /* __ASM_ARCH_MFP_PXA25X_H */ 161#endif /* __ASM_ARCH_MFP_PXA25X_H */
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa320.h b/arch/arm/mach-pxa/include/mach/mfp-pxa320.h
index 74990510cf34..67f8385ea548 100644
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa320.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa320.h
@@ -257,10 +257,10 @@
257#define GPIO38_SSP2_RXD MFP_CFG(GPIO38, AF2) 257#define GPIO38_SSP2_RXD MFP_CFG(GPIO38, AF2)
258#define GPIO38_SSP2_TXD MFP_CFG(GPIO38, AF5) 258#define GPIO38_SSP2_TXD MFP_CFG(GPIO38, AF5)
259 259
260#define GPIO69_SSP3_SCLK MFP_CFG(GPIO69, AF2, DS08X, FLOAT) 260#define GPIO69_SSP3_SCLK MFP_CFG_X(GPIO69, AF2, DS08X, FLOAT)
261#define GPIO70_SSP3_FRM MFP_CFG(GPIO70, AF2, DS08X, DRIVE_LOW) 261#define GPIO70_SSP3_FRM MFP_CFG_X(GPIO70, AF2, DS08X, DRIVE_LOW)
262#define GPIO89_SSP3_SCLK MFP_CFG(GPIO89, AF1, DS08X, FLOAT) 262#define GPIO89_SSP3_SCLK MFP_CFG_X(GPIO89, AF1, DS08X, FLOAT)
263#define GPIO90_SSP3_FRM MFP_CFG(GPIO90, AF1, DS08X, DRIVE_LOW) 263#define GPIO90_SSP3_FRM MFP_CFG_X(GPIO90, AF1, DS08X, DRIVE_LOW)
264#define GPIO71_SSP3_RXD MFP_CFG_X(GPIO71, AF5, DS08X, FLOAT) 264#define GPIO71_SSP3_RXD MFP_CFG_X(GPIO71, AF5, DS08X, FLOAT)
265#define GPIO71_SSP3_TXD MFP_CFG_X(GPIO71, AF2, DS08X, DRIVE_LOW) 265#define GPIO71_SSP3_TXD MFP_CFG_X(GPIO71, AF2, DS08X, DRIVE_LOW)
266#define GPIO72_SSP3_RXD MFP_CFG_X(GPIO72, AF2, DS08X, FLOAT) 266#define GPIO72_SSP3_RXD MFP_CFG_X(GPIO72, AF2, DS08X, FLOAT)
diff --git a/arch/arm/mach-pxa/include/mach/mfp.h b/arch/arm/mach-pxa/include/mach/mfp.h
index 8769567b389b..482185053a92 100644
--- a/arch/arm/mach-pxa/include/mach/mfp.h
+++ b/arch/arm/mach-pxa/include/mach/mfp.h
@@ -274,12 +274,13 @@ typedef unsigned long mfp_cfg_t;
274#define MFP_DS_MASK (0x7 << 13) 274#define MFP_DS_MASK (0x7 << 13)
275#define MFP_DS(x) (((x) >> 13) & 0x7) 275#define MFP_DS(x) (((x) >> 13) & 0x7)
276 276
277#define MFP_LPM_INPUT (0x0 << 16) 277#define MFP_LPM_DEFAULT (0x0 << 16)
278#define MFP_LPM_DRIVE_LOW (0x1 << 16) 278#define MFP_LPM_DRIVE_LOW (0x1 << 16)
279#define MFP_LPM_DRIVE_HIGH (0x2 << 16) 279#define MFP_LPM_DRIVE_HIGH (0x2 << 16)
280#define MFP_LPM_PULL_LOW (0x3 << 16) 280#define MFP_LPM_PULL_LOW (0x3 << 16)
281#define MFP_LPM_PULL_HIGH (0x4 << 16) 281#define MFP_LPM_PULL_HIGH (0x4 << 16)
282#define MFP_LPM_FLOAT (0x5 << 16) 282#define MFP_LPM_FLOAT (0x5 << 16)
283#define MFP_LPM_INPUT (0x6 << 16)
283#define MFP_LPM_STATE_MASK (0x7 << 16) 284#define MFP_LPM_STATE_MASK (0x7 << 16)
284#define MFP_LPM_STATE(x) (((x) >> 16) & 0x7) 285#define MFP_LPM_STATE(x) (((x) >> 16) & 0x7)
285 286
@@ -297,7 +298,7 @@ typedef unsigned long mfp_cfg_t;
297#define MFP_PULL_MASK (0x3 << 21) 298#define MFP_PULL_MASK (0x3 << 21)
298#define MFP_PULL(x) (((x) >> 21) & 0x3) 299#define MFP_PULL(x) (((x) >> 21) & 0x3)
299 300
300#define MFP_CFG_DEFAULT (MFP_AF0 | MFP_DS03X | MFP_LPM_INPUT |\ 301#define MFP_CFG_DEFAULT (MFP_AF0 | MFP_DS03X | MFP_LPM_DEFAULT |\
301 MFP_LPM_EDGE_NONE | MFP_PULL_NONE) 302 MFP_LPM_EDGE_NONE | MFP_PULL_NONE)
302 303
303#define MFP_CFG(pin, af) \ 304#define MFP_CFG(pin, af) \
diff --git a/arch/arm/mach-pxa/include/mach/mioa701.h b/arch/arm/mach-pxa/include/mach/mioa701.h
new file mode 100644
index 000000000000..8483cb511831
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/mioa701.h
@@ -0,0 +1,67 @@
1#ifndef _MIOA701_H_
2#define _MIOA701_H_
3
4#define MIO_CFG_IN(pin, af) \
5 ((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DIR_MASK)) |\
6 (MFP_PIN(pin) | MFP_##af | MFP_DIR_IN))
7
8#define MIO_CFG_OUT(pin, af, state) \
9 ((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DIR_MASK | MFP_LPM_STATE_MASK)) |\
10 (MFP_PIN(pin) | MFP_##af | MFP_DIR_OUT | MFP_LPM_##state))
11
12/* Global GPIOs */
13#define GPIO9_CHARGE_nEN 9
14#define GPIO18_POWEROFF 18
15#define GPIO87_LCD_POWER 87
16
17/* USB */
18#define GPIO13_USB_DETECT 13
19#define GPIO22_USB_ENABLE 22
20
21/* SDIO bits */
22#define GPIO78_SDIO_RO 78
23#define GPIO15_SDIO_INSERT 15
24#define GPIO91_SDIO_EN 91
25
26/* Bluetooth */
27#define GPIO83_BT_ON 83
28
29/* GPS */
30#define GPIO23_GPS_UNKNOWN1 23
31#define GPIO26_GPS_ON 26
32#define GPIO27_GPS_RESET 27
33#define GPIO106_GPS_UNKNOWN2 106
34#define GPIO107_GPS_UNKNOWN3 107
35
36/* GSM */
37#define GPIO24_GSM_MOD_RESET_CMD 24
38#define GPIO88_GSM_nMOD_ON_CMD 88
39#define GPIO90_GSM_nMOD_OFF_CMD 90
40#define GPIO114_GSM_nMOD_DTE_UART_STATE 114
41#define GPIO25_GSM_MOD_ON_STATE 25
42#define GPIO113_GSM_EVENT 113
43
44/* SOUND */
45#define GPIO12_HPJACK_INSERT 12
46
47/* LEDS */
48#define GPIO10_LED_nCharging 10
49#define GPIO97_LED_nBlue 97
50#define GPIO98_LED_nOrange 98
51#define GPIO82_LED_nVibra 82
52#define GPIO115_LED_nKeyboard 115
53
54/* Keyboard */
55#define GPIO0_KEY_POWER 0
56#define GPIO93_KEY_VOLUME_UP 93
57#define GPIO94_KEY_VOLUME_DOWN 94
58
59extern struct input_dev *mioa701_evdev;
60extern void mioa701_gpio_lpm_set(unsigned long mfp_pin);
61
62/* Assembler externals mioa701_bootresume.S */
63extern u32 mioa701_bootstrap;
64extern u32 mioa701_jumpaddr;
65extern u32 mioa701_bootstrap_lg;
66
67#endif /* _MIOA701_H */
diff --git a/arch/arm/mach-pxa/include/mach/ohci.h b/arch/arm/mach-pxa/include/mach/ohci.h
index e848a47128cd..95b6e2a6e514 100644
--- a/arch/arm/mach-pxa/include/mach/ohci.h
+++ b/arch/arm/mach-pxa/include/mach/ohci.h
@@ -7,6 +7,22 @@ struct pxaohci_platform_data {
7 int (*init)(struct device *); 7 int (*init)(struct device *);
8 void (*exit)(struct device *); 8 void (*exit)(struct device *);
9 9
10 unsigned long flags;
11#define ENABLE_PORT1 (1 << 0)
12#define ENABLE_PORT2 (1 << 1)
13#define ENABLE_PORT3 (1 << 2)
14#define ENABLE_PORT_ALL (ENABLE_PORT1 | ENABLE_PORT2 | ENABLE_PORT3)
15
16#define POWER_SENSE_LOW (1 << 3)
17#define POWER_CONTROL_LOW (1 << 4)
18#define NO_OC_PROTECTION (1 << 5)
19#define OC_MODE_GLOBAL (0 << 6)
20#define OC_MODE_PERPORT (1 << 6)
21
22 int power_on_delay; /* Power On to Power Good time - in ms
23 * HCD must wait for this duration before
24 * accessing a powered on port
25 */
10 int port_mode; 26 int port_mode;
11#define PMM_NPS_MODE 1 27#define PMM_NPS_MODE 1
12#define PMM_GLOBAL_MODE 2 28#define PMM_GLOBAL_MODE 2
diff --git a/arch/arm/mach-pxa/include/mach/palmz72.h b/arch/arm/mach-pxa/include/mach/palmz72.h
new file mode 100644
index 000000000000..5032307ebf7d
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/palmz72.h
@@ -0,0 +1,80 @@
1/*
2 * GPIOs and interrupts for Palm Zire72 Handheld Computer
3 *
4 * Authors: Alex Osborne <bobofdoom@gmail.com>
5 * Jan Herman <2hp@seznam.cz>
6 * Sergey Lapin <slapin@ossfans.org>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13
14#ifndef _INCLUDE_PALMZ72_H_
15#define _INCLUDE_PALMZ72_H_
16
17/* Power and control */
18#define GPIO_NR_PALMZ72_GPIO_RESET 1
19#define GPIO_NR_PALMZ72_POWER_DETECT 0
20
21/* SD/MMC */
22#define GPIO_NR_PALMZ72_SD_DETECT_N 14
23#define GPIO_NR_PALMZ72_SD_POWER_N 98
24#define GPIO_NR_PALMZ72_SD_RO 115
25
26/* Touchscreen */
27#define GPIO_NR_PALMZ72_WM9712_IRQ 27
28
29/* IRDA - disable GPIO connected to SD pin of tranceiver (TFBS4710?) ? */
30#define GPIO_NR_PALMZ72_IR_DISABLE 49
31
32/* USB */
33#define GPIO_NR_PALMZ72_USB_DETECT_N 15
34#define GPIO_NR_PALMZ72_USB_POWER 95
35#define GPIO_NR_PALMZ72_USB_PULLUP 12
36
37/* LCD/Backlight */
38#define GPIO_NR_PALMZ72_BL_POWER 20
39#define GPIO_NR_PALMZ72_LCD_POWER 96
40
41/* LED */
42#define GPIO_NR_PALMZ72_LED_GREEN 88
43
44/* Bluetooth */
45#define GPIO_NR_PALMZ72_BT_POWER 17
46#define GPIO_NR_PALMZ72_BT_RESET 83
47
48/** Initial values **/
49
50/* Battery */
51#define PALMZ72_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */
52#define PALMZ72_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */
53#define PALMZ72_BAT_MAX_CURRENT 0 /* unknokn */
54#define PALMZ72_BAT_MIN_CURRENT 0 /* unknown */
55#define PALMZ72_BAT_MAX_CHARGE 1 /* unknown */
56#define PALMZ72_BAT_MIN_CHARGE 1 /* unknown */
57#define PALMZ72_MAX_LIFE_MINS 360 /* on-life in minutes */
58
59/* Backlight */
60#define PALMZ72_MAX_INTENSITY 0xFE
61#define PALMZ72_DEFAULT_INTENSITY 0x7E
62#define PALMZ72_LIMIT_MASK 0x7F
63#define PALMZ72_PRESCALER 0x3F
64#define PALMZ72_PERIOD_NS 3500
65
66#ifdef CONFIG_PM
67struct palmz72_resume_info {
68 u32 magic0; /* 0x0 */
69 u32 magic1; /* 0x4 */
70 u32 resume_addr; /* 0x8 */
71 u32 pad[11]; /* 0xc..0x37 */
72 u32 arm_control; /* 0x38 */
73 u32 aux_control; /* 0x3c */
74 u32 ttb; /* 0x40 */
75 u32 domain_access; /* 0x44 */
76 u32 process_id; /* 0x48 */
77};
78#endif
79#endif
80
diff --git a/arch/arm/mach-pxa/include/mach/pm.h b/arch/arm/mach-pxa/include/mach/pm.h
index 261e5bc958db..83342469acac 100644
--- a/arch/arm/mach-pxa/include/mach/pm.h
+++ b/arch/arm/mach-pxa/include/mach/pm.h
@@ -15,6 +15,8 @@ struct pxa_cpu_pm_fns {
15 void (*restore)(unsigned long *); 15 void (*restore)(unsigned long *);
16 int (*valid)(suspend_state_t state); 16 int (*valid)(suspend_state_t state);
17 void (*enter)(suspend_state_t state); 17 void (*enter)(suspend_state_t state);
18 int (*prepare)(void);
19 void (*finish)(void);
18}; 20};
19 21
20extern struct pxa_cpu_pm_fns *pxa_cpu_pm_fns; 22extern struct pxa_cpu_pm_fns *pxa_cpu_pm_fns;
diff --git a/arch/arm/mach-pxa/include/mach/poodle.h b/arch/arm/mach-pxa/include/mach/poodle.h
index 67debc47e8c6..0b3e6d051c64 100644
--- a/arch/arm/mach-pxa/include/mach/poodle.h
+++ b/arch/arm/mach-pxa/include/mach/poodle.h
@@ -23,6 +23,7 @@
23#define POODLE_GPIO_AC_IN (1) 23#define POODLE_GPIO_AC_IN (1)
24#define POODLE_GPIO_CO 16 24#define POODLE_GPIO_CO 16
25#define POODLE_GPIO_TP_INT (5) 25#define POODLE_GPIO_TP_INT (5)
26#define POODLE_GPIO_TP_CS (24)
26#define POODLE_GPIO_WAKEUP (11) /* change battery */ 27#define POODLE_GPIO_WAKEUP (11) /* change battery */
27#define POODLE_GPIO_GA_INT (10) 28#define POODLE_GPIO_GA_INT (10)
28#define POODLE_GPIO_IR_ON (22) 29#define POODLE_GPIO_IR_ON (22)
@@ -70,6 +71,14 @@
70#define POODLE_SCOOP_IO_DIR ( POODLE_SCOOP_VPEN | POODLE_SCOOP_HS_OUT ) 71#define POODLE_SCOOP_IO_DIR ( POODLE_SCOOP_VPEN | POODLE_SCOOP_HS_OUT )
71#define POODLE_SCOOP_IO_OUT ( 0 ) 72#define POODLE_SCOOP_IO_OUT ( 0 )
72 73
74#define POODLE_SCOOP_GPIO_BASE (NR_BUILTIN_GPIO)
75#define POODLE_GPIO_CHARGE_ON (POODLE_SCOOP_GPIO_BASE + 0)
76#define POODLE_GPIO_CP401 (POODLE_SCOOP_GPIO_BASE + 2)
77#define POODLE_GPIO_VPEN (POODLE_SCOOP_GPIO_BASE + 7)
78#define POODLE_GPIO_L_PCLK (POODLE_SCOOP_GPIO_BASE + 9)
79#define POODLE_GPIO_L_LCLK (POODLE_SCOOP_GPIO_BASE + 10)
80#define POODLE_GPIO_HS_OUT (POODLE_SCOOP_GPIO_BASE + 11)
81
73#define POODLE_LOCOMO_GPIO_AMP_ON LOCOMO_GPIO(8) 82#define POODLE_LOCOMO_GPIO_AMP_ON LOCOMO_GPIO(8)
74#define POODLE_LOCOMO_GPIO_MUTE_L LOCOMO_GPIO(10) 83#define POODLE_LOCOMO_GPIO_MUTE_L LOCOMO_GPIO(10)
75#define POODLE_LOCOMO_GPIO_MUTE_R LOCOMO_GPIO(11) 84#define POODLE_LOCOMO_GPIO_MUTE_R LOCOMO_GPIO(11)
diff --git a/arch/arm/mach-pxa/include/mach/pxa-regs.h b/arch/arm/mach-pxa/include/mach/pxa-regs.h
index 12288ca3cbb2..15295d960000 100644
--- a/arch/arm/mach-pxa/include/mach/pxa-regs.h
+++ b/arch/arm/mach-pxa/include/mach/pxa-regs.h
@@ -69,30 +69,18 @@
69/* 69/*
70 * DMA Controller 70 * DMA Controller
71 */ 71 */
72
73#define DCSR0 __REG(0x40000000) /* DMA Control / Status Register for Channel 0 */
74#define DCSR1 __REG(0x40000004) /* DMA Control / Status Register for Channel 1 */
75#define DCSR2 __REG(0x40000008) /* DMA Control / Status Register for Channel 2 */
76#define DCSR3 __REG(0x4000000c) /* DMA Control / Status Register for Channel 3 */
77#define DCSR4 __REG(0x40000010) /* DMA Control / Status Register for Channel 4 */
78#define DCSR5 __REG(0x40000014) /* DMA Control / Status Register for Channel 5 */
79#define DCSR6 __REG(0x40000018) /* DMA Control / Status Register for Channel 6 */
80#define DCSR7 __REG(0x4000001c) /* DMA Control / Status Register for Channel 7 */
81#define DCSR8 __REG(0x40000020) /* DMA Control / Status Register for Channel 8 */
82#define DCSR9 __REG(0x40000024) /* DMA Control / Status Register for Channel 9 */
83#define DCSR10 __REG(0x40000028) /* DMA Control / Status Register for Channel 10 */
84#define DCSR11 __REG(0x4000002c) /* DMA Control / Status Register for Channel 11 */
85#define DCSR12 __REG(0x40000030) /* DMA Control / Status Register for Channel 12 */
86#define DCSR13 __REG(0x40000034) /* DMA Control / Status Register for Channel 13 */
87#define DCSR14 __REG(0x40000038) /* DMA Control / Status Register for Channel 14 */
88#define DCSR15 __REG(0x4000003c) /* DMA Control / Status Register for Channel 15 */
89
90#define DCSR(x) __REG2(0x40000000, (x) << 2) 72#define DCSR(x) __REG2(0x40000000, (x) << 2)
91 73
92#define DCSR_RUN (1 << 31) /* Run Bit (read / write) */ 74#define DCSR_RUN (1 << 31) /* Run Bit (read / write) */
93#define DCSR_NODESC (1 << 30) /* No-Descriptor Fetch (read / write) */ 75#define DCSR_NODESC (1 << 30) /* No-Descriptor Fetch (read / write) */
94#define DCSR_STOPIRQEN (1 << 29) /* Stop Interrupt Enable (read / write) */ 76#define DCSR_STOPIRQEN (1 << 29) /* Stop Interrupt Enable (read / write) */
95#ifdef CONFIG_PXA27x 77#define DCSR_REQPEND (1 << 8) /* Request Pending (read-only) */
78#define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */
79#define DCSR_ENDINTR (1 << 2) /* End Interrupt (read / write) */
80#define DCSR_STARTINTR (1 << 1) /* Start Interrupt (read / write) */
81#define DCSR_BUSERR (1 << 0) /* Bus Error Interrupt (read / write) */
82
83#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
96#define DCSR_EORIRQEN (1 << 28) /* End of Receive Interrupt Enable (R/W) */ 84#define DCSR_EORIRQEN (1 << 28) /* End of Receive Interrupt Enable (R/W) */
97#define DCSR_EORJMPEN (1 << 27) /* Jump to next descriptor on EOR */ 85#define DCSR_EORJMPEN (1 << 27) /* Jump to next descriptor on EOR */
98#define DCSR_EORSTOPEN (1 << 26) /* STOP on an EOR */ 86#define DCSR_EORSTOPEN (1 << 26) /* STOP on an EOR */
@@ -101,11 +89,6 @@
101#define DCSR_CMPST (1 << 10) /* The Descriptor Compare Status */ 89#define DCSR_CMPST (1 << 10) /* The Descriptor Compare Status */
102#define DCSR_EORINTR (1 << 9) /* The end of Receive */ 90#define DCSR_EORINTR (1 << 9) /* The end of Receive */
103#endif 91#endif
104#define DCSR_REQPEND (1 << 8) /* Request Pending (read-only) */
105#define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */
106#define DCSR_ENDINTR (1 << 2) /* End Interrupt (read / write) */
107#define DCSR_STARTINTR (1 << 1) /* Start Interrupt (read / write) */
108#define DCSR_BUSERR (1 << 0) /* Bus Error Interrupt (read / write) */
109 92
110#define DALGN __REG(0x400000a0) /* DMA Alignment Register */ 93#define DALGN __REG(0x400000a0) /* DMA Alignment Register */
111#define DINT __REG(0x400000f0) /* DMA Interrupt Register */ 94#define DINT __REG(0x400000f0) /* DMA Interrupt Register */
@@ -114,145 +97,9 @@
114 &__REG2(0x40000100, ((n) & 0x3f) << 2) : \ 97 &__REG2(0x40000100, ((n) & 0x3f) << 2) : \
115 &__REG2(0x40001100, ((n) & 0x3f) << 2))) 98 &__REG2(0x40001100, ((n) & 0x3f) << 2)))
116 99
117#define DRCMR0 __REG(0x40000100) /* Request to Channel Map Register for DREQ 0 */
118#define DRCMR1 __REG(0x40000104) /* Request to Channel Map Register for DREQ 1 */
119#define DRCMR2 __REG(0x40000108) /* Request to Channel Map Register for I2S receive Request */
120#define DRCMR3 __REG(0x4000010c) /* Request to Channel Map Register for I2S transmit Request */
121#define DRCMR4 __REG(0x40000110) /* Request to Channel Map Register for BTUART receive Request */
122#define DRCMR5 __REG(0x40000114) /* Request to Channel Map Register for BTUART transmit Request. */
123#define DRCMR6 __REG(0x40000118) /* Request to Channel Map Register for FFUART receive Request */
124#define DRCMR7 __REG(0x4000011c) /* Request to Channel Map Register for FFUART transmit Request */
125#define DRCMR8 __REG(0x40000120) /* Request to Channel Map Register for AC97 microphone Request */
126#define DRCMR9 __REG(0x40000124) /* Request to Channel Map Register for AC97 modem receive Request */
127#define DRCMR10 __REG(0x40000128) /* Request to Channel Map Register for AC97 modem transmit Request */
128#define DRCMR11 __REG(0x4000012c) /* Request to Channel Map Register for AC97 audio receive Request */
129#define DRCMR12 __REG(0x40000130) /* Request to Channel Map Register for AC97 audio transmit Request */
130#define DRCMR13 __REG(0x40000134) /* Request to Channel Map Register for SSP receive Request */
131#define DRCMR14 __REG(0x40000138) /* Request to Channel Map Register for SSP transmit Request */
132#define DRCMR15 __REG(0x4000013c) /* Request to Channel Map Register for SSP2 receive Request */
133#define DRCMR16 __REG(0x40000140) /* Request to Channel Map Register for SSP2 transmit Request */
134#define DRCMR17 __REG(0x40000144) /* Request to Channel Map Register for ICP receive Request */
135#define DRCMR18 __REG(0x40000148) /* Request to Channel Map Register for ICP transmit Request */
136#define DRCMR19 __REG(0x4000014c) /* Request to Channel Map Register for STUART receive Request */
137#define DRCMR20 __REG(0x40000150) /* Request to Channel Map Register for STUART transmit Request */
138#define DRCMR21 __REG(0x40000154) /* Request to Channel Map Register for MMC receive Request */
139#define DRCMR22 __REG(0x40000158) /* Request to Channel Map Register for MMC transmit Request */
140#define DRCMR23 __REG(0x4000015c) /* Reserved */
141#define DRCMR24 __REG(0x40000160) /* Reserved */
142#define DRCMR25 __REG(0x40000164) /* Request to Channel Map Register for USB endpoint 1 Request */
143#define DRCMR26 __REG(0x40000168) /* Request to Channel Map Register for USB endpoint 2 Request */
144#define DRCMR27 __REG(0x4000016C) /* Request to Channel Map Register for USB endpoint 3 Request */
145#define DRCMR28 __REG(0x40000170) /* Request to Channel Map Register for USB endpoint 4 Request */
146#define DRCMR29 __REG(0x40000174) /* Reserved */
147#define DRCMR30 __REG(0x40000178) /* Request to Channel Map Register for USB endpoint 6 Request */
148#define DRCMR31 __REG(0x4000017C) /* Request to Channel Map Register for USB endpoint 7 Request */
149#define DRCMR32 __REG(0x40000180) /* Request to Channel Map Register for USB endpoint 8 Request */
150#define DRCMR33 __REG(0x40000184) /* Request to Channel Map Register for USB endpoint 9 Request */
151#define DRCMR34 __REG(0x40000188) /* Reserved */
152#define DRCMR35 __REG(0x4000018C) /* Request to Channel Map Register for USB endpoint 11 Request */
153#define DRCMR36 __REG(0x40000190) /* Request to Channel Map Register for USB endpoint 12 Request */
154#define DRCMR37 __REG(0x40000194) /* Request to Channel Map Register for USB endpoint 13 Request */
155#define DRCMR38 __REG(0x40000198) /* Request to Channel Map Register for USB endpoint 14 Request */
156#define DRCMR39 __REG(0x4000019C) /* Reserved */
157#define DRCMR66 __REG(0x40001108) /* Request to Channel Map Register for SSP3 receive Request */
158#define DRCMR67 __REG(0x4000110C) /* Request to Channel Map Register for SSP3 transmit Request */
159#define DRCMR68 __REG(0x40001110) /* Request to Channel Map Register for Camera FIFO 0 Request */
160#define DRCMR69 __REG(0x40001114) /* Request to Channel Map Register for Camera FIFO 1 Request */
161#define DRCMR70 __REG(0x40001118) /* Request to Channel Map Register for Camera FIFO 2 Request */
162
163#define DRCMRRXSADR DRCMR2
164#define DRCMRTXSADR DRCMR3
165#define DRCMRRXBTRBR DRCMR4
166#define DRCMRTXBTTHR DRCMR5
167#define DRCMRRXFFRBR DRCMR6
168#define DRCMRTXFFTHR DRCMR7
169#define DRCMRRXMCDR DRCMR8
170#define DRCMRRXMODR DRCMR9
171#define DRCMRTXMODR DRCMR10
172#define DRCMRRXPCDR DRCMR11
173#define DRCMRTXPCDR DRCMR12
174#define DRCMRRXSSDR DRCMR13
175#define DRCMRTXSSDR DRCMR14
176#define DRCMRRXSS2DR DRCMR15
177#define DRCMRTXSS2DR DRCMR16
178#define DRCMRRXICDR DRCMR17
179#define DRCMRTXICDR DRCMR18
180#define DRCMRRXSTRBR DRCMR19
181#define DRCMRTXSTTHR DRCMR20
182#define DRCMRRXMMC DRCMR21
183#define DRCMRTXMMC DRCMR22
184#define DRCMRRXSS3DR DRCMR66
185#define DRCMRTXSS3DR DRCMR67
186#define DRCMRUDC(x) DRCMR((x) + 24)
187
188#define DRCMR_MAPVLD (1 << 7) /* Map Valid (read / write) */ 100#define DRCMR_MAPVLD (1 << 7) /* Map Valid (read / write) */
189#define DRCMR_CHLNUM 0x1f /* mask for Channel Number (read / write) */ 101#define DRCMR_CHLNUM 0x1f /* mask for Channel Number (read / write) */
190 102
191#define DDADR0 __REG(0x40000200) /* DMA Descriptor Address Register Channel 0 */
192#define DSADR0 __REG(0x40000204) /* DMA Source Address Register Channel 0 */
193#define DTADR0 __REG(0x40000208) /* DMA Target Address Register Channel 0 */
194#define DCMD0 __REG(0x4000020c) /* DMA Command Address Register Channel 0 */
195#define DDADR1 __REG(0x40000210) /* DMA Descriptor Address Register Channel 1 */
196#define DSADR1 __REG(0x40000214) /* DMA Source Address Register Channel 1 */
197#define DTADR1 __REG(0x40000218) /* DMA Target Address Register Channel 1 */
198#define DCMD1 __REG(0x4000021c) /* DMA Command Address Register Channel 1 */
199#define DDADR2 __REG(0x40000220) /* DMA Descriptor Address Register Channel 2 */
200#define DSADR2 __REG(0x40000224) /* DMA Source Address Register Channel 2 */
201#define DTADR2 __REG(0x40000228) /* DMA Target Address Register Channel 2 */
202#define DCMD2 __REG(0x4000022c) /* DMA Command Address Register Channel 2 */
203#define DDADR3 __REG(0x40000230) /* DMA Descriptor Address Register Channel 3 */
204#define DSADR3 __REG(0x40000234) /* DMA Source Address Register Channel 3 */
205#define DTADR3 __REG(0x40000238) /* DMA Target Address Register Channel 3 */
206#define DCMD3 __REG(0x4000023c) /* DMA Command Address Register Channel 3 */
207#define DDADR4 __REG(0x40000240) /* DMA Descriptor Address Register Channel 4 */
208#define DSADR4 __REG(0x40000244) /* DMA Source Address Register Channel 4 */
209#define DTADR4 __REG(0x40000248) /* DMA Target Address Register Channel 4 */
210#define DCMD4 __REG(0x4000024c) /* DMA Command Address Register Channel 4 */
211#define DDADR5 __REG(0x40000250) /* DMA Descriptor Address Register Channel 5 */
212#define DSADR5 __REG(0x40000254) /* DMA Source Address Register Channel 5 */
213#define DTADR5 __REG(0x40000258) /* DMA Target Address Register Channel 5 */
214#define DCMD5 __REG(0x4000025c) /* DMA Command Address Register Channel 5 */
215#define DDADR6 __REG(0x40000260) /* DMA Descriptor Address Register Channel 6 */
216#define DSADR6 __REG(0x40000264) /* DMA Source Address Register Channel 6 */
217#define DTADR6 __REG(0x40000268) /* DMA Target Address Register Channel 6 */
218#define DCMD6 __REG(0x4000026c) /* DMA Command Address Register Channel 6 */
219#define DDADR7 __REG(0x40000270) /* DMA Descriptor Address Register Channel 7 */
220#define DSADR7 __REG(0x40000274) /* DMA Source Address Register Channel 7 */
221#define DTADR7 __REG(0x40000278) /* DMA Target Address Register Channel 7 */
222#define DCMD7 __REG(0x4000027c) /* DMA Command Address Register Channel 7 */
223#define DDADR8 __REG(0x40000280) /* DMA Descriptor Address Register Channel 8 */
224#define DSADR8 __REG(0x40000284) /* DMA Source Address Register Channel 8 */
225#define DTADR8 __REG(0x40000288) /* DMA Target Address Register Channel 8 */
226#define DCMD8 __REG(0x4000028c) /* DMA Command Address Register Channel 8 */
227#define DDADR9 __REG(0x40000290) /* DMA Descriptor Address Register Channel 9 */
228#define DSADR9 __REG(0x40000294) /* DMA Source Address Register Channel 9 */
229#define DTADR9 __REG(0x40000298) /* DMA Target Address Register Channel 9 */
230#define DCMD9 __REG(0x4000029c) /* DMA Command Address Register Channel 9 */
231#define DDADR10 __REG(0x400002a0) /* DMA Descriptor Address Register Channel 10 */
232#define DSADR10 __REG(0x400002a4) /* DMA Source Address Register Channel 10 */
233#define DTADR10 __REG(0x400002a8) /* DMA Target Address Register Channel 10 */
234#define DCMD10 __REG(0x400002ac) /* DMA Command Address Register Channel 10 */
235#define DDADR11 __REG(0x400002b0) /* DMA Descriptor Address Register Channel 11 */
236#define DSADR11 __REG(0x400002b4) /* DMA Source Address Register Channel 11 */
237#define DTADR11 __REG(0x400002b8) /* DMA Target Address Register Channel 11 */
238#define DCMD11 __REG(0x400002bc) /* DMA Command Address Register Channel 11 */
239#define DDADR12 __REG(0x400002c0) /* DMA Descriptor Address Register Channel 12 */
240#define DSADR12 __REG(0x400002c4) /* DMA Source Address Register Channel 12 */
241#define DTADR12 __REG(0x400002c8) /* DMA Target Address Register Channel 12 */
242#define DCMD12 __REG(0x400002cc) /* DMA Command Address Register Channel 12 */
243#define DDADR13 __REG(0x400002d0) /* DMA Descriptor Address Register Channel 13 */
244#define DSADR13 __REG(0x400002d4) /* DMA Source Address Register Channel 13 */
245#define DTADR13 __REG(0x400002d8) /* DMA Target Address Register Channel 13 */
246#define DCMD13 __REG(0x400002dc) /* DMA Command Address Register Channel 13 */
247#define DDADR14 __REG(0x400002e0) /* DMA Descriptor Address Register Channel 14 */
248#define DSADR14 __REG(0x400002e4) /* DMA Source Address Register Channel 14 */
249#define DTADR14 __REG(0x400002e8) /* DMA Target Address Register Channel 14 */
250#define DCMD14 __REG(0x400002ec) /* DMA Command Address Register Channel 14 */
251#define DDADR15 __REG(0x400002f0) /* DMA Descriptor Address Register Channel 15 */
252#define DSADR15 __REG(0x400002f4) /* DMA Source Address Register Channel 15 */
253#define DTADR15 __REG(0x400002f8) /* DMA Target Address Register Channel 15 */
254#define DCMD15 __REG(0x400002fc) /* DMA Command Address Register Channel 15 */
255
256#define DDADR(x) __REG2(0x40000200, (x) << 4) 103#define DDADR(x) __REG2(0x40000200, (x) << 4)
257#define DSADR(x) __REG2(0x40000204, (x) << 4) 104#define DSADR(x) __REG2(0x40000204, (x) << 4)
258#define DTADR(x) __REG2(0x40000208, (x) << 4) 105#define DTADR(x) __REG2(0x40000208, (x) << 4)
@@ -418,91 +265,13 @@
418 265
419 266
420/* 267/*
421 * I2C registers 268 * I2C registers - moved into drivers/i2c/busses/i2c-pxa.c
422 */ 269 */
423 270
424#define IBMR __REG(0x40301680) /* I2C Bus Monitor Register - IBMR */
425#define IDBR __REG(0x40301688) /* I2C Data Buffer Register - IDBR */
426#define ICR __REG(0x40301690) /* I2C Control Register - ICR */
427#define ISR __REG(0x40301698) /* I2C Status Register - ISR */
428#define ISAR __REG(0x403016A0) /* I2C Slave Address Register - ISAR */
429
430#define PWRIBMR __REG(0x40f00180) /* Power I2C Bus Monitor Register-IBMR */
431#define PWRIDBR __REG(0x40f00188) /* Power I2C Data Buffer Register-IDBR */
432#define PWRICR __REG(0x40f00190) /* Power I2C Control Register - ICR */
433#define PWRISR __REG(0x40f00198) /* Power I2C Status Register - ISR */
434#define PWRISAR __REG(0x40f001A0) /*Power I2C Slave Address Register-ISAR */
435
436#define ICR_START (1 << 0) /* start bit */
437#define ICR_STOP (1 << 1) /* stop bit */
438#define ICR_ACKNAK (1 << 2) /* send ACK(0) or NAK(1) */
439#define ICR_TB (1 << 3) /* transfer byte bit */
440#define ICR_MA (1 << 4) /* master abort */
441#define ICR_SCLE (1 << 5) /* master clock enable */
442#define ICR_IUE (1 << 6) /* unit enable */
443#define ICR_GCD (1 << 7) /* general call disable */
444#define ICR_ITEIE (1 << 8) /* enable tx interrupts */
445#define ICR_IRFIE (1 << 9) /* enable rx interrupts */
446#define ICR_BEIE (1 << 10) /* enable bus error ints */
447#define ICR_SSDIE (1 << 11) /* slave STOP detected int enable */
448#define ICR_ALDIE (1 << 12) /* enable arbitration interrupt */
449#define ICR_SADIE (1 << 13) /* slave address detected int enable */
450#define ICR_UR (1 << 14) /* unit reset */
451
452#define ISR_RWM (1 << 0) /* read/write mode */
453#define ISR_ACKNAK (1 << 1) /* ack/nak status */
454#define ISR_UB (1 << 2) /* unit busy */
455#define ISR_IBB (1 << 3) /* bus busy */
456#define ISR_SSD (1 << 4) /* slave stop detected */
457#define ISR_ALD (1 << 5) /* arbitration loss detected */
458#define ISR_ITE (1 << 6) /* tx buffer empty */
459#define ISR_IRF (1 << 7) /* rx buffer full */
460#define ISR_GCAD (1 << 8) /* general call address detected */
461#define ISR_SAD (1 << 9) /* slave address detected */
462#define ISR_BED (1 << 10) /* bus error no ACK/NAK */
463
464
465/* 271/*
466 * Serial Audio Controller 272 * Serial Audio Controller - moved into sound/soc/pxa/pxa2xx-i2s.c
467 */ 273 */
468 274
469#define SACR0 __REG(0x40400000) /* Global Control Register */
470#define SACR1 __REG(0x40400004) /* Serial Audio I 2 S/MSB-Justified Control Register */
471#define SASR0 __REG(0x4040000C) /* Serial Audio I 2 S/MSB-Justified Interface and FIFO Status Register */
472#define SAIMR __REG(0x40400014) /* Serial Audio Interrupt Mask Register */
473#define SAICR __REG(0x40400018) /* Serial Audio Interrupt Clear Register */
474#define SADIV __REG(0x40400060) /* Audio Clock Divider Register. */
475#define SADR __REG(0x40400080) /* Serial Audio Data Register (TX and RX FIFO access Register). */
476
477#define SACR0_RFTH(x) ((x) << 12) /* Rx FIFO Interrupt or DMA Trigger Threshold */
478#define SACR0_TFTH(x) ((x) << 8) /* Tx FIFO Interrupt or DMA Trigger Threshold */
479#define SACR0_STRF (1 << 5) /* FIFO Select for EFWR Special Function */
480#define SACR0_EFWR (1 << 4) /* Enable EFWR Function */
481#define SACR0_RST (1 << 3) /* FIFO, i2s Register Reset */
482#define SACR0_BCKD (1 << 2) /* Bit Clock Direction */
483#define SACR0_ENB (1 << 0) /* Enable I2S Link */
484#define SACR1_ENLBF (1 << 5) /* Enable Loopback */
485#define SACR1_DRPL (1 << 4) /* Disable Replaying Function */
486#define SACR1_DREC (1 << 3) /* Disable Recording Function */
487#define SACR1_AMSL (1 << 0) /* Specify Alternate Mode */
488
489#define SASR0_I2SOFF (1 << 7) /* Controller Status */
490#define SASR0_ROR (1 << 6) /* Rx FIFO Overrun */
491#define SASR0_TUR (1 << 5) /* Tx FIFO Underrun */
492#define SASR0_RFS (1 << 4) /* Rx FIFO Service Request */
493#define SASR0_TFS (1 << 3) /* Tx FIFO Service Request */
494#define SASR0_BSY (1 << 2) /* I2S Busy */
495#define SASR0_RNE (1 << 1) /* Rx FIFO Not Empty */
496#define SASR0_TNF (1 << 0) /* Tx FIFO Not Empty */
497
498#define SAICR_ROR (1 << 6) /* Clear Rx FIFO Overrun Interrupt */
499#define SAICR_TUR (1 << 5) /* Clear Tx FIFO Underrun Interrupt */
500
501#define SAIMR_ROR (1 << 6) /* Enable Rx FIFO Overrun Condition Interrupt */
502#define SAIMR_TUR (1 << 5) /* Enable Tx FIFO Underrun Condition Interrupt */
503#define SAIMR_RFS (1 << 4) /* Enable Rx FIFO Service Interrupt */
504#define SAIMR_TFS (1 << 3) /* Enable Tx FIFO Service Interrupt */
505
506/* 275/*
507 * AC97 Controller registers 276 * AC97 Controller registers
508 */ 277 */
@@ -989,77 +758,6 @@
989 758
990#endif 759#endif
991 760
992#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
993/*
994 * UHC: USB Host Controller (OHCI-like) register definitions
995 */
996#define UHC_BASE_PHYS (0x4C000000)
997#define UHCREV __REG(0x4C000000) /* UHC HCI Spec Revision */
998#define UHCHCON __REG(0x4C000004) /* UHC Host Control Register */
999#define UHCCOMS __REG(0x4C000008) /* UHC Command Status Register */
1000#define UHCINTS __REG(0x4C00000C) /* UHC Interrupt Status Register */
1001#define UHCINTE __REG(0x4C000010) /* UHC Interrupt Enable */
1002#define UHCINTD __REG(0x4C000014) /* UHC Interrupt Disable */
1003#define UHCHCCA __REG(0x4C000018) /* UHC Host Controller Comm. Area */
1004#define UHCPCED __REG(0x4C00001C) /* UHC Period Current Endpt Descr */
1005#define UHCCHED __REG(0x4C000020) /* UHC Control Head Endpt Descr */
1006#define UHCCCED __REG(0x4C000024) /* UHC Control Current Endpt Descr */
1007#define UHCBHED __REG(0x4C000028) /* UHC Bulk Head Endpt Descr */
1008#define UHCBCED __REG(0x4C00002C) /* UHC Bulk Current Endpt Descr */
1009#define UHCDHEAD __REG(0x4C000030) /* UHC Done Head */
1010#define UHCFMI __REG(0x4C000034) /* UHC Frame Interval */
1011#define UHCFMR __REG(0x4C000038) /* UHC Frame Remaining */
1012#define UHCFMN __REG(0x4C00003C) /* UHC Frame Number */
1013#define UHCPERS __REG(0x4C000040) /* UHC Periodic Start */
1014#define UHCLS __REG(0x4C000044) /* UHC Low Speed Threshold */
1015
1016#define UHCRHDA __REG(0x4C000048) /* UHC Root Hub Descriptor A */
1017#define UHCRHDA_NOCP (1 << 12) /* No over current protection */
1018
1019#define UHCRHDB __REG(0x4C00004C) /* UHC Root Hub Descriptor B */
1020#define UHCRHS __REG(0x4C000050) /* UHC Root Hub Status */
1021#define UHCRHPS1 __REG(0x4C000054) /* UHC Root Hub Port 1 Status */
1022#define UHCRHPS2 __REG(0x4C000058) /* UHC Root Hub Port 2 Status */
1023#define UHCRHPS3 __REG(0x4C00005C) /* UHC Root Hub Port 3 Status */
1024
1025#define UHCSTAT __REG(0x4C000060) /* UHC Status Register */
1026#define UHCSTAT_UPS3 (1 << 16) /* USB Power Sense Port3 */
1027#define UHCSTAT_SBMAI (1 << 15) /* System Bus Master Abort Interrupt*/
1028#define UHCSTAT_SBTAI (1 << 14) /* System Bus Target Abort Interrupt*/
1029#define UHCSTAT_UPRI (1 << 13) /* USB Port Resume Interrupt */
1030#define UHCSTAT_UPS2 (1 << 12) /* USB Power Sense Port 2 */
1031#define UHCSTAT_UPS1 (1 << 11) /* USB Power Sense Port 1 */
1032#define UHCSTAT_HTA (1 << 10) /* HCI Target Abort */
1033#define UHCSTAT_HBA (1 << 8) /* HCI Buffer Active */
1034#define UHCSTAT_RWUE (1 << 7) /* HCI Remote Wake Up Event */
1035
1036#define UHCHR __REG(0x4C000064) /* UHC Reset Register */
1037#define UHCHR_SSEP3 (1 << 11) /* Sleep Standby Enable for Port3 */
1038#define UHCHR_SSEP2 (1 << 10) /* Sleep Standby Enable for Port2 */
1039#define UHCHR_SSEP1 (1 << 9) /* Sleep Standby Enable for Port1 */
1040#define UHCHR_PCPL (1 << 7) /* Power control polarity low */
1041#define UHCHR_PSPL (1 << 6) /* Power sense polarity low */
1042#define UHCHR_SSE (1 << 5) /* Sleep Standby Enable */
1043#define UHCHR_UIT (1 << 4) /* USB Interrupt Test */
1044#define UHCHR_SSDC (1 << 3) /* Simulation Scale Down Clock */
1045#define UHCHR_CGR (1 << 2) /* Clock Generation Reset */
1046#define UHCHR_FHR (1 << 1) /* Force Host Controller Reset */
1047#define UHCHR_FSBIR (1 << 0) /* Force System Bus Iface Reset */
1048
1049#define UHCHIE __REG(0x4C000068) /* UHC Interrupt Enable Register*/
1050#define UHCHIE_UPS3IE (1 << 14) /* Power Sense Port3 IntEn */
1051#define UHCHIE_UPRIE (1 << 13) /* Port Resume IntEn */
1052#define UHCHIE_UPS2IE (1 << 12) /* Power Sense Port2 IntEn */
1053#define UHCHIE_UPS1IE (1 << 11) /* Power Sense Port1 IntEn */
1054#define UHCHIE_TAIE (1 << 10) /* HCI Interface Transfer Abort
1055 Interrupt Enable*/
1056#define UHCHIE_HBAIE (1 << 8) /* HCI Buffer Active IntEn */
1057#define UHCHIE_RWIE (1 << 7) /* Remote Wake-up IntEn */
1058
1059#define UHCHIT __REG(0x4C00006C) /* UHC Interrupt Test register */
1060
1061#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
1062
1063/* PWRMODE register M field values */ 761/* PWRMODE register M field values */
1064 762
1065#define PWRMODE_IDLE 0x1 763#define PWRMODE_IDLE 0x1
diff --git a/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h b/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h
index 39eb68319e28..b1fcd10ab6c6 100644
--- a/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h
+++ b/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h
@@ -131,6 +131,28 @@
131#define CKENB __REG(0x41340010) /* B Clock Enable Register */ 131#define CKENB __REG(0x41340010) /* B Clock Enable Register */
132#define AC97_DIV __REG(0x41340014) /* AC97 clock divisor value register */ 132#define AC97_DIV __REG(0x41340014) /* AC97 clock divisor value register */
133 133
134#define ACCR_XPDIS (1 << 31) /* Core PLL Output Disable */
135#define ACCR_SPDIS (1 << 30) /* System PLL Output Disable */
136#define ACCR_D0CS (1 << 26) /* D0 Mode Clock Select */
137#define ACCR_PCCE (1 << 11) /* Power Mode Change Clock Enable */
138#define ACCR_DDR_D0CS (1 << 7) /* DDR SDRAM clock frequency in D0CS (PXA31x only) */
139
140#define ACCR_SMCFS_MASK (0x7 << 23) /* Static Memory Controller Frequency Select */
141#define ACCR_SFLFS_MASK (0x3 << 18) /* Frequency Select for Internal Memory Controller */
142#define ACCR_XSPCLK_MASK (0x3 << 16) /* Core Frequency during Frequency Change */
143#define ACCR_HSS_MASK (0x3 << 14) /* System Bus-Clock Frequency Select */
144#define ACCR_DMCFS_MASK (0x3 << 12) /* Dynamic Memory Controller Clock Frequency Select */
145#define ACCR_XN_MASK (0x7 << 8) /* Core PLL Turbo-Mode-to-Run-Mode Ratio */
146#define ACCR_XL_MASK (0x1f) /* Core PLL Run-Mode-to-Oscillator Ratio */
147
148#define ACCR_SMCFS(x) (((x) & 0x7) << 23)
149#define ACCR_SFLFS(x) (((x) & 0x3) << 18)
150#define ACCR_XSPCLK(x) (((x) & 0x3) << 16)
151#define ACCR_HSS(x) (((x) & 0x3) << 14)
152#define ACCR_DMCFS(x) (((x) & 0x3) << 12)
153#define ACCR_XN(x) (((x) & 0x7) << 8)
154#define ACCR_XL(x) ((x) & 0x1f)
155
134/* 156/*
135 * Clock Enable Bit 157 * Clock Enable Bit
136 */ 158 */
diff --git a/arch/arm/mach-pxa/include/mach/reset.h b/arch/arm/mach-pxa/include/mach/reset.h
index 9489a48871a8..7b8842cfa5fc 100644
--- a/arch/arm/mach-pxa/include/mach/reset.h
+++ b/arch/arm/mach-pxa/include/mach/reset.h
@@ -10,9 +10,12 @@
10extern unsigned int reset_status; 10extern unsigned int reset_status;
11extern void clear_reset_status(unsigned int mask); 11extern void clear_reset_status(unsigned int mask);
12 12
13/* 13/**
14 * register GPIO as reset generator 14 * init_gpio_reset() - register GPIO as reset generator
15 *
16 * @gpio - gpio nr
17 * @output - set gpio as out/low instead of input during normal work
15 */ 18 */
16extern int init_gpio_reset(int gpio); 19extern int init_gpio_reset(int gpio, int output);
17 20
18#endif /* __ASM_ARCH_RESET_H */ 21#endif /* __ASM_ARCH_RESET_H */
diff --git a/arch/arm/mach-pxa/include/mach/spitz.h b/arch/arm/mach-pxa/include/mach/spitz.h
index bd14365f7ed5..31ac26b55bc1 100644
--- a/arch/arm/mach-pxa/include/mach/spitz.h
+++ b/arch/arm/mach-pxa/include/mach/spitz.h
@@ -16,6 +16,7 @@
16#endif 16#endif
17 17
18#include <linux/fb.h> 18#include <linux/fb.h>
19#include <linux/gpio.h>
19 20
20/* Spitz/Akita GPIOs */ 21/* Spitz/Akita GPIOs */
21 22
@@ -100,13 +101,24 @@
100#define SPITZ_SCP_JK_A SCOOP_GPCR_PA18 /* Low */ 101#define SPITZ_SCP_JK_A SCOOP_GPCR_PA18 /* Low */
101#define SPITZ_SCP_ADC_TEMP_ON SCOOP_GPCR_PA19 /* Low */ 102#define SPITZ_SCP_ADC_TEMP_ON SCOOP_GPCR_PA19 /* Low */
102 103
103#define SPITZ_SCP_IO_DIR (SPITZ_SCP_LED_GREEN | SPITZ_SCP_JK_B | SPITZ_SCP_CHRG_ON | \ 104#define SPITZ_SCP_IO_DIR (SPITZ_SCP_JK_B | SPITZ_SCP_CHRG_ON | \
104 SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | SPITZ_SCP_LED_ORANGE | \ 105 SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | \
105 SPITZ_SCP_CF_POWER | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON) 106 SPITZ_SCP_CF_POWER | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON)
106#define SPITZ_SCP_IO_OUT (SPITZ_SCP_CHRG_ON | SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R) 107#define SPITZ_SCP_IO_OUT (SPITZ_SCP_CHRG_ON | SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R)
107#define SPITZ_SCP_SUS_CLR (SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON) 108#define SPITZ_SCP_SUS_CLR (SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON)
108#define SPITZ_SCP_SUS_SET 0 109#define SPITZ_SCP_SUS_SET 0
109 110
111#define SPITZ_SCP_GPIO_BASE (NR_BUILTIN_GPIO)
112#define SPITZ_GPIO_LED_GREEN (SPITZ_SCP_GPIO_BASE + 0)
113#define SPITZ_GPIO_JK_B (SPITZ_SCP_GPIO_BASE + 1)
114#define SPITZ_GPIO_CHRG_ON (SPITZ_SCP_GPIO_BASE + 2)
115#define SPITZ_GPIO_MUTE_L (SPITZ_SCP_GPIO_BASE + 3)
116#define SPITZ_GPIO_MUTE_R (SPITZ_SCP_GPIO_BASE + 4)
117#define SPITZ_GPIO_CF_POWER (SPITZ_SCP_GPIO_BASE + 5)
118#define SPITZ_GPIO_LED_ORANGE (SPITZ_SCP_GPIO_BASE + 6)
119#define SPITZ_GPIO_JK_A (SPITZ_SCP_GPIO_BASE + 7)
120#define SPITZ_GPIO_ADC_TEMP_ON (SPITZ_SCP_GPIO_BASE + 8)
121
110/* Spitz Scoop Device (No. 2) GPIOs */ 122/* Spitz Scoop Device (No. 2) GPIOs */
111/* Suspend States in comments */ 123/* Suspend States in comments */
112#define SPITZ_SCP2_IR_ON SCOOP_GPCR_PA11 /* High */ 124#define SPITZ_SCP2_IR_ON SCOOP_GPCR_PA11 /* High */
@@ -119,15 +131,36 @@
119#define SPITZ_SCP2_BACKLIGHT_ON SCOOP_GPCR_PA18 /* Low */ 131#define SPITZ_SCP2_BACKLIGHT_ON SCOOP_GPCR_PA18 /* Low */
120#define SPITZ_SCP2_MIC_BIAS SCOOP_GPCR_PA19 /* Low */ 132#define SPITZ_SCP2_MIC_BIAS SCOOP_GPCR_PA19 /* Low */
121 133
122#define SPITZ_SCP2_IO_DIR (SPITZ_SCP2_IR_ON | SPITZ_SCP2_AKIN_PULLUP | SPITZ_SCP2_RESERVED_1 | \ 134#define SPITZ_SCP2_IO_DIR (SPITZ_SCP2_AKIN_PULLUP | SPITZ_SCP2_RESERVED_1 | \
123 SPITZ_SCP2_RESERVED_2 | SPITZ_SCP2_RESERVED_3 | SPITZ_SCP2_RESERVED_4 | \ 135 SPITZ_SCP2_RESERVED_2 | SPITZ_SCP2_RESERVED_3 | SPITZ_SCP2_RESERVED_4 | \
124 SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS) 136 SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS)
125 137
126#define SPITZ_SCP2_IO_OUT (SPITZ_SCP2_IR_ON | SPITZ_SCP2_AKIN_PULLUP | SPITZ_SCP2_RESERVED_1) 138#define SPITZ_SCP2_IO_OUT (SPITZ_SCP2_AKIN_PULLUP | SPITZ_SCP2_RESERVED_1)
127#define SPITZ_SCP2_SUS_CLR (SPITZ_SCP2_RESERVED_2 | SPITZ_SCP2_RESERVED_3 | SPITZ_SCP2_RESERVED_4 | \ 139#define SPITZ_SCP2_SUS_CLR (SPITZ_SCP2_RESERVED_2 | SPITZ_SCP2_RESERVED_3 | SPITZ_SCP2_RESERVED_4 | \
128 SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS) 140 SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS)
129#define SPITZ_SCP2_SUS_SET (SPITZ_SCP2_IR_ON | SPITZ_SCP2_RESERVED_1) 141#define SPITZ_SCP2_SUS_SET (SPITZ_SCP2_IR_ON | SPITZ_SCP2_RESERVED_1)
130 142
143#define SPITZ_SCP2_GPIO_BASE (NR_BUILTIN_GPIO + 12)
144#define SPITZ_GPIO_IR_ON (SPITZ_SCP2_GPIO_BASE + 0)
145#define SPITZ_GPIO_AKIN_PULLUP (SPITZ_SCP2_GPIO_BASE + 1
146#define SPITZ_GPIO_RESERVED_1 (SPITZ_SCP2_GPIO_BASE + 2)
147#define SPITZ_GPIO_RESERVED_2 (SPITZ_SCP2_GPIO_BASE + 3)
148#define SPITZ_GPIO_RESERVED_3 (SPITZ_SCP2_GPIO_BASE + 4)
149#define SPITZ_GPIO_RESERVED_4 (SPITZ_SCP2_GPIO_BASE + 5)
150#define SPITZ_GPIO_BACKLIGHT_CONT (SPITZ_SCP2_GPIO_BASE + 6)
151#define SPITZ_GPIO_BACKLIGHT_ON (SPITZ_SCP2_GPIO_BASE + 7)
152#define SPITZ_GPIO_MIC_BIAS (SPITZ_SCP2_GPIO_BASE + 8)
153
154/* Akita IO Expander GPIOs */
155#define AKITA_IOEXP_GPIO_BASE (NR_BUILTIN_GPIO + 12)
156#define AKITA_GPIO_RESERVED_0 (AKITA_IOEXP_GPIO_BASE + 0)
157#define AKITA_GPIO_RESERVED_1 (AKITA_IOEXP_GPIO_BASE + 1)
158#define AKITA_GPIO_MIC_BIAS (AKITA_IOEXP_GPIO_BASE + 2)
159#define AKITA_GPIO_BACKLIGHT_ON (AKITA_IOEXP_GPIO_BASE + 3)
160#define AKITA_GPIO_BACKLIGHT_CONT (AKITA_IOEXP_GPIO_BASE + 4)
161#define AKITA_GPIO_AKIN_PULLUP (AKITA_IOEXP_GPIO_BASE + 5)
162#define AKITA_GPIO_IR_ON (AKITA_IOEXP_GPIO_BASE + 6)
163#define AKITA_GPIO_RESERVED_7 (AKITA_IOEXP_GPIO_BASE + 7)
131 164
132/* Spitz IRQ Definitions */ 165/* Spitz IRQ Definitions */
133 166
@@ -154,5 +187,4 @@
154 */ 187 */
155extern struct platform_device spitzscoop_device; 188extern struct platform_device spitzscoop_device;
156extern struct platform_device spitzscoop2_device; 189extern struct platform_device spitzscoop2_device;
157extern struct platform_device spitzssp_device;
158extern struct sharpsl_charger_machinfo spitz_pm_machinfo; 190extern struct sharpsl_charger_machinfo spitz_pm_machinfo;
diff --git a/arch/arm/mach-pxa/include/mach/ssp.h b/arch/arm/mach-pxa/include/mach/ssp.h
index a012882c9ee6..cb5cb766f0f1 100644
--- a/arch/arm/mach-pxa/include/mach/ssp.h
+++ b/arch/arm/mach-pxa/include/mach/ssp.h
@@ -20,6 +20,7 @@
20#define __ASM_ARCH_SSP_H 20#define __ASM_ARCH_SSP_H
21 21
22#include <linux/list.h> 22#include <linux/list.h>
23#include <linux/io.h>
23 24
24enum pxa_ssp_type { 25enum pxa_ssp_type {
25 SSP_UNDEFINED = 0, 26 SSP_UNDEFINED = 0,
@@ -78,6 +79,29 @@ int ssp_init(struct ssp_dev *dev, u32 port, u32 init_flags);
78int ssp_config(struct ssp_dev *dev, u32 mode, u32 flags, u32 psp_flags, u32 speed); 79int ssp_config(struct ssp_dev *dev, u32 mode, u32 flags, u32 psp_flags, u32 speed);
79void ssp_exit(struct ssp_dev *dev); 80void ssp_exit(struct ssp_dev *dev);
80 81
82/**
83 * ssp_write_reg - Write to a SSP register
84 *
85 * @dev: SSP device to access
86 * @reg: Register to write to
87 * @val: Value to be written.
88 */
89static inline void ssp_write_reg(struct ssp_device *dev, u32 reg, u32 val)
90{
91 __raw_writel(val, dev->mmio_base + reg);
92}
93
94/**
95 * ssp_read_reg - Read from a SSP register
96 *
97 * @dev: SSP device to access
98 * @reg: Register to read from
99 */
100static inline u32 ssp_read_reg(struct ssp_device *dev, u32 reg)
101{
102 return __raw_readl(dev->mmio_base + reg);
103}
104
81struct ssp_device *ssp_request(int port, const char *label); 105struct ssp_device *ssp_request(int port, const char *label);
82void ssp_free(struct ssp_device *); 106void ssp_free(struct ssp_device *);
83#endif /* __ASM_ARCH_SSP_H */ 107#endif /* __ASM_ARCH_SSP_H */
diff --git a/arch/arm/mach-pxa/include/mach/trizeps4.h b/arch/arm/mach-pxa/include/mach/trizeps4.h
index 641d0ec110bb..903e1a2e6641 100644
--- a/arch/arm/mach-pxa/include/mach/trizeps4.h
+++ b/arch/arm/mach-pxa/include/mach/trizeps4.h
@@ -17,11 +17,16 @@
17#define TRIZEPS4_PIC_PHYS (PXA_CS3_PHYS) /* Logic chip on ConXS-Board */ 17#define TRIZEPS4_PIC_PHYS (PXA_CS3_PHYS) /* Logic chip on ConXS-Board */
18#define TRIZEPS4_SDRAM_BASE 0xa0000000 /* SDRAM region */ 18#define TRIZEPS4_SDRAM_BASE 0xa0000000 /* SDRAM region */
19 19
20#define TRIZEPS4_CFSR_PHYS (PXA_CS3_PHYS) /* Logic chip on ConXS-Board CSFR register */ 20 /* Logic on ConXS-board CSFR register*/
21#define TRIZEPS4_BOCR_PHYS (PXA_CS3_PHYS+0x02000000) /* Logic chip on ConXS-Board BOCR register */ 21#define TRIZEPS4_CFSR_PHYS (PXA_CS3_PHYS)
22#define TRIZEPS4_IRCR_PHYS (PXA_CS3_PHYS+0x02400000) /* Logic chip on ConXS-Board IRCR register*/ 22 /* Logic on ConXS-board BOCR register*/
23#define TRIZEPS4_UPSR_PHYS (PXA_CS3_PHYS+0x02800000) /* Logic chip on ConXS-Board UPSR register*/ 23#define TRIZEPS4_BOCR_PHYS (PXA_CS3_PHYS+0x02000000)
24#define TRIZEPS4_DICR_PHYS (PXA_CS3_PHYS+0x03800000) /* Logic chip on ConXS-Board DICR register*/ 24 /* Logic on ConXS-board IRCR register*/
25#define TRIZEPS4_IRCR_PHYS (PXA_CS3_PHYS+0x02400000)
26 /* Logic on ConXS-board UPSR register*/
27#define TRIZEPS4_UPSR_PHYS (PXA_CS3_PHYS+0x02800000)
28 /* Logic on ConXS-board DICR register*/
29#define TRIZEPS4_DICR_PHYS (PXA_CS3_PHYS+0x03800000)
25 30
26/* virtual memory regions */ 31/* virtual memory regions */
27#define TRIZEPS4_DISK_VIRT 0xF0000000 /* Disk On Chip region */ 32#define TRIZEPS4_DISK_VIRT 0xF0000000 /* Disk On Chip region */
@@ -54,6 +59,15 @@
54#define GPIO_MMC_DET 12 59#define GPIO_MMC_DET 12
55#define TRIZEPS4_MMC_IRQ IRQ_GPIO(GPIO_MMC_DET) 60#define TRIZEPS4_MMC_IRQ IRQ_GPIO(GPIO_MMC_DET)
56 61
62/* DOC NAND chip */
63#define GPIO_DOC_LOCK 94
64#define GPIO_DOC_IRQ 93
65#define TRIZEPS4_DOC_IRQ IRQ_GPIO(GPIO_DOC_IRQ)
66
67/* SPI interface */
68#define GPIO_SPI 53
69#define TRIZEPS4_SPI_IRQ IRQ_GPIO(GPIO_SPI)
70
57/* LEDS using tx2 / rx2 */ 71/* LEDS using tx2 / rx2 */
58#define GPIO_SYS_BUSY_LED 46 72#define GPIO_SYS_BUSY_LED 46
59#define GPIO_HEARTBEAT_LED 47 73#define GPIO_HEARTBEAT_LED 47
@@ -62,24 +76,66 @@
62#define GPIO_PIC 0 76#define GPIO_PIC 0
63#define TRIZEPS4_PIC_IRQ IRQ_GPIO(GPIO_PIC) 77#define TRIZEPS4_PIC_IRQ IRQ_GPIO(GPIO_PIC)
64 78
65#define CFSR_P2V(x) ((x) - TRIZEPS4_CFSR_PHYS + TRIZEPS4_CFSR_VIRT) 79#ifdef CONFIG_MACH_TRIZEPS_CONXS
66#define CFSR_V2P(x) ((x) - TRIZEPS4_CFSR_VIRT + TRIZEPS4_CFSR_PHYS) 80/* for CONXS base board define these registers */
81#define CFSR_P2V(x) ((x) - TRIZEPS4_CFSR_PHYS + TRIZEPS4_CFSR_VIRT)
82#define CFSR_V2P(x) ((x) - TRIZEPS4_CFSR_VIRT + TRIZEPS4_CFSR_PHYS)
67 83
68#define BCR_P2V(x) ((x) - TRIZEPS4_BOCR_PHYS + TRIZEPS4_BOCR_VIRT) 84#define BCR_P2V(x) ((x) - TRIZEPS4_BOCR_PHYS + TRIZEPS4_BOCR_VIRT)
69#define BCR_V2P(x) ((x) - TRIZEPS4_BOCR_VIRT + TRIZEPS4_BOCR_PHYS) 85#define BCR_V2P(x) ((x) - TRIZEPS4_BOCR_VIRT + TRIZEPS4_BOCR_PHYS)
70 86
71#define DCR_P2V(x) ((x) - TRIZEPS4_DICR_PHYS + TRIZEPS4_DICR_VIRT) 87#define DCR_P2V(x) ((x) - TRIZEPS4_DICR_PHYS + TRIZEPS4_DICR_VIRT)
72#define DCR_V2P(x) ((x) - TRIZEPS4_DICR_VIRT + TRIZEPS4_DICR_PHYS) 88#define DCR_V2P(x) ((x) - TRIZEPS4_DICR_VIRT + TRIZEPS4_DICR_PHYS)
89
90#define IRCR_P2V(x) ((x) - TRIZEPS4_IRCR_PHYS + TRIZEPS4_IRCR_VIRT)
91#define IRCR_V2P(x) ((x) - TRIZEPS4_IRCR_VIRT + TRIZEPS4_IRCR_PHYS)
73 92
74#ifndef __ASSEMBLY__ 93#ifndef __ASSEMBLY__
75#define ConXS_CFSR (*((volatile unsigned short *)CFSR_P2V(0x0C000000))) 94static inline unsigned short CFSR_readw(void)
76#define ConXS_BCR (*((volatile unsigned short *)BCR_P2V(0x0E000000))) 95{
77#define ConXS_DCR (*((volatile unsigned short *)DCR_P2V(0x0F800000))) 96 /* [Compact Flash Status Register] is read only */
97 return *((unsigned short *)CFSR_P2V(0x0C000000));
98}
99static inline void BCR_writew(unsigned short value)
100{
101 /* [Board Control Regsiter] is write only */
102 *((unsigned short *)BCR_P2V(0x0E000000)) = value;
103}
104static inline void DCR_writew(unsigned short value)
105{
106 /* [Display Control Register] is write only */
107 *((unsigned short *)DCR_P2V(0x0E000000)) = value;
108}
109static inline void IRCR_writew(unsigned short value)
110{
111 /* [InfraRed data Control Register] is write only */
112 *((unsigned short *)IRCR_P2V(0x0E000000)) = value;
113}
78#else 114#else
79#define ConXS_CFSR CFSR_P2V(0x0C000000) 115#define ConXS_CFSR CFSR_P2V(0x0C000000)
80#define ConXS_BCR BCR_P2V(0x0E000000) 116#define ConXS_BCR BCR_P2V(0x0E000000)
81#define ConXS_DCR DCR_P2V(0x0F800000) 117#define ConXS_DCR DCR_P2V(0x0F800000)
118#define ConXS_IRCR IRCR_P2V(0x0F800000)
82#endif 119#endif
120#else
121/* for whatever baseboard define function registers */
122static inline unsigned short CFSR_readw(void)
123{
124 return 0;
125}
126static inline void BCR_writew(unsigned short value)
127{
128 ;
129}
130static inline void DCR_writew(unsigned short value)
131{
132 ;
133}
134static inline void IRCR_writew(unsigned short value)
135{
136 ;
137}
138#endif /* CONFIG_MACH_TRIZEPS_CONXS */
83 139
84#define ConXS_CFSR_BVD_MASK 0x0003 140#define ConXS_CFSR_BVD_MASK 0x0003
85#define ConXS_CFSR_BVD1 (1 << 0) 141#define ConXS_CFSR_BVD1 (1 << 0)
diff --git a/arch/arm/mach-pxa/include/mach/viper.h b/arch/arm/mach-pxa/include/mach/viper.h
new file mode 100644
index 000000000000..10988c270ca3
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/viper.h
@@ -0,0 +1,96 @@
1/*
2 * arch/arm/mach-pxa/include/mach/viper.h
3 *
4 * Author: Ian Campbell
5 * Created: Feb 03, 2003
6 * Copyright: Arcom Control Systems.
7 *
8 * Maintained by Marc Zyngier <maz@misterjones.org>
9 * <marc.zyngier@altran.com>
10 *
11 * Created based on lubbock.h:
12 * Author: Nicolas Pitre
13 * Created: Jun 15, 2001
14 * Copyright: MontaVista Software Inc.
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License version 2 as
18 * published by the Free Software Foundation.
19 */
20
21#ifndef ARCH_VIPER_H
22#define ARCH_VIPER_H
23
24#define VIPER_BOOT_PHYS PXA_CS0_PHYS
25#define VIPER_FLASH_PHYS PXA_CS1_PHYS
26#define VIPER_ETH_PHYS PXA_CS2_PHYS
27#define VIPER_USB_PHYS PXA_CS3_PHYS
28#define VIPER_ETH_DATA_PHYS PXA_CS4_PHYS
29#define VIPER_CPLD_PHYS PXA_CS5_PHYS
30
31#define VIPER_CPLD_BASE (0xf0000000)
32#define VIPER_PC104IO_BASE (0xf1000000)
33#define VIPER_USB_BASE (0xf1800000)
34
35#define VIPER_ETH_GPIO (0)
36#define VIPER_CPLD_GPIO (1)
37#define VIPER_USB_GPIO (2)
38#define VIPER_UARTA_GPIO (4)
39#define VIPER_UARTB_GPIO (3)
40#define VIPER_CF_CD_GPIO (32)
41#define VIPER_CF_RDY_GPIO (8)
42#define VIPER_BCKLIGHT_EN_GPIO (9)
43#define VIPER_LCD_EN_GPIO (10)
44#define VIPER_PSU_DATA_GPIO (6)
45#define VIPER_PSU_CLK_GPIO (11)
46#define VIPER_UART_SHDN_GPIO (12)
47#define VIPER_BRIGHTNESS_GPIO (16)
48#define VIPER_PSU_nCS_LD_GPIO (19)
49#define VIPER_UPS_GPIO (20)
50#define VIPER_CF_POWER_GPIO (82)
51#define VIPER_TPM_I2C_SDA_GPIO (26)
52#define VIPER_TPM_I2C_SCL_GPIO (27)
53#define VIPER_RTC_I2C_SDA_GPIO (83)
54#define VIPER_RTC_I2C_SCL_GPIO (84)
55
56#define VIPER_CPLD_P2V(x) ((x) - VIPER_CPLD_PHYS + VIPER_CPLD_BASE)
57#define VIPER_CPLD_V2P(x) ((x) - VIPER_CPLD_BASE + VIPER_CPLD_PHYS)
58
59#ifndef __ASSEMBLY__
60# define __VIPER_CPLD_REG(x) (*((volatile u16 *)VIPER_CPLD_P2V(x)))
61#endif
62
63/* board level registers in the CPLD: (offsets from CPLD_BASE) ... */
64
65/* ... Physical addresses */
66#define _VIPER_LO_IRQ_STATUS (VIPER_CPLD_PHYS + 0x100000)
67#define _VIPER_ICR_PHYS (VIPER_CPLD_PHYS + 0x100002)
68#define _VIPER_HI_IRQ_STATUS (VIPER_CPLD_PHYS + 0x100004)
69#define _VIPER_VERSION_PHYS (VIPER_CPLD_PHYS + 0x100006)
70#define VIPER_UARTA_PHYS (VIPER_CPLD_PHYS + 0x300010)
71#define VIPER_UARTB_PHYS (VIPER_CPLD_PHYS + 0x300000)
72#define _VIPER_SRAM_BASE (VIPER_CPLD_PHYS + 0x800000)
73
74/* ... Virtual addresses */
75#define VIPER_LO_IRQ_STATUS __VIPER_CPLD_REG(_VIPER_LO_IRQ_STATUS)
76#define VIPER_HI_IRQ_STATUS __VIPER_CPLD_REG(_VIPER_HI_IRQ_STATUS)
77#define VIPER_VERSION __VIPER_CPLD_REG(_VIPER_VERSION_PHYS)
78#define VIPER_ICR __VIPER_CPLD_REG(_VIPER_ICR_PHYS)
79
80/* Decode VIPER_VERSION register */
81#define VIPER_CPLD_REVISION(x) (((x) >> 5) & 0x7)
82#define VIPER_BOARD_VERSION(x) (((x) >> 3) & 0x3)
83#define VIPER_BOARD_ISSUE(x) (((x) >> 0) & 0x7)
84
85/* Interrupt and Configuration Register (VIPER_ICR) */
86/* This is a write only register. Only CF_RST is used under Linux */
87
88extern void viper_cf_rst(int state);
89
90#define VIPER_ICR_RETRIG (1 << 0)
91#define VIPER_ICR_AUTO_CLR (1 << 1)
92#define VIPER_ICR_R_DIS (1 << 2)
93#define VIPER_ICR_CF_RST (1 << 3)
94
95#endif
96
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index 5e95c5372fec..fa69c3a6a38e 100644
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -57,7 +57,7 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn)
57 57
58 pxa_internal_irq_nr = irq_nr; 58 pxa_internal_irq_nr = irq_nr;
59 59
60 for (irq = 0; irq < irq_nr; irq += 32) { 60 for (irq = PXA_IRQ(0); irq < PXA_IRQ(irq_nr); irq += 32) {
61 _ICMR(irq) = 0; /* disable all IRQs */ 61 _ICMR(irq) = 0; /* disable all IRQs */
62 _ICLR(irq) = 0; /* all IRQs are IRQ, not FIQ */ 62 _ICLR(irq) = 0; /* all IRQs are IRQ, not FIQ */
63 } 63 }
diff --git a/arch/arm/mach-pxa/leds-trizeps4.c b/arch/arm/mach-pxa/leds-trizeps4.c
deleted file mode 100644
index 3bc29007df3a..000000000000
--- a/arch/arm/mach-pxa/leds-trizeps4.c
+++ /dev/null
@@ -1,134 +0,0 @@
1/*
2 * linux/arch/arm/mach-pxa/leds-trizeps4.c
3 *
4 * Author: Jürgen Schindele
5 * Created: 20 02, 2006
6 * Copyright: Jürgen Schindele
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/init.h>
14
15#include <mach/hardware.h>
16#include <asm/system.h>
17#include <asm/types.h>
18#include <asm/leds.h>
19
20#include <mach/pxa-regs.h>
21#include <mach/pxa2xx-gpio.h>
22#include <mach/trizeps4.h>
23
24#include "leds.h"
25
26#define LED_STATE_ENABLED 1
27#define LED_STATE_CLAIMED 2
28
29#define SYS_BUSY 0x01
30#define HEARTBEAT 0x02
31#define BLINK 0x04
32
33static unsigned int led_state;
34static unsigned int hw_led_state;
35
36void trizeps4_leds_event(led_event_t evt)
37{
38 unsigned long flags;
39
40 local_irq_save(flags);
41
42 switch (evt) {
43 case led_start:
44 hw_led_state = 0;
45 pxa_gpio_mode( GPIO_SYS_BUSY_LED | GPIO_OUT); /* LED1 */
46 pxa_gpio_mode( GPIO_HEARTBEAT_LED | GPIO_OUT); /* LED2 */
47 led_state = LED_STATE_ENABLED;
48 break;
49
50 case led_stop:
51 led_state &= ~LED_STATE_ENABLED;
52 break;
53
54 case led_claim:
55 led_state |= LED_STATE_CLAIMED;
56 hw_led_state = 0;
57 break;
58
59 case led_release:
60 led_state &= ~LED_STATE_CLAIMED;
61 hw_led_state = 0;
62 break;
63
64#ifdef CONFIG_LEDS_TIMER
65 case led_timer:
66 hw_led_state ^= HEARTBEAT;
67 break;
68#endif
69
70#ifdef CONFIG_LEDS_CPU
71 case led_idle_start:
72 hw_led_state &= ~SYS_BUSY;
73 break;
74
75 case led_idle_end:
76 hw_led_state |= SYS_BUSY;
77 break;
78#endif
79
80 case led_halted:
81 break;
82
83 case led_green_on:
84 hw_led_state |= BLINK;
85 break;
86
87 case led_green_off:
88 hw_led_state &= ~BLINK;
89 break;
90
91 case led_amber_on:
92 break;
93
94 case led_amber_off:
95 break;
96
97 case led_red_on:
98 break;
99
100 case led_red_off:
101 break;
102
103 default:
104 break;
105 }
106
107 if (led_state & LED_STATE_ENABLED) {
108 switch (hw_led_state) {
109 case 0:
110 GPSR(GPIO_SYS_BUSY_LED) |= GPIO_bit(GPIO_SYS_BUSY_LED);
111 GPSR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED);
112 break;
113 case 1:
114 GPCR(GPIO_SYS_BUSY_LED) |= GPIO_bit(GPIO_SYS_BUSY_LED);
115 GPSR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED);
116 break;
117 case 2:
118 GPSR(GPIO_SYS_BUSY_LED) |= GPIO_bit(GPIO_SYS_BUSY_LED);
119 GPCR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED);
120 break;
121 case 3:
122 GPCR(GPIO_SYS_BUSY_LED) |= GPIO_bit(GPIO_SYS_BUSY_LED);
123 GPCR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED);
124 break;
125 }
126 }
127 else {
128 /* turn all off */
129 GPSR(GPIO_SYS_BUSY_LED) |= GPIO_bit(GPIO_SYS_BUSY_LED);
130 GPSR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED);
131 }
132
133 local_irq_restore(flags);
134}
diff --git a/arch/arm/mach-pxa/leds.c b/arch/arm/mach-pxa/leds.c
index e13eb841e48d..bbe4d5f6afaa 100644
--- a/arch/arm/mach-pxa/leds.c
+++ b/arch/arm/mach-pxa/leds.c
@@ -24,8 +24,6 @@ pxa_leds_init(void)
24 leds_event = mainstone_leds_event; 24 leds_event = mainstone_leds_event;
25 if (machine_is_pxa_idp()) 25 if (machine_is_pxa_idp())
26 leds_event = idp_leds_event; 26 leds_event = idp_leds_event;
27 if (machine_is_trizeps4())
28 leds_event = trizeps4_leds_event;
29 27
30 leds_event(led_start); 28 leds_event(led_start);
31 return 0; 29 return 0;
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c
index 58f3402a0375..b4d00aba0e31 100644
--- a/arch/arm/mach-pxa/littleton.c
+++ b/arch/arm/mach-pxa/littleton.c
@@ -20,6 +20,7 @@
20#include <linux/delay.h> 20#include <linux/delay.h>
21#include <linux/platform_device.h> 21#include <linux/platform_device.h>
22#include <linux/clk.h> 22#include <linux/clk.h>
23#include <linux/spi/spi.h>
23#include <linux/smc91x.h> 24#include <linux/smc91x.h>
24 25
25#include <asm/types.h> 26#include <asm/types.h>
@@ -38,6 +39,7 @@
38#include <mach/gpio.h> 39#include <mach/gpio.h>
39#include <mach/pxafb.h> 40#include <mach/pxafb.h>
40#include <mach/ssp.h> 41#include <mach/ssp.h>
42#include <mach/pxa2xx_spi.h>
41#include <mach/pxa27x_keypad.h> 43#include <mach/pxa27x_keypad.h>
42#include <mach/pxa3xx_nand.h> 44#include <mach/pxa3xx_nand.h>
43#include <mach/littleton.h> 45#include <mach/littleton.h>
@@ -72,8 +74,8 @@ static mfp_cfg_t littleton_mfp_cfg[] __initdata = {
72 74
73 /* SSP2 */ 75 /* SSP2 */
74 GPIO25_SSP2_SCLK, 76 GPIO25_SSP2_SCLK,
75 GPIO17_SSP2_FRM,
76 GPIO27_SSP2_TXD, 77 GPIO27_SSP2_TXD,
78 GPIO17_GPIO, /* SFRM as chip-select */
77 79
78 /* Debug Ethernet */ 80 /* Debug Ethernet */
79 GPIO90_GPIO, 81 GPIO90_GPIO,
@@ -123,160 +125,6 @@ static struct platform_device smc91x_device = {
123}; 125};
124 126
125#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) 127#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
126/* use bit 30, 31 as the indicator of command parameter number */
127#define CMD0(x) ((0x00000000) | ((x) << 9))
128#define CMD1(x, x1) ((0x40000000) | ((x) << 9) | 0x100 | (x1))
129#define CMD2(x, x1, x2) ((0x80000000) | ((x) << 18) | 0x20000 |\
130 ((x1) << 9) | 0x100 | (x2))
131
132static uint32_t lcd_panel_reset[] = {
133 CMD0(0x1), /* reset */
134 CMD0(0x0), /* nop */
135 CMD0(0x0), /* nop */
136 CMD0(0x0), /* nop */
137};
138
139static uint32_t lcd_panel_on[] = {
140 CMD0(0x29), /* Display ON */
141 CMD2(0xB8, 0xFF, 0xF9), /* Output Control */
142 CMD0(0x11), /* Sleep out */
143 CMD1(0xB0, 0x16), /* Wake */
144};
145
146static uint32_t lcd_panel_off[] = {
147 CMD0(0x28), /* Display OFF */
148 CMD2(0xB8, 0x80, 0x02), /* Output Control */
149 CMD0(0x10), /* Sleep in */
150 CMD1(0xB0, 0x00), /* Deep stand by in */
151};
152
153static uint32_t lcd_vga_pass_through[] = {
154 CMD1(0xB0, 0x16),
155 CMD1(0xBC, 0x80),
156 CMD1(0xE1, 0x00),
157 CMD1(0x36, 0x50),
158 CMD1(0x3B, 0x00),
159};
160
161static uint32_t lcd_qvga_pass_through[] = {
162 CMD1(0xB0, 0x16),
163 CMD1(0xBC, 0x81),
164 CMD1(0xE1, 0x00),
165 CMD1(0x36, 0x50),
166 CMD1(0x3B, 0x22),
167};
168
169static uint32_t lcd_vga_transfer[] = {
170 CMD1(0xcf, 0x02), /* Blanking period control (1) */
171 CMD2(0xd0, 0x08, 0x04), /* Blanking period control (2) */
172 CMD1(0xd1, 0x01), /* CKV timing control on/off */
173 CMD2(0xd2, 0x14, 0x00), /* CKV 1,2 timing control */
174 CMD2(0xd3, 0x1a, 0x0f), /* OEV timing control */
175 CMD2(0xd4, 0x1f, 0xaf), /* ASW timing control (1) */
176 CMD1(0xd5, 0x14), /* ASW timing control (2) */
177 CMD0(0x21), /* Invert for normally black display */
178 CMD0(0x29), /* Display on */
179};
180
181static uint32_t lcd_qvga_transfer[] = {
182 CMD1(0xd6, 0x02), /* Blanking period control (1) */
183 CMD2(0xd7, 0x08, 0x04), /* Blanking period control (2) */
184 CMD1(0xd8, 0x01), /* CKV timing control on/off */
185 CMD2(0xd9, 0x00, 0x08), /* CKV 1,2 timing control */
186 CMD2(0xde, 0x05, 0x0a), /* OEV timing control */
187 CMD2(0xdf, 0x0a, 0x19), /* ASW timing control (1) */
188 CMD1(0xe0, 0x0a), /* ASW timing control (2) */
189 CMD0(0x21), /* Invert for normally black display */
190 CMD0(0x29), /* Display on */
191};
192
193static uint32_t lcd_panel_config[] = {
194 CMD2(0xb8, 0xff, 0xf9), /* Output control */
195 CMD0(0x11), /* sleep out */
196 CMD1(0xba, 0x01), /* Display mode (1) */
197 CMD1(0xbb, 0x00), /* Display mode (2) */
198 CMD1(0x3a, 0x60), /* Display mode 18-bit RGB */
199 CMD1(0xbf, 0x10), /* Drive system change control */
200 CMD1(0xb1, 0x56), /* Booster operation setup */
201 CMD1(0xb2, 0x33), /* Booster mode setup */
202 CMD1(0xb3, 0x11), /* Booster frequency setup */
203 CMD1(0xb4, 0x02), /* Op amp/system clock */
204 CMD1(0xb5, 0x35), /* VCS voltage */
205 CMD1(0xb6, 0x40), /* VCOM voltage */
206 CMD1(0xb7, 0x03), /* External display signal */
207 CMD1(0xbd, 0x00), /* ASW slew rate */
208 CMD1(0xbe, 0x00), /* Dummy data for QuadData operation */
209 CMD1(0xc0, 0x11), /* Sleep out FR count (A) */
210 CMD1(0xc1, 0x11), /* Sleep out FR count (B) */
211 CMD1(0xc2, 0x11), /* Sleep out FR count (C) */
212 CMD2(0xc3, 0x20, 0x40), /* Sleep out FR count (D) */
213 CMD2(0xc4, 0x60, 0xc0), /* Sleep out FR count (E) */
214 CMD2(0xc5, 0x10, 0x20), /* Sleep out FR count (F) */
215 CMD1(0xc6, 0xc0), /* Sleep out FR count (G) */
216 CMD2(0xc7, 0x33, 0x43), /* Gamma 1 fine tuning (1) */
217 CMD1(0xc8, 0x44), /* Gamma 1 fine tuning (2) */
218 CMD1(0xc9, 0x33), /* Gamma 1 inclination adjustment */
219 CMD1(0xca, 0x00), /* Gamma 1 blue offset adjustment */
220 CMD2(0xec, 0x01, 0xf0), /* Horizontal clock cycles */
221};
222
223static void ssp_reconfig(struct ssp_dev *dev, int nparam)
224{
225 static int last_nparam = -1;
226
227 /* check if it is necessary to re-config SSP */
228 if (nparam == last_nparam)
229 return;
230
231 ssp_disable(dev);
232 ssp_config(dev, (nparam == 2) ? 0x0010058a : 0x00100581, 0x18, 0, 0);
233
234 last_nparam = nparam;
235}
236
237static void ssp_send_cmd(uint32_t *cmd, int num)
238{
239 static int ssp_initialized;
240 static struct ssp_dev ssp2;
241
242 int i;
243
244 if (!ssp_initialized) {
245 ssp_init(&ssp2, 2, SSP_NO_IRQ);
246 ssp_initialized = 1;
247 }
248
249 clk_enable(ssp2.ssp->clk);
250 for (i = 0; i < num; i++, cmd++) {
251 ssp_reconfig(&ssp2, (*cmd >> 30) & 0x3);
252 ssp_write_word(&ssp2, *cmd & 0x3fffffff);
253
254 /* FIXME: ssp_flush() is mandatory here to work */
255 ssp_flush(&ssp2);
256 }
257 clk_disable(ssp2.ssp->clk);
258}
259
260static void littleton_lcd_power(int on, struct fb_var_screeninfo *var)
261{
262 if (on) {
263 ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_on));
264 ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_reset));
265 if (var->xres > 240) {
266 /* VGA */
267 ssp_send_cmd(ARRAY_AND_SIZE(lcd_vga_pass_through));
268 ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_config));
269 ssp_send_cmd(ARRAY_AND_SIZE(lcd_vga_transfer));
270 } else {
271 /* QVGA */
272 ssp_send_cmd(ARRAY_AND_SIZE(lcd_qvga_pass_through));
273 ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_config));
274 ssp_send_cmd(ARRAY_AND_SIZE(lcd_qvga_transfer));
275 }
276 } else
277 ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_off));
278}
279
280static struct pxafb_mode_info tpo_tdo24mtea1_modes[] = { 128static struct pxafb_mode_info tpo_tdo24mtea1_modes[] = {
281 [0] = { 129 [0] = {
282 /* VGA */ 130 /* VGA */
@@ -312,7 +160,6 @@ static struct pxafb_mach_info littleton_lcd_info = {
312 .modes = tpo_tdo24mtea1_modes, 160 .modes = tpo_tdo24mtea1_modes,
313 .num_modes = 2, 161 .num_modes = 2,
314 .lcd_conn = LCD_COLOR_TFT_16BPP, 162 .lcd_conn = LCD_COLOR_TFT_16BPP,
315 .pxafb_lcd_power = littleton_lcd_power,
316}; 163};
317 164
318static void littleton_init_lcd(void) 165static void littleton_init_lcd(void)
@@ -323,6 +170,51 @@ static void littleton_init_lcd(void)
323static inline void littleton_init_lcd(void) {}; 170static inline void littleton_init_lcd(void) {};
324#endif /* CONFIG_FB_PXA || CONFIG_FB_PXA_MODULE */ 171#endif /* CONFIG_FB_PXA || CONFIG_FB_PXA_MODULE */
325 172
173#if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE)
174static struct pxa2xx_spi_master littleton_spi_info = {
175 .num_chipselect = 1,
176};
177
178static void littleton_tdo24m_cs(u32 cmd)
179{
180 gpio_set_value(LITTLETON_GPIO_LCD_CS, !(cmd == PXA2XX_CS_ASSERT));
181}
182
183static struct pxa2xx_spi_chip littleton_tdo24m_chip = {
184 .rx_threshold = 1,
185 .tx_threshold = 1,
186 .cs_control = littleton_tdo24m_cs,
187};
188
189static struct spi_board_info littleton_spi_devices[] __initdata = {
190 {
191 .modalias = "tdo24m",
192 .max_speed_hz = 1000000,
193 .bus_num = 2,
194 .chip_select = 0,
195 .controller_data= &littleton_tdo24m_chip,
196 },
197};
198
199static void __init littleton_init_spi(void)
200{
201 int err;
202
203 err = gpio_request(LITTLETON_GPIO_LCD_CS, "LCD_CS");
204 if (err) {
205 pr_warning("failed to request GPIO for LCS CS\n");
206 return;
207 }
208
209 gpio_direction_output(LITTLETON_GPIO_LCD_CS, 1);
210
211 pxa2xx_set_spi_info(2, &littleton_spi_info);
212 spi_register_board_info(ARRAY_AND_SIZE(littleton_spi_devices));
213}
214#else
215static inline void littleton_init_spi(void) {}
216#endif
217
326#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE) 218#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
327static unsigned int littleton_matrix_key_map[] = { 219static unsigned int littleton_matrix_key_map[] = {
328 /* KEY(row, col, key_code) */ 220 /* KEY(row, col, key_code) */
@@ -433,6 +325,7 @@ static void __init littleton_init(void)
433 */ 325 */
434 platform_device_register(&smc91x_device); 326 platform_device_register(&smc91x_device);
435 327
328 littleton_init_spi();
436 littleton_init_lcd(); 329 littleton_init_lcd();
437 littleton_init_keypad(); 330 littleton_init_keypad();
438 littleton_init_nand(); 331 littleton_init_nand();
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index b7038948d1d4..de3f67daaacf 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -40,7 +40,7 @@
40 40
41#include <mach/pxa-regs.h> 41#include <mach/pxa-regs.h>
42#include <mach/pxa2xx-regs.h> 42#include <mach/pxa2xx-regs.h>
43#include <mach/pxa2xx-gpio.h> 43#include <mach/mfp-pxa27x.h>
44#include <mach/lpd270.h> 44#include <mach/lpd270.h>
45#include <mach/audio.h> 45#include <mach/audio.h>
46#include <mach/pxafb.h> 46#include <mach/pxafb.h>
@@ -51,6 +51,43 @@
51#include "generic.h" 51#include "generic.h"
52#include "devices.h" 52#include "devices.h"
53 53
54static unsigned long lpd270_pin_config[] __initdata = {
55 /* Chip Selects */
56 GPIO15_nCS_1, /* Mainboard Flash */
57 GPIO78_nCS_2, /* CPLD + Ethernet */
58
59 /* LCD - 16bpp Active TFT */
60 GPIO58_LCD_LDD_0,
61 GPIO59_LCD_LDD_1,
62 GPIO60_LCD_LDD_2,
63 GPIO61_LCD_LDD_3,
64 GPIO62_LCD_LDD_4,
65 GPIO63_LCD_LDD_5,
66 GPIO64_LCD_LDD_6,
67 GPIO65_LCD_LDD_7,
68 GPIO66_LCD_LDD_8,
69 GPIO67_LCD_LDD_9,
70 GPIO68_LCD_LDD_10,
71 GPIO69_LCD_LDD_11,
72 GPIO70_LCD_LDD_12,
73 GPIO71_LCD_LDD_13,
74 GPIO72_LCD_LDD_14,
75 GPIO73_LCD_LDD_15,
76 GPIO74_LCD_FCLK,
77 GPIO75_LCD_LCLK,
78 GPIO76_LCD_PCLK,
79 GPIO77_LCD_BIAS,
80 GPIO16_PWM0_OUT, /* Backlight */
81
82 /* USB Host */
83 GPIO88_USBH1_PWR,
84 GPIO89_USBH1_PEN,
85
86 /* AC97 */
87 GPIO45_AC97_SYSCLK,
88
89 GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
90};
54 91
55static unsigned int lpd270_irq_enabled; 92static unsigned int lpd270_irq_enabled;
56 93
@@ -88,8 +125,7 @@ static void lpd270_irq_handler(unsigned int irq, struct irq_desc *desc)
88 GEDR(0) = GPIO_bit(0); /* clear useless edge notification */ 125 GEDR(0) = GPIO_bit(0); /* clear useless edge notification */
89 if (likely(pending)) { 126 if (likely(pending)) {
90 irq = LPD270_IRQ(0) + __ffs(pending); 127 irq = LPD270_IRQ(0) + __ffs(pending);
91 desc = irq_desc + irq; 128 generic_handle_irq(irq);
92 desc_handle_irq(irq, desc);
93 129
94 pending = __raw_readw(LPD270_INT_STATUS) & 130 pending = __raw_readw(LPD270_INT_STATUS) &
95 lpd270_irq_enabled; 131 lpd270_irq_enabled;
@@ -265,8 +301,8 @@ static struct pxafb_mode_info sharp_lq057q3dc02_mode = {
265static struct pxafb_mach_info sharp_lq057q3dc02 = { 301static struct pxafb_mach_info sharp_lq057q3dc02 = {
266 .modes = &sharp_lq057q3dc02_mode, 302 .modes = &sharp_lq057q3dc02_mode,
267 .num_modes = 1, 303 .num_modes = 1,
268 .lccr0 = 0x07800080, 304 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
269 .lccr3 = 0x00400000, 305 LCD_ALTERNATE_MAPPING,
270}; 306};
271 307
272/* 12.1" TFT SVGA (LoLo display number 2) */ 308/* 12.1" TFT SVGA (LoLo display number 2) */
@@ -287,8 +323,8 @@ static struct pxafb_mode_info sharp_lq121s1dg31_mode = {
287static struct pxafb_mach_info sharp_lq121s1dg31 = { 323static struct pxafb_mach_info sharp_lq121s1dg31 = {
288 .modes = &sharp_lq121s1dg31_mode, 324 .modes = &sharp_lq121s1dg31_mode,
289 .num_modes = 1, 325 .num_modes = 1,
290 .lccr0 = 0x07800080, 326 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
291 .lccr3 = 0x00400000, 327 LCD_ALTERNATE_MAPPING,
292}; 328};
293 329
294/* 3.6" TFT QVGA (LoLo display number 3) */ 330/* 3.6" TFT QVGA (LoLo display number 3) */
@@ -309,8 +345,8 @@ static struct pxafb_mode_info sharp_lq036q1da01_mode = {
309static struct pxafb_mach_info sharp_lq036q1da01 = { 345static struct pxafb_mach_info sharp_lq036q1da01 = {
310 .modes = &sharp_lq036q1da01_mode, 346 .modes = &sharp_lq036q1da01_mode,
311 .num_modes = 1, 347 .num_modes = 1,
312 .lccr0 = 0x07800080, 348 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
313 .lccr3 = 0x00400000, 349 LCD_ALTERNATE_MAPPING,
314}; 350};
315 351
316/* 6.4" TFT VGA (LoLo display number 5) */ 352/* 6.4" TFT VGA (LoLo display number 5) */
@@ -331,8 +367,8 @@ static struct pxafb_mode_info sharp_lq64d343_mode = {
331static struct pxafb_mach_info sharp_lq64d343 = { 367static struct pxafb_mach_info sharp_lq64d343 = {
332 .modes = &sharp_lq64d343_mode, 368 .modes = &sharp_lq64d343_mode,
333 .num_modes = 1, 369 .num_modes = 1,
334 .lccr0 = 0x07800080, 370 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
335 .lccr3 = 0x00400000, 371 LCD_ALTERNATE_MAPPING,
336}; 372};
337 373
338/* 10.4" TFT VGA (LoLo display number 7) */ 374/* 10.4" TFT VGA (LoLo display number 7) */
@@ -353,8 +389,8 @@ static struct pxafb_mode_info sharp_lq10d368_mode = {
353static struct pxafb_mach_info sharp_lq10d368 = { 389static struct pxafb_mach_info sharp_lq10d368 = {
354 .modes = &sharp_lq10d368_mode, 390 .modes = &sharp_lq10d368_mode,
355 .num_modes = 1, 391 .num_modes = 1,
356 .lccr0 = 0x07800080, 392 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
357 .lccr3 = 0x00400000, 393 LCD_ALTERNATE_MAPPING,
358}; 394};
359 395
360/* 3.5" TFT QVGA (LoLo display number 8) */ 396/* 3.5" TFT QVGA (LoLo display number 8) */
@@ -375,8 +411,8 @@ static struct pxafb_mode_info sharp_lq035q7db02_20_mode = {
375static struct pxafb_mach_info sharp_lq035q7db02_20 = { 411static struct pxafb_mach_info sharp_lq035q7db02_20 = {
376 .modes = &sharp_lq035q7db02_20_mode, 412 .modes = &sharp_lq035q7db02_20_mode,
377 .num_modes = 1, 413 .num_modes = 1,
378 .lccr0 = 0x07800080, 414 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
379 .lccr3 = 0x00400000, 415 LCD_ALTERNATE_MAPPING,
380}; 416};
381 417
382static struct pxafb_mach_info *lpd270_lcd_to_use; 418static struct pxafb_mach_info *lpd270_lcd_to_use;
@@ -411,27 +447,15 @@ static struct platform_device *platform_devices[] __initdata = {
411 &lpd270_flash_device[1], 447 &lpd270_flash_device[1],
412}; 448};
413 449
414static int lpd270_ohci_init(struct device *dev)
415{
416 /* setup Port1 GPIO pin. */
417 pxa_gpio_mode(88 | GPIO_ALT_FN_1_IN); /* USBHPWR1 */
418 pxa_gpio_mode(89 | GPIO_ALT_FN_2_OUT); /* USBHPEN1 */
419
420 /* Set the Power Control Polarity Low and Power Sense
421 Polarity Low to active low. */
422 UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
423 ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE);
424
425 return 0;
426}
427
428static struct pxaohci_platform_data lpd270_ohci_platform_data = { 450static struct pxaohci_platform_data lpd270_ohci_platform_data = {
429 .port_mode = PMM_PERPORT_MODE, 451 .port_mode = PMM_PERPORT_MODE,
430 .init = lpd270_ohci_init, 452 .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
431}; 453};
432 454
433static void __init lpd270_init(void) 455static void __init lpd270_init(void)
434{ 456{
457 pxa2xx_mfp_config(ARRAY_AND_SIZE(lpd270_pin_config));
458
435 lpd270_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4; 459 lpd270_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4;
436 lpd270_flash_data[1].width = 4; 460 lpd270_flash_data[1].width = 4;
437 461
@@ -442,12 +466,6 @@ static void __init lpd270_init(void)
442 */ 466 */
443 ARB_CNTRL = ARB_CORE_PARK | 0x234; 467 ARB_CNTRL = ARB_CORE_PARK | 0x234;
444 468
445 /*
446 * On LogicPD PXA270, we route AC97_SYSCLK via GPIO45.
447 */
448 pxa_gpio_mode(GPIO45_SYSCLK_AC97_MD);
449 pxa_gpio_mode(GPIO16_PWM0_MD);
450
451 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); 469 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
452 470
453 pxa_set_ac97_info(NULL); 471 pxa_set_ac97_info(NULL);
@@ -473,15 +491,6 @@ static void __init lpd270_map_io(void)
473 pxa_map_io(); 491 pxa_map_io();
474 iotable_init(lpd270_io_desc, ARRAY_SIZE(lpd270_io_desc)); 492 iotable_init(lpd270_io_desc, ARRAY_SIZE(lpd270_io_desc));
475 493
476 /* initialize sleep mode regs (wake-up sources, etc) */
477 PGSR0 = 0x00008800;
478 PGSR1 = 0x00000002;
479 PGSR2 = 0x0001FC00;
480 PGSR3 = 0x00001F81;
481 PWER = 0xC0000002;
482 PRER = 0x00000002;
483 PFER = 0x00000002;
484
485 /* for use I SRAM as framebuffer. */ 494 /* for use I SRAM as framebuffer. */
486 PSLR |= 0x00000F04; 495 PSLR |= 0x00000F04;
487 PCFR = 0x00000066; 496 PCFR = 0x00000066;
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index 4ffdff2d9ff1..bff704354c1a 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -57,13 +57,36 @@
57 57
58static unsigned long lubbock_pin_config[] __initdata = { 58static unsigned long lubbock_pin_config[] __initdata = {
59 GPIO15_nCS_1, /* CS1 - Flash */ 59 GPIO15_nCS_1, /* CS1 - Flash */
60 GPIO78_nCS_2, /* CS2 - Baseboard FGPA */
60 GPIO79_nCS_3, /* CS3 - SMC ethernet */ 61 GPIO79_nCS_3, /* CS3 - SMC ethernet */
62 GPIO80_nCS_4, /* CS4 - SA1111 */
61 63
62 /* SSP data pins */ 64 /* SSP data pins */
63 GPIO23_SSP1_SCLK, 65 GPIO23_SSP1_SCLK,
64 GPIO25_SSP1_TXD, 66 GPIO25_SSP1_TXD,
65 GPIO26_SSP1_RXD, 67 GPIO26_SSP1_RXD,
66 68
69 /* LCD - 16bpp DSTN */
70 GPIO58_LCD_LDD_0,
71 GPIO59_LCD_LDD_1,
72 GPIO60_LCD_LDD_2,
73 GPIO61_LCD_LDD_3,
74 GPIO62_LCD_LDD_4,
75 GPIO63_LCD_LDD_5,
76 GPIO64_LCD_LDD_6,
77 GPIO65_LCD_LDD_7,
78 GPIO66_LCD_LDD_8,
79 GPIO67_LCD_LDD_9,
80 GPIO68_LCD_LDD_10,
81 GPIO69_LCD_LDD_11,
82 GPIO70_LCD_LDD_12,
83 GPIO71_LCD_LDD_13,
84 GPIO72_LCD_LDD_14,
85 GPIO73_LCD_LDD_15,
86 GPIO74_LCD_FCLK,
87 GPIO75_LCD_LCLK,
88 GPIO76_LCD_PCLK,
89
67 /* BTUART */ 90 /* BTUART */
68 GPIO42_BTUART_RXD, 91 GPIO42_BTUART_RXD,
69 GPIO43_BTUART_TXD, 92 GPIO43_BTUART_TXD,
@@ -132,8 +155,7 @@ static void lubbock_irq_handler(unsigned int irq, struct irq_desc *desc)
132 GEDR(0) = GPIO_bit(0); /* clear our parent irq */ 155 GEDR(0) = GPIO_bit(0); /* clear our parent irq */
133 if (likely(pending)) { 156 if (likely(pending)) {
134 irq = LUBBOCK_IRQ(0) + __ffs(pending); 157 irq = LUBBOCK_IRQ(0) + __ffs(pending);
135 desc = irq_desc + irq; 158 generic_handle_irq(irq);
136 desc_handle_irq(irq, desc);
137 } 159 }
138 pending = LUB_IRQ_SET_CLR & lubbock_irq_enabled; 160 pending = LUB_IRQ_SET_CLR & lubbock_irq_enabled;
139 } while (pending); 161 } while (pending);
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c
index 143f28adaf95..519138bc5f85 100644
--- a/arch/arm/mach-pxa/magician.c
+++ b/arch/arm/mach-pxa/magician.c
@@ -409,7 +409,7 @@ static struct platform_device backlight = {
409 * LEDs 409 * LEDs
410 */ 410 */
411 411
412struct gpio_led gpio_leds[] = { 412static struct gpio_led gpio_leds[] = {
413 { 413 {
414 .name = "magician::vibra", 414 .name = "magician::vibra",
415 .default_trigger = "none", 415 .default_trigger = "none",
@@ -669,18 +669,10 @@ static struct pxamci_platform_data magician_mci_info = {
669 * USB OHCI 669 * USB OHCI
670 */ 670 */
671 671
672static int magician_ohci_init(struct device *dev)
673{
674 UHCHR = (UHCHR | UHCHR_SSEP2 | UHCHR_PCPL | UHCHR_CGR) &
675 ~(UHCHR_SSEP1 | UHCHR_SSEP3 | UHCHR_SSE);
676
677 return 0;
678}
679
680static struct pxaohci_platform_data magician_ohci_info = { 672static struct pxaohci_platform_data magician_ohci_info = {
681 .port_mode = PMM_PERPORT_MODE, 673 .port_mode = PMM_PERPORT_MODE,
682 .init = magician_ohci_init, 674 .flags = ENABLE_PORT1 | ENABLE_PORT3 | POWER_CONTROL_LOW,
683 .power_budget = 0, 675 .power_budget = 0,
684}; 676};
685 677
686 678
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index d44af761564d..f2c7ad8f2b6b 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -162,8 +162,7 @@ static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc)
162 GEDR(0) = GPIO_bit(0); /* clear useless edge notification */ 162 GEDR(0) = GPIO_bit(0); /* clear useless edge notification */
163 if (likely(pending)) { 163 if (likely(pending)) {
164 irq = MAINSTONE_IRQ(0) + __ffs(pending); 164 irq = MAINSTONE_IRQ(0) + __ffs(pending);
165 desc = irq_desc + irq; 165 generic_handle_irq(irq);
166 desc_handle_irq(irq, desc);
167 } 166 }
168 pending = MST_INTSETCLR & mainstone_irq_enabled; 167 pending = MST_INTSETCLR & mainstone_irq_enabled;
169 } while (pending); 168 } while (pending);
@@ -508,19 +507,9 @@ static struct platform_device *platform_devices[] __initdata = {
508 &mst_gpio_keys_device, 507 &mst_gpio_keys_device,
509}; 508};
510 509
511static int mainstone_ohci_init(struct device *dev)
512{
513 /* Set the Power Control Polarity Low and Power Sense
514 Polarity Low to active low. */
515 UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
516 ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE);
517
518 return 0;
519}
520
521static struct pxaohci_platform_data mainstone_ohci_platform_data = { 510static struct pxaohci_platform_data mainstone_ohci_platform_data = {
522 .port_mode = PMM_PERPORT_MODE, 511 .port_mode = PMM_PERPORT_MODE,
523 .init = mainstone_ohci_init, 512 .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
524}; 513};
525 514
526#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE) 515#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c
index 925575f10acf..2061c00c8ead 100644
--- a/arch/arm/mach-pxa/mfp-pxa2xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa2xx.c
@@ -25,7 +25,12 @@
25 25
26#include "generic.h" 26#include "generic.h"
27 27
28#define PGSR(x) __REG2(0x40F00020, ((x) & 0x60) >> 3) 28#define gpio_to_bank(gpio) ((gpio) >> 5)
29
30#define PGSR(x) __REG2(0x40F00020, (x) << 2)
31#define __GAFR(u, x) __REG2((u) ? 0x40E00058 : 0x40E00054, (x) << 3)
32#define GAFR_L(x) __GAFR(0, x)
33#define GAFR_U(x) __GAFR(1, x)
29 34
30#define PWER_WE35 (1 << 24) 35#define PWER_WE35 (1 << 24)
31 36
@@ -38,49 +43,59 @@ struct gpio_desc {
38}; 43};
39 44
40static struct gpio_desc gpio_desc[MFP_PIN_GPIO127 + 1]; 45static struct gpio_desc gpio_desc[MFP_PIN_GPIO127 + 1];
46static int gpio_nr;
41 47
42static int __mfp_config_lpm(unsigned gpio, unsigned long lpm) 48static unsigned long gpdr_lpm[4];
43{
44 unsigned mask = GPIO_bit(gpio);
45
46 /* low power state */
47 switch (lpm) {
48 case MFP_LPM_DRIVE_HIGH:
49 PGSR(gpio) |= mask;
50 break;
51 case MFP_LPM_DRIVE_LOW:
52 PGSR(gpio) &= ~mask;
53 break;
54 case MFP_LPM_INPUT:
55 break;
56 default:
57 pr_warning("%s: invalid low power state for GPIO%d\n",
58 __func__, gpio);
59 return -EINVAL;
60 }
61 return 0;
62}
63 49
64static int __mfp_config_gpio(unsigned gpio, unsigned long c) 50static int __mfp_config_gpio(unsigned gpio, unsigned long c)
65{ 51{
66 unsigned long gafr, mask = GPIO_bit(gpio); 52 unsigned long gafr, mask = GPIO_bit(gpio);
67 int fn; 53 int bank = gpio_to_bank(gpio);
54 int uorl = !!(gpio & 0x10); /* GAFRx_U or GAFRx_L ? */
55 int shft = (gpio & 0xf) << 1;
56 int fn = MFP_AF(c);
57 int dir = c & MFP_DIR_OUT;
68 58
69 fn = MFP_AF(c);
70 if (fn > 3) 59 if (fn > 3)
71 return -EINVAL; 60 return -EINVAL;
72 61
73 /* alternate function and direction */ 62 /* alternate function and direction at run-time */
74 gafr = GAFR(gpio) & ~(0x3 << ((gpio & 0xf) * 2)); 63 gafr = (uorl == 0) ? GAFR_L(bank) : GAFR_U(bank);
75 GAFR(gpio) = gafr | (fn << ((gpio & 0xf) * 2)); 64 gafr = (gafr & ~(0x3 << shft)) | (fn << shft);
76 65
77 if (c & MFP_DIR_OUT) 66 if (uorl == 0)
67 GAFR_L(bank) = gafr;
68 else
69 GAFR_U(bank) = gafr;
70
71 if (dir == MFP_DIR_OUT)
78 GPDR(gpio) |= mask; 72 GPDR(gpio) |= mask;
79 else 73 else
80 GPDR(gpio) &= ~mask; 74 GPDR(gpio) &= ~mask;
81 75
82 if (__mfp_config_lpm(gpio, c & MFP_LPM_STATE_MASK)) 76 /* alternate function and direction at low power mode */
83 return -EINVAL; 77 switch (c & MFP_LPM_STATE_MASK) {
78 case MFP_LPM_DRIVE_HIGH:
79 PGSR(bank) |= mask;
80 dir = MFP_DIR_OUT;
81 break;
82 case MFP_LPM_DRIVE_LOW:
83 PGSR(bank) &= ~mask;
84 dir = MFP_DIR_OUT;
85 break;
86 case MFP_LPM_DEFAULT:
87 break;
88 default:
89 /* warning and fall through, treat as MFP_LPM_DEFAULT */
90 pr_warning("%s: GPIO%d: unsupported low power mode\n",
91 __func__, gpio);
92 break;
93 }
94
95 if (dir == MFP_DIR_OUT)
96 gpdr_lpm[bank] |= mask;
97 else
98 gpdr_lpm[bank] &= ~mask;
84 99
85 /* give early warning if MFP_LPM_CAN_WAKEUP is set on the 100 /* give early warning if MFP_LPM_CAN_WAKEUP is set on the
86 * configurations of those pins not able to wakeup 101 * configurations of those pins not able to wakeup
@@ -91,7 +106,7 @@ static int __mfp_config_gpio(unsigned gpio, unsigned long c)
91 return -EINVAL; 106 return -EINVAL;
92 } 107 }
93 108
94 if ((c & MFP_LPM_CAN_WAKEUP) && (c & MFP_DIR_OUT)) { 109 if ((c & MFP_LPM_CAN_WAKEUP) && (dir == MFP_DIR_OUT)) {
95 pr_warning("%s: output GPIO%d unable to wakeup\n", 110 pr_warning("%s: output GPIO%d unable to wakeup\n",
96 __func__, gpio); 111 __func__, gpio);
97 return -EINVAL; 112 return -EINVAL;
@@ -135,7 +150,7 @@ void pxa2xx_mfp_config(unsigned long *mfp_cfgs, int num)
135 150
136void pxa2xx_mfp_set_lpm(int mfp, unsigned long lpm) 151void pxa2xx_mfp_set_lpm(int mfp, unsigned long lpm)
137{ 152{
138 unsigned long flags; 153 unsigned long flags, c;
139 int gpio; 154 int gpio;
140 155
141 gpio = __mfp_validate(mfp); 156 gpio = __mfp_validate(mfp);
@@ -143,7 +158,11 @@ void pxa2xx_mfp_set_lpm(int mfp, unsigned long lpm)
143 return; 158 return;
144 159
145 local_irq_save(flags); 160 local_irq_save(flags);
146 __mfp_config_lpm(gpio, lpm); 161
162 c = gpio_desc[gpio].config;
163 c = (c & ~MFP_LPM_STATE_MASK) | lpm;
164 __mfp_config_gpio(gpio, c);
165
147 local_irq_restore(flags); 166 local_irq_restore(flags);
148} 167}
149 168
@@ -187,23 +206,22 @@ int gpio_set_wake(unsigned int gpio, unsigned int on)
187} 206}
188 207
189#ifdef CONFIG_PXA25x 208#ifdef CONFIG_PXA25x
190static int __init pxa25x_mfp_init(void) 209static void __init pxa25x_mfp_init(void)
191{ 210{
192 int i; 211 int i;
193 212
194 if (cpu_is_pxa25x()) { 213 for (i = 0; i <= 84; i++)
195 for (i = 0; i <= 84; i++) 214 gpio_desc[i].valid = 1;
196 gpio_desc[i].valid = 1;
197 215
198 for (i = 0; i <= 15; i++) { 216 for (i = 0; i <= 15; i++) {
199 gpio_desc[i].can_wakeup = 1; 217 gpio_desc[i].can_wakeup = 1;
200 gpio_desc[i].mask = GPIO_bit(i); 218 gpio_desc[i].mask = GPIO_bit(i);
201 }
202 } 219 }
203 220
204 return 0; 221 gpio_nr = 85;
205} 222}
206postcore_initcall(pxa25x_mfp_init); 223#else
224static inline void pxa25x_mfp_init(void) {}
207#endif /* CONFIG_PXA25x */ 225#endif /* CONFIG_PXA25x */
208 226
209#ifdef CONFIG_PXA27x 227#ifdef CONFIG_PXA27x
@@ -233,45 +251,106 @@ int keypad_set_wake(unsigned int on)
233 return 0; 251 return 0;
234} 252}
235 253
236static int __init pxa27x_mfp_init(void) 254static void __init pxa27x_mfp_init(void)
237{ 255{
238 int i, gpio; 256 int i, gpio;
239 257
240 if (cpu_is_pxa27x()) { 258 for (i = 0; i <= 120; i++) {
241 for (i = 0; i <= 120; i++) { 259 /* skip GPIO2, 5, 6, 7, 8, they are not
242 /* skip GPIO2, 5, 6, 7, 8, they are not 260 * valid pins allow configuration
243 * valid pins allow configuration 261 */
244 */ 262 if (i == 2 || i == 5 || i == 6 || i == 7 || i == 8)
245 if (i == 2 || i == 5 || i == 6 || 263 continue;
246 i == 7 || i == 8)
247 continue;
248 264
249 gpio_desc[i].valid = 1; 265 gpio_desc[i].valid = 1;
250 } 266 }
251 267
252 /* Keypad GPIOs */ 268 /* Keypad GPIOs */
253 for (i = 0; i < ARRAY_SIZE(pxa27x_pkwr_gpio); i++) { 269 for (i = 0; i < ARRAY_SIZE(pxa27x_pkwr_gpio); i++) {
254 gpio = pxa27x_pkwr_gpio[i]; 270 gpio = pxa27x_pkwr_gpio[i];
255 gpio_desc[gpio].can_wakeup = 1; 271 gpio_desc[gpio].can_wakeup = 1;
256 gpio_desc[gpio].keypad_gpio = 1; 272 gpio_desc[gpio].keypad_gpio = 1;
257 gpio_desc[gpio].mask = 1 << i; 273 gpio_desc[gpio].mask = 1 << i;
258 } 274 }
259 275
260 /* Overwrite GPIO13 as a PWER wakeup source */ 276 /* Overwrite GPIO13 as a PWER wakeup source */
261 for (i = 0; i <= 15; i++) { 277 for (i = 0; i <= 15; i++) {
262 /* skip GPIO2, 5, 6, 7, 8 */ 278 /* skip GPIO2, 5, 6, 7, 8 */
263 if (GPIO_bit(i) & 0x1e4) 279 if (GPIO_bit(i) & 0x1e4)
264 continue; 280 continue;
265 281
266 gpio_desc[i].can_wakeup = 1; 282 gpio_desc[i].can_wakeup = 1;
267 gpio_desc[i].mask = GPIO_bit(i); 283 gpio_desc[i].mask = GPIO_bit(i);
268 } 284 }
285
286 gpio_desc[35].can_wakeup = 1;
287 gpio_desc[35].mask = PWER_WE35;
288
289 gpio_nr = 121;
290}
291#else
292static inline void pxa27x_mfp_init(void) {}
293#endif /* CONFIG_PXA27x */
294
295#ifdef CONFIG_PM
296static unsigned long saved_gafr[2][4];
297static unsigned long saved_gpdr[4];
269 298
270 gpio_desc[35].can_wakeup = 1; 299static int pxa2xx_mfp_suspend(struct sys_device *d, pm_message_t state)
271 gpio_desc[35].mask = PWER_WE35; 300{
301 int i;
302
303 for (i = 0; i <= gpio_to_bank(gpio_nr); i++) {
304
305 saved_gafr[0][i] = GAFR_L(i);
306 saved_gafr[1][i] = GAFR_U(i);
307 saved_gpdr[i] = GPDR(i * 32);
308
309 GPDR(i * 32) = gpdr_lpm[i];
272 } 310 }
311 return 0;
312}
273 313
314static int pxa2xx_mfp_resume(struct sys_device *d)
315{
316 int i;
317
318 for (i = 0; i <= gpio_to_bank(gpio_nr); i++) {
319 GAFR_L(i) = saved_gafr[0][i];
320 GAFR_U(i) = saved_gafr[1][i];
321 GPDR(i * 32) = saved_gpdr[i];
322 }
323 PSSR = PSSR_RDH | PSSR_PH;
274 return 0; 324 return 0;
275} 325}
276postcore_initcall(pxa27x_mfp_init); 326#else
277#endif /* CONFIG_PXA27x */ 327#define pxa2xx_mfp_suspend NULL
328#define pxa2xx_mfp_resume NULL
329#endif
330
331struct sysdev_class pxa2xx_mfp_sysclass = {
332 .name = "mfp",
333 .suspend = pxa2xx_mfp_suspend,
334 .resume = pxa2xx_mfp_resume,
335};
336
337static int __init pxa2xx_mfp_init(void)
338{
339 int i;
340
341 if (!cpu_is_pxa2xx())
342 return 0;
343
344 if (cpu_is_pxa25x())
345 pxa25x_mfp_init();
346
347 if (cpu_is_pxa27x())
348 pxa27x_mfp_init();
349
350 /* initialize gafr_run[], pgsr_lpm[] from existing values */
351 for (i = 0; i <= gpio_to_bank(gpio_nr); i++)
352 gpdr_lpm[i] = GPDR(i * 32);
353
354 return sysdev_class_register(&pxa2xx_mfp_sysclass);
355}
356postcore_initcall(pxa2xx_mfp_init);
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
new file mode 100644
index 000000000000..0842c531ee4d
--- /dev/null
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -0,0 +1,905 @@
1/*
2 * Handles the Mitac Mio A701 Board
3 *
4 * Copyright (C) 2008 Robert Jarzmik
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22#include <linux/kernel.h>
23#include <linux/init.h>
24#include <linux/platform_device.h>
25#include <linux/sysdev.h>
26#include <linux/input.h>
27#include <linux/delay.h>
28#include <linux/gpio_keys.h>
29#include <linux/pwm_backlight.h>
30#include <linux/rtc.h>
31#include <linux/leds.h>
32#include <linux/gpio.h>
33#include <linux/interrupt.h>
34#include <linux/irq.h>
35#include <linux/pda_power.h>
36#include <linux/power_supply.h>
37#include <linux/wm97xx.h>
38#include <linux/mtd/physmap.h>
39
40#include <asm/mach-types.h>
41#include <asm/mach/arch.h>
42#include <mach/mfp-pxa27x.h>
43#include <mach/pxa27x_keypad.h>
44#include <mach/pxafb.h>
45#include <mach/pxa2xx-regs.h>
46#include <mach/mmc.h>
47#include <mach/udc.h>
48#include <mach/pxa27x-udc.h>
49
50#include <mach/mioa701.h>
51
52#include "generic.h"
53#include "devices.h"
54
55static unsigned long mioa701_pin_config[] = {
56 /* Mio global */
57 MIO_CFG_OUT(GPIO9_CHARGE_nEN, AF0, DRIVE_LOW),
58 MIO_CFG_OUT(GPIO18_POWEROFF, AF0, DRIVE_LOW),
59 MFP_CFG_OUT(GPIO3, AF0, DRIVE_HIGH),
60 MFP_CFG_OUT(GPIO4, AF0, DRIVE_HIGH),
61
62 /* Backlight PWM 0 */
63 GPIO16_PWM0_OUT,
64
65 /* MMC */
66 GPIO32_MMC_CLK,
67 GPIO92_MMC_DAT_0,
68 GPIO109_MMC_DAT_1,
69 GPIO110_MMC_DAT_2,
70 GPIO111_MMC_DAT_3,
71 GPIO112_MMC_CMD,
72 MIO_CFG_IN(GPIO78_SDIO_RO, AF0),
73 MIO_CFG_IN(GPIO15_SDIO_INSERT, AF0),
74 MIO_CFG_OUT(GPIO91_SDIO_EN, AF0, DRIVE_LOW),
75
76 /* USB */
77 MIO_CFG_IN(GPIO13_USB_DETECT, AF0),
78 MIO_CFG_OUT(GPIO22_USB_ENABLE, AF0, DRIVE_LOW),
79
80 /* LCD */
81 GPIO58_LCD_LDD_0,
82 GPIO59_LCD_LDD_1,
83 GPIO60_LCD_LDD_2,
84 GPIO61_LCD_LDD_3,
85 GPIO62_LCD_LDD_4,
86 GPIO63_LCD_LDD_5,
87 GPIO64_LCD_LDD_6,
88 GPIO65_LCD_LDD_7,
89 GPIO66_LCD_LDD_8,
90 GPIO67_LCD_LDD_9,
91 GPIO68_LCD_LDD_10,
92 GPIO69_LCD_LDD_11,
93 GPIO70_LCD_LDD_12,
94 GPIO71_LCD_LDD_13,
95 GPIO72_LCD_LDD_14,
96 GPIO73_LCD_LDD_15,
97 GPIO74_LCD_FCLK,
98 GPIO75_LCD_LCLK,
99 GPIO76_LCD_PCLK,
100
101 /* Bluetooth */
102 GPIO44_BTUART_CTS,
103 GPIO42_BTUART_RXD,
104 GPIO45_BTUART_RTS,
105 GPIO43_BTUART_TXD,
106 MIO_CFG_OUT(GPIO83_BT_ON, AF0, DRIVE_LOW),
107
108 /* GPS */
109 MIO_CFG_OUT(GPIO23_GPS_UNKNOWN1, AF0, DRIVE_LOW),
110 MIO_CFG_OUT(GPIO26_GPS_ON, AF0, DRIVE_LOW),
111 MIO_CFG_OUT(GPIO27_GPS_RESET, AF0, DRIVE_LOW),
112 MIO_CFG_OUT(GPIO106_GPS_UNKNOWN2, AF0, DRIVE_LOW),
113 MIO_CFG_OUT(GPIO107_GPS_UNKNOWN3, AF0, DRIVE_LOW),
114 GPIO46_STUART_RXD,
115 GPIO47_STUART_TXD,
116
117 /* GSM */
118 MIO_CFG_OUT(GPIO24_GSM_MOD_RESET_CMD, AF0, DRIVE_LOW),
119 MIO_CFG_OUT(GPIO88_GSM_nMOD_ON_CMD, AF0, DRIVE_HIGH),
120 MIO_CFG_OUT(GPIO90_GSM_nMOD_OFF_CMD, AF0, DRIVE_HIGH),
121 MIO_CFG_OUT(GPIO114_GSM_nMOD_DTE_UART_STATE, AF0, DRIVE_HIGH),
122 MIO_CFG_IN(GPIO25_GSM_MOD_ON_STATE, AF0),
123 MIO_CFG_IN(GPIO113_GSM_EVENT, AF0) | WAKEUP_ON_EDGE_BOTH,
124 GPIO34_FFUART_RXD,
125 GPIO35_FFUART_CTS,
126 GPIO36_FFUART_DCD,
127 GPIO37_FFUART_DSR,
128 GPIO39_FFUART_TXD,
129 GPIO40_FFUART_DTR,
130 GPIO41_FFUART_RTS,
131
132 /* Sound */
133 GPIO89_AC97_SYSCLK,
134 MIO_CFG_IN(GPIO12_HPJACK_INSERT, AF0),
135
136 /* Leds */
137 MIO_CFG_OUT(GPIO10_LED_nCharging, AF0, DRIVE_HIGH),
138 MIO_CFG_OUT(GPIO97_LED_nBlue, AF0, DRIVE_HIGH),
139 MIO_CFG_OUT(GPIO98_LED_nOrange, AF0, DRIVE_HIGH),
140 MIO_CFG_OUT(GPIO82_LED_nVibra, AF0, DRIVE_HIGH),
141 MIO_CFG_OUT(GPIO115_LED_nKeyboard, AF0, DRIVE_HIGH),
142
143 /* Keyboard */
144 MIO_CFG_IN(GPIO0_KEY_POWER, AF0) | WAKEUP_ON_EDGE_BOTH,
145 MIO_CFG_IN(GPIO93_KEY_VOLUME_UP, AF0),
146 MIO_CFG_IN(GPIO94_KEY_VOLUME_DOWN, AF0),
147 GPIO100_KP_MKIN_0,
148 GPIO101_KP_MKIN_1,
149 GPIO102_KP_MKIN_2,
150 GPIO103_KP_MKOUT_0,
151 GPIO104_KP_MKOUT_1,
152 GPIO105_KP_MKOUT_2,
153
154 /* Unknown */
155 MFP_CFG_IN(GPIO14, AF0),
156 MFP_CFG_IN(GPIO20, AF0),
157 MFP_CFG_IN(GPIO21, AF0),
158 MFP_CFG_IN(GPIO33, AF0),
159 MFP_CFG_OUT(GPIO49, AF0, DRIVE_HIGH),
160 MFP_CFG_OUT(GPIO57, AF0, DRIVE_HIGH),
161 MFP_CFG_OUT(GPIO77, AF0, DRIVE_HIGH),
162 MFP_CFG_IN(GPIO80, AF0),
163 MFP_CFG_OUT(GPIO86, AF0, DRIVE_HIGH),
164 MFP_CFG_IN(GPIO96, AF0),
165 MFP_CFG_OUT(GPIO116, AF0, DRIVE_HIGH),
166};
167
168#define MIO_GPIO_IN(num, _desc) \
169 { .gpio = (num), .dir = 0, .desc = (_desc) }
170#define MIO_GPIO_OUT(num, _init, _desc) \
171 { .gpio = (num), .dir = 1, .init = (_init), .desc = (_desc) }
172struct gpio_ress {
173 unsigned gpio : 8;
174 unsigned dir : 1;
175 unsigned init : 1;
176 char *desc;
177};
178
179static int mio_gpio_request(struct gpio_ress *gpios, int size)
180{
181 int i, rc = 0;
182 int gpio;
183 int dir;
184
185 for (i = 0; (!rc) && (i < size); i++) {
186 gpio = gpios[i].gpio;
187 dir = gpios[i].dir;
188 rc = gpio_request(gpio, gpios[i].desc);
189 if (rc) {
190 printk(KERN_ERR "Error requesting GPIO %d(%s) : %d\n",
191 gpio, gpios[i].desc, rc);
192 continue;
193 }
194 if (dir)
195 gpio_direction_output(gpio, gpios[i].init);
196 else
197 gpio_direction_input(gpio);
198 }
199 while ((rc) && (--i >= 0))
200 gpio_free(gpios[i].gpio);
201 return rc;
202}
203
204static void mio_gpio_free(struct gpio_ress *gpios, int size)
205{
206 int i;
207
208 for (i = 0; i < size; i++)
209 gpio_free(gpios[i].gpio);
210}
211
212/* LCD Screen and Backlight */
213static struct platform_pwm_backlight_data mioa701_backlight_data = {
214 .pwm_id = 0,
215 .max_brightness = 100,
216 .dft_brightness = 50,
217 .pwm_period_ns = 4000 * 1024, /* Fl = 250kHz */
218};
219
220/*
221 * LTM0305A776C LCD panel timings
222 *
223 * see:
224 * - the LTM0305A776C datasheet,
225 * - and the PXA27x Programmers' manual
226 */
227static struct pxafb_mode_info mioa701_ltm0305a776c = {
228 .pixclock = 220000, /* CLK=4.545 MHz */
229 .xres = 240,
230 .yres = 320,
231 .bpp = 16,
232 .hsync_len = 4,
233 .vsync_len = 2,
234 .left_margin = 6,
235 .right_margin = 4,
236 .upper_margin = 5,
237 .lower_margin = 3,
238};
239
240static void mioa701_lcd_power(int on, struct fb_var_screeninfo *si)
241{
242 gpio_set_value(GPIO87_LCD_POWER, on);
243}
244
245static struct pxafb_mach_info mioa701_pxafb_info = {
246 .modes = &mioa701_ltm0305a776c,
247 .num_modes = 1,
248 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
249 .pxafb_lcd_power = mioa701_lcd_power,
250};
251
252/*
253 * Keyboard configuration
254 */
255static unsigned int mioa701_matrix_keys[] = {
256 KEY(0, 0, KEY_UP),
257 KEY(0, 1, KEY_RIGHT),
258 KEY(0, 2, KEY_MEDIA),
259 KEY(1, 0, KEY_DOWN),
260 KEY(1, 1, KEY_ENTER),
261 KEY(1, 2, KEY_CONNECT), /* GPS key */
262 KEY(2, 0, KEY_LEFT),
263 KEY(2, 1, KEY_PHONE), /* Phone Green key */
264 KEY(2, 2, KEY_CAMERA) /* Camera key */
265};
266static struct pxa27x_keypad_platform_data mioa701_keypad_info = {
267 .matrix_key_rows = 3,
268 .matrix_key_cols = 3,
269 .matrix_key_map = mioa701_matrix_keys,
270 .matrix_key_map_size = ARRAY_SIZE(mioa701_matrix_keys),
271};
272
273/*
274 * GPIO Key Configuration
275 */
276#define MIO_KEY(key, _gpio, _desc, _wakeup) \
277 { .code = (key), .gpio = (_gpio), .active_low = 0, \
278 .desc = (_desc), .type = EV_KEY, .wakeup = (_wakeup) }
279static struct gpio_keys_button mioa701_button_table[] = {
280 MIO_KEY(KEY_EXIT, GPIO0_KEY_POWER, "Power button", 1),
281 MIO_KEY(KEY_VOLUMEUP, GPIO93_KEY_VOLUME_UP, "Volume up", 0),
282 MIO_KEY(KEY_VOLUMEDOWN, GPIO94_KEY_VOLUME_DOWN, "Volume down", 0),
283 MIO_KEY(KEY_HP, GPIO12_HPJACK_INSERT, "HP jack detect", 0)
284};
285
286static struct gpio_keys_platform_data mioa701_gpio_keys_data = {
287 .buttons = mioa701_button_table,
288 .nbuttons = ARRAY_SIZE(mioa701_button_table),
289};
290
291/*
292 * Leds and vibrator
293 */
294#define ONE_LED(_gpio, _name) \
295{ .gpio = (_gpio), .name = (_name), .active_low = true }
296static struct gpio_led gpio_leds[] = {
297 ONE_LED(GPIO10_LED_nCharging, "mioa701:charging"),
298 ONE_LED(GPIO97_LED_nBlue, "mioa701:blue"),
299 ONE_LED(GPIO98_LED_nOrange, "mioa701:orange"),
300 ONE_LED(GPIO82_LED_nVibra, "mioa701:vibra"),
301 ONE_LED(GPIO115_LED_nKeyboard, "mioa701:keyboard")
302};
303
304static struct gpio_led_platform_data gpio_led_info = {
305 .leds = gpio_leds,
306 .num_leds = ARRAY_SIZE(gpio_leds),
307};
308
309/*
310 * GSM Sagem XS200 chip
311 *
312 * GSM handling was purged from kernel. For history, this is the way to go :
313 * - init : GPIO24_GSM_MOD_RESET_CMD = 0, GPIO114_GSM_nMOD_DTE_UART_STATE = 1
314 * GPIO88_GSM_nMOD_ON_CMD = 1, GPIO90_GSM_nMOD_OFF_CMD = 1
315 * - reset : GPIO24_GSM_MOD_RESET_CMD = 1, msleep(100),
316 * GPIO24_GSM_MOD_RESET_CMD = 0
317 * - turn on : GPIO88_GSM_nMOD_ON_CMD = 0, msleep(1000),
318 * GPIO88_GSM_nMOD_ON_CMD = 1
319 * - turn off : GPIO90_GSM_nMOD_OFF_CMD = 0, msleep(1000),
320 * GPIO90_GSM_nMOD_OFF_CMD = 1
321 */
322static int is_gsm_on(void)
323{
324 int is_on;
325
326 is_on = !!gpio_get_value(GPIO25_GSM_MOD_ON_STATE);
327 return is_on;
328}
329
330irqreturn_t gsm_on_irq(int irq, void *p)
331{
332 printk(KERN_DEBUG "Mioa701: GSM status changed to %s\n",
333 is_gsm_on() ? "on" : "off");
334 return IRQ_HANDLED;
335}
336
337struct gpio_ress gsm_gpios[] = {
338 MIO_GPIO_IN(GPIO25_GSM_MOD_ON_STATE, "GSM state"),
339 MIO_GPIO_IN(GPIO113_GSM_EVENT, "GSM event"),
340};
341
342static int __init gsm_init(void)
343{
344 int rc;
345
346 rc = mio_gpio_request(ARRAY_AND_SIZE(gsm_gpios));
347 if (rc)
348 goto err_gpio;
349 rc = request_irq(gpio_to_irq(GPIO25_GSM_MOD_ON_STATE), gsm_on_irq,
350 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
351 "GSM XS200 Power Irq", NULL);
352 if (rc)
353 goto err_irq;
354
355 gpio_set_wake(GPIO113_GSM_EVENT, 1);
356 return 0;
357
358err_irq:
359 printk(KERN_ERR "Mioa701: Can't request GSM_ON irq\n");
360 mio_gpio_free(ARRAY_AND_SIZE(gsm_gpios));
361err_gpio:
362 printk(KERN_ERR "Mioa701: gsm not available\n");
363 return rc;
364}
365
366static void gsm_exit(void)
367{
368 free_irq(gpio_to_irq(GPIO25_GSM_MOD_ON_STATE), NULL);
369 mio_gpio_free(ARRAY_AND_SIZE(gsm_gpios));
370}
371
372/*
373 * Bluetooth BRF6150 chip
374 *
375 * BT handling was purged from kernel. For history, this is the way to go :
376 * - turn on : GPIO83_BT_ON = 1
377 * - turn off : GPIO83_BT_ON = 0
378 */
379
380/*
381 * GPS Sirf Star III chip
382 *
383 * GPS handling was purged from kernel. For history, this is the way to go :
384 * - init : GPIO23_GPS_UNKNOWN1 = 1, GPIO26_GPS_ON = 0, GPIO27_GPS_RESET = 0
385 * GPIO106_GPS_UNKNOWN2 = 0, GPIO107_GPS_UNKNOWN3 = 0
386 * - turn on : GPIO27_GPS_RESET = 1, GPIO26_GPS_ON = 1
387 * - turn off : GPIO26_GPS_ON = 0, GPIO27_GPS_RESET = 0
388 */
389
390/*
391 * USB UDC
392 */
393static void udc_power_command(int cmd)
394{
395 switch (cmd) {
396 case PXA2XX_UDC_CMD_DISCONNECT:
397 gpio_set_value(GPIO22_USB_ENABLE, 0);
398 break;
399 case PXA2XX_UDC_CMD_CONNECT:
400 gpio_set_value(GPIO22_USB_ENABLE, 1);
401 break;
402 default:
403 printk(KERN_INFO "udc_control: unknown command (0x%x)!\n", cmd);
404 break;
405 }
406}
407
408static int is_usb_connected(void)
409{
410 return !!gpio_get_value(GPIO13_USB_DETECT);
411}
412
413static struct pxa2xx_udc_mach_info mioa701_udc_info = {
414 .udc_is_connected = is_usb_connected,
415 .udc_command = udc_power_command,
416};
417
418struct gpio_ress udc_gpios[] = {
419 MIO_GPIO_OUT(GPIO22_USB_ENABLE, 0, "USB Vbus enable")
420};
421
422static int __init udc_init(void)
423{
424 pxa_set_udc_info(&mioa701_udc_info);
425 return mio_gpio_request(ARRAY_AND_SIZE(udc_gpios));
426}
427
428static void udc_exit(void)
429{
430 mio_gpio_free(ARRAY_AND_SIZE(udc_gpios));
431}
432
433/*
434 * SDIO/MMC Card controller
435 */
436static void mci_setpower(struct device *dev, unsigned int vdd)
437{
438 struct pxamci_platform_data *p_d = dev->platform_data;
439
440 if ((1 << vdd) & p_d->ocr_mask)
441 gpio_set_value(GPIO91_SDIO_EN, 1); /* enable SDIO power */
442 else
443 gpio_set_value(GPIO91_SDIO_EN, 0); /* disable SDIO power */
444}
445
446static int mci_get_ro(struct device *dev)
447{
448 return gpio_get_value(GPIO78_SDIO_RO);
449}
450
451struct gpio_ress mci_gpios[] = {
452 MIO_GPIO_IN(GPIO78_SDIO_RO, "SDIO readonly detect"),
453 MIO_GPIO_IN(GPIO15_SDIO_INSERT, "SDIO insertion detect"),
454 MIO_GPIO_OUT(GPIO91_SDIO_EN, 0, "SDIO power enable")
455};
456
457static void mci_exit(struct device *dev, void *data)
458{
459 mio_gpio_free(ARRAY_AND_SIZE(mci_gpios));
460 free_irq(gpio_to_irq(GPIO15_SDIO_INSERT), data);
461}
462
463static struct pxamci_platform_data mioa701_mci_info;
464
465/**
466 * The card detect interrupt isn't debounced so we delay it by 250ms
467 * to give the card a chance to fully insert/eject.
468 */
469static int mci_init(struct device *dev, irq_handler_t detect_int, void *data)
470{
471 int rc;
472 int irq = gpio_to_irq(GPIO15_SDIO_INSERT);
473
474 rc = mio_gpio_request(ARRAY_AND_SIZE(mci_gpios));
475 if (rc)
476 goto err_gpio;
477 /* enable RE/FE interrupt on card insertion and removal */
478 rc = request_irq(irq, detect_int,
479 IRQF_DISABLED | IRQF_TRIGGER_RISING |
480 IRQF_TRIGGER_FALLING,
481 "MMC card detect", data);
482 if (rc)
483 goto err_irq;
484
485 mioa701_mci_info.detect_delay = msecs_to_jiffies(250);
486 return 0;
487
488err_irq:
489 dev_err(dev, "mioa701_mci_init: MMC/SD:"
490 " can't request MMC card detect IRQ\n");
491 mio_gpio_free(ARRAY_AND_SIZE(mci_gpios));
492err_gpio:
493 return rc;
494}
495
496static struct pxamci_platform_data mioa701_mci_info = {
497 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
498 .init = mci_init,
499 .get_ro = mci_get_ro,
500 .setpower = mci_setpower,
501 .exit = mci_exit,
502};
503
504/* FlashRAM */
505static struct resource strataflash_resource = {
506 .start = PXA_CS0_PHYS,
507 .end = PXA_CS0_PHYS + SZ_64M - 1,
508 .flags = IORESOURCE_MEM,
509};
510
511static struct physmap_flash_data strataflash_data = {
512 .width = 2,
513 /* .set_vpp = mioa701_set_vpp, */
514};
515
516static struct platform_device strataflash = {
517 .name = "physmap-flash",
518 .id = -1,
519 .resource = &strataflash_resource,
520 .num_resources = 1,
521 .dev = {
522 .platform_data = &strataflash_data,
523 },
524};
525
526/*
527 * Suspend/Resume bootstrap management
528 *
529 * MIO A701 reboot sequence is highly ROM dependant. From the one dissassembled,
530 * this sequence is as follows :
531 * - disables interrupts
532 * - initialize SDRAM (self refresh RAM into active RAM)
533 * - initialize GPIOs (depends on value at 0xa020b020)
534 * - initialize coprossessors
535 * - if edge detect on PWR_SCL(GPIO3), then proceed to cold start
536 * - or if value at 0xa020b000 not equal to 0x0f0f0f0f, proceed to cold start
537 * - else do a resume, ie. jump to addr 0xa0100000
538 */
539#define RESUME_ENABLE_ADDR 0xa020b000
540#define RESUME_ENABLE_VAL 0x0f0f0f0f
541#define RESUME_BT_ADDR 0xa020b020
542#define RESUME_UNKNOWN_ADDR 0xa020b024
543#define RESUME_VECTOR_ADDR 0xa0100000
544#define BOOTSTRAP_WORDS mioa701_bootstrap_lg/4
545
546static u32 *save_buffer;
547
548static void install_bootstrap(void)
549{
550 int i;
551 u32 *rom_bootstrap = phys_to_virt(RESUME_VECTOR_ADDR);
552 u32 *src = &mioa701_bootstrap;
553
554 for (i = 0; i < BOOTSTRAP_WORDS; i++)
555 rom_bootstrap[i] = src[i];
556}
557
558
559static int mioa701_sys_suspend(struct sys_device *sysdev, pm_message_t state)
560{
561 int i = 0, is_bt_on;
562 u32 *mem_resume_vector = phys_to_virt(RESUME_VECTOR_ADDR);
563 u32 *mem_resume_enabler = phys_to_virt(RESUME_ENABLE_ADDR);
564 u32 *mem_resume_bt = phys_to_virt(RESUME_BT_ADDR);
565 u32 *mem_resume_unknown = phys_to_virt(RESUME_UNKNOWN_ADDR);
566
567 /* Devices prepare suspend */
568 is_bt_on = gpio_get_value(GPIO83_BT_ON);
569 pxa2xx_mfp_set_lpm(GPIO83_BT_ON,
570 is_bt_on ? MFP_LPM_DRIVE_HIGH : MFP_LPM_DRIVE_LOW);
571
572 for (i = 0; i < BOOTSTRAP_WORDS; i++)
573 save_buffer[i] = mem_resume_vector[i];
574 save_buffer[i++] = *mem_resume_enabler;
575 save_buffer[i++] = *mem_resume_bt;
576 save_buffer[i++] = *mem_resume_unknown;
577
578 *mem_resume_enabler = RESUME_ENABLE_VAL;
579 *mem_resume_bt = is_bt_on;
580
581 install_bootstrap();
582 return 0;
583}
584
585static int mioa701_sys_resume(struct sys_device *sysdev)
586{
587 int i = 0;
588 u32 *mem_resume_vector = phys_to_virt(RESUME_VECTOR_ADDR);
589 u32 *mem_resume_enabler = phys_to_virt(RESUME_ENABLE_ADDR);
590 u32 *mem_resume_bt = phys_to_virt(RESUME_BT_ADDR);
591 u32 *mem_resume_unknown = phys_to_virt(RESUME_UNKNOWN_ADDR);
592
593 for (i = 0; i < BOOTSTRAP_WORDS; i++)
594 mem_resume_vector[i] = save_buffer[i];
595 *mem_resume_enabler = save_buffer[i++];
596 *mem_resume_bt = save_buffer[i++];
597 *mem_resume_unknown = save_buffer[i++];
598
599 return 0;
600}
601
602static struct sysdev_class mioa701_sysclass = {
603 .name = "mioa701",
604};
605
606static struct sys_device sysdev_bootstrap = {
607 .cls = &mioa701_sysclass,
608};
609
610static struct sysdev_driver driver_bootstrap = {
611 .suspend = &mioa701_sys_suspend,
612 .resume = &mioa701_sys_resume,
613};
614
615static int __init bootstrap_init(void)
616{
617 int rc;
618 int save_size = mioa701_bootstrap_lg + (sizeof(u32) * 3);
619
620 rc = sysdev_class_register(&mioa701_sysclass);
621 if (rc) {
622 printk(KERN_ERR "Failed registering mioa701 sys class\n");
623 return -ENODEV;
624 }
625 rc = sysdev_register(&sysdev_bootstrap);
626 if (rc) {
627 printk(KERN_ERR "Failed registering mioa701 sys device\n");
628 return -ENODEV;
629 }
630 rc = sysdev_driver_register(&mioa701_sysclass, &driver_bootstrap);
631 if (rc) {
632 printk(KERN_ERR "Failed registering PMU sys driver\n");
633 return -ENODEV;
634 }
635
636 save_buffer = kmalloc(save_size, GFP_KERNEL);
637 if (!save_buffer)
638 return -ENOMEM;
639 printk(KERN_INFO "MioA701: allocated %d bytes for bootstrap\n",
640 save_size);
641 return 0;
642}
643
644static void bootstrap_exit(void)
645{
646 kfree(save_buffer);
647 sysdev_driver_unregister(&mioa701_sysclass, &driver_bootstrap);
648 sysdev_unregister(&sysdev_bootstrap);
649 sysdev_class_unregister(&mioa701_sysclass);
650
651 printk(KERN_CRIT "Unregistering mioa701 suspend will hang next"
652 "resume !!!\n");
653}
654
655/*
656 * Power Supply
657 */
658static char *supplicants[] = {
659 "mioa701_battery"
660};
661
662static void mioa701_set_charge(int flags)
663{
664 gpio_set_value(GPIO9_CHARGE_nEN, !flags);
665}
666
667static struct pda_power_pdata power_pdata = {
668 .is_ac_online = is_usb_connected,
669 .set_charge = mioa701_set_charge,
670 .supplied_to = supplicants,
671 .num_supplicants = ARRAY_SIZE(supplicants),
672};
673
674static struct resource power_resources[] = {
675 [0] = {
676 .name = "ac",
677 .start = gpio_to_irq(GPIO13_USB_DETECT),
678 .end = gpio_to_irq(GPIO13_USB_DETECT),
679 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
680 IORESOURCE_IRQ_LOWEDGE,
681 },
682};
683
684static struct platform_device power_dev = {
685 .name = "pda-power",
686 .id = -1,
687 .resource = power_resources,
688 .num_resources = ARRAY_SIZE(power_resources),
689 .dev = {
690 .platform_data = &power_pdata,
691 },
692};
693
694#if defined(CONFIG_PDA_POWER) && defined(CONFIG_TOUCHSCREEN_WM97XX)
695static struct wm97xx *battery_wm;
696
697static enum power_supply_property battery_props[] = {
698 POWER_SUPPLY_PROP_STATUS,
699 POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN,
700 POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN,
701 POWER_SUPPLY_PROP_VOLTAGE_NOW,
702 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, /* Necessary for apm */
703};
704
705static int get_battery_voltage(void)
706{
707 int adc = -1;
708
709 if (battery_wm)
710 adc = wm97xx_read_aux_adc(battery_wm, WM97XX_AUX_ID1);
711 return adc;
712}
713
714static int get_battery_status(struct power_supply *b)
715{
716 int status;
717
718 if (is_usb_connected())
719 status = POWER_SUPPLY_STATUS_CHARGING;
720 else
721 status = POWER_SUPPLY_STATUS_DISCHARGING;
722
723 return status;
724}
725
726static int get_property(struct power_supply *b,
727 enum power_supply_property psp,
728 union power_supply_propval *val)
729{
730 int rc = 0;
731
732 switch (psp) {
733 case POWER_SUPPLY_PROP_STATUS:
734 val->intval = get_battery_status(b);
735 break;
736 case POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN:
737 val->intval = 0xfd0;
738 break;
739 case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
740 val->intval = 0xc00;
741 break;
742 case POWER_SUPPLY_PROP_VOLTAGE_NOW:
743 val->intval = get_battery_voltage();
744 break;
745 case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
746 val->intval = 100;
747 break;
748 default:
749 val->intval = -1;
750 rc = -1;
751 }
752
753 return rc;
754};
755
756static struct power_supply battery_ps = {
757 .name = "mioa701_battery",
758 .type = POWER_SUPPLY_TYPE_BATTERY,
759 .get_property = get_property,
760 .properties = battery_props,
761 .num_properties = ARRAY_SIZE(battery_props),
762};
763
764static int battery_probe(struct platform_device *pdev)
765{
766 struct wm97xx *wm = platform_get_drvdata(pdev);
767 int rc;
768
769 battery_wm = wm;
770
771 rc = power_supply_register(NULL, &battery_ps);
772 if (rc)
773 dev_err(&pdev->dev,
774 "Could not register mioa701 battery -> %d\n", rc);
775 return rc;
776}
777
778static int battery_remove(struct platform_device *pdev)
779{
780 battery_wm = NULL;
781 return 0;
782}
783
784static struct platform_driver mioa701_battery_driver = {
785 .driver = {
786 .name = "wm97xx-battery",
787 },
788 .probe = battery_probe,
789 .remove = battery_remove
790};
791
792static int __init mioa701_battery_init(void)
793{
794 int rc;
795
796 rc = platform_driver_register(&mioa701_battery_driver);
797 if (rc)
798 printk(KERN_ERR "Could not register mioa701 battery driver\n");
799 return rc;
800}
801
802#else
803static int __init mioa701_battery_init(void)
804{
805 return 0;
806}
807#endif
808
809/*
810 * Mio global
811 */
812
813/* Devices */
814#define MIO_PARENT_DEV(var, strname, tparent, pdata) \
815static struct platform_device var = { \
816 .name = strname, \
817 .id = -1, \
818 .dev = { \
819 .platform_data = pdata, \
820 .parent = tparent, \
821 }, \
822};
823#define MIO_SIMPLE_DEV(var, strname, pdata) \
824 MIO_PARENT_DEV(var, strname, NULL, pdata)
825
826MIO_SIMPLE_DEV(mioa701_gpio_keys, "gpio-keys", &mioa701_gpio_keys_data)
827MIO_PARENT_DEV(mioa701_backlight, "pwm-backlight", &pxa27x_device_pwm0.dev,
828 &mioa701_backlight_data);
829MIO_SIMPLE_DEV(mioa701_led, "leds-gpio", &gpio_led_info)
830MIO_SIMPLE_DEV(pxa2xx_pcm, "pxa2xx-pcm", NULL)
831MIO_SIMPLE_DEV(pxa2xx_ac97, "pxa2xx-ac97", NULL)
832MIO_PARENT_DEV(mio_wm9713_codec, "wm9713-codec", &pxa2xx_ac97.dev, NULL)
833MIO_SIMPLE_DEV(mioa701_sound, "mioa701-wm9713", NULL)
834MIO_SIMPLE_DEV(mioa701_board, "mioa701-board", NULL)
835
836static struct platform_device *devices[] __initdata = {
837 &mioa701_gpio_keys,
838 &mioa701_backlight,
839 &mioa701_led,
840 &pxa2xx_pcm,
841 &pxa2xx_ac97,
842 &mio_wm9713_codec,
843 &mioa701_sound,
844 &power_dev,
845 &strataflash,
846 &mioa701_board
847};
848
849static void mioa701_machine_exit(void);
850
851static void mioa701_poweroff(void)
852{
853 mioa701_machine_exit();
854 gpio_set_value(GPIO18_POWEROFF, 1);
855}
856
857static void mioa701_restart(char c)
858{
859 mioa701_machine_exit();
860 arm_machine_restart(c);
861}
862
863struct gpio_ress global_gpios[] = {
864 MIO_GPIO_OUT(GPIO9_CHARGE_nEN, 1, "Charger enable"),
865 MIO_GPIO_OUT(GPIO18_POWEROFF, 0, "Power Off"),
866 MIO_GPIO_OUT(GPIO87_LCD_POWER, 0, "LCD Power")
867};
868
869static void __init mioa701_machine_init(void)
870{
871 PSLR = 0xff100000; /* SYSDEL=125ms, PWRDEL=125ms, PSLR_SL_ROD=1 */
872 PCFR = PCFR_DC_EN | PCFR_GPR_EN | PCFR_OPDE;
873 RTTR = 32768 - 1; /* Reset crazy WinCE value */
874 UP2OCR = UP2OCR_HXOE;
875
876 pxa2xx_mfp_config(ARRAY_AND_SIZE(mioa701_pin_config));
877 mio_gpio_request(ARRAY_AND_SIZE(global_gpios));
878 bootstrap_init();
879 set_pxa_fb_info(&mioa701_pxafb_info);
880 pxa_set_mci_info(&mioa701_mci_info);
881 pxa_set_keypad_info(&mioa701_keypad_info);
882 udc_init();
883 pm_power_off = mioa701_poweroff;
884 arm_pm_restart = mioa701_restart;
885 platform_add_devices(devices, ARRAY_SIZE(devices));
886 gsm_init();
887 mioa701_battery_init();
888}
889
890static void mioa701_machine_exit(void)
891{
892 udc_exit();
893 bootstrap_exit();
894 gsm_exit();
895}
896
897MACHINE_START(MIOA701, "MIO A701")
898 .phys_io = 0x40000000,
899 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
900 .boot_params = 0xa0000100,
901 .map_io = &pxa_map_io,
902 .init_irq = &pxa27x_init_irq,
903 .init_machine = mioa701_machine_init,
904 .timer = &pxa_timer,
905MACHINE_END
diff --git a/arch/arm/mach-pxa/mioa701_bootresume.S b/arch/arm/mach-pxa/mioa701_bootresume.S
new file mode 100644
index 000000000000..a647693d9856
--- /dev/null
+++ b/arch/arm/mach-pxa/mioa701_bootresume.S
@@ -0,0 +1,36 @@
1/* Bootloader to resume MIO A701
2 *
3 * 2007-1-12 Robert Jarzmik
4 *
5 * This code is licenced under the GPLv2.
6*/
7
8#include <linux/linkage.h>
9#include <asm/assembler.h>
10
11/*
12 * Note: Yes, part of the following code is located into the .data section.
13 * This is to allow jumpaddr to be accessed with a relative load
14 * while we can't rely on any MMU translation. We could have put
15 * sleep_save_sp in the .text section as well, but some setups might
16 * insist on it to be truly read-only.
17 */
18 .data
19ENTRY(mioa701_bootstrap)
200:
21 b 1f
22ENTRY(mioa701_jumpaddr)
23 .word 0x40f00008 @ PSPR in no-MMU mode
241:
25 mov r0, #0xa0000000 @ Don't suppose memory access works
26 orr r0, r0, #0x00200000 @ even if it's supposed to
27 mov r1, #0
28 str r1, [r0] @ Early disable resume for next boot
29 ldr r0, mioa701_jumpaddr @ (Murphy's Law)
30 ldr r0, [r0]
31 mov pc, r0
322:
33
34ENTRY(mioa701_bootstrap_lg)
35 .data
36 .word 2b-0b
diff --git a/arch/arm/mach-pxa/mp900.c b/arch/arm/mach-pxa/mp900.c
new file mode 100644
index 000000000000..8a73814126b1
--- /dev/null
+++ b/arch/arm/mach-pxa/mp900.c
@@ -0,0 +1,100 @@
1/*
2 * linux/arch/arm/mach-pxa/mp900.c
3 *
4 * Support for the NEC MobilePro900/C platform
5 *
6 * Based on mach-pxa/gumstix.c
7 *
8 * 2007, 2008 Kristoffer Ericson <kristoffer.ericson@gmail.com>
9 * 2007, 2008 Michael Petchkovsky <mkpetch@internode.on.net>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/init.h>
17#include <linux/device.h>
18#include <linux/platform_device.h>
19#include <linux/types.h>
20#include <linux/usb/isp116x.h>
21
22#include <mach/hardware.h>
23#include <mach/pxa-regs.h>
24#include <asm/mach-types.h>
25#include <asm/mach/arch.h>
26#include "generic.h"
27
28static void isp116x_pfm_delay(struct device *dev, int delay)
29{
30
31 /* 400Mhz PXA2 = 2.5ns / instruction */
32
33 int cyc = delay / 10;
34
35 /* 4 Instructions = 4 x 2.5ns = 10ns */
36 __asm__ volatile ("0:\n"
37 "subs %0, %1, #1\n"
38 "bge 0b\n"
39 :"=r" (cyc)
40 :"0"(cyc)
41 );
42}
43
44static struct isp116x_platform_data isp116x_pfm_data = {
45 .remote_wakeup_enable = 1,
46 .delay = isp116x_pfm_delay,
47};
48
49static struct resource isp116x_pfm_resources[] = {
50 [0] = {
51 .start = 0x0d000000,
52 .end = 0x0d000000 + 1,
53 .flags = IORESOURCE_MEM,
54 },
55 [1] = {
56 .start = 0x0d000000 + 4,
57 .end = 0x0d000000 + 5,
58 .flags = IORESOURCE_MEM,
59 },
60 [2] = {
61 .start = 61,
62 .end = 61,
63 .flags = IORESOURCE_IRQ,
64 },
65};
66
67static struct platform_device mp900c_dummy_device = {
68 .name = "mp900c_dummy",
69 .id = -1,
70};
71
72static struct platform_device mp900c_usb = {
73 .name = "isp116x-hcd",
74 .num_resources = ARRAY_SIZE(isp116x_pfm_resources),
75 .resource = isp116x_pfm_resources,
76 .dev.platform_data = &isp116x_pfm_data,
77};
78
79static struct platform_device *devices[] __initdata = {
80 &mp900c_dummy_device,
81 &mp900c_usb,
82};
83
84static void __init mp900c_init(void)
85{
86 printk(KERN_INFO "MobilePro 900/C machine init\n");
87 platform_add_devices(devices, ARRAY_SIZE(devices));
88}
89
90/* Maintainer - Michael Petchkovsky <mkpetch@internode.on.net> */
91MACHINE_START(NEC_MP900, "MobilePro900/C")
92 .phys_io = 0x40000000,
93 .boot_params = 0xa0220100,
94 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
95 .timer = &pxa_timer,
96 .map_io = pxa_map_io,
97 .init_irq = pxa25x_init_irq,
98 .init_machine = mp900c_init,
99MACHINE_END
100
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c
index fe924a23debe..4447711c9fc6 100644
--- a/arch/arm/mach-pxa/palmtx.c
+++ b/arch/arm/mach-pxa/palmtx.c
@@ -25,6 +25,8 @@
25#include <linux/pda_power.h> 25#include <linux/pda_power.h>
26#include <linux/pwm_backlight.h> 26#include <linux/pwm_backlight.h>
27#include <linux/gpio.h> 27#include <linux/gpio.h>
28#include <linux/wm97xx_batt.h>
29#include <linux/power_supply.h>
28 30
29#include <asm/mach-types.h> 31#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 32#include <asm/mach/arch.h>
@@ -340,6 +342,23 @@ static struct platform_device power_supply = {
340}; 342};
341 343
342/****************************************************************************** 344/******************************************************************************
345 * WM97xx battery
346 ******************************************************************************/
347static struct wm97xx_batt_info wm97xx_batt_pdata = {
348 .batt_aux = WM97XX_AUX_ID3,
349 .temp_aux = WM97XX_AUX_ID2,
350 .charge_gpio = -1,
351 .max_voltage = PALMTX_BAT_MAX_VOLTAGE,
352 .min_voltage = PALMTX_BAT_MIN_VOLTAGE,
353 .batt_mult = 1000,
354 .batt_div = 414,
355 .temp_mult = 1,
356 .temp_div = 1,
357 .batt_tech = POWER_SUPPLY_TECHNOLOGY_LIPO,
358 .batt_name = "main-batt",
359};
360
361/******************************************************************************
343 * Framebuffer 362 * Framebuffer
344 ******************************************************************************/ 363 ******************************************************************************/
345static struct pxafb_mode_info palmtx_lcd_modes[] = { 364static struct pxafb_mode_info palmtx_lcd_modes[] = {
@@ -401,6 +420,7 @@ static void __init palmtx_init(void)
401 pxa_set_ac97_info(NULL); 420 pxa_set_ac97_info(NULL);
402 pxa_set_ficp_info(&palmtx_ficp_platform_data); 421 pxa_set_ficp_info(&palmtx_ficp_platform_data);
403 pxa_set_keypad_info(&palmtx_keypad_platform_data); 422 pxa_set_keypad_info(&palmtx_keypad_platform_data);
423 wm97xx_bat_set_pdata(&wm97xx_batt_pdata);
404 424
405 platform_add_devices(devices, ARRAY_SIZE(devices)); 425 platform_add_devices(devices, ARRAY_SIZE(devices));
406} 426}
diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c
new file mode 100644
index 000000000000..2f730da3bba8
--- /dev/null
+++ b/arch/arm/mach-pxa/palmz72.c
@@ -0,0 +1,554 @@
1/*
2 * Hardware definitions for Palm Zire72
3 *
4 * Authors:
5 * Vladimir "Farcaller" Pouzanov <farcaller@gmail.com>
6 * Sergey Lapin <slapin@ossfans.org>
7 * Alex Osborne <bobofdoom@gmail.com>
8 * Jan Herman <2hp@seznam.cz>
9 *
10 * Rewrite for mainline:
11 * Marek Vasut <marek.vasut@gmail.com>
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
17 * (find more info at www.hackndev.com)
18 *
19 */
20
21#include <linux/platform_device.h>
22#include <linux/sysdev.h>
23#include <linux/delay.h>
24#include <linux/irq.h>
25#include <linux/gpio_keys.h>
26#include <linux/input.h>
27#include <linux/pda_power.h>
28#include <linux/pwm_backlight.h>
29#include <linux/gpio.h>
30#include <linux/power_supply.h>
31
32#include <asm/mach-types.h>
33#include <asm/mach/arch.h>
34#include <asm/mach/map.h>
35
36#include <mach/audio.h>
37#include <mach/palmz72.h>
38#include <mach/mmc.h>
39#include <mach/pxafb.h>
40#include <mach/pxa-regs.h>
41#include <mach/pxa2xx-regs.h>
42#include <mach/mfp-pxa27x.h>
43#include <mach/irda.h>
44#include <mach/pxa27x_keypad.h>
45#include <mach/udc.h>
46#include <mach/pm.h>
47
48#include "generic.h"
49#include "devices.h"
50
51/******************************************************************************
52 * Pin configuration
53 ******************************************************************************/
54static unsigned long palmz72_pin_config[] __initdata = {
55 /* MMC */
56 GPIO32_MMC_CLK,
57 GPIO92_MMC_DAT_0,
58 GPIO109_MMC_DAT_1,
59 GPIO110_MMC_DAT_2,
60 GPIO111_MMC_DAT_3,
61 GPIO112_MMC_CMD,
62 GPIO14_GPIO, /* SD detect */
63 GPIO115_GPIO, /* SD RO */
64 GPIO98_GPIO, /* SD power */
65
66 /* AC97 */
67 GPIO28_AC97_BITCLK,
68 GPIO29_AC97_SDATA_IN_0,
69 GPIO30_AC97_SDATA_OUT,
70 GPIO31_AC97_SYNC,
71
72 /* IrDA */
73 GPIO49_GPIO, /* ir disable */
74 GPIO46_FICP_RXD,
75 GPIO47_FICP_TXD,
76
77 /* PWM */
78 GPIO16_PWM0_OUT,
79
80 /* USB */
81 GPIO15_GPIO, /* usb detect */
82 GPIO12_GPIO, /* usb pullup */
83 GPIO95_GPIO, /* usb power */
84
85 /* Matrix keypad */
86 GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
87 GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH,
88 GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH,
89 GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH,
90 GPIO103_KP_MKOUT_0,
91 GPIO104_KP_MKOUT_1,
92 GPIO105_KP_MKOUT_2,
93
94 /* LCD */
95 GPIO58_LCD_LDD_0,
96 GPIO59_LCD_LDD_1,
97 GPIO60_LCD_LDD_2,
98 GPIO61_LCD_LDD_3,
99 GPIO62_LCD_LDD_4,
100 GPIO63_LCD_LDD_5,
101 GPIO64_LCD_LDD_6,
102 GPIO65_LCD_LDD_7,
103 GPIO66_LCD_LDD_8,
104 GPIO67_LCD_LDD_9,
105 GPIO68_LCD_LDD_10,
106 GPIO69_LCD_LDD_11,
107 GPIO70_LCD_LDD_12,
108 GPIO71_LCD_LDD_13,
109 GPIO72_LCD_LDD_14,
110 GPIO73_LCD_LDD_15,
111 GPIO74_LCD_FCLK,
112 GPIO75_LCD_LCLK,
113 GPIO76_LCD_PCLK,
114 GPIO77_LCD_BIAS,
115 GPIO20_GPIO, /* bl power */
116 GPIO21_GPIO, /* LCD border switch */
117 GPIO22_GPIO, /* LCD border color */
118 GPIO96_GPIO, /* lcd power */
119
120 /* Misc. */
121 GPIO0_GPIO | WAKEUP_ON_LEVEL_HIGH, /* power detect */
122 GPIO88_GPIO, /* green led */
123 GPIO27_GPIO, /* WM9712 IRQ */
124};
125
126/******************************************************************************
127 * SD/MMC card controller
128 ******************************************************************************/
129static int palmz72_mci_init(struct device *dev,
130 irq_handler_t palmz72_detect_int, void *data)
131{
132 int err = 0;
133
134 /* Setup an interrupt for detecting card insert/remove events */
135 err = gpio_request(GPIO_NR_PALMZ72_SD_DETECT_N, "SD IRQ");
136 if (err)
137 goto err;
138 err = gpio_direction_input(GPIO_NR_PALMZ72_SD_DETECT_N);
139 if (err)
140 goto err2;
141 err = request_irq(gpio_to_irq(GPIO_NR_PALMZ72_SD_DETECT_N),
142 palmz72_detect_int, IRQF_DISABLED | IRQF_SAMPLE_RANDOM |
143 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
144 "SD/MMC card detect", data);
145 if (err) {
146 printk(KERN_ERR "%s: cannot request SD/MMC card detect IRQ\n",
147 __func__);
148 goto err2;
149 }
150
151 /* SD_POWER is not actually power, but it is more like chip
152 * select, i.e. it is inverted */
153
154 err = gpio_request(GPIO_NR_PALMZ72_SD_POWER_N, "SD_POWER");
155 if (err)
156 goto err3;
157 err = gpio_direction_output(GPIO_NR_PALMZ72_SD_POWER_N, 0);
158 if (err)
159 goto err4;
160 err = gpio_request(GPIO_NR_PALMZ72_SD_RO, "SD_RO");
161 if (err)
162 goto err4;
163 err = gpio_direction_input(GPIO_NR_PALMZ72_SD_RO);
164 if (err)
165 goto err5;
166
167 printk(KERN_DEBUG "%s: irq registered\n", __func__);
168
169 return 0;
170
171err5:
172 gpio_free(GPIO_NR_PALMZ72_SD_RO);
173err4:
174 gpio_free(GPIO_NR_PALMZ72_SD_POWER_N);
175err3:
176 free_irq(gpio_to_irq(GPIO_NR_PALMZ72_SD_DETECT_N), data);
177err2:
178 gpio_free(GPIO_NR_PALMZ72_SD_DETECT_N);
179err:
180 return err;
181}
182
183static void palmz72_mci_exit(struct device *dev, void *data)
184{
185 gpio_free(GPIO_NR_PALMZ72_SD_POWER_N);
186 free_irq(gpio_to_irq(GPIO_NR_PALMZ72_SD_DETECT_N), data);
187 gpio_free(GPIO_NR_PALMZ72_SD_DETECT_N);
188 gpio_free(GPIO_NR_PALMZ72_SD_RO);
189}
190
191static void palmz72_mci_power(struct device *dev, unsigned int vdd)
192{
193 struct pxamci_platform_data *p_d = dev->platform_data;
194 if (p_d->ocr_mask & (1 << vdd))
195 gpio_set_value(GPIO_NR_PALMZ72_SD_POWER_N, 0);
196 else
197 gpio_set_value(GPIO_NR_PALMZ72_SD_POWER_N, 1);
198}
199
200static int palmz72_mci_ro(struct device *dev)
201{
202 return gpio_get_value(GPIO_NR_PALMZ72_SD_RO);
203}
204
205static struct pxamci_platform_data palmz72_mci_platform_data = {
206 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
207 .setpower = palmz72_mci_power,
208 .get_ro = palmz72_mci_ro,
209 .init = palmz72_mci_init,
210 .exit = palmz72_mci_exit,
211};
212
213/******************************************************************************
214 * GPIO keyboard
215 ******************************************************************************/
216static unsigned int palmz72_matrix_keys[] = {
217 KEY(0, 0, KEY_POWER),
218 KEY(0, 1, KEY_F1),
219 KEY(0, 2, KEY_ENTER),
220
221 KEY(1, 0, KEY_F2),
222 KEY(1, 1, KEY_F3),
223 KEY(1, 2, KEY_F4),
224
225 KEY(2, 0, KEY_UP),
226 KEY(2, 2, KEY_DOWN),
227
228 KEY(3, 0, KEY_RIGHT),
229 KEY(3, 2, KEY_LEFT),
230};
231
232static struct pxa27x_keypad_platform_data palmz72_keypad_platform_data = {
233 .matrix_key_rows = 4,
234 .matrix_key_cols = 3,
235 .matrix_key_map = palmz72_matrix_keys,
236 .matrix_key_map_size = ARRAY_SIZE(palmz72_matrix_keys),
237
238 .debounce_interval = 30,
239};
240
241/******************************************************************************
242 * Backlight
243 ******************************************************************************/
244static int palmz72_backlight_init(struct device *dev)
245{
246 int ret;
247
248 ret = gpio_request(GPIO_NR_PALMZ72_BL_POWER, "BL POWER");
249 if (ret)
250 goto err;
251 ret = gpio_direction_output(GPIO_NR_PALMZ72_BL_POWER, 0);
252 if (ret)
253 goto err2;
254 ret = gpio_request(GPIO_NR_PALMZ72_LCD_POWER, "LCD POWER");
255 if (ret)
256 goto err2;
257 ret = gpio_direction_output(GPIO_NR_PALMZ72_LCD_POWER, 0);
258 if (ret)
259 goto err3;
260
261 return 0;
262err3:
263 gpio_free(GPIO_NR_PALMZ72_LCD_POWER);
264err2:
265 gpio_free(GPIO_NR_PALMZ72_BL_POWER);
266err:
267 return ret;
268}
269
270static int palmz72_backlight_notify(int brightness)
271{
272 gpio_set_value(GPIO_NR_PALMZ72_BL_POWER, brightness);
273 gpio_set_value(GPIO_NR_PALMZ72_LCD_POWER, brightness);
274 return brightness;
275}
276
277static void palmz72_backlight_exit(struct device *dev)
278{
279 gpio_free(GPIO_NR_PALMZ72_BL_POWER);
280 gpio_free(GPIO_NR_PALMZ72_LCD_POWER);
281}
282
283static struct platform_pwm_backlight_data palmz72_backlight_data = {
284 .pwm_id = 0,
285 .max_brightness = PALMZ72_MAX_INTENSITY,
286 .dft_brightness = PALMZ72_MAX_INTENSITY,
287 .pwm_period_ns = PALMZ72_PERIOD_NS,
288 .init = palmz72_backlight_init,
289 .notify = palmz72_backlight_notify,
290 .exit = palmz72_backlight_exit,
291};
292
293static struct platform_device palmz72_backlight = {
294 .name = "pwm-backlight",
295 .dev = {
296 .parent = &pxa27x_device_pwm0.dev,
297 .platform_data = &palmz72_backlight_data,
298 },
299};
300
301/******************************************************************************
302 * IrDA
303 ******************************************************************************/
304static int palmz72_irda_startup(struct device *dev)
305{
306 int err;
307 err = gpio_request(GPIO_NR_PALMZ72_IR_DISABLE, "IR DISABLE");
308 if (err)
309 goto err;
310 err = gpio_direction_output(GPIO_NR_PALMZ72_IR_DISABLE, 1);
311 if (err)
312 gpio_free(GPIO_NR_PALMZ72_IR_DISABLE);
313err:
314 return err;
315}
316
317static void palmz72_irda_shutdown(struct device *dev)
318{
319 gpio_free(GPIO_NR_PALMZ72_IR_DISABLE);
320}
321
322static void palmz72_irda_transceiver_mode(struct device *dev, int mode)
323{
324 gpio_set_value(GPIO_NR_PALMZ72_IR_DISABLE, mode & IR_OFF);
325 pxa2xx_transceiver_mode(dev, mode);
326}
327
328static struct pxaficp_platform_data palmz72_ficp_platform_data = {
329 .startup = palmz72_irda_startup,
330 .shutdown = palmz72_irda_shutdown,
331 .transceiver_cap = IR_SIRMODE | IR_OFF,
332 .transceiver_mode = palmz72_irda_transceiver_mode,
333};
334
335/******************************************************************************
336 * LEDs
337 ******************************************************************************/
338static struct gpio_led gpio_leds[] = {
339 {
340 .name = "palmz72:green:led",
341 .default_trigger = "none",
342 .gpio = GPIO_NR_PALMZ72_LED_GREEN,
343 },
344};
345
346static struct gpio_led_platform_data gpio_led_info = {
347 .leds = gpio_leds,
348 .num_leds = ARRAY_SIZE(gpio_leds),
349};
350
351static struct platform_device palmz72_leds = {
352 .name = "leds-gpio",
353 .id = -1,
354 .dev = {
355 .platform_data = &gpio_led_info,
356 }
357};
358
359/******************************************************************************
360 * Power supply
361 ******************************************************************************/
362static int power_supply_init(struct device *dev)
363{
364 int ret;
365
366 ret = gpio_request(GPIO_NR_PALMZ72_POWER_DETECT, "CABLE_STATE_AC");
367 if (ret)
368 goto err1;
369 ret = gpio_direction_input(GPIO_NR_PALMZ72_POWER_DETECT);
370 if (ret)
371 goto err2;
372
373 ret = gpio_request(GPIO_NR_PALMZ72_USB_DETECT_N, "CABLE_STATE_USB");
374 if (ret)
375 goto err2;
376 ret = gpio_direction_input(GPIO_NR_PALMZ72_USB_DETECT_N);
377 if (ret)
378 goto err3;
379
380 return 0;
381err3:
382 gpio_free(GPIO_NR_PALMZ72_USB_DETECT_N);
383err2:
384 gpio_free(GPIO_NR_PALMZ72_POWER_DETECT);
385err1:
386 return ret;
387}
388
389static int palmz72_is_ac_online(void)
390{
391 return gpio_get_value(GPIO_NR_PALMZ72_POWER_DETECT);
392}
393
394static int palmz72_is_usb_online(void)
395{
396 return !gpio_get_value(GPIO_NR_PALMZ72_USB_DETECT_N);
397}
398
399static void power_supply_exit(struct device *dev)
400{
401 gpio_free(GPIO_NR_PALMZ72_USB_DETECT_N);
402 gpio_free(GPIO_NR_PALMZ72_POWER_DETECT);
403}
404
405static char *palmz72_supplicants[] = {
406 "main-battery",
407};
408
409static struct pda_power_pdata power_supply_info = {
410 .init = power_supply_init,
411 .is_ac_online = palmz72_is_ac_online,
412 .is_usb_online = palmz72_is_usb_online,
413 .exit = power_supply_exit,
414 .supplied_to = palmz72_supplicants,
415 .num_supplicants = ARRAY_SIZE(palmz72_supplicants),
416};
417
418static struct platform_device power_supply = {
419 .name = "pda-power",
420 .id = -1,
421 .dev = {
422 .platform_data = &power_supply_info,
423 },
424};
425
426/******************************************************************************
427 * Framebuffer
428 ******************************************************************************/
429static struct pxafb_mode_info palmz72_lcd_modes[] = {
430{
431 .pixclock = 115384,
432 .xres = 320,
433 .yres = 320,
434 .bpp = 16,
435
436 .left_margin = 27,
437 .right_margin = 7,
438 .upper_margin = 7,
439 .lower_margin = 8,
440
441 .hsync_len = 6,
442 .vsync_len = 1,
443},
444};
445
446static struct pxafb_mach_info palmz72_lcd_screen = {
447 .modes = palmz72_lcd_modes,
448 .num_modes = ARRAY_SIZE(palmz72_lcd_modes),
449 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
450};
451
452#ifdef CONFIG_PM
453
454/* We have some black magic here
455 * PalmOS ROM on recover expects special struct physical address
456 * to be transferred via PSPR. Using this struct PalmOS restores
457 * its state after sleep. As for Linux, we need to setup it the
458 * same way. More than that, PalmOS ROM changes some values in memory.
459 * For now only one location is found, which needs special treatment.
460 * Thanks to Alex Osborne, Andrzej Zaborowski, and lots of other people
461 * for reading backtraces for me :)
462 */
463
464#define PALMZ72_SAVE_DWORD ((unsigned long *)0xc0000050)
465
466static struct palmz72_resume_info palmz72_resume_info = {
467 .magic0 = 0xb4e6,
468 .magic1 = 1,
469
470 /* reset state, MMU off etc */
471 .arm_control = 0,
472 .aux_control = 0,
473 .ttb = 0,
474 .domain_access = 0,
475 .process_id = 0,
476};
477
478static unsigned long store_ptr;
479
480/* sys_device for Palm Zire 72 PM */
481
482static int palmz72_pm_suspend(struct sys_device *dev, pm_message_t msg)
483{
484 /* setup the resume_info struct for the original bootloader */
485 palmz72_resume_info.resume_addr = (u32) pxa_cpu_resume;
486
487 /* Storing memory touched by ROM */
488 store_ptr = *PALMZ72_SAVE_DWORD;
489
490 /* Setting PSPR to a proper value */
491 PSPR = virt_to_phys(&palmz72_resume_info);
492
493 return 0;
494}
495
496static int palmz72_pm_resume(struct sys_device *dev)
497{
498 *PALMZ72_SAVE_DWORD = store_ptr;
499 return 0;
500}
501
502static struct sysdev_class palmz72_pm_sysclass = {
503 .name = "palmz72_pm",
504 .suspend = palmz72_pm_suspend,
505 .resume = palmz72_pm_resume,
506};
507
508static struct sys_device palmz72_pm_device = {
509 .cls = &palmz72_pm_sysclass,
510};
511
512static int __init palmz72_pm_init(void)
513{
514 int ret = -ENODEV;
515 if (machine_is_palmz72()) {
516 ret = sysdev_class_register(&palmz72_pm_sysclass);
517 if (ret == 0)
518 ret = sysdev_register(&palmz72_pm_device);
519 }
520 return ret;
521}
522
523device_initcall(palmz72_pm_init);
524#endif
525
526/******************************************************************************
527 * Machine init
528 ******************************************************************************/
529static struct platform_device *devices[] __initdata = {
530 &palmz72_backlight,
531 &palmz72_leds,
532 &power_supply,
533};
534
535static void __init palmz72_init(void)
536{
537 pxa2xx_mfp_config(ARRAY_AND_SIZE(palmz72_pin_config));
538 set_pxa_fb_info(&palmz72_lcd_screen);
539 pxa_set_mci_info(&palmz72_mci_platform_data);
540 pxa_set_ac97_info(NULL);
541 pxa_set_ficp_info(&palmz72_ficp_platform_data);
542 pxa_set_keypad_info(&palmz72_keypad_platform_data);
543 platform_add_devices(devices, ARRAY_SIZE(devices));
544}
545
546MACHINE_START(PALMZ72, "Palm Zire72")
547 .phys_io = 0x40000000,
548 .io_pg_offst = io_p2v(0x40000000),
549 .boot_params = 0xa0000100,
550 .map_io = pxa_map_io,
551 .init_irq = pxa27x_init_irq,
552 .timer = &pxa_timer,
553 .init_machine = palmz72_init
554MACHINE_END
diff --git a/arch/arm/mach-pxa/pcm027.c b/arch/arm/mach-pxa/pcm027.c
index 730b9f6ede1d..36135a02fdc7 100644
--- a/arch/arm/mach-pxa/pcm027.c
+++ b/arch/arm/mach-pxa/pcm027.c
@@ -31,7 +31,7 @@
31#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
32#include <mach/hardware.h> 32#include <mach/hardware.h>
33#include <mach/pxa-regs.h> 33#include <mach/pxa-regs.h>
34#include <mach/pxa2xx-gpio.h> 34#include <mach/mfp-pxa27x.h>
35#include <mach/pxa2xx-regs.h> 35#include <mach/pxa2xx-regs.h>
36#include <mach/pxa2xx_spi.h> 36#include <mach/pxa2xx_spi.h>
37#include <mach/pcm027.h> 37#include <mach/pcm027.h>
@@ -86,6 +86,28 @@
86 * *) CPU internal use only 86 * *) CPU internal use only
87 */ 87 */
88 88
89static unsigned long pcm027_pin_config[] __initdata = {
90 /* Chip Selects */
91 GPIO20_nSDCS_2,
92 GPIO21_nSDCS_3,
93 GPIO15_nCS_1,
94 GPIO78_nCS_2,
95 GPIO80_nCS_4,
96 GPIO33_nCS_5, /* Ethernet */
97
98 /* I2C */
99 GPIO117_I2C_SCL,
100 GPIO118_I2C_SDA,
101
102 /* GPIO */
103 GPIO52_GPIO, /* IRQ from network controller */
104#ifdef CONFIG_LEDS_GPIO
105 GPIO90_GPIO, /* PCM027_LED_CPU */
106 GPIO91_GPIO, /* PCM027_LED_HEART_BEAT */
107#endif
108 GPIO114_GPIO, /* IRQ from CAN controller */
109};
110
89/* 111/*
90 * SMC91x network controller specific stuff 112 * SMC91x network controller specific stuff
91 */ 113 */
@@ -206,13 +228,9 @@ static void __init pcm027_init(void)
206 */ 228 */
207 ARB_CNTRL = ARB_CORE_PARK | 0x234; 229 ARB_CNTRL = ARB_CORE_PARK | 0x234;
208 230
209 platform_add_devices(devices, ARRAY_SIZE(devices)); 231 pxa2xx_mfp_config(pcm027_pin_config, ARRAY_SIZE(pcm027_pin_config));
210 232
211 /* LEDs (on demand only) */ 233 platform_add_devices(devices, ARRAY_SIZE(devices));
212#ifdef CONFIG_LEDS_GPIO
213 pxa_gpio_mode(PCM027_LED_CPU | GPIO_OUT);
214 pxa_gpio_mode(PCM027_LED_HEARD_BEAT | GPIO_OUT);
215#endif /* CONFIG_LEDS_GPIO */
216 234
217 /* at last call the baseboard to initialize itself */ 235 /* at last call the baseboard to initialize itself */
218#ifdef CONFIG_MACH_PCM990_BASEBOARD 236#ifdef CONFIG_MACH_PCM990_BASEBOARD
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
index 420c9b3813f6..f601425f1b1e 100644
--- a/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -262,8 +262,7 @@ static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc)
262 GPIO_bit(PCM990_CTRL_INT_IRQ_GPIO); 262 GPIO_bit(PCM990_CTRL_INT_IRQ_GPIO);
263 if (likely(pending)) { 263 if (likely(pending)) {
264 irq = PCM027_IRQ(0) + __ffs(pending); 264 irq = PCM027_IRQ(0) + __ffs(pending);
265 desc = irq_desc + irq; 265 generic_handle_irq(irq);
266 desc_handle_irq(irq, desc);
267 } 266 }
268 pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled; 267 pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled;
269 } while (pending); 268 } while (pending);
@@ -328,36 +327,10 @@ static struct pxamci_platform_data pcm990_mci_platform_data = {
328 .exit = pcm990_mci_exit, 327 .exit = pcm990_mci_exit,
329}; 328};
330 329
331/*
332 * init OHCI hardware to work with
333 *
334 * Note: Only USB port 1 (host only) is connected
335 *
336 * GPIO88 (USBHPWR#1): overcurrent in, overcurrent when low
337 * GPIO89 (USBHPEN#1): power-on out, on when low
338 */
339static int pcm990_ohci_init(struct device *dev)
340{
341 /*
342 * disable USB port 2 and 3
343 * power sense is active low
344 */
345 UHCHR = ((UHCHR) | UHCHR_PCPL | UHCHR_PSPL | UHCHR_SSEP2 |
346 UHCHR_SSEP3) & ~(UHCHR_SSEP1 | UHCHR_SSE);
347 /*
348 * wait 10ms after Power on
349 * overcurrent per port
350 * power switch per port
351 */
352 UHCRHDA = (5<<24) | (1<<11) | (1<<8); /* FIXME: Required? */
353
354 return 0;
355}
356
357static struct pxaohci_platform_data pcm990_ohci_platform_data = { 330static struct pxaohci_platform_data pcm990_ohci_platform_data = {
358 .port_mode = PMM_PERPORT_MODE, 331 .port_mode = PMM_PERPORT_MODE,
359 .init = pcm990_ohci_init, 332 .flags = ENABLE_PORT1 | POWER_CONTROL_LOW | POWER_SENSE_LOW,
360 .exit = NULL, 333 .power_on_delay = 10,
361}; 334};
362 335
363/* 336/*
diff --git a/arch/arm/mach-pxa/pm.c b/arch/arm/mach-pxa/pm.c
index 1b539e675579..164eb0bb6321 100644
--- a/arch/arm/mach-pxa/pm.c
+++ b/arch/arm/mach-pxa/pm.c
@@ -86,9 +86,27 @@ static int pxa_pm_valid(suspend_state_t state)
86 return -EINVAL; 86 return -EINVAL;
87} 87}
88 88
89static int pxa_pm_prepare(void)
90{
91 int ret = 0;
92
93 if (pxa_cpu_pm_fns && pxa_cpu_pm_fns->prepare)
94 ret = pxa_cpu_pm_fns->prepare();
95
96 return ret;
97}
98
99static void pxa_pm_finish(void)
100{
101 if (pxa_cpu_pm_fns && pxa_cpu_pm_fns->finish)
102 pxa_cpu_pm_fns->finish();
103}
104
89static struct platform_suspend_ops pxa_pm_ops = { 105static struct platform_suspend_ops pxa_pm_ops = {
90 .valid = pxa_pm_valid, 106 .valid = pxa_pm_valid,
91 .enter = pxa_pm_enter, 107 .enter = pxa_pm_enter,
108 .prepare = pxa_pm_prepare,
109 .finish = pxa_pm_finish,
92}; 110};
93 111
94static int __init pxa_pm_init(void) 112static int __init pxa_pm_init(void)
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index 3f5f484549b3..2e3bd8b1523b 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -20,6 +20,9 @@
20#include <linux/fb.h> 20#include <linux/fb.h>
21#include <linux/pm.h> 21#include <linux/pm.h>
22#include <linux/delay.h> 22#include <linux/delay.h>
23#include <linux/gpio.h>
24#include <linux/spi/spi.h>
25#include <linux/spi/ads7846.h>
23 26
24#include <mach/hardware.h> 27#include <mach/hardware.h>
25#include <asm/mach-types.h> 28#include <asm/mach-types.h>
@@ -33,7 +36,7 @@
33 36
34#include <mach/pxa-regs.h> 37#include <mach/pxa-regs.h>
35#include <mach/pxa2xx-regs.h> 38#include <mach/pxa2xx-regs.h>
36#include <mach/pxa2xx-gpio.h> 39#include <mach/mfp-pxa25x.h>
37#include <mach/mmc.h> 40#include <mach/mmc.h>
38#include <mach/udc.h> 41#include <mach/udc.h>
39#include <mach/i2c.h> 42#include <mach/i2c.h>
@@ -42,6 +45,7 @@
42#include <mach/pxafb.h> 45#include <mach/pxafb.h>
43#include <mach/sharpsl.h> 46#include <mach/sharpsl.h>
44#include <mach/ssp.h> 47#include <mach/ssp.h>
48#include <mach/pxa2xx_spi.h>
45 49
46#include <asm/hardware/scoop.h> 50#include <asm/hardware/scoop.h>
47#include <asm/hardware/locomo.h> 51#include <asm/hardware/locomo.h>
@@ -51,6 +55,88 @@
51#include "devices.h" 55#include "devices.h"
52#include "sharpsl.h" 56#include "sharpsl.h"
53 57
58static unsigned long poodle_pin_config[] __initdata = {
59 /* I/O */
60 GPIO79_nCS_3,
61 GPIO80_nCS_4,
62 GPIO18_RDY,
63
64 /* Clock */
65 GPIO12_32KHz,
66
67 /* SSP1 */
68 GPIO23_SSP1_SCLK,
69 GPIO25_SSP1_TXD,
70 GPIO26_SSP1_RXD,
71 GPIO24_GPIO, /* POODLE_GPIO_TP_CS - SFRM as chip select */
72
73 /* I2S */
74 GPIO28_I2S_BITCLK_OUT,
75 GPIO29_I2S_SDATA_IN,
76 GPIO30_I2S_SDATA_OUT,
77 GPIO31_I2S_SYNC,
78 GPIO32_I2S_SYSCLK,
79
80 /* Infra-Red */
81 GPIO47_FICP_TXD,
82 GPIO46_FICP_RXD,
83
84 /* FFUART */
85 GPIO40_FFUART_DTR,
86 GPIO41_FFUART_RTS,
87 GPIO39_FFUART_TXD,
88 GPIO37_FFUART_DSR,
89 GPIO34_FFUART_RXD,
90 GPIO35_FFUART_CTS,
91
92 /* LCD */
93 GPIO58_LCD_LDD_0,
94 GPIO59_LCD_LDD_1,
95 GPIO60_LCD_LDD_2,
96 GPIO61_LCD_LDD_3,
97 GPIO62_LCD_LDD_4,
98 GPIO63_LCD_LDD_5,
99 GPIO64_LCD_LDD_6,
100 GPIO65_LCD_LDD_7,
101 GPIO66_LCD_LDD_8,
102 GPIO67_LCD_LDD_9,
103 GPIO68_LCD_LDD_10,
104 GPIO69_LCD_LDD_11,
105 GPIO70_LCD_LDD_12,
106 GPIO71_LCD_LDD_13,
107 GPIO72_LCD_LDD_14,
108 GPIO73_LCD_LDD_15,
109 GPIO74_LCD_FCLK,
110 GPIO75_LCD_LCLK,
111 GPIO76_LCD_PCLK,
112 GPIO77_LCD_BIAS,
113
114 /* PC Card */
115 GPIO48_nPOE,
116 GPIO49_nPWE,
117 GPIO50_nPIOR,
118 GPIO51_nPIOW,
119 GPIO52_nPCE_1,
120 GPIO53_nPCE_2,
121 GPIO54_nPSKTSEL,
122 GPIO55_nPREG,
123 GPIO56_nPWAIT,
124 GPIO57_nIOIS16,
125
126 /* MMC */
127 GPIO6_MMC_CLK,
128 GPIO8_MMC_CS0,
129
130 /* GPIO */
131 GPIO9_GPIO, /* POODLE_GPIO_nSD_DETECT */
132 GPIO7_GPIO, /* POODLE_GPIO_nSD_WP */
133 GPIO3_GPIO, /* POODLE_GPIO_SD_PWR */
134 GPIO33_GPIO, /* POODLE_GPIO_SD_PWR1 */
135
136 GPIO20_GPIO, /* POODLE_GPIO_USB_PULLUP */
137 GPIO22_GPIO, /* POODLE_GPIO_IR_ON */
138};
139
54static struct resource poodle_scoop_resources[] = { 140static struct resource poodle_scoop_resources[] = {
55 [0] = { 141 [0] = {
56 .start = 0x10800000, 142 .start = 0x10800000,
@@ -62,6 +148,7 @@ static struct resource poodle_scoop_resources[] = {
62static struct scoop_config poodle_scoop_setup = { 148static struct scoop_config poodle_scoop_setup = {
63 .io_dir = POODLE_SCOOP_IO_DIR, 149 .io_dir = POODLE_SCOOP_IO_DIR,
64 .io_out = POODLE_SCOOP_IO_OUT, 150 .io_out = POODLE_SCOOP_IO_OUT,
151 .gpio_base = POODLE_SCOOP_GPIO_BASE,
65}; 152};
66 153
67struct platform_device poodle_scoop_device = { 154struct platform_device poodle_scoop_device = {
@@ -74,27 +161,6 @@ struct platform_device poodle_scoop_device = {
74 .resource = poodle_scoop_resources, 161 .resource = poodle_scoop_resources,
75}; 162};
76 163
77static void poodle_pcmcia_init(void)
78{
79 /* Setup default state of GPIO outputs
80 before we enable them as outputs. */
81 GPSR(GPIO48_nPOE) = GPIO_bit(GPIO48_nPOE) |
82 GPIO_bit(GPIO49_nPWE) | GPIO_bit(GPIO50_nPIOR) |
83 GPIO_bit(GPIO51_nPIOW) | GPIO_bit(GPIO52_nPCE_1) |
84 GPIO_bit(GPIO53_nPCE_2);
85
86 pxa_gpio_mode(GPIO48_nPOE_MD);
87 pxa_gpio_mode(GPIO49_nPWE_MD);
88 pxa_gpio_mode(GPIO50_nPIOR_MD);
89 pxa_gpio_mode(GPIO51_nPIOW_MD);
90 pxa_gpio_mode(GPIO55_nPREG_MD);
91 pxa_gpio_mode(GPIO56_nPWAIT_MD);
92 pxa_gpio_mode(GPIO57_nIOIS16_MD);
93 pxa_gpio_mode(GPIO52_nPCE_1_MD);
94 pxa_gpio_mode(GPIO53_nPCE_2_MD);
95 pxa_gpio_mode(GPIO54_pSKTSEL_MD);
96}
97
98static struct scoop_pcmcia_dev poodle_pcmcia_scoop[] = { 164static struct scoop_pcmcia_dev poodle_pcmcia_scoop[] = {
99{ 165{
100 .dev = &poodle_scoop_device.dev, 166 .dev = &poodle_scoop_device.dev,
@@ -107,7 +173,6 @@ static struct scoop_pcmcia_dev poodle_pcmcia_scoop[] = {
107static struct scoop_pcmcia_config poodle_pcmcia_config = { 173static struct scoop_pcmcia_config poodle_pcmcia_config = {
108 .devs = &poodle_pcmcia_scoop[0], 174 .devs = &poodle_pcmcia_scoop[0],
109 .num_devs = 1, 175 .num_devs = 1,
110 .pcmcia_init = poodle_pcmcia_init,
111}; 176};
112 177
113EXPORT_SYMBOL(poodle_scoop_device); 178EXPORT_SYMBOL(poodle_scoop_device);
@@ -136,62 +201,55 @@ struct platform_device poodle_locomo_device = {
136 201
137EXPORT_SYMBOL(poodle_locomo_device); 202EXPORT_SYMBOL(poodle_locomo_device);
138 203
139/* 204#if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE)
140 * Poodle SSP Device 205static struct pxa2xx_spi_master poodle_spi_info = {
141 */ 206 .num_chipselect = 1,
142
143struct platform_device poodle_ssp_device = {
144 .name = "corgi-ssp",
145 .id = -1,
146};
147
148struct corgissp_machinfo poodle_ssp_machinfo = {
149 .port = 1,
150 .cs_lcdcon = -1,
151 .cs_ads7846 = -1,
152 .cs_max1111 = -1,
153 .clk_lcdcon = 2,
154 .clk_ads7846 = 36,
155 .clk_max1111 = 2,
156}; 207};
157 208
158 209static struct ads7846_platform_data poodle_ads7846_info = {
159/* 210 .model = 7846,
160 * Poodle Touch Screen Device 211 .vref_delay_usecs = 100,
161 */ 212 .x_plate_ohms = 419,
162static struct resource poodlets_resources[] = { 213 .y_plate_ohms = 486,
163 [0] = { 214 .gpio_pendown = POODLE_GPIO_TP_INT,
164 .start = POODLE_IRQ_GPIO_TP_INT,
165 .end = POODLE_IRQ_GPIO_TP_INT,
166 .flags = IORESOURCE_IRQ,
167 },
168}; 215};
169 216
170static unsigned long poodle_get_hsync_invperiod(void) 217static void ads7846_cs(u32 command)
171{ 218{
172 return 0; 219 gpio_set_value(POODLE_GPIO_TP_CS, !(command == PXA2XX_CS_ASSERT));
173} 220}
174 221
175static void poodle_null_hsync(void) 222static struct pxa2xx_spi_chip poodle_ads7846_chip = {
176{ 223 .cs_control = ads7846_cs,
177}
178
179static struct corgits_machinfo poodle_ts_machinfo = {
180 .get_hsync_invperiod = poodle_get_hsync_invperiod,
181 .put_hsync = poodle_null_hsync,
182 .wait_hsync = poodle_null_hsync,
183}; 224};
184 225
185static struct platform_device poodle_ts_device = { 226static struct spi_board_info poodle_spi_devices[] = {
186 .name = "corgi-ts", 227 {
187 .dev = { 228 .modalias = "ads7846",
188 .platform_data = &poodle_ts_machinfo, 229 .max_speed_hz = 10000,
230 .bus_num = 1,
231 .platform_data = &poodle_ads7846_info,
232 .controller_data= &poodle_ads7846_chip,
233 .irq = gpio_to_irq(POODLE_GPIO_TP_INT),
189 }, 234 },
190 .id = -1,
191 .num_resources = ARRAY_SIZE(poodlets_resources),
192 .resource = poodlets_resources,
193}; 235};
194 236
237static void __init poodle_init_spi(void)
238{
239 int err;
240
241 err = gpio_request(POODLE_GPIO_TP_CS, "ADS7846_CS");
242 if (err)
243 return;
244
245 gpio_direction_output(POODLE_GPIO_TP_CS, 1);
246
247 pxa2xx_set_spi_info(1, &poodle_spi_info);
248 spi_register_board_info(ARRAY_AND_SIZE(poodle_spi_devices));
249}
250#else
251static inline void poodle_init_spi(void) {}
252#endif
195 253
196/* 254/*
197 * MMC/SD Device 255 * MMC/SD Device
@@ -205,22 +263,50 @@ static int poodle_mci_init(struct device *dev, irq_handler_t poodle_detect_int,
205{ 263{
206 int err; 264 int err;
207 265
208 /* setup GPIO for PXA25x MMC controller */ 266 err = gpio_request(POODLE_GPIO_nSD_DETECT, "nSD_DETECT");
209 pxa_gpio_mode(GPIO6_MMCCLK_MD); 267 if (err)
210 pxa_gpio_mode(GPIO8_MMCCS0_MD); 268 goto err_out;
211 pxa_gpio_mode(POODLE_GPIO_nSD_DETECT | GPIO_IN); 269
212 pxa_gpio_mode(POODLE_GPIO_nSD_WP | GPIO_IN); 270 err = gpio_request(POODLE_GPIO_nSD_WP, "nSD_WP");
213 pxa_gpio_mode(POODLE_GPIO_SD_PWR | GPIO_OUT); 271 if (err)
214 pxa_gpio_mode(POODLE_GPIO_SD_PWR1 | GPIO_OUT); 272 goto err_free_1;
273
274 err = gpio_request(POODLE_GPIO_SD_PWR, "SD_PWR");
275 if (err)
276 goto err_free_2;
277
278 err = gpio_request(POODLE_GPIO_SD_PWR1, "SD_PWR1");
279 if (err)
280 goto err_free_3;
281
282 gpio_direction_input(POODLE_GPIO_nSD_DETECT);
283 gpio_direction_input(POODLE_GPIO_nSD_WP);
284
285 gpio_direction_output(POODLE_GPIO_SD_PWR, 0);
286 gpio_direction_output(POODLE_GPIO_SD_PWR1, 0);
215 287
216 poodle_mci_platform_data.detect_delay = msecs_to_jiffies(250); 288 poodle_mci_platform_data.detect_delay = msecs_to_jiffies(250);
217 289
218 err = request_irq(POODLE_IRQ_GPIO_nSD_DETECT, poodle_detect_int, 290 err = request_irq(POODLE_IRQ_GPIO_nSD_DETECT, poodle_detect_int,
219 IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, 291 IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
220 "MMC card detect", data); 292 "MMC card detect", data);
221 if (err) 293 if (err) {
222 printk(KERN_ERR "poodle_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); 294 pr_err("%s: MMC/SD: can't request MMC card detect IRQ\n",
295 __func__);
296 goto err_free_4;
297 }
298
299 return 0;
223 300
301err_free_4:
302 gpio_free(POODLE_GPIO_SD_PWR1);
303err_free_3:
304 gpio_free(POODLE_GPIO_SD_PWR);
305err_free_2:
306 gpio_free(POODLE_GPIO_nSD_WP);
307err_free_1:
308 gpio_free(POODLE_GPIO_nSD_DETECT);
309err_out:
224 return err; 310 return err;
225} 311}
226 312
@@ -228,18 +314,19 @@ static void poodle_mci_setpower(struct device *dev, unsigned int vdd)
228{ 314{
229 struct pxamci_platform_data* p_d = dev->platform_data; 315 struct pxamci_platform_data* p_d = dev->platform_data;
230 316
231 if (( 1 << vdd) & p_d->ocr_mask) { 317 if ((1 << vdd) & p_d->ocr_mask) {
232 GPSR(POODLE_GPIO_SD_PWR) = GPIO_bit(POODLE_GPIO_SD_PWR); 318 gpio_set_value(POODLE_GPIO_SD_PWR, 1);
233 mdelay(2); 319 mdelay(2);
234 GPSR(POODLE_GPIO_SD_PWR1) = GPIO_bit(POODLE_GPIO_SD_PWR1); 320 gpio_set_value(POODLE_GPIO_SD_PWR1, 1);
235 } else { 321 } else {
236 GPCR(POODLE_GPIO_SD_PWR1) = GPIO_bit(POODLE_GPIO_SD_PWR1); 322 gpio_set_value(POODLE_GPIO_SD_PWR1, 0);
237 GPCR(POODLE_GPIO_SD_PWR) = GPIO_bit(POODLE_GPIO_SD_PWR); 323 gpio_set_value(POODLE_GPIO_SD_PWR, 0);
238 } 324 }
239} 325}
240 326
241static int poodle_mci_get_ro(struct device *dev) 327static int poodle_mci_get_ro(struct device *dev)
242{ 328{
329 return !!gpio_get_value(POODLE_GPIO_nSD_WP);
243 return GPLR(POODLE_GPIO_nSD_WP) & GPIO_bit(POODLE_GPIO_nSD_WP); 330 return GPLR(POODLE_GPIO_nSD_WP) & GPIO_bit(POODLE_GPIO_nSD_WP);
244} 331}
245 332
@@ -247,6 +334,10 @@ static int poodle_mci_get_ro(struct device *dev)
247static void poodle_mci_exit(struct device *dev, void *data) 334static void poodle_mci_exit(struct device *dev, void *data)
248{ 335{
249 free_irq(POODLE_IRQ_GPIO_nSD_DETECT, data); 336 free_irq(POODLE_IRQ_GPIO_nSD_DETECT, data);
337 gpio_free(POODLE_GPIO_SD_PWR1);
338 gpio_free(POODLE_GPIO_SD_PWR);
339 gpio_free(POODLE_GPIO_nSD_WP);
340 gpio_free(POODLE_GPIO_nSD_DETECT);
250} 341}
251 342
252static struct pxamci_platform_data poodle_mci_platform_data = { 343static struct pxamci_platform_data poodle_mci_platform_data = {
@@ -263,38 +354,41 @@ static struct pxamci_platform_data poodle_mci_platform_data = {
263 */ 354 */
264static void poodle_irda_transceiver_mode(struct device *dev, int mode) 355static void poodle_irda_transceiver_mode(struct device *dev, int mode)
265{ 356{
266 if (mode & IR_OFF) { 357 gpio_set_value(POODLE_GPIO_IR_ON, mode & IR_OFF);
267 GPSR(POODLE_GPIO_IR_ON) = GPIO_bit(POODLE_GPIO_IR_ON);
268 } else {
269 GPCR(POODLE_GPIO_IR_ON) = GPIO_bit(POODLE_GPIO_IR_ON);
270 }
271 pxa2xx_transceiver_mode(dev, mode); 358 pxa2xx_transceiver_mode(dev, mode);
272} 359}
273 360
361static int poodle_irda_startup(struct device *dev)
362{
363 int err;
364
365 err = gpio_request(POODLE_GPIO_IR_ON, "IR_ON");
366 if (err)
367 return err;
368
369 gpio_direction_output(POODLE_GPIO_IR_ON, 1);
370 return 0;
371}
372
373static void poodle_irda_shutdown(struct device *dev)
374{
375 gpio_free(POODLE_GPIO_IR_ON);
376}
377
274static struct pxaficp_platform_data poodle_ficp_platform_data = { 378static struct pxaficp_platform_data poodle_ficp_platform_data = {
275 .transceiver_cap = IR_SIRMODE | IR_OFF, 379 .transceiver_cap = IR_SIRMODE | IR_OFF,
276 .transceiver_mode = poodle_irda_transceiver_mode, 380 .transceiver_mode = poodle_irda_transceiver_mode,
381 .startup = poodle_irda_startup,
382 .shutdown = poodle_irda_shutdown,
277}; 383};
278 384
279 385
280/* 386/*
281 * USB Device Controller 387 * USB Device Controller
282 */ 388 */
283static void poodle_udc_command(int cmd)
284{
285 switch(cmd) {
286 case PXA2XX_UDC_CMD_CONNECT:
287 GPSR(POODLE_GPIO_USB_PULLUP) = GPIO_bit(POODLE_GPIO_USB_PULLUP);
288 break;
289 case PXA2XX_UDC_CMD_DISCONNECT:
290 GPCR(POODLE_GPIO_USB_PULLUP) = GPIO_bit(POODLE_GPIO_USB_PULLUP);
291 break;
292 }
293}
294
295static struct pxa2xx_udc_mach_info udc_info __initdata = { 389static struct pxa2xx_udc_mach_info udc_info __initdata = {
296 /* no connect GPIO; poodle can't tell connection status */ 390 /* no connect GPIO; poodle can't tell connection status */
297 .udc_command = poodle_udc_command, 391 .gpio_pullup = POODLE_GPIO_USB_PULLUP,
298}; 392};
299 393
300 394
@@ -316,15 +410,12 @@ static struct pxafb_mode_info poodle_fb_mode = {
316static struct pxafb_mach_info poodle_fb_info = { 410static struct pxafb_mach_info poodle_fb_info = {
317 .modes = &poodle_fb_mode, 411 .modes = &poodle_fb_mode,
318 .num_modes = 1, 412 .num_modes = 1,
319 .lccr0 = LCCR0_Act | LCCR0_Sngl | LCCR0_Color, 413 .lcd_conn = LCD_COLOR_TFT_16BPP,
320 .lccr3 = 0,
321}; 414};
322 415
323static struct platform_device *devices[] __initdata = { 416static struct platform_device *devices[] __initdata = {
324 &poodle_locomo_device, 417 &poodle_locomo_device,
325 &poodle_scoop_device, 418 &poodle_scoop_device,
326 &poodle_ssp_device,
327 &poodle_ts_device,
328}; 419};
329 420
330static void poodle_poweroff(void) 421static void poodle_poweroff(void)
@@ -344,59 +435,23 @@ static void __init poodle_init(void)
344 pm_power_off = poodle_poweroff; 435 pm_power_off = poodle_poweroff;
345 arm_pm_restart = poodle_restart; 436 arm_pm_restart = poodle_restart;
346 437
347 /* setup sleep mode values */
348 PWER = 0x00000002;
349 PFER = 0x00000000;
350 PRER = 0x00000002;
351 PGSR0 = 0x00008000;
352 PGSR1 = 0x003F0202;
353 PGSR2 = 0x0001C000;
354 PCFR |= PCFR_OPDE; 438 PCFR |= PCFR_OPDE;
355 439
356 /* cpu initialize */ 440 pxa2xx_mfp_config(ARRAY_AND_SIZE(poodle_pin_config));
357 /* Pgsr Register */ 441
358 PGSR0 = 0x0146dd80; 442 platform_scoop_config = &poodle_pcmcia_config;
359 PGSR1 = 0x03bf0890; 443
360 PGSR2 = 0x0001c000; 444 ret = platform_add_devices(devices, ARRAY_SIZE(devices));
361 445 if (ret)
362 /* Alternate Register */ 446 pr_warning("poodle: Unable to register LoCoMo device\n");
363 GAFR0_L = 0x01001000;
364 GAFR0_U = 0x591a8010;
365 GAFR1_L = 0x900a8451;
366 GAFR1_U = 0xaaa5aaaa;
367 GAFR2_L = 0x8aaaaaaa;
368 GAFR2_U = 0x00000002;
369
370 /* Direction Register */
371 GPDR0 = 0xd3f0904c;
372 GPDR1 = 0xfcffb7d3;
373 GPDR2 = 0x0001ffff;
374
375 /* Output Register */
376 GPCR0 = 0x00000000;
377 GPCR1 = 0x00000000;
378 GPCR2 = 0x00000000;
379
380 GPSR0 = 0x00400000;
381 GPSR1 = 0x00000000;
382 GPSR2 = 0x00000000;
383 447
384 set_pxa_fb_parent(&poodle_locomo_device.dev); 448 set_pxa_fb_parent(&poodle_locomo_device.dev);
385 set_pxa_fb_info(&poodle_fb_info); 449 set_pxa_fb_info(&poodle_fb_info);
386 pxa_gpio_mode(POODLE_GPIO_USB_PULLUP | GPIO_OUT);
387 pxa_gpio_mode(POODLE_GPIO_IR_ON | GPIO_OUT);
388 pxa_set_udc_info(&udc_info); 450 pxa_set_udc_info(&udc_info);
389 pxa_set_mci_info(&poodle_mci_platform_data); 451 pxa_set_mci_info(&poodle_mci_platform_data);
390 pxa_set_ficp_info(&poodle_ficp_platform_data); 452 pxa_set_ficp_info(&poodle_ficp_platform_data);
391 pxa_set_i2c_info(NULL); 453 pxa_set_i2c_info(NULL);
392 454 poodle_init_spi();
393 platform_scoop_config = &poodle_pcmcia_config;
394
395 ret = platform_add_devices(devices, ARRAY_SIZE(devices));
396 if (ret) {
397 printk(KERN_WARNING "poodle: Unable to register LoCoMo device\n");
398 }
399 corgi_ssp_set_machinfo(&poodle_ssp_machinfo);
400} 455}
401 456
402static void __init fixup_poodle(struct machine_desc *desc, 457static void __init fixup_poodle(struct machine_desc *desc,
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index 305452b56e91..25d17a1dab78 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -36,6 +36,12 @@
36#include "devices.h" 36#include "devices.h"
37#include "clock.h" 37#include "clock.h"
38 38
39int cpu_is_pxa26x(void)
40{
41 return cpu_is_pxa250() && ((BOOT_DEF & 0x8) == 0);
42}
43EXPORT_SYMBOL_GPL(cpu_is_pxa26x);
44
39/* 45/*
40 * Various clock factors driven by the CCCR register. 46 * Various clock factors driven by the CCCR register.
41 */ 47 */
@@ -203,48 +209,21 @@ static struct clk pxa25x_clks[] = {
203 * More ones like CP and general purpose register values are preserved 209 * More ones like CP and general purpose register values are preserved
204 * with the stack pointer in sleep.S. 210 * with the stack pointer in sleep.S.
205 */ 211 */
206enum { SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, 212enum {
207
208 SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U,
209 SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U,
210 SLEEP_SAVE_GAFR2_L, SLEEP_SAVE_GAFR2_U,
211
212 SLEEP_SAVE_PSTR, 213 SLEEP_SAVE_PSTR,
213
214 SLEEP_SAVE_CKEN, 214 SLEEP_SAVE_CKEN,
215
216 SLEEP_SAVE_COUNT 215 SLEEP_SAVE_COUNT
217}; 216};
218 217
219 218
220static void pxa25x_cpu_pm_save(unsigned long *sleep_save) 219static void pxa25x_cpu_pm_save(unsigned long *sleep_save)
221{ 220{
222 SAVE(PGSR0); SAVE(PGSR1); SAVE(PGSR2);
223
224 SAVE(GAFR0_L); SAVE(GAFR0_U);
225 SAVE(GAFR1_L); SAVE(GAFR1_U);
226 SAVE(GAFR2_L); SAVE(GAFR2_U);
227
228 SAVE(CKEN); 221 SAVE(CKEN);
229 SAVE(PSTR); 222 SAVE(PSTR);
230
231 /* Clear GPIO transition detect bits */
232 GEDR0 = GEDR0; GEDR1 = GEDR1; GEDR2 = GEDR2;
233} 223}
234 224
235static void pxa25x_cpu_pm_restore(unsigned long *sleep_save) 225static void pxa25x_cpu_pm_restore(unsigned long *sleep_save)
236{ 226{
237 /* ensure not to come back here if it wasn't intended */
238 PSPR = 0;
239
240 /* restore registers */
241 RESTORE(GAFR0_L); RESTORE(GAFR0_U);
242 RESTORE(GAFR1_L); RESTORE(GAFR1_U);
243 RESTORE(GAFR2_L); RESTORE(GAFR2_U);
244 RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2);
245
246 PSSR = PSSR_RDH | PSSR_PH;
247
248 RESTORE(CKEN); 227 RESTORE(CKEN);
249 RESTORE(PSTR); 228 RESTORE(PSTR);
250} 229}
@@ -256,19 +235,32 @@ static void pxa25x_cpu_pm_enter(suspend_state_t state)
256 235
257 switch (state) { 236 switch (state) {
258 case PM_SUSPEND_MEM: 237 case PM_SUSPEND_MEM:
259 /* set resume return address */
260 PSPR = virt_to_phys(pxa_cpu_resume);
261 pxa25x_cpu_suspend(PWRMODE_SLEEP); 238 pxa25x_cpu_suspend(PWRMODE_SLEEP);
262 break; 239 break;
263 } 240 }
264} 241}
265 242
243static int pxa25x_cpu_pm_prepare(void)
244{
245 /* set resume return address */
246 PSPR = virt_to_phys(pxa_cpu_resume);
247 return 0;
248}
249
250static void pxa25x_cpu_pm_finish(void)
251{
252 /* ensure not to come back here if it wasn't intended */
253 PSPR = 0;
254}
255
266static struct pxa_cpu_pm_fns pxa25x_cpu_pm_fns = { 256static struct pxa_cpu_pm_fns pxa25x_cpu_pm_fns = {
267 .save_count = SLEEP_SAVE_COUNT, 257 .save_count = SLEEP_SAVE_COUNT,
268 .valid = suspend_valid_only_mem, 258 .valid = suspend_valid_only_mem,
269 .save = pxa25x_cpu_pm_save, 259 .save = pxa25x_cpu_pm_save,
270 .restore = pxa25x_cpu_pm_restore, 260 .restore = pxa25x_cpu_pm_restore,
271 .enter = pxa25x_cpu_pm_enter, 261 .enter = pxa25x_cpu_pm_enter,
262 .prepare = pxa25x_cpu_pm_prepare,
263 .finish = pxa25x_cpu_pm_finish,
272}; 264};
273 265
274static void __init pxa25x_init_pm(void) 266static void __init pxa25x_init_pm(void)
@@ -330,6 +322,8 @@ static struct sys_device pxa25x_sysdev[] = {
330 { 322 {
331 .cls = &pxa_irq_sysclass, 323 .cls = &pxa_irq_sysclass,
332 }, { 324 }, {
325 .cls = &pxa2xx_mfp_sysclass,
326 }, {
333 .cls = &pxa_gpio_sysclass, 327 .cls = &pxa_gpio_sysclass,
334 }, 328 },
335}; 329};
@@ -338,11 +332,7 @@ static int __init pxa25x_init(void)
338{ 332{
339 int i, ret = 0; 333 int i, ret = 0;
340 334
341 /* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */ 335 if (cpu_is_pxa25x()) {
342 if (cpu_is_pxa255())
343 clks_register(&pxa25x_hwuart_clk, 1);
344
345 if (cpu_is_pxa21x() || cpu_is_pxa25x()) {
346 336
347 reset_status = RCSR; 337 reset_status = RCSR;
348 338
@@ -365,9 +355,11 @@ static int __init pxa25x_init(void)
365 return ret; 355 return ret;
366 } 356 }
367 357
368 /* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */ 358 /* Only add HWUART for PXA255/26x; PXA210/250 do not have it. */
369 if (cpu_is_pxa255()) 359 if (cpu_is_pxa255() || cpu_is_pxa26x()) {
360 clks_register(&pxa25x_hwuart_clk, 1);
370 ret = platform_device_register(&pxa_device_hwuart); 361 ret = platform_device_register(&pxa_device_hwuart);
362 }
371 363
372 return ret; 364 return ret;
373} 365}
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index f9f6a9c31f4b..3e4ab2279c99 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -34,6 +34,13 @@
34#include "devices.h" 34#include "devices.h"
35#include "clock.h" 35#include "clock.h"
36 36
37void pxa27x_clear_otgph(void)
38{
39 if (cpu_is_pxa27x() && (PSSR & PSSR_OTGPH))
40 PSSR |= PSSR_OTGPH;
41}
42EXPORT_SYMBOL(pxa27x_clear_otgph);
43
37/* Crystal clock: 13MHz */ 44/* Crystal clock: 13MHz */
38#define BASE_CLK 13000000 45#define BASE_CLK 13000000
39 46
@@ -183,36 +190,18 @@ static struct clk pxa27x_clks[] = {
183 * More ones like CP and general purpose register values are preserved 190 * More ones like CP and general purpose register values are preserved
184 * with the stack pointer in sleep.S. 191 * with the stack pointer in sleep.S.
185 */ 192 */
186enum { SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, SLEEP_SAVE_PGSR3, 193enum {
187
188 SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U,
189 SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U,
190 SLEEP_SAVE_GAFR2_L, SLEEP_SAVE_GAFR2_U,
191 SLEEP_SAVE_GAFR3_L, SLEEP_SAVE_GAFR3_U,
192
193 SLEEP_SAVE_PSTR, 194 SLEEP_SAVE_PSTR,
194
195 SLEEP_SAVE_CKEN, 195 SLEEP_SAVE_CKEN,
196
197 SLEEP_SAVE_MDREFR, 196 SLEEP_SAVE_MDREFR,
198 SLEEP_SAVE_PWER, SLEEP_SAVE_PCFR, SLEEP_SAVE_PRER, 197 SLEEP_SAVE_PCFR,
199 SLEEP_SAVE_PFER, SLEEP_SAVE_PKWR,
200
201 SLEEP_SAVE_COUNT 198 SLEEP_SAVE_COUNT
202}; 199};
203 200
204void pxa27x_cpu_pm_save(unsigned long *sleep_save) 201void pxa27x_cpu_pm_save(unsigned long *sleep_save)
205{ 202{
206 SAVE(PGSR0); SAVE(PGSR1); SAVE(PGSR2); SAVE(PGSR3);
207
208 SAVE(GAFR0_L); SAVE(GAFR0_U);
209 SAVE(GAFR1_L); SAVE(GAFR1_U);
210 SAVE(GAFR2_L); SAVE(GAFR2_U);
211 SAVE(GAFR3_L); SAVE(GAFR3_U);
212
213 SAVE(MDREFR); 203 SAVE(MDREFR);
214 SAVE(PWER); SAVE(PCFR); SAVE(PRER); 204 SAVE(PCFR);
215 SAVE(PFER); SAVE(PKWR);
216 205
217 SAVE(CKEN); 206 SAVE(CKEN);
218 SAVE(PSTR); 207 SAVE(PSTR);
@@ -220,24 +209,12 @@ void pxa27x_cpu_pm_save(unsigned long *sleep_save)
220 209
221void pxa27x_cpu_pm_restore(unsigned long *sleep_save) 210void pxa27x_cpu_pm_restore(unsigned long *sleep_save)
222{ 211{
223 /* ensure not to come back here if it wasn't intended */
224 PSPR = 0;
225
226 /* restore registers */
227 RESTORE(GAFR0_L); RESTORE(GAFR0_U);
228 RESTORE(GAFR1_L); RESTORE(GAFR1_U);
229 RESTORE(GAFR2_L); RESTORE(GAFR2_U);
230 RESTORE(GAFR3_L); RESTORE(GAFR3_U);
231 RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2); RESTORE(PGSR3);
232
233 RESTORE(MDREFR); 212 RESTORE(MDREFR);
234 RESTORE(PWER); RESTORE(PCFR); RESTORE(PRER); 213 RESTORE(PCFR);
235 RESTORE(PFER); RESTORE(PKWR);
236 214
237 PSSR = PSSR_RDH | PSSR_PH; 215 PSSR = PSSR_RDH | PSSR_PH;
238 216
239 RESTORE(CKEN); 217 RESTORE(CKEN);
240
241 RESTORE(PSTR); 218 RESTORE(PSTR);
242} 219}
243 220
@@ -259,8 +236,6 @@ void pxa27x_cpu_pm_enter(suspend_state_t state)
259 pxa_cpu_standby(); 236 pxa_cpu_standby();
260 break; 237 break;
261 case PM_SUSPEND_MEM: 238 case PM_SUSPEND_MEM:
262 /* set resume return address */
263 PSPR = virt_to_phys(pxa_cpu_resume);
264 pxa27x_cpu_suspend(PWRMODE_SLEEP); 239 pxa27x_cpu_suspend(PWRMODE_SLEEP);
265 break; 240 break;
266 } 241 }
@@ -271,12 +246,27 @@ static int pxa27x_cpu_pm_valid(suspend_state_t state)
271 return state == PM_SUSPEND_MEM || state == PM_SUSPEND_STANDBY; 246 return state == PM_SUSPEND_MEM || state == PM_SUSPEND_STANDBY;
272} 247}
273 248
249static int pxa27x_cpu_pm_prepare(void)
250{
251 /* set resume return address */
252 PSPR = virt_to_phys(pxa_cpu_resume);
253 return 0;
254}
255
256static void pxa27x_cpu_pm_finish(void)
257{
258 /* ensure not to come back here if it wasn't intended */
259 PSPR = 0;
260}
261
274static struct pxa_cpu_pm_fns pxa27x_cpu_pm_fns = { 262static struct pxa_cpu_pm_fns pxa27x_cpu_pm_fns = {
275 .save_count = SLEEP_SAVE_COUNT, 263 .save_count = SLEEP_SAVE_COUNT,
276 .save = pxa27x_cpu_pm_save, 264 .save = pxa27x_cpu_pm_save,
277 .restore = pxa27x_cpu_pm_restore, 265 .restore = pxa27x_cpu_pm_restore,
278 .valid = pxa27x_cpu_pm_valid, 266 .valid = pxa27x_cpu_pm_valid,
279 .enter = pxa27x_cpu_pm_enter, 267 .enter = pxa27x_cpu_pm_enter,
268 .prepare = pxa27x_cpu_pm_prepare,
269 .finish = pxa27x_cpu_pm_finish,
280}; 270};
281 271
282static void __init pxa27x_init_pm(void) 272static void __init pxa27x_init_pm(void)
@@ -349,7 +339,7 @@ struct platform_device pxa27x_device_i2c_power = {
349 .num_resources = ARRAY_SIZE(i2c_power_resources), 339 .num_resources = ARRAY_SIZE(i2c_power_resources),
350}; 340};
351 341
352void __init pxa_set_i2c_power_info(struct i2c_pxa_platform_data *info) 342void __init pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info)
353{ 343{
354 local_irq_disable(); 344 local_irq_disable();
355 PCFR |= PCFR_PI2CEN; 345 PCFR |= PCFR_PI2CEN;
@@ -376,6 +366,8 @@ static struct sys_device pxa27x_sysdev[] = {
376 { 366 {
377 .cls = &pxa_irq_sysclass, 367 .cls = &pxa_irq_sysclass,
378 }, { 368 }, {
369 .cls = &pxa2xx_mfp_sysclass,
370 }, {
379 .cls = &pxa_gpio_sysclass, 371 .cls = &pxa_gpio_sysclass,
380 }, 372 },
381}; 373};
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index 03cbc38103ed..b3cd5d0b0f35 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -203,6 +203,19 @@ static const struct clkops clk_pout_ops = {
203 .disable = clk_pout_disable, 203 .disable = clk_pout_disable,
204}; 204};
205 205
206static void clk_dummy_enable(struct clk *clk)
207{
208}
209
210static void clk_dummy_disable(struct clk *clk)
211{
212}
213
214static const struct clkops clk_dummy_ops = {
215 .enable = clk_dummy_enable,
216 .disable = clk_dummy_disable,
217};
218
206static struct clk pxa3xx_clks[] = { 219static struct clk pxa3xx_clks[] = {
207 { 220 {
208 .name = "CLK_POUT", 221 .name = "CLK_POUT",
@@ -211,6 +224,13 @@ static struct clk pxa3xx_clks[] = {
211 .delay = 70, 224 .delay = 70,
212 }, 225 },
213 226
227 /* Power I2C clock is always on */
228 {
229 .name = "I2CCLK",
230 .ops = &clk_dummy_ops,
231 .dev = &pxa3xx_device_i2c_power.dev,
232 },
233
214 PXA3xx_CK("LCDCLK", LCD, &clk_pxa3xx_hsio_ops, &pxa_device_fb.dev), 234 PXA3xx_CK("LCDCLK", LCD, &clk_pxa3xx_hsio_ops, &pxa_device_fb.dev),
215 PXA3xx_CK("CAMCLK", CAMERA, &clk_pxa3xx_hsio_ops, NULL), 235 PXA3xx_CK("CAMCLK", CAMERA, &clk_pxa3xx_hsio_ops, NULL),
216 PXA3xx_CK("AC97CLK", AC97, &clk_pxa3xx_ac97_ops, NULL), 236 PXA3xx_CK("AC97CLK", AC97, &clk_pxa3xx_ac97_ops, NULL),
@@ -509,6 +529,30 @@ void __init pxa3xx_init_irq(void)
509 * device registration specific to PXA3xx. 529 * device registration specific to PXA3xx.
510 */ 530 */
511 531
532static struct resource i2c_power_resources[] = {
533 {
534 .start = 0x40f500c0,
535 .end = 0x40f500d3,
536 .flags = IORESOURCE_MEM,
537 }, {
538 .start = IRQ_PWRI2C,
539 .end = IRQ_PWRI2C,
540 .flags = IORESOURCE_IRQ,
541 },
542};
543
544struct platform_device pxa3xx_device_i2c_power = {
545 .name = "pxa2xx-i2c",
546 .id = 1,
547 .resource = i2c_power_resources,
548 .num_resources = ARRAY_SIZE(i2c_power_resources),
549};
550
551void __init pxa3xx_set_i2c_power_info(struct i2c_pxa_platform_data *info)
552{
553 pxa3xx_device_i2c_power.dev.platform_data = info;
554}
555
512static struct platform_device *devices[] __initdata = { 556static struct platform_device *devices[] __initdata = {
513/* &pxa_device_udc, The UDC driver is PXA25x only */ 557/* &pxa_device_udc, The UDC driver is PXA25x only */
514 &pxa_device_ffuart, 558 &pxa_device_ffuart,
@@ -522,6 +566,7 @@ static struct platform_device *devices[] __initdata = {
522 &pxa3xx_device_ssp4, 566 &pxa3xx_device_ssp4,
523 &pxa27x_device_pwm0, 567 &pxa27x_device_pwm0,
524 &pxa27x_device_pwm1, 568 &pxa27x_device_pwm1,
569 &pxa3xx_device_i2c_power,
525}; 570};
526 571
527static struct sys_device pxa3xx_sysdev[] = { 572static struct sys_device pxa3xx_sysdev[] = {
diff --git a/arch/arm/mach-pxa/reset.c b/arch/arm/mach-pxa/reset.c
index 9996c612c3d6..1b2af575c40f 100644
--- a/arch/arm/mach-pxa/reset.c
+++ b/arch/arm/mach-pxa/reset.c
@@ -7,7 +7,7 @@
7#include <linux/module.h> 7#include <linux/module.h>
8#include <linux/delay.h> 8#include <linux/delay.h>
9#include <linux/gpio.h> 9#include <linux/gpio.h>
10#include <asm/io.h> 10#include <linux/io.h>
11#include <asm/proc-fns.h> 11#include <asm/proc-fns.h>
12 12
13#include <mach/pxa-regs.h> 13#include <mach/pxa-regs.h>
@@ -20,7 +20,7 @@ static void do_hw_reset(void);
20 20
21static int reset_gpio = -1; 21static int reset_gpio = -1;
22 22
23int init_gpio_reset(int gpio) 23int init_gpio_reset(int gpio, int output)
24{ 24{
25 int rc; 25 int rc;
26 26
@@ -30,9 +30,12 @@ int init_gpio_reset(int gpio)
30 goto out; 30 goto out;
31 } 31 }
32 32
33 rc = gpio_direction_input(gpio); 33 if (output)
34 rc = gpio_direction_output(gpio, 0);
35 else
36 rc = gpio_direction_input(gpio);
34 if (rc) { 37 if (rc) {
35 printk(KERN_ERR "Can't configure reset_gpio for input\n"); 38 printk(KERN_ERR "Can't configure reset_gpio\n");
36 gpio_free(gpio); 39 gpio_free(gpio);
37 goto out; 40 goto out;
38 } 41 }
diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c
index e804ae09370c..15c2f1a8623b 100644
--- a/arch/arm/mach-pxa/sharpsl_pm.c
+++ b/arch/arm/mach-pxa/sharpsl_pm.c
@@ -116,24 +116,20 @@ struct battery_thresh spitz_battery_levels_noac[] = {
116 { 0, 0}, 116 { 0, 0},
117}; 117};
118 118
119/* MAX1111 Commands */
120#define MAXCTRL_PD0 1u << 0
121#define MAXCTRL_PD1 1u << 1
122#define MAXCTRL_SGL 1u << 2
123#define MAXCTRL_UNI 1u << 3
124#define MAXCTRL_SEL_SH 4
125#define MAXCTRL_STR 1u << 7
126
127/* 119/*
128 * Read MAX1111 ADC 120 * Read MAX1111 ADC
129 */ 121 */
122extern int max1111_read_channel(int);
123
130int sharpsl_pm_pxa_read_max1111(int channel) 124int sharpsl_pm_pxa_read_max1111(int channel)
131{ 125{
132 if (machine_is_tosa()) // Ugly, better move this function into another module 126 if (machine_is_tosa()) // Ugly, better move this function into another module
133 return 0; 127 return 0;
134 128
135 return corgi_ssp_max1111_get((channel << MAXCTRL_SEL_SH) | MAXCTRL_PD0 | MAXCTRL_PD1 129 /* max1111 accepts channels from 0-3, however,
136 | MAXCTRL_SGL | MAXCTRL_UNI | MAXCTRL_STR); 130 * it is encoded from 0-7 here in the code.
131 */
132 return max1111_read_channel(channel >> 1);
137} 133}
138 134
139void sharpsl_pm_pxa_init(void) 135void sharpsl_pm_pxa_init(void)
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index b569f3b4cf3a..524f656dc56d 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -19,16 +19,23 @@
19#include <linux/major.h> 19#include <linux/major.h>
20#include <linux/fs.h> 20#include <linux/fs.h>
21#include <linux/interrupt.h> 21#include <linux/interrupt.h>
22#include <linux/gpio.h>
23#include <linux/leds.h>
22#include <linux/mmc/host.h> 24#include <linux/mmc/host.h>
23#include <linux/pm.h> 25#include <linux/pm.h>
24#include <linux/backlight.h> 26#include <linux/backlight.h>
27#include <linux/io.h>
28#include <linux/i2c.h>
29#include <linux/i2c/pca953x.h>
30#include <linux/spi/spi.h>
31#include <linux/spi/ads7846.h>
32#include <linux/spi/corgi_lcd.h>
25 33
26#include <asm/setup.h> 34#include <asm/setup.h>
27#include <asm/memory.h> 35#include <asm/memory.h>
28#include <asm/mach-types.h> 36#include <asm/mach-types.h>
29#include <mach/hardware.h> 37#include <mach/hardware.h>
30#include <asm/irq.h> 38#include <asm/irq.h>
31#include <asm/io.h>
32#include <asm/system.h> 39#include <asm/system.h>
33 40
34#include <asm/mach/arch.h> 41#include <asm/mach/arch.h>
@@ -37,7 +44,7 @@
37 44
38#include <mach/pxa-regs.h> 45#include <mach/pxa-regs.h>
39#include <mach/pxa2xx-regs.h> 46#include <mach/pxa2xx-regs.h>
40#include <mach/pxa2xx-gpio.h> 47#include <mach/mfp-pxa27x.h>
41#include <mach/pxa27x-udc.h> 48#include <mach/pxa27x-udc.h>
42#include <mach/reset.h> 49#include <mach/reset.h>
43#include <mach/i2c.h> 50#include <mach/i2c.h>
@@ -46,7 +53,7 @@
46#include <mach/ohci.h> 53#include <mach/ohci.h>
47#include <mach/udc.h> 54#include <mach/udc.h>
48#include <mach/pxafb.h> 55#include <mach/pxafb.h>
49#include <mach/akita.h> 56#include <mach/pxa2xx_spi.h>
50#include <mach/spitz.h> 57#include <mach/spitz.h>
51#include <mach/sharpsl.h> 58#include <mach/sharpsl.h>
52 59
@@ -57,6 +64,66 @@
57#include "devices.h" 64#include "devices.h"
58#include "sharpsl.h" 65#include "sharpsl.h"
59 66
67static unsigned long spitz_pin_config[] __initdata = {
68 /* Chip Selects */
69 GPIO78_nCS_2, /* SCOOP #2 */
70 GPIO80_nCS_4, /* SCOOP #1 */
71
72 /* LCD - 16bpp Active TFT */
73 GPIO58_LCD_LDD_0,
74 GPIO59_LCD_LDD_1,
75 GPIO60_LCD_LDD_2,
76 GPIO61_LCD_LDD_3,
77 GPIO62_LCD_LDD_4,
78 GPIO63_LCD_LDD_5,
79 GPIO64_LCD_LDD_6,
80 GPIO65_LCD_LDD_7,
81 GPIO66_LCD_LDD_8,
82 GPIO67_LCD_LDD_9,
83 GPIO68_LCD_LDD_10,
84 GPIO69_LCD_LDD_11,
85 GPIO70_LCD_LDD_12,
86 GPIO71_LCD_LDD_13,
87 GPIO72_LCD_LDD_14,
88 GPIO73_LCD_LDD_15,
89 GPIO74_LCD_FCLK,
90 GPIO75_LCD_LCLK,
91 GPIO76_LCD_PCLK,
92
93 /* PC Card */
94 GPIO48_nPOE,
95 GPIO49_nPWE,
96 GPIO50_nPIOR,
97 GPIO51_nPIOW,
98 GPIO85_nPCE_1,
99 GPIO54_nPCE_2,
100 GPIO79_PSKTSEL,
101 GPIO55_nPREG,
102 GPIO56_nPWAIT,
103 GPIO57_nIOIS16,
104
105 /* MMC */
106 GPIO32_MMC_CLK,
107 GPIO112_MMC_CMD,
108 GPIO92_MMC_DAT_0,
109 GPIO109_MMC_DAT_1,
110 GPIO110_MMC_DAT_2,
111 GPIO111_MMC_DAT_3,
112
113 /* GPIOs */
114 GPIO9_GPIO, /* SPITZ_GPIO_nSD_DETECT */
115 GPIO81_GPIO, /* SPITZ_GPIO_nSD_WP */
116 GPIO41_GPIO, /* SPITZ_GPIO_USB_CONNECT */
117 GPIO37_GPIO, /* SPITZ_GPIO_USB_HOST */
118 GPIO35_GPIO, /* SPITZ_GPIO_USB_DEVICE */
119 GPIO22_GPIO, /* SPITZ_GPIO_HSYNC */
120 GPIO94_GPIO, /* SPITZ_GPIO_CF_CD */
121 GPIO105_GPIO, /* SPITZ_GPIO_CF_IRQ */
122 GPIO106_GPIO, /* SPITZ_GPIO_CF2_IRQ */
123
124 GPIO1_GPIO | WAKEUP_ON_EDGE_RISE,
125};
126
60/* 127/*
61 * Spitz SCOOP Device #1 128 * Spitz SCOOP Device #1
62 */ 129 */
@@ -69,10 +136,11 @@ static struct resource spitz_scoop_resources[] = {
69}; 136};
70 137
71static struct scoop_config spitz_scoop_setup = { 138static struct scoop_config spitz_scoop_setup = {
72 .io_dir = SPITZ_SCP_IO_DIR, 139 .io_dir = SPITZ_SCP_IO_DIR,
73 .io_out = SPITZ_SCP_IO_OUT, 140 .io_out = SPITZ_SCP_IO_OUT,
74 .suspend_clr = SPITZ_SCP_SUS_CLR, 141 .suspend_clr = SPITZ_SCP_SUS_CLR,
75 .suspend_set = SPITZ_SCP_SUS_SET, 142 .suspend_set = SPITZ_SCP_SUS_SET,
143 .gpio_base = SPITZ_SCP_GPIO_BASE,
76}; 144};
77 145
78struct platform_device spitzscoop_device = { 146struct platform_device spitzscoop_device = {
@@ -97,10 +165,11 @@ static struct resource spitz_scoop2_resources[] = {
97}; 165};
98 166
99static struct scoop_config spitz_scoop2_setup = { 167static struct scoop_config spitz_scoop2_setup = {
100 .io_dir = SPITZ_SCP2_IO_DIR, 168 .io_dir = SPITZ_SCP2_IO_DIR,
101 .io_out = SPITZ_SCP2_IO_OUT, 169 .io_out = SPITZ_SCP2_IO_OUT,
102 .suspend_clr = SPITZ_SCP2_SUS_CLR, 170 .suspend_clr = SPITZ_SCP2_SUS_CLR,
103 .suspend_set = SPITZ_SCP2_SUS_SET, 171 .suspend_set = SPITZ_SCP2_SUS_SET,
172 .gpio_base = SPITZ_SCP2_GPIO_BASE,
104}; 173};
105 174
106struct platform_device spitzscoop2_device = { 175struct platform_device spitzscoop2_device = {
@@ -122,7 +191,7 @@ static void spitz_card_pwr_ctrl(int device, unsigned short new_cpr)
122 unsigned short cpr = read_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR); 191 unsigned short cpr = read_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR);
123 192
124 if (new_cpr & 0x0007) { 193 if (new_cpr & 0x0007) {
125 set_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_CF_POWER); 194 gpio_set_value(SPITZ_GPIO_CF_POWER, 1);
126 if (!(cpr & 0x0002) && !(cpr & 0x0004)) 195 if (!(cpr & 0x0002) && !(cpr & 0x0004))
127 mdelay(5); 196 mdelay(5);
128 if (device == SPITZ_PWR_CF) 197 if (device == SPITZ_PWR_CF)
@@ -138,34 +207,13 @@ static void spitz_card_pwr_ctrl(int device, unsigned short new_cpr)
138 if (!(cpr & 0x0002) && !(cpr & 0x0004)) { 207 if (!(cpr & 0x0002) && !(cpr & 0x0004)) {
139 write_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR, 0x0000); 208 write_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR, 0x0000);
140 mdelay(1); 209 mdelay(1);
141 reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_CF_POWER); 210 gpio_set_value(SPITZ_GPIO_CF_POWER, 0);
142 } else { 211 } else {
143 write_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR, cpr | new_cpr); 212 write_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR, cpr | new_cpr);
144 } 213 }
145 } 214 }
146} 215}
147 216
148static void spitz_pcmcia_init(void)
149{
150 /* Setup default state of GPIO outputs
151 before we enable them as outputs. */
152 GPSR(GPIO48_nPOE) = GPIO_bit(GPIO48_nPOE) |
153 GPIO_bit(GPIO49_nPWE) | GPIO_bit(GPIO50_nPIOR) |
154 GPIO_bit(GPIO51_nPIOW) | GPIO_bit(GPIO54_nPCE_2);
155 GPSR(GPIO85_nPCE_1) = GPIO_bit(GPIO85_nPCE_1);
156
157 pxa_gpio_mode(GPIO48_nPOE_MD);
158 pxa_gpio_mode(GPIO49_nPWE_MD);
159 pxa_gpio_mode(GPIO50_nPIOR_MD);
160 pxa_gpio_mode(GPIO51_nPIOW_MD);
161 pxa_gpio_mode(GPIO55_nPREG_MD);
162 pxa_gpio_mode(GPIO56_nPWAIT_MD);
163 pxa_gpio_mode(GPIO57_nIOIS16_MD);
164 pxa_gpio_mode(GPIO85_nPCE_1_MD);
165 pxa_gpio_mode(GPIO54_nPCE_2_MD);
166 pxa_gpio_mode(GPIO104_pSKTSEL_MD);
167}
168
169static void spitz_pcmcia_pwr(struct device *scoop, unsigned short cpr, int nr) 217static void spitz_pcmcia_pwr(struct device *scoop, unsigned short cpr, int nr)
170{ 218{
171 /* Only need to override behaviour for slot 0 */ 219 /* Only need to override behaviour for slot 0 */
@@ -191,165 +239,169 @@ static struct scoop_pcmcia_dev spitz_pcmcia_scoop[] = {
191static struct scoop_pcmcia_config spitz_pcmcia_config = { 239static struct scoop_pcmcia_config spitz_pcmcia_config = {
192 .devs = &spitz_pcmcia_scoop[0], 240 .devs = &spitz_pcmcia_scoop[0],
193 .num_devs = 2, 241 .num_devs = 2,
194 .pcmcia_init = spitz_pcmcia_init,
195 .power_ctrl = spitz_pcmcia_pwr, 242 .power_ctrl = spitz_pcmcia_pwr,
196}; 243};
197 244
198EXPORT_SYMBOL(spitzscoop_device); 245EXPORT_SYMBOL(spitzscoop_device);
199EXPORT_SYMBOL(spitzscoop2_device); 246EXPORT_SYMBOL(spitzscoop2_device);
200 247
201
202/* 248/*
203 * Spitz SSP Device 249 * Spitz Keyboard Device
204 *
205 * Set the parent as the scoop device because a lot of SSP devices
206 * also use scoop functions and this makes the power up/down order
207 * work correctly.
208 */ 250 */
209struct platform_device spitzssp_device = { 251static struct platform_device spitzkbd_device = {
210 .name = "corgi-ssp", 252 .name = "spitz-keyboard",
211 .dev = {
212 .parent = &spitzscoop_device.dev,
213 },
214 .id = -1, 253 .id = -1,
215}; 254};
216 255
217struct corgissp_machinfo spitz_ssp_machinfo = {
218 .port = 2,
219 .cs_lcdcon = SPITZ_GPIO_LCDCON_CS,
220 .cs_ads7846 = SPITZ_GPIO_ADS7846_CS,
221 .cs_max1111 = SPITZ_GPIO_MAX1111_CS,
222 .clk_lcdcon = 520,
223 .clk_ads7846 = 14,
224 .clk_max1111 = 56,
225};
226
227 256
228/* 257/*
229 * Spitz Backlight Device 258 * Spitz LEDs
230 */ 259 */
231static void spitz_bl_kick_battery(void) 260static struct gpio_led spitz_gpio_leds[] = {
232{ 261 {
233 void (*kick_batt)(void); 262 .name = "spitz:amber:charge",
234 263 .default_trigger = "sharpsl-charge",
235 kick_batt = symbol_get(sharpsl_battery_kick); 264 .gpio = SPITZ_GPIO_LED_ORANGE,
236 if (kick_batt) { 265 },
237 kick_batt(); 266 {
238 symbol_put(sharpsl_battery_kick); 267 .name = "spitz:green:hddactivity",
239 } 268 .default_trigger = "ide-disk",
240} 269 .gpio = SPITZ_GPIO_LED_GREEN,
241
242static struct generic_bl_info spitz_bl_machinfo = {
243 .name = "corgi-bl",
244 .default_intensity = 0x1f,
245 .limit_mask = 0x0b,
246 .max_intensity = 0x2f,
247 .kick_battery = spitz_bl_kick_battery,
248};
249
250static struct platform_device spitzbl_device = {
251 .name = "generic-bl",
252 .dev = {
253 .platform_data = &spitz_bl_machinfo,
254 }, 270 },
255 .id = -1,
256}; 271};
257 272
258 273static struct gpio_led_platform_data spitz_gpio_leds_info = {
259/* 274 .leds = spitz_gpio_leds,
260 * Spitz Keyboard Device 275 .num_leds = ARRAY_SIZE(spitz_gpio_leds),
261 */
262static struct platform_device spitzkbd_device = {
263 .name = "spitz-keyboard",
264 .id = -1,
265}; 276};
266 277
267
268/*
269 * Spitz LEDs
270 */
271static struct platform_device spitzled_device = { 278static struct platform_device spitzled_device = {
272 .name = "spitz-led", 279 .name = "leds-gpio",
273 .id = -1, 280 .id = -1,
281 .dev = {
282 .platform_data = &spitz_gpio_leds_info,
283 },
274}; 284};
275 285
276/* 286#if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE)
277 * Spitz Touch Screen Device 287static struct pxa2xx_spi_master spitz_spi_info = {
278 */ 288 .num_chipselect = 3,
289};
279 290
280static unsigned long (*get_hsync_invperiod)(struct device *dev); 291static struct ads7846_platform_data spitz_ads7846_info = {
292 .model = 7846,
293 .vref_delay_usecs = 100,
294 .x_plate_ohms = 419,
295 .y_plate_ohms = 486,
296 .gpio_pendown = SPITZ_GPIO_TP_INT,
297};
281 298
282static void inline sharpsl_wait_sync(int gpio) 299static void spitz_ads7846_cs(u32 command)
283{ 300{
284 while((GPLR(gpio) & GPIO_bit(gpio)) == 0); 301 gpio_set_value(SPITZ_GPIO_ADS7846_CS, !(command == PXA2XX_CS_ASSERT));
285 while((GPLR(gpio) & GPIO_bit(gpio)) != 0);
286} 302}
287 303
288static struct device *spitz_pxafb_dev; 304static struct pxa2xx_spi_chip spitz_ads7846_chip = {
305 .cs_control = spitz_ads7846_cs,
306};
289 307
290static int is_pxafb_device(struct device * dev, void * data) 308static void spitz_bl_kick_battery(void)
291{ 309{
292 struct platform_device *pdev = container_of(dev, struct platform_device, dev); 310 void (*kick_batt)(void);
293
294 return (strncmp(pdev->name, "pxa2xx-fb", 9) == 0);
295}
296 311
297static unsigned long spitz_get_hsync_invperiod(void) 312 kick_batt = symbol_get(sharpsl_battery_kick);
298{ 313 if (kick_batt) {
299#ifdef CONFIG_FB_PXA 314 kick_batt();
300 if (!spitz_pxafb_dev) { 315 symbol_put(sharpsl_battery_kick);
301 spitz_pxafb_dev = bus_find_device(&platform_bus_type, NULL, NULL, is_pxafb_device);
302 if (!spitz_pxafb_dev)
303 return 0;
304 } 316 }
305 if (!get_hsync_invperiod)
306 get_hsync_invperiod = symbol_get(pxafb_get_hsync_time);
307 if (!get_hsync_invperiod)
308#endif
309 return 0;
310
311 return get_hsync_invperiod(spitz_pxafb_dev);
312} 317}
313 318
314static void spitz_put_hsync(void) 319static struct corgi_lcd_platform_data spitz_lcdcon_info = {
315{ 320 .init_mode = CORGI_LCD_MODE_VGA,
316 put_device(spitz_pxafb_dev); 321 .max_intensity = 0x2f,
317 if (get_hsync_invperiod) 322 .default_intensity = 0x1f,
318 symbol_put(pxafb_get_hsync_time); 323 .limit_mask = 0x0b,
319 spitz_pxafb_dev = NULL; 324 .gpio_backlight_cont = SPITZ_GPIO_BACKLIGHT_CONT,
320 get_hsync_invperiod = NULL; 325 .gpio_backlight_on = SPITZ_GPIO_BACKLIGHT_ON,
321} 326 .kick_battery = spitz_bl_kick_battery,
327};
322 328
323static void spitz_wait_hsync(void) 329static void spitz_lcdcon_cs(u32 command)
324{ 330{
325 sharpsl_wait_sync(SPITZ_GPIO_HSYNC); 331 gpio_set_value(SPITZ_GPIO_LCDCON_CS, !(command == PXA2XX_CS_ASSERT));
326} 332}
327 333
328static struct resource spitzts_resources[] = { 334static struct pxa2xx_spi_chip spitz_lcdcon_chip = {
329 [0] = { 335 .cs_control = spitz_lcdcon_cs,
330 .start = SPITZ_IRQ_GPIO_TP_INT,
331 .end = SPITZ_IRQ_GPIO_TP_INT,
332 .flags = IORESOURCE_IRQ,
333 },
334}; 336};
335 337
336static struct corgits_machinfo spitz_ts_machinfo = { 338static void spitz_max1111_cs(u32 command)
337 .get_hsync_invperiod = spitz_get_hsync_invperiod, 339{
338 .put_hsync = spitz_put_hsync, 340 gpio_set_value(SPITZ_GPIO_MAX1111_CS, !(command == PXA2XX_CS_ASSERT));
339 .wait_hsync = spitz_wait_hsync, 341}
342
343static struct pxa2xx_spi_chip spitz_max1111_chip = {
344 .cs_control = spitz_max1111_cs,
340}; 345};
341 346
342static struct platform_device spitzts_device = { 347static struct spi_board_info spitz_spi_devices[] = {
343 .name = "corgi-ts", 348 {
344 .dev = { 349 .modalias = "ads7846",
345 .parent = &spitzssp_device.dev, 350 .max_speed_hz = 1200000,
346 .platform_data = &spitz_ts_machinfo, 351 .bus_num = 2,
352 .chip_select = 0,
353 .platform_data = &spitz_ads7846_info,
354 .controller_data= &spitz_ads7846_chip,
355 .irq = gpio_to_irq(SPITZ_GPIO_TP_INT),
356 }, {
357 .modalias = "corgi-lcd",
358 .max_speed_hz = 50000,
359 .bus_num = 2,
360 .chip_select = 1,
361 .platform_data = &spitz_lcdcon_info,
362 .controller_data= &spitz_lcdcon_chip,
363 }, {
364 .modalias = "max1111",
365 .max_speed_hz = 450000,
366 .bus_num = 2,
367 .chip_select = 2,
368 .controller_data= &spitz_max1111_chip,
347 }, 369 },
348 .id = -1,
349 .num_resources = ARRAY_SIZE(spitzts_resources),
350 .resource = spitzts_resources,
351}; 370};
352 371
372static void __init spitz_init_spi(void)
373{
374 int err;
375
376 err = gpio_request(SPITZ_GPIO_ADS7846_CS, "ADS7846_CS");
377 if (err)
378 return;
379
380 err = gpio_request(SPITZ_GPIO_LCDCON_CS, "LCDCON_CS");
381 if (err)
382 goto err_free_1;
383
384 err = gpio_request(SPITZ_GPIO_MAX1111_CS, "MAX1111_CS");
385 if (err)
386 goto err_free_2;
387
388 if (machine_is_akita()) {
389 spitz_lcdcon_info.gpio_backlight_cont = AKITA_GPIO_BACKLIGHT_CONT;
390 spitz_lcdcon_info.gpio_backlight_on = AKITA_GPIO_BACKLIGHT_ON;
391 }
392
393 pxa2xx_set_spi_info(2, &spitz_spi_info);
394 spi_register_board_info(ARRAY_AND_SIZE(spitz_spi_devices));
395 return;
396
397err_free_2:
398 gpio_free(SPITZ_GPIO_LCDCON_CS);
399err_free_1:
400 gpio_free(SPITZ_GPIO_ADS7846_CS);
401}
402#else
403static inline void spitz_init_spi(void) {}
404#endif
353 405
354/* 406/*
355 * MMC/SD Device 407 * MMC/SD Device
@@ -364,24 +416,35 @@ static int spitz_mci_init(struct device *dev, irq_handler_t spitz_detect_int, vo
364{ 416{
365 int err; 417 int err;
366 418
367 /* setup GPIO for PXA27x MMC controller */ 419 err = gpio_request(SPITZ_GPIO_nSD_DETECT, "nSD_DETECT");
368 pxa_gpio_mode(GPIO32_MMCCLK_MD); 420 if (err)
369 pxa_gpio_mode(GPIO112_MMCCMD_MD); 421 goto err_out;
370 pxa_gpio_mode(GPIO92_MMCDAT0_MD); 422
371 pxa_gpio_mode(GPIO109_MMCDAT1_MD); 423 err = gpio_request(SPITZ_GPIO_nSD_WP, "nSD_WP");
372 pxa_gpio_mode(GPIO110_MMCDAT2_MD); 424 if (err)
373 pxa_gpio_mode(GPIO111_MMCDAT3_MD); 425 goto err_free_1;
374 pxa_gpio_mode(SPITZ_GPIO_nSD_DETECT | GPIO_IN); 426
375 pxa_gpio_mode(SPITZ_GPIO_nSD_WP | GPIO_IN); 427 gpio_direction_input(SPITZ_GPIO_nSD_DETECT);
428 gpio_direction_input(SPITZ_GPIO_nSD_WP);
376 429
377 spitz_mci_platform_data.detect_delay = msecs_to_jiffies(250); 430 spitz_mci_platform_data.detect_delay = msecs_to_jiffies(250);
378 431
379 err = request_irq(SPITZ_IRQ_GPIO_nSD_DETECT, spitz_detect_int, 432 err = request_irq(SPITZ_IRQ_GPIO_nSD_DETECT, spitz_detect_int,
380 IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, 433 IRQF_DISABLED | IRQF_TRIGGER_RISING |
434 IRQF_TRIGGER_FALLING,
381 "MMC card detect", data); 435 "MMC card detect", data);
382 if (err) 436 if (err) {
383 printk(KERN_ERR "spitz_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); 437 pr_err("%s: MMC/SD: can't request MMC card detect IRQ\n",
438 __func__);
439 goto err_free_2;
440 }
441 return 0;
384 442
443err_free_2:
444 gpio_free(SPITZ_GPIO_nSD_WP);
445err_free_1:
446 gpio_free(SPITZ_GPIO_nSD_DETECT);
447err_out:
385 return err; 448 return err;
386} 449}
387 450
@@ -397,12 +460,14 @@ static void spitz_mci_setpower(struct device *dev, unsigned int vdd)
397 460
398static int spitz_mci_get_ro(struct device *dev) 461static int spitz_mci_get_ro(struct device *dev)
399{ 462{
400 return GPLR(SPITZ_GPIO_nSD_WP) & GPIO_bit(SPITZ_GPIO_nSD_WP); 463 return gpio_get_value(SPITZ_GPIO_nSD_WP);
401} 464}
402 465
403static void spitz_mci_exit(struct device *dev, void *data) 466static void spitz_mci_exit(struct device *dev, void *data)
404{ 467{
405 free_irq(SPITZ_IRQ_GPIO_nSD_DETECT, data); 468 free_irq(SPITZ_IRQ_GPIO_nSD_DETECT, data);
469 gpio_free(SPITZ_GPIO_nSD_WP);
470 gpio_free(SPITZ_GPIO_nSD_DETECT);
406} 471}
407 472
408static struct pxamci_platform_data spitz_mci_platform_data = { 473static struct pxamci_platform_data spitz_mci_platform_data = {
@@ -419,27 +484,24 @@ static struct pxamci_platform_data spitz_mci_platform_data = {
419 */ 484 */
420static int spitz_ohci_init(struct device *dev) 485static int spitz_ohci_init(struct device *dev)
421{ 486{
422 /* Only Port 2 is connected */ 487 int err;
423 pxa_gpio_mode(SPITZ_GPIO_USB_CONNECT | GPIO_IN);
424 pxa_gpio_mode(SPITZ_GPIO_USB_HOST | GPIO_OUT);
425 pxa_gpio_mode(SPITZ_GPIO_USB_DEVICE | GPIO_IN);
426
427 /* Setup USB Port 2 Output Control Register */
428 UP2OCR = UP2OCR_HXS | UP2OCR_HXOE | UP2OCR_DPPDE | UP2OCR_DMPDE;
429
430 GPSR(SPITZ_GPIO_USB_HOST) = GPIO_bit(SPITZ_GPIO_USB_HOST);
431 488
432 UHCHR = (UHCHR) & 489 err = gpio_request(SPITZ_GPIO_USB_HOST, "USB_HOST");
433 ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE); 490 if (err)
491 return err;
434 492
435 UHCRHDA |= UHCRHDA_NOCP; 493 /* Only Port 2 is connected
494 * Setup USB Port 2 Output Control Register
495 */
496 UP2OCR = UP2OCR_HXS | UP2OCR_HXOE | UP2OCR_DPPDE | UP2OCR_DMPDE;
436 497
437 return 0; 498 return gpio_direction_output(SPITZ_GPIO_USB_HOST, 1);
438} 499}
439 500
440static struct pxaohci_platform_data spitz_ohci_platform_data = { 501static struct pxaohci_platform_data spitz_ohci_platform_data = {
441 .port_mode = PMM_NPS_MODE, 502 .port_mode = PMM_NPS_MODE,
442 .init = spitz_ohci_init, 503 .init = spitz_ohci_init,
504 .flags = ENABLE_PORT_ALL | NO_OC_PROTECTION,
443 .power_budget = 150, 505 .power_budget = 150,
444}; 506};
445 507
@@ -447,29 +509,50 @@ static struct pxaohci_platform_data spitz_ohci_platform_data = {
447/* 509/*
448 * Irda 510 * Irda
449 */ 511 */
512static int spitz_irda_startup(struct device *dev)
513{
514 int rc;
515
516 rc = gpio_request(SPITZ_GPIO_IR_ON, "IrDA on");
517 if (rc)
518 goto err;
519
520 rc = gpio_direction_output(SPITZ_GPIO_IR_ON, 1);
521 if (rc)
522 goto err_dir;
523
524 return 0;
525
526err_dir:
527 gpio_free(SPITZ_GPIO_IR_ON);
528err:
529 return rc;
530}
531
532static void spitz_irda_shutdown(struct device *dev)
533{
534 gpio_free(SPITZ_GPIO_IR_ON);
535}
536
450static void spitz_irda_transceiver_mode(struct device *dev, int mode) 537static void spitz_irda_transceiver_mode(struct device *dev, int mode)
451{ 538{
452 if (mode & IR_OFF) 539 gpio_set_value(SPITZ_GPIO_IR_ON, mode & IR_OFF);
453 set_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_IR_ON);
454 else
455 reset_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_IR_ON);
456 pxa2xx_transceiver_mode(dev, mode); 540 pxa2xx_transceiver_mode(dev, mode);
457} 541}
458 542
459#ifdef CONFIG_MACH_AKITA 543#ifdef CONFIG_MACH_AKITA
460static void akita_irda_transceiver_mode(struct device *dev, int mode) 544static void akita_irda_transceiver_mode(struct device *dev, int mode)
461{ 545{
462 if (mode & IR_OFF) 546 gpio_set_value(AKITA_GPIO_IR_ON, mode & IR_OFF);
463 akita_set_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_IR_ON);
464 else
465 akita_reset_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_IR_ON);
466 pxa2xx_transceiver_mode(dev, mode); 547 pxa2xx_transceiver_mode(dev, mode);
467} 548}
468#endif 549#endif
469 550
470static struct pxaficp_platform_data spitz_ficp_platform_data = { 551static struct pxaficp_platform_data spitz_ficp_platform_data = {
471 .transceiver_cap = IR_SIRMODE | IR_OFF, 552 .transceiver_cap = IR_SIRMODE | IR_OFF,
472 .transceiver_mode = spitz_irda_transceiver_mode, 553 .transceiver_mode = spitz_irda_transceiver_mode,
554 .startup = spitz_irda_startup,
555 .shutdown = spitz_irda_shutdown,
473}; 556};
474 557
475 558
@@ -477,14 +560,6 @@ static struct pxaficp_platform_data spitz_ficp_platform_data = {
477 * Spitz PXA Framebuffer 560 * Spitz PXA Framebuffer
478 */ 561 */
479 562
480static void spitz_lcd_power(int on, struct fb_var_screeninfo *var)
481{
482 if (on)
483 corgi_lcdtg_hw_init(var->xres);
484 else
485 corgi_lcdtg_suspend();
486}
487
488static struct pxafb_mode_info spitz_pxafb_modes[] = { 563static struct pxafb_mode_info spitz_pxafb_modes[] = {
489{ 564{
490 .pixclock = 19231, 565 .pixclock = 19231,
@@ -517,18 +592,13 @@ static struct pxafb_mach_info spitz_pxafb_info = {
517 .modes = &spitz_pxafb_modes[0], 592 .modes = &spitz_pxafb_modes[0],
518 .num_modes = 2, 593 .num_modes = 2,
519 .fixed_modes = 1, 594 .fixed_modes = 1,
520 .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act | LCCR0_LDDALT | LCCR0_OUC | LCCR0_CMDIM | LCCR0_RDSTM, 595 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_ALTERNATE_MAPPING,
521 .lccr3 = LCCR3_PixRsEdg | LCCR3_OutEnH,
522 .pxafb_lcd_power = spitz_lcd_power,
523}; 596};
524 597
525 598
526static struct platform_device *devices[] __initdata = { 599static struct platform_device *devices[] __initdata = {
527 &spitzscoop_device, 600 &spitzscoop_device,
528 &spitzssp_device,
529 &spitzkbd_device, 601 &spitzkbd_device,
530 &spitzts_device,
531 &spitzbl_device,
532 &spitzled_device, 602 &spitzled_device,
533}; 603};
534 604
@@ -548,63 +618,32 @@ static void spitz_restart(char mode)
548 618
549static void __init common_init(void) 619static void __init common_init(void)
550{ 620{
551 init_gpio_reset(SPITZ_GPIO_ON_RESET); 621 init_gpio_reset(SPITZ_GPIO_ON_RESET, 1);
552 pm_power_off = spitz_poweroff; 622 pm_power_off = spitz_poweroff;
553 arm_pm_restart = spitz_restart; 623 arm_pm_restart = spitz_restart;
554 624
555 PMCR = 0x00; 625 PMCR = 0x00;
556 626
557 /* setup sleep mode values */
558 PWER = 0x00000002;
559 PFER = 0x00000000;
560 PRER = 0x00000002;
561 PGSR0 = 0x0158C000;
562 PGSR1 = 0x00FF0080;
563 PGSR2 = 0x0001C004;
564
565 /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */ 627 /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */
566 PCFR |= PCFR_OPDE; 628 PCFR |= PCFR_OPDE;
567 629
568 corgi_ssp_set_machinfo(&spitz_ssp_machinfo); 630 pxa2xx_mfp_config(ARRAY_AND_SIZE(spitz_pin_config));
569 631
570 pxa_gpio_mode(SPITZ_GPIO_HSYNC | GPIO_IN); 632 spitz_init_spi();
571 633
572 platform_add_devices(devices, ARRAY_SIZE(devices)); 634 platform_add_devices(devices, ARRAY_SIZE(devices));
573 pxa_set_mci_info(&spitz_mci_platform_data); 635 pxa_set_mci_info(&spitz_mci_platform_data);
574 pxa_set_ohci_info(&spitz_ohci_platform_data); 636 pxa_set_ohci_info(&spitz_ohci_platform_data);
575 pxa_set_ficp_info(&spitz_ficp_platform_data); 637 pxa_set_ficp_info(&spitz_ficp_platform_data);
576 set_pxa_fb_parent(&spitzssp_device.dev);
577 set_pxa_fb_info(&spitz_pxafb_info); 638 set_pxa_fb_info(&spitz_pxafb_info);
578 pxa_set_i2c_info(NULL); 639 pxa_set_i2c_info(NULL);
579} 640}
580 641
581#if defined(CONFIG_MACH_SPITZ) || defined(CONFIG_MACH_BORZOI) 642#if defined(CONFIG_MACH_SPITZ) || defined(CONFIG_MACH_BORZOI)
582static void spitz_bl_set_intensity(int intensity)
583{
584 if (intensity > 0x10)
585 intensity += 0x10;
586
587 /* Bits 0-4 are accessed via the SSP interface */
588 corgi_ssp_blduty_set(intensity & 0x1f);
589
590 /* Bit 5 is via SCOOP */
591 if (intensity & 0x0020)
592 reset_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_BACKLIGHT_CONT);
593 else
594 set_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_BACKLIGHT_CONT);
595
596 if (intensity)
597 set_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_BACKLIGHT_ON);
598 else
599 reset_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_BACKLIGHT_ON);
600}
601
602static void __init spitz_init(void) 643static void __init spitz_init(void)
603{ 644{
604 platform_scoop_config = &spitz_pcmcia_config; 645 platform_scoop_config = &spitz_pcmcia_config;
605 646
606 spitz_bl_machinfo.set_bl_intensity = spitz_bl_set_intensity;
607
608 common_init(); 647 common_init();
609 648
610 platform_device_register(&spitzscoop2_device); 649 platform_device_register(&spitzscoop2_device);
@@ -615,32 +654,17 @@ static void __init spitz_init(void)
615/* 654/*
616 * Akita IO Expander 655 * Akita IO Expander
617 */ 656 */
618struct platform_device akitaioexp_device = { 657static struct pca953x_platform_data akita_ioexp = {
619 .name = "akita-ioexp", 658 .gpio_base = AKITA_IOEXP_GPIO_BASE,
620 .id = -1,
621}; 659};
622 660
623EXPORT_SYMBOL_GPL(akitaioexp_device); 661static struct i2c_board_info akita_i2c_board_info[] = {
624 662 {
625static void akita_bl_set_intensity(int intensity) 663 .type = "max7310",
626{ 664 .addr = 0x18,
627 if (intensity > 0x10) 665 .platform_data = &akita_ioexp,
628 intensity += 0x10; 666 },
629 667};
630 /* Bits 0-4 are accessed via the SSP interface */
631 corgi_ssp_blduty_set(intensity & 0x1f);
632
633 /* Bit 5 is via IO-Expander */
634 if (intensity & 0x0020)
635 akita_reset_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_BACKLIGHT_CONT);
636 else
637 akita_set_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_BACKLIGHT_CONT);
638
639 if (intensity)
640 akita_set_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_BACKLIGHT_ON);
641 else
642 akita_reset_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_BACKLIGHT_ON);
643}
644 668
645static void __init akita_init(void) 669static void __init akita_init(void)
646{ 670{
@@ -649,11 +673,10 @@ static void __init akita_init(void)
649 /* We just pretend the second element of the array doesn't exist */ 673 /* We just pretend the second element of the array doesn't exist */
650 spitz_pcmcia_config.num_devs = 1; 674 spitz_pcmcia_config.num_devs = 1;
651 platform_scoop_config = &spitz_pcmcia_config; 675 platform_scoop_config = &spitz_pcmcia_config;
652 spitz_bl_machinfo.set_bl_intensity = akita_bl_set_intensity;
653 676
654 platform_device_register(&akitaioexp_device); 677 pxa_set_i2c_info(NULL);
678 i2c_register_board_info(0, ARRAY_AND_SIZE(akita_i2c_board_info));
655 679
656 spitzscoop_device.dev.parent = &akitaioexp_device.dev;
657 common_init(); 680 common_init();
658} 681}
659#endif 682#endif
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c
index 8a40505dfd28..53018db106ac 100644
--- a/arch/arm/mach-pxa/spitz_pm.c
+++ b/arch/arm/mach-pxa/spitz_pm.c
@@ -21,7 +21,6 @@
21#include <asm/irq.h> 21#include <asm/irq.h>
22#include <asm/mach-types.h> 22#include <asm/mach-types.h>
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24#include <asm/hardware/scoop.h>
25 24
26#include <mach/sharpsl.h> 25#include <mach/sharpsl.h>
27#include <mach/spitz.h> 26#include <mach/spitz.h>
@@ -48,44 +47,35 @@ static void spitz_charger_init(void)
48 47
49static void spitz_measure_temp(int on) 48static void spitz_measure_temp(int on)
50{ 49{
51 if (on) 50 gpio_set_value(SPITZ_GPIO_ADC_TEMP_ON, on);
52 set_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_ADC_TEMP_ON);
53 else
54 reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_ADC_TEMP_ON);
55} 51}
56 52
57static void spitz_charge(int on) 53static void spitz_charge(int on)
58{ 54{
59 if (on) { 55 if (on) {
60 if (sharpsl_pm.flags & SHARPSL_SUSPENDED) { 56 if (sharpsl_pm.flags & SHARPSL_SUSPENDED) {
61 set_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_JK_B); 57 gpio_set_value(SPITZ_GPIO_JK_B, 1);
62 reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_CHRG_ON); 58 gpio_set_value(SPITZ_GPIO_CHRG_ON, 0);
63 } else { 59 } else {
64 reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_JK_B); 60 gpio_set_value(SPITZ_GPIO_JK_B, 0);
65 reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_CHRG_ON); 61 gpio_set_value(SPITZ_GPIO_CHRG_ON, 0);
66 } 62 }
67 } else { 63 } else {
68 reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_JK_B); 64 gpio_set_value(SPITZ_GPIO_JK_B, 0);
69 set_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_CHRG_ON); 65 gpio_set_value(SPITZ_GPIO_CHRG_ON, 1);
70 } 66 }
71} 67}
72 68
73static void spitz_discharge(int on) 69static void spitz_discharge(int on)
74{ 70{
75 if (on) 71 gpio_set_value(SPITZ_GPIO_JK_A, on);
76 set_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_JK_A);
77 else
78 reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_JK_A);
79} 72}
80 73
81/* HACK - For unknown reasons, accurate voltage readings are only made with a load 74/* HACK - For unknown reasons, accurate voltage readings are only made with a load
82 on the power bus which the green led on spitz provides */ 75 on the power bus which the green led on spitz provides */
83static void spitz_discharge1(int on) 76static void spitz_discharge1(int on)
84{ 77{
85 if (on) 78 gpio_set_value(SPITZ_GPIO_LED_GREEN, on);
86 set_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_LED_GREEN);
87 else
88 reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_LED_GREEN);
89} 79}
90 80
91static void spitz_presuspend(void) 81static void spitz_presuspend(void)
diff --git a/arch/arm/mach-pxa/ssp.c b/arch/arm/mach-pxa/ssp.c
index 9bd93c5f28b2..2c31ec725688 100644
--- a/arch/arm/mach-pxa/ssp.c
+++ b/arch/arm/mach-pxa/ssp.c
@@ -28,8 +28,8 @@
28#include <linux/clk.h> 28#include <linux/clk.h>
29#include <linux/err.h> 29#include <linux/err.h>
30#include <linux/platform_device.h> 30#include <linux/platform_device.h>
31#include <linux/io.h>
31 32
32#include <asm/io.h>
33#include <asm/irq.h> 33#include <asm/irq.h>
34#include <mach/hardware.h> 34#include <mach/hardware.h>
35#include <mach/ssp.h> 35#include <mach/ssp.h>
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c
index b0d6b32654cf..f8a9a62959e5 100644
--- a/arch/arm/mach-pxa/time.c
+++ b/arch/arm/mach-pxa/time.c
@@ -155,7 +155,7 @@ static void __init pxa_timer_init(void)
155 OIER = 0; 155 OIER = 0;
156 OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3; 156 OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3;
157 157
158 if (cpu_is_pxa21x() || cpu_is_pxa25x()) 158 if (cpu_is_pxa25x())
159 clock_tick_rate = 3686400; 159 clock_tick_rate = 3686400;
160 else if (machine_is_mainstone()) 160 else if (machine_is_mainstone())
161 clock_tick_rate = 3249600; 161 clock_tick_rate = 3249600;
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 9f3ef9eb32e3..130e37e4ebdd 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -781,7 +781,7 @@ static void __init tosa_init(void)
781 gpio_set_wake(MFP_PIN_GPIO1, 1); 781 gpio_set_wake(MFP_PIN_GPIO1, 1);
782 /* We can't pass to gpio-keys since it will drop the Reset altfunc */ 782 /* We can't pass to gpio-keys since it will drop the Reset altfunc */
783 783
784 init_gpio_reset(TOSA_GPIO_ON_RESET); 784 init_gpio_reset(TOSA_GPIO_ON_RESET, 0);
785 785
786 pm_power_off = tosa_poweroff; 786 pm_power_off = tosa_poweroff;
787 arm_pm_restart = tosa_restart; 787 arm_pm_restart = tosa_restart;
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c
index 3ed757e6bcc8..a13dbf3c2c05 100644
--- a/arch/arm/mach-pxa/trizeps4.c
+++ b/arch/arm/mach-pxa/trizeps4.c
@@ -22,8 +22,8 @@
22#include <linux/fb.h> 22#include <linux/fb.h>
23#include <linux/ioport.h> 23#include <linux/ioport.h>
24#include <linux/delay.h> 24#include <linux/delay.h>
25#include <linux/serial_8250.h> 25#include <linux/gpio.h>
26#include <linux/mtd/mtd.h> 26#include <linux/dm9000.h>
27#include <linux/mtd/physmap.h> 27#include <linux/mtd/physmap.h>
28#include <linux/mtd/partitions.h> 28#include <linux/mtd/partitions.h>
29 29
@@ -31,7 +31,6 @@
31#include <asm/setup.h> 31#include <asm/setup.h>
32#include <asm/memory.h> 32#include <asm/memory.h>
33#include <asm/mach-types.h> 33#include <asm/mach-types.h>
34#include <mach/hardware.h>
35#include <asm/irq.h> 34#include <asm/irq.h>
36#include <asm/sizes.h> 35#include <asm/sizes.h>
37 36
@@ -40,41 +39,148 @@
40#include <asm/mach/irq.h> 39#include <asm/mach/irq.h>
41#include <asm/mach/flash.h> 40#include <asm/mach/flash.h>
42 41
42#include <mach/hardware.h>
43#include <mach/pxa-regs.h> 43#include <mach/pxa-regs.h>
44#include <mach/pxa2xx-regs.h> 44#include <mach/pxa2xx-regs.h>
45#include <mach/pxa2xx-gpio.h> 45#include <mach/mfp-pxa27x.h>
46#include <mach/pxa2xx_spi.h>
46#include <mach/trizeps4.h> 47#include <mach/trizeps4.h>
47#include <mach/audio.h> 48#include <mach/audio.h>
48#include <mach/pxafb.h> 49#include <mach/pxafb.h>
49#include <mach/mmc.h> 50#include <mach/mmc.h>
50#include <mach/irda.h> 51#include <mach/irda.h>
51#include <mach/ohci.h> 52#include <mach/ohci.h>
53#include <mach/i2c.h>
52 54
53#include "generic.h" 55#include "generic.h"
54#include "devices.h" 56#include "devices.h"
55 57
56/******************************************************************************************** 58/* comment out the following line if you want to use the
59 * Standard UART from PXA for serial / irda transmission
60 * and acivate it if you have status leds connected */
61#define STATUS_LEDS_ON_STUART_PINS 1
62
63/*****************************************************************************
64 * MultiFunctionPins of CPU
65 *****************************************************************************/
66static unsigned long trizeps4_pin_config[] __initdata = {
67 /* Chip Selects */
68 GPIO15_nCS_1, /* DiskOnChip CS */
69 GPIO93_GPIO, /* TRIZEPS4_DOC_IRQ */
70 GPIO94_GPIO, /* DOC lock */
71
72 GPIO78_nCS_2, /* DM9000 CS */
73 GPIO101_GPIO, /* TRIZEPS4_ETH_IRQ */
74
75 GPIO79_nCS_3, /* Logic CS */
76 GPIO0_GPIO | WAKEUP_ON_EDGE_RISE, /* Logic irq */
77
78 /* LCD - 16bpp Active TFT */
79 GPIO58_LCD_LDD_0,
80 GPIO59_LCD_LDD_1,
81 GPIO60_LCD_LDD_2,
82 GPIO61_LCD_LDD_3,
83 GPIO62_LCD_LDD_4,
84 GPIO63_LCD_LDD_5,
85 GPIO64_LCD_LDD_6,
86 GPIO65_LCD_LDD_7,
87 GPIO66_LCD_LDD_8,
88 GPIO67_LCD_LDD_9,
89 GPIO68_LCD_LDD_10,
90 GPIO69_LCD_LDD_11,
91 GPIO70_LCD_LDD_12,
92 GPIO71_LCD_LDD_13,
93 GPIO72_LCD_LDD_14,
94 GPIO73_LCD_LDD_15,
95 GPIO74_LCD_FCLK,
96 GPIO75_LCD_LCLK,
97 GPIO76_LCD_PCLK,
98 GPIO77_LCD_BIAS,
99
100 /* UART */
101 GPIO9_FFUART_CTS,
102 GPIO10_FFUART_DCD,
103 GPIO16_FFUART_TXD,
104 GPIO33_FFUART_DSR,
105 GPIO38_FFUART_RI,
106 GPIO82_FFUART_DTR,
107 GPIO83_FFUART_RTS,
108 GPIO96_FFUART_RXD,
109
110 GPIO42_BTUART_RXD,
111 GPIO43_BTUART_TXD,
112 GPIO44_BTUART_CTS,
113 GPIO45_BTUART_RTS,
114#ifdef STATUS_LEDS_ON_STUART_PINS
115 GPIO46_GPIO,
116 GPIO47_GPIO,
117#else
118 GPIO46_STUART_RXD,
119 GPIO47_STUART_TXD,
120#endif
121 /* PCMCIA */
122 GPIO11_GPIO, /* TRIZEPS4_CD_IRQ */
123 GPIO13_GPIO, /* TRIZEPS4_READY_NINT */
124 GPIO48_nPOE,
125 GPIO49_nPWE,
126 GPIO50_nPIOR,
127 GPIO51_nPIOW,
128 GPIO54_nPCE_2,
129 GPIO55_nPREG,
130 GPIO56_nPWAIT,
131 GPIO57_nIOIS16,
132 GPIO102_nPCE_1,
133 GPIO104_PSKTSEL,
134
135 /* MultiMediaCard */
136 GPIO32_MMC_CLK,
137 GPIO92_MMC_DAT_0,
138 GPIO109_MMC_DAT_1,
139 GPIO110_MMC_DAT_2,
140 GPIO111_MMC_DAT_3,
141 GPIO112_MMC_CMD,
142 GPIO12_GPIO, /* TRIZEPS4_MMC_IRQ */
143
144 /* USB OHCI */
145 GPIO88_USBH1_PWR, /* USBHPWR1 */
146 GPIO89_USBH1_PEN, /* USBHPEN1 */
147
148 /* I2C */
149 GPIO117_I2C_SCL,
150 GPIO118_I2C_SDA,
151};
152
153static unsigned long trizeps4wl_pin_config[] __initdata = {
154 /* SSP 2 */
155 GPIO14_SSP2_SFRM,
156 GPIO19_SSP2_SCLK,
157 GPIO53_GPIO, /* TRIZEPS4_SPI_IRQ */
158 GPIO86_SSP2_RXD,
159 GPIO87_SSP2_TXD,
160};
161
162/****************************************************************************
57 * ONBOARD FLASH 163 * ONBOARD FLASH
58 ********************************************************************************************/ 164 ****************************************************************************/
59static struct mtd_partition trizeps4_partitions[] = { 165static struct mtd_partition trizeps4_partitions[] = {
60 { 166 {
61 .name = "Bootloader", 167 .name = "Bootloader",
62 .offset = 0x00000000, 168 .offset = 0x00000000,
63 .size = 0x00040000, 169 .size = 0x00040000,
64 .mask_flags = MTD_WRITEABLE /* force read-only */ 170 .mask_flags = MTD_WRITEABLE /* force read-only */
65 },{ 171 }, {
66 .name = "Backup", 172 .name = "Backup",
67 .offset = 0x00040000, 173 .offset = 0x00040000,
68 .size = 0x00040000, 174 .size = 0x00040000,
69 },{ 175 }, {
70 .name = "Image", 176 .name = "Image",
71 .offset = 0x00080000, 177 .offset = 0x00080000,
72 .size = 0x01080000, 178 .size = 0x01080000,
73 },{ 179 }, {
74 .name = "IPSM", 180 .name = "IPSM",
75 .offset = 0x01100000, 181 .offset = 0x01100000,
76 .size = 0x00e00000, 182 .size = 0x00e00000,
77 },{ 183 }, {
78 .name = "Registry", 184 .name = "Registry",
79 .offset = 0x01f00000, 185 .offset = 0x01f00000,
80 .size = MTDPART_SIZ_FULL, 186 .size = MTDPART_SIZ_FULL,
@@ -105,9 +211,9 @@ static struct platform_device flash_device = {
105 .num_resources = 1, 211 .num_resources = 1,
106}; 212};
107 213
108/******************************************************************************************** 214/****************************************************************************
109 * DAVICOM DM9000 Ethernet 215 * DAVICOM DM9000 Ethernet
110 ********************************************************************************************/ 216 ****************************************************************************/
111static struct resource dm9000_resources[] = { 217static struct resource dm9000_resources[] = {
112 [0] = { 218 [0] = {
113 .start = TRIZEPS4_ETH_PHYS+0x300, 219 .start = TRIZEPS4_ETH_PHYS+0x300,
@@ -122,67 +228,68 @@ static struct resource dm9000_resources[] = {
122 [2] = { 228 [2] = {
123 .start = TRIZEPS4_ETH_IRQ, 229 .start = TRIZEPS4_ETH_IRQ,
124 .end = TRIZEPS4_ETH_IRQ, 230 .end = TRIZEPS4_ETH_IRQ,
125 .flags = (IORESOURCE_IRQ | IRQ_TYPE_EDGE_RISING), 231 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
126 }, 232 },
127}; 233};
128 234
235static struct dm9000_plat_data tri_dm9000_platdata = {
236 .flags = DM9000_PLATF_32BITONLY,
237};
238
129static struct platform_device dm9000_device = { 239static struct platform_device dm9000_device = {
130 .name = "dm9000", 240 .name = "dm9000",
131 .id = -1, 241 .id = -1,
132 .num_resources = ARRAY_SIZE(dm9000_resources), 242 .num_resources = ARRAY_SIZE(dm9000_resources),
133 .resource = dm9000_resources, 243 .resource = dm9000_resources,
244 .dev = {
245 .platform_data = &tri_dm9000_platdata,
246 }
134}; 247};
135 248
136/******************************************************************************************** 249/****************************************************************************
137 * PXA270 serial ports 250 * LED's on GPIO pins of PXA
138 ********************************************************************************************/ 251 ****************************************************************************/
139static struct plat_serial8250_port tri_serial_ports[] = { 252static struct gpio_led trizeps4_led[] = {
140#ifdef CONFIG_SERIAL_PXA 253#ifdef STATUS_LEDS_ON_STUART_PINS
141 /* this uses the own PXA driver */
142 { 254 {
143 0, 255 .name = "led0:orange:heartbeat", /* */
144 }, 256 .default_trigger = "heartbeat",
145#else 257 .gpio = GPIO_HEARTBEAT_LED,
146 /* this uses the generic 8520 driver */ 258 .active_low = 1,
147 [0] = {
148 .membase = (void *)&FFUART,
149 .irq = IRQ_FFUART,
150 .flags = UPF_BOOT_AUTOCONF,
151 .iotype = UPIO_MEM32,
152 .regshift = 2,
153 .uartclk = (921600*16),
154 },
155 [1] = {
156 .membase = (void *)&BTUART,
157 .irq = IRQ_BTUART,
158 .flags = UPF_BOOT_AUTOCONF,
159 .iotype = UPIO_MEM32,
160 .regshift = 2,
161 .uartclk = (921600*16),
162 }, 259 },
163 { 260 {
164 0, 261 .name = "led1:yellow:cpubusy", /* */
262 .default_trigger = "cpu-busy",
263 .gpio = GPIO_SYS_BUSY_LED,
264 .active_low = 1,
165 }, 265 },
166#endif 266#endif
167}; 267};
168 268
169static struct platform_device uart_devices = { 269static struct gpio_led_platform_data trizeps4_led_data = {
170 .name = "serial8250", 270 .leds = trizeps4_led,
171 .id = 0, 271 .num_leds = ARRAY_SIZE(trizeps4_led),
272};
273
274static struct platform_device leds_devices = {
275 .name = "leds-gpio",
276 .id = -1,
172 .dev = { 277 .dev = {
173 .platform_data = tri_serial_ports, 278 .platform_data = &trizeps4_led_data,
174 }, 279 },
175 .num_resources = 0,
176 .resource = NULL,
177}; 280};
178 281
179static struct platform_device * trizeps4_devices[] __initdata = { 282static struct platform_device *trizeps4_devices[] __initdata = {
180 &flash_device, 283 &flash_device,
181 &uart_devices,
182 &dm9000_device, 284 &dm9000_device,
285 &leds_devices,
286};
287
288static struct platform_device *trizeps4wl_devices[] __initdata = {
289 &flash_device,
290 &leds_devices,
183}; 291};
184 292
185#ifdef CONFIG_MACH_TRIZEPS4_CONXS
186static short trizeps_conxs_bcr; 293static short trizeps_conxs_bcr;
187 294
188/* PCCARD power switching supports only 3,3V */ 295/* PCCARD power switching supports only 3,3V */
@@ -192,108 +299,63 @@ void board_pcmcia_power(int power)
192 /* switch power on, put in reset and enable buffers */ 299 /* switch power on, put in reset and enable buffers */
193 trizeps_conxs_bcr |= power; 300 trizeps_conxs_bcr |= power;
194 trizeps_conxs_bcr |= ConXS_BCR_CF_RESET; 301 trizeps_conxs_bcr |= ConXS_BCR_CF_RESET;
195 trizeps_conxs_bcr &= ~(ConXS_BCR_CF_BUF_EN); 302 trizeps_conxs_bcr &= ~ConXS_BCR_CF_BUF_EN;
196 ConXS_BCR = trizeps_conxs_bcr; 303 BCR_writew(trizeps_conxs_bcr);
197 /* wait a little */ 304 /* wait a little */
198 udelay(2000); 305 udelay(2000);
199 /* take reset away */ 306 /* take reset away */
200 trizeps_conxs_bcr &= ~(ConXS_BCR_CF_RESET); 307 trizeps_conxs_bcr &= ~ConXS_BCR_CF_RESET;
201 ConXS_BCR = trizeps_conxs_bcr; 308 BCR_writew(trizeps_conxs_bcr);
202 udelay(2000); 309 udelay(2000);
203 } else { 310 } else {
204 /* put in reset */ 311 /* put in reset */
205 trizeps_conxs_bcr |= ConXS_BCR_CF_RESET; 312 trizeps_conxs_bcr |= ConXS_BCR_CF_RESET;
206 ConXS_BCR = trizeps_conxs_bcr; 313 BCR_writew(trizeps_conxs_bcr);
207 udelay(1000); 314 udelay(1000);
208 /* switch power off */ 315 /* switch power off */
209 trizeps_conxs_bcr &= ~(0xf); 316 trizeps_conxs_bcr &= ~0xf;
210 ConXS_BCR = trizeps_conxs_bcr; 317 BCR_writew(trizeps_conxs_bcr);
211
212 } 318 }
213 pr_debug("%s: o%s 0x%x\n", __func__, power ? "n": "ff", trizeps_conxs_bcr); 319 pr_debug("%s: o%s 0x%x\n", __func__, power ? "n" : "ff",
320 trizeps_conxs_bcr);
214} 321}
322EXPORT_SYMBOL(board_pcmcia_power);
215 323
216/* backlight power switching for LCD panel */ 324/* backlight power switching for LCD panel */
217static void board_backlight_power(int on) 325static void board_backlight_power(int on)
218{ 326{
219 if (on) { 327 if (on)
220 trizeps_conxs_bcr |= ConXS_BCR_L_DISP; 328 trizeps_conxs_bcr |= ConXS_BCR_L_DISP;
221 } else { 329 else
222 trizeps_conxs_bcr &= ~ConXS_BCR_L_DISP; 330 trizeps_conxs_bcr &= ~ConXS_BCR_L_DISP;
223 }
224 pr_debug("%s: o%s 0x%x\n", __func__, on ? "n" : "ff", trizeps_conxs_bcr);
225 ConXS_BCR = trizeps_conxs_bcr;
226}
227 331
228/* Powersupply for MMC/SD cardslot */ 332 pr_debug("%s: o%s 0x%x\n", __func__, on ? "n" : "ff",
229static void board_mci_power(struct device *dev, unsigned int vdd) 333 trizeps_conxs_bcr);
230{ 334 BCR_writew(trizeps_conxs_bcr);
231 struct pxamci_platform_data* p_d = dev->platform_data;
232
233 if (( 1 << vdd) & p_d->ocr_mask) {
234 pr_debug("%s: on\n", __func__);
235 /* FIXME fill in values here */
236 } else {
237 pr_debug("%s: off\n", __func__);
238 /* FIXME fill in values here */
239 }
240}
241
242static short trizeps_conxs_ircr;
243
244/* Switch modes and Power for IRDA receiver */
245static void board_irda_mode(struct device *dev, int mode)
246{
247 unsigned long flags;
248
249 local_irq_save(flags);
250 if (mode & IR_SIRMODE) {
251 /* Slow mode */
252 trizeps_conxs_ircr &= ~ConXS_IRCR_MODE;
253 } else if (mode & IR_FIRMODE) {
254 /* Fast mode */
255 trizeps_conxs_ircr |= ConXS_IRCR_MODE;
256 }
257 pxa2xx_transceiver_mode(dev, mode);
258 if (mode & IR_OFF) {
259 trizeps_conxs_ircr |= ConXS_IRCR_SD;
260 } else {
261 trizeps_conxs_ircr &= ~ConXS_IRCR_SD;
262 }
263 /* FIXME write values to register */
264 local_irq_restore(flags);
265} 335}
266 336
267#else 337/* a I2C based RTC is known on CONXS board */
268/* for other baseboards define dummies */ 338static struct i2c_board_info trizeps4_i2c_devices[] __initdata = {
269void board_pcmcia_power(int power) {;} 339 { I2C_BOARD_INFO("rtc-pcf8593", 0x51) }
270#define board_backlight_power NULL 340};
271#define board_mci_power NULL
272#define board_irda_mode NULL
273
274#endif /* CONFIG_MACH_TRIZEPS4_CONXS */
275EXPORT_SYMBOL(board_pcmcia_power);
276 341
277static int trizeps4_mci_init(struct device *dev, irq_handler_t mci_detect_int, void *data) 342/****************************************************************************
343 * MMC card slot external to module
344 ****************************************************************************/
345static int trizeps4_mci_init(struct device *dev, irq_handler_t mci_detect_int,
346 void *data)
278{ 347{
279 int err; 348 int err;
280 /* setup GPIO for PXA27x MMC controller */
281 pxa_gpio_mode(GPIO32_MMCCLK_MD);
282 pxa_gpio_mode(GPIO112_MMCCMD_MD);
283 pxa_gpio_mode(GPIO92_MMCDAT0_MD);
284 pxa_gpio_mode(GPIO109_MMCDAT1_MD);
285 pxa_gpio_mode(GPIO110_MMCDAT2_MD);
286 pxa_gpio_mode(GPIO111_MMCDAT3_MD);
287
288 pxa_gpio_mode(GPIO_MMC_DET | GPIO_IN);
289 349
290 err = request_irq(TRIZEPS4_MMC_IRQ, mci_detect_int, 350 err = request_irq(TRIZEPS4_MMC_IRQ, mci_detect_int,
291 IRQF_DISABLED | IRQF_TRIGGER_RISING, 351 IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_SAMPLE_RANDOM,
292 "MMC card detect", data); 352 "MMC card detect", data);
293 if (err) 353 if (err) {
294 printk(KERN_ERR "trizeps4_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); 354 printk(KERN_ERR "trizeps4_mci_init: MMC/SD: can't request"
295 355 "MMC card detect IRQ\n");
296 return err; 356 return -1;
357 }
358 return 0;
297} 359}
298 360
299static void trizeps4_mci_exit(struct device *dev, void *data) 361static void trizeps4_mci_exit(struct device *dev, void *data)
@@ -303,39 +365,69 @@ static void trizeps4_mci_exit(struct device *dev, void *data)
303 365
304static struct pxamci_platform_data trizeps4_mci_platform_data = { 366static struct pxamci_platform_data trizeps4_mci_platform_data = {
305 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, 367 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
368 .detect_delay = 1,
306 .init = trizeps4_mci_init, 369 .init = trizeps4_mci_init,
307 .exit = trizeps4_mci_exit, 370 .exit = trizeps4_mci_exit,
308 .setpower = board_mci_power, 371 .get_ro = NULL, /* write-protection not supported */
372 .setpower = NULL, /* power-switching not supported */
309}; 373};
310 374
311static struct pxaficp_platform_data trizeps4_ficp_platform_data = { 375/****************************************************************************
312 .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF, 376 * IRDA mode switching on stuart
313 .transceiver_mode = board_irda_mode, 377 ****************************************************************************/
314}; 378#ifndef STATUS_LEDS_ON_STUART_PINS
379static short trizeps_conxs_ircr;
315 380
316static int trizeps4_ohci_init(struct device *dev) 381static int trizeps4_irda_startup(struct device *dev)
317{ 382{
318 /* setup Port1 GPIO pin. */ 383 trizeps_conxs_ircr &= ~ConXS_IRCR_SD;
319 pxa_gpio_mode( 88 | GPIO_ALT_FN_1_IN); /* USBHPWR1 */ 384 IRCR_writew(trizeps_conxs_ircr);
320 pxa_gpio_mode( 89 | GPIO_ALT_FN_2_OUT); /* USBHPEN1 */
321
322 /* Set the Power Control Polarity Low and Power Sense
323 Polarity Low to active low. */
324 UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
325 ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE);
326
327 return 0; 385 return 0;
328} 386}
329 387
330static void trizeps4_ohci_exit(struct device *dev) 388static void trizeps4_irda_shutdown(struct device *dev)
389{
390 trizeps_conxs_ircr |= ConXS_IRCR_SD;
391 IRCR_writew(trizeps_conxs_ircr);
392}
393
394static void trizeps4_irda_transceiver_mode(struct device *dev, int mode)
331{ 395{
332 ; 396 unsigned long flags;
397
398 local_irq_save(flags);
399 /* Switch mode */
400 if (mode & IR_SIRMODE)
401 trizeps_conxs_ircr &= ~ConXS_IRCR_MODE; /* Slow mode */
402 else if (mode & IR_FIRMODE) {
403 trizeps_conxs_ircr |= ConXS_IRCR_MODE; /* Fast mode */
404
405 /* Switch power */
406 if (mode & IR_OFF)
407 trizeps_conxs_ircr |= ConXS_IRCR_SD;
408 else
409 trizeps_conxs_ircr &= ~ConXS_IRCR_SD;
410
411 IRCR_writew(trizeps_conxs_ircr);
412 local_irq_restore(flags);
413
414 pxa2xx_transceiver_mode(dev, mode);
333} 415}
334 416
417static struct pxaficp_platform_data trizeps4_ficp_platform_data = {
418 .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
419 .transceiver_mode = trizeps4_irda_transceiver_mode,
420 .startup = trizeps4_irda_startup,
421 .shutdown = trizeps4_irda_shutdown,
422};
423#endif
424
425/****************************************************************************
426 * OHCI USB port
427 ****************************************************************************/
335static struct pxaohci_platform_data trizeps4_ohci_platform_data = { 428static struct pxaohci_platform_data trizeps4_ohci_platform_data = {
336 .port_mode = PMM_PERPORT_MODE, 429 .port_mode = PMM_PERPORT_MODE,
337 .init = trizeps4_ohci_init, 430 .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
338 .exit = trizeps4_ohci_exit,
339}; 431};
340 432
341static struct map_desc trizeps4_io_desc[] __initdata = { 433static struct map_desc trizeps4_io_desc[] __initdata = {
@@ -372,105 +464,80 @@ static struct map_desc trizeps4_io_desc[] __initdata = {
372}; 464};
373 465
374static struct pxafb_mode_info sharp_lcd_mode = { 466static struct pxafb_mode_info sharp_lcd_mode = {
375 .pixclock = 78000, 467 .pixclock = 78000,
376 .xres = 640, 468 .xres = 640,
377 .yres = 480, 469 .yres = 480,
378 .bpp = 8, 470 .bpp = 8,
379 .hsync_len = 4, 471 .hsync_len = 4,
380 .left_margin = 4, 472 .left_margin = 4,
381 .right_margin = 4, 473 .right_margin = 4,
382 .vsync_len = 2, 474 .vsync_len = 2,
383 .upper_margin = 0, 475 .upper_margin = 0,
384 .lower_margin = 0, 476 .lower_margin = 0,
385 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, 477 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
386 .cmap_greyscale = 0, 478 .cmap_greyscale = 0,
387}; 479};
388 480
389static struct pxafb_mach_info sharp_lcd = { 481static struct pxafb_mach_info sharp_lcd = {
390 .modes = &sharp_lcd_mode, 482 .modes = &sharp_lcd_mode,
391 .num_modes = 1, 483 .num_modes = 1,
392 .cmap_inverse = 0, 484 .lcd_conn = LCD_COLOR_DSTN_16BPP | LCD_PCLK_EDGE_FALL,
393 .cmap_static = 0, 485 .cmap_inverse = 0,
394 .lccr0 = LCCR0_Color | LCCR0_Pas | LCCR0_Dual, 486 .cmap_static = 0,
395 .lccr3 = 0x0340ff02, 487 .pxafb_backlight_power = board_backlight_power,
396 .pxafb_backlight_power = board_backlight_power,
397}; 488};
398 489
399static struct pxafb_mode_info toshiba_lcd_mode = { 490static struct pxafb_mode_info toshiba_lcd_mode = {
400 .pixclock = 39720, 491 .pixclock = 39720,
401 .xres = 640, 492 .xres = 640,
402 .yres = 480, 493 .yres = 480,
403 .bpp = 8, 494 .bpp = 8,
404 .hsync_len = 63, 495 .hsync_len = 63,
405 .left_margin = 12, 496 .left_margin = 12,
406 .right_margin = 12, 497 .right_margin = 12,
407 .vsync_len = 4, 498 .vsync_len = 4,
408 .upper_margin = 32, 499 .upper_margin = 32,
409 .lower_margin = 10, 500 .lower_margin = 10,
410 .sync = 0, 501 .sync = 0,
411 .cmap_greyscale = 0, 502 .cmap_greyscale = 0,
412}; 503};
413 504
414static struct pxafb_mach_info toshiba_lcd = { 505static struct pxafb_mach_info toshiba_lcd = {
415 .modes = &toshiba_lcd_mode, 506 .modes = &toshiba_lcd_mode,
416 .num_modes = 1, 507 .num_modes = 1,
417 .cmap_inverse = 0, 508 .lcd_conn = (LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL),
418 .cmap_static = 0, 509 .cmap_inverse = 0,
419 .lccr0 = LCCR0_Color | LCCR0_Act, 510 .cmap_static = 0,
420 .lccr3 = 0x03400002, 511 .pxafb_backlight_power = board_backlight_power,
421 .pxafb_backlight_power = board_backlight_power,
422}; 512};
423 513
424static void __init trizeps4_init(void) 514static void __init trizeps4_init(void)
425{ 515{
426 platform_add_devices(trizeps4_devices, ARRAY_SIZE(trizeps4_devices)); 516 pxa2xx_mfp_config(ARRAY_AND_SIZE(trizeps4_pin_config));
517 if (machine_is_trizeps4wl()) {
518 pxa2xx_mfp_config(ARRAY_AND_SIZE(trizeps4wl_pin_config));
519 platform_add_devices(trizeps4wl_devices,
520 ARRAY_SIZE(trizeps4wl_devices));
521 } else {
522 platform_add_devices(trizeps4_devices,
523 ARRAY_SIZE(trizeps4_devices));
524 }
427 525
428/* set_pxa_fb_info(&sharp_lcd); */ 526 if (0) /* dont know how to determine LCD */
429 set_pxa_fb_info(&toshiba_lcd); 527 set_pxa_fb_info(&sharp_lcd);
528 else
529 set_pxa_fb_info(&toshiba_lcd);
430 530
431 pxa_set_mci_info(&trizeps4_mci_platform_data); 531 pxa_set_mci_info(&trizeps4_mci_platform_data);
532#ifndef STATUS_LEDS_ON_STUART_PINS
432 pxa_set_ficp_info(&trizeps4_ficp_platform_data); 533 pxa_set_ficp_info(&trizeps4_ficp_platform_data);
534#endif
433 pxa_set_ohci_info(&trizeps4_ohci_platform_data); 535 pxa_set_ohci_info(&trizeps4_ohci_platform_data);
434 pxa_set_ac97_info(NULL); 536 pxa_set_ac97_info(NULL);
435} 537 pxa_set_i2c_info(NULL);
436 538 i2c_register_board_info(0, trizeps4_i2c_devices,
437static void __init trizeps4_map_io(void) 539 ARRAY_SIZE(trizeps4_i2c_devices));
438{
439 pxa_map_io();
440 iotable_init(trizeps4_io_desc, ARRAY_SIZE(trizeps4_io_desc));
441
442 /* for DiskOnChip */
443 pxa_gpio_mode(GPIO15_nCS_1_MD);
444
445 /* for off-module PIC on ConXS board */
446 pxa_gpio_mode(GPIO_PIC | GPIO_IN);
447
448 /* UCB1400 irq */
449 pxa_gpio_mode(GPIO_UCB1400 | GPIO_IN);
450
451 /* for DM9000 LAN */
452 pxa_gpio_mode(GPIO78_nCS_2_MD);
453 pxa_gpio_mode(GPIO_DM9000 | GPIO_IN);
454
455 /* for PCMCIA device */
456 pxa_gpio_mode(GPIO_PCD | GPIO_IN);
457 pxa_gpio_mode(GPIO_PRDY | GPIO_IN);
458
459 /* for I2C adapter */
460 pxa_gpio_mode(GPIO117_I2CSCL_MD);
461 pxa_gpio_mode(GPIO118_I2CSDA_MD);
462 540
463 /* MMC_DET s.o. */
464 pxa_gpio_mode(GPIO_MMC_DET | GPIO_IN);
465
466 /* whats that for ??? */
467 pxa_gpio_mode(GPIO79_nCS_3_MD);
468
469#ifdef CONFIG_LEDS
470 pxa_gpio_mode( GPIO_SYS_BUSY_LED | GPIO_OUT); /* LED1 */
471 pxa_gpio_mode( GPIO_HEARTBEAT_LED | GPIO_OUT); /* LED2 */
472#endif
473#ifdef CONFIG_MACH_TRIZEPS4_CONXS
474#ifdef CONFIG_IDE_PXA_CF 541#ifdef CONFIG_IDE_PXA_CF
475 /* if boot direct from compact flash dont disable power */ 542 /* if boot direct from compact flash dont disable power */
476 trizeps_conxs_bcr = 0x0009; 543 trizeps_conxs_bcr = 0x0009;
@@ -478,18 +545,24 @@ static void __init trizeps4_map_io(void)
478 /* this is the reset value */ 545 /* this is the reset value */
479 trizeps_conxs_bcr = 0x00A0; 546 trizeps_conxs_bcr = 0x00A0;
480#endif 547#endif
481 ConXS_BCR = trizeps_conxs_bcr; 548 BCR_writew(trizeps_conxs_bcr);
482#endif 549 board_backlight_power(1);
550}
551
552static void __init trizeps4_map_io(void)
553{
554 pxa_map_io();
555 iotable_init(trizeps4_io_desc, ARRAY_SIZE(trizeps4_io_desc));
483 556
484#warning FIXME - accessing PM registers directly is deprecated 557 if ((MSC0 & 0x8) && (BOOT_DEF & 0x1)) {
485 PWER = 0x00000002; 558 /* if flash is 16 bit wide its a Trizeps4 WL */
486 PFER = 0x00000000; 559 __machine_arch_type = MACH_TYPE_TRIZEPS4WL;
487 PRER = 0x00000002; 560 trizeps4_flash_data[0].width = 2;
488 PGSR0 = 0x0158C000; 561 } else {
489 PGSR1 = 0x00FF0080; 562 /* if flash is 32 bit wide its a Trizeps4 */
490 PGSR2 = 0x0001C004; 563 __machine_arch_type = MACH_TYPE_TRIZEPS4;
491 /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */ 564 trizeps4_flash_data[0].width = 4;
492 PCFR |= PCFR_OPDE; 565 }
493} 566}
494 567
495MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module") 568MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module")
@@ -503,3 +576,13 @@ MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module")
503 .timer = &pxa_timer, 576 .timer = &pxa_timer,
504MACHINE_END 577MACHINE_END
505 578
579MACHINE_START(TRIZEPS4WL, "Keith und Koep Trizeps IV-WL module")
580 /* MAINTAINER("Jürgen Schindele") */
581 .phys_io = 0x40000000,
582 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
583 .boot_params = TRIZEPS4_SDRAM_BASE + 0x100,
584 .init_machine = trizeps4_init,
585 .map_io = trizeps4_map_io,
586 .init_irq = pxa27x_init_irq,
587 .timer = &pxa_timer,
588MACHINE_END
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
new file mode 100644
index 000000000000..d7632f63603c
--- /dev/null
+++ b/arch/arm/mach-pxa/viper.c
@@ -0,0 +1,951 @@
1/*
2 * linux/arch/arm/mach-pxa/viper.c
3 *
4 * Support for the Arcom VIPER SBC.
5 *
6 * Author: Ian Campbell
7 * Created: Feb 03, 2003
8 * Copyright: Arcom Control Systems
9 *
10 * Maintained by Marc Zyngier <maz@misterjones.org>
11 * <marc.zyngier@altran.com>
12 *
13 * Based on lubbock.c:
14 * Author: Nicolas Pitre
15 * Created: Jun 15, 2001
16 * Copyright: MontaVista Software Inc.
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License version 2 as
20 * published by the Free Software Foundation.
21 */
22
23#include <linux/types.h>
24#include <linux/memory.h>
25#include <linux/cpu.h>
26#include <linux/cpufreq.h>
27#include <linux/delay.h>
28#include <linux/fs.h>
29#include <linux/init.h>
30#include <linux/interrupt.h>
31#include <linux/major.h>
32#include <linux/module.h>
33#include <linux/pm.h>
34#include <linux/sched.h>
35#include <linux/gpio.h>
36#include <linux/i2c-gpio.h>
37#include <linux/serial_8250.h>
38#include <linux/smc91x.h>
39#include <linux/pwm_backlight.h>
40#include <linux/usb/isp116x.h>
41#include <linux/mtd/mtd.h>
42#include <linux/mtd/partitions.h>
43#include <linux/mtd/physmap.h>
44
45#include <mach/pxa-regs.h>
46#include <mach/pxa2xx-regs.h>
47#include <mach/bitfield.h>
48#include <mach/audio.h>
49#include <mach/pxafb.h>
50#include <mach/mfp-pxa25x.h>
51#include <mach/i2c.h>
52#include <mach/viper.h>
53
54#include <asm/setup.h>
55#include <asm/mach-types.h>
56#include <asm/irq.h>
57#include <asm/sizes.h>
58
59#include <asm/mach/arch.h>
60#include <asm/mach/map.h>
61#include <asm/mach/irq.h>
62
63#include "generic.h"
64#include "devices.h"
65
66static unsigned int icr;
67
68static void viper_icr_set_bit(unsigned int bit)
69{
70 icr |= bit;
71 VIPER_ICR = icr;
72}
73
74static void viper_icr_clear_bit(unsigned int bit)
75{
76 icr &= ~bit;
77 VIPER_ICR = icr;
78}
79
80/* This function is used from the pcmcia module to reset the CF */
81void viper_cf_rst(int state)
82{
83 if (state)
84 viper_icr_set_bit(VIPER_ICR_CF_RST);
85 else
86 viper_icr_clear_bit(VIPER_ICR_CF_RST);
87}
88EXPORT_SYMBOL(viper_cf_rst);
89
90/*
91 * The CPLD version register was not present on VIPER boards prior to
92 * v2i1. On v1 boards where the version register is not present we
93 * will just read back the previous value from the databus.
94 *
95 * Therefore we do two reads. The first time we write 0 to the
96 * (read-only) register before reading and the second time we write
97 * 0xff first. If the two reads do not match or they read back as 0xff
98 * or 0x00 then we have version 1 hardware.
99 */
100static u8 viper_hw_version(void)
101{
102 u8 v1, v2;
103 unsigned long flags;
104
105 local_irq_save(flags);
106
107 VIPER_VERSION = 0;
108 v1 = VIPER_VERSION;
109 VIPER_VERSION = 0xff;
110 v2 = VIPER_VERSION;
111
112 v1 = (v1 != v2 || v1 == 0xff) ? 0 : v1;
113
114 local_irq_restore(flags);
115 return v1;
116}
117
118/* CPU sysdev */
119static int viper_cpu_suspend(struct sys_device *sysdev, pm_message_t state)
120{
121 viper_icr_set_bit(VIPER_ICR_R_DIS);
122 return 0;
123}
124
125static int viper_cpu_resume(struct sys_device *sysdev)
126{
127 viper_icr_clear_bit(VIPER_ICR_R_DIS);
128 return 0;
129}
130
131static struct sysdev_driver viper_cpu_sysdev_driver = {
132 .suspend = viper_cpu_suspend,
133 .resume = viper_cpu_resume,
134};
135
136static unsigned int current_voltage_divisor;
137
138/*
139 * If force is not true then step from existing to new divisor. If
140 * force is true then jump straight to the new divisor. Stepping is
141 * used because if the jump in voltage is too large, the VCC can dip
142 * too low and the regulator cuts out.
143 *
144 * force can be used to initialize the divisor to a know state by
145 * setting the value for the current clock speed, since we are already
146 * running at that speed we know the voltage should be pretty close so
147 * the jump won't be too large
148 */
149static void viper_set_core_cpu_voltage(unsigned long khz, int force)
150{
151 int i = 0;
152 unsigned int divisor = 0;
153 const char *v;
154
155 if (khz < 200000) {
156 v = "1.0"; divisor = 0xfff;
157 } else if (khz < 300000) {
158 v = "1.1"; divisor = 0xde5;
159 } else {
160 v = "1.3"; divisor = 0x325;
161 }
162
163 pr_debug("viper: setting CPU core voltage to %sV at %d.%03dMHz\n",
164 v, (int)khz / 1000, (int)khz % 1000);
165
166#define STEP 0x100
167 do {
168 int step;
169
170 if (force)
171 step = divisor;
172 else if (current_voltage_divisor < divisor - STEP)
173 step = current_voltage_divisor + STEP;
174 else if (current_voltage_divisor > divisor + STEP)
175 step = current_voltage_divisor - STEP;
176 else
177 step = divisor;
178 force = 0;
179
180 gpio_set_value(VIPER_PSU_CLK_GPIO, 0);
181 gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0);
182
183 for (i = 1 << 11 ; i > 0 ; i >>= 1) {
184 udelay(1);
185
186 gpio_set_value(VIPER_PSU_DATA_GPIO, step & i);
187 udelay(1);
188
189 gpio_set_value(VIPER_PSU_CLK_GPIO, 1);
190 udelay(1);
191
192 gpio_set_value(VIPER_PSU_CLK_GPIO, 0);
193 }
194 udelay(1);
195
196 gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 1);
197 udelay(1);
198
199 gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0);
200
201 current_voltage_divisor = step;
202 } while (current_voltage_divisor != divisor);
203}
204
205/* Interrupt handling */
206static unsigned long viper_irq_enabled_mask;
207
208static void viper_ack_irq(unsigned int irq)
209{
210 int viper_irq = irq - PXA_ISA_IRQ(0);
211
212 if (viper_irq < 8)
213 VIPER_LO_IRQ_STATUS = 1 << viper_irq;
214 else
215 VIPER_HI_IRQ_STATUS = 1 << (viper_irq - 8);
216}
217
218static void viper_mask_irq(unsigned int irq)
219{
220 viper_irq_enabled_mask &= ~(1 << (irq - PXA_ISA_IRQ(0)));
221}
222
223static void viper_unmask_irq(unsigned int irq)
224{
225 viper_irq_enabled_mask |= (1 << (irq - PXA_ISA_IRQ(0)));
226}
227
228static inline unsigned long viper_irq_pending(void)
229{
230 return (VIPER_HI_IRQ_STATUS << 8 | VIPER_LO_IRQ_STATUS) &
231 viper_irq_enabled_mask;
232}
233
234static void viper_irq_handler(unsigned int irq, struct irq_desc *desc)
235{
236 unsigned long pending;
237
238 pending = viper_irq_pending();
239 do {
240 if (likely(pending)) {
241 irq = PXA_ISA_IRQ(0) + __ffs(pending);
242 generic_handle_irq(irq);
243 }
244 pending = viper_irq_pending();
245 } while (pending);
246}
247
248static struct irq_chip viper_irq_chip = {
249 .name = "ISA",
250 .ack = viper_ack_irq,
251 .mask = viper_mask_irq,
252 .unmask = viper_unmask_irq
253};
254
255static void __init viper_init_irq(void)
256{
257 const int isa_irqs[] = { 3, 4, 5, 6, 7, 10, 11, 12, 9, 14, 15 };
258 int irq;
259 int isa_irq;
260
261 pxa25x_init_irq();
262
263 /* setup ISA IRQs */
264 for (irq = 0; irq < ARRAY_SIZE(isa_irqs); irq++) {
265 isa_irq = isa_irqs[irq];
266 set_irq_chip(isa_irq, &viper_irq_chip);
267 set_irq_handler(isa_irq, handle_edge_irq);
268 set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE);
269 }
270
271 set_irq_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO),
272 viper_irq_handler);
273 set_irq_type(gpio_to_irq(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH);
274
275#ifndef CONFIG_SERIAL_PXA
276 /*
277 * 8250 doesn't support IRQ_TYPE being passed as part
278 * of the plat_serial8250_port structure...
279 */
280 set_irq_type(gpio_to_irq(VIPER_UARTA_GPIO), IRQ_TYPE_EDGE_RISING);
281 set_irq_type(gpio_to_irq(VIPER_UARTB_GPIO), IRQ_TYPE_EDGE_RISING);
282#endif
283}
284
285/* Flat Panel */
286static struct pxafb_mode_info fb_mode_info[] = {
287 {
288 .pixclock = 157500,
289
290 .xres = 320,
291 .yres = 240,
292
293 .bpp = 16,
294
295 .hsync_len = 63,
296 .left_margin = 7,
297 .right_margin = 13,
298
299 .vsync_len = 20,
300 .upper_margin = 0,
301 .lower_margin = 0,
302
303 .sync = 0,
304 },
305};
306
307static struct pxafb_mach_info fb_info = {
308 .modes = fb_mode_info,
309 .num_modes = 1,
310 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
311};
312
313static int viper_backlight_init(struct device *dev)
314{
315 int ret;
316
317 /* GPIO9 and 10 control FB backlight. Initialise to off */
318 ret = gpio_request(VIPER_BCKLIGHT_EN_GPIO, "Backlight");
319 if (ret)
320 goto err_request_bckl;
321
322 ret = gpio_request(VIPER_LCD_EN_GPIO, "LCD");
323 if (ret)
324 goto err_request_lcd;
325
326 ret = gpio_direction_output(VIPER_BCKLIGHT_EN_GPIO, 0);
327 if (ret)
328 goto err_dir;
329
330 ret = gpio_direction_output(VIPER_LCD_EN_GPIO, 0);
331 if (ret)
332 goto err_dir;
333
334 return 0;
335
336err_dir:
337 gpio_free(VIPER_LCD_EN_GPIO);
338err_request_lcd:
339 gpio_free(VIPER_BCKLIGHT_EN_GPIO);
340err_request_bckl:
341 dev_err(dev, "Failed to setup LCD GPIOs\n");
342
343 return ret;
344}
345
346static int viper_backlight_notify(int brightness)
347{
348 gpio_set_value(VIPER_LCD_EN_GPIO, !!brightness);
349 gpio_set_value(VIPER_BCKLIGHT_EN_GPIO, !!brightness);
350
351 return brightness;
352}
353
354static void viper_backlight_exit(struct device *dev)
355{
356 gpio_free(VIPER_LCD_EN_GPIO);
357 gpio_free(VIPER_BCKLIGHT_EN_GPIO);
358}
359
360static struct platform_pwm_backlight_data viper_backlight_data = {
361 .pwm_id = 0,
362 .max_brightness = 100,
363 .dft_brightness = 100,
364 .pwm_period_ns = 1000000,
365 .init = viper_backlight_init,
366 .notify = viper_backlight_notify,
367 .exit = viper_backlight_exit,
368};
369
370static struct platform_device viper_backlight_device = {
371 .name = "pwm-backlight",
372 .dev = {
373 .parent = &pxa25x_device_pwm0.dev,
374 .platform_data = &viper_backlight_data,
375 },
376};
377
378/* Ethernet */
379static struct resource smc91x_resources[] = {
380 [0] = {
381 .name = "smc91x-regs",
382 .start = VIPER_ETH_PHYS + 0x300,
383 .end = VIPER_ETH_PHYS + 0x30f,
384 .flags = IORESOURCE_MEM,
385 },
386 [1] = {
387 .start = gpio_to_irq(VIPER_ETH_GPIO),
388 .end = gpio_to_irq(VIPER_ETH_GPIO),
389 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
390 },
391 [2] = {
392 .name = "smc91x-data32",
393 .start = VIPER_ETH_DATA_PHYS,
394 .end = VIPER_ETH_DATA_PHYS + 3,
395 .flags = IORESOURCE_MEM,
396 },
397};
398
399static struct smc91x_platdata viper_smc91x_info = {
400 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
401 .leda = RPC_LED_100_10,
402 .ledb = RPC_LED_TX_RX,
403};
404
405static struct platform_device smc91x_device = {
406 .name = "smc91x",
407 .id = -1,
408 .num_resources = ARRAY_SIZE(smc91x_resources),
409 .resource = smc91x_resources,
410 .dev = {
411 .platform_data = &viper_smc91x_info,
412 },
413};
414
415/* i2c */
416static struct i2c_gpio_platform_data i2c_bus_data = {
417 .sda_pin = VIPER_RTC_I2C_SDA_GPIO,
418 .scl_pin = VIPER_RTC_I2C_SCL_GPIO,
419 .udelay = 10,
420 .timeout = 100,
421};
422
423static struct platform_device i2c_bus_device = {
424 .name = "i2c-gpio",
425 .id = 1, /* pxa2xx-i2c is bus 0, so start at 1 */
426 .dev = {
427 .platform_data = &i2c_bus_data,
428 }
429};
430
431static struct i2c_board_info __initdata viper_i2c_devices[] = {
432 {
433 I2C_BOARD_INFO("ds1338", 0x68),
434 },
435};
436
437/*
438 * Serial configuration:
439 * You can either have the standard PXA ports driven by the PXA driver,
440 * or all the ports (PXA + 16850) driven by the 8250 driver.
441 * Choose your poison.
442 */
443
444static struct resource viper_serial_resources[] = {
445#ifndef CONFIG_SERIAL_PXA
446 {
447 .start = 0x40100000,
448 .end = 0x4010001f,
449 .flags = IORESOURCE_MEM,
450 },
451 {
452 .start = 0x40200000,
453 .end = 0x4020001f,
454 .flags = IORESOURCE_MEM,
455 },
456 {
457 .start = 0x40700000,
458 .end = 0x4070001f,
459 .flags = IORESOURCE_MEM,
460 },
461 {
462 .start = VIPER_UARTA_PHYS,
463 .end = VIPER_UARTA_PHYS + 0xf,
464 .flags = IORESOURCE_MEM,
465 },
466 {
467 .start = VIPER_UARTB_PHYS,
468 .end = VIPER_UARTB_PHYS + 0xf,
469 .flags = IORESOURCE_MEM,
470 },
471#else
472 {
473 0,
474 },
475#endif
476};
477
478static struct plat_serial8250_port serial_platform_data[] = {
479#ifndef CONFIG_SERIAL_PXA
480 /* Internal UARTs */
481 {
482 .membase = (void *)&FFUART,
483 .mapbase = __PREG(FFUART),
484 .irq = IRQ_FFUART,
485 .uartclk = 921600 * 16,
486 .regshift = 2,
487 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
488 .iotype = UPIO_MEM,
489 },
490 {
491 .membase = (void *)&BTUART,
492 .mapbase = __PREG(BTUART),
493 .irq = IRQ_BTUART,
494 .uartclk = 921600 * 16,
495 .regshift = 2,
496 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
497 .iotype = UPIO_MEM,
498 },
499 {
500 .membase = (void *)&STUART,
501 .mapbase = __PREG(STUART),
502 .irq = IRQ_STUART,
503 .uartclk = 921600 * 16,
504 .regshift = 2,
505 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
506 .iotype = UPIO_MEM,
507 },
508 /* External UARTs */
509 {
510 .mapbase = VIPER_UARTA_PHYS,
511 .irq = gpio_to_irq(VIPER_UARTA_GPIO),
512 .uartclk = 1843200,
513 .regshift = 1,
514 .iotype = UPIO_MEM,
515 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
516 UPF_SKIP_TEST,
517 },
518 {
519 .mapbase = VIPER_UARTB_PHYS,
520 .irq = gpio_to_irq(VIPER_UARTB_GPIO),
521 .uartclk = 1843200,
522 .regshift = 1,
523 .iotype = UPIO_MEM,
524 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
525 UPF_SKIP_TEST,
526 },
527#endif
528 { },
529};
530
531static struct platform_device serial_device = {
532 .name = "serial8250",
533 .id = 0,
534 .dev = {
535 .platform_data = serial_platform_data,
536 },
537 .num_resources = ARRAY_SIZE(viper_serial_resources),
538 .resource = viper_serial_resources,
539};
540
541/* USB */
542static void isp116x_delay(struct device *dev, int delay)
543{
544 ndelay(delay);
545}
546
547static struct resource isp116x_resources[] = {
548 [0] = { /* DATA */
549 .start = VIPER_USB_PHYS + 0,
550 .end = VIPER_USB_PHYS + 1,
551 .flags = IORESOURCE_MEM,
552 },
553 [1] = { /* ADDR */
554 .start = VIPER_USB_PHYS + 2,
555 .end = VIPER_USB_PHYS + 3,
556 .flags = IORESOURCE_MEM,
557 },
558 [2] = {
559 .start = gpio_to_irq(VIPER_USB_GPIO),
560 .end = gpio_to_irq(VIPER_USB_GPIO),
561 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
562 },
563};
564
565/* (DataBusWidth16|AnalogOCEnable|DREQOutputPolarity|DownstreamPort15KRSel ) */
566static struct isp116x_platform_data isp116x_platform_data = {
567 /* Enable internal resistors on downstream ports */
568 .sel15Kres = 1,
569 /* On-chip overcurrent protection */
570 .oc_enable = 1,
571 /* INT output polarity */
572 .int_act_high = 1,
573 /* INT edge or level triggered */
574 .int_edge_triggered = 0,
575
576 /* WAKEUP pin connected - NOT SUPPORTED */
577 /* .remote_wakeup_connected = 0, */
578 /* Wakeup by devices on usb bus enabled */
579 .remote_wakeup_enable = 0,
580 .delay = isp116x_delay,
581};
582
583static struct platform_device isp116x_device = {
584 .name = "isp116x-hcd",
585 .id = -1,
586 .num_resources = ARRAY_SIZE(isp116x_resources),
587 .resource = isp116x_resources,
588 .dev = {
589 .platform_data = &isp116x_platform_data,
590 },
591
592};
593
594/* MTD */
595static struct resource mtd_resources[] = {
596 [0] = { /* RedBoot config + filesystem flash */
597 .start = VIPER_FLASH_PHYS,
598 .end = VIPER_FLASH_PHYS + SZ_32M - 1,
599 .flags = IORESOURCE_MEM,
600 },
601 [1] = { /* Boot flash */
602 .start = VIPER_BOOT_PHYS,
603 .end = VIPER_BOOT_PHYS + SZ_1M - 1,
604 .flags = IORESOURCE_MEM,
605 },
606 [2] = { /*
607 * SRAM size is actually 256KB, 8bits, with a sparse mapping
608 * (each byte is on a 16bit boundary).
609 */
610 .start = _VIPER_SRAM_BASE,
611 .end = _VIPER_SRAM_BASE + SZ_512K - 1,
612 .flags = IORESOURCE_MEM,
613 },
614};
615
616static struct mtd_partition viper_boot_flash_partition = {
617 .name = "RedBoot",
618 .size = SZ_1M,
619 .offset = 0,
620 .mask_flags = MTD_WRITEABLE, /* force R/O */
621};
622
623static struct physmap_flash_data viper_flash_data[] = {
624 [0] = {
625 .width = 2,
626 .parts = NULL,
627 .nr_parts = 0,
628 },
629 [1] = {
630 .width = 2,
631 .parts = &viper_boot_flash_partition,
632 .nr_parts = 1,
633 },
634};
635
636static struct platform_device viper_mtd_devices[] = {
637 [0] = {
638 .name = "physmap-flash",
639 .id = 0,
640 .dev = {
641 .platform_data = &viper_flash_data[0],
642 },
643 .resource = &mtd_resources[0],
644 .num_resources = 1,
645 },
646 [1] = {
647 .name = "physmap-flash",
648 .id = 1,
649 .dev = {
650 .platform_data = &viper_flash_data[1],
651 },
652 .resource = &mtd_resources[1],
653 .num_resources = 1,
654 },
655};
656
657static struct platform_device *viper_devs[] __initdata = {
658 &smc91x_device,
659 &i2c_bus_device,
660 &serial_device,
661 &isp116x_device,
662 &viper_mtd_devices[0],
663 &viper_mtd_devices[1],
664 &viper_backlight_device,
665};
666
667static mfp_cfg_t viper_pin_config[] __initdata = {
668 /* Chip selects */
669 GPIO15_nCS_1,
670 GPIO78_nCS_2,
671 GPIO79_nCS_3,
672 GPIO80_nCS_4,
673 GPIO33_nCS_5,
674
675 /* FP Backlight */
676 GPIO9_GPIO, /* VIPER_BCKLIGHT_EN_GPIO */
677 GPIO10_GPIO, /* VIPER_LCD_EN_GPIO */
678 GPIO16_PWM0_OUT,
679
680 /* Ethernet PHY Ready */
681 GPIO18_RDY,
682
683 /* Serial shutdown */
684 GPIO12_GPIO | MFP_LPM_DRIVE_HIGH, /* VIPER_UART_SHDN_GPIO */
685
686 /* Compact-Flash / PC104 */
687 GPIO48_nPOE,
688 GPIO49_nPWE,
689 GPIO50_nPIOR,
690 GPIO51_nPIOW,
691 GPIO52_nPCE_1,
692 GPIO53_nPCE_2,
693 GPIO54_nPSKTSEL,
694 GPIO55_nPREG,
695 GPIO56_nPWAIT,
696 GPIO57_nIOIS16,
697 GPIO8_GPIO, /* VIPER_CF_RDY_GPIO */
698 GPIO32_GPIO, /* VIPER_CF_CD_GPIO */
699 GPIO82_GPIO, /* VIPER_CF_POWER_GPIO */
700
701 /* Integrated UPS control */
702 GPIO20_GPIO, /* VIPER_UPS_GPIO */
703
704 /* Vcc regulator control */
705 GPIO6_GPIO, /* VIPER_PSU_DATA_GPIO */
706 GPIO11_GPIO, /* VIPER_PSU_CLK_GPIO */
707 GPIO19_GPIO, /* VIPER_PSU_nCS_LD_GPIO */
708
709 /* i2c busses */
710 GPIO26_GPIO, /* VIPER_TPM_I2C_SDA_GPIO */
711 GPIO27_GPIO, /* VIPER_TPM_I2C_SCL_GPIO */
712 GPIO83_GPIO, /* VIPER_RTC_I2C_SDA_GPIO */
713 GPIO84_GPIO, /* VIPER_RTC_I2C_SCL_GPIO */
714
715 /* PC/104 Interrupt */
716 GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, /* VIPER_CPLD_GPIO */
717};
718
719static unsigned long viper_tpm;
720
721static int __init viper_tpm_setup(char *str)
722{
723 strict_strtoul(str, 10, &viper_tpm);
724 return 1;
725}
726
727__setup("tpm=", viper_tpm_setup);
728
729static void __init viper_tpm_init(void)
730{
731 struct platform_device *tpm_device;
732 struct i2c_gpio_platform_data i2c_tpm_data = {
733 .sda_pin = VIPER_TPM_I2C_SDA_GPIO,
734 .scl_pin = VIPER_TPM_I2C_SCL_GPIO,
735 .udelay = 10,
736 .timeout = 100,
737 };
738 char *errstr;
739
740 /* Allocate TPM i2c bus if requested */
741 if (!viper_tpm)
742 return;
743
744 tpm_device = platform_device_alloc("i2c-gpio", 2);
745 if (tpm_device) {
746 if (!platform_device_add_data(tpm_device,
747 &i2c_tpm_data,
748 sizeof(i2c_tpm_data))) {
749 if (platform_device_add(tpm_device)) {
750 errstr = "register TPM i2c bus";
751 goto error_free_tpm;
752 }
753 } else {
754 errstr = "allocate TPM i2c bus data";
755 goto error_free_tpm;
756 }
757 } else {
758 errstr = "allocate TPM i2c device";
759 goto error_tpm;
760 }
761
762 return;
763
764error_free_tpm:
765 kfree(tpm_device);
766error_tpm:
767 pr_err("viper: Couldn't %s, giving up\n", errstr);
768}
769
770static void __init viper_init_vcore_gpios(void)
771{
772 if (gpio_request(VIPER_PSU_DATA_GPIO, "PSU data"))
773 goto err_request_data;
774
775 if (gpio_request(VIPER_PSU_CLK_GPIO, "PSU clock"))
776 goto err_request_clk;
777
778 if (gpio_request(VIPER_PSU_nCS_LD_GPIO, "PSU cs"))
779 goto err_request_cs;
780
781 if (gpio_direction_output(VIPER_PSU_DATA_GPIO, 0) ||
782 gpio_direction_output(VIPER_PSU_CLK_GPIO, 0) ||
783 gpio_direction_output(VIPER_PSU_nCS_LD_GPIO, 0))
784 goto err_dir;
785
786 /* c/should assume redboot set the correct level ??? */
787 viper_set_core_cpu_voltage(get_clk_frequency_khz(0), 1);
788
789 return;
790
791err_dir:
792 gpio_free(VIPER_PSU_nCS_LD_GPIO);
793err_request_cs:
794 gpio_free(VIPER_PSU_CLK_GPIO);
795err_request_clk:
796 gpio_free(VIPER_PSU_DATA_GPIO);
797err_request_data:
798 pr_err("viper: Failed to setup vcore control GPIOs\n");
799}
800
801static void __init viper_init_serial_gpio(void)
802{
803 if (gpio_request(VIPER_UART_SHDN_GPIO, "UARTs shutdown"))
804 goto err_request;
805
806 if (gpio_direction_output(VIPER_UART_SHDN_GPIO, 0))
807 goto err_dir;
808
809 return;
810
811err_dir:
812 gpio_free(VIPER_UART_SHDN_GPIO);
813err_request:
814 pr_err("viper: Failed to setup UART shutdown GPIO\n");
815}
816
817#ifdef CONFIG_CPU_FREQ
818static int viper_cpufreq_notifier(struct notifier_block *nb,
819 unsigned long val, void *data)
820{
821 struct cpufreq_freqs *freq = data;
822
823 /* TODO: Adjust timings??? */
824
825 switch (val) {
826 case CPUFREQ_PRECHANGE:
827 if (freq->old < freq->new) {
828 /* we are getting faster so raise the voltage
829 * before we change freq */
830 viper_set_core_cpu_voltage(freq->new, 0);
831 }
832 break;
833 case CPUFREQ_POSTCHANGE:
834 if (freq->old > freq->new) {
835 /* we are slowing down so drop the power
836 * after we change freq */
837 viper_set_core_cpu_voltage(freq->new, 0);
838 }
839 break;
840 case CPUFREQ_RESUMECHANGE:
841 viper_set_core_cpu_voltage(freq->new, 0);
842 break;
843 default:
844 /* ignore */
845 break;
846 }
847
848 return 0;
849}
850
851static struct notifier_block viper_cpufreq_notifier_block = {
852 .notifier_call = viper_cpufreq_notifier
853};
854
855static void __init viper_init_cpufreq(void)
856{
857 if (cpufreq_register_notifier(&viper_cpufreq_notifier_block,
858 CPUFREQ_TRANSITION_NOTIFIER))
859 pr_err("viper: Failed to setup cpufreq notifier\n");
860}
861#else
862static inline void viper_init_cpufreq(void) {}
863#endif
864
865static void viper_power_off(void)
866{
867 pr_notice("Shutting off UPS\n");
868 gpio_set_value(VIPER_UPS_GPIO, 1);
869 /* Spin to death... */
870 while (1);
871}
872
873static void __init viper_init(void)
874{
875 u8 version;
876
877 pm_power_off = viper_power_off;
878
879 pxa2xx_mfp_config(ARRAY_AND_SIZE(viper_pin_config));
880
881 /* Wake-up serial console */
882 viper_init_serial_gpio();
883
884 set_pxa_fb_info(&fb_info);
885
886 /* v1 hardware cannot use the datacs line */
887 version = viper_hw_version();
888 if (version == 0)
889 smc91x_device.num_resources--;
890
891 pxa_set_i2c_info(NULL);
892 platform_add_devices(viper_devs, ARRAY_SIZE(viper_devs));
893
894 viper_init_vcore_gpios();
895 viper_init_cpufreq();
896
897 sysdev_driver_register(&cpu_sysdev_class, &viper_cpu_sysdev_driver);
898
899 if (version) {
900 pr_info("viper: hardware v%di%d detected. "
901 "CPLD revision %d.\n",
902 VIPER_BOARD_VERSION(version),
903 VIPER_BOARD_ISSUE(version),
904 VIPER_CPLD_REVISION(version));
905 system_rev = (VIPER_BOARD_VERSION(version) << 8) |
906 (VIPER_BOARD_ISSUE(version) << 4) |
907 VIPER_CPLD_REVISION(version);
908 } else {
909 pr_info("viper: No version register.\n");
910 }
911
912 i2c_register_board_info(1, ARRAY_AND_SIZE(viper_i2c_devices));
913
914 viper_tpm_init();
915 pxa_set_ac97_info(NULL);
916}
917
918static struct map_desc viper_io_desc[] __initdata = {
919 {
920 .virtual = VIPER_CPLD_BASE,
921 .pfn = __phys_to_pfn(VIPER_CPLD_PHYS),
922 .length = 0x00300000,
923 .type = MT_DEVICE,
924 },
925 {
926 .virtual = VIPER_PC104IO_BASE,
927 .pfn = __phys_to_pfn(_PCMCIA1IO),
928 .length = 0x00800000,
929 .type = MT_DEVICE,
930 },
931};
932
933static void __init viper_map_io(void)
934{
935 pxa_map_io();
936
937 iotable_init(viper_io_desc, ARRAY_SIZE(viper_io_desc));
938
939 PCFR |= PCFR_OPDE;
940}
941
942MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC")
943 /* Maintainer: Marc Zyngier <maz@misterjones.org> */
944 .phys_io = 0x40000000,
945 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
946 .boot_params = 0xa0000100,
947 .map_io = viper_map_io,
948 .init_irq = viper_init_irq,
949 .timer = &pxa_timer,
950 .init_machine = viper_init,
951MACHINE_END
diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c
index 0cb65b5772fe..813804433466 100644
--- a/arch/arm/mach-pxa/zylonite.c
+++ b/arch/arm/mach-pxa/zylonite.c
@@ -29,6 +29,7 @@
29#include <mach/pxafb.h> 29#include <mach/pxafb.h>
30#include <mach/zylonite.h> 30#include <mach/zylonite.h>
31#include <mach/mmc.h> 31#include <mach/mmc.h>
32#include <mach/ohci.h>
32#include <mach/pxa27x_keypad.h> 33#include <mach/pxa27x_keypad.h>
33#include <mach/pxa3xx_nand.h> 34#include <mach/pxa3xx_nand.h>
34 35
@@ -423,6 +424,21 @@ static void __init zylonite_init_nand(void)
423static inline void zylonite_init_nand(void) {} 424static inline void zylonite_init_nand(void) {}
424#endif /* CONFIG_MTD_NAND_PXA3xx || CONFIG_MTD_NAND_PXA3xx_MODULE */ 425#endif /* CONFIG_MTD_NAND_PXA3xx || CONFIG_MTD_NAND_PXA3xx_MODULE */
425 426
427#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
428static struct pxaohci_platform_data zylonite_ohci_info = {
429 .port_mode = PMM_PERPORT_MODE,
430 .flags = ENABLE_PORT1 | ENABLE_PORT2 |
431 POWER_CONTROL_LOW | POWER_SENSE_LOW,
432};
433
434static void __init zylonite_init_ohci(void)
435{
436 pxa_set_ohci_info(&zylonite_ohci_info);
437}
438#else
439static inline void zylonite_init_ohci(void) {}
440#endif /* CONFIG_USB_OHCI_HCD || CONFIG_USB_OHCI_HCD_MODULE */
441
426static void __init zylonite_init(void) 442static void __init zylonite_init(void)
427{ 443{
428 /* board-processor specific initialization */ 444 /* board-processor specific initialization */
@@ -443,6 +459,7 @@ static void __init zylonite_init(void)
443 zylonite_init_keypad(); 459 zylonite_init_keypad();
444 zylonite_init_nand(); 460 zylonite_init_nand();
445 zylonite_init_leds(); 461 zylonite_init_leds();
462 zylonite_init_ohci();
446} 463}
447 464
448MACHINE_START(ZYLONITE, "PXA3xx Platform Development Kit (aka Zylonite)") 465MACHINE_START(ZYLONITE, "PXA3xx Platform Development Kit (aka Zylonite)")
diff --git a/arch/arm/mach-pxa/zylonite_pxa300.c b/arch/arm/mach-pxa/zylonite_pxa300.c
index 095f5c648236..46538885a58a 100644
--- a/arch/arm/mach-pxa/zylonite_pxa300.c
+++ b/arch/arm/mach-pxa/zylonite_pxa300.c
@@ -73,6 +73,12 @@ static mfp_cfg_t common_mfp_cfg[] __initdata = {
73 GPIO27_AC97_SDATA_OUT, 73 GPIO27_AC97_SDATA_OUT,
74 GPIO28_AC97_SYNC, 74 GPIO28_AC97_SYNC,
75 75
76 /* SSP3 */
77 GPIO91_SSP3_SCLK,
78 GPIO92_SSP3_FRM,
79 GPIO93_SSP3_TXD,
80 GPIO94_SSP3_RXD,
81
76 /* WM9713 IRQ */ 82 /* WM9713 IRQ */
77 GPIO26_GPIO, 83 GPIO26_GPIO,
78 84
@@ -113,6 +119,10 @@ static mfp_cfg_t common_mfp_cfg[] __initdata = {
113 GPIO13_MMC2_CLK, 119 GPIO13_MMC2_CLK,
114 GPIO14_MMC2_CMD, 120 GPIO14_MMC2_CMD,
115 121
122 /* USB Host */
123 GPIO0_2_USBH_PEN,
124 GPIO1_2_USBH_PWR,
125
116 /* Standard I2C */ 126 /* Standard I2C */
117 GPIO21_I2C_SCL, 127 GPIO21_I2C_SCL,
118 GPIO22_I2C_SDA, 128 GPIO22_I2C_SDA,
@@ -209,7 +219,7 @@ static struct pca953x_platform_data gpio_exp[] = {
209 }, 219 },
210}; 220};
211 221
212struct i2c_board_info zylonite_i2c_board_info[] = { 222static struct i2c_board_info zylonite_i2c_board_info[] = {
213 { 223 {
214 .type = "pca9539", 224 .type = "pca9539",
215 .addr = 0x74, 225 .addr = 0x74,
diff --git a/arch/arm/mach-pxa/zylonite_pxa320.c b/arch/arm/mach-pxa/zylonite_pxa320.c
index 9879d7da2df5..0f244744daae 100644
--- a/arch/arm/mach-pxa/zylonite_pxa320.c
+++ b/arch/arm/mach-pxa/zylonite_pxa320.c
@@ -69,6 +69,12 @@ static mfp_cfg_t mfp_cfg[] __initdata = {
69 GPIO39_AC97_BITCLK, 69 GPIO39_AC97_BITCLK,
70 GPIO40_AC97_nACRESET, 70 GPIO40_AC97_nACRESET,
71 71
72 /* SSP3 */
73 GPIO89_SSP3_SCLK,
74 GPIO90_SSP3_FRM,
75 GPIO91_SSP3_TXD,
76 GPIO92_SSP3_RXD,
77
72 /* WM9713 IRQ */ 78 /* WM9713 IRQ */
73 GPIO15_GPIO, 79 GPIO15_GPIO,
74 80
@@ -117,6 +123,10 @@ static mfp_cfg_t mfp_cfg[] __initdata = {
117 GPIO28_MMC2_CLK, 123 GPIO28_MMC2_CLK,
118 GPIO29_MMC2_CMD, 124 GPIO29_MMC2_CMD,
119 125
126 /* USB Host */
127 GPIO2_2_USBH_PEN,
128 GPIO3_2_USBH_PWR,
129
120 /* Debug LEDs */ 130 /* Debug LEDs */
121 GPIO1_2_GPIO | MFP_LPM_DRIVE_HIGH, 131 GPIO1_2_GPIO | MFP_LPM_DRIVE_HIGH,
122 GPIO4_2_GPIO | MFP_LPM_DRIVE_HIGH, 132 GPIO4_2_GPIO | MFP_LPM_DRIVE_HIGH,
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c
index 4f9c84ab781c..2f04d54711e7 100644
--- a/arch/arm/mach-realview/core.c
+++ b/arch/arm/mach-realview/core.c
@@ -27,10 +27,10 @@
27#include <linux/amba/clcd.h> 27#include <linux/amba/clcd.h>
28#include <linux/clocksource.h> 28#include <linux/clocksource.h>
29#include <linux/clockchips.h> 29#include <linux/clockchips.h>
30#include <linux/io.h>
30 31
31#include <asm/system.h> 32#include <asm/system.h>
32#include <mach/hardware.h> 33#include <mach/hardware.h>
33#include <asm/io.h>
34#include <asm/irq.h> 34#include <asm/irq.h>
35#include <asm/leds.h> 35#include <asm/leds.h>
36#include <asm/hardware/arm_timer.h> 36#include <asm/hardware/arm_timer.h>
diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h
index 33dbbb41a663..3cea92c70d8f 100644
--- a/arch/arm/mach-realview/core.h
+++ b/arch/arm/mach-realview/core.h
@@ -23,9 +23,9 @@
23#define __ASM_ARCH_REALVIEW_H 23#define __ASM_ARCH_REALVIEW_H
24 24
25#include <linux/amba/bus.h> 25#include <linux/amba/bus.h>
26#include <linux/io.h>
26 27
27#include <asm/leds.h> 28#include <asm/leds.h>
28#include <asm/io.h>
29 29
30#define AMBA_DEVICE(name,busid,base,plat) \ 30#define AMBA_DEVICE(name,busid,base,plat) \
31static struct amba_device name##_device = { \ 31static struct amba_device name##_device = { \
diff --git a/arch/arm/mach-realview/include/mach/system.h b/arch/arm/mach-realview/include/mach/system.h
index 4d3c8f3f8053..a2f61c78adbf 100644
--- a/arch/arm/mach-realview/include/mach/system.h
+++ b/arch/arm/mach-realview/include/mach/system.h
@@ -21,8 +21,8 @@
21#ifndef __ASM_ARCH_SYSTEM_H 21#ifndef __ASM_ARCH_SYSTEM_H
22#define __ASM_ARCH_SYSTEM_H 22#define __ASM_ARCH_SYSTEM_H
23 23
24#include <linux/io.h>
24#include <mach/hardware.h> 25#include <mach/hardware.h>
25#include <asm/io.h>
26#include <mach/platform.h> 26#include <mach/platform.h>
27 27
28static inline void arch_idle(void) 28static inline void arch_idle(void)
diff --git a/arch/arm/mach-realview/localtimer.c b/arch/arm/mach-realview/localtimer.c
index 82fa1f26e026..44d178cd5733 100644
--- a/arch/arm/mach-realview/localtimer.c
+++ b/arch/arm/mach-realview/localtimer.c
@@ -17,11 +17,11 @@
17#include <linux/percpu.h> 17#include <linux/percpu.h>
18#include <linux/clockchips.h> 18#include <linux/clockchips.h>
19#include <linux/irq.h> 19#include <linux/irq.h>
20#include <linux/io.h>
20 21
21#include <asm/hardware/arm_twd.h> 22#include <asm/hardware/arm_twd.h>
22#include <asm/hardware/gic.h> 23#include <asm/hardware/gic.h>
23#include <mach/hardware.h> 24#include <mach/hardware.h>
24#include <asm/io.h>
25#include <asm/irq.h> 25#include <asm/irq.h>
26 26
27static DEFINE_PER_CPU(struct clock_event_device, local_clockevent); 27static DEFINE_PER_CPU(struct clock_event_device, local_clockevent);
diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c
index 1907d22f4fed..e102aeb0f76e 100644
--- a/arch/arm/mach-realview/platsmp.c
+++ b/arch/arm/mach-realview/platsmp.c
@@ -13,10 +13,10 @@
13#include <linux/delay.h> 13#include <linux/delay.h>
14#include <linux/device.h> 14#include <linux/device.h>
15#include <linux/smp.h> 15#include <linux/smp.h>
16#include <linux/io.h>
16 17
17#include <asm/cacheflush.h> 18#include <asm/cacheflush.h>
18#include <mach/hardware.h> 19#include <mach/hardware.h>
19#include <asm/io.h>
20#include <asm/mach-types.h> 20#include <asm/mach-types.h>
21 21
22#include <mach/board-eb.h> 22#include <mach/board-eb.h>
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index 19a9968fc5b9..eb829eb1ebe2 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -23,9 +23,9 @@
23#include <linux/platform_device.h> 23#include <linux/platform_device.h>
24#include <linux/sysdev.h> 24#include <linux/sysdev.h>
25#include <linux/amba/bus.h> 25#include <linux/amba/bus.h>
26#include <linux/io.h>
26 27
27#include <mach/hardware.h> 28#include <mach/hardware.h>
28#include <asm/io.h>
29#include <asm/irq.h> 29#include <asm/irq.h>
30#include <asm/leds.h> 30#include <asm/leds.h>
31#include <asm/mach-types.h> 31#include <asm/mach-types.h>
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c
index 0986cbd15943..cccdb3eb90fe 100644
--- a/arch/arm/mach-realview/realview_pb1176.c
+++ b/arch/arm/mach-realview/realview_pb1176.c
@@ -23,9 +23,9 @@
23#include <linux/platform_device.h> 23#include <linux/platform_device.h>
24#include <linux/sysdev.h> 24#include <linux/sysdev.h>
25#include <linux/amba/bus.h> 25#include <linux/amba/bus.h>
26#include <linux/io.h>
26 27
27#include <mach/hardware.h> 28#include <mach/hardware.h>
28#include <asm/io.h>
29#include <asm/irq.h> 29#include <asm/irq.h>
30#include <asm/leds.h> 30#include <asm/leds.h>
31#include <asm/mach-types.h> 31#include <asm/mach-types.h>
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c
index f4e7135e3eb5..8b863148ec18 100644
--- a/arch/arm/mach-realview/realview_pb11mp.c
+++ b/arch/arm/mach-realview/realview_pb11mp.c
@@ -23,9 +23,9 @@
23#include <linux/platform_device.h> 23#include <linux/platform_device.h>
24#include <linux/sysdev.h> 24#include <linux/sysdev.h>
25#include <linux/amba/bus.h> 25#include <linux/amba/bus.h>
26#include <linux/io.h>
26 27
27#include <mach/hardware.h> 28#include <mach/hardware.h>
28#include <asm/io.h>
29#include <asm/irq.h> 29#include <asm/irq.h>
30#include <asm/leds.h> 30#include <asm/leds.h>
31#include <asm/mach-types.h> 31#include <asm/mach-types.h>
diff --git a/arch/arm/mach-rpc/dma.c b/arch/arm/mach-rpc/dma.c
index 4b19fe484190..7958a30f8932 100644
--- a/arch/arm/mach-rpc/dma.c
+++ b/arch/arm/mach-rpc/dma.c
@@ -14,11 +14,11 @@
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/interrupt.h> 15#include <linux/interrupt.h>
16#include <linux/dma-mapping.h> 16#include <linux/dma-mapping.h>
17#include <linux/io.h>
17 18
18#include <asm/page.h> 19#include <asm/page.h>
19#include <asm/dma.h> 20#include <asm/dma.h>
20#include <asm/fiq.h> 21#include <asm/fiq.h>
21#include <asm/io.h>
22#include <asm/irq.h> 22#include <asm/irq.h>
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24#include <asm/uaccess.h> 24#include <asm/uaccess.h>
diff --git a/arch/arm/mach-rpc/include/mach/memory.h b/arch/arm/mach-rpc/include/mach/memory.h
index 05425d558ee7..9bf7e43e2863 100644
--- a/arch/arm/mach-rpc/include/mach/memory.h
+++ b/arch/arm/mach-rpc/include/mach/memory.h
@@ -36,4 +36,12 @@
36#define FLUSH_BASE_PHYS 0x00000000 36#define FLUSH_BASE_PHYS 0x00000000
37#define FLUSH_BASE 0xdf000000 37#define FLUSH_BASE 0xdf000000
38 38
39/*
40 * Sparsemem support. Each section is a maximum of 64MB. The sections
41 * are offset by 128MB and can cover 128MB, so that gives us a maximum
42 * of 29 physmem bits.
43 */
44#define MAX_PHYSMEM_BITS 29
45#define SECTION_SIZE_BITS 26
46
39#endif 47#endif
diff --git a/arch/arm/mach-rpc/include/mach/system.h b/arch/arm/mach-rpc/include/mach/system.h
index 54d6e3f2d319..bd7268ba17e2 100644
--- a/arch/arm/mach-rpc/include/mach/system.h
+++ b/arch/arm/mach-rpc/include/mach/system.h
@@ -7,9 +7,9 @@
7 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10#include <linux/io.h>
10#include <mach/hardware.h> 11#include <mach/hardware.h>
11#include <asm/hardware/iomd.h> 12#include <asm/hardware/iomd.h>
12#include <asm/io.h>
13 13
14static inline void arch_idle(void) 14static inline void arch_idle(void)
15{ 15{
diff --git a/arch/arm/mach-rpc/include/mach/uncompress.h b/arch/arm/mach-rpc/include/mach/uncompress.h
index baa9c866d7bf..d5862368c4f2 100644
--- a/arch/arm/mach-rpc/include/mach/uncompress.h
+++ b/arch/arm/mach-rpc/include/mach/uncompress.h
@@ -9,8 +9,8 @@
9 */ 9 */
10#define VIDMEM ((char *)SCREEN_START) 10#define VIDMEM ((char *)SCREEN_START)
11 11
12#include <linux/io.h>
12#include <mach/hardware.h> 13#include <mach/hardware.h>
13#include <asm/io.h>
14#include <asm/setup.h> 14#include <asm/setup.h>
15#include <asm/page.h> 15#include <asm/page.h>
16 16
diff --git a/arch/arm/mach-rpc/irq.c b/arch/arm/mach-rpc/irq.c
index 7a029621db43..9dd15d679c5d 100644
--- a/arch/arm/mach-rpc/irq.c
+++ b/arch/arm/mach-rpc/irq.c
@@ -1,10 +1,10 @@
1#include <linux/init.h> 1#include <linux/init.h>
2#include <linux/list.h> 2#include <linux/list.h>
3#include <linux/io.h>
3 4
4#include <asm/mach/irq.h> 5#include <asm/mach/irq.h>
5#include <asm/hardware/iomd.h> 6#include <asm/hardware/iomd.h>
6#include <asm/irq.h> 7#include <asm/irq.h>
7#include <asm/io.h>
8 8
9static void iomd_ack_irq_a(unsigned int irq) 9static void iomd_ack_irq_a(unsigned int irq)
10{ 10{
diff --git a/arch/arm/mach-rpc/riscpc.c b/arch/arm/mach-rpc/riscpc.c
index ce8470fea887..e88d417736af 100644
--- a/arch/arm/mach-rpc/riscpc.c
+++ b/arch/arm/mach-rpc/riscpc.c
@@ -18,9 +18,9 @@
18#include <linux/device.h> 18#include <linux/device.h>
19#include <linux/serial_8250.h> 19#include <linux/serial_8250.h>
20#include <linux/ata_platform.h> 20#include <linux/ata_platform.h>
21#include <linux/io.h>
21 22
22#include <asm/elf.h> 23#include <asm/elf.h>
23#include <asm/io.h>
24#include <asm/mach-types.h> 24#include <asm/mach-types.h>
25#include <mach/hardware.h> 25#include <mach/hardware.h>
26#include <asm/page.h> 26#include <asm/page.h>
diff --git a/arch/arm/mach-s3c2400/gpio.c b/arch/arm/mach-s3c2400/gpio.c
index 148d0ddef3e8..7a7ed4174c8c 100644
--- a/arch/arm/mach-s3c2400/gpio.c
+++ b/arch/arm/mach-s3c2400/gpio.c
@@ -24,10 +24,10 @@
24#include <linux/module.h> 24#include <linux/module.h>
25#include <linux/interrupt.h> 25#include <linux/interrupt.h>
26#include <linux/ioport.h> 26#include <linux/ioport.h>
27#include <linux/io.h>
27 28
28#include <mach/hardware.h> 29#include <mach/hardware.h>
29#include <asm/irq.h> 30#include <asm/irq.h>
30#include <asm/io.h>
31 31
32#include <mach/regs-gpio.h> 32#include <mach/regs-gpio.h>
33 33
diff --git a/arch/arm/mach-s3c2410/bast-irq.c b/arch/arm/mach-s3c2410/bast-irq.c
index c66021b5fa4d..75738000272b 100644
--- a/arch/arm/mach-s3c2410/bast-irq.c
+++ b/arch/arm/mach-s3c2410/bast-irq.c
@@ -25,12 +25,12 @@
25#include <linux/module.h> 25#include <linux/module.h>
26#include <linux/ioport.h> 26#include <linux/ioport.h>
27#include <linux/sysdev.h> 27#include <linux/sysdev.h>
28#include <linux/io.h>
28 29
29#include <asm/mach-types.h> 30#include <asm/mach-types.h>
30 31
31#include <mach/hardware.h> 32#include <mach/hardware.h>
32#include <asm/irq.h> 33#include <asm/irq.h>
33#include <asm/io.h>
34 34
35#include <asm/mach/irq.h> 35#include <asm/mach/irq.h>
36 36
@@ -130,8 +130,7 @@ bast_irq_pc104_demux(unsigned int irq,
130 for (i = 0; stat != 0; i++, stat >>= 1) { 130 for (i = 0; stat != 0; i++, stat >>= 1) {
131 if (stat & 1) { 131 if (stat & 1) {
132 irqno = bast_pc104_irqs[i]; 132 irqno = bast_pc104_irqs[i];
133 desc = irq_desc + irqno; 133 generic_handle_irq(irqno);
134 desc_handle_irq(irqno, desc);
135 } 134 }
136 } 135 }
137 } 136 }
diff --git a/arch/arm/mach-s3c2410/clock.c b/arch/arm/mach-s3c2410/clock.c
index 1322851d1acb..fef646c36b54 100644
--- a/arch/arm/mach-s3c2410/clock.c
+++ b/arch/arm/mach-s3c2410/clock.c
@@ -31,11 +31,11 @@
31#include <linux/mutex.h> 31#include <linux/mutex.h>
32#include <linux/delay.h> 32#include <linux/delay.h>
33#include <linux/serial_core.h> 33#include <linux/serial_core.h>
34#include <linux/io.h>
34 35
35#include <asm/mach/map.h> 36#include <asm/mach/map.h>
36 37
37#include <mach/hardware.h> 38#include <mach/hardware.h>
38#include <asm/io.h>
39 39
40#include <asm/plat-s3c/regs-serial.h> 40#include <asm/plat-s3c/regs-serial.h>
41#include <mach/regs-clock.h> 41#include <mach/regs-clock.h>
diff --git a/arch/arm/mach-s3c2410/gpio.c b/arch/arm/mach-s3c2410/gpio.c
index c6eefb1d590c..36a3132f39e7 100644
--- a/arch/arm/mach-s3c2410/gpio.c
+++ b/arch/arm/mach-s3c2410/gpio.c
@@ -25,10 +25,10 @@
25#include <linux/module.h> 25#include <linux/module.h>
26#include <linux/interrupt.h> 26#include <linux/interrupt.h>
27#include <linux/ioport.h> 27#include <linux/ioport.h>
28#include <linux/io.h>
28 29
29#include <mach/hardware.h> 30#include <mach/hardware.h>
30#include <asm/irq.h> 31#include <asm/irq.h>
31#include <asm/io.h>
32 32
33#include <mach/regs-gpio.h> 33#include <mach/regs-gpio.h>
34 34
diff --git a/arch/arm/mach-s3c2410/include/mach/system-reset.h b/arch/arm/mach-s3c2410/include/mach/system-reset.h
index ec2defebf0d5..43535a0e7186 100644
--- a/arch/arm/mach-s3c2410/include/mach/system-reset.h
+++ b/arch/arm/mach-s3c2410/include/mach/system-reset.h
@@ -11,7 +11,7 @@
11*/ 11*/
12 12
13#include <mach/hardware.h> 13#include <mach/hardware.h>
14#include <asm/io.h> 14#include <linux/io.h>
15 15
16#include <asm/plat-s3c/regs-watchdog.h> 16#include <asm/plat-s3c/regs-watchdog.h>
17#include <mach/regs-clock.h> 17#include <mach/regs-clock.h>
diff --git a/arch/arm/mach-s3c2410/include/mach/system.h b/arch/arm/mach-s3c2410/include/mach/system.h
index e9f676bc0116..a8cbca6701e5 100644
--- a/arch/arm/mach-s3c2410/include/mach/system.h
+++ b/arch/arm/mach-s3c2410/include/mach/system.h
@@ -10,8 +10,8 @@
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11*/ 11*/
12 12
13#include <linux/io.h>
13#include <mach/hardware.h> 14#include <mach/hardware.h>
14#include <asm/io.h>
15 15
16#include <mach/map.h> 16#include <mach/map.h>
17#include <mach/idle.h> 17#include <mach/idle.h>
diff --git a/arch/arm/mach-s3c2410/mach-amlm5900.c b/arch/arm/mach-s3c2410/mach-amlm5900.c
index f0de3c23ce78..527f88a288ec 100644
--- a/arch/arm/mach-s3c2410/mach-amlm5900.c
+++ b/arch/arm/mach-s3c2410/mach-amlm5900.c
@@ -36,6 +36,7 @@
36#include <linux/platform_device.h> 36#include <linux/platform_device.h>
37#include <linux/proc_fs.h> 37#include <linux/proc_fs.h>
38#include <linux/serial_core.h> 38#include <linux/serial_core.h>
39#include <linux/io.h>
39 40
40#include <asm/mach/arch.h> 41#include <asm/mach/arch.h>
41#include <asm/mach/map.h> 42#include <asm/mach/map.h>
@@ -43,7 +44,6 @@
43#include <asm/mach/flash.h> 44#include <asm/mach/flash.h>
44 45
45#include <mach/hardware.h> 46#include <mach/hardware.h>
46#include <asm/io.h>
47#include <asm/irq.h> 47#include <asm/irq.h>
48#include <asm/mach-types.h> 48#include <asm/mach-types.h>
49#include <mach/fb.h> 49#include <mach/fb.h>
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c
index 24c6334fac89..e4368e6e7e6c 100644
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -22,6 +22,7 @@
22#include <linux/dm9000.h> 22#include <linux/dm9000.h>
23#include <linux/ata_platform.h> 23#include <linux/ata_platform.h>
24#include <linux/i2c.h> 24#include <linux/i2c.h>
25#include <linux/io.h>
25 26
26#include <net/ax88796.h> 27#include <net/ax88796.h>
27 28
@@ -34,7 +35,6 @@
34#include <mach/bast-cpld.h> 35#include <mach/bast-cpld.h>
35 36
36#include <mach/hardware.h> 37#include <mach/hardware.h>
37#include <asm/io.h>
38#include <asm/irq.h> 38#include <asm/irq.h>
39#include <asm/mach-types.h> 39#include <asm/mach-types.h>
40 40
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c
index e35933a46d10..85e710f2863b 100644
--- a/arch/arm/mach-s3c2410/mach-h1940.c
+++ b/arch/arm/mach-s3c2410/mach-h1940.c
@@ -20,13 +20,13 @@
20#include <linux/sysdev.h> 20#include <linux/sysdev.h>
21#include <linux/serial_core.h> 21#include <linux/serial_core.h>
22#include <linux/platform_device.h> 22#include <linux/platform_device.h>
23#include <linux/io.h>
23 24
24#include <asm/mach/arch.h> 25#include <asm/mach/arch.h>
25#include <asm/mach/map.h> 26#include <asm/mach/map.h>
26#include <asm/mach/irq.h> 27#include <asm/mach/irq.h>
27 28
28#include <mach/hardware.h> 29#include <mach/hardware.h>
29#include <asm/io.h>
30#include <asm/irq.h> 30#include <asm/irq.h>
31#include <asm/mach-types.h> 31#include <asm/mach-types.h>
32 32
diff --git a/arch/arm/mach-s3c2410/mach-n30.c b/arch/arm/mach-s3c2410/mach-n30.c
index 80fe2ed0775c..3ece2d04934e 100644
--- a/arch/arm/mach-s3c2410/mach-n30.c
+++ b/arch/arm/mach-s3c2410/mach-n30.c
@@ -25,9 +25,9 @@
25#include <linux/platform_device.h> 25#include <linux/platform_device.h>
26#include <linux/serial_core.h> 26#include <linux/serial_core.h>
27#include <linux/timer.h> 27#include <linux/timer.h>
28#include <linux/io.h>
28 29
29#include <mach/hardware.h> 30#include <mach/hardware.h>
30#include <asm/io.h>
31#include <asm/irq.h> 31#include <asm/irq.h>
32#include <asm/mach-types.h> 32#include <asm/mach-types.h>
33 33
diff --git a/arch/arm/mach-s3c2410/mach-otom.c b/arch/arm/mach-s3c2410/mach-otom.c
index 606ee15911b6..c4dfe3eabe1d 100644
--- a/arch/arm/mach-s3c2410/mach-otom.c
+++ b/arch/arm/mach-s3c2410/mach-otom.c
@@ -17,6 +17,7 @@
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/serial_core.h> 18#include <linux/serial_core.h>
19#include <linux/platform_device.h> 19#include <linux/platform_device.h>
20#include <linux/io.h>
20 21
21#include <asm/mach/arch.h> 22#include <asm/mach/arch.h>
22#include <asm/mach/map.h> 23#include <asm/mach/map.h>
@@ -25,7 +26,6 @@
25#include <mach/otom-map.h> 26#include <mach/otom-map.h>
26 27
27#include <mach/hardware.h> 28#include <mach/hardware.h>
28#include <asm/io.h>
29#include <asm/irq.h> 29#include <asm/irq.h>
30#include <asm/mach-types.h> 30#include <asm/mach-types.h>
31 31
diff --git a/arch/arm/mach-s3c2410/mach-qt2410.c b/arch/arm/mach-s3c2410/mach-qt2410.c
index 7d34844debde..97c13192315b 100644
--- a/arch/arm/mach-s3c2410/mach-qt2410.c
+++ b/arch/arm/mach-s3c2410/mach-qt2410.c
@@ -32,7 +32,7 @@
32#include <linux/serial_core.h> 32#include <linux/serial_core.h>
33#include <linux/spi/spi.h> 33#include <linux/spi/spi.h>
34#include <linux/spi/spi_bitbang.h> 34#include <linux/spi/spi_bitbang.h>
35 35#include <linux/io.h>
36#include <linux/mtd/mtd.h> 36#include <linux/mtd/mtd.h>
37#include <linux/mtd/nand.h> 37#include <linux/mtd/nand.h>
38#include <linux/mtd/nand_ecc.h> 38#include <linux/mtd/nand_ecc.h>
@@ -43,7 +43,6 @@
43#include <asm/mach/irq.h> 43#include <asm/mach/irq.h>
44 44
45#include <mach/hardware.h> 45#include <mach/hardware.h>
46#include <asm/io.h>
47#include <asm/irq.h> 46#include <asm/irq.h>
48#include <asm/mach-types.h> 47#include <asm/mach-types.h>
49 48
diff --git a/arch/arm/mach-s3c2410/mach-smdk2410.c b/arch/arm/mach-s3c2410/mach-smdk2410.c
index b88939d72282..d49e58acb03b 100644
--- a/arch/arm/mach-s3c2410/mach-smdk2410.c
+++ b/arch/arm/mach-s3c2410/mach-smdk2410.c
@@ -36,13 +36,13 @@
36#include <linux/init.h> 36#include <linux/init.h>
37#include <linux/serial_core.h> 37#include <linux/serial_core.h>
38#include <linux/platform_device.h> 38#include <linux/platform_device.h>
39#include <linux/io.h>
39 40
40#include <asm/mach/arch.h> 41#include <asm/mach/arch.h>
41#include <asm/mach/map.h> 42#include <asm/mach/map.h>
42#include <asm/mach/irq.h> 43#include <asm/mach/irq.h>
43 44
44#include <mach/hardware.h> 45#include <mach/hardware.h>
45#include <asm/io.h>
46#include <asm/irq.h> 46#include <asm/irq.h>
47#include <asm/mach-types.h> 47#include <asm/mach-types.h>
48 48
diff --git a/arch/arm/mach-s3c2410/mach-tct_hammer.c b/arch/arm/mach-s3c2410/mach-tct_hammer.c
index ec87306a8c24..cc2e79fe4f9f 100644
--- a/arch/arm/mach-s3c2410/mach-tct_hammer.c
+++ b/arch/arm/mach-s3c2410/mach-tct_hammer.c
@@ -33,6 +33,7 @@
33#include <linux/device.h> 33#include <linux/device.h>
34#include <linux/platform_device.h> 34#include <linux/platform_device.h>
35#include <linux/serial_core.h> 35#include <linux/serial_core.h>
36#include <linux/io.h>
36 37
37#include <asm/mach/arch.h> 38#include <asm/mach/arch.h>
38#include <asm/mach/map.h> 39#include <asm/mach/map.h>
@@ -40,7 +41,6 @@
40#include <asm/mach/flash.h> 41#include <asm/mach/flash.h>
41 42
42#include <mach/hardware.h> 43#include <mach/hardware.h>
43#include <asm/io.h>
44#include <asm/irq.h> 44#include <asm/irq.h>
45#include <asm/mach-types.h> 45#include <asm/mach-types.h>
46 46
diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c2410/mach-vr1000.c
index fbc0213d5485..ed3acb05c855 100644
--- a/arch/arm/mach-s3c2410/mach-vr1000.c
+++ b/arch/arm/mach-s3c2410/mach-vr1000.c
@@ -25,6 +25,7 @@
25#include <linux/tty.h> 25#include <linux/tty.h>
26#include <linux/serial_8250.h> 26#include <linux/serial_8250.h>
27#include <linux/serial_reg.h> 27#include <linux/serial_reg.h>
28#include <linux/io.h>
28 29
29#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
30#include <asm/mach/map.h> 31#include <asm/mach/map.h>
@@ -36,7 +37,6 @@
36#include <mach/vr1000-cpld.h> 37#include <mach/vr1000-cpld.h>
37 38
38#include <mach/hardware.h> 39#include <mach/hardware.h>
39#include <asm/io.h>
40#include <asm/irq.h> 40#include <asm/irq.h>
41#include <asm/mach-types.h> 41#include <asm/mach-types.h>
42 42
diff --git a/arch/arm/mach-s3c2410/pm.c b/arch/arm/mach-s3c2410/pm.c
index ba43ff9e8164..733f8a227775 100644
--- a/arch/arm/mach-s3c2410/pm.c
+++ b/arch/arm/mach-s3c2410/pm.c
@@ -25,9 +25,9 @@
25#include <linux/errno.h> 25#include <linux/errno.h>
26#include <linux/time.h> 26#include <linux/time.h>
27#include <linux/sysdev.h> 27#include <linux/sysdev.h>
28#include <linux/io.h>
28 29
29#include <mach/hardware.h> 30#include <mach/hardware.h>
30#include <asm/io.h>
31 31
32#include <asm/mach-types.h> 32#include <asm/mach-types.h>
33 33
diff --git a/arch/arm/mach-s3c2410/s3c2410.c b/arch/arm/mach-s3c2410/s3c2410.c
index 5d977f9c88ac..b1e658c917a0 100644
--- a/arch/arm/mach-s3c2410/s3c2410.c
+++ b/arch/arm/mach-s3c2410/s3c2410.c
@@ -19,13 +19,13 @@
19#include <linux/sysdev.h> 19#include <linux/sysdev.h>
20#include <linux/serial_core.h> 20#include <linux/serial_core.h>
21#include <linux/platform_device.h> 21#include <linux/platform_device.h>
22#include <linux/io.h>
22 23
23#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
24#include <asm/mach/map.h> 25#include <asm/mach/map.h>
25#include <asm/mach/irq.h> 26#include <asm/mach/irq.h>
26 27
27#include <mach/hardware.h> 28#include <mach/hardware.h>
28#include <asm/io.h>
29#include <asm/irq.h> 29#include <asm/irq.h>
30 30
31#include <mach/regs-clock.h> 31#include <mach/regs-clock.h>
diff --git a/arch/arm/mach-s3c2410/usb-simtec.c b/arch/arm/mach-s3c2410/usb-simtec.c
index 4dacf8a1750d..eb6fc0bfd47e 100644
--- a/arch/arm/mach-s3c2410/usb-simtec.c
+++ b/arch/arm/mach-s3c2410/usb-simtec.c
@@ -21,6 +21,7 @@
21#include <linux/timer.h> 21#include <linux/timer.h>
22#include <linux/init.h> 22#include <linux/init.h>
23#include <linux/device.h> 23#include <linux/device.h>
24#include <linux/io.h>
24 25
25#include <asm/mach/arch.h> 26#include <asm/mach/arch.h>
26#include <asm/mach/map.h> 27#include <asm/mach/map.h>
@@ -32,7 +33,6 @@
32#include <mach/regs-gpio.h> 33#include <mach/regs-gpio.h>
33 34
34#include <mach/hardware.h> 35#include <mach/hardware.h>
35#include <asm/io.h>
36#include <asm/irq.h> 36#include <asm/irq.h>
37 37
38#include <asm/plat-s3c24xx/devs.h> 38#include <asm/plat-s3c24xx/devs.h>
diff --git a/arch/arm/mach-s3c2412/clock.c b/arch/arm/mach-s3c2412/clock.c
index af4b2ce516f9..5fbaac6054f8 100644
--- a/arch/arm/mach-s3c2412/clock.c
+++ b/arch/arm/mach-s3c2412/clock.c
@@ -31,11 +31,11 @@
31#include <linux/mutex.h> 31#include <linux/mutex.h>
32#include <linux/delay.h> 32#include <linux/delay.h>
33#include <linux/serial_core.h> 33#include <linux/serial_core.h>
34#include <linux/io.h>
34 35
35#include <asm/mach/map.h> 36#include <asm/mach/map.h>
36 37
37#include <mach/hardware.h> 38#include <mach/hardware.h>
38#include <asm/io.h>
39 39
40#include <asm/plat-s3c/regs-serial.h> 40#include <asm/plat-s3c/regs-serial.h>
41#include <mach/regs-clock.h> 41#include <mach/regs-clock.h>
diff --git a/arch/arm/mach-s3c2412/dma.c b/arch/arm/mach-s3c2412/dma.c
index 22fc04a3b533..dcfff6b8b958 100644
--- a/arch/arm/mach-s3c2412/dma.c
+++ b/arch/arm/mach-s3c2412/dma.c
@@ -16,10 +16,10 @@
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/sysdev.h> 17#include <linux/sysdev.h>
18#include <linux/serial_core.h> 18#include <linux/serial_core.h>
19#include <linux/io.h>
19 20
20#include <asm/dma.h> 21#include <asm/dma.h>
21#include <mach/dma.h> 22#include <mach/dma.h>
22#include <asm/io.h>
23 23
24#include <asm/plat-s3c24xx/dma.h> 24#include <asm/plat-s3c24xx/dma.h>
25#include <asm/plat-s3c24xx/cpu.h> 25#include <asm/plat-s3c24xx/cpu.h>
diff --git a/arch/arm/mach-s3c2412/irq.c b/arch/arm/mach-s3c2412/irq.c
index ac62b79044f4..41720f2c1fea 100644
--- a/arch/arm/mach-s3c2412/irq.c
+++ b/arch/arm/mach-s3c2412/irq.c
@@ -24,10 +24,10 @@
24#include <linux/interrupt.h> 24#include <linux/interrupt.h>
25#include <linux/ioport.h> 25#include <linux/ioport.h>
26#include <linux/sysdev.h> 26#include <linux/sysdev.h>
27#include <linux/io.h>
27 28
28#include <mach/hardware.h> 29#include <mach/hardware.h>
29#include <asm/irq.h> 30#include <asm/irq.h>
30#include <asm/io.h>
31 31
32#include <asm/mach/irq.h> 32#include <asm/mach/irq.h>
33 33
@@ -123,10 +123,10 @@ static void s3c2412_irq_demux_cfsdi(unsigned int irq, struct irq_desc *desc)
123 subsrc &= ~submsk; 123 subsrc &= ~submsk;
124 124
125 if (subsrc & INTBIT(IRQ_S3C2412_SDI)) 125 if (subsrc & INTBIT(IRQ_S3C2412_SDI))
126 desc_handle_irq(IRQ_S3C2412_SDI, irq_desc + IRQ_S3C2412_SDI); 126 generic_handle_irq(IRQ_S3C2412_SDI);
127 127
128 if (subsrc & INTBIT(IRQ_S3C2412_CF)) 128 if (subsrc & INTBIT(IRQ_S3C2412_CF))
129 desc_handle_irq(IRQ_S3C2412_CF, irq_desc + IRQ_S3C2412_CF); 129 generic_handle_irq(IRQ_S3C2412_CF);
130} 130}
131 131
132#define INTMSK_CFSDI (1UL << (IRQ_S3C2412_CFSDI - IRQ_EINT0)) 132#define INTMSK_CFSDI (1UL << (IRQ_S3C2412_CFSDI - IRQ_EINT0))
diff --git a/arch/arm/mach-s3c2412/mach-smdk2413.c b/arch/arm/mach-s3c2412/mach-smdk2413.c
index 80affb1ee4cd..8f8d9117b968 100644
--- a/arch/arm/mach-s3c2412/mach-smdk2413.c
+++ b/arch/arm/mach-s3c2412/mach-smdk2413.c
@@ -19,6 +19,7 @@
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/serial_core.h> 20#include <linux/serial_core.h>
21#include <linux/platform_device.h> 21#include <linux/platform_device.h>
22#include <linux/io.h>
22 23
23#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
24#include <asm/mach/map.h> 25#include <asm/mach/map.h>
@@ -27,7 +28,6 @@
27#include <mach/hardware.h> 28#include <mach/hardware.h>
28#include <asm/hardware/iomd.h> 29#include <asm/hardware/iomd.h>
29#include <asm/setup.h> 30#include <asm/setup.h>
30#include <asm/io.h>
31#include <asm/irq.h> 31#include <asm/irq.h>
32#include <asm/mach-types.h> 32#include <asm/mach-types.h>
33 33
diff --git a/arch/arm/mach-s3c2412/mach-vstms.c b/arch/arm/mach-s3c2412/mach-vstms.c
index 7a08b3789915..bb9bf63b2e02 100644
--- a/arch/arm/mach-s3c2412/mach-vstms.c
+++ b/arch/arm/mach-s3c2412/mach-vstms.c
@@ -17,7 +17,7 @@
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/serial_core.h> 18#include <linux/serial_core.h>
19#include <linux/platform_device.h> 19#include <linux/platform_device.h>
20 20#include <linux/io.h>
21#include <linux/mtd/mtd.h> 21#include <linux/mtd/mtd.h>
22#include <linux/mtd/nand.h> 22#include <linux/mtd/nand.h>
23#include <linux/mtd/nand_ecc.h> 23#include <linux/mtd/nand_ecc.h>
@@ -29,7 +29,6 @@
29 29
30#include <mach/hardware.h> 30#include <mach/hardware.h>
31#include <asm/setup.h> 31#include <asm/setup.h>
32#include <asm/io.h>
33#include <asm/irq.h> 32#include <asm/irq.h>
34#include <asm/mach-types.h> 33#include <asm/mach-types.h>
35 34
diff --git a/arch/arm/mach-s3c2412/pm.c b/arch/arm/mach-s3c2412/pm.c
index 737523a4e037..9540ef752f73 100644
--- a/arch/arm/mach-s3c2412/pm.c
+++ b/arch/arm/mach-s3c2412/pm.c
@@ -18,9 +18,9 @@
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/sysdev.h> 19#include <linux/sysdev.h>
20#include <linux/platform_device.h> 20#include <linux/platform_device.h>
21#include <linux/io.h>
21 22
22#include <mach/hardware.h> 23#include <mach/hardware.h>
23#include <asm/io.h>
24#include <asm/irq.h> 24#include <asm/irq.h>
25 25
26#include <mach/regs-power.h> 26#include <mach/regs-power.h>
diff --git a/arch/arm/mach-s3c2412/s3c2412.c b/arch/arm/mach-s3c2412/s3c2412.c
index d278010b9f60..42440fc55681 100644
--- a/arch/arm/mach-s3c2412/s3c2412.c
+++ b/arch/arm/mach-s3c2412/s3c2412.c
@@ -20,6 +20,7 @@
20#include <linux/sysdev.h> 20#include <linux/sysdev.h>
21#include <linux/serial_core.h> 21#include <linux/serial_core.h>
22#include <linux/platform_device.h> 22#include <linux/platform_device.h>
23#include <linux/io.h>
23 24
24#include <asm/mach/arch.h> 25#include <asm/mach/arch.h>
25#include <asm/mach/map.h> 26#include <asm/mach/map.h>
@@ -27,7 +28,6 @@
27 28
28#include <mach/hardware.h> 29#include <mach/hardware.h>
29#include <asm/proc-fns.h> 30#include <asm/proc-fns.h>
30#include <asm/io.h>
31#include <asm/irq.h> 31#include <asm/irq.h>
32 32
33#include <mach/reset.h> 33#include <mach/reset.h>
diff --git a/arch/arm/mach-s3c2440/clock.c b/arch/arm/mach-s3c2440/clock.c
index 95567e6daea1..40503a65bacf 100644
--- a/arch/arm/mach-s3c2440/clock.c
+++ b/arch/arm/mach-s3c2440/clock.c
@@ -33,11 +33,11 @@
33#include <linux/ioport.h> 33#include <linux/ioport.h>
34#include <linux/mutex.h> 34#include <linux/mutex.h>
35#include <linux/clk.h> 35#include <linux/clk.h>
36#include <linux/io.h>
36 37
37#include <mach/hardware.h> 38#include <mach/hardware.h>
38#include <asm/atomic.h> 39#include <asm/atomic.h>
39#include <asm/irq.h> 40#include <asm/irq.h>
40#include <asm/io.h>
41 41
42#include <mach/regs-clock.h> 42#include <mach/regs-clock.h>
43 43
diff --git a/arch/arm/mach-s3c2440/dsc.c b/arch/arm/mach-s3c2440/dsc.c
index c0c67438d0a4..4f7d06baf0d3 100644
--- a/arch/arm/mach-s3c2440/dsc.c
+++ b/arch/arm/mach-s3c2440/dsc.c
@@ -15,13 +15,13 @@
15#include <linux/interrupt.h> 15#include <linux/interrupt.h>
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/module.h> 17#include <linux/module.h>
18#include <linux/io.h>
18 19
19#include <asm/mach/arch.h> 20#include <asm/mach/arch.h>
20#include <asm/mach/map.h> 21#include <asm/mach/map.h>
21#include <asm/mach/irq.h> 22#include <asm/mach/irq.h>
22 23
23#include <mach/hardware.h> 24#include <mach/hardware.h>
24#include <asm/io.h>
25#include <asm/irq.h> 25#include <asm/irq.h>
26 26
27#include <mach/regs-gpio.h> 27#include <mach/regs-gpio.h>
diff --git a/arch/arm/mach-s3c2440/irq.c b/arch/arm/mach-s3c2440/irq.c
index 276b823f4e27..33e3ede0a2b3 100644
--- a/arch/arm/mach-s3c2440/irq.c
+++ b/arch/arm/mach-s3c2440/irq.c
@@ -24,10 +24,10 @@
24#include <linux/interrupt.h> 24#include <linux/interrupt.h>
25#include <linux/ioport.h> 25#include <linux/ioport.h>
26#include <linux/sysdev.h> 26#include <linux/sysdev.h>
27#include <linux/io.h>
27 28
28#include <mach/hardware.h> 29#include <mach/hardware.h>
29#include <asm/irq.h> 30#include <asm/irq.h>
30#include <asm/io.h>
31 31
32#include <asm/mach/irq.h> 32#include <asm/mach/irq.h>
33 33
@@ -44,7 +44,6 @@ static void s3c_irq_demux_wdtac97(unsigned int irq,
44 struct irq_desc *desc) 44 struct irq_desc *desc)
45{ 45{
46 unsigned int subsrc, submsk; 46 unsigned int subsrc, submsk;
47 struct irq_desc *mydesc;
48 47
49 /* read the current pending interrupts, and the mask 48 /* read the current pending interrupts, and the mask
50 * for what it is available */ 49 * for what it is available */
@@ -58,12 +57,10 @@ static void s3c_irq_demux_wdtac97(unsigned int irq,
58 57
59 if (subsrc != 0) { 58 if (subsrc != 0) {
60 if (subsrc & 1) { 59 if (subsrc & 1) {
61 mydesc = irq_desc + IRQ_S3C2440_WDT; 60 generic_handle_irq(IRQ_S3C2440_WDT);
62 desc_handle_irq(IRQ_S3C2440_WDT, mydesc);
63 } 61 }
64 if (subsrc & 2) { 62 if (subsrc & 2) {
65 mydesc = irq_desc + IRQ_S3C2440_AC97; 63 generic_handle_irq(IRQ_S3C2440_AC97);
66 desc_handle_irq(IRQ_S3C2440_AC97, mydesc);
67 } 64 }
68 } 65 }
69} 66}
diff --git a/arch/arm/mach-s3c2440/mach-anubis.c b/arch/arm/mach-s3c2440/mach-anubis.c
index 441f4bc09472..19eb0e5269ac 100644
--- a/arch/arm/mach-s3c2440/mach-anubis.c
+++ b/arch/arm/mach-s3c2440/mach-anubis.c
@@ -19,7 +19,7 @@
19#include <linux/platform_device.h> 19#include <linux/platform_device.h>
20#include <linux/ata_platform.h> 20#include <linux/ata_platform.h>
21#include <linux/i2c.h> 21#include <linux/i2c.h>
22 22#include <linux/io.h>
23#include <linux/sm501.h> 23#include <linux/sm501.h>
24#include <linux/sm501-regs.h> 24#include <linux/sm501-regs.h>
25 25
@@ -32,7 +32,6 @@
32#include <mach/anubis-cpld.h> 32#include <mach/anubis-cpld.h>
33 33
34#include <mach/hardware.h> 34#include <mach/hardware.h>
35#include <asm/io.h>
36#include <asm/irq.h> 35#include <asm/irq.h>
37#include <asm/mach-types.h> 36#include <asm/mach-types.h>
38 37
diff --git a/arch/arm/mach-s3c2440/mach-nexcoder.c b/arch/arm/mach-s3c2440/mach-nexcoder.c
index 1a5e7027b41b..49e828d1d4d8 100644
--- a/arch/arm/mach-s3c2440/mach-nexcoder.c
+++ b/arch/arm/mach-s3c2440/mach-nexcoder.c
@@ -21,6 +21,7 @@
21#include <linux/string.h> 21#include <linux/string.h>
22#include <linux/serial_core.h> 22#include <linux/serial_core.h>
23#include <linux/platform_device.h> 23#include <linux/platform_device.h>
24#include <linux/io.h>
24 25
25#include <linux/mtd/map.h> 26#include <linux/mtd/map.h>
26 27
@@ -30,7 +31,6 @@
30 31
31#include <asm/setup.h> 32#include <asm/setup.h>
32#include <mach/hardware.h> 33#include <mach/hardware.h>
33#include <asm/io.h>
34#include <asm/irq.h> 34#include <asm/irq.h>
35#include <asm/mach-types.h> 35#include <asm/mach-types.h>
36 36
diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c
index 8b83f93b6102..85144aa52c27 100644
--- a/arch/arm/mach-s3c2440/mach-osiris.c
+++ b/arch/arm/mach-s3c2440/mach-osiris.c
@@ -20,6 +20,7 @@
20#include <linux/serial_core.h> 20#include <linux/serial_core.h>
21#include <linux/clk.h> 21#include <linux/clk.h>
22#include <linux/i2c.h> 22#include <linux/i2c.h>
23#include <linux/io.h>
23 24
24#include <asm/mach/arch.h> 25#include <asm/mach/arch.h>
25#include <asm/mach/map.h> 26#include <asm/mach/map.h>
@@ -29,7 +30,6 @@
29#include <mach/osiris-cpld.h> 30#include <mach/osiris-cpld.h>
30 31
31#include <mach/hardware.h> 32#include <mach/hardware.h>
32#include <asm/io.h>
33#include <asm/irq.h> 33#include <asm/irq.h>
34#include <asm/mach-types.h> 34#include <asm/mach-types.h>
35 35
diff --git a/arch/arm/mach-s3c2440/mach-rx3715.c b/arch/arm/mach-s3c2440/mach-rx3715.c
index e0b07e6a0a18..a4c690456d19 100644
--- a/arch/arm/mach-s3c2440/mach-rx3715.c
+++ b/arch/arm/mach-s3c2440/mach-rx3715.c
@@ -23,7 +23,7 @@
23#include <linux/platform_device.h> 23#include <linux/platform_device.h>
24#include <linux/serial_core.h> 24#include <linux/serial_core.h>
25#include <linux/serial.h> 25#include <linux/serial.h>
26 26#include <linux/io.h>
27#include <linux/mtd/mtd.h> 27#include <linux/mtd/mtd.h>
28#include <linux/mtd/nand.h> 28#include <linux/mtd/nand.h>
29#include <linux/mtd/nand_ecc.h> 29#include <linux/mtd/nand_ecc.h>
@@ -34,7 +34,6 @@
34#include <asm/mach/irq.h> 34#include <asm/mach/irq.h>
35 35
36#include <mach/hardware.h> 36#include <mach/hardware.h>
37#include <asm/io.h>
38#include <asm/irq.h> 37#include <asm/irq.h>
39#include <asm/mach-types.h> 38#include <asm/mach-types.h>
40 39
diff --git a/arch/arm/mach-s3c2440/mach-smdk2440.c b/arch/arm/mach-s3c2440/mach-smdk2440.c
index 327c8f371984..7ac60b869e7f 100644
--- a/arch/arm/mach-s3c2440/mach-smdk2440.c
+++ b/arch/arm/mach-s3c2440/mach-smdk2440.c
@@ -21,13 +21,13 @@
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/serial_core.h> 22#include <linux/serial_core.h>
23#include <linux/platform_device.h> 23#include <linux/platform_device.h>
24#include <linux/io.h>
24 25
25#include <asm/mach/arch.h> 26#include <asm/mach/arch.h>
26#include <asm/mach/map.h> 27#include <asm/mach/map.h>
27#include <asm/mach/irq.h> 28#include <asm/mach/irq.h>
28 29
29#include <mach/hardware.h> 30#include <mach/hardware.h>
30#include <asm/io.h>
31#include <asm/irq.h> 31#include <asm/irq.h>
32#include <asm/mach-types.h> 32#include <asm/mach-types.h>
33 33
diff --git a/arch/arm/mach-s3c2440/s3c2440.c b/arch/arm/mach-s3c2440/s3c2440.c
index d6b9a92d284e..c81cdb330712 100644
--- a/arch/arm/mach-s3c2440/s3c2440.c
+++ b/arch/arm/mach-s3c2440/s3c2440.c
@@ -20,13 +20,13 @@
20#include <linux/serial_core.h> 20#include <linux/serial_core.h>
21#include <linux/sysdev.h> 21#include <linux/sysdev.h>
22#include <linux/clk.h> 22#include <linux/clk.h>
23#include <linux/io.h>
23 24
24#include <asm/mach/arch.h> 25#include <asm/mach/arch.h>
25#include <asm/mach/map.h> 26#include <asm/mach/map.h>
26#include <asm/mach/irq.h> 27#include <asm/mach/irq.h>
27 28
28#include <mach/hardware.h> 29#include <mach/hardware.h>
29#include <asm/io.h>
30#include <asm/irq.h> 30#include <asm/irq.h>
31 31
32#include <asm/plat-s3c24xx/s3c2440.h> 32#include <asm/plat-s3c24xx/s3c2440.h>
diff --git a/arch/arm/mach-s3c2442/clock.c b/arch/arm/mach-s3c2442/clock.c
index 569b5c3d334a..18f2ce4d7b23 100644
--- a/arch/arm/mach-s3c2442/clock.c
+++ b/arch/arm/mach-s3c2442/clock.c
@@ -33,11 +33,11 @@
33#include <linux/ioport.h> 33#include <linux/ioport.h>
34#include <linux/mutex.h> 34#include <linux/mutex.h>
35#include <linux/clk.h> 35#include <linux/clk.h>
36#include <linux/io.h>
36 37
37#include <mach/hardware.h> 38#include <mach/hardware.h>
38#include <asm/atomic.h> 39#include <asm/atomic.h>
39#include <asm/irq.h> 40#include <asm/irq.h>
40#include <asm/io.h>
41 41
42#include <mach/regs-clock.h> 42#include <mach/regs-clock.h>
43 43
diff --git a/arch/arm/mach-s3c2443/clock.c b/arch/arm/mach-s3c2443/clock.c
index 6a8d7cced4a2..603b5ea1deab 100644
--- a/arch/arm/mach-s3c2443/clock.c
+++ b/arch/arm/mach-s3c2443/clock.c
@@ -31,11 +31,11 @@
31#include <linux/mutex.h> 31#include <linux/mutex.h>
32#include <linux/delay.h> 32#include <linux/delay.h>
33#include <linux/serial_core.h> 33#include <linux/serial_core.h>
34#include <linux/io.h>
34 35
35#include <asm/mach/map.h> 36#include <asm/mach/map.h>
36 37
37#include <mach/hardware.h> 38#include <mach/hardware.h>
38#include <asm/io.h>
39 39
40#include <mach/regs-s3c2443-clock.h> 40#include <mach/regs-s3c2443-clock.h>
41 41
diff --git a/arch/arm/mach-s3c2443/dma.c b/arch/arm/mach-s3c2443/dma.c
index c1ff03aebfda..5d9ee772659b 100644
--- a/arch/arm/mach-s3c2443/dma.c
+++ b/arch/arm/mach-s3c2443/dma.c
@@ -16,10 +16,10 @@
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/sysdev.h> 17#include <linux/sysdev.h>
18#include <linux/serial_core.h> 18#include <linux/serial_core.h>
19#include <linux/io.h>
19 20
20#include <asm/dma.h> 21#include <asm/dma.h>
21#include <mach/dma.h> 22#include <mach/dma.h>
22#include <asm/io.h>
23 23
24#include <asm/plat-s3c24xx/dma.h> 24#include <asm/plat-s3c24xx/dma.h>
25#include <asm/plat-s3c24xx/cpu.h> 25#include <asm/plat-s3c24xx/cpu.h>
diff --git a/arch/arm/mach-s3c2443/irq.c b/arch/arm/mach-s3c2443/irq.c
index 9674de7223fd..e44341d7dfef 100644
--- a/arch/arm/mach-s3c2443/irq.c
+++ b/arch/arm/mach-s3c2443/irq.c
@@ -24,10 +24,10 @@
24#include <linux/interrupt.h> 24#include <linux/interrupt.h>
25#include <linux/ioport.h> 25#include <linux/ioport.h>
26#include <linux/sysdev.h> 26#include <linux/sysdev.h>
27#include <linux/io.h>
27 28
28#include <mach/hardware.h> 29#include <mach/hardware.h>
29#include <asm/irq.h> 30#include <asm/irq.h>
30#include <asm/io.h>
31 31
32#include <asm/mach/irq.h> 32#include <asm/mach/irq.h>
33 33
@@ -44,7 +44,6 @@ static inline void s3c2443_irq_demux(unsigned int irq, unsigned int len)
44{ 44{
45 unsigned int subsrc, submsk; 45 unsigned int subsrc, submsk;
46 unsigned int end; 46 unsigned int end;
47 struct irq_desc *mydesc;
48 47
49 /* read the current pending interrupts, and the mask 48 /* read the current pending interrupts, and the mask
50 * for what it is available */ 49 * for what it is available */
@@ -57,13 +56,11 @@ static inline void s3c2443_irq_demux(unsigned int irq, unsigned int len)
57 subsrc &= (1 << len)-1; 56 subsrc &= (1 << len)-1;
58 57
59 end = len + irq; 58 end = len + irq;
60 mydesc = irq_desc + irq;
61 59
62 for (; irq < end && subsrc; irq++) { 60 for (; irq < end && subsrc; irq++) {
63 if (subsrc & 1) 61 if (subsrc & 1)
64 desc_handle_irq(irq, mydesc); 62 generic_handle_irq(irq);
65 63
66 mydesc++;
67 subsrc >>= 1; 64 subsrc >>= 1;
68 } 65 }
69} 66}
diff --git a/arch/arm/mach-s3c2443/mach-smdk2443.c b/arch/arm/mach-s3c2443/mach-smdk2443.c
index e3c0d587bd10..f0d119dc0409 100644
--- a/arch/arm/mach-s3c2443/mach-smdk2443.c
+++ b/arch/arm/mach-s3c2443/mach-smdk2443.c
@@ -21,13 +21,13 @@
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/serial_core.h> 22#include <linux/serial_core.h>
23#include <linux/platform_device.h> 23#include <linux/platform_device.h>
24#include <linux/io.h>
24 25
25#include <asm/mach/arch.h> 26#include <asm/mach/arch.h>
26#include <asm/mach/map.h> 27#include <asm/mach/map.h>
27#include <asm/mach/irq.h> 28#include <asm/mach/irq.h>
28 29
29#include <mach/hardware.h> 30#include <mach/hardware.h>
30#include <asm/io.h>
31#include <asm/irq.h> 31#include <asm/irq.h>
32#include <asm/mach-types.h> 32#include <asm/mach-types.h>
33 33
diff --git a/arch/arm/mach-s3c2443/s3c2443.c b/arch/arm/mach-s3c2443/s3c2443.c
index 37793f924b5e..c973b68cc735 100644
--- a/arch/arm/mach-s3c2443/s3c2443.c
+++ b/arch/arm/mach-s3c2443/s3c2443.c
@@ -20,13 +20,13 @@
20#include <linux/serial_core.h> 20#include <linux/serial_core.h>
21#include <linux/sysdev.h> 21#include <linux/sysdev.h>
22#include <linux/clk.h> 22#include <linux/clk.h>
23#include <linux/io.h>
23 24
24#include <asm/mach/arch.h> 25#include <asm/mach/arch.h>
25#include <asm/mach/map.h> 26#include <asm/mach/map.h>
26#include <asm/mach/irq.h> 27#include <asm/mach/irq.h>
27 28
28#include <mach/hardware.h> 29#include <mach/hardware.h>
29#include <asm/io.h>
30#include <asm/irq.h> 30#include <asm/irq.h>
31 31
32#include <mach/regs-s3c2443-clock.h> 32#include <mach/regs-s3c2443-clock.h>
diff --git a/arch/arm/mach-sa1100/badge4.c b/arch/arm/mach-sa1100/badge4.c
index 3efefbdd2527..ab5883b39ddf 100644
--- a/arch/arm/mach-sa1100/badge4.c
+++ b/arch/arm/mach-sa1100/badge4.c
@@ -95,19 +95,19 @@ static int __init badge4_sa1111_init(void)
95 * One-hundred-twenty-seven 32 KiW Main Blocks (8128 Ki b) 95 * One-hundred-twenty-seven 32 KiW Main Blocks (8128 Ki b)
96 */ 96 */
97static struct mtd_partition badge4_partitions[] = { 97static struct mtd_partition badge4_partitions[] = {
98 { 98 {
99 .name = "BLOB boot loader", 99 .name = "BLOB boot loader",
100 .offset = 0, 100 .offset = 0,
101 .size = 0x0000A000 101 .size = 0x0000A000
102 }, { 102 }, {
103 .name = "params", 103 .name = "params",
104 .offset = MTDPART_OFS_APPEND, 104 .offset = MTDPART_OFS_APPEND,
105 .size = 0x00006000 105 .size = 0x00006000
106 }, { 106 }, {
107 .name = "root", 107 .name = "root",
108 .offset = MTDPART_OFS_APPEND, 108 .offset = MTDPART_OFS_APPEND,
109 .size = MTDPART_SIZ_FULL 109 .size = MTDPART_SIZ_FULL
110 } 110 }
111}; 111};
112 112
113static struct flash_platform_data badge4_flash_data = { 113static struct flash_platform_data badge4_flash_data = {
@@ -126,7 +126,7 @@ static int five_v_on __initdata = 0;
126 126
127static int __init five_v_on_setup(char *ignore) 127static int __init five_v_on_setup(char *ignore)
128{ 128{
129 five_v_on = 1; 129 five_v_on = 1;
130 return 1; 130 return 1;
131} 131}
132__setup("five_v_on", five_v_on_setup); 132__setup("five_v_on", five_v_on_setup);
@@ -171,15 +171,15 @@ static int __init badge4_init(void)
171 GPCR = BADGE4_GPIO_TESTPT_J7; 171 GPCR = BADGE4_GPIO_TESTPT_J7;
172 GPDR |= BADGE4_GPIO_TESTPT_J7; 172 GPDR |= BADGE4_GPIO_TESTPT_J7;
173 173
174 /* 5V supply rail. */ 174 /* 5V supply rail. */
175 GPCR = BADGE4_GPIO_PCMEN5V; /* initially off */ 175 GPCR = BADGE4_GPIO_PCMEN5V; /* initially off */
176 GPDR |= BADGE4_GPIO_PCMEN5V; 176 GPDR |= BADGE4_GPIO_PCMEN5V;
177 177
178 /* CPLD sdram type inputs; set up by blob */ 178 /* CPLD sdram type inputs; set up by blob */
179 //GPDR |= (BADGE4_GPIO_SDTYP1 | BADGE4_GPIO_SDTYP0); 179 //GPDR |= (BADGE4_GPIO_SDTYP1 | BADGE4_GPIO_SDTYP0);
180 printk(KERN_DEBUG __FILE__ ": SDRAM CPLD typ1=%d typ0=%d\n", 180 printk(KERN_DEBUG __FILE__ ": SDRAM CPLD typ1=%d typ0=%d\n",
181 !!(GPLR & BADGE4_GPIO_SDTYP1), 181 !!(GPLR & BADGE4_GPIO_SDTYP1),
182 !!(GPLR & BADGE4_GPIO_SDTYP0)); 182 !!(GPLR & BADGE4_GPIO_SDTYP0));
183 183
184 /* SA1111 reset pin; set up by blob */ 184 /* SA1111 reset pin; set up by blob */
185 //GPSR = BADGE4_GPIO_SA1111_NRST; 185 //GPSR = BADGE4_GPIO_SA1111_NRST;
@@ -205,8 +205,8 @@ static int __init badge4_init(void)
205 ret = badge4_sa1111_init(); 205 ret = badge4_sa1111_init();
206 if (ret < 0) 206 if (ret < 0)
207 printk(KERN_ERR 207 printk(KERN_ERR
208 "%s: SA-1111 initialization failed (%d)\n", 208 "%s: SA-1111 initialization failed (%d)\n",
209 __func__, ret); 209 __func__, ret);
210 210
211 211
212 /* maybe turn on 5v0 from the start */ 212 /* maybe turn on 5v0 from the start */
@@ -254,7 +254,7 @@ EXPORT_SYMBOL(badge4_set_5V);
254 254
255 255
256static struct map_desc badge4_io_desc[] __initdata = { 256static struct map_desc badge4_io_desc[] __initdata = {
257 { /* SRAM bank 1 */ 257 { /* SRAM bank 1 */
258 .virtual = 0xf1000000, 258 .virtual = 0xf1000000,
259 .pfn = __phys_to_pfn(0x08000000), 259 .pfn = __phys_to_pfn(0x08000000),
260 .length = 0x00100000, 260 .length = 0x00100000,
diff --git a/arch/arm/mach-sa1100/cpu-sa1100.c b/arch/arm/mach-sa1100/cpu-sa1100.c
index da3a898a6d66..f7fa03478efd 100644
--- a/arch/arm/mach-sa1100/cpu-sa1100.c
+++ b/arch/arm/mach-sa1100/cpu-sa1100.c
@@ -88,6 +88,8 @@
88#include <linux/init.h> 88#include <linux/init.h>
89#include <linux/cpufreq.h> 89#include <linux/cpufreq.h>
90 90
91#include <asm/cputype.h>
92
91#include <mach/hardware.h> 93#include <mach/hardware.h>
92 94
93#include "generic.h" 95#include "generic.h"
@@ -240,7 +242,7 @@ static struct cpufreq_driver sa1100_driver = {
240 242
241static int __init sa1100_dram_init(void) 243static int __init sa1100_dram_init(void)
242{ 244{
243 if ((processor_id & CPU_SA1100_MASK) == CPU_SA1100_ID) 245 if (cpu_is_sa1100())
244 return cpufreq_register_driver(&sa1100_driver); 246 return cpufreq_register_driver(&sa1100_driver);
245 else 247 else
246 return -ENODEV; 248 return -ENODEV;
diff --git a/arch/arm/mach-sa1100/cpu-sa1110.c b/arch/arm/mach-sa1100/cpu-sa1110.c
index 029dbfbbafcf..3e4fb214eada 100644
--- a/arch/arm/mach-sa1100/cpu-sa1110.c
+++ b/arch/arm/mach-sa1100/cpu-sa1110.c
@@ -23,10 +23,11 @@
23#include <linux/cpufreq.h> 23#include <linux/cpufreq.h>
24#include <linux/delay.h> 24#include <linux/delay.h>
25#include <linux/init.h> 25#include <linux/init.h>
26#include <linux/io.h>
26 27
27#include <mach/hardware.h> 28#include <mach/hardware.h>
29#include <asm/cputype.h>
28#include <asm/mach-types.h> 30#include <asm/mach-types.h>
29#include <asm/io.h>
30#include <asm/system.h> 31#include <asm/system.h>
31 32
32#include "generic.h" 33#include "generic.h"
diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c
index b422526f6d8b..c1fbd5b5f9c4 100644
--- a/arch/arm/mach-sa1100/generic.c
+++ b/arch/arm/mach-sa1100/generic.c
@@ -42,7 +42,7 @@ EXPORT_SYMBOL(reset_status);
42static const unsigned short cclk_frequency_100khz[NR_FREQS] = { 42static const unsigned short cclk_frequency_100khz[NR_FREQS] = {
43 590, /* 59.0 MHz */ 43 590, /* 59.0 MHz */
44 737, /* 73.7 MHz */ 44 737, /* 73.7 MHz */
45 885, /* 88.5 MHz */ 45 885, /* 88.5 MHz */
46 1032, /* 103.2 MHz */ 46 1032, /* 103.2 MHz */
47 1180, /* 118.0 MHz */ 47 1180, /* 118.0 MHz */
48 1327, /* 132.7 MHz */ 48 1327, /* 132.7 MHz */
@@ -52,10 +52,10 @@ static const unsigned short cclk_frequency_100khz[NR_FREQS] = {
52 1917, /* 191.7 MHz */ 52 1917, /* 191.7 MHz */
53 2064, /* 206.4 MHz */ 53 2064, /* 206.4 MHz */
54 2212, /* 221.2 MHz */ 54 2212, /* 221.2 MHz */
55 2359, /* 235.9 MHz */ 55 2359, /* 235.9 MHz */
56 2507, /* 250.7 MHz */ 56 2507, /* 250.7 MHz */
57 2654, /* 265.4 MHz */ 57 2654, /* 265.4 MHz */
58 2802 /* 280.2 MHz */ 58 2802 /* 280.2 MHz */
59}; 59};
60 60
61#if defined(CONFIG_CPU_FREQ_SA1100) || defined(CONFIG_CPU_FREQ_SA1110) 61#if defined(CONFIG_CPU_FREQ_SA1100) || defined(CONFIG_CPU_FREQ_SA1110)
@@ -113,7 +113,7 @@ unsigned int sa11x0_getspeed(unsigned int cpu)
113#else 113#else
114/* 114/*
115 * We still need to provide this so building without cpufreq works. 115 * We still need to provide this so building without cpufreq works.
116 */ 116 */
117unsigned int cpufreq_get(unsigned int cpu) 117unsigned int cpufreq_get(unsigned int cpu)
118{ 118{
119 return cclk_frequency_100khz[PPCR & 0xf] * 100; 119 return cclk_frequency_100khz[PPCR & 0xf] * 100;
@@ -389,7 +389,7 @@ EXPORT_SYMBOL(sa1100fb_lcd_power);
389 */ 389 */
390 390
391static struct map_desc standard_io_desc[] __initdata = { 391static struct map_desc standard_io_desc[] __initdata = {
392 { /* PCM */ 392 { /* PCM */
393 .virtual = 0xf8000000, 393 .virtual = 0xf8000000,
394 .pfn = __phys_to_pfn(0x80000000), 394 .pfn = __phys_to_pfn(0x80000000),
395 .length = 0x00100000, 395 .length = 0x00100000,
diff --git a/arch/arm/mach-sa1100/include/mach/SA-1100.h b/arch/arm/mach-sa1100/include/mach/SA-1100.h
index 62aaf04a3906..4f7ea012e1e5 100644
--- a/arch/arm/mach-sa1100/include/mach/SA-1100.h
+++ b/arch/arm/mach-sa1100/include/mach/SA-1100.h
@@ -2054,19 +2054,3 @@
2054 /* active display mode) */ 2054 /* active display mode) */
2055#define LCCR3_OutEnH (LCCR3_OEP*0) /* Output Enable active High */ 2055#define LCCR3_OutEnH (LCCR3_OEP*0) /* Output Enable active High */
2056#define LCCR3_OutEnL (LCCR3_OEP*1) /* Output Enable active Low */ 2056#define LCCR3_OutEnL (LCCR3_OEP*1) /* Output Enable active Low */
2057
2058#ifndef __ASSEMBLY__
2059extern unsigned int processor_id;
2060#endif
2061
2062#define CPU_REVISION (processor_id & 15)
2063#define CPU_SA1110_A0 (0)
2064#define CPU_SA1110_B0 (4)
2065#define CPU_SA1110_B1 (5)
2066#define CPU_SA1110_B2 (6)
2067#define CPU_SA1110_B4 (8)
2068
2069#define CPU_SA1100_ID (0x4401a110)
2070#define CPU_SA1100_MASK (0xfffffff0)
2071#define CPU_SA1110_ID (0x6901b110)
2072#define CPU_SA1110_MASK (0xfffffff0)
diff --git a/arch/arm/mach-sa1100/include/mach/hardware.h b/arch/arm/mach-sa1100/include/mach/hardware.h
index 5976435f42c2..b70846c096aa 100644
--- a/arch/arm/mach-sa1100/include/mach/hardware.h
+++ b/arch/arm/mach-sa1100/include/mach/hardware.h
@@ -36,8 +36,26 @@
36#define io_v2p( x ) \ 36#define io_v2p( x ) \
37 ( (((x)&0x00ffffff) | (((x)&(0x30000000>>VIO_SHIFT))<<VIO_SHIFT)) + PIO_START ) 37 ( (((x)&0x00ffffff) | (((x)&(0x30000000>>VIO_SHIFT))<<VIO_SHIFT)) + PIO_START )
38 38
39#define CPU_SA1110_A0 (0)
40#define CPU_SA1110_B0 (4)
41#define CPU_SA1110_B1 (5)
42#define CPU_SA1110_B2 (6)
43#define CPU_SA1110_B4 (8)
44
45#define CPU_SA1100_ID (0x4401a110)
46#define CPU_SA1100_MASK (0xfffffff0)
47#define CPU_SA1110_ID (0x6901b110)
48#define CPU_SA1110_MASK (0xfffffff0)
49
39#ifndef __ASSEMBLY__ 50#ifndef __ASSEMBLY__
40 51
52#include <asm/cputype.h>
53
54#define CPU_REVISION (read_cpuid_id() & 15)
55
56#define cpu_is_sa1100() ((read_cpuid_id() & CPU_SA1100_MASK) == CPU_SA1100_ID)
57#define cpu_is_sa1110() ((read_cpuid_id() & CPU_SA1110_MASK) == CPU_SA1110_ID)
58
41# define __REG(x) (*((volatile unsigned long *)io_p2v(x))) 59# define __REG(x) (*((volatile unsigned long *)io_p2v(x)))
42# define __PREG(x) (io_v2p((unsigned long)&(x))) 60# define __PREG(x) (io_v2p((unsigned long)&(x)))
43 61
diff --git a/arch/arm/mach-sa1100/include/mach/memory.h b/arch/arm/mach-sa1100/include/mach/memory.h
index 29f639e2afc6..1c127b68581d 100644
--- a/arch/arm/mach-sa1100/include/mach/memory.h
+++ b/arch/arm/mach-sa1100/include/mach/memory.h
@@ -40,23 +40,21 @@ void sa1111_adjust_zones(int node, unsigned long *size, unsigned long *holes);
40#define __bus_to_virt(x) __phys_to_virt(x) 40#define __bus_to_virt(x) __phys_to_virt(x)
41 41
42/* 42/*
43 * Because of the wide memory address space between physical RAM banks on the 43 * Because of the wide memory address space between physical RAM banks on the
44 * SA1100, it's much convenient to use Linux's NUMA support to implement our 44 * SA1100, it's much convenient to use Linux's SparseMEM support to implement
45 * memory map representation. Assuming all memory nodes have equal access 45 * our memory map representation. Assuming all memory nodes have equal access
46 * characteristics, we then have generic discontiguous memory support. 46 * characteristics, we then have generic discontiguous memory support.
47 * 47 *
48 * Of course, all this isn't mandatory for SA1100 implementations with only 48 * The sparsemem banks are matched with the physical memory bank addresses
49 * one used memory bank. For those, simply undefine CONFIG_DISCONTIGMEM. 49 * which are incidentally the same as virtual addresses.
50 *
51 * The nodes are matched with the physical memory bank addresses which are
52 * incidentally the same as virtual addresses.
53 * 50 *
54 * node 0: 0xc0000000 - 0xc7ffffff 51 * node 0: 0xc0000000 - 0xc7ffffff
55 * node 1: 0xc8000000 - 0xcfffffff 52 * node 1: 0xc8000000 - 0xcfffffff
56 * node 2: 0xd0000000 - 0xd7ffffff 53 * node 2: 0xd0000000 - 0xd7ffffff
57 * node 3: 0xd8000000 - 0xdfffffff 54 * node 3: 0xd8000000 - 0xdfffffff
58 */ 55 */
59#define NODE_MEM_SIZE_BITS 27 56#define MAX_PHYSMEM_BITS 32
57#define SECTION_SIZE_BITS 27
60 58
61/* 59/*
62 * Cache flushing area - SA1100 zero bank 60 * Cache flushing area - SA1100 zero bank
diff --git a/arch/arm/mach-sa1100/irq.c b/arch/arm/mach-sa1100/irq.c
index 86369a8f0cea..3093d46a9c6f 100644
--- a/arch/arm/mach-sa1100/irq.c
+++ b/arch/arm/mach-sa1100/irq.c
@@ -122,14 +122,12 @@ sa1100_high_gpio_handler(unsigned int irq, struct irq_desc *desc)
122 GEDR = mask; 122 GEDR = mask;
123 123
124 irq = IRQ_GPIO11; 124 irq = IRQ_GPIO11;
125 desc = irq_desc + irq;
126 mask >>= 11; 125 mask >>= 11;
127 do { 126 do {
128 if (mask & 1) 127 if (mask & 1)
129 desc_handle_irq(irq, desc); 128 generic_handle_irq(irq);
130 mask >>= 1; 129 mask >>= 1;
131 irq++; 130 irq++;
132 desc++;
133 } while (mask); 131 } while (mask);
134 132
135 mask = GEDR & 0xfffff800; 133 mask = GEDR & 0xfffff800;
diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c
index 4856a6bd2482..6ccd175bc4cf 100644
--- a/arch/arm/mach-sa1100/neponset.c
+++ b/arch/arm/mach-sa1100/neponset.c
@@ -33,8 +33,6 @@ neponset_irq_handler(unsigned int irq, struct irq_desc *desc)
33 unsigned int irr; 33 unsigned int irr;
34 34
35 while (1) { 35 while (1) {
36 struct irq_desc *d;
37
38 /* 36 /*
39 * Acknowledge the parent IRQ. 37 * Acknowledge the parent IRQ.
40 */ 38 */
@@ -67,21 +65,18 @@ neponset_irq_handler(unsigned int irq, struct irq_desc *desc)
67 desc->chip->ack(irq); 65 desc->chip->ack(irq);
68 66
69 if (irr & IRR_ETHERNET) { 67 if (irr & IRR_ETHERNET) {
70 d = irq_desc + IRQ_NEPONSET_SMC9196; 68 generic_handle_irq(IRQ_NEPONSET_SMC9196);
71 desc_handle_irq(IRQ_NEPONSET_SMC9196, d);
72 } 69 }
73 70
74 if (irr & IRR_USAR) { 71 if (irr & IRR_USAR) {
75 d = irq_desc + IRQ_NEPONSET_USAR; 72 generic_handle_irq(IRQ_NEPONSET_USAR);
76 desc_handle_irq(IRQ_NEPONSET_USAR, d);
77 } 73 }
78 74
79 desc->chip->unmask(irq); 75 desc->chip->unmask(irq);
80 } 76 }
81 77
82 if (irr & IRR_SA1111) { 78 if (irr & IRR_SA1111) {
83 d = irq_desc + IRQ_NEPONSET_SA1111; 79 generic_handle_irq(IRQ_NEPONSET_SA1111);
84 desc_handle_irq(IRQ_NEPONSET_SA1111, d);
85 } 80 }
86 } 81 }
87} 82}
diff --git a/arch/arm/mach-sa1100/pleb.c b/arch/arm/mach-sa1100/pleb.c
index 83be1c6c5f80..e45d3a1890bc 100644
--- a/arch/arm/mach-sa1100/pleb.c
+++ b/arch/arm/mach-sa1100/pleb.c
@@ -8,11 +8,10 @@
8#include <linux/ioport.h> 8#include <linux/ioport.h>
9#include <linux/platform_device.h> 9#include <linux/platform_device.h>
10#include <linux/irq.h> 10#include <linux/irq.h>
11 11#include <linux/io.h>
12#include <linux/mtd/partitions.h> 12#include <linux/mtd/partitions.h>
13 13
14#include <mach/hardware.h> 14#include <mach/hardware.h>
15#include <asm/io.h>
16#include <asm/setup.h> 15#include <asm/setup.h>
17#include <asm/mach-types.h> 16#include <asm/mach-types.h>
18 17
@@ -39,8 +38,8 @@
39 38
40static struct resource smc91x_resources[] = { 39static struct resource smc91x_resources[] = {
41 [0] = { 40 [0] = {
42 .start = PLEB_ETH0_P, 41 .start = PLEB_ETH0_P,
43 .end = PLEB_ETH0_P | 0x03ffffff, 42 .end = PLEB_ETH0_P | 0x03ffffff,
44 .flags = IORESOURCE_MEM, 43 .flags = IORESOURCE_MEM,
45 }, 44 },
46#if 0 /* Autoprobe instead, to get rising/falling edge characteristic right */ 45#if 0 /* Autoprobe instead, to get rising/falling edge characteristic right */
@@ -87,15 +86,15 @@ static struct resource pleb_flash_resources[] = {
87static struct mtd_partition pleb_partitions[] = { 86static struct mtd_partition pleb_partitions[] = {
88 { 87 {
89 .name = "blob", 88 .name = "blob",
90 .offset = 0, 89 .offset = 0,
91 .size = 0x00020000, 90 .size = 0x00020000,
92 }, { 91 }, {
93 .name = "kernel", 92 .name = "kernel",
94 .offset = MTDPART_OFS_APPEND, 93 .offset = MTDPART_OFS_APPEND,
95 .size = 0x000e0000, 94 .size = 0x000e0000,
96 }, { 95 }, {
97 .name = "rootfs", 96 .name = "rootfs",
98 .offset = MTDPART_OFS_APPEND, 97 .offset = MTDPART_OFS_APPEND,
99 .size = 0x00300000, 98 .size = 0x00300000,
100 } 99 }
101}; 100};
diff --git a/arch/arm/mach-sa1100/simpad.c b/arch/arm/mach-sa1100/simpad.c
index 8dd635317959..3c74534f7fee 100644
--- a/arch/arm/mach-sa1100/simpad.c
+++ b/arch/arm/mach-sa1100/simpad.c
@@ -12,6 +12,7 @@
12#include <linux/platform_device.h> 12#include <linux/platform_device.h>
13#include <linux/mtd/mtd.h> 13#include <linux/mtd/mtd.h>
14#include <linux/mtd/partitions.h> 14#include <linux/mtd/partitions.h>
15#include <linux/io.h>
15 16
16#include <asm/irq.h> 17#include <asm/irq.h>
17#include <mach/hardware.h> 18#include <mach/hardware.h>
@@ -27,7 +28,6 @@
27 28
28#include <linux/serial_core.h> 29#include <linux/serial_core.h>
29#include <linux/ioport.h> 30#include <linux/ioport.h>
30#include <asm/io.h>
31 31
32#include "generic.h" 32#include "generic.h"
33 33
diff --git a/arch/arm/mach-sa1100/ssp.c b/arch/arm/mach-sa1100/ssp.c
index 641f361c56f4..b20ff93b84a5 100644
--- a/arch/arm/mach-sa1100/ssp.c
+++ b/arch/arm/mach-sa1100/ssp.c
@@ -17,8 +17,8 @@
17#include <linux/interrupt.h> 17#include <linux/interrupt.h>
18#include <linux/ioport.h> 18#include <linux/ioport.h>
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/io.h>
20 21
21#include <asm/io.h>
22#include <asm/irq.h> 22#include <asm/irq.h>
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24#include <asm/hardware/ssp.h> 24#include <asm/hardware/ssp.h>
diff --git a/arch/arm/mach-shark/core.c b/arch/arm/mach-shark/core.c
index 09d9f33d4072..a9400d984451 100644
--- a/arch/arm/mach-shark/core.c
+++ b/arch/arm/mach-shark/core.c
@@ -9,10 +9,10 @@
9#include <linux/irq.h> 9#include <linux/irq.h>
10#include <linux/sched.h> 10#include <linux/sched.h>
11#include <linux/serial_8250.h> 11#include <linux/serial_8250.h>
12#include <linux/io.h>
12 13
13#include <asm/setup.h> 14#include <asm/setup.h>
14#include <asm/mach-types.h> 15#include <asm/mach-types.h>
15#include <asm/io.h>
16#include <asm/leds.h> 16#include <asm/leds.h>
17#include <asm/param.h> 17#include <asm/param.h>
18 18
diff --git a/arch/arm/mach-shark/include/mach/system.h b/arch/arm/mach-shark/include/mach/system.h
index 85aceef6f874..e45bd734a03e 100644
--- a/arch/arm/mach-shark/include/mach/system.h
+++ b/arch/arm/mach-shark/include/mach/system.h
@@ -6,7 +6,7 @@
6#ifndef __ASM_ARCH_SYSTEM_H 6#ifndef __ASM_ARCH_SYSTEM_H
7#define __ASM_ARCH_SYSTEM_H 7#define __ASM_ARCH_SYSTEM_H
8 8
9#include <asm/io.h> 9#include <linux/io.h>
10 10
11static void arch_reset(char mode) 11static void arch_reset(char mode)
12{ 12{
diff --git a/arch/arm/mach-shark/irq.c b/arch/arm/mach-shark/irq.c
index 44b0811b400c..c04eb6a1e2be 100644
--- a/arch/arm/mach-shark/irq.c
+++ b/arch/arm/mach-shark/irq.c
@@ -11,9 +11,9 @@
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/fs.h> 12#include <linux/fs.h>
13#include <linux/interrupt.h> 13#include <linux/interrupt.h>
14#include <linux/io.h>
14 15
15#include <asm/irq.h> 16#include <asm/irq.h>
16#include <asm/io.h>
17#include <asm/mach/irq.h> 17#include <asm/mach/irq.h>
18 18
19/* 19/*
diff --git a/arch/arm/mach-shark/leds.c b/arch/arm/mach-shark/leds.c
index b1896471aa3c..8bd8d6bb4d92 100644
--- a/arch/arm/mach-shark/leds.c
+++ b/arch/arm/mach-shark/leds.c
@@ -20,10 +20,10 @@
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/spinlock.h> 21#include <linux/spinlock.h>
22#include <linux/ioport.h> 22#include <linux/ioport.h>
23#include <linux/io.h>
23 24
24#include <mach/hardware.h> 25#include <mach/hardware.h>
25#include <asm/leds.h> 26#include <asm/leds.h>
26#include <asm/io.h>
27#include <asm/system.h> 27#include <asm/system.h>
28 28
29#define LED_STATE_ENABLED 1 29#define LED_STATE_ENABLED 1
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index b638f10411e8..565e0ba0d67e 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -29,10 +29,10 @@
29#include <linux/clocksource.h> 29#include <linux/clocksource.h>
30#include <linux/clockchips.h> 30#include <linux/clockchips.h>
31#include <linux/cnt32_to_63.h> 31#include <linux/cnt32_to_63.h>
32#include <linux/io.h>
32 33
33#include <asm/system.h> 34#include <asm/system.h>
34#include <mach/hardware.h> 35#include <mach/hardware.h>
35#include <asm/io.h>
36#include <asm/irq.h> 36#include <asm/irq.h>
37#include <asm/leds.h> 37#include <asm/leds.h>
38#include <asm/hardware/arm_timer.h> 38#include <asm/hardware/arm_timer.h>
@@ -95,8 +95,7 @@ sic_handle_irq(unsigned int irq, struct irq_desc *desc)
95 95
96 irq += IRQ_SIC_START; 96 irq += IRQ_SIC_START;
97 97
98 desc = irq_desc + irq; 98 generic_handle_irq(irq);
99 desc_handle_irq(irq, desc);
100 } while (status); 99 } while (status);
101} 100}
102 101
diff --git a/arch/arm/mach-versatile/include/mach/system.h b/arch/arm/mach-versatile/include/mach/system.h
index 91fa559c7cca..c59e6100c7e3 100644
--- a/arch/arm/mach-versatile/include/mach/system.h
+++ b/arch/arm/mach-versatile/include/mach/system.h
@@ -21,8 +21,8 @@
21#ifndef __ASM_ARCH_SYSTEM_H 21#ifndef __ASM_ARCH_SYSTEM_H
22#define __ASM_ARCH_SYSTEM_H 22#define __ASM_ARCH_SYSTEM_H
23 23
24#include <linux/io.h>
24#include <mach/hardware.h> 25#include <mach/hardware.h>
25#include <asm/io.h>
26#include <mach/platform.h> 26#include <mach/platform.h>
27 27
28static inline void arch_idle(void) 28static inline void arch_idle(void)
diff --git a/arch/arm/mach-versatile/pci.c b/arch/arm/mach-versatile/pci.c
index 36f23f896503..7161ba23b58a 100644
--- a/arch/arm/mach-versatile/pci.c
+++ b/arch/arm/mach-versatile/pci.c
@@ -21,9 +21,9 @@
21#include <linux/interrupt.h> 21#include <linux/interrupt.h>
22#include <linux/spinlock.h> 22#include <linux/spinlock.h>
23#include <linux/init.h> 23#include <linux/init.h>
24#include <linux/io.h>
24 25
25#include <mach/hardware.h> 26#include <mach/hardware.h>
26#include <asm/io.h>
27#include <asm/irq.h> 27#include <asm/irq.h>
28#include <asm/system.h> 28#include <asm/system.h>
29#include <asm/mach/pci.h> 29#include <asm/mach/pci.h>
diff --git a/arch/arm/mach-versatile/versatile_ab.c b/arch/arm/mach-versatile/versatile_ab.c
index 76375c64413a..bb8ec7724f79 100644
--- a/arch/arm/mach-versatile/versatile_ab.c
+++ b/arch/arm/mach-versatile/versatile_ab.c
@@ -23,9 +23,9 @@
23#include <linux/device.h> 23#include <linux/device.h>
24#include <linux/sysdev.h> 24#include <linux/sysdev.h>
25#include <linux/amba/bus.h> 25#include <linux/amba/bus.h>
26#include <linux/io.h>
26 27
27#include <mach/hardware.h> 28#include <mach/hardware.h>
28#include <asm/io.h>
29#include <asm/irq.h> 29#include <asm/irq.h>
30#include <asm/mach-types.h> 30#include <asm/mach-types.h>
31 31
diff --git a/arch/arm/mach-versatile/versatile_pb.c b/arch/arm/mach-versatile/versatile_pb.c
index 1725f019fc85..aa051c0884f8 100644
--- a/arch/arm/mach-versatile/versatile_pb.c
+++ b/arch/arm/mach-versatile/versatile_pb.c
@@ -23,9 +23,9 @@
23#include <linux/device.h> 23#include <linux/device.h>
24#include <linux/sysdev.h> 24#include <linux/sysdev.h>
25#include <linux/amba/bus.h> 25#include <linux/amba/bus.h>
26#include <linux/io.h>
26 27
27#include <mach/hardware.h> 28#include <mach/hardware.h>
28#include <asm/io.h>
29#include <asm/irq.h> 29#include <asm/irq.h>
30#include <asm/mach-types.h> 30#include <asm/mach-types.h>
31 31
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index ed15f876c725..330814d1ee25 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -735,6 +735,14 @@ config CACHE_FEROCEON_L2
735 help 735 help
736 This option enables the Feroceon L2 cache controller. 736 This option enables the Feroceon L2 cache controller.
737 737
738config CACHE_FEROCEON_L2_WRITETHROUGH
739 bool "Force Feroceon L2 cache write through"
740 depends on CACHE_FEROCEON_L2
741 default n
742 help
743 Say Y here to use the Feroceon L2 cache in writethrough mode.
744 Unless you specifically require this, say N for writeback mode.
745
738config CACHE_L2X0 746config CACHE_L2X0
739 bool "Enable the L2x0 outer cache controller" 747 bool "Enable the L2x0 outer cache controller"
740 depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 748 depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176
diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile
index 2e27a8c8372b..480f78a3611a 100644
--- a/arch/arm/mm/Makefile
+++ b/arch/arm/mm/Makefile
@@ -2,7 +2,7 @@
2# Makefile for the linux arm-specific parts of the memory manager. 2# Makefile for the linux arm-specific parts of the memory manager.
3# 3#
4 4
5obj-y := consistent.o extable.o fault.o init.o \ 5obj-y := dma-mapping.o extable.o fault.o init.o \
6 iomap.o 6 iomap.o
7 7
8obj-$(CONFIG_MMU) += fault-armv.o flush.o ioremap.o mmap.o \ 8obj-$(CONFIG_MMU) += fault-armv.o flush.o ioremap.o mmap.o \
diff --git a/arch/arm/mm/abort-ev7.S b/arch/arm/mm/abort-ev7.S
index eb90bce38e14..2e6dc040c654 100644
--- a/arch/arm/mm/abort-ev7.S
+++ b/arch/arm/mm/abort-ev7.S
@@ -30,3 +30,4 @@ ENTRY(v7_early_abort)
30 * New designs should not need to patch up faults. 30 * New designs should not need to patch up faults.
31 */ 31 */
32 mov pc, lr 32 mov pc, lr
33ENDPROC(v7_early_abort)
diff --git a/arch/arm/mm/abort-nommu.S b/arch/arm/mm/abort-nommu.S
index a7cc7f9ee45d..625e580945b5 100644
--- a/arch/arm/mm/abort-nommu.S
+++ b/arch/arm/mm/abort-nommu.S
@@ -17,3 +17,4 @@ ENTRY(nommu_early_abort)
17 mov r0, #0 @ clear r0, r1 (no FSR/FAR) 17 mov r0, #0 @ clear r0, r1 (no FSR/FAR)
18 mov r1, #0 18 mov r1, #0
19 mov pc, lr 19 mov pc, lr
20ENDPROC(nommu_early_abort)
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
index e162cca5917f..133e65d166b3 100644
--- a/arch/arm/mm/alignment.c
+++ b/arch/arm/mm/alignment.c
@@ -17,8 +17,8 @@
17#include <linux/string.h> 17#include <linux/string.h>
18#include <linux/proc_fs.h> 18#include <linux/proc_fs.h>
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/uaccess.h>
20 21
21#include <asm/uaccess.h>
22#include <asm/unaligned.h> 22#include <asm/unaligned.h>
23 23
24#include "fault.h" 24#include "fault.h"
diff --git a/arch/arm/mm/cache-feroceon-l2.c b/arch/arm/mm/cache-feroceon-l2.c
index 7b5a25d81576..13cdae8b0d44 100644
--- a/arch/arm/mm/cache-feroceon-l2.c
+++ b/arch/arm/mm/cache-feroceon-l2.c
@@ -48,11 +48,12 @@ static inline void l2_clean_mva_range(unsigned long start, unsigned long end)
48 * L2 is PIPT and range operations only do a TLB lookup on 48 * L2 is PIPT and range operations only do a TLB lookup on
49 * the start address. 49 * the start address.
50 */ 50 */
51 BUG_ON((start ^ end) & ~(PAGE_SIZE - 1)); 51 BUG_ON((start ^ end) >> PAGE_SHIFT);
52 52
53 raw_local_irq_save(flags); 53 raw_local_irq_save(flags);
54 __asm__("mcr p15, 1, %0, c15, c9, 4" : : "r" (start)); 54 __asm__("mcr p15, 1, %0, c15, c9, 4\n\t"
55 __asm__("mcr p15, 1, %0, c15, c9, 5" : : "r" (end)); 55 "mcr p15, 1, %1, c15, c9, 5"
56 : : "r" (start), "r" (end));
56 raw_local_irq_restore(flags); 57 raw_local_irq_restore(flags);
57} 58}
58 59
@@ -80,11 +81,12 @@ static inline void l2_inv_mva_range(unsigned long start, unsigned long end)
80 * L2 is PIPT and range operations only do a TLB lookup on 81 * L2 is PIPT and range operations only do a TLB lookup on
81 * the start address. 82 * the start address.
82 */ 83 */
83 BUG_ON((start ^ end) & ~(PAGE_SIZE - 1)); 84 BUG_ON((start ^ end) >> PAGE_SHIFT);
84 85
85 raw_local_irq_save(flags); 86 raw_local_irq_save(flags);
86 __asm__("mcr p15, 1, %0, c15, c11, 4" : : "r" (start)); 87 __asm__("mcr p15, 1, %0, c15, c11, 4\n\t"
87 __asm__("mcr p15, 1, %0, c15, c11, 5" : : "r" (end)); 88 "mcr p15, 1, %1, c15, c11, 5"
89 : : "r" (start), "r" (end));
88 raw_local_irq_restore(flags); 90 raw_local_irq_restore(flags);
89} 91}
90 92
@@ -205,7 +207,7 @@ static void feroceon_l2_flush_range(unsigned long start, unsigned long end)
205 * time. These are necessary because the L2 cache can only be enabled 207 * time. These are necessary because the L2 cache can only be enabled
206 * or disabled while the L1 Dcache and Icache are both disabled. 208 * or disabled while the L1 Dcache and Icache are both disabled.
207 */ 209 */
208static void __init invalidate_and_disable_dcache(void) 210static int __init flush_and_disable_dcache(void)
209{ 211{
210 u32 cr; 212 u32 cr;
211 213
@@ -217,7 +219,9 @@ static void __init invalidate_and_disable_dcache(void)
217 flush_cache_all(); 219 flush_cache_all();
218 set_cr(cr & ~CR_C); 220 set_cr(cr & ~CR_C);
219 raw_local_irq_restore(flags); 221 raw_local_irq_restore(flags);
222 return 1;
220 } 223 }
224 return 0;
221} 225}
222 226
223static void __init enable_dcache(void) 227static void __init enable_dcache(void)
@@ -225,18 +229,17 @@ static void __init enable_dcache(void)
225 u32 cr; 229 u32 cr;
226 230
227 cr = get_cr(); 231 cr = get_cr();
228 if (!(cr & CR_C)) 232 set_cr(cr | CR_C);
229 set_cr(cr | CR_C);
230} 233}
231 234
232static void __init __invalidate_icache(void) 235static void __init __invalidate_icache(void)
233{ 236{
234 int dummy; 237 int dummy;
235 238
236 __asm__ __volatile__("mcr p15, 0, %0, c7, c5, 0\n" : "=r" (dummy)); 239 __asm__ __volatile__("mcr p15, 0, %0, c7, c5, 0" : "=r" (dummy));
237} 240}
238 241
239static void __init invalidate_and_disable_icache(void) 242static int __init invalidate_and_disable_icache(void)
240{ 243{
241 u32 cr; 244 u32 cr;
242 245
@@ -244,7 +247,9 @@ static void __init invalidate_and_disable_icache(void)
244 if (cr & CR_I) { 247 if (cr & CR_I) {
245 set_cr(cr & ~CR_I); 248 set_cr(cr & ~CR_I);
246 __invalidate_icache(); 249 __invalidate_icache();
250 return 1;
247 } 251 }
252 return 0;
248} 253}
249 254
250static void __init enable_icache(void) 255static void __init enable_icache(void)
@@ -252,8 +257,7 @@ static void __init enable_icache(void)
252 u32 cr; 257 u32 cr;
253 258
254 cr = get_cr(); 259 cr = get_cr();
255 if (!(cr & CR_I)) 260 set_cr(cr | CR_I);
256 set_cr(cr | CR_I);
257} 261}
258 262
259static inline u32 read_extra_features(void) 263static inline u32 read_extra_features(void)
@@ -291,13 +295,17 @@ static void __init enable_l2(void)
291 295
292 u = read_extra_features(); 296 u = read_extra_features();
293 if (!(u & 0x00400000)) { 297 if (!(u & 0x00400000)) {
298 int i, d;
299
294 printk(KERN_INFO "Feroceon L2: Enabling L2\n"); 300 printk(KERN_INFO "Feroceon L2: Enabling L2\n");
295 301
296 invalidate_and_disable_dcache(); 302 d = flush_and_disable_dcache();
297 invalidate_and_disable_icache(); 303 i = invalidate_and_disable_icache();
298 write_extra_features(u | 0x00400000); 304 write_extra_features(u | 0x00400000);
299 enable_icache(); 305 if (i)
300 enable_dcache(); 306 enable_icache();
307 if (d)
308 enable_dcache();
301 } 309 }
302} 310}
303 311
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 76b800a95191..b480f1d3591f 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -18,9 +18,9 @@
18 */ 18 */
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/spinlock.h> 20#include <linux/spinlock.h>
21#include <linux/io.h>
21 22
22#include <asm/cacheflush.h> 23#include <asm/cacheflush.h>
23#include <asm/io.h>
24#include <asm/hardware/cache-l2x0.h> 24#include <asm/hardware/cache-l2x0.h>
25 25
26#define CACHE_LINE_SIZE 32 26#define CACHE_LINE_SIZE 32
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index 35ffc4d95997..d19c2bec2b1f 100644
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -66,6 +66,7 @@ finished:
66 mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr 66 mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr
67 isb 67 isb
68 mov pc, lr 68 mov pc, lr
69ENDPROC(v7_flush_dcache_all)
69 70
70/* 71/*
71 * v7_flush_cache_all() 72 * v7_flush_cache_all()
@@ -85,6 +86,7 @@ ENTRY(v7_flush_kern_cache_all)
85 mcr p15, 0, r0, c7, c5, 0 @ I+BTB cache invalidate 86 mcr p15, 0, r0, c7, c5, 0 @ I+BTB cache invalidate
86 ldmfd sp!, {r4-r5, r7, r9-r11, lr} 87 ldmfd sp!, {r4-r5, r7, r9-r11, lr}
87 mov pc, lr 88 mov pc, lr
89ENDPROC(v7_flush_kern_cache_all)
88 90
89/* 91/*
90 * v7_flush_cache_all() 92 * v7_flush_cache_all()
@@ -110,6 +112,8 @@ ENTRY(v7_flush_user_cache_all)
110 */ 112 */
111ENTRY(v7_flush_user_cache_range) 113ENTRY(v7_flush_user_cache_range)
112 mov pc, lr 114 mov pc, lr
115ENDPROC(v7_flush_user_cache_all)
116ENDPROC(v7_flush_user_cache_range)
113 117
114/* 118/*
115 * v7_coherent_kern_range(start,end) 119 * v7_coherent_kern_range(start,end)
@@ -155,6 +159,8 @@ ENTRY(v7_coherent_user_range)
155 dsb 159 dsb
156 isb 160 isb
157 mov pc, lr 161 mov pc, lr
162ENDPROC(v7_coherent_kern_range)
163ENDPROC(v7_coherent_user_range)
158 164
159/* 165/*
160 * v7_flush_kern_dcache_page(kaddr) 166 * v7_flush_kern_dcache_page(kaddr)
@@ -174,6 +180,7 @@ ENTRY(v7_flush_kern_dcache_page)
174 blo 1b 180 blo 1b
175 dsb 181 dsb
176 mov pc, lr 182 mov pc, lr
183ENDPROC(v7_flush_kern_dcache_page)
177 184
178/* 185/*
179 * v7_dma_inv_range(start,end) 186 * v7_dma_inv_range(start,end)
@@ -202,6 +209,7 @@ ENTRY(v7_dma_inv_range)
202 blo 1b 209 blo 1b
203 dsb 210 dsb
204 mov pc, lr 211 mov pc, lr
212ENDPROC(v7_dma_inv_range)
205 213
206/* 214/*
207 * v7_dma_clean_range(start,end) 215 * v7_dma_clean_range(start,end)
@@ -219,6 +227,7 @@ ENTRY(v7_dma_clean_range)
219 blo 1b 227 blo 1b
220 dsb 228 dsb
221 mov pc, lr 229 mov pc, lr
230ENDPROC(v7_dma_clean_range)
222 231
223/* 232/*
224 * v7_dma_flush_range(start,end) 233 * v7_dma_flush_range(start,end)
@@ -236,6 +245,7 @@ ENTRY(v7_dma_flush_range)
236 blo 1b 245 blo 1b
237 dsb 246 dsb
238 mov pc, lr 247 mov pc, lr
248ENDPROC(v7_dma_flush_range)
239 249
240 __INITDATA 250 __INITDATA
241 251
diff --git a/arch/arm/mm/cache-xsc3l2.c b/arch/arm/mm/cache-xsc3l2.c
index 158bd96763d3..10b1bae1a258 100644
--- a/arch/arm/mm/cache-xsc3l2.c
+++ b/arch/arm/mm/cache-xsc3l2.c
@@ -18,10 +18,11 @@
18 */ 18 */
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/spinlock.h> 20#include <linux/spinlock.h>
21#include <linux/io.h>
21 22
22#include <asm/system.h> 23#include <asm/system.h>
24#include <asm/cputype.h>
23#include <asm/cacheflush.h> 25#include <asm/cacheflush.h>
24#include <asm/io.h>
25 26
26#define CR_L2 (1 << 26) 27#define CR_L2 (1 << 26)
27 28
diff --git a/arch/arm/mm/copypage-v4mc.c b/arch/arm/mm/copypage-v4mc.c
index ded0e96d069d..8d33e2549344 100644
--- a/arch/arm/mm/copypage-v4mc.c
+++ b/arch/arm/mm/copypage-v4mc.c
@@ -28,7 +28,7 @@
28 * specific hacks for copying pages efficiently. 28 * specific hacks for copying pages efficiently.
29 */ 29 */
30#define minicache_pgprot __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | \ 30#define minicache_pgprot __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | \
31 L_PTE_CACHEABLE) 31 L_PTE_MT_MINICACHE)
32 32
33static DEFINE_SPINLOCK(minicache_lock); 33static DEFINE_SPINLOCK(minicache_lock);
34 34
diff --git a/arch/arm/mm/copypage-v6.c b/arch/arm/mm/copypage-v6.c
index 3adb79257f43..0e21c0767580 100644
--- a/arch/arm/mm/copypage-v6.c
+++ b/arch/arm/mm/copypage-v6.c
@@ -16,6 +16,7 @@
16#include <asm/shmparam.h> 16#include <asm/shmparam.h>
17#include <asm/tlbflush.h> 17#include <asm/tlbflush.h>
18#include <asm/cacheflush.h> 18#include <asm/cacheflush.h>
19#include <asm/cachetype.h>
19 20
20#include "mm.h" 21#include "mm.h"
21 22
diff --git a/arch/arm/mm/copypage-xscale.c b/arch/arm/mm/copypage-xscale.c
index 2e455f82a4d5..bad49331bbf9 100644
--- a/arch/arm/mm/copypage-xscale.c
+++ b/arch/arm/mm/copypage-xscale.c
@@ -30,7 +30,7 @@
30#define COPYPAGE_MINICACHE 0xffff8000 30#define COPYPAGE_MINICACHE 0xffff8000
31 31
32#define minicache_pgprot __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | \ 32#define minicache_pgprot __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | \
33 L_PTE_CACHEABLE) 33 L_PTE_MT_MINICACHE)
34 34
35static DEFINE_SPINLOCK(minicache_lock); 35static DEFINE_SPINLOCK(minicache_lock);
36 36
diff --git a/arch/arm/mm/consistent.c b/arch/arm/mm/dma-mapping.c
index db7b3e38ef1d..67960017dc8f 100644
--- a/arch/arm/mm/consistent.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mm/consistent.c 2 * linux/arch/arm/mm/dma-mapping.c
3 * 3 *
4 * Copyright (C) 2000-2004 Russell King 4 * Copyright (C) 2000-2004 Russell King
5 * 5 *
@@ -512,3 +512,105 @@ void dma_cache_maint(const void *start, size_t size, int direction)
512 } 512 }
513} 513}
514EXPORT_SYMBOL(dma_cache_maint); 514EXPORT_SYMBOL(dma_cache_maint);
515
516/**
517 * dma_map_sg - map a set of SG buffers for streaming mode DMA
518 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
519 * @sg: list of buffers
520 * @nents: number of buffers to map
521 * @dir: DMA transfer direction
522 *
523 * Map a set of buffers described by scatterlist in streaming mode for DMA.
524 * This is the scatter-gather version of the dma_map_single interface.
525 * Here the scatter gather list elements are each tagged with the
526 * appropriate dma address and length. They are obtained via
527 * sg_dma_{address,length}.
528 *
529 * Device ownership issues as mentioned for dma_map_single are the same
530 * here.
531 */
532int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
533 enum dma_data_direction dir)
534{
535 struct scatterlist *s;
536 int i, j;
537
538 for_each_sg(sg, s, nents, i) {
539 s->dma_address = dma_map_page(dev, sg_page(s), s->offset,
540 s->length, dir);
541 if (dma_mapping_error(dev, s->dma_address))
542 goto bad_mapping;
543 }
544 return nents;
545
546 bad_mapping:
547 for_each_sg(sg, s, i, j)
548 dma_unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir);
549 return 0;
550}
551EXPORT_SYMBOL(dma_map_sg);
552
553/**
554 * dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
555 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
556 * @sg: list of buffers
557 * @nents: number of buffers to unmap (returned from dma_map_sg)
558 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
559 *
560 * Unmap a set of streaming mode DMA translations. Again, CPU access
561 * rules concerning calls here are the same as for dma_unmap_single().
562 */
563void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
564 enum dma_data_direction dir)
565{
566 struct scatterlist *s;
567 int i;
568
569 for_each_sg(sg, s, nents, i)
570 dma_unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir);
571}
572EXPORT_SYMBOL(dma_unmap_sg);
573
574/**
575 * dma_sync_sg_for_cpu
576 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
577 * @sg: list of buffers
578 * @nents: number of buffers to map (returned from dma_map_sg)
579 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
580 */
581void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
582 int nents, enum dma_data_direction dir)
583{
584 struct scatterlist *s;
585 int i;
586
587 for_each_sg(sg, s, nents, i) {
588 dmabounce_sync_for_cpu(dev, sg_dma_address(s), 0,
589 sg_dma_len(s), dir);
590 }
591}
592EXPORT_SYMBOL(dma_sync_sg_for_cpu);
593
594/**
595 * dma_sync_sg_for_device
596 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
597 * @sg: list of buffers
598 * @nents: number of buffers to map (returned from dma_map_sg)
599 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
600 */
601void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
602 int nents, enum dma_data_direction dir)
603{
604 struct scatterlist *s;
605 int i;
606
607 for_each_sg(sg, s, nents, i) {
608 if (!dmabounce_sync_for_device(dev, sg_dma_address(s), 0,
609 sg_dma_len(s), dir))
610 continue;
611
612 if (!arch_is_coherent())
613 dma_cache_maint(sg_virt(s), s->length, dir);
614 }
615}
616EXPORT_SYMBOL(dma_sync_sg_for_device);
diff --git a/arch/arm/mm/extable.c b/arch/arm/mm/extable.c
index 9592c3ee4cb2..9d285626bc7d 100644
--- a/arch/arm/mm/extable.c
+++ b/arch/arm/mm/extable.c
@@ -2,7 +2,7 @@
2 * linux/arch/arm/mm/extable.c 2 * linux/arch/arm/mm/extable.c
3 */ 3 */
4#include <linux/module.h> 4#include <linux/module.h>
5#include <asm/uaccess.h> 5#include <linux/uaccess.h>
6 6
7int fixup_exception(struct pt_regs *regs) 7int fixup_exception(struct pt_regs *regs)
8{ 8{
diff --git a/arch/arm/mm/fault-armv.c b/arch/arm/mm/fault-armv.c
index a8ec97b4752e..81d0b8772de3 100644
--- a/arch/arm/mm/fault-armv.c
+++ b/arch/arm/mm/fault-armv.c
@@ -17,11 +17,13 @@
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/pagemap.h> 18#include <linux/pagemap.h>
19 19
20#include <asm/bugs.h>
20#include <asm/cacheflush.h> 21#include <asm/cacheflush.h>
22#include <asm/cachetype.h>
21#include <asm/pgtable.h> 23#include <asm/pgtable.h>
22#include <asm/tlbflush.h> 24#include <asm/tlbflush.h>
23 25
24static unsigned long shared_pte_mask = L_PTE_CACHEABLE; 26static unsigned long shared_pte_mask = L_PTE_MT_BUFFERABLE;
25 27
26/* 28/*
27 * We take the easy way out of this problem - we make the 29 * We take the easy way out of this problem - we make the
@@ -63,9 +65,10 @@ static int adjust_pte(struct vm_area_struct *vma, unsigned long address)
63 * If this page isn't present, or is already setup to 65 * If this page isn't present, or is already setup to
64 * fault (ie, is old), we can safely ignore any issues. 66 * fault (ie, is old), we can safely ignore any issues.
65 */ 67 */
66 if (ret && pte_val(entry) & shared_pte_mask) { 68 if (ret && (pte_val(entry) & L_PTE_MT_MASK) != shared_pte_mask) {
67 flush_cache_page(vma, address, pte_pfn(entry)); 69 flush_cache_page(vma, address, pte_pfn(entry));
68 pte_val(entry) &= ~shared_pte_mask; 70 pte_val(entry) &= ~L_PTE_MT_MASK;
71 pte_val(entry) |= shared_pte_mask;
69 set_pte_at(vma->vm_mm, address, pte, entry); 72 set_pte_at(vma->vm_mm, address, pte, entry);
70 flush_tlb_page(vma, address); 73 flush_tlb_page(vma, address);
71 } 74 }
@@ -197,7 +200,7 @@ void __init check_writebuffer_bugs(void)
197 unsigned long *p1, *p2; 200 unsigned long *p1, *p2;
198 pgprot_t prot = __pgprot(L_PTE_PRESENT|L_PTE_YOUNG| 201 pgprot_t prot = __pgprot(L_PTE_PRESENT|L_PTE_YOUNG|
199 L_PTE_DIRTY|L_PTE_WRITE| 202 L_PTE_DIRTY|L_PTE_WRITE|
200 L_PTE_BUFFERABLE); 203 L_PTE_MT_BUFFERABLE);
201 204
202 p1 = vmap(&page, 1, VM_IOREMAP, prot); 205 p1 = vmap(&page, 1, VM_IOREMAP, prot);
203 p2 = vmap(&page, 1, VM_IOREMAP, prot); 206 p2 = vmap(&page, 1, VM_IOREMAP, prot);
@@ -218,7 +221,7 @@ void __init check_writebuffer_bugs(void)
218 221
219 if (v) { 222 if (v) {
220 printk("failed, %s\n", reason); 223 printk("failed, %s\n", reason);
221 shared_pte_mask |= L_PTE_BUFFERABLE; 224 shared_pte_mask = L_PTE_MT_UNCACHED;
222 } else { 225 } else {
223 printk("ok\n"); 226 printk("ok\n");
224 } 227 }
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c
index 28ad7ab1c0cd..2df8d9facf57 100644
--- a/arch/arm/mm/fault.c
+++ b/arch/arm/mm/fault.c
@@ -13,11 +13,11 @@
13#include <linux/mm.h> 13#include <linux/mm.h>
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/kprobes.h> 15#include <linux/kprobes.h>
16#include <linux/uaccess.h>
16 17
17#include <asm/system.h> 18#include <asm/system.h>
18#include <asm/pgtable.h> 19#include <asm/pgtable.h>
19#include <asm/tlbflush.h> 20#include <asm/tlbflush.h>
20#include <asm/uaccess.h>
21 21
22#include "fault.h" 22#include "fault.h"
23 23
@@ -72,9 +72,8 @@ void show_pte(struct mm_struct *mm, unsigned long addr)
72 } 72 }
73 73
74 pmd = pmd_offset(pgd, addr); 74 pmd = pmd_offset(pgd, addr);
75#if PTRS_PER_PMD != 1 75 if (PTRS_PER_PMD != 1)
76 printk(", *pmd=%08lx", pmd_val(*pmd)); 76 printk(", *pmd=%08lx", pmd_val(*pmd));
77#endif
78 77
79 if (pmd_none(*pmd)) 78 if (pmd_none(*pmd))
80 break; 79 break;
diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c
index 029ee65fda2b..0fa9bf388f0b 100644
--- a/arch/arm/mm/flush.c
+++ b/arch/arm/mm/flush.c
@@ -12,6 +12,7 @@
12#include <linux/pagemap.h> 12#include <linux/pagemap.h>
13 13
14#include <asm/cacheflush.h> 14#include <asm/cacheflush.h>
15#include <asm/cachetype.h>
15#include <asm/system.h> 16#include <asm/system.h>
16#include <asm/tlbflush.h> 17#include <asm/tlbflush.h>
17 18
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 30a69d67d673..82c4b4217989 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -26,9 +26,42 @@
26 26
27#include "mm.h" 27#include "mm.h"
28 28
29extern void _text, _etext, __data_start, _end, __init_begin, __init_end; 29static unsigned long phys_initrd_start __initdata = 0;
30extern unsigned long phys_initrd_start; 30static unsigned long phys_initrd_size __initdata = 0;
31extern unsigned long phys_initrd_size; 31
32static void __init early_initrd(char **p)
33{
34 unsigned long start, size;
35
36 start = memparse(*p, p);
37 if (**p == ',') {
38 size = memparse((*p) + 1, p);
39
40 phys_initrd_start = start;
41 phys_initrd_size = size;
42 }
43}
44__early_param("initrd=", early_initrd);
45
46static int __init parse_tag_initrd(const struct tag *tag)
47{
48 printk(KERN_WARNING "ATAG_INITRD is deprecated; "
49 "please update your bootloader.\n");
50 phys_initrd_start = __virt_to_phys(tag->u.initrd.start);
51 phys_initrd_size = tag->u.initrd.size;
52 return 0;
53}
54
55__tagtable(ATAG_INITRD, parse_tag_initrd);
56
57static int __init parse_tag_initrd2(const struct tag *tag)
58{
59 phys_initrd_start = tag->u.initrd.start;
60 phys_initrd_size = tag->u.initrd.size;
61 return 0;
62}
63
64__tagtable(ATAG_INITRD2, parse_tag_initrd2);
32 65
33/* 66/*
34 * This is used to pass memory configuration data from paging_init 67 * This is used to pass memory configuration data from paging_init
@@ -36,10 +69,6 @@ extern unsigned long phys_initrd_size;
36 */ 69 */
37static struct meminfo meminfo = { 0, }; 70static struct meminfo meminfo = { 0, };
38 71
39#define for_each_nodebank(iter,mi,no) \
40 for (iter = 0; iter < mi->nr_banks; iter++) \
41 if (mi->bank[iter].node == no)
42
43void show_mem(void) 72void show_mem(void)
44{ 73{
45 int free = 0, total = 0, reserved = 0; 74 int free = 0, total = 0, reserved = 0;
@@ -50,14 +79,15 @@ void show_mem(void)
50 show_free_areas(); 79 show_free_areas();
51 for_each_online_node(node) { 80 for_each_online_node(node) {
52 pg_data_t *n = NODE_DATA(node); 81 pg_data_t *n = NODE_DATA(node);
53 struct page *map = n->node_mem_map - n->node_start_pfn; 82 struct page *map = pgdat_page_nr(n, 0) - n->node_start_pfn;
54 83
55 for_each_nodebank (i,mi,node) { 84 for_each_nodebank (i,mi,node) {
85 struct membank *bank = &mi->bank[i];
56 unsigned int pfn1, pfn2; 86 unsigned int pfn1, pfn2;
57 struct page *page, *end; 87 struct page *page, *end;
58 88
59 pfn1 = __phys_to_pfn(mi->bank[i].start); 89 pfn1 = bank_pfn_start(bank);
60 pfn2 = __phys_to_pfn(mi->bank[i].size + mi->bank[i].start); 90 pfn2 = bank_pfn_end(bank);
61 91
62 page = map + pfn1; 92 page = map + pfn1;
63 end = map + pfn2; 93 end = map + pfn2;
@@ -96,17 +126,17 @@ void show_mem(void)
96static unsigned int __init 126static unsigned int __init
97find_bootmap_pfn(int node, struct meminfo *mi, unsigned int bootmap_pages) 127find_bootmap_pfn(int node, struct meminfo *mi, unsigned int bootmap_pages)
98{ 128{
99 unsigned int start_pfn, bank, bootmap_pfn; 129 unsigned int start_pfn, i, bootmap_pfn;
100 130
101 start_pfn = PAGE_ALIGN(__pa(&_end)) >> PAGE_SHIFT; 131 start_pfn = PAGE_ALIGN(__pa(&_end)) >> PAGE_SHIFT;
102 bootmap_pfn = 0; 132 bootmap_pfn = 0;
103 133
104 for_each_nodebank(bank, mi, node) { 134 for_each_nodebank(i, mi, node) {
135 struct membank *bank = &mi->bank[i];
105 unsigned int start, end; 136 unsigned int start, end;
106 137
107 start = mi->bank[bank].start >> PAGE_SHIFT; 138 start = bank_pfn_start(bank);
108 end = (mi->bank[bank].size + 139 end = bank_pfn_end(bank);
109 mi->bank[bank].start) >> PAGE_SHIFT;
110 140
111 if (end < start_pfn) 141 if (end < start_pfn)
112 continue; 142 continue;
@@ -145,13 +175,10 @@ static int __init check_initrd(struct meminfo *mi)
145 initrd_node = -1; 175 initrd_node = -1;
146 176
147 for (i = 0; i < mi->nr_banks; i++) { 177 for (i = 0; i < mi->nr_banks; i++) {
148 unsigned long bank_end; 178 struct membank *bank = &mi->bank[i];
149 179 if (bank_phys_start(bank) <= phys_initrd_start &&
150 bank_end = mi->bank[i].start + mi->bank[i].size; 180 end <= bank_phys_end(bank))
151 181 initrd_node = bank->node;
152 if (mi->bank[i].start <= phys_initrd_start &&
153 end <= bank_end)
154 initrd_node = mi->bank[i].node;
155 } 182 }
156 } 183 }
157 184
@@ -171,19 +198,17 @@ static inline void map_memory_bank(struct membank *bank)
171#ifdef CONFIG_MMU 198#ifdef CONFIG_MMU
172 struct map_desc map; 199 struct map_desc map;
173 200
174 map.pfn = __phys_to_pfn(bank->start); 201 map.pfn = bank_pfn_start(bank);
175 map.virtual = __phys_to_virt(bank->start); 202 map.virtual = __phys_to_virt(bank_phys_start(bank));
176 map.length = bank->size; 203 map.length = bank_phys_size(bank);
177 map.type = MT_MEMORY; 204 map.type = MT_MEMORY;
178 205
179 create_mapping(&map); 206 create_mapping(&map);
180#endif 207#endif
181} 208}
182 209
183static unsigned long __init 210static unsigned long __init bootmem_init_node(int node, struct meminfo *mi)
184bootmem_init_node(int node, int initrd_node, struct meminfo *mi)
185{ 211{
186 unsigned long zone_size[MAX_NR_ZONES], zhole_size[MAX_NR_ZONES];
187 unsigned long start_pfn, end_pfn, boot_pfn; 212 unsigned long start_pfn, end_pfn, boot_pfn;
188 unsigned int boot_pages; 213 unsigned int boot_pages;
189 pg_data_t *pgdat; 214 pg_data_t *pgdat;
@@ -199,8 +224,8 @@ bootmem_init_node(int node, int initrd_node, struct meminfo *mi)
199 struct membank *bank = &mi->bank[i]; 224 struct membank *bank = &mi->bank[i];
200 unsigned long start, end; 225 unsigned long start, end;
201 226
202 start = bank->start >> PAGE_SHIFT; 227 start = bank_pfn_start(bank);
203 end = (bank->start + bank->size) >> PAGE_SHIFT; 228 end = bank_pfn_end(bank);
204 229
205 if (start_pfn > start) 230 if (start_pfn > start)
206 start_pfn = start; 231 start_pfn = start;
@@ -230,8 +255,11 @@ bootmem_init_node(int node, int initrd_node, struct meminfo *mi)
230 pgdat = NODE_DATA(node); 255 pgdat = NODE_DATA(node);
231 init_bootmem_node(pgdat, boot_pfn, start_pfn, end_pfn); 256 init_bootmem_node(pgdat, boot_pfn, start_pfn, end_pfn);
232 257
233 for_each_nodebank(i, mi, node) 258 for_each_nodebank(i, mi, node) {
234 free_bootmem_node(pgdat, mi->bank[i].start, mi->bank[i].size); 259 struct membank *bank = &mi->bank[i];
260 free_bootmem_node(pgdat, bank_phys_start(bank), bank_phys_size(bank));
261 memory_present(node, bank_pfn_start(bank), bank_pfn_end(bank));
262 }
235 263
236 /* 264 /*
237 * Reserve the bootmem bitmap for this node. 265 * Reserve the bootmem bitmap for this node.
@@ -239,31 +267,39 @@ bootmem_init_node(int node, int initrd_node, struct meminfo *mi)
239 reserve_bootmem_node(pgdat, boot_pfn << PAGE_SHIFT, 267 reserve_bootmem_node(pgdat, boot_pfn << PAGE_SHIFT,
240 boot_pages << PAGE_SHIFT, BOOTMEM_DEFAULT); 268 boot_pages << PAGE_SHIFT, BOOTMEM_DEFAULT);
241 269
242 /* 270 return end_pfn;
243 * Reserve any special node zero regions. 271}
244 */
245 if (node == 0)
246 reserve_node_zero(pgdat);
247 272
273static void __init bootmem_reserve_initrd(int node)
274{
248#ifdef CONFIG_BLK_DEV_INITRD 275#ifdef CONFIG_BLK_DEV_INITRD
249 /* 276 pg_data_t *pgdat = NODE_DATA(node);
250 * If the initrd is in this node, reserve its memory. 277 int res;
251 */ 278
252 if (node == initrd_node) { 279 res = reserve_bootmem_node(pgdat, phys_initrd_start,
253 int res = reserve_bootmem_node(pgdat, phys_initrd_start, 280 phys_initrd_size, BOOTMEM_EXCLUSIVE);
254 phys_initrd_size, BOOTMEM_EXCLUSIVE); 281
255 282 if (res == 0) {
256 if (res == 0) { 283 initrd_start = __phys_to_virt(phys_initrd_start);
257 initrd_start = __phys_to_virt(phys_initrd_start); 284 initrd_end = initrd_start + phys_initrd_size;
258 initrd_end = initrd_start + phys_initrd_size; 285 } else {
259 } else { 286 printk(KERN_ERR
260 printk(KERN_ERR 287 "INITRD: 0x%08lx+0x%08lx overlaps in-use "
261 "INITRD: 0x%08lx+0x%08lx overlaps in-use " 288 "memory region - disabling initrd\n",
262 "memory region - disabling initrd\n", 289 phys_initrd_start, phys_initrd_size);
263 phys_initrd_start, phys_initrd_size);
264 }
265 } 290 }
266#endif 291#endif
292}
293
294static void __init bootmem_free_node(int node, struct meminfo *mi)
295{
296 unsigned long zone_size[MAX_NR_ZONES], zhole_size[MAX_NR_ZONES];
297 unsigned long start_pfn, end_pfn;
298 pg_data_t *pgdat = NODE_DATA(node);
299 int i;
300
301 start_pfn = pgdat->bdata->node_min_pfn;
302 end_pfn = pgdat->bdata->node_low_pfn;
267 303
268 /* 304 /*
269 * initialise the zones within this node. 305 * initialise the zones within this node.
@@ -284,7 +320,7 @@ bootmem_init_node(int node, int initrd_node, struct meminfo *mi)
284 */ 320 */
285 zhole_size[0] = zone_size[0]; 321 zhole_size[0] = zone_size[0];
286 for_each_nodebank(i, mi, node) 322 for_each_nodebank(i, mi, node)
287 zhole_size[0] -= mi->bank[i].size >> PAGE_SHIFT; 323 zhole_size[0] -= bank_pfn_size(&mi->bank[i]);
288 324
289 /* 325 /*
290 * Adjust the sizes according to any special requirements for 326 * Adjust the sizes according to any special requirements for
@@ -293,21 +329,12 @@ bootmem_init_node(int node, int initrd_node, struct meminfo *mi)
293 arch_adjust_zones(node, zone_size, zhole_size); 329 arch_adjust_zones(node, zone_size, zhole_size);
294 330
295 free_area_init_node(node, zone_size, start_pfn, zhole_size); 331 free_area_init_node(node, zone_size, start_pfn, zhole_size);
296
297 return end_pfn;
298} 332}
299 333
300void __init bootmem_init(struct meminfo *mi) 334void __init bootmem_init(struct meminfo *mi)
301{ 335{
302 unsigned long memend_pfn = 0; 336 unsigned long memend_pfn = 0;
303 int node, initrd_node, i; 337 int node, initrd_node;
304
305 /*
306 * Invalidate the node number for empty or invalid memory banks
307 */
308 for (i = 0; i < mi->nr_banks; i++)
309 if (mi->bank[i].size == 0 || mi->bank[i].node >= MAX_NUMNODES)
310 mi->bank[i].node = -1;
311 338
312 memcpy(&meminfo, mi, sizeof(meminfo)); 339 memcpy(&meminfo, mi, sizeof(meminfo));
313 340
@@ -320,9 +347,19 @@ void __init bootmem_init(struct meminfo *mi)
320 * Run through each node initialising the bootmem allocator. 347 * Run through each node initialising the bootmem allocator.
321 */ 348 */
322 for_each_node(node) { 349 for_each_node(node) {
323 unsigned long end_pfn; 350 unsigned long end_pfn = bootmem_init_node(node, mi);
324 351
325 end_pfn = bootmem_init_node(node, initrd_node, mi); 352 /*
353 * Reserve any special node zero regions.
354 */
355 if (node == 0)
356 reserve_node_zero(NODE_DATA(node));
357
358 /*
359 * If the initrd is in this node, reserve its memory.
360 */
361 if (node == initrd_node)
362 bootmem_reserve_initrd(node);
326 363
327 /* 364 /*
328 * Remember the highest memory PFN. 365 * Remember the highest memory PFN.
@@ -331,6 +368,19 @@ void __init bootmem_init(struct meminfo *mi)
331 memend_pfn = end_pfn; 368 memend_pfn = end_pfn;
332 } 369 }
333 370
371 /*
372 * sparse_init() needs the bootmem allocator up and running.
373 */
374 sparse_init();
375
376 /*
377 * Now free memory in each node - free_area_init_node needs
378 * the sparse mem_map arrays initialized by sparse_init()
379 * for memmap_init_zone(), otherwise all PFNs are invalid.
380 */
381 for_each_node(node)
382 bootmem_free_node(node, mi);
383
334 high_memory = __va(memend_pfn << PAGE_SHIFT); 384 high_memory = __va(memend_pfn << PAGE_SHIFT);
335 385
336 /* 386 /*
@@ -401,7 +451,9 @@ static void __init free_unused_memmap_node(int node, struct meminfo *mi)
401 * information on the command line. 451 * information on the command line.
402 */ 452 */
403 for_each_nodebank(i, mi, node) { 453 for_each_nodebank(i, mi, node) {
404 bank_start = mi->bank[i].start >> PAGE_SHIFT; 454 struct membank *bank = &mi->bank[i];
455
456 bank_start = bank_pfn_start(bank);
405 if (bank_start < prev_bank_end) { 457 if (bank_start < prev_bank_end) {
406 printk(KERN_ERR "MEM: unordered memory banks. " 458 printk(KERN_ERR "MEM: unordered memory banks. "
407 "Not freeing memmap.\n"); 459 "Not freeing memmap.\n");
@@ -415,8 +467,7 @@ static void __init free_unused_memmap_node(int node, struct meminfo *mi)
415 if (prev_bank_end && prev_bank_end != bank_start) 467 if (prev_bank_end && prev_bank_end != bank_start)
416 free_memmap(node, prev_bank_end, bank_start); 468 free_memmap(node, prev_bank_end, bank_start);
417 469
418 prev_bank_end = (mi->bank[i].start + 470 prev_bank_end = bank_pfn_end(bank);
419 mi->bank[i].size) >> PAGE_SHIFT;
420 } 471 }
421} 472}
422 473
@@ -461,8 +512,8 @@ void __init mem_init(void)
461 512
462 num_physpages = 0; 513 num_physpages = 0;
463 for (i = 0; i < meminfo.nr_banks; i++) { 514 for (i = 0; i < meminfo.nr_banks; i++) {
464 num_physpages += meminfo.bank[i].size >> PAGE_SHIFT; 515 num_physpages += bank_pfn_size(&meminfo.bank[i]);
465 printk(" %ldMB", meminfo.bank[i].size >> 20); 516 printk(" %ldMB", bank_phys_size(&meminfo.bank[i]) >> 20);
466 } 517 }
467 518
468 printk(" = %luMB total\n", num_physpages >> (20 - PAGE_SHIFT)); 519 printk(" = %luMB total\n", num_physpages >> (20 - PAGE_SHIFT));
diff --git a/arch/arm/mm/iomap.c b/arch/arm/mm/iomap.c
index 7429f8c01015..ffad039cbb73 100644
--- a/arch/arm/mm/iomap.c
+++ b/arch/arm/mm/iomap.c
@@ -7,8 +7,7 @@
7#include <linux/module.h> 7#include <linux/module.h>
8#include <linux/pci.h> 8#include <linux/pci.h>
9#include <linux/ioport.h> 9#include <linux/ioport.h>
10 10#include <linux/io.h>
11#include <asm/io.h>
12 11
13#ifdef __io 12#ifdef __io
14void __iomem *ioport_map(unsigned long port, unsigned int nr) 13void __iomem *ioport_map(unsigned long port, unsigned int nr)
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c
index b81dbf9ffb77..18373f73f2fc 100644
--- a/arch/arm/mm/ioremap.c
+++ b/arch/arm/mm/ioremap.c
@@ -24,9 +24,10 @@
24#include <linux/errno.h> 24#include <linux/errno.h>
25#include <linux/mm.h> 25#include <linux/mm.h>
26#include <linux/vmalloc.h> 26#include <linux/vmalloc.h>
27#include <linux/io.h>
27 28
29#include <asm/cputype.h>
28#include <asm/cacheflush.h> 30#include <asm/cacheflush.h>
29#include <asm/io.h>
30#include <asm/mmu_context.h> 31#include <asm/mmu_context.h>
31#include <asm/pgalloc.h> 32#include <asm/pgalloc.h>
32#include <asm/tlbflush.h> 33#include <asm/tlbflush.h>
@@ -55,8 +56,7 @@ static int remap_area_pte(pmd_t *pmd, unsigned long addr, unsigned long end,
55 if (!pte_none(*pte)) 56 if (!pte_none(*pte))
56 goto bad; 57 goto bad;
57 58
58 set_pte_ext(pte, pfn_pte(phys_addr >> PAGE_SHIFT, prot), 59 set_pte_ext(pte, pfn_pte(phys_addr >> PAGE_SHIFT, prot), 0);
59 type->prot_pte_ext);
60 phys_addr += PAGE_SIZE; 60 phys_addr += PAGE_SIZE;
61 } while (pte++, addr += PAGE_SIZE, addr != end); 61 } while (pte++, addr += PAGE_SIZE, addr != end);
62 return 0; 62 return 0;
@@ -332,15 +332,14 @@ __arm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
332} 332}
333EXPORT_SYMBOL(__arm_ioremap); 333EXPORT_SYMBOL(__arm_ioremap);
334 334
335void __iounmap(volatile void __iomem *addr) 335void __iounmap(volatile void __iomem *io_addr)
336{ 336{
337 void *addr = (void *)(PAGE_MASK & (unsigned long)io_addr);
337#ifndef CONFIG_SMP 338#ifndef CONFIG_SMP
338 struct vm_struct **p, *tmp; 339 struct vm_struct **p, *tmp;
339#endif 340#endif
340 unsigned int section_mapping = 0; 341 unsigned int section_mapping = 0;
341 342
342 addr = (volatile void __iomem *)(PAGE_MASK & (unsigned long)addr);
343
344#ifndef CONFIG_SMP 343#ifndef CONFIG_SMP
345 /* 344 /*
346 * If this is a section based mapping we need to handle it 345 * If this is a section based mapping we need to handle it
@@ -351,7 +350,7 @@ void __iounmap(volatile void __iomem *addr)
351 */ 350 */
352 write_lock(&vmlist_lock); 351 write_lock(&vmlist_lock);
353 for (p = &vmlist ; (tmp = *p) ; p = &tmp->next) { 352 for (p = &vmlist ; (tmp = *p) ; p = &tmp->next) {
354 if((tmp->flags & VM_IOREMAP) && (tmp->addr == addr)) { 353 if ((tmp->flags & VM_IOREMAP) && (tmp->addr == addr)) {
355 if (tmp->flags & VM_ARM_SECTION_MAPPING) { 354 if (tmp->flags & VM_ARM_SECTION_MAPPING) {
356 *p = tmp->next; 355 *p = tmp->next;
357 unmap_area_sections((unsigned long)tmp->addr, 356 unmap_area_sections((unsigned long)tmp->addr,
@@ -366,6 +365,6 @@ void __iounmap(volatile void __iomem *addr)
366#endif 365#endif
367 366
368 if (!section_mapping) 367 if (!section_mapping)
369 vunmap((void __force *)addr); 368 vunmap(addr);
370} 369}
371EXPORT_SYMBOL(__iounmap); 370EXPORT_SYMBOL(__iounmap);
diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h
index 7647c597fc59..5d9f53907b4e 100644
--- a/arch/arm/mm/mm.h
+++ b/arch/arm/mm/mm.h
@@ -18,7 +18,6 @@ static inline pmd_t *pmd_off_k(unsigned long virt)
18 18
19struct mem_type { 19struct mem_type {
20 unsigned int prot_pte; 20 unsigned int prot_pte;
21 unsigned int prot_pte_ext;
22 unsigned int prot_l1; 21 unsigned int prot_l1;
23 unsigned int prot_sect; 22 unsigned int prot_sect;
24 unsigned int domain; 23 unsigned int domain;
@@ -35,3 +34,5 @@ struct pglist_data;
35void __init create_mapping(struct map_desc *md); 34void __init create_mapping(struct map_desc *md);
36void __init bootmem_init(struct meminfo *mi); 35void __init bootmem_init(struct meminfo *mi);
37void reserve_node_zero(struct pglist_data *pgdat); 36void reserve_node_zero(struct pglist_data *pgdat);
37
38extern void _text, _stext, _etext, __data_start, _end, __init_begin, __init_end;
diff --git a/arch/arm/mm/mmap.c b/arch/arm/mm/mmap.c
index 3f6dc40b8353..5358fcc7f61e 100644
--- a/arch/arm/mm/mmap.c
+++ b/arch/arm/mm/mmap.c
@@ -6,6 +6,8 @@
6#include <linux/mman.h> 6#include <linux/mman.h>
7#include <linux/shm.h> 7#include <linux/shm.h>
8#include <linux/sched.h> 8#include <linux/sched.h>
9#include <linux/io.h>
10#include <asm/cputype.h>
9#include <asm/system.h> 11#include <asm/system.h>
10 12
11#define COLOUR_ALIGN(addr,pgoff) \ 13#define COLOUR_ALIGN(addr,pgoff) \
@@ -37,8 +39,8 @@ arch_get_unmapped_area(struct file *filp, unsigned long addr,
37 * caches alias. This is indicated by bits 9 and 21 of the 39 * caches alias. This is indicated by bits 9 and 21 of the
38 * cache type register. 40 * cache type register.
39 */ 41 */
40 cache_type = read_cpuid(CPUID_CACHETYPE); 42 cache_type = read_cpuid_cachetype();
41 if (cache_type != read_cpuid(CPUID_ID)) { 43 if (cache_type != read_cpuid_id()) {
42 aliasing = (cache_type | cache_type >> 12) & (1 << 11); 44 aliasing = (cache_type | cache_type >> 12) & (1 << 11);
43 if (aliasing) 45 if (aliasing)
44 do_align = filp || flags & MAP_SHARED; 46 do_align = filp || flags & MAP_SHARED;
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index a713e40e1f1a..8ba754064559 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -15,6 +15,7 @@
15#include <linux/mman.h> 15#include <linux/mman.h>
16#include <linux/nodemask.h> 16#include <linux/nodemask.h>
17 17
18#include <asm/cputype.h>
18#include <asm/mach-types.h> 19#include <asm/mach-types.h>
19#include <asm/setup.h> 20#include <asm/setup.h>
20#include <asm/sizes.h> 21#include <asm/sizes.h>
@@ -27,9 +28,6 @@
27 28
28DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); 29DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
29 30
30extern void _stext, _etext, __data_start, _end;
31extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
32
33/* 31/*
34 * empty_zero_page is a special page that is used for 32 * empty_zero_page is a special page that is used for
35 * zero-initialized data and COW. 33 * zero-initialized data and COW.
@@ -68,27 +66,27 @@ static struct cachepolicy cache_policies[] __initdata = {
68 .policy = "uncached", 66 .policy = "uncached",
69 .cr_mask = CR_W|CR_C, 67 .cr_mask = CR_W|CR_C,
70 .pmd = PMD_SECT_UNCACHED, 68 .pmd = PMD_SECT_UNCACHED,
71 .pte = 0, 69 .pte = L_PTE_MT_UNCACHED,
72 }, { 70 }, {
73 .policy = "buffered", 71 .policy = "buffered",
74 .cr_mask = CR_C, 72 .cr_mask = CR_C,
75 .pmd = PMD_SECT_BUFFERED, 73 .pmd = PMD_SECT_BUFFERED,
76 .pte = PTE_BUFFERABLE, 74 .pte = L_PTE_MT_BUFFERABLE,
77 }, { 75 }, {
78 .policy = "writethrough", 76 .policy = "writethrough",
79 .cr_mask = 0, 77 .cr_mask = 0,
80 .pmd = PMD_SECT_WT, 78 .pmd = PMD_SECT_WT,
81 .pte = PTE_CACHEABLE, 79 .pte = L_PTE_MT_WRITETHROUGH,
82 }, { 80 }, {
83 .policy = "writeback", 81 .policy = "writeback",
84 .cr_mask = 0, 82 .cr_mask = 0,
85 .pmd = PMD_SECT_WB, 83 .pmd = PMD_SECT_WB,
86 .pte = PTE_BUFFERABLE|PTE_CACHEABLE, 84 .pte = L_PTE_MT_WRITEBACK,
87 }, { 85 }, {
88 .policy = "writealloc", 86 .policy = "writealloc",
89 .cr_mask = 0, 87 .cr_mask = 0,
90 .pmd = PMD_SECT_WBWA, 88 .pmd = PMD_SECT_WBWA,
91 .pte = PTE_BUFFERABLE|PTE_CACHEABLE, 89 .pte = L_PTE_MT_WRITEALLOC,
92 } 90 }
93}; 91};
94 92
@@ -186,35 +184,28 @@ void adjust_cr(unsigned long mask, unsigned long set)
186 184
187static struct mem_type mem_types[] = { 185static struct mem_type mem_types[] = {
188 [MT_DEVICE] = { /* Strongly ordered / ARMv6 shared device */ 186 [MT_DEVICE] = { /* Strongly ordered / ARMv6 shared device */
189 .prot_pte = PROT_PTE_DEVICE, 187 .prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_SHARED |
188 L_PTE_SHARED,
190 .prot_l1 = PMD_TYPE_TABLE, 189 .prot_l1 = PMD_TYPE_TABLE,
191 .prot_sect = PROT_SECT_DEVICE | PMD_SECT_UNCACHED, 190 .prot_sect = PROT_SECT_DEVICE | PMD_SECT_UNCACHED,
192 .domain = DOMAIN_IO, 191 .domain = DOMAIN_IO,
193 }, 192 },
194 [MT_DEVICE_NONSHARED] = { /* ARMv6 non-shared device */ 193 [MT_DEVICE_NONSHARED] = { /* ARMv6 non-shared device */
195 .prot_pte = PROT_PTE_DEVICE, 194 .prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_NONSHARED,
196 .prot_pte_ext = PTE_EXT_TEX(2),
197 .prot_l1 = PMD_TYPE_TABLE, 195 .prot_l1 = PMD_TYPE_TABLE,
198 .prot_sect = PROT_SECT_DEVICE | PMD_SECT_TEX(2), 196 .prot_sect = PROT_SECT_DEVICE | PMD_SECT_TEX(2),
199 .domain = DOMAIN_IO, 197 .domain = DOMAIN_IO,
200 }, 198 },
201 [MT_DEVICE_CACHED] = { /* ioremap_cached */ 199 [MT_DEVICE_CACHED] = { /* ioremap_cached */
202 .prot_pte = PROT_PTE_DEVICE | L_PTE_CACHEABLE | L_PTE_BUFFERABLE, 200 .prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_CACHED,
203 .prot_l1 = PMD_TYPE_TABLE, 201 .prot_l1 = PMD_TYPE_TABLE,
204 .prot_sect = PROT_SECT_DEVICE | PMD_SECT_WB, 202 .prot_sect = PROT_SECT_DEVICE | PMD_SECT_WB,
205 .domain = DOMAIN_IO, 203 .domain = DOMAIN_IO,
206 }, 204 },
207 [MT_DEVICE_IXP2000] = { /* IXP2400 requires XCB=101 for on-chip I/O */
208 .prot_pte = PROT_PTE_DEVICE,
209 .prot_l1 = PMD_TYPE_TABLE,
210 .prot_sect = PROT_SECT_DEVICE | PMD_SECT_BUFFERABLE |
211 PMD_SECT_TEX(1),
212 .domain = DOMAIN_IO,
213 },
214 [MT_DEVICE_WC] = { /* ioremap_wc */ 205 [MT_DEVICE_WC] = { /* ioremap_wc */
215 .prot_pte = PROT_PTE_DEVICE, 206 .prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_WC,
216 .prot_l1 = PMD_TYPE_TABLE, 207 .prot_l1 = PMD_TYPE_TABLE,
217 .prot_sect = PROT_SECT_DEVICE, 208 .prot_sect = PROT_SECT_DEVICE | PMD_SECT_BUFFERABLE,
218 .domain = DOMAIN_IO, 209 .domain = DOMAIN_IO,
219 }, 210 },
220 [MT_CACHECLEAN] = { 211 [MT_CACHECLEAN] = {
@@ -259,7 +250,7 @@ static void __init build_mem_type_table(void)
259{ 250{
260 struct cachepolicy *cp; 251 struct cachepolicy *cp;
261 unsigned int cr = get_cr(); 252 unsigned int cr = get_cr();
262 unsigned int user_pgprot, kern_pgprot; 253 unsigned int user_pgprot, kern_pgprot, vecs_pgprot;
263 int cpu_arch = cpu_architecture(); 254 int cpu_arch = cpu_architecture();
264 int i; 255 int i;
265 256
@@ -277,6 +268,9 @@ static void __init build_mem_type_table(void)
277 cachepolicy = CPOLICY_WRITEBACK; 268 cachepolicy = CPOLICY_WRITEBACK;
278 ecc_mask = 0; 269 ecc_mask = 0;
279 } 270 }
271#ifdef CONFIG_SMP
272 cachepolicy = CPOLICY_WRITEALLOC;
273#endif
280 274
281 /* 275 /*
282 * On non-Xscale3 ARMv5-and-older systems, use CB=01 276 * On non-Xscale3 ARMv5-and-older systems, use CB=01
@@ -285,11 +279,8 @@ static void __init build_mem_type_table(void)
285 * in xsc3 parlance, Uncached Normal in ARMv6 parlance). 279 * in xsc3 parlance, Uncached Normal in ARMv6 parlance).
286 */ 280 */
287 if (cpu_is_xsc3() || cpu_arch >= CPU_ARCH_ARMv6) { 281 if (cpu_is_xsc3() || cpu_arch >= CPU_ARCH_ARMv6) {
288 mem_types[MT_DEVICE_WC].prot_pte_ext |= PTE_EXT_TEX(1);
289 mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_TEX(1); 282 mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_TEX(1);
290 } else { 283 mem_types[MT_DEVICE_WC].prot_sect &= ~PMD_SECT_BUFFERABLE;
291 mem_types[MT_DEVICE_WC].prot_pte |= L_PTE_BUFFERABLE;
292 mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_BUFFERABLE;
293 } 284 }
294 285
295 /* 286 /*
@@ -312,7 +303,15 @@ static void __init build_mem_type_table(void)
312 } 303 }
313 304
314 cp = &cache_policies[cachepolicy]; 305 cp = &cache_policies[cachepolicy];
315 kern_pgprot = user_pgprot = cp->pte; 306 vecs_pgprot = kern_pgprot = user_pgprot = cp->pte;
307
308#ifndef CONFIG_SMP
309 /*
310 * Only use write-through for non-SMP systems
311 */
312 if (cpu_arch >= CPU_ARCH_ARMv5 && cachepolicy > CPOLICY_WRITETHROUGH)
313 vecs_pgprot = cache_policies[CPOLICY_WRITETHROUGH].pte;
314#endif
316 315
317 /* 316 /*
318 * Enable CPU-specific coherency if supported. 317 * Enable CPU-specific coherency if supported.
@@ -340,7 +339,6 @@ static void __init build_mem_type_table(void)
340 /* 339 /*
341 * Mark the device area as "shared device" 340 * Mark the device area as "shared device"
342 */ 341 */
343 mem_types[MT_DEVICE].prot_pte |= L_PTE_BUFFERABLE;
344 mem_types[MT_DEVICE].prot_sect |= PMD_SECT_BUFFERED; 342 mem_types[MT_DEVICE].prot_sect |= PMD_SECT_BUFFERED;
345 343
346#ifdef CONFIG_SMP 344#ifdef CONFIG_SMP
@@ -349,30 +347,21 @@ static void __init build_mem_type_table(void)
349 */ 347 */
350 user_pgprot |= L_PTE_SHARED; 348 user_pgprot |= L_PTE_SHARED;
351 kern_pgprot |= L_PTE_SHARED; 349 kern_pgprot |= L_PTE_SHARED;
350 vecs_pgprot |= L_PTE_SHARED;
352 mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S; 351 mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;
353#endif 352#endif
354 } 353 }
355 354
356 for (i = 0; i < 16; i++) { 355 for (i = 0; i < 16; i++) {
357 unsigned long v = pgprot_val(protection_map[i]); 356 unsigned long v = pgprot_val(protection_map[i]);
358 v = (v & ~(L_PTE_BUFFERABLE|L_PTE_CACHEABLE)) | user_pgprot; 357 protection_map[i] = __pgprot(v | user_pgprot);
359 protection_map[i] = __pgprot(v);
360 } 358 }
361 359
362 mem_types[MT_LOW_VECTORS].prot_pte |= kern_pgprot; 360 mem_types[MT_LOW_VECTORS].prot_pte |= vecs_pgprot;
363 mem_types[MT_HIGH_VECTORS].prot_pte |= kern_pgprot; 361 mem_types[MT_HIGH_VECTORS].prot_pte |= vecs_pgprot;
364 362
365 if (cpu_arch >= CPU_ARCH_ARMv5) { 363 if (cpu_arch < CPU_ARCH_ARMv5)
366#ifndef CONFIG_SMP
367 /*
368 * Only use write-through for non-SMP systems
369 */
370 mem_types[MT_LOW_VECTORS].prot_pte &= ~L_PTE_BUFFERABLE;
371 mem_types[MT_HIGH_VECTORS].prot_pte &= ~L_PTE_BUFFERABLE;
372#endif
373 } else {
374 mem_types[MT_MINICLEAN].prot_sect &= ~PMD_SECT_TEX(1); 364 mem_types[MT_MINICLEAN].prot_sect &= ~PMD_SECT_TEX(1);
375 }
376 365
377 pgprot_user = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | user_pgprot); 366 pgprot_user = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | user_pgprot);
378 pgprot_kernel = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | 367 pgprot_kernel = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG |
@@ -420,8 +409,7 @@ static void __init alloc_init_pte(pmd_t *pmd, unsigned long addr,
420 409
421 pte = pte_offset_kernel(pmd, addr); 410 pte = pte_offset_kernel(pmd, addr);
422 do { 411 do {
423 set_pte_ext(pte, pfn_pte(pfn, __pgprot(type->prot_pte)), 412 set_pte_ext(pte, pfn_pte(pfn, __pgprot(type->prot_pte)), 0);
424 type->prot_pte_ext);
425 pfn++; 413 pfn++;
426 } while (pte++, addr += PAGE_SIZE, addr != end); 414 } while (pte++, addr += PAGE_SIZE, addr != end);
427} 415}
@@ -588,12 +576,35 @@ void __init iotable_init(struct map_desc *io_desc, int nr)
588 create_mapping(io_desc + i); 576 create_mapping(io_desc + i);
589} 577}
590 578
579static unsigned long __initdata vmalloc_reserve = SZ_128M;
580
581/*
582 * vmalloc=size forces the vmalloc area to be exactly 'size'
583 * bytes. This can be used to increase (or decrease) the vmalloc
584 * area - the default is 128m.
585 */
586static void __init early_vmalloc(char **arg)
587{
588 vmalloc_reserve = memparse(*arg, arg);
589
590 if (vmalloc_reserve < SZ_16M) {
591 vmalloc_reserve = SZ_16M;
592 printk(KERN_WARNING
593 "vmalloc area too small, limiting to %luMB\n",
594 vmalloc_reserve >> 20);
595 }
596}
597__early_param("vmalloc=", early_vmalloc);
598
599#define VMALLOC_MIN (void *)(VMALLOC_END - vmalloc_reserve)
600
591static int __init check_membank_valid(struct membank *mb) 601static int __init check_membank_valid(struct membank *mb)
592{ 602{
593 /* 603 /*
594 * Check whether this memory region has non-zero size. 604 * Check whether this memory region has non-zero size or
605 * invalid node number.
595 */ 606 */
596 if (mb->size == 0) 607 if (mb->size == 0 || mb->node >= MAX_NUMNODES)
597 return 0; 608 return 0;
598 609
599 /* 610 /*
@@ -627,8 +638,7 @@ static int __init check_membank_valid(struct membank *mb)
627 638
628static void __init sanity_check_meminfo(struct meminfo *mi) 639static void __init sanity_check_meminfo(struct meminfo *mi)
629{ 640{
630 int i; 641 int i, j;
631 int j;
632 642
633 for (i = 0, j = 0; i < mi->nr_banks; i++) { 643 for (i = 0, j = 0; i < mi->nr_banks; i++) {
634 if (check_membank_valid(&mi->bank[i])) 644 if (check_membank_valid(&mi->bank[i]))
diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c
index 63c62fdea521..07b62b238979 100644
--- a/arch/arm/mm/nommu.c
+++ b/arch/arm/mm/nommu.c
@@ -7,16 +7,14 @@
7#include <linux/mm.h> 7#include <linux/mm.h>
8#include <linux/pagemap.h> 8#include <linux/pagemap.h>
9#include <linux/bootmem.h> 9#include <linux/bootmem.h>
10#include <linux/io.h>
10 11
11#include <asm/cacheflush.h> 12#include <asm/cacheflush.h>
12#include <asm/io.h>
13#include <asm/page.h> 13#include <asm/page.h>
14#include <asm/mach/arch.h> 14#include <asm/mach/arch.h>
15 15
16#include "mm.h" 16#include "mm.h"
17 17
18extern void _stext, __data_start, _end;
19
20/* 18/*
21 * Reserve the various regions of node 0 19 * Reserve the various regions of node 0
22 */ 20 */
@@ -43,12 +41,26 @@ void __init reserve_node_zero(pg_data_t *pgdat)
43 BOOTMEM_DEFAULT); 41 BOOTMEM_DEFAULT);
44} 42}
45 43
44static void __init sanity_check_meminfo(struct meminfo *mi)
45{
46 int i, j;
47
48 for (i = 0, j = 0; i < mi->nr_banks; i++) {
49 struct membank *mb = &mi->bank[i];
50
51 if (mb->size != 0 && mb->node < MAX_NUMNODES)
52 mi->bank[j++] = mi->bank[i];
53 }
54 mi->nr_banks = j;
55}
56
46/* 57/*
47 * paging_init() sets up the page tables, initialises the zone memory 58 * paging_init() sets up the page tables, initialises the zone memory
48 * maps, and sets up the zero page, bad page and bad page tables. 59 * maps, and sets up the zero page, bad page and bad page tables.
49 */ 60 */
50void __init paging_init(struct meminfo *mi, struct machine_desc *mdesc) 61void __init paging_init(struct meminfo *mi, struct machine_desc *mdesc)
51{ 62{
63 sanity_check_meminfo(mi);
52 bootmem_init(mi); 64 bootmem_init(mi);
53} 65}
54 66
diff --git a/arch/arm/mm/proc-arm1020.S b/arch/arm/mm/proc-arm1020.S
index 5673f4d6113b..b5551bf010aa 100644
--- a/arch/arm/mm/proc-arm1020.S
+++ b/arch/arm/mm/proc-arm1020.S
@@ -29,7 +29,7 @@
29#include <linux/init.h> 29#include <linux/init.h>
30#include <asm/assembler.h> 30#include <asm/assembler.h>
31#include <asm/asm-offsets.h> 31#include <asm/asm-offsets.h>
32#include <asm/elf.h> 32#include <asm/hwcap.h>
33#include <asm/pgtable-hwdef.h> 33#include <asm/pgtable-hwdef.h>
34#include <asm/pgtable.h> 34#include <asm/pgtable.h>
35#include <asm/ptrace.h> 35#include <asm/ptrace.h>
@@ -399,29 +399,7 @@ ENTRY(cpu_arm1020_switch_mm)
399 .align 5 399 .align 5
400ENTRY(cpu_arm1020_set_pte_ext) 400ENTRY(cpu_arm1020_set_pte_ext)
401#ifdef CONFIG_MMU 401#ifdef CONFIG_MMU
402 str r1, [r0], #-2048 @ linux version 402 armv3_set_pte_ext
403
404 eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
405
406 bic r2, r1, #PTE_SMALL_AP_MASK
407 bic r2, r2, #PTE_TYPE_MASK
408 orr r2, r2, #PTE_TYPE_SMALL
409
410 tst r1, #L_PTE_USER @ User?
411 orrne r2, r2, #PTE_SMALL_AP_URO_SRW
412
413 tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty?
414 orreq r2, r2, #PTE_SMALL_AP_UNO_SRW
415
416 tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young?
417 movne r2, #0
418
419#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
420 eor r3, r1, #0x0a @ C & small page?
421 tst r3, #0x0b
422 biceq r2, r2, #4
423#endif
424 str r2, [r0] @ hardware version
425 mov r0, r0 403 mov r0, r0
426#ifndef CONFIG_CPU_DCACHE_DISABLE 404#ifndef CONFIG_CPU_DCACHE_DISABLE
427 mcr p15, 0, r0, c7, c10, 4 405 mcr p15, 0, r0, c7, c10, 4
diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S
index 4343fdb0e9e5..8bc6740c29eb 100644
--- a/arch/arm/mm/proc-arm1020e.S
+++ b/arch/arm/mm/proc-arm1020e.S
@@ -29,7 +29,7 @@
29#include <linux/init.h> 29#include <linux/init.h>
30#include <asm/assembler.h> 30#include <asm/assembler.h>
31#include <asm/asm-offsets.h> 31#include <asm/asm-offsets.h>
32#include <asm/elf.h> 32#include <asm/hwcap.h>
33#include <asm/pgtable-hwdef.h> 33#include <asm/pgtable-hwdef.h>
34#include <asm/pgtable.h> 34#include <asm/pgtable.h>
35#include <asm/ptrace.h> 35#include <asm/ptrace.h>
@@ -383,29 +383,7 @@ ENTRY(cpu_arm1020e_switch_mm)
383 .align 5 383 .align 5
384ENTRY(cpu_arm1020e_set_pte_ext) 384ENTRY(cpu_arm1020e_set_pte_ext)
385#ifdef CONFIG_MMU 385#ifdef CONFIG_MMU
386 str r1, [r0], #-2048 @ linux version 386 armv3_set_pte_ext
387
388 eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
389
390 bic r2, r1, #PTE_SMALL_AP_MASK
391 bic r2, r2, #PTE_TYPE_MASK
392 orr r2, r2, #PTE_TYPE_SMALL
393
394 tst r1, #L_PTE_USER @ User?
395 orrne r2, r2, #PTE_SMALL_AP_URO_SRW
396
397 tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty?
398 orreq r2, r2, #PTE_SMALL_AP_UNO_SRW
399
400 tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young?
401 movne r2, #0
402
403#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
404 eor r3, r1, #0x0a @ C & small page?
405 tst r3, #0x0b
406 biceq r2, r2, #4
407#endif
408 str r2, [r0] @ hardware version
409 mov r0, r0 387 mov r0, r0
410#ifndef CONFIG_CPU_DCACHE_DISABLE 388#ifndef CONFIG_CPU_DCACHE_DISABLE
411 mcr p15, 0, r0, c7, c10, 1 @ clean D entry 389 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
diff --git a/arch/arm/mm/proc-arm1022.S b/arch/arm/mm/proc-arm1022.S
index 2a4ea1659e96..2cd03e66c0a3 100644
--- a/arch/arm/mm/proc-arm1022.S
+++ b/arch/arm/mm/proc-arm1022.S
@@ -18,7 +18,7 @@
18#include <linux/init.h> 18#include <linux/init.h>
19#include <asm/assembler.h> 19#include <asm/assembler.h>
20#include <asm/asm-offsets.h> 20#include <asm/asm-offsets.h>
21#include <asm/elf.h> 21#include <asm/hwcap.h>
22#include <asm/pgtable-hwdef.h> 22#include <asm/pgtable-hwdef.h>
23#include <asm/pgtable.h> 23#include <asm/pgtable.h>
24#include <asm/ptrace.h> 24#include <asm/ptrace.h>
@@ -365,29 +365,7 @@ ENTRY(cpu_arm1022_switch_mm)
365 .align 5 365 .align 5
366ENTRY(cpu_arm1022_set_pte_ext) 366ENTRY(cpu_arm1022_set_pte_ext)
367#ifdef CONFIG_MMU 367#ifdef CONFIG_MMU
368 str r1, [r0], #-2048 @ linux version 368 armv3_set_pte_ext
369
370 eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
371
372 bic r2, r1, #PTE_SMALL_AP_MASK
373 bic r2, r2, #PTE_TYPE_MASK
374 orr r2, r2, #PTE_TYPE_SMALL
375
376 tst r1, #L_PTE_USER @ User?
377 orrne r2, r2, #PTE_SMALL_AP_URO_SRW
378
379 tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty?
380 orreq r2, r2, #PTE_SMALL_AP_UNO_SRW
381
382 tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young?
383 movne r2, #0
384
385#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
386 eor r3, r1, #0x0a @ C & small page?
387 tst r3, #0x0b
388 biceq r2, r2, #4
389#endif
390 str r2, [r0] @ hardware version
391 mov r0, r0 369 mov r0, r0
392#ifndef CONFIG_CPU_DCACHE_DISABLE 370#ifndef CONFIG_CPU_DCACHE_DISABLE
393 mcr p15, 0, r0, c7, c10, 1 @ clean D entry 371 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S
index 77a1babd421c..ad961a897f6e 100644
--- a/arch/arm/mm/proc-arm1026.S
+++ b/arch/arm/mm/proc-arm1026.S
@@ -18,7 +18,7 @@
18#include <linux/init.h> 18#include <linux/init.h>
19#include <asm/assembler.h> 19#include <asm/assembler.h>
20#include <asm/asm-offsets.h> 20#include <asm/asm-offsets.h>
21#include <asm/elf.h> 21#include <asm/hwcap.h>
22#include <asm/pgtable-hwdef.h> 22#include <asm/pgtable-hwdef.h>
23#include <asm/pgtable.h> 23#include <asm/pgtable.h>
24#include <asm/ptrace.h> 24#include <asm/ptrace.h>
@@ -354,29 +354,7 @@ ENTRY(cpu_arm1026_switch_mm)
354 .align 5 354 .align 5
355ENTRY(cpu_arm1026_set_pte_ext) 355ENTRY(cpu_arm1026_set_pte_ext)
356#ifdef CONFIG_MMU 356#ifdef CONFIG_MMU
357 str r1, [r0], #-2048 @ linux version 357 armv3_set_pte_ext
358
359 eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
360
361 bic r2, r1, #PTE_SMALL_AP_MASK
362 bic r2, r2, #PTE_TYPE_MASK
363 orr r2, r2, #PTE_TYPE_SMALL
364
365 tst r1, #L_PTE_USER @ User?
366 orrne r2, r2, #PTE_SMALL_AP_URO_SRW
367
368 tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty?
369 orreq r2, r2, #PTE_SMALL_AP_UNO_SRW
370
371 tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young?
372 movne r2, #0
373
374#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
375 eor r3, r1, #0x0a @ C & small page?
376 tst r3, #0x0b
377 biceq r2, r2, #4
378#endif
379 str r2, [r0] @ hardware version
380 mov r0, r0 358 mov r0, r0
381#ifndef CONFIG_CPU_DCACHE_DISABLE 359#ifndef CONFIG_CPU_DCACHE_DISABLE
382 mcr p15, 0, r0, c7, c10, 1 @ clean D entry 360 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
diff --git a/arch/arm/mm/proc-arm6_7.S b/arch/arm/mm/proc-arm6_7.S
index c371fc87776e..80d6e1de069a 100644
--- a/arch/arm/mm/proc-arm6_7.S
+++ b/arch/arm/mm/proc-arm6_7.S
@@ -15,11 +15,13 @@
15#include <linux/init.h> 15#include <linux/init.h>
16#include <asm/assembler.h> 16#include <asm/assembler.h>
17#include <asm/asm-offsets.h> 17#include <asm/asm-offsets.h>
18#include <asm/elf.h> 18#include <asm/hwcap.h>
19#include <asm/pgtable-hwdef.h> 19#include <asm/pgtable-hwdef.h>
20#include <asm/pgtable.h> 20#include <asm/pgtable.h>
21#include <asm/ptrace.h> 21#include <asm/ptrace.h>
22 22
23#include "proc-macros.S"
24
23ENTRY(cpu_arm6_dcache_clean_area) 25ENTRY(cpu_arm6_dcache_clean_area)
24ENTRY(cpu_arm7_dcache_clean_area) 26ENTRY(cpu_arm7_dcache_clean_area)
25 mov pc, lr 27 mov pc, lr
@@ -214,30 +216,13 @@ ENTRY(cpu_arm7_switch_mm)
214 * : r1 = value to set 216 * : r1 = value to set
215 * Purpose : Set a PTE and flush it out of any WB cache 217 * Purpose : Set a PTE and flush it out of any WB cache
216 */ 218 */
217 .align 5 219 .align 5
218ENTRY(cpu_arm6_set_pte_ext) 220ENTRY(cpu_arm6_set_pte_ext)
219ENTRY(cpu_arm7_set_pte_ext) 221ENTRY(cpu_arm7_set_pte_ext)
220#ifdef CONFIG_MMU 222#ifdef CONFIG_MMU
221 str r1, [r0], #-2048 @ linux version 223 armv3_set_pte_ext wc_disable=0
222
223 eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
224
225 bic r2, r1, #PTE_SMALL_AP_MASK
226 bic r2, r2, #PTE_TYPE_MASK
227 orr r2, r2, #PTE_TYPE_SMALL
228
229 tst r1, #L_PTE_USER @ User?
230 orrne r2, r2, #PTE_SMALL_AP_URO_SRW
231
232 tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty?
233 orreq r2, r2, #PTE_SMALL_AP_UNO_SRW
234
235 tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young
236 movne r2, #0
237
238 str r2, [r0] @ hardware version
239#endif /* CONFIG_MMU */ 224#endif /* CONFIG_MMU */
240 mov pc, lr 225 mov pc, lr
241 226
242/* 227/*
243 * Function: _arm6_7_reset 228 * Function: _arm6_7_reset
diff --git a/arch/arm/mm/proc-arm720.S b/arch/arm/mm/proc-arm720.S
index eda733d30455..85ae18695f10 100644
--- a/arch/arm/mm/proc-arm720.S
+++ b/arch/arm/mm/proc-arm720.S
@@ -36,7 +36,7 @@
36#include <linux/init.h> 36#include <linux/init.h>
37#include <asm/assembler.h> 37#include <asm/assembler.h>
38#include <asm/asm-offsets.h> 38#include <asm/asm-offsets.h>
39#include <asm/elf.h> 39#include <asm/hwcap.h>
40#include <asm/pgtable-hwdef.h> 40#include <asm/pgtable-hwdef.h>
41#include <asm/pgtable.h> 41#include <asm/pgtable.h>
42#include <asm/ptrace.h> 42#include <asm/ptrace.h>
@@ -93,29 +93,12 @@ ENTRY(cpu_arm720_switch_mm)
93 * : r1 = value to set 93 * : r1 = value to set
94 * Purpose : Set a PTE and flush it out of any WB cache 94 * Purpose : Set a PTE and flush it out of any WB cache
95 */ 95 */
96 .align 5 96 .align 5
97ENTRY(cpu_arm720_set_pte_ext) 97ENTRY(cpu_arm720_set_pte_ext)
98#ifdef CONFIG_MMU 98#ifdef CONFIG_MMU
99 str r1, [r0], #-2048 @ linux version 99 armv3_set_pte_ext wc_disable=0
100
101 eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
102
103 bic r2, r1, #PTE_SMALL_AP_MASK
104 bic r2, r2, #PTE_TYPE_MASK
105 orr r2, r2, #PTE_TYPE_SMALL
106
107 tst r1, #L_PTE_USER @ User?
108 orrne r2, r2, #PTE_SMALL_AP_URO_SRW
109
110 tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty?
111 orreq r2, r2, #PTE_SMALL_AP_UNO_SRW
112
113 tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young
114 movne r2, #0
115
116 str r2, [r0] @ hardware version
117#endif 100#endif
118 mov pc, lr 101 mov pc, lr
119 102
120/* 103/*
121 * Function: arm720_reset 104 * Function: arm720_reset
diff --git a/arch/arm/mm/proc-arm740.S b/arch/arm/mm/proc-arm740.S
index 3a57376c8bc9..4f95bee63e95 100644
--- a/arch/arm/mm/proc-arm740.S
+++ b/arch/arm/mm/proc-arm740.S
@@ -12,7 +12,7 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <asm/assembler.h> 13#include <asm/assembler.h>
14#include <asm/asm-offsets.h> 14#include <asm/asm-offsets.h>
15#include <asm/elf.h> 15#include <asm/hwcap.h>
16#include <asm/pgtable-hwdef.h> 16#include <asm/pgtable-hwdef.h>
17#include <asm/pgtable.h> 17#include <asm/pgtable.h>
18#include <asm/ptrace.h> 18#include <asm/ptrace.h>
diff --git a/arch/arm/mm/proc-arm7tdmi.S b/arch/arm/mm/proc-arm7tdmi.S
index 7b3ecdeb5370..93e05fa7bed4 100644
--- a/arch/arm/mm/proc-arm7tdmi.S
+++ b/arch/arm/mm/proc-arm7tdmi.S
@@ -12,7 +12,7 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <asm/assembler.h> 13#include <asm/assembler.h>
14#include <asm/asm-offsets.h> 14#include <asm/asm-offsets.h>
15#include <asm/elf.h> 15#include <asm/hwcap.h>
16#include <asm/pgtable-hwdef.h> 16#include <asm/pgtable-hwdef.h>
17#include <asm/pgtable.h> 17#include <asm/pgtable.h>
18#include <asm/ptrace.h> 18#include <asm/ptrace.h>
diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S
index 28cdb060df45..914d688394fc 100644
--- a/arch/arm/mm/proc-arm920.S
+++ b/arch/arm/mm/proc-arm920.S
@@ -28,7 +28,7 @@
28#include <linux/linkage.h> 28#include <linux/linkage.h>
29#include <linux/init.h> 29#include <linux/init.h>
30#include <asm/assembler.h> 30#include <asm/assembler.h>
31#include <asm/elf.h> 31#include <asm/hwcap.h>
32#include <asm/pgtable-hwdef.h> 32#include <asm/pgtable-hwdef.h>
33#include <asm/pgtable.h> 33#include <asm/pgtable.h>
34#include <asm/page.h> 34#include <asm/page.h>
@@ -351,33 +351,11 @@ ENTRY(cpu_arm920_switch_mm)
351 .align 5 351 .align 5
352ENTRY(cpu_arm920_set_pte_ext) 352ENTRY(cpu_arm920_set_pte_ext)
353#ifdef CONFIG_MMU 353#ifdef CONFIG_MMU
354 str r1, [r0], #-2048 @ linux version 354 armv3_set_pte_ext
355
356 eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
357
358 bic r2, r1, #PTE_SMALL_AP_MASK
359 bic r2, r2, #PTE_TYPE_MASK
360 orr r2, r2, #PTE_TYPE_SMALL
361
362 tst r1, #L_PTE_USER @ User?
363 orrne r2, r2, #PTE_SMALL_AP_URO_SRW
364
365 tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty?
366 orreq r2, r2, #PTE_SMALL_AP_UNO_SRW
367
368 tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young?
369 movne r2, #0
370
371#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
372 eor r3, r2, #0x0a @ C & small page?
373 tst r3, #0x0b
374 biceq r2, r2, #4
375#endif
376 str r2, [r0] @ hardware version
377 mov r0, r0 355 mov r0, r0
378 mcr p15, 0, r0, c7, c10, 1 @ clean D entry 356 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
379 mcr p15, 0, r0, c7, c10, 4 @ drain WB 357 mcr p15, 0, r0, c7, c10, 4 @ drain WB
380#endif /* CONFIG_MMU */ 358#endif
381 mov pc, lr 359 mov pc, lr
382 360
383 __INIT 361 __INIT
diff --git a/arch/arm/mm/proc-arm922.S b/arch/arm/mm/proc-arm922.S
index 94ddcb4a4b76..51c9c9859e58 100644
--- a/arch/arm/mm/proc-arm922.S
+++ b/arch/arm/mm/proc-arm922.S
@@ -29,7 +29,7 @@
29#include <linux/linkage.h> 29#include <linux/linkage.h>
30#include <linux/init.h> 30#include <linux/init.h>
31#include <asm/assembler.h> 31#include <asm/assembler.h>
32#include <asm/elf.h> 32#include <asm/hwcap.h>
33#include <asm/pgtable-hwdef.h> 33#include <asm/pgtable-hwdef.h>
34#include <asm/pgtable.h> 34#include <asm/pgtable.h>
35#include <asm/page.h> 35#include <asm/page.h>
@@ -355,29 +355,7 @@ ENTRY(cpu_arm922_switch_mm)
355 .align 5 355 .align 5
356ENTRY(cpu_arm922_set_pte_ext) 356ENTRY(cpu_arm922_set_pte_ext)
357#ifdef CONFIG_MMU 357#ifdef CONFIG_MMU
358 str r1, [r0], #-2048 @ linux version 358 armv3_set_pte_ext
359
360 eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
361
362 bic r2, r1, #PTE_SMALL_AP_MASK
363 bic r2, r2, #PTE_TYPE_MASK
364 orr r2, r2, #PTE_TYPE_SMALL
365
366 tst r1, #L_PTE_USER @ User?
367 orrne r2, r2, #PTE_SMALL_AP_URO_SRW
368
369 tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty?
370 orreq r2, r2, #PTE_SMALL_AP_UNO_SRW
371
372 tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young?
373 movne r2, #0
374
375#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
376 eor r3, r2, #0x0a @ C & small page?
377 tst r3, #0x0b
378 biceq r2, r2, #4
379#endif
380 str r2, [r0] @ hardware version
381 mov r0, r0 359 mov r0, r0
382 mcr p15, 0, r0, c7, c10, 1 @ clean D entry 360 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
383 mcr p15, 0, r0, c7, c10, 4 @ drain WB 361 mcr p15, 0, r0, c7, c10, 4 @ drain WB
diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S
index d045812f3399..2724526d89c1 100644
--- a/arch/arm/mm/proc-arm925.S
+++ b/arch/arm/mm/proc-arm925.S
@@ -52,7 +52,7 @@
52#include <linux/linkage.h> 52#include <linux/linkage.h>
53#include <linux/init.h> 53#include <linux/init.h>
54#include <asm/assembler.h> 54#include <asm/assembler.h>
55#include <asm/elf.h> 55#include <asm/hwcap.h>
56#include <asm/pgtable-hwdef.h> 56#include <asm/pgtable-hwdef.h>
57#include <asm/pgtable.h> 57#include <asm/pgtable.h>
58#include <asm/page.h> 58#include <asm/page.h>
@@ -398,29 +398,7 @@ ENTRY(cpu_arm925_switch_mm)
398 .align 5 398 .align 5
399ENTRY(cpu_arm925_set_pte_ext) 399ENTRY(cpu_arm925_set_pte_ext)
400#ifdef CONFIG_MMU 400#ifdef CONFIG_MMU
401 str r1, [r0], #-2048 @ linux version 401 armv3_set_pte_ext
402
403 eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
404
405 bic r2, r1, #PTE_SMALL_AP_MASK
406 bic r2, r2, #PTE_TYPE_MASK
407 orr r2, r2, #PTE_TYPE_SMALL
408
409 tst r1, #L_PTE_USER @ User?
410 orrne r2, r2, #PTE_SMALL_AP_URO_SRW
411
412 tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty?
413 orreq r2, r2, #PTE_SMALL_AP_UNO_SRW
414
415 tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young?
416 movne r2, #0
417
418#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
419 eor r3, r2, #0x0a @ C & small page?
420 tst r3, #0x0b
421 biceq r2, r2, #4
422#endif
423 str r2, [r0] @ hardware version
424 mov r0, r0 402 mov r0, r0
425#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH 403#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH
426 mcr p15, 0, r0, c7, c10, 1 @ clean D entry 404 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S
index 4cd33169a7c9..54466937bff9 100644
--- a/arch/arm/mm/proc-arm926.S
+++ b/arch/arm/mm/proc-arm926.S
@@ -28,7 +28,7 @@
28#include <linux/linkage.h> 28#include <linux/linkage.h>
29#include <linux/init.h> 29#include <linux/init.h>
30#include <asm/assembler.h> 30#include <asm/assembler.h>
31#include <asm/elf.h> 31#include <asm/hwcap.h>
32#include <asm/pgtable-hwdef.h> 32#include <asm/pgtable-hwdef.h>
33#include <asm/pgtable.h> 33#include <asm/pgtable.h>
34#include <asm/page.h> 34#include <asm/page.h>
@@ -359,29 +359,7 @@ ENTRY(cpu_arm926_switch_mm)
359 .align 5 359 .align 5
360ENTRY(cpu_arm926_set_pte_ext) 360ENTRY(cpu_arm926_set_pte_ext)
361#ifdef CONFIG_MMU 361#ifdef CONFIG_MMU
362 str r1, [r0], #-2048 @ linux version 362 armv3_set_pte_ext
363
364 eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
365
366 bic r2, r1, #PTE_SMALL_AP_MASK
367 bic r2, r2, #PTE_TYPE_MASK
368 orr r2, r2, #PTE_TYPE_SMALL
369
370 tst r1, #L_PTE_USER @ User?
371 orrne r2, r2, #PTE_SMALL_AP_URO_SRW
372
373 tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty?
374 orreq r2, r2, #PTE_SMALL_AP_UNO_SRW
375
376 tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young?
377 movne r2, #0
378
379#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
380 eor r3, r2, #0x0a @ C & small page?
381 tst r3, #0x0b
382 biceq r2, r2, #4
383#endif
384 str r2, [r0] @ hardware version
385 mov r0, r0 363 mov r0, r0
386#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH 364#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH
387 mcr p15, 0, r0, c7, c10, 1 @ clean D entry 365 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
diff --git a/arch/arm/mm/proc-arm940.S b/arch/arm/mm/proc-arm940.S
index 551244d5ca19..f595117caf55 100644
--- a/arch/arm/mm/proc-arm940.S
+++ b/arch/arm/mm/proc-arm940.S
@@ -11,7 +11,7 @@
11#include <linux/linkage.h> 11#include <linux/linkage.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <asm/assembler.h> 13#include <asm/assembler.h>
14#include <asm/elf.h> 14#include <asm/hwcap.h>
15#include <asm/pgtable-hwdef.h> 15#include <asm/pgtable-hwdef.h>
16#include <asm/pgtable.h> 16#include <asm/pgtable.h>
17#include <asm/ptrace.h> 17#include <asm/ptrace.h>
diff --git a/arch/arm/mm/proc-arm946.S b/arch/arm/mm/proc-arm946.S
index 6168c6160dee..e03f6ff1fb26 100644
--- a/arch/arm/mm/proc-arm946.S
+++ b/arch/arm/mm/proc-arm946.S
@@ -13,7 +13,7 @@
13#include <linux/linkage.h> 13#include <linux/linkage.h>
14#include <linux/init.h> 14#include <linux/init.h>
15#include <asm/assembler.h> 15#include <asm/assembler.h>
16#include <asm/elf.h> 16#include <asm/hwcap.h>
17#include <asm/pgtable-hwdef.h> 17#include <asm/pgtable-hwdef.h>
18#include <asm/pgtable.h> 18#include <asm/pgtable.h>
19#include <asm/ptrace.h> 19#include <asm/ptrace.h>
diff --git a/arch/arm/mm/proc-arm9tdmi.S b/arch/arm/mm/proc-arm9tdmi.S
index c85c1f50e396..be6c11d2b3fb 100644
--- a/arch/arm/mm/proc-arm9tdmi.S
+++ b/arch/arm/mm/proc-arm9tdmi.S
@@ -12,7 +12,7 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <asm/assembler.h> 13#include <asm/assembler.h>
14#include <asm/asm-offsets.h> 14#include <asm/asm-offsets.h>
15#include <asm/elf.h> 15#include <asm/hwcap.h>
16#include <asm/pgtable-hwdef.h> 16#include <asm/pgtable-hwdef.h>
17#include <asm/pgtable.h> 17#include <asm/pgtable.h>
18#include <asm/ptrace.h> 18#include <asm/ptrace.h>
diff --git a/arch/arm/mm/proc-feroceon.S b/arch/arm/mm/proc-feroceon.S
index f2e5884c513a..0fe1f8fc3488 100644
--- a/arch/arm/mm/proc-feroceon.S
+++ b/arch/arm/mm/proc-feroceon.S
@@ -22,7 +22,7 @@
22#include <linux/linkage.h> 22#include <linux/linkage.h>
23#include <linux/init.h> 23#include <linux/init.h>
24#include <asm/assembler.h> 24#include <asm/assembler.h>
25#include <asm/elf.h> 25#include <asm/hwcap.h>
26#include <asm/pgtable-hwdef.h> 26#include <asm/pgtable-hwdef.h>
27#include <asm/pgtable.h> 27#include <asm/pgtable.h>
28#include <asm/page.h> 28#include <asm/page.h>
@@ -80,7 +80,8 @@ ENTRY(cpu_feroceon_proc_fin)
80 msr cpsr_c, ip 80 msr cpsr_c, ip
81 bl feroceon_flush_kern_cache_all 81 bl feroceon_flush_kern_cache_all
82 82
83#if defined(CONFIG_CACHE_FEROCEON_L2) && !defined(CONFIG_L2_CACHE_WRITETHROUGH) 83#if defined(CONFIG_CACHE_FEROCEON_L2) && \
84 !defined(CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH)
84 mov r0, #0 85 mov r0, #0
85 mcr p15, 1, r0, c15, c9, 0 @ clean L2 86 mcr p15, 1, r0, c15, c9, 0 @ clean L2
86 mcr p15, 0, r0, c7, c10, 4 @ drain WB 87 mcr p15, 0, r0, c7, c10, 4 @ drain WB
@@ -389,7 +390,8 @@ ENTRY(feroceon_range_cache_fns)
389 390
390 .align 5 391 .align 5
391ENTRY(cpu_feroceon_dcache_clean_area) 392ENTRY(cpu_feroceon_dcache_clean_area)
392#if defined(CONFIG_CACHE_FEROCEON_L2) && !defined(CONFIG_L2_CACHE_WRITETHROUGH) 393#if defined(CONFIG_CACHE_FEROCEON_L2) && \
394 !defined(CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH)
393 mov r2, r0 395 mov r2, r0
394 mov r3, r1 396 mov r3, r1
395#endif 397#endif
@@ -397,7 +399,8 @@ ENTRY(cpu_feroceon_dcache_clean_area)
397 add r0, r0, #CACHE_DLINESIZE 399 add r0, r0, #CACHE_DLINESIZE
398 subs r1, r1, #CACHE_DLINESIZE 400 subs r1, r1, #CACHE_DLINESIZE
399 bhi 1b 401 bhi 1b
400#if defined(CONFIG_CACHE_FEROCEON_L2) && !defined(CONFIG_L2_CACHE_WRITETHROUGH) 402#if defined(CONFIG_CACHE_FEROCEON_L2) && \
403 !defined(CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH)
4011: mcr p15, 1, r2, c15, c9, 1 @ clean L2 entry 4041: mcr p15, 1, r2, c15, c9, 1 @ clean L2 entry
402 add r2, r2, #CACHE_DLINESIZE 405 add r2, r2, #CACHE_DLINESIZE
403 subs r3, r3, #CACHE_DLINESIZE 406 subs r3, r3, #CACHE_DLINESIZE
@@ -446,27 +449,11 @@ ENTRY(cpu_feroceon_switch_mm)
446 .align 5 449 .align 5
447ENTRY(cpu_feroceon_set_pte_ext) 450ENTRY(cpu_feroceon_set_pte_ext)
448#ifdef CONFIG_MMU 451#ifdef CONFIG_MMU
449 str r1, [r0], #-2048 @ linux version 452 armv3_set_pte_ext wc_disable=0
450
451 eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
452
453 bic r2, r1, #PTE_SMALL_AP_MASK
454 bic r2, r2, #PTE_TYPE_MASK
455 orr r2, r2, #PTE_TYPE_SMALL
456
457 tst r1, #L_PTE_USER @ User?
458 orrne r2, r2, #PTE_SMALL_AP_URO_SRW
459
460 tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty?
461 orreq r2, r2, #PTE_SMALL_AP_UNO_SRW
462
463 tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young?
464 movne r2, #0
465
466 str r2, [r0] @ hardware version
467 mov r0, r0 453 mov r0, r0
468 mcr p15, 0, r0, c7, c10, 1 @ clean D entry 454 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
469#if defined(CONFIG_CACHE_FEROCEON_L2) && !defined(CONFIG_L2_CACHE_WRITETHROUGH) 455#if defined(CONFIG_CACHE_FEROCEON_L2) && \
456 !defined(CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH)
470 mcr p15, 1, r0, c15, c9, 1 @ clean L2 entry 457 mcr p15, 1, r0, c15, c9, 1 @ clean L2 entry
471#endif 458#endif
472 mcr p15, 0, r0, c7, c10, 4 @ drain WB 459 mcr p15, 0, r0, c7, c10, 4 @ drain WB
diff --git a/arch/arm/mm/proc-macros.S b/arch/arm/mm/proc-macros.S
index b13150052a76..54b1f721dec8 100644
--- a/arch/arm/mm/proc-macros.S
+++ b/arch/arm/mm/proc-macros.S
@@ -71,3 +71,173 @@
71 mov \reg, #16 @ size offset 71 mov \reg, #16 @ size offset
72 mov \reg, \reg, lsl \tmp @ actual cache line size 72 mov \reg, \reg, lsl \tmp @ actual cache line size
73 .endm 73 .endm
74
75
76/*
77 * Sanity check the PTE configuration for the code below - which makes
78 * certain assumptions about how these bits are layed out.
79 */
80#if L_PTE_SHARED != PTE_EXT_SHARED
81#error PTE shared bit mismatch
82#endif
83#if L_PTE_BUFFERABLE != PTE_BUFFERABLE
84#error PTE bufferable bit mismatch
85#endif
86#if L_PTE_CACHEABLE != PTE_CACHEABLE
87#error PTE cacheable bit mismatch
88#endif
89#if (L_PTE_EXEC+L_PTE_USER+L_PTE_WRITE+L_PTE_DIRTY+L_PTE_YOUNG+\
90 L_PTE_FILE+L_PTE_PRESENT) > L_PTE_SHARED
91#error Invalid Linux PTE bit settings
92#endif
93
94/*
95 * The ARMv6 and ARMv7 set_pte_ext translation function.
96 *
97 * Permission translation:
98 * YUWD APX AP1 AP0 SVC User
99 * 0xxx 0 0 0 no acc no acc
100 * 100x 1 0 1 r/o no acc
101 * 10x0 1 0 1 r/o no acc
102 * 1011 0 0 1 r/w no acc
103 * 110x 0 1 0 r/w r/o
104 * 11x0 0 1 0 r/w r/o
105 * 1111 0 1 1 r/w r/w
106 */
107 .macro armv6_mt_table pfx
108\pfx\()_mt_table:
109 .long 0x00 @ L_PTE_MT_UNCACHED
110 .long PTE_EXT_TEX(1) @ L_PTE_MT_BUFFERABLE
111 .long PTE_CACHEABLE @ L_PTE_MT_WRITETHROUGH
112 .long PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEBACK
113 .long PTE_BUFFERABLE @ L_PTE_MT_DEV_SHARED
114 .long 0x00 @ unused
115 .long 0x00 @ L_PTE_MT_MINICACHE (not present)
116 .long PTE_EXT_TEX(1) | PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEALLOC
117 .long 0x00 @ unused
118 .long PTE_EXT_TEX(1) @ L_PTE_MT_DEV_WC
119 .long 0x00 @ unused
120 .long PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_DEV_CACHED
121 .long PTE_EXT_TEX(2) @ L_PTE_MT_DEV_NONSHARED
122 .long 0x00 @ unused
123 .long 0x00 @ unused
124 .long 0x00 @ unused
125 .endm
126
127 .macro armv6_set_pte_ext pfx
128 str r1, [r0], #-2048 @ linux version
129
130 bic r3, r1, #0x000003fc
131 bic r3, r3, #PTE_TYPE_MASK
132 orr r3, r3, r2
133 orr r3, r3, #PTE_EXT_AP0 | 2
134
135 adr ip, \pfx\()_mt_table
136 and r2, r1, #L_PTE_MT_MASK
137 ldr r2, [ip, r2]
138
139 tst r1, #L_PTE_WRITE
140 tstne r1, #L_PTE_DIRTY
141 orreq r3, r3, #PTE_EXT_APX
142
143 tst r1, #L_PTE_USER
144 orrne r3, r3, #PTE_EXT_AP1
145 tstne r3, #PTE_EXT_APX
146 bicne r3, r3, #PTE_EXT_APX | PTE_EXT_AP0
147
148 tst r1, #L_PTE_EXEC
149 orreq r3, r3, #PTE_EXT_XN
150
151 orr r3, r3, r2
152
153 tst r1, #L_PTE_YOUNG
154 tstne r1, #L_PTE_PRESENT
155 moveq r3, #0
156
157 str r3, [r0]
158 mcr p15, 0, r0, c7, c10, 1 @ flush_pte
159 .endm
160
161
162/*
163 * The ARMv3, ARMv4 and ARMv5 set_pte_ext translation function,
164 * covering most CPUs except Xscale and Xscale 3.
165 *
166 * Permission translation:
167 * YUWD AP SVC User
168 * 0xxx 0x00 no acc no acc
169 * 100x 0x00 r/o no acc
170 * 10x0 0x00 r/o no acc
171 * 1011 0x55 r/w no acc
172 * 110x 0xaa r/w r/o
173 * 11x0 0xaa r/w r/o
174 * 1111 0xff r/w r/w
175 */
176 .macro armv3_set_pte_ext wc_disable=1
177 str r1, [r0], #-2048 @ linux version
178
179 eor r3, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
180
181 bic r2, r1, #PTE_SMALL_AP_MASK @ keep C, B bits
182 bic r2, r2, #PTE_TYPE_MASK
183 orr r2, r2, #PTE_TYPE_SMALL
184
185 tst r3, #L_PTE_USER @ user?
186 orrne r2, r2, #PTE_SMALL_AP_URO_SRW
187
188 tst r3, #L_PTE_WRITE | L_PTE_DIRTY @ write and dirty?
189 orreq r2, r2, #PTE_SMALL_AP_UNO_SRW
190
191 tst r3, #L_PTE_PRESENT | L_PTE_YOUNG @ present and young?
192 movne r2, #0
193
194 .if \wc_disable
195#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
196 tst r2, #PTE_CACHEABLE
197 bicne r2, r2, #PTE_BUFFERABLE
198#endif
199 .endif
200 str r2, [r0] @ hardware version
201 .endm
202
203
204/*
205 * Xscale set_pte_ext translation, split into two halves to cope
206 * with work-arounds. r3 must be preserved by code between these
207 * two macros.
208 *
209 * Permission translation:
210 * YUWD AP SVC User
211 * 0xxx 00 no acc no acc
212 * 100x 00 r/o no acc
213 * 10x0 00 r/o no acc
214 * 1011 01 r/w no acc
215 * 110x 10 r/w r/o
216 * 11x0 10 r/w r/o
217 * 1111 11 r/w r/w
218 */
219 .macro xscale_set_pte_ext_prologue
220 str r1, [r0], #-2048 @ linux version
221
222 eor r3, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
223
224 bic r2, r1, #PTE_SMALL_AP_MASK @ keep C, B bits
225 orr r2, r2, #PTE_TYPE_EXT @ extended page
226
227 tst r3, #L_PTE_USER @ user?
228 orrne r2, r2, #PTE_EXT_AP_URO_SRW @ yes -> user r/o, system r/w
229
230 tst r3, #L_PTE_WRITE | L_PTE_DIRTY @ write and dirty?
231 orreq r2, r2, #PTE_EXT_AP_UNO_SRW @ yes -> user n/a, system r/w
232 @ combined with user -> user r/w
233 .endm
234
235 .macro xscale_set_pte_ext_epilogue
236 tst r3, #L_PTE_PRESENT | L_PTE_YOUNG @ present and young?
237 movne r2, #0 @ no -> fault
238
239 str r2, [r0] @ hardware version
240 mov ip, #0
241 mcr p15, 0, r0, c7, c10, 1 @ clean L1 D line
242 mcr p15, 0, ip, c7, c10, 4 @ data write barrier
243 .endm
diff --git a/arch/arm/mm/proc-sa110.S b/arch/arm/mm/proc-sa110.S
index bbe10576c861..90a7e5279f29 100644
--- a/arch/arm/mm/proc-sa110.S
+++ b/arch/arm/mm/proc-sa110.S
@@ -17,7 +17,7 @@
17#include <linux/init.h> 17#include <linux/init.h>
18#include <asm/assembler.h> 18#include <asm/assembler.h>
19#include <asm/asm-offsets.h> 19#include <asm/asm-offsets.h>
20#include <asm/elf.h> 20#include <asm/hwcap.h>
21#include <mach/hardware.h> 21#include <mach/hardware.h>
22#include <asm/pgtable-hwdef.h> 22#include <asm/pgtable-hwdef.h>
23#include <asm/pgtable.h> 23#include <asm/pgtable.h>
@@ -153,24 +153,7 @@ ENTRY(cpu_sa110_switch_mm)
153 .align 5 153 .align 5
154ENTRY(cpu_sa110_set_pte_ext) 154ENTRY(cpu_sa110_set_pte_ext)
155#ifdef CONFIG_MMU 155#ifdef CONFIG_MMU
156 str r1, [r0], #-2048 @ linux version 156 armv3_set_pte_ext wc_disable=0
157
158 eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
159
160 bic r2, r1, #PTE_SMALL_AP_MASK
161 bic r2, r2, #PTE_TYPE_MASK
162 orr r2, r2, #PTE_TYPE_SMALL
163
164 tst r1, #L_PTE_USER @ User?
165 orrne r2, r2, #PTE_SMALL_AP_URO_SRW
166
167 tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty?
168 orreq r2, r2, #PTE_SMALL_AP_UNO_SRW
169
170 tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young?
171 movne r2, #0
172
173 str r2, [r0] @ hardware version
174 mov r0, r0 157 mov r0, r0
175 mcr p15, 0, r0, c7, c10, 1 @ clean D entry 158 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
176 mcr p15, 0, r0, c7, c10, 4 @ drain WB 159 mcr p15, 0, r0, c7, c10, 4 @ drain WB
diff --git a/arch/arm/mm/proc-sa1100.S b/arch/arm/mm/proc-sa1100.S
index 871ba018252e..451e2d953e2a 100644
--- a/arch/arm/mm/proc-sa1100.S
+++ b/arch/arm/mm/proc-sa1100.S
@@ -22,7 +22,7 @@
22#include <linux/init.h> 22#include <linux/init.h>
23#include <asm/assembler.h> 23#include <asm/assembler.h>
24#include <asm/asm-offsets.h> 24#include <asm/asm-offsets.h>
25#include <asm/elf.h> 25#include <asm/hwcap.h>
26#include <mach/hardware.h> 26#include <mach/hardware.h>
27#include <asm/pgtable-hwdef.h> 27#include <asm/pgtable-hwdef.h>
28#include <asm/pgtable.h> 28#include <asm/pgtable.h>
@@ -166,24 +166,7 @@ ENTRY(cpu_sa1100_switch_mm)
166 .align 5 166 .align 5
167ENTRY(cpu_sa1100_set_pte_ext) 167ENTRY(cpu_sa1100_set_pte_ext)
168#ifdef CONFIG_MMU 168#ifdef CONFIG_MMU
169 str r1, [r0], #-2048 @ linux version 169 armv3_set_pte_ext wc_disable=0
170
171 eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
172
173 bic r2, r1, #PTE_SMALL_AP_MASK
174 bic r2, r2, #PTE_TYPE_MASK
175 orr r2, r2, #PTE_TYPE_SMALL
176
177 tst r1, #L_PTE_USER @ User?
178 orrne r2, r2, #PTE_SMALL_AP_URO_SRW
179
180 tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty?
181 orreq r2, r2, #PTE_SMALL_AP_UNO_SRW
182
183 tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young?
184 movne r2, #0
185
186 str r2, [r0] @ hardware version
187 mov r0, r0 170 mov r0, r0
188 mcr p15, 0, r0, c7, c10, 1 @ clean D entry 171 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
189 mcr p15, 0, r0, c7, c10, 4 @ drain WB 172 mcr p15, 0, r0, c7, c10, 4 @ drain WB
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index 5702ec58b2a2..294943b85973 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -13,7 +13,7 @@
13#include <linux/linkage.h> 13#include <linux/linkage.h>
14#include <asm/assembler.h> 14#include <asm/assembler.h>
15#include <asm/asm-offsets.h> 15#include <asm/asm-offsets.h>
16#include <asm/elf.h> 16#include <asm/hwcap.h>
17#include <asm/pgtable-hwdef.h> 17#include <asm/pgtable-hwdef.h>
18#include <asm/pgtable.h> 18#include <asm/pgtable.h>
19 19
@@ -114,46 +114,12 @@ ENTRY(cpu_v6_switch_mm)
114 * (hardware version is stored at -1024 bytes) 114 * (hardware version is stored at -1024 bytes)
115 * - pte - PTE value to store 115 * - pte - PTE value to store
116 * - ext - value for extended PTE bits 116 * - ext - value for extended PTE bits
117 *
118 * Permissions:
119 * YUWD APX AP1 AP0 SVC User
120 * 0xxx 0 0 0 no acc no acc
121 * 100x 1 0 1 r/o no acc
122 * 10x0 1 0 1 r/o no acc
123 * 1011 0 0 1 r/w no acc
124 * 110x 0 1 0 r/w r/o
125 * 11x0 0 1 0 r/w r/o
126 * 1111 0 1 1 r/w r/w
127 */ 117 */
118 armv6_mt_table cpu_v6
119
128ENTRY(cpu_v6_set_pte_ext) 120ENTRY(cpu_v6_set_pte_ext)
129#ifdef CONFIG_MMU 121#ifdef CONFIG_MMU
130 str r1, [r0], #-2048 @ linux version 122 armv6_set_pte_ext cpu_v6
131
132 bic r3, r1, #0x000003f0
133 bic r3, r3, #0x00000003
134 orr r3, r3, r2
135 orr r3, r3, #PTE_EXT_AP0 | 2
136
137 tst r1, #L_PTE_WRITE
138 tstne r1, #L_PTE_DIRTY
139 orreq r3, r3, #PTE_EXT_APX
140
141 tst r1, #L_PTE_USER
142 orrne r3, r3, #PTE_EXT_AP1
143 tstne r3, #PTE_EXT_APX
144 bicne r3, r3, #PTE_EXT_APX | PTE_EXT_AP0
145
146 tst r1, #L_PTE_YOUNG
147 biceq r3, r3, #PTE_EXT_APX | PTE_EXT_AP_MASK
148
149 tst r1, #L_PTE_EXEC
150 orreq r3, r3, #PTE_EXT_XN
151
152 tst r1, #L_PTE_PRESENT
153 moveq r3, #0
154
155 str r3, [r0]
156 mcr p15, 0, r0, c7, c10, 1 @ flush_pte
157#endif 123#endif
158 mov pc, lr 124 mov pc, lr
159 125
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index b49f9a4c82c8..34e424041927 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -12,7 +12,7 @@
12#include <linux/linkage.h> 12#include <linux/linkage.h>
13#include <asm/assembler.h> 13#include <asm/assembler.h>
14#include <asm/asm-offsets.h> 14#include <asm/asm-offsets.h>
15#include <asm/elf.h> 15#include <asm/hwcap.h>
16#include <asm/pgtable-hwdef.h> 16#include <asm/pgtable-hwdef.h>
17#include <asm/pgtable.h> 17#include <asm/pgtable.h>
18 18
@@ -25,9 +25,11 @@
25 25
26ENTRY(cpu_v7_proc_init) 26ENTRY(cpu_v7_proc_init)
27 mov pc, lr 27 mov pc, lr
28ENDPROC(cpu_v7_proc_init)
28 29
29ENTRY(cpu_v7_proc_fin) 30ENTRY(cpu_v7_proc_fin)
30 mov pc, lr 31 mov pc, lr
32ENDPROC(cpu_v7_proc_fin)
31 33
32/* 34/*
33 * cpu_v7_reset(loc) 35 * cpu_v7_reset(loc)
@@ -43,6 +45,7 @@ ENTRY(cpu_v7_proc_fin)
43 .align 5 45 .align 5
44ENTRY(cpu_v7_reset) 46ENTRY(cpu_v7_reset)
45 mov pc, r0 47 mov pc, r0
48ENDPROC(cpu_v7_reset)
46 49
47/* 50/*
48 * cpu_v7_do_idle() 51 * cpu_v7_do_idle()
@@ -52,8 +55,9 @@ ENTRY(cpu_v7_reset)
52 * IRQs are already disabled. 55 * IRQs are already disabled.
53 */ 56 */
54ENTRY(cpu_v7_do_idle) 57ENTRY(cpu_v7_do_idle)
55 .long 0xe320f003 @ ARM V7 WFI instruction 58 wfi
56 mov pc, lr 59 mov pc, lr
60ENDPROC(cpu_v7_do_idle)
57 61
58ENTRY(cpu_v7_dcache_clean_area) 62ENTRY(cpu_v7_dcache_clean_area)
59#ifndef TLB_CAN_READ_FROM_L1_CACHE 63#ifndef TLB_CAN_READ_FROM_L1_CACHE
@@ -65,6 +69,7 @@ ENTRY(cpu_v7_dcache_clean_area)
65 dsb 69 dsb
66#endif 70#endif
67 mov pc, lr 71 mov pc, lr
72ENDPROC(cpu_v7_dcache_clean_area)
68 73
69/* 74/*
70 * cpu_v7_switch_mm(pgd_phys, tsk) 75 * cpu_v7_switch_mm(pgd_phys, tsk)
@@ -89,6 +94,7 @@ ENTRY(cpu_v7_switch_mm)
89 isb 94 isb
90#endif 95#endif
91 mov pc, lr 96 mov pc, lr
97ENDPROC(cpu_v7_switch_mm)
92 98
93/* 99/*
94 * cpu_v7_set_pte_ext(ptep, pte) 100 * cpu_v7_set_pte_ext(ptep, pte)
@@ -99,26 +105,19 @@ ENTRY(cpu_v7_switch_mm)
99 * (hardware version is stored at -1024 bytes) 105 * (hardware version is stored at -1024 bytes)
100 * - pte - PTE value to store 106 * - pte - PTE value to store
101 * - ext - value for extended PTE bits 107 * - ext - value for extended PTE bits
102 *
103 * Permissions:
104 * YUWD APX AP1 AP0 SVC User
105 * 0xxx 0 0 0 no acc no acc
106 * 100x 1 0 1 r/o no acc
107 * 10x0 1 0 1 r/o no acc
108 * 1011 0 0 1 r/w no acc
109 * 110x 0 1 0 r/w r/o
110 * 11x0 0 1 0 r/w r/o
111 * 1111 0 1 1 r/w r/w
112 */ 108 */
113ENTRY(cpu_v7_set_pte_ext) 109ENTRY(cpu_v7_set_pte_ext)
114#ifdef CONFIG_MMU 110#ifdef CONFIG_MMU
115 str r1, [r0], #-2048 @ linux version 111 str r1, [r0], #-2048 @ linux version
116 112
117 bic r3, r1, #0x000003f0 113 bic r3, r1, #0x000003f0
118 bic r3, r3, #0x00000003 114 bic r3, r3, #PTE_TYPE_MASK
119 orr r3, r3, r2 115 orr r3, r3, r2
120 orr r3, r3, #PTE_EXT_AP0 | 2 116 orr r3, r3, #PTE_EXT_AP0 | 2
121 117
118 tst r2, #1 << 4
119 orrne r3, r3, #PTE_EXT_TEX(1)
120
122 tst r1, #L_PTE_WRITE 121 tst r1, #L_PTE_WRITE
123 tstne r1, #L_PTE_DIRTY 122 tstne r1, #L_PTE_DIRTY
124 orreq r3, r3, #PTE_EXT_APX 123 orreq r3, r3, #PTE_EXT_APX
@@ -128,19 +127,18 @@ ENTRY(cpu_v7_set_pte_ext)
128 tstne r3, #PTE_EXT_APX 127 tstne r3, #PTE_EXT_APX
129 bicne r3, r3, #PTE_EXT_APX | PTE_EXT_AP0 128 bicne r3, r3, #PTE_EXT_APX | PTE_EXT_AP0
130 129
131 tst r1, #L_PTE_YOUNG
132 biceq r3, r3, #PTE_EXT_APX | PTE_EXT_AP_MASK
133
134 tst r1, #L_PTE_EXEC 130 tst r1, #L_PTE_EXEC
135 orreq r3, r3, #PTE_EXT_XN 131 orreq r3, r3, #PTE_EXT_XN
136 132
137 tst r1, #L_PTE_PRESENT 133 tst r1, #L_PTE_YOUNG
134 tstne r1, #L_PTE_PRESENT
138 moveq r3, #0 135 moveq r3, #0
139 136
140 str r3, [r0] 137 str r3, [r0]
141 mcr p15, 0, r0, c7, c10, 1 @ flush_pte 138 mcr p15, 0, r0, c7, c10, 1 @ flush_pte
142#endif 139#endif
143 mov pc, lr 140 mov pc, lr
141ENDPROC(cpu_v7_set_pte_ext)
144 142
145cpu_v7_name: 143cpu_v7_name:
146 .ascii "ARMv7 Processor" 144 .ascii "ARMv7 Processor"
@@ -182,12 +180,17 @@ __v7_setup:
182 mov r10, #0x1f @ domains 0, 1 = manager 180 mov r10, #0x1f @ domains 0, 1 = manager
183 mcr p15, 0, r10, c3, c0, 0 @ load domain access register 181 mcr p15, 0, r10, c3, c0, 0 @ load domain access register
184#endif 182#endif
183 ldr r5, =0x40e040e0
184 ldr r6, =0xff0aa1a8
185 mcr p15, 0, r5, c10, c2, 0 @ write PRRR
186 mcr p15, 0, r6, c10, c2, 1 @ write NMRR
185 adr r5, v7_crval 187 adr r5, v7_crval
186 ldmia r5, {r5, r6} 188 ldmia r5, {r5, r6}
187 mrc p15, 0, r0, c1, c0, 0 @ read control register 189 mrc p15, 0, r0, c1, c0, 0 @ read control register
188 bic r0, r0, r5 @ clear bits them 190 bic r0, r0, r5 @ clear bits them
189 orr r0, r0, r6 @ set them 191 orr r0, r0, r6 @ set them
190 mov pc, lr @ return to head.S:__ret 192 mov pc, lr @ return to head.S:__ret
193ENDPROC(__v7_setup)
191 194
192 /* 195 /*
193 * V X F I D LR 196 * V X F I D LR
@@ -197,7 +200,7 @@ __v7_setup:
197 */ 200 */
198 .type v7_crval, #object 201 .type v7_crval, #object
199v7_crval: 202v7_crval:
200 crval clear=0x0120c302, mmuset=0x00c0387d, ucset=0x00c0187c 203 crval clear=0x0120c302, mmuset=0x10c0387d, ucset=0x00c0187c
201 204
202__v7_setup_stack: 205__v7_setup_stack:
203 .space 4 * 11 @ 11 registers 206 .space 4 * 11 @ 11 registers
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S
index 7bd9e7197f60..04dc8b65401b 100644
--- a/arch/arm/mm/proc-xsc3.S
+++ b/arch/arm/mm/proc-xsc3.S
@@ -27,7 +27,7 @@
27#include <linux/linkage.h> 27#include <linux/linkage.h>
28#include <linux/init.h> 28#include <linux/init.h>
29#include <asm/assembler.h> 29#include <asm/assembler.h>
30#include <asm/elf.h> 30#include <asm/hwcap.h>
31#include <mach/hardware.h> 31#include <mach/hardware.h>
32#include <asm/pgtable.h> 32#include <asm/pgtable.h>
33#include <asm/pgtable-hwdef.h> 33#include <asm/pgtable-hwdef.h>
@@ -345,38 +345,38 @@ ENTRY(cpu_xsc3_switch_mm)
345 * cpu_xsc3_set_pte_ext(ptep, pte, ext) 345 * cpu_xsc3_set_pte_ext(ptep, pte, ext)
346 * 346 *
347 * Set a PTE and flush it out 347 * Set a PTE and flush it out
348 *
349 */ 348 */
349cpu_xsc3_mt_table:
350 .long 0x00 @ L_PTE_MT_UNCACHED
351 .long PTE_EXT_TEX(1) @ L_PTE_MT_BUFFERABLE
352 .long PTE_CACHEABLE @ L_PTE_MT_WRITETHROUGH
353 .long PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEBACK
354 .long PTE_EXT_TEX(1) | PTE_BUFFERABLE @ L_PTE_MT_DEV_SHARED
355 .long 0x00 @ unused
356 .long 0x00 @ L_PTE_MT_MINICACHE (not present)
357 .long PTE_EXT_TEX(5) | PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEALLOC (not present?)
358 .long 0x00 @ unused
359 .long PTE_EXT_TEX(1) @ L_PTE_MT_DEV_WC
360 .long 0x00 @ unused
361 .long PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_DEV_CACHED
362 .long PTE_EXT_TEX(2) @ L_PTE_MT_DEV_NONSHARED
363 .long 0x00 @ unused
364 .long 0x00 @ unused
365 .long 0x00 @ unused
366
350 .align 5 367 .align 5
351ENTRY(cpu_xsc3_set_pte_ext) 368ENTRY(cpu_xsc3_set_pte_ext)
352 str r1, [r0], #-2048 @ linux version 369 xscale_set_pte_ext_prologue
353 370
354 bic r2, r1, #0xff0 @ keep C, B bits
355 orr r2, r2, #PTE_TYPE_EXT @ extended page
356 tst r1, #L_PTE_SHARED @ shared? 371 tst r1, #L_PTE_SHARED @ shared?
357 orrne r2, r2, #0x200 372 and r1, r1, #L_PTE_MT_MASK
358 373 adr ip, cpu_xsc3_mt_table
359 eor r3, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY 374 ldr ip, [ip, r1]
360 375 orrne r2, r2, #PTE_EXT_COHERENT @ interlock: mask in coherent bit
361 tst r3, #L_PTE_USER @ user? 376 bic r2, r2, #0x0c @ clear old C,B bits
362 orrne r2, r2, #PTE_EXT_AP_URO_SRW @ yes -> user r/o, system r/w 377 orr r2, r2, ip
363 378
364 tst r3, #L_PTE_WRITE | L_PTE_DIRTY @ write and dirty? 379 xscale_set_pte_ext_epilogue
365 orreq r2, r2, #PTE_EXT_AP_UNO_SRW @ yes -> user n/a, system r/w
366 @ combined with user -> user r/w
367
368 @ If it's cacheable, it needs to be in L2 also.
369 eor ip, r1, #L_PTE_CACHEABLE
370 tst ip, #L_PTE_CACHEABLE
371 orreq r2, r2, #PTE_EXT_TEX(0x5)
372
373 tst r3, #L_PTE_PRESENT | L_PTE_YOUNG @ present and young?
374 movne r2, #0 @ no -> fault
375
376 str r2, [r0] @ hardware version
377 mov ip, #0
378 mcr p15, 0, r0, c7, c10, 1 @ clean L1 D line
379 mcr p15, 0, ip, c7, c10, 4 @ data write barrier
380 mov pc, lr 380 mov pc, lr
381 381
382 .ltorg 382 .ltorg
diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S
index 2dd85273976f..0cce37b93937 100644
--- a/arch/arm/mm/proc-xscale.S
+++ b/arch/arm/mm/proc-xscale.S
@@ -23,7 +23,7 @@
23#include <linux/linkage.h> 23#include <linux/linkage.h>
24#include <linux/init.h> 24#include <linux/init.h>
25#include <asm/assembler.h> 25#include <asm/assembler.h>
26#include <asm/elf.h> 26#include <asm/hwcap.h>
27#include <asm/pgtable.h> 27#include <asm/pgtable.h>
28#include <asm/pgtable-hwdef.h> 28#include <asm/pgtable-hwdef.h>
29#include <asm/page.h> 29#include <asm/page.h>
@@ -406,8 +406,6 @@ ENTRY(cpu_xscale_dcache_clean_area)
406 406
407/* =============================== PageTable ============================== */ 407/* =============================== PageTable ============================== */
408 408
409#define PTE_CACHE_WRITE_ALLOCATE 0
410
411/* 409/*
412 * cpu_xscale_switch_mm(pgd) 410 * cpu_xscale_switch_mm(pgd)
413 * 411 *
@@ -431,56 +429,42 @@ ENTRY(cpu_xscale_switch_mm)
431 * 429 *
432 * Errata 40: must set memory to write-through for user read-only pages. 430 * Errata 40: must set memory to write-through for user read-only pages.
433 */ 431 */
432cpu_xscale_mt_table:
433 .long 0x00 @ L_PTE_MT_UNCACHED
434 .long PTE_BUFFERABLE @ L_PTE_MT_BUFFERABLE
435 .long PTE_CACHEABLE @ L_PTE_MT_WRITETHROUGH
436 .long PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEBACK
437 .long PTE_EXT_TEX(1) | PTE_BUFFERABLE @ L_PTE_MT_DEV_SHARED
438 .long 0x00 @ unused
439 .long PTE_EXT_TEX(1) | PTE_CACHEABLE @ L_PTE_MT_MINICACHE
440 .long PTE_EXT_TEX(1) | PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEALLOC
441 .long 0x00 @ unused
442 .long PTE_BUFFERABLE @ L_PTE_MT_DEV_WC
443 .long 0x00 @ unused
444 .long PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_DEV_CACHED
445 .long 0x00 @ L_PTE_MT_DEV_NONSHARED
446 .long 0x00 @ unused
447 .long 0x00 @ unused
448 .long 0x00 @ unused
449
434 .align 5 450 .align 5
435ENTRY(cpu_xscale_set_pte_ext) 451ENTRY(cpu_xscale_set_pte_ext)
436 str r1, [r0], #-2048 @ linux version 452 xscale_set_pte_ext_prologue
437
438 bic r2, r1, #0xff0
439 orr r2, r2, #PTE_TYPE_EXT @ extended page
440
441 eor r3, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
442
443 tst r3, #L_PTE_USER @ User?
444 orrne r2, r2, #PTE_EXT_AP_URO_SRW @ yes -> user r/o, system r/w
445
446 tst r3, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty?
447 orreq r2, r2, #PTE_EXT_AP_UNO_SRW @ yes -> user n/a, system r/w
448 @ combined with user -> user r/w
449
450 @
451 @ Handle the X bit. We want to set this bit for the minicache
452 @ (U = E = B = W = 0, C = 1) or when write allocate is enabled,
453 @ and we have a writeable, cacheable region. If we ignore the
454 @ U and E bits, we can allow user space to use the minicache as
455 @ well.
456 @
457 @ X = (C & ~W & ~B) | (C & W & B & write_allocate)
458 @
459 eor ip, r1, #L_PTE_CACHEABLE
460 tst ip, #L_PTE_CACHEABLE | L_PTE_WRITE | L_PTE_BUFFERABLE
461#if PTE_CACHE_WRITE_ALLOCATE
462 eorne ip, r1, #L_PTE_CACHEABLE | L_PTE_WRITE | L_PTE_BUFFERABLE
463 tstne ip, #L_PTE_CACHEABLE | L_PTE_WRITE | L_PTE_BUFFERABLE
464#endif
465 orreq r2, r2, #PTE_EXT_TEX(1)
466 453
467 @ 454 @
468 @ Erratum 40: The B bit must be cleared for a user read-only 455 @ Erratum 40: must set memory to write-through for user read-only pages
469 @ cacheable page.
470 @
471 @ B = B & ~(U & C & ~W)
472 @ 456 @
473 and ip, r1, #L_PTE_USER | L_PTE_WRITE | L_PTE_CACHEABLE 457 and ip, r1, #(L_PTE_MT_MASK | L_PTE_USER | L_PTE_WRITE) & ~(4 << 2)
474 teq ip, #L_PTE_USER | L_PTE_CACHEABLE 458 teq ip, #L_PTE_MT_WRITEBACK | L_PTE_USER
475 biceq r2, r2, #PTE_BUFFERABLE
476 459
477 tst r3, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young? 460 moveq r1, #L_PTE_MT_WRITETHROUGH
478 movne r2, #0 @ no -> fault 461 and r1, r1, #L_PTE_MT_MASK
462 adr ip, cpu_xscale_mt_table
463 ldr ip, [ip, r1]
464 bic r2, r2, #0x0c
465 orr r2, r2, ip
479 466
480 str r2, [r0] @ hardware version 467 xscale_set_pte_ext_epilogue
481 mov ip, #0
482 mcr p15, 0, r0, c7, c10, 1 @ Clean D cache line
483 mcr p15, 0, ip, c7, c10, 4 @ Drain Write (& Fill) Buffer
484 mov pc, lr 468 mov pc, lr
485 469
486 470
diff --git a/arch/arm/mm/tlb-v7.S b/arch/arm/mm/tlb-v7.S
index b56dda8052f7..24ba5109f2e7 100644
--- a/arch/arm/mm/tlb-v7.S
+++ b/arch/arm/mm/tlb-v7.S
@@ -51,6 +51,7 @@ ENTRY(v7wbi_flush_user_tlb_range)
51 mcr p15, 0, ip, c7, c5, 6 @ flush BTAC/BTB 51 mcr p15, 0, ip, c7, c5, 6 @ flush BTAC/BTB
52 dsb 52 dsb
53 mov pc, lr 53 mov pc, lr
54ENDPROC(v7wbi_flush_user_tlb_range)
54 55
55/* 56/*
56 * v7wbi_flush_kern_tlb_range(start,end) 57 * v7wbi_flush_kern_tlb_range(start,end)
@@ -77,6 +78,7 @@ ENTRY(v7wbi_flush_kern_tlb_range)
77 dsb 78 dsb
78 isb 79 isb
79 mov pc, lr 80 mov pc, lr
81ENDPROC(v7wbi_flush_kern_tlb_range)
80 82
81 .section ".text.init", #alloc, #execinstr 83 .section ".text.init", #alloc, #execinstr
82 84
diff --git a/arch/arm/nwfpe/fpa11_cpdt.c b/arch/arm/nwfpe/fpa11_cpdt.c
index 79f8e67cc6c1..d31c49f953b1 100644
--- a/arch/arm/nwfpe/fpa11_cpdt.c
+++ b/arch/arm/nwfpe/fpa11_cpdt.c
@@ -26,7 +26,7 @@
26#include "fpmodule.h" 26#include "fpmodule.h"
27#include "fpmodule.inl" 27#include "fpmodule.inl"
28 28
29#include <asm/uaccess.h> 29#include <linux/uaccess.h>
30 30
31static inline void loadSingle(const unsigned int Fn, const unsigned int __user *pMem) 31static inline void loadSingle(const unsigned int Fn, const unsigned int __user *pMem)
32{ 32{
diff --git a/arch/arm/oprofile/Makefile b/arch/arm/oprofile/Makefile
index e61d0cc520b7..88e31f549f50 100644
--- a/arch/arm/oprofile/Makefile
+++ b/arch/arm/oprofile/Makefile
@@ -11,3 +11,4 @@ oprofile-$(CONFIG_CPU_XSCALE) += op_model_xscale.o
11oprofile-$(CONFIG_OPROFILE_ARM11_CORE) += op_model_arm11_core.o 11oprofile-$(CONFIG_OPROFILE_ARM11_CORE) += op_model_arm11_core.o
12oprofile-$(CONFIG_OPROFILE_ARMV6) += op_model_v6.o 12oprofile-$(CONFIG_OPROFILE_ARMV6) += op_model_v6.o
13oprofile-$(CONFIG_OPROFILE_MPCORE) += op_model_mpcore.o 13oprofile-$(CONFIG_OPROFILE_MPCORE) += op_model_mpcore.o
14oprofile-$(CONFIG_OPROFILE_ARMV7) += op_model_v7.o
diff --git a/arch/arm/oprofile/backtrace.c b/arch/arm/oprofile/backtrace.c
index f5ebf30151fa..cefc21c2eee4 100644
--- a/arch/arm/oprofile/backtrace.c
+++ b/arch/arm/oprofile/backtrace.c
@@ -16,8 +16,8 @@
16#include <linux/oprofile.h> 16#include <linux/oprofile.h>
17#include <linux/sched.h> 17#include <linux/sched.h>
18#include <linux/mm.h> 18#include <linux/mm.h>
19#include <linux/uaccess.h>
19#include <asm/ptrace.h> 20#include <asm/ptrace.h>
20#include <asm/uaccess.h>
21 21
22#include "../kernel/stacktrace.h" 22#include "../kernel/stacktrace.h"
23 23
diff --git a/arch/arm/oprofile/common.c b/arch/arm/oprofile/common.c
index 0a5cf3a6438b..3fcd752d6146 100644
--- a/arch/arm/oprofile/common.c
+++ b/arch/arm/oprofile/common.c
@@ -145,6 +145,10 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
145 spec = &op_mpcore_spec; 145 spec = &op_mpcore_spec;
146#endif 146#endif
147 147
148#ifdef CONFIG_OPROFILE_ARMV7
149 spec = &op_armv7_spec;
150#endif
151
148 if (spec) { 152 if (spec) {
149 ret = spec->init(); 153 ret = spec->init();
150 if (ret < 0) 154 if (ret < 0)
diff --git a/arch/arm/oprofile/op_arm_model.h b/arch/arm/oprofile/op_arm_model.h
index 4899c629aa03..8c4e4f6a1de3 100644
--- a/arch/arm/oprofile/op_arm_model.h
+++ b/arch/arm/oprofile/op_arm_model.h
@@ -26,6 +26,7 @@ extern struct op_arm_model_spec op_xscale_spec;
26 26
27extern struct op_arm_model_spec op_armv6_spec; 27extern struct op_arm_model_spec op_armv6_spec;
28extern struct op_arm_model_spec op_mpcore_spec; 28extern struct op_arm_model_spec op_mpcore_spec;
29extern struct op_arm_model_spec op_armv7_spec;
29 30
30extern void arm_backtrace(struct pt_regs * const regs, unsigned int depth); 31extern void arm_backtrace(struct pt_regs * const regs, unsigned int depth);
31 32
diff --git a/arch/arm/oprofile/op_model_mpcore.c b/arch/arm/oprofile/op_model_mpcore.c
index 92db6e035c65..4de366e8b4c5 100644
--- a/arch/arm/oprofile/op_model_mpcore.c
+++ b/arch/arm/oprofile/op_model_mpcore.c
@@ -36,8 +36,8 @@
36#include <linux/oprofile.h> 36#include <linux/oprofile.h>
37#include <linux/interrupt.h> 37#include <linux/interrupt.h>
38#include <linux/smp.h> 38#include <linux/smp.h>
39#include <linux/io.h>
39 40
40#include <asm/io.h>
41#include <asm/irq.h> 41#include <asm/irq.h>
42#include <asm/mach/irq.h> 42#include <asm/mach/irq.h>
43#include <mach/hardware.h> 43#include <mach/hardware.h>
diff --git a/arch/arm/oprofile/op_model_v7.c b/arch/arm/oprofile/op_model_v7.c
new file mode 100644
index 000000000000..f20295f14adb
--- /dev/null
+++ b/arch/arm/oprofile/op_model_v7.c
@@ -0,0 +1,411 @@
1/**
2 * op_model_v7.c
3 * ARM V7 (Cortex A8) Event Monitor Driver
4 *
5 * Copyright 2008 Jean Pihet <jpihet@mvista.com>
6 * Copyright 2004 ARM SMP Development Team
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12#include <linux/types.h>
13#include <linux/errno.h>
14#include <linux/oprofile.h>
15#include <linux/interrupt.h>
16#include <linux/irq.h>
17#include <linux/smp.h>
18
19#include "op_counter.h"
20#include "op_arm_model.h"
21#include "op_model_v7.h"
22
23/* #define DEBUG */
24
25
26/*
27 * ARM V7 PMNC support
28 */
29
30static u32 cnt_en[CNTMAX];
31
32static inline void armv7_pmnc_write(u32 val)
33{
34 val &= PMNC_MASK;
35 asm volatile("mcr p15, 0, %0, c9, c12, 0" : : "r" (val));
36}
37
38static inline u32 armv7_pmnc_read(void)
39{
40 u32 val;
41
42 asm volatile("mrc p15, 0, %0, c9, c12, 0" : "=r" (val));
43 return val;
44}
45
46static inline u32 armv7_pmnc_enable_counter(unsigned int cnt)
47{
48 u32 val;
49
50 if (cnt >= CNTMAX) {
51 printk(KERN_ERR "oprofile: CPU%u enabling wrong PMNC counter"
52 " %d\n", smp_processor_id(), cnt);
53 return -1;
54 }
55
56 if (cnt == CCNT)
57 val = CNTENS_C;
58 else
59 val = (1 << (cnt - CNT0));
60
61 val &= CNTENS_MASK;
62 asm volatile("mcr p15, 0, %0, c9, c12, 1" : : "r" (val));
63
64 return cnt;
65}
66
67static inline u32 armv7_pmnc_disable_counter(unsigned int cnt)
68{
69 u32 val;
70
71 if (cnt >= CNTMAX) {
72 printk(KERN_ERR "oprofile: CPU%u disabling wrong PMNC counter"
73 " %d\n", smp_processor_id(), cnt);
74 return -1;
75 }
76
77 if (cnt == CCNT)
78 val = CNTENC_C;
79 else
80 val = (1 << (cnt - CNT0));
81
82 val &= CNTENC_MASK;
83 asm volatile("mcr p15, 0, %0, c9, c12, 2" : : "r" (val));
84
85 return cnt;
86}
87
88static inline u32 armv7_pmnc_enable_intens(unsigned int cnt)
89{
90 u32 val;
91
92 if (cnt >= CNTMAX) {
93 printk(KERN_ERR "oprofile: CPU%u enabling wrong PMNC counter"
94 " interrupt enable %d\n", smp_processor_id(), cnt);
95 return -1;
96 }
97
98 if (cnt == CCNT)
99 val = INTENS_C;
100 else
101 val = (1 << (cnt - CNT0));
102
103 val &= INTENS_MASK;
104 asm volatile("mcr p15, 0, %0, c9, c14, 1" : : "r" (val));
105
106 return cnt;
107}
108
109static inline u32 armv7_pmnc_getreset_flags(void)
110{
111 u32 val;
112
113 /* Read */
114 asm volatile("mrc p15, 0, %0, c9, c12, 3" : "=r" (val));
115
116 /* Write to clear flags */
117 val &= FLAG_MASK;
118 asm volatile("mcr p15, 0, %0, c9, c12, 3" : : "r" (val));
119
120 return val;
121}
122
123static inline int armv7_pmnc_select_counter(unsigned int cnt)
124{
125 u32 val;
126
127 if ((cnt == CCNT) || (cnt >= CNTMAX)) {
128 printk(KERN_ERR "oprofile: CPU%u selecting wrong PMNC counteri"
129 " %d\n", smp_processor_id(), cnt);
130 return -1;
131 }
132
133 val = (cnt - CNT0) & SELECT_MASK;
134 asm volatile("mcr p15, 0, %0, c9, c12, 5" : : "r" (val));
135
136 return cnt;
137}
138
139static inline void armv7_pmnc_write_evtsel(unsigned int cnt, u32 val)
140{
141 if (armv7_pmnc_select_counter(cnt) == cnt) {
142 val &= EVTSEL_MASK;
143 asm volatile("mcr p15, 0, %0, c9, c13, 1" : : "r" (val));
144 }
145}
146
147static void armv7_pmnc_reset_counter(unsigned int cnt)
148{
149 u32 cpu_cnt = CPU_COUNTER(smp_processor_id(), cnt);
150 u32 val = -(u32)counter_config[cpu_cnt].count;
151
152 switch (cnt) {
153 case CCNT:
154 armv7_pmnc_disable_counter(cnt);
155
156 asm volatile("mcr p15, 0, %0, c9, c13, 0" : : "r" (val));
157
158 if (cnt_en[cnt] != 0)
159 armv7_pmnc_enable_counter(cnt);
160
161 break;
162
163 case CNT0:
164 case CNT1:
165 case CNT2:
166 case CNT3:
167 armv7_pmnc_disable_counter(cnt);
168
169 if (armv7_pmnc_select_counter(cnt) == cnt)
170 asm volatile("mcr p15, 0, %0, c9, c13, 2" : : "r" (val));
171
172 if (cnt_en[cnt] != 0)
173 armv7_pmnc_enable_counter(cnt);
174
175 break;
176
177 default:
178 printk(KERN_ERR "oprofile: CPU%u resetting wrong PMNC counter"
179 " %d\n", smp_processor_id(), cnt);
180 break;
181 }
182}
183
184int armv7_setup_pmnc(void)
185{
186 unsigned int cnt;
187
188 if (armv7_pmnc_read() & PMNC_E) {
189 printk(KERN_ERR "oprofile: CPU%u PMNC still enabled when setup"
190 " new event counter.\n", smp_processor_id());
191 return -EBUSY;
192 }
193
194 /*
195 * Initialize & Reset PMNC: C bit, D bit and P bit.
196 * Note: Using a slower count for CCNT (D bit: divide by 64) results
197 * in a more stable system
198 */
199 armv7_pmnc_write(PMNC_P | PMNC_C | PMNC_D);
200
201
202 for (cnt = CCNT; cnt < CNTMAX; cnt++) {
203 unsigned long event;
204 u32 cpu_cnt = CPU_COUNTER(smp_processor_id(), cnt);
205
206 /*
207 * Disable counter
208 */
209 armv7_pmnc_disable_counter(cnt);
210 cnt_en[cnt] = 0;
211
212 if (!counter_config[cpu_cnt].enabled)
213 continue;
214
215 event = counter_config[cpu_cnt].event & 255;
216
217 /*
218 * Set event (if destined for PMNx counters)
219 * We don't need to set the event if it's a cycle count
220 */
221 if (cnt != CCNT)
222 armv7_pmnc_write_evtsel(cnt, event);
223
224 /*
225 * Enable interrupt for this counter
226 */
227 armv7_pmnc_enable_intens(cnt);
228
229 /*
230 * Reset counter
231 */
232 armv7_pmnc_reset_counter(cnt);
233
234 /*
235 * Enable counter
236 */
237 armv7_pmnc_enable_counter(cnt);
238 cnt_en[cnt] = 1;
239 }
240
241 return 0;
242}
243
244static inline void armv7_start_pmnc(void)
245{
246 armv7_pmnc_write(armv7_pmnc_read() | PMNC_E);
247}
248
249static inline void armv7_stop_pmnc(void)
250{
251 armv7_pmnc_write(armv7_pmnc_read() & ~PMNC_E);
252}
253
254/*
255 * CPU counters' IRQ handler (one IRQ per CPU)
256 */
257static irqreturn_t armv7_pmnc_interrupt(int irq, void *arg)
258{
259 struct pt_regs *regs = get_irq_regs();
260 unsigned int cnt;
261 u32 flags;
262
263
264 /*
265 * Stop IRQ generation
266 */
267 armv7_stop_pmnc();
268
269 /*
270 * Get and reset overflow status flags
271 */
272 flags = armv7_pmnc_getreset_flags();
273
274 /*
275 * Cycle counter
276 */
277 if (flags & FLAG_C) {
278 u32 cpu_cnt = CPU_COUNTER(smp_processor_id(), CCNT);
279 armv7_pmnc_reset_counter(CCNT);
280 oprofile_add_sample(regs, cpu_cnt);
281 }
282
283 /*
284 * PMNC counters 0:3
285 */
286 for (cnt = CNT0; cnt < CNTMAX; cnt++) {
287 if (flags & (1 << (cnt - CNT0))) {
288 u32 cpu_cnt = CPU_COUNTER(smp_processor_id(), cnt);
289 armv7_pmnc_reset_counter(cnt);
290 oprofile_add_sample(regs, cpu_cnt);
291 }
292 }
293
294 /*
295 * Allow IRQ generation
296 */
297 armv7_start_pmnc();
298
299 return IRQ_HANDLED;
300}
301
302int armv7_request_interrupts(int *irqs, int nr)
303{
304 unsigned int i;
305 int ret = 0;
306
307 for (i = 0; i < nr; i++) {
308 ret = request_irq(irqs[i], armv7_pmnc_interrupt,
309 IRQF_DISABLED, "CP15 PMNC", NULL);
310 if (ret != 0) {
311 printk(KERN_ERR "oprofile: unable to request IRQ%u"
312 " for ARMv7\n",
313 irqs[i]);
314 break;
315 }
316 }
317
318 if (i != nr)
319 while (i-- != 0)
320 free_irq(irqs[i], NULL);
321
322 return ret;
323}
324
325void armv7_release_interrupts(int *irqs, int nr)
326{
327 unsigned int i;
328
329 for (i = 0; i < nr; i++)
330 free_irq(irqs[i], NULL);
331}
332
333#ifdef DEBUG
334static void armv7_pmnc_dump_regs(void)
335{
336 u32 val;
337 unsigned int cnt;
338
339 printk(KERN_INFO "PMNC registers dump:\n");
340
341 asm volatile("mrc p15, 0, %0, c9, c12, 0" : "=r" (val));
342 printk(KERN_INFO "PMNC =0x%08x\n", val);
343
344 asm volatile("mrc p15, 0, %0, c9, c12, 1" : "=r" (val));
345 printk(KERN_INFO "CNTENS=0x%08x\n", val);
346
347 asm volatile("mrc p15, 0, %0, c9, c14, 1" : "=r" (val));
348 printk(KERN_INFO "INTENS=0x%08x\n", val);
349
350 asm volatile("mrc p15, 0, %0, c9, c12, 3" : "=r" (val));
351 printk(KERN_INFO "FLAGS =0x%08x\n", val);
352
353 asm volatile("mrc p15, 0, %0, c9, c12, 5" : "=r" (val));
354 printk(KERN_INFO "SELECT=0x%08x\n", val);
355
356 asm volatile("mrc p15, 0, %0, c9, c13, 0" : "=r" (val));
357 printk(KERN_INFO "CCNT =0x%08x\n", val);
358
359 for (cnt = CNT0; cnt < CNTMAX; cnt++) {
360 armv7_pmnc_select_counter(cnt);
361 asm volatile("mrc p15, 0, %0, c9, c13, 2" : "=r" (val));
362 printk(KERN_INFO "CNT[%d] count =0x%08x\n", cnt-CNT0, val);
363 asm volatile("mrc p15, 0, %0, c9, c13, 1" : "=r" (val));
364 printk(KERN_INFO "CNT[%d] evtsel=0x%08x\n", cnt-CNT0, val);
365 }
366}
367#endif
368
369
370static int irqs[] = {
371#ifdef CONFIG_ARCH_OMAP3
372 INT_34XX_BENCH_MPU_EMUL,
373#endif
374};
375
376static void armv7_pmnc_stop(void)
377{
378#ifdef DEBUG
379 armv7_pmnc_dump_regs();
380#endif
381 armv7_stop_pmnc();
382 armv7_release_interrupts(irqs, ARRAY_SIZE(irqs));
383}
384
385static int armv7_pmnc_start(void)
386{
387 int ret;
388
389#ifdef DEBUG
390 armv7_pmnc_dump_regs();
391#endif
392 ret = armv7_request_interrupts(irqs, ARRAY_SIZE(irqs));
393 if (ret >= 0)
394 armv7_start_pmnc();
395
396 return ret;
397}
398
399static int armv7_detect_pmnc(void)
400{
401 return 0;
402}
403
404struct op_arm_model_spec op_armv7_spec = {
405 .init = armv7_detect_pmnc,
406 .num_counters = 5,
407 .setup_ctrs = armv7_setup_pmnc,
408 .start = armv7_pmnc_start,
409 .stop = armv7_pmnc_stop,
410 .name = "arm/armv7",
411};
diff --git a/arch/arm/oprofile/op_model_v7.h b/arch/arm/oprofile/op_model_v7.h
new file mode 100644
index 000000000000..0e19bcc2e100
--- /dev/null
+++ b/arch/arm/oprofile/op_model_v7.h
@@ -0,0 +1,103 @@
1/**
2 * op_model_v7.h
3 * ARM v7 (Cortex A8) Event Monitor Driver
4 *
5 * Copyright 2008 Jean Pihet <jpihet@mvista.com>
6 * Copyright 2004 ARM SMP Development Team
7 * Copyright 2000-2004 Deepak Saxena <dsaxena@mvista.com>
8 * Copyright 2000-2004 MontaVista Software Inc
9 * Copyright 2004 Dave Jiang <dave.jiang@intel.com>
10 * Copyright 2004 Intel Corporation
11 * Copyright 2004 Zwane Mwaikambo <zwane@arm.linux.org.uk>
12 * Copyright 2004 Oprofile Authors
13 *
14 * Read the file COPYING
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License version 2 as
18 * published by the Free Software Foundation.
19 */
20#ifndef OP_MODEL_V7_H
21#define OP_MODEL_V7_H
22
23/*
24 * Per-CPU PMNC: config reg
25 */
26#define PMNC_E (1 << 0) /* Enable all counters */
27#define PMNC_P (1 << 1) /* Reset all counters */
28#define PMNC_C (1 << 2) /* Cycle counter reset */
29#define PMNC_D (1 << 3) /* CCNT counts every 64th cpu cycle */
30#define PMNC_X (1 << 4) /* Export to ETM */
31#define PMNC_DP (1 << 5) /* Disable CCNT if non-invasive debug*/
32#define PMNC_MASK 0x3f /* Mask for writable bits */
33
34/*
35 * Available counters
36 */
37#define CCNT 0
38#define CNT0 1
39#define CNT1 2
40#define CNT2 3
41#define CNT3 4
42#define CNTMAX 5
43
44#define CPU_COUNTER(cpu, counter) ((cpu) * CNTMAX + (counter))
45
46/*
47 * CNTENS: counters enable reg
48 */
49#define CNTENS_P0 (1 << 0)
50#define CNTENS_P1 (1 << 1)
51#define CNTENS_P2 (1 << 2)
52#define CNTENS_P3 (1 << 3)
53#define CNTENS_C (1 << 31)
54#define CNTENS_MASK 0x8000000f /* Mask for writable bits */
55
56/*
57 * CNTENC: counters disable reg
58 */
59#define CNTENC_P0 (1 << 0)
60#define CNTENC_P1 (1 << 1)
61#define CNTENC_P2 (1 << 2)
62#define CNTENC_P3 (1 << 3)
63#define CNTENC_C (1 << 31)
64#define CNTENC_MASK 0x8000000f /* Mask for writable bits */
65
66/*
67 * INTENS: counters overflow interrupt enable reg
68 */
69#define INTENS_P0 (1 << 0)
70#define INTENS_P1 (1 << 1)
71#define INTENS_P2 (1 << 2)
72#define INTENS_P3 (1 << 3)
73#define INTENS_C (1 << 31)
74#define INTENS_MASK 0x8000000f /* Mask for writable bits */
75
76/*
77 * EVTSEL: Event selection reg
78 */
79#define EVTSEL_MASK 0x7f /* Mask for writable bits */
80
81/*
82 * SELECT: Counter selection reg
83 */
84#define SELECT_MASK 0x1f /* Mask for writable bits */
85
86/*
87 * FLAG: counters overflow flag status reg
88 */
89#define FLAG_P0 (1 << 0)
90#define FLAG_P1 (1 << 1)
91#define FLAG_P2 (1 << 2)
92#define FLAG_P3 (1 << 3)
93#define FLAG_C (1 << 31)
94#define FLAG_MASK 0x8000000f /* Mask for writable bits */
95
96
97int armv7_setup_pmu(void);
98int armv7_start_pmu(void);
99int armv7_stop_pmu(void);
100int armv7_request_interrupts(int *, int);
101void armv7_release_interrupts(int *, int);
102
103#endif
diff --git a/arch/arm/oprofile/op_model_xscale.c b/arch/arm/oprofile/op_model_xscale.c
index 7c3289c2acd7..724ab9ce2526 100644
--- a/arch/arm/oprofile/op_model_xscale.c
+++ b/arch/arm/oprofile/op_model_xscale.c
@@ -22,7 +22,7 @@
22#include <linux/interrupt.h> 22#include <linux/interrupt.h>
23#include <linux/irq.h> 23#include <linux/irq.h>
24 24
25#include <asm/system.h> 25#include <asm/cputype.h>
26 26
27#include "op_counter.h" 27#include "op_counter.h"
28#include "op_arm_model.h" 28#include "op_arm_model.h"
diff --git a/arch/arm/plat-iop/i2c.c b/arch/arm/plat-iop/i2c.c
index 6dcbcc4ad419..4efe392859ee 100644
--- a/arch/arm/plat-iop/i2c.c
+++ b/arch/arm/plat-iop/i2c.c
@@ -18,7 +18,7 @@
18#include <linux/serial.h> 18#include <linux/serial.h>
19#include <linux/tty.h> 19#include <linux/tty.h>
20#include <linux/serial_core.h> 20#include <linux/serial_core.h>
21#include <asm/io.h> 21#include <linux/io.h>
22#include <asm/pgtable.h> 22#include <asm/pgtable.h>
23#include <asm/page.h> 23#include <asm/page.h>
24#include <asm/mach/map.h> 24#include <asm/mach/map.h>
diff --git a/arch/arm/plat-iop/io.c b/arch/arm/plat-iop/io.c
index 39dcfb4bdc71..ed0bbece0d61 100644
--- a/arch/arm/plat-iop/io.c
+++ b/arch/arm/plat-iop/io.c
@@ -18,8 +18,8 @@
18 */ 18 */
19#include <linux/kernel.h> 19#include <linux/kernel.h>
20#include <linux/module.h> 20#include <linux/module.h>
21#include <linux/io.h>
21#include <mach/hardware.h> 22#include <mach/hardware.h>
22#include <asm/io.h>
23 23
24void * __iomem __iop3xx_ioremap(unsigned long cookie, size_t size, 24void * __iomem __iop3xx_ioremap(unsigned long cookie, size_t size,
25 unsigned int mtype) 25 unsigned int mtype)
diff --git a/arch/arm/plat-iop/pci.c b/arch/arm/plat-iop/pci.c
index 54708bf9cb15..77fa7cc7d162 100644
--- a/arch/arm/plat-iop/pci.c
+++ b/arch/arm/plat-iop/pci.c
@@ -17,7 +17,7 @@
17#include <linux/mm.h> 17#include <linux/mm.h>
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/ioport.h> 19#include <linux/ioport.h>
20#include <asm/io.h> 20#include <linux/io.h>
21#include <asm/irq.h> 21#include <asm/irq.h>
22#include <asm/signal.h> 22#include <asm/signal.h>
23#include <asm/system.h> 23#include <asm/system.h>
diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c
index c53fefb6aac4..3695bbe3ee28 100644
--- a/arch/arm/plat-iop/time.c
+++ b/arch/arm/plat-iop/time.c
@@ -18,8 +18,8 @@
18#include <linux/time.h> 18#include <linux/time.h>
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/timex.h> 20#include <linux/timex.h>
21#include <linux/io.h>
21#include <mach/hardware.h> 22#include <mach/hardware.h>
22#include <asm/io.h>
23#include <asm/irq.h> 23#include <asm/irq.h>
24#include <asm/uaccess.h> 24#include <asm/uaccess.h>
25#include <asm/mach/irq.h> 25#include <asm/mach/irq.h>
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig
index e14eaad11dd5..b2a7e3fad117 100644
--- a/arch/arm/plat-mxc/Kconfig
+++ b/arch/arm/plat-mxc/Kconfig
@@ -23,4 +23,15 @@ source "arch/arm/mach-mx3/Kconfig"
23 23
24endmenu 24endmenu
25 25
26config MXC_IRQ_PRIOR
27 bool "Use IRQ priority"
28 depends on ARCH_MXC
29 help
30 Select this if you want to use prioritized IRQ handling.
31 This feature prevents higher priority ISR to be interrupted
32 by lower priority IRQ even IRQF_DISABLED flag is not set.
33 This may be useful in embedded applications, where are strong
34 requirements for timing.
35 Say N here, unless you have a specialized requirement.
36
26endif 37endif
diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile
index db66e9ae8414..067556f7c91f 100644
--- a/arch/arm/plat-mxc/Makefile
+++ b/arch/arm/plat-mxc/Makefile
@@ -3,6 +3,6 @@
3# 3#
4 4
5# Common support 5# Common support
6obj-y := irq.o clock.o gpio.o time.o 6obj-y := irq.o clock.o gpio.o time.o devices.o
7 7
8obj-$(CONFIG_ARCH_MX2) += iomux-mx1-mx2.o 8obj-$(CONFIG_ARCH_MX2) += iomux-mx1-mx2.o dma-mx1-mx2.o
diff --git a/arch/arm/plat-mxc/devices.c b/arch/arm/plat-mxc/devices.c
new file mode 100644
index 000000000000..c66748267c45
--- /dev/null
+++ b/arch/arm/plat-mxc/devices.c
@@ -0,0 +1,36 @@
1/*
2 * Copyright 2008 Sascha Hauer, kernel@pengutronix.de
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 51 Franklin Street, Fifth Floor,
16 * Boston, MA 02110-1301, USA.
17 */
18
19#include <linux/kernel.h>
20#include <linux/init.h>
21#include <linux/platform_device.h>
22
23int __init mxc_register_device(struct platform_device *pdev, void *data)
24{
25 int ret;
26
27 pdev->dev.platform_data = data;
28
29 ret = platform_device_register(pdev);
30 if (ret)
31 pr_debug("Unable to register platform device '%s': %d\n",
32 pdev->name, ret);
33
34 return ret;
35}
36
diff --git a/arch/arm/plat-mxc/dma-mx1-mx2.c b/arch/arm/plat-mxc/dma-mx1-mx2.c
new file mode 100644
index 000000000000..b296f19fd89a
--- /dev/null
+++ b/arch/arm/plat-mxc/dma-mx1-mx2.c
@@ -0,0 +1,840 @@
1/*
2 * linux/arch/arm/plat-mxc/dma-mx1-mx2.c
3 *
4 * i.MX DMA registration and IRQ dispatching
5 *
6 * Copyright 2006 Pavel Pisa <pisa@cmp.felk.cvut.cz>
7 * Copyright 2008 Juergen Beisert, <kernel@pengutronix.de>
8 * Copyright 2008 Sascha Hauer, <s.hauer@pengutronix.de>
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version 2
13 * of the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
22 * MA 02110-1301, USA.
23 */
24
25#include <linux/module.h>
26#include <linux/init.h>
27#include <linux/kernel.h>
28#include <linux/interrupt.h>
29#include <linux/errno.h>
30#include <linux/clk.h>
31#include <linux/scatterlist.h>
32#include <linux/io.h>
33
34#include <asm/system.h>
35#include <asm/irq.h>
36#include <mach/hardware.h>
37#include <asm/dma.h>
38#include <mach/dma-mx1-mx2.h>
39
40#define DMA_DCR 0x00 /* Control Register */
41#define DMA_DISR 0x04 /* Interrupt status Register */
42#define DMA_DIMR 0x08 /* Interrupt mask Register */
43#define DMA_DBTOSR 0x0c /* Burst timeout status Register */
44#define DMA_DRTOSR 0x10 /* Request timeout Register */
45#define DMA_DSESR 0x14 /* Transfer Error Status Register */
46#define DMA_DBOSR 0x18 /* Buffer overflow status Register */
47#define DMA_DBTOCR 0x1c /* Burst timeout control Register */
48#define DMA_WSRA 0x40 /* W-Size Register A */
49#define DMA_XSRA 0x44 /* X-Size Register A */
50#define DMA_YSRA 0x48 /* Y-Size Register A */
51#define DMA_WSRB 0x4c /* W-Size Register B */
52#define DMA_XSRB 0x50 /* X-Size Register B */
53#define DMA_YSRB 0x54 /* Y-Size Register B */
54#define DMA_SAR(x) (0x80 + ((x) << 6)) /* Source Address Registers */
55#define DMA_DAR(x) (0x84 + ((x) << 6)) /* Destination Address Registers */
56#define DMA_CNTR(x) (0x88 + ((x) << 6)) /* Count Registers */
57#define DMA_CCR(x) (0x8c + ((x) << 6)) /* Control Registers */
58#define DMA_RSSR(x) (0x90 + ((x) << 6)) /* Request source select Registers */
59#define DMA_BLR(x) (0x94 + ((x) << 6)) /* Burst length Registers */
60#define DMA_RTOR(x) (0x98 + ((x) << 6)) /* Request timeout Registers */
61#define DMA_BUCR(x) (0x98 + ((x) << 6)) /* Bus Utilization Registers */
62#define DMA_CCNR(x) (0x9C + ((x) << 6)) /* Channel counter Registers */
63
64#define DCR_DRST (1<<1)
65#define DCR_DEN (1<<0)
66#define DBTOCR_EN (1<<15)
67#define DBTOCR_CNT(x) ((x) & 0x7fff)
68#define CNTR_CNT(x) ((x) & 0xffffff)
69#define CCR_ACRPT (1<<14)
70#define CCR_DMOD_LINEAR (0x0 << 12)
71#define CCR_DMOD_2D (0x1 << 12)
72#define CCR_DMOD_FIFO (0x2 << 12)
73#define CCR_DMOD_EOBFIFO (0x3 << 12)
74#define CCR_SMOD_LINEAR (0x0 << 10)
75#define CCR_SMOD_2D (0x1 << 10)
76#define CCR_SMOD_FIFO (0x2 << 10)
77#define CCR_SMOD_EOBFIFO (0x3 << 10)
78#define CCR_MDIR_DEC (1<<9)
79#define CCR_MSEL_B (1<<8)
80#define CCR_DSIZ_32 (0x0 << 6)
81#define CCR_DSIZ_8 (0x1 << 6)
82#define CCR_DSIZ_16 (0x2 << 6)
83#define CCR_SSIZ_32 (0x0 << 4)
84#define CCR_SSIZ_8 (0x1 << 4)
85#define CCR_SSIZ_16 (0x2 << 4)
86#define CCR_REN (1<<3)
87#define CCR_RPT (1<<2)
88#define CCR_FRC (1<<1)
89#define CCR_CEN (1<<0)
90#define RTOR_EN (1<<15)
91#define RTOR_CLK (1<<14)
92#define RTOR_PSC (1<<13)
93
94/*
95 * struct imx_dma_channel - i.MX specific DMA extension
96 * @name: name specified by DMA client
97 * @irq_handler: client callback for end of transfer
98 * @err_handler: client callback for error condition
99 * @data: clients context data for callbacks
100 * @dma_mode: direction of the transfer %DMA_MODE_READ or %DMA_MODE_WRITE
101 * @sg: pointer to the actual read/written chunk for scatter-gather emulation
102 * @resbytes: total residual number of bytes to transfer
103 * (it can be lower or same as sum of SG mapped chunk sizes)
104 * @sgcount: number of chunks to be read/written
105 *
106 * Structure is used for IMX DMA processing. It would be probably good
107 * @struct dma_struct in the future for external interfacing and use
108 * @struct imx_dma_channel only as extension to it.
109 */
110
111struct imx_dma_channel {
112 const char *name;
113 void (*irq_handler) (int, void *);
114 void (*err_handler) (int, void *, int errcode);
115 void (*prog_handler) (int, void *, struct scatterlist *);
116 void *data;
117 dmamode_t dma_mode;
118 struct scatterlist *sg;
119 unsigned int resbytes;
120 int dma_num;
121
122 int in_use;
123
124 u32 ccr_from_device;
125 u32 ccr_to_device;
126
127 struct timer_list watchdog;
128
129 int hw_chaining;
130};
131
132static struct imx_dma_channel imx_dma_channels[IMX_DMA_CHANNELS];
133
134static struct clk *dma_clk;
135
136static int imx_dma_hw_chain(struct imx_dma_channel *imxdma)
137{
138 if (cpu_is_mx27())
139 return imxdma->hw_chaining;
140 else
141 return 0;
142}
143
144
145/*
146 * imx_dma_sg_next - prepare next chunk for scatter-gather DMA emulation
147 */
148static inline int imx_dma_sg_next(int channel, struct scatterlist *sg)
149{
150 struct imx_dma_channel *imxdma = &imx_dma_channels[channel];
151 unsigned long now;
152
153 if (!imxdma->name) {
154 printk(KERN_CRIT "%s: called for not allocated channel %d\n",
155 __func__, channel);
156 return 0;
157 }
158
159 now = min(imxdma->resbytes, sg->length);
160 imxdma->resbytes -= now;
161
162 if ((imxdma->dma_mode & DMA_MODE_MASK) == DMA_MODE_READ)
163 __raw_writel(sg->dma_address, DMA_BASE + DMA_DAR(channel));
164 else
165 __raw_writel(sg->dma_address, DMA_BASE + DMA_SAR(channel));
166
167 __raw_writel(now, DMA_BASE + DMA_CNTR(channel));
168
169 pr_debug("imxdma%d: next sg chunk dst 0x%08x, src 0x%08x, "
170 "size 0x%08x\n", channel,
171 __raw_readl(DMA_BASE + DMA_DAR(channel)),
172 __raw_readl(DMA_BASE + DMA_SAR(channel)),
173 __raw_readl(DMA_BASE + DMA_CNTR(channel)));
174
175 return now;
176}
177
178/**
179 * imx_dma_setup_single - setup i.MX DMA channel for linear memory to/from
180 * device transfer
181 *
182 * @channel: i.MX DMA channel number
183 * @dma_address: the DMA/physical memory address of the linear data block
184 * to transfer
185 * @dma_length: length of the data block in bytes
186 * @dev_addr: physical device port address
187 * @dmamode: DMA transfer mode, %DMA_MODE_READ from the device to the memory
188 * or %DMA_MODE_WRITE from memory to the device
189 *
190 * Return value: if incorrect parameters are provided -%EINVAL.
191 * Zero indicates success.
192 */
193int
194imx_dma_setup_single(int channel, dma_addr_t dma_address,
195 unsigned int dma_length, unsigned int dev_addr,
196 dmamode_t dmamode)
197{
198 struct imx_dma_channel *imxdma = &imx_dma_channels[channel];
199
200 imxdma->sg = NULL;
201 imxdma->dma_mode = dmamode;
202
203 if (!dma_address) {
204 printk(KERN_ERR "imxdma%d: imx_dma_setup_single null address\n",
205 channel);
206 return -EINVAL;
207 }
208
209 if (!dma_length) {
210 printk(KERN_ERR "imxdma%d: imx_dma_setup_single zero length\n",
211 channel);
212 return -EINVAL;
213 }
214
215 if ((dmamode & DMA_MODE_MASK) == DMA_MODE_READ) {
216 pr_debug("imxdma%d: %s dma_addressg=0x%08x dma_length=%d "
217 "dev_addr=0x%08x for read\n",
218 channel, __func__, (unsigned int)dma_address,
219 dma_length, dev_addr);
220
221 __raw_writel(dev_addr, DMA_BASE + DMA_SAR(channel));
222 __raw_writel(dma_address, DMA_BASE + DMA_DAR(channel));
223 __raw_writel(imxdma->ccr_from_device,
224 DMA_BASE + DMA_CCR(channel));
225 } else if ((dmamode & DMA_MODE_MASK) == DMA_MODE_WRITE) {
226 pr_debug("imxdma%d: %s dma_addressg=0x%08x dma_length=%d "
227 "dev_addr=0x%08x for write\n",
228 channel, __func__, (unsigned int)dma_address,
229 dma_length, dev_addr);
230
231 __raw_writel(dma_address, DMA_BASE + DMA_SAR(channel));
232 __raw_writel(dev_addr, DMA_BASE + DMA_DAR(channel));
233 __raw_writel(imxdma->ccr_to_device,
234 DMA_BASE + DMA_CCR(channel));
235 } else {
236 printk(KERN_ERR "imxdma%d: imx_dma_setup_single bad dmamode\n",
237 channel);
238 return -EINVAL;
239 }
240
241 __raw_writel(dma_length, DMA_BASE + DMA_CNTR(channel));
242
243 return 0;
244}
245EXPORT_SYMBOL(imx_dma_setup_single);
246
247/**
248 * imx_dma_setup_sg - setup i.MX DMA channel SG list to/from device transfer
249 * @channel: i.MX DMA channel number
250 * @sg: pointer to the scatter-gather list/vector
251 * @sgcount: scatter-gather list hungs count
252 * @dma_length: total length of the transfer request in bytes
253 * @dev_addr: physical device port address
254 * @dmamode: DMA transfer mode, %DMA_MODE_READ from the device to the memory
255 * or %DMA_MODE_WRITE from memory to the device
256 *
257 * The function sets up DMA channel state and registers to be ready for
258 * transfer specified by provided parameters. The scatter-gather emulation
259 * is set up according to the parameters.
260 *
261 * The full preparation of the transfer requires setup of more register
262 * by the caller before imx_dma_enable() can be called.
263 *
264 * %BLR(channel) holds transfer burst length in bytes, 0 means 64 bytes
265 *
266 * %RSSR(channel) has to be set to the DMA request line source %DMA_REQ_xxx
267 *
268 * %CCR(channel) has to specify transfer parameters, the next settings is
269 * typical for linear or simple scatter-gather transfers if %DMA_MODE_READ is
270 * specified
271 *
272 * %CCR_DMOD_LINEAR | %CCR_DSIZ_32 | %CCR_SMOD_FIFO | %CCR_SSIZ_x
273 *
274 * The typical setup for %DMA_MODE_WRITE is specified by next options
275 * combination
276 *
277 * %CCR_SMOD_LINEAR | %CCR_SSIZ_32 | %CCR_DMOD_FIFO | %CCR_DSIZ_x
278 *
279 * Be careful here and do not mistakenly mix source and target device
280 * port sizes constants, they are really different:
281 * %CCR_SSIZ_8, %CCR_SSIZ_16, %CCR_SSIZ_32,
282 * %CCR_DSIZ_8, %CCR_DSIZ_16, %CCR_DSIZ_32
283 *
284 * Return value: if incorrect parameters are provided -%EINVAL.
285 * Zero indicates success.
286 */
287int
288imx_dma_setup_sg(int channel,
289 struct scatterlist *sg, unsigned int sgcount,
290 unsigned int dma_length, unsigned int dev_addr,
291 dmamode_t dmamode)
292{
293 struct imx_dma_channel *imxdma = &imx_dma_channels[channel];
294
295 if (imxdma->in_use)
296 return -EBUSY;
297
298 imxdma->sg = sg;
299 imxdma->dma_mode = dmamode;
300 imxdma->resbytes = dma_length;
301
302 if (!sg || !sgcount) {
303 printk(KERN_ERR "imxdma%d: imx_dma_setup_sg epty sg list\n",
304 channel);
305 return -EINVAL;
306 }
307
308 if (!sg->length) {
309 printk(KERN_ERR "imxdma%d: imx_dma_setup_sg zero length\n",
310 channel);
311 return -EINVAL;
312 }
313
314 if ((dmamode & DMA_MODE_MASK) == DMA_MODE_READ) {
315 pr_debug("imxdma%d: %s sg=%p sgcount=%d total length=%d "
316 "dev_addr=0x%08x for read\n",
317 channel, __func__, sg, sgcount, dma_length, dev_addr);
318
319 __raw_writel(dev_addr, DMA_BASE + DMA_SAR(channel));
320 __raw_writel(imxdma->ccr_from_device,
321 DMA_BASE + DMA_CCR(channel));
322 } else if ((dmamode & DMA_MODE_MASK) == DMA_MODE_WRITE) {
323 pr_debug("imxdma%d: %s sg=%p sgcount=%d total length=%d "
324 "dev_addr=0x%08x for write\n",
325 channel, __func__, sg, sgcount, dma_length, dev_addr);
326
327 __raw_writel(dev_addr, DMA_BASE + DMA_DAR(channel));
328 __raw_writel(imxdma->ccr_to_device,
329 DMA_BASE + DMA_CCR(channel));
330 } else {
331 printk(KERN_ERR "imxdma%d: imx_dma_setup_sg bad dmamode\n",
332 channel);
333 return -EINVAL;
334 }
335
336 imx_dma_sg_next(channel, sg);
337
338 return 0;
339}
340EXPORT_SYMBOL(imx_dma_setup_sg);
341
342int
343imx_dma_config_channel(int channel, unsigned int config_port,
344 unsigned int config_mem, unsigned int dmareq, int hw_chaining)
345{
346 struct imx_dma_channel *imxdma = &imx_dma_channels[channel];
347 u32 dreq = 0;
348
349 imxdma->hw_chaining = 0;
350
351 if (hw_chaining) {
352 imxdma->hw_chaining = 1;
353 if (!imx_dma_hw_chain(imxdma))
354 return -EINVAL;
355 }
356
357 if (dmareq)
358 dreq = CCR_REN;
359
360 imxdma->ccr_from_device = config_port | (config_mem << 2) | dreq;
361 imxdma->ccr_to_device = config_mem | (config_port << 2) | dreq;
362
363 __raw_writel(dmareq, DMA_BASE + DMA_RSSR(channel));
364
365 return 0;
366}
367EXPORT_SYMBOL(imx_dma_config_channel);
368
369void imx_dma_config_burstlen(int channel, unsigned int burstlen)
370{
371 __raw_writel(burstlen, DMA_BASE + DMA_BLR(channel));
372}
373EXPORT_SYMBOL(imx_dma_config_burstlen);
374
375/**
376 * imx_dma_setup_handlers - setup i.MX DMA channel end and error notification
377 * handlers
378 * @channel: i.MX DMA channel number
379 * @irq_handler: the pointer to the function called if the transfer
380 * ends successfully
381 * @err_handler: the pointer to the function called if the premature
382 * end caused by error occurs
383 * @data: user specified value to be passed to the handlers
384 */
385int
386imx_dma_setup_handlers(int channel,
387 void (*irq_handler) (int, void *),
388 void (*err_handler) (int, void *, int),
389 void *data)
390{
391 struct imx_dma_channel *imxdma = &imx_dma_channels[channel];
392 unsigned long flags;
393
394 if (!imxdma->name) {
395 printk(KERN_CRIT "%s: called for not allocated channel %d\n",
396 __func__, channel);
397 return -ENODEV;
398 }
399
400 local_irq_save(flags);
401 __raw_writel(1 << channel, DMA_BASE + DMA_DISR);
402 imxdma->irq_handler = irq_handler;
403 imxdma->err_handler = err_handler;
404 imxdma->data = data;
405 local_irq_restore(flags);
406 return 0;
407}
408EXPORT_SYMBOL(imx_dma_setup_handlers);
409
410/**
411 * imx_dma_setup_progression_handler - setup i.MX DMA channel progression
412 * handlers
413 * @channel: i.MX DMA channel number
414 * @prog_handler: the pointer to the function called if the transfer progresses
415 */
416int
417imx_dma_setup_progression_handler(int channel,
418 void (*prog_handler) (int, void*, struct scatterlist*))
419{
420 struct imx_dma_channel *imxdma = &imx_dma_channels[channel];
421 unsigned long flags;
422
423 if (!imxdma->name) {
424 printk(KERN_CRIT "%s: called for not allocated channel %d\n",
425 __func__, channel);
426 return -ENODEV;
427 }
428
429 local_irq_save(flags);
430 imxdma->prog_handler = prog_handler;
431 local_irq_restore(flags);
432 return 0;
433}
434EXPORT_SYMBOL(imx_dma_setup_progression_handler);
435
436/**
437 * imx_dma_enable - function to start i.MX DMA channel operation
438 * @channel: i.MX DMA channel number
439 *
440 * The channel has to be allocated by driver through imx_dma_request()
441 * or imx_dma_request_by_prio() function.
442 * The transfer parameters has to be set to the channel registers through
443 * call of the imx_dma_setup_single() or imx_dma_setup_sg() function
444 * and registers %BLR(channel), %RSSR(channel) and %CCR(channel) has to
445 * be set prior this function call by the channel user.
446 */
447void imx_dma_enable(int channel)
448{
449 struct imx_dma_channel *imxdma = &imx_dma_channels[channel];
450 unsigned long flags;
451
452 pr_debug("imxdma%d: imx_dma_enable\n", channel);
453
454 if (!imxdma->name) {
455 printk(KERN_CRIT "%s: called for not allocated channel %d\n",
456 __func__, channel);
457 return;
458 }
459
460 if (imxdma->in_use)
461 return;
462
463 local_irq_save(flags);
464
465 __raw_writel(1 << channel, DMA_BASE + DMA_DISR);
466 __raw_writel(__raw_readl(DMA_BASE + DMA_DIMR) & ~(1 << channel),
467 DMA_BASE + DMA_DIMR);
468 __raw_writel(__raw_readl(DMA_BASE + DMA_CCR(channel)) | CCR_CEN |
469 CCR_ACRPT,
470 DMA_BASE + DMA_CCR(channel));
471
472#ifdef CONFIG_ARCH_MX2
473 if (imxdma->sg && imx_dma_hw_chain(imxdma)) {
474 imxdma->sg = sg_next(imxdma->sg);
475 if (imxdma->sg) {
476 u32 tmp;
477 imx_dma_sg_next(channel, imxdma->sg);
478 tmp = __raw_readl(DMA_BASE + DMA_CCR(channel));
479 __raw_writel(tmp | CCR_RPT | CCR_ACRPT,
480 DMA_BASE + DMA_CCR(channel));
481 }
482 }
483#endif
484 imxdma->in_use = 1;
485
486 local_irq_restore(flags);
487}
488EXPORT_SYMBOL(imx_dma_enable);
489
490/**
491 * imx_dma_disable - stop, finish i.MX DMA channel operatin
492 * @channel: i.MX DMA channel number
493 */
494void imx_dma_disable(int channel)
495{
496 struct imx_dma_channel *imxdma = &imx_dma_channels[channel];
497 unsigned long flags;
498
499 pr_debug("imxdma%d: imx_dma_disable\n", channel);
500
501 if (imx_dma_hw_chain(imxdma))
502 del_timer(&imxdma->watchdog);
503
504 local_irq_save(flags);
505 __raw_writel(__raw_readl(DMA_BASE + DMA_DIMR) | (1 << channel),
506 DMA_BASE + DMA_DIMR);
507 __raw_writel(__raw_readl(DMA_BASE + DMA_CCR(channel)) & ~CCR_CEN,
508 DMA_BASE + DMA_CCR(channel));
509 __raw_writel(1 << channel, DMA_BASE + DMA_DISR);
510 imxdma->in_use = 0;
511 local_irq_restore(flags);
512}
513EXPORT_SYMBOL(imx_dma_disable);
514
515static void imx_dma_watchdog(unsigned long chno)
516{
517 struct imx_dma_channel *imxdma = &imx_dma_channels[chno];
518
519 __raw_writel(0, DMA_BASE + DMA_CCR(chno));
520 imxdma->in_use = 0;
521 imxdma->sg = NULL;
522
523 if (imxdma->err_handler)
524 imxdma->err_handler(chno, imxdma->data, IMX_DMA_ERR_TIMEOUT);
525}
526
527static irqreturn_t dma_err_handler(int irq, void *dev_id)
528{
529 int i, disr;
530 struct imx_dma_channel *imxdma;
531 unsigned int err_mask;
532 int errcode;
533
534 disr = __raw_readl(DMA_BASE + DMA_DISR);
535
536 err_mask = __raw_readl(DMA_BASE + DMA_DBTOSR) |
537 __raw_readl(DMA_BASE + DMA_DRTOSR) |
538 __raw_readl(DMA_BASE + DMA_DSESR) |
539 __raw_readl(DMA_BASE + DMA_DBOSR);
540
541 if (!err_mask)
542 return IRQ_HANDLED;
543
544 __raw_writel(disr & err_mask, DMA_BASE + DMA_DISR);
545
546 for (i = 0; i < IMX_DMA_CHANNELS; i++) {
547 if (!(err_mask & (1 << i)))
548 continue;
549 imxdma = &imx_dma_channels[i];
550 errcode = 0;
551
552 if (__raw_readl(DMA_BASE + DMA_DBTOSR) & (1 << i)) {
553 __raw_writel(1 << i, DMA_BASE + DMA_DBTOSR);
554 errcode |= IMX_DMA_ERR_BURST;
555 }
556 if (__raw_readl(DMA_BASE + DMA_DRTOSR) & (1 << i)) {
557 __raw_writel(1 << i, DMA_BASE + DMA_DRTOSR);
558 errcode |= IMX_DMA_ERR_REQUEST;
559 }
560 if (__raw_readl(DMA_BASE + DMA_DSESR) & (1 << i)) {
561 __raw_writel(1 << i, DMA_BASE + DMA_DSESR);
562 errcode |= IMX_DMA_ERR_TRANSFER;
563 }
564 if (__raw_readl(DMA_BASE + DMA_DBOSR) & (1 << i)) {
565 __raw_writel(1 << i, DMA_BASE + DMA_DBOSR);
566 errcode |= IMX_DMA_ERR_BUFFER;
567 }
568 if (imxdma->name && imxdma->err_handler) {
569 imxdma->err_handler(i, imxdma->data, errcode);
570 continue;
571 }
572
573 imx_dma_channels[i].sg = NULL;
574
575 printk(KERN_WARNING
576 "DMA timeout on channel %d (%s) -%s%s%s%s\n",
577 i, imxdma->name,
578 errcode & IMX_DMA_ERR_BURST ? " burst" : "",
579 errcode & IMX_DMA_ERR_REQUEST ? " request" : "",
580 errcode & IMX_DMA_ERR_TRANSFER ? " transfer" : "",
581 errcode & IMX_DMA_ERR_BUFFER ? " buffer" : "");
582 }
583 return IRQ_HANDLED;
584}
585
586static void dma_irq_handle_channel(int chno)
587{
588 struct imx_dma_channel *imxdma = &imx_dma_channels[chno];
589
590 if (!imxdma->name) {
591 /*
592 * IRQ for an unregistered DMA channel:
593 * let's clear the interrupts and disable it.
594 */
595 printk(KERN_WARNING
596 "spurious IRQ for DMA channel %d\n", chno);
597 return;
598 }
599
600 if (imxdma->sg) {
601 u32 tmp;
602 struct scatterlist *current_sg = imxdma->sg;
603 imxdma->sg = sg_next(imxdma->sg);
604
605 if (imxdma->sg) {
606 imx_dma_sg_next(chno, imxdma->sg);
607
608 tmp = __raw_readl(DMA_BASE + DMA_CCR(chno));
609
610 if (imx_dma_hw_chain(imxdma)) {
611 /* FIXME: The timeout should probably be
612 * configurable
613 */
614 mod_timer(&imxdma->watchdog,
615 jiffies + msecs_to_jiffies(500));
616
617 tmp |= CCR_CEN | CCR_RPT | CCR_ACRPT;
618 __raw_writel(tmp, DMA_BASE +
619 DMA_CCR(chno));
620 } else {
621 __raw_writel(tmp & ~CCR_CEN, DMA_BASE +
622 DMA_CCR(chno));
623 tmp |= CCR_CEN;
624 }
625
626 __raw_writel(tmp, DMA_BASE + DMA_CCR(chno));
627
628 if (imxdma->prog_handler)
629 imxdma->prog_handler(chno, imxdma->data,
630 current_sg);
631
632 return;
633 }
634
635 if (imx_dma_hw_chain(imxdma)) {
636 del_timer(&imxdma->watchdog);
637 return;
638 }
639 }
640
641 __raw_writel(0, DMA_BASE + DMA_CCR(chno));
642 imxdma->in_use = 0;
643 if (imxdma->irq_handler)
644 imxdma->irq_handler(chno, imxdma->data);
645}
646
647static irqreturn_t dma_irq_handler(int irq, void *dev_id)
648{
649 int i, disr;
650
651#ifdef CONFIG_ARCH_MX2
652 dma_err_handler(irq, dev_id);
653#endif
654
655 disr = __raw_readl(DMA_BASE + DMA_DISR);
656
657 pr_debug("imxdma: dma_irq_handler called, disr=0x%08x\n",
658 disr);
659
660 __raw_writel(disr, DMA_BASE + DMA_DISR);
661 for (i = 0; i < IMX_DMA_CHANNELS; i++) {
662 if (disr & (1 << i))
663 dma_irq_handle_channel(i);
664 }
665
666 return IRQ_HANDLED;
667}
668
669/**
670 * imx_dma_request - request/allocate specified channel number
671 * @channel: i.MX DMA channel number
672 * @name: the driver/caller own non-%NULL identification
673 */
674int imx_dma_request(int channel, const char *name)
675{
676 struct imx_dma_channel *imxdma = &imx_dma_channels[channel];
677 unsigned long flags;
678 int ret;
679
680 /* basic sanity checks */
681 if (!name)
682 return -EINVAL;
683
684 if (channel >= IMX_DMA_CHANNELS) {
685 printk(KERN_CRIT "%s: called for non-existed channel %d\n",
686 __func__, channel);
687 return -EINVAL;
688 }
689
690 local_irq_save(flags);
691 if (imxdma->name) {
692 local_irq_restore(flags);
693 return -EBUSY;
694 }
695
696#ifdef CONFIG_ARCH_MX2
697 ret = request_irq(MXC_INT_DMACH0 + channel, dma_irq_handler, 0, "DMA",
698 NULL);
699 if (ret) {
700 printk(KERN_CRIT "Can't register IRQ %d for DMA channel %d\n",
701 MXC_INT_DMACH0 + channel, channel);
702 return ret;
703 }
704 init_timer(&imxdma->watchdog);
705 imxdma->watchdog.function = &imx_dma_watchdog;
706 imxdma->watchdog.data = channel;
707#endif
708
709 imxdma->name = name;
710 imxdma->irq_handler = NULL;
711 imxdma->err_handler = NULL;
712 imxdma->data = NULL;
713 imxdma->sg = NULL;
714
715 local_irq_restore(flags);
716 return 0;
717}
718EXPORT_SYMBOL(imx_dma_request);
719
720/**
721 * imx_dma_free - release previously acquired channel
722 * @channel: i.MX DMA channel number
723 */
724void imx_dma_free(int channel)
725{
726 unsigned long flags;
727 struct imx_dma_channel *imxdma = &imx_dma_channels[channel];
728
729 if (!imxdma->name) {
730 printk(KERN_CRIT
731 "%s: trying to free free channel %d\n",
732 __func__, channel);
733 return;
734 }
735
736 local_irq_save(flags);
737 /* Disable interrupts */
738 __raw_writel(__raw_readl(DMA_BASE + DMA_DIMR) | (1 << channel),
739 DMA_BASE + DMA_DIMR);
740 __raw_writel(__raw_readl(DMA_BASE + DMA_CCR(channel)) & ~CCR_CEN,
741 DMA_BASE + DMA_CCR(channel));
742 imxdma->name = NULL;
743
744#ifdef CONFIG_ARCH_MX2
745 free_irq(MXC_INT_DMACH0 + channel, NULL);
746#endif
747
748 local_irq_restore(flags);
749}
750EXPORT_SYMBOL(imx_dma_free);
751
752/**
753 * imx_dma_request_by_prio - find and request some of free channels best
754 * suiting requested priority
755 * @channel: i.MX DMA channel number
756 * @name: the driver/caller own non-%NULL identification
757 *
758 * This function tries to find a free channel in the specified priority group
759 * This function tries to find a free channel in the specified priority group
760 * if the priority cannot be achieved it tries to look for free channel
761 * in the higher and then even lower priority groups.
762 *
763 * Return value: If there is no free channel to allocate, -%ENODEV is returned.
764 * On successful allocation channel is returned.
765 */
766int imx_dma_request_by_prio(const char *name, enum imx_dma_prio prio)
767{
768 int i;
769 int best;
770
771 switch (prio) {
772 case (DMA_PRIO_HIGH):
773 best = 8;
774 break;
775 case (DMA_PRIO_MEDIUM):
776 best = 4;
777 break;
778 case (DMA_PRIO_LOW):
779 default:
780 best = 0;
781 break;
782 }
783
784 for (i = best; i < IMX_DMA_CHANNELS; i++)
785 if (!imx_dma_request(i, name))
786 return i;
787
788 for (i = best - 1; i >= 0; i--)
789 if (!imx_dma_request(i, name))
790 return i;
791
792 printk(KERN_ERR "%s: no free DMA channel found\n", __func__);
793
794 return -ENODEV;
795}
796EXPORT_SYMBOL(imx_dma_request_by_prio);
797
798static int __init imx_dma_init(void)
799{
800 int ret = 0;
801 int i;
802
803 dma_clk = clk_get(NULL, "dma_clk");
804 clk_enable(dma_clk);
805
806 /* reset DMA module */
807 __raw_writel(DCR_DRST, DMA_BASE + DMA_DCR);
808
809#ifdef CONFIG_ARCH_MX1
810 ret = request_irq(DMA_INT, dma_irq_handler, 0, "DMA", NULL);
811 if (ret) {
812 printk(KERN_CRIT "Wow! Can't register IRQ for DMA\n");
813 return ret;
814 }
815
816 ret = request_irq(DMA_ERR, dma_err_handler, 0, "DMA", NULL);
817 if (ret) {
818 printk(KERN_CRIT "Wow! Can't register ERRIRQ for DMA\n");
819 free_irq(DMA_INT, NULL);
820 return ret;
821 }
822#endif
823 /* enable DMA module */
824 __raw_writel(DCR_DEN, DMA_BASE + DMA_DCR);
825
826 /* clear all interrupts */
827 __raw_writel((1 << IMX_DMA_CHANNELS) - 1, DMA_BASE + DMA_DISR);
828
829 /* disable interrupts */
830 __raw_writel((1 << IMX_DMA_CHANNELS) - 1, DMA_BASE + DMA_DIMR);
831
832 for (i = 0; i < IMX_DMA_CHANNELS; i++) {
833 imx_dma_channels[i].sg = NULL;
834 imx_dma_channels[i].dma_num = i;
835 }
836
837 return ret;
838}
839
840arch_initcall(imx_dma_init);
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31ads.h b/arch/arm/plat-mxc/include/mach/board-mx31ads.h
index 1bc6fb0f9a83..745b48864f93 100644
--- a/arch/arm/plat-mxc/include/mach/board-mx31ads.h
+++ b/arch/arm/plat-mxc/include/mach/board-mx31ads.h
@@ -90,6 +90,9 @@
90#define PBC_INTMASK_CLEAR_REG (PBC_INTMASK_CLEAR + PBC_BASE_ADDRESS) 90#define PBC_INTMASK_CLEAR_REG (PBC_INTMASK_CLEAR + PBC_BASE_ADDRESS)
91#define EXPIO_PARENT_INT IOMUX_TO_IRQ(MX31_PIN_GPIO1_4) 91#define EXPIO_PARENT_INT IOMUX_TO_IRQ(MX31_PIN_GPIO1_4)
92 92
93#define MXC_EXP_IO_BASE (MXC_MAX_INT_LINES + MXC_MAX_GPIO_LINES)
94#define MXC_IRQ_TO_EXPIO(irq) ((irq) - MXC_EXP_IO_BASE)
95
93#define EXPIO_INT_LOW_BAT (MXC_EXP_IO_BASE + 0) 96#define EXPIO_INT_LOW_BAT (MXC_EXP_IO_BASE + 0)
94#define EXPIO_INT_PB_IRQ (MXC_EXP_IO_BASE + 1) 97#define EXPIO_INT_PB_IRQ (MXC_EXP_IO_BASE + 1)
95#define EXPIO_INT_OTG_FS_OVR (MXC_EXP_IO_BASE + 2) 98#define EXPIO_INT_OTG_FS_OVR (MXC_EXP_IO_BASE + 2)
diff --git a/arch/arm/plat-mxc/include/mach/clock.h b/arch/arm/plat-mxc/include/mach/clock.h
index 24caa2b7c91d..d21f78e78819 100644
--- a/arch/arm/plat-mxc/include/mach/clock.h
+++ b/arch/arm/plat-mxc/include/mach/clock.h
@@ -39,7 +39,7 @@ struct clk {
39 /* Register bit position for clock's enable/disable control. */ 39 /* Register bit position for clock's enable/disable control. */
40 u8 enable_shift; 40 u8 enable_shift;
41 /* Register address for clock's enable/disable control. */ 41 /* Register address for clock's enable/disable control. */
42 u32 enable_reg; 42 void __iomem *enable_reg;
43 u32 flags; 43 u32 flags;
44 /* get the current clock rate (always a fresh value) */ 44 /* get the current clock rate (always a fresh value) */
45 unsigned long (*get_rate) (struct clk *); 45 unsigned long (*get_rate) (struct clk *);
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
index a6d2e24aab15..6350287a59b9 100644
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/plat-mxc/include/mach/common.h
@@ -11,10 +11,13 @@
11#ifndef __ASM_ARCH_MXC_COMMON_H__ 11#ifndef __ASM_ARCH_MXC_COMMON_H__
12#define __ASM_ARCH_MXC_COMMON_H__ 12#define __ASM_ARCH_MXC_COMMON_H__
13 13
14struct platform_device;
15
14extern void mxc_map_io(void); 16extern void mxc_map_io(void);
15extern void mxc_init_irq(void); 17extern void mxc_init_irq(void);
16extern void mxc_timer_init(const char *clk_timer); 18extern void mxc_timer_init(const char *clk_timer);
17extern int mxc_clocks_init(unsigned long fref); 19extern int mxc_clocks_init(unsigned long fref);
18extern int mxc_register_gpios(void); 20extern int mxc_register_gpios(void);
21extern int mxc_register_device(struct platform_device *pdev, void *data);
19 22
20#endif 23#endif
diff --git a/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h b/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h
new file mode 100644
index 000000000000..e85fd946116c
--- /dev/null
+++ b/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h
@@ -0,0 +1,89 @@
1/*
2 * linux/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h
3 *
4 * i.MX DMA registration and IRQ dispatching
5 *
6 * Copyright 2006 Pavel Pisa <pisa@cmp.felk.cvut.cz>
7 * Copyright 2008 Juergen Beisert, <kernel@pengutronix.de>
8 * Copyright 2008 Sascha Hauer, <s.hauer@pengutronix.de>
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version 2
13 * of the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
22 * MA 02110-1301, USA.
23 */
24
25#include <asm/dma.h>
26
27#ifndef __ASM_ARCH_MXC_DMA_H
28#define __ASM_ARCH_MXC_DMA_H
29
30#define IMX_DMA_CHANNELS 16
31
32#define DMA_BASE IO_ADDRESS(DMA_BASE_ADDR)
33
34#define IMX_DMA_MEMSIZE_32 (0 << 4)
35#define IMX_DMA_MEMSIZE_8 (1 << 4)
36#define IMX_DMA_MEMSIZE_16 (2 << 4)
37#define IMX_DMA_TYPE_LINEAR (0 << 10)
38#define IMX_DMA_TYPE_2D (1 << 10)
39#define IMX_DMA_TYPE_FIFO (2 << 10)
40
41#define IMX_DMA_ERR_BURST (1 << 0)
42#define IMX_DMA_ERR_REQUEST (1 << 1)
43#define IMX_DMA_ERR_TRANSFER (1 << 2)
44#define IMX_DMA_ERR_BUFFER (1 << 3)
45#define IMX_DMA_ERR_TIMEOUT (1 << 4)
46
47int
48imx_dma_config_channel(int channel, unsigned int config_port,
49 unsigned int config_mem, unsigned int dmareq, int hw_chaining);
50
51void
52imx_dma_config_burstlen(int channel, unsigned int burstlen);
53
54int
55imx_dma_setup_single(int channel, dma_addr_t dma_address,
56 unsigned int dma_length, unsigned int dev_addr,
57 dmamode_t dmamode);
58
59int
60imx_dma_setup_sg(int channel, struct scatterlist *sg,
61 unsigned int sgcount, unsigned int dma_length,
62 unsigned int dev_addr, dmamode_t dmamode);
63
64int
65imx_dma_setup_handlers(int channel,
66 void (*irq_handler) (int, void *),
67 void (*err_handler) (int, void *, int), void *data);
68
69int
70imx_dma_setup_progression_handler(int channel,
71 void (*prog_handler) (int, void*, struct scatterlist*));
72
73void imx_dma_enable(int channel);
74
75void imx_dma_disable(int channel);
76
77int imx_dma_request(int channel, const char *name);
78
79void imx_dma_free(int channel);
80
81enum imx_dma_prio {
82 DMA_PRIO_HIGH = 0,
83 DMA_PRIO_MEDIUM = 1,
84 DMA_PRIO_LOW = 2
85};
86
87int imx_dma_request_by_prio(const char *name, enum imx_dma_prio prio);
88
89#endif /* _ASM_ARCH_MXC_DMA_H */
diff --git a/arch/arm/plat-mxc/include/mach/entry-macro.S b/arch/arm/plat-mxc/include/mach/entry-macro.S
index b542433afb1b..11632028f7d1 100644
--- a/arch/arm/plat-mxc/include/mach/entry-macro.S
+++ b/arch/arm/plat-mxc/include/mach/entry-macro.S
@@ -9,11 +9,17 @@
9 * published by the Free Software Foundation. 9 * published by the Free Software Foundation.
10 */ 10 */
11 11
12#define AVIC_NIMASK 0x04
13
12 @ this macro disables fast irq (not implemented) 14 @ this macro disables fast irq (not implemented)
13 .macro disable_fiq 15 .macro disable_fiq
14 .endm 16 .endm
15 17
16 .macro get_irqnr_preamble, base, tmp 18 .macro get_irqnr_preamble, base, tmp
19 ldr \base, =AVIC_IO_ADDRESS(AVIC_BASE_ADDR)
20#ifdef CONFIG_MXC_IRQ_PRIOR
21 ldr r4, [\base, #AVIC_NIMASK]
22#endif
17 .endm 23 .endm
18 24
19 .macro arch_ret_to_user, tmp1, tmp2 25 .macro arch_ret_to_user, tmp1, tmp2
@@ -23,7 +29,6 @@
23 @ and returns its number in irqnr 29 @ and returns its number in irqnr
24 @ and returns if an interrupt occured in irqstat 30 @ and returns if an interrupt occured in irqstat
25 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 31 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
26 ldr \base, =AVIC_IO_ADDRESS(AVIC_BASE_ADDR)
27 @ Load offset & priority of the highest priority 32 @ Load offset & priority of the highest priority
28 @ interrupt pending from AVIC_NIVECSR 33 @ interrupt pending from AVIC_NIVECSR
29 ldr \irqstat, [\base, #0x40] 34 ldr \irqstat, [\base, #0x40]
@@ -32,6 +37,11 @@
32 mov \irqnr, \irqstat, asr #16 37 mov \irqnr, \irqstat, asr #16
33 @ set zero flag if IRQ + 1 == 0 38 @ set zero flag if IRQ + 1 == 0
34 adds \tmp, \irqnr, #1 39 adds \tmp, \irqnr, #1
40#ifdef CONFIG_MXC_IRQ_PRIOR
41 bicne \tmp, \irqstat, #0xFFFFFFE0
42 strne \tmp, [\base, #AVIC_NIMASK]
43 streq r4, [\base, #AVIC_NIMASK]
44#endif
35 .endm 45 .endm
36 46
37 @ irq priority table (not used) 47 @ irq priority table (not used)
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h b/arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h
index 076d37b38eb2..3d09bfd6c53d 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h
@@ -247,6 +247,11 @@ extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
247#endif 247#endif
248 248
249#ifdef CONFIG_ARCH_MX2 249#ifdef CONFIG_ARCH_MX2
250#define PA0_PF_USBH2_CLK (GPIO_PORTA | GPIO_PF | 0)
251#define PA1_PF_USBH2_DIR (GPIO_PORTA | GPIO_PF | 1)
252#define PA2_PF_USBH2_DATA7 (GPIO_PORTA | GPIO_PF | 2)
253#define PA3_PF_USBH2_NXT (GPIO_PORTA | GPIO_PF | 3)
254#define PA4_PF_USBH2_STP (GPIO_PORTA | GPIO_PF | 4)
250#define PA5_PF_LSCLK (GPIO_PORTA | GPIO_OUT | GPIO_PF | 5) 255#define PA5_PF_LSCLK (GPIO_PORTA | GPIO_OUT | GPIO_PF | 5)
251#define PA6_PF_LD0 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 6) 256#define PA6_PF_LD0 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 6)
252#define PA7_PF_LD1 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 7) 257#define PA7_PF_LD1 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 7)
@@ -294,6 +299,16 @@ extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
294#define PB20_AF_UART5_CTS (GPIO_PORTB | GPIO_OUT | GPIO_AF | 20) 299#define PB20_AF_UART5_CTS (GPIO_PORTB | GPIO_OUT | GPIO_AF | 20)
295#define PB21_PF_CSI_HSYNC (GPIO_PORTB | GPIO_OUT | GPIO_PF | 21) 300#define PB21_PF_CSI_HSYNC (GPIO_PORTB | GPIO_OUT | GPIO_PF | 21)
296#define PB21_AF_UART5_RTS (GPIO_PORTB | GPIO_IN | GPIO_AF | 21) 301#define PB21_AF_UART5_RTS (GPIO_PORTB | GPIO_IN | GPIO_AF | 21)
302#define PB22_PF_USBH1_SUSP (GPIO_PORTB | GPIO_PF | 22)
303#define PB23_PF_USB_PWR (GPIO_PORTB | GPIO_PF | 23)
304#define PB24_PF_USB_OC_B (GPIO_PORTB | GPIO_PF | 24)
305#define PB25_PF_USBH1_RCV (GPIO_PORTB | GPIO_PF | 25)
306#define PB26_PF_USBH1_FS (GPIO_PORTB | GPIO_PF | 26)
307#define PB27_PF_USBH1_OE_B (GPIO_PORTB | GPIO_PF | 27)
308#define PB28_PF_USBH1_TXDM (GPIO_PORTB | GPIO_PF | 28)
309#define PB29_PF_USBH1_TXDP (GPIO_PORTB | GPIO_PF | 29)
310#define PB30_PF_USBH1_RXDM (GPIO_PORTB | GPIO_PF | 30)
311#define PB31_PF_USBH1_RXDP (GPIO_PORTB | GPIO_PF | 31)
297#define PB26_AF_UART4_RTS (GPIO_PORTB | GPIO_IN | GPIO_PF | 26) 312#define PB26_AF_UART4_RTS (GPIO_PORTB | GPIO_IN | GPIO_PF | 26)
298#define PB28_AF_UART4_TXD (GPIO_PORTB | GPIO_OUT | GPIO_AF | 28) 313#define PB28_AF_UART4_TXD (GPIO_PORTB | GPIO_OUT | GPIO_AF | 28)
299#define PB29_AF_UART4_CTS (GPIO_PORTB | GPIO_OUT | GPIO_AF | 29) 314#define PB29_AF_UART4_CTS (GPIO_PORTB | GPIO_OUT | GPIO_AF | 29)
@@ -335,8 +350,15 @@ extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
335#define PD16_AIN_FEC_TX_ER (GPIO_PORTD | GPIO_OUT | GPIO_AIN | 16) 350#define PD16_AIN_FEC_TX_ER (GPIO_PORTD | GPIO_OUT | GPIO_AIN | 16)
336#define PD17_PF_I2C_DATA (GPIO_PORTD | GPIO_OUT | GPIO_PF | 17) 351#define PD17_PF_I2C_DATA (GPIO_PORTD | GPIO_OUT | GPIO_PF | 17)
337#define PD18_PF_I2C_CLK (GPIO_PORTD | GPIO_OUT | GPIO_PF | 18) 352#define PD18_PF_I2C_CLK (GPIO_PORTD | GPIO_OUT | GPIO_PF | 18)
353#define PD19_AF_USBH2_DATA4 (GPIO_PORTD | GPIO_AF | 19)
354#define PD20_AF_USBH2_DATA3 (GPIO_PORTD | GPIO_AF | 20)
355#define PD21_AF_USBH2_DATA6 (GPIO_PORTD | GPIO_AF | 21)
356#define PD22_AF_USBH2_DATA0 (GPIO_PORTD | GPIO_AF | 22)
357#define PD23_AF_USBH2_DATA2 (GPIO_PORTD | GPIO_AF | 23)
358#define PD24_AF_USBH2_DATA1 (GPIO_PORTD | GPIO_AF | 24)
338#define PD25_PF_CSPI1_RDY (GPIO_PORTD | GPIO_OUT | GPIO_PF | 25) 359#define PD25_PF_CSPI1_RDY (GPIO_PORTD | GPIO_OUT | GPIO_PF | 25)
339#define PD26_PF_CSPI1_SS2 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 26) 360#define PD26_PF_CSPI1_SS2 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 26)
361#define PD26_AF_USBH2_DATA5 (GPIO_PORTD | GPIO_AF | 26)
340#define PD27_PF_CSPI1_SS1 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 27) 362#define PD27_PF_CSPI1_SS1 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 27)
341#define PD28_PF_CSPI1_SS0 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 28) 363#define PD28_PF_CSPI1_SS0 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 28)
342#define PD29_PF_CSPI1_SCLK (GPIO_PORTD | GPIO_OUT | GPIO_PF | 29) 364#define PD29_PF_CSPI1_SCLK (GPIO_PORTD | GPIO_OUT | GPIO_PF | 29)
@@ -355,6 +377,8 @@ extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
355#define PE13_PF_UART1_RXD (GPIO_PORTE | GPIO_IN | GPIO_PF | 13) 377#define PE13_PF_UART1_RXD (GPIO_PORTE | GPIO_IN | GPIO_PF | 13)
356#define PE14_PF_UART1_CTS (GPIO_PORTE | GPIO_OUT | GPIO_PF | 14) 378#define PE14_PF_UART1_CTS (GPIO_PORTE | GPIO_OUT | GPIO_PF | 14)
357#define PE15_PF_UART1_RTS (GPIO_PORTE | GPIO_IN | GPIO_PF | 15) 379#define PE15_PF_UART1_RTS (GPIO_PORTE | GPIO_IN | GPIO_PF | 15)
380#define PE16_AF_RTCK (GPIO_PORTE | GPIO_OUT | GPIO_AF | 16)
381#define PE16_PF_RTCK (GPIO_PORTE | GPIO_OUT | GPIO_PF | 16)
358#define PE18_AF_CSPI3_MISO (GPIO_PORTE | GPIO_IN | GPIO_AF | 18) 382#define PE18_AF_CSPI3_MISO (GPIO_PORTE | GPIO_IN | GPIO_AF | 18)
359#define PE21_AF_CSPI3_SS (GPIO_PORTE | GPIO_OUT | GPIO_AF | 21) 383#define PE21_AF_CSPI3_SS (GPIO_PORTE | GPIO_OUT | GPIO_AF | 21)
360#define PE22_AF_CSPI3_MOSI (GPIO_PORTE | GPIO_OUT | GPIO_AF | 22) 384#define PE22_AF_CSPI3_MOSI (GPIO_PORTE | GPIO_OUT | GPIO_AF | 22)
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx3.h b/arch/arm/plat-mxc/include/mach/iomux-mx3.h
index 7509e7692f08..c9f39c2fb8c6 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx3.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx3.h
@@ -491,6 +491,26 @@ enum iomux_pins {
491#define MX31_PIN_RTS1__RTS1 IOMUX_MODE(MX31_PIN_RTS1, IOMUX_CONFIG_FUNC) 491#define MX31_PIN_RTS1__RTS1 IOMUX_MODE(MX31_PIN_RTS1, IOMUX_CONFIG_FUNC)
492#define MX31_PIN_TXD1__TXD1 IOMUX_MODE(MX31_PIN_TXD1, IOMUX_CONFIG_FUNC) 492#define MX31_PIN_TXD1__TXD1 IOMUX_MODE(MX31_PIN_TXD1, IOMUX_CONFIG_FUNC)
493#define MX31_PIN_RXD1__RXD1 IOMUX_MODE(MX31_PIN_RXD1, IOMUX_CONFIG_FUNC) 493#define MX31_PIN_RXD1__RXD1 IOMUX_MODE(MX31_PIN_RXD1, IOMUX_CONFIG_FUNC)
494#define MX31_PIN_CSPI1_MOSI__MOSI IOMUX_MODE(MX31_PIN_CSPI1_MOSI, IOMUX_CONFIG_FUNC)
495#define MX31_PIN_CSPI1_MISO__MISO IOMUX_MODE(MX31_PIN_CSPI1_MISO, IOMUX_CONFIG_FUNC)
496#define MX31_PIN_CSPI1_SCLK__SCLK IOMUX_MODE(MX31_PIN_CSPI1_SCLK, IOMUX_CONFIG_FUNC)
497#define MX31_PIN_CSPI1_SPI_RDY__SPI_RDY IOMUX_MODE(MX31_PIN_CSPI1_SPI_RDY, IOMUX_CONFIG_FUNC)
498#define MX31_PIN_CSPI1_SS0__SS0 IOMUX_MODE(MX31_PIN_CSPI1_SS0, IOMUX_CONFIG_FUNC)
499#define MX31_PIN_CSPI1_SS1__SS1 IOMUX_MODE(MX31_PIN_CSPI1_SS1, IOMUX_CONFIG_FUNC)
500#define MX31_PIN_CSPI1_SS2__SS2 IOMUX_MODE(MX31_PIN_CSPI1_SS2, IOMUX_CONFIG_FUNC)
501#define MX31_PIN_CSPI2_MOSI__MOSI IOMUX_MODE(MX31_PIN_CSPI2_MOSI, IOMUX_CONFIG_FUNC)
502#define MX31_PIN_CSPI2_MISO__MISO IOMUX_MODE(MX31_PIN_CSPI2_MISO, IOMUX_CONFIG_FUNC)
503#define MX31_PIN_CSPI2_SCLK__SCLK IOMUX_MODE(MX31_PIN_CSPI2_SCLK, IOMUX_CONFIG_FUNC)
504#define MX31_PIN_CSPI2_SPI_RDY__SPI_RDY IOMUX_MODE(MX31_PIN_CSPI2_SPI_RDY, IOMUX_CONFIG_FUNC)
505#define MX31_PIN_CSPI2_SS0__SS0 IOMUX_MODE(MX31_PIN_CSPI2_SS0, IOMUX_CONFIG_FUNC)
506#define MX31_PIN_CSPI2_SS1__SS1 IOMUX_MODE(MX31_PIN_CSPI2_SS1, IOMUX_CONFIG_FUNC)
507#define MX31_PIN_CSPI2_SS2__SS2 IOMUX_MODE(MX31_PIN_CSPI2_SS2, IOMUX_CONFIG_FUNC)
508#define MX31_PIN_CSPI3_MOSI__MOSI IOMUX_MODE(MX31_PIN_CSPI3_MOSI, IOMUX_CONFIG_FUNC)
509#define MX31_PIN_CSPI3_MISO__MISO IOMUX_MODE(MX31_PIN_CSPI3_MISO, IOMUX_CONFIG_FUNC)
510#define MX31_PIN_CSPI3_SCLK__SCLK IOMUX_MODE(MX31_PIN_CSPI3_SCLK, IOMUX_CONFIG_FUNC)
511#define MX31_PIN_CSPI3_SPI_RDY__SPI_RDY IOMUX_MODE(MX31_PIN_CSPI3_SPI_RDY, IOMUX_CONFIG_FUNC)
512/*XXX: The SS0, SS1, SS2, SS3 lines of spi3 are multiplexed by cspi2_ss0, cspi2_ss1, cspi1_ss0
513 * cspi1_ss1*/
494 514
495/* 515/*
496 * This function configures the pad value for a IOMUX pin. 516 * This function configures the pad value for a IOMUX pin.
diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h
index 228c4f68ccdf..b55bba35e18a 100644
--- a/arch/arm/plat-mxc/include/mach/irqs.h
+++ b/arch/arm/plat-mxc/include/mach/irqs.h
@@ -12,5 +12,6 @@
12#define __ASM_ARCH_MXC_IRQS_H__ 12#define __ASM_ARCH_MXC_IRQS_H__
13 13
14#include <mach/hardware.h> 14#include <mach/hardware.h>
15extern void imx_irq_set_priority(unsigned char irq, unsigned char prio);
15 16
16#endif /* __ASM_ARCH_MXC_IRQS_H__ */ 17#endif /* __ASM_ARCH_MXC_IRQS_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx27.h b/arch/arm/plat-mxc/include/mach/mx27.h
index 212ecc246626..a86db64744a1 100644
--- a/arch/arm/plat-mxc/include/mach/mx27.h
+++ b/arch/arm/plat-mxc/include/mach/mx27.h
@@ -128,6 +128,7 @@
128 * it returns 0xDEADBEEF 128 * it returns 0xDEADBEEF
129 */ 129 */
130#define IO_ADDRESS(x) \ 130#define IO_ADDRESS(x) \
131 (void __iomem *) \
131 (((x >= AIPI_BASE_ADDR) && (x < (AIPI_BASE_ADDR + AIPI_SIZE))) ? \ 132 (((x >= AIPI_BASE_ADDR) && (x < (AIPI_BASE_ADDR + AIPI_SIZE))) ? \
132 AIPI_IO_ADDRESS(x) : \ 133 AIPI_IO_ADDRESS(x) : \
133 ((x >= SAHB1_BASE_ADDR) && (x < (SAHB1_BASE_ADDR + SAHB1_SIZE))) ? \ 134 ((x >= SAHB1_BASE_ADDR) && (x < (SAHB1_BASE_ADDR + SAHB1_SIZE))) ? \
diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/plat-mxc/include/mach/mx31.h
index a7373e4a56cb..0536f8917bc0 100644
--- a/arch/arm/plat-mxc/include/mach/mx31.h
+++ b/arch/arm/plat-mxc/include/mach/mx31.h
@@ -198,6 +198,7 @@
198 * it returns 0xDEADBEEF 198 * it returns 0xDEADBEEF
199 */ 199 */
200#define IO_ADDRESS(x) \ 200#define IO_ADDRESS(x) \
201 (void __iomem *) \
201 (((x >= IRAM_BASE_ADDR) && (x < (IRAM_BASE_ADDR + IRAM_SIZE))) ? IRAM_IO_ADDRESS(x):\ 202 (((x >= IRAM_BASE_ADDR) && (x < (IRAM_BASE_ADDR + IRAM_SIZE))) ? IRAM_IO_ADDRESS(x):\
202 ((x >= L2CC_BASE_ADDR) && (x < (L2CC_BASE_ADDR + L2CC_SIZE))) ? L2CC_IO_ADDRESS(x):\ 203 ((x >= L2CC_BASE_ADDR) && (x < (L2CC_BASE_ADDR + L2CC_SIZE))) ? L2CC_IO_ADDRESS(x):\
203 ((x >= AIPS1_BASE_ADDR) && (x < (AIPS1_BASE_ADDR + AIPS1_SIZE))) ? AIPS1_IO_ADDRESS(x):\ 204 ((x >= AIPS1_BASE_ADDR) && (x < (AIPS1_BASE_ADDR + AIPS1_SIZE))) ? AIPS1_IO_ADDRESS(x):\
diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h
index 332eda4dbd3b..f6caab062131 100644
--- a/arch/arm/plat-mxc/include/mach/mxc.h
+++ b/arch/arm/plat-mxc/include/mach/mxc.h
@@ -33,4 +33,10 @@
33# define cpu_is_mx27() (0) 33# define cpu_is_mx27() (0)
34#endif 34#endif
35 35
36#if defined(CONFIG_ARCH_MX3) || defined(CONFIG_ARCH_MX2)
37#define CSCR_U(n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10)
38#define CSCR_L(n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10 + 0x4)
39#define CSCR_A(n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10 + 0x8)
40#endif
41
36#endif /* __ASM_ARCH_MXC_H__ */ 42#endif /* __ASM_ARCH_MXC_H__ */
diff --git a/arch/arm/plat-mxc/irq.c b/arch/arm/plat-mxc/irq.c
index 1053b666c676..d862c9e5f8db 100644
--- a/arch/arm/plat-mxc/irq.c
+++ b/arch/arm/plat-mxc/irq.c
@@ -18,7 +18,7 @@
18 */ 18 */
19 19
20#include <linux/irq.h> 20#include <linux/irq.h>
21#include <asm/io.h> 21#include <linux/io.h>
22#include <mach/common.h> 22#include <mach/common.h>
23 23
24#define AVIC_BASE IO_ADDRESS(AVIC_BASE_ADDR) 24#define AVIC_BASE IO_ADDRESS(AVIC_BASE_ADDR)
@@ -30,14 +30,7 @@
30#define AVIC_INTENABLEL (AVIC_BASE + 0x14) /* int enable reg low */ 30#define AVIC_INTENABLEL (AVIC_BASE + 0x14) /* int enable reg low */
31#define AVIC_INTTYPEH (AVIC_BASE + 0x18) /* int type reg high */ 31#define AVIC_INTTYPEH (AVIC_BASE + 0x18) /* int type reg high */
32#define AVIC_INTTYPEL (AVIC_BASE + 0x1C) /* int type reg low */ 32#define AVIC_INTTYPEL (AVIC_BASE + 0x1C) /* int type reg low */
33#define AVIC_NIPRIORITY7 (AVIC_BASE + 0x20) /* norm int priority lvl7 */ 33#define AVIC_NIPRIORITY(x) (AVIC_BASE + (0x20 + 4 * (7 - (x)))) /* int priority */
34#define AVIC_NIPRIORITY6 (AVIC_BASE + 0x24) /* norm int priority lvl6 */
35#define AVIC_NIPRIORITY5 (AVIC_BASE + 0x28) /* norm int priority lvl5 */
36#define AVIC_NIPRIORITY4 (AVIC_BASE + 0x2C) /* norm int priority lvl4 */
37#define AVIC_NIPRIORITY3 (AVIC_BASE + 0x30) /* norm int priority lvl3 */
38#define AVIC_NIPRIORITY2 (AVIC_BASE + 0x34) /* norm int priority lvl2 */
39#define AVIC_NIPRIORITY1 (AVIC_BASE + 0x38) /* norm int priority lvl1 */
40#define AVIC_NIPRIORITY0 (AVIC_BASE + 0x3C) /* norm int priority lvl0 */
41#define AVIC_NIVECSR (AVIC_BASE + 0x40) /* norm int vector/status */ 34#define AVIC_NIVECSR (AVIC_BASE + 0x40) /* norm int vector/status */
42#define AVIC_FIVECSR (AVIC_BASE + 0x44) /* fast int vector/status */ 35#define AVIC_FIVECSR (AVIC_BASE + 0x44) /* fast int vector/status */
43#define AVIC_INTSRCH (AVIC_BASE + 0x48) /* int source reg high */ 36#define AVIC_INTSRCH (AVIC_BASE + 0x48) /* int source reg high */
@@ -54,6 +47,24 @@
54#define IIM_PROD_REV_SH 3 47#define IIM_PROD_REV_SH 3
55#define IIM_PROD_REV_LEN 5 48#define IIM_PROD_REV_LEN 5
56 49
50#ifdef CONFIG_MXC_IRQ_PRIOR
51void imx_irq_set_priority(unsigned char irq, unsigned char prio)
52{
53 unsigned int temp;
54 unsigned int mask = 0x0F << irq % 8 * 4;
55
56 if (irq > 63)
57 return;
58
59 temp = __raw_readl(AVIC_NIPRIORITY(irq / 8));
60 temp &= ~mask;
61 temp |= prio & mask;
62
63 __raw_writel(temp, AVIC_NIPRIORITY(irq / 8));
64}
65EXPORT_SYMBOL(imx_irq_set_priority);
66#endif
67
57/* Disable interrupt number "irq" in the AVIC */ 68/* Disable interrupt number "irq" in the AVIC */
58static void mxc_mask_irq(unsigned int irq) 69static void mxc_mask_irq(unsigned int irq)
59{ 70{
@@ -101,10 +112,9 @@ void __init mxc_init_irq(void)
101 set_irq_flags(i, IRQF_VALID); 112 set_irq_flags(i, IRQF_VALID);
102 } 113 }
103 114
104 /* Set WDOG2's interrupt the highest priority level (bit 28-31) */ 115 /* Set default priority value (0) for all IRQ's */
105 reg = __raw_readl(AVIC_NIPRIORITY6); 116 for (i = 0; i < 8; i++)
106 reg |= (0xF << 28); 117 __raw_writel(0, AVIC_NIPRIORITY(i));
107 __raw_writel(reg, AVIC_NIPRIORITY6);
108 118
109 /* init architectures chained interrupt handler */ 119 /* init architectures chained interrupt handler */
110 mxc_register_gpios(); 120 mxc_register_gpios();
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c
index 197974defbe4..bf6a10c5fc4f 100644
--- a/arch/arm/plat-omap/clock.c
+++ b/arch/arm/plat-omap/clock.c
@@ -22,8 +22,7 @@
22#include <linux/platform_device.h> 22#include <linux/platform_device.h>
23#include <linux/cpufreq.h> 23#include <linux/cpufreq.h>
24#include <linux/debugfs.h> 24#include <linux/debugfs.h>
25 25#include <linux/io.h>
26#include <asm/io.h>
27 26
28#include <mach/clock.h> 27#include <mach/clock.h>
29 28
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index f4dff423ae7c..8bdf0ead0cf3 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -18,12 +18,12 @@
18#include <linux/serial_8250.h> 18#include <linux/serial_8250.h>
19#include <linux/serial_reg.h> 19#include <linux/serial_reg.h>
20#include <linux/clk.h> 20#include <linux/clk.h>
21#include <linux/io.h>
21 22
22#include <mach/hardware.h> 23#include <mach/hardware.h>
23#include <asm/system.h> 24#include <asm/system.h>
24#include <asm/pgtable.h> 25#include <asm/pgtable.h>
25#include <asm/mach/map.h> 26#include <asm/mach/map.h>
26#include <asm/io.h>
27#include <asm/setup.h> 27#include <asm/setup.h>
28 28
29#include <mach/common.h> 29#include <mach/common.h>
diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c
index ae1de308aaad..b2690242a390 100644
--- a/arch/arm/plat-omap/cpu-omap.c
+++ b/arch/arm/plat-omap/cpu-omap.c
@@ -20,9 +20,9 @@
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/err.h> 21#include <linux/err.h>
22#include <linux/clk.h> 22#include <linux/clk.h>
23#include <linux/io.h>
23 24
24#include <mach/hardware.h> 25#include <mach/hardware.h>
25#include <asm/io.h>
26#include <asm/system.h> 26#include <asm/system.h>
27 27
28#define VERY_HI_RATE 900000000 28#define VERY_HI_RATE 900000000
diff --git a/arch/arm/plat-omap/debug-devices.c b/arch/arm/plat-omap/debug-devices.c
index 5b73bb274452..e31154b15d9e 100644
--- a/arch/arm/plat-omap/debug-devices.c
+++ b/arch/arm/plat-omap/debug-devices.c
@@ -12,9 +12,9 @@
12#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <linux/io.h>
15 16
16#include <mach/hardware.h> 17#include <mach/hardware.h>
17#include <asm/io.h>
18 18
19#include <mach/board.h> 19#include <mach/board.h>
20#include <mach/gpio.h> 20#include <mach/gpio.h>
diff --git a/arch/arm/plat-omap/debug-leds.c b/arch/arm/plat-omap/debug-leds.c
index 9422dee7de84..2f4c0cabfd34 100644
--- a/arch/arm/plat-omap/debug-leds.c
+++ b/arch/arm/plat-omap/debug-leds.c
@@ -11,8 +11,8 @@
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/platform_device.h> 12#include <linux/platform_device.h>
13#include <linux/leds.h> 13#include <linux/leds.h>
14#include <linux/io.h>
14 15
15#include <asm/io.h>
16#include <mach/hardware.h> 16#include <mach/hardware.h>
17#include <asm/leds.h> 17#include <asm/leds.h>
18#include <asm/system.h> 18#include <asm/system.h>
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
index 01da719a7453..a716ecd1db27 100644
--- a/arch/arm/plat-omap/devices.c
+++ b/arch/arm/plat-omap/devices.c
@@ -13,9 +13,9 @@
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/platform_device.h> 15#include <linux/platform_device.h>
16#include <linux/io.h>
16 17
17#include <mach/hardware.h> 18#include <mach/hardware.h>
18#include <asm/io.h>
19#include <asm/mach-types.h> 19#include <asm/mach-types.h>
20#include <asm/mach/map.h> 20#include <asm/mach/map.h>
21 21
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 743a4abcd85d..606fcffdcefc 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -32,9 +32,9 @@
32#include <linux/list.h> 32#include <linux/list.h>
33#include <linux/clk.h> 33#include <linux/clk.h>
34#include <linux/delay.h> 34#include <linux/delay.h>
35#include <linux/io.h>
35#include <mach/hardware.h> 36#include <mach/hardware.h>
36#include <mach/dmtimer.h> 37#include <mach/dmtimer.h>
37#include <asm/io.h>
38#include <mach/irqs.h> 38#include <mach/irqs.h>
39 39
40/* register offsets */ 40/* register offsets */
diff --git a/arch/arm/plat-omap/fb.c b/arch/arm/plat-omap/fb.c
index 17a92a31e746..ce6b4baeedec 100644
--- a/arch/arm/plat-omap/fb.c
+++ b/arch/arm/plat-omap/fb.c
@@ -27,9 +27,9 @@
27#include <linux/init.h> 27#include <linux/init.h>
28#include <linux/platform_device.h> 28#include <linux/platform_device.h>
29#include <linux/bootmem.h> 29#include <linux/bootmem.h>
30#include <linux/io.h>
30 31
31#include <mach/hardware.h> 32#include <mach/hardware.h>
32#include <asm/io.h>
33#include <asm/mach/map.h> 33#include <asm/mach/map.h>
34 34
35#include <mach/board.h> 35#include <mach/board.h>
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 9e1341ebc14e..5935ae4e550b 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -17,6 +17,7 @@
17#include <linux/sysdev.h> 17#include <linux/sysdev.h>
18#include <linux/err.h> 18#include <linux/err.h>
19#include <linux/clk.h> 19#include <linux/clk.h>
20#include <linux/io.h>
20 21
21#include <mach/hardware.h> 22#include <mach/hardware.h>
22#include <asm/irq.h> 23#include <asm/irq.h>
@@ -24,8 +25,6 @@
24#include <mach/gpio.h> 25#include <mach/gpio.h>
25#include <asm/mach/irq.h> 26#include <asm/mach/irq.h>
26 27
27#include <asm/io.h>
28
29/* 28/*
30 * OMAP1510 GPIO registers 29 * OMAP1510 GPIO registers
31 */ 30 */
@@ -1051,13 +1050,10 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
1051 1050
1052 gpio_irq = bank->virtual_irq_start; 1051 gpio_irq = bank->virtual_irq_start;
1053 for (; isr != 0; isr >>= 1, gpio_irq++) { 1052 for (; isr != 0; isr >>= 1, gpio_irq++) {
1054 struct irq_desc *d;
1055
1056 if (!(isr & 1)) 1053 if (!(isr & 1))
1057 continue; 1054 continue;
1058 d = irq_desc + gpio_irq;
1059 1055
1060 desc_handle_irq(gpio_irq, d); 1056 generic_handle_irq(gpio_irq);
1061 } 1057 }
1062 } 1058 }
1063 /* if bank has any level sensitive GPIO pin interrupt 1059 /* if bank has any level sensitive GPIO pin interrupt
diff --git a/arch/arm/plat-omap/include/mach/gpio.h b/arch/arm/plat-omap/include/mach/gpio.h
index 94ce2780e8ee..8c71e288860f 100644
--- a/arch/arm/plat-omap/include/mach/gpio.h
+++ b/arch/arm/plat-omap/include/mach/gpio.h
@@ -26,8 +26,8 @@
26#ifndef __ASM_ARCH_OMAP_GPIO_H 26#ifndef __ASM_ARCH_OMAP_GPIO_H
27#define __ASM_ARCH_OMAP_GPIO_H 27#define __ASM_ARCH_OMAP_GPIO_H
28 28
29#include <linux/io.h>
29#include <mach/irqs.h> 30#include <mach/irqs.h>
30#include <asm/io.h>
31 31
32#define OMAP_MPUIO_BASE (void __iomem *)0xfffb5000 32#define OMAP_MPUIO_BASE (void __iomem *)0xfffb5000
33 33
diff --git a/arch/arm/plat-omap/include/mach/irqs.h b/arch/arm/plat-omap/include/mach/irqs.h
index 17248bbf3f27..62aa7dfb9464 100644
--- a/arch/arm/plat-omap/include/mach/irqs.h
+++ b/arch/arm/plat-omap/include/mach/irqs.h
@@ -280,6 +280,8 @@
280#define INT_24XX_USB_IRQ_OTG 80 280#define INT_24XX_USB_IRQ_OTG 80
281#define INT_24XX_MMC_IRQ 83 281#define INT_24XX_MMC_IRQ 83
282 282
283#define INT_34XX_BENCH_MPU_EMUL 3
284
283/* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730) and 285/* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730) and
284 * 16 MPUIO lines */ 286 * 16 MPUIO lines */
285#define OMAP_MAX_GPIO_LINES 192 287#define OMAP_MAX_GPIO_LINES 192
diff --git a/arch/arm/plat-omap/mailbox.c b/arch/arm/plat-omap/mailbox.c
index 1d7aec1a691a..b52ce053e6f2 100644
--- a/arch/arm/plat-omap/mailbox.c
+++ b/arch/arm/plat-omap/mailbox.c
@@ -30,7 +30,7 @@
30#include <linux/blkdev.h> 30#include <linux/blkdev.h>
31#include <linux/err.h> 31#include <linux/err.h>
32#include <linux/delay.h> 32#include <linux/delay.h>
33#include <asm/io.h> 33#include <linux/io.h>
34#include <mach/mailbox.h> 34#include <mach/mailbox.h>
35#include "mailbox.h" 35#include "mailbox.h"
36 36
diff --git a/arch/arm/plat-omap/mux.c b/arch/arm/plat-omap/mux.c
index 847df208c46c..80b040fd5ca7 100644
--- a/arch/arm/plat-omap/mux.c
+++ b/arch/arm/plat-omap/mux.c
@@ -25,8 +25,8 @@
25#include <linux/module.h> 25#include <linux/module.h>
26#include <linux/init.h> 26#include <linux/init.h>
27#include <linux/kernel.h> 27#include <linux/kernel.h>
28#include <linux/io.h>
28#include <asm/system.h> 29#include <asm/system.h>
29#include <asm/io.h>
30#include <linux/spinlock.h> 30#include <linux/spinlock.h>
31#include <mach/mux.h> 31#include <mach/mux.h>
32 32
diff --git a/arch/arm/plat-omap/ocpi.c b/arch/arm/plat-omap/ocpi.c
index 8bdbf979a257..ebe0c73c8901 100644
--- a/arch/arm/plat-omap/ocpi.c
+++ b/arch/arm/plat-omap/ocpi.c
@@ -31,8 +31,8 @@
31#include <linux/spinlock.h> 31#include <linux/spinlock.h>
32#include <linux/err.h> 32#include <linux/err.h>
33#include <linux/clk.h> 33#include <linux/clk.h>
34#include <linux/io.h>
34 35
35#include <asm/io.h>
36#include <mach/hardware.h> 36#include <mach/hardware.h>
37 37
38#define OCPI_BASE 0xfffec320 38#define OCPI_BASE 0xfffec320
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index ac67eeb6ca6a..e0003e0746e7 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -15,9 +15,9 @@
15#include <linux/module.h> 15#include <linux/module.h>
16#include <linux/kernel.h> 16#include <linux/kernel.h>
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/io.h>
18 19
19#include <asm/tlb.h> 20#include <asm/tlb.h>
20#include <asm/io.h>
21#include <asm/cacheflush.h> 21#include <asm/cacheflush.h>
22 22
23#include <asm/mach/map.h> 23#include <asm/mach/map.h>
diff --git a/arch/arm/plat-omap/usb.c b/arch/arm/plat-omap/usb.c
index 777485e0636b..67ca1e216df7 100644
--- a/arch/arm/plat-omap/usb.c
+++ b/arch/arm/plat-omap/usb.c
@@ -27,8 +27,8 @@
27#include <linux/init.h> 27#include <linux/init.h>
28#include <linux/platform_device.h> 28#include <linux/platform_device.h>
29#include <linux/usb/otg.h> 29#include <linux/usb/otg.h>
30#include <linux/io.h>
30 31
31#include <asm/io.h>
32#include <asm/irq.h> 32#include <asm/irq.h>
33#include <asm/system.h> 33#include <asm/system.h>
34#include <mach/hardware.h> 34#include <mach/hardware.h>
diff --git a/arch/arm/plat-s3c24xx/clock.c b/arch/arm/plat-s3c24xx/clock.c
index 54d4b8e2263c..400541359bfb 100644
--- a/arch/arm/plat-s3c24xx/clock.c
+++ b/arch/arm/plat-s3c24xx/clock.c
@@ -39,10 +39,10 @@
39#include <linux/clk.h> 39#include <linux/clk.h>
40#include <linux/mutex.h> 40#include <linux/mutex.h>
41#include <linux/delay.h> 41#include <linux/delay.h>
42#include <linux/io.h>
42 43
43#include <mach/hardware.h> 44#include <mach/hardware.h>
44#include <asm/irq.h> 45#include <asm/irq.h>
45#include <asm/io.h>
46 46
47#include <mach/regs-clock.h> 47#include <mach/regs-clock.h>
48#include <mach/regs-gpio.h> 48#include <mach/regs-gpio.h>
diff --git a/arch/arm/plat-s3c24xx/common-smdk.c b/arch/arm/plat-s3c24xx/common-smdk.c
index 1863a1b1bc49..d528f460f6bc 100644
--- a/arch/arm/plat-s3c24xx/common-smdk.c
+++ b/arch/arm/plat-s3c24xx/common-smdk.c
@@ -25,6 +25,7 @@
25#include <linux/mtd/nand.h> 25#include <linux/mtd/nand.h>
26#include <linux/mtd/nand_ecc.h> 26#include <linux/mtd/nand_ecc.h>
27#include <linux/mtd/partitions.h> 27#include <linux/mtd/partitions.h>
28#include <linux/io.h>
28 29
29#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
30#include <asm/mach/map.h> 31#include <asm/mach/map.h>
@@ -32,7 +33,6 @@
32 33
33#include <asm/mach-types.h> 34#include <asm/mach-types.h>
34#include <mach/hardware.h> 35#include <mach/hardware.h>
35#include <asm/io.h>
36#include <asm/irq.h> 36#include <asm/irq.h>
37 37
38#include <mach/regs-gpio.h> 38#include <mach/regs-gpio.h>
diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c
index 89ce60eabd5b..9c607bbc9343 100644
--- a/arch/arm/plat-s3c24xx/cpu.c
+++ b/arch/arm/plat-s3c24xx/cpu.c
@@ -29,11 +29,11 @@
29#include <linux/serial_core.h> 29#include <linux/serial_core.h>
30#include <linux/platform_device.h> 30#include <linux/platform_device.h>
31#include <linux/delay.h> 31#include <linux/delay.h>
32#include <linux/io.h>
33#include <linux/delay.h>
32 34
33#include <mach/hardware.h> 35#include <mach/hardware.h>
34#include <asm/irq.h> 36#include <asm/irq.h>
35#include <asm/io.h>
36#include <asm/delay.h>
37#include <asm/cacheflush.h> 37#include <asm/cacheflush.h>
38 38
39#include <asm/mach/arch.h> 39#include <asm/mach/arch.h>
diff --git a/arch/arm/plat-s3c24xx/devs.c b/arch/arm/plat-s3c24xx/devs.c
index d6fb76578b11..6b13b5455dfc 100644
--- a/arch/arm/plat-s3c24xx/devs.c
+++ b/arch/arm/plat-s3c24xx/devs.c
@@ -19,13 +19,13 @@
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/serial_core.h> 20#include <linux/serial_core.h>
21#include <linux/platform_device.h> 21#include <linux/platform_device.h>
22#include <linux/io.h>
22 23
23#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
24#include <asm/mach/map.h> 25#include <asm/mach/map.h>
25#include <asm/mach/irq.h> 26#include <asm/mach/irq.h>
26#include <mach/fb.h> 27#include <mach/fb.h>
27#include <mach/hardware.h> 28#include <mach/hardware.h>
28#include <asm/io.h>
29#include <asm/irq.h> 29#include <asm/irq.h>
30 30
31#include <asm/plat-s3c/regs-serial.h> 31#include <asm/plat-s3c/regs-serial.h>
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c
index 08c2aaf14c41..d6344461a83b 100644
--- a/arch/arm/plat-s3c24xx/dma.c
+++ b/arch/arm/plat-s3c24xx/dma.c
@@ -26,11 +26,11 @@
26#include <linux/slab.h> 26#include <linux/slab.h>
27#include <linux/errno.h> 27#include <linux/errno.h>
28#include <linux/delay.h> 28#include <linux/delay.h>
29#include <linux/io.h>
29 30
30#include <asm/system.h> 31#include <asm/system.h>
31#include <asm/irq.h> 32#include <asm/irq.h>
32#include <mach/hardware.h> 33#include <mach/hardware.h>
33#include <asm/io.h>
34#include <asm/dma.h> 34#include <asm/dma.h>
35 35
36#include <asm/mach/dma.h> 36#include <asm/mach/dma.h>
diff --git a/arch/arm/plat-s3c24xx/gpio.c b/arch/arm/plat-s3c24xx/gpio.c
index dd27334e3d7e..4a899c279eb5 100644
--- a/arch/arm/plat-s3c24xx/gpio.c
+++ b/arch/arm/plat-s3c24xx/gpio.c
@@ -26,10 +26,10 @@
26#include <linux/module.h> 26#include <linux/module.h>
27#include <linux/interrupt.h> 27#include <linux/interrupt.h>
28#include <linux/ioport.h> 28#include <linux/ioport.h>
29#include <linux/io.h>
29 30
30#include <mach/hardware.h> 31#include <mach/hardware.h>
31#include <asm/irq.h> 32#include <asm/irq.h>
32#include <asm/io.h>
33 33
34#include <mach/regs-gpio.h> 34#include <mach/regs-gpio.h>
35 35
diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c
index 36cefe176835..590fc5a3ab06 100644
--- a/arch/arm/plat-s3c24xx/irq.c
+++ b/arch/arm/plat-s3c24xx/irq.c
@@ -55,10 +55,10 @@
55#include <linux/interrupt.h> 55#include <linux/interrupt.h>
56#include <linux/ioport.h> 56#include <linux/ioport.h>
57#include <linux/sysdev.h> 57#include <linux/sysdev.h>
58#include <linux/io.h>
58 59
59#include <mach/hardware.h> 60#include <mach/hardware.h>
60#include <asm/irq.h> 61#include <asm/irq.h>
61#include <asm/io.h>
62 62
63#include <asm/mach/irq.h> 63#include <asm/mach/irq.h>
64 64
@@ -468,7 +468,6 @@ static void s3c_irq_demux_adc(unsigned int irq,
468{ 468{
469 unsigned int subsrc, submsk; 469 unsigned int subsrc, submsk;
470 unsigned int offset = 9; 470 unsigned int offset = 9;
471 struct irq_desc *mydesc;
472 471
473 /* read the current pending interrupts, and the mask 472 /* read the current pending interrupts, and the mask
474 * for what it is available */ 473 * for what it is available */
@@ -482,12 +481,10 @@ static void s3c_irq_demux_adc(unsigned int irq,
482 481
483 if (subsrc != 0) { 482 if (subsrc != 0) {
484 if (subsrc & 1) { 483 if (subsrc & 1) {
485 mydesc = irq_desc + IRQ_TC; 484 generic_handle_irq(IRQ_TC);
486 desc_handle_irq(IRQ_TC, mydesc);
487 } 485 }
488 if (subsrc & 2) { 486 if (subsrc & 2) {
489 mydesc = irq_desc + IRQ_ADC; 487 generic_handle_irq(IRQ_ADC);
490 desc_handle_irq(IRQ_ADC, mydesc);
491 } 488 }
492 } 489 }
493} 490}
@@ -496,7 +493,6 @@ static void s3c_irq_demux_uart(unsigned int start)
496{ 493{
497 unsigned int subsrc, submsk; 494 unsigned int subsrc, submsk;
498 unsigned int offset = start - IRQ_S3CUART_RX0; 495 unsigned int offset = start - IRQ_S3CUART_RX0;
499 struct irq_desc *desc;
500 496
501 /* read the current pending interrupts, and the mask 497 /* read the current pending interrupts, and the mask
502 * for what it is available */ 498 * for what it is available */
@@ -512,20 +508,14 @@ static void s3c_irq_demux_uart(unsigned int start)
512 subsrc &= 7; 508 subsrc &= 7;
513 509
514 if (subsrc != 0) { 510 if (subsrc != 0) {
515 desc = irq_desc + start;
516
517 if (subsrc & 1) 511 if (subsrc & 1)
518 desc_handle_irq(start, desc); 512 generic_handle_irq(start);
519
520 desc++;
521 513
522 if (subsrc & 2) 514 if (subsrc & 2)
523 desc_handle_irq(start+1, desc); 515 generic_handle_irq(start+1);
524
525 desc++;
526 516
527 if (subsrc & 4) 517 if (subsrc & 4)
528 desc_handle_irq(start+2, desc); 518 generic_handle_irq(start+2);
529 } 519 }
530} 520}
531 521
@@ -572,7 +562,7 @@ s3c_irq_demux_extint8(unsigned int irq,
572 eintpnd &= ~(1<<irq); 562 eintpnd &= ~(1<<irq);
573 563
574 irq += (IRQ_EINT4 - 4); 564 irq += (IRQ_EINT4 - 4);
575 desc_handle_irq(irq, irq_desc + irq); 565 generic_handle_irq(irq);
576 } 566 }
577 567
578} 568}
@@ -595,7 +585,7 @@ s3c_irq_demux_extint4t7(unsigned int irq,
595 585
596 irq += (IRQ_EINT4 - 4); 586 irq += (IRQ_EINT4 - 4);
597 587
598 desc_handle_irq(irq, irq_desc + irq); 588 generic_handle_irq(irq);
599 } 589 }
600} 590}
601 591
diff --git a/arch/arm/plat-s3c24xx/pm-simtec.c b/arch/arm/plat-s3c24xx/pm-simtec.c
index e6705014b2a0..0a074d35890a 100644
--- a/arch/arm/plat-s3c24xx/pm-simtec.c
+++ b/arch/arm/plat-s3c24xx/pm-simtec.c
@@ -20,12 +20,12 @@
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/sysdev.h> 21#include <linux/sysdev.h>
22#include <linux/device.h> 22#include <linux/device.h>
23#include <linux/io.h>
23 24
24#include <asm/mach/arch.h> 25#include <asm/mach/arch.h>
25#include <asm/mach/map.h> 26#include <asm/mach/map.h>
26 27
27#include <mach/hardware.h> 28#include <mach/hardware.h>
28#include <asm/io.h>
29 29
30#include <mach/map.h> 30#include <mach/map.h>
31#include <mach/regs-gpio.h> 31#include <mach/regs-gpio.h>
diff --git a/arch/arm/plat-s3c24xx/pm.c b/arch/arm/plat-s3c24xx/pm.c
index fc4b731a949c..d3934b1119a9 100644
--- a/arch/arm/plat-s3c24xx/pm.c
+++ b/arch/arm/plat-s3c24xx/pm.c
@@ -35,10 +35,10 @@
35#include <linux/ioport.h> 35#include <linux/ioport.h>
36#include <linux/delay.h> 36#include <linux/delay.h>
37#include <linux/serial_core.h> 37#include <linux/serial_core.h>
38#include <linux/io.h>
38 39
39#include <asm/cacheflush.h> 40#include <asm/cacheflush.h>
40#include <mach/hardware.h> 41#include <mach/hardware.h>
41#include <asm/io.h>
42 42
43#include <asm/plat-s3c/regs-serial.h> 43#include <asm/plat-s3c/regs-serial.h>
44#include <mach/regs-clock.h> 44#include <mach/regs-clock.h>
diff --git a/arch/arm/plat-s3c24xx/s3c244x-clock.c b/arch/arm/plat-s3c24xx/s3c244x-clock.c
index 8a5fffde6631..119647a5eaa6 100644
--- a/arch/arm/plat-s3c24xx/s3c244x-clock.c
+++ b/arch/arm/plat-s3c24xx/s3c244x-clock.c
@@ -33,11 +33,11 @@
33#include <linux/ioport.h> 33#include <linux/ioport.h>
34#include <linux/mutex.h> 34#include <linux/mutex.h>
35#include <linux/clk.h> 35#include <linux/clk.h>
36#include <linux/io.h>
36 37
37#include <mach/hardware.h> 38#include <mach/hardware.h>
38#include <asm/atomic.h> 39#include <asm/atomic.h>
39#include <asm/irq.h> 40#include <asm/irq.h>
40#include <asm/io.h>
41 41
42#include <mach/regs-clock.h> 42#include <mach/regs-clock.h>
43 43
diff --git a/arch/arm/plat-s3c24xx/s3c244x-irq.c b/arch/arm/plat-s3c24xx/s3c244x-irq.c
index f3dc38cf1de4..0601c5f3230b 100644
--- a/arch/arm/plat-s3c24xx/s3c244x-irq.c
+++ b/arch/arm/plat-s3c24xx/s3c244x-irq.c
@@ -24,10 +24,10 @@
24#include <linux/interrupt.h> 24#include <linux/interrupt.h>
25#include <linux/ioport.h> 25#include <linux/ioport.h>
26#include <linux/sysdev.h> 26#include <linux/sysdev.h>
27#include <linux/io.h>
27 28
28#include <mach/hardware.h> 29#include <mach/hardware.h>
29#include <asm/irq.h> 30#include <asm/irq.h>
30#include <asm/io.h>
31 31
32#include <asm/mach/irq.h> 32#include <asm/mach/irq.h>
33 33
@@ -44,7 +44,6 @@ static void s3c_irq_demux_cam(unsigned int irq,
44 struct irq_desc *desc) 44 struct irq_desc *desc)
45{ 45{
46 unsigned int subsrc, submsk; 46 unsigned int subsrc, submsk;
47 struct irq_desc *mydesc;
48 47
49 /* read the current pending interrupts, and the mask 48 /* read the current pending interrupts, and the mask
50 * for what it is available */ 49 * for what it is available */
@@ -58,12 +57,10 @@ static void s3c_irq_demux_cam(unsigned int irq,
58 57
59 if (subsrc != 0) { 58 if (subsrc != 0) {
60 if (subsrc & 1) { 59 if (subsrc & 1) {
61 mydesc = irq_desc + IRQ_S3C2440_CAM_C; 60 generic_handle_irq(IRQ_S3C2440_CAM_C);
62 desc_handle_irq(IRQ_S3C2440_CAM_C, mydesc);
63 } 61 }
64 if (subsrc & 2) { 62 if (subsrc & 2) {
65 mydesc = irq_desc + IRQ_S3C2440_CAM_P; 63 generic_handle_irq(IRQ_S3C2440_CAM_P);
66 desc_handle_irq(IRQ_S3C2440_CAM_P, mydesc);
67 } 64 }
68 } 65 }
69} 66}
diff --git a/arch/arm/plat-s3c24xx/s3c244x.c b/arch/arm/plat-s3c24xx/s3c244x.c
index 281b4804ed38..146863a69aeb 100644
--- a/arch/arm/plat-s3c24xx/s3c244x.c
+++ b/arch/arm/plat-s3c24xx/s3c244x.c
@@ -20,13 +20,13 @@
20#include <linux/platform_device.h> 20#include <linux/platform_device.h>
21#include <linux/sysdev.h> 21#include <linux/sysdev.h>
22#include <linux/clk.h> 22#include <linux/clk.h>
23#include <linux/io.h>
23 24
24#include <asm/mach/arch.h> 25#include <asm/mach/arch.h>
25#include <asm/mach/map.h> 26#include <asm/mach/map.h>
26#include <asm/mach/irq.h> 27#include <asm/mach/irq.h>
27 28
28#include <mach/hardware.h> 29#include <mach/hardware.h>
29#include <asm/io.h>
30#include <asm/irq.h> 30#include <asm/irq.h>
31 31
32#include <mach/regs-clock.h> 32#include <mach/regs-clock.h>
diff --git a/arch/arm/plat-s3c24xx/time.c b/arch/arm/plat-s3c24xx/time.c
index b471a21ae2e4..64bfa19ae951 100644
--- a/arch/arm/plat-s3c24xx/time.c
+++ b/arch/arm/plat-s3c24xx/time.c
@@ -25,12 +25,12 @@
25#include <linux/irq.h> 25#include <linux/irq.h>
26#include <linux/err.h> 26#include <linux/err.h>
27#include <linux/clk.h> 27#include <linux/clk.h>
28#include <linux/io.h>
28 29
29#include <asm/system.h> 30#include <asm/system.h>
30#include <asm/leds.h> 31#include <asm/leds.h>
31#include <asm/mach-types.h> 32#include <asm/mach-types.h>
32 33
33#include <asm/io.h>
34#include <asm/irq.h> 34#include <asm/irq.h>
35#include <mach/map.h> 35#include <mach/map.h>
36#include <asm/plat-s3c/regs-timer.h> 36#include <asm/plat-s3c/regs-timer.h>
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index 56281c030a7b..43aa2020f85c 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -12,7 +12,7 @@
12# 12#
13# http://www.arm.linux.org.uk/developer/machines/?action=new 13# http://www.arm.linux.org.uk/developer/machines/?action=new
14# 14#
15# Last update: Wed Aug 13 21:56:02 2008 15# Last update: Thu Sep 25 10:10:50 2008
16# 16#
17# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number 17# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
18# 18#
@@ -1810,7 +1810,7 @@ kriss_sensor MACH_KRISS_SENSOR KRISS_SENSOR 1819
1810pilz_pmi5 MACH_PILZ_PMI5 PILZ_PMI5 1820 1810pilz_pmi5 MACH_PILZ_PMI5 PILZ_PMI5 1820
1811jade MACH_JADE JADE 1821 1811jade MACH_JADE JADE 1821
1812ks8695_softplc MACH_KS8695_SOFTPLC KS8695_SOFTPLC 1822 1812ks8695_softplc MACH_KS8695_SOFTPLC KS8695_SOFTPLC 1822
1813gprisc3 MACH_GPRISC4 GPRISC4 1823 1813gprisc3 MACH_GPRISC3 GPRISC3 1823
1814stamp9260 MACH_STAMP9260 STAMP9260 1824 1814stamp9260 MACH_STAMP9260 STAMP9260 1824
1815smdk6430 MACH_SMDK6430 SMDK6430 1825 1815smdk6430 MACH_SMDK6430 SMDK6430 1825
1816smdkc100 MACH_SMDKC100 SMDKC100 1826 1816smdkc100 MACH_SMDKC100 SMDKC100 1826
@@ -1859,5 +1859,43 @@ kbio9260 MACH_KBIO9260 KBIO9260 1868
1859ginza MACH_GINZA GINZA 1869 1859ginza MACH_GINZA GINZA 1869
1860a636n MACH_A636N A636N 1870 1860a636n MACH_A636N A636N 1870
1861imx27ipcam MACH_IMX27IPCAM IMX27IPCAM 1871 1861imx27ipcam MACH_IMX27IPCAM IMX27IPCAM 1871
1862nenoc MACH_NEMOC NEMOC 1872 1862nemoc MACH_NEMOC NEMOC 1872
1863geneva MACH_GENEVA GENEVA 1873 1863geneva MACH_GENEVA GENEVA 1873
1864htcpharos MACH_HTCPHAROS HTCPHAROS 1874
1865neonc MACH_NEONC NEONC 1875
1866nas7100 MACH_NAS7100 NAS7100 1876
1867teuphone MACH_TEUPHONE TEUPHONE 1877
1868annax_eth2 MACH_ANNAX_ETH2 ANNAX_ETH2 1878
1869csb733 MACH_CSB733 CSB733 1879
1870bk3 MACH_BK3 BK3 1880
1871omap_em32 MACH_OMAP_EM32 OMAP_EM32 1881
1872et9261cp MACH_ET9261CP ET9261CP 1882
1873jasperc MACH_JASPERC JASPERC 1883
1874issi_arm9 MACH_ISSI_ARM9 ISSI_ARM9 1884
1875ued MACH_UED UED 1885
1876esiblade MACH_ESIBLADE ESIBLADE 1886
1877eye02 MACH_EYE02 EYE02 1887
1878imx27kbd MACH_IMX27KBD IMX27KBD 1888
1879sst61vc010_fpga MACH_SST61VC010_FPGA SST61VC010_FPGA 1889
1880kixvp435 MACH_KIXVP435 KIXVP435 1890
1881kixnp435 MACH_KIXNP435 KIXNP435 1891
1882africa MACH_AFRICA AFRICA 1892
1883nh233 MACH_NH233 NH233 1893
1884rd88f6183ap_ge MACH_RD88F6183AP_GE RD88F6183AP_GE 1894
1885bcm4760 MACH_BCM4760 BCM4760 1895
1886eddy_v2 MACH_EDDY_V2 EDDY_V2 1896
1887realview_pba8 MACH_REALVIEW_PBA8 REALVIEW_PBA8 1897
1888hid_a7 MACH_HID_A7 HID_A7 1898
1889hero MACH_HERO HERO 1899
1890omap_poseidon MACH_OMAP_POSEIDON OMAP_POSEIDON 1900
1891realview_pbx MACH_REALVIEW_PBX REALVIEW_PBX 1901
1892micro9s MACH_MICRO9S MICRO9S 1902
1893mako MACH_MAKO MAKO 1903
1894xdaflame MACH_XDAFLAME XDAFLAME 1904
1895phidget_sbc2 MACH_PHIDGET_SBC2 PHIDGET_SBC2 1905
1896limestone MACH_LIMESTONE LIMESTONE 1906
1897iprobe_c32 MACH_IPROBE_C32 IPROBE_C32 1907
1898rut100 MACH_RUT100 RUT100 1908
1899asusp535 MACH_ASUSP535 ASUSP535 1909
1900htcraphael MACH_HTCRAPHAEL HTCRAPHAEL 1910
1901sygdg1 MACH_SYGDG1 SYGDG1 1911
diff --git a/arch/arm/vfp/entry.S b/arch/arm/vfp/entry.S
index 806ce26d5243..ba592a9e6fb3 100644
--- a/arch/arm/vfp/entry.S
+++ b/arch/arm/vfp/entry.S
@@ -21,13 +21,13 @@
21#include <asm/assembler.h> 21#include <asm/assembler.h>
22#include <asm/vfpmacros.h> 22#include <asm/vfpmacros.h>
23 23
24 .globl do_vfp 24ENTRY(do_vfp)
25do_vfp:
26 enable_irq 25 enable_irq
27 ldr r4, .LCvfp 26 ldr r4, .LCvfp
28 ldr r11, [r10, #TI_CPU] @ CPU number 27 ldr r11, [r10, #TI_CPU] @ CPU number
29 add r10, r10, #TI_VFPSTATE @ r10 = workspace 28 add r10, r10, #TI_VFPSTATE @ r10 = workspace
30 ldr pc, [r4] @ call VFP entry point 29 ldr pc, [r4] @ call VFP entry point
30ENDPROC(do_vfp)
31 31
32ENTRY(vfp_null_entry) 32ENTRY(vfp_null_entry)
33 mov pc, lr 33 mov pc, lr
@@ -40,11 +40,11 @@ ENDPROC(vfp_null_entry)
40@ failure to the VFP initialisation code. 40@ failure to the VFP initialisation code.
41 41
42 __INIT 42 __INIT
43 .globl vfp_testing_entry 43ENTRY(vfp_testing_entry)
44vfp_testing_entry:
45 ldr r0, VFP_arch_address 44 ldr r0, VFP_arch_address
46 str r5, [r0] @ known non-zero value 45 str r5, [r0] @ known non-zero value
47 mov pc, r9 @ we have handled the fault 46 mov pc, r9 @ we have handled the fault
47ENDPROC(vfp_testing_entry)
48 48
49VFP_arch_address: 49VFP_arch_address:
50 .word VFP_arch 50 .word VFP_arch
diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S
index 353f9e5c7919..a62dcf7098ba 100644
--- a/arch/arm/vfp/vfphw.S
+++ b/arch/arm/vfp/vfphw.S
@@ -68,8 +68,7 @@
68@ r11 = CPU number 68@ r11 = CPU number
69@ lr = failure return 69@ lr = failure return
70 70
71 .globl vfp_support_entry 71ENTRY(vfp_support_entry)
72vfp_support_entry:
73 DBGSTR3 "instr %08x pc %08x state %p", r0, r2, r10 72 DBGSTR3 "instr %08x pc %08x state %p", r0, r2, r10
74 73
75 VFPFMRX r1, FPEXC @ Is the VFP enabled? 74 VFPFMRX r1, FPEXC @ Is the VFP enabled?
@@ -165,11 +164,10 @@ process_exception:
165 @ code will raise an exception if 164 @ code will raise an exception if
166 @ required. If not, the user code will 165 @ required. If not, the user code will
167 @ retry the faulted instruction 166 @ retry the faulted instruction
167ENDPROC(vfp_support_entry)
168 168
169#ifdef CONFIG_SMP 169#ifdef CONFIG_SMP
170 .globl vfp_save_state 170ENTRY(vfp_save_state)
171 .type vfp_save_state, %function
172vfp_save_state:
173 @ Save the current VFP state 171 @ Save the current VFP state
174 @ r0 - save location 172 @ r0 - save location
175 @ r1 - FPEXC 173 @ r1 - FPEXC
@@ -182,13 +180,13 @@ vfp_save_state:
182 VFPFMRX r12, FPINST2, NE @ FPINST2 if needed (and present) 180 VFPFMRX r12, FPINST2, NE @ FPINST2 if needed (and present)
183 stmia r0, {r1, r2, r3, r12} @ save FPEXC, FPSCR, FPINST, FPINST2 181 stmia r0, {r1, r2, r3, r12} @ save FPEXC, FPSCR, FPINST, FPINST2
184 mov pc, lr 182 mov pc, lr
183ENDPROC(vfp_save_state)
185#endif 184#endif
186 185
187last_VFP_context_address: 186last_VFP_context_address:
188 .word last_VFP_context 187 .word last_VFP_context
189 188
190 .globl vfp_get_float 189ENTRY(vfp_get_float)
191vfp_get_float:
192 add pc, pc, r0, lsl #3 190 add pc, pc, r0, lsl #3
193 mov r0, r0 191 mov r0, r0
194 .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 192 .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
@@ -197,9 +195,9 @@ vfp_get_float:
197 mrc p10, 0, r0, c\dr, c0, 4 @ fmrs r0, s1 195 mrc p10, 0, r0, c\dr, c0, 4 @ fmrs r0, s1
198 mov pc, lr 196 mov pc, lr
199 .endr 197 .endr
198ENDPROC(vfp_get_float)
200 199
201 .globl vfp_put_float 200ENTRY(vfp_put_float)
202vfp_put_float:
203 add pc, pc, r1, lsl #3 201 add pc, pc, r1, lsl #3
204 mov r0, r0 202 mov r0, r0
205 .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 203 .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
@@ -208,9 +206,9 @@ vfp_put_float:
208 mcr p10, 0, r0, c\dr, c0, 4 @ fmsr r0, s1 206 mcr p10, 0, r0, c\dr, c0, 4 @ fmsr r0, s1
209 mov pc, lr 207 mov pc, lr
210 .endr 208 .endr
209ENDPROC(vfp_put_float)
211 210
212 .globl vfp_get_double 211ENTRY(vfp_get_double)
213vfp_get_double:
214 add pc, pc, r0, lsl #3 212 add pc, pc, r0, lsl #3
215 mov r0, r0 213 mov r0, r0
216 .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 214 .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
@@ -229,9 +227,9 @@ vfp_get_double:
229 mov r0, #0 227 mov r0, #0
230 mov r1, #0 228 mov r1, #0
231 mov pc, lr 229 mov pc, lr
230ENDPROC(vfp_get_double)
232 231
233 .globl vfp_put_double 232ENTRY(vfp_put_double)
234vfp_put_double:
235 add pc, pc, r2, lsl #3 233 add pc, pc, r2, lsl #3
236 mov r0, r0 234 mov r0, r0
237 .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 235 .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
@@ -245,3 +243,4 @@ vfp_put_double:
245 mov pc, lr 243 mov pc, lr
246 .endr 244 .endr
247#endif 245#endif
246ENDPROC(vfp_put_double)