diff options
author | Masato Noguchi <Masato.Noguchi@jp.sony.com> | 2007-07-20 15:39:36 -0400 |
---|---|---|
committer | Arnd Bergmann <arnd@klappe.arndb.de> | 2007-07-20 15:41:54 -0400 |
commit | cfd529b25d9b1d48423b85d76066348e2459e646 (patch) | |
tree | ac5107616212af4f6c5bb5e3bcb75d71de9889a7 /arch | |
parent | daced0f718b92b0bcdb9790622c255d4660f51ce (diff) |
[CELL] spufs: remove needless context save/restore code
The following steps are not needed in the SPE context save/restore
paths:
Save Step 12: save_mfc_decr()
save suspend_time to CSA (It will be done by step 14)
save ch 7 (decrementer value will be saved in LSCSA by spe-side step 10)
Restore Step 59: restore_ch_part1()
restore ch 1 (it will be done by spe-side step 15)
This change removes the unnecessary steps.
Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com>
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/powerpc/platforms/cell/spufs/switch.c | 12 |
1 files changed, 1 insertions, 11 deletions
diff --git a/arch/powerpc/platforms/cell/spufs/switch.c b/arch/powerpc/platforms/cell/spufs/switch.c index 861336e99448..a08fe93817f6 100644 --- a/arch/powerpc/platforms/cell/spufs/switch.c +++ b/arch/powerpc/platforms/cell/spufs/switch.c | |||
@@ -253,11 +253,6 @@ static inline void save_mfc_decr(struct spu_state *csa, struct spu *spu) | |||
253 | */ | 253 | */ |
254 | if (in_be64(&priv2->mfc_control_RW) & MFC_CNTL_DECREMENTER_RUNNING) { | 254 | if (in_be64(&priv2->mfc_control_RW) & MFC_CNTL_DECREMENTER_RUNNING) { |
255 | csa->priv2.mfc_control_RW |= MFC_CNTL_DECREMENTER_RUNNING; | 255 | csa->priv2.mfc_control_RW |= MFC_CNTL_DECREMENTER_RUNNING; |
256 | csa->suspend_time = get_cycles(); | ||
257 | out_be64(&priv2->spu_chnlcntptr_RW, 7ULL); | ||
258 | eieio(); | ||
259 | csa->spu_chnldata_RW[7] = in_be64(&priv2->spu_chnldata_RW); | ||
260 | eieio(); | ||
261 | } else { | 256 | } else { |
262 | csa->priv2.mfc_control_RW &= ~MFC_CNTL_DECREMENTER_RUNNING; | 257 | csa->priv2.mfc_control_RW &= ~MFC_CNTL_DECREMENTER_RUNNING; |
263 | } | 258 | } |
@@ -1567,13 +1562,8 @@ static inline void restore_ch_part1(struct spu_state *csa, struct spu *spu) | |||
1567 | int i; | 1562 | int i; |
1568 | 1563 | ||
1569 | /* Restore, Step 59: | 1564 | /* Restore, Step 59: |
1565 | * Restore the following CH: [0,3,4,24,25,27] | ||
1570 | */ | 1566 | */ |
1571 | |||
1572 | /* Restore CH 1 without count */ | ||
1573 | out_be64(&priv2->spu_chnlcntptr_RW, 1); | ||
1574 | out_be64(&priv2->spu_chnldata_RW, csa->spu_chnldata_RW[1]); | ||
1575 | |||
1576 | /* Restore the following CH: [0,3,4,24,25,27] */ | ||
1577 | for (i = 0; i < ARRAY_SIZE(ch_indices); i++) { | 1567 | for (i = 0; i < ARRAY_SIZE(ch_indices); i++) { |
1578 | idx = ch_indices[i]; | 1568 | idx = ch_indices[i]; |
1579 | out_be64(&priv2->spu_chnlcntptr_RW, idx); | 1569 | out_be64(&priv2->spu_chnlcntptr_RW, idx); |