MIPS: If KVM is enabled then use the KVM specific routine to flush the TLBs on a ASID wrap.

Signed-off-by: Sanjay Lal <sanjayl@kymasys.com>
Cc: kvm@vger.kernel.org
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

1 files changed, 6 insertions, 0 deletions

diff --git a/arch/mips/include/asm/mmu_context.h b/arch/mips/include/asm/mmu_context.h
index e81d719efcd1..c42562d801c5 100644
--- a/arch/mips/include/asm/mmu_context.h
+++ b/arch/mips/include/asm/mmu_context.h
@@ -106,15 +106,21 @@ static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
 static inline void
 get_new_mmu_context(struct mm_struct *mm, unsigned long cpu)
 {
+        extern void kvm_local_flush_tlb_all(void);
         unsigned long asid = asid_cache(cpu);
 
         if (! ((asid += ASID_INC) & ASID_MASK) ) {
                 if (cpu_has_vtag_icache)
                         flush_icache_all();
+#ifdef CONFIG_VIRTUALIZATION
+                kvm_local_flush_tlb_all();      /* start new asid cycle */
+#else
                 local_flush_tlb_all();  /* start new asid cycle */
+#endif
                 if (!asid)              /* fix version if needed */
                         asid = ASID_FIRST_VERSION;
         }
+
         cpu_context(cpu, mm) = asid_cache(cpu) = asid;
 }