diff options
| author | David Daney <ddaney@caviumnetworks.com> | 2010-07-22 14:59:27 -0400 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2010-07-26 14:08:18 -0400 |
| commit | f2a68272d799bf4092443357142f63b74f7669a1 (patch) | |
| tree | 48be33969b0dde9d5928b7ceb5fa375b30bf57ac /arch | |
| parent | 31c984a5acabea5d8c7224dc226453022be46f33 (diff) | |
MIPS: Quit using undefined behavior of ADDU in 64-bit atomic operations.
For 64-bit, we must use DADDU and DSUBU.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1483/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/mips/include/asm/atomic.h | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/arch/mips/include/asm/atomic.h b/arch/mips/include/asm/atomic.h index 59dc0c7ef733..c63c56bfd184 100644 --- a/arch/mips/include/asm/atomic.h +++ b/arch/mips/include/asm/atomic.h | |||
| @@ -434,7 +434,7 @@ static __inline__ void atomic64_add(long i, atomic64_t * v) | |||
| 434 | __asm__ __volatile__( | 434 | __asm__ __volatile__( |
| 435 | " .set mips3 \n" | 435 | " .set mips3 \n" |
| 436 | "1: lld %0, %1 # atomic64_add \n" | 436 | "1: lld %0, %1 # atomic64_add \n" |
| 437 | " addu %0, %2 \n" | 437 | " daddu %0, %2 \n" |
| 438 | " scd %0, %1 \n" | 438 | " scd %0, %1 \n" |
| 439 | " beqzl %0, 1b \n" | 439 | " beqzl %0, 1b \n" |
| 440 | " .set mips0 \n" | 440 | " .set mips0 \n" |
| @@ -446,7 +446,7 @@ static __inline__ void atomic64_add(long i, atomic64_t * v) | |||
| 446 | __asm__ __volatile__( | 446 | __asm__ __volatile__( |
| 447 | " .set mips3 \n" | 447 | " .set mips3 \n" |
| 448 | "1: lld %0, %1 # atomic64_add \n" | 448 | "1: lld %0, %1 # atomic64_add \n" |
| 449 | " addu %0, %2 \n" | 449 | " daddu %0, %2 \n" |
| 450 | " scd %0, %1 \n" | 450 | " scd %0, %1 \n" |
| 451 | " beqz %0, 2f \n" | 451 | " beqz %0, 2f \n" |
| 452 | " .subsection 2 \n" | 452 | " .subsection 2 \n" |
| @@ -479,7 +479,7 @@ static __inline__ void atomic64_sub(long i, atomic64_t * v) | |||
| 479 | __asm__ __volatile__( | 479 | __asm__ __volatile__( |
| 480 | " .set mips3 \n" | 480 | " .set mips3 \n" |
| 481 | "1: lld %0, %1 # atomic64_sub \n" | 481 | "1: lld %0, %1 # atomic64_sub \n" |
| 482 | " subu %0, %2 \n" | 482 | " dsubu %0, %2 \n" |
| 483 | " scd %0, %1 \n" | 483 | " scd %0, %1 \n" |
| 484 | " beqzl %0, 1b \n" | 484 | " beqzl %0, 1b \n" |
| 485 | " .set mips0 \n" | 485 | " .set mips0 \n" |
| @@ -491,7 +491,7 @@ static __inline__ void atomic64_sub(long i, atomic64_t * v) | |||
| 491 | __asm__ __volatile__( | 491 | __asm__ __volatile__( |
| 492 | " .set mips3 \n" | 492 | " .set mips3 \n" |
| 493 | "1: lld %0, %1 # atomic64_sub \n" | 493 | "1: lld %0, %1 # atomic64_sub \n" |
| 494 | " subu %0, %2 \n" | 494 | " dsubu %0, %2 \n" |
| 495 | " scd %0, %1 \n" | 495 | " scd %0, %1 \n" |
| 496 | " beqz %0, 2f \n" | 496 | " beqz %0, 2f \n" |
| 497 | " .subsection 2 \n" | 497 | " .subsection 2 \n" |
| @@ -524,10 +524,10 @@ static __inline__ long atomic64_add_return(long i, atomic64_t * v) | |||
| 524 | __asm__ __volatile__( | 524 | __asm__ __volatile__( |
| 525 | " .set mips3 \n" | 525 | " .set mips3 \n" |
| 526 | "1: lld %1, %2 # atomic64_add_return \n" | 526 | "1: lld %1, %2 # atomic64_add_return \n" |
| 527 | " addu %0, %1, %3 \n" | 527 | " daddu %0, %1, %3 \n" |
| 528 | " scd %0, %2 \n" | 528 | " scd %0, %2 \n" |
| 529 | " beqzl %0, 1b \n" | 529 | " beqzl %0, 1b \n" |
| 530 | " addu %0, %1, %3 \n" | 530 | " daddu %0, %1, %3 \n" |
| 531 | " .set mips0 \n" | 531 | " .set mips0 \n" |
| 532 | : "=&r" (result), "=&r" (temp), "=m" (v->counter) | 532 | : "=&r" (result), "=&r" (temp), "=m" (v->counter) |
| 533 | : "Ir" (i), "m" (v->counter) | 533 | : "Ir" (i), "m" (v->counter) |
| @@ -538,10 +538,10 @@ static __inline__ long atomic64_add_return(long i, atomic64_t * v) | |||
| 538 | __asm__ __volatile__( | 538 | __asm__ __volatile__( |
| 539 | " .set mips3 \n" | 539 | " .set mips3 \n" |
| 540 | "1: lld %1, %2 # atomic64_add_return \n" | 540 | "1: lld %1, %2 # atomic64_add_return \n" |
| 541 | " addu %0, %1, %3 \n" | 541 | " daddu %0, %1, %3 \n" |
| 542 | " scd %0, %2 \n" | 542 | " scd %0, %2 \n" |
| 543 | " beqz %0, 2f \n" | 543 | " beqz %0, 2f \n" |
| 544 | " addu %0, %1, %3 \n" | 544 | " daddu %0, %1, %3 \n" |
| 545 | " .subsection 2 \n" | 545 | " .subsection 2 \n" |
| 546 | "2: b 1b \n" | 546 | "2: b 1b \n" |
| 547 | " .previous \n" | 547 | " .previous \n" |
| @@ -576,10 +576,10 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v) | |||
| 576 | __asm__ __volatile__( | 576 | __asm__ __volatile__( |
| 577 | " .set mips3 \n" | 577 | " .set mips3 \n" |
| 578 | "1: lld %1, %2 # atomic64_sub_return \n" | 578 | "1: lld %1, %2 # atomic64_sub_return \n" |
| 579 | " subu %0, %1, %3 \n" | 579 | " dsubu %0, %1, %3 \n" |
| 580 | " scd %0, %2 \n" | 580 | " scd %0, %2 \n" |
| 581 | " beqzl %0, 1b \n" | 581 | " beqzl %0, 1b \n" |
| 582 | " subu %0, %1, %3 \n" | 582 | " dsubu %0, %1, %3 \n" |
| 583 | " .set mips0 \n" | 583 | " .set mips0 \n" |
| 584 | : "=&r" (result), "=&r" (temp), "=m" (v->counter) | 584 | : "=&r" (result), "=&r" (temp), "=m" (v->counter) |
| 585 | : "Ir" (i), "m" (v->counter) | 585 | : "Ir" (i), "m" (v->counter) |
| @@ -590,10 +590,10 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v) | |||
| 590 | __asm__ __volatile__( | 590 | __asm__ __volatile__( |
| 591 | " .set mips3 \n" | 591 | " .set mips3 \n" |
| 592 | "1: lld %1, %2 # atomic64_sub_return \n" | 592 | "1: lld %1, %2 # atomic64_sub_return \n" |
| 593 | " subu %0, %1, %3 \n" | 593 | " dsubu %0, %1, %3 \n" |
| 594 | " scd %0, %2 \n" | 594 | " scd %0, %2 \n" |
| 595 | " beqz %0, 2f \n" | 595 | " beqz %0, 2f \n" |
| 596 | " subu %0, %1, %3 \n" | 596 | " dsubu %0, %1, %3 \n" |
| 597 | " .subsection 2 \n" | 597 | " .subsection 2 \n" |
| 598 | "2: b 1b \n" | 598 | "2: b 1b \n" |
| 599 | " .previous \n" | 599 | " .previous \n" |