diff options
author | Yinghai Lu <yinghai@kernel.org> | 2009-04-27 20:59:21 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2009-04-28 06:21:16 -0400 |
commit | d5dedd4507d307eb3f35f21b6e16f336fdc0d82a (patch) | |
tree | 2c31b00395bde49ec4c5a415b081daaec44d3dab /arch | |
parent | fcef5911c7ea89b80d5bfc727f402f37c9eefd57 (diff) |
irq: change ->set_affinity() to return status
according to Ingo, change set_affinity() in irq_chip should return int,
because that way we can handle failure cases in a much cleaner way, in
the genirq layer.
v2: fix two typos
[ Impact: extend API ]
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: "Eric W. Biederman" <ebiederm@xmission.com>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: linux-arch@vger.kernel.org
LKML-Reference: <49F654E9.4070809@kernel.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/alpha/kernel/sys_dp264.c | 8 | ||||
-rw-r--r-- | arch/alpha/kernel/sys_titan.c | 4 | ||||
-rw-r--r-- | arch/arm/common/gic.c | 4 | ||||
-rw-r--r-- | arch/cris/arch-v32/kernel/irq.c | 4 | ||||
-rw-r--r-- | arch/ia64/hp/sim/hpsim_irq.c | 3 | ||||
-rw-r--r-- | arch/ia64/kernel/iosapic.c | 10 | ||||
-rw-r--r-- | arch/ia64/kernel/msi_ia64.c | 16 | ||||
-rw-r--r-- | arch/ia64/sn/kernel/irq.c | 4 | ||||
-rw-r--r-- | arch/ia64/sn/kernel/msi_sn.c | 8 | ||||
-rw-r--r-- | arch/mips/cavium-octeon/octeon-irq.c | 8 | ||||
-rw-r--r-- | arch/mips/include/asm/irq.h | 2 | ||||
-rw-r--r-- | arch/mips/kernel/irq-gic.c | 5 | ||||
-rw-r--r-- | arch/mips/mti-malta/malta-smtc.c | 4 | ||||
-rw-r--r-- | arch/mips/sibyte/bcm1480/irq.c | 8 | ||||
-rw-r--r-- | arch/mips/sibyte/sb1250/irq.c | 8 | ||||
-rw-r--r-- | arch/parisc/kernel/irq.c | 6 | ||||
-rw-r--r-- | arch/powerpc/platforms/pseries/xics.c | 12 | ||||
-rw-r--r-- | arch/powerpc/sysdev/mpic.c | 4 | ||||
-rw-r--r-- | arch/sparc/kernel/irq_64.c | 12 | ||||
-rw-r--r-- | arch/x86/kernel/apic/io_apic.c | 64 |
20 files changed, 128 insertions, 66 deletions
diff --git a/arch/alpha/kernel/sys_dp264.c b/arch/alpha/kernel/sys_dp264.c index 9c9d1fd4155f..5bd5259324b7 100644 --- a/arch/alpha/kernel/sys_dp264.c +++ b/arch/alpha/kernel/sys_dp264.c | |||
@@ -176,22 +176,26 @@ cpu_set_irq_affinity(unsigned int irq, cpumask_t affinity) | |||
176 | } | 176 | } |
177 | } | 177 | } |
178 | 178 | ||
179 | static void | 179 | static int |
180 | dp264_set_affinity(unsigned int irq, const struct cpumask *affinity) | 180 | dp264_set_affinity(unsigned int irq, const struct cpumask *affinity) |
181 | { | 181 | { |
182 | spin_lock(&dp264_irq_lock); | 182 | spin_lock(&dp264_irq_lock); |
183 | cpu_set_irq_affinity(irq, *affinity); | 183 | cpu_set_irq_affinity(irq, *affinity); |
184 | tsunami_update_irq_hw(cached_irq_mask); | 184 | tsunami_update_irq_hw(cached_irq_mask); |
185 | spin_unlock(&dp264_irq_lock); | 185 | spin_unlock(&dp264_irq_lock); |
186 | |||
187 | return 0; | ||
186 | } | 188 | } |
187 | 189 | ||
188 | static void | 190 | static int |
189 | clipper_set_affinity(unsigned int irq, const struct cpumask *affinity) | 191 | clipper_set_affinity(unsigned int irq, const struct cpumask *affinity) |
190 | { | 192 | { |
191 | spin_lock(&dp264_irq_lock); | 193 | spin_lock(&dp264_irq_lock); |
192 | cpu_set_irq_affinity(irq - 16, *affinity); | 194 | cpu_set_irq_affinity(irq - 16, *affinity); |
193 | tsunami_update_irq_hw(cached_irq_mask); | 195 | tsunami_update_irq_hw(cached_irq_mask); |
194 | spin_unlock(&dp264_irq_lock); | 196 | spin_unlock(&dp264_irq_lock); |
197 | |||
198 | return 0; | ||
195 | } | 199 | } |
196 | 200 | ||
197 | static struct hw_interrupt_type dp264_irq_type = { | 201 | static struct hw_interrupt_type dp264_irq_type = { |
diff --git a/arch/alpha/kernel/sys_titan.c b/arch/alpha/kernel/sys_titan.c index 27f840a4ad3d..8dd239ebdb9e 100644 --- a/arch/alpha/kernel/sys_titan.c +++ b/arch/alpha/kernel/sys_titan.c | |||
@@ -157,13 +157,15 @@ titan_cpu_set_irq_affinity(unsigned int irq, cpumask_t affinity) | |||
157 | 157 | ||
158 | } | 158 | } |
159 | 159 | ||
160 | static void | 160 | static int |
161 | titan_set_irq_affinity(unsigned int irq, const struct cpumask *affinity) | 161 | titan_set_irq_affinity(unsigned int irq, const struct cpumask *affinity) |
162 | { | 162 | { |
163 | spin_lock(&titan_irq_lock); | 163 | spin_lock(&titan_irq_lock); |
164 | titan_cpu_set_irq_affinity(irq - 16, *affinity); | 164 | titan_cpu_set_irq_affinity(irq - 16, *affinity); |
165 | titan_update_irq_hw(titan_cached_irq_mask); | 165 | titan_update_irq_hw(titan_cached_irq_mask); |
166 | spin_unlock(&titan_irq_lock); | 166 | spin_unlock(&titan_irq_lock); |
167 | |||
168 | return 0; | ||
167 | } | 169 | } |
168 | 170 | ||
169 | static void | 171 | static void |
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index c6884ba1d5ed..90f6b7f52d48 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c | |||
@@ -109,7 +109,7 @@ static void gic_unmask_irq(unsigned int irq) | |||
109 | } | 109 | } |
110 | 110 | ||
111 | #ifdef CONFIG_SMP | 111 | #ifdef CONFIG_SMP |
112 | static void gic_set_cpu(unsigned int irq, const struct cpumask *mask_val) | 112 | static int gic_set_cpu(unsigned int irq, const struct cpumask *mask_val) |
113 | { | 113 | { |
114 | void __iomem *reg = gic_dist_base(irq) + GIC_DIST_TARGET + (gic_irq(irq) & ~3); | 114 | void __iomem *reg = gic_dist_base(irq) + GIC_DIST_TARGET + (gic_irq(irq) & ~3); |
115 | unsigned int shift = (irq % 4) * 8; | 115 | unsigned int shift = (irq % 4) * 8; |
@@ -122,6 +122,8 @@ static void gic_set_cpu(unsigned int irq, const struct cpumask *mask_val) | |||
122 | val |= 1 << (cpu + shift); | 122 | val |= 1 << (cpu + shift); |
123 | writel(val, reg); | 123 | writel(val, reg); |
124 | spin_unlock(&irq_controller_lock); | 124 | spin_unlock(&irq_controller_lock); |
125 | |||
126 | return 0; | ||
125 | } | 127 | } |
126 | #endif | 128 | #endif |
127 | 129 | ||
diff --git a/arch/cris/arch-v32/kernel/irq.c b/arch/cris/arch-v32/kernel/irq.c index df3925cb1c7f..d70b445f4a8f 100644 --- a/arch/cris/arch-v32/kernel/irq.c +++ b/arch/cris/arch-v32/kernel/irq.c | |||
@@ -325,12 +325,14 @@ static void end_crisv32_irq(unsigned int irq) | |||
325 | { | 325 | { |
326 | } | 326 | } |
327 | 327 | ||
328 | void set_affinity_crisv32_irq(unsigned int irq, const struct cpumask *dest) | 328 | int set_affinity_crisv32_irq(unsigned int irq, const struct cpumask *dest) |
329 | { | 329 | { |
330 | unsigned long flags; | 330 | unsigned long flags; |
331 | spin_lock_irqsave(&irq_lock, flags); | 331 | spin_lock_irqsave(&irq_lock, flags); |
332 | irq_allocations[irq - FIRST_IRQ].mask = *dest; | 332 | irq_allocations[irq - FIRST_IRQ].mask = *dest; |
333 | spin_unlock_irqrestore(&irq_lock, flags); | 333 | spin_unlock_irqrestore(&irq_lock, flags); |
334 | |||
335 | return 0; | ||
334 | } | 336 | } |
335 | 337 | ||
336 | static struct irq_chip crisv32_irq_type = { | 338 | static struct irq_chip crisv32_irq_type = { |
diff --git a/arch/ia64/hp/sim/hpsim_irq.c b/arch/ia64/hp/sim/hpsim_irq.c index cc0a3182db3c..acb5047ab573 100644 --- a/arch/ia64/hp/sim/hpsim_irq.c +++ b/arch/ia64/hp/sim/hpsim_irq.c | |||
@@ -21,9 +21,10 @@ hpsim_irq_noop (unsigned int irq) | |||
21 | { | 21 | { |
22 | } | 22 | } |
23 | 23 | ||
24 | static void | 24 | static int |
25 | hpsim_set_affinity_noop(unsigned int a, const struct cpumask *b) | 25 | hpsim_set_affinity_noop(unsigned int a, const struct cpumask *b) |
26 | { | 26 | { |
27 | return 0; | ||
27 | } | 28 | } |
28 | 29 | ||
29 | static struct hw_interrupt_type irq_type_hp_sim = { | 30 | static struct hw_interrupt_type irq_type_hp_sim = { |
diff --git a/arch/ia64/kernel/iosapic.c b/arch/ia64/kernel/iosapic.c index 166e0d839fa0..f92cef47bf86 100644 --- a/arch/ia64/kernel/iosapic.c +++ b/arch/ia64/kernel/iosapic.c | |||
@@ -329,7 +329,7 @@ unmask_irq (unsigned int irq) | |||
329 | } | 329 | } |
330 | 330 | ||
331 | 331 | ||
332 | static void | 332 | static int |
333 | iosapic_set_affinity(unsigned int irq, const struct cpumask *mask) | 333 | iosapic_set_affinity(unsigned int irq, const struct cpumask *mask) |
334 | { | 334 | { |
335 | #ifdef CONFIG_SMP | 335 | #ifdef CONFIG_SMP |
@@ -343,15 +343,15 @@ iosapic_set_affinity(unsigned int irq, const struct cpumask *mask) | |||
343 | 343 | ||
344 | cpu = cpumask_first_and(cpu_online_mask, mask); | 344 | cpu = cpumask_first_and(cpu_online_mask, mask); |
345 | if (cpu >= nr_cpu_ids) | 345 | if (cpu >= nr_cpu_ids) |
346 | return; | 346 | return -1; |
347 | 347 | ||
348 | if (irq_prepare_move(irq, cpu)) | 348 | if (irq_prepare_move(irq, cpu)) |
349 | return; | 349 | return -1; |
350 | 350 | ||
351 | dest = cpu_physical_id(cpu); | 351 | dest = cpu_physical_id(cpu); |
352 | 352 | ||
353 | if (!iosapic_intr_info[irq].count) | 353 | if (!iosapic_intr_info[irq].count) |
354 | return; /* not an IOSAPIC interrupt */ | 354 | return -1; /* not an IOSAPIC interrupt */ |
355 | 355 | ||
356 | set_irq_affinity_info(irq, dest, redir); | 356 | set_irq_affinity_info(irq, dest, redir); |
357 | 357 | ||
@@ -376,7 +376,9 @@ iosapic_set_affinity(unsigned int irq, const struct cpumask *mask) | |||
376 | iosapic_write(iosapic, IOSAPIC_RTE_HIGH(rte_index), high32); | 376 | iosapic_write(iosapic, IOSAPIC_RTE_HIGH(rte_index), high32); |
377 | iosapic_write(iosapic, IOSAPIC_RTE_LOW(rte_index), low32); | 377 | iosapic_write(iosapic, IOSAPIC_RTE_LOW(rte_index), low32); |
378 | } | 378 | } |
379 | |||
379 | #endif | 380 | #endif |
381 | return 0; | ||
380 | } | 382 | } |
381 | 383 | ||
382 | /* | 384 | /* |
diff --git a/arch/ia64/kernel/msi_ia64.c b/arch/ia64/kernel/msi_ia64.c index 2b15e233f7fe..0f8ade9331ba 100644 --- a/arch/ia64/kernel/msi_ia64.c +++ b/arch/ia64/kernel/msi_ia64.c | |||
@@ -12,7 +12,7 @@ | |||
12 | static struct irq_chip ia64_msi_chip; | 12 | static struct irq_chip ia64_msi_chip; |
13 | 13 | ||
14 | #ifdef CONFIG_SMP | 14 | #ifdef CONFIG_SMP |
15 | static void ia64_set_msi_irq_affinity(unsigned int irq, | 15 | static int ia64_set_msi_irq_affinity(unsigned int irq, |
16 | const cpumask_t *cpu_mask) | 16 | const cpumask_t *cpu_mask) |
17 | { | 17 | { |
18 | struct msi_msg msg; | 18 | struct msi_msg msg; |
@@ -20,10 +20,10 @@ static void ia64_set_msi_irq_affinity(unsigned int irq, | |||
20 | int cpu = first_cpu(*cpu_mask); | 20 | int cpu = first_cpu(*cpu_mask); |
21 | 21 | ||
22 | if (!cpu_online(cpu)) | 22 | if (!cpu_online(cpu)) |
23 | return; | 23 | return -1; |
24 | 24 | ||
25 | if (irq_prepare_move(irq, cpu)) | 25 | if (irq_prepare_move(irq, cpu)) |
26 | return; | 26 | return -1; |
27 | 27 | ||
28 | read_msi_msg(irq, &msg); | 28 | read_msi_msg(irq, &msg); |
29 | 29 | ||
@@ -39,6 +39,8 @@ static void ia64_set_msi_irq_affinity(unsigned int irq, | |||
39 | 39 | ||
40 | write_msi_msg(irq, &msg); | 40 | write_msi_msg(irq, &msg); |
41 | cpumask_copy(irq_desc[irq].affinity, cpumask_of(cpu)); | 41 | cpumask_copy(irq_desc[irq].affinity, cpumask_of(cpu)); |
42 | |||
43 | return 0; | ||
42 | } | 44 | } |
43 | #endif /* CONFIG_SMP */ | 45 | #endif /* CONFIG_SMP */ |
44 | 46 | ||
@@ -130,17 +132,17 @@ void arch_teardown_msi_irq(unsigned int irq) | |||
130 | 132 | ||
131 | #ifdef CONFIG_DMAR | 133 | #ifdef CONFIG_DMAR |
132 | #ifdef CONFIG_SMP | 134 | #ifdef CONFIG_SMP |
133 | static void dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask) | 135 | static int dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask) |
134 | { | 136 | { |
135 | struct irq_cfg *cfg = irq_cfg + irq; | 137 | struct irq_cfg *cfg = irq_cfg + irq; |
136 | struct msi_msg msg; | 138 | struct msi_msg msg; |
137 | int cpu = cpumask_first(mask); | 139 | int cpu = cpumask_first(mask); |
138 | 140 | ||
139 | if (!cpu_online(cpu)) | 141 | if (!cpu_online(cpu)) |
140 | return; | 142 | return -1; |
141 | 143 | ||
142 | if (irq_prepare_move(irq, cpu)) | 144 | if (irq_prepare_move(irq, cpu)) |
143 | return; | 145 | return -1; |
144 | 146 | ||
145 | dmar_msi_read(irq, &msg); | 147 | dmar_msi_read(irq, &msg); |
146 | 148 | ||
@@ -151,6 +153,8 @@ static void dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask) | |||
151 | 153 | ||
152 | dmar_msi_write(irq, &msg); | 154 | dmar_msi_write(irq, &msg); |
153 | cpumask_copy(irq_desc[irq].affinity, mask); | 155 | cpumask_copy(irq_desc[irq].affinity, mask); |
156 | |||
157 | return 0; | ||
154 | } | 158 | } |
155 | #endif /* CONFIG_SMP */ | 159 | #endif /* CONFIG_SMP */ |
156 | 160 | ||
diff --git a/arch/ia64/sn/kernel/irq.c b/arch/ia64/sn/kernel/irq.c index 66fd705e82c0..764f26abac05 100644 --- a/arch/ia64/sn/kernel/irq.c +++ b/arch/ia64/sn/kernel/irq.c | |||
@@ -227,7 +227,7 @@ finish_up: | |||
227 | return new_irq_info; | 227 | return new_irq_info; |
228 | } | 228 | } |
229 | 229 | ||
230 | static void sn_set_affinity_irq(unsigned int irq, const struct cpumask *mask) | 230 | static int sn_set_affinity_irq(unsigned int irq, const struct cpumask *mask) |
231 | { | 231 | { |
232 | struct sn_irq_info *sn_irq_info, *sn_irq_info_safe; | 232 | struct sn_irq_info *sn_irq_info, *sn_irq_info_safe; |
233 | nasid_t nasid; | 233 | nasid_t nasid; |
@@ -239,6 +239,8 @@ static void sn_set_affinity_irq(unsigned int irq, const struct cpumask *mask) | |||
239 | list_for_each_entry_safe(sn_irq_info, sn_irq_info_safe, | 239 | list_for_each_entry_safe(sn_irq_info, sn_irq_info_safe, |
240 | sn_irq_lh[irq], list) | 240 | sn_irq_lh[irq], list) |
241 | (void)sn_retarget_vector(sn_irq_info, nasid, slice); | 241 | (void)sn_retarget_vector(sn_irq_info, nasid, slice); |
242 | |||
243 | return 0; | ||
242 | } | 244 | } |
243 | 245 | ||
244 | #ifdef CONFIG_SMP | 246 | #ifdef CONFIG_SMP |
diff --git a/arch/ia64/sn/kernel/msi_sn.c b/arch/ia64/sn/kernel/msi_sn.c index 81e428943d73..fbbfb9701201 100644 --- a/arch/ia64/sn/kernel/msi_sn.c +++ b/arch/ia64/sn/kernel/msi_sn.c | |||
@@ -151,7 +151,7 @@ int sn_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *entry) | |||
151 | } | 151 | } |
152 | 152 | ||
153 | #ifdef CONFIG_SMP | 153 | #ifdef CONFIG_SMP |
154 | static void sn_set_msi_irq_affinity(unsigned int irq, | 154 | static int sn_set_msi_irq_affinity(unsigned int irq, |
155 | const struct cpumask *cpu_mask) | 155 | const struct cpumask *cpu_mask) |
156 | { | 156 | { |
157 | struct msi_msg msg; | 157 | struct msi_msg msg; |
@@ -168,7 +168,7 @@ static void sn_set_msi_irq_affinity(unsigned int irq, | |||
168 | cpu = cpumask_first(cpu_mask); | 168 | cpu = cpumask_first(cpu_mask); |
169 | sn_irq_info = sn_msi_info[irq].sn_irq_info; | 169 | sn_irq_info = sn_msi_info[irq].sn_irq_info; |
170 | if (sn_irq_info == NULL || sn_irq_info->irq_int_bit >= 0) | 170 | if (sn_irq_info == NULL || sn_irq_info->irq_int_bit >= 0) |
171 | return; | 171 | return -1; |
172 | 172 | ||
173 | /* | 173 | /* |
174 | * Release XIO resources for the old MSI PCI address | 174 | * Release XIO resources for the old MSI PCI address |
@@ -189,7 +189,7 @@ static void sn_set_msi_irq_affinity(unsigned int irq, | |||
189 | new_irq_info = sn_retarget_vector(sn_irq_info, nasid, slice); | 189 | new_irq_info = sn_retarget_vector(sn_irq_info, nasid, slice); |
190 | sn_msi_info[irq].sn_irq_info = new_irq_info; | 190 | sn_msi_info[irq].sn_irq_info = new_irq_info; |
191 | if (new_irq_info == NULL) | 191 | if (new_irq_info == NULL) |
192 | return; | 192 | return -1; |
193 | 193 | ||
194 | /* | 194 | /* |
195 | * Map the xio address into bus space | 195 | * Map the xio address into bus space |
@@ -206,6 +206,8 @@ static void sn_set_msi_irq_affinity(unsigned int irq, | |||
206 | 206 | ||
207 | write_msi_msg(irq, &msg); | 207 | write_msi_msg(irq, &msg); |
208 | cpumask_copy(irq_desc[irq].affinity, cpu_mask); | 208 | cpumask_copy(irq_desc[irq].affinity, cpu_mask); |
209 | |||
210 | return 0; | ||
209 | } | 211 | } |
210 | #endif /* CONFIG_SMP */ | 212 | #endif /* CONFIG_SMP */ |
211 | 213 | ||
diff --git a/arch/mips/cavium-octeon/octeon-irq.c b/arch/mips/cavium-octeon/octeon-irq.c index 1c19af8daa62..d3a0c8154bec 100644 --- a/arch/mips/cavium-octeon/octeon-irq.c +++ b/arch/mips/cavium-octeon/octeon-irq.c | |||
@@ -177,7 +177,7 @@ static void octeon_irq_ciu0_disable(unsigned int irq) | |||
177 | } | 177 | } |
178 | 178 | ||
179 | #ifdef CONFIG_SMP | 179 | #ifdef CONFIG_SMP |
180 | static void octeon_irq_ciu0_set_affinity(unsigned int irq, const struct cpumask *dest) | 180 | static int octeon_irq_ciu0_set_affinity(unsigned int irq, const struct cpumask *dest) |
181 | { | 181 | { |
182 | int cpu; | 182 | int cpu; |
183 | int bit = irq - OCTEON_IRQ_WORKQ0; /* Bit 0-63 of EN0 */ | 183 | int bit = irq - OCTEON_IRQ_WORKQ0; /* Bit 0-63 of EN0 */ |
@@ -199,6 +199,8 @@ static void octeon_irq_ciu0_set_affinity(unsigned int irq, const struct cpumask | |||
199 | */ | 199 | */ |
200 | cvmx_read_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num() * 2)); | 200 | cvmx_read_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num() * 2)); |
201 | write_unlock(&octeon_irq_ciu0_rwlock); | 201 | write_unlock(&octeon_irq_ciu0_rwlock); |
202 | |||
203 | return 0; | ||
202 | } | 204 | } |
203 | #endif | 205 | #endif |
204 | 206 | ||
@@ -292,7 +294,7 @@ static void octeon_irq_ciu1_disable(unsigned int irq) | |||
292 | } | 294 | } |
293 | 295 | ||
294 | #ifdef CONFIG_SMP | 296 | #ifdef CONFIG_SMP |
295 | static void octeon_irq_ciu1_set_affinity(unsigned int irq, const struct cpumask *dest) | 297 | static int octeon_irq_ciu1_set_affinity(unsigned int irq, const struct cpumask *dest) |
296 | { | 298 | { |
297 | int cpu; | 299 | int cpu; |
298 | int bit = irq - OCTEON_IRQ_WDOG0; /* Bit 0-63 of EN1 */ | 300 | int bit = irq - OCTEON_IRQ_WDOG0; /* Bit 0-63 of EN1 */ |
@@ -315,6 +317,8 @@ static void octeon_irq_ciu1_set_affinity(unsigned int irq, const struct cpumask | |||
315 | */ | 317 | */ |
316 | cvmx_read_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num() * 2 + 1)); | 318 | cvmx_read_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num() * 2 + 1)); |
317 | write_unlock(&octeon_irq_ciu1_rwlock); | 319 | write_unlock(&octeon_irq_ciu1_rwlock); |
320 | |||
321 | return 0; | ||
318 | } | 322 | } |
319 | #endif | 323 | #endif |
320 | 324 | ||
diff --git a/arch/mips/include/asm/irq.h b/arch/mips/include/asm/irq.h index 3214ade02d10..4f1eed107b08 100644 --- a/arch/mips/include/asm/irq.h +++ b/arch/mips/include/asm/irq.h | |||
@@ -49,7 +49,7 @@ static inline void smtc_im_ack_irq(unsigned int irq) | |||
49 | #ifdef CONFIG_MIPS_MT_SMTC_IRQAFF | 49 | #ifdef CONFIG_MIPS_MT_SMTC_IRQAFF |
50 | #include <linux/cpumask.h> | 50 | #include <linux/cpumask.h> |
51 | 51 | ||
52 | extern void plat_set_irq_affinity(unsigned int irq, | 52 | extern int plat_set_irq_affinity(unsigned int irq, |
53 | const struct cpumask *affinity); | 53 | const struct cpumask *affinity); |
54 | extern void smtc_forward_irq(unsigned int irq); | 54 | extern void smtc_forward_irq(unsigned int irq); |
55 | 55 | ||
diff --git a/arch/mips/kernel/irq-gic.c b/arch/mips/kernel/irq-gic.c index 87deb8f6c458..3f43c2e3aa5a 100644 --- a/arch/mips/kernel/irq-gic.c +++ b/arch/mips/kernel/irq-gic.c | |||
@@ -155,7 +155,7 @@ static void gic_unmask_irq(unsigned int irq) | |||
155 | 155 | ||
156 | static DEFINE_SPINLOCK(gic_lock); | 156 | static DEFINE_SPINLOCK(gic_lock); |
157 | 157 | ||
158 | static void gic_set_affinity(unsigned int irq, const struct cpumask *cpumask) | 158 | static int gic_set_affinity(unsigned int irq, const struct cpumask *cpumask) |
159 | { | 159 | { |
160 | cpumask_t tmp = CPU_MASK_NONE; | 160 | cpumask_t tmp = CPU_MASK_NONE; |
161 | unsigned long flags; | 161 | unsigned long flags; |
@@ -166,7 +166,7 @@ static void gic_set_affinity(unsigned int irq, const struct cpumask *cpumask) | |||
166 | 166 | ||
167 | cpumask_and(&tmp, cpumask, cpu_online_mask); | 167 | cpumask_and(&tmp, cpumask, cpu_online_mask); |
168 | if (cpus_empty(tmp)) | 168 | if (cpus_empty(tmp)) |
169 | return; | 169 | return -1; |
170 | 170 | ||
171 | /* Assumption : cpumask refers to a single CPU */ | 171 | /* Assumption : cpumask refers to a single CPU */ |
172 | spin_lock_irqsave(&gic_lock, flags); | 172 | spin_lock_irqsave(&gic_lock, flags); |
@@ -190,6 +190,7 @@ static void gic_set_affinity(unsigned int irq, const struct cpumask *cpumask) | |||
190 | cpumask_copy(irq_desc[irq].affinity, cpumask); | 190 | cpumask_copy(irq_desc[irq].affinity, cpumask); |
191 | spin_unlock_irqrestore(&gic_lock, flags); | 191 | spin_unlock_irqrestore(&gic_lock, flags); |
192 | 192 | ||
193 | return 0; | ||
193 | } | 194 | } |
194 | #endif | 195 | #endif |
195 | 196 | ||
diff --git a/arch/mips/mti-malta/malta-smtc.c b/arch/mips/mti-malta/malta-smtc.c index 5ba31888fefb..499ffe5475df 100644 --- a/arch/mips/mti-malta/malta-smtc.c +++ b/arch/mips/mti-malta/malta-smtc.c | |||
@@ -114,7 +114,7 @@ struct plat_smp_ops msmtc_smp_ops = { | |||
114 | */ | 114 | */ |
115 | 115 | ||
116 | 116 | ||
117 | void plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity) | 117 | int plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity) |
118 | { | 118 | { |
119 | cpumask_t tmask; | 119 | cpumask_t tmask; |
120 | int cpu = 0; | 120 | int cpu = 0; |
@@ -156,5 +156,7 @@ void plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity) | |||
156 | 156 | ||
157 | /* Do any generic SMTC IRQ affinity setup */ | 157 | /* Do any generic SMTC IRQ affinity setup */ |
158 | smtc_set_irq_affinity(irq, tmask); | 158 | smtc_set_irq_affinity(irq, tmask); |
159 | |||
160 | return 0; | ||
159 | } | 161 | } |
160 | #endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */ | 162 | #endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */ |
diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c index 352352b3cb2f..4f256a131bf6 100644 --- a/arch/mips/sibyte/bcm1480/irq.c +++ b/arch/mips/sibyte/bcm1480/irq.c | |||
@@ -50,7 +50,7 @@ static void enable_bcm1480_irq(unsigned int irq); | |||
50 | static void disable_bcm1480_irq(unsigned int irq); | 50 | static void disable_bcm1480_irq(unsigned int irq); |
51 | static void ack_bcm1480_irq(unsigned int irq); | 51 | static void ack_bcm1480_irq(unsigned int irq); |
52 | #ifdef CONFIG_SMP | 52 | #ifdef CONFIG_SMP |
53 | static void bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask); | 53 | static int bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask); |
54 | #endif | 54 | #endif |
55 | 55 | ||
56 | #ifdef CONFIG_PCI | 56 | #ifdef CONFIG_PCI |
@@ -109,7 +109,7 @@ void bcm1480_unmask_irq(int cpu, int irq) | |||
109 | } | 109 | } |
110 | 110 | ||
111 | #ifdef CONFIG_SMP | 111 | #ifdef CONFIG_SMP |
112 | static void bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask) | 112 | static int bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask) |
113 | { | 113 | { |
114 | int i = 0, old_cpu, cpu, int_on, k; | 114 | int i = 0, old_cpu, cpu, int_on, k; |
115 | u64 cur_ints; | 115 | u64 cur_ints; |
@@ -119,7 +119,7 @@ static void bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask) | |||
119 | 119 | ||
120 | if (cpumask_weight(mask) != 1) { | 120 | if (cpumask_weight(mask) != 1) { |
121 | printk("attempted to set irq affinity for irq %d to multiple CPUs\n", irq); | 121 | printk("attempted to set irq affinity for irq %d to multiple CPUs\n", irq); |
122 | return; | 122 | return -1; |
123 | } | 123 | } |
124 | i = cpumask_first(mask); | 124 | i = cpumask_first(mask); |
125 | 125 | ||
@@ -155,6 +155,8 @@ static void bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask) | |||
155 | } | 155 | } |
156 | spin_unlock(&bcm1480_imr_lock); | 156 | spin_unlock(&bcm1480_imr_lock); |
157 | spin_unlock_irqrestore(&desc->lock, flags); | 157 | spin_unlock_irqrestore(&desc->lock, flags); |
158 | |||
159 | return 0; | ||
158 | } | 160 | } |
159 | #endif | 161 | #endif |
160 | 162 | ||
diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c index c08ff582da6f..e389507f1f96 100644 --- a/arch/mips/sibyte/sb1250/irq.c +++ b/arch/mips/sibyte/sb1250/irq.c | |||
@@ -50,7 +50,7 @@ static void enable_sb1250_irq(unsigned int irq); | |||
50 | static void disable_sb1250_irq(unsigned int irq); | 50 | static void disable_sb1250_irq(unsigned int irq); |
51 | static void ack_sb1250_irq(unsigned int irq); | 51 | static void ack_sb1250_irq(unsigned int irq); |
52 | #ifdef CONFIG_SMP | 52 | #ifdef CONFIG_SMP |
53 | static void sb1250_set_affinity(unsigned int irq, const struct cpumask *mask); | 53 | static int sb1250_set_affinity(unsigned int irq, const struct cpumask *mask); |
54 | #endif | 54 | #endif |
55 | 55 | ||
56 | #ifdef CONFIG_SIBYTE_HAS_LDT | 56 | #ifdef CONFIG_SIBYTE_HAS_LDT |
@@ -103,7 +103,7 @@ void sb1250_unmask_irq(int cpu, int irq) | |||
103 | } | 103 | } |
104 | 104 | ||
105 | #ifdef CONFIG_SMP | 105 | #ifdef CONFIG_SMP |
106 | static void sb1250_set_affinity(unsigned int irq, const struct cpumask *mask) | 106 | static int sb1250_set_affinity(unsigned int irq, const struct cpumask *mask) |
107 | { | 107 | { |
108 | int i = 0, old_cpu, cpu, int_on; | 108 | int i = 0, old_cpu, cpu, int_on; |
109 | u64 cur_ints; | 109 | u64 cur_ints; |
@@ -114,7 +114,7 @@ static void sb1250_set_affinity(unsigned int irq, const struct cpumask *mask) | |||
114 | 114 | ||
115 | if (cpumask_weight(mask) > 1) { | 115 | if (cpumask_weight(mask) > 1) { |
116 | printk("attempted to set irq affinity for irq %d to multiple CPUs\n", irq); | 116 | printk("attempted to set irq affinity for irq %d to multiple CPUs\n", irq); |
117 | return; | 117 | return -1; |
118 | } | 118 | } |
119 | 119 | ||
120 | /* Convert logical CPU to physical CPU */ | 120 | /* Convert logical CPU to physical CPU */ |
@@ -146,6 +146,8 @@ static void sb1250_set_affinity(unsigned int irq, const struct cpumask *mask) | |||
146 | } | 146 | } |
147 | spin_unlock(&sb1250_imr_lock); | 147 | spin_unlock(&sb1250_imr_lock); |
148 | spin_unlock_irqrestore(&desc->lock, flags); | 148 | spin_unlock_irqrestore(&desc->lock, flags); |
149 | |||
150 | return 0; | ||
149 | } | 151 | } |
150 | #endif | 152 | #endif |
151 | 153 | ||
diff --git a/arch/parisc/kernel/irq.c b/arch/parisc/kernel/irq.c index 4ea4229d765c..8007f1e65729 100644 --- a/arch/parisc/kernel/irq.c +++ b/arch/parisc/kernel/irq.c | |||
@@ -130,15 +130,17 @@ int cpu_check_affinity(unsigned int irq, const struct cpumask *dest) | |||
130 | return cpu_dest; | 130 | return cpu_dest; |
131 | } | 131 | } |
132 | 132 | ||
133 | static void cpu_set_affinity_irq(unsigned int irq, const struct cpumask *dest) | 133 | static int cpu_set_affinity_irq(unsigned int irq, const struct cpumask *dest) |
134 | { | 134 | { |
135 | int cpu_dest; | 135 | int cpu_dest; |
136 | 136 | ||
137 | cpu_dest = cpu_check_affinity(irq, dest); | 137 | cpu_dest = cpu_check_affinity(irq, dest); |
138 | if (cpu_dest < 0) | 138 | if (cpu_dest < 0) |
139 | return; | 139 | return -1; |
140 | 140 | ||
141 | cpumask_copy(&irq_desc[irq].affinity, dest); | 141 | cpumask_copy(&irq_desc[irq].affinity, dest); |
142 | |||
143 | return 0; | ||
142 | } | 144 | } |
143 | #endif | 145 | #endif |
144 | 146 | ||
diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c index 80b513449f4c..be3581a8c294 100644 --- a/arch/powerpc/platforms/pseries/xics.c +++ b/arch/powerpc/platforms/pseries/xics.c | |||
@@ -333,7 +333,7 @@ static void xics_eoi_lpar(unsigned int virq) | |||
333 | lpar_xirr_info_set((0xff << 24) | irq); | 333 | lpar_xirr_info_set((0xff << 24) | irq); |
334 | } | 334 | } |
335 | 335 | ||
336 | static void xics_set_affinity(unsigned int virq, const struct cpumask *cpumask) | 336 | static int xics_set_affinity(unsigned int virq, const struct cpumask *cpumask) |
337 | { | 337 | { |
338 | unsigned int irq; | 338 | unsigned int irq; |
339 | int status; | 339 | int status; |
@@ -342,14 +342,14 @@ static void xics_set_affinity(unsigned int virq, const struct cpumask *cpumask) | |||
342 | 342 | ||
343 | irq = (unsigned int)irq_map[virq].hwirq; | 343 | irq = (unsigned int)irq_map[virq].hwirq; |
344 | if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS) | 344 | if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS) |
345 | return; | 345 | return -1; |
346 | 346 | ||
347 | status = rtas_call(ibm_get_xive, 1, 3, xics_status, irq); | 347 | status = rtas_call(ibm_get_xive, 1, 3, xics_status, irq); |
348 | 348 | ||
349 | if (status) { | 349 | if (status) { |
350 | printk(KERN_ERR "%s: ibm,get-xive irq=%u returns %d\n", | 350 | printk(KERN_ERR "%s: ibm,get-xive irq=%u returns %d\n", |
351 | __func__, irq, status); | 351 | __func__, irq, status); |
352 | return; | 352 | return -1; |
353 | } | 353 | } |
354 | 354 | ||
355 | /* | 355 | /* |
@@ -363,7 +363,7 @@ static void xics_set_affinity(unsigned int virq, const struct cpumask *cpumask) | |||
363 | printk(KERN_WARNING | 363 | printk(KERN_WARNING |
364 | "%s: No online cpus in the mask %s for irq %d\n", | 364 | "%s: No online cpus in the mask %s for irq %d\n", |
365 | __func__, cpulist, virq); | 365 | __func__, cpulist, virq); |
366 | return; | 366 | return -1; |
367 | } | 367 | } |
368 | 368 | ||
369 | status = rtas_call(ibm_set_xive, 3, 1, NULL, | 369 | status = rtas_call(ibm_set_xive, 3, 1, NULL, |
@@ -372,8 +372,10 @@ static void xics_set_affinity(unsigned int virq, const struct cpumask *cpumask) | |||
372 | if (status) { | 372 | if (status) { |
373 | printk(KERN_ERR "%s: ibm,set-xive irq=%u returns %d\n", | 373 | printk(KERN_ERR "%s: ibm,set-xive irq=%u returns %d\n", |
374 | __func__, irq, status); | 374 | __func__, irq, status); |
375 | return; | 375 | return -1; |
376 | } | 376 | } |
377 | |||
378 | return 0; | ||
377 | } | 379 | } |
378 | 380 | ||
379 | static struct irq_chip xics_pic_direct = { | 381 | static struct irq_chip xics_pic_direct = { |
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c index 21b956701596..f4cbd15cf22f 100644 --- a/arch/powerpc/sysdev/mpic.c +++ b/arch/powerpc/sysdev/mpic.c | |||
@@ -807,7 +807,7 @@ static void mpic_end_ipi(unsigned int irq) | |||
807 | 807 | ||
808 | #endif /* CONFIG_SMP */ | 808 | #endif /* CONFIG_SMP */ |
809 | 809 | ||
810 | void mpic_set_affinity(unsigned int irq, const struct cpumask *cpumask) | 810 | int mpic_set_affinity(unsigned int irq, const struct cpumask *cpumask) |
811 | { | 811 | { |
812 | struct mpic *mpic = mpic_from_irq(irq); | 812 | struct mpic *mpic = mpic_from_irq(irq); |
813 | unsigned int src = mpic_irq_to_hw(irq); | 813 | unsigned int src = mpic_irq_to_hw(irq); |
@@ -824,6 +824,8 @@ void mpic_set_affinity(unsigned int irq, const struct cpumask *cpumask) | |||
824 | mpic_irq_write(src, MPIC_INFO(IRQ_DESTINATION), | 824 | mpic_irq_write(src, MPIC_INFO(IRQ_DESTINATION), |
825 | mpic_physmask(cpus_addr(tmp)[0])); | 825 | mpic_physmask(cpus_addr(tmp)[0])); |
826 | } | 826 | } |
827 | |||
828 | return 0; | ||
827 | } | 829 | } |
828 | 830 | ||
829 | static unsigned int mpic_type_to_vecpri(struct mpic *mpic, unsigned int type) | 831 | static unsigned int mpic_type_to_vecpri(struct mpic *mpic, unsigned int type) |
diff --git a/arch/sparc/kernel/irq_64.c b/arch/sparc/kernel/irq_64.c index 5deabe921a47..e5e78f9cfc95 100644 --- a/arch/sparc/kernel/irq_64.c +++ b/arch/sparc/kernel/irq_64.c | |||
@@ -318,10 +318,12 @@ static void sun4u_irq_enable(unsigned int virt_irq) | |||
318 | } | 318 | } |
319 | } | 319 | } |
320 | 320 | ||
321 | static void sun4u_set_affinity(unsigned int virt_irq, | 321 | static int sun4u_set_affinity(unsigned int virt_irq, |
322 | const struct cpumask *mask) | 322 | const struct cpumask *mask) |
323 | { | 323 | { |
324 | sun4u_irq_enable(virt_irq); | 324 | sun4u_irq_enable(virt_irq); |
325 | |||
326 | return 0; | ||
325 | } | 327 | } |
326 | 328 | ||
327 | /* Don't do anything. The desc->status check for IRQ_DISABLED in | 329 | /* Don't do anything. The desc->status check for IRQ_DISABLED in |
@@ -377,7 +379,7 @@ static void sun4v_irq_enable(unsigned int virt_irq) | |||
377 | ino, err); | 379 | ino, err); |
378 | } | 380 | } |
379 | 381 | ||
380 | static void sun4v_set_affinity(unsigned int virt_irq, | 382 | static int sun4v_set_affinity(unsigned int virt_irq, |
381 | const struct cpumask *mask) | 383 | const struct cpumask *mask) |
382 | { | 384 | { |
383 | unsigned int ino = virt_irq_table[virt_irq].dev_ino; | 385 | unsigned int ino = virt_irq_table[virt_irq].dev_ino; |
@@ -388,6 +390,8 @@ static void sun4v_set_affinity(unsigned int virt_irq, | |||
388 | if (err != HV_EOK) | 390 | if (err != HV_EOK) |
389 | printk(KERN_ERR "sun4v_intr_settarget(%x,%lu): " | 391 | printk(KERN_ERR "sun4v_intr_settarget(%x,%lu): " |
390 | "err(%d)\n", ino, cpuid, err); | 392 | "err(%d)\n", ino, cpuid, err); |
393 | |||
394 | return 0; | ||
391 | } | 395 | } |
392 | 396 | ||
393 | static void sun4v_irq_disable(unsigned int virt_irq) | 397 | static void sun4v_irq_disable(unsigned int virt_irq) |
@@ -445,7 +449,7 @@ static void sun4v_virq_enable(unsigned int virt_irq) | |||
445 | dev_handle, dev_ino, err); | 449 | dev_handle, dev_ino, err); |
446 | } | 450 | } |
447 | 451 | ||
448 | static void sun4v_virt_set_affinity(unsigned int virt_irq, | 452 | static int sun4v_virt_set_affinity(unsigned int virt_irq, |
449 | const struct cpumask *mask) | 453 | const struct cpumask *mask) |
450 | { | 454 | { |
451 | unsigned long cpuid, dev_handle, dev_ino; | 455 | unsigned long cpuid, dev_handle, dev_ino; |
@@ -461,6 +465,8 @@ static void sun4v_virt_set_affinity(unsigned int virt_irq, | |||
461 | printk(KERN_ERR "sun4v_vintr_set_target(%lx,%lx,%lu): " | 465 | printk(KERN_ERR "sun4v_vintr_set_target(%lx,%lx,%lu): " |
462 | "err(%d)\n", | 466 | "err(%d)\n", |
463 | dev_handle, dev_ino, cpuid, err); | 467 | dev_handle, dev_ino, cpuid, err); |
468 | |||
469 | return 0; | ||
464 | } | 470 | } |
465 | 471 | ||
466 | static void sun4v_virq_disable(unsigned int virt_irq) | 472 | static void sun4v_virq_disable(unsigned int virt_irq) |
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c index 9fbf0f7ec7eb..5c7630b40a54 100644 --- a/arch/x86/kernel/apic/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c | |||
@@ -574,13 +574,14 @@ set_desc_affinity(struct irq_desc *desc, const struct cpumask *mask) | |||
574 | return apic->cpu_mask_to_apicid_and(desc->affinity, cfg->domain); | 574 | return apic->cpu_mask_to_apicid_and(desc->affinity, cfg->domain); |
575 | } | 575 | } |
576 | 576 | ||
577 | static void | 577 | static int |
578 | set_ioapic_affinity_irq_desc(struct irq_desc *desc, const struct cpumask *mask) | 578 | set_ioapic_affinity_irq_desc(struct irq_desc *desc, const struct cpumask *mask) |
579 | { | 579 | { |
580 | struct irq_cfg *cfg; | 580 | struct irq_cfg *cfg; |
581 | unsigned long flags; | 581 | unsigned long flags; |
582 | unsigned int dest; | 582 | unsigned int dest; |
583 | unsigned int irq; | 583 | unsigned int irq; |
584 | int ret = -1; | ||
584 | 585 | ||
585 | irq = desc->irq; | 586 | irq = desc->irq; |
586 | cfg = desc->chip_data; | 587 | cfg = desc->chip_data; |
@@ -591,18 +592,21 @@ set_ioapic_affinity_irq_desc(struct irq_desc *desc, const struct cpumask *mask) | |||
591 | /* Only the high 8 bits are valid. */ | 592 | /* Only the high 8 bits are valid. */ |
592 | dest = SET_APIC_LOGICAL_ID(dest); | 593 | dest = SET_APIC_LOGICAL_ID(dest); |
593 | __target_IO_APIC_irq(irq, dest, cfg); | 594 | __target_IO_APIC_irq(irq, dest, cfg); |
595 | ret = 0; | ||
594 | } | 596 | } |
595 | spin_unlock_irqrestore(&ioapic_lock, flags); | 597 | spin_unlock_irqrestore(&ioapic_lock, flags); |
598 | |||
599 | return ret; | ||
596 | } | 600 | } |
597 | 601 | ||
598 | static void | 602 | static int |
599 | set_ioapic_affinity_irq(unsigned int irq, const struct cpumask *mask) | 603 | set_ioapic_affinity_irq(unsigned int irq, const struct cpumask *mask) |
600 | { | 604 | { |
601 | struct irq_desc *desc; | 605 | struct irq_desc *desc; |
602 | 606 | ||
603 | desc = irq_to_desc(irq); | 607 | desc = irq_to_desc(irq); |
604 | 608 | ||
605 | set_ioapic_affinity_irq_desc(desc, mask); | 609 | return set_ioapic_affinity_irq_desc(desc, mask); |
606 | } | 610 | } |
607 | #endif /* CONFIG_SMP */ | 611 | #endif /* CONFIG_SMP */ |
608 | 612 | ||
@@ -2348,24 +2352,25 @@ static int ioapic_retrigger_irq(unsigned int irq) | |||
2348 | * Real vector that is used for interrupting cpu will be coming from | 2352 | * Real vector that is used for interrupting cpu will be coming from |
2349 | * the interrupt-remapping table entry. | 2353 | * the interrupt-remapping table entry. |
2350 | */ | 2354 | */ |
2351 | static void | 2355 | static int |
2352 | migrate_ioapic_irq_desc(struct irq_desc *desc, const struct cpumask *mask) | 2356 | migrate_ioapic_irq_desc(struct irq_desc *desc, const struct cpumask *mask) |
2353 | { | 2357 | { |
2354 | struct irq_cfg *cfg; | 2358 | struct irq_cfg *cfg; |
2355 | struct irte irte; | 2359 | struct irte irte; |
2356 | unsigned int dest; | 2360 | unsigned int dest; |
2357 | unsigned int irq; | 2361 | unsigned int irq; |
2362 | int ret = -1; | ||
2358 | 2363 | ||
2359 | if (!cpumask_intersects(mask, cpu_online_mask)) | 2364 | if (!cpumask_intersects(mask, cpu_online_mask)) |
2360 | return; | 2365 | return ret; |
2361 | 2366 | ||
2362 | irq = desc->irq; | 2367 | irq = desc->irq; |
2363 | if (get_irte(irq, &irte)) | 2368 | if (get_irte(irq, &irte)) |
2364 | return; | 2369 | return ret; |
2365 | 2370 | ||
2366 | cfg = desc->chip_data; | 2371 | cfg = desc->chip_data; |
2367 | if (assign_irq_vector(irq, cfg, mask)) | 2372 | if (assign_irq_vector(irq, cfg, mask)) |
2368 | return; | 2373 | return ret; |
2369 | 2374 | ||
2370 | dest = apic->cpu_mask_to_apicid_and(cfg->domain, mask); | 2375 | dest = apic->cpu_mask_to_apicid_and(cfg->domain, mask); |
2371 | 2376 | ||
@@ -2381,27 +2386,30 @@ migrate_ioapic_irq_desc(struct irq_desc *desc, const struct cpumask *mask) | |||
2381 | send_cleanup_vector(cfg); | 2386 | send_cleanup_vector(cfg); |
2382 | 2387 | ||
2383 | cpumask_copy(desc->affinity, mask); | 2388 | cpumask_copy(desc->affinity, mask); |
2389 | |||
2390 | return 0; | ||
2384 | } | 2391 | } |
2385 | 2392 | ||
2386 | /* | 2393 | /* |
2387 | * Migrates the IRQ destination in the process context. | 2394 | * Migrates the IRQ destination in the process context. |
2388 | */ | 2395 | */ |
2389 | static void set_ir_ioapic_affinity_irq_desc(struct irq_desc *desc, | 2396 | static int set_ir_ioapic_affinity_irq_desc(struct irq_desc *desc, |
2390 | const struct cpumask *mask) | 2397 | const struct cpumask *mask) |
2391 | { | 2398 | { |
2392 | migrate_ioapic_irq_desc(desc, mask); | 2399 | return migrate_ioapic_irq_desc(desc, mask); |
2393 | } | 2400 | } |
2394 | static void set_ir_ioapic_affinity_irq(unsigned int irq, | 2401 | static int set_ir_ioapic_affinity_irq(unsigned int irq, |
2395 | const struct cpumask *mask) | 2402 | const struct cpumask *mask) |
2396 | { | 2403 | { |
2397 | struct irq_desc *desc = irq_to_desc(irq); | 2404 | struct irq_desc *desc = irq_to_desc(irq); |
2398 | 2405 | ||
2399 | set_ir_ioapic_affinity_irq_desc(desc, mask); | 2406 | return set_ir_ioapic_affinity_irq_desc(desc, mask); |
2400 | } | 2407 | } |
2401 | #else | 2408 | #else |
2402 | static inline void set_ir_ioapic_affinity_irq_desc(struct irq_desc *desc, | 2409 | static inline int set_ir_ioapic_affinity_irq_desc(struct irq_desc *desc, |
2403 | const struct cpumask *mask) | 2410 | const struct cpumask *mask) |
2404 | { | 2411 | { |
2412 | return 0; | ||
2405 | } | 2413 | } |
2406 | #endif | 2414 | #endif |
2407 | 2415 | ||
@@ -3318,7 +3326,7 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms | |||
3318 | } | 3326 | } |
3319 | 3327 | ||
3320 | #ifdef CONFIG_SMP | 3328 | #ifdef CONFIG_SMP |
3321 | static void set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask) | 3329 | static int set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask) |
3322 | { | 3330 | { |
3323 | struct irq_desc *desc = irq_to_desc(irq); | 3331 | struct irq_desc *desc = irq_to_desc(irq); |
3324 | struct irq_cfg *cfg; | 3332 | struct irq_cfg *cfg; |
@@ -3327,7 +3335,7 @@ static void set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask) | |||
3327 | 3335 | ||
3328 | dest = set_desc_affinity(desc, mask); | 3336 | dest = set_desc_affinity(desc, mask); |
3329 | if (dest == BAD_APICID) | 3337 | if (dest == BAD_APICID) |
3330 | return; | 3338 | return -1; |
3331 | 3339 | ||
3332 | cfg = desc->chip_data; | 3340 | cfg = desc->chip_data; |
3333 | 3341 | ||
@@ -3339,13 +3347,15 @@ static void set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask) | |||
3339 | msg.address_lo |= MSI_ADDR_DEST_ID(dest); | 3347 | msg.address_lo |= MSI_ADDR_DEST_ID(dest); |
3340 | 3348 | ||
3341 | write_msi_msg_desc(desc, &msg); | 3349 | write_msi_msg_desc(desc, &msg); |
3350 | |||
3351 | return 0; | ||
3342 | } | 3352 | } |
3343 | #ifdef CONFIG_INTR_REMAP | 3353 | #ifdef CONFIG_INTR_REMAP |
3344 | /* | 3354 | /* |
3345 | * Migrate the MSI irq to another cpumask. This migration is | 3355 | * Migrate the MSI irq to another cpumask. This migration is |
3346 | * done in the process context using interrupt-remapping hardware. | 3356 | * done in the process context using interrupt-remapping hardware. |
3347 | */ | 3357 | */ |
3348 | static void | 3358 | static int |
3349 | ir_set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask) | 3359 | ir_set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask) |
3350 | { | 3360 | { |
3351 | struct irq_desc *desc = irq_to_desc(irq); | 3361 | struct irq_desc *desc = irq_to_desc(irq); |
@@ -3354,11 +3364,11 @@ ir_set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask) | |||
3354 | struct irte irte; | 3364 | struct irte irte; |
3355 | 3365 | ||
3356 | if (get_irte(irq, &irte)) | 3366 | if (get_irte(irq, &irte)) |
3357 | return; | 3367 | return -1; |
3358 | 3368 | ||
3359 | dest = set_desc_affinity(desc, mask); | 3369 | dest = set_desc_affinity(desc, mask); |
3360 | if (dest == BAD_APICID) | 3370 | if (dest == BAD_APICID) |
3361 | return; | 3371 | return -1; |
3362 | 3372 | ||
3363 | irte.vector = cfg->vector; | 3373 | irte.vector = cfg->vector; |
3364 | irte.dest_id = IRTE_DEST(dest); | 3374 | irte.dest_id = IRTE_DEST(dest); |
@@ -3375,6 +3385,8 @@ ir_set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask) | |||
3375 | */ | 3385 | */ |
3376 | if (cfg->move_in_progress) | 3386 | if (cfg->move_in_progress) |
3377 | send_cleanup_vector(cfg); | 3387 | send_cleanup_vector(cfg); |
3388 | |||
3389 | return 0; | ||
3378 | } | 3390 | } |
3379 | 3391 | ||
3380 | #endif | 3392 | #endif |
@@ -3528,7 +3540,7 @@ void arch_teardown_msi_irq(unsigned int irq) | |||
3528 | 3540 | ||
3529 | #if defined (CONFIG_DMAR) || defined (CONFIG_INTR_REMAP) | 3541 | #if defined (CONFIG_DMAR) || defined (CONFIG_INTR_REMAP) |
3530 | #ifdef CONFIG_SMP | 3542 | #ifdef CONFIG_SMP |
3531 | static void dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask) | 3543 | static int dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask) |
3532 | { | 3544 | { |
3533 | struct irq_desc *desc = irq_to_desc(irq); | 3545 | struct irq_desc *desc = irq_to_desc(irq); |
3534 | struct irq_cfg *cfg; | 3546 | struct irq_cfg *cfg; |
@@ -3537,7 +3549,7 @@ static void dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask) | |||
3537 | 3549 | ||
3538 | dest = set_desc_affinity(desc, mask); | 3550 | dest = set_desc_affinity(desc, mask); |
3539 | if (dest == BAD_APICID) | 3551 | if (dest == BAD_APICID) |
3540 | return; | 3552 | return -1; |
3541 | 3553 | ||
3542 | cfg = desc->chip_data; | 3554 | cfg = desc->chip_data; |
3543 | 3555 | ||
@@ -3549,6 +3561,8 @@ static void dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask) | |||
3549 | msg.address_lo |= MSI_ADDR_DEST_ID(dest); | 3561 | msg.address_lo |= MSI_ADDR_DEST_ID(dest); |
3550 | 3562 | ||
3551 | dmar_msi_write(irq, &msg); | 3563 | dmar_msi_write(irq, &msg); |
3564 | |||
3565 | return 0; | ||
3552 | } | 3566 | } |
3553 | 3567 | ||
3554 | #endif /* CONFIG_SMP */ | 3568 | #endif /* CONFIG_SMP */ |
@@ -3582,7 +3596,7 @@ int arch_setup_dmar_msi(unsigned int irq) | |||
3582 | #ifdef CONFIG_HPET_TIMER | 3596 | #ifdef CONFIG_HPET_TIMER |
3583 | 3597 | ||
3584 | #ifdef CONFIG_SMP | 3598 | #ifdef CONFIG_SMP |
3585 | static void hpet_msi_set_affinity(unsigned int irq, const struct cpumask *mask) | 3599 | static int hpet_msi_set_affinity(unsigned int irq, const struct cpumask *mask) |
3586 | { | 3600 | { |
3587 | struct irq_desc *desc = irq_to_desc(irq); | 3601 | struct irq_desc *desc = irq_to_desc(irq); |
3588 | struct irq_cfg *cfg; | 3602 | struct irq_cfg *cfg; |
@@ -3591,7 +3605,7 @@ static void hpet_msi_set_affinity(unsigned int irq, const struct cpumask *mask) | |||
3591 | 3605 | ||
3592 | dest = set_desc_affinity(desc, mask); | 3606 | dest = set_desc_affinity(desc, mask); |
3593 | if (dest == BAD_APICID) | 3607 | if (dest == BAD_APICID) |
3594 | return; | 3608 | return -1; |
3595 | 3609 | ||
3596 | cfg = desc->chip_data; | 3610 | cfg = desc->chip_data; |
3597 | 3611 | ||
@@ -3603,6 +3617,8 @@ static void hpet_msi_set_affinity(unsigned int irq, const struct cpumask *mask) | |||
3603 | msg.address_lo |= MSI_ADDR_DEST_ID(dest); | 3617 | msg.address_lo |= MSI_ADDR_DEST_ID(dest); |
3604 | 3618 | ||
3605 | hpet_msi_write(irq, &msg); | 3619 | hpet_msi_write(irq, &msg); |
3620 | |||
3621 | return 0; | ||
3606 | } | 3622 | } |
3607 | 3623 | ||
3608 | #endif /* CONFIG_SMP */ | 3624 | #endif /* CONFIG_SMP */ |
@@ -3659,7 +3675,7 @@ static void target_ht_irq(unsigned int irq, unsigned int dest, u8 vector) | |||
3659 | write_ht_irq_msg(irq, &msg); | 3675 | write_ht_irq_msg(irq, &msg); |
3660 | } | 3676 | } |
3661 | 3677 | ||
3662 | static void set_ht_irq_affinity(unsigned int irq, const struct cpumask *mask) | 3678 | static int set_ht_irq_affinity(unsigned int irq, const struct cpumask *mask) |
3663 | { | 3679 | { |
3664 | struct irq_desc *desc = irq_to_desc(irq); | 3680 | struct irq_desc *desc = irq_to_desc(irq); |
3665 | struct irq_cfg *cfg; | 3681 | struct irq_cfg *cfg; |
@@ -3667,11 +3683,13 @@ static void set_ht_irq_affinity(unsigned int irq, const struct cpumask *mask) | |||
3667 | 3683 | ||
3668 | dest = set_desc_affinity(desc, mask); | 3684 | dest = set_desc_affinity(desc, mask); |
3669 | if (dest == BAD_APICID) | 3685 | if (dest == BAD_APICID) |
3670 | return; | 3686 | return -1; |
3671 | 3687 | ||
3672 | cfg = desc->chip_data; | 3688 | cfg = desc->chip_data; |
3673 | 3689 | ||
3674 | target_ht_irq(irq, dest, cfg->vector); | 3690 | target_ht_irq(irq, dest, cfg->vector); |
3691 | |||
3692 | return 0; | ||
3675 | } | 3693 | } |
3676 | 3694 | ||
3677 | #endif | 3695 | #endif |