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authorMichael Ellerman <michael@ellerman.id.au>2013-06-28 04:15:10 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2013-07-25 17:07:22 -0400
commita9514fe520175d13cba23cf3c9dbba4df9691c86 (patch)
tree53cce96995c7e40b7da6b5c680d5821b9e9bbaae /arch
parent910a165889c9e0c79cb96883db3948c5eea204e2 (diff)
powerpc/perf: Check that events only include valid bits on Power8
commit d8bec4c9cd58f6d3679e09b7293851fb92ad7557 upstream. A mistake we have made in the past is that we pull out the fields we need from the event code, but don't check that there are no unknown bits set. This means that we can't ever assign meaning to those unknown bits in future. Although we have once again failed to do this at release, it is still early days for Power8 so I think we can still slip this in and get away with it. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/perf/power8-pmu.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/powerpc/perf/power8-pmu.c b/arch/powerpc/perf/power8-pmu.c
index f7d1c4fff303..84cdc6d892e3 100644
--- a/arch/powerpc/perf/power8-pmu.c
+++ b/arch/powerpc/perf/power8-pmu.c
@@ -109,6 +109,16 @@
109#define EVENT_IS_MARKED (EVENT_MARKED_MASK << EVENT_MARKED_SHIFT) 109#define EVENT_IS_MARKED (EVENT_MARKED_MASK << EVENT_MARKED_SHIFT)
110#define EVENT_PSEL_MASK 0xff /* PMCxSEL value */ 110#define EVENT_PSEL_MASK 0xff /* PMCxSEL value */
111 111
112#define EVENT_VALID_MASK \
113 ((EVENT_THRESH_MASK << EVENT_THRESH_SHIFT) | \
114 (EVENT_SAMPLE_MASK << EVENT_SAMPLE_SHIFT) | \
115 (EVENT_CACHE_SEL_MASK << EVENT_CACHE_SEL_SHIFT) | \
116 (EVENT_PMC_MASK << EVENT_PMC_SHIFT) | \
117 (EVENT_UNIT_MASK << EVENT_UNIT_SHIFT) | \
118 (EVENT_COMBINE_MASK << EVENT_COMBINE_SHIFT) | \
119 (EVENT_MARKED_MASK << EVENT_MARKED_SHIFT) | \
120 EVENT_PSEL_MASK)
121
112/* MMCRA IFM bits - POWER8 */ 122/* MMCRA IFM bits - POWER8 */
113#define POWER8_MMCRA_IFM1 0x0000000040000000UL 123#define POWER8_MMCRA_IFM1 0x0000000040000000UL
114#define POWER8_MMCRA_IFM2 0x0000000080000000UL 124#define POWER8_MMCRA_IFM2 0x0000000080000000UL
@@ -212,6 +222,9 @@ static int power8_get_constraint(u64 event, unsigned long *maskp, unsigned long
212 222
213 mask = value = 0; 223 mask = value = 0;
214 224
225 if (event & ~EVENT_VALID_MASK)
226 return -1;
227
215 pmc = (event >> EVENT_PMC_SHIFT) & EVENT_PMC_MASK; 228 pmc = (event >> EVENT_PMC_SHIFT) & EVENT_PMC_MASK;
216 unit = (event >> EVENT_UNIT_SHIFT) & EVENT_UNIT_MASK; 229 unit = (event >> EVENT_UNIT_SHIFT) & EVENT_UNIT_MASK;
217 cache = (event >> EVENT_CACHE_SEL_SHIFT) & EVENT_CACHE_SEL_MASK; 230 cache = (event >> EVENT_CACHE_SEL_SHIFT) & EVENT_CACHE_SEL_MASK;