diff options
author | Joonyoung Shim <jy0922.shim@samsung.com> | 2010-09-30 22:24:39 -0400 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2010-10-20 18:54:57 -0400 |
commit | 8ce14a221efe8ef9019e2c5b1e06fcd329e66d78 (patch) | |
tree | 1fab3fd0c7e73ec9da6d84a47e4471bd0919ea73 /arch | |
parent | 02c38497d668f46467e8ec57a243be0be5bd7f85 (diff) |
ARM: SAMSUNG: Add common samsung_gpiolib_to_irq function
This patch adds a common callback for gpio_to_irq() for external and
gpio interrupts for Samsung SoCs.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Cc: Ben Dooks <ben-linux@fluff.org>
[kgene.kim@samsung.com: moved samsung_gpiolib_to_irq() for s3c24xx build]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-s3c64xx/gpiolib.c | 8 | ||||
-rw-r--r-- | arch/arm/mach-s5pc100/gpiolib.c | 31 | ||||
-rw-r--r-- | arch/arm/mach-s5pv210/gpiolib.c | 8 | ||||
-rw-r--r-- | arch/arm/plat-s3c24xx/gpiolib.c | 8 | ||||
-rw-r--r-- | arch/arm/plat-s5p/irq-gpioint.c | 1 | ||||
-rw-r--r-- | arch/arm/plat-samsung/gpio.c | 8 | ||||
-rw-r--r-- | arch/arm/plat-samsung/include/plat/gpio-core.h | 11 |
7 files changed, 40 insertions, 35 deletions
diff --git a/arch/arm/mach-s3c64xx/gpiolib.c b/arch/arm/mach-s3c64xx/gpiolib.c index 300dee4a667b..fd99a82e82c4 100644 --- a/arch/arm/mach-s3c64xx/gpiolib.c +++ b/arch/arm/mach-s3c64xx/gpiolib.c | |||
@@ -195,11 +195,6 @@ static struct s3c_gpio_cfg gpio_2bit_cfg_eint11 = { | |||
195 | .get_pull = s3c_gpio_getpull_updown, | 195 | .get_pull = s3c_gpio_getpull_updown, |
196 | }; | 196 | }; |
197 | 197 | ||
198 | int s3c64xx_gpio2int_gpn(struct gpio_chip *chip, unsigned pin) | ||
199 | { | ||
200 | return IRQ_EINT(0) + pin; | ||
201 | } | ||
202 | |||
203 | static struct s3c_gpio_chip gpio_2bit[] = { | 198 | static struct s3c_gpio_chip gpio_2bit[] = { |
204 | { | 199 | { |
205 | .base = S3C64XX_GPF_BASE, | 200 | .base = S3C64XX_GPF_BASE, |
@@ -227,12 +222,13 @@ static struct s3c_gpio_chip gpio_2bit[] = { | |||
227 | }, | 222 | }, |
228 | }, { | 223 | }, { |
229 | .base = S3C64XX_GPN_BASE, | 224 | .base = S3C64XX_GPN_BASE, |
225 | .irq_base = IRQ_EINT(0), | ||
230 | .config = &gpio_2bit_cfg_eint10, | 226 | .config = &gpio_2bit_cfg_eint10, |
231 | .chip = { | 227 | .chip = { |
232 | .base = S3C64XX_GPN(0), | 228 | .base = S3C64XX_GPN(0), |
233 | .ngpio = S3C64XX_GPIO_N_NR, | 229 | .ngpio = S3C64XX_GPIO_N_NR, |
234 | .label = "GPN", | 230 | .label = "GPN", |
235 | .to_irq = s3c64xx_gpio2int_gpn, | 231 | .to_irq = samsung_gpiolib_to_irq, |
236 | }, | 232 | }, |
237 | }, { | 233 | }, { |
238 | .base = S3C64XX_GPO_BASE, | 234 | .base = S3C64XX_GPO_BASE, |
diff --git a/arch/arm/mach-s5pc100/gpiolib.c b/arch/arm/mach-s5pc100/gpiolib.c index 5811578ad4e4..def4ff83e051 100644 --- a/arch/arm/mach-s5pc100/gpiolib.c +++ b/arch/arm/mach-s5pc100/gpiolib.c | |||
@@ -61,25 +61,6 @@ | |||
61 | * L3 8 4Bit None | 61 | * L3 8 4Bit None |
62 | */ | 62 | */ |
63 | 63 | ||
64 | static int s5pc100_gpiolib_to_eint(struct gpio_chip *chip, unsigned int offset) | ||
65 | { | ||
66 | int base; | ||
67 | |||
68 | base = chip->base - S5PC100_GPH0(0); | ||
69 | if (base == 0) | ||
70 | return IRQ_EINT(offset); | ||
71 | base = chip->base - S5PC100_GPH1(0); | ||
72 | if (base == 0) | ||
73 | return IRQ_EINT(8 + offset); | ||
74 | base = chip->base - S5PC100_GPH2(0); | ||
75 | if (base == 0) | ||
76 | return IRQ_EINT(16 + offset); | ||
77 | base = chip->base - S5PC100_GPH3(0); | ||
78 | if (base == 0) | ||
79 | return IRQ_EINT(24 + offset); | ||
80 | return -EINVAL; | ||
81 | } | ||
82 | |||
83 | static struct s3c_gpio_cfg gpio_cfg = { | 64 | static struct s3c_gpio_cfg gpio_cfg = { |
84 | .set_config = s3c_gpio_setcfg_s3c64xx_4bit, | 65 | .set_config = s3c_gpio_setcfg_s3c64xx_4bit, |
85 | .set_pull = s3c_gpio_setpull_updown, | 66 | .set_pull = s3c_gpio_setpull_updown, |
@@ -223,38 +204,42 @@ static struct s3c_gpio_chip s5pc100_gpio_chips[] = { | |||
223 | }, { | 204 | }, { |
224 | .base = S5PC100_GPH0_BASE, | 205 | .base = S5PC100_GPH0_BASE, |
225 | .config = &gpio_cfg_eint, | 206 | .config = &gpio_cfg_eint, |
207 | .irq_base = IRQ_EINT(0), | ||
226 | .chip = { | 208 | .chip = { |
227 | .base = S5PC100_GPH0(0), | 209 | .base = S5PC100_GPH0(0), |
228 | .ngpio = S5PC100_GPIO_H0_NR, | 210 | .ngpio = S5PC100_GPIO_H0_NR, |
229 | .label = "GPH0", | 211 | .label = "GPH0", |
230 | .to_irq = s5pc100_gpiolib_to_eint, | 212 | .to_irq = samsung_gpiolib_to_irq, |
231 | }, | 213 | }, |
232 | }, { | 214 | }, { |
233 | .base = S5PC100_GPH1_BASE, | 215 | .base = S5PC100_GPH1_BASE, |
234 | .config = &gpio_cfg_eint, | 216 | .config = &gpio_cfg_eint, |
217 | .irq_base = IRQ_EINT(8), | ||
235 | .chip = { | 218 | .chip = { |
236 | .base = S5PC100_GPH1(0), | 219 | .base = S5PC100_GPH1(0), |
237 | .ngpio = S5PC100_GPIO_H1_NR, | 220 | .ngpio = S5PC100_GPIO_H1_NR, |
238 | .label = "GPH1", | 221 | .label = "GPH1", |
239 | .to_irq = s5pc100_gpiolib_to_eint, | 222 | .to_irq = samsung_gpiolib_to_irq, |
240 | }, | 223 | }, |
241 | }, { | 224 | }, { |
242 | .base = S5PC100_GPH2_BASE, | 225 | .base = S5PC100_GPH2_BASE, |
243 | .config = &gpio_cfg_eint, | 226 | .config = &gpio_cfg_eint, |
227 | .irq_base = IRQ_EINT(16), | ||
244 | .chip = { | 228 | .chip = { |
245 | .base = S5PC100_GPH2(0), | 229 | .base = S5PC100_GPH2(0), |
246 | .ngpio = S5PC100_GPIO_H2_NR, | 230 | .ngpio = S5PC100_GPIO_H2_NR, |
247 | .label = "GPH2", | 231 | .label = "GPH2", |
248 | .to_irq = s5pc100_gpiolib_to_eint, | 232 | .to_irq = samsung_gpiolib_to_irq, |
249 | }, | 233 | }, |
250 | }, { | 234 | }, { |
251 | .base = S5PC100_GPH3_BASE, | 235 | .base = S5PC100_GPH3_BASE, |
252 | .config = &gpio_cfg_eint, | 236 | .config = &gpio_cfg_eint, |
237 | .irq_base = IRQ_EINT(24), | ||
253 | .chip = { | 238 | .chip = { |
254 | .base = S5PC100_GPH3(0), | 239 | .base = S5PC100_GPH3(0), |
255 | .ngpio = S5PC100_GPIO_H3_NR, | 240 | .ngpio = S5PC100_GPIO_H3_NR, |
256 | .label = "GPH3", | 241 | .label = "GPH3", |
257 | .to_irq = s5pc100_gpiolib_to_eint, | 242 | .to_irq = samsung_gpiolib_to_irq, |
258 | }, | 243 | }, |
259 | }, { | 244 | }, { |
260 | .base = S5PC100_GPI_BASE, | 245 | .base = S5PC100_GPI_BASE, |
diff --git a/arch/arm/mach-s5pv210/gpiolib.c b/arch/arm/mach-s5pv210/gpiolib.c index 29dfb894d4f4..ab673effd767 100644 --- a/arch/arm/mach-s5pv210/gpiolib.c +++ b/arch/arm/mach-s5pv210/gpiolib.c | |||
@@ -224,34 +224,42 @@ static struct s3c_gpio_chip s5pv210_gpio_4bit[] = { | |||
224 | }, { | 224 | }, { |
225 | .base = (S5P_VA_GPIO + 0xC00), | 225 | .base = (S5P_VA_GPIO + 0xC00), |
226 | .config = &gpio_cfg_noint, | 226 | .config = &gpio_cfg_noint, |
227 | .irq_base = IRQ_EINT(0), | ||
227 | .chip = { | 228 | .chip = { |
228 | .base = S5PV210_GPH0(0), | 229 | .base = S5PV210_GPH0(0), |
229 | .ngpio = S5PV210_GPIO_H0_NR, | 230 | .ngpio = S5PV210_GPIO_H0_NR, |
230 | .label = "GPH0", | 231 | .label = "GPH0", |
232 | .to_irq = samsung_gpiolib_to_irq, | ||
231 | }, | 233 | }, |
232 | }, { | 234 | }, { |
233 | .base = (S5P_VA_GPIO + 0xC20), | 235 | .base = (S5P_VA_GPIO + 0xC20), |
234 | .config = &gpio_cfg_noint, | 236 | .config = &gpio_cfg_noint, |
237 | .irq_base = IRQ_EINT(8), | ||
235 | .chip = { | 238 | .chip = { |
236 | .base = S5PV210_GPH1(0), | 239 | .base = S5PV210_GPH1(0), |
237 | .ngpio = S5PV210_GPIO_H1_NR, | 240 | .ngpio = S5PV210_GPIO_H1_NR, |
238 | .label = "GPH1", | 241 | .label = "GPH1", |
242 | .to_irq = samsung_gpiolib_to_irq, | ||
239 | }, | 243 | }, |
240 | }, { | 244 | }, { |
241 | .base = (S5P_VA_GPIO + 0xC40), | 245 | .base = (S5P_VA_GPIO + 0xC40), |
242 | .config = &gpio_cfg_noint, | 246 | .config = &gpio_cfg_noint, |
247 | .irq_base = IRQ_EINT(16), | ||
243 | .chip = { | 248 | .chip = { |
244 | .base = S5PV210_GPH2(0), | 249 | .base = S5PV210_GPH2(0), |
245 | .ngpio = S5PV210_GPIO_H2_NR, | 250 | .ngpio = S5PV210_GPIO_H2_NR, |
246 | .label = "GPH2", | 251 | .label = "GPH2", |
252 | .to_irq = samsung_gpiolib_to_irq, | ||
247 | }, | 253 | }, |
248 | }, { | 254 | }, { |
249 | .base = (S5P_VA_GPIO + 0xC60), | 255 | .base = (S5P_VA_GPIO + 0xC60), |
250 | .config = &gpio_cfg_noint, | 256 | .config = &gpio_cfg_noint, |
257 | .irq_base = IRQ_EINT(24), | ||
251 | .chip = { | 258 | .chip = { |
252 | .base = S5PV210_GPH3(0), | 259 | .base = S5PV210_GPH3(0), |
253 | .ngpio = S5PV210_GPIO_H3_NR, | 260 | .ngpio = S5PV210_GPIO_H3_NR, |
254 | .label = "GPH3", | 261 | .label = "GPH3", |
262 | .to_irq = samsung_gpiolib_to_irq, | ||
255 | }, | 263 | }, |
256 | }, | 264 | }, |
257 | }; | 265 | }; |
diff --git a/arch/arm/plat-s3c24xx/gpiolib.c b/arch/arm/plat-s3c24xx/gpiolib.c index 4c0896f2572d..243b6411050d 100644 --- a/arch/arm/plat-s3c24xx/gpiolib.c +++ b/arch/arm/plat-s3c24xx/gpiolib.c | |||
@@ -74,11 +74,6 @@ static int s3c24xx_gpiolib_bankf_toirq(struct gpio_chip *chip, unsigned offset) | |||
74 | return -EINVAL; | 74 | return -EINVAL; |
75 | } | 75 | } |
76 | 76 | ||
77 | static int s3c24xx_gpiolib_bankg_toirq(struct gpio_chip *chip, unsigned offset) | ||
78 | { | ||
79 | return IRQ_EINT8 + offset; | ||
80 | } | ||
81 | |||
82 | static struct s3c_gpio_cfg s3c24xx_gpiocfg_banka = { | 77 | static struct s3c_gpio_cfg s3c24xx_gpiocfg_banka = { |
83 | .set_config = s3c_gpio_setcfg_s3c24xx_a, | 78 | .set_config = s3c_gpio_setcfg_s3c24xx_a, |
84 | .get_config = s3c_gpio_getcfg_s3c24xx_a, | 79 | .get_config = s3c_gpio_getcfg_s3c24xx_a, |
@@ -157,12 +152,13 @@ struct s3c_gpio_chip s3c24xx_gpios[] = { | |||
157 | [6] = { | 152 | [6] = { |
158 | .base = S3C2410_GPGCON, | 153 | .base = S3C2410_GPGCON, |
159 | .pm = __gpio_pm(&s3c_gpio_pm_2bit), | 154 | .pm = __gpio_pm(&s3c_gpio_pm_2bit), |
155 | .irq_base = IRQ_EINT8, | ||
160 | .chip = { | 156 | .chip = { |
161 | .base = S3C2410_GPG(0), | 157 | .base = S3C2410_GPG(0), |
162 | .owner = THIS_MODULE, | 158 | .owner = THIS_MODULE, |
163 | .label = "GPIOG", | 159 | .label = "GPIOG", |
164 | .ngpio = 16, | 160 | .ngpio = 16, |
165 | .to_irq = s3c24xx_gpiolib_bankg_toirq, | 161 | .to_irq = samsung_gpiolib_to_irq, |
166 | }, | 162 | }, |
167 | }, { | 163 | }, { |
168 | .base = S3C2410_GPHCON, | 164 | .base = S3C2410_GPHCON, |
diff --git a/arch/arm/plat-s5p/irq-gpioint.c b/arch/arm/plat-s5p/irq-gpioint.c index 32263a306c90..768fd39a3a98 100644 --- a/arch/arm/plat-s5p/irq-gpioint.c +++ b/arch/arm/plat-s5p/irq-gpioint.c | |||
@@ -234,6 +234,7 @@ int __init s5p_register_gpio_interrupt(int pin) | |||
234 | /* register gpio group */ | 234 | /* register gpio group */ |
235 | ret = s5p_gpioint_add(my_chip); | 235 | ret = s5p_gpioint_add(my_chip); |
236 | if (ret == 0) { | 236 | if (ret == 0) { |
237 | my_chip->chip.to_irq = samsung_gpiolib_to_irq; | ||
237 | printk(KERN_INFO "Registered interrupt support for gpio group %d.\n", | 238 | printk(KERN_INFO "Registered interrupt support for gpio group %d.\n", |
238 | group); | 239 | group); |
239 | return my_chip->irq_base + offset; | 240 | return my_chip->irq_base + offset; |
diff --git a/arch/arm/plat-samsung/gpio.c b/arch/arm/plat-samsung/gpio.c index b83a83351cea..7743c4b8b2fb 100644 --- a/arch/arm/plat-samsung/gpio.c +++ b/arch/arm/plat-samsung/gpio.c | |||
@@ -157,3 +157,11 @@ __init void s3c_gpiolib_add(struct s3c_gpio_chip *chip) | |||
157 | if (ret >= 0) | 157 | if (ret >= 0) |
158 | s3c_gpiolib_track(chip); | 158 | s3c_gpiolib_track(chip); |
159 | } | 159 | } |
160 | |||
161 | int samsung_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset) | ||
162 | { | ||
163 | struct s3c_gpio_chip *s3c_chip = container_of(chip, | ||
164 | struct s3c_gpio_chip, chip); | ||
165 | |||
166 | return s3c_chip->irq_base + offset; | ||
167 | } | ||
diff --git a/arch/arm/plat-samsung/include/plat/gpio-core.h b/arch/arm/plat-samsung/include/plat/gpio-core.h index c22c27ca675a..13a22b8861ef 100644 --- a/arch/arm/plat-samsung/include/plat/gpio-core.h +++ b/arch/arm/plat-samsung/include/plat/gpio-core.h | |||
@@ -122,6 +122,17 @@ extern void samsung_gpiolib_add_4bit2_chips(struct s3c_gpio_chip *chip, | |||
122 | extern void samsung_gpiolib_add_4bit(struct s3c_gpio_chip *chip); | 122 | extern void samsung_gpiolib_add_4bit(struct s3c_gpio_chip *chip); |
123 | extern void samsung_gpiolib_add_4bit2(struct s3c_gpio_chip *chip); | 123 | extern void samsung_gpiolib_add_4bit2(struct s3c_gpio_chip *chip); |
124 | 124 | ||
125 | |||
126 | /** | ||
127 | * samsung_gpiolib_to_irq - convert gpio pin to irq number | ||
128 | * @chip: The gpio chip that the pin belongs to. | ||
129 | * @offset: The offset of the pin in the chip. | ||
130 | * | ||
131 | * This helper returns the irq number calculated from the chip->irq_base and | ||
132 | * the provided offset. | ||
133 | */ | ||
134 | extern int samsung_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset); | ||
135 | |||
125 | /* exported for core SoC support to change */ | 136 | /* exported for core SoC support to change */ |
126 | extern struct s3c_gpio_cfg s3c24xx_gpiocfg_default; | 137 | extern struct s3c_gpio_cfg s3c24xx_gpiocfg_default; |
127 | 138 | ||