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authorLinus Torvalds <torvalds@linux-foundation.org>2012-03-29 21:02:10 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-03-29 21:02:10 -0400
commit820d41cf0cd0e94a5661e093821e2e5c6b36a9d8 (patch)
tree4d03046048dc52a8fa539c7e7b846e02738d8ca5 /arch
parent6268b325c3066234e7bddb99d2b98bcedb0c0033 (diff)
parent88b48684fe2d4f6207223423227c80d5408bccaf (diff)
Merge tag 'cleanup2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull "ARM: cleanups of io includes" from Olof Johansson: "Rob Herring has done a sweeping change cleaning up all of the mach/io.h includes, moving some of the oft-repeated macros to a common location and removing a bunch of boiler plate. This is another step closer to a common zImage for multiple platforms." Fix up various fairly trivial conflicts (<mach/io.h> removal vs changes around it, tegra localtimer.o is *still* gone, yadda-yadda). * tag 'cleanup2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (29 commits) ARM: tegra: Include assembler.h in sleep.S to fix build break ARM: pxa: use common IOMEM definition ARM: dma-mapping: convert ARCH_HAS_DMA_SET_COHERENT_MASK to kconfig symbol ARM: __io abuse cleanup ARM: create a common IOMEM definition ARM: iop13xx: fix missing declaration of iop13xx_init_early ARM: fix ioremap/iounmap for !CONFIG_MMU ARM: kill off __mem_pci ARM: remove bunch of now unused mach/io.h files ARM: make mach/io.h include optional ARM: clps711x: remove unneeded include of mach/io.h ARM: dove: add explicit include of dove.h to addr-map.c ARM: at91: add explicit include of hardware.h to uncompressor ARM: ep93xx: clean-up mach/io.h ARM: tegra: clean-up mach/io.h ARM: orion5x: clean-up mach/io.h ARM: davinci: remove unneeded mach/io.h include [media] davinci: remove includes of mach/io.h ARM: OMAP: Remove remaining includes for mach/io.h ARM: msm: clean-up mach/io.h ...
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/Kconfig27
-rw-r--r--arch/arm/include/asm/assembler.h2
-rw-r--r--arch/arm/include/asm/io.h71
-rw-r--r--arch/arm/kernel/debug.S1
-rw-r--r--arch/arm/kernel/entry-armv.S1
-rw-r--r--arch/arm/mach-at91/include/mach/io.h31
-rw-r--r--arch/arm/mach-at91/include/mach/uncompress.h1
-rw-r--r--arch/arm/mach-bcmring/include/mach/io.h33
-rw-r--r--arch/arm/mach-clps711x/include/mach/io.h36
-rw-r--r--arch/arm/mach-clps711x/include/mach/uncompress.h1
-rw-r--r--arch/arm/mach-cns3xxx/core.c8
-rw-r--r--arch/arm/mach-cns3xxx/devices.c2
-rw-r--r--arch/arm/mach-cns3xxx/include/mach/io.h17
-rw-r--r--arch/arm/mach-davinci/include/mach/entry-macro.S1
-rw-r--r--arch/arm/mach-davinci/include/mach/hardware.h6
-rw-r--r--arch/arm/mach-davinci/include/mach/io.h24
-rw-r--r--arch/arm/mach-davinci/include/mach/uncompress.h2
-rw-r--r--arch/arm/mach-dove/addr-map.c1
-rw-r--r--arch/arm/mach-dove/include/mach/io.h1
-rw-r--r--arch/arm/mach-ebsa110/core.c15
-rw-r--r--arch/arm/mach-ebsa110/include/mach/io.h9
-rw-r--r--arch/arm/mach-ep93xx/include/mach/io.h22
-rw-r--r--arch/arm/mach-exynos/include/mach/io.h26
-rw-r--r--arch/arm/mach-footbridge/include/mach/io.h13
-rw-r--r--arch/arm/mach-gemini/include/mach/io.h18
-rw-r--r--arch/arm/mach-h720x/include/mach/io.h22
-rw-r--r--arch/arm/mach-highbank/include/mach/io.h7
-rw-r--r--arch/arm/mach-imx/mm-imx3.c10
-rw-r--r--arch/arm/mach-integrator/include/mach/io.h1
-rw-r--r--arch/arm/mach-iop13xx/include/mach/io.h13
-rw-r--r--arch/arm/mach-iop13xx/include/mach/iop13xx.h1
-rw-r--r--arch/arm/mach-iop13xx/io.c20
-rw-r--r--arch/arm/mach-iop13xx/iq81340mc.c1
-rw-r--r--arch/arm/mach-iop13xx/iq81340sc.c1
-rw-r--r--arch/arm/mach-iop13xx/pci.h6
-rw-r--r--arch/arm/mach-iop32x/include/mach/io.h1
-rw-r--r--arch/arm/mach-iop33x/include/mach/io.h1
-rw-r--r--arch/arm/mach-ixp2000/include/mach/io.h1
-rw-r--r--arch/arm/mach-ixp23xx/include/mach/io.h1
-rw-r--r--arch/arm/mach-ixp4xx/avila-setup.c2
-rw-r--r--arch/arm/mach-ixp4xx/common.c33
-rw-r--r--arch/arm/mach-ixp4xx/coyote-setup.c2
-rw-r--r--arch/arm/mach-ixp4xx/dsmg600-setup.c1
-rw-r--r--arch/arm/mach-ixp4xx/fsg-setup.c1
-rw-r--r--arch/arm/mach-ixp4xx/gateway7001-setup.c1
-rw-r--r--arch/arm/mach-ixp4xx/goramo_mlr.c1
-rw-r--r--arch/arm/mach-ixp4xx/gtwx5715-setup.c1
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/hardware.h2
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/io.h24
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/platform.h1
-rw-r--r--arch/arm/mach-ixp4xx/ixdp425-setup.c4
-rw-r--r--arch/arm/mach-ixp4xx/nas100d-setup.c1
-rw-r--r--arch/arm/mach-ixp4xx/nslu2-setup.c1
-rw-r--r--arch/arm/mach-ixp4xx/omixp-setup.c3
-rw-r--r--arch/arm/mach-ixp4xx/vulcan-setup.c1
-rw-r--r--arch/arm/mach-ixp4xx/wg302v2-setup.c1
-rw-r--r--arch/arm/mach-kirkwood/include/mach/io.h2
-rw-r--r--arch/arm/mach-ks8695/include/mach/io.h19
-rw-r--r--arch/arm/mach-lpc32xx/include/mach/io.h27
-rw-r--r--arch/arm/mach-mmp/include/mach/addr-map.h6
-rw-r--r--arch/arm/mach-mmp/include/mach/io.h21
-rw-r--r--arch/arm/mach-msm/board-halibut.c6
-rw-r--r--arch/arm/mach-msm/board-trout.c6
-rw-r--r--arch/arm/mach-msm/include/mach/io.h36
-rw-r--r--arch/arm/mach-msm/include/mach/msm_iomap-7x00.h12
-rw-r--r--arch/arm/mach-msm/include/mach/msm_iomap-7x30.h4
-rw-r--r--arch/arm/mach-msm/include/mach/msm_iomap-8960.h4
-rw-r--r--arch/arm/mach-msm/include/mach/msm_iomap-8x50.h4
-rw-r--r--arch/arm/mach-msm/include/mach/msm_iomap-8x60.h4
-rw-r--r--arch/arm/mach-msm/include/mach/msm_iomap.h6
-rw-r--r--arch/arm/mach-msm/io.c8
-rw-r--r--arch/arm/mach-mv78xx0/include/mach/io.h2
-rw-r--r--arch/arm/mach-mxs/include/mach/hardware.h6
-rw-r--r--arch/arm/mach-mxs/include/mach/io.h22
-rw-r--r--arch/arm/mach-netx/generic.c2
-rw-r--r--arch/arm/mach-netx/include/mach/hardware.h2
-rw-r--r--arch/arm/mach-netx/include/mach/io.h28
-rw-r--r--arch/arm/mach-netx/include/mach/netx-regs.h16
-rw-r--r--arch/arm/mach-nomadik/include/mach/io.h22
-rw-r--r--arch/arm/mach-omap1/ams-delta-fiq-handler.S1
-rw-r--r--arch/arm/mach-omap1/include/mach/entry-macro.S1
-rw-r--r--arch/arm/mach-omap1/include/mach/io.h46
-rw-r--r--arch/arm/mach-omap1/iomap.h6
-rw-r--r--arch/arm/mach-omap1/sleep.S2
-rw-r--r--arch/arm/mach-omap1/sram.S1
-rw-r--r--arch/arm/mach-omap2/clock3xxx_data.c1
-rw-r--r--arch/arm/mach-omap2/clock44xx_data.c1
-rw-r--r--arch/arm/mach-omap2/include/mach/io.h49
-rw-r--r--arch/arm/mach-omap2/iomap.h6
-rw-r--r--arch/arm/mach-orion5x/common.h9
-rw-r--r--arch/arm/mach-orion5x/include/mach/io.h33
-rw-r--r--arch/arm/mach-orion5x/pci.c1
-rw-r--r--arch/arm/mach-orion5x/tsx09-common.c1
-rw-r--r--arch/arm/mach-picoxcell/include/mach/io.h22
-rw-r--r--arch/arm/mach-pnx4008/include/mach/io.h21
-rw-r--r--arch/arm/mach-prima2/include/mach/io.h16
-rw-r--r--arch/arm/mach-pxa/Kconfig1
-rw-r--r--arch/arm/mach-pxa/clock-pxa2xx.c1
-rw-r--r--arch/arm/mach-pxa/corgi_pm.c1
-rw-r--r--arch/arm/mach-pxa/cpufreq-pxa3xx.c1
-rw-r--r--arch/arm/mach-pxa/include/mach/hardware.h6
-rw-r--r--arch/arm/mach-pxa/include/mach/io.h20
-rw-r--r--arch/arm/mach-pxa/mfp-pxa2xx.c1
-rw-r--r--arch/arm/mach-pxa/pxa2xx.c1
-rw-r--r--arch/arm/mach-pxa/pxa300.c1
-rw-r--r--arch/arm/mach-pxa/pxa320.c1
-rw-r--r--arch/arm/mach-pxa/sharpsl_pm.c1
-rw-r--r--arch/arm/mach-realview/include/mach/hardware.h2
-rw-r--r--arch/arm/mach-realview/include/mach/io.h28
-rw-r--r--arch/arm/mach-rpc/include/mach/hardware.h6
-rw-r--r--arch/arm/mach-rpc/include/mach/io.h5
-rw-r--r--arch/arm/mach-s3c24xx/include/mach/io.h5
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/io.h18
-rw-r--r--arch/arm/mach-s5p64x0/include/mach/io.h25
-rw-r--r--arch/arm/mach-s5pc100/include/mach/io.h18
-rw-r--r--arch/arm/mach-s5pv210/include/mach/io.h26
-rw-r--r--arch/arm/mach-sa1100/include/mach/io.h20
-rw-r--r--arch/arm/mach-shark/include/mach/io.h2
-rw-r--r--arch/arm/mach-shmobile/board-ag5evm.c2
-rw-r--r--arch/arm/mach-shmobile/board-bonito.c2
-rw-r--r--arch/arm/mach-shmobile/board-kota2.c2
-rw-r--r--arch/arm/mach-shmobile/include/mach/io.h9
-rw-r--r--arch/arm/mach-shmobile/intc-r8a7779.c4
-rw-r--r--arch/arm/mach-shmobile/intc-sh73a0.c4
-rw-r--r--arch/arm/mach-shmobile/smp-r8a7779.c4
-rw-r--r--arch/arm/mach-shmobile/smp-sh73a0.c20
-rw-r--r--arch/arm/mach-spear3xx/clock.c1
-rw-r--r--arch/arm/mach-spear3xx/include/mach/io.h19
-rw-r--r--arch/arm/mach-spear6xx/clock.c1
-rw-r--r--arch/arm/mach-spear6xx/include/mach/io.h20
-rw-r--r--arch/arm/mach-tegra/include/mach/debug-macro.S1
-rw-r--r--arch/arm/mach-tegra/include/mach/io.h49
-rw-r--r--arch/arm/mach-tegra/include/mach/iomap.h42
-rw-r--r--arch/arm/mach-tegra/io.c1
-rw-r--r--arch/arm/mach-tegra/sleep.S4
-rw-r--r--arch/arm/mach-u300/include/mach/io.h20
-rw-r--r--arch/arm/mach-u300/include/mach/u300-regs.h6
-rw-r--r--arch/arm/mach-ux500/include/mach/hardware.h2
-rw-r--r--arch/arm/mach-ux500/include/mach/io.h22
-rw-r--r--arch/arm/mach-versatile/include/mach/io.h28
-rw-r--r--arch/arm/mach-vexpress/include/mach/io.h25
-rw-r--r--arch/arm/mach-vt8500/include/mach/io.h26
-rw-r--r--arch/arm/mach-w90x900/include/mach/io.h30
-rw-r--r--arch/arm/mach-zynq/include/mach/io.h33
-rw-r--r--arch/arm/mm/ioremap.c17
-rw-r--r--arch/arm/mm/nommu.c8
-rw-r--r--arch/arm/plat-mxc/include/mach/hardware.h7
-rw-r--r--arch/arm/plat-mxc/include/mach/io.h39
-rw-r--r--arch/arm/plat-omap/include/plat/hardware.h6
-rw-r--r--arch/arm/plat-omap/include/plat/sdrc.h1
-rw-r--r--arch/arm/plat-omap/include/plat/usb.h1
-rw-r--r--arch/arm/plat-spear/include/plat/hardware.h6
-rw-r--r--arch/arm/plat-spear/include/plat/io.h22
153 files changed, 330 insertions, 1361 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 242f3a33d741..93180845ae16 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -179,6 +179,9 @@ config ZONE_DMA
179config NEED_DMA_MAP_STATE 179config NEED_DMA_MAP_STATE
180 def_bool y 180 def_bool y
181 181
182config ARCH_HAS_DMA_SET_COHERENT_MASK
183 bool
184
182config GENERIC_ISA_DMA 185config GENERIC_ISA_DMA
183 bool 186 bool
184 187
@@ -216,6 +219,13 @@ config ARM_PATCH_PHYS_VIRT
216 this feature (eg, building a kernel for a single machine) and 219 this feature (eg, building a kernel for a single machine) and
217 you need to shrink the kernel to the minimal size. 220 you need to shrink the kernel to the minimal size.
218 221
222config NEED_MACH_IO_H
223 bool
224 help
225 Select this when mach/io.h is required to provide special
226 definitions for this platform. The need for mach/io.h should
227 be avoided when possible.
228
219config NEED_MACH_MEMORY_H 229config NEED_MACH_MEMORY_H
220 bool 230 bool
221 help 231 help
@@ -267,6 +277,7 @@ config ARCH_INTEGRATOR
267 select GENERIC_CLOCKEVENTS 277 select GENERIC_CLOCKEVENTS
268 select PLAT_VERSATILE 278 select PLAT_VERSATILE
269 select PLAT_VERSATILE_FPGA_IRQ 279 select PLAT_VERSATILE_FPGA_IRQ
280 select NEED_MACH_IO_H
270 select NEED_MACH_MEMORY_H 281 select NEED_MACH_MEMORY_H
271 select SPARSE_IRQ 282 select SPARSE_IRQ
272 help 283 help
@@ -406,6 +417,7 @@ config ARCH_EBSA110
406 select ISA 417 select ISA
407 select NO_IOPORT 418 select NO_IOPORT
408 select ARCH_USES_GETTIMEOFFSET 419 select ARCH_USES_GETTIMEOFFSET
420 select NEED_MACH_IO_H
409 select NEED_MACH_MEMORY_H 421 select NEED_MACH_MEMORY_H
410 help 422 help
411 This is an evaluation board for the StrongARM processor available 423 This is an evaluation board for the StrongARM processor available
@@ -432,6 +444,7 @@ config ARCH_FOOTBRIDGE
432 select FOOTBRIDGE 444 select FOOTBRIDGE
433 select GENERIC_CLOCKEVENTS 445 select GENERIC_CLOCKEVENTS
434 select HAVE_IDE 446 select HAVE_IDE
447 select NEED_MACH_IO_H
435 select NEED_MACH_MEMORY_H 448 select NEED_MACH_MEMORY_H
436 help 449 help
437 Support for systems based on the DC21285 companion chip 450 Support for systems based on the DC21285 companion chip
@@ -483,6 +496,7 @@ config ARCH_IOP13XX
483 select PCI 496 select PCI
484 select ARCH_SUPPORTS_MSI 497 select ARCH_SUPPORTS_MSI
485 select VMSPLIT_1G 498 select VMSPLIT_1G
499 select NEED_MACH_IO_H
486 select NEED_MACH_MEMORY_H 500 select NEED_MACH_MEMORY_H
487 select NEED_RET_TO_USER 501 select NEED_RET_TO_USER
488 help 502 help
@@ -492,6 +506,7 @@ config ARCH_IOP32X
492 bool "IOP32x-based" 506 bool "IOP32x-based"
493 depends on MMU 507 depends on MMU
494 select CPU_XSCALE 508 select CPU_XSCALE
509 select NEED_MACH_IO_H
495 select NEED_RET_TO_USER 510 select NEED_RET_TO_USER
496 select PLAT_IOP 511 select PLAT_IOP
497 select PCI 512 select PCI
@@ -504,6 +519,7 @@ config ARCH_IOP33X
504 bool "IOP33x-based" 519 bool "IOP33x-based"
505 depends on MMU 520 depends on MMU
506 select CPU_XSCALE 521 select CPU_XSCALE
522 select NEED_MACH_IO_H
507 select NEED_RET_TO_USER 523 select NEED_RET_TO_USER
508 select PLAT_IOP 524 select PLAT_IOP
509 select PCI 525 select PCI
@@ -517,6 +533,7 @@ config ARCH_IXP23XX
517 select CPU_XSC3 533 select CPU_XSC3
518 select PCI 534 select PCI
519 select ARCH_USES_GETTIMEOFFSET 535 select ARCH_USES_GETTIMEOFFSET
536 select NEED_MACH_IO_H
520 select NEED_MACH_MEMORY_H 537 select NEED_MACH_MEMORY_H
521 help 538 help
522 Support for Intel's IXP23xx (XScale) family of processors. 539 Support for Intel's IXP23xx (XScale) family of processors.
@@ -527,6 +544,7 @@ config ARCH_IXP2000
527 select CPU_XSCALE 544 select CPU_XSCALE
528 select PCI 545 select PCI
529 select ARCH_USES_GETTIMEOFFSET 546 select ARCH_USES_GETTIMEOFFSET
547 select NEED_MACH_IO_H
530 select NEED_MACH_MEMORY_H 548 select NEED_MACH_MEMORY_H
531 help 549 help
532 Support for Intel's IXP2400/2800 (XScale) family of processors. 550 Support for Intel's IXP2400/2800 (XScale) family of processors.
@@ -534,11 +552,13 @@ config ARCH_IXP2000
534config ARCH_IXP4XX 552config ARCH_IXP4XX
535 bool "IXP4xx-based" 553 bool "IXP4xx-based"
536 depends on MMU 554 depends on MMU
555 select ARCH_HAS_DMA_SET_COHERENT_MASK
537 select CLKSRC_MMIO 556 select CLKSRC_MMIO
538 select CPU_XSCALE 557 select CPU_XSCALE
539 select GENERIC_GPIO 558 select GENERIC_GPIO
540 select GENERIC_CLOCKEVENTS 559 select GENERIC_CLOCKEVENTS
541 select MIGHT_HAVE_PCI 560 select MIGHT_HAVE_PCI
561 select NEED_MACH_IO_H
542 select DMABOUNCE if PCI 562 select DMABOUNCE if PCI
543 help 563 help
544 Support for Intel's IXP4XX (XScale) family of processors. 564 Support for Intel's IXP4XX (XScale) family of processors.
@@ -549,6 +569,7 @@ config ARCH_DOVE
549 select PCI 569 select PCI
550 select ARCH_REQUIRE_GPIOLIB 570 select ARCH_REQUIRE_GPIOLIB
551 select GENERIC_CLOCKEVENTS 571 select GENERIC_CLOCKEVENTS
572 select NEED_MACH_IO_H
552 select PLAT_ORION 573 select PLAT_ORION
553 help 574 help
554 Support for the Marvell Dove SoC 88AP510 575 Support for the Marvell Dove SoC 88AP510
@@ -559,6 +580,7 @@ config ARCH_KIRKWOOD
559 select PCI 580 select PCI
560 select ARCH_REQUIRE_GPIOLIB 581 select ARCH_REQUIRE_GPIOLIB
561 select GENERIC_CLOCKEVENTS 582 select GENERIC_CLOCKEVENTS
583 select NEED_MACH_IO_H
562 select PLAT_ORION 584 select PLAT_ORION
563 help 585 help
564 Support for the following Marvell Kirkwood series SoCs: 586 Support for the following Marvell Kirkwood series SoCs:
@@ -583,6 +605,7 @@ config ARCH_MV78XX0
583 select PCI 605 select PCI
584 select ARCH_REQUIRE_GPIOLIB 606 select ARCH_REQUIRE_GPIOLIB
585 select GENERIC_CLOCKEVENTS 607 select GENERIC_CLOCKEVENTS
608 select NEED_MACH_IO_H
586 select PLAT_ORION 609 select PLAT_ORION
587 help 610 help
588 Support for the following Marvell MV78xx0 series SoCs: 611 Support for the following Marvell MV78xx0 series SoCs:
@@ -650,6 +673,7 @@ config ARCH_TEGRA
650 select HAVE_CLK 673 select HAVE_CLK
651 select HAVE_SMP 674 select HAVE_SMP
652 select MIGHT_HAVE_CACHE_L2X0 675 select MIGHT_HAVE_CACHE_L2X0
676 select NEED_MACH_IO_H if PCI
653 select ARCH_HAS_CPUFREQ 677 select ARCH_HAS_CPUFREQ
654 help 678 help
655 This enables support for NVIDIA Tegra based systems (Tegra APX, 679 This enables support for NVIDIA Tegra based systems (Tegra APX,
@@ -741,6 +765,7 @@ config ARCH_RPC
741 select ARCH_SPARSEMEM_ENABLE 765 select ARCH_SPARSEMEM_ENABLE
742 select ARCH_USES_GETTIMEOFFSET 766 select ARCH_USES_GETTIMEOFFSET
743 select HAVE_IDE 767 select HAVE_IDE
768 select NEED_MACH_IO_H
744 select NEED_MACH_MEMORY_H 769 select NEED_MACH_MEMORY_H
745 help 770 help
746 On the Acorn Risc-PC, Linux can support the internal IDE disk and 771 On the Acorn Risc-PC, Linux can support the internal IDE disk and
@@ -775,6 +800,7 @@ config ARCH_S3C24XX
775 select HAVE_S3C2410_I2C if I2C 800 select HAVE_S3C2410_I2C if I2C
776 select HAVE_S3C_RTC if RTC_CLASS 801 select HAVE_S3C_RTC if RTC_CLASS
777 select HAVE_S3C2410_WATCHDOG if WATCHDOG 802 select HAVE_S3C2410_WATCHDOG if WATCHDOG
803 select NEED_MACH_IO_H
778 help 804 help
779 Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443 805 Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
780 and S3C2450 SoCs based systems, such as the Simtec Electronics BAST 806 and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
@@ -876,6 +902,7 @@ config ARCH_SHARK
876 select PCI 902 select PCI
877 select ARCH_USES_GETTIMEOFFSET 903 select ARCH_USES_GETTIMEOFFSET
878 select NEED_MACH_MEMORY_H 904 select NEED_MACH_MEMORY_H
905 select NEED_MACH_IO_H
879 help 906 help
880 Support for the StrongARM based Digital DNARD machine, also known 907 Support for the StrongARM based Digital DNARD machine, also known
881 as "Shark" (<http://www.shark-linux.de/shark.html>). 908 as "Shark" (<http://www.shark-linux.de/shark.html>).
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
index 23371b17b23e..03fb93621d0d 100644
--- a/arch/arm/include/asm/assembler.h
+++ b/arch/arm/include/asm/assembler.h
@@ -23,6 +23,8 @@
23#include <asm/ptrace.h> 23#include <asm/ptrace.h>
24#include <asm/domain.h> 24#include <asm/domain.h>
25 25
26#define IOMEM(x) (x)
27
26/* 28/*
27 * Endian independent macros for shifting bytes within registers. 29 * Endian independent macros for shifting bytes within registers.
28 */ 30 */
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index bae7eb6011d2..df0ac0bb39aa 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -82,6 +82,11 @@ extern void __iomem *__arm_ioremap_pfn(unsigned long, unsigned long, size_t, uns
82extern void __iomem *__arm_ioremap(unsigned long, size_t, unsigned int); 82extern void __iomem *__arm_ioremap(unsigned long, size_t, unsigned int);
83extern void __iomem *__arm_ioremap_exec(unsigned long, size_t, bool cached); 83extern void __iomem *__arm_ioremap_exec(unsigned long, size_t, bool cached);
84extern void __iounmap(volatile void __iomem *addr); 84extern void __iounmap(volatile void __iomem *addr);
85extern void __arm_iounmap(volatile void __iomem *addr);
86
87extern void __iomem * (*arch_ioremap_caller)(unsigned long, size_t,
88 unsigned int, void *);
89extern void (*arch_iounmap)(volatile void __iomem *);
85 90
86/* 91/*
87 * Bad read/write accesses... 92 * Bad read/write accesses...
@@ -96,6 +101,8 @@ static inline void __iomem *__typesafe_io(unsigned long addr)
96 return (void __iomem *)addr; 101 return (void __iomem *)addr;
97} 102}
98 103
104#define IOMEM(x) ((void __force __iomem *)(x))
105
99/* IO barriers */ 106/* IO barriers */
100#ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE 107#ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE
101#include <asm/barrier.h> 108#include <asm/barrier.h>
@@ -109,7 +116,11 @@ static inline void __iomem *__typesafe_io(unsigned long addr)
109/* 116/*
110 * Now, pick up the machine-defined IO definitions 117 * Now, pick up the machine-defined IO definitions
111 */ 118 */
119#ifdef CONFIG_NEED_MACH_IO_H
112#include <mach/io.h> 120#include <mach/io.h>
121#else
122#define __io(a) ({ (void)(a); __typesafe_io(0); })
123#endif
113 124
114/* 125/*
115 * This is the limit of PC card/PCI/ISA IO space, which is by default 126 * This is the limit of PC card/PCI/ISA IO space, which is by default
@@ -211,18 +222,18 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
211 * Again, this are defined to perform little endian accesses. See the 222 * Again, this are defined to perform little endian accesses. See the
212 * IO port primitives for more information. 223 * IO port primitives for more information.
213 */ 224 */
214#ifdef __mem_pci 225#ifndef readl
215#define readb_relaxed(c) ({ u8 __r = __raw_readb(__mem_pci(c)); __r; }) 226#define readb_relaxed(c) ({ u8 __r = __raw_readb(c); __r; })
216#define readw_relaxed(c) ({ u16 __r = le16_to_cpu((__force __le16) \ 227#define readw_relaxed(c) ({ u16 __r = le16_to_cpu((__force __le16) \
217 __raw_readw(__mem_pci(c))); __r; }) 228 __raw_readw(c)); __r; })
218#define readl_relaxed(c) ({ u32 __r = le32_to_cpu((__force __le32) \ 229#define readl_relaxed(c) ({ u32 __r = le32_to_cpu((__force __le32) \
219 __raw_readl(__mem_pci(c))); __r; }) 230 __raw_readl(c)); __r; })
220 231
221#define writeb_relaxed(v,c) ((void)__raw_writeb(v,__mem_pci(c))) 232#define writeb_relaxed(v,c) ((void)__raw_writeb(v,c))
222#define writew_relaxed(v,c) ((void)__raw_writew((__force u16) \ 233#define writew_relaxed(v,c) ((void)__raw_writew((__force u16) \
223 cpu_to_le16(v),__mem_pci(c))) 234 cpu_to_le16(v),c))
224#define writel_relaxed(v,c) ((void)__raw_writel((__force u32) \ 235#define writel_relaxed(v,c) ((void)__raw_writel((__force u32) \
225 cpu_to_le32(v),__mem_pci(c))) 236 cpu_to_le32(v),c))
226 237
227#define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; }) 238#define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; })
228#define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; }) 239#define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; })
@@ -232,30 +243,19 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
232#define writew(v,c) ({ __iowmb(); writew_relaxed(v,c); }) 243#define writew(v,c) ({ __iowmb(); writew_relaxed(v,c); })
233#define writel(v,c) ({ __iowmb(); writel_relaxed(v,c); }) 244#define writel(v,c) ({ __iowmb(); writel_relaxed(v,c); })
234 245
235#define readsb(p,d,l) __raw_readsb(__mem_pci(p),d,l) 246#define readsb(p,d,l) __raw_readsb(p,d,l)
236#define readsw(p,d,l) __raw_readsw(__mem_pci(p),d,l) 247#define readsw(p,d,l) __raw_readsw(p,d,l)
237#define readsl(p,d,l) __raw_readsl(__mem_pci(p),d,l) 248#define readsl(p,d,l) __raw_readsl(p,d,l)
238
239#define writesb(p,d,l) __raw_writesb(__mem_pci(p),d,l)
240#define writesw(p,d,l) __raw_writesw(__mem_pci(p),d,l)
241#define writesl(p,d,l) __raw_writesl(__mem_pci(p),d,l)
242 249
243#define memset_io(c,v,l) _memset_io(__mem_pci(c),(v),(l)) 250#define writesb(p,d,l) __raw_writesb(p,d,l)
244#define memcpy_fromio(a,c,l) _memcpy_fromio((a),__mem_pci(c),(l)) 251#define writesw(p,d,l) __raw_writesw(p,d,l)
245#define memcpy_toio(c,a,l) _memcpy_toio(__mem_pci(c),(a),(l)) 252#define writesl(p,d,l) __raw_writesl(p,d,l)
246 253
247#elif !defined(readb) 254#define memset_io(c,v,l) _memset_io(c,(v),(l))
255#define memcpy_fromio(a,c,l) _memcpy_fromio((a),c,(l))
256#define memcpy_toio(c,a,l) _memcpy_toio(c,(a),(l))
248 257
249#define readb(c) (__readwrite_bug("readb"),0) 258#endif /* readl */
250#define readw(c) (__readwrite_bug("readw"),0)
251#define readl(c) (__readwrite_bug("readl"),0)
252#define writeb(v,c) __readwrite_bug("writeb")
253#define writew(v,c) __readwrite_bug("writew")
254#define writel(v,c) __readwrite_bug("writel")
255
256#define check_signature(io,sig,len) (0)
257
258#endif /* __mem_pci */
259 259
260/* 260/*
261 * ioremap and friends. 261 * ioremap and friends.
@@ -264,16 +264,11 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
264 * Documentation/io-mapping.txt. 264 * Documentation/io-mapping.txt.
265 * 265 *
266 */ 266 */
267#ifndef __arch_ioremap 267#define ioremap(cookie,size) __arm_ioremap((cookie), (size), MT_DEVICE)
268#define __arch_ioremap __arm_ioremap 268#define ioremap_nocache(cookie,size) __arm_ioremap((cookie), (size), MT_DEVICE)
269#define __arch_iounmap __iounmap 269#define ioremap_cached(cookie,size) __arm_ioremap((cookie), (size), MT_DEVICE_CACHED)
270#endif 270#define ioremap_wc(cookie,size) __arm_ioremap((cookie), (size), MT_DEVICE_WC)
271 271#define iounmap __arm_iounmap
272#define ioremap(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE)
273#define ioremap_nocache(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE)
274#define ioremap_cached(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE_CACHED)
275#define ioremap_wc(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE_WC)
276#define iounmap __arch_iounmap
277 272
278/* 273/*
279 * io{read,write}{8,16,32} macros 274 * io{read,write}{8,16,32} macros
diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S
index e5a765c5f06a..c45522c36787 100644
--- a/arch/arm/kernel/debug.S
+++ b/arch/arm/kernel/debug.S
@@ -10,6 +10,7 @@
10 * 32-bit debugging code 10 * 32-bit debugging code
11 */ 11 */
12#include <linux/linkage.h> 12#include <linux/linkage.h>
13#include <asm/assembler.h>
13 14
14 .text 15 .text
15 16
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 8ec5eed55e37..7fd3ad048da9 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -15,6 +15,7 @@
15 * that causes it to save wrong values... Be aware! 15 * that causes it to save wrong values... Be aware!
16 */ 16 */
17 17
18#include <asm/assembler.h>
18#include <asm/memory.h> 19#include <asm/memory.h>
19#include <asm/glue-df.h> 20#include <asm/glue-df.h>
20#include <asm/glue-pf.h> 21#include <asm/glue-pf.h>
diff --git a/arch/arm/mach-at91/include/mach/io.h b/arch/arm/mach-at91/include/mach/io.h
deleted file mode 100644
index 4003001eca3d..000000000000
--- a/arch/arm/mach-at91/include/mach/io.h
+++ /dev/null
@@ -1,31 +0,0 @@
1/*
2 * arch/arm/mach-at91/include/mach/io.h
3 *
4 * Copyright (C) 2003 SAN People
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#ifndef __ASM_ARCH_IO_H
22#define __ASM_ARCH_IO_H
23
24#include <mach/hardware.h>
25
26#define IO_SPACE_LIMIT 0xFFFFFFFF
27
28#define __io(a) __typesafe_io(a)
29#define __mem_pci(a) (a)
30
31#endif
diff --git a/arch/arm/mach-at91/include/mach/uncompress.h b/arch/arm/mach-at91/include/mach/uncompress.h
index 0234fd9d20d6..4218647c1fcd 100644
--- a/arch/arm/mach-at91/include/mach/uncompress.h
+++ b/arch/arm/mach-at91/include/mach/uncompress.h
@@ -23,6 +23,7 @@
23 23
24#include <linux/io.h> 24#include <linux/io.h>
25#include <linux/atmel_serial.h> 25#include <linux/atmel_serial.h>
26#include <mach/hardware.h>
26 27
27#if defined(CONFIG_AT91_EARLY_DBGU0) 28#if defined(CONFIG_AT91_EARLY_DBGU0)
28#define UART_OFFSET AT91_BASE_DBGU0 29#define UART_OFFSET AT91_BASE_DBGU0
diff --git a/arch/arm/mach-bcmring/include/mach/io.h b/arch/arm/mach-bcmring/include/mach/io.h
deleted file mode 100644
index dae5e9b166ea..000000000000
--- a/arch/arm/mach-bcmring/include/mach/io.h
+++ /dev/null
@@ -1,33 +0,0 @@
1/*
2 *
3 * Copyright (C) 1999 ARM Limited
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19#ifndef __ASM_ARM_ARCH_IO_H
20#define __ASM_ARM_ARCH_IO_H
21
22#include <mach/hardware.h>
23
24#define IO_SPACE_LIMIT 0xffffffff
25
26/*
27 * We don't actually have real ISA nor PCI buses, but there is so many
28 * drivers out there that might just work if we fake them...
29 */
30#define __io(a) __typesafe_io(a)
31#define __mem_pci(a) (a)
32
33#endif
diff --git a/arch/arm/mach-clps711x/include/mach/io.h b/arch/arm/mach-clps711x/include/mach/io.h
deleted file mode 100644
index 2e0b3ced8f07..000000000000
--- a/arch/arm/mach-clps711x/include/mach/io.h
+++ /dev/null
@@ -1,36 +0,0 @@
1/*
2 * arch/arm/mach-clps711x/include/mach/io.h
3 *
4 * Copyright (C) 1999 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef __ASM_ARM_ARCH_IO_H
21#define __ASM_ARM_ARCH_IO_H
22
23#define IO_SPACE_LIMIT 0xffffffff
24
25#define __io(a) __typesafe_io(a)
26#define __mem_pci(a) (a)
27
28/*
29 * We don't support ins[lb]/outs[lb]. Make them fault.
30 */
31#define __raw_readsb(p,d,l) do { *(int *)0 = 0; } while (0)
32#define __raw_readsl(p,d,l) do { *(int *)0 = 0; } while (0)
33#define __raw_writesb(p,d,l) do { *(int *)0 = 0; } while (0)
34#define __raw_writesl(p,d,l) do { *(int *)0 = 0; } while (0)
35
36#endif
diff --git a/arch/arm/mach-clps711x/include/mach/uncompress.h b/arch/arm/mach-clps711x/include/mach/uncompress.h
index 7164310dea7c..35ed731b9f16 100644
--- a/arch/arm/mach-clps711x/include/mach/uncompress.h
+++ b/arch/arm/mach-clps711x/include/mach/uncompress.h
@@ -17,7 +17,6 @@
17 * along with this program; if not, write to the Free Software 17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */ 19 */
20#include <mach/io.h>
21#include <mach/hardware.h> 20#include <mach/hardware.h>
22#include <asm/hardware/clps7111.h> 21#include <asm/hardware/clps7111.h>
23 22
diff --git a/arch/arm/mach-cns3xxx/core.c b/arch/arm/mach-cns3xxx/core.c
index 941a308e1253..031805b1428d 100644
--- a/arch/arm/mach-cns3xxx/core.c
+++ b/arch/arm/mach-cns3xxx/core.c
@@ -72,13 +72,13 @@ void __init cns3xxx_map_io(void)
72/* used by entry-macro.S */ 72/* used by entry-macro.S */
73void __init cns3xxx_init_irq(void) 73void __init cns3xxx_init_irq(void)
74{ 74{
75 gic_init(0, 29, __io(CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT), 75 gic_init(0, 29, IOMEM(CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT),
76 __io(CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT)); 76 IOMEM(CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT));
77} 77}
78 78
79void cns3xxx_power_off(void) 79void cns3xxx_power_off(void)
80{ 80{
81 u32 __iomem *pm_base = __io(CNS3XXX_PM_BASE_VIRT); 81 u32 __iomem *pm_base = IOMEM(CNS3XXX_PM_BASE_VIRT);
82 u32 clkctrl; 82 u32 clkctrl;
83 83
84 printk(KERN_INFO "powering system down...\n"); 84 printk(KERN_INFO "powering system down...\n");
@@ -237,7 +237,7 @@ static void __init __cns3xxx_timer_init(unsigned int timer_irq)
237 237
238static void __init cns3xxx_timer_init(void) 238static void __init cns3xxx_timer_init(void)
239{ 239{
240 cns3xxx_tmr1 = __io(CNS3XXX_TIMER1_2_3_BASE_VIRT); 240 cns3xxx_tmr1 = IOMEM(CNS3XXX_TIMER1_2_3_BASE_VIRT);
241 241
242 __cns3xxx_timer_init(IRQ_CNS3XXX_TIMER0); 242 __cns3xxx_timer_init(IRQ_CNS3XXX_TIMER0);
243} 243}
diff --git a/arch/arm/mach-cns3xxx/devices.c b/arch/arm/mach-cns3xxx/devices.c
index 79d1fb02c23f..1e40c99b015f 100644
--- a/arch/arm/mach-cns3xxx/devices.c
+++ b/arch/arm/mach-cns3xxx/devices.c
@@ -98,7 +98,7 @@ static struct platform_device cns3xxx_sdhci_pdev = {
98 98
99void __init cns3xxx_sdhci_init(void) 99void __init cns3xxx_sdhci_init(void)
100{ 100{
101 u32 __iomem *gpioa = __io(CNS3XXX_MISC_BASE_VIRT + 0x0014); 101 u32 __iomem *gpioa = IOMEM(CNS3XXX_MISC_BASE_VIRT + 0x0014);
102 u32 gpioa_pins = __raw_readl(gpioa); 102 u32 gpioa_pins = __raw_readl(gpioa);
103 103
104 /* MMC/SD pins share with GPIOA */ 104 /* MMC/SD pins share with GPIOA */
diff --git a/arch/arm/mach-cns3xxx/include/mach/io.h b/arch/arm/mach-cns3xxx/include/mach/io.h
deleted file mode 100644
index 33b6fc1ece7c..000000000000
--- a/arch/arm/mach-cns3xxx/include/mach/io.h
+++ /dev/null
@@ -1,17 +0,0 @@
1/*
2 * Copyright 2008 Cavium Networks
3 * Copyright 2003 ARM Limited
4 *
5 * This file is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License, Version 2, as
7 * published by the Free Software Foundation.
8 */
9#ifndef __MACH_IO_H
10#define __MACH_IO_H
11
12#define IO_SPACE_LIMIT 0xffffffff
13
14#define __io(a) __typesafe_io(a)
15#define __mem_pci(a) (a)
16
17#endif
diff --git a/arch/arm/mach-davinci/include/mach/entry-macro.S b/arch/arm/mach-davinci/include/mach/entry-macro.S
index c1661d2feca9..768b3c060214 100644
--- a/arch/arm/mach-davinci/include/mach/entry-macro.S
+++ b/arch/arm/mach-davinci/include/mach/entry-macro.S
@@ -8,7 +8,6 @@
8 * is licensed "as is" without any warranty of any kind, whether express 8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied. 9 * or implied.
10 */ 10 */
11#include <mach/io.h>
12#include <mach/irqs.h> 11#include <mach/irqs.h>
13 12
14 .macro get_irqnr_preamble, base, tmp 13 .macro get_irqnr_preamble, base, tmp
diff --git a/arch/arm/mach-davinci/include/mach/hardware.h b/arch/arm/mach-davinci/include/mach/hardware.h
index 0209b1fc22a1..2184691ebc2f 100644
--- a/arch/arm/mach-davinci/include/mach/hardware.h
+++ b/arch/arm/mach-davinci/include/mach/hardware.h
@@ -30,10 +30,4 @@
30#define __IO_ADDRESS(x) ((x) + IO_OFFSET) 30#define __IO_ADDRESS(x) ((x) + IO_OFFSET)
31#define IO_ADDRESS(pa) IOMEM(__IO_ADDRESS(pa)) 31#define IO_ADDRESS(pa) IOMEM(__IO_ADDRESS(pa))
32 32
33#ifdef __ASSEMBLER__
34#define IOMEM(x) x
35#else
36#define IOMEM(x) ((void __force __iomem *)(x))
37#endif
38
39#endif /* __ASM_ARCH_HARDWARE_H */ 33#endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-davinci/include/mach/io.h b/arch/arm/mach-davinci/include/mach/io.h
deleted file mode 100644
index b2267d1e1a71..000000000000
--- a/arch/arm/mach-davinci/include/mach/io.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 * DaVinci IO address definitions
3 *
4 * Copied from include/asm/arm/arch-omap/io.h
5 *
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 */
11#ifndef __ASM_ARCH_IO_H
12#define __ASM_ARCH_IO_H
13
14#define IO_SPACE_LIMIT 0xffffffff
15
16/*
17 * We don't actually have real ISA nor PCI buses, but there is so many
18 * drivers out there that might just work if we fake them...
19 */
20#define __io(a) __typesafe_io(a)
21#define __mem_pci(a) (a)
22#define __mem_isa(a) (a)
23
24#endif /* __ASM_ARCH_IO_H */
diff --git a/arch/arm/mach-davinci/include/mach/uncompress.h b/arch/arm/mach-davinci/include/mach/uncompress.h
index 9dc7cf9664fe..da2fb2c2155a 100644
--- a/arch/arm/mach-davinci/include/mach/uncompress.h
+++ b/arch/arm/mach-davinci/include/mach/uncompress.h
@@ -25,6 +25,8 @@
25 25
26#include <mach/serial.h> 26#include <mach/serial.h>
27 27
28#define IOMEM(x) ((void __force __iomem *)(x))
29
28u32 *uart; 30u32 *uart;
29 31
30/* PORT_16C550A, in polled non-fifo mode */ 32/* PORT_16C550A, in polled non-fifo mode */
diff --git a/arch/arm/mach-dove/addr-map.c b/arch/arm/mach-dove/addr-map.c
index 98b8c83b09ab..2a06c0163418 100644
--- a/arch/arm/mach-dove/addr-map.c
+++ b/arch/arm/mach-dove/addr-map.c
@@ -14,6 +14,7 @@
14#include <linux/io.h> 14#include <linux/io.h>
15#include <asm/mach/arch.h> 15#include <asm/mach/arch.h>
16#include <asm/setup.h> 16#include <asm/setup.h>
17#include <mach/dove.h>
17#include <plat/addr-map.h> 18#include <plat/addr-map.h>
18#include "common.h" 19#include "common.h"
19 20
diff --git a/arch/arm/mach-dove/include/mach/io.h b/arch/arm/mach-dove/include/mach/io.h
index eb4936ff90ad..29c8b85355a5 100644
--- a/arch/arm/mach-dove/include/mach/io.h
+++ b/arch/arm/mach-dove/include/mach/io.h
@@ -15,6 +15,5 @@
15 15
16#define __io(a) ((void __iomem *)(((a) - DOVE_PCIE0_IO_BUS_BASE) + \ 16#define __io(a) ((void __iomem *)(((a) - DOVE_PCIE0_IO_BUS_BASE) + \
17 DOVE_PCIE0_IO_VIRT_BASE)) 17 DOVE_PCIE0_IO_VIRT_BASE))
18#define __mem_pci(a) (a)
19 18
20#endif 19#endif
diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c
index 8c9f56a3e8ec..6f8068692edf 100644
--- a/arch/arm/mach-ebsa110/core.c
+++ b/arch/arm/mach-ebsa110/core.c
@@ -116,6 +116,20 @@ static void __init ebsa110_map_io(void)
116 iotable_init(ebsa110_io_desc, ARRAY_SIZE(ebsa110_io_desc)); 116 iotable_init(ebsa110_io_desc, ARRAY_SIZE(ebsa110_io_desc));
117} 117}
118 118
119static void __iomem *ebsa110_ioremap_caller(unsigned long cookie, size_t size,
120 unsigned int flags, void *caller)
121{
122 return (void __iomem *)cookie;
123}
124
125static void ebsa110_iounmap(volatile void __iomem *io_addr)
126{}
127
128static void __init ebsa110_init_early(void)
129{
130 arch_ioremap_caller = ebsa110_ioremap_caller;
131 arch_iounmap = ebsa110_iounmap;
132}
119 133
120#define PIT_CTRL (PIT_BASE + 0x0d) 134#define PIT_CTRL (PIT_BASE + 0x0d)
121#define PIT_T2 (PIT_BASE + 0x09) 135#define PIT_T2 (PIT_BASE + 0x09)
@@ -312,6 +326,7 @@ MACHINE_START(EBSA110, "EBSA110")
312 .reserve_lp2 = 1, 326 .reserve_lp2 = 1,
313 .restart_mode = 's', 327 .restart_mode = 's',
314 .map_io = ebsa110_map_io, 328 .map_io = ebsa110_map_io,
329 .init_early = ebsa110_init_early,
315 .init_irq = ebsa110_init_irq, 330 .init_irq = ebsa110_init_irq,
316 .timer = &ebsa110_timer, 331 .timer = &ebsa110_timer,
317 .restart = ebsa110_restart, 332 .restart = ebsa110_restart,
diff --git a/arch/arm/mach-ebsa110/include/mach/io.h b/arch/arm/mach-ebsa110/include/mach/io.h
index 44679db672fb..11bb0799424b 100644
--- a/arch/arm/mach-ebsa110/include/mach/io.h
+++ b/arch/arm/mach-ebsa110/include/mach/io.h
@@ -62,15 +62,6 @@ void __writel(u32 val, void __iomem *addr);
62#define writew(v,b) __writew(v,b) 62#define writew(v,b) __writew(v,b)
63#define writel(v,b) __writel(v,b) 63#define writel(v,b) __writel(v,b)
64 64
65static inline void __iomem *__arch_ioremap(unsigned long cookie, size_t size,
66 unsigned int flags)
67{
68 return (void __iomem *)cookie;
69}
70
71#define __arch_ioremap __arch_ioremap
72#define __arch_iounmap(cookie) do { } while (0)
73
74extern void insb(unsigned int port, void *buf, int sz); 65extern void insb(unsigned int port, void *buf, int sz);
75extern void insw(unsigned int port, void *buf, int sz); 66extern void insw(unsigned int port, void *buf, int sz);
76extern void insl(unsigned int port, void *buf, int sz); 67extern void insl(unsigned int port, void *buf, int sz);
diff --git a/arch/arm/mach-ep93xx/include/mach/io.h b/arch/arm/mach-ep93xx/include/mach/io.h
deleted file mode 100644
index 594b77f21054..000000000000
--- a/arch/arm/mach-ep93xx/include/mach/io.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/*
2 * arch/arm/mach-ep93xx/include/mach/io.h
3 */
4
5#ifndef __ASM_MACH_IO_H
6#define __ASM_MACH_IO_H
7
8#define IO_SPACE_LIMIT 0xffffffff
9
10#define __io(p) __typesafe_io(p)
11#define __mem_pci(p) (p)
12
13/*
14 * A typesafe __io() variation for variable initialisers
15 */
16#ifdef __ASSEMBLER__
17#define IOMEM(p) p
18#else
19#define IOMEM(p) ((void __iomem __force *)(p))
20#endif
21
22#endif /* __ASM_MACH_IO_H */
diff --git a/arch/arm/mach-exynos/include/mach/io.h b/arch/arm/mach-exynos/include/mach/io.h
deleted file mode 100644
index d5478d247535..000000000000
--- a/arch/arm/mach-exynos/include/mach/io.h
+++ /dev/null
@@ -1,26 +0,0 @@
1/* linux/arch/arm/mach-exynos4/include/mach/io.h
2 *
3 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Copyright 2008-2010 Ben Dooks <ben-linux@fluff.org>
7 *
8 * Based on arch/arm/mach-s5p6442/include/mach/io.h
9 *
10 * Default IO routines for EXYNOS4
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15*/
16
17#ifndef __ASM_ARM_ARCH_IO_H
18#define __ASM_ARM_ARCH_IO_H __FILE__
19
20/* No current ISA/PCI bus support. */
21#define __io(a) __typesafe_io(a)
22#define __mem_pci(a) (a)
23
24#define IO_SPACE_LIMIT (0xFFFFFFFF)
25
26#endif /* __ASM_ARM_ARCH_IO_H */
diff --git a/arch/arm/mach-footbridge/include/mach/io.h b/arch/arm/mach-footbridge/include/mach/io.h
index 15a70396c27d..aba531eebbc6 100644
--- a/arch/arm/mach-footbridge/include/mach/io.h
+++ b/arch/arm/mach-footbridge/include/mach/io.h
@@ -27,18 +27,5 @@
27 * Translation of various region addresses to virtual addresses 27 * Translation of various region addresses to virtual addresses
28 */ 28 */
29#define __io(a) ((void __iomem *)(PCIO_BASE + (a))) 29#define __io(a) ((void __iomem *)(PCIO_BASE + (a)))
30#if 1
31#define __mem_pci(a) (a)
32#else
33
34static inline void __iomem *___mem_pci(void __iomem *p)
35{
36 unsigned long a = (unsigned long)p;
37 BUG_ON(a <= 0xc0000000 || a >= 0xe0000000);
38 return p;
39}
40
41#define __mem_pci(a) ___mem_pci(a)
42#endif
43 30
44#endif 31#endif
diff --git a/arch/arm/mach-gemini/include/mach/io.h b/arch/arm/mach-gemini/include/mach/io.h
deleted file mode 100644
index c548056b98b2..000000000000
--- a/arch/arm/mach-gemini/include/mach/io.h
+++ /dev/null
@@ -1,18 +0,0 @@
1/*
2 * Copyright (C) 2001-2006 Storlink, Corp.
3 * Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 */
10#ifndef __MACH_IO_H
11#define __MACH_IO_H
12
13#define IO_SPACE_LIMIT 0xffffffff
14
15#define __io(a) __typesafe_io(a)
16#define __mem_pci(a) (a)
17
18#endif /* __MACH_IO_H */
diff --git a/arch/arm/mach-h720x/include/mach/io.h b/arch/arm/mach-h720x/include/mach/io.h
deleted file mode 100644
index 2c8659c21a93..000000000000
--- a/arch/arm/mach-h720x/include/mach/io.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/*
2 * arch/arm/mach-h720x/include/mach/io.h
3 *
4 * Copyright (C) 2000 Steve Hill (sjhill@cotw.com)
5 *
6 * Changelog:
7 *
8 * 09-19-2001 JJKIM
9 * Created from arch/arm/mach-l7200/include/mach/io.h
10 *
11 * 03-27-2003 Robert Schwebel <r.schwebel@pengutronix.de>:
12 * re-unified header files for h720x
13 */
14#ifndef __ASM_ARM_ARCH_IO_H
15#define __ASM_ARM_ARCH_IO_H
16
17#define IO_SPACE_LIMIT 0xffffffff
18
19#define __io(a) __typesafe_io(a)
20#define __mem_pci(a) (a)
21
22#endif
diff --git a/arch/arm/mach-highbank/include/mach/io.h b/arch/arm/mach-highbank/include/mach/io.h
deleted file mode 100644
index 70cfa3ba7697..000000000000
--- a/arch/arm/mach-highbank/include/mach/io.h
+++ /dev/null
@@ -1,7 +0,0 @@
1#ifndef __MACH_IO_H
2#define __MACH_IO_H
3
4#define __io(a) ({ (void)(a); __typesafe_io(0); })
5#define __mem_pci(a) (a)
6
7#endif
diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c
index f8ca96c354f2..d534d7f988e0 100644
--- a/arch/arm/mach-imx/mm-imx3.c
+++ b/arch/arm/mach-imx/mm-imx3.c
@@ -61,8 +61,8 @@ static void imx3_idle(void)
61 : "=r" (reg)); 61 : "=r" (reg));
62} 62}
63 63
64static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size, 64static void __iomem *imx3_ioremap_caller(unsigned long phys_addr, size_t size,
65 unsigned int mtype) 65 unsigned int mtype, void *caller)
66{ 66{
67 if (mtype == MT_DEVICE) { 67 if (mtype == MT_DEVICE) {
68 /* 68 /*
@@ -75,7 +75,7 @@ static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size,
75 mtype = MT_DEVICE_NONSHARED; 75 mtype = MT_DEVICE_NONSHARED;
76 } 76 }
77 77
78 return __arm_ioremap(phys_addr, size, mtype); 78 return __arm_ioremap_caller(phys_addr, size, mtype, caller);
79} 79}
80 80
81void __init imx3_init_l2x0(void) 81void __init imx3_init_l2x0(void)
@@ -134,7 +134,7 @@ void __init imx31_init_early(void)
134{ 134{
135 mxc_set_cpu_type(MXC_CPU_MX31); 135 mxc_set_cpu_type(MXC_CPU_MX31);
136 mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); 136 mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR));
137 imx_ioremap = imx3_ioremap; 137 arch_ioremap_caller = imx3_ioremap_caller;
138 arm_pm_idle = imx3_idle; 138 arm_pm_idle = imx3_idle;
139} 139}
140 140
@@ -208,7 +208,7 @@ void __init imx35_init_early(void)
208 mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR)); 208 mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR));
209 mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR)); 209 mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR));
210 arm_pm_idle = imx3_idle; 210 arm_pm_idle = imx3_idle;
211 imx_ioremap = imx3_ioremap; 211 arch_ioremap_caller = imx3_ioremap_caller;
212} 212}
213 213
214void __init mx35_init_irq(void) 214void __init mx35_init_irq(void)
diff --git a/arch/arm/mach-integrator/include/mach/io.h b/arch/arm/mach-integrator/include/mach/io.h
index 37beed3fa3ed..8de70de3dd0a 100644
--- a/arch/arm/mach-integrator/include/mach/io.h
+++ b/arch/arm/mach-integrator/include/mach/io.h
@@ -29,6 +29,5 @@
29#define PCI_IO_VADDR 0xee000000 29#define PCI_IO_VADDR 0xee000000
30 30
31#define __io(a) ((void __iomem *)(PCI_IO_VADDR + (a))) 31#define __io(a) ((void __iomem *)(PCI_IO_VADDR + (a)))
32#define __mem_pci(a) (a)
33 32
34#endif 33#endif
diff --git a/arch/arm/mach-iop13xx/include/mach/io.h b/arch/arm/mach-iop13xx/include/mach/io.h
index dffb234bb967..f13188518025 100644
--- a/arch/arm/mach-iop13xx/include/mach/io.h
+++ b/arch/arm/mach-iop13xx/include/mach/io.h
@@ -22,20 +22,7 @@
22#define IO_SPACE_LIMIT 0xffffffff 22#define IO_SPACE_LIMIT 0xffffffff
23 23
24#define __io(a) __iop13xx_io(a) 24#define __io(a) __iop13xx_io(a)
25#define __mem_pci(a) (a)
26#define __mem_isa(a) (a)
27 25
28extern void __iomem * __iop13xx_io(unsigned long io_addr); 26extern void __iomem * __iop13xx_io(unsigned long io_addr);
29extern void __iomem *__iop13xx_ioremap(unsigned long cookie, size_t size,
30 unsigned int mtype);
31extern void __iop13xx_iounmap(void __iomem *addr);
32
33extern u32 iop13xx_atue_mem_base;
34extern u32 iop13xx_atux_mem_base;
35extern size_t iop13xx_atue_mem_size;
36extern size_t iop13xx_atux_mem_size;
37
38#define __arch_ioremap __iop13xx_ioremap
39#define __arch_iounmap __iop13xx_iounmap
40 27
41#endif 28#endif
diff --git a/arch/arm/mach-iop13xx/include/mach/iop13xx.h b/arch/arm/mach-iop13xx/include/mach/iop13xx.h
index 07e9ff7adafb..e190dcd7d72d 100644
--- a/arch/arm/mach-iop13xx/include/mach/iop13xx.h
+++ b/arch/arm/mach-iop13xx/include/mach/iop13xx.h
@@ -5,6 +5,7 @@
5/* The ATU offsets can change based on the strapping */ 5/* The ATU offsets can change based on the strapping */
6extern u32 iop13xx_atux_pmmr_offset; 6extern u32 iop13xx_atux_pmmr_offset;
7extern u32 iop13xx_atue_pmmr_offset; 7extern u32 iop13xx_atue_pmmr_offset;
8void iop13xx_init_early(void);
8void iop13xx_init_irq(void); 9void iop13xx_init_irq(void);
9void iop13xx_map_io(void); 10void iop13xx_map_io(void);
10void iop13xx_platform_init(void); 11void iop13xx_platform_init(void);
diff --git a/arch/arm/mach-iop13xx/io.c b/arch/arm/mach-iop13xx/io.c
index 48642e66c566..3c364198db9c 100644
--- a/arch/arm/mach-iop13xx/io.c
+++ b/arch/arm/mach-iop13xx/io.c
@@ -21,6 +21,8 @@
21#include <linux/io.h> 21#include <linux/io.h>
22#include <mach/hardware.h> 22#include <mach/hardware.h>
23 23
24#include "pci.h"
25
24void * __iomem __iop13xx_io(unsigned long io_addr) 26void * __iomem __iop13xx_io(unsigned long io_addr)
25{ 27{
26 void __iomem * io_virt; 28 void __iomem * io_virt;
@@ -40,8 +42,8 @@ void * __iomem __iop13xx_io(unsigned long io_addr)
40} 42}
41EXPORT_SYMBOL(__iop13xx_io); 43EXPORT_SYMBOL(__iop13xx_io);
42 44
43void * __iomem __iop13xx_ioremap(unsigned long cookie, size_t size, 45static void __iomem *__iop13xx_ioremap_caller(unsigned long cookie,
44 unsigned int mtype) 46 size_t size, unsigned int mtype, void *caller)
45{ 47{
46 void __iomem * retval; 48 void __iomem * retval;
47 49
@@ -76,17 +78,14 @@ void * __iomem __iop13xx_ioremap(unsigned long cookie, size_t size,
76 break; 78 break;
77 default: 79 default:
78 retval = __arm_ioremap_caller(cookie, size, mtype, 80 retval = __arm_ioremap_caller(cookie, size, mtype,
79 __builtin_return_address(0)); 81 caller);
80 } 82 }
81 83
82 return retval; 84 return retval;
83} 85}
84EXPORT_SYMBOL(__iop13xx_ioremap);
85 86
86void __iop13xx_iounmap(void __iomem *addr) 87static void __iop13xx_iounmap(volatile void __iomem *addr)
87{ 88{
88 extern void __iounmap(volatile void __iomem *addr);
89
90 if (iop13xx_atue_mem_base) 89 if (iop13xx_atue_mem_base)
91 if (addr >= (void __iomem *) iop13xx_atue_mem_base && 90 if (addr >= (void __iomem *) iop13xx_atue_mem_base &&
92 addr < (void __iomem *) (iop13xx_atue_mem_base + 91 addr < (void __iomem *) (iop13xx_atue_mem_base +
@@ -110,4 +109,9 @@ void __iop13xx_iounmap(void __iomem *addr)
110skip: 109skip:
111 return; 110 return;
112} 111}
113EXPORT_SYMBOL(__iop13xx_iounmap); 112
113void __init iop13xx_init_early(void)
114{
115 arch_ioremap_caller = __iop13xx_ioremap_caller;
116 arch_iounmap = __iop13xx_iounmap;
117}
diff --git a/arch/arm/mach-iop13xx/iq81340mc.c b/arch/arm/mach-iop13xx/iq81340mc.c
index abaee8833588..5c96b73e6964 100644
--- a/arch/arm/mach-iop13xx/iq81340mc.c
+++ b/arch/arm/mach-iop13xx/iq81340mc.c
@@ -92,6 +92,7 @@ static struct sys_timer iq81340mc_timer = {
92MACHINE_START(IQ81340MC, "Intel IQ81340MC") 92MACHINE_START(IQ81340MC, "Intel IQ81340MC")
93 /* Maintainer: Dan Williams <dan.j.williams@intel.com> */ 93 /* Maintainer: Dan Williams <dan.j.williams@intel.com> */
94 .atag_offset = 0x100, 94 .atag_offset = 0x100,
95 .init_early = iop13xx_init_early,
95 .map_io = iop13xx_map_io, 96 .map_io = iop13xx_map_io,
96 .init_irq = iop13xx_init_irq, 97 .init_irq = iop13xx_init_irq,
97 .timer = &iq81340mc_timer, 98 .timer = &iq81340mc_timer,
diff --git a/arch/arm/mach-iop13xx/iq81340sc.c b/arch/arm/mach-iop13xx/iq81340sc.c
index 690916a09dc6..aa4dd750135a 100644
--- a/arch/arm/mach-iop13xx/iq81340sc.c
+++ b/arch/arm/mach-iop13xx/iq81340sc.c
@@ -94,6 +94,7 @@ static struct sys_timer iq81340sc_timer = {
94MACHINE_START(IQ81340SC, "Intel IQ81340SC") 94MACHINE_START(IQ81340SC, "Intel IQ81340SC")
95 /* Maintainer: Dan Williams <dan.j.williams@intel.com> */ 95 /* Maintainer: Dan Williams <dan.j.williams@intel.com> */
96 .atag_offset = 0x100, 96 .atag_offset = 0x100,
97 .init_early = iop13xx_init_early,
97 .map_io = iop13xx_map_io, 98 .map_io = iop13xx_map_io,
98 .init_irq = iop13xx_init_irq, 99 .init_irq = iop13xx_init_irq,
99 .timer = &iq81340sc_timer, 100 .timer = &iq81340sc_timer,
diff --git a/arch/arm/mach-iop13xx/pci.h b/arch/arm/mach-iop13xx/pci.h
new file mode 100644
index 000000000000..c70cf5b41e31
--- /dev/null
+++ b/arch/arm/mach-iop13xx/pci.h
@@ -0,0 +1,6 @@
1#include <linux/types.h>
2
3extern u32 iop13xx_atue_mem_base;
4extern u32 iop13xx_atux_mem_base;
5extern size_t iop13xx_atue_mem_size;
6extern size_t iop13xx_atux_mem_size;
diff --git a/arch/arm/mach-iop32x/include/mach/io.h b/arch/arm/mach-iop32x/include/mach/io.h
index 2d88264b9863..e2ada265bb8d 100644
--- a/arch/arm/mach-iop32x/include/mach/io.h
+++ b/arch/arm/mach-iop32x/include/mach/io.h
@@ -15,6 +15,5 @@
15 15
16#define IO_SPACE_LIMIT 0xffffffff 16#define IO_SPACE_LIMIT 0xffffffff
17#define __io(p) ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p)) 17#define __io(p) ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p))
18#define __mem_pci(a) (a)
19 18
20#endif 19#endif
diff --git a/arch/arm/mach-iop33x/include/mach/io.h b/arch/arm/mach-iop33x/include/mach/io.h
index a8a66fc8fbdb..f7c1b6595660 100644
--- a/arch/arm/mach-iop33x/include/mach/io.h
+++ b/arch/arm/mach-iop33x/include/mach/io.h
@@ -15,6 +15,5 @@
15 15
16#define IO_SPACE_LIMIT 0xffffffff 16#define IO_SPACE_LIMIT 0xffffffff
17#define __io(p) ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p)) 17#define __io(p) ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p))
18#define __mem_pci(a) (a)
19 18
20#endif 19#endif
diff --git a/arch/arm/mach-ixp2000/include/mach/io.h b/arch/arm/mach-ixp2000/include/mach/io.h
index 859e584914d9..f6552d6f35ab 100644
--- a/arch/arm/mach-ixp2000/include/mach/io.h
+++ b/arch/arm/mach-ixp2000/include/mach/io.h
@@ -18,7 +18,6 @@
18#include <mach/hardware.h> 18#include <mach/hardware.h>
19 19
20#define IO_SPACE_LIMIT 0xffffffff 20#define IO_SPACE_LIMIT 0xffffffff
21#define __mem_pci(a) (a)
22 21
23/* 22/*
24 * The A? revisions of the IXP2000s assert byte lanes for PCI I/O 23 * The A? revisions of the IXP2000s assert byte lanes for PCI I/O
diff --git a/arch/arm/mach-ixp23xx/include/mach/io.h b/arch/arm/mach-ixp23xx/include/mach/io.h
index 4ce4353b9f72..a7aceb55c130 100644
--- a/arch/arm/mach-ixp23xx/include/mach/io.h
+++ b/arch/arm/mach-ixp23xx/include/mach/io.h
@@ -18,6 +18,5 @@
18#define IO_SPACE_LIMIT 0xffffffff 18#define IO_SPACE_LIMIT 0xffffffff
19 19
20#define __io(p) ((void __iomem*)((p) + IXP23XX_PCI_IO_VIRT)) 20#define __io(p) ((void __iomem*)((p) + IXP23XX_PCI_IO_VIRT))
21#define __mem_pci(a) (a)
22 21
23#endif 22#endif
diff --git a/arch/arm/mach-ixp4xx/avila-setup.c b/arch/arm/mach-ixp4xx/avila-setup.c
index a7277ad470a5..90e42e9982cb 100644
--- a/arch/arm/mach-ixp4xx/avila-setup.c
+++ b/arch/arm/mach-ixp4xx/avila-setup.c
@@ -165,6 +165,7 @@ static void __init avila_init(void)
165MACHINE_START(AVILA, "Gateworks Avila Network Platform") 165MACHINE_START(AVILA, "Gateworks Avila Network Platform")
166 /* Maintainer: Deepak Saxena <dsaxena@plexity.net> */ 166 /* Maintainer: Deepak Saxena <dsaxena@plexity.net> */
167 .map_io = ixp4xx_map_io, 167 .map_io = ixp4xx_map_io,
168 .init_early = ixp4xx_init_early,
168 .init_irq = ixp4xx_init_irq, 169 .init_irq = ixp4xx_init_irq,
169 .timer = &ixp4xx_timer, 170 .timer = &ixp4xx_timer,
170 .atag_offset = 0x100, 171 .atag_offset = 0x100,
@@ -184,6 +185,7 @@ MACHINE_END
184MACHINE_START(LOFT, "Giant Shoulder Inc Loft board") 185MACHINE_START(LOFT, "Giant Shoulder Inc Loft board")
185 /* Maintainer: Tom Billman <kernel@giantshoulderinc.com> */ 186 /* Maintainer: Tom Billman <kernel@giantshoulderinc.com> */
186 .map_io = ixp4xx_map_io, 187 .map_io = ixp4xx_map_io,
188 .init_early = ixp4xx_init_early,
187 .init_irq = ixp4xx_init_irq, 189 .init_irq = ixp4xx_init_irq,
188 .timer = &ixp4xx_timer, 190 .timer = &ixp4xx_timer,
189 .atag_offset = 0x100, 191 .atag_offset = 0x100,
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index a6329a0a8ec4..c60e7b86192c 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -31,6 +31,7 @@
31 31
32#include <mach/udc.h> 32#include <mach/udc.h>
33#include <mach/hardware.h> 33#include <mach/hardware.h>
34#include <mach/io.h>
34#include <asm/uaccess.h> 35#include <asm/uaccess.h>
35#include <asm/pgtable.h> 36#include <asm/pgtable.h>
36#include <asm/page.h> 37#include <asm/page.h>
@@ -517,3 +518,35 @@ void ixp4xx_restart(char mode, const char *cmd)
517 *IXP4XX_OSWE = IXP4XX_WDT_RESET_ENABLE | IXP4XX_WDT_COUNT_ENABLE; 518 *IXP4XX_OSWE = IXP4XX_WDT_RESET_ENABLE | IXP4XX_WDT_COUNT_ENABLE;
518 } 519 }
519} 520}
521
522#ifdef CONFIG_IXP4XX_INDIRECT_PCI
523/*
524 * In the case of using indirect PCI, we simply return the actual PCI
525 * address and our read/write implementation use that to drive the
526 * access registers. If something outside of PCI is ioremap'd, we
527 * fallback to the default.
528 */
529
530static void __iomem *ixp4xx_ioremap_caller(unsigned long addr, size_t size,
531 unsigned int mtype, void *caller)
532{
533 if (!is_pci_memory(addr))
534 return __arm_ioremap_caller(addr, size, mtype, caller);
535
536 return (void __iomem *)addr;
537}
538
539static void ixp4xx_iounmap(void __iomem *addr)
540{
541 if (!is_pci_memory((__force u32)addr))
542 __iounmap(addr);
543}
544
545void __init ixp4xx_init_early(void)
546{
547 arch_ioremap_caller = ixp4xx_ioremap_caller;
548 arch_iounmap = ixp4xx_iounmap;
549}
550#else
551void __init ixp4xx_init_early(void) {}
552#endif
diff --git a/arch/arm/mach-ixp4xx/coyote-setup.c b/arch/arm/mach-ixp4xx/coyote-setup.c
index a74f86ce8bcc..1b83110028d6 100644
--- a/arch/arm/mach-ixp4xx/coyote-setup.c
+++ b/arch/arm/mach-ixp4xx/coyote-setup.c
@@ -110,6 +110,7 @@ static void __init coyote_init(void)
110MACHINE_START(ADI_COYOTE, "ADI Engineering Coyote") 110MACHINE_START(ADI_COYOTE, "ADI Engineering Coyote")
111 /* Maintainer: MontaVista Software, Inc. */ 111 /* Maintainer: MontaVista Software, Inc. */
112 .map_io = ixp4xx_map_io, 112 .map_io = ixp4xx_map_io,
113 .init_early = ixp4xx_init_early,
113 .init_irq = ixp4xx_init_irq, 114 .init_irq = ixp4xx_init_irq,
114 .timer = &ixp4xx_timer, 115 .timer = &ixp4xx_timer,
115 .atag_offset = 0x100, 116 .atag_offset = 0x100,
@@ -129,6 +130,7 @@ MACHINE_END
129MACHINE_START(IXDPG425, "Intel IXDPG425") 130MACHINE_START(IXDPG425, "Intel IXDPG425")
130 /* Maintainer: MontaVista Software, Inc. */ 131 /* Maintainer: MontaVista Software, Inc. */
131 .map_io = ixp4xx_map_io, 132 .map_io = ixp4xx_map_io,
133 .init_early = ixp4xx_init_early,
132 .init_irq = ixp4xx_init_irq, 134 .init_irq = ixp4xx_init_irq,
133 .timer = &ixp4xx_timer, 135 .timer = &ixp4xx_timer,
134 .atag_offset = 0x100, 136 .atag_offset = 0x100,
diff --git a/arch/arm/mach-ixp4xx/dsmg600-setup.c b/arch/arm/mach-ixp4xx/dsmg600-setup.c
index 67be177b336a..97a0af8f1955 100644
--- a/arch/arm/mach-ixp4xx/dsmg600-setup.c
+++ b/arch/arm/mach-ixp4xx/dsmg600-setup.c
@@ -280,6 +280,7 @@ MACHINE_START(DSMG600, "D-Link DSM-G600 RevA")
280 /* Maintainer: www.nslu2-linux.org */ 280 /* Maintainer: www.nslu2-linux.org */
281 .atag_offset = 0x100, 281 .atag_offset = 0x100,
282 .map_io = ixp4xx_map_io, 282 .map_io = ixp4xx_map_io,
283 .init_early = ixp4xx_init_early,
283 .init_irq = ixp4xx_init_irq, 284 .init_irq = ixp4xx_init_irq,
284 .timer = &dsmg600_timer, 285 .timer = &dsmg600_timer,
285 .init_machine = dsmg600_init, 286 .init_machine = dsmg600_init,
diff --git a/arch/arm/mach-ixp4xx/fsg-setup.c b/arch/arm/mach-ixp4xx/fsg-setup.c
index 6d5818285af8..9175a25a7511 100644
--- a/arch/arm/mach-ixp4xx/fsg-setup.c
+++ b/arch/arm/mach-ixp4xx/fsg-setup.c
@@ -270,6 +270,7 @@ static void __init fsg_init(void)
270MACHINE_START(FSG, "Freecom FSG-3") 270MACHINE_START(FSG, "Freecom FSG-3")
271 /* Maintainer: www.nslu2-linux.org */ 271 /* Maintainer: www.nslu2-linux.org */
272 .map_io = ixp4xx_map_io, 272 .map_io = ixp4xx_map_io,
273 .init_early = ixp4xx_init_early,
273 .init_irq = ixp4xx_init_irq, 274 .init_irq = ixp4xx_init_irq,
274 .timer = &ixp4xx_timer, 275 .timer = &ixp4xx_timer,
275 .atag_offset = 0x100, 276 .atag_offset = 0x100,
diff --git a/arch/arm/mach-ixp4xx/gateway7001-setup.c b/arch/arm/mach-ixp4xx/gateway7001-setup.c
index 7ecf9b28f1c0..033c71758953 100644
--- a/arch/arm/mach-ixp4xx/gateway7001-setup.c
+++ b/arch/arm/mach-ixp4xx/gateway7001-setup.c
@@ -97,6 +97,7 @@ static void __init gateway7001_init(void)
97MACHINE_START(GATEWAY7001, "Gateway 7001 AP") 97MACHINE_START(GATEWAY7001, "Gateway 7001 AP")
98 /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */ 98 /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
99 .map_io = ixp4xx_map_io, 99 .map_io = ixp4xx_map_io,
100 .init_early = ixp4xx_init_early,
100 .init_irq = ixp4xx_init_irq, 101 .init_irq = ixp4xx_init_irq,
101 .timer = &ixp4xx_timer, 102 .timer = &ixp4xx_timer,
102 .atag_offset = 0x100, 103 .atag_offset = 0x100,
diff --git a/arch/arm/mach-ixp4xx/goramo_mlr.c b/arch/arm/mach-ixp4xx/goramo_mlr.c
index 78ae12c46261..46bb924962ee 100644
--- a/arch/arm/mach-ixp4xx/goramo_mlr.c
+++ b/arch/arm/mach-ixp4xx/goramo_mlr.c
@@ -496,6 +496,7 @@ subsys_initcall(gmlr_pci_init);
496MACHINE_START(GORAMO_MLR, "MultiLink") 496MACHINE_START(GORAMO_MLR, "MultiLink")
497 /* Maintainer: Krzysztof Halasa */ 497 /* Maintainer: Krzysztof Halasa */
498 .map_io = ixp4xx_map_io, 498 .map_io = ixp4xx_map_io,
499 .init_early = ixp4xx_init_early,
499 .init_irq = ixp4xx_init_irq, 500 .init_irq = ixp4xx_init_irq,
500 .timer = &ixp4xx_timer, 501 .timer = &ixp4xx_timer,
501 .atag_offset = 0x100, 502 .atag_offset = 0x100,
diff --git a/arch/arm/mach-ixp4xx/gtwx5715-setup.c b/arch/arm/mach-ixp4xx/gtwx5715-setup.c
index a23f89391458..18ebc6be7969 100644
--- a/arch/arm/mach-ixp4xx/gtwx5715-setup.c
+++ b/arch/arm/mach-ixp4xx/gtwx5715-setup.c
@@ -165,6 +165,7 @@ static void __init gtwx5715_init(void)
165MACHINE_START(GTWX5715, "Gemtek GTWX5715 (Linksys WRV54G)") 165MACHINE_START(GTWX5715, "Gemtek GTWX5715 (Linksys WRV54G)")
166 /* Maintainer: George Joseph */ 166 /* Maintainer: George Joseph */
167 .map_io = ixp4xx_map_io, 167 .map_io = ixp4xx_map_io,
168 .init_early = ixp4xx_init_early,
168 .init_irq = ixp4xx_init_irq, 169 .init_irq = ixp4xx_init_irq,
169 .timer = &ixp4xx_timer, 170 .timer = &ixp4xx_timer,
170 .atag_offset = 0x100, 171 .atag_offset = 0x100,
diff --git a/arch/arm/mach-ixp4xx/include/mach/hardware.h b/arch/arm/mach-ixp4xx/include/mach/hardware.h
index c30e7e923a73..034bb2a1b805 100644
--- a/arch/arm/mach-ixp4xx/include/mach/hardware.h
+++ b/arch/arm/mach-ixp4xx/include/mach/hardware.h
@@ -23,8 +23,6 @@
23#define PCIBIOS_MAX_MEM 0x4BFFFFFF 23#define PCIBIOS_MAX_MEM 0x4BFFFFFF
24#endif 24#endif
25 25
26#define ARCH_HAS_DMA_SET_COHERENT_MASK
27
28/* Register locations and bits */ 26/* Register locations and bits */
29#include "ixp4xx-regs.h" 27#include "ixp4xx-regs.h"
30 28
diff --git a/arch/arm/mach-ixp4xx/include/mach/io.h b/arch/arm/mach-ixp4xx/include/mach/io.h
index ffb9d6afb89f..5cf30d1b78d2 100644
--- a/arch/arm/mach-ixp4xx/include/mach/io.h
+++ b/arch/arm/mach-ixp4xx/include/mach/io.h
@@ -39,11 +39,7 @@ extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data);
39 * but in some cases the performance hit is acceptable. In addition, you 39 * but in some cases the performance hit is acceptable. In addition, you
40 * cannot mmap() PCI devices in this case. 40 * cannot mmap() PCI devices in this case.
41 */ 41 */
42#ifndef CONFIG_IXP4XX_INDIRECT_PCI 42#ifdef CONFIG_IXP4XX_INDIRECT_PCI
43
44#define __mem_pci(a) (a)
45
46#else
47 43
48/* 44/*
49 * In the case of using indirect PCI, we simply return the actual PCI 45 * In the case of using indirect PCI, we simply return the actual PCI
@@ -57,24 +53,6 @@ static inline int is_pci_memory(u32 addr)
57 return (addr >= PCIBIOS_MIN_MEM) && (addr <= 0x4FFFFFFF); 53 return (addr >= PCIBIOS_MIN_MEM) && (addr <= 0x4FFFFFFF);
58} 54}
59 55
60static inline void __iomem * __indirect_ioremap(unsigned long addr, size_t size,
61 unsigned int mtype)
62{
63 if (!is_pci_memory(addr))
64 return __arm_ioremap(addr, size, mtype);
65
66 return (void __iomem *)addr;
67}
68
69static inline void __indirect_iounmap(void __iomem *addr)
70{
71 if (!is_pci_memory((__force u32)addr))
72 __iounmap(addr);
73}
74
75#define __arch_ioremap __indirect_ioremap
76#define __arch_iounmap __indirect_iounmap
77
78#define writeb(v, p) __indirect_writeb(v, p) 56#define writeb(v, p) __indirect_writeb(v, p)
79#define writew(v, p) __indirect_writew(v, p) 57#define writew(v, p) __indirect_writew(v, p)
80#define writel(v, p) __indirect_writel(v, p) 58#define writel(v, p) __indirect_writel(v, p)
diff --git a/arch/arm/mach-ixp4xx/include/mach/platform.h b/arch/arm/mach-ixp4xx/include/mach/platform.h
index df9250bbf13d..b66bedc64de1 100644
--- a/arch/arm/mach-ixp4xx/include/mach/platform.h
+++ b/arch/arm/mach-ixp4xx/include/mach/platform.h
@@ -121,6 +121,7 @@ extern unsigned long ixp4xx_timer_freq;
121 * Functions used by platform-level setup code 121 * Functions used by platform-level setup code
122 */ 122 */
123extern void ixp4xx_map_io(void); 123extern void ixp4xx_map_io(void);
124extern void ixp4xx_init_early(void);
124extern void ixp4xx_init_irq(void); 125extern void ixp4xx_init_irq(void);
125extern void ixp4xx_sys_init(void); 126extern void ixp4xx_sys_init(void);
126extern void ixp4xx_timer_init(void); 127extern void ixp4xx_timer_init(void);
diff --git a/arch/arm/mach-ixp4xx/ixdp425-setup.c b/arch/arm/mach-ixp4xx/ixdp425-setup.c
index 8a38b39999f8..3d742aee1773 100644
--- a/arch/arm/mach-ixp4xx/ixdp425-setup.c
+++ b/arch/arm/mach-ixp4xx/ixdp425-setup.c
@@ -254,6 +254,7 @@ static void __init ixdp425_init(void)
254MACHINE_START(IXDP425, "Intel IXDP425 Development Platform") 254MACHINE_START(IXDP425, "Intel IXDP425 Development Platform")
255 /* Maintainer: MontaVista Software, Inc. */ 255 /* Maintainer: MontaVista Software, Inc. */
256 .map_io = ixp4xx_map_io, 256 .map_io = ixp4xx_map_io,
257 .init_early = ixp4xx_init_early,
257 .init_irq = ixp4xx_init_irq, 258 .init_irq = ixp4xx_init_irq,
258 .timer = &ixp4xx_timer, 259 .timer = &ixp4xx_timer,
259 .atag_offset = 0x100, 260 .atag_offset = 0x100,
@@ -269,6 +270,7 @@ MACHINE_END
269MACHINE_START(IXDP465, "Intel IXDP465 Development Platform") 270MACHINE_START(IXDP465, "Intel IXDP465 Development Platform")
270 /* Maintainer: MontaVista Software, Inc. */ 271 /* Maintainer: MontaVista Software, Inc. */
271 .map_io = ixp4xx_map_io, 272 .map_io = ixp4xx_map_io,
273 .init_early = ixp4xx_init_early,
272 .init_irq = ixp4xx_init_irq, 274 .init_irq = ixp4xx_init_irq,
273 .timer = &ixp4xx_timer, 275 .timer = &ixp4xx_timer,
274 .atag_offset = 0x100, 276 .atag_offset = 0x100,
@@ -283,6 +285,7 @@ MACHINE_END
283MACHINE_START(IXCDP1100, "Intel IXCDP1100 Development Platform") 285MACHINE_START(IXCDP1100, "Intel IXCDP1100 Development Platform")
284 /* Maintainer: MontaVista Software, Inc. */ 286 /* Maintainer: MontaVista Software, Inc. */
285 .map_io = ixp4xx_map_io, 287 .map_io = ixp4xx_map_io,
288 .init_early = ixp4xx_init_early,
286 .init_irq = ixp4xx_init_irq, 289 .init_irq = ixp4xx_init_irq,
287 .timer = &ixp4xx_timer, 290 .timer = &ixp4xx_timer,
288 .atag_offset = 0x100, 291 .atag_offset = 0x100,
@@ -297,6 +300,7 @@ MACHINE_END
297MACHINE_START(KIXRP435, "Intel KIXRP435 Reference Platform") 300MACHINE_START(KIXRP435, "Intel KIXRP435 Reference Platform")
298 /* Maintainer: MontaVista Software, Inc. */ 301 /* Maintainer: MontaVista Software, Inc. */
299 .map_io = ixp4xx_map_io, 302 .map_io = ixp4xx_map_io,
303 .init_early = ixp4xx_init_early,
300 .init_irq = ixp4xx_init_irq, 304 .init_irq = ixp4xx_init_irq,
301 .timer = &ixp4xx_timer, 305 .timer = &ixp4xx_timer,
302 .atag_offset = 0x100, 306 .atag_offset = 0x100,
diff --git a/arch/arm/mach-ixp4xx/nas100d-setup.c b/arch/arm/mach-ixp4xx/nas100d-setup.c
index 1010eb7b0083..33cb0955b6bf 100644
--- a/arch/arm/mach-ixp4xx/nas100d-setup.c
+++ b/arch/arm/mach-ixp4xx/nas100d-setup.c
@@ -315,6 +315,7 @@ MACHINE_START(NAS100D, "Iomega NAS 100d")
315 /* Maintainer: www.nslu2-linux.org */ 315 /* Maintainer: www.nslu2-linux.org */
316 .atag_offset = 0x100, 316 .atag_offset = 0x100,
317 .map_io = ixp4xx_map_io, 317 .map_io = ixp4xx_map_io,
318 .init_early = ixp4xx_init_early,
318 .init_irq = ixp4xx_init_irq, 319 .init_irq = ixp4xx_init_irq,
319 .timer = &ixp4xx_timer, 320 .timer = &ixp4xx_timer,
320 .init_machine = nas100d_init, 321 .init_machine = nas100d_init,
diff --git a/arch/arm/mach-ixp4xx/nslu2-setup.c b/arch/arm/mach-ixp4xx/nslu2-setup.c
index aa355c360d57..e2903faaebb3 100644
--- a/arch/arm/mach-ixp4xx/nslu2-setup.c
+++ b/arch/arm/mach-ixp4xx/nslu2-setup.c
@@ -301,6 +301,7 @@ MACHINE_START(NSLU2, "Linksys NSLU2")
301 /* Maintainer: www.nslu2-linux.org */ 301 /* Maintainer: www.nslu2-linux.org */
302 .atag_offset = 0x100, 302 .atag_offset = 0x100,
303 .map_io = ixp4xx_map_io, 303 .map_io = ixp4xx_map_io,
304 .init_early = ixp4xx_init_early,
304 .init_irq = ixp4xx_init_irq, 305 .init_irq = ixp4xx_init_irq,
305 .timer = &nslu2_timer, 306 .timer = &nslu2_timer,
306 .init_machine = nslu2_init, 307 .init_machine = nslu2_init,
diff --git a/arch/arm/mach-ixp4xx/omixp-setup.c b/arch/arm/mach-ixp4xx/omixp-setup.c
index 0940869fcfdd..158ddb79821d 100644
--- a/arch/arm/mach-ixp4xx/omixp-setup.c
+++ b/arch/arm/mach-ixp4xx/omixp-setup.c
@@ -243,6 +243,7 @@ static void __init omixp_init(void)
243MACHINE_START(DEVIXP, "Omicron DEVIXP") 243MACHINE_START(DEVIXP, "Omicron DEVIXP")
244 .atag_offset = 0x100, 244 .atag_offset = 0x100,
245 .map_io = ixp4xx_map_io, 245 .map_io = ixp4xx_map_io,
246 .init_early = ixp4xx_init_early,
246 .init_irq = ixp4xx_init_irq, 247 .init_irq = ixp4xx_init_irq,
247 .timer = &ixp4xx_timer, 248 .timer = &ixp4xx_timer,
248 .init_machine = omixp_init, 249 .init_machine = omixp_init,
@@ -254,6 +255,7 @@ MACHINE_END
254MACHINE_START(MICCPT, "Omicron MICCPT") 255MACHINE_START(MICCPT, "Omicron MICCPT")
255 .atag_offset = 0x100, 256 .atag_offset = 0x100,
256 .map_io = ixp4xx_map_io, 257 .map_io = ixp4xx_map_io,
258 .init_early = ixp4xx_init_early,
257 .init_irq = ixp4xx_init_irq, 259 .init_irq = ixp4xx_init_irq,
258 .timer = &ixp4xx_timer, 260 .timer = &ixp4xx_timer,
259 .init_machine = omixp_init, 261 .init_machine = omixp_init,
@@ -268,6 +270,7 @@ MACHINE_END
268MACHINE_START(MIC256, "Omicron MIC256") 270MACHINE_START(MIC256, "Omicron MIC256")
269 .atag_offset = 0x100, 271 .atag_offset = 0x100,
270 .map_io = ixp4xx_map_io, 272 .map_io = ixp4xx_map_io,
273 .init_early = ixp4xx_init_early,
271 .init_irq = ixp4xx_init_irq, 274 .init_irq = ixp4xx_init_irq,
272 .timer = &ixp4xx_timer, 275 .timer = &ixp4xx_timer,
273 .init_machine = omixp_init, 276 .init_machine = omixp_init,
diff --git a/arch/arm/mach-ixp4xx/vulcan-setup.c b/arch/arm/mach-ixp4xx/vulcan-setup.c
index 9dec20683291..2798f435aaf4 100644
--- a/arch/arm/mach-ixp4xx/vulcan-setup.c
+++ b/arch/arm/mach-ixp4xx/vulcan-setup.c
@@ -237,6 +237,7 @@ static void __init vulcan_init(void)
237MACHINE_START(ARCOM_VULCAN, "Arcom/Eurotech Vulcan") 237MACHINE_START(ARCOM_VULCAN, "Arcom/Eurotech Vulcan")
238 /* Maintainer: Marc Zyngier <maz@misterjones.org> */ 238 /* Maintainer: Marc Zyngier <maz@misterjones.org> */
239 .map_io = ixp4xx_map_io, 239 .map_io = ixp4xx_map_io,
240 .init_early = ixp4xx_init_early,
240 .init_irq = ixp4xx_init_irq, 241 .init_irq = ixp4xx_init_irq,
241 .timer = &ixp4xx_timer, 242 .timer = &ixp4xx_timer,
242 .atag_offset = 0x100, 243 .atag_offset = 0x100,
diff --git a/arch/arm/mach-ixp4xx/wg302v2-setup.c b/arch/arm/mach-ixp4xx/wg302v2-setup.c
index 5ac0f0a0fd8c..a785175b115b 100644
--- a/arch/arm/mach-ixp4xx/wg302v2-setup.c
+++ b/arch/arm/mach-ixp4xx/wg302v2-setup.c
@@ -98,6 +98,7 @@ static void __init wg302v2_init(void)
98MACHINE_START(WG302V2, "Netgear WG302 v2 / WAG302 v2") 98MACHINE_START(WG302V2, "Netgear WG302 v2 / WAG302 v2")
99 /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */ 99 /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
100 .map_io = ixp4xx_map_io, 100 .map_io = ixp4xx_map_io,
101 .init_early = ixp4xx_init_early,
101 .init_irq = ixp4xx_init_irq, 102 .init_irq = ixp4xx_init_irq,
102 .timer = &ixp4xx_timer, 103 .timer = &ixp4xx_timer,
103 .atag_offset = 0x100, 104 .atag_offset = 0x100,
diff --git a/arch/arm/mach-kirkwood/include/mach/io.h b/arch/arm/mach-kirkwood/include/mach/io.h
index 49dd0cb5e166..5d0ab61700d2 100644
--- a/arch/arm/mach-kirkwood/include/mach/io.h
+++ b/arch/arm/mach-kirkwood/include/mach/io.h
@@ -20,7 +20,5 @@ static inline void __iomem *__io(unsigned long addr)
20} 20}
21 21
22#define __io(a) __io(a) 22#define __io(a) __io(a)
23#define __mem_pci(a) (a)
24
25 23
26#endif 24#endif
diff --git a/arch/arm/mach-ks8695/include/mach/io.h b/arch/arm/mach-ks8695/include/mach/io.h
deleted file mode 100644
index a7a63ac3ba4e..000000000000
--- a/arch/arm/mach-ks8695/include/mach/io.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * arch/arm/mach-ks8695/include/mach/io.h
3 *
4 * Copyright (C) 2006 Andrew Victor
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#ifndef __ASM_ARCH_IO_H
12#define __ASM_ARCH_IO_H
13
14#define IO_SPACE_LIMIT 0xffffffff
15
16#define __io(a) __typesafe_io(a)
17#define __mem_pci(a) (a)
18
19#endif
diff --git a/arch/arm/mach-lpc32xx/include/mach/io.h b/arch/arm/mach-lpc32xx/include/mach/io.h
deleted file mode 100644
index 9b59ab5cef89..000000000000
--- a/arch/arm/mach-lpc32xx/include/mach/io.h
+++ /dev/null
@@ -1,27 +0,0 @@
1/*
2 * arch/arm/mach-lpc32xx/include/mach/io.h
3 *
4 * Author: Kevin Wells <kevin.wells@nxp.com>
5 *
6 * Copyright (C) 2010 NXP Semiconductors
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
18
19#ifndef __ASM_ARM_ARCH_IO_H
20#define __ASM_ARM_ARCH_IO_H
21
22#define IO_SPACE_LIMIT 0xffffffff
23
24#define __io(a) __typesafe_io(a)
25#define __mem_pci(a) (a)
26
27#endif
diff --git a/arch/arm/mach-mmp/include/mach/addr-map.h b/arch/arm/mach-mmp/include/mach/addr-map.h
index 3e404acd6ff4..b1ece08174e8 100644
--- a/arch/arm/mach-mmp/include/mach/addr-map.h
+++ b/arch/arm/mach-mmp/include/mach/addr-map.h
@@ -11,12 +11,6 @@
11#ifndef __ASM_MACH_ADDR_MAP_H 11#ifndef __ASM_MACH_ADDR_MAP_H
12#define __ASM_MACH_ADDR_MAP_H 12#define __ASM_MACH_ADDR_MAP_H
13 13
14#ifndef __ASSEMBLER__
15#define IOMEM(x) ((void __iomem *)(x))
16#else
17#define IOMEM(x) (x)
18#endif
19
20/* APB - Application Subsystem Peripheral Bus 14/* APB - Application Subsystem Peripheral Bus
21 * 15 *
22 * NOTE: the DMA controller registers are actually on the AXI fabric #1 16 * NOTE: the DMA controller registers are actually on the AXI fabric #1
diff --git a/arch/arm/mach-mmp/include/mach/io.h b/arch/arm/mach-mmp/include/mach/io.h
deleted file mode 100644
index e7adf3d012c1..000000000000
--- a/arch/arm/mach-mmp/include/mach/io.h
+++ /dev/null
@@ -1,21 +0,0 @@
1/*
2 * linux/arch/arm/mach-mmp/include/mach/io.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#ifndef __ASM_MACH_IO_H
10#define __ASM_MACH_IO_H
11
12#define IO_SPACE_LIMIT 0xffffffff
13
14/*
15 * We don't actually have real ISA nor PCI buses, but there is so many
16 * drivers out there that might just work if we fake them...
17 */
18#define __io(a) __typesafe_io(a)
19#define __mem_pci(a) (a)
20
21#endif /* __ASM_MACH_IO_H */
diff --git a/arch/arm/mach-msm/board-halibut.c b/arch/arm/mach-msm/board-halibut.c
index a60ab6d04ec5..3698a370d636 100644
--- a/arch/arm/mach-msm/board-halibut.c
+++ b/arch/arm/mach-msm/board-halibut.c
@@ -68,6 +68,11 @@ static struct platform_device *devices[] __initdata = {
68 68
69extern struct sys_timer msm_timer; 69extern struct sys_timer msm_timer;
70 70
71static void __init halibut_init_early(void)
72{
73 arch_ioremap_caller = __msm_ioremap_caller;
74}
75
71static void __init halibut_init_irq(void) 76static void __init halibut_init_irq(void)
72{ 77{
73 msm_init_irq(); 78 msm_init_irq();
@@ -96,6 +101,7 @@ MACHINE_START(HALIBUT, "Halibut Board (QCT SURF7200A)")
96 .atag_offset = 0x100, 101 .atag_offset = 0x100,
97 .fixup = halibut_fixup, 102 .fixup = halibut_fixup,
98 .map_io = halibut_map_io, 103 .map_io = halibut_map_io,
104 .init_early = halibut_init_early,
99 .init_irq = halibut_init_irq, 105 .init_irq = halibut_init_irq,
100 .init_machine = halibut_init, 106 .init_machine = halibut_init,
101 .timer = &msm_timer, 107 .timer = &msm_timer,
diff --git a/arch/arm/mach-msm/board-trout.c b/arch/arm/mach-msm/board-trout.c
index 6b9b227c87c5..5414f76ec0a9 100644
--- a/arch/arm/mach-msm/board-trout.c
+++ b/arch/arm/mach-msm/board-trout.c
@@ -43,6 +43,11 @@ static struct platform_device *devices[] __initdata = {
43 43
44extern struct sys_timer msm_timer; 44extern struct sys_timer msm_timer;
45 45
46static void __init trout_init_early(void)
47{
48 arch_ioremap_caller = __msm_ioremap_caller;
49}
50
46static void __init trout_init_irq(void) 51static void __init trout_init_irq(void)
47{ 52{
48 msm_init_irq(); 53 msm_init_irq();
@@ -96,6 +101,7 @@ MACHINE_START(TROUT, "HTC Dream")
96 .atag_offset = 0x100, 101 .atag_offset = 0x100,
97 .fixup = trout_fixup, 102 .fixup = trout_fixup,
98 .map_io = trout_map_io, 103 .map_io = trout_map_io,
104 .init_early = trout_init_early,
99 .init_irq = trout_init_irq, 105 .init_irq = trout_init_irq,
100 .init_machine = trout_init, 106 .init_machine = trout_init,
101 .timer = &msm_timer, 107 .timer = &msm_timer,
diff --git a/arch/arm/mach-msm/include/mach/io.h b/arch/arm/mach-msm/include/mach/io.h
deleted file mode 100644
index dc1b928745e9..000000000000
--- a/arch/arm/mach-msm/include/mach/io.h
+++ /dev/null
@@ -1,36 +0,0 @@
1/* arch/arm/mach-msm/include/mach/io.h
2 *
3 * Copyright (C) 2007 Google, Inc.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#ifndef __ASM_ARM_ARCH_IO_H
17#define __ASM_ARM_ARCH_IO_H
18
19#define IO_SPACE_LIMIT 0xffffffff
20
21#define __arch_ioremap __msm_ioremap
22#define __arch_iounmap __iounmap
23
24void __iomem *__msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype);
25
26#define __io(a) __typesafe_io(a)
27#define __mem_pci(a) (a)
28
29void msm_map_qsd8x50_io(void);
30void msm_map_msm7x30_io(void);
31void msm_map_msm8x60_io(void);
32void msm_map_msm8960_io(void);
33
34extern unsigned int msm_shared_ram_phys;
35
36#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
index 8af46123dab6..6c4046c21296 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
@@ -38,12 +38,6 @@
38 * 38 *
39 */ 39 */
40 40
41#ifdef __ASSEMBLY__
42#define IOMEM(x) x
43#else
44#define IOMEM(x) ((void __force __iomem *)(x))
45#endif
46
47#define MSM_VIC_BASE IOMEM(0xE0000000) 41#define MSM_VIC_BASE IOMEM(0xE0000000)
48#define MSM_VIC_PHYS 0xC0000000 42#define MSM_VIC_PHYS 0xC0000000
49#define MSM_VIC_SIZE SZ_4K 43#define MSM_VIC_SIZE SZ_4K
@@ -111,5 +105,11 @@
111#define MSM_AD5_PHYS 0xAC000000 105#define MSM_AD5_PHYS 0xAC000000
112#define MSM_AD5_SIZE (SZ_1M*13) 106#define MSM_AD5_SIZE (SZ_1M*13)
113 107
108#ifndef __ASSEMBLY__
109
110extern void __iomem *__msm_ioremap_caller(unsigned long phys_addr, size_t size,
111 unsigned int mtype, void *caller);
112
113#endif
114 114
115#endif 115#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
index 198202c267c8..f944fe65a657 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
@@ -100,4 +100,8 @@
100#define MSM_HSUSB_PHYS 0xA3600000 100#define MSM_HSUSB_PHYS 0xA3600000
101#define MSM_HSUSB_SIZE SZ_1K 101#define MSM_HSUSB_SIZE SZ_1K
102 102
103#ifndef __ASSEMBLY__
104extern void msm_map_msm7x30_io(void);
105#endif
106
103#endif 107#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8960.h b/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
index 800b55767e6b..a1752c0284fc 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
@@ -50,4 +50,8 @@
50#define MSM_DEBUG_UART_PHYS 0x16440000 50#define MSM_DEBUG_UART_PHYS 0x16440000
51#endif 51#endif
52 52
53#ifndef __ASSEMBLY__
54extern void msm_map_msm8960_io(void);
55#endif
56
53#endif 57#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
index 0faa894729b7..da77cc1d545d 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
@@ -122,4 +122,8 @@
122#define MSM_SDC4_PHYS 0xA0600000 122#define MSM_SDC4_PHYS 0xA0600000
123#define MSM_SDC4_SIZE SZ_4K 123#define MSM_SDC4_SIZE SZ_4K
124 124
125#ifndef __ASSEMBLY__
126extern void msm_map_qsd8x50_io(void);
127#endif
128
125#endif 129#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
index 54e12caa8d86..5aed57dc808c 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
@@ -67,4 +67,8 @@
67#define MSM_DEBUG_UART_PHYS 0x19C40000 67#define MSM_DEBUG_UART_PHYS 0x19C40000
68#endif 68#endif
69 69
70#ifndef __ASSEMBLY__
71extern void msm_map_msm8x60_io(void);
72#endif
73
70#endif 74#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap.h b/arch/arm/mach-msm/include/mach/msm_iomap.h
index 90682f4599d3..00afdfb8c38f 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap.h
@@ -37,12 +37,6 @@
37 * 37 *
38 */ 38 */
39 39
40#ifdef __ASSEMBLY__
41#define IOMEM(x) x
42#else
43#define IOMEM(x) ((void __force __iomem *)(x))
44#endif
45
46#if defined(CONFIG_ARCH_MSM7X30) 40#if defined(CONFIG_ARCH_MSM7X30)
47#include "msm_iomap-7x30.h" 41#include "msm_iomap-7x30.h"
48#elif defined(CONFIG_ARCH_QSD8X50) 42#elif defined(CONFIG_ARCH_QSD8X50)
diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c
index 578b04e42deb..a1e7b1168850 100644
--- a/arch/arm/mach-msm/io.c
+++ b/arch/arm/mach-msm/io.c
@@ -172,8 +172,8 @@ void __init msm_map_msm7x30_io(void)
172} 172}
173#endif /* CONFIG_ARCH_MSM7X30 */ 173#endif /* CONFIG_ARCH_MSM7X30 */
174 174
175void __iomem * 175void __iomem *__msm_ioremap_caller(unsigned long phys_addr, size_t size,
176__msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype) 176 unsigned int mtype, void *caller)
177{ 177{
178 if (mtype == MT_DEVICE) { 178 if (mtype == MT_DEVICE) {
179 /* The peripherals in the 88000000 - D0000000 range 179 /* The peripherals in the 88000000 - D0000000 range
@@ -184,7 +184,5 @@ __msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
184 mtype = MT_DEVICE_NONSHARED; 184 mtype = MT_DEVICE_NONSHARED;
185 } 185 }
186 186
187 return __arm_ioremap_caller(phys_addr, size, mtype, 187 return __arm_ioremap_caller(phys_addr, size, mtype, caller);
188 __builtin_return_address(0));
189} 188}
190EXPORT_SYMBOL(__msm_ioremap);
diff --git a/arch/arm/mach-mv78xx0/include/mach/io.h b/arch/arm/mach-mv78xx0/include/mach/io.h
index 450e0e1ad092..c7d9d00d8fc1 100644
--- a/arch/arm/mach-mv78xx0/include/mach/io.h
+++ b/arch/arm/mach-mv78xx0/include/mach/io.h
@@ -20,7 +20,5 @@ static inline void __iomem *__io(unsigned long addr)
20} 20}
21 21
22#define __io(a) __io(a) 22#define __io(a) __io(a)
23#define __mem_pci(a) (a)
24
25 23
26#endif 24#endif
diff --git a/arch/arm/mach-mxs/include/mach/hardware.h b/arch/arm/mach-mxs/include/mach/hardware.h
index 53e89a09bf0d..4c0e8a64d8c7 100644
--- a/arch/arm/mach-mxs/include/mach/hardware.h
+++ b/arch/arm/mach-mxs/include/mach/hardware.h
@@ -20,10 +20,4 @@
20#ifndef __MACH_MXS_HARDWARE_H__ 20#ifndef __MACH_MXS_HARDWARE_H__
21#define __MACH_MXS_HARDWARE_H__ 21#define __MACH_MXS_HARDWARE_H__
22 22
23#ifdef __ASSEMBLER__
24#define IOMEM(addr) (addr)
25#else
26#define IOMEM(addr) ((void __force __iomem *)(addr))
27#endif
28
29#endif /* __MACH_MXS_HARDWARE_H__ */ 23#endif /* __MACH_MXS_HARDWARE_H__ */
diff --git a/arch/arm/mach-mxs/include/mach/io.h b/arch/arm/mach-mxs/include/mach/io.h
deleted file mode 100644
index 289b7227e072..000000000000
--- a/arch/arm/mach-mxs/include/mach/io.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/*
2 * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
3 */
4
5/*
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __MACH_MXS_IO_H__
12#define __MACH_MXS_IO_H__
13
14/* Allow IO space to be anywhere in the memory */
15#define IO_SPACE_LIMIT 0xffffffff
16
17/* io address mapping macro */
18#define __io(a) __typesafe_io(a)
19
20#define __mem_pci(a) (a)
21
22#endif /* __MACH_MXS_IO_H__ */
diff --git a/arch/arm/mach-netx/generic.c b/arch/arm/mach-netx/generic.c
index 59e67979f197..aa627465d914 100644
--- a/arch/arm/mach-netx/generic.c
+++ b/arch/arm/mach-netx/generic.c
@@ -168,7 +168,7 @@ void __init netx_init_irq(void)
168{ 168{
169 int irq; 169 int irq;
170 170
171 vic_init(__io(io_p2v(NETX_PA_VIC)), 0, ~0, 0); 171 vic_init(io_p2v(NETX_PA_VIC), 0, ~0, 0);
172 172
173 for (irq = NETX_IRQ_HIF_CHAINED(0); irq <= NETX_IRQ_HIF_LAST; irq++) { 173 for (irq = NETX_IRQ_HIF_CHAINED(0); irq <= NETX_IRQ_HIF_LAST; irq++) {
174 irq_set_chip_and_handler(irq, &netx_hif_chip, 174 irq_set_chip_and_handler(irq, &netx_hif_chip,
diff --git a/arch/arm/mach-netx/include/mach/hardware.h b/arch/arm/mach-netx/include/mach/hardware.h
index 517a2bd37842..b661af2f2145 100644
--- a/arch/arm/mach-netx/include/mach/hardware.h
+++ b/arch/arm/mach-netx/include/mach/hardware.h
@@ -33,7 +33,7 @@
33#define XMAC_MEM_SIZE 0x1000 33#define XMAC_MEM_SIZE 0x1000
34#define SRAM_MEM_SIZE 0x8000 34#define SRAM_MEM_SIZE 0x8000
35 35
36#define io_p2v(x) ((x) - NETX_IO_PHYS + NETX_IO_VIRT) 36#define io_p2v(x) IOMEM((x) - NETX_IO_PHYS + NETX_IO_VIRT)
37#define io_v2p(x) ((x) - NETX_IO_VIRT + NETX_IO_PHYS) 37#define io_v2p(x) ((x) - NETX_IO_VIRT + NETX_IO_PHYS)
38 38
39#endif 39#endif
diff --git a/arch/arm/mach-netx/include/mach/io.h b/arch/arm/mach-netx/include/mach/io.h
deleted file mode 100644
index c3921cb3b6a6..000000000000
--- a/arch/arm/mach-netx/include/mach/io.h
+++ /dev/null
@@ -1,28 +0,0 @@
1/*
2 * arch/arm/mach-netx/include/mach/io.h
3 *
4 * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2
8 * as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#ifndef __ASM_ARM_ARCH_IO_H
21#define __ASM_ARM_ARCH_IO_H
22
23#define IO_SPACE_LIMIT 0xffffffff
24
25#define __io(a) __typesafe_io(a)
26#define __mem_pci(a) (a)
27
28#endif
diff --git a/arch/arm/mach-netx/include/mach/netx-regs.h b/arch/arm/mach-netx/include/mach/netx-regs.h
index 5a03e7ccb01a..fdde22b58ac3 100644
--- a/arch/arm/mach-netx/include/mach/netx-regs.h
+++ b/arch/arm/mach-netx/include/mach/netx-regs.h
@@ -115,7 +115,7 @@
115 *********************************/ 115 *********************************/
116 116
117/* Registers */ 117/* Registers */
118#define NETX_SYSTEM_REG(ofs) __io(NETX_VA_SYSTEM + (ofs)) 118#define NETX_SYSTEM_REG(ofs) IOMEM(NETX_VA_SYSTEM + (ofs))
119#define NETX_SYSTEM_BOO_SR NETX_SYSTEM_REG(0x00) 119#define NETX_SYSTEM_BOO_SR NETX_SYSTEM_REG(0x00)
120#define NETX_SYSTEM_IOC_CR NETX_SYSTEM_REG(0x04) 120#define NETX_SYSTEM_IOC_CR NETX_SYSTEM_REG(0x04)
121#define NETX_SYSTEM_IOC_MR NETX_SYSTEM_REG(0x08) 121#define NETX_SYSTEM_IOC_MR NETX_SYSTEM_REG(0x08)
@@ -185,7 +185,7 @@
185 *******************************/ 185 *******************************/
186 186
187/* Registers */ 187/* Registers */
188#define NETX_GPIO_REG(ofs) __io(NETX_VA_GPIO + (ofs)) 188#define NETX_GPIO_REG(ofs) IOMEM(NETX_VA_GPIO + (ofs))
189#define NETX_GPIO_CFG(gpio) NETX_GPIO_REG(0x0 + ((gpio)<<2)) 189#define NETX_GPIO_CFG(gpio) NETX_GPIO_REG(0x0 + ((gpio)<<2))
190#define NETX_GPIO_THRESHOLD_CAPTURE(gpio) NETX_GPIO_REG(0x40 + ((gpio)<<2)) 190#define NETX_GPIO_THRESHOLD_CAPTURE(gpio) NETX_GPIO_REG(0x40 + ((gpio)<<2))
191#define NETX_GPIO_COUNTER_CTRL(counter) NETX_GPIO_REG(0x80 + ((counter)<<2)) 191#define NETX_GPIO_COUNTER_CTRL(counter) NETX_GPIO_REG(0x80 + ((counter)<<2))
@@ -230,7 +230,7 @@
230 *******************************/ 230 *******************************/
231 231
232/* Registers */ 232/* Registers */
233#define NETX_PIO_REG(ofs) __io(NETX_VA_PIO + (ofs)) 233#define NETX_PIO_REG(ofs) IOMEM(NETX_VA_PIO + (ofs))
234#define NETX_PIO_INPIO NETX_PIO_REG(0x0) 234#define NETX_PIO_INPIO NETX_PIO_REG(0x0)
235#define NETX_PIO_OUTPIO NETX_PIO_REG(0x4) 235#define NETX_PIO_OUTPIO NETX_PIO_REG(0x4)
236#define NETX_PIO_OEPIO NETX_PIO_REG(0x8) 236#define NETX_PIO_OEPIO NETX_PIO_REG(0x8)
@@ -240,7 +240,7 @@
240 *******************************/ 240 *******************************/
241 241
242/* Registers */ 242/* Registers */
243#define NETX_MIIMU __io(NETX_VA_MIIMU) 243#define NETX_MIIMU IOMEM(NETX_VA_MIIMU)
244 244
245/* Bits */ 245/* Bits */
246#define MIIMU_SNRDY (1<<0) 246#define MIIMU_SNRDY (1<<0)
@@ -317,7 +317,7 @@
317 *******************************/ 317 *******************************/
318 318
319/* Registers */ 319/* Registers */
320#define NETX_PFIFO_REG(ofs) __io(NETX_VA_PFIFO + (ofs)) 320#define NETX_PFIFO_REG(ofs) IOMEM(NETX_VA_PFIFO + (ofs))
321#define NETX_PFIFO_BASE(pfifo) NETX_PFIFO_REG(0x00 + ((pfifo)<<2)) 321#define NETX_PFIFO_BASE(pfifo) NETX_PFIFO_REG(0x00 + ((pfifo)<<2))
322#define NETX_PFIFO_BORDER_BASE(pfifo) NETX_PFIFO_REG(0x80 + ((pfifo)<<2)) 322#define NETX_PFIFO_BORDER_BASE(pfifo) NETX_PFIFO_REG(0x80 + ((pfifo)<<2))
323#define NETX_PFIFO_RESET NETX_PFIFO_REG(0x100) 323#define NETX_PFIFO_RESET NETX_PFIFO_REG(0x100)
@@ -334,7 +334,7 @@
334 *******************************/ 334 *******************************/
335 335
336/* Registers */ 336/* Registers */
337#define NETX_MEMCR_REG(ofs) __io(NETX_VA_MEMCR + (ofs)) 337#define NETX_MEMCR_REG(ofs) IOMEM(NETX_VA_MEMCR + (ofs))
338#define NETX_MEMCR_SRAM_CTRL(cs) NETX_MEMCR_REG(0x0 + 4 * (cs)) /* SRAM for CS 0..2 */ 338#define NETX_MEMCR_SRAM_CTRL(cs) NETX_MEMCR_REG(0x0 + 4 * (cs)) /* SRAM for CS 0..2 */
339#define NETX_MEMCR_SDRAM_CFG_CTRL NETX_MEMCR_REG(0x40) 339#define NETX_MEMCR_SDRAM_CFG_CTRL NETX_MEMCR_REG(0x40)
340#define NETX_MEMCR_SDRAM_TIMING_CTRL NETX_MEMCR_REG(0x44) 340#define NETX_MEMCR_SDRAM_TIMING_CTRL NETX_MEMCR_REG(0x44)
@@ -355,7 +355,7 @@
355 *******************************/ 355 *******************************/
356 356
357/* Registers */ 357/* Registers */
358#define NETX_DPMAS_REG(ofs) __io(NETX_VA_DPMAS + (ofs)) 358#define NETX_DPMAS_REG(ofs) IOMEM(NETX_VA_DPMAS + (ofs))
359#define NETX_DPMAS_SYS_STAT NETX_DPMAS_REG(0x4d8) 359#define NETX_DPMAS_SYS_STAT NETX_DPMAS_REG(0x4d8)
360#define NETX_DPMAS_INT_STAT NETX_DPMAS_REG(0x4e0) 360#define NETX_DPMAS_INT_STAT NETX_DPMAS_REG(0x4e0)
361#define NETX_DPMAS_INT_EN NETX_DPMAS_REG(0x4f0) 361#define NETX_DPMAS_INT_EN NETX_DPMAS_REG(0x4f0)
@@ -425,7 +425,7 @@
425/******************************* 425/*******************************
426 * I2C * 426 * I2C *
427 *******************************/ 427 *******************************/
428#define NETX_I2C_REG(ofs) __io(NETX_VA_I2C, (ofs)) 428#define NETX_I2C_REG(ofs) IOMEM(NETX_VA_I2C, (ofs))
429#define NETX_I2C_CTRL NETX_I2C_REG(0x0) 429#define NETX_I2C_CTRL NETX_I2C_REG(0x0)
430#define NETX_I2C_DATA NETX_I2C_REG(0x4) 430#define NETX_I2C_DATA NETX_I2C_REG(0x4)
431 431
diff --git a/arch/arm/mach-nomadik/include/mach/io.h b/arch/arm/mach-nomadik/include/mach/io.h
deleted file mode 100644
index 2e1eca1b8243..000000000000
--- a/arch/arm/mach-nomadik/include/mach/io.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/*
2 * arch/arm/mach-nomadik/include/mach/io.h (copied from mach-sa1100)
3 *
4 * Copyright (C) 1997-1999 Russell King
5 *
6 * Modifications:
7 * 06-12-1997 RMK Created.
8 * 07-04-1999 RMK Major cleanup
9 */
10#ifndef __ASM_ARM_ARCH_IO_H
11#define __ASM_ARM_ARCH_IO_H
12
13#define IO_SPACE_LIMIT 0xffffffff
14
15/*
16 * We don't actually have real ISA nor PCI buses, but there is so many
17 * drivers out there that might just work if we fake them...
18 */
19#define __io(a) __typesafe_io(a)
20#define __mem_pci(a) (a)
21
22#endif
diff --git a/arch/arm/mach-omap1/ams-delta-fiq-handler.S b/arch/arm/mach-omap1/ams-delta-fiq-handler.S
index 399c4c49722f..a051cb8ae57f 100644
--- a/arch/arm/mach-omap1/ams-delta-fiq-handler.S
+++ b/arch/arm/mach-omap1/ams-delta-fiq-handler.S
@@ -14,6 +14,7 @@
14 */ 14 */
15 15
16#include <linux/linkage.h> 16#include <linux/linkage.h>
17#include <asm/assembler.h>
17 18
18#include <plat/board-ams-delta.h> 19#include <plat/board-ams-delta.h>
19 20
diff --git a/arch/arm/mach-omap1/include/mach/entry-macro.S b/arch/arm/mach-omap1/include/mach/entry-macro.S
index fa0f32a686aa..88f08cab1717 100644
--- a/arch/arm/mach-omap1/include/mach/entry-macro.S
+++ b/arch/arm/mach-omap1/include/mach/entry-macro.S
@@ -11,7 +11,6 @@
11 */ 11 */
12 12
13#include <mach/hardware.h> 13#include <mach/hardware.h>
14#include <mach/io.h>
15#include <mach/irqs.h> 14#include <mach/irqs.h>
16 15
17#include "../../iomap.h" 16#include "../../iomap.h"
diff --git a/arch/arm/mach-omap1/include/mach/io.h b/arch/arm/mach-omap1/include/mach/io.h
deleted file mode 100644
index 37b12e1fd022..000000000000
--- a/arch/arm/mach-omap1/include/mach/io.h
+++ /dev/null
@@ -1,46 +0,0 @@
1/*
2 * arch/arm/mach-omap1/include/mach/io.h
3 *
4 * IO definitions for TI OMAP processors and boards
5 *
6 * Copied from arch/arm/mach-sa1100/include/mach/io.h
7 * Copyright (C) 1997-1999 Russell King
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
15 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
16 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
17 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
20 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
21 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 *
25 * You should have received a copy of the GNU General Public License along
26 * with this program; if not, write to the Free Software Foundation, Inc.,
27 * 675 Mass Ave, Cambridge, MA 02139, USA.
28 *
29 * Modifications:
30 * 06-12-1997 RMK Created.
31 * 07-04-1999 RMK Major cleanup
32 */
33
34#ifndef __ASM_ARM_ARCH_IO_H
35#define __ASM_ARM_ARCH_IO_H
36
37#define IO_SPACE_LIMIT 0xffffffff
38
39/*
40 * We don't actually have real ISA nor PCI buses, but there is so many
41 * drivers out there that might just work if we fake them...
42 */
43#define __io(a) __typesafe_io(a)
44#define __mem_pci(a) (a)
45
46#endif
diff --git a/arch/arm/mach-omap1/iomap.h b/arch/arm/mach-omap1/iomap.h
index d68175761c3d..330c4716b028 100644
--- a/arch/arm/mach-omap1/iomap.h
+++ b/arch/arm/mach-omap1/iomap.h
@@ -22,12 +22,6 @@
22 * 675 Mass Ave, Cambridge, MA 02139, USA. 22 * 675 Mass Ave, Cambridge, MA 02139, USA.
23 */ 23 */
24 24
25#ifdef __ASSEMBLER__
26#define IOMEM(x) (x)
27#else
28#define IOMEM(x) ((void __force __iomem *)(x))
29#endif
30
31#define OMAP1_IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */ 25#define OMAP1_IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */
32#define OMAP1_IO_ADDRESS(pa) IOMEM((pa) - OMAP1_IO_OFFSET) 26#define OMAP1_IO_ADDRESS(pa) IOMEM((pa) - OMAP1_IO_OFFSET)
33 27
diff --git a/arch/arm/mach-omap1/sleep.S b/arch/arm/mach-omap1/sleep.S
index 0779db150da7..0e628743bd03 100644
--- a/arch/arm/mach-omap1/sleep.S
+++ b/arch/arm/mach-omap1/sleep.S
@@ -36,8 +36,6 @@
36 36
37#include <asm/assembler.h> 37#include <asm/assembler.h>
38 38
39#include <mach/io.h>
40
41#include "iomap.h" 39#include "iomap.h"
42#include "pm.h" 40#include "pm.h"
43 41
diff --git a/arch/arm/mach-omap1/sram.S b/arch/arm/mach-omap1/sram.S
index 2ce0b9ab20e5..00e9d9e9adf1 100644
--- a/arch/arm/mach-omap1/sram.S
+++ b/arch/arm/mach-omap1/sram.S
@@ -12,7 +12,6 @@
12 12
13#include <asm/assembler.h> 13#include <asm/assembler.h>
14 14
15#include <mach/io.h>
16#include <mach/hardware.h> 15#include <mach/hardware.h>
17 16
18#include "iomap.h" 17#include "iomap.h"
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index 981b9f9111a4..480fb8f09aed 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -19,6 +19,7 @@
19#include <linux/kernel.h> 19#include <linux/kernel.h>
20#include <linux/clk.h> 20#include <linux/clk.h>
21#include <linux/list.h> 21#include <linux/list.h>
22#include <linux/io.h>
22 23
23#include <plat/hardware.h> 24#include <plat/hardware.h>
24#include <plat/clkdev_omap.h> 25#include <plat/clkdev_omap.h>
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 79b98f22f207..c03c1108468e 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -26,6 +26,7 @@
26#include <linux/kernel.h> 26#include <linux/kernel.h>
27#include <linux/list.h> 27#include <linux/list.h>
28#include <linux/clk.h> 28#include <linux/clk.h>
29#include <linux/io.h>
29 30
30#include <plat/hardware.h> 31#include <plat/hardware.h>
31#include <plat/clkdev_omap.h> 32#include <plat/clkdev_omap.h>
diff --git a/arch/arm/mach-omap2/include/mach/io.h b/arch/arm/mach-omap2/include/mach/io.h
deleted file mode 100644
index b8758c8a9394..000000000000
--- a/arch/arm/mach-omap2/include/mach/io.h
+++ /dev/null
@@ -1,49 +0,0 @@
1/*
2 * arch/arm/mach-omap2/include/mach/io.h
3 *
4 * IO definitions for TI OMAP processors and boards
5 *
6 * Copied from arch/arm/mach-sa1100/include/mach/io.h
7 * Copyright (C) 1997-1999 Russell King
8 *
9 * Copyright (C) 2009 Texas Instruments
10 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 *
17 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
18 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
20 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
23 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
24 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * You should have received a copy of the GNU General Public License along
29 * with this program; if not, write to the Free Software Foundation, Inc.,
30 * 675 Mass Ave, Cambridge, MA 02139, USA.
31 *
32 * Modifications:
33 * 06-12-1997 RMK Created.
34 * 07-04-1999 RMK Major cleanup
35 */
36
37#ifndef __ASM_ARM_ARCH_IO_H
38#define __ASM_ARM_ARCH_IO_H
39
40#define IO_SPACE_LIMIT 0xffffffff
41
42/*
43 * We don't actually have real ISA nor PCI buses, but there is so many
44 * drivers out there that might just work if we fake them...
45 */
46#define __io(a) __typesafe_io(a)
47#define __mem_pci(a) (a)
48
49#endif
diff --git a/arch/arm/mach-omap2/iomap.h b/arch/arm/mach-omap2/iomap.h
index e6f958165296..0812b154f5b5 100644
--- a/arch/arm/mach-omap2/iomap.h
+++ b/arch/arm/mach-omap2/iomap.h
@@ -22,12 +22,6 @@
22 * 675 Mass Ave, Cambridge, MA 02139, USA. 22 * 675 Mass Ave, Cambridge, MA 02139, USA.
23 */ 23 */
24 24
25#ifdef __ASSEMBLER__
26#define IOMEM(x) (x)
27#else
28#define IOMEM(x) ((void __force __iomem *)(x))
29#endif
30
31#define OMAP2_L3_IO_OFFSET 0x90000000 25#define OMAP2_L3_IO_OFFSET 0x90000000
32#define OMAP2_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L3_IO_OFFSET) /* L3 */ 26#define OMAP2_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L3_IO_OFFSET) /* L3 */
33 27
diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h
index d2513ac79ff5..2e6454c8d4ba 100644
--- a/arch/arm/mach-orion5x/common.h
+++ b/arch/arm/mach-orion5x/common.h
@@ -57,5 +57,14 @@ struct meminfo;
57struct tag; 57struct tag;
58extern void __init tag_fixup_mem32(struct tag *, char **, struct meminfo *); 58extern void __init tag_fixup_mem32(struct tag *, char **, struct meminfo *);
59 59
60/*****************************************************************************
61 * Helpers to access Orion registers
62 ****************************************************************************/
63/*
64 * These are not preempt-safe. Locks, if needed, must be taken
65 * care of by the caller.
66 */
67#define orion5x_setbits(r, mask) writel(readl(r) | (mask), (r))
68#define orion5x_clrbits(r, mask) writel(readl(r) & ~(mask), (r))
60 69
61#endif 70#endif
diff --git a/arch/arm/mach-orion5x/include/mach/io.h b/arch/arm/mach-orion5x/include/mach/io.h
deleted file mode 100644
index e9d9afdc2659..000000000000
--- a/arch/arm/mach-orion5x/include/mach/io.h
+++ /dev/null
@@ -1,33 +0,0 @@
1/*
2 * arch/arm/mach-orion5x/include/mach/io.h
3 *
4 * Tzachi Perelstein <tzachi@marvell.com>
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#ifndef __ASM_ARCH_IO_H
12#define __ASM_ARCH_IO_H
13
14#include "orion5x.h"
15
16#define IO_SPACE_LIMIT 0xffffffff
17
18#define __io(a) __typesafe_io(a)
19#define __mem_pci(a) (a)
20
21
22/*****************************************************************************
23 * Helpers to access Orion registers
24 ****************************************************************************/
25/*
26 * These are not preempt-safe. Locks, if needed, must be taken
27 * care of by the caller.
28 */
29#define orion5x_setbits(r, mask) writel(readl(r) | (mask), (r))
30#define orion5x_clrbits(r, mask) writel(readl(r) & ~(mask), (r))
31
32
33#endif
diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
index d6a91948e4dc..cb19e1661bb3 100644
--- a/arch/arm/mach-orion5x/pci.c
+++ b/arch/arm/mach-orion5x/pci.c
@@ -19,6 +19,7 @@
19#include <asm/mach/pci.h> 19#include <asm/mach/pci.h>
20#include <plat/pcie.h> 20#include <plat/pcie.h>
21#include <plat/addr-map.h> 21#include <plat/addr-map.h>
22#include <mach/orion5x.h>
22#include "common.h" 23#include "common.h"
23 24
24/***************************************************************************** 25/*****************************************************************************
diff --git a/arch/arm/mach-orion5x/tsx09-common.c b/arch/arm/mach-orion5x/tsx09-common.c
index c9abb8fbfa70..7189827d641d 100644
--- a/arch/arm/mach-orion5x/tsx09-common.c
+++ b/arch/arm/mach-orion5x/tsx09-common.c
@@ -15,6 +15,7 @@
15#include <linux/mv643xx_eth.h> 15#include <linux/mv643xx_eth.h>
16#include <linux/timex.h> 16#include <linux/timex.h>
17#include <linux/serial_reg.h> 17#include <linux/serial_reg.h>
18#include <mach/orion5x.h>
18#include "tsx09-common.h" 19#include "tsx09-common.h"
19#include "common.h" 20#include "common.h"
20 21
diff --git a/arch/arm/mach-picoxcell/include/mach/io.h b/arch/arm/mach-picoxcell/include/mach/io.h
deleted file mode 100644
index 7573ec7d10a3..000000000000
--- a/arch/arm/mach-picoxcell/include/mach/io.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/*
2 * Copyright (c) 2011 Picochip Ltd., Jamie Iles
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14#ifndef __ASM_ARM_ARCH_IO_H
15#define __ASM_ARM_ARCH_IO_H
16
17/* No ioports, but needed for driver compatibility. */
18#define __io(a) __typesafe_io(a)
19/* No PCI possible on picoxcell. */
20#define __mem_pci(a) (a)
21
22#endif /* __ASM_ARM_ARCH_IO_H */
diff --git a/arch/arm/mach-pnx4008/include/mach/io.h b/arch/arm/mach-pnx4008/include/mach/io.h
deleted file mode 100644
index cbf0904540ea..000000000000
--- a/arch/arm/mach-pnx4008/include/mach/io.h
+++ /dev/null
@@ -1,21 +0,0 @@
1
2/*
3 * arch/arm/mach-pnx4008/include/mach/io.h
4 *
5 * Author: Dmitry Chigirev <chigirev@ru.mvista.com>
6 *
7 * 2005 (c) MontaVista Software, Inc. This file is licensed under
8 * the terms of the GNU General Public License version 2. This program
9 * is licensed "as is" without any warranty of any kind, whether express
10 * or implied.
11 */
12
13#ifndef __ASM_ARM_ARCH_IO_H
14#define __ASM_ARM_ARCH_IO_H
15
16#define IO_SPACE_LIMIT 0xffffffff
17
18#define __io(a) __typesafe_io(a)
19#define __mem_pci(a) (a)
20
21#endif
diff --git a/arch/arm/mach-prima2/include/mach/io.h b/arch/arm/mach-prima2/include/mach/io.h
deleted file mode 100644
index 6c31e9ec279e..000000000000
--- a/arch/arm/mach-prima2/include/mach/io.h
+++ /dev/null
@@ -1,16 +0,0 @@
1/*
2 * arch/arm/mach-prima2/include/mach/io.h
3 *
4 * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
5 *
6 * Licensed under GPLv2 or later.
7 */
8
9#ifndef __MACH_PRIMA2_IO_H
10#define __MACH_PRIMA2_IO_H
11
12#define IO_SPACE_LIMIT ((resource_size_t)0)
13
14#define __mem_pci(a) (a)
15
16#endif
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index 61d3c72ded84..109ccd2a8885 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -108,6 +108,7 @@ config CSB726_CSB701
108 108
109config MACH_ARMCORE 109config MACH_ARMCORE
110 bool "CompuLab CM-X255/CM-X270 modules" 110 bool "CompuLab CM-X255/CM-X270 modules"
111 select ARCH_HAS_DMA_SET_COHERENT_MASK if PCI
111 select PXA27x 112 select PXA27x
112 select IWMMXT 113 select IWMMXT
113 select PXA25x 114 select PXA25x
diff --git a/arch/arm/mach-pxa/clock-pxa2xx.c b/arch/arm/mach-pxa/clock-pxa2xx.c
index 1d5859d9a0e3..9ee2ad6a0a07 100644
--- a/arch/arm/mach-pxa/clock-pxa2xx.c
+++ b/arch/arm/mach-pxa/clock-pxa2xx.c
@@ -9,6 +9,7 @@
9#include <linux/module.h> 9#include <linux/module.h>
10#include <linux/kernel.h> 10#include <linux/kernel.h>
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/io.h>
12#include <linux/syscore_ops.h> 13#include <linux/syscore_ops.h>
13 14
14#include <mach/pxa2xx-regs.h> 15#include <mach/pxa2xx-regs.h>
diff --git a/arch/arm/mach-pxa/corgi_pm.c b/arch/arm/mach-pxa/corgi_pm.c
index 39e265cfc86d..048c4299473c 100644
--- a/arch/arm/mach-pxa/corgi_pm.c
+++ b/arch/arm/mach-pxa/corgi_pm.c
@@ -19,6 +19,7 @@
19#include <linux/interrupt.h> 19#include <linux/interrupt.h>
20#include <linux/platform_device.h> 20#include <linux/platform_device.h>
21#include <linux/apm-emulation.h> 21#include <linux/apm-emulation.h>
22#include <linux/io.h>
22 23
23#include <asm/irq.h> 24#include <asm/irq.h>
24#include <asm/mach-types.h> 25#include <asm/mach-types.h>
diff --git a/arch/arm/mach-pxa/cpufreq-pxa3xx.c b/arch/arm/mach-pxa/cpufreq-pxa3xx.c
index 88fbec05ec50..b85b4ab7aac6 100644
--- a/arch/arm/mach-pxa/cpufreq-pxa3xx.c
+++ b/arch/arm/mach-pxa/cpufreq-pxa3xx.c
@@ -15,6 +15,7 @@
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/cpufreq.h> 16#include <linux/cpufreq.h>
17#include <linux/slab.h> 17#include <linux/slab.h>
18#include <linux/io.h>
18 19
19#include <mach/pxa3xx-regs.h> 20#include <mach/pxa3xx-regs.h>
20 21
diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h
index 8184669dde28..56d92e5cad85 100644
--- a/arch/arm/mach-pxa/include/mach/hardware.h
+++ b/arch/arm/mach-pxa/include/mach/hardware.h
@@ -40,7 +40,6 @@
40#define io_p2v(x) IOMEM(0xf2000000 + ((x) & 0x01ffffff) + (((x) & 0x1c000000) >> 1)) 40#define io_p2v(x) IOMEM(0xf2000000 + ((x) & 0x01ffffff) + (((x) & 0x1c000000) >> 1))
41 41
42#ifndef __ASSEMBLY__ 42#ifndef __ASSEMBLY__
43# define IOMEM(x) ((void __iomem *)(x))
44# define __REG(x) (*((volatile u32 __iomem *)io_p2v(x))) 43# define __REG(x) (*((volatile u32 __iomem *)io_p2v(x)))
45 44
46/* With indexed regs we don't want to feed the index through io_p2v() 45/* With indexed regs we don't want to feed the index through io_p2v()
@@ -52,7 +51,6 @@
52 51
53#else 52#else
54 53
55# define IOMEM(x) x
56# define __REG(x) io_p2v(x) 54# define __REG(x) io_p2v(x)
57# define __PREG(x) io_v2p(x) 55# define __PREG(x) io_v2p(x)
58 56
@@ -337,8 +335,4 @@ extern unsigned int get_memclk_frequency_10khz(void);
337extern unsigned long get_clock_tick_rate(void); 335extern unsigned long get_clock_tick_rate(void);
338#endif 336#endif
339 337
340#if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI)
341#define ARCH_HAS_DMA_SET_COHERENT_MASK
342#endif
343
344#endif /* _ASM_ARCH_HARDWARE_H */ 338#endif /* _ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-pxa/include/mach/io.h b/arch/arm/mach-pxa/include/mach/io.h
deleted file mode 100644
index fdca3be47d9b..000000000000
--- a/arch/arm/mach-pxa/include/mach/io.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * arch/arm/mach-pxa/include/mach/io.h
3 *
4 * Copied from asm/arch/sa1100/io.h
5 */
6#ifndef __ASM_ARM_ARCH_IO_H
7#define __ASM_ARM_ARCH_IO_H
8
9#include <mach/hardware.h>
10
11#define IO_SPACE_LIMIT 0xffffffff
12
13/*
14 * We don't actually have real ISA nor PCI buses, but there is so many
15 * drivers out there that might just work if we fake them...
16 */
17#define __io(a) __typesafe_io(a)
18#define __mem_pci(a) (a)
19
20#endif
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c
index 29b62afc6f7c..b0a842887780 100644
--- a/arch/arm/mach-pxa/mfp-pxa2xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa2xx.c
@@ -17,6 +17,7 @@
17#include <linux/module.h> 17#include <linux/module.h>
18#include <linux/kernel.h> 18#include <linux/kernel.h>
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/io.h>
20#include <linux/syscore_ops.h> 21#include <linux/syscore_ops.h>
21 22
22#include <mach/pxa2xx-regs.h> 23#include <mach/pxa2xx-regs.h>
diff --git a/arch/arm/mach-pxa/pxa2xx.c b/arch/arm/mach-pxa/pxa2xx.c
index 868270421b8c..f8ec85450c42 100644
--- a/arch/arm/mach-pxa/pxa2xx.c
+++ b/arch/arm/mach-pxa/pxa2xx.c
@@ -13,6 +13,7 @@
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/device.h> 15#include <linux/device.h>
16#include <linux/io.h>
16 17
17#include <mach/hardware.h> 18#include <mach/hardware.h>
18#include <mach/pxa2xx-regs.h> 19#include <mach/pxa2xx-regs.h>
diff --git a/arch/arm/mach-pxa/pxa300.c b/arch/arm/mach-pxa/pxa300.c
index 40bb16501d86..17cbc0c7bdb8 100644
--- a/arch/arm/mach-pxa/pxa300.c
+++ b/arch/arm/mach-pxa/pxa300.c
@@ -16,6 +16,7 @@
16#include <linux/module.h> 16#include <linux/module.h>
17#include <linux/kernel.h> 17#include <linux/kernel.h>
18#include <linux/platform_device.h> 18#include <linux/platform_device.h>
19#include <linux/io.h>
19 20
20#include <mach/pxa300.h> 21#include <mach/pxa300.h>
21 22
diff --git a/arch/arm/mach-pxa/pxa320.c b/arch/arm/mach-pxa/pxa320.c
index 8d614ecd8e99..6dc99d4f2dc6 100644
--- a/arch/arm/mach-pxa/pxa320.c
+++ b/arch/arm/mach-pxa/pxa320.c
@@ -16,6 +16,7 @@
16#include <linux/module.h> 16#include <linux/module.h>
17#include <linux/kernel.h> 17#include <linux/kernel.h>
18#include <linux/platform_device.h> 18#include <linux/platform_device.h>
19#include <linux/io.h>
19 20
20#include <mach/pxa320.h> 21#include <mach/pxa320.h>
21 22
diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c
index 30989baf7f2a..bdf4cb88ca0a 100644
--- a/arch/arm/mach-pxa/sharpsl_pm.c
+++ b/arch/arm/mach-pxa/sharpsl_pm.c
@@ -24,6 +24,7 @@
24#include <linux/leds.h> 24#include <linux/leds.h>
25#include <linux/suspend.h> 25#include <linux/suspend.h>
26#include <linux/gpio.h> 26#include <linux/gpio.h>
27#include <linux/io.h>
27 28
28#include <asm/mach-types.h> 29#include <asm/mach-types.h>
29#include <mach/pm.h> 30#include <mach/pm.h>
diff --git a/arch/arm/mach-realview/include/mach/hardware.h b/arch/arm/mach-realview/include/mach/hardware.h
index 8a638d15797f..281e71c97525 100644
--- a/arch/arm/mach-realview/include/mach/hardware.h
+++ b/arch/arm/mach-realview/include/mach/hardware.h
@@ -37,6 +37,6 @@
37#else 37#else
38#define IO_ADDRESS(x) (x) 38#define IO_ADDRESS(x) (x)
39#endif 39#endif
40#define __io_address(n) __io(IO_ADDRESS(n)) 40#define __io_address(n) IOMEM(IO_ADDRESS(n))
41 41
42#endif 42#endif
diff --git a/arch/arm/mach-realview/include/mach/io.h b/arch/arm/mach-realview/include/mach/io.h
deleted file mode 100644
index f05bcdf605d8..000000000000
--- a/arch/arm/mach-realview/include/mach/io.h
+++ /dev/null
@@ -1,28 +0,0 @@
1/*
2 * arch/arm/mach-realview/include/mach/io.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef __ASM_ARM_ARCH_IO_H
21#define __ASM_ARM_ARCH_IO_H
22
23#define IO_SPACE_LIMIT 0xffffffff
24
25#define __io(a) __typesafe_io(a)
26#define __mem_pci(a) (a)
27
28#endif
diff --git a/arch/arm/mach-rpc/include/mach/hardware.h b/arch/arm/mach-rpc/include/mach/hardware.h
index 050d63c74cc1..257166b21f3d 100644
--- a/arch/arm/mach-rpc/include/mach/hardware.h
+++ b/arch/arm/mach-rpc/include/mach/hardware.h
@@ -14,12 +14,6 @@
14 14
15#include <mach/memory.h> 15#include <mach/memory.h>
16 16
17#ifndef __ASSEMBLY__
18#define IOMEM(x) ((void __iomem *)(unsigned long)(x))
19#else
20#define IOMEM(x) x
21#endif /* __ASSEMBLY__ */
22
23/* 17/*
24 * What hardware must be present 18 * What hardware must be present
25 */ 19 */
diff --git a/arch/arm/mach-rpc/include/mach/io.h b/arch/arm/mach-rpc/include/mach/io.h
index 695f4ed2e11b..707071a7ea4e 100644
--- a/arch/arm/mach-rpc/include/mach/io.h
+++ b/arch/arm/mach-rpc/include/mach/io.h
@@ -28,9 +28,4 @@
28 */ 28 */
29#define __io(a) (PCIO_BASE + ((a) << 2)) 29#define __io(a) (PCIO_BASE + ((a) << 2))
30 30
31/*
32 * 1:1 mapping for ioremapped regions.
33 */
34#define __mem_pci(x) (x)
35
36#endif 31#endif
diff --git a/arch/arm/mach-s3c24xx/include/mach/io.h b/arch/arm/mach-s3c24xx/include/mach/io.h
index 118749f37c4c..5dd1db4e2677 100644
--- a/arch/arm/mach-s3c24xx/include/mach/io.h
+++ b/arch/arm/mach-s3c24xx/include/mach/io.h
@@ -208,9 +208,4 @@ DECLARE_IO(int,l,"")
208#define outsw(p,d,l) __raw_writesw(__ioaddr(p),d,l) 208#define outsw(p,d,l) __raw_writesw(__ioaddr(p),d,l)
209#define outsl(p,d,l) __raw_writesl(__ioaddr(p),d,l) 209#define outsl(p,d,l) __raw_writesl(__ioaddr(p),d,l)
210 210
211/*
212 * 1:1 mapping for ioremapped regions.
213 */
214#define __mem_pci(x) (x)
215
216#endif 211#endif
diff --git a/arch/arm/mach-s3c64xx/include/mach/io.h b/arch/arm/mach-s3c64xx/include/mach/io.h
deleted file mode 100644
index de5716dbbd65..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/io.h
+++ /dev/null
@@ -1,18 +0,0 @@
1/* arch/arm/mach-s3c64xxinclude/mach/io.h
2 *
3 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben-linux@fluff.org>
5 *
6 * Default IO routines for S3C64XX based
7 */
8
9#ifndef __ASM_ARM_ARCH_IO_H
10#define __ASM_ARM_ARCH_IO_H
11
12/* No current ISA/PCI bus support. */
13#define __io(a) __typesafe_io(a)
14#define __mem_pci(a) (a)
15
16#define IO_SPACE_LIMIT (0xFFFFFFFF)
17
18#endif
diff --git a/arch/arm/mach-s5p64x0/include/mach/io.h b/arch/arm/mach-s5p64x0/include/mach/io.h
deleted file mode 100644
index a3e095c02fb5..000000000000
--- a/arch/arm/mach-s5p64x0/include/mach/io.h
+++ /dev/null
@@ -1,25 +0,0 @@
1/* linux/arch/arm/mach-s5p64x0/include/mach/io.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Copyright 2008 Simtec Electronics
7 * Ben Dooks <ben-linux@fluff.org>
8 *
9 * Default IO routines for S5P64X0 based
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14*/
15
16#ifndef __ASM_ARM_ARCH_IO_H
17#define __ASM_ARM_ARCH_IO_H
18
19/* No current ISA/PCI bus support. */
20#define __io(a) __typesafe_io(a)
21#define __mem_pci(a) (a)
22
23#define IO_SPACE_LIMIT (0xFFFFFFFF)
24
25#endif
diff --git a/arch/arm/mach-s5pc100/include/mach/io.h b/arch/arm/mach-s5pc100/include/mach/io.h
deleted file mode 100644
index 819acf5eaf89..000000000000
--- a/arch/arm/mach-s5pc100/include/mach/io.h
+++ /dev/null
@@ -1,18 +0,0 @@
1/* arch/arm/mach-s5pc100/include/mach/io.h
2 *
3 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben-linux@fluff.org>
5 *
6 * Default IO routines for S5PC100 systems
7 */
8
9#ifndef __ASM_ARM_ARCH_IO_H
10#define __ASM_ARM_ARCH_IO_H
11
12/* No current ISA/PCI bus support. */
13#define __io(a) __typesafe_io(a)
14#define __mem_pci(a) (a)
15
16#define IO_SPACE_LIMIT (0xFFFFFFFF)
17
18#endif
diff --git a/arch/arm/mach-s5pv210/include/mach/io.h b/arch/arm/mach-s5pv210/include/mach/io.h
deleted file mode 100644
index 5ab9d560bc86..000000000000
--- a/arch/arm/mach-s5pv210/include/mach/io.h
+++ /dev/null
@@ -1,26 +0,0 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/io.h
2 *
3 * Copyright 2008-2010 Ben Dooks <ben-linux@fluff.org>
4 *
5 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
6 * http://www.samsung.com/
7 *
8 * Based on arch/arm/mach-s5p6442/include/mach/io.h
9 *
10 * Default IO routines for S5PV210
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15*/
16
17#ifndef __ASM_ARM_ARCH_IO_H
18#define __ASM_ARM_ARCH_IO_H __FILE__
19
20/* No current ISA/PCI bus support. */
21#define __io(a) __typesafe_io(a)
22#define __mem_pci(a) (a)
23
24#define IO_SPACE_LIMIT (0xFFFFFFFF)
25
26#endif /* __ASM_ARM_ARCH_IO_H */
diff --git a/arch/arm/mach-sa1100/include/mach/io.h b/arch/arm/mach-sa1100/include/mach/io.h
deleted file mode 100644
index dfc27ff08344..000000000000
--- a/arch/arm/mach-sa1100/include/mach/io.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * arch/arm/mach-sa1100/include/mach/io.h
3 *
4 * Copyright (C) 1997-1999 Russell King
5 *
6 * Modifications:
7 * 06-12-1997 RMK Created.
8 * 07-04-1999 RMK Major cleanup
9 */
10#ifndef __ASM_ARM_ARCH_IO_H
11#define __ASM_ARM_ARCH_IO_H
12
13/*
14 * __io() is required to be an equivalent mapping to __mem_pci() for
15 * SOC_COMMON to work.
16 */
17#define __io(a) __typesafe_io(a)
18#define __mem_pci(a) (a)
19
20#endif
diff --git a/arch/arm/mach-shark/include/mach/io.h b/arch/arm/mach-shark/include/mach/io.h
index 9ccbcecc430b..1a45fc01ff1d 100644
--- a/arch/arm/mach-shark/include/mach/io.h
+++ b/arch/arm/mach-shark/include/mach/io.h
@@ -15,6 +15,4 @@
15 15
16#define __io(a) ((void __iomem *)(0xe0000000 + (a))) 16#define __io(a) ((void __iomem *)(0xe0000000 + (a)))
17 17
18#define __mem_pci(addr) (addr)
19
20#endif 18#endif
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c
index f9153294e928..cb224a344af0 100644
--- a/arch/arm/mach-shmobile/board-ag5evm.c
+++ b/arch/arm/mach-shmobile/board-ag5evm.c
@@ -585,7 +585,7 @@ static void __init ag5evm_init(void)
585 585
586#ifdef CONFIG_CACHE_L2X0 586#ifdef CONFIG_CACHE_L2X0
587 /* Shared attribute override enable, 64K*8way */ 587 /* Shared attribute override enable, 64K*8way */
588 l2x0_init(__io(0xf0100000), 0x00460000, 0xc2000fff); 588 l2x0_init(IOMEM(0xf0100000), 0x00460000, 0xc2000fff);
589#endif 589#endif
590 sh73a0_add_standard_devices(); 590 sh73a0_add_standard_devices();
591 platform_add_devices(ag5evm_devices, ARRAY_SIZE(ag5evm_devices)); 591 platform_add_devices(ag5evm_devices, ARRAY_SIZE(ag5evm_devices));
diff --git a/arch/arm/mach-shmobile/board-bonito.c b/arch/arm/mach-shmobile/board-bonito.c
index a71ae802cc49..81fd95f7f52a 100644
--- a/arch/arm/mach-shmobile/board-bonito.c
+++ b/arch/arm/mach-shmobile/board-bonito.c
@@ -371,7 +371,7 @@ static void __init bonito_init(void)
371 371
372#ifdef CONFIG_CACHE_L2X0 372#ifdef CONFIG_CACHE_L2X0
373 /* Early BRESP enable, Shared attribute override enable, 32K*8way */ 373 /* Early BRESP enable, Shared attribute override enable, 32K*8way */
374 l2x0_init(__io(0xf0002000), 0x40440000, 0x82000fff); 374 l2x0_init(IOMEM(0xf0002000), 0x40440000, 0x82000fff);
375#endif 375#endif
376 376
377 r8a7740_add_standard_devices(); 377 r8a7740_add_standard_devices();
diff --git a/arch/arm/mach-shmobile/board-kota2.c b/arch/arm/mach-shmobile/board-kota2.c
index 10e9e6967903..200dcd42a3a0 100644
--- a/arch/arm/mach-shmobile/board-kota2.c
+++ b/arch/arm/mach-shmobile/board-kota2.c
@@ -508,7 +508,7 @@ static void __init kota2_init(void)
508 508
509#ifdef CONFIG_CACHE_L2X0 509#ifdef CONFIG_CACHE_L2X0
510 /* Early BRESP enable, Shared attribute override enable, 64K*8way */ 510 /* Early BRESP enable, Shared attribute override enable, 64K*8way */
511 l2x0_init(__io(0xf0100000), 0x40460000, 0x82000fff); 511 l2x0_init(IOMEM(0xf0100000), 0x40460000, 0x82000fff);
512#endif 512#endif
513 sh73a0_add_standard_devices(); 513 sh73a0_add_standard_devices();
514 platform_add_devices(kota2_devices, ARRAY_SIZE(kota2_devices)); 514 platform_add_devices(kota2_devices, ARRAY_SIZE(kota2_devices));
diff --git a/arch/arm/mach-shmobile/include/mach/io.h b/arch/arm/mach-shmobile/include/mach/io.h
deleted file mode 100644
index 7339fe46cb7c..000000000000
--- a/arch/arm/mach-shmobile/include/mach/io.h
+++ /dev/null
@@ -1,9 +0,0 @@
1#ifndef __ASM_MACH_IO_H
2#define __ASM_MACH_IO_H
3
4#define IO_SPACE_LIMIT 0xffffffff
5
6#define __io(a) ((void __iomem *)(a))
7#define __mem_pci(a) (a)
8
9#endif /* __ASM_MACH_IO_H */
diff --git a/arch/arm/mach-shmobile/intc-r8a7779.c b/arch/arm/mach-shmobile/intc-r8a7779.c
index 5d92fcde2bc3..550b23df4fd4 100644
--- a/arch/arm/mach-shmobile/intc-r8a7779.c
+++ b/arch/arm/mach-shmobile/intc-r8a7779.c
@@ -42,8 +42,8 @@ static int r8a7779_set_wake(struct irq_data *data, unsigned int on)
42 42
43void __init r8a7779_init_irq(void) 43void __init r8a7779_init_irq(void)
44{ 44{
45 void __iomem *gic_dist_base = __io(0xf0001000); 45 void __iomem *gic_dist_base = IOMEM(0xf0001000);
46 void __iomem *gic_cpu_base = __io(0xf0000100); 46 void __iomem *gic_cpu_base = IOMEM(0xf0000100);
47 47
48 /* use GIC to handle interrupts */ 48 /* use GIC to handle interrupts */
49 gic_init(0, 29, gic_dist_base, gic_cpu_base); 49 gic_init(0, 29, gic_dist_base, gic_cpu_base);
diff --git a/arch/arm/mach-shmobile/intc-sh73a0.c b/arch/arm/mach-shmobile/intc-sh73a0.c
index 15b408f58272..ee447404c857 100644
--- a/arch/arm/mach-shmobile/intc-sh73a0.c
+++ b/arch/arm/mach-shmobile/intc-sh73a0.c
@@ -421,8 +421,8 @@ static irqreturn_t sh73a0_pint1_demux(int irq, void *dev_id)
421 421
422void __init sh73a0_init_irq(void) 422void __init sh73a0_init_irq(void)
423{ 423{
424 void __iomem *gic_dist_base = __io(0xf0001000); 424 void __iomem *gic_dist_base = IOMEM(0xf0001000);
425 void __iomem *gic_cpu_base = __io(0xf0000100); 425 void __iomem *gic_cpu_base = IOMEM(0xf0000100);
426 void __iomem *intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE); 426 void __iomem *intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE);
427 int k, n; 427 int k, n;
428 428
diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c
index 9bb7b8575a1f..b62e19d4c9af 100644
--- a/arch/arm/mach-shmobile/smp-r8a7779.c
+++ b/arch/arm/mach-shmobile/smp-r8a7779.c
@@ -30,7 +30,7 @@
30#include <asm/smp_twd.h> 30#include <asm/smp_twd.h>
31#include <asm/hardware/gic.h> 31#include <asm/hardware/gic.h>
32 32
33#define AVECR 0xfe700040 33#define AVECR IOMEM(0xfe700040)
34 34
35static struct r8a7779_pm_ch r8a7779_ch_cpu1 = { 35static struct r8a7779_pm_ch r8a7779_ch_cpu1 = {
36 .chan_offs = 0x40, /* PWRSR0 .. PWRER0 */ 36 .chan_offs = 0x40, /* PWRSR0 .. PWRER0 */
@@ -138,7 +138,7 @@ void __init r8a7779_smp_prepare_cpus(void)
138 scu_enable(scu_base_addr()); 138 scu_enable(scu_base_addr());
139 139
140 /* Map the reset vector (in headsmp.S) */ 140 /* Map the reset vector (in headsmp.S) */
141 __raw_writel(__pa(shmobile_secondary_vector), __io(AVECR)); 141 __raw_writel(__pa(shmobile_secondary_vector), AVECR);
142 142
143 /* enable cache coherency on CPU0 */ 143 /* enable cache coherency on CPU0 */
144 modify_scu_cpu_psr(0, 3 << (cpu * 8)); 144 modify_scu_cpu_psr(0, 3 << (cpu * 8));
diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c
index c0a9093ba3a8..14ad8b052f1a 100644
--- a/arch/arm/mach-shmobile/smp-sh73a0.c
+++ b/arch/arm/mach-shmobile/smp-sh73a0.c
@@ -28,11 +28,11 @@
28#include <asm/smp_twd.h> 28#include <asm/smp_twd.h>
29#include <asm/hardware/gic.h> 29#include <asm/hardware/gic.h>
30 30
31#define WUPCR 0xe6151010 31#define WUPCR IOMEM(0xe6151010)
32#define SRESCR 0xe6151018 32#define SRESCR IOMEM(0xe6151018)
33#define PSTR 0xe6151040 33#define PSTR IOMEM(0xe6151040)
34#define SBAR 0xe6180020 34#define SBAR IOMEM(0xe6180020)
35#define APARMBAREA 0xe6f10020 35#define APARMBAREA IOMEM(0xe6f10020)
36 36
37static void __iomem *scu_base_addr(void) 37static void __iomem *scu_base_addr(void)
38{ 38{
@@ -78,10 +78,10 @@ int __cpuinit sh73a0_boot_secondary(unsigned int cpu)
78 /* enable cache coherency */ 78 /* enable cache coherency */
79 modify_scu_cpu_psr(0, 3 << (cpu * 8)); 79 modify_scu_cpu_psr(0, 3 << (cpu * 8));
80 80
81 if (((__raw_readl(__io(PSTR)) >> (4 * cpu)) & 3) == 3) 81 if (((__raw_readl(PSTR) >> (4 * cpu)) & 3) == 3)
82 __raw_writel(1 << cpu, __io(WUPCR)); /* wake up */ 82 __raw_writel(1 << cpu, WUPCR); /* wake up */
83 else 83 else
84 __raw_writel(1 << cpu, __io(SRESCR)); /* reset */ 84 __raw_writel(1 << cpu, SRESCR); /* reset */
85 85
86 return 0; 86 return 0;
87} 87}
@@ -93,8 +93,8 @@ void __init sh73a0_smp_prepare_cpus(void)
93 scu_enable(scu_base_addr()); 93 scu_enable(scu_base_addr());
94 94
95 /* Map the reset vector (in headsmp.S) */ 95 /* Map the reset vector (in headsmp.S) */
96 __raw_writel(0, __io(APARMBAREA)); /* 4k */ 96 __raw_writel(0, APARMBAREA); /* 4k */
97 __raw_writel(__pa(shmobile_secondary_vector), __io(SBAR)); 97 __raw_writel(__pa(shmobile_secondary_vector), SBAR);
98 98
99 /* enable cache coherency on CPU0 */ 99 /* enable cache coherency on CPU0 */
100 modify_scu_cpu_psr(0, 3 << (cpu * 8)); 100 modify_scu_cpu_psr(0, 3 << (cpu * 8));
diff --git a/arch/arm/mach-spear3xx/clock.c b/arch/arm/mach-spear3xx/clock.c
index f67860cd649f..6c4841f55223 100644
--- a/arch/arm/mach-spear3xx/clock.c
+++ b/arch/arm/mach-spear3xx/clock.c
@@ -12,6 +12,7 @@
12 */ 12 */
13 13
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/io.h>
15#include <linux/kernel.h> 16#include <linux/kernel.h>
16#include <asm/mach-types.h> 17#include <asm/mach-types.h>
17#include <plat/clock.h> 18#include <plat/clock.h>
diff --git a/arch/arm/mach-spear3xx/include/mach/io.h b/arch/arm/mach-spear3xx/include/mach/io.h
deleted file mode 100644
index 30cff8a1f6b5..000000000000
--- a/arch/arm/mach-spear3xx/include/mach/io.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * arch/arm/mach-spear3xx/include/mach/io.h
3 *
4 * IO definitions for SPEAr3xx machine family
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_IO_H
15#define __MACH_IO_H
16
17#include <plat/io.h>
18
19#endif /* __MACH_IO_H */
diff --git a/arch/arm/mach-spear6xx/clock.c b/arch/arm/mach-spear6xx/clock.c
index 358f2800f17b..a86499a8a15f 100644
--- a/arch/arm/mach-spear6xx/clock.c
+++ b/arch/arm/mach-spear6xx/clock.c
@@ -12,6 +12,7 @@
12 */ 12 */
13 13
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/io.h>
15#include <linux/kernel.h> 16#include <linux/kernel.h>
16#include <plat/clock.h> 17#include <plat/clock.h>
17#include <mach/misc_regs.h> 18#include <mach/misc_regs.h>
diff --git a/arch/arm/mach-spear6xx/include/mach/io.h b/arch/arm/mach-spear6xx/include/mach/io.h
deleted file mode 100644
index fb7c106cea94..000000000000
--- a/arch/arm/mach-spear6xx/include/mach/io.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * arch/arm/mach-spear6xx/include/mach/io.h
3 *
4 * IO definitions for SPEAr6xx machine family
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Rajeev Kumar Kumar<rajeev-dlh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_IO_H
15#define __MACH_IO_H
16
17#include <plat/io.h>
18
19#endif /* __MACH_IO_H */
20
diff --git a/arch/arm/mach-tegra/include/mach/debug-macro.S b/arch/arm/mach-tegra/include/mach/debug-macro.S
index 90069abd37bd..8ce0661b8a3d 100644
--- a/arch/arm/mach-tegra/include/mach/debug-macro.S
+++ b/arch/arm/mach-tegra/include/mach/debug-macro.S
@@ -26,7 +26,6 @@
26 26
27#include <linux/serial_reg.h> 27#include <linux/serial_reg.h>
28 28
29#include <mach/io.h>
30#include <mach/iomap.h> 29#include <mach/iomap.h>
31#include <mach/irammap.h> 30#include <mach/irammap.h>
32 31
diff --git a/arch/arm/mach-tegra/include/mach/io.h b/arch/arm/mach-tegra/include/mach/io.h
index f15defffb5d2..fe700f9ce7dc 100644
--- a/arch/arm/mach-tegra/include/mach/io.h
+++ b/arch/arm/mach-tegra/include/mach/io.h
@@ -23,56 +23,8 @@
23 23
24#define IO_SPACE_LIMIT 0xffff 24#define IO_SPACE_LIMIT 0xffff
25 25
26/* On TEGRA, many peripherals are very closely packed in
27 * two 256MB io windows (that actually only use about 64KB
28 * at the start of each).
29 *
30 * We will just map the first 1MB of each window (to minimize
31 * pt entries needed) and provide a macro to transform physical
32 * io addresses to an appropriate void __iomem *.
33 *
34 */
35
36#ifdef __ASSEMBLY__
37#define IOMEM(x) (x)
38#else
39#define IOMEM(x) ((void __force __iomem *)(x))
40#endif
41
42#define IO_IRAM_PHYS 0x40000000
43#define IO_IRAM_VIRT IOMEM(0xFE400000)
44#define IO_IRAM_SIZE SZ_256K
45
46#define IO_CPU_PHYS 0x50040000
47#define IO_CPU_VIRT IOMEM(0xFE000000)
48#define IO_CPU_SIZE SZ_16K
49
50#define IO_PPSB_PHYS 0x60000000
51#define IO_PPSB_VIRT IOMEM(0xFE200000)
52#define IO_PPSB_SIZE SZ_1M
53
54#define IO_APB_PHYS 0x70000000
55#define IO_APB_VIRT IOMEM(0xFE300000)
56#define IO_APB_SIZE SZ_1M
57
58#define IO_TO_VIRT_BETWEEN(p, st, sz) ((p) >= (st) && (p) < ((st) + (sz)))
59#define IO_TO_VIRT_XLATE(p, pst, vst) (((p) - (pst) + (vst)))
60
61#define IO_TO_VIRT(n) ( \
62 IO_TO_VIRT_BETWEEN((n), IO_PPSB_PHYS, IO_PPSB_SIZE) ? \
63 IO_TO_VIRT_XLATE((n), IO_PPSB_PHYS, IO_PPSB_VIRT) : \
64 IO_TO_VIRT_BETWEEN((n), IO_APB_PHYS, IO_APB_SIZE) ? \
65 IO_TO_VIRT_XLATE((n), IO_APB_PHYS, IO_APB_VIRT) : \
66 IO_TO_VIRT_BETWEEN((n), IO_CPU_PHYS, IO_CPU_SIZE) ? \
67 IO_TO_VIRT_XLATE((n), IO_CPU_PHYS, IO_CPU_VIRT) : \
68 IO_TO_VIRT_BETWEEN((n), IO_IRAM_PHYS, IO_IRAM_SIZE) ? \
69 IO_TO_VIRT_XLATE((n), IO_IRAM_PHYS, IO_IRAM_VIRT) : \
70 NULL)
71
72#ifndef __ASSEMBLER__ 26#ifndef __ASSEMBLER__
73 27
74#define IO_ADDRESS(n) (IO_TO_VIRT(n))
75
76#ifdef CONFIG_TEGRA_PCI 28#ifdef CONFIG_TEGRA_PCI
77extern void __iomem *tegra_pcie_io_base; 29extern void __iomem *tegra_pcie_io_base;
78 30
@@ -88,7 +40,6 @@ static inline void __iomem *__io(unsigned long addr)
88#endif 40#endif
89 41
90#define __io(a) __io(a) 42#define __io(a) __io(a)
91#define __mem_pci(a) (a)
92 43
93#endif 44#endif
94 45
diff --git a/arch/arm/mach-tegra/include/mach/iomap.h b/arch/arm/mach-tegra/include/mach/iomap.h
index cff672a344f4..7e76da73121c 100644
--- a/arch/arm/mach-tegra/include/mach/iomap.h
+++ b/arch/arm/mach-tegra/include/mach/iomap.h
@@ -277,4 +277,46 @@
277# define TEGRA_DEBUG_UART_BASE TEGRA_UARTE_BASE 277# define TEGRA_DEBUG_UART_BASE TEGRA_UARTE_BASE
278#endif 278#endif
279 279
280/* On TEGRA, many peripherals are very closely packed in
281 * two 256MB io windows (that actually only use about 64KB
282 * at the start of each).
283 *
284 * We will just map the first 1MB of each window (to minimize
285 * pt entries needed) and provide a macro to transform physical
286 * io addresses to an appropriate void __iomem *.
287 *
288 */
289
290#define IO_IRAM_PHYS 0x40000000
291#define IO_IRAM_VIRT IOMEM(0xFE400000)
292#define IO_IRAM_SIZE SZ_256K
293
294#define IO_CPU_PHYS 0x50040000
295#define IO_CPU_VIRT IOMEM(0xFE000000)
296#define IO_CPU_SIZE SZ_16K
297
298#define IO_PPSB_PHYS 0x60000000
299#define IO_PPSB_VIRT IOMEM(0xFE200000)
300#define IO_PPSB_SIZE SZ_1M
301
302#define IO_APB_PHYS 0x70000000
303#define IO_APB_VIRT IOMEM(0xFE300000)
304#define IO_APB_SIZE SZ_1M
305
306#define IO_TO_VIRT_BETWEEN(p, st, sz) ((p) >= (st) && (p) < ((st) + (sz)))
307#define IO_TO_VIRT_XLATE(p, pst, vst) (((p) - (pst) + (vst)))
308
309#define IO_TO_VIRT(n) ( \
310 IO_TO_VIRT_BETWEEN((n), IO_PPSB_PHYS, IO_PPSB_SIZE) ? \
311 IO_TO_VIRT_XLATE((n), IO_PPSB_PHYS, IO_PPSB_VIRT) : \
312 IO_TO_VIRT_BETWEEN((n), IO_APB_PHYS, IO_APB_SIZE) ? \
313 IO_TO_VIRT_XLATE((n), IO_APB_PHYS, IO_APB_VIRT) : \
314 IO_TO_VIRT_BETWEEN((n), IO_CPU_PHYS, IO_CPU_SIZE) ? \
315 IO_TO_VIRT_XLATE((n), IO_CPU_PHYS, IO_CPU_VIRT) : \
316 IO_TO_VIRT_BETWEEN((n), IO_IRAM_PHYS, IO_IRAM_SIZE) ? \
317 IO_TO_VIRT_XLATE((n), IO_IRAM_PHYS, IO_IRAM_VIRT) : \
318 NULL)
319
320#define IO_ADDRESS(n) (IO_TO_VIRT(n))
321
280#endif 322#endif
diff --git a/arch/arm/mach-tegra/io.c b/arch/arm/mach-tegra/io.c
index d23ee2db2827..58b4baf9c483 100644
--- a/arch/arm/mach-tegra/io.c
+++ b/arch/arm/mach-tegra/io.c
@@ -26,6 +26,7 @@
26 26
27#include <asm/page.h> 27#include <asm/page.h>
28#include <asm/mach/map.h> 28#include <asm/mach/map.h>
29#include <mach/iomap.h>
29 30
30#include "board.h" 31#include "board.h"
31 32
diff --git a/arch/arm/mach-tegra/sleep.S b/arch/arm/mach-tegra/sleep.S
index 8f9fde161c34..5b20197bae7f 100644
--- a/arch/arm/mach-tegra/sleep.S
+++ b/arch/arm/mach-tegra/sleep.S
@@ -23,7 +23,9 @@
23 */ 23 */
24 24
25#include <linux/linkage.h> 25#include <linux/linkage.h>
26#include <mach/io.h> 26
27#include <asm/assembler.h>
28
27#include <mach/iomap.h> 29#include <mach/iomap.h>
28 30
29#include "flowctrl.h" 31#include "flowctrl.h"
diff --git a/arch/arm/mach-u300/include/mach/io.h b/arch/arm/mach-u300/include/mach/io.h
deleted file mode 100644
index 5d6b4c13b3a0..000000000000
--- a/arch/arm/mach-u300/include/mach/io.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 *
3 * arch/arm/mach-u300/include/mach/io.h
4 *
5 *
6 * Copyright (C) 2006-2009 ST-Ericsson AB
7 * License terms: GNU General Public License (GPL) version 2
8 * Dummy IO map for being able to use writew()/readw(),
9 * writel()/readw() and similar accessor functions.
10 * Author: Linus Walleij <linus.walleij@stericsson.com>
11 */
12#ifndef __MACH_IO_H
13#define __MACH_IO_H
14
15#define IO_SPACE_LIMIT 0xffffffff
16
17#define __io(a) __typesafe_io(a)
18#define __mem_pci(a) (a)
19
20#endif
diff --git a/arch/arm/mach-u300/include/mach/u300-regs.h b/arch/arm/mach-u300/include/mach/u300-regs.h
index 035fdc9dbdb0..7b7cba960b69 100644
--- a/arch/arm/mach-u300/include/mach/u300-regs.h
+++ b/arch/arm/mach-u300/include/mach/u300-regs.h
@@ -18,12 +18,6 @@
18 * the defines are used for setting up the I/O memory mapping. 18 * the defines are used for setting up the I/O memory mapping.
19 */ 19 */
20 20
21#ifdef __ASSEMBLER__
22#define IOMEM(a) (a)
23#else
24#define IOMEM(a) (void __iomem *) a
25#endif
26
27/* NAND Flash CS0 */ 21/* NAND Flash CS0 */
28#define U300_NAND_CS0_PHYS_BASE 0x80000000 22#define U300_NAND_CS0_PHYS_BASE 0x80000000
29 23
diff --git a/arch/arm/mach-ux500/include/mach/hardware.h b/arch/arm/mach-ux500/include/mach/hardware.h
index d93d6dbef25b..f84698936d36 100644
--- a/arch/arm/mach-ux500/include/mach/hardware.h
+++ b/arch/arm/mach-ux500/include/mach/hardware.h
@@ -23,7 +23,7 @@
23 (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + U8500_IO_VIRTUAL) 23 (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + U8500_IO_VIRTUAL)
24 24
25/* typesafe io address */ 25/* typesafe io address */
26#define __io_address(n) __io(IO_ADDRESS(n)) 26#define __io_address(n) IOMEM(IO_ADDRESS(n))
27/* Used by some plat-nomadik code */ 27/* Used by some plat-nomadik code */
28#define io_p2v(n) __io_address(n) 28#define io_p2v(n) __io_address(n)
29 29
diff --git a/arch/arm/mach-ux500/include/mach/io.h b/arch/arm/mach-ux500/include/mach/io.h
deleted file mode 100644
index 1cf3f44ce5b2..000000000000
--- a/arch/arm/mach-ux500/include/mach/io.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/*
2 * arch/arm/mach-u8500/include/mach/io.h
3 *
4 * Copyright (C) 1997-1999 Russell King
5 *
6 * Modifications:
7 * 06-12-1997 RMK Created.
8 * 07-04-1999 RMK Major cleanup
9 */
10#ifndef __ASM_ARM_ARCH_IO_H
11#define __ASM_ARM_ARCH_IO_H
12
13#define IO_SPACE_LIMIT 0xffffffff
14
15/*
16 * We don't actually have real ISA nor PCI buses, but there is so many
17 * drivers out there that might just work if we fake them...
18 */
19#define __io(a) __typesafe_io(a)
20#define __mem_pci(a) (a)
21
22#endif
diff --git a/arch/arm/mach-versatile/include/mach/io.h b/arch/arm/mach-versatile/include/mach/io.h
deleted file mode 100644
index f067c14c7182..000000000000
--- a/arch/arm/mach-versatile/include/mach/io.h
+++ /dev/null
@@ -1,28 +0,0 @@
1/*
2 * arch/arm/mach-versatile/include/mach/io.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef __ASM_ARM_ARCH_IO_H
21#define __ASM_ARM_ARCH_IO_H
22
23#define IO_SPACE_LIMIT 0xffffffff
24
25#define __io(a) __typesafe_io(a)
26#define __mem_pci(a) (a)
27
28#endif
diff --git a/arch/arm/mach-vexpress/include/mach/io.h b/arch/arm/mach-vexpress/include/mach/io.h
deleted file mode 100644
index 0088cd388a84..000000000000
--- a/arch/arm/mach-vexpress/include/mach/io.h
+++ /dev/null
@@ -1,25 +0,0 @@
1/*
2 * arch/arm/mach-vexpress/include/mach/io.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef __ASM_ARM_ARCH_IO_H
21#define __ASM_ARM_ARCH_IO_H
22
23#define __mem_pci(a) (a)
24
25#endif
diff --git a/arch/arm/mach-vt8500/include/mach/io.h b/arch/arm/mach-vt8500/include/mach/io.h
deleted file mode 100644
index 46181eecf273..000000000000
--- a/arch/arm/mach-vt8500/include/mach/io.h
+++ /dev/null
@@ -1,26 +0,0 @@
1/*
2 * arch/arm/mach-vt8500/include/mach/io.h
3 *
4 * Copyright (C) 2010 Alexey Charkov
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef __ASM_ARM_ARCH_IO_H
21#define __ASM_ARM_ARCH_IO_H
22
23#define __io(a) __typesafe_io((a) + 0xf0000000)
24#define __mem_pci(a) (a)
25
26#endif
diff --git a/arch/arm/mach-w90x900/include/mach/io.h b/arch/arm/mach-w90x900/include/mach/io.h
deleted file mode 100644
index d96ab99df05b..000000000000
--- a/arch/arm/mach-w90x900/include/mach/io.h
+++ /dev/null
@@ -1,30 +0,0 @@
1/*
2 * arch/arm/mach-w90x900/include/mach/io.h
3 *
4 * Copyright (c) 2008 Nuvoton technology corporation
5 * All rights reserved.
6 *
7 * Wan ZongShun <mcuos.com@gmail.com>
8 *
9 * Based on arch/arm/mach-s3c2410/include/mach/io.h
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 */
17
18#ifndef __ASM_ARM_ARCH_IO_H
19#define __ASM_ARM_ARCH_IO_H
20
21#define IO_SPACE_LIMIT 0xffffffff
22
23/*
24 * 1:1 mapping for ioremapped regions.
25 */
26
27#define __mem_pci(a) (a)
28#define __io(a) __typesafe_io(a)
29
30#endif
diff --git a/arch/arm/mach-zynq/include/mach/io.h b/arch/arm/mach-zynq/include/mach/io.h
deleted file mode 100644
index 39d9885e0e9a..000000000000
--- a/arch/arm/mach-zynq/include/mach/io.h
+++ /dev/null
@@ -1,33 +0,0 @@
1/* arch/arm/mach-zynq/include/mach/io.h
2 *
3 * Copyright (C) 2011 Xilinx
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15#ifndef __MACH_IO_H__
16#define __MACH_IO_H__
17
18/* Allow IO space to be anywhere in the memory */
19
20#define IO_SPACE_LIMIT 0xffff
21
22/* IO address mapping macros, nothing special at this time but required */
23
24#ifdef __ASSEMBLER__
25#define IOMEM(x) (x)
26#else
27#define IOMEM(x) ((void __force __iomem *)(x))
28#endif
29
30#define __io(a) __typesafe_io(a)
31#define __mem_pci(a) (a)
32
33#endif
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c
index 6780b49f2c69..4f55f5062ab7 100644
--- a/arch/arm/mm/ioremap.c
+++ b/arch/arm/mm/ioremap.c
@@ -308,11 +308,15 @@ __arm_ioremap_pfn(unsigned long pfn, unsigned long offset, size_t size,
308} 308}
309EXPORT_SYMBOL(__arm_ioremap_pfn); 309EXPORT_SYMBOL(__arm_ioremap_pfn);
310 310
311void __iomem * (*arch_ioremap_caller)(unsigned long, size_t,
312 unsigned int, void *) =
313 __arm_ioremap_caller;
314
311void __iomem * 315void __iomem *
312__arm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype) 316__arm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
313{ 317{
314 return __arm_ioremap_caller(phys_addr, size, mtype, 318 return arch_ioremap_caller(phys_addr, size, mtype,
315 __builtin_return_address(0)); 319 __builtin_return_address(0));
316} 320}
317EXPORT_SYMBOL(__arm_ioremap); 321EXPORT_SYMBOL(__arm_ioremap);
318 322
@@ -371,4 +375,11 @@ void __iounmap(volatile void __iomem *io_addr)
371 375
372 vunmap(addr); 376 vunmap(addr);
373} 377}
374EXPORT_SYMBOL(__iounmap); 378
379void (*arch_iounmap)(volatile void __iomem *) = __iounmap;
380
381void __arm_iounmap(volatile void __iomem *io_addr)
382{
383 arch_iounmap(io_addr);
384}
385EXPORT_SYMBOL(__arm_iounmap);
diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c
index 4fc6794cca4b..6486d2f253cd 100644
--- a/arch/arm/mm/nommu.c
+++ b/arch/arm/mm/nommu.c
@@ -86,13 +86,17 @@ void __iomem *__arm_ioremap(unsigned long phys_addr, size_t size,
86} 86}
87EXPORT_SYMBOL(__arm_ioremap); 87EXPORT_SYMBOL(__arm_ioremap);
88 88
89void __iomem * (*arch_ioremap_caller)(unsigned long, size_t, unsigned int, void *);
90
89void __iomem *__arm_ioremap_caller(unsigned long phys_addr, size_t size, 91void __iomem *__arm_ioremap_caller(unsigned long phys_addr, size_t size,
90 unsigned int mtype, void *caller) 92 unsigned int mtype, void *caller)
91{ 93{
92 return __arm_ioremap(phys_addr, size, mtype); 94 return __arm_ioremap(phys_addr, size, mtype);
93} 95}
94 96
95void __iounmap(volatile void __iomem *addr) 97void (*arch_iounmap)(volatile void __iomem *);
98
99void __arm_iounmap(volatile void __iomem *addr)
96{ 100{
97} 101}
98EXPORT_SYMBOL(__iounmap); 102EXPORT_SYMBOL(__arm_iounmap);
diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h
index a599f01f8b92..0630513554de 100644
--- a/arch/arm/plat-mxc/include/mach/hardware.h
+++ b/arch/arm/plat-mxc/include/mach/hardware.h
@@ -22,11 +22,8 @@
22 22
23#include <asm/sizes.h> 23#include <asm/sizes.h>
24 24
25#ifdef __ASSEMBLER__ 25#define addr_in_module(addr, mod) \
26#define IOMEM(addr) (addr) 26 ((unsigned long)(addr) - mod ## _BASE_ADDR < mod ## _SIZE)
27#else
28#define IOMEM(addr) ((void __force __iomem *)(addr))
29#endif
30 27
31#define IMX_IO_P2V_MODULE(addr, module) \ 28#define IMX_IO_P2V_MODULE(addr, module) \
32 (((addr) - module ## _BASE_ADDR) < module ## _SIZE ? \ 29 (((addr) - module ## _BASE_ADDR) < module ## _SIZE ? \
diff --git a/arch/arm/plat-mxc/include/mach/io.h b/arch/arm/plat-mxc/include/mach/io.h
deleted file mode 100644
index 338300b18b00..000000000000
--- a/arch/arm/plat-mxc/include/mach/io.h
+++ /dev/null
@@ -1,39 +0,0 @@
1/*
2 * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
3 */
4
5/*
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_MXC_IO_H__
12#define __ASM_ARCH_MXC_IO_H__
13
14/* Allow IO space to be anywhere in the memory */
15#define IO_SPACE_LIMIT 0xffffffff
16
17#define __arch_ioremap __imx_ioremap
18#define __arch_iounmap __iounmap
19
20#define addr_in_module(addr, mod) \
21 ((unsigned long)(addr) - mod ## _BASE_ADDR < mod ## _SIZE)
22
23extern void __iomem *(*imx_ioremap)(unsigned long, size_t, unsigned int);
24
25static inline void __iomem *
26__imx_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
27{
28 if (imx_ioremap != NULL)
29 return imx_ioremap(phys_addr, size, mtype);
30 else
31 return __arm_ioremap(phys_addr, size, mtype);
32}
33
34/* io address mapping macro */
35#define __io(a) __typesafe_io(a)
36
37#define __mem_pci(a) (a)
38
39#endif
diff --git a/arch/arm/plat-omap/include/plat/hardware.h b/arch/arm/plat-omap/include/plat/hardware.h
index 537b05ae1f51..e897978371c2 100644
--- a/arch/arm/plat-omap/include/plat/hardware.h
+++ b/arch/arm/plat-omap/include/plat/hardware.h
@@ -43,12 +43,6 @@
43#endif 43#endif
44#include <plat/serial.h> 44#include <plat/serial.h>
45 45
46#ifdef __ASSEMBLER__
47#define IOMEM(x) (x)
48#else
49#define IOMEM(x) ((void __force __iomem *)(x))
50#endif
51
52/* 46/*
53 * --------------------------------------------------------------------------- 47 * ---------------------------------------------------------------------------
54 * Common definitions for all OMAP processors 48 * Common definitions for all OMAP processors
diff --git a/arch/arm/plat-omap/include/plat/sdrc.h b/arch/arm/plat-omap/include/plat/sdrc.h
index 925b12b500dc..9bb978ecd884 100644
--- a/arch/arm/plat-omap/include/plat/sdrc.h
+++ b/arch/arm/plat-omap/include/plat/sdrc.h
@@ -16,7 +16,6 @@
16 * published by the Free Software Foundation. 16 * published by the Free Software Foundation.
17 */ 17 */
18 18
19#include <mach/io.h>
20 19
21/* SDRC register offsets - read/write with sdrc_{read,write}_reg() */ 20/* SDRC register offsets - read/write with sdrc_{read,write}_reg() */
22 21
diff --git a/arch/arm/plat-omap/include/plat/usb.h b/arch/arm/plat-omap/include/plat/usb.h
index d0fc9f4dc155..762eeb0626c1 100644
--- a/arch/arm/plat-omap/include/plat/usb.h
+++ b/arch/arm/plat-omap/include/plat/usb.h
@@ -112,7 +112,6 @@ extern int omap4430_phy_suspend(struct device *dev, int suspend);
112 */ 112 */
113 113
114#define OMAP2_L4_IO_OFFSET 0xb2000000 114#define OMAP2_L4_IO_OFFSET 0xb2000000
115#define IOMEM(x) ((void __force __iomem *)(x))
116#define OMAP2_L4_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L4_IO_OFFSET) 115#define OMAP2_L4_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L4_IO_OFFSET)
117 116
118static inline u8 omap_readb(u32 pa) 117static inline u8 omap_readb(u32 pa)
diff --git a/arch/arm/plat-spear/include/plat/hardware.h b/arch/arm/plat-spear/include/plat/hardware.h
index 66d677225d15..70187d763e26 100644
--- a/arch/arm/plat-spear/include/plat/hardware.h
+++ b/arch/arm/plat-spear/include/plat/hardware.h
@@ -14,10 +14,4 @@
14#ifndef __PLAT_HARDWARE_H 14#ifndef __PLAT_HARDWARE_H
15#define __PLAT_HARDWARE_H 15#define __PLAT_HARDWARE_H
16 16
17#ifndef __ASSEMBLY__
18#define IOMEM(x) ((void __iomem __force *)(x))
19#else
20#define IOMEM(x) (x)
21#endif
22
23#endif /* __PLAT_HARDWARE_H */ 17#endif /* __PLAT_HARDWARE_H */
diff --git a/arch/arm/plat-spear/include/plat/io.h b/arch/arm/plat-spear/include/plat/io.h
deleted file mode 100644
index 4d4ba822b3eb..000000000000
--- a/arch/arm/plat-spear/include/plat/io.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/*
2 * arch/arm/plat-spear/include/plat/io.h
3 *
4 * IO definitions for SPEAr platform
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __PLAT_IO_H
15#define __PLAT_IO_H
16
17#define IO_SPACE_LIMIT 0xFFFFFFFF
18
19#define __io(a) __typesafe_io(a)
20#define __mem_pci(a) (a)
21
22#endif /* __PLAT_IO_H */