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authorVipul Kumar Samar <vipulkumar.samar@st.com>2012-07-04 23:51:47 -0400
committerViresh Kumar <viresh.kumar@linaro.org>2012-11-26 05:22:53 -0500
commit7db083e0e1b70b0300eeb5945538e725c018f8e0 (patch)
treecf0adb82f4069bb585192dd4d5bf413a4014d17e /arch
parent7cef07d5cd25b1286376d1e8948f75b89d34a37e (diff)
ARM: SPEAr: DT: Update pinctrl list
This patch updates pinctrl configuration for SPEAr SoC's. Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/spear1310-evb.dts23
-rw-r--r--arch/arm/boot/dts/spear1340-evb.dts35
-rw-r--r--arch/arm/boot/dts/spear320-evb.dts6
3 files changed, 39 insertions, 25 deletions
diff --git a/arch/arm/boot/dts/spear1310-evb.dts b/arch/arm/boot/dts/spear1310-evb.dts
index 2e4c5727468e..3448d60117ec 100644
--- a/arch/arm/boot/dts/spear1310-evb.dts
+++ b/arch/arm/boot/dts/spear1310-evb.dts
@@ -30,10 +30,14 @@
30 pinctrl-0 = <&state_default>; 30 pinctrl-0 = <&state_default>;
31 31
32 state_default: pinmux { 32 state_default: pinmux {
33 i2c0-pmx { 33 i2c0 {
34 st,pins = "i2c0_grp"; 34 st,pins = "i2c0_grp";
35 st,function = "i2c0"; 35 st,function = "i2c0";
36 }; 36 };
37 i2s0 {
38 st,pins = "i2s0_grp";
39 st,function = "i2s0";
40 };
37 i2s1 { 41 i2s1 {
38 st,pins = "i2s1_grp"; 42 st,pins = "i2s1_grp";
39 st,function = "i2s1"; 43 st,function = "i2s1";
@@ -42,6 +46,10 @@
42 st,pins = "arm_gpio_grp"; 46 st,pins = "arm_gpio_grp";
43 st,function = "arm_gpio"; 47 st,function = "arm_gpio";
44 }; 48 };
49 clcd {
50 st,pins = "clcd_grp" , "clcd_high_res";
51 st,function = "clcd";
52 };
45 eth { 53 eth {
46 st,pins = "gmii_grp"; 54 st,pins = "gmii_grp";
47 st,function = "gmii"; 55 st,function = "gmii";
@@ -74,11 +82,6 @@
74 st,pins = "i2c_1_2_grp"; 82 st,pins = "i2c_1_2_grp";
75 st,function = "i2c_1_2"; 83 st,function = "i2c_1_2";
76 }; 84 };
77 pci {
78 st,pins = "pcie0_grp","pcie1_grp",
79 "pcie2_grp";
80 st,function = "pci";
81 };
82 smii { 85 smii {
83 st,pins = "smii_0_1_2_grp"; 86 st,pins = "smii_0_1_2_grp";
84 st,function = "smii_0_1_2"; 87 st,function = "smii_0_1_2";
@@ -88,6 +91,14 @@
88 "nand_16bit_grp"; 91 "nand_16bit_grp";
89 st,function = "nand"; 92 st,function = "nand";
90 }; 93 };
94 sata {
95 st,pins = "sata0_grp";
96 st,function = "sata";
97 };
98 pcie {
99 st,pins = "pcie1_grp", "pcie2_grp";
100 st,function = "pci_express";
101 };
91 }; 102 };
92 }; 103 };
93 104
diff --git a/arch/arm/boot/dts/spear1340-evb.dts b/arch/arm/boot/dts/spear1340-evb.dts
index 045f7123ffac..1fc558424d96 100644
--- a/arch/arm/boot/dts/spear1340-evb.dts
+++ b/arch/arm/boot/dts/spear1340-evb.dts
@@ -38,20 +38,15 @@
38 st,pins = "fsmc_8bit_grp"; 38 st,pins = "fsmc_8bit_grp";
39 st,function = "fsmc"; 39 st,function = "fsmc";
40 }; 40 };
41 kbd {
42 st,pins = "keyboard_row_col_grp",
43 "keyboard_col5_grp";
44 st,function = "keyboard";
45 };
46 uart0 { 41 uart0 {
47 st,pins = "uart0_grp", "uart0_enh_grp"; 42 st,pins = "uart0_grp";
48 st,function = "uart0"; 43 st,function = "uart0";
49 }; 44 };
50 i2c0-pmx { 45 i2c0 {
51 st,pins = "i2c0_grp"; 46 st,pins = "i2c0_grp";
52 st,function = "i2c0"; 47 st,function = "i2c0";
53 }; 48 };
54 i2c1-pmx { 49 i2c1 {
55 st,pins = "i2c1_grp"; 50 st,pins = "i2c1_grp";
56 st,function = "i2c1"; 51 st,function = "i2c1";
57 }; 52 };
@@ -64,14 +59,9 @@
64 st,function = "spdif_out"; 59 st,function = "spdif_out";
65 }; 60 };
66 ssp0 { 61 ssp0 {
67 st,pins = "ssp0_grp", "ssp0_cs1_grp", 62 st,pins = "ssp0_grp", "ssp0_cs1_grp", "ssp0_cs2_grp", "ssp0_cs3_grp";
68 "ssp0_cs3_grp";
69 st,function = "ssp0"; 63 st,function = "ssp0";
70 }; 64 };
71 pwm {
72 st,pins = "pwm2_grp", "pwm3_grp";
73 st,function = "pwm";
74 };
75 smi-pmx { 65 smi-pmx {
76 st,pins = "smi_grp"; 66 st,pins = "smi_grp";
77 st,function = "smi"; 67 st,function = "smi";
@@ -84,6 +74,18 @@
84 st,pins = "gmii_grp", "rgmii_grp"; 74 st,pins = "gmii_grp", "rgmii_grp";
85 st,function = "gmac"; 75 st,function = "gmac";
86 }; 76 };
77 cam0 {
78 st,pins = "cam0_grp";
79 st,function = "cam0";
80 };
81 cam1 {
82 st,pins = "cam1_grp";
83 st,function = "cam1";
84 };
85 cam2 {
86 st,pins = "cam2_grp";
87 st,function = "cam2";
88 };
87 cam3 { 89 cam3 {
88 st,pins = "cam3_grp"; 90 st,pins = "cam3_grp";
89 st,function = "cam3"; 91 st,function = "cam3";
@@ -108,6 +110,11 @@
108 st,pins = "sata_grp"; 110 st,pins = "sata_grp";
109 st,function = "sata"; 111 st,function = "sata";
110 }; 112 };
113 pcie {
114 st,pins = "pcie_grp";
115 st,function = "pcie";
116 };
117
111 }; 118 };
112 }; 119 };
113 120
diff --git a/arch/arm/boot/dts/spear320-evb.dts b/arch/arm/boot/dts/spear320-evb.dts
index ad4bfc68ee05..70c3498b16a4 100644
--- a/arch/arm/boot/dts/spear320-evb.dts
+++ b/arch/arm/boot/dts/spear320-evb.dts
@@ -76,13 +76,9 @@
76 st,function = "mii2"; 76 st,function = "mii2";
77 }; 77 };
78 pwm0_1 { 78 pwm0_1 {
79 st,pins = "pwm0_1_pin_14_15_grp"; 79 st,pins = "pwm0_1_pin_37_38_grp";
80 st,function = "pwm0_1"; 80 st,function = "pwm0_1";
81 }; 81 };
82 pwm2 {
83 st,pins = "pwm2_pin_13_grp";
84 st,function = "pwm2";
85 };
86 }; 82 };
87 }; 83 };
88 84
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-09 07:37:04 -0400