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authorDavid S. Miller <davem@davemloft.net>2006-02-02 04:20:18 -0500
committerDavid S. Miller <davem@sunset.davemloft.net>2006-03-20 04:11:33 -0500
commit7bec08e38a7d0f088994f6eec9b6374652ea71fb (patch)
treedf0c24e8417d08aff3d3de7d9dc7b13c4e05931b /arch
parent517af33237ecfc3c8a93b335365fa61e741ceca4 (diff)
[SPARC64]: Correctable ECC errors cannot occur at trap level > 0.
The are distrupting, which by the sparc v9 definition means they can only occur when interrupts are enabled in the %pstate register. This never occurs in any of the trap handling code running at trap levels > 0. So just mark it as an unexpected trap. This allows us to kill off the cee_stuff member of struct thread_info. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch')
-rw-r--r--arch/sparc64/kernel/traps.c1
-rw-r--r--arch/sparc64/kernel/ttable.S18
2 files changed, 1 insertions, 18 deletions
diff --git a/arch/sparc64/kernel/traps.c b/arch/sparc64/kernel/traps.c
index f47f4874253c..7e52e8972668 100644
--- a/arch/sparc64/kernel/traps.c
+++ b/arch/sparc64/kernel/traps.c
@@ -2169,7 +2169,6 @@ void __init trap_init(void)
2169 TI_KERN_CNTD0 != offsetof(struct thread_info, kernel_cntd0) || 2169 TI_KERN_CNTD0 != offsetof(struct thread_info, kernel_cntd0) ||
2170 TI_KERN_CNTD1 != offsetof(struct thread_info, kernel_cntd1) || 2170 TI_KERN_CNTD1 != offsetof(struct thread_info, kernel_cntd1) ||
2171 TI_PCR != offsetof(struct thread_info, pcr_reg) || 2171 TI_PCR != offsetof(struct thread_info, pcr_reg) ||
2172 TI_CEE_STUFF != offsetof(struct thread_info, cee_stuff) ||
2173 TI_PRE_COUNT != offsetof(struct thread_info, preempt_count) || 2172 TI_PRE_COUNT != offsetof(struct thread_info, preempt_count) ||
2174 TI_NEW_CHILD != offsetof(struct thread_info, new_child) || 2173 TI_NEW_CHILD != offsetof(struct thread_info, new_child) ||
2175 TI_SYS_NOERROR != offsetof(struct thread_info, syscall_noerror) || 2174 TI_SYS_NOERROR != offsetof(struct thread_info, syscall_noerror) ||
diff --git a/arch/sparc64/kernel/ttable.S b/arch/sparc64/kernel/ttable.S
index 2fb7a33993c0..99531424c598 100644
--- a/arch/sparc64/kernel/ttable.S
+++ b/arch/sparc64/kernel/ttable.S
@@ -222,23 +222,7 @@ tl1_resv05c: BTRAPTL1(0x5c) BTRAPTL1(0x5d) BTRAPTL1(0x5e) BTRAPTL1(0x5f)
222tl1_ivec: TRAP_IVEC 222tl1_ivec: TRAP_IVEC
223tl1_paw: TRAPTL1(do_paw_tl1) 223tl1_paw: TRAPTL1(do_paw_tl1)
224tl1_vaw: TRAPTL1(do_vaw_tl1) 224tl1_vaw: TRAPTL1(do_vaw_tl1)
225 225tl1_cee: BTRAPTL1(0x63)
226 /* The grotty trick to save %g1 into current->thread.cee_stuff
227 * is because when we take this trap we could be interrupting
228 * trap code already using the trap alternate global registers.
229 *
230 * We cross our fingers and pray that this store/load does
231 * not cause yet another CEE trap.
232 */
233tl1_cee: membar #Sync
234 stx %g1, [%g6 + TI_CEE_STUFF]
235 ldxa [%g0] ASI_AFSR, %g1
236 membar #Sync
237 stxa %g1, [%g0] ASI_AFSR
238 membar #Sync
239 ldx [%g6 + TI_CEE_STUFF], %g1
240 retry
241
242tl1_iamiss: BTRAPTL1(0x64) BTRAPTL1(0x65) BTRAPTL1(0x66) BTRAPTL1(0x67) 226tl1_iamiss: BTRAPTL1(0x64) BTRAPTL1(0x65) BTRAPTL1(0x66) BTRAPTL1(0x67)
243tl1_damiss: 227tl1_damiss:
244#include "dtlb_miss.S" 228#include "dtlb_miss.S"