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authorMatthew McClintock <msm@freescale.com>2010-06-29 15:42:07 -0400
committerKumar Gala <galak@kernel.crashing.org>2010-07-11 12:04:08 -0400
commit77154a2026ee5cb2ce05a7d370c16e4c123028e5 (patch)
treeacd8ef9ff3e7d21f9f6deab764d058dbf79f7d7f /arch
parentaf71bcfeaaaad92147922282341d394093a4fc9b (diff)
powerpc/fsl-booke: Fix address issue when using relocatable kernels
When booting a relocatable kernel it needs to jump to the correct start address, which for BookE parts is usually unchanged regardless of the physical memory offset. Recent changes cause problems with how we calculate the start address, it was always adding the RMO into the start address which is incorrect. This patch only adds in the RMO offset if we are in the kexec code path, as it needs the RMO to work correctly. Instead of adding the RMO offset in in the common code path, we can just set r6 to the RMO offset in the kexec code path instead of to zero, and finally perform the masking in the common code path Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/kernel/fsl_booke_entry_mapping.S4
1 files changed, 1 insertions, 3 deletions
diff --git a/arch/powerpc/kernel/fsl_booke_entry_mapping.S b/arch/powerpc/kernel/fsl_booke_entry_mapping.S
index beb4d78a2304..a92c79be2728 100644
--- a/arch/powerpc/kernel/fsl_booke_entry_mapping.S
+++ b/arch/powerpc/kernel/fsl_booke_entry_mapping.S
@@ -205,8 +205,7 @@ next_tlb_setup:
205 bdnz+ next_tlb_setup 205 bdnz+ next_tlb_setup
206 206
207/* 7. Jump to our 1:1 mapping */ 207/* 7. Jump to our 1:1 mapping */
208 li r6, 0 208 mr r6, r25
209
210#else 209#else
211 #error You need to specify the mapping or not use this at all. 210 #error You need to specify the mapping or not use this at all.
212#endif 211#endif
@@ -217,7 +216,6 @@ next_tlb_setup:
2171: mflr r9 2161: mflr r9
218 rlwimi r6,r9,0,20,31 217 rlwimi r6,r9,0,20,31
219 addi r6,r6,(2f - 1b) 218 addi r6,r6,(2f - 1b)
220 add r6, r6, r25
221 mtspr SPRN_SRR0,r6 219 mtspr SPRN_SRR0,r6
222 mtspr SPRN_SRR1,r7 220 mtspr SPRN_SRR1,r7
223 rfi /* start execution out of TLB1[0] entry */ 221 rfi /* start execution out of TLB1[0] entry */