aboutsummaryrefslogtreecommitdiffstats
path: root/arch
diff options
context:
space:
mode:
authorYinghai Lu <yinghai.lu@oracle.com>2011-10-12 03:33:48 -0400
committerIngo Molnar <mingo@elte.hu>2011-10-12 03:55:28 -0400
commit6f50d45fae8189365805d26e1fdf26a75301bcae (patch)
tree3f11ba9089828fbb1b3157ad78e48c6a0a967f98 /arch
parentcda417dd87ed46f58cbc7d3f075ebe42b4462140 (diff)
x86, ioapic: Clean up ioapic/apic_id usage
While looking at the code, apic_id sometime is referred to index of ioapic, but sometime is used for phys apic id. and some even use apic for real apic id. It is very confusing. So try to limit apic_id or ioapic_id to be real apic id for ioapic, and use ioapic_idx for ioapic index in the array. -v2: Suggested by Ingo, use ioapic_idx consistently, instead of ioapic Signed-off-by: Yinghai Lu <yinghai@kernel.org> Cc: Naga Chumbalkar <nagananda.chumbalkar@hp.com> Cc: Suresh Siddha <suresh.b.siddha@intel.com> Link: http://lkml.kernel.org/r/4E9542DC.3090509@oracle.com Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/kernel/apic/io_apic.c194
1 files changed, 97 insertions, 97 deletions
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 94a4bcf9dca8..08f0d165e139 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -92,21 +92,21 @@ static struct ioapic {
92 DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1); 92 DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1);
93} ioapics[MAX_IO_APICS]; 93} ioapics[MAX_IO_APICS];
94 94
95#define mpc_ioapic_ver(id) ioapics[id].mp_config.apicver 95#define mpc_ioapic_ver(ioapic_idx) ioapics[ioapic_idx].mp_config.apicver
96 96
97int mpc_ioapic_id(int id) 97int mpc_ioapic_id(int ioapic_idx)
98{ 98{
99 return ioapics[id].mp_config.apicid; 99 return ioapics[ioapic_idx].mp_config.apicid;
100} 100}
101 101
102unsigned int mpc_ioapic_addr(int id) 102unsigned int mpc_ioapic_addr(int ioapic_idx)
103{ 103{
104 return ioapics[id].mp_config.apicaddr; 104 return ioapics[ioapic_idx].mp_config.apicaddr;
105} 105}
106 106
107struct mp_ioapic_gsi *mp_ioapic_gsi_routing(int id) 107struct mp_ioapic_gsi *mp_ioapic_gsi_routing(int ioapic_idx)
108{ 108{
109 return &ioapics[id].gsi_config; 109 return &ioapics[ioapic_idx].gsi_config;
110} 110}
111 111
112int nr_ioapics; 112int nr_ioapics;
@@ -712,13 +712,13 @@ int restore_ioapic_entries(void)
712/* 712/*
713 * Find the IRQ entry number of a certain pin. 713 * Find the IRQ entry number of a certain pin.
714 */ 714 */
715static int find_irq_entry(int apic, int pin, int type) 715static int find_irq_entry(int ioapic_idx, int pin, int type)
716{ 716{
717 int i; 717 int i;
718 718
719 for (i = 0; i < mp_irq_entries; i++) 719 for (i = 0; i < mp_irq_entries; i++)
720 if (mp_irqs[i].irqtype == type && 720 if (mp_irqs[i].irqtype == type &&
721 (mp_irqs[i].dstapic == mpc_ioapic_id(apic) || 721 (mp_irqs[i].dstapic == mpc_ioapic_id(ioapic_idx) ||
722 mp_irqs[i].dstapic == MP_APIC_ALL) && 722 mp_irqs[i].dstapic == MP_APIC_ALL) &&
723 mp_irqs[i].dstirq == pin) 723 mp_irqs[i].dstirq == pin)
724 return i; 724 return i;
@@ -757,12 +757,13 @@ static int __init find_isa_irq_apic(int irq, int type)
757 (mp_irqs[i].srcbusirq == irq)) 757 (mp_irqs[i].srcbusirq == irq))
758 break; 758 break;
759 } 759 }
760
760 if (i < mp_irq_entries) { 761 if (i < mp_irq_entries) {
761 int apic; 762 int ioapic_idx;
762 for(apic = 0; apic < nr_ioapics; apic++) { 763
763 if (mpc_ioapic_id(apic) == mp_irqs[i].dstapic) 764 for (ioapic_idx = 0; ioapic_idx < nr_ioapics; ioapic_idx++)
764 return apic; 765 if (mpc_ioapic_id(ioapic_idx) == mp_irqs[i].dstapic)
765 } 766 return ioapic_idx;
766 } 767 }
767 768
768 return -1; 769 return -1;
@@ -977,7 +978,7 @@ static int pin_2_irq(int idx, int apic, int pin)
977int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin, 978int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin,
978 struct io_apic_irq_attr *irq_attr) 979 struct io_apic_irq_attr *irq_attr)
979{ 980{
980 int apic, i, best_guess = -1; 981 int ioapic_idx, i, best_guess = -1;
981 982
982 apic_printk(APIC_DEBUG, 983 apic_printk(APIC_DEBUG,
983 "querying PCI -> IRQ mapping bus:%d, slot:%d, pin:%d.\n", 984 "querying PCI -> IRQ mapping bus:%d, slot:%d, pin:%d.\n",
@@ -990,8 +991,8 @@ int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin,
990 for (i = 0; i < mp_irq_entries; i++) { 991 for (i = 0; i < mp_irq_entries; i++) {
991 int lbus = mp_irqs[i].srcbus; 992 int lbus = mp_irqs[i].srcbus;
992 993
993 for (apic = 0; apic < nr_ioapics; apic++) 994 for (ioapic_idx = 0; ioapic_idx < nr_ioapics; ioapic_idx++)
994 if (mpc_ioapic_id(apic) == mp_irqs[i].dstapic || 995 if (mpc_ioapic_id(ioapic_idx) == mp_irqs[i].dstapic ||
995 mp_irqs[i].dstapic == MP_APIC_ALL) 996 mp_irqs[i].dstapic == MP_APIC_ALL)
996 break; 997 break;
997 998
@@ -999,13 +1000,13 @@ int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin,
999 !mp_irqs[i].irqtype && 1000 !mp_irqs[i].irqtype &&
1000 (bus == lbus) && 1001 (bus == lbus) &&
1001 (slot == ((mp_irqs[i].srcbusirq >> 2) & 0x1f))) { 1002 (slot == ((mp_irqs[i].srcbusirq >> 2) & 0x1f))) {
1002 int irq = pin_2_irq(i, apic, mp_irqs[i].dstirq); 1003 int irq = pin_2_irq(i, ioapic_idx, mp_irqs[i].dstirq);
1003 1004
1004 if (!(apic || IO_APIC_IRQ(irq))) 1005 if (!(ioapic_idx || IO_APIC_IRQ(irq)))
1005 continue; 1006 continue;
1006 1007
1007 if (pin == (mp_irqs[i].srcbusirq & 3)) { 1008 if (pin == (mp_irqs[i].srcbusirq & 3)) {
1008 set_io_apic_irq_attr(irq_attr, apic, 1009 set_io_apic_irq_attr(irq_attr, ioapic_idx,
1009 mp_irqs[i].dstirq, 1010 mp_irqs[i].dstirq,
1010 irq_trigger(i), 1011 irq_trigger(i),
1011 irq_polarity(i)); 1012 irq_polarity(i));
@@ -1016,7 +1017,7 @@ int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin,
1016 * best-guess fuzzy result for broken mptables. 1017 * best-guess fuzzy result for broken mptables.
1017 */ 1018 */
1018 if (best_guess < 0) { 1019 if (best_guess < 0) {
1019 set_io_apic_irq_attr(irq_attr, apic, 1020 set_io_apic_irq_attr(irq_attr, ioapic_idx,
1020 mp_irqs[i].dstirq, 1021 mp_irqs[i].dstirq,
1021 irq_trigger(i), 1022 irq_trigger(i),
1022 irq_polarity(i)); 1023 irq_polarity(i));
@@ -1263,24 +1264,24 @@ static int setup_ir_ioapic_entry(int irq,
1263{ 1264{
1264 int index; 1265 int index;
1265 struct irte irte; 1266 struct irte irte;
1266 int apic_id = mpc_ioapic_id(attr->ioapic); 1267 int ioapic_id = mpc_ioapic_id(attr->ioapic);
1267 struct intel_iommu *iommu = map_ioapic_to_ir(apic_id); 1268 struct intel_iommu *iommu = map_ioapic_to_ir(ioapic_id);
1268 1269
1269 if (!iommu) { 1270 if (!iommu) {
1270 pr_warn("No mapping iommu for ioapic %d\n", apic_id); 1271 pr_warn("No mapping iommu for ioapic %d\n", ioapic_id);
1271 return -ENODEV; 1272 return -ENODEV;
1272 } 1273 }
1273 1274
1274 index = alloc_irte(iommu, irq, 1); 1275 index = alloc_irte(iommu, irq, 1);
1275 if (index < 0) { 1276 if (index < 0) {
1276 pr_warn("Failed to allocate IRTE for ioapic %d\n", apic_id); 1277 pr_warn("Failed to allocate IRTE for ioapic %d\n", ioapic_id);
1277 return -ENOMEM; 1278 return -ENOMEM;
1278 } 1279 }
1279 1280
1280 prepare_irte(&irte, vector, destination); 1281 prepare_irte(&irte, vector, destination);
1281 1282
1282 /* Set source-id of interrupt request */ 1283 /* Set source-id of interrupt request */
1283 set_ioapic_sid(&irte, apic_id); 1284 set_ioapic_sid(&irte, ioapic_id);
1284 1285
1285 modify_irte(irq, &irte); 1286 modify_irte(irq, &irte);
1286 1287
@@ -1389,30 +1390,30 @@ static void setup_ioapic_irq(unsigned int irq, struct irq_cfg *cfg,
1389 ioapic_write_entry(attr->ioapic, attr->ioapic_pin, entry); 1390 ioapic_write_entry(attr->ioapic, attr->ioapic_pin, entry);
1390} 1391}
1391 1392
1392static bool __init io_apic_pin_not_connected(int idx, int apic_id, int pin) 1393static bool __init io_apic_pin_not_connected(int idx, int ioapic_idx, int pin)
1393{ 1394{
1394 if (idx != -1) 1395 if (idx != -1)
1395 return false; 1396 return false;
1396 1397
1397 apic_printk(APIC_VERBOSE, KERN_DEBUG " apic %d pin %d not connected\n", 1398 apic_printk(APIC_VERBOSE, KERN_DEBUG " apic %d pin %d not connected\n",
1398 mpc_ioapic_id(apic_id), pin); 1399 mpc_ioapic_id(ioapic_idx), pin);
1399 return true; 1400 return true;
1400} 1401}
1401 1402
1402static void __init __io_apic_setup_irqs(unsigned int apic_id) 1403static void __init __io_apic_setup_irqs(unsigned int ioapic_idx)
1403{ 1404{
1404 int idx, node = cpu_to_node(0); 1405 int idx, node = cpu_to_node(0);
1405 struct io_apic_irq_attr attr; 1406 struct io_apic_irq_attr attr;
1406 unsigned int pin, irq; 1407 unsigned int pin, irq;
1407 1408
1408 for (pin = 0; pin < ioapics[apic_id].nr_registers; pin++) { 1409 for (pin = 0; pin < ioapics[ioapic_idx].nr_registers; pin++) {
1409 idx = find_irq_entry(apic_id, pin, mp_INT); 1410 idx = find_irq_entry(ioapic_idx, pin, mp_INT);
1410 if (io_apic_pin_not_connected(idx, apic_id, pin)) 1411 if (io_apic_pin_not_connected(idx, ioapic_idx, pin))
1411 continue; 1412 continue;
1412 1413
1413 irq = pin_2_irq(idx, apic_id, pin); 1414 irq = pin_2_irq(idx, ioapic_idx, pin);
1414 1415
1415 if ((apic_id > 0) && (irq > 16)) 1416 if ((ioapic_idx > 0) && (irq > 16))
1416 continue; 1417 continue;
1417 1418
1418 /* 1419 /*
@@ -1420,10 +1421,10 @@ static void __init __io_apic_setup_irqs(unsigned int apic_id)
1420 * installed and if it returns 1: 1421 * installed and if it returns 1:
1421 */ 1422 */
1422 if (apic->multi_timer_check && 1423 if (apic->multi_timer_check &&
1423 apic->multi_timer_check(apic_id, irq)) 1424 apic->multi_timer_check(ioapic_idx, irq))
1424 continue; 1425 continue;
1425 1426
1426 set_io_apic_irq_attr(&attr, apic_id, pin, irq_trigger(idx), 1427 set_io_apic_irq_attr(&attr, ioapic_idx, pin, irq_trigger(idx),
1427 irq_polarity(idx)); 1428 irq_polarity(idx));
1428 1429
1429 io_apic_setup_irq_pin(irq, node, &attr); 1430 io_apic_setup_irq_pin(irq, node, &attr);
@@ -1432,12 +1433,12 @@ static void __init __io_apic_setup_irqs(unsigned int apic_id)
1432 1433
1433static void __init setup_IO_APIC_irqs(void) 1434static void __init setup_IO_APIC_irqs(void)
1434{ 1435{
1435 unsigned int apic_id; 1436 unsigned int ioapic_idx;
1436 1437
1437 apic_printk(APIC_VERBOSE, KERN_DEBUG "init IO_APIC IRQs\n"); 1438 apic_printk(APIC_VERBOSE, KERN_DEBUG "init IO_APIC IRQs\n");
1438 1439
1439 for (apic_id = 0; apic_id < nr_ioapics; apic_id++) 1440 for (ioapic_idx = 0; ioapic_idx < nr_ioapics; ioapic_idx++)
1440 __io_apic_setup_irqs(apic_id); 1441 __io_apic_setup_irqs(ioapic_idx);
1441} 1442}
1442 1443
1443/* 1444/*
@@ -1447,28 +1448,28 @@ static void __init setup_IO_APIC_irqs(void)
1447 */ 1448 */
1448void setup_IO_APIC_irq_extra(u32 gsi) 1449void setup_IO_APIC_irq_extra(u32 gsi)
1449{ 1450{
1450 int apic_id = 0, pin, idx, irq, node = cpu_to_node(0); 1451 int ioapic_idx = 0, pin, idx, irq, node = cpu_to_node(0);
1451 struct io_apic_irq_attr attr; 1452 struct io_apic_irq_attr attr;
1452 1453
1453 /* 1454 /*
1454 * Convert 'gsi' to 'ioapic.pin'. 1455 * Convert 'gsi' to 'ioapic.pin'.
1455 */ 1456 */
1456 apic_id = mp_find_ioapic(gsi); 1457 ioapic_idx = mp_find_ioapic(gsi);
1457 if (apic_id < 0) 1458 if (ioapic_idx < 0)
1458 return; 1459 return;
1459 1460
1460 pin = mp_find_ioapic_pin(apic_id, gsi); 1461 pin = mp_find_ioapic_pin(ioapic_idx, gsi);
1461 idx = find_irq_entry(apic_id, pin, mp_INT); 1462 idx = find_irq_entry(ioapic_idx, pin, mp_INT);
1462 if (idx == -1) 1463 if (idx == -1)
1463 return; 1464 return;
1464 1465
1465 irq = pin_2_irq(idx, apic_id, pin); 1466 irq = pin_2_irq(idx, ioapic_idx, pin);
1466 1467
1467 /* Only handle the non legacy irqs on secondary ioapics */ 1468 /* Only handle the non legacy irqs on secondary ioapics */
1468 if (apic_id == 0 || irq < NR_IRQS_LEGACY) 1469 if (ioapic_idx == 0 || irq < NR_IRQS_LEGACY)
1469 return; 1470 return;
1470 1471
1471 set_io_apic_irq_attr(&attr, apic_id, pin, irq_trigger(idx), 1472 set_io_apic_irq_attr(&attr, ioapic_idx, pin, irq_trigger(idx),
1472 irq_polarity(idx)); 1473 irq_polarity(idx));
1473 1474
1474 io_apic_setup_irq_pin_once(irq, node, &attr); 1475 io_apic_setup_irq_pin_once(irq, node, &attr);
@@ -1477,8 +1478,8 @@ void setup_IO_APIC_irq_extra(u32 gsi)
1477/* 1478/*
1478 * Set up the timer pin, possibly with the 8259A-master behind. 1479 * Set up the timer pin, possibly with the 8259A-master behind.
1479 */ 1480 */
1480static void __init setup_timer_IRQ0_pin(unsigned int apic_id, unsigned int pin, 1481static void __init setup_timer_IRQ0_pin(unsigned int ioapic_idx,
1481 int vector) 1482 unsigned int pin, int vector)
1482{ 1483{
1483 struct IO_APIC_route_entry entry; 1484 struct IO_APIC_route_entry entry;
1484 1485
@@ -1509,10 +1510,10 @@ static void __init setup_timer_IRQ0_pin(unsigned int apic_id, unsigned int pin,
1509 /* 1510 /*
1510 * Add it to the IO-APIC irq-routing table: 1511 * Add it to the IO-APIC irq-routing table:
1511 */ 1512 */
1512 ioapic_write_entry(apic_id, pin, entry); 1513 ioapic_write_entry(ioapic_idx, pin, entry);
1513} 1514}
1514 1515
1515__apicdebuginit(void) print_IO_APIC(int apic) 1516__apicdebuginit(void) print_IO_APIC(int ioapic_idx)
1516{ 1517{
1517 int i; 1518 int i;
1518 union IO_APIC_reg_00 reg_00; 1519 union IO_APIC_reg_00 reg_00;
@@ -1522,16 +1523,16 @@ __apicdebuginit(void) print_IO_APIC(int apic)
1522 unsigned long flags; 1523 unsigned long flags;
1523 1524
1524 raw_spin_lock_irqsave(&ioapic_lock, flags); 1525 raw_spin_lock_irqsave(&ioapic_lock, flags);
1525 reg_00.raw = io_apic_read(apic, 0); 1526 reg_00.raw = io_apic_read(ioapic_idx, 0);
1526 reg_01.raw = io_apic_read(apic, 1); 1527 reg_01.raw = io_apic_read(ioapic_idx, 1);
1527 if (reg_01.bits.version >= 0x10) 1528 if (reg_01.bits.version >= 0x10)
1528 reg_02.raw = io_apic_read(apic, 2); 1529 reg_02.raw = io_apic_read(ioapic_idx, 2);
1529 if (reg_01.bits.version >= 0x20) 1530 if (reg_01.bits.version >= 0x20)
1530 reg_03.raw = io_apic_read(apic, 3); 1531 reg_03.raw = io_apic_read(ioapic_idx, 3);
1531 raw_spin_unlock_irqrestore(&ioapic_lock, flags); 1532 raw_spin_unlock_irqrestore(&ioapic_lock, flags);
1532 1533
1533 printk("\n"); 1534 printk("\n");
1534 printk(KERN_DEBUG "IO APIC #%d......\n", mpc_ioapic_id(apic)); 1535 printk(KERN_DEBUG "IO APIC #%d......\n", mpc_ioapic_id(ioapic_idx));
1535 printk(KERN_DEBUG ".... register #00: %08X\n", reg_00.raw); 1536 printk(KERN_DEBUG ".... register #00: %08X\n", reg_00.raw);
1536 printk(KERN_DEBUG "....... : physical APIC id: %02X\n", reg_00.bits.ID); 1537 printk(KERN_DEBUG "....... : physical APIC id: %02X\n", reg_00.bits.ID);
1537 printk(KERN_DEBUG "....... : Delivery Type: %X\n", reg_00.bits.delivery_type); 1538 printk(KERN_DEBUG "....... : Delivery Type: %X\n", reg_00.bits.delivery_type);
@@ -1581,7 +1582,7 @@ __apicdebuginit(void) print_IO_APIC(int apic)
1581 struct IO_APIC_route_entry entry; 1582 struct IO_APIC_route_entry entry;
1582 struct IR_IO_APIC_route_entry *ir_entry; 1583 struct IR_IO_APIC_route_entry *ir_entry;
1583 1584
1584 entry = ioapic_read_entry(apic, i); 1585 entry = ioapic_read_entry(ioapic_idx, i);
1585 ir_entry = (struct IR_IO_APIC_route_entry *) &entry; 1586 ir_entry = (struct IR_IO_APIC_route_entry *) &entry;
1586 printk(KERN_DEBUG " %02x %04X ", 1587 printk(KERN_DEBUG " %02x %04X ",
1587 i, 1588 i,
@@ -1602,7 +1603,7 @@ __apicdebuginit(void) print_IO_APIC(int apic)
1602 } else { 1603 } else {
1603 struct IO_APIC_route_entry entry; 1604 struct IO_APIC_route_entry entry;
1604 1605
1605 entry = ioapic_read_entry(apic, i); 1606 entry = ioapic_read_entry(ioapic_idx, i);
1606 printk(KERN_DEBUG " %02x %02X ", 1607 printk(KERN_DEBUG " %02x %02X ",
1607 i, 1608 i,
1608 entry.dest 1609 entry.dest
@@ -1624,14 +1625,15 @@ __apicdebuginit(void) print_IO_APIC(int apic)
1624 1625
1625__apicdebuginit(void) print_IO_APICs(void) 1626__apicdebuginit(void) print_IO_APICs(void)
1626{ 1627{
1627 int apic, i; 1628 int ioapic_idx;
1628 struct irq_cfg *cfg; 1629 struct irq_cfg *cfg;
1629 unsigned int irq; 1630 unsigned int irq;
1630 1631
1631 printk(KERN_DEBUG "number of MP IRQ sources: %d.\n", mp_irq_entries); 1632 printk(KERN_DEBUG "number of MP IRQ sources: %d.\n", mp_irq_entries);
1632 for (i = 0; i < nr_ioapics; i++) 1633 for (ioapic_idx = 0; ioapic_idx < nr_ioapics; ioapic_idx++)
1633 printk(KERN_DEBUG "number of IO-APIC #%d registers: %d.\n", 1634 printk(KERN_DEBUG "number of IO-APIC #%d registers: %d.\n",
1634 mpc_ioapic_id(i), ioapics[i].nr_registers); 1635 mpc_ioapic_id(ioapic_idx),
1636 ioapics[ioapic_idx].nr_registers);
1635 1637
1636 /* 1638 /*
1637 * We are a bit conservative about what we expect. We have to 1639 * We are a bit conservative about what we expect. We have to
@@ -1639,8 +1641,8 @@ __apicdebuginit(void) print_IO_APICs(void)
1639 */ 1641 */
1640 printk(KERN_INFO "testing the IO APIC.......................\n"); 1642 printk(KERN_INFO "testing the IO APIC.......................\n");
1641 1643
1642 for (apic = 0; apic < nr_ioapics; apic++) 1644 for (ioapic_idx = 0; ioapic_idx < nr_ioapics; ioapic_idx++)
1643 print_IO_APIC(apic); 1645 print_IO_APIC(ioapic_idx);
1644 1646
1645 printk(KERN_DEBUG "IRQ to pin mappings:\n"); 1647 printk(KERN_DEBUG "IRQ to pin mappings:\n");
1646 for_each_active_irq(irq) { 1648 for_each_active_irq(irq) {
@@ -1977,7 +1979,7 @@ void __init setup_ioapic_ids_from_mpc_nocheck(void)
1977{ 1979{
1978 union IO_APIC_reg_00 reg_00; 1980 union IO_APIC_reg_00 reg_00;
1979 physid_mask_t phys_id_present_map; 1981 physid_mask_t phys_id_present_map;
1980 int apic_id; 1982 int ioapic_idx;
1981 int i; 1983 int i;
1982 unsigned char old_id; 1984 unsigned char old_id;
1983 unsigned long flags; 1985 unsigned long flags;
@@ -1991,21 +1993,20 @@ void __init setup_ioapic_ids_from_mpc_nocheck(void)
1991 /* 1993 /*
1992 * Set the IOAPIC ID to the value stored in the MPC table. 1994 * Set the IOAPIC ID to the value stored in the MPC table.
1993 */ 1995 */
1994 for (apic_id = 0; apic_id < nr_ioapics; apic_id++) { 1996 for (ioapic_idx = 0; ioapic_idx < nr_ioapics; ioapic_idx++) {
1995
1996 /* Read the register 0 value */ 1997 /* Read the register 0 value */
1997 raw_spin_lock_irqsave(&ioapic_lock, flags); 1998 raw_spin_lock_irqsave(&ioapic_lock, flags);
1998 reg_00.raw = io_apic_read(apic_id, 0); 1999 reg_00.raw = io_apic_read(ioapic_idx, 0);
1999 raw_spin_unlock_irqrestore(&ioapic_lock, flags); 2000 raw_spin_unlock_irqrestore(&ioapic_lock, flags);
2000 2001
2001 old_id = mpc_ioapic_id(apic_id); 2002 old_id = mpc_ioapic_id(ioapic_idx);
2002 2003
2003 if (mpc_ioapic_id(apic_id) >= get_physical_broadcast()) { 2004 if (mpc_ioapic_id(ioapic_idx) >= get_physical_broadcast()) {
2004 printk(KERN_ERR "BIOS bug, IO-APIC#%d ID is %d in the MPC table!...\n", 2005 printk(KERN_ERR "BIOS bug, IO-APIC#%d ID is %d in the MPC table!...\n",
2005 apic_id, mpc_ioapic_id(apic_id)); 2006 ioapic_idx, mpc_ioapic_id(ioapic_idx));
2006 printk(KERN_ERR "... fixing up to %d. (tell your hw vendor)\n", 2007 printk(KERN_ERR "... fixing up to %d. (tell your hw vendor)\n",
2007 reg_00.bits.ID); 2008 reg_00.bits.ID);
2008 ioapics[apic_id].mp_config.apicid = reg_00.bits.ID; 2009 ioapics[ioapic_idx].mp_config.apicid = reg_00.bits.ID;
2009 } 2010 }
2010 2011
2011 /* 2012 /*
@@ -2014,9 +2015,9 @@ void __init setup_ioapic_ids_from_mpc_nocheck(void)
2014 * 'stuck on smp_invalidate_needed IPI wait' messages. 2015 * 'stuck on smp_invalidate_needed IPI wait' messages.
2015 */ 2016 */
2016 if (apic->check_apicid_used(&phys_id_present_map, 2017 if (apic->check_apicid_used(&phys_id_present_map,
2017 mpc_ioapic_id(apic_id))) { 2018 mpc_ioapic_id(ioapic_idx))) {
2018 printk(KERN_ERR "BIOS bug, IO-APIC#%d ID %d is already used!...\n", 2019 printk(KERN_ERR "BIOS bug, IO-APIC#%d ID %d is already used!...\n",
2019 apic_id, mpc_ioapic_id(apic_id)); 2020 ioapic_idx, mpc_ioapic_id(ioapic_idx));
2020 for (i = 0; i < get_physical_broadcast(); i++) 2021 for (i = 0; i < get_physical_broadcast(); i++)
2021 if (!physid_isset(i, phys_id_present_map)) 2022 if (!physid_isset(i, phys_id_present_map))
2022 break; 2023 break;
@@ -2025,14 +2026,14 @@ void __init setup_ioapic_ids_from_mpc_nocheck(void)
2025 printk(KERN_ERR "... fixing up to %d. (tell your hw vendor)\n", 2026 printk(KERN_ERR "... fixing up to %d. (tell your hw vendor)\n",
2026 i); 2027 i);
2027 physid_set(i, phys_id_present_map); 2028 physid_set(i, phys_id_present_map);
2028 ioapics[apic_id].mp_config.apicid = i; 2029 ioapics[ioapic_idx].mp_config.apicid = i;
2029 } else { 2030 } else {
2030 physid_mask_t tmp; 2031 physid_mask_t tmp;
2031 apic->apicid_to_cpu_present(mpc_ioapic_id(apic_id), 2032 apic->apicid_to_cpu_present(mpc_ioapic_id(ioapic_idx),
2032 &tmp); 2033 &tmp);
2033 apic_printk(APIC_VERBOSE, "Setting %d in the " 2034 apic_printk(APIC_VERBOSE, "Setting %d in the "
2034 "phys_id_present_map\n", 2035 "phys_id_present_map\n",
2035 mpc_ioapic_id(apic_id)); 2036 mpc_ioapic_id(ioapic_idx));
2036 physids_or(phys_id_present_map, phys_id_present_map, tmp); 2037 physids_or(phys_id_present_map, phys_id_present_map, tmp);
2037 } 2038 }
2038 2039
@@ -2040,35 +2041,35 @@ void __init setup_ioapic_ids_from_mpc_nocheck(void)
2040 * We need to adjust the IRQ routing table 2041 * We need to adjust the IRQ routing table
2041 * if the ID changed. 2042 * if the ID changed.
2042 */ 2043 */
2043 if (old_id != mpc_ioapic_id(apic_id)) 2044 if (old_id != mpc_ioapic_id(ioapic_idx))
2044 for (i = 0; i < mp_irq_entries; i++) 2045 for (i = 0; i < mp_irq_entries; i++)
2045 if (mp_irqs[i].dstapic == old_id) 2046 if (mp_irqs[i].dstapic == old_id)
2046 mp_irqs[i].dstapic 2047 mp_irqs[i].dstapic
2047 = mpc_ioapic_id(apic_id); 2048 = mpc_ioapic_id(ioapic_idx);
2048 2049
2049 /* 2050 /*
2050 * Update the ID register according to the right value 2051 * Update the ID register according to the right value
2051 * from the MPC table if they are different. 2052 * from the MPC table if they are different.
2052 */ 2053 */
2053 if (mpc_ioapic_id(apic_id) == reg_00.bits.ID) 2054 if (mpc_ioapic_id(ioapic_idx) == reg_00.bits.ID)
2054 continue; 2055 continue;
2055 2056
2056 apic_printk(APIC_VERBOSE, KERN_INFO 2057 apic_printk(APIC_VERBOSE, KERN_INFO
2057 "...changing IO-APIC physical APIC ID to %d ...", 2058 "...changing IO-APIC physical APIC ID to %d ...",
2058 mpc_ioapic_id(apic_id)); 2059 mpc_ioapic_id(ioapic_idx));
2059 2060
2060 reg_00.bits.ID = mpc_ioapic_id(apic_id); 2061 reg_00.bits.ID = mpc_ioapic_id(ioapic_idx);
2061 raw_spin_lock_irqsave(&ioapic_lock, flags); 2062 raw_spin_lock_irqsave(&ioapic_lock, flags);
2062 io_apic_write(apic_id, 0, reg_00.raw); 2063 io_apic_write(ioapic_idx, 0, reg_00.raw);
2063 raw_spin_unlock_irqrestore(&ioapic_lock, flags); 2064 raw_spin_unlock_irqrestore(&ioapic_lock, flags);
2064 2065
2065 /* 2066 /*
2066 * Sanity check 2067 * Sanity check
2067 */ 2068 */
2068 raw_spin_lock_irqsave(&ioapic_lock, flags); 2069 raw_spin_lock_irqsave(&ioapic_lock, flags);
2069 reg_00.raw = io_apic_read(apic_id, 0); 2070 reg_00.raw = io_apic_read(ioapic_idx, 0);
2070 raw_spin_unlock_irqrestore(&ioapic_lock, flags); 2071 raw_spin_unlock_irqrestore(&ioapic_lock, flags);
2071 if (reg_00.bits.ID != mpc_ioapic_id(apic_id)) 2072 if (reg_00.bits.ID != mpc_ioapic_id(ioapic_idx))
2072 printk("could not set ID!\n"); 2073 printk("could not set ID!\n");
2073 else 2074 else
2074 apic_printk(APIC_VERBOSE, " ok.\n"); 2075 apic_printk(APIC_VERBOSE, " ok.\n");
@@ -2968,27 +2969,26 @@ static int __init io_apic_bug_finalize(void)
2968 2969
2969late_initcall(io_apic_bug_finalize); 2970late_initcall(io_apic_bug_finalize);
2970 2971
2971static void resume_ioapic_id(int ioapic_id) 2972static void resume_ioapic_id(int ioapic_idx)
2972{ 2973{
2973 unsigned long flags; 2974 unsigned long flags;
2974 union IO_APIC_reg_00 reg_00; 2975 union IO_APIC_reg_00 reg_00;
2975 2976
2976
2977 raw_spin_lock_irqsave(&ioapic_lock, flags); 2977 raw_spin_lock_irqsave(&ioapic_lock, flags);
2978 reg_00.raw = io_apic_read(ioapic_id, 0); 2978 reg_00.raw = io_apic_read(ioapic_idx, 0);
2979 if (reg_00.bits.ID != mpc_ioapic_id(ioapic_id)) { 2979 if (reg_00.bits.ID != mpc_ioapic_id(ioapic_idx)) {
2980 reg_00.bits.ID = mpc_ioapic_id(ioapic_id); 2980 reg_00.bits.ID = mpc_ioapic_id(ioapic_idx);
2981 io_apic_write(ioapic_id, 0, reg_00.raw); 2981 io_apic_write(ioapic_idx, 0, reg_00.raw);
2982 } 2982 }
2983 raw_spin_unlock_irqrestore(&ioapic_lock, flags); 2983 raw_spin_unlock_irqrestore(&ioapic_lock, flags);
2984} 2984}
2985 2985
2986static void ioapic_resume(void) 2986static void ioapic_resume(void)
2987{ 2987{
2988 int ioapic_id; 2988 int ioapic_idx;
2989 2989
2990 for (ioapic_id = nr_ioapics - 1; ioapic_id >= 0; ioapic_id--) 2990 for (ioapic_idx = nr_ioapics - 1; ioapic_idx >= 0; ioapic_idx--)
2991 resume_ioapic_id(ioapic_id); 2991 resume_ioapic_id(ioapic_idx);
2992 2992
2993 restore_ioapic_entries(); 2993 restore_ioapic_entries();
2994} 2994}
@@ -3597,18 +3597,18 @@ io_apic_setup_irq_pin(unsigned int irq, int node, struct io_apic_irq_attr *attr)
3597int io_apic_setup_irq_pin_once(unsigned int irq, int node, 3597int io_apic_setup_irq_pin_once(unsigned int irq, int node,
3598 struct io_apic_irq_attr *attr) 3598 struct io_apic_irq_attr *attr)
3599{ 3599{
3600 unsigned int id = attr->ioapic, pin = attr->ioapic_pin; 3600 unsigned int ioapic_idx = attr->ioapic, pin = attr->ioapic_pin;
3601 int ret; 3601 int ret;
3602 3602
3603 /* Avoid redundant programming */ 3603 /* Avoid redundant programming */
3604 if (test_bit(pin, ioapics[id].pin_programmed)) { 3604 if (test_bit(pin, ioapics[ioapic_idx].pin_programmed)) {
3605 pr_debug("Pin %d-%d already programmed\n", 3605 pr_debug("Pin %d-%d already programmed\n",
3606 mpc_ioapic_id(id), pin); 3606 mpc_ioapic_id(ioapic_idx), pin);
3607 return 0; 3607 return 0;
3608 } 3608 }
3609 ret = io_apic_setup_irq_pin(irq, node, attr); 3609 ret = io_apic_setup_irq_pin(irq, node, attr);
3610 if (!ret) 3610 if (!ret)
3611 set_bit(pin, ioapics[id].pin_programmed); 3611 set_bit(pin, ioapics[ioapic_idx].pin_programmed);
3612 return ret; 3612 return ret;
3613} 3613}
3614 3614