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authorOlof Johansson <olof@lixom.net>2012-06-30 18:27:52 -0400
committerOlof Johansson <olof@lixom.net>2012-06-30 18:27:52 -0400
commit5d5474df64d49564f297d9259932452ea64b745d (patch)
tree6aafc16d8a264082a72bb5d150a6ad8ffb097aa0 /arch
parent5ae95aefb73b32ec4e7c46554304042ba82230ca (diff)
parent58c553d4d4637e1955a571350888530cd0073276 (diff)
Merge branch 'v3.5-samsung-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes
* 'v3.5-samsung-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: Fix EXYNOS_DEV_DMA Kconfig entry ARM: SAMSUNG: Fix for S3C2412 EBI memory mapping ARM: SAMSUNG: Should check for IS_ERR(clk) instead of NULL
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-exynos/Kconfig8
-rw-r--r--arch/arm/plat-samsung/include/plat/map-s3c.h2
-rw-r--r--arch/arm/plat-samsung/include/plat/watchdog-reset.h2
3 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 573be57d3d28..6f6d13f91e4c 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -212,7 +212,7 @@ config MACH_SMDKV310
212 select EXYNOS_DEV_SYSMMU 212 select EXYNOS_DEV_SYSMMU
213 select EXYNOS4_DEV_AHCI 213 select EXYNOS4_DEV_AHCI
214 select SAMSUNG_DEV_KEYPAD 214 select SAMSUNG_DEV_KEYPAD
215 select EXYNOS4_DEV_DMA 215 select EXYNOS_DEV_DMA
216 select SAMSUNG_DEV_PWM 216 select SAMSUNG_DEV_PWM
217 select EXYNOS4_DEV_USB_OHCI 217 select EXYNOS4_DEV_USB_OHCI
218 select EXYNOS4_SETUP_FIMD0 218 select EXYNOS4_SETUP_FIMD0
@@ -264,7 +264,7 @@ config MACH_UNIVERSAL_C210
264 select S5P_DEV_ONENAND 264 select S5P_DEV_ONENAND
265 select S5P_DEV_TV 265 select S5P_DEV_TV
266 select EXYNOS_DEV_SYSMMU 266 select EXYNOS_DEV_SYSMMU
267 select EXYNOS4_DEV_DMA 267 select EXYNOS_DEV_DMA
268 select EXYNOS_DEV_DRM 268 select EXYNOS_DEV_DRM
269 select EXYNOS4_SETUP_FIMD0 269 select EXYNOS4_SETUP_FIMD0
270 select EXYNOS4_SETUP_I2C1 270 select EXYNOS4_SETUP_I2C1
@@ -303,7 +303,7 @@ config MACH_NURI
303 select S5P_DEV_MFC 303 select S5P_DEV_MFC
304 select S5P_DEV_USB_EHCI 304 select S5P_DEV_USB_EHCI
305 select S5P_SETUP_MIPIPHY 305 select S5P_SETUP_MIPIPHY
306 select EXYNOS4_DEV_DMA 306 select EXYNOS_DEV_DMA
307 select EXYNOS_DEV_DRM 307 select EXYNOS_DEV_DRM
308 select EXYNOS4_SETUP_FIMC 308 select EXYNOS4_SETUP_FIMC
309 select EXYNOS4_SETUP_FIMD0 309 select EXYNOS4_SETUP_FIMD0
@@ -341,7 +341,7 @@ config MACH_ORIGEN
341 select SAMSUNG_DEV_PWM 341 select SAMSUNG_DEV_PWM
342 select EXYNOS_DEV_DRM 342 select EXYNOS_DEV_DRM
343 select EXYNOS_DEV_SYSMMU 343 select EXYNOS_DEV_SYSMMU
344 select EXYNOS4_DEV_DMA 344 select EXYNOS_DEV_DMA
345 select EXYNOS4_DEV_USB_OHCI 345 select EXYNOS4_DEV_USB_OHCI
346 select EXYNOS4_SETUP_FIMD0 346 select EXYNOS4_SETUP_FIMD0
347 select EXYNOS4_SETUP_SDHCI 347 select EXYNOS4_SETUP_SDHCI
diff --git a/arch/arm/plat-samsung/include/plat/map-s3c.h b/arch/arm/plat-samsung/include/plat/map-s3c.h
index 7d048759b772..c0c70a895ca8 100644
--- a/arch/arm/plat-samsung/include/plat/map-s3c.h
+++ b/arch/arm/plat-samsung/include/plat/map-s3c.h
@@ -22,7 +22,7 @@
22#define S3C24XX_VA_WATCHDOG S3C_VA_WATCHDOG 22#define S3C24XX_VA_WATCHDOG S3C_VA_WATCHDOG
23 23
24#define S3C2412_VA_SSMC S3C_ADDR_CPU(0x00000000) 24#define S3C2412_VA_SSMC S3C_ADDR_CPU(0x00000000)
25#define S3C2412_VA_EBI S3C_ADDR_CPU(0x00010000) 25#define S3C2412_VA_EBI S3C_ADDR_CPU(0x00100000)
26 26
27#define S3C2410_PA_UART (0x50000000) 27#define S3C2410_PA_UART (0x50000000)
28#define S3C24XX_PA_UART S3C2410_PA_UART 28#define S3C24XX_PA_UART S3C2410_PA_UART
diff --git a/arch/arm/plat-samsung/include/plat/watchdog-reset.h b/arch/arm/plat-samsung/include/plat/watchdog-reset.h
index f19aff19205c..bc4db9b04e36 100644
--- a/arch/arm/plat-samsung/include/plat/watchdog-reset.h
+++ b/arch/arm/plat-samsung/include/plat/watchdog-reset.h
@@ -25,7 +25,7 @@ static inline void arch_wdt_reset(void)
25 25
26 __raw_writel(0, S3C2410_WTCON); /* disable watchdog, to be safe */ 26 __raw_writel(0, S3C2410_WTCON); /* disable watchdog, to be safe */
27 27
28 if (s3c2410_wdtclk) 28 if (!IS_ERR(s3c2410_wdtclk))
29 clk_enable(s3c2410_wdtclk); 29 clk_enable(s3c2410_wdtclk);
30 30
31 /* put initial values into count and data */ 31 /* put initial values into count and data */