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authorHeiko Stuebner <heiko@sntech.de>2011-09-26 19:45:09 -0400
committerKukjin Kim <kgene.kim@samsung.com>2011-10-04 06:01:22 -0400
commit4a43c666129f67b5bcc79fa59edb48c39fea75a0 (patch)
treefbcd5239c8de0358cb5f41d4009412f5dc356bdb /arch
parentbd95be618b2c7ee9066d82cb729c7fbbab102c93 (diff)
ARM: S3C2416: Add HSSPI clock sourced from EPLL
This clock is special to the S3C2416/2450 SoCs. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-s3c2416/clock.c28
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c2416/clock.c b/arch/arm/mach-s3c2416/clock.c
index 21a5e81f0ab5..196fb37f4b19 100644
--- a/arch/arm/mach-s3c2416/clock.c
+++ b/arch/arm/mach-s3c2416/clock.c
@@ -38,6 +38,32 @@ static unsigned int armdiv[8] = {
38 [7] = 8, 38 [7] = 8,
39}; 39};
40 40
41static struct clksrc_clk hsspi_eplldiv = {
42 .clk = {
43 .name = "hsspi-eplldiv",
44 .parent = &clk_esysclk.clk,
45 .ctrlbit = (1 << 14),
46 .enable = s3c2443_clkcon_enable_s,
47 },
48 .reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 24 },
49};
50
51static struct clk *hsspi_sources[] = {
52 [0] = &hsspi_eplldiv.clk,
53 [1] = NULL, /* to fix */
54};
55
56static struct clksrc_clk hsspi_mux = {
57 .clk = {
58 .name = "hsspi-if",
59 },
60 .sources = &(struct clksrc_sources) {
61 .sources = hsspi_sources,
62 .nr_sources = ARRAY_SIZE(hsspi_sources),
63 },
64 .reg_src = { .reg = S3C2443_CLKSRC, .size = 1, .shift = 18 },
65};
66
41static struct clksrc_clk hsmmc_div[] = { 67static struct clksrc_clk hsmmc_div[] = {
42 [0] = { 68 [0] = {
43 .clk = { 69 .clk = {
@@ -114,6 +140,8 @@ void __init_or_cpufreq s3c2416_setup_clocks(void)
114 140
115 141
116static struct clksrc_clk *clksrcs[] __initdata = { 142static struct clksrc_clk *clksrcs[] __initdata = {
143 &hsspi_eplldiv,
144 &hsspi_mux,
117 &hsmmc_div[0], 145 &hsmmc_div[0],
118 &hsmmc_div[1], 146 &hsmmc_div[1],
119 &hsmmc_mux[0], 147 &hsmmc_mux[0],