diff options
author | Tony Lindgren <tony@atomide.com> | 2011-06-29 07:45:16 -0400 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2011-06-29 07:45:16 -0400 |
commit | 48cb1258e8b0f8c81cfb699b42326c5b2147b3f8 (patch) | |
tree | 6dc560f24eec8d303534d86b1e20d037df94a68d /arch | |
parent | 332acd9e534e0bc8713d2cb90dd2d4d5f2485401 (diff) | |
parent | ec3cdb5baedf6bb3852c531426c1e95a13671dff (diff) |
Merge branch 'for_3.1/pm-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into devel-cleanup
Conflicts:
arch/arm/mach-omap2/pm-debug.c
arch/arm/mach-omap2/pm.h
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-omap1/Makefile | 4 | ||||
-rw-r--r-- | arch/arm/mach-omap1/pm_bus.c | 8 | ||||
-rw-r--r-- | arch/arm/mach-omap2/board-omap3pandora.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-omap2/pm-debug.c | 346 | ||||
-rw-r--r-- | arch/arm/mach-omap2/pm.h | 10 | ||||
-rw-r--r-- | arch/arm/mach-omap2/pm24xx.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-omap2/pm34xx.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/smartreflex.c | 38 | ||||
-rw-r--r-- | arch/arm/plat-omap/omap_device.c | 19 |
9 files changed, 51 insertions, 385 deletions
diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile index af98117043d2..5b114d1558c8 100644 --- a/arch/arm/mach-omap1/Makefile +++ b/arch/arm/mach-omap1/Makefile | |||
@@ -4,14 +4,14 @@ | |||
4 | 4 | ||
5 | # Common support | 5 | # Common support |
6 | obj-y := io.o id.o sram.o time.o irq.o mux.o flash.o serial.o devices.o dma.o | 6 | obj-y := io.o id.o sram.o time.o irq.o mux.o flash.o serial.o devices.o dma.o |
7 | obj-y += clock.o clock_data.o opp_data.o reset.o | 7 | obj-y += clock.o clock_data.o opp_data.o reset.o pm_bus.o |
8 | 8 | ||
9 | obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o | 9 | obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o |
10 | 10 | ||
11 | obj-$(CONFIG_OMAP_32K_TIMER) += timer32k.o | 11 | obj-$(CONFIG_OMAP_32K_TIMER) += timer32k.o |
12 | 12 | ||
13 | # Power Management | 13 | # Power Management |
14 | obj-$(CONFIG_PM) += pm.o sleep.o pm_bus.o | 14 | obj-$(CONFIG_PM) += pm.o sleep.o |
15 | 15 | ||
16 | # DSP | 16 | # DSP |
17 | obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox_mach.o | 17 | obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox_mach.o |
diff --git a/arch/arm/mach-omap1/pm_bus.c b/arch/arm/mach-omap1/pm_bus.c index fe31d933f0ed..334fb8871bc3 100644 --- a/arch/arm/mach-omap1/pm_bus.c +++ b/arch/arm/mach-omap1/pm_bus.c | |||
@@ -56,9 +56,13 @@ static struct dev_power_domain default_power_domain = { | |||
56 | USE_PLATFORM_PM_SLEEP_OPS | 56 | USE_PLATFORM_PM_SLEEP_OPS |
57 | }, | 57 | }, |
58 | }; | 58 | }; |
59 | #define OMAP1_PWR_DOMAIN (&default_power_domain) | ||
60 | #else | ||
61 | #define OMAP1_PWR_DOMAIN NULL | ||
62 | #endif /* CONFIG_PM_RUNTIME */ | ||
59 | 63 | ||
60 | static struct pm_clk_notifier_block platform_bus_notifier = { | 64 | static struct pm_clk_notifier_block platform_bus_notifier = { |
61 | .pwr_domain = &default_power_domain, | 65 | .pwr_domain = OMAP1_PWR_DOMAIN, |
62 | .con_ids = { "ick", "fck", NULL, }, | 66 | .con_ids = { "ick", "fck", NULL, }, |
63 | }; | 67 | }; |
64 | 68 | ||
@@ -72,4 +76,4 @@ static int __init omap1_pm_runtime_init(void) | |||
72 | return 0; | 76 | return 0; |
73 | } | 77 | } |
74 | core_initcall(omap1_pm_runtime_init); | 78 | core_initcall(omap1_pm_runtime_init); |
75 | #endif /* CONFIG_PM_RUNTIME */ | 79 | |
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c index 47c426e8420a..d4ea9408560e 100644 --- a/arch/arm/mach-omap2/board-omap3pandora.c +++ b/arch/arm/mach-omap2/board-omap3pandora.c | |||
@@ -84,7 +84,8 @@ static struct mtd_partition omap3pandora_nand_partitions[] = { | |||
84 | 84 | ||
85 | static struct omap_nand_platform_data pandora_nand_data = { | 85 | static struct omap_nand_platform_data pandora_nand_data = { |
86 | .cs = 0, | 86 | .cs = 0, |
87 | .devsize = 1, /* '0' for 8-bit, '1' for 16-bit device */ | 87 | .devsize = NAND_BUSWIDTH_16, |
88 | .xfer_type = NAND_OMAP_PREFETCH_DMA, | ||
88 | .parts = omap3pandora_nand_partitions, | 89 | .parts = omap3pandora_nand_partitions, |
89 | .nr_parts = ARRAY_SIZE(omap3pandora_nand_partitions), | 90 | .nr_parts = ARRAY_SIZE(omap3pandora_nand_partitions), |
90 | }; | 91 | }; |
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c index c56d1d47fec4..4411163e012d 100644 --- a/arch/arm/mach-omap2/pm-debug.c +++ b/arch/arm/mach-omap2/pm-debug.c | |||
@@ -31,305 +31,28 @@ | |||
31 | #include <plat/board.h> | 31 | #include <plat/board.h> |
32 | #include "powerdomain.h" | 32 | #include "powerdomain.h" |
33 | #include "clockdomain.h" | 33 | #include "clockdomain.h" |
34 | #include <plat/dmtimer.h> | ||
34 | #include <plat/omap-pm.h> | 35 | #include <plat/omap-pm.h> |
35 | 36 | ||
36 | #include "cm2xxx_3xxx.h" | 37 | #include "cm2xxx_3xxx.h" |
37 | #include "prm2xxx_3xxx.h" | 38 | #include "prm2xxx_3xxx.h" |
38 | #include "pm.h" | 39 | #include "pm.h" |
39 | 40 | ||
40 | int omap2_pm_debug; | ||
41 | u32 enable_off_mode; | 41 | u32 enable_off_mode; |
42 | u32 sleep_while_idle; | ||
43 | |||
44 | #define DUMP_PRM_MOD_REG(mod, reg) \ | ||
45 | regs[reg_count].name = #mod "." #reg; \ | ||
46 | regs[reg_count++].val = omap2_prm_read_mod_reg(mod, reg) | ||
47 | #define DUMP_CM_MOD_REG(mod, reg) \ | ||
48 | regs[reg_count].name = #mod "." #reg; \ | ||
49 | regs[reg_count++].val = omap2_cm_read_mod_reg(mod, reg) | ||
50 | #define DUMP_PRM_REG(reg) \ | ||
51 | regs[reg_count].name = #reg; \ | ||
52 | regs[reg_count++].val = __raw_readl(reg) | ||
53 | #define DUMP_CM_REG(reg) \ | ||
54 | regs[reg_count].name = #reg; \ | ||
55 | regs[reg_count++].val = __raw_readl(reg) | ||
56 | #define DUMP_INTC_REG(reg, off) \ | ||
57 | regs[reg_count].name = #reg; \ | ||
58 | regs[reg_count++].val = \ | ||
59 | __raw_readl(OMAP2_L4_IO_ADDRESS(0x480fe000 + (off))) | ||
60 | |||
61 | void omap2_pm_dump(int mode, int resume, unsigned int us) | ||
62 | { | ||
63 | struct reg { | ||
64 | const char *name; | ||
65 | u32 val; | ||
66 | } regs[32]; | ||
67 | int reg_count = 0, i; | ||
68 | const char *s1 = NULL, *s2 = NULL; | ||
69 | |||
70 | if (!resume) { | ||
71 | #if 0 | ||
72 | /* MPU */ | ||
73 | DUMP_PRM_MOD_REG(OCP_MOD, OMAP2_PRM_IRQENABLE_MPU_OFFSET); | ||
74 | DUMP_CM_MOD_REG(MPU_MOD, OMAP2_CM_CLKSTCTRL); | ||
75 | DUMP_PRM_MOD_REG(MPU_MOD, OMAP2_PM_PWSTCTRL); | ||
76 | DUMP_PRM_MOD_REG(MPU_MOD, OMAP2_PM_PWSTST); | ||
77 | DUMP_PRM_MOD_REG(MPU_MOD, PM_WKDEP); | ||
78 | #endif | ||
79 | #if 0 | ||
80 | /* INTC */ | ||
81 | DUMP_INTC_REG(INTC_MIR0, 0x0084); | ||
82 | DUMP_INTC_REG(INTC_MIR1, 0x00a4); | ||
83 | DUMP_INTC_REG(INTC_MIR2, 0x00c4); | ||
84 | #endif | ||
85 | #if 0 | ||
86 | DUMP_CM_MOD_REG(CORE_MOD, CM_FCLKEN1); | ||
87 | if (cpu_is_omap24xx()) { | ||
88 | DUMP_CM_MOD_REG(CORE_MOD, OMAP24XX_CM_FCLKEN2); | ||
89 | DUMP_PRM_MOD_REG(OMAP24XX_GR_MOD, | ||
90 | OMAP2_PRCM_CLKEMUL_CTRL_OFFSET); | ||
91 | DUMP_PRM_MOD_REG(OMAP24XX_GR_MOD, | ||
92 | OMAP2_PRCM_CLKSRC_CTRL_OFFSET); | ||
93 | } | ||
94 | DUMP_CM_MOD_REG(WKUP_MOD, CM_FCLKEN); | ||
95 | DUMP_CM_MOD_REG(CORE_MOD, CM_ICLKEN1); | ||
96 | DUMP_CM_MOD_REG(CORE_MOD, CM_ICLKEN2); | ||
97 | DUMP_CM_MOD_REG(WKUP_MOD, CM_ICLKEN); | ||
98 | DUMP_CM_MOD_REG(PLL_MOD, CM_CLKEN); | ||
99 | DUMP_CM_MOD_REG(PLL_MOD, CM_AUTOIDLE); | ||
100 | DUMP_PRM_MOD_REG(CORE_MOD, OMAP2_PM_PWSTST); | ||
101 | #endif | ||
102 | #if 0 | ||
103 | /* DSP */ | ||
104 | if (cpu_is_omap24xx()) { | ||
105 | DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_FCLKEN); | ||
106 | DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_ICLKEN); | ||
107 | DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_IDLEST); | ||
108 | DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_AUTOIDLE); | ||
109 | DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_CLKSEL); | ||
110 | DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, OMAP2_CM_CLKSTCTRL); | ||
111 | DUMP_PRM_MOD_REG(OMAP24XX_DSP_MOD, OMAP2_RM_RSTCTRL); | ||
112 | DUMP_PRM_MOD_REG(OMAP24XX_DSP_MOD, OMAP2_RM_RSTST); | ||
113 | DUMP_PRM_MOD_REG(OMAP24XX_DSP_MOD, OMAP2_PM_PWSTCTRL); | ||
114 | DUMP_PRM_MOD_REG(OMAP24XX_DSP_MOD, OMAP2_PM_PWSTST); | ||
115 | } | ||
116 | #endif | ||
117 | } else { | ||
118 | DUMP_PRM_MOD_REG(CORE_MOD, PM_WKST1); | ||
119 | if (cpu_is_omap24xx()) | ||
120 | DUMP_PRM_MOD_REG(CORE_MOD, OMAP24XX_PM_WKST2); | ||
121 | DUMP_PRM_MOD_REG(WKUP_MOD, PM_WKST); | ||
122 | DUMP_PRM_MOD_REG(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET); | ||
123 | #if 1 | ||
124 | DUMP_INTC_REG(INTC_PENDING_IRQ0, 0x0098); | ||
125 | DUMP_INTC_REG(INTC_PENDING_IRQ1, 0x00b8); | ||
126 | DUMP_INTC_REG(INTC_PENDING_IRQ2, 0x00d8); | ||
127 | #endif | ||
128 | } | ||
129 | |||
130 | switch (mode) { | ||
131 | case 0: | ||
132 | s1 = "full"; | ||
133 | s2 = "retention"; | ||
134 | break; | ||
135 | case 1: | ||
136 | s1 = "MPU"; | ||
137 | s2 = "retention"; | ||
138 | break; | ||
139 | case 2: | ||
140 | s1 = "MPU"; | ||
141 | s2 = "idle"; | ||
142 | break; | ||
143 | } | ||
144 | |||
145 | if (!resume) | ||
146 | #ifdef CONFIG_NO_HZ | ||
147 | printk(KERN_INFO | ||
148 | "--- Going to %s %s (next timer after %u ms)\n", s1, s2, | ||
149 | jiffies_to_msecs(get_next_timer_interrupt(jiffies) - | ||
150 | jiffies)); | ||
151 | #else | ||
152 | printk(KERN_INFO "--- Going to %s %s\n", s1, s2); | ||
153 | #endif | ||
154 | else | ||
155 | printk(KERN_INFO "--- Woke up (slept for %u.%03u ms)\n", | ||
156 | us / 1000, us % 1000); | ||
157 | |||
158 | for (i = 0; i < reg_count; i++) | ||
159 | printk(KERN_INFO "%-20s: 0x%08x\n", regs[i].name, regs[i].val); | ||
160 | } | ||
161 | 42 | ||
162 | #ifdef CONFIG_DEBUG_FS | 43 | #ifdef CONFIG_DEBUG_FS |
163 | #include <linux/debugfs.h> | 44 | #include <linux/debugfs.h> |
164 | #include <linux/seq_file.h> | 45 | #include <linux/seq_file.h> |
165 | 46 | ||
166 | static void pm_dbg_regset_store(u32 *ptr); | ||
167 | |||
168 | static struct dentry *pm_dbg_dir; | ||
169 | |||
170 | static int pm_dbg_init_done; | 47 | static int pm_dbg_init_done; |
171 | 48 | ||
172 | static int __init pm_dbg_init(void); | 49 | static int pm_dbg_init(void); |
173 | 50 | ||
174 | enum { | 51 | enum { |
175 | DEBUG_FILE_COUNTERS = 0, | 52 | DEBUG_FILE_COUNTERS = 0, |
176 | DEBUG_FILE_TIMERS, | 53 | DEBUG_FILE_TIMERS, |
177 | }; | 54 | }; |
178 | 55 | ||
179 | struct pm_module_def { | ||
180 | char name[8]; /* Name of the module */ | ||
181 | short type; /* CM or PRM */ | ||
182 | unsigned short offset; | ||
183 | int low; /* First register address on this module */ | ||
184 | int high; /* Last register address on this module */ | ||
185 | }; | ||
186 | |||
187 | #define MOD_CM 0 | ||
188 | #define MOD_PRM 1 | ||
189 | |||
190 | static const struct pm_module_def *pm_dbg_reg_modules; | ||
191 | static const struct pm_module_def omap3_pm_reg_modules[] = { | ||
192 | { "IVA2", MOD_CM, OMAP3430_IVA2_MOD, 0, 0x4c }, | ||
193 | { "OCP", MOD_CM, OCP_MOD, 0, 0x10 }, | ||
194 | { "MPU", MOD_CM, MPU_MOD, 4, 0x4c }, | ||
195 | { "CORE", MOD_CM, CORE_MOD, 0, 0x4c }, | ||
196 | { "SGX", MOD_CM, OMAP3430ES2_SGX_MOD, 0, 0x4c }, | ||
197 | { "WKUP", MOD_CM, WKUP_MOD, 0, 0x40 }, | ||
198 | { "CCR", MOD_CM, PLL_MOD, 0, 0x70 }, | ||
199 | { "DSS", MOD_CM, OMAP3430_DSS_MOD, 0, 0x4c }, | ||
200 | { "CAM", MOD_CM, OMAP3430_CAM_MOD, 0, 0x4c }, | ||
201 | { "PER", MOD_CM, OMAP3430_PER_MOD, 0, 0x4c }, | ||
202 | { "EMU", MOD_CM, OMAP3430_EMU_MOD, 0x40, 0x54 }, | ||
203 | { "NEON", MOD_CM, OMAP3430_NEON_MOD, 0x20, 0x48 }, | ||
204 | { "USB", MOD_CM, OMAP3430ES2_USBHOST_MOD, 0, 0x4c }, | ||
205 | |||
206 | { "IVA2", MOD_PRM, OMAP3430_IVA2_MOD, 0x50, 0xfc }, | ||
207 | { "OCP", MOD_PRM, OCP_MOD, 4, 0x1c }, | ||
208 | { "MPU", MOD_PRM, MPU_MOD, 0x58, 0xe8 }, | ||
209 | { "CORE", MOD_PRM, CORE_MOD, 0x58, 0xf8 }, | ||
210 | { "SGX", MOD_PRM, OMAP3430ES2_SGX_MOD, 0x58, 0xe8 }, | ||
211 | { "WKUP", MOD_PRM, WKUP_MOD, 0xa0, 0xb0 }, | ||
212 | { "CCR", MOD_PRM, PLL_MOD, 0x40, 0x70 }, | ||
213 | { "DSS", MOD_PRM, OMAP3430_DSS_MOD, 0x58, 0xe8 }, | ||
214 | { "CAM", MOD_PRM, OMAP3430_CAM_MOD, 0x58, 0xe8 }, | ||
215 | { "PER", MOD_PRM, OMAP3430_PER_MOD, 0x58, 0xe8 }, | ||
216 | { "EMU", MOD_PRM, OMAP3430_EMU_MOD, 0x58, 0xe4 }, | ||
217 | { "GLBL", MOD_PRM, OMAP3430_GR_MOD, 0x20, 0xe4 }, | ||
218 | { "NEON", MOD_PRM, OMAP3430_NEON_MOD, 0x58, 0xe8 }, | ||
219 | { "USB", MOD_PRM, OMAP3430ES2_USBHOST_MOD, 0x58, 0xe8 }, | ||
220 | { "", 0, 0, 0, 0 }, | ||
221 | }; | ||
222 | |||
223 | #define PM_DBG_MAX_REG_SETS 4 | ||
224 | |||
225 | static void *pm_dbg_reg_set[PM_DBG_MAX_REG_SETS]; | ||
226 | |||
227 | static int pm_dbg_get_regset_size(void) | ||
228 | { | ||
229 | static int regset_size; | ||
230 | |||
231 | if (regset_size == 0) { | ||
232 | int i = 0; | ||
233 | |||
234 | while (pm_dbg_reg_modules[i].name[0] != 0) { | ||
235 | regset_size += pm_dbg_reg_modules[i].high + | ||
236 | 4 - pm_dbg_reg_modules[i].low; | ||
237 | i++; | ||
238 | } | ||
239 | } | ||
240 | return regset_size; | ||
241 | } | ||
242 | |||
243 | static int pm_dbg_show_regs(struct seq_file *s, void *unused) | ||
244 | { | ||
245 | int i, j; | ||
246 | unsigned long val; | ||
247 | int reg_set = (int)s->private; | ||
248 | u32 *ptr; | ||
249 | void *store = NULL; | ||
250 | int regs; | ||
251 | int linefeed; | ||
252 | |||
253 | if (reg_set == 0) { | ||
254 | store = kmalloc(pm_dbg_get_regset_size(), GFP_KERNEL); | ||
255 | ptr = store; | ||
256 | pm_dbg_regset_store(ptr); | ||
257 | } else { | ||
258 | ptr = pm_dbg_reg_set[reg_set - 1]; | ||
259 | } | ||
260 | |||
261 | i = 0; | ||
262 | |||
263 | while (pm_dbg_reg_modules[i].name[0] != 0) { | ||
264 | regs = 0; | ||
265 | linefeed = 0; | ||
266 | if (pm_dbg_reg_modules[i].type == MOD_CM) | ||
267 | seq_printf(s, "MOD: CM_%s (%08x)\n", | ||
268 | pm_dbg_reg_modules[i].name, | ||
269 | (u32)(OMAP3430_CM_BASE + | ||
270 | pm_dbg_reg_modules[i].offset)); | ||
271 | else | ||
272 | seq_printf(s, "MOD: PRM_%s (%08x)\n", | ||
273 | pm_dbg_reg_modules[i].name, | ||
274 | (u32)(OMAP3430_PRM_BASE + | ||
275 | pm_dbg_reg_modules[i].offset)); | ||
276 | |||
277 | for (j = pm_dbg_reg_modules[i].low; | ||
278 | j <= pm_dbg_reg_modules[i].high; j += 4) { | ||
279 | val = *(ptr++); | ||
280 | if (val != 0) { | ||
281 | regs++; | ||
282 | if (linefeed) { | ||
283 | seq_printf(s, "\n"); | ||
284 | linefeed = 0; | ||
285 | } | ||
286 | seq_printf(s, " %02x => %08lx", j, val); | ||
287 | if (regs % 4 == 0) | ||
288 | linefeed = 1; | ||
289 | } | ||
290 | } | ||
291 | seq_printf(s, "\n"); | ||
292 | i++; | ||
293 | } | ||
294 | |||
295 | if (store != NULL) | ||
296 | kfree(store); | ||
297 | |||
298 | return 0; | ||
299 | } | ||
300 | |||
301 | static void pm_dbg_regset_store(u32 *ptr) | ||
302 | { | ||
303 | int i, j; | ||
304 | u32 val; | ||
305 | |||
306 | i = 0; | ||
307 | |||
308 | while (pm_dbg_reg_modules[i].name[0] != 0) { | ||
309 | for (j = pm_dbg_reg_modules[i].low; | ||
310 | j <= pm_dbg_reg_modules[i].high; j += 4) { | ||
311 | if (pm_dbg_reg_modules[i].type == MOD_CM) | ||
312 | val = omap2_cm_read_mod_reg( | ||
313 | pm_dbg_reg_modules[i].offset, j); | ||
314 | else | ||
315 | val = omap2_prm_read_mod_reg( | ||
316 | pm_dbg_reg_modules[i].offset, j); | ||
317 | *(ptr++) = val; | ||
318 | } | ||
319 | i++; | ||
320 | } | ||
321 | } | ||
322 | |||
323 | int pm_dbg_regset_save(int reg_set) | ||
324 | { | ||
325 | if (pm_dbg_reg_set[reg_set-1] == NULL) | ||
326 | return -EINVAL; | ||
327 | |||
328 | pm_dbg_regset_store(pm_dbg_reg_set[reg_set-1]); | ||
329 | |||
330 | return 0; | ||
331 | } | ||
332 | |||
333 | static const char pwrdm_state_names[][PWRDM_MAX_PWRSTS] = { | 56 | static const char pwrdm_state_names[][PWRDM_MAX_PWRSTS] = { |
334 | "OFF", | 57 | "OFF", |
335 | "RET", | 58 | "RET", |
@@ -449,11 +172,6 @@ static int pm_dbg_open(struct inode *inode, struct file *file) | |||
449 | }; | 172 | }; |
450 | } | 173 | } |
451 | 174 | ||
452 | static int pm_dbg_reg_open(struct inode *inode, struct file *file) | ||
453 | { | ||
454 | return single_open(file, pm_dbg_show_regs, inode->i_private); | ||
455 | } | ||
456 | |||
457 | static const struct file_operations debug_fops = { | 175 | static const struct file_operations debug_fops = { |
458 | .open = pm_dbg_open, | 176 | .open = pm_dbg_open, |
459 | .read = seq_read, | 177 | .read = seq_read, |
@@ -461,40 +179,6 @@ static const struct file_operations debug_fops = { | |||
461 | .release = single_release, | 179 | .release = single_release, |
462 | }; | 180 | }; |
463 | 181 | ||
464 | static const struct file_operations debug_reg_fops = { | ||
465 | .open = pm_dbg_reg_open, | ||
466 | .read = seq_read, | ||
467 | .llseek = seq_lseek, | ||
468 | .release = single_release, | ||
469 | }; | ||
470 | |||
471 | int pm_dbg_regset_init(int reg_set) | ||
472 | { | ||
473 | char name[2]; | ||
474 | |||
475 | if (!pm_dbg_init_done) | ||
476 | pm_dbg_init(); | ||
477 | |||
478 | if (reg_set < 1 || reg_set > PM_DBG_MAX_REG_SETS || | ||
479 | pm_dbg_reg_set[reg_set-1] != NULL) | ||
480 | return -EINVAL; | ||
481 | |||
482 | pm_dbg_reg_set[reg_set-1] = | ||
483 | kmalloc(pm_dbg_get_regset_size(), GFP_KERNEL); | ||
484 | |||
485 | if (pm_dbg_reg_set[reg_set-1] == NULL) | ||
486 | return -ENOMEM; | ||
487 | |||
488 | if (pm_dbg_dir != NULL) { | ||
489 | sprintf(name, "%d", reg_set); | ||
490 | |||
491 | (void) debugfs_create_file(name, S_IRUGO, | ||
492 | pm_dbg_dir, (void *)reg_set, &debug_reg_fops); | ||
493 | } | ||
494 | |||
495 | return 0; | ||
496 | } | ||
497 | |||
498 | static int pwrdm_suspend_get(void *data, u64 *val) | 182 | static int pwrdm_suspend_get(void *data, u64 *val) |
499 | { | 183 | { |
500 | int ret = -EINVAL; | 184 | int ret = -EINVAL; |
@@ -574,20 +258,11 @@ DEFINE_SIMPLE_ATTRIBUTE(pm_dbg_option_fops, option_get, option_set, "%llu\n"); | |||
574 | 258 | ||
575 | static int __init pm_dbg_init(void) | 259 | static int __init pm_dbg_init(void) |
576 | { | 260 | { |
577 | int i; | ||
578 | struct dentry *d; | 261 | struct dentry *d; |
579 | char name[2]; | ||
580 | 262 | ||
581 | if (pm_dbg_init_done) | 263 | if (pm_dbg_init_done) |
582 | return 0; | 264 | return 0; |
583 | 265 | ||
584 | if (cpu_is_omap34xx()) | ||
585 | pm_dbg_reg_modules = omap3_pm_reg_modules; | ||
586 | else { | ||
587 | printk(KERN_ERR "%s: only OMAP3 supported\n", __func__); | ||
588 | return -ENODEV; | ||
589 | } | ||
590 | |||
591 | d = debugfs_create_dir("pm_debug", NULL); | 266 | d = debugfs_create_dir("pm_debug", NULL); |
592 | if (IS_ERR(d)) | 267 | if (IS_ERR(d)) |
593 | return PTR_ERR(d); | 268 | return PTR_ERR(d); |
@@ -599,25 +274,8 @@ static int __init pm_dbg_init(void) | |||
599 | 274 | ||
600 | pwrdm_for_each(pwrdms_setup, (void *)d); | 275 | pwrdm_for_each(pwrdms_setup, (void *)d); |
601 | 276 | ||
602 | pm_dbg_dir = debugfs_create_dir("registers", d); | ||
603 | if (IS_ERR(pm_dbg_dir)) | ||
604 | return PTR_ERR(pm_dbg_dir); | ||
605 | |||
606 | (void) debugfs_create_file("current", S_IRUGO, | ||
607 | pm_dbg_dir, (void *)0, &debug_reg_fops); | ||
608 | |||
609 | for (i = 0; i < PM_DBG_MAX_REG_SETS; i++) | ||
610 | if (pm_dbg_reg_set[i] != NULL) { | ||
611 | sprintf(name, "%d", i+1); | ||
612 | (void) debugfs_create_file(name, S_IRUGO, | ||
613 | pm_dbg_dir, (void *)(i+1), &debug_reg_fops); | ||
614 | |||
615 | } | ||
616 | |||
617 | (void) debugfs_create_file("enable_off_mode", S_IRUGO | S_IWUSR, d, | 277 | (void) debugfs_create_file("enable_off_mode", S_IRUGO | S_IWUSR, d, |
618 | &enable_off_mode, &pm_dbg_option_fops); | 278 | &enable_off_mode, &pm_dbg_option_fops); |
619 | (void) debugfs_create_file("sleep_while_idle", S_IRUGO | S_IWUSR, d, | ||
620 | &sleep_while_idle, &pm_dbg_option_fops); | ||
621 | pm_dbg_init_done = 1; | 279 | pm_dbg_init_done = 1; |
622 | 280 | ||
623 | return 0; | 281 | return 0; |
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h index c3a367e3d010..babac19e3ec1 100644 --- a/arch/arm/mach-omap2/pm.h +++ b/arch/arm/mach-omap2/pm.h | |||
@@ -61,25 +61,15 @@ extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm); | |||
61 | extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state); | 61 | extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state); |
62 | 62 | ||
63 | #ifdef CONFIG_PM_DEBUG | 63 | #ifdef CONFIG_PM_DEBUG |
64 | extern void omap2_pm_dump(int mode, int resume, unsigned int us); | ||
65 | extern int omap2_pm_debug; | ||
66 | extern u32 enable_off_mode; | 64 | extern u32 enable_off_mode; |
67 | extern u32 sleep_while_idle; | ||
68 | #else | 65 | #else |
69 | #define omap2_pm_dump(mode, resume, us) do {} while (0); | ||
70 | #define omap2_pm_debug 0 | ||
71 | #define enable_off_mode 0 | 66 | #define enable_off_mode 0 |
72 | #define sleep_while_idle 0 | ||
73 | #endif | 67 | #endif |
74 | 68 | ||
75 | #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) | 69 | #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) |
76 | extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev); | 70 | extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev); |
77 | extern int pm_dbg_regset_save(int reg_set); | ||
78 | extern int pm_dbg_regset_init(int reg_set); | ||
79 | #else | 71 | #else |
80 | #define pm_dbg_update_time(pwrdm, prev) do {} while (0); | 72 | #define pm_dbg_update_time(pwrdm, prev) do {} while (0); |
81 | #define pm_dbg_regset_save(reg_set) do {} while (0); | ||
82 | #define pm_dbg_regset_init(reg_set) do {} while (0); | ||
83 | #endif /* CONFIG_PM_DEBUG */ | 73 | #endif /* CONFIG_PM_DEBUG */ |
84 | 74 | ||
85 | extern void omap24xx_idle_loop_suspend(void); | 75 | extern void omap24xx_idle_loop_suspend(void); |
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c index df3ded6fe194..bf089e743ed9 100644 --- a/arch/arm/mach-omap2/pm24xx.c +++ b/arch/arm/mach-omap2/pm24xx.c | |||
@@ -53,6 +53,8 @@ | |||
53 | #include "powerdomain.h" | 53 | #include "powerdomain.h" |
54 | #include "clockdomain.h" | 54 | #include "clockdomain.h" |
55 | 55 | ||
56 | static int omap2_pm_debug; | ||
57 | |||
56 | #ifdef CONFIG_SUSPEND | 58 | #ifdef CONFIG_SUSPEND |
57 | static suspend_state_t suspend_state = PM_SUSPEND_ON; | 59 | static suspend_state_t suspend_state = PM_SUSPEND_ON; |
58 | static inline bool is_suspending(void) | 60 | static inline bool is_suspending(void) |
@@ -123,7 +125,6 @@ static void omap2_enter_full_retention(void) | |||
123 | omap2_gpio_prepare_for_idle(0); | 125 | omap2_gpio_prepare_for_idle(0); |
124 | 126 | ||
125 | if (omap2_pm_debug) { | 127 | if (omap2_pm_debug) { |
126 | omap2_pm_dump(0, 0, 0); | ||
127 | getnstimeofday(&ts_preidle); | 128 | getnstimeofday(&ts_preidle); |
128 | } | 129 | } |
129 | 130 | ||
@@ -160,7 +161,6 @@ no_sleep: | |||
160 | getnstimeofday(&ts_postidle); | 161 | getnstimeofday(&ts_postidle); |
161 | ts_idle = timespec_sub(ts_postidle, ts_preidle); | 162 | ts_idle = timespec_sub(ts_postidle, ts_preidle); |
162 | tmp = timespec_to_ns(&ts_idle) * NSEC_PER_USEC; | 163 | tmp = timespec_to_ns(&ts_idle) * NSEC_PER_USEC; |
163 | omap2_pm_dump(0, 1, tmp); | ||
164 | } | 164 | } |
165 | omap2_gpio_resume_after_idle(); | 165 | omap2_gpio_resume_after_idle(); |
166 | 166 | ||
@@ -247,7 +247,6 @@ static void omap2_enter_mpu_retention(void) | |||
247 | } | 247 | } |
248 | 248 | ||
249 | if (omap2_pm_debug) { | 249 | if (omap2_pm_debug) { |
250 | omap2_pm_dump(only_idle ? 2 : 1, 0, 0); | ||
251 | getnstimeofday(&ts_preidle); | 250 | getnstimeofday(&ts_preidle); |
252 | } | 251 | } |
253 | 252 | ||
@@ -259,7 +258,6 @@ static void omap2_enter_mpu_retention(void) | |||
259 | getnstimeofday(&ts_postidle); | 258 | getnstimeofday(&ts_postidle); |
260 | ts_idle = timespec_sub(ts_postidle, ts_preidle); | 259 | ts_idle = timespec_sub(ts_postidle, ts_preidle); |
261 | tmp = timespec_to_ns(&ts_idle) * NSEC_PER_USEC; | 260 | tmp = timespec_to_ns(&ts_idle) * NSEC_PER_USEC; |
262 | omap2_pm_dump(only_idle ? 2 : 1, 1, tmp); | ||
263 | } | 261 | } |
264 | } | 262 | } |
265 | 263 | ||
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 4cb636af7045..96a76245284c 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c | |||
@@ -497,8 +497,6 @@ console_still_active: | |||
497 | 497 | ||
498 | int omap3_can_sleep(void) | 498 | int omap3_can_sleep(void) |
499 | { | 499 | { |
500 | if (!sleep_while_idle) | ||
501 | return 0; | ||
502 | if (!omap_uart_can_sleep()) | 500 | if (!omap_uart_can_sleep()) |
503 | return 0; | 501 | return 0; |
504 | return 1; | 502 | return 1; |
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c index fb7dc52394a8..2ce2fb7664bc 100644 --- a/arch/arm/mach-omap2/smartreflex.c +++ b/arch/arm/mach-omap2/smartreflex.c | |||
@@ -143,7 +143,7 @@ static irqreturn_t sr_interrupt(int irq, void *data) | |||
143 | sr_write_reg(sr_info, IRQSTATUS, status); | 143 | sr_write_reg(sr_info, IRQSTATUS, status); |
144 | } | 144 | } |
145 | 145 | ||
146 | if (sr_class->class_type == SR_CLASS2 && sr_class->notify) | 146 | if (sr_class->notify) |
147 | sr_class->notify(sr_info->voltdm, status); | 147 | sr_class->notify(sr_info->voltdm, status); |
148 | 148 | ||
149 | return IRQ_HANDLED; | 149 | return IRQ_HANDLED; |
@@ -258,9 +258,7 @@ static int sr_late_init(struct omap_sr *sr_info) | |||
258 | struct resource *mem; | 258 | struct resource *mem; |
259 | int ret = 0; | 259 | int ret = 0; |
260 | 260 | ||
261 | if (sr_class->class_type == SR_CLASS2 && | 261 | if (sr_class->notify && sr_class->notify_flags && sr_info->irq) { |
262 | sr_class->notify_flags && sr_info->irq) { | ||
263 | |||
264 | name = kasprintf(GFP_KERNEL, "sr_%s", sr_info->voltdm->name); | 262 | name = kasprintf(GFP_KERNEL, "sr_%s", sr_info->voltdm->name); |
265 | if (name == NULL) { | 263 | if (name == NULL) { |
266 | ret = -ENOMEM; | 264 | ret = -ENOMEM; |
@@ -270,6 +268,7 @@ static int sr_late_init(struct omap_sr *sr_info) | |||
270 | 0, name, (void *)sr_info); | 268 | 0, name, (void *)sr_info); |
271 | if (ret) | 269 | if (ret) |
272 | goto error; | 270 | goto error; |
271 | disable_irq(sr_info->irq); | ||
273 | } | 272 | } |
274 | 273 | ||
275 | if (pdata && pdata->enable_on_init) | 274 | if (pdata && pdata->enable_on_init) |
@@ -278,16 +277,16 @@ static int sr_late_init(struct omap_sr *sr_info) | |||
278 | return ret; | 277 | return ret; |
279 | 278 | ||
280 | error: | 279 | error: |
281 | iounmap(sr_info->base); | 280 | iounmap(sr_info->base); |
282 | mem = platform_get_resource(sr_info->pdev, IORESOURCE_MEM, 0); | 281 | mem = platform_get_resource(sr_info->pdev, IORESOURCE_MEM, 0); |
283 | release_mem_region(mem->start, resource_size(mem)); | 282 | release_mem_region(mem->start, resource_size(mem)); |
284 | list_del(&sr_info->node); | 283 | list_del(&sr_info->node); |
285 | dev_err(&sr_info->pdev->dev, "%s: ERROR in registering" | 284 | dev_err(&sr_info->pdev->dev, "%s: ERROR in registering" |
286 | "interrupt handler. Smartreflex will" | 285 | "interrupt handler. Smartreflex will" |
287 | "not function as desired\n", __func__); | 286 | "not function as desired\n", __func__); |
288 | kfree(name); | 287 | kfree(name); |
289 | kfree(sr_info); | 288 | kfree(sr_info); |
290 | return ret; | 289 | return ret; |
291 | } | 290 | } |
292 | 291 | ||
293 | static void sr_v1_disable(struct omap_sr *sr) | 292 | static void sr_v1_disable(struct omap_sr *sr) |
@@ -808,10 +807,13 @@ static int omap_sr_autocomp_store(void *data, u64 val) | |||
808 | return -EINVAL; | 807 | return -EINVAL; |
809 | } | 808 | } |
810 | 809 | ||
811 | if (!val) | 810 | /* control enable/disable only if there is a delta in value */ |
812 | sr_stop_vddautocomp(sr_info); | 811 | if (sr_info->autocomp_active != val) { |
813 | else | 812 | if (!val) |
814 | sr_start_vddautocomp(sr_info); | 813 | sr_stop_vddautocomp(sr_info); |
814 | else | ||
815 | sr_start_vddautocomp(sr_info); | ||
816 | } | ||
815 | 817 | ||
816 | return 0; | 818 | return 0; |
817 | } | 819 | } |
diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c index a37b8eb65b76..49fc0df0c21f 100644 --- a/arch/arm/plat-omap/omap_device.c +++ b/arch/arm/plat-omap/omap_device.c | |||
@@ -84,6 +84,7 @@ | |||
84 | #include <linux/io.h> | 84 | #include <linux/io.h> |
85 | #include <linux/clk.h> | 85 | #include <linux/clk.h> |
86 | #include <linux/clkdev.h> | 86 | #include <linux/clkdev.h> |
87 | #include <linux/pm_runtime.h> | ||
87 | 88 | ||
88 | #include <plat/omap_device.h> | 89 | #include <plat/omap_device.h> |
89 | #include <plat/omap_hwmod.h> | 90 | #include <plat/omap_hwmod.h> |
@@ -539,20 +540,34 @@ int omap_early_device_register(struct omap_device *od) | |||
539 | static int _od_runtime_suspend(struct device *dev) | 540 | static int _od_runtime_suspend(struct device *dev) |
540 | { | 541 | { |
541 | struct platform_device *pdev = to_platform_device(dev); | 542 | struct platform_device *pdev = to_platform_device(dev); |
543 | int ret; | ||
544 | |||
545 | ret = pm_generic_runtime_suspend(dev); | ||
546 | |||
547 | if (!ret) | ||
548 | omap_device_idle(pdev); | ||
549 | |||
550 | return ret; | ||
551 | } | ||
542 | 552 | ||
543 | return omap_device_idle(pdev); | 553 | static int _od_runtime_idle(struct device *dev) |
554 | { | ||
555 | return pm_generic_runtime_idle(dev); | ||
544 | } | 556 | } |
545 | 557 | ||
546 | static int _od_runtime_resume(struct device *dev) | 558 | static int _od_runtime_resume(struct device *dev) |
547 | { | 559 | { |
548 | struct platform_device *pdev = to_platform_device(dev); | 560 | struct platform_device *pdev = to_platform_device(dev); |
549 | 561 | ||
550 | return omap_device_enable(pdev); | 562 | omap_device_enable(pdev); |
563 | |||
564 | return pm_generic_runtime_resume(dev); | ||
551 | } | 565 | } |
552 | 566 | ||
553 | static struct dev_power_domain omap_device_power_domain = { | 567 | static struct dev_power_domain omap_device_power_domain = { |
554 | .ops = { | 568 | .ops = { |
555 | .runtime_suspend = _od_runtime_suspend, | 569 | .runtime_suspend = _od_runtime_suspend, |
570 | .runtime_idle = _od_runtime_idle, | ||
556 | .runtime_resume = _od_runtime_resume, | 571 | .runtime_resume = _od_runtime_resume, |
557 | USE_PLATFORM_PM_SLEEP_OPS | 572 | USE_PLATFORM_PM_SLEEP_OPS |
558 | } | 573 | } |