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authorKamil Debski <k.debski@samsung.com>2011-07-21 03:42:30 -0400
committerKukjin Kim <kgene.kim@samsung.com>2011-07-21 04:29:00 -0400
commit0f75a96bc0c4611dea0c7207533f822315120054 (patch)
tree3a1a174f9dcde361112a38377df61a27fcb9542c /arch
parent35ce909ee6dacb0cb74ad04fd04e869fd5f83a7f (diff)
ARM: S5P: Add support for MFC device
Add support for MFC device to plat-s5p, mach-exynos4, mach-s5pv210: - clock support - memory mapping and reserving - s5p_device_mfc platform device Signed-off-by: Kamil Debski <k.debski@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/Kconfig2
-rw-r--r--arch/arm/mach-exynos4/clock.c61
-rw-r--r--arch/arm/mach-exynos4/include/mach/map.h2
-rw-r--r--arch/arm/mach-s5pv210/clock.c7
-rw-r--r--arch/arm/mach-s5pv210/include/mach/map.h3
-rw-r--r--arch/arm/plat-s5p/Kconfig5
-rw-r--r--arch/arm/plat-s5p/Makefile2
-rw-r--r--arch/arm/plat-s5p/dev-mfc.c123
-rw-r--r--arch/arm/plat-s5p/include/plat/mfc.h27
-rw-r--r--arch/arm/plat-samsung/include/plat/devs.h3
10 files changed, 234 insertions, 1 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 2b5f82f34a7e..b0f9ddbffd5c 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -753,6 +753,7 @@ config ARCH_S5PV210
753 bool "Samsung S5PV210/S5PC110" 753 bool "Samsung S5PV210/S5PC110"
754 select CPU_V7 754 select CPU_V7
755 select ARCH_SPARSEMEM_ENABLE 755 select ARCH_SPARSEMEM_ENABLE
756 select ARCH_HAS_HOLES_MEMORYMODEL
756 select GENERIC_GPIO 757 select GENERIC_GPIO
757 select HAVE_CLK 758 select HAVE_CLK
758 select CLKDEV_LOOKUP 759 select CLKDEV_LOOKUP
@@ -770,6 +771,7 @@ config ARCH_EXYNOS4
770 bool "Samsung EXYNOS4" 771 bool "Samsung EXYNOS4"
771 select CPU_V7 772 select CPU_V7
772 select ARCH_SPARSEMEM_ENABLE 773 select ARCH_SPARSEMEM_ENABLE
774 select ARCH_HAS_HOLES_MEMORYMODEL
773 select GENERIC_GPIO 775 select GENERIC_GPIO
774 select HAVE_CLK 776 select HAVE_CLK
775 select CLKDEV_LOOKUP 777 select CLKDEV_LOOKUP
diff --git a/arch/arm/mach-exynos4/clock.c b/arch/arm/mach-exynos4/clock.c
index 66494f28bbef..851dea018578 100644
--- a/arch/arm/mach-exynos4/clock.c
+++ b/arch/arm/mach-exynos4/clock.c
@@ -528,6 +528,11 @@ static struct clk init_clocks_off[] = {
528 .enable = exynos4_clk_ip_image_ctrl, 528 .enable = exynos4_clk_ip_image_ctrl,
529 .ctrlbit = (1 << 0), 529 .ctrlbit = (1 << 0),
530 }, { 530 }, {
531 .name = "mfc",
532 .devname = "s5p-mfc",
533 .enable = exynos4_clk_ip_mfc_ctrl,
534 .ctrlbit = (1 << 0),
535 }, {
531 .name = "i2c", 536 .name = "i2c",
532 .devname = "s3c2440-i2c.0", 537 .devname = "s3c2440-i2c.0",
533 .parent = &clk_aclk_100.clk, 538 .parent = &clk_aclk_100.clk,
@@ -731,6 +736,52 @@ static struct clksrc_sources clkset_mout_g2d = {
731 .nr_sources = ARRAY_SIZE(clkset_mout_g2d_list), 736 .nr_sources = ARRAY_SIZE(clkset_mout_g2d_list),
732}; 737};
733 738
739static struct clk *clkset_mout_mfc0_list[] = {
740 [0] = &clk_mout_mpll.clk,
741 [1] = &clk_sclk_apll.clk,
742};
743
744static struct clksrc_sources clkset_mout_mfc0 = {
745 .sources = clkset_mout_mfc0_list,
746 .nr_sources = ARRAY_SIZE(clkset_mout_mfc0_list),
747};
748
749static struct clksrc_clk clk_mout_mfc0 = {
750 .clk = {
751 .name = "mout_mfc0",
752 },
753 .sources = &clkset_mout_mfc0,
754 .reg_src = { .reg = S5P_CLKSRC_MFC, .shift = 0, .size = 1 },
755};
756
757static struct clk *clkset_mout_mfc1_list[] = {
758 [0] = &clk_mout_epll.clk,
759 [1] = &clk_sclk_vpll.clk,
760};
761
762static struct clksrc_sources clkset_mout_mfc1 = {
763 .sources = clkset_mout_mfc1_list,
764 .nr_sources = ARRAY_SIZE(clkset_mout_mfc1_list),
765};
766
767static struct clksrc_clk clk_mout_mfc1 = {
768 .clk = {
769 .name = "mout_mfc1",
770 },
771 .sources = &clkset_mout_mfc1,
772 .reg_src = { .reg = S5P_CLKSRC_MFC, .shift = 4, .size = 1 },
773};
774
775static struct clk *clkset_mout_mfc_list[] = {
776 [0] = &clk_mout_mfc0.clk,
777 [1] = &clk_mout_mfc1.clk,
778};
779
780static struct clksrc_sources clkset_mout_mfc = {
781 .sources = clkset_mout_mfc_list,
782 .nr_sources = ARRAY_SIZE(clkset_mout_mfc_list),
783};
784
734static struct clksrc_clk clk_dout_mmc0 = { 785static struct clksrc_clk clk_dout_mmc0 = {
735 .clk = { 786 .clk = {
736 .name = "dout_mmc0", 787 .name = "dout_mmc0",
@@ -974,6 +1025,14 @@ static struct clksrc_clk clksrcs[] = {
974 .reg_div = { .reg = S5P_CLKDIV_IMAGE, .shift = 0, .size = 4 }, 1025 .reg_div = { .reg = S5P_CLKDIV_IMAGE, .shift = 0, .size = 4 },
975 }, { 1026 }, {
976 .clk = { 1027 .clk = {
1028 .name = "sclk_mfc",
1029 .devname = "s5p-mfc",
1030 },
1031 .sources = &clkset_mout_mfc,
1032 .reg_src = { .reg = S5P_CLKSRC_MFC, .shift = 8, .size = 1 },
1033 .reg_div = { .reg = S5P_CLKDIV_MFC, .shift = 0, .size = 4 },
1034 }, {
1035 .clk = {
977 .name = "sclk_mmc", 1036 .name = "sclk_mmc",
978 .devname = "s3c-sdhci.0", 1037 .devname = "s3c-sdhci.0",
979 .parent = &clk_dout_mmc0.clk, 1038 .parent = &clk_dout_mmc0.clk,
@@ -1049,6 +1108,8 @@ static struct clksrc_clk *sysclks[] = {
1049 &clk_dout_mmc2, 1108 &clk_dout_mmc2,
1050 &clk_dout_mmc3, 1109 &clk_dout_mmc3,
1051 &clk_dout_mmc4, 1110 &clk_dout_mmc4,
1111 &clk_mout_mfc0,
1112 &clk_mout_mfc1,
1052}; 1113};
1053 1114
1054static int xtal_rate; 1115static int xtal_rate;
diff --git a/arch/arm/mach-exynos4/include/mach/map.h b/arch/arm/mach-exynos4/include/mach/map.h
index 44b796926f53..d32296dc65e2 100644
--- a/arch/arm/mach-exynos4/include/mach/map.h
+++ b/arch/arm/mach-exynos4/include/mach/map.h
@@ -108,6 +108,7 @@
108 108
109#define EXYNOS4_PA_EHCI 0x12580000 109#define EXYNOS4_PA_EHCI 0x12580000
110#define EXYNOS4_PA_HSPHY 0x125B0000 110#define EXYNOS4_PA_HSPHY 0x125B0000
111#define EXYNOS4_PA_MFC 0x13400000
111 112
112#define EXYNOS4_PA_UART 0x13800000 113#define EXYNOS4_PA_UART 0x13800000
113 114
@@ -155,6 +156,7 @@
155#define S5P_PA_ONENAND_DMA EXYNOS4_PA_ONENAND_DMA 156#define S5P_PA_ONENAND_DMA EXYNOS4_PA_ONENAND_DMA
156#define S5P_PA_SDRAM EXYNOS4_PA_SDRAM 157#define S5P_PA_SDRAM EXYNOS4_PA_SDRAM
157#define S5P_PA_SROMC EXYNOS4_PA_SROMC 158#define S5P_PA_SROMC EXYNOS4_PA_SROMC
159#define S5P_PA_MFC EXYNOS4_PA_MFC
158#define S5P_PA_SYSCON EXYNOS4_PA_SYSCON 160#define S5P_PA_SYSCON EXYNOS4_PA_SYSCON
159#define S5P_PA_TIMER EXYNOS4_PA_TIMER 161#define S5P_PA_TIMER EXYNOS4_PA_TIMER
160#define S5P_PA_EHCI EXYNOS4_PA_EHCI 162#define S5P_PA_EHCI EXYNOS4_PA_EHCI
diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
index b5c95e663c53..1404a4c43770 100644
--- a/arch/arm/mach-s5pv210/clock.c
+++ b/arch/arm/mach-s5pv210/clock.c
@@ -324,6 +324,12 @@ static struct clk init_clocks_off[] = {
324 .enable = s5pv210_clk_ip0_ctrl, 324 .enable = s5pv210_clk_ip0_ctrl,
325 .ctrlbit = (1 << 26), 325 .ctrlbit = (1 << 26),
326 }, { 326 }, {
327 .name = "mfc",
328 .devname = "s5p-mfc",
329 .parent = &clk_pclk_psys.clk,
330 .enable = s5pv210_clk_ip0_ctrl,
331 .ctrlbit = (1 << 16),
332 }, {
327 .name = "otg", 333 .name = "otg",
328 .parent = &clk_hclk_psys.clk, 334 .parent = &clk_hclk_psys.clk,
329 .enable = s5pv210_clk_ip1_ctrl, 335 .enable = s5pv210_clk_ip1_ctrl,
@@ -914,6 +920,7 @@ static struct clksrc_clk clksrcs[] = {
914 }, { 920 }, {
915 .clk = { 921 .clk = {
916 .name = "sclk_mfc", 922 .name = "sclk_mfc",
923 .devname = "s5p-mfc",
917 .enable = s5pv210_clk_ip0_ctrl, 924 .enable = s5pv210_clk_ip0_ctrl,
918 .ctrlbit = (1 << 16), 925 .ctrlbit = (1 << 16),
919 }, 926 },
diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h
index 1dd58836fd4f..aac343c180b2 100644
--- a/arch/arm/mach-s5pv210/include/mach/map.h
+++ b/arch/arm/mach-s5pv210/include/mach/map.h
@@ -59,6 +59,8 @@
59 59
60#define S5PV210_PA_CFCON 0xE8200000 60#define S5PV210_PA_CFCON 0xE8200000
61 61
62#define S5PV210_PA_MFC 0xF1700000
63
62#define S5PV210_PA_HSMMC(x) (0xEB000000 + ((x) * 0x100000)) 64#define S5PV210_PA_HSMMC(x) (0xEB000000 + ((x) * 0x100000))
63 65
64#define S5PV210_PA_HSOTG 0xEC000000 66#define S5PV210_PA_HSOTG 0xEC000000
@@ -107,6 +109,7 @@
107#define S5P_PA_FIMC1 S5PV210_PA_FIMC1 109#define S5P_PA_FIMC1 S5PV210_PA_FIMC1
108#define S5P_PA_FIMC2 S5PV210_PA_FIMC2 110#define S5P_PA_FIMC2 S5PV210_PA_FIMC2
109#define S5P_PA_MIPI_CSIS0 S5PV210_PA_MIPI_CSIS 111#define S5P_PA_MIPI_CSIS0 S5PV210_PA_MIPI_CSIS
112#define S5P_PA_MFC S5PV210_PA_MFC
110#define S5P_PA_ONENAND S5PC110_PA_ONENAND 113#define S5P_PA_ONENAND S5PC110_PA_ONENAND
111#define S5P_PA_ONENAND_DMA S5PC110_PA_ONENAND_DMA 114#define S5P_PA_ONENAND_DMA S5PC110_PA_ONENAND_DMA
112#define S5P_PA_SDRAM S5PV210_PA_SDRAM 115#define S5P_PA_SDRAM S5PV210_PA_SDRAM
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
index 7537ad57c7db..9843c954c042 100644
--- a/arch/arm/plat-s5p/Kconfig
+++ b/arch/arm/plat-s5p/Kconfig
@@ -76,6 +76,11 @@ config S5P_DEV_FIMD0
76 help 76 help
77 Compile in platform device definitions for FIMD controller 0 77 Compile in platform device definitions for FIMD controller 0
78 78
79config S5P_DEV_MFC
80 bool
81 help
82 Compile in platform device definitions for MFC
83
79config S5P_DEV_ONENAND 84config S5P_DEV_ONENAND
80 bool 85 bool
81 help 86 help
diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile
index eec7e24c1a03..4b53e04eeca4 100644
--- a/arch/arm/plat-s5p/Makefile
+++ b/arch/arm/plat-s5p/Makefile
@@ -25,7 +25,7 @@ obj-$(CONFIG_PM) += irq-pm.o
25obj-$(CONFIG_S5P_HRT) += s5p-time.o 25obj-$(CONFIG_S5P_HRT) += s5p-time.o
26 26
27# devices 27# devices
28 28obj-$(CONFIG_S5P_DEV_MFC) += dev-mfc.o
29obj-$(CONFIG_S5P_DEV_FIMC0) += dev-fimc0.o 29obj-$(CONFIG_S5P_DEV_FIMC0) += dev-fimc0.o
30obj-$(CONFIG_S5P_DEV_FIMC1) += dev-fimc1.o 30obj-$(CONFIG_S5P_DEV_FIMC1) += dev-fimc1.o
31obj-$(CONFIG_S5P_DEV_FIMC2) += dev-fimc2.o 31obj-$(CONFIG_S5P_DEV_FIMC2) += dev-fimc2.o
diff --git a/arch/arm/plat-s5p/dev-mfc.c b/arch/arm/plat-s5p/dev-mfc.c
new file mode 100644
index 000000000000..94226a0010f7
--- /dev/null
+++ b/arch/arm/plat-s5p/dev-mfc.c
@@ -0,0 +1,123 @@
1/* linux/arch/arm/plat-s5p/dev-mfc.c
2 *
3 * Copyright (C) 2010-2011 Samsung Electronics Co.Ltd
4 *
5 * Base S5P MFC resource and device definitions
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12
13#include <linux/kernel.h>
14#include <linux/interrupt.h>
15#include <linux/platform_device.h>
16#include <linux/dma-mapping.h>
17#include <linux/memblock.h>
18#include <linux/ioport.h>
19
20#include <mach/map.h>
21#include <plat/devs.h>
22#include <plat/irqs.h>
23#include <plat/mfc.h>
24
25static struct resource s5p_mfc_resource[] = {
26 [0] = {
27 .start = S5P_PA_MFC,
28 .end = S5P_PA_MFC + SZ_64K - 1,
29 .flags = IORESOURCE_MEM,
30 },
31 [1] = {
32 .start = IRQ_MFC,
33 .end = IRQ_MFC,
34 .flags = IORESOURCE_IRQ,
35 }
36};
37
38struct platform_device s5p_device_mfc = {
39 .name = "s5p-mfc",
40 .id = -1,
41 .num_resources = ARRAY_SIZE(s5p_mfc_resource),
42 .resource = s5p_mfc_resource,
43};
44
45/*
46 * MFC hardware has 2 memory interfaces which are modelled as two separate
47 * platform devices to let dma-mapping distinguish between them.
48 *
49 * MFC parent device (s5p_device_mfc) must be registered before memory
50 * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r).
51 */
52
53static u64 s5p_mfc_dma_mask = DMA_BIT_MASK(32);
54
55struct platform_device s5p_device_mfc_l = {
56 .name = "s5p-mfc-l",
57 .id = -1,
58 .dev = {
59 .parent = &s5p_device_mfc.dev,
60 .dma_mask = &s5p_mfc_dma_mask,
61 .coherent_dma_mask = DMA_BIT_MASK(32),
62 },
63};
64
65struct platform_device s5p_device_mfc_r = {
66 .name = "s5p-mfc-r",
67 .id = -1,
68 .dev = {
69 .parent = &s5p_device_mfc.dev,
70 .dma_mask = &s5p_mfc_dma_mask,
71 .coherent_dma_mask = DMA_BIT_MASK(32),
72 },
73};
74
75struct s5p_mfc_reserved_mem {
76 phys_addr_t base;
77 unsigned long size;
78 struct device *dev;
79};
80
81static struct s5p_mfc_reserved_mem s5p_mfc_mem[2] __initdata;
82
83void __init s5p_mfc_reserve_mem(phys_addr_t rbase, unsigned int rsize,
84 phys_addr_t lbase, unsigned int lsize)
85{
86 int i;
87
88 s5p_mfc_mem[0].dev = &s5p_device_mfc_r.dev;
89 s5p_mfc_mem[0].base = rbase;
90 s5p_mfc_mem[0].size = rsize;
91
92 s5p_mfc_mem[1].dev = &s5p_device_mfc_l.dev;
93 s5p_mfc_mem[1].base = lbase;
94 s5p_mfc_mem[1].size = lsize;
95
96 for (i = 0; i < ARRAY_SIZE(s5p_mfc_mem); i++) {
97 struct s5p_mfc_reserved_mem *area = &s5p_mfc_mem[i];
98 if (memblock_remove(area->base, area->size)) {
99 printk(KERN_ERR "Failed to reserve memory for MFC device (%ld bytes at 0x%08lx)\n",
100 area->size, (unsigned long) area->base);
101 area->base = 0;
102 }
103 }
104}
105
106static int __init s5p_mfc_memory_init(void)
107{
108 int i;
109
110 for (i = 0; i < ARRAY_SIZE(s5p_mfc_mem); i++) {
111 struct s5p_mfc_reserved_mem *area = &s5p_mfc_mem[i];
112 if (!area->base)
113 continue;
114
115 if (dma_declare_coherent_memory(area->dev, area->base,
116 area->base, area->size,
117 DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE) == 0)
118 printk(KERN_ERR "Failed to declare coherent memory for MFC device (%ld bytes at 0x%08lx)\n",
119 area->size, (unsigned long) area->base);
120 }
121 return 0;
122}
123device_initcall(s5p_mfc_memory_init);
diff --git a/arch/arm/plat-s5p/include/plat/mfc.h b/arch/arm/plat-s5p/include/plat/mfc.h
new file mode 100644
index 000000000000..6697f8cb2949
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/mfc.h
@@ -0,0 +1,27 @@
1/*
2 * Copyright (C) 2011 Samsung Electronics Co.Ltd
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 */
9
10#ifndef __PLAT_S5P_MFC_H
11#define __PLAT_S5P_MFC_H
12
13/**
14 * s5p_mfc_reserve_mem - function to early reserve memory for MFC driver
15 * @rbase: base address for MFC 'right' memory interface
16 * @rsize: size of the memory reserved for MFC 'right' interface
17 * @lbase: base address for MFC 'left' memory interface
18 * @lsize: size of the memory reserved for MFC 'left' interface
19 *
20 * This function reserves system memory for both MFC device memory
21 * interfaces and registers it to respective struct device entries as
22 * coherent memory.
23 */
24void __init s5p_mfc_reserve_mem(phys_addr_t rbase, unsigned int rsize,
25 phys_addr_t lbase, unsigned int lsize);
26
27#endif /* __PLAT_S5P_MFC_H */
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index 3ceaf86ba458..24ebb1e1de41 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -139,6 +139,9 @@ extern struct platform_device s5p_device_fimc1;
139extern struct platform_device s5p_device_fimc2; 139extern struct platform_device s5p_device_fimc2;
140extern struct platform_device s5p_device_fimc3; 140extern struct platform_device s5p_device_fimc3;
141 141
142extern struct platform_device s5p_device_mfc;
143extern struct platform_device s5p_device_mfc_l;
144extern struct platform_device s5p_device_mfc_r;
142extern struct platform_device s5p_device_mipi_csis0; 145extern struct platform_device s5p_device_mipi_csis0;
143extern struct platform_device s5p_device_mipi_csis1; 146extern struct platform_device s5p_device_mipi_csis1;
144 147