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authorLinus Torvalds <torvalds@linux-foundation.org>2011-08-01 12:10:16 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2011-08-01 12:10:16 -0400
commite10b87d2b5b4574cdf3a5a19b22ca88b91ba7151 (patch)
tree21c0714515e1fb1722b918b5e43ecbd7349e2202 /arch
parent3da3f872aa175f59e20766ed30aaea67fd4fa7d1 (diff)
parent536628d0983f1c6a7ccece28ded635661aa30319 (diff)
Merge branch 'sh-latest' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-3.x
* 'sh-latest' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-3.x: (39 commits) SH: static should be at beginning of declaration sh: move CLKDEV_xxx_ID macro to sh_clk.h sh: clock-shx3: add CLKDEV_ICK_ID for cleanup sh: clock-sh7786: add CLKDEV_ICK_ID for cleanup sh: clock-sh7785: add CLKDEV_ICK_ID for cleanup sh: clock-sh7757: add CLKDEV_ICK_ID for cleanup sh: clock-sh7366: add CLKDEV_ICK_ID for cleanup sh: clock-sh7343: add CLKDEV_ICK_ID for cleanup sh: clock-sh7722: add CLKDEV_ICK_ID for cleanup sh: clock-sh7724: add CLKDEV_ICK_ID for cleanup sh: clock-sh7366: modify I2C clock settings sh: clock-sh7343: modify I2C clock settings sh: clock-sh7723: modify I2C clock settings sh: clock-sh7722: modify I2C clock settings sh: clock-sh7724: modify I2C clock settings serial: sh-sci: Fix up pretty name printing for port IRQs. serial: sh-sci: Kill off per-port enable/disable callbacks. serial: sh-sci: Add missing module description/author bits. serial: sh-sci: Regtype probing doesn't need to be fatal. sh: Tidy up pre-clkdev clk_get() error handling. ...
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-shmobile/clock-sh7367.c3
-rw-r--r--arch/arm/mach-shmobile/clock-sh7372.c4
-rw-r--r--arch/arm/mach-shmobile/clock-sh7377.c3
-rw-r--r--arch/arm/mach-shmobile/clock-sh73a0.c4
-rw-r--r--arch/sh/Makefile1
-rw-r--r--arch/sh/boards/board-apsh4a3a.c2
-rw-r--r--arch/sh/boards/board-apsh4ad0a.c2
-rw-r--r--arch/sh/boards/board-sh7785lcr.c2
-rw-r--r--arch/sh/boards/board-urquell.c2
-rw-r--r--arch/sh/boards/mach-highlander/setup.c2
-rw-r--r--arch/sh/boards/mach-sdk7786/setup.c2
-rw-r--r--arch/sh/include/cpu-sh3/cpu/serial.h10
-rw-r--r--arch/sh/include/cpu-sh4a/cpu/serial.h7
-rw-r--r--arch/sh/kernel/cpu/clock-cpg.c2
-rw-r--r--arch/sh/kernel/cpu/sh3/Makefile18
-rw-r--r--arch/sh/kernel/cpu/sh3/serial-sh770x.c33
-rw-r--r--arch/sh/kernel/cpu/sh3/serial-sh7710.c20
-rw-r--r--arch/sh/kernel/cpu/sh3/serial-sh7720.c37
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7705.c5
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh770x.c9
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7720.c5
-rw-r--r--arch/sh/kernel/cpu/sh4/clock-sh4-202.c2
-rw-r--r--arch/sh/kernel/cpu/sh4/setup-sh7750.c4
-rw-r--r--arch/sh/kernel/cpu/sh4/setup-sh7760.c4
-rw-r--r--arch/sh/kernel/cpu/sh4a/Makefile2
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7343.c33
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7366.c25
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7722.c46
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7723.c4
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7724.c84
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7757.c36
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7763.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7780.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7785.c79
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7786.c115
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-shx3.c67
-rw-r--r--arch/sh/kernel/cpu/sh4a/serial-sh7722.c23
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7366.c1
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7722.c7
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7723.c9
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7724.c9
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7763.c3
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7780.c3
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7785.c8
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7786.c8
45 files changed, 316 insertions, 433 deletions
diff --git a/arch/arm/mach-shmobile/clock-sh7367.c b/arch/arm/mach-shmobile/clock-sh7367.c
index 6b186aefcbd6..5218c34a9cc6 100644
--- a/arch/arm/mach-shmobile/clock-sh7367.c
+++ b/arch/arm/mach-shmobile/clock-sh7367.c
@@ -259,9 +259,6 @@ static struct clk mstp_clks[MSTP_NR] = {
259 [CMMSTP003] = MSTP(&r_clk, CMMSTPCR0, 3, 0), /* KEYSC */ 259 [CMMSTP003] = MSTP(&r_clk, CMMSTPCR0, 3, 0), /* KEYSC */
260}; 260};
261 261
262#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
263#define CLKDEV_DEV_ID(_id, _clk) { .dev_id = _id, .clk = _clk }
264
265static struct clk_lookup lookups[] = { 262static struct clk_lookup lookups[] = {
266 /* main clocks */ 263 /* main clocks */
267 CLKDEV_CON_ID("r_clk", &r_clk), 264 CLKDEV_CON_ID("r_clk", &r_clk),
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index 91f5779abdd3..6b1619a65dba 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -561,10 +561,6 @@ static struct clk mstp_clks[MSTP_NR] = {
561 [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */ 561 [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */
562}; 562};
563 563
564#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
565#define CLKDEV_DEV_ID(_id, _clk) { .dev_id = _id, .clk = _clk }
566#define CLKDEV_ICK_ID(_cid, _did, _clk) { .con_id = _cid, .dev_id = _did, .clk = _clk }
567
568static struct clk_lookup lookups[] = { 564static struct clk_lookup lookups[] = {
569 /* main clocks */ 565 /* main clocks */
570 CLKDEV_CON_ID("dv_clki_div2_clk", &sh7372_dv_clki_div2_clk), 566 CLKDEV_CON_ID("dv_clki_div2_clk", &sh7372_dv_clki_div2_clk),
diff --git a/arch/arm/mach-shmobile/clock-sh7377.c b/arch/arm/mach-shmobile/clock-sh7377.c
index 95942466e63f..8cee7b151ae3 100644
--- a/arch/arm/mach-shmobile/clock-sh7377.c
+++ b/arch/arm/mach-shmobile/clock-sh7377.c
@@ -267,9 +267,6 @@ static struct clk mstp_clks[] = {
267 [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */ 267 [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */
268}; 268};
269 269
270#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
271#define CLKDEV_DEV_ID(_id, _clk) { .dev_id = _id, .clk = _clk }
272
273static struct clk_lookup lookups[] = { 270static struct clk_lookup lookups[] = {
274 /* main clocks */ 271 /* main clocks */
275 CLKDEV_CON_ID("r_clk", &r_clk), 272 CLKDEV_CON_ID("r_clk", &r_clk),
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index bcacb1e8cf85..6db2ccabc2bf 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -306,10 +306,6 @@ static struct clk mstp_clks[MSTP_NR] = {
306 [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */ 306 [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */
307}; 307};
308 308
309#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
310#define CLKDEV_DEV_ID(_id, _clk) { .dev_id = _id, .clk = _clk }
311#define CLKDEV_ICK_ID(_cid, _did, _clk) { .con_id = _cid, .dev_id = _did, .clk = _clk }
312
313static struct clk_lookup lookups[] = { 309static struct clk_lookup lookups[] = {
314 /* main clocks */ 310 /* main clocks */
315 CLKDEV_CON_ID("r_clk", &r_clk), 311 CLKDEV_CON_ID("r_clk", &r_clk),
diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index e3d8170ad00b..99385d0b3f3b 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -173,6 +173,7 @@ core-$(CONFIG_HD6446X_SERIES) += arch/sh/cchips/hd6446x/
173cpuincdir-$(CONFIG_CPU_SH2A) += cpu-sh2a 173cpuincdir-$(CONFIG_CPU_SH2A) += cpu-sh2a
174cpuincdir-$(CONFIG_CPU_SH2) += cpu-sh2 174cpuincdir-$(CONFIG_CPU_SH2) += cpu-sh2
175cpuincdir-$(CONFIG_CPU_SH3) += cpu-sh3 175cpuincdir-$(CONFIG_CPU_SH3) += cpu-sh3
176cpuincdir-$(CONFIG_CPU_SH4A) += cpu-sh4a
176cpuincdir-$(CONFIG_CPU_SH4) += cpu-sh4 177cpuincdir-$(CONFIG_CPU_SH4) += cpu-sh4
177cpuincdir-$(CONFIG_CPU_SH5) += cpu-sh5 178cpuincdir-$(CONFIG_CPU_SH5) += cpu-sh5
178cpuincdir-y += cpu-common # Must be last 179cpuincdir-y += cpu-common # Must be last
diff --git a/arch/sh/boards/board-apsh4a3a.c b/arch/sh/boards/board-apsh4a3a.c
index 8e2a27057bc9..2823619c6006 100644
--- a/arch/sh/boards/board-apsh4a3a.c
+++ b/arch/sh/boards/board-apsh4a3a.c
@@ -116,7 +116,7 @@ static int apsh4a3a_clk_init(void)
116 int ret; 116 int ret;
117 117
118 clk = clk_get(NULL, "extal"); 118 clk = clk_get(NULL, "extal");
119 if (!clk || IS_ERR(clk)) 119 if (IS_ERR(clk))
120 return PTR_ERR(clk); 120 return PTR_ERR(clk);
121 ret = clk_set_rate(clk, 33333000); 121 ret = clk_set_rate(clk, 33333000);
122 clk_put(clk); 122 clk_put(clk);
diff --git a/arch/sh/boards/board-apsh4ad0a.c b/arch/sh/boards/board-apsh4ad0a.c
index e2bd218a054e..b4d6292a9247 100644
--- a/arch/sh/boards/board-apsh4ad0a.c
+++ b/arch/sh/boards/board-apsh4ad0a.c
@@ -94,7 +94,7 @@ static int apsh4ad0a_clk_init(void)
94 int ret; 94 int ret;
95 95
96 clk = clk_get(NULL, "extal"); 96 clk = clk_get(NULL, "extal");
97 if (!clk || IS_ERR(clk)) 97 if (IS_ERR(clk))
98 return PTR_ERR(clk); 98 return PTR_ERR(clk);
99 ret = clk_set_rate(clk, 33333000); 99 ret = clk_set_rate(clk, 33333000);
100 clk_put(clk); 100 clk_put(clk);
diff --git a/arch/sh/boards/board-sh7785lcr.c b/arch/sh/boards/board-sh7785lcr.c
index ee65ff05c558..d879848f3cdd 100644
--- a/arch/sh/boards/board-sh7785lcr.c
+++ b/arch/sh/boards/board-sh7785lcr.c
@@ -299,7 +299,7 @@ static int sh7785lcr_clk_init(void)
299 int ret; 299 int ret;
300 300
301 clk = clk_get(NULL, "extal"); 301 clk = clk_get(NULL, "extal");
302 if (!clk || IS_ERR(clk)) 302 if (IS_ERR(clk))
303 return PTR_ERR(clk); 303 return PTR_ERR(clk);
304 ret = clk_set_rate(clk, 33333333); 304 ret = clk_set_rate(clk, 33333333);
305 clk_put(clk); 305 clk_put(clk);
diff --git a/arch/sh/boards/board-urquell.c b/arch/sh/boards/board-urquell.c
index d81c609decc7..24e3316c5c17 100644
--- a/arch/sh/boards/board-urquell.c
+++ b/arch/sh/boards/board-urquell.c
@@ -190,7 +190,7 @@ static int urquell_clk_init(void)
190 return -EINVAL; 190 return -EINVAL;
191 191
192 clk = clk_get(NULL, "extal"); 192 clk = clk_get(NULL, "extal");
193 if (!clk || IS_ERR(clk)) 193 if (IS_ERR(clk))
194 return PTR_ERR(clk); 194 return PTR_ERR(clk);
195 ret = clk_set_rate(clk, 33333333); 195 ret = clk_set_rate(clk, 33333333);
196 clk_put(clk); 196 clk_put(clk);
diff --git a/arch/sh/boards/mach-highlander/setup.c b/arch/sh/boards/mach-highlander/setup.c
index 87618c91d178..74b8db1b74a9 100644
--- a/arch/sh/boards/mach-highlander/setup.c
+++ b/arch/sh/boards/mach-highlander/setup.c
@@ -335,8 +335,6 @@ static struct clk *r7780rp_clocks[] = {
335 &ivdr_clk, 335 &ivdr_clk,
336}; 336};
337 337
338#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
339
340static struct clk_lookup lookups[] = { 338static struct clk_lookup lookups[] = {
341 /* main clocks */ 339 /* main clocks */
342 CLKDEV_CON_ID("ivdr_clk", &ivdr_clk), 340 CLKDEV_CON_ID("ivdr_clk", &ivdr_clk),
diff --git a/arch/sh/boards/mach-sdk7786/setup.c b/arch/sh/boards/mach-sdk7786/setup.c
index 1521aa75ee3a..486d1ac3694c 100644
--- a/arch/sh/boards/mach-sdk7786/setup.c
+++ b/arch/sh/boards/mach-sdk7786/setup.c
@@ -194,7 +194,7 @@ static int sdk7786_clk_init(void)
194 return -EINVAL; 194 return -EINVAL;
195 195
196 clk = clk_get(NULL, "extal"); 196 clk = clk_get(NULL, "extal");
197 if (!clk || IS_ERR(clk)) 197 if (IS_ERR(clk))
198 return PTR_ERR(clk); 198 return PTR_ERR(clk);
199 ret = clk_set_rate(clk, 33333333); 199 ret = clk_set_rate(clk, 33333333);
200 clk_put(clk); 200 clk_put(clk);
diff --git a/arch/sh/include/cpu-sh3/cpu/serial.h b/arch/sh/include/cpu-sh3/cpu/serial.h
new file mode 100644
index 000000000000..7766329bc103
--- /dev/null
+++ b/arch/sh/include/cpu-sh3/cpu/serial.h
@@ -0,0 +1,10 @@
1#ifndef __CPU_SH3_SERIAL_H
2#define __CPU_SH3_SERIAL_H
3
4#include <linux/serial_sci.h>
5
6extern struct plat_sci_port_ops sh770x_sci_port_ops;
7extern struct plat_sci_port_ops sh7710_sci_port_ops;
8extern struct plat_sci_port_ops sh7720_sci_port_ops;
9
10#endif /* __CPU_SH3_SERIAL_H */
diff --git a/arch/sh/include/cpu-sh4a/cpu/serial.h b/arch/sh/include/cpu-sh4a/cpu/serial.h
new file mode 100644
index 000000000000..ff1bc275d210
--- /dev/null
+++ b/arch/sh/include/cpu-sh4a/cpu/serial.h
@@ -0,0 +1,7 @@
1#ifndef __CPU_SH4A_SERIAL_H
2#define __CPU_SH4A_SERIAL_H
3
4/* arch/sh/kernel/cpu/sh4a/serial-sh7722.c */
5extern struct plat_sci_port_ops sh7722_sci_port_ops;
6
7#endif /* __CPU_SH4A_SERIAL_H */
diff --git a/arch/sh/kernel/cpu/clock-cpg.c b/arch/sh/kernel/cpu/clock-cpg.c
index 8f63a264a842..f59b1f30d44b 100644
--- a/arch/sh/kernel/cpu/clock-cpg.c
+++ b/arch/sh/kernel/cpu/clock-cpg.c
@@ -35,8 +35,6 @@ static struct clk *onchip_clocks[] = {
35 &cpu_clk, 35 &cpu_clk,
36}; 36};
37 37
38#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
39
40static struct clk_lookup lookups[] = { 38static struct clk_lookup lookups[] = {
41 /* main clocks */ 39 /* main clocks */
42 CLKDEV_CON_ID("master_clk", &master_clk), 40 CLKDEV_CON_ID("master_clk", &master_clk),
diff --git a/arch/sh/kernel/cpu/sh3/Makefile b/arch/sh/kernel/cpu/sh3/Makefile
index ecab274141a8..6f13f33a35ff 100644
--- a/arch/sh/kernel/cpu/sh3/Makefile
+++ b/arch/sh/kernel/cpu/sh3/Makefile
@@ -7,15 +7,15 @@ obj-y := ex.o probe.o entry.o setup-sh3.o
7obj-$(CONFIG_HIBERNATION) += swsusp.o 7obj-$(CONFIG_HIBERNATION) += swsusp.o
8 8
9# CPU subtype setup 9# CPU subtype setup
10obj-$(CONFIG_CPU_SUBTYPE_SH7705) += setup-sh7705.o 10obj-$(CONFIG_CPU_SUBTYPE_SH7705) += setup-sh7705.o serial-sh770x.o
11obj-$(CONFIG_CPU_SUBTYPE_SH7706) += setup-sh770x.o 11obj-$(CONFIG_CPU_SUBTYPE_SH7706) += setup-sh770x.o serial-sh770x.o
12obj-$(CONFIG_CPU_SUBTYPE_SH7707) += setup-sh770x.o 12obj-$(CONFIG_CPU_SUBTYPE_SH7707) += setup-sh770x.o serial-sh770x.o
13obj-$(CONFIG_CPU_SUBTYPE_SH7708) += setup-sh770x.o 13obj-$(CONFIG_CPU_SUBTYPE_SH7708) += setup-sh770x.o serial-sh770x.o
14obj-$(CONFIG_CPU_SUBTYPE_SH7709) += setup-sh770x.o 14obj-$(CONFIG_CPU_SUBTYPE_SH7709) += setup-sh770x.o serial-sh770x.o
15obj-$(CONFIG_CPU_SUBTYPE_SH7710) += setup-sh7710.o 15obj-$(CONFIG_CPU_SUBTYPE_SH7710) += setup-sh7710.o serial-sh7710.o
16obj-$(CONFIG_CPU_SUBTYPE_SH7712) += setup-sh7710.o 16obj-$(CONFIG_CPU_SUBTYPE_SH7712) += setup-sh7710.o serial-sh7710.o
17obj-$(CONFIG_CPU_SUBTYPE_SH7720) += setup-sh7720.o 17obj-$(CONFIG_CPU_SUBTYPE_SH7720) += setup-sh7720.o serial-sh7720.o
18obj-$(CONFIG_CPU_SUBTYPE_SH7721) += setup-sh7720.o 18obj-$(CONFIG_CPU_SUBTYPE_SH7721) += setup-sh7720.o serial-sh7720.o
19 19
20# Primary on-chip clocks (common) 20# Primary on-chip clocks (common)
21clock-$(CONFIG_CPU_SH3) := clock-sh3.o 21clock-$(CONFIG_CPU_SH3) := clock-sh3.o
diff --git a/arch/sh/kernel/cpu/sh3/serial-sh770x.c b/arch/sh/kernel/cpu/sh3/serial-sh770x.c
new file mode 100644
index 000000000000..4f7242c676b3
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh3/serial-sh770x.c
@@ -0,0 +1,33 @@
1#include <linux/serial_sci.h>
2#include <linux/serial_core.h>
3#include <linux/io.h>
4#include <cpu/serial.h>
5
6#define SCPCR 0xA4000116
7#define SCPDR 0xA4000136
8
9static void sh770x_sci_init_pins(struct uart_port *port, unsigned int cflag)
10{
11 unsigned short data;
12
13 /* We need to set SCPCR to enable RTS/CTS */
14 data = __raw_readw(SCPCR);
15 /* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/
16 __raw_writew(data & 0x0fcf, SCPCR);
17
18 if (!(cflag & CRTSCTS)) {
19 /* We need to set SCPCR to enable RTS/CTS */
20 data = __raw_readw(SCPCR);
21 /* Clear out SCP7MD1,0, SCP4MD1,0,
22 Set SCP6MD1,0 = {01} (output) */
23 __raw_writew((data & 0x0fcf) | 0x1000, SCPCR);
24
25 data = __raw_readb(SCPDR);
26 /* Set /RTS2 (bit6) = 0 */
27 __raw_writeb(data & 0xbf, SCPDR);
28 }
29}
30
31struct plat_sci_port_ops sh770x_sci_port_ops = {
32 .init_pins = sh770x_sci_init_pins,
33};
diff --git a/arch/sh/kernel/cpu/sh3/serial-sh7710.c b/arch/sh/kernel/cpu/sh3/serial-sh7710.c
new file mode 100644
index 000000000000..42190ef6aebf
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh3/serial-sh7710.c
@@ -0,0 +1,20 @@
1#include <linux/serial_sci.h>
2#include <linux/serial_core.h>
3#include <linux/io.h>
4#include <cpu/serial.h>
5
6#define PACR 0xa4050100
7#define PBCR 0xa4050102
8
9static void sh7710_sci_init_pins(struct uart_port *port, unsigned int cflag)
10{
11 if (port->mapbase == 0xA4400000) {
12 __raw_writew(__raw_readw(PACR) & 0xffc0, PACR);
13 __raw_writew(__raw_readw(PBCR) & 0x0fff, PBCR);
14 } else if (port->mapbase == 0xA4410000)
15 __raw_writew(__raw_readw(PBCR) & 0xf003, PBCR);
16}
17
18struct plat_sci_port_ops sh7710_sci_port_ops = {
19 .init_pins = sh7710_sci_init_pins,
20};
diff --git a/arch/sh/kernel/cpu/sh3/serial-sh7720.c b/arch/sh/kernel/cpu/sh3/serial-sh7720.c
new file mode 100644
index 000000000000..8832c526cdf9
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh3/serial-sh7720.c
@@ -0,0 +1,37 @@
1#include <linux/serial_sci.h>
2#include <linux/serial_core.h>
3#include <linux/io.h>
4#include <cpu/serial.h>
5#include <asm/gpio.h>
6
7static void sh7720_sci_init_pins(struct uart_port *port, unsigned int cflag)
8{
9 unsigned short data;
10
11 if (cflag & CRTSCTS) {
12 /* enable RTS/CTS */
13 if (port->mapbase == 0xa4430000) { /* SCIF0 */
14 /* Clear PTCR bit 9-2; enable all scif pins but sck */
15 data = __raw_readw(PORT_PTCR);
16 __raw_writew((data & 0xfc03), PORT_PTCR);
17 } else if (port->mapbase == 0xa4438000) { /* SCIF1 */
18 /* Clear PVCR bit 9-2 */
19 data = __raw_readw(PORT_PVCR);
20 __raw_writew((data & 0xfc03), PORT_PVCR);
21 }
22 } else {
23 if (port->mapbase == 0xa4430000) { /* SCIF0 */
24 /* Clear PTCR bit 5-2; enable only tx and rx */
25 data = __raw_readw(PORT_PTCR);
26 __raw_writew((data & 0xffc3), PORT_PTCR);
27 } else if (port->mapbase == 0xa4438000) { /* SCIF1 */
28 /* Clear PVCR bit 5-2 */
29 data = __raw_readw(PORT_PVCR);
30 __raw_writew((data & 0xffc3), PORT_PVCR);
31 }
32 }
33}
34
35struct plat_sci_port_ops sh7720_sci_port_ops = {
36 .init_pins = sh7720_sci_init_pins,
37};
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
index cd2e702feb7e..2309618c015d 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7705.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
@@ -15,6 +15,7 @@
15#include <linux/serial_sci.h> 15#include <linux/serial_sci.h>
16#include <linux/sh_timer.h> 16#include <linux/sh_timer.h>
17#include <asm/rtc.h> 17#include <asm/rtc.h>
18#include <cpu/serial.h>
18 19
19enum { 20enum {
20 UNUSED = 0, 21 UNUSED = 0,
@@ -75,6 +76,8 @@ static struct plat_sci_port scif0_platform_data = {
75 .scbrr_algo_id = SCBRR_ALGO_4, 76 .scbrr_algo_id = SCBRR_ALGO_4,
76 .type = PORT_SCIF, 77 .type = PORT_SCIF,
77 .irqs = { 56, 56, 56 }, 78 .irqs = { 56, 56, 56 },
79 .ops = &sh770x_sci_port_ops,
80 .regtype = SCIx_SH7705_SCIF_REGTYPE,
78}; 81};
79 82
80static struct platform_device scif0_device = { 83static struct platform_device scif0_device = {
@@ -92,6 +95,8 @@ static struct plat_sci_port scif1_platform_data = {
92 .scbrr_algo_id = SCBRR_ALGO_4, 95 .scbrr_algo_id = SCBRR_ALGO_4,
93 .type = PORT_SCIF, 96 .type = PORT_SCIF,
94 .irqs = { 52, 52, 52 }, 97 .irqs = { 52, 52, 52 },
98 .ops = &sh770x_sci_port_ops,
99 .regtype = SCIx_SH7705_SCIF_REGTYPE,
95}; 100};
96 101
97static struct platform_device scif1_device = { 102static struct platform_device scif1_device = {
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh770x.c b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
index 4551ad647c2c..3f3d5fe5892d 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh770x.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
@@ -19,6 +19,7 @@
19#include <linux/serial.h> 19#include <linux/serial.h>
20#include <linux/serial_sci.h> 20#include <linux/serial_sci.h>
21#include <linux/sh_timer.h> 21#include <linux/sh_timer.h>
22#include <cpu/serial.h>
22 23
23enum { 24enum {
24 UNUSED = 0, 25 UNUSED = 0,
@@ -108,11 +109,14 @@ static struct platform_device rtc_device = {
108 109
109static struct plat_sci_port scif0_platform_data = { 110static struct plat_sci_port scif0_platform_data = {
110 .mapbase = 0xfffffe80, 111 .mapbase = 0xfffffe80,
112 .port_reg = 0xa4000136,
111 .flags = UPF_BOOT_AUTOCONF, 113 .flags = UPF_BOOT_AUTOCONF,
112 .scscr = SCSCR_TE | SCSCR_RE, 114 .scscr = SCSCR_TE | SCSCR_RE,
113 .scbrr_algo_id = SCBRR_ALGO_2, 115 .scbrr_algo_id = SCBRR_ALGO_2,
114 .type = PORT_SCI, 116 .type = PORT_SCI,
115 .irqs = { 23, 23, 23, 0 }, 117 .irqs = { 23, 23, 23, 0 },
118 .ops = &sh770x_sci_port_ops,
119 .regshift = 1,
116}; 120};
117 121
118static struct platform_device scif0_device = { 122static struct platform_device scif0_device = {
@@ -132,6 +136,8 @@ static struct plat_sci_port scif1_platform_data = {
132 .scbrr_algo_id = SCBRR_ALGO_2, 136 .scbrr_algo_id = SCBRR_ALGO_2,
133 .type = PORT_SCIF, 137 .type = PORT_SCIF,
134 .irqs = { 56, 56, 56, 56 }, 138 .irqs = { 56, 56, 56, 56 },
139 .ops = &sh770x_sci_port_ops,
140 .regtype = SCIx_SH3_SCIF_REGTYPE,
135}; 141};
136 142
137static struct platform_device scif1_device = { 143static struct platform_device scif1_device = {
@@ -146,11 +152,14 @@ static struct platform_device scif1_device = {
146 defined(CONFIG_CPU_SUBTYPE_SH7709) 152 defined(CONFIG_CPU_SUBTYPE_SH7709)
147static struct plat_sci_port scif2_platform_data = { 153static struct plat_sci_port scif2_platform_data = {
148 .mapbase = 0xa4000140, 154 .mapbase = 0xa4000140,
155 .port_reg = SCIx_NOT_SUPPORTED,
149 .flags = UPF_BOOT_AUTOCONF, 156 .flags = UPF_BOOT_AUTOCONF,
150 .scscr = SCSCR_TE | SCSCR_RE, 157 .scscr = SCSCR_TE | SCSCR_RE,
151 .scbrr_algo_id = SCBRR_ALGO_2, 158 .scbrr_algo_id = SCBRR_ALGO_2,
152 .type = PORT_IRDA, 159 .type = PORT_IRDA,
153 .irqs = { 52, 52, 52, 52 }, 160 .irqs = { 52, 52, 52, 52 },
161 .ops = &sh770x_sci_port_ops,
162 .regshift = 1,
154}; 163};
155 164
156static struct platform_device scif2_device = { 165static struct platform_device scif2_device = {
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7720.c b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
index 365b94a6fcb7..94920345c14d 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7720.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
@@ -20,6 +20,7 @@
20#include <linux/serial_sci.h> 20#include <linux/serial_sci.h>
21#include <linux/sh_timer.h> 21#include <linux/sh_timer.h>
22#include <asm/rtc.h> 22#include <asm/rtc.h>
23#include <cpu/serial.h>
23 24
24static struct resource rtc_resources[] = { 25static struct resource rtc_resources[] = {
25 [0] = { 26 [0] = {
@@ -55,6 +56,8 @@ static struct plat_sci_port scif0_platform_data = {
55 .scbrr_algo_id = SCBRR_ALGO_4, 56 .scbrr_algo_id = SCBRR_ALGO_4,
56 .type = PORT_SCIF, 57 .type = PORT_SCIF,
57 .irqs = { 80, 80, 80, 80 }, 58 .irqs = { 80, 80, 80, 80 },
59 .ops = &sh7720_sci_port_ops,
60 .regtype = SCIx_SH7705_SCIF_REGTYPE,
58}; 61};
59 62
60static struct platform_device scif0_device = { 63static struct platform_device scif0_device = {
@@ -72,6 +75,8 @@ static struct plat_sci_port scif1_platform_data = {
72 .scbrr_algo_id = SCBRR_ALGO_4, 75 .scbrr_algo_id = SCBRR_ALGO_4,
73 .type = PORT_SCIF, 76 .type = PORT_SCIF,
74 .irqs = { 81, 81, 81, 81 }, 77 .irqs = { 81, 81, 81, 81 },
78 .ops = &sh7720_sci_port_ops,
79 .regtype = SCIx_SH7705_SCIF_REGTYPE,
75}; 80};
76 81
77static struct platform_device scif1_device = { 82static struct platform_device scif1_device = {
diff --git a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
index 3f6f8e98635c..f4e262adb39e 100644
--- a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
+++ b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
@@ -147,8 +147,6 @@ static struct clk *sh4202_onchip_clocks[] = {
147 &sh4202_shoc_clk, 147 &sh4202_shoc_clk,
148}; 148};
149 149
150#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
151
152static struct clk_lookup lookups[] = { 150static struct clk_lookup lookups[] = {
153 /* main clocks */ 151 /* main clocks */
154 CLKDEV_CON_ID("emi_clk", &sh4202_emi_clk), 152 CLKDEV_CON_ID("emi_clk", &sh4202_emi_clk),
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
index e53b4b38bd11..98cc0c794c76 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * SH7750/SH7751 Setup 2 * SH7091/SH7750/SH7750S/SH7750R/SH7751/SH7751R Setup
3 * 3 *
4 * Copyright (C) 2006 Paul Mundt 4 * Copyright (C) 2006 Paul Mundt
5 * Copyright (C) 2006 Jamie Lenehan 5 * Copyright (C) 2006 Jamie Lenehan
@@ -38,11 +38,13 @@ static struct platform_device rtc_device = {
38 38
39static struct plat_sci_port sci_platform_data = { 39static struct plat_sci_port sci_platform_data = {
40 .mapbase = 0xffe00000, 40 .mapbase = 0xffe00000,
41 .port_reg = 0xffe0001C,
41 .flags = UPF_BOOT_AUTOCONF, 42 .flags = UPF_BOOT_AUTOCONF,
42 .scscr = SCSCR_TE | SCSCR_RE, 43 .scscr = SCSCR_TE | SCSCR_RE,
43 .scbrr_algo_id = SCBRR_ALGO_2, 44 .scbrr_algo_id = SCBRR_ALGO_2,
44 .type = PORT_SCI, 45 .type = PORT_SCI,
45 .irqs = { 23, 23, 23, 0 }, 46 .irqs = { 23, 23, 23, 0 },
47 .regshift = 2,
46}; 48};
47 49
48static struct platform_device sci_device = { 50static struct platform_device sci_device = {
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7760.c b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
index 78bbf232e391..c0b4c774700e 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7760.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
@@ -133,6 +133,7 @@ static struct plat_sci_port scif0_platform_data = {
133 .scbrr_algo_id = SCBRR_ALGO_2, 133 .scbrr_algo_id = SCBRR_ALGO_2,
134 .type = PORT_SCIF, 134 .type = PORT_SCIF,
135 .irqs = { 52, 53, 55, 54 }, 135 .irqs = { 52, 53, 55, 54 },
136 .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
136}; 137};
137 138
138static struct platform_device scif0_device = { 139static struct platform_device scif0_device = {
@@ -150,6 +151,7 @@ static struct plat_sci_port scif1_platform_data = {
150 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 151 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
151 .scbrr_algo_id = SCBRR_ALGO_2, 152 .scbrr_algo_id = SCBRR_ALGO_2,
152 .irqs = { 72, 73, 75, 74 }, 153 .irqs = { 72, 73, 75, 74 },
154 .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
153}; 155};
154 156
155static struct platform_device scif1_device = { 157static struct platform_device scif1_device = {
@@ -167,6 +169,7 @@ static struct plat_sci_port scif2_platform_data = {
167 .scbrr_algo_id = SCBRR_ALGO_2, 169 .scbrr_algo_id = SCBRR_ALGO_2,
168 .type = PORT_SCIF, 170 .type = PORT_SCIF,
169 .irqs = { 76, 77, 79, 78 }, 171 .irqs = { 76, 77, 79, 78 },
172 .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
170}; 173};
171 174
172static struct platform_device scif2_device = { 175static struct platform_device scif2_device = {
@@ -184,6 +187,7 @@ static struct plat_sci_port scif3_platform_data = {
184 .scbrr_algo_id = SCBRR_ALGO_2, 187 .scbrr_algo_id = SCBRR_ALGO_2,
185 .type = PORT_SCI, 188 .type = PORT_SCI,
186 .irqs = { 80, 81, 82, 0 }, 189 .irqs = { 80, 81, 82, 0 },
190 .regshift = 2,
187}; 191};
188 192
189static struct platform_device scif3_device = { 193static struct platform_device scif3_device = {
diff --git a/arch/sh/kernel/cpu/sh4a/Makefile b/arch/sh/kernel/cpu/sh4a/Makefile
index cc122b1d3035..c57fb287011e 100644
--- a/arch/sh/kernel/cpu/sh4a/Makefile
+++ b/arch/sh/kernel/cpu/sh4a/Makefile
@@ -10,7 +10,7 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7780) += setup-sh7780.o
10obj-$(CONFIG_CPU_SUBTYPE_SH7785) += setup-sh7785.o 10obj-$(CONFIG_CPU_SUBTYPE_SH7785) += setup-sh7785.o
11obj-$(CONFIG_CPU_SUBTYPE_SH7786) += setup-sh7786.o intc-shx3.o 11obj-$(CONFIG_CPU_SUBTYPE_SH7786) += setup-sh7786.o intc-shx3.o
12obj-$(CONFIG_CPU_SUBTYPE_SH7343) += setup-sh7343.o 12obj-$(CONFIG_CPU_SUBTYPE_SH7343) += setup-sh7343.o
13obj-$(CONFIG_CPU_SUBTYPE_SH7722) += setup-sh7722.o 13obj-$(CONFIG_CPU_SUBTYPE_SH7722) += setup-sh7722.o serial-sh7722.o
14obj-$(CONFIG_CPU_SUBTYPE_SH7723) += setup-sh7723.o 14obj-$(CONFIG_CPU_SUBTYPE_SH7723) += setup-sh7723.o
15obj-$(CONFIG_CPU_SUBTYPE_SH7724) += setup-sh7724.o 15obj-$(CONFIG_CPU_SUBTYPE_SH7724) += setup-sh7724.o
16obj-$(CONFIG_CPU_SUBTYPE_SH7366) += setup-sh7366.o 16obj-$(CONFIG_CPU_SUBTYPE_SH7366) += setup-sh7366.o
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7343.c b/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
index 93c646072c1b..70e45bdaadc7 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
@@ -194,8 +194,6 @@ static struct clk mstp_clks[MSTP_NR] = {
194 [MSTP200] = MSTP(&div4_clks[DIV4_B], MSTPCR2, 0, 0), 194 [MSTP200] = MSTP(&div4_clks[DIV4_B], MSTPCR2, 0, 0),
195}; 195};
196 196
197#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
198
199static struct clk_lookup lookups[] = { 197static struct clk_lookup lookups[] = {
200 /* main clocks */ 198 /* main clocks */
201 CLKDEV_CON_ID("rclk", &r_clk), 199 CLKDEV_CON_ID("rclk", &r_clk),
@@ -233,32 +231,17 @@ static struct clk_lookup lookups[] = {
233 CLKDEV_CON_ID("rwdt0", &mstp_clks[MSTP013]), 231 CLKDEV_CON_ID("rwdt0", &mstp_clks[MSTP013]),
234 CLKDEV_CON_ID("mfi0", &mstp_clks[MSTP011]), 232 CLKDEV_CON_ID("mfi0", &mstp_clks[MSTP011]),
235 CLKDEV_CON_ID("flctl0", &mstp_clks[MSTP010]), 233 CLKDEV_CON_ID("flctl0", &mstp_clks[MSTP010]),
236 { 234
237 /* SCIF0 */ 235 CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[MSTP007]),
238 .dev_id = "sh-sci.0", 236 CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[MSTP006]),
239 .con_id = "sci_fck", 237 CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[MSTP005]),
240 .clk = &mstp_clks[MSTP007], 238 CLKDEV_ICK_ID("sci_fck", "sh-sci.3", &mstp_clks[MSTP004]),
241 }, { 239
242 /* SCIF1 */
243 .dev_id = "sh-sci.1",
244 .con_id = "sci_fck",
245 .clk = &mstp_clks[MSTP006],
246 }, {
247 /* SCIF2 */
248 .dev_id = "sh-sci.2",
249 .con_id = "sci_fck",
250 .clk = &mstp_clks[MSTP005],
251 }, {
252 /* SCIF3 */
253 .dev_id = "sh-sci.3",
254 .con_id = "sci_fck",
255 .clk = &mstp_clks[MSTP004],
256 },
257 CLKDEV_CON_ID("sio0", &mstp_clks[MSTP003]), 240 CLKDEV_CON_ID("sio0", &mstp_clks[MSTP003]),
258 CLKDEV_CON_ID("siof0", &mstp_clks[MSTP002]), 241 CLKDEV_CON_ID("siof0", &mstp_clks[MSTP002]),
259 CLKDEV_CON_ID("siof1", &mstp_clks[MSTP001]), 242 CLKDEV_CON_ID("siof1", &mstp_clks[MSTP001]),
260 CLKDEV_CON_ID("i2c0", &mstp_clks[MSTP109]), 243 CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP109]),
261 CLKDEV_CON_ID("i2c1", &mstp_clks[MSTP108]), 244 CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP108]),
262 CLKDEV_CON_ID("tpu0", &mstp_clks[MSTP225]), 245 CLKDEV_CON_ID("tpu0", &mstp_clks[MSTP225]),
263 CLKDEV_CON_ID("irda0", &mstp_clks[MSTP224]), 246 CLKDEV_CON_ID("irda0", &mstp_clks[MSTP224]),
264 CLKDEV_CON_ID("sdhi0", &mstp_clks[MSTP218]), 247 CLKDEV_CON_ID("sdhi0", &mstp_clks[MSTP218]),
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7366.c b/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
index 049dc0628ccc..3c3165000c52 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
@@ -192,8 +192,6 @@ static struct clk mstp_clks[MSTP_NR] = {
192 [MSTP200] = MSTP(&div4_clks[DIV4_B], MSTPCR2, 0, 0), 192 [MSTP200] = MSTP(&div4_clks[DIV4_B], MSTPCR2, 0, 0),
193}; 193};
194 194
195#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
196
197static struct clk_lookup lookups[] = { 195static struct clk_lookup lookups[] = {
198 /* main clocks */ 196 /* main clocks */
199 CLKDEV_CON_ID("rclk", &r_clk), 197 CLKDEV_CON_ID("rclk", &r_clk),
@@ -231,25 +229,14 @@ static struct clk_lookup lookups[] = {
231 CLKDEV_CON_ID("rwdt0", &mstp_clks[MSTP013]), 229 CLKDEV_CON_ID("rwdt0", &mstp_clks[MSTP013]),
232 CLKDEV_CON_ID("mfi0", &mstp_clks[MSTP011]), 230 CLKDEV_CON_ID("mfi0", &mstp_clks[MSTP011]),
233 CLKDEV_CON_ID("flctl0", &mstp_clks[MSTP010]), 231 CLKDEV_CON_ID("flctl0", &mstp_clks[MSTP010]),
234 { 232
235 /* SCIF0 */ 233 CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[MSTP007]),
236 .dev_id = "sh-sci.0", 234 CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[MSTP006]),
237 .con_id = "sci_fck", 235 CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[MSTP005]),
238 .clk = &mstp_clks[MSTP007], 236
239 }, {
240 /* SCIF1 */
241 .dev_id = "sh-sci.1",
242 .con_id = "sci_fck",
243 .clk = &mstp_clks[MSTP006],
244 }, {
245 /* SCIF2 */
246 .dev_id = "sh-sci.2",
247 .con_id = "sci_fck",
248 .clk = &mstp_clks[MSTP005],
249 },
250 CLKDEV_CON_ID("msiof0", &mstp_clks[MSTP002]), 237 CLKDEV_CON_ID("msiof0", &mstp_clks[MSTP002]),
251 CLKDEV_CON_ID("sbr0", &mstp_clks[MSTP001]), 238 CLKDEV_CON_ID("sbr0", &mstp_clks[MSTP001]),
252 CLKDEV_CON_ID("i2c0", &mstp_clks[MSTP109]), 239 CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP109]),
253 CLKDEV_CON_ID("icb0", &mstp_clks[MSTP227]), 240 CLKDEV_CON_ID("icb0", &mstp_clks[MSTP227]),
254 CLKDEV_CON_ID("meram0", &mstp_clks[MSTP226]), 241 CLKDEV_CON_ID("meram0", &mstp_clks[MSTP226]),
255 CLKDEV_CON_ID("dacy1", &mstp_clks[MSTP224]), 242 CLKDEV_CON_ID("dacy1", &mstp_clks[MSTP224]),
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
index 9d23a36f0647..c9a48088ad47 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
@@ -175,8 +175,6 @@ static struct clk mstp_clks[HWBLK_NR] = {
175 SH_HWBLK_CLK(HWBLK_LCDC, &div4_clks[DIV4_P], 0), 175 SH_HWBLK_CLK(HWBLK_LCDC, &div4_clks[DIV4_P], 0),
176}; 176};
177 177
178#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
179
180static struct clk_lookup lookups[] = { 178static struct clk_lookup lookups[] = {
181 /* main clocks */ 179 /* main clocks */
182 CLKDEV_CON_ID("rclk", &r_clk), 180 CLKDEV_CON_ID("rclk", &r_clk),
@@ -201,42 +199,20 @@ static struct clk_lookup lookups[] = {
201 /* MSTP clocks */ 199 /* MSTP clocks */
202 CLKDEV_CON_ID("uram0", &mstp_clks[HWBLK_URAM]), 200 CLKDEV_CON_ID("uram0", &mstp_clks[HWBLK_URAM]),
203 CLKDEV_CON_ID("xymem0", &mstp_clks[HWBLK_XYMEM]), 201 CLKDEV_CON_ID("xymem0", &mstp_clks[HWBLK_XYMEM]),
204 { 202
205 /* TMU0 */ 203 CLKDEV_ICK_ID("tmu_fck", "sh_tmu.0", &mstp_clks[HWBLK_TMU]),
206 .dev_id = "sh_tmu.0", 204 CLKDEV_ICK_ID("tmu_fck", "sh_tmu.1", &mstp_clks[HWBLK_TMU]),
207 .con_id = "tmu_fck", 205 CLKDEV_ICK_ID("tmu_fck", "sh_tmu.2", &mstp_clks[HWBLK_TMU]),
208 .clk = &mstp_clks[HWBLK_TMU], 206
209 }, {
210 /* TMU1 */
211 .dev_id = "sh_tmu.1",
212 .con_id = "tmu_fck",
213 .clk = &mstp_clks[HWBLK_TMU],
214 }, {
215 /* TMU2 */
216 .dev_id = "sh_tmu.2",
217 .con_id = "tmu_fck",
218 .clk = &mstp_clks[HWBLK_TMU],
219 },
220 CLKDEV_CON_ID("cmt_fck", &mstp_clks[HWBLK_CMT]), 207 CLKDEV_CON_ID("cmt_fck", &mstp_clks[HWBLK_CMT]),
221 CLKDEV_CON_ID("rwdt0", &mstp_clks[HWBLK_RWDT]), 208 CLKDEV_CON_ID("rwdt0", &mstp_clks[HWBLK_RWDT]),
222 CLKDEV_CON_ID("flctl0", &mstp_clks[HWBLK_FLCTL]), 209 CLKDEV_CON_ID("flctl0", &mstp_clks[HWBLK_FLCTL]),
223 { 210
224 /* SCIF0 */ 211 CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[HWBLK_SCIF0]),
225 .dev_id = "sh-sci.0", 212 CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[HWBLK_SCIF1]),
226 .con_id = "sci_fck", 213 CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[HWBLK_SCIF2]),
227 .clk = &mstp_clks[HWBLK_SCIF0], 214
228 }, { 215 CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[HWBLK_IIC]),
229 /* SCIF1 */
230 .dev_id = "sh-sci.1",
231 .con_id = "sci_fck",
232 .clk = &mstp_clks[HWBLK_SCIF1],
233 }, {
234 /* SCIF2 */
235 .dev_id = "sh-sci.2",
236 .con_id = "sci_fck",
237 .clk = &mstp_clks[HWBLK_SCIF2],
238 },
239 CLKDEV_CON_ID("i2c0", &mstp_clks[HWBLK_IIC]),
240 CLKDEV_CON_ID("rtc0", &mstp_clks[HWBLK_RTC]), 216 CLKDEV_CON_ID("rtc0", &mstp_clks[HWBLK_RTC]),
241 CLKDEV_CON_ID("sdhi0", &mstp_clks[HWBLK_SDHI]), 217 CLKDEV_CON_ID("sdhi0", &mstp_clks[HWBLK_SDHI]),
242 CLKDEV_CON_ID("keysc0", &mstp_clks[HWBLK_KEYSC]), 218 CLKDEV_CON_ID("keysc0", &mstp_clks[HWBLK_KEYSC]),
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
index 55493cd5bd8f..3cc3827380e3 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
@@ -200,8 +200,6 @@ static struct clk mstp_clks[] = {
200 SH_HWBLK_CLK(HWBLK_LCDC, &div4_clks[DIV4_B], 0), 200 SH_HWBLK_CLK(HWBLK_LCDC, &div4_clks[DIV4_B], 0),
201}; 201};
202 202
203#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
204
205static struct clk_lookup lookups[] = { 203static struct clk_lookup lookups[] = {
206 /* main clocks */ 204 /* main clocks */
207 CLKDEV_CON_ID("rclk", &r_clk), 205 CLKDEV_CON_ID("rclk", &r_clk),
@@ -305,7 +303,7 @@ static struct clk_lookup lookups[] = {
305 CLKDEV_CON_ID("msiof0", &mstp_clks[HWBLK_MSIOF0]), 303 CLKDEV_CON_ID("msiof0", &mstp_clks[HWBLK_MSIOF0]),
306 CLKDEV_CON_ID("msiof1", &mstp_clks[HWBLK_MSIOF1]), 304 CLKDEV_CON_ID("msiof1", &mstp_clks[HWBLK_MSIOF1]),
307 CLKDEV_CON_ID("meram0", &mstp_clks[HWBLK_MERAM]), 305 CLKDEV_CON_ID("meram0", &mstp_clks[HWBLK_MERAM]),
308 CLKDEV_CON_ID("i2c0", &mstp_clks[HWBLK_IIC]), 306 CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[HWBLK_IIC]),
309 CLKDEV_CON_ID("rtc0", &mstp_clks[HWBLK_RTC]), 307 CLKDEV_CON_ID("rtc0", &mstp_clks[HWBLK_RTC]),
310 CLKDEV_CON_ID("atapi0", &mstp_clks[HWBLK_ATAPI]), 308 CLKDEV_CON_ID("atapi0", &mstp_clks[HWBLK_ATAPI]),
311 CLKDEV_CON_ID("adc0", &mstp_clks[HWBLK_ADC]), 309 CLKDEV_CON_ID("adc0", &mstp_clks[HWBLK_ADC]),
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
index d08fa953c88b..8668f557e0ac 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
@@ -252,8 +252,6 @@ static struct clk mstp_clks[HWBLK_NR] = {
252 SH_HWBLK_CLK(HWBLK_LCDC, &div4_clks[DIV4_B], 0), 252 SH_HWBLK_CLK(HWBLK_LCDC, &div4_clks[DIV4_B], 0),
253}; 253};
254 254
255#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
256
257static struct clk_lookup lookups[] = { 255static struct clk_lookup lookups[] = {
258 /* main clocks */ 256 /* main clocks */
259 CLKDEV_CON_ID("rclk", &r_clk), 257 CLKDEV_CON_ID("rclk", &r_clk),
@@ -289,77 +287,31 @@ static struct clk_lookup lookups[] = {
289 CLKDEV_CON_ID("sh0", &mstp_clks[HWBLK_SHYWAY]), 287 CLKDEV_CON_ID("sh0", &mstp_clks[HWBLK_SHYWAY]),
290 CLKDEV_CON_ID("hudi0", &mstp_clks[HWBLK_HUDI]), 288 CLKDEV_CON_ID("hudi0", &mstp_clks[HWBLK_HUDI]),
291 CLKDEV_CON_ID("ubc0", &mstp_clks[HWBLK_UBC]), 289 CLKDEV_CON_ID("ubc0", &mstp_clks[HWBLK_UBC]),
292 { 290
293 /* TMU0 */ 291 CLKDEV_ICK_ID("tmu_fck", "sh_tmu.0", &mstp_clks[HWBLK_TMU0]),
294 .dev_id = "sh_tmu.0", 292 CLKDEV_ICK_ID("tmu_fck", "sh_tmu.1", &mstp_clks[HWBLK_TMU0]),
295 .con_id = "tmu_fck", 293 CLKDEV_ICK_ID("tmu_fck", "sh_tmu.2", &mstp_clks[HWBLK_TMU0]),
296 .clk = &mstp_clks[HWBLK_TMU0], 294 CLKDEV_ICK_ID("tmu_fck", "sh_tmu.3", &mstp_clks[HWBLK_TMU1]),
297 }, { 295
298 /* TMU1 */
299 .dev_id = "sh_tmu.1",
300 .con_id = "tmu_fck",
301 .clk = &mstp_clks[HWBLK_TMU0],
302 }, {
303 /* TMU2 */
304 .dev_id = "sh_tmu.2",
305 .con_id = "tmu_fck",
306 .clk = &mstp_clks[HWBLK_TMU0],
307 }, {
308 /* TMU3 */
309 .dev_id = "sh_tmu.3",
310 .con_id = "tmu_fck",
311 .clk = &mstp_clks[HWBLK_TMU1],
312 },
313 CLKDEV_CON_ID("cmt_fck", &mstp_clks[HWBLK_CMT]), 296 CLKDEV_CON_ID("cmt_fck", &mstp_clks[HWBLK_CMT]),
314 CLKDEV_CON_ID("rwdt0", &mstp_clks[HWBLK_RWDT]), 297 CLKDEV_CON_ID("rwdt0", &mstp_clks[HWBLK_RWDT]),
315 CLKDEV_CON_ID("dmac1", &mstp_clks[HWBLK_DMAC1]), 298 CLKDEV_CON_ID("dmac1", &mstp_clks[HWBLK_DMAC1]),
316 { 299
317 /* TMU4 */ 300 CLKDEV_ICK_ID("tmu_fck", "sh_tmu.4", &mstp_clks[HWBLK_TMU1]),
318 .dev_id = "sh_tmu.4", 301 CLKDEV_ICK_ID("tmu_fck", "sh_tmu.5", &mstp_clks[HWBLK_TMU1]),
319 .con_id = "tmu_fck", 302 CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[HWBLK_SCIF0]),
320 .clk = &mstp_clks[HWBLK_TMU1], 303 CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[HWBLK_SCIF1]),
321 }, { 304 CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[HWBLK_SCIF2]),
322 /* TMU5 */ 305 CLKDEV_ICK_ID("sci_fck", "sh-sci.3", &mstp_clks[HWBLK_SCIF3]),
323 .dev_id = "sh_tmu.5", 306 CLKDEV_ICK_ID("sci_fck", "sh-sci.4", &mstp_clks[HWBLK_SCIF4]),
324 .con_id = "tmu_fck", 307 CLKDEV_ICK_ID("sci_fck", "sh-sci.5", &mstp_clks[HWBLK_SCIF5]),
325 .clk = &mstp_clks[HWBLK_TMU1], 308
326 }, {
327 /* SCIF0 */
328 .dev_id = "sh-sci.0",
329 .con_id = "sci_fck",
330 .clk = &mstp_clks[HWBLK_SCIF0],
331 }, {
332 /* SCIF1 */
333 .dev_id = "sh-sci.1",
334 .con_id = "sci_fck",
335 .clk = &mstp_clks[HWBLK_SCIF1],
336 }, {
337 /* SCIF2 */
338 .dev_id = "sh-sci.2",
339 .con_id = "sci_fck",
340 .clk = &mstp_clks[HWBLK_SCIF2],
341 }, {
342 /* SCIF3 */
343 .dev_id = "sh-sci.3",
344 .con_id = "sci_fck",
345 .clk = &mstp_clks[HWBLK_SCIF3],
346 }, {
347 /* SCIF4 */
348 .dev_id = "sh-sci.4",
349 .con_id = "sci_fck",
350 .clk = &mstp_clks[HWBLK_SCIF4],
351 }, {
352 /* SCIF5 */
353 .dev_id = "sh-sci.5",
354 .con_id = "sci_fck",
355 .clk = &mstp_clks[HWBLK_SCIF5],
356 },
357 CLKDEV_CON_ID("msiof0", &mstp_clks[HWBLK_MSIOF0]), 309 CLKDEV_CON_ID("msiof0", &mstp_clks[HWBLK_MSIOF0]),
358 CLKDEV_CON_ID("msiof1", &mstp_clks[HWBLK_MSIOF1]), 310 CLKDEV_CON_ID("msiof1", &mstp_clks[HWBLK_MSIOF1]),
359 CLKDEV_CON_ID("keysc0", &mstp_clks[HWBLK_KEYSC]), 311 CLKDEV_CON_ID("keysc0", &mstp_clks[HWBLK_KEYSC]),
360 CLKDEV_CON_ID("rtc0", &mstp_clks[HWBLK_RTC]), 312 CLKDEV_CON_ID("rtc0", &mstp_clks[HWBLK_RTC]),
361 CLKDEV_CON_ID("i2c0", &mstp_clks[HWBLK_IIC0]), 313 CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[HWBLK_IIC0]),
362 CLKDEV_CON_ID("i2c1", &mstp_clks[HWBLK_IIC1]), 314 CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[HWBLK_IIC1]),
363 CLKDEV_CON_ID("mmc0", &mstp_clks[HWBLK_MMC]), 315 CLKDEV_CON_ID("mmc0", &mstp_clks[HWBLK_MMC]),
364 CLKDEV_CON_ID("eth0", &mstp_clks[HWBLK_ETHER]), 316 CLKDEV_CON_ID("eth0", &mstp_clks[HWBLK_ETHER]),
365 CLKDEV_CON_ID("atapi0", &mstp_clks[HWBLK_ATAPI]), 317 CLKDEV_CON_ID("atapi0", &mstp_clks[HWBLK_ATAPI]),
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
index eedddad13835..3b097b09a3ba 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
@@ -101,8 +101,6 @@ static struct clk mstp_clks[MSTP_NR] = {
101 [MSTP220] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR2, 20, 0), 101 [MSTP220] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR2, 20, 0),
102}; 102};
103 103
104#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
105
106static struct clk_lookup lookups[] = { 104static struct clk_lookup lookups[] = {
107 /* main clocks */ 105 /* main clocks */
108 CLKDEV_CON_ID("extal", &extal_clk), 106 CLKDEV_CON_ID("extal", &extal_clk),
@@ -116,33 +114,13 @@ static struct clk_lookup lookups[] = {
116 /* MSTP32 clocks */ 114 /* MSTP32 clocks */
117 CLKDEV_CON_ID("sdhi0", &mstp_clks[MSTP004]), 115 CLKDEV_CON_ID("sdhi0", &mstp_clks[MSTP004]),
118 CLKDEV_CON_ID("riic", &mstp_clks[MSTP000]), 116 CLKDEV_CON_ID("riic", &mstp_clks[MSTP000]),
119 { 117
120 /* TMU0 */ 118 CLKDEV_ICK_ID("tmu_fck", "sh_tmu.0", &mstp_clks[MSTP113]),
121 .dev_id = "sh_tmu.0", 119 CLKDEV_ICK_ID("tmu_fck", "sh_tmu.1", &mstp_clks[MSTP114]),
122 .con_id = "tmu_fck", 120 CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[MSTP112]),
123 .clk = &mstp_clks[MSTP113], 121 CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[MSTP111]),
124 }, { 122 CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[MSTP110]),
125 /* TMU1 */ 123
126 .dev_id = "sh_tmu.1",
127 .con_id = "tmu_fck",
128 .clk = &mstp_clks[MSTP114],
129 },
130 {
131 /* SCIF4 (But, ID is 2) */
132 .dev_id = "sh-sci.2",
133 .con_id = "sci_fck",
134 .clk = &mstp_clks[MSTP112],
135 }, {
136 /* SCIF3 */
137 .dev_id = "sh-sci.1",
138 .con_id = "sci_fck",
139 .clk = &mstp_clks[MSTP111],
140 }, {
141 /* SCIF2 */
142 .dev_id = "sh-sci.0",
143 .con_id = "sci_fck",
144 .clk = &mstp_clks[MSTP110],
145 },
146 CLKDEV_CON_ID("usb0", &mstp_clks[MSTP102]), 124 CLKDEV_CON_ID("usb0", &mstp_clks[MSTP102]),
147 CLKDEV_CON_ID("mmc0", &mstp_clks[MSTP220]), 125 CLKDEV_CON_ID("mmc0", &mstp_clks[MSTP220]),
148}; 126};
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7763.c b/arch/sh/kernel/cpu/sh4a/clock-sh7763.c
index 599630fc4d3b..2d4c7fd79c02 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7763.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7763.c
@@ -91,8 +91,6 @@ static struct clk *sh7763_onchip_clocks[] = {
91 &sh7763_shyway_clk, 91 &sh7763_shyway_clk,
92}; 92};
93 93
94#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
95
96static struct clk_lookup lookups[] = { 94static struct clk_lookup lookups[] = {
97 /* main clocks */ 95 /* main clocks */
98 CLKDEV_CON_ID("shyway_clk", &sh7763_shyway_clk), 96 CLKDEV_CON_ID("shyway_clk", &sh7763_shyway_clk),
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7780.c b/arch/sh/kernel/cpu/sh4a/clock-sh7780.c
index 8894926479a6..3b53348fe2fc 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7780.c
@@ -97,8 +97,6 @@ static struct clk *sh7780_onchip_clocks[] = {
97 &sh7780_shyway_clk, 97 &sh7780_shyway_clk,
98}; 98};
99 99
100#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
101
102static struct clk_lookup lookups[] = { 100static struct clk_lookup lookups[] = {
103 /* main clocks */ 101 /* main clocks */
104 CLKDEV_CON_ID("shyway_clk", &sh7780_shyway_clk), 102 CLKDEV_CON_ID("shyway_clk", &sh7780_shyway_clk),
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7785.c b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
index 2d960247f3eb..e5b420cc1265 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
@@ -116,8 +116,6 @@ static struct clk mstp_clks[MSTP_NR] = {
116 [MSTP100] = SH_CLK_MSTP32(NULL, MSTPCR1, 0, 0), 116 [MSTP100] = SH_CLK_MSTP32(NULL, MSTPCR1, 0, 0),
117}; 117};
118 118
119#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
120
121static struct clk_lookup lookups[] = { 119static struct clk_lookup lookups[] = {
122 /* main clocks */ 120 /* main clocks */
123 CLKDEV_CON_ID("extal", &extal_clk), 121 CLKDEV_CON_ID("extal", &extal_clk),
@@ -134,74 +132,27 @@ static struct clk_lookup lookups[] = {
134 CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]), 132 CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
135 133
136 /* MSTP32 clocks */ 134 /* MSTP32 clocks */
137 { 135 CLKDEV_ICK_ID("sci_fck", "sh-sci.5", &mstp_clks[MSTP029]),
138 /* SCIF5 */ 136 CLKDEV_ICK_ID("sci_fck", "sh-sci.4", &mstp_clks[MSTP028]),
139 .dev_id = "sh-sci.5", 137 CLKDEV_ICK_ID("sci_fck", "sh-sci.3", &mstp_clks[MSTP027]),
140 .con_id = "sci_fck", 138 CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[MSTP026]),
141 .clk = &mstp_clks[MSTP029], 139 CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[MSTP025]),
142 }, { 140 CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[MSTP024]),
143 /* SCIF4 */ 141
144 .dev_id = "sh-sci.4",
145 .con_id = "sci_fck",
146 .clk = &mstp_clks[MSTP028],
147 }, {
148 /* SCIF3 */
149 .dev_id = "sh-sci.3",
150 .con_id = "sci_fck",
151 .clk = &mstp_clks[MSTP027],
152 }, {
153 /* SCIF2 */
154 .dev_id = "sh-sci.2",
155 .con_id = "sci_fck",
156 .clk = &mstp_clks[MSTP026],
157 }, {
158 /* SCIF1 */
159 .dev_id = "sh-sci.1",
160 .con_id = "sci_fck",
161 .clk = &mstp_clks[MSTP025],
162 }, {
163 /* SCIF0 */
164 .dev_id = "sh-sci.0",
165 .con_id = "sci_fck",
166 .clk = &mstp_clks[MSTP024],
167 },
168 CLKDEV_CON_ID("ssi1_fck", &mstp_clks[MSTP021]), 142 CLKDEV_CON_ID("ssi1_fck", &mstp_clks[MSTP021]),
169 CLKDEV_CON_ID("ssi0_fck", &mstp_clks[MSTP020]), 143 CLKDEV_CON_ID("ssi0_fck", &mstp_clks[MSTP020]),
170 CLKDEV_CON_ID("hac1_fck", &mstp_clks[MSTP017]), 144 CLKDEV_CON_ID("hac1_fck", &mstp_clks[MSTP017]),
171 CLKDEV_CON_ID("hac0_fck", &mstp_clks[MSTP016]), 145 CLKDEV_CON_ID("hac0_fck", &mstp_clks[MSTP016]),
172 CLKDEV_CON_ID("mmcif_fck", &mstp_clks[MSTP013]), 146 CLKDEV_CON_ID("mmcif_fck", &mstp_clks[MSTP013]),
173 CLKDEV_CON_ID("flctl_fck", &mstp_clks[MSTP012]), 147 CLKDEV_CON_ID("flctl_fck", &mstp_clks[MSTP012]),
174 { 148
175 /* TMU0 */ 149 CLKDEV_ICK_ID("tmu_fck", "sh_tmu.0", &mstp_clks[MSTP008]),
176 .dev_id = "sh_tmu.0", 150 CLKDEV_ICK_ID("tmu_fck", "sh_tmu.1", &mstp_clks[MSTP008]),
177 .con_id = "tmu_fck", 151 CLKDEV_ICK_ID("tmu_fck", "sh_tmu.2", &mstp_clks[MSTP008]),
178 .clk = &mstp_clks[MSTP008], 152 CLKDEV_ICK_ID("tmu_fck", "sh_tmu.3", &mstp_clks[MSTP009]),
179 }, { 153 CLKDEV_ICK_ID("tmu_fck", "sh_tmu.4", &mstp_clks[MSTP009]),
180 /* TMU1 */ 154 CLKDEV_ICK_ID("tmu_fck", "sh_tmu.5", &mstp_clks[MSTP009]),
181 .dev_id = "sh_tmu.1", 155
182 .con_id = "tmu_fck",
183 .clk = &mstp_clks[MSTP008],
184 }, {
185 /* TMU2 */
186 .dev_id = "sh_tmu.2",
187 .con_id = "tmu_fck",
188 .clk = &mstp_clks[MSTP008],
189 }, {
190 /* TMU3 */
191 .dev_id = "sh_tmu.3",
192 .con_id = "tmu_fck",
193 .clk = &mstp_clks[MSTP009],
194 }, {
195 /* TMU4 */
196 .dev_id = "sh_tmu.4",
197 .con_id = "tmu_fck",
198 .clk = &mstp_clks[MSTP009],
199 }, {
200 /* TMU5 */
201 .dev_id = "sh_tmu.5",
202 .con_id = "tmu_fck",
203 .clk = &mstp_clks[MSTP009],
204 },
205 CLKDEV_CON_ID("siof_fck", &mstp_clks[MSTP003]), 156 CLKDEV_CON_ID("siof_fck", &mstp_clks[MSTP003]),
206 CLKDEV_CON_ID("hspi_fck", &mstp_clks[MSTP002]), 157 CLKDEV_CON_ID("hspi_fck", &mstp_clks[MSTP002]),
207 CLKDEV_CON_ID("hudi_fck", &mstp_clks[MSTP119]), 158 CLKDEV_CON_ID("hudi_fck", &mstp_clks[MSTP119]),
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
index 42e403be9076..f6c0c3d5599f 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
@@ -125,8 +125,6 @@ static struct clk mstp_clks[MSTP_NR] = {
125 [MSTP102] = SH_CLK_MSTP32(NULL, MSTPCR1, 2, 0), 125 [MSTP102] = SH_CLK_MSTP32(NULL, MSTPCR1, 2, 0),
126}; 126};
127 127
128#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
129
130static struct clk_lookup lookups[] = { 128static struct clk_lookup lookups[] = {
131 /* main clocks */ 129 /* main clocks */
132 CLKDEV_CON_ID("extal", &extal_clk), 130 CLKDEV_CON_ID("extal", &extal_clk),
@@ -141,37 +139,13 @@ static struct clk_lookup lookups[] = {
141 CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]), 139 CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
142 140
143 /* MSTP32 clocks */ 141 /* MSTP32 clocks */
144 { 142 CLKDEV_ICK_ID("sci_fck", "sh-sci.5", &mstp_clks[MSTP029]),
145 /* SCIF5 */ 143 CLKDEV_ICK_ID("sci_fck", "sh-sci.4", &mstp_clks[MSTP028]),
146 .dev_id = "sh-sci.5", 144 CLKDEV_ICK_ID("sci_fck", "sh-sci.3", &mstp_clks[MSTP027]),
147 .con_id = "sci_fck", 145 CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[MSTP026]),
148 .clk = &mstp_clks[MSTP029], 146 CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[MSTP025]),
149 }, { 147 CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[MSTP024]),
150 /* SCIF4 */ 148
151 .dev_id = "sh-sci.4",
152 .con_id = "sci_fck",
153 .clk = &mstp_clks[MSTP028],
154 }, {
155 /* SCIF3 */
156 .dev_id = "sh-sci.3",
157 .con_id = "sci_fck",
158 .clk = &mstp_clks[MSTP027],
159 }, {
160 /* SCIF2 */
161 .dev_id = "sh-sci.2",
162 .con_id = "sci_fck",
163 .clk = &mstp_clks[MSTP026],
164 }, {
165 /* SCIF1 */
166 .dev_id = "sh-sci.1",
167 .con_id = "sci_fck",
168 .clk = &mstp_clks[MSTP025],
169 }, {
170 /* SCIF0 */
171 .dev_id = "sh-sci.0",
172 .con_id = "sci_fck",
173 .clk = &mstp_clks[MSTP024],
174 },
175 CLKDEV_CON_ID("ssi3_fck", &mstp_clks[MSTP023]), 149 CLKDEV_CON_ID("ssi3_fck", &mstp_clks[MSTP023]),
176 CLKDEV_CON_ID("ssi2_fck", &mstp_clks[MSTP022]), 150 CLKDEV_CON_ID("ssi2_fck", &mstp_clks[MSTP022]),
177 CLKDEV_CON_ID("ssi1_fck", &mstp_clks[MSTP021]), 151 CLKDEV_CON_ID("ssi1_fck", &mstp_clks[MSTP021]),
@@ -180,67 +154,20 @@ static struct clk_lookup lookups[] = {
180 CLKDEV_CON_ID("hac0_fck", &mstp_clks[MSTP016]), 154 CLKDEV_CON_ID("hac0_fck", &mstp_clks[MSTP016]),
181 CLKDEV_CON_ID("i2c1_fck", &mstp_clks[MSTP015]), 155 CLKDEV_CON_ID("i2c1_fck", &mstp_clks[MSTP015]),
182 CLKDEV_CON_ID("i2c0_fck", &mstp_clks[MSTP014]), 156 CLKDEV_CON_ID("i2c0_fck", &mstp_clks[MSTP014]),
183 { 157
184 /* TMU0 */ 158 CLKDEV_ICK_ID("tmu_fck", "sh_tmu.0", &mstp_clks[MSTP008]),
185 .dev_id = "sh_tmu.0", 159 CLKDEV_ICK_ID("tmu_fck", "sh_tmu.1", &mstp_clks[MSTP008]),
186 .con_id = "tmu_fck", 160 CLKDEV_ICK_ID("tmu_fck", "sh_tmu.2", &mstp_clks[MSTP008]),
187 .clk = &mstp_clks[MSTP008], 161 CLKDEV_ICK_ID("tmu_fck", "sh_tmu.3", &mstp_clks[MSTP009]),
188 }, { 162 CLKDEV_ICK_ID("tmu_fck", "sh_tmu.4", &mstp_clks[MSTP009]),
189 /* TMU1 */ 163 CLKDEV_ICK_ID("tmu_fck", "sh_tmu.5", &mstp_clks[MSTP009]),
190 .dev_id = "sh_tmu.1", 164 CLKDEV_ICK_ID("tmu_fck", "sh_tmu.6", &mstp_clks[MSTP010]),
191 .con_id = "tmu_fck", 165 CLKDEV_ICK_ID("tmu_fck", "sh_tmu.7", &mstp_clks[MSTP010]),
192 .clk = &mstp_clks[MSTP008], 166 CLKDEV_ICK_ID("tmu_fck", "sh_tmu.8", &mstp_clks[MSTP010]),
193 }, { 167 CLKDEV_ICK_ID("tmu_fck", "sh_tmu.9", &mstp_clks[MSTP011]),
194 /* TMU2 */ 168 CLKDEV_ICK_ID("tmu_fck", "sh_tmu.10", &mstp_clks[MSTP011]),
195 .dev_id = "sh_tmu.2", 169 CLKDEV_ICK_ID("tmu_fck", "sh_tmu.11", &mstp_clks[MSTP011]),
196 .con_id = "tmu_fck", 170
197 .clk = &mstp_clks[MSTP008],
198 }, {
199 /* TMU3 */
200 .dev_id = "sh_tmu.3",
201 .con_id = "tmu_fck",
202 .clk = &mstp_clks[MSTP009],
203 }, {
204 /* TMU4 */
205 .dev_id = "sh_tmu.4",
206 .con_id = "tmu_fck",
207 .clk = &mstp_clks[MSTP009],
208 }, {
209 /* TMU5 */
210 .dev_id = "sh_tmu.5",
211 .con_id = "tmu_fck",
212 .clk = &mstp_clks[MSTP009],
213 }, {
214 /* TMU6 */
215 .dev_id = "sh_tmu.6",
216 .con_id = "tmu_fck",
217 .clk = &mstp_clks[MSTP010],
218 }, {
219 /* TMU7 */
220 .dev_id = "sh_tmu.7",
221 .con_id = "tmu_fck",
222 .clk = &mstp_clks[MSTP010],
223 }, {
224 /* TMU8 */
225 .dev_id = "sh_tmu.8",
226 .con_id = "tmu_fck",
227 .clk = &mstp_clks[MSTP010],
228 }, {
229 /* TMU9 */
230 .dev_id = "sh_tmu.9",
231 .con_id = "tmu_fck",
232 .clk = &mstp_clks[MSTP011],
233 }, {
234 /* TMU10 */
235 .dev_id = "sh_tmu.10",
236 .con_id = "tmu_fck",
237 .clk = &mstp_clks[MSTP011],
238 }, {
239 /* TMU11 */
240 .dev_id = "sh_tmu.11",
241 .con_id = "tmu_fck",
242 .clk = &mstp_clks[MSTP011],
243 },
244 CLKDEV_CON_ID("sdif1_fck", &mstp_clks[MSTP005]), 171 CLKDEV_CON_ID("sdif1_fck", &mstp_clks[MSTP005]),
245 CLKDEV_CON_ID("sdif0_fck", &mstp_clks[MSTP004]), 172 CLKDEV_CON_ID("sdif0_fck", &mstp_clks[MSTP004]),
246 CLKDEV_CON_ID("hspi_fck", &mstp_clks[MSTP002]), 173 CLKDEV_CON_ID("hspi_fck", &mstp_clks[MSTP002]),
diff --git a/arch/sh/kernel/cpu/sh4a/clock-shx3.c b/arch/sh/kernel/cpu/sh4a/clock-shx3.c
index 1afdb93b8ccb..bf2d00b8b908 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-shx3.c
@@ -100,8 +100,6 @@ static struct clk mstp_clks[MSTP_NR] = {
100 [MSTP104] = SH_CLK_MSTP32(NULL, MSTPCR1, 4, 0), 100 [MSTP104] = SH_CLK_MSTP32(NULL, MSTPCR1, 4, 0),
101}; 101};
102 102
103#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
104
105static struct clk_lookup lookups[] = { 103static struct clk_lookup lookups[] = {
106 /* main clocks */ 104 /* main clocks */
107 CLKDEV_CON_ID("extal", &extal_clk), 105 CLKDEV_CON_ID("extal", &extal_clk),
@@ -116,62 +114,23 @@ static struct clk_lookup lookups[] = {
116 CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]), 114 CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
117 115
118 /* MSTP32 clocks */ 116 /* MSTP32 clocks */
119 { 117 CLKDEV_ICK_ID("sci_fck", "sh-sci.3", &mstp_clks[MSTP027]),
120 /* SCIF3 */ 118 CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[MSTP026]),
121 .dev_id = "sh-sci.3", 119 CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[MSTP025]),
122 .con_id = "sci_fck", 120 CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[MSTP024]),
123 .clk = &mstp_clks[MSTP027], 121
124 }, {
125 /* SCIF2 */
126 .dev_id = "sh-sci.2",
127 .con_id = "sci_fck",
128 .clk = &mstp_clks[MSTP026],
129 }, {
130 /* SCIF1 */
131 .dev_id = "sh-sci.1",
132 .con_id = "sci_fck",
133 .clk = &mstp_clks[MSTP025],
134 }, {
135 /* SCIF0 */
136 .dev_id = "sh-sci.0",
137 .con_id = "sci_fck",
138 .clk = &mstp_clks[MSTP024],
139 },
140 CLKDEV_CON_ID("h8ex_fck", &mstp_clks[MSTP003]), 122 CLKDEV_CON_ID("h8ex_fck", &mstp_clks[MSTP003]),
141 CLKDEV_CON_ID("csm_fck", &mstp_clks[MSTP002]), 123 CLKDEV_CON_ID("csm_fck", &mstp_clks[MSTP002]),
142 CLKDEV_CON_ID("fe1_fck", &mstp_clks[MSTP001]), 124 CLKDEV_CON_ID("fe1_fck", &mstp_clks[MSTP001]),
143 CLKDEV_CON_ID("fe0_fck", &mstp_clks[MSTP000]), 125 CLKDEV_CON_ID("fe0_fck", &mstp_clks[MSTP000]),
144 { 126
145 /* TMU0 */ 127 CLKDEV_ICK_ID("tmu_fck", "sh_tmu.0", &mstp_clks[MSTP008]),
146 .dev_id = "sh_tmu.0", 128 CLKDEV_ICK_ID("tmu_fck", "sh_tmu.1", &mstp_clks[MSTP008]),
147 .con_id = "tmu_fck", 129 CLKDEV_ICK_ID("tmu_fck", "sh_tmu.2", &mstp_clks[MSTP008]),
148 .clk = &mstp_clks[MSTP008], 130 CLKDEV_ICK_ID("tmu_fck", "sh_tmu.3", &mstp_clks[MSTP009]),
149 }, { 131 CLKDEV_ICK_ID("tmu_fck", "sh_tmu.4", &mstp_clks[MSTP009]),
150 /* TMU1 */ 132 CLKDEV_ICK_ID("tmu_fck", "sh_tmu.5", &mstp_clks[MSTP009]),
151 .dev_id = "sh_tmu.1", 133
152 .con_id = "tmu_fck",
153 .clk = &mstp_clks[MSTP008],
154 }, {
155 /* TMU2 */
156 .dev_id = "sh_tmu.2",
157 .con_id = "tmu_fck",
158 .clk = &mstp_clks[MSTP008],
159 }, {
160 /* TMU3 */
161 .dev_id = "sh_tmu.3",
162 .con_id = "tmu_fck",
163 .clk = &mstp_clks[MSTP009],
164 }, {
165 /* TMU4 */
166 .dev_id = "sh_tmu.4",
167 .con_id = "tmu_fck",
168 .clk = &mstp_clks[MSTP009],
169 }, {
170 /* TMU5 */
171 .dev_id = "sh_tmu.5",
172 .con_id = "tmu_fck",
173 .clk = &mstp_clks[MSTP009],
174 },
175 CLKDEV_CON_ID("hudi_fck", &mstp_clks[MSTP119]), 134 CLKDEV_CON_ID("hudi_fck", &mstp_clks[MSTP119]),
176 CLKDEV_CON_ID("dmac_11_6_fck", &mstp_clks[MSTP105]), 135 CLKDEV_CON_ID("dmac_11_6_fck", &mstp_clks[MSTP105]),
177 CLKDEV_CON_ID("dmac_5_0_fck", &mstp_clks[MSTP104]), 136 CLKDEV_CON_ID("dmac_5_0_fck", &mstp_clks[MSTP104]),
diff --git a/arch/sh/kernel/cpu/sh4a/serial-sh7722.c b/arch/sh/kernel/cpu/sh4a/serial-sh7722.c
new file mode 100644
index 000000000000..59bc3a72702e
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/serial-sh7722.c
@@ -0,0 +1,23 @@
1#include <linux/serial_sci.h>
2#include <linux/serial_core.h>
3#include <linux/io.h>
4
5#define PSCR 0xA405011E
6
7static void sh7722_sci_init_pins(struct uart_port *port, unsigned int cflag)
8{
9 unsigned short data;
10
11 if (port->mapbase == 0xffe00000) {
12 data = __raw_readw(PSCR);
13 data &= ~0x03cf;
14 if (!(cflag & CRTSCTS))
15 data |= 0x0340;
16
17 __raw_writew(data, PSCR);
18 }
19}
20
21struct plat_sci_port_ops sh7722_sci_port_ops = {
22 .init_pins = sh7722_sci_init_pins,
23};
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
index 82616af64d62..87773869a2f3 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
@@ -20,6 +20,7 @@
20 20
21static struct plat_sci_port scif0_platform_data = { 21static struct plat_sci_port scif0_platform_data = {
22 .mapbase = 0xffe00000, 22 .mapbase = 0xffe00000,
23 .port_reg = 0xa405013e,
23 .flags = UPF_BOOT_AUTOCONF, 24 .flags = UPF_BOOT_AUTOCONF,
24 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 25 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
25 .scbrr_algo_id = SCBRR_ALGO_2, 26 .scbrr_algo_id = SCBRR_ALGO_2,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
index 5813d8023619..278a0e572158 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
@@ -22,6 +22,7 @@
22 22
23#include <cpu/dma-register.h> 23#include <cpu/dma-register.h>
24#include <cpu/sh7722.h> 24#include <cpu/sh7722.h>
25#include <cpu/serial.h>
25 26
26static const struct sh_dmae_slave_config sh7722_dmae_slaves[] = { 27static const struct sh_dmae_slave_config sh7722_dmae_slaves[] = {
27 { 28 {
@@ -185,6 +186,8 @@ static struct plat_sci_port scif0_platform_data = {
185 .scbrr_algo_id = SCBRR_ALGO_2, 186 .scbrr_algo_id = SCBRR_ALGO_2,
186 .type = PORT_SCIF, 187 .type = PORT_SCIF,
187 .irqs = { 80, 80, 80, 80 }, 188 .irqs = { 80, 80, 80, 80 },
189 .ops = &sh7722_sci_port_ops,
190 .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
188}; 191};
189 192
190static struct platform_device scif0_device = { 193static struct platform_device scif0_device = {
@@ -202,6 +205,8 @@ static struct plat_sci_port scif1_platform_data = {
202 .scbrr_algo_id = SCBRR_ALGO_2, 205 .scbrr_algo_id = SCBRR_ALGO_2,
203 .type = PORT_SCIF, 206 .type = PORT_SCIF,
204 .irqs = { 81, 81, 81, 81 }, 207 .irqs = { 81, 81, 81, 81 },
208 .ops = &sh7722_sci_port_ops,
209 .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
205}; 210};
206 211
207static struct platform_device scif1_device = { 212static struct platform_device scif1_device = {
@@ -219,6 +224,8 @@ static struct plat_sci_port scif2_platform_data = {
219 .scbrr_algo_id = SCBRR_ALGO_2, 224 .scbrr_algo_id = SCBRR_ALGO_2,
220 .type = PORT_SCIF, 225 .type = PORT_SCIF,
221 .irqs = { 82, 82, 82, 82 }, 226 .irqs = { 82, 82, 82, 82 },
227 .ops = &sh7722_sci_port_ops,
228 .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
222}; 229};
223 230
224static struct platform_device scif2_device = { 231static struct platform_device scif2_device = {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
index 072382280f96..3c2810d8f72e 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
@@ -23,11 +23,13 @@
23/* Serial */ 23/* Serial */
24static struct plat_sci_port scif0_platform_data = { 24static struct plat_sci_port scif0_platform_data = {
25 .mapbase = 0xffe00000, 25 .mapbase = 0xffe00000,
26 .port_reg = 0xa4050160,
26 .flags = UPF_BOOT_AUTOCONF, 27 .flags = UPF_BOOT_AUTOCONF,
27 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 28 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
28 .scbrr_algo_id = SCBRR_ALGO_2, 29 .scbrr_algo_id = SCBRR_ALGO_2,
29 .type = PORT_SCIF, 30 .type = PORT_SCIF,
30 .irqs = { 80, 80, 80, 80 }, 31 .irqs = { 80, 80, 80, 80 },
32 .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
31}; 33};
32 34
33static struct platform_device scif0_device = { 35static struct platform_device scif0_device = {
@@ -40,11 +42,13 @@ static struct platform_device scif0_device = {
40 42
41static struct plat_sci_port scif1_platform_data = { 43static struct plat_sci_port scif1_platform_data = {
42 .mapbase = 0xffe10000, 44 .mapbase = 0xffe10000,
45 .port_reg = SCIx_NOT_SUPPORTED,
43 .flags = UPF_BOOT_AUTOCONF, 46 .flags = UPF_BOOT_AUTOCONF,
44 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 47 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
45 .scbrr_algo_id = SCBRR_ALGO_2, 48 .scbrr_algo_id = SCBRR_ALGO_2,
46 .type = PORT_SCIF, 49 .type = PORT_SCIF,
47 .irqs = { 81, 81, 81, 81 }, 50 .irqs = { 81, 81, 81, 81 },
51 .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
48}; 52};
49 53
50static struct platform_device scif1_device = { 54static struct platform_device scif1_device = {
@@ -57,11 +61,13 @@ static struct platform_device scif1_device = {
57 61
58static struct plat_sci_port scif2_platform_data = { 62static struct plat_sci_port scif2_platform_data = {
59 .mapbase = 0xffe20000, 63 .mapbase = 0xffe20000,
64 .port_reg = SCIx_NOT_SUPPORTED,
60 .flags = UPF_BOOT_AUTOCONF, 65 .flags = UPF_BOOT_AUTOCONF,
61 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 66 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
62 .scbrr_algo_id = SCBRR_ALGO_2, 67 .scbrr_algo_id = SCBRR_ALGO_2,
63 .type = PORT_SCIF, 68 .type = PORT_SCIF,
64 .irqs = { 82, 82, 82, 82 }, 69 .irqs = { 82, 82, 82, 82 },
70 .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
65}; 71};
66 72
67static struct platform_device scif2_device = { 73static struct platform_device scif2_device = {
@@ -75,6 +81,7 @@ static struct platform_device scif2_device = {
75static struct plat_sci_port scif3_platform_data = { 81static struct plat_sci_port scif3_platform_data = {
76 .mapbase = 0xa4e30000, 82 .mapbase = 0xa4e30000,
77 .flags = UPF_BOOT_AUTOCONF, 83 .flags = UPF_BOOT_AUTOCONF,
84 .port_reg = SCIx_NOT_SUPPORTED,
78 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 85 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
79 .scbrr_algo_id = SCBRR_ALGO_3, 86 .scbrr_algo_id = SCBRR_ALGO_3,
80 .type = PORT_SCIFA, 87 .type = PORT_SCIFA,
@@ -91,6 +98,7 @@ static struct platform_device scif3_device = {
91 98
92static struct plat_sci_port scif4_platform_data = { 99static struct plat_sci_port scif4_platform_data = {
93 .mapbase = 0xa4e40000, 100 .mapbase = 0xa4e40000,
101 .port_reg = SCIx_NOT_SUPPORTED,
94 .flags = UPF_BOOT_AUTOCONF, 102 .flags = UPF_BOOT_AUTOCONF,
95 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 103 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
96 .scbrr_algo_id = SCBRR_ALGO_3, 104 .scbrr_algo_id = SCBRR_ALGO_3,
@@ -108,6 +116,7 @@ static struct platform_device scif4_device = {
108 116
109static struct plat_sci_port scif5_platform_data = { 117static struct plat_sci_port scif5_platform_data = {
110 .mapbase = 0xa4e50000, 118 .mapbase = 0xa4e50000,
119 .port_reg = SCIx_NOT_SUPPORTED,
111 .flags = UPF_BOOT_AUTOCONF, 120 .flags = UPF_BOOT_AUTOCONF,
112 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 121 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
113 .scbrr_algo_id = SCBRR_ALGO_3, 122 .scbrr_algo_id = SCBRR_ALGO_3,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
index 134a397b1918..a37dd72c3671 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
@@ -296,11 +296,13 @@ static struct platform_device dma1_device = {
296/* Serial */ 296/* Serial */
297static struct plat_sci_port scif0_platform_data = { 297static struct plat_sci_port scif0_platform_data = {
298 .mapbase = 0xffe00000, 298 .mapbase = 0xffe00000,
299 .port_reg = SCIx_NOT_SUPPORTED,
299 .flags = UPF_BOOT_AUTOCONF, 300 .flags = UPF_BOOT_AUTOCONF,
300 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 301 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
301 .scbrr_algo_id = SCBRR_ALGO_2, 302 .scbrr_algo_id = SCBRR_ALGO_2,
302 .type = PORT_SCIF, 303 .type = PORT_SCIF,
303 .irqs = { 80, 80, 80, 80 }, 304 .irqs = { 80, 80, 80, 80 },
305 .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
304}; 306};
305 307
306static struct platform_device scif0_device = { 308static struct platform_device scif0_device = {
@@ -313,11 +315,13 @@ static struct platform_device scif0_device = {
313 315
314static struct plat_sci_port scif1_platform_data = { 316static struct plat_sci_port scif1_platform_data = {
315 .mapbase = 0xffe10000, 317 .mapbase = 0xffe10000,
318 .port_reg = SCIx_NOT_SUPPORTED,
316 .flags = UPF_BOOT_AUTOCONF, 319 .flags = UPF_BOOT_AUTOCONF,
317 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 320 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
318 .scbrr_algo_id = SCBRR_ALGO_2, 321 .scbrr_algo_id = SCBRR_ALGO_2,
319 .type = PORT_SCIF, 322 .type = PORT_SCIF,
320 .irqs = { 81, 81, 81, 81 }, 323 .irqs = { 81, 81, 81, 81 },
324 .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
321}; 325};
322 326
323static struct platform_device scif1_device = { 327static struct platform_device scif1_device = {
@@ -330,11 +334,13 @@ static struct platform_device scif1_device = {
330 334
331static struct plat_sci_port scif2_platform_data = { 335static struct plat_sci_port scif2_platform_data = {
332 .mapbase = 0xffe20000, 336 .mapbase = 0xffe20000,
337 .port_reg = SCIx_NOT_SUPPORTED,
333 .flags = UPF_BOOT_AUTOCONF, 338 .flags = UPF_BOOT_AUTOCONF,
334 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 339 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
335 .scbrr_algo_id = SCBRR_ALGO_2, 340 .scbrr_algo_id = SCBRR_ALGO_2,
336 .type = PORT_SCIF, 341 .type = PORT_SCIF,
337 .irqs = { 82, 82, 82, 82 }, 342 .irqs = { 82, 82, 82, 82 },
343 .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
338}; 344};
339 345
340static struct platform_device scif2_device = { 346static struct platform_device scif2_device = {
@@ -347,6 +353,7 @@ static struct platform_device scif2_device = {
347 353
348static struct plat_sci_port scif3_platform_data = { 354static struct plat_sci_port scif3_platform_data = {
349 .mapbase = 0xa4e30000, 355 .mapbase = 0xa4e30000,
356 .port_reg = SCIx_NOT_SUPPORTED,
350 .flags = UPF_BOOT_AUTOCONF, 357 .flags = UPF_BOOT_AUTOCONF,
351 .scscr = SCSCR_RE | SCSCR_TE, 358 .scscr = SCSCR_RE | SCSCR_TE,
352 .scbrr_algo_id = SCBRR_ALGO_3, 359 .scbrr_algo_id = SCBRR_ALGO_3,
@@ -364,6 +371,7 @@ static struct platform_device scif3_device = {
364 371
365static struct plat_sci_port scif4_platform_data = { 372static struct plat_sci_port scif4_platform_data = {
366 .mapbase = 0xa4e40000, 373 .mapbase = 0xa4e40000,
374 .port_reg = SCIx_NOT_SUPPORTED,
367 .flags = UPF_BOOT_AUTOCONF, 375 .flags = UPF_BOOT_AUTOCONF,
368 .scscr = SCSCR_RE | SCSCR_TE, 376 .scscr = SCSCR_RE | SCSCR_TE,
369 .scbrr_algo_id = SCBRR_ALGO_3, 377 .scbrr_algo_id = SCBRR_ALGO_3,
@@ -381,6 +389,7 @@ static struct platform_device scif4_device = {
381 389
382static struct plat_sci_port scif5_platform_data = { 390static struct plat_sci_port scif5_platform_data = {
383 .mapbase = 0xa4e50000, 391 .mapbase = 0xa4e50000,
392 .port_reg = SCIx_NOT_SUPPORTED,
384 .flags = UPF_BOOT_AUTOCONF, 393 .flags = UPF_BOOT_AUTOCONF,
385 .scscr = SCSCR_RE | SCSCR_TE, 394 .scscr = SCSCR_RE | SCSCR_TE,
386 .scbrr_algo_id = SCBRR_ALGO_3, 395 .scbrr_algo_id = SCBRR_ALGO_3,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
index 593eca6509b5..00113515f233 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
@@ -23,6 +23,7 @@ static struct plat_sci_port scif0_platform_data = {
23 .scbrr_algo_id = SCBRR_ALGO_2, 23 .scbrr_algo_id = SCBRR_ALGO_2,
24 .type = PORT_SCIF, 24 .type = PORT_SCIF,
25 .irqs = { 40, 40, 40, 40 }, 25 .irqs = { 40, 40, 40, 40 },
26 .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
26}; 27};
27 28
28static struct platform_device scif0_device = { 29static struct platform_device scif0_device = {
@@ -40,6 +41,7 @@ static struct plat_sci_port scif1_platform_data = {
40 .scbrr_algo_id = SCBRR_ALGO_2, 41 .scbrr_algo_id = SCBRR_ALGO_2,
41 .type = PORT_SCIF, 42 .type = PORT_SCIF,
42 .irqs = { 76, 76, 76, 76 }, 43 .irqs = { 76, 76, 76, 76 },
44 .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
43}; 45};
44 46
45static struct platform_device scif1_device = { 47static struct platform_device scif1_device = {
@@ -57,6 +59,7 @@ static struct plat_sci_port scif2_platform_data = {
57 .scbrr_algo_id = SCBRR_ALGO_2, 59 .scbrr_algo_id = SCBRR_ALGO_2,
58 .type = PORT_SCIF, 60 .type = PORT_SCIF,
59 .irqs = { 104, 104, 104, 104 }, 61 .irqs = { 104, 104, 104, 104 },
62 .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
60}; 63};
61 64
62static struct platform_device scif2_device = { 65static struct platform_device scif2_device = {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
index 08add7fa6849..3d4d2075c19a 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
@@ -14,7 +14,6 @@
14#include <linux/serial_sci.h> 14#include <linux/serial_sci.h>
15#include <linux/sh_dma.h> 15#include <linux/sh_dma.h>
16#include <linux/sh_timer.h> 16#include <linux/sh_timer.h>
17
18#include <cpu/dma-register.h> 17#include <cpu/dma-register.h>
19 18
20static struct plat_sci_port scif0_platform_data = { 19static struct plat_sci_port scif0_platform_data = {
@@ -24,6 +23,7 @@ static struct plat_sci_port scif0_platform_data = {
24 .scbrr_algo_id = SCBRR_ALGO_1, 23 .scbrr_algo_id = SCBRR_ALGO_1,
25 .type = PORT_SCIF, 24 .type = PORT_SCIF,
26 .irqs = { 40, 40, 40, 40 }, 25 .irqs = { 40, 40, 40, 40 },
26 .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
27}; 27};
28 28
29static struct platform_device scif0_device = { 29static struct platform_device scif0_device = {
@@ -41,6 +41,7 @@ static struct plat_sci_port scif1_platform_data = {
41 .scbrr_algo_id = SCBRR_ALGO_1, 41 .scbrr_algo_id = SCBRR_ALGO_1,
42 .type = PORT_SCIF, 42 .type = PORT_SCIF,
43 .irqs = { 76, 76, 76, 76 }, 43 .irqs = { 76, 76, 76, 76 },
44 .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
44}; 45};
45 46
46static struct platform_device scif1_device = { 47static struct platform_device scif1_device = {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
index 18d8fc136fb2..b29e6340414a 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
@@ -15,9 +15,7 @@
15#include <linux/mm.h> 15#include <linux/mm.h>
16#include <linux/sh_dma.h> 16#include <linux/sh_dma.h>
17#include <linux/sh_timer.h> 17#include <linux/sh_timer.h>
18
19#include <asm/mmzone.h> 18#include <asm/mmzone.h>
20
21#include <cpu/dma-register.h> 19#include <cpu/dma-register.h>
22 20
23static struct plat_sci_port scif0_platform_data = { 21static struct plat_sci_port scif0_platform_data = {
@@ -27,6 +25,7 @@ static struct plat_sci_port scif0_platform_data = {
27 .scbrr_algo_id = SCBRR_ALGO_1, 25 .scbrr_algo_id = SCBRR_ALGO_1,
28 .type = PORT_SCIF, 26 .type = PORT_SCIF,
29 .irqs = { 40, 40, 40, 40 }, 27 .irqs = { 40, 40, 40, 40 },
28 .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
30}; 29};
31 30
32static struct platform_device scif0_device = { 31static struct platform_device scif0_device = {
@@ -44,6 +43,7 @@ static struct plat_sci_port scif1_platform_data = {
44 .scbrr_algo_id = SCBRR_ALGO_1, 43 .scbrr_algo_id = SCBRR_ALGO_1,
45 .type = PORT_SCIF, 44 .type = PORT_SCIF,
46 .irqs = { 44, 44, 44, 44 }, 45 .irqs = { 44, 44, 44, 44 },
46 .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
47}; 47};
48 48
49static struct platform_device scif1_device = { 49static struct platform_device scif1_device = {
@@ -61,6 +61,7 @@ static struct plat_sci_port scif2_platform_data = {
61 .scbrr_algo_id = SCBRR_ALGO_1, 61 .scbrr_algo_id = SCBRR_ALGO_1,
62 .type = PORT_SCIF, 62 .type = PORT_SCIF,
63 .irqs = { 60, 60, 60, 60 }, 63 .irqs = { 60, 60, 60, 60 },
64 .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
64}; 65};
65 66
66static struct platform_device scif2_device = { 67static struct platform_device scif2_device = {
@@ -78,6 +79,7 @@ static struct plat_sci_port scif3_platform_data = {
78 .scbrr_algo_id = SCBRR_ALGO_1, 79 .scbrr_algo_id = SCBRR_ALGO_1,
79 .type = PORT_SCIF, 80 .type = PORT_SCIF,
80 .irqs = { 61, 61, 61, 61 }, 81 .irqs = { 61, 61, 61, 61 },
82 .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
81}; 83};
82 84
83static struct platform_device scif3_device = { 85static struct platform_device scif3_device = {
@@ -95,6 +97,7 @@ static struct plat_sci_port scif4_platform_data = {
95 .scbrr_algo_id = SCBRR_ALGO_1, 97 .scbrr_algo_id = SCBRR_ALGO_1,
96 .type = PORT_SCIF, 98 .type = PORT_SCIF,
97 .irqs = { 62, 62, 62, 62 }, 99 .irqs = { 62, 62, 62, 62 },
100 .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
98}; 101};
99 102
100static struct platform_device scif4_device = { 103static struct platform_device scif4_device = {
@@ -112,6 +115,7 @@ static struct plat_sci_port scif5_platform_data = {
112 .scbrr_algo_id = SCBRR_ALGO_1, 115 .scbrr_algo_id = SCBRR_ALGO_1,
113 .type = PORT_SCIF, 116 .type = PORT_SCIF,
114 .irqs = { 63, 63, 63, 63 }, 117 .irqs = { 63, 63, 63, 63 },
118 .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
115}; 119};
116 120
117static struct platform_device scif5_device = { 121static struct platform_device scif5_device = {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
index beba32beb6d9..dd5e709f9821 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * SH7786 Setup 2 * SH7786 Setup
3 * 3 *
4 * Copyright (C) 2009 - 2010 Renesas Solutions Corp. 4 * Copyright (C) 2009 - 2011 Renesas Solutions Corp.
5 * Kuninori Morimoto <morimoto.kuninori@renesas.com> 5 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
6 * Paul Mundt <paul.mundt@renesas.com> 6 * Paul Mundt <paul.mundt@renesas.com>
7 * 7 *
@@ -33,6 +33,7 @@ static struct plat_sci_port scif0_platform_data = {
33 .scbrr_algo_id = SCBRR_ALGO_1, 33 .scbrr_algo_id = SCBRR_ALGO_1,
34 .type = PORT_SCIF, 34 .type = PORT_SCIF,
35 .irqs = { 40, 41, 43, 42 }, 35 .irqs = { 40, 41, 43, 42 },
36 .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
36}; 37};
37 38
38static struct platform_device scif0_device = { 39static struct platform_device scif0_device = {
@@ -53,6 +54,7 @@ static struct plat_sci_port scif1_platform_data = {
53 .scbrr_algo_id = SCBRR_ALGO_1, 54 .scbrr_algo_id = SCBRR_ALGO_1,
54 .type = PORT_SCIF, 55 .type = PORT_SCIF,
55 .irqs = { 44, 44, 44, 44 }, 56 .irqs = { 44, 44, 44, 44 },
57 .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
56}; 58};
57 59
58static struct platform_device scif1_device = { 60static struct platform_device scif1_device = {
@@ -70,6 +72,7 @@ static struct plat_sci_port scif2_platform_data = {
70 .scbrr_algo_id = SCBRR_ALGO_1, 72 .scbrr_algo_id = SCBRR_ALGO_1,
71 .type = PORT_SCIF, 73 .type = PORT_SCIF,
72 .irqs = { 50, 50, 50, 50 }, 74 .irqs = { 50, 50, 50, 50 },
75 .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
73}; 76};
74 77
75static struct platform_device scif2_device = { 78static struct platform_device scif2_device = {
@@ -87,6 +90,7 @@ static struct plat_sci_port scif3_platform_data = {
87 .scbrr_algo_id = SCBRR_ALGO_1, 90 .scbrr_algo_id = SCBRR_ALGO_1,
88 .type = PORT_SCIF, 91 .type = PORT_SCIF,
89 .irqs = { 51, 51, 51, 51 }, 92 .irqs = { 51, 51, 51, 51 },
93 .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
90}; 94};
91 95
92static struct platform_device scif3_device = { 96static struct platform_device scif3_device = {
@@ -104,6 +108,7 @@ static struct plat_sci_port scif4_platform_data = {
104 .scbrr_algo_id = SCBRR_ALGO_1, 108 .scbrr_algo_id = SCBRR_ALGO_1,
105 .type = PORT_SCIF, 109 .type = PORT_SCIF,
106 .irqs = { 52, 52, 52, 52 }, 110 .irqs = { 52, 52, 52, 52 },
111 .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
107}; 112};
108 113
109static struct platform_device scif4_device = { 114static struct platform_device scif4_device = {
@@ -121,6 +126,7 @@ static struct plat_sci_port scif5_platform_data = {
121 .scbrr_algo_id = SCBRR_ALGO_1, 126 .scbrr_algo_id = SCBRR_ALGO_1,
122 .type = PORT_SCIF, 127 .type = PORT_SCIF,
123 .irqs = { 53, 53, 53, 53 }, 128 .irqs = { 53, 53, 53, 53 },
129 .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
124}; 130};
125 131
126static struct platform_device scif5_device = { 132static struct platform_device scif5_device = {
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-13 05:36:56 -0500