diff options
author | Jayachandran C <jchandra@broadcom.com> | 2013-03-23 13:28:00 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2013-05-07 19:19:05 -0400 |
commit | c80dd3b6799da6b77fed0520a9dda2e8b01617e4 (patch) | |
tree | 70c2d1df000da00155b4fa833f9b3b76502d4c9e /arch | |
parent | 035114fbdbf8c88fbf80a160716be9d0078f01ee (diff) |
MIPS: Netlogic: Merge platform usb.h to usb-init.c
The definitions are not used anywhere else, and merging it will
make adding the new USB definitions for XLPII series easier.
While there, cleanup some whitespace in usb-init.c. There is no
change to logic due to this commit.
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/5027/
Acked-by: John Crispin <blogic@openwrt.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/mips/include/asm/netlogic/xlp-hal/usb.h | 64 | ||||
-rw-r--r-- | arch/mips/netlogic/xlp/usb-init.c | 49 |
2 files changed, 36 insertions, 77 deletions
diff --git a/arch/mips/include/asm/netlogic/xlp-hal/usb.h b/arch/mips/include/asm/netlogic/xlp-hal/usb.h deleted file mode 100644 index a9cd350dfb6c..000000000000 --- a/arch/mips/include/asm/netlogic/xlp-hal/usb.h +++ /dev/null | |||
@@ -1,64 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2003-2012 Broadcom Corporation | ||
3 | * All Rights Reserved | ||
4 | * | ||
5 | * This software is available to you under a choice of one of two | ||
6 | * licenses. You may choose to be licensed under the terms of the GNU | ||
7 | * General Public License (GPL) Version 2, available from the file | ||
8 | * COPYING in the main directory of this source tree, or the Broadcom | ||
9 | * license below: | ||
10 | * | ||
11 | * Redistribution and use in source and binary forms, with or without | ||
12 | * modification, are permitted provided that the following conditions | ||
13 | * are met: | ||
14 | * | ||
15 | * 1. Redistributions of source code must retain the above copyright | ||
16 | * notice, this list of conditions and the following disclaimer. | ||
17 | * 2. Redistributions in binary form must reproduce the above copyright | ||
18 | * notice, this list of conditions and the following disclaimer in | ||
19 | * the documentation and/or other materials provided with the | ||
20 | * distribution. | ||
21 | * | ||
22 | * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR | ||
23 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED | ||
24 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | ||
25 | * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE | ||
26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | ||
27 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | ||
28 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR | ||
29 | * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, | ||
30 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE | ||
31 | * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN | ||
32 | * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
33 | */ | ||
34 | |||
35 | #ifndef __NLM_HAL_USB_H__ | ||
36 | #define __NLM_HAL_USB_H__ | ||
37 | |||
38 | #define USB_CTL_0 0x01 | ||
39 | #define USB_PHY_0 0x0A | ||
40 | #define USB_PHY_RESET 0x01 | ||
41 | #define USB_PHY_PORT_RESET_0 0x10 | ||
42 | #define USB_PHY_PORT_RESET_1 0x20 | ||
43 | #define USB_CONTROLLER_RESET 0x01 | ||
44 | #define USB_INT_STATUS 0x0E | ||
45 | #define USB_INT_EN 0x0F | ||
46 | #define USB_PHY_INTERRUPT_EN 0x01 | ||
47 | #define USB_OHCI_INTERRUPT_EN 0x02 | ||
48 | #define USB_OHCI_INTERRUPT1_EN 0x04 | ||
49 | #define USB_OHCI_INTERRUPT2_EN 0x08 | ||
50 | #define USB_CTRL_INTERRUPT_EN 0x10 | ||
51 | |||
52 | #ifndef __ASSEMBLY__ | ||
53 | |||
54 | #define nlm_read_usb_reg(b, r) nlm_read_reg(b, r) | ||
55 | #define nlm_write_usb_reg(b, r, v) nlm_write_reg(b, r, v) | ||
56 | #define nlm_get_usb_pcibase(node, inst) \ | ||
57 | nlm_pcicfg_base(XLP_IO_USB_OFFSET(node, inst)) | ||
58 | #define nlm_get_usb_hcd_base(node, inst) \ | ||
59 | nlm_xkphys_map_pcibar0(nlm_get_usb_pcibase(node, inst)) | ||
60 | #define nlm_get_usb_regbase(node, inst) \ | ||
61 | (nlm_get_usb_pcibase(node, inst) + XLP_IO_PCI_HDRSZ) | ||
62 | |||
63 | #endif | ||
64 | #endif /* __NLM_HAL_USB_H__ */ | ||
diff --git a/arch/mips/netlogic/xlp/usb-init.c b/arch/mips/netlogic/xlp/usb-init.c index 1d0b66c62fd1..9c401dd78337 100644 --- a/arch/mips/netlogic/xlp/usb-init.c +++ b/arch/mips/netlogic/xlp/usb-init.c | |||
@@ -42,7 +42,30 @@ | |||
42 | #include <asm/netlogic/haldefs.h> | 42 | #include <asm/netlogic/haldefs.h> |
43 | #include <asm/netlogic/xlp-hal/iomap.h> | 43 | #include <asm/netlogic/xlp-hal/iomap.h> |
44 | #include <asm/netlogic/xlp-hal/xlp.h> | 44 | #include <asm/netlogic/xlp-hal/xlp.h> |
45 | #include <asm/netlogic/xlp-hal/usb.h> | 45 | |
46 | /* | ||
47 | * USB glue logic registers, used only during initialization | ||
48 | */ | ||
49 | #define USB_CTL_0 0x01 | ||
50 | #define USB_PHY_0 0x0A | ||
51 | #define USB_PHY_RESET 0x01 | ||
52 | #define USB_PHY_PORT_RESET_0 0x10 | ||
53 | #define USB_PHY_PORT_RESET_1 0x20 | ||
54 | #define USB_CONTROLLER_RESET 0x01 | ||
55 | #define USB_INT_STATUS 0x0E | ||
56 | #define USB_INT_EN 0x0F | ||
57 | #define USB_PHY_INTERRUPT_EN 0x01 | ||
58 | #define USB_OHCI_INTERRUPT_EN 0x02 | ||
59 | #define USB_OHCI_INTERRUPT1_EN 0x04 | ||
60 | #define USB_OHCI_INTERRUPT2_EN 0x08 | ||
61 | #define USB_CTRL_INTERRUPT_EN 0x10 | ||
62 | |||
63 | #define nlm_read_usb_reg(b, r) nlm_read_reg(b, r) | ||
64 | #define nlm_write_usb_reg(b, r, v) nlm_write_reg(b, r, v) | ||
65 | #define nlm_get_usb_pcibase(node, inst) \ | ||
66 | nlm_pcicfg_base(XLP_IO_USB_OFFSET(node, inst)) | ||
67 | #define nlm_get_usb_regbase(node, inst) \ | ||
68 | (nlm_get_usb_pcibase(node, inst) + XLP_IO_PCI_HDRSZ) | ||
46 | 69 | ||
47 | static void nlm_usb_intr_en(int node, int port) | 70 | static void nlm_usb_intr_en(int node, int port) |
48 | { | 71 | { |
@@ -99,23 +122,23 @@ static void nlm_usb_fixup_final(struct pci_dev *dev) | |||
99 | dev->dev.coherent_dma_mask = DMA_BIT_MASK(64); | 122 | dev->dev.coherent_dma_mask = DMA_BIT_MASK(64); |
100 | switch (dev->devfn) { | 123 | switch (dev->devfn) { |
101 | case 0x10: | 124 | case 0x10: |
102 | dev->irq = PIC_EHCI_0_IRQ; | 125 | dev->irq = PIC_EHCI_0_IRQ; |
103 | break; | 126 | break; |
104 | case 0x11: | 127 | case 0x11: |
105 | dev->irq = PIC_OHCI_0_IRQ; | 128 | dev->irq = PIC_OHCI_0_IRQ; |
106 | break; | 129 | break; |
107 | case 0x12: | 130 | case 0x12: |
108 | dev->irq = PIC_OHCI_1_IRQ; | 131 | dev->irq = PIC_OHCI_1_IRQ; |
109 | break; | 132 | break; |
110 | case 0x13: | 133 | case 0x13: |
111 | dev->irq = PIC_EHCI_1_IRQ; | 134 | dev->irq = PIC_EHCI_1_IRQ; |
112 | break; | 135 | break; |
113 | case 0x14: | 136 | case 0x14: |
114 | dev->irq = PIC_OHCI_2_IRQ; | 137 | dev->irq = PIC_OHCI_2_IRQ; |
115 | break; | 138 | break; |
116 | case 0x15: | 139 | case 0x15: |
117 | dev->irq = PIC_OHCI_3_IRQ; | 140 | dev->irq = PIC_OHCI_3_IRQ; |
118 | break; | 141 | break; |
119 | } | 142 | } |
120 | } | 143 | } |
121 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_NETLOGIC, PCI_DEVICE_ID_NLM_EHCI, | 144 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_NETLOGIC, PCI_DEVICE_ID_NLM_EHCI, |