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authorChris Dearman <chris@mips.com>2007-03-01 12:58:24 -0500
committerRalf Baechle <ralf@linux-mips.org>2007-03-13 12:59:31 -0400
commit795a22583ba11deb82d57dd70632c7ac390bb8c8 (patch)
tree1be26e34ca26907940c16d09bd4886a22d284e5b /arch
parenta967e127d0233f2472af64597de3f3920872310c (diff)
[MIPS] Oprofile: Reset all performance registers for MIPS_MT_SMP configs
Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/oprofile/op_model_mipsxx.c22
1 files changed, 13 insertions, 9 deletions
diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c
index 9d08608aaa51..69a8bcfe72b2 100644
--- a/arch/mips/oprofile/op_model_mipsxx.c
+++ b/arch/mips/oprofile/op_model_mipsxx.c
@@ -74,13 +74,13 @@ static inline void w_c0_ ## r ## n(unsigned int value) \
74 74
75__define_perf_accessors(perfcntr, 0, 2) 75__define_perf_accessors(perfcntr, 0, 2)
76__define_perf_accessors(perfcntr, 1, 3) 76__define_perf_accessors(perfcntr, 1, 3)
77__define_perf_accessors(perfcntr, 2, 2) 77__define_perf_accessors(perfcntr, 2, 0)
78__define_perf_accessors(perfcntr, 3, 2) 78__define_perf_accessors(perfcntr, 3, 1)
79 79
80__define_perf_accessors(perfctrl, 0, 2) 80__define_perf_accessors(perfctrl, 0, 2)
81__define_perf_accessors(perfctrl, 1, 3) 81__define_perf_accessors(perfctrl, 1, 3)
82__define_perf_accessors(perfctrl, 2, 2) 82__define_perf_accessors(perfctrl, 2, 0)
83__define_perf_accessors(perfctrl, 3, 2) 83__define_perf_accessors(perfctrl, 3, 1)
84 84
85struct op_mips_model op_model_mipsxx_ops; 85struct op_mips_model op_model_mipsxx_ops;
86 86
@@ -97,7 +97,6 @@ static void mipsxx_reg_setup(struct op_counter_config *ctr)
97 int i; 97 int i;
98 98
99 /* Compute the performance counter control word. */ 99 /* Compute the performance counter control word. */
100 /* For now count kernel and user mode */
101 for (i = 0; i < counters; i++) { 100 for (i = 0; i < counters; i++) {
102 reg.control[i] = 0; 101 reg.control[i] = 0;
103 reg.counter[i] = 0; 102 reg.counter[i] = 0;
@@ -234,9 +233,6 @@ static inline int n_counters(void)
234 counters = __n_counters(); 233 counters = __n_counters();
235 } 234 }
236 235
237#ifdef CONFIG_MIPS_MT_SMP
238 counters >> 1;
239#endif
240 return counters; 236 return counters;
241} 237}
242 238
@@ -270,6 +266,10 @@ static int __init mipsxx_init(void)
270 266
271 reset_counters(counters); 267 reset_counters(counters);
272 268
269#ifdef CONFIG_MIPS_MT_SMP
270 counters >>= 1;
271#endif
272
273 op_model_mipsxx_ops.num_counters = counters; 273 op_model_mipsxx_ops.num_counters = counters;
274 switch (current_cpu_data.cputype) { 274 switch (current_cpu_data.cputype) {
275 case CPU_20KC: 275 case CPU_20KC:
@@ -326,7 +326,11 @@ static int __init mipsxx_init(void)
326 326
327static void mipsxx_exit(void) 327static void mipsxx_exit(void)
328{ 328{
329 reset_counters(op_model_mipsxx_ops.num_counters); 329 int counters = op_model_mipsxx_ops.num_counters;
330#ifdef CONFIG_MIPS_MT_SMP
331 counters <<= 1;
332#endif
333 reset_counters(counters);
330 334
331 perf_irq = null_perf_irq; 335 perf_irq = null_perf_irq;
332} 336}