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authorMugunthan V N <mugunthanvnm@ti.com>2012-11-14 04:07:58 -0500
committerDavid S. Miller <davem@davemloft.net>2012-11-14 22:09:06 -0500
commit70384a6af0914d5dcec034643941e29d3e3e69f7 (patch)
treed99d36bdc56715a0b78e6f4adf1e0a75db72d5e7 /arch
parent71380f9bb18200ec65ddd2ef117410d1229e2de2 (diff)
ARM: OMAP3+: hwmod: Add AM33XX HWMOD data for davinci_mdio module
This patch adds hwmod entry for davinci MDIO module, creating parent<->child relationship between CPSW and MDIO module. This Parent-child relation is required in order to use common resources like, clock, but still maintaining the logical separation between them. CPGMAC SubSystem consist of various sub-modules, like, mdio, cpdma, cpsw, etc... These sub-modules are also used in some of Davinci family of devices, so separate and independent platform devices & drivers for CPSW and MDIO is implemented. In case of AM33XX, the resources are shared and common register bit-field is provided to control module/clock enable/disable, makes it difficult to handle common resources from both drivers. So the solution is, create parent<->child relationship between CPGMAC & MDIO modules. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Acked-by: Peter Korsgaard <jacmet@sunsite.dk> Acked-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_33xx_data.c31
1 files changed, 31 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
index 59d5c1cd316d..3125835dcaa5 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -674,6 +674,7 @@ static struct omap_hwmod am33xx_cpgmac0_hwmod = {
674 .name = "cpgmac0", 674 .name = "cpgmac0",
675 .class = &am33xx_cpgmac0_hwmod_class, 675 .class = &am33xx_cpgmac0_hwmod_class,
676 .clkdm_name = "cpsw_125mhz_clkdm", 676 .clkdm_name = "cpsw_125mhz_clkdm",
677 .flags = (HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY),
677 .mpu_irqs = am33xx_cpgmac0_irqs, 678 .mpu_irqs = am33xx_cpgmac0_irqs,
678 .main_clk = "cpsw_125mhz_gclk", 679 .main_clk = "cpsw_125mhz_gclk",
679 .prcm = { 680 .prcm = {
@@ -685,6 +686,20 @@ static struct omap_hwmod am33xx_cpgmac0_hwmod = {
685}; 686};
686 687
687/* 688/*
689 * mdio class
690 */
691static struct omap_hwmod_class am33xx_mdio_hwmod_class = {
692 .name = "davinci_mdio",
693};
694
695static struct omap_hwmod am33xx_mdio_hwmod = {
696 .name = "davinci_mdio",
697 .class = &am33xx_mdio_hwmod_class,
698 .clkdm_name = "cpsw_125mhz_clkdm",
699 .main_clk = "cpsw_125mhz_gclk",
700};
701
702/*
688 * dcan class 703 * dcan class
689 */ 704 */
690static struct omap_hwmod_class am33xx_dcan_hwmod_class = { 705static struct omap_hwmod_class am33xx_dcan_hwmod_class = {
@@ -2501,6 +2516,21 @@ static struct omap_hwmod_ocp_if am33xx_l4_hs__cpgmac0 = {
2501 .user = OCP_USER_MPU, 2516 .user = OCP_USER_MPU,
2502}; 2517};
2503 2518
2519struct omap_hwmod_addr_space am33xx_mdio_addr_space[] = {
2520 {
2521 .pa_start = 0x4A101000,
2522 .pa_end = 0x4A101000 + SZ_256 - 1,
2523 },
2524 { }
2525};
2526
2527struct omap_hwmod_ocp_if am33xx_cpgmac0__mdio = {
2528 .master = &am33xx_cpgmac0_hwmod,
2529 .slave = &am33xx_mdio_hwmod,
2530 .addr = am33xx_mdio_addr_space,
2531 .user = OCP_USER_MPU,
2532};
2533
2504static struct omap_hwmod_addr_space am33xx_elm_addr_space[] = { 2534static struct omap_hwmod_addr_space am33xx_elm_addr_space[] = {
2505 { 2535 {
2506 .pa_start = 0x48080000, 2536 .pa_start = 0x48080000,
@@ -3371,6 +3401,7 @@ static struct omap_hwmod_ocp_if *am33xx_hwmod_ocp_ifs[] __initdata = {
3371 &am33xx_l3_main__tptc2, 3401 &am33xx_l3_main__tptc2,
3372 &am33xx_l3_s__usbss, 3402 &am33xx_l3_s__usbss,
3373 &am33xx_l4_hs__cpgmac0, 3403 &am33xx_l4_hs__cpgmac0,
3404 &am33xx_cpgmac0__mdio,
3374 NULL, 3405 NULL,
3375}; 3406};
3376 3407