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authorIngo Molnar <mingo@elte.hu>2012-01-17 03:51:46 -0500
committerIngo Molnar <mingo@elte.hu>2012-01-17 03:51:46 -0500
commit6eadf1075c6f923fece419e38cf05bff559aefcd (patch)
treeb743ce0a3743d6f1b915b19b077a6d5bad980ea1 /arch
parenta1c611745c8c4e8996c1877d4e5d0fc95f227c38 (diff)
parentc10076c4304083af15a41f6bc5e657e781c1f9a6 (diff)
Merge branch 'tip/perf/urgent-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-trace into perf/urgent
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/Kconfig4
-rw-r--r--arch/arm/common/pl330.c116
-rw-r--r--arch/arm/configs/imx_v4_v5_defconfig12
-rw-r--r--arch/arm/mach-exynos/cpu.c5
-rw-r--r--arch/arm/mach-imx/Kconfig8
-rw-r--r--arch/arm/mach-imx/Makefile4
-rw-r--r--arch/arm/mach-imx/clock-imx35.c20
-rw-r--r--arch/arm/mach-imx/mach-cpuimx35.c8
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c4
-rw-r--r--arch/arm/mm/proc-v7.S6
-rw-r--r--arch/arm/plat-mxc/cpufreq.c2
-rw-r--r--arch/arm/plat-mxc/include/mach/uncompress.h1
-rw-r--r--arch/arm/plat-mxc/pwm.c9
-rw-r--r--arch/arm/plat-orion/gpio.c6
-rw-r--r--arch/arm/plat-samsung/include/plat/cpu-freq-core.h25
-rw-r--r--arch/ia64/include/asm/cputime.h1
-rw-r--r--arch/powerpc/include/asm/cputime.h2
-rw-r--r--arch/powerpc/include/asm/kvm_book3s.h33
-rw-r--r--arch/powerpc/include/asm/kvm_book3s_64.h33
-rw-r--r--arch/powerpc/kvm/book3s_hv.c2
-rw-r--r--arch/powerpc/kvm/book3s_pr.c2
-rw-r--r--arch/powerpc/kvm/e500.c1
-rw-r--r--arch/s390/include/asm/cputime.h2
-rw-r--r--arch/sparc/kernel/pci_sun4v.c4
-rw-r--r--arch/x86/kvm/i8254.c10
-rw-r--r--arch/x86/kvm/x86.c19
-rw-r--r--arch/x86/net/bpf_jit_comp.c4
27 files changed, 178 insertions, 165 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 776d76b8cb69..b259c7c644e3 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1246,7 +1246,7 @@ config PL310_ERRATA_588369
1246 1246
1247config ARM_ERRATA_720789 1247config ARM_ERRATA_720789
1248 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID" 1248 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1249 depends on CPU_V7 && SMP 1249 depends on CPU_V7
1250 help 1250 help
1251 This option enables the workaround for the 720789 Cortex-A9 (prior to 1251 This option enables the workaround for the 720789 Cortex-A9 (prior to
1252 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the 1252 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
@@ -1282,7 +1282,7 @@ config ARM_ERRATA_743622
1282 1282
1283config ARM_ERRATA_751472 1283config ARM_ERRATA_751472
1284 bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation" 1284 bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1285 depends on CPU_V7 && SMP 1285 depends on CPU_V7
1286 help 1286 help
1287 This option enables the workaround for the 751472 Cortex-A9 (prior 1287 This option enables the workaround for the 751472 Cortex-A9 (prior
1288 to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the 1288 to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
diff --git a/arch/arm/common/pl330.c b/arch/arm/common/pl330.c
index f407a6b35d3d..8d8df744f7a5 100644
--- a/arch/arm/common/pl330.c
+++ b/arch/arm/common/pl330.c
@@ -221,17 +221,6 @@
221 */ 221 */
222#define MCODE_BUFF_PER_REQ 256 222#define MCODE_BUFF_PER_REQ 256
223 223
224/*
225 * Mark a _pl330_req as free.
226 * We do it by writing DMAEND as the first instruction
227 * because no valid request is going to have DMAEND as
228 * its first instruction to execute.
229 */
230#define MARK_FREE(req) do { \
231 _emit_END(0, (req)->mc_cpu); \
232 (req)->mc_len = 0; \
233 } while (0)
234
235/* If the _pl330_req is available to the client */ 224/* If the _pl330_req is available to the client */
236#define IS_FREE(req) (*((u8 *)((req)->mc_cpu)) == CMD_DMAEND) 225#define IS_FREE(req) (*((u8 *)((req)->mc_cpu)) == CMD_DMAEND)
237 226
@@ -301,8 +290,10 @@ struct pl330_thread {
301 struct pl330_dmac *dmac; 290 struct pl330_dmac *dmac;
302 /* Only two at a time */ 291 /* Only two at a time */
303 struct _pl330_req req[2]; 292 struct _pl330_req req[2];
304 /* Index of the last submitted request */ 293 /* Index of the last enqueued request */
305 unsigned lstenq; 294 unsigned lstenq;
295 /* Index of the last submitted request or -1 if the DMA is stopped */
296 int req_running;
306}; 297};
307 298
308enum pl330_dmac_state { 299enum pl330_dmac_state {
@@ -778,6 +769,22 @@ static inline void _execute_DBGINSN(struct pl330_thread *thrd,
778 writel(0, regs + DBGCMD); 769 writel(0, regs + DBGCMD);
779} 770}
780 771
772/*
773 * Mark a _pl330_req as free.
774 * We do it by writing DMAEND as the first instruction
775 * because no valid request is going to have DMAEND as
776 * its first instruction to execute.
777 */
778static void mark_free(struct pl330_thread *thrd, int idx)
779{
780 struct _pl330_req *req = &thrd->req[idx];
781
782 _emit_END(0, req->mc_cpu);
783 req->mc_len = 0;
784
785 thrd->req_running = -1;
786}
787
781static inline u32 _state(struct pl330_thread *thrd) 788static inline u32 _state(struct pl330_thread *thrd)
782{ 789{
783 void __iomem *regs = thrd->dmac->pinfo->base; 790 void __iomem *regs = thrd->dmac->pinfo->base;
@@ -836,31 +843,6 @@ static inline u32 _state(struct pl330_thread *thrd)
836 } 843 }
837} 844}
838 845
839/* If the request 'req' of thread 'thrd' is currently active */
840static inline bool _req_active(struct pl330_thread *thrd,
841 struct _pl330_req *req)
842{
843 void __iomem *regs = thrd->dmac->pinfo->base;
844 u32 buf = req->mc_bus, pc = readl(regs + CPC(thrd->id));
845
846 if (IS_FREE(req))
847 return false;
848
849 return (pc >= buf && pc <= buf + req->mc_len) ? true : false;
850}
851
852/* Returns 0 if the thread is inactive, ID of active req + 1 otherwise */
853static inline unsigned _thrd_active(struct pl330_thread *thrd)
854{
855 if (_req_active(thrd, &thrd->req[0]))
856 return 1; /* First req active */
857
858 if (_req_active(thrd, &thrd->req[1]))
859 return 2; /* Second req active */
860
861 return 0;
862}
863
864static void _stop(struct pl330_thread *thrd) 846static void _stop(struct pl330_thread *thrd)
865{ 847{
866 void __iomem *regs = thrd->dmac->pinfo->base; 848 void __iomem *regs = thrd->dmac->pinfo->base;
@@ -892,17 +874,22 @@ static bool _trigger(struct pl330_thread *thrd)
892 struct _arg_GO go; 874 struct _arg_GO go;
893 unsigned ns; 875 unsigned ns;
894 u8 insn[6] = {0, 0, 0, 0, 0, 0}; 876 u8 insn[6] = {0, 0, 0, 0, 0, 0};
877 int idx;
895 878
896 /* Return if already ACTIVE */ 879 /* Return if already ACTIVE */
897 if (_state(thrd) != PL330_STATE_STOPPED) 880 if (_state(thrd) != PL330_STATE_STOPPED)
898 return true; 881 return true;
899 882
900 if (!IS_FREE(&thrd->req[1 - thrd->lstenq])) 883 idx = 1 - thrd->lstenq;
901 req = &thrd->req[1 - thrd->lstenq]; 884 if (!IS_FREE(&thrd->req[idx]))
902 else if (!IS_FREE(&thrd->req[thrd->lstenq])) 885 req = &thrd->req[idx];
903 req = &thrd->req[thrd->lstenq]; 886 else {
904 else 887 idx = thrd->lstenq;
905 req = NULL; 888 if (!IS_FREE(&thrd->req[idx]))
889 req = &thrd->req[idx];
890 else
891 req = NULL;
892 }
906 893
907 /* Return if no request */ 894 /* Return if no request */
908 if (!req || !req->r) 895 if (!req || !req->r)
@@ -933,6 +920,8 @@ static bool _trigger(struct pl330_thread *thrd)
933 /* Only manager can execute GO */ 920 /* Only manager can execute GO */
934 _execute_DBGINSN(thrd, insn, true); 921 _execute_DBGINSN(thrd, insn, true);
935 922
923 thrd->req_running = idx;
924
936 return true; 925 return true;
937} 926}
938 927
@@ -1382,8 +1371,8 @@ static void pl330_dotask(unsigned long data)
1382 1371
1383 thrd->req[0].r = NULL; 1372 thrd->req[0].r = NULL;
1384 thrd->req[1].r = NULL; 1373 thrd->req[1].r = NULL;
1385 MARK_FREE(&thrd->req[0]); 1374 mark_free(thrd, 0);
1386 MARK_FREE(&thrd->req[1]); 1375 mark_free(thrd, 1);
1387 1376
1388 /* Clear the reset flag */ 1377 /* Clear the reset flag */
1389 pl330->dmac_tbd.reset_chan &= ~(1 << i); 1378 pl330->dmac_tbd.reset_chan &= ~(1 << i);
@@ -1461,14 +1450,12 @@ int pl330_update(const struct pl330_info *pi)
1461 1450
1462 thrd = &pl330->channels[id]; 1451 thrd = &pl330->channels[id];
1463 1452
1464 active = _thrd_active(thrd); 1453 active = thrd->req_running;
1465 if (!active) /* Aborted */ 1454 if (active == -1) /* Aborted */
1466 continue; 1455 continue;
1467 1456
1468 active -= 1;
1469
1470 rqdone = &thrd->req[active]; 1457 rqdone = &thrd->req[active];
1471 MARK_FREE(rqdone); 1458 mark_free(thrd, active);
1472 1459
1473 /* Get going again ASAP */ 1460 /* Get going again ASAP */
1474 _start(thrd); 1461 _start(thrd);
@@ -1509,7 +1496,7 @@ int pl330_chan_ctrl(void *ch_id, enum pl330_chan_op op)
1509 struct pl330_thread *thrd = ch_id; 1496 struct pl330_thread *thrd = ch_id;
1510 struct pl330_dmac *pl330; 1497 struct pl330_dmac *pl330;
1511 unsigned long flags; 1498 unsigned long flags;
1512 int ret = 0, active; 1499 int ret = 0, active = thrd->req_running;
1513 1500
1514 if (!thrd || thrd->free || thrd->dmac->state == DYING) 1501 if (!thrd || thrd->free || thrd->dmac->state == DYING)
1515 return -EINVAL; 1502 return -EINVAL;
@@ -1525,28 +1512,24 @@ int pl330_chan_ctrl(void *ch_id, enum pl330_chan_op op)
1525 1512
1526 thrd->req[0].r = NULL; 1513 thrd->req[0].r = NULL;
1527 thrd->req[1].r = NULL; 1514 thrd->req[1].r = NULL;
1528 MARK_FREE(&thrd->req[0]); 1515 mark_free(thrd, 0);
1529 MARK_FREE(&thrd->req[1]); 1516 mark_free(thrd, 1);
1530 break; 1517 break;
1531 1518
1532 case PL330_OP_ABORT: 1519 case PL330_OP_ABORT:
1533 active = _thrd_active(thrd);
1534
1535 /* Make sure the channel is stopped */ 1520 /* Make sure the channel is stopped */
1536 _stop(thrd); 1521 _stop(thrd);
1537 1522
1538 /* ABORT is only for the active req */ 1523 /* ABORT is only for the active req */
1539 if (!active) 1524 if (active == -1)
1540 break; 1525 break;
1541 1526
1542 active--;
1543
1544 thrd->req[active].r = NULL; 1527 thrd->req[active].r = NULL;
1545 MARK_FREE(&thrd->req[active]); 1528 mark_free(thrd, active);
1546 1529
1547 /* Start the next */ 1530 /* Start the next */
1548 case PL330_OP_START: 1531 case PL330_OP_START:
1549 if (!_thrd_active(thrd) && !_start(thrd)) 1532 if ((active == -1) && !_start(thrd))
1550 ret = -EIO; 1533 ret = -EIO;
1551 break; 1534 break;
1552 1535
@@ -1587,14 +1570,13 @@ int pl330_chan_status(void *ch_id, struct pl330_chanstatus *pstatus)
1587 else 1570 else
1588 pstatus->faulting = false; 1571 pstatus->faulting = false;
1589 1572
1590 active = _thrd_active(thrd); 1573 active = thrd->req_running;
1591 1574
1592 if (!active) { 1575 if (active == -1) {
1593 /* Indicate that the thread is not running */ 1576 /* Indicate that the thread is not running */
1594 pstatus->top_req = NULL; 1577 pstatus->top_req = NULL;
1595 pstatus->wait_req = NULL; 1578 pstatus->wait_req = NULL;
1596 } else { 1579 } else {
1597 active--;
1598 pstatus->top_req = thrd->req[active].r; 1580 pstatus->top_req = thrd->req[active].r;
1599 pstatus->wait_req = !IS_FREE(&thrd->req[1 - active]) 1581 pstatus->wait_req = !IS_FREE(&thrd->req[1 - active])
1600 ? thrd->req[1 - active].r : NULL; 1582 ? thrd->req[1 - active].r : NULL;
@@ -1659,9 +1641,9 @@ void *pl330_request_channel(const struct pl330_info *pi)
1659 thrd->free = false; 1641 thrd->free = false;
1660 thrd->lstenq = 1; 1642 thrd->lstenq = 1;
1661 thrd->req[0].r = NULL; 1643 thrd->req[0].r = NULL;
1662 MARK_FREE(&thrd->req[0]); 1644 mark_free(thrd, 0);
1663 thrd->req[1].r = NULL; 1645 thrd->req[1].r = NULL;
1664 MARK_FREE(&thrd->req[1]); 1646 mark_free(thrd, 1);
1665 break; 1647 break;
1666 } 1648 }
1667 } 1649 }
@@ -1767,14 +1749,14 @@ static inline void _reset_thread(struct pl330_thread *thrd)
1767 thrd->req[0].mc_bus = pl330->mcode_bus 1749 thrd->req[0].mc_bus = pl330->mcode_bus
1768 + (thrd->id * pi->mcbufsz); 1750 + (thrd->id * pi->mcbufsz);
1769 thrd->req[0].r = NULL; 1751 thrd->req[0].r = NULL;
1770 MARK_FREE(&thrd->req[0]); 1752 mark_free(thrd, 0);
1771 1753
1772 thrd->req[1].mc_cpu = thrd->req[0].mc_cpu 1754 thrd->req[1].mc_cpu = thrd->req[0].mc_cpu
1773 + pi->mcbufsz / 2; 1755 + pi->mcbufsz / 2;
1774 thrd->req[1].mc_bus = thrd->req[0].mc_bus 1756 thrd->req[1].mc_bus = thrd->req[0].mc_bus
1775 + pi->mcbufsz / 2; 1757 + pi->mcbufsz / 2;
1776 thrd->req[1].r = NULL; 1758 thrd->req[1].r = NULL;
1777 MARK_FREE(&thrd->req[1]); 1759 mark_free(thrd, 1);
1778} 1760}
1779 1761
1780static int dmac_alloc_threads(struct pl330_dmac *pl330) 1762static int dmac_alloc_threads(struct pl330_dmac *pl330)
diff --git a/arch/arm/configs/imx_v4_v5_defconfig b/arch/arm/configs/imx_v4_v5_defconfig
index 11a4192197c8..cf497ce41dfe 100644
--- a/arch/arm/configs/imx_v4_v5_defconfig
+++ b/arch/arm/configs/imx_v4_v5_defconfig
@@ -18,9 +18,10 @@ CONFIG_ARCH_MXC=y
18CONFIG_ARCH_IMX_V4_V5=y 18CONFIG_ARCH_IMX_V4_V5=y
19CONFIG_ARCH_MX1ADS=y 19CONFIG_ARCH_MX1ADS=y
20CONFIG_MACH_SCB9328=y 20CONFIG_MACH_SCB9328=y
21CONFIG_MACH_APF9328=y
21CONFIG_MACH_MX21ADS=y 22CONFIG_MACH_MX21ADS=y
22CONFIG_MACH_MX25_3DS=y 23CONFIG_MACH_MX25_3DS=y
23CONFIG_MACH_EUKREA_CPUIMX25=y 24CONFIG_MACH_EUKREA_CPUIMX25SD=y
24CONFIG_MACH_MX27ADS=y 25CONFIG_MACH_MX27ADS=y
25CONFIG_MACH_PCM038=y 26CONFIG_MACH_PCM038=y
26CONFIG_MACH_CPUIMX27=y 27CONFIG_MACH_CPUIMX27=y
@@ -72,17 +73,16 @@ CONFIG_MTD_CFI_GEOMETRY=y
72CONFIG_MTD_CFI_INTELEXT=y 73CONFIG_MTD_CFI_INTELEXT=y
73CONFIG_MTD_PHYSMAP=y 74CONFIG_MTD_PHYSMAP=y
74CONFIG_MTD_NAND=y 75CONFIG_MTD_NAND=y
76CONFIG_MTD_NAND_MXC=y
75CONFIG_MTD_UBI=y 77CONFIG_MTD_UBI=y
76CONFIG_MISC_DEVICES=y 78CONFIG_MISC_DEVICES=y
77CONFIG_EEPROM_AT24=y 79CONFIG_EEPROM_AT24=y
78CONFIG_EEPROM_AT25=y 80CONFIG_EEPROM_AT25=y
79CONFIG_NETDEVICES=y 81CONFIG_NETDEVICES=y
80CONFIG_NET_ETHERNET=y
81CONFIG_SMC91X=y
82CONFIG_DM9000=y 82CONFIG_DM9000=y
83CONFIG_SMC91X=y
83CONFIG_SMC911X=y 84CONFIG_SMC911X=y
84# CONFIG_NETDEV_1000 is not set 85CONFIG_SMSC_PHY=y
85# CONFIG_NETDEV_10000 is not set
86# CONFIG_INPUT_MOUSEDEV is not set 86# CONFIG_INPUT_MOUSEDEV is not set
87CONFIG_INPUT_EVDEV=y 87CONFIG_INPUT_EVDEV=y
88# CONFIG_INPUT_KEYBOARD is not set 88# CONFIG_INPUT_KEYBOARD is not set
@@ -100,6 +100,7 @@ CONFIG_I2C_CHARDEV=y
100CONFIG_I2C_IMX=y 100CONFIG_I2C_IMX=y
101CONFIG_SPI=y 101CONFIG_SPI=y
102CONFIG_SPI_IMX=y 102CONFIG_SPI_IMX=y
103CONFIG_SPI_SPIDEV=y
103CONFIG_W1=y 104CONFIG_W1=y
104CONFIG_W1_MASTER_MXC=y 105CONFIG_W1_MASTER_MXC=y
105CONFIG_W1_SLAVE_THERM=y 106CONFIG_W1_SLAVE_THERM=y
@@ -139,6 +140,7 @@ CONFIG_MMC=y
139CONFIG_MMC_MXC=y 140CONFIG_MMC_MXC=y
140CONFIG_NEW_LEDS=y 141CONFIG_NEW_LEDS=y
141CONFIG_LEDS_CLASS=y 142CONFIG_LEDS_CLASS=y
143CONFIG_LEDS_GPIO=y
142CONFIG_LEDS_MC13783=y 144CONFIG_LEDS_MC13783=y
143CONFIG_LEDS_TRIGGERS=y 145CONFIG_LEDS_TRIGGERS=y
144CONFIG_LEDS_TRIGGER_TIMER=y 146CONFIG_LEDS_TRIGGER_TIMER=y
diff --git a/arch/arm/mach-exynos/cpu.c b/arch/arm/mach-exynos/cpu.c
index 90ec247f3b37..cc8d4bd6d0f7 100644
--- a/arch/arm/mach-exynos/cpu.c
+++ b/arch/arm/mach-exynos/cpu.c
@@ -111,11 +111,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
111 .length = SZ_4K, 111 .length = SZ_4K,
112 .type = MT_DEVICE, 112 .type = MT_DEVICE,
113 }, { 113 }, {
114 .virtual = (unsigned long)S5P_VA_SROMC,
115 .pfn = __phys_to_pfn(EXYNOS4_PA_SROMC),
116 .length = SZ_4K,
117 .type = MT_DEVICE,
118 }, {
119 .virtual = (unsigned long)S3C_VA_USB_HSPHY, 114 .virtual = (unsigned long)S3C_VA_USB_HSPHY,
120 .pfn = __phys_to_pfn(EXYNOS4_PA_HSPHY), 115 .pfn = __phys_to_pfn(EXYNOS4_PA_HSPHY),
121 .length = SZ_4K, 116 .length = SZ_4K,
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index c44aa974e79c..0e6f1af260b6 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -132,7 +132,7 @@ config MACH_MX25_3DS
132 select IMX_HAVE_PLATFORM_MXC_NAND 132 select IMX_HAVE_PLATFORM_MXC_NAND
133 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX 133 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
134 134
135config MACH_EUKREA_CPUIMX25 135config MACH_EUKREA_CPUIMX25SD
136 bool "Support Eukrea CPUIMX25 Platform" 136 bool "Support Eukrea CPUIMX25 Platform"
137 select SOC_IMX25 137 select SOC_IMX25
138 select IMX_HAVE_PLATFORM_FLEXCAN 138 select IMX_HAVE_PLATFORM_FLEXCAN
@@ -148,7 +148,7 @@ config MACH_EUKREA_CPUIMX25
148 148
149choice 149choice
150 prompt "Baseboard" 150 prompt "Baseboard"
151 depends on MACH_EUKREA_CPUIMX25 151 depends on MACH_EUKREA_CPUIMX25SD
152 default MACH_EUKREA_MBIMXSD25_BASEBOARD 152 default MACH_EUKREA_MBIMXSD25_BASEBOARD
153 153
154config MACH_EUKREA_MBIMXSD25_BASEBOARD 154config MACH_EUKREA_MBIMXSD25_BASEBOARD
@@ -542,7 +542,7 @@ config MACH_MX35_3DS
542 Include support for MX35PDK platform. This includes specific 542 Include support for MX35PDK platform. This includes specific
543 configurations for the board and its peripherals. 543 configurations for the board and its peripherals.
544 544
545config MACH_EUKREA_CPUIMX35 545config MACH_EUKREA_CPUIMX35SD
546 bool "Support Eukrea CPUIMX35 Platform" 546 bool "Support Eukrea CPUIMX35 Platform"
547 select SOC_IMX35 547 select SOC_IMX35
548 select IMX_HAVE_PLATFORM_FLEXCAN 548 select IMX_HAVE_PLATFORM_FLEXCAN
@@ -560,7 +560,7 @@ config MACH_EUKREA_CPUIMX35
560 560
561choice 561choice
562 prompt "Baseboard" 562 prompt "Baseboard"
563 depends on MACH_EUKREA_CPUIMX35 563 depends on MACH_EUKREA_CPUIMX35SD
564 default MACH_EUKREA_MBIMXSD35_BASEBOARD 564 default MACH_EUKREA_MBIMXSD35_BASEBOARD
565 565
566config MACH_EUKREA_MBIMXSD35_BASEBOARD 566config MACH_EUKREA_MBIMXSD35_BASEBOARD
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index aba73214c2a8..d97f409ce98b 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -24,7 +24,7 @@ obj-$(CONFIG_MACH_MX21ADS) += mach-mx21ads.o
24 24
25# i.MX25 based machines 25# i.MX25 based machines
26obj-$(CONFIG_MACH_MX25_3DS) += mach-mx25_3ds.o 26obj-$(CONFIG_MACH_MX25_3DS) += mach-mx25_3ds.o
27obj-$(CONFIG_MACH_EUKREA_CPUIMX25) += mach-eukrea_cpuimx25.o 27obj-$(CONFIG_MACH_EUKREA_CPUIMX25SD) += mach-eukrea_cpuimx25.o
28obj-$(CONFIG_MACH_EUKREA_MBIMXSD25_BASEBOARD) += eukrea_mbimxsd25-baseboard.o 28obj-$(CONFIG_MACH_EUKREA_MBIMXSD25_BASEBOARD) += eukrea_mbimxsd25-baseboard.o
29 29
30# i.MX27 based machines 30# i.MX27 based machines
@@ -57,7 +57,7 @@ obj-$(CONFIG_MACH_BUG) += mach-bug.o
57# i.MX35 based machines 57# i.MX35 based machines
58obj-$(CONFIG_MACH_PCM043) += mach-pcm043.o 58obj-$(CONFIG_MACH_PCM043) += mach-pcm043.o
59obj-$(CONFIG_MACH_MX35_3DS) += mach-mx35_3ds.o 59obj-$(CONFIG_MACH_MX35_3DS) += mach-mx35_3ds.o
60obj-$(CONFIG_MACH_EUKREA_CPUIMX35) += mach-cpuimx35.o 60obj-$(CONFIG_MACH_EUKREA_CPUIMX35SD) += mach-cpuimx35.o
61obj-$(CONFIG_MACH_EUKREA_MBIMXSD35_BASEBOARD) += eukrea_mbimxsd35-baseboard.o 61obj-$(CONFIG_MACH_EUKREA_MBIMXSD35_BASEBOARD) += eukrea_mbimxsd35-baseboard.o
62obj-$(CONFIG_MACH_VPR200) += mach-vpr200.o 62obj-$(CONFIG_MACH_VPR200) += mach-vpr200.o
63 63
diff --git a/arch/arm/mach-imx/clock-imx35.c b/arch/arm/mach-imx/clock-imx35.c
index 8116f119517d..ac8238caecb9 100644
--- a/arch/arm/mach-imx/clock-imx35.c
+++ b/arch/arm/mach-imx/clock-imx35.c
@@ -507,7 +507,7 @@ static struct clk_lookup lookups[] = {
507 507
508int __init mx35_clocks_init() 508int __init mx35_clocks_init()
509{ 509{
510 unsigned int cgr2 = 3 << 26, cgr3 = 0; 510 unsigned int cgr2 = 3 << 26;
511 511
512#if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC) 512#if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC)
513 cgr2 |= 3 << 16; 513 cgr2 |= 3 << 16;
@@ -521,6 +521,12 @@ int __init mx35_clocks_init()
521 __raw_writel((3 << 18), CCM_BASE + CCM_CGR0); 521 __raw_writel((3 << 18), CCM_BASE + CCM_CGR0);
522 __raw_writel((3 << 2) | (3 << 4) | (3 << 6) | (3 << 8) | (3 << 16), 522 __raw_writel((3 << 2) | (3 << 4) | (3 << 6) | (3 << 8) | (3 << 16),
523 CCM_BASE + CCM_CGR1); 523 CCM_BASE + CCM_CGR1);
524 __raw_writel(cgr2, CCM_BASE + CCM_CGR2);
525 __raw_writel(0, CCM_BASE + CCM_CGR3);
526
527 clk_enable(&iim_clk);
528 imx_print_silicon_rev("i.MX35", mx35_revision());
529 clk_disable(&iim_clk);
524 530
525 /* 531 /*
526 * Check if we came up in internal boot mode. If yes, we need some 532 * Check if we came up in internal boot mode. If yes, we need some
@@ -529,17 +535,11 @@ int __init mx35_clocks_init()
529 */ 535 */
530 if (!(__raw_readl(CCM_BASE + CCM_RCSR) & (3 << 10))) { 536 if (!(__raw_readl(CCM_BASE + CCM_RCSR) & (3 << 10))) {
531 /* Additionally turn on UART1, SCC, and IIM clocks */ 537 /* Additionally turn on UART1, SCC, and IIM clocks */
532 cgr2 |= 3 << 16 | 3 << 4; 538 clk_enable(&iim_clk);
533 cgr3 |= 3 << 2; 539 clk_enable(&uart1_clk);
540 clk_enable(&scc_clk);
534 } 541 }
535 542
536 __raw_writel(cgr2, CCM_BASE + CCM_CGR2);
537 __raw_writel(cgr3, CCM_BASE + CCM_CGR3);
538
539 clk_enable(&iim_clk);
540 imx_print_silicon_rev("i.MX35", mx35_revision());
541 clk_disable(&iim_clk);
542
543#ifdef CONFIG_MXC_USE_EPIT 543#ifdef CONFIG_MXC_USE_EPIT
544 epit_timer_init(&epit1_clk, 544 epit_timer_init(&epit1_clk,
545 MX35_IO_ADDRESS(MX35_EPIT1_BASE_ADDR), MX35_INT_EPIT1); 545 MX35_IO_ADDRESS(MX35_EPIT1_BASE_ADDR), MX35_INT_EPIT1);
diff --git a/arch/arm/mach-imx/mach-cpuimx35.c b/arch/arm/mach-imx/mach-cpuimx35.c
index 66af2e8f7e57..362aae780601 100644
--- a/arch/arm/mach-imx/mach-cpuimx35.c
+++ b/arch/arm/mach-imx/mach-cpuimx35.c
@@ -53,12 +53,18 @@ static const struct imxi2c_platform_data
53 .bitrate = 100000, 53 .bitrate = 100000,
54}; 54};
55 55
56#define TSC2007_IRQGPIO IMX_GPIO_NR(3, 2)
57static int tsc2007_get_pendown_state(void)
58{
59 return !gpio_get_value(TSC2007_IRQGPIO);
60}
61
56static struct tsc2007_platform_data tsc2007_info = { 62static struct tsc2007_platform_data tsc2007_info = {
57 .model = 2007, 63 .model = 2007,
58 .x_plate_ohms = 180, 64 .x_plate_ohms = 180,
65 .get_pendown_state = tsc2007_get_pendown_state,
59}; 66};
60 67
61#define TSC2007_IRQGPIO IMX_GPIO_NR(3, 2)
62static struct i2c_board_info eukrea_cpuimx35_i2c_devices[] = { 68static struct i2c_board_info eukrea_cpuimx35_i2c_devices[] = {
63 { 69 {
64 I2C_BOARD_INFO("pcf8563", 0x51), 70 I2C_BOARD_INFO("pcf8563", 0x51),
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 7f8915ad5099..eef43e2e163e 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -3247,18 +3247,14 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
3247 3247
3248/* 3430ES1-only hwmods */ 3248/* 3430ES1-only hwmods */
3249static __initdata struct omap_hwmod *omap3430es1_hwmods[] = { 3249static __initdata struct omap_hwmod *omap3430es1_hwmods[] = {
3250 &omap3xxx_iva_hwmod,
3251 &omap3430es1_dss_core_hwmod, 3250 &omap3430es1_dss_core_hwmod,
3252 &omap3xxx_mailbox_hwmod,
3253 NULL 3251 NULL
3254}; 3252};
3255 3253
3256/* 3430ES2+-only hwmods */ 3254/* 3430ES2+-only hwmods */
3257static __initdata struct omap_hwmod *omap3430es2plus_hwmods[] = { 3255static __initdata struct omap_hwmod *omap3430es2plus_hwmods[] = {
3258 &omap3xxx_iva_hwmod,
3259 &omap3xxx_dss_core_hwmod, 3256 &omap3xxx_dss_core_hwmod,
3260 &omap3xxx_usbhsotg_hwmod, 3257 &omap3xxx_usbhsotg_hwmod,
3261 &omap3xxx_mailbox_hwmod,
3262 NULL 3258 NULL
3263}; 3259};
3264 3260
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 2c559ac38142..e70a73731eaa 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -363,11 +363,13 @@ __v7_setup:
363 orreq r10, r10, #1 << 6 @ set bit #6 363 orreq r10, r10, #1 << 6 @ set bit #6
364 mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register 364 mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register
365#endif 365#endif
366#ifdef CONFIG_ARM_ERRATA_751472 366#if defined(CONFIG_ARM_ERRATA_751472) && defined(CONFIG_SMP)
367 cmp r6, #0x30 @ present prior to r3p0 367 ALT_SMP(cmp r6, #0x30) @ present prior to r3p0
368 ALT_UP_B(1f)
368 mrclt p15, 0, r10, c15, c0, 1 @ read diagnostic register 369 mrclt p15, 0, r10, c15, c0, 1 @ read diagnostic register
369 orrlt r10, r10, #1 << 11 @ set bit #11 370 orrlt r10, r10, #1 << 11 @ set bit #11
370 mcrlt p15, 0, r10, c15, c0, 1 @ write diagnostic register 371 mcrlt p15, 0, r10, c15, c0, 1 @ write diagnostic register
3721:
371#endif 373#endif
372 374
3733: mov r10, #0 3753: mov r10, #0
diff --git a/arch/arm/plat-mxc/cpufreq.c b/arch/arm/plat-mxc/cpufreq.c
index adbff706ef6f..73db34bf588a 100644
--- a/arch/arm/plat-mxc/cpufreq.c
+++ b/arch/arm/plat-mxc/cpufreq.c
@@ -98,7 +98,7 @@ static int mxc_set_target(struct cpufreq_policy *policy,
98 return ret; 98 return ret;
99} 99}
100 100
101static int __init mxc_cpufreq_init(struct cpufreq_policy *policy) 101static int mxc_cpufreq_init(struct cpufreq_policy *policy)
102{ 102{
103 int ret; 103 int ret;
104 int i; 104 int i;
diff --git a/arch/arm/plat-mxc/include/mach/uncompress.h b/arch/arm/plat-mxc/include/mach/uncompress.h
index 88fd40452567..477971b00930 100644
--- a/arch/arm/plat-mxc/include/mach/uncompress.h
+++ b/arch/arm/plat-mxc/include/mach/uncompress.h
@@ -98,6 +98,7 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id)
98 case MACH_TYPE_PCM043: 98 case MACH_TYPE_PCM043:
99 case MACH_TYPE_LILLY1131: 99 case MACH_TYPE_LILLY1131:
100 case MACH_TYPE_VPR200: 100 case MACH_TYPE_VPR200:
101 case MACH_TYPE_EUKREA_CPUIMX35SD:
101 uart_base = MX3X_UART1_BASE_ADDR; 102 uart_base = MX3X_UART1_BASE_ADDR;
102 break; 103 break;
103 case MACH_TYPE_MAGX_ZN5: 104 case MACH_TYPE_MAGX_ZN5:
diff --git a/arch/arm/plat-mxc/pwm.c b/arch/arm/plat-mxc/pwm.c
index 845de59f07ed..e032717f7d02 100644
--- a/arch/arm/plat-mxc/pwm.c
+++ b/arch/arm/plat-mxc/pwm.c
@@ -77,6 +77,15 @@ int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns)
77 do_div(c, period_ns); 77 do_div(c, period_ns);
78 duty_cycles = c; 78 duty_cycles = c;
79 79
80 /*
81 * according to imx pwm RM, the real period value should be
82 * PERIOD value in PWMPR plus 2.
83 */
84 if (period_cycles > 2)
85 period_cycles -= 2;
86 else
87 period_cycles = 0;
88
80 writel(duty_cycles, pwm->mmio_base + MX3_PWMSAR); 89 writel(duty_cycles, pwm->mmio_base + MX3_PWMSAR);
81 writel(period_cycles, pwm->mmio_base + MX3_PWMPR); 90 writel(period_cycles, pwm->mmio_base + MX3_PWMPR);
82 91
diff --git a/arch/arm/plat-orion/gpio.c b/arch/arm/plat-orion/gpio.c
index 41ab97ebe4cf..10d160888133 100644
--- a/arch/arm/plat-orion/gpio.c
+++ b/arch/arm/plat-orion/gpio.c
@@ -384,12 +384,16 @@ void __init orion_gpio_init(int gpio_base, int ngpio,
384 struct orion_gpio_chip *ochip; 384 struct orion_gpio_chip *ochip;
385 struct irq_chip_generic *gc; 385 struct irq_chip_generic *gc;
386 struct irq_chip_type *ct; 386 struct irq_chip_type *ct;
387 char gc_label[16];
387 388
388 if (orion_gpio_chip_count == ARRAY_SIZE(orion_gpio_chips)) 389 if (orion_gpio_chip_count == ARRAY_SIZE(orion_gpio_chips))
389 return; 390 return;
390 391
392 snprintf(gc_label, sizeof(gc_label), "orion_gpio%d",
393 orion_gpio_chip_count);
394
391 ochip = orion_gpio_chips + orion_gpio_chip_count; 395 ochip = orion_gpio_chips + orion_gpio_chip_count;
392 ochip->chip.label = "orion_gpio"; 396 ochip->chip.label = kstrdup(gc_label, GFP_KERNEL);
393 ochip->chip.request = orion_gpio_request; 397 ochip->chip.request = orion_gpio_request;
394 ochip->chip.direction_input = orion_gpio_direction_input; 398 ochip->chip.direction_input = orion_gpio_direction_input;
395 ochip->chip.get = orion_gpio_get; 399 ochip->chip.get = orion_gpio_get;
diff --git a/arch/arm/plat-samsung/include/plat/cpu-freq-core.h b/arch/arm/plat-samsung/include/plat/cpu-freq-core.h
index dac4760c0f0a..95509d8eb140 100644
--- a/arch/arm/plat-samsung/include/plat/cpu-freq-core.h
+++ b/arch/arm/plat-samsung/include/plat/cpu-freq-core.h
@@ -202,14 +202,6 @@ extern int s3c_plltab_register(struct cpufreq_frequency_table *plls,
202extern struct s3c_cpufreq_config *s3c_cpufreq_getconfig(void); 202extern struct s3c_cpufreq_config *s3c_cpufreq_getconfig(void);
203extern struct s3c_iotimings *s3c_cpufreq_getiotimings(void); 203extern struct s3c_iotimings *s3c_cpufreq_getiotimings(void);
204 204
205extern void s3c2410_iotiming_debugfs(struct seq_file *seq,
206 struct s3c_cpufreq_config *cfg,
207 union s3c_iobank *iob);
208
209extern void s3c2412_iotiming_debugfs(struct seq_file *seq,
210 struct s3c_cpufreq_config *cfg,
211 union s3c_iobank *iob);
212
213#ifdef CONFIG_CPU_FREQ_S3C24XX_DEBUGFS 205#ifdef CONFIG_CPU_FREQ_S3C24XX_DEBUGFS
214#define s3c_cpufreq_debugfs_call(x) x 206#define s3c_cpufreq_debugfs_call(x) x
215#else 207#else
@@ -226,6 +218,10 @@ extern void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg);
226extern void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg); 218extern void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg);
227 219
228#ifdef CONFIG_S3C2410_IOTIMING 220#ifdef CONFIG_S3C2410_IOTIMING
221extern void s3c2410_iotiming_debugfs(struct seq_file *seq,
222 struct s3c_cpufreq_config *cfg,
223 union s3c_iobank *iob);
224
229extern int s3c2410_iotiming_calc(struct s3c_cpufreq_config *cfg, 225extern int s3c2410_iotiming_calc(struct s3c_cpufreq_config *cfg,
230 struct s3c_iotimings *iot); 226 struct s3c_iotimings *iot);
231 227
@@ -235,6 +231,7 @@ extern int s3c2410_iotiming_get(struct s3c_cpufreq_config *cfg,
235extern void s3c2410_iotiming_set(struct s3c_cpufreq_config *cfg, 231extern void s3c2410_iotiming_set(struct s3c_cpufreq_config *cfg,
236 struct s3c_iotimings *iot); 232 struct s3c_iotimings *iot);
237#else 233#else
234#define s3c2410_iotiming_debugfs NULL
238#define s3c2410_iotiming_calc NULL 235#define s3c2410_iotiming_calc NULL
239#define s3c2410_iotiming_get NULL 236#define s3c2410_iotiming_get NULL
240#define s3c2410_iotiming_set NULL 237#define s3c2410_iotiming_set NULL
@@ -242,8 +239,10 @@ extern void s3c2410_iotiming_set(struct s3c_cpufreq_config *cfg,
242 239
243/* S3C2412 compatible routines */ 240/* S3C2412 compatible routines */
244 241
245extern int s3c2412_iotiming_get(struct s3c_cpufreq_config *cfg, 242#ifdef CONFIG_S3C2412_IOTIMING
246 struct s3c_iotimings *timings); 243extern void s3c2412_iotiming_debugfs(struct seq_file *seq,
244 struct s3c_cpufreq_config *cfg,
245 union s3c_iobank *iob);
247 246
248extern int s3c2412_iotiming_get(struct s3c_cpufreq_config *cfg, 247extern int s3c2412_iotiming_get(struct s3c_cpufreq_config *cfg,
249 struct s3c_iotimings *timings); 248 struct s3c_iotimings *timings);
@@ -253,6 +252,12 @@ extern int s3c2412_iotiming_calc(struct s3c_cpufreq_config *cfg,
253 252
254extern void s3c2412_iotiming_set(struct s3c_cpufreq_config *cfg, 253extern void s3c2412_iotiming_set(struct s3c_cpufreq_config *cfg,
255 struct s3c_iotimings *iot); 254 struct s3c_iotimings *iot);
255#else
256#define s3c2412_iotiming_debugfs NULL
257#define s3c2412_iotiming_calc NULL
258#define s3c2412_iotiming_get NULL
259#define s3c2412_iotiming_set NULL
260#endif /* CONFIG_S3C2412_IOTIMING */
256 261
257#ifdef CONFIG_CPU_FREQ_S3C24XX_DEBUG 262#ifdef CONFIG_CPU_FREQ_S3C24XX_DEBUG
258#define s3c_freq_dbg(x...) printk(KERN_INFO x) 263#define s3c_freq_dbg(x...) printk(KERN_INFO x)
diff --git a/arch/ia64/include/asm/cputime.h b/arch/ia64/include/asm/cputime.h
index 6073b187528a..5a274af31b2b 100644
--- a/arch/ia64/include/asm/cputime.h
+++ b/arch/ia64/include/asm/cputime.h
@@ -60,6 +60,7 @@ typedef u64 cputime64_t;
60 */ 60 */
61#define cputime_to_usecs(__ct) ((__ct) / NSEC_PER_USEC) 61#define cputime_to_usecs(__ct) ((__ct) / NSEC_PER_USEC)
62#define usecs_to_cputime(__usecs) ((__usecs) * NSEC_PER_USEC) 62#define usecs_to_cputime(__usecs) ((__usecs) * NSEC_PER_USEC)
63#define usecs_to_cputime64(__usecs) usecs_to_cputime(__usecs)
63 64
64/* 65/*
65 * Convert cputime <-> seconds 66 * Convert cputime <-> seconds
diff --git a/arch/powerpc/include/asm/cputime.h b/arch/powerpc/include/asm/cputime.h
index 1cf20bdfbeca..98b7c4b49c9d 100644
--- a/arch/powerpc/include/asm/cputime.h
+++ b/arch/powerpc/include/asm/cputime.h
@@ -150,6 +150,8 @@ static inline cputime_t usecs_to_cputime(const unsigned long us)
150 return ct; 150 return ct;
151} 151}
152 152
153#define usecs_to_cputime64(us) usecs_to_cputime(us)
154
153/* 155/*
154 * Convert cputime <-> seconds 156 * Convert cputime <-> seconds
155 */ 157 */
diff --git a/arch/powerpc/include/asm/kvm_book3s.h b/arch/powerpc/include/asm/kvm_book3s.h
index d4df013ad779..69c7377d2071 100644
--- a/arch/powerpc/include/asm/kvm_book3s.h
+++ b/arch/powerpc/include/asm/kvm_book3s.h
@@ -381,39 +381,6 @@ static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu)
381} 381}
382#endif 382#endif
383 383
384static inline unsigned long compute_tlbie_rb(unsigned long v, unsigned long r,
385 unsigned long pte_index)
386{
387 unsigned long rb, va_low;
388
389 rb = (v & ~0x7fUL) << 16; /* AVA field */
390 va_low = pte_index >> 3;
391 if (v & HPTE_V_SECONDARY)
392 va_low = ~va_low;
393 /* xor vsid from AVA */
394 if (!(v & HPTE_V_1TB_SEG))
395 va_low ^= v >> 12;
396 else
397 va_low ^= v >> 24;
398 va_low &= 0x7ff;
399 if (v & HPTE_V_LARGE) {
400 rb |= 1; /* L field */
401 if (cpu_has_feature(CPU_FTR_ARCH_206) &&
402 (r & 0xff000)) {
403 /* non-16MB large page, must be 64k */
404 /* (masks depend on page size) */
405 rb |= 0x1000; /* page encoding in LP field */
406 rb |= (va_low & 0x7f) << 16; /* 7b of VA in AVA/LP field */
407 rb |= (va_low & 0xfe); /* AVAL field (P7 doesn't seem to care) */
408 }
409 } else {
410 /* 4kB page */
411 rb |= (va_low & 0x7ff) << 12; /* remaining 11b of VA */
412 }
413 rb |= (v >> 54) & 0x300; /* B field */
414 return rb;
415}
416
417/* Magic register values loaded into r3 and r4 before the 'sc' assembly 384/* Magic register values loaded into r3 and r4 before the 'sc' assembly
418 * instruction for the OSI hypercalls */ 385 * instruction for the OSI hypercalls */
419#define OSI_SC_MAGIC_R3 0x113724FA 386#define OSI_SC_MAGIC_R3 0x113724FA
diff --git a/arch/powerpc/include/asm/kvm_book3s_64.h b/arch/powerpc/include/asm/kvm_book3s_64.h
index e43fe42b9875..d0ac94f98f9e 100644
--- a/arch/powerpc/include/asm/kvm_book3s_64.h
+++ b/arch/powerpc/include/asm/kvm_book3s_64.h
@@ -29,4 +29,37 @@ static inline struct kvmppc_book3s_shadow_vcpu *to_svcpu(struct kvm_vcpu *vcpu)
29 29
30#define SPAPR_TCE_SHIFT 12 30#define SPAPR_TCE_SHIFT 12
31 31
32static inline unsigned long compute_tlbie_rb(unsigned long v, unsigned long r,
33 unsigned long pte_index)
34{
35 unsigned long rb, va_low;
36
37 rb = (v & ~0x7fUL) << 16; /* AVA field */
38 va_low = pte_index >> 3;
39 if (v & HPTE_V_SECONDARY)
40 va_low = ~va_low;
41 /* xor vsid from AVA */
42 if (!(v & HPTE_V_1TB_SEG))
43 va_low ^= v >> 12;
44 else
45 va_low ^= v >> 24;
46 va_low &= 0x7ff;
47 if (v & HPTE_V_LARGE) {
48 rb |= 1; /* L field */
49 if (cpu_has_feature(CPU_FTR_ARCH_206) &&
50 (r & 0xff000)) {
51 /* non-16MB large page, must be 64k */
52 /* (masks depend on page size) */
53 rb |= 0x1000; /* page encoding in LP field */
54 rb |= (va_low & 0x7f) << 16; /* 7b of VA in AVA/LP field */
55 rb |= (va_low & 0xfe); /* AVAL field (P7 doesn't seem to care) */
56 }
57 } else {
58 /* 4kB page */
59 rb |= (va_low & 0x7ff) << 12; /* remaining 11b of VA */
60 }
61 rb |= (v >> 54) & 0x300; /* B field */
62 return rb;
63}
64
32#endif /* __ASM_KVM_BOOK3S_64_H__ */ 65#endif /* __ASM_KVM_BOOK3S_64_H__ */
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 0cb137a9b038..336983da9e72 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -538,7 +538,7 @@ static void kvmppc_start_thread(struct kvm_vcpu *vcpu)
538 tpaca->kvm_hstate.napping = 0; 538 tpaca->kvm_hstate.napping = 0;
539 vcpu->cpu = vc->pcpu; 539 vcpu->cpu = vc->pcpu;
540 smp_wmb(); 540 smp_wmb();
541#ifdef CONFIG_PPC_ICP_NATIVE 541#if defined(CONFIG_PPC_ICP_NATIVE) && defined(CONFIG_SMP)
542 if (vcpu->arch.ptid) { 542 if (vcpu->arch.ptid) {
543 tpaca->cpu_start = 0x80; 543 tpaca->cpu_start = 0x80;
544 wmb(); 544 wmb();
diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c
index 3c791e1eb675..e2cfb9e1e20e 100644
--- a/arch/powerpc/kvm/book3s_pr.c
+++ b/arch/powerpc/kvm/book3s_pr.c
@@ -658,10 +658,12 @@ program_interrupt:
658 ulong cmd = kvmppc_get_gpr(vcpu, 3); 658 ulong cmd = kvmppc_get_gpr(vcpu, 3);
659 int i; 659 int i;
660 660
661#ifdef CONFIG_KVM_BOOK3S_64_PR
661 if (kvmppc_h_pr(vcpu, cmd) == EMULATE_DONE) { 662 if (kvmppc_h_pr(vcpu, cmd) == EMULATE_DONE) {
662 r = RESUME_GUEST; 663 r = RESUME_GUEST;
663 break; 664 break;
664 } 665 }
666#endif
665 667
666 run->papr_hcall.nr = cmd; 668 run->papr_hcall.nr = cmd;
667 for (i = 0; i < 9; ++i) { 669 for (i = 0; i < 9; ++i) {
diff --git a/arch/powerpc/kvm/e500.c b/arch/powerpc/kvm/e500.c
index 26d20903f2bc..8c0d45a6faf7 100644
--- a/arch/powerpc/kvm/e500.c
+++ b/arch/powerpc/kvm/e500.c
@@ -15,6 +15,7 @@
15#include <linux/kvm_host.h> 15#include <linux/kvm_host.h>
16#include <linux/slab.h> 16#include <linux/slab.h>
17#include <linux/err.h> 17#include <linux/err.h>
18#include <linux/export.h>
18 19
19#include <asm/reg.h> 20#include <asm/reg.h>
20#include <asm/cputable.h> 21#include <asm/cputable.h>
diff --git a/arch/s390/include/asm/cputime.h b/arch/s390/include/asm/cputime.h
index 081434878296..b9acaaa175d8 100644
--- a/arch/s390/include/asm/cputime.h
+++ b/arch/s390/include/asm/cputime.h
@@ -87,6 +87,8 @@ usecs_to_cputime(const unsigned int m)
87 return (cputime_t) m * 4096; 87 return (cputime_t) m * 4096;
88} 88}
89 89
90#define usecs_to_cputime64(m) usecs_to_cputime(m)
91
90/* 92/*
91 * Convert cputime to milliseconds and back. 93 * Convert cputime to milliseconds and back.
92 */ 94 */
diff --git a/arch/sparc/kernel/pci_sun4v.c b/arch/sparc/kernel/pci_sun4v.c
index b272cda35a01..af5755d20fbe 100644
--- a/arch/sparc/kernel/pci_sun4v.c
+++ b/arch/sparc/kernel/pci_sun4v.c
@@ -849,10 +849,10 @@ static int pci_sun4v_msiq_build_irq(struct pci_pbm_info *pbm,
849 if (!irq) 849 if (!irq)
850 return -ENOMEM; 850 return -ENOMEM;
851 851
852 if (pci_sun4v_msiq_setstate(pbm->devhandle, msiqid, HV_MSIQSTATE_IDLE))
853 return -EINVAL;
854 if (pci_sun4v_msiq_setvalid(pbm->devhandle, msiqid, HV_MSIQ_VALID)) 852 if (pci_sun4v_msiq_setvalid(pbm->devhandle, msiqid, HV_MSIQ_VALID))
855 return -EINVAL; 853 return -EINVAL;
854 if (pci_sun4v_msiq_setstate(pbm->devhandle, msiqid, HV_MSIQSTATE_IDLE))
855 return -EINVAL;
856 856
857 return irq; 857 return irq;
858} 858}
diff --git a/arch/x86/kvm/i8254.c b/arch/x86/kvm/i8254.c
index 76e3f1cd0369..405f2620392f 100644
--- a/arch/x86/kvm/i8254.c
+++ b/arch/x86/kvm/i8254.c
@@ -338,11 +338,15 @@ static enum hrtimer_restart pit_timer_fn(struct hrtimer *data)
338 return HRTIMER_NORESTART; 338 return HRTIMER_NORESTART;
339} 339}
340 340
341static void create_pit_timer(struct kvm_kpit_state *ps, u32 val, int is_period) 341static void create_pit_timer(struct kvm *kvm, u32 val, int is_period)
342{ 342{
343 struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state;
343 struct kvm_timer *pt = &ps->pit_timer; 344 struct kvm_timer *pt = &ps->pit_timer;
344 s64 interval; 345 s64 interval;
345 346
347 if (!irqchip_in_kernel(kvm))
348 return;
349
346 interval = muldiv64(val, NSEC_PER_SEC, KVM_PIT_FREQ); 350 interval = muldiv64(val, NSEC_PER_SEC, KVM_PIT_FREQ);
347 351
348 pr_debug("create pit timer, interval is %llu nsec\n", interval); 352 pr_debug("create pit timer, interval is %llu nsec\n", interval);
@@ -394,13 +398,13 @@ static void pit_load_count(struct kvm *kvm, int channel, u32 val)
394 /* FIXME: enhance mode 4 precision */ 398 /* FIXME: enhance mode 4 precision */
395 case 4: 399 case 4:
396 if (!(ps->flags & KVM_PIT_FLAGS_HPET_LEGACY)) { 400 if (!(ps->flags & KVM_PIT_FLAGS_HPET_LEGACY)) {
397 create_pit_timer(ps, val, 0); 401 create_pit_timer(kvm, val, 0);
398 } 402 }
399 break; 403 break;
400 case 2: 404 case 2:
401 case 3: 405 case 3:
402 if (!(ps->flags & KVM_PIT_FLAGS_HPET_LEGACY)){ 406 if (!(ps->flags & KVM_PIT_FLAGS_HPET_LEGACY)){
403 create_pit_timer(ps, val, 1); 407 create_pit_timer(kvm, val, 1);
404 } 408 }
405 break; 409 break;
406 default: 410 default:
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index c38efd7b792e..4c938da2ba00 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -602,7 +602,6 @@ static void update_cpuid(struct kvm_vcpu *vcpu)
602{ 602{
603 struct kvm_cpuid_entry2 *best; 603 struct kvm_cpuid_entry2 *best;
604 struct kvm_lapic *apic = vcpu->arch.apic; 604 struct kvm_lapic *apic = vcpu->arch.apic;
605 u32 timer_mode_mask;
606 605
607 best = kvm_find_cpuid_entry(vcpu, 1, 0); 606 best = kvm_find_cpuid_entry(vcpu, 1, 0);
608 if (!best) 607 if (!best)
@@ -615,15 +614,12 @@ static void update_cpuid(struct kvm_vcpu *vcpu)
615 best->ecx |= bit(X86_FEATURE_OSXSAVE); 614 best->ecx |= bit(X86_FEATURE_OSXSAVE);
616 } 615 }
617 616
618 if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && 617 if (apic) {
619 best->function == 0x1) { 618 if (best->ecx & bit(X86_FEATURE_TSC_DEADLINE_TIMER))
620 best->ecx |= bit(X86_FEATURE_TSC_DEADLINE_TIMER); 619 apic->lapic_timer.timer_mode_mask = 3 << 17;
621 timer_mode_mask = 3 << 17; 620 else
622 } else 621 apic->lapic_timer.timer_mode_mask = 1 << 17;
623 timer_mode_mask = 1 << 17; 622 }
624
625 if (apic)
626 apic->lapic_timer.timer_mode_mask = timer_mode_mask;
627} 623}
628 624
629int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4) 625int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
@@ -2135,6 +2131,9 @@ int kvm_dev_ioctl_check_extension(long ext)
2135 case KVM_CAP_TSC_CONTROL: 2131 case KVM_CAP_TSC_CONTROL:
2136 r = kvm_has_tsc_control; 2132 r = kvm_has_tsc_control;
2137 break; 2133 break;
2134 case KVM_CAP_TSC_DEADLINE_TIMER:
2135 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2136 break;
2138 default: 2137 default:
2139 r = 0; 2138 r = 0;
2140 break; 2139 break;
diff --git a/arch/x86/net/bpf_jit_comp.c b/arch/x86/net/bpf_jit_comp.c
index bfab3fa10edc..7b65f752c5f8 100644
--- a/arch/x86/net/bpf_jit_comp.c
+++ b/arch/x86/net/bpf_jit_comp.c
@@ -568,8 +568,8 @@ cond_branch: f_offset = addrs[i + filter[i].jf] - addrs[i];
568 break; 568 break;
569 } 569 }
570 if (filter[i].jt != 0) { 570 if (filter[i].jt != 0) {
571 if (filter[i].jf) 571 if (filter[i].jf && f_offset)
572 t_offset += is_near(f_offset) ? 2 : 6; 572 t_offset += is_near(f_offset) ? 2 : 5;
573 EMIT_COND_JMP(t_op, t_offset); 573 EMIT_COND_JMP(t_op, t_offset);
574 if (filter[i].jf) 574 if (filter[i].jf)
575 EMIT_JMP(f_offset); 575 EMIT_JMP(f_offset);