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authorIngo Molnar <mingo@elte.hu>2009-04-20 12:08:07 -0400
committerIngo Molnar <mingo@elte.hu>2009-04-20 12:08:12 -0400
commit62d170290979e0bb805d969cca4ea852bdd45260 (patch)
tree837372297501a2d144358b44e7db3f88c5612aa2 /arch
parent8b5b94e4e9813cdd77103827f48d58c806ab45c6 (diff)
parentd91dfbb41bb2e9bdbfbd2cc7078ed7436eab027a (diff)
Merge branch 'linus' into x86/urgent
Merge reason: We need the x86/uv updates from upstream, to queue up dependent fix. Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch')
-rw-r--r--arch/Kconfig3
-rw-r--r--arch/arm/common/vic.c9
-rw-r--r--arch/arm/configs/imx27ads_defconfig826
-rw-r--r--arch/arm/configs/magician_defconfig6
-rw-r--r--arch/arm/configs/mx1_defconfig (renamed from arch/arm/configs/pcm037_defconfig)534
-rw-r--r--arch/arm/configs/mx27_defconfig (renamed from arch/arm/configs/pcm038_defconfig)354
-rw-r--r--arch/arm/configs/mx3_defconfig (renamed from arch/arm/configs/mx31litekit_defconfig)783
-rw-r--r--arch/arm/configs/s3c2410_defconfig1112
-rw-r--r--arch/arm/include/asm/sizes.h1
-rw-r--r--arch/arm/include/asm/tlb.h25
-rw-r--r--arch/arm/kernel/sys_oabi-compat.c1
-rw-r--r--arch/arm/mach-at91/include/mach/board.h2
-rw-r--r--arch/arm/mach-ep93xx/core.c2
-rw-r--r--arch/arm/mach-mx1/mx1ads.c6
-rw-r--r--arch/arm/mach-mx2/clock_imx21.c8
-rw-r--r--arch/arm/mach-mx3/Kconfig2
-rw-r--r--arch/arm/mach-mx3/mx31ads.c4
-rw-r--r--arch/arm/mach-mx3/pcm037.c4
-rw-r--r--arch/arm/mach-mx3/qong.c28
-rw-r--r--arch/arm/mach-omap1/clock.c21
-rw-r--r--arch/arm/mach-omap2/usb-musb.c8
-rw-r--r--arch/arm/mach-pxa/Kconfig9
-rw-r--r--arch/arm/mach-pxa/Makefile1
-rw-r--r--arch/arm/mach-pxa/cm-x2xx.c2
-rw-r--r--arch/arm/mach-pxa/colibri-pxa300.c11
-rw-r--r--arch/arm/mach-pxa/colibri-pxa320.c10
-rw-r--r--arch/arm/mach-pxa/colibri-pxa3xx.c35
-rw-r--r--arch/arm/mach-pxa/csb701.c5
-rw-r--r--arch/arm/mach-pxa/e740.c2
-rw-r--r--arch/arm/mach-pxa/e750.c2
-rw-r--r--arch/arm/mach-pxa/e800.c2
-rw-r--r--arch/arm/mach-pxa/em-x270.c90
-rw-r--r--arch/arm/mach-pxa/generic.h3
-rw-r--r--arch/arm/mach-pxa/include/mach/colibri.h11
-rw-r--r--arch/arm/mach-pxa/include/mach/magician.h4
-rw-r--r--arch/arm/mach-pxa/include/mach/palmld.h1
-rw-r--r--arch/arm/mach-pxa/include/mach/palmt5.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/palmte2.h68
-rw-r--r--arch/arm/mach-pxa/include/mach/palmtx.h3
-rw-r--r--arch/arm/mach-pxa/magician.c84
-rw-r--r--arch/arm/mach-pxa/mioa701.c6
-rw-r--r--arch/arm/mach-pxa/palmld.c36
-rw-r--r--arch/arm/mach-pxa/palmt5.c46
-rw-r--r--arch/arm/mach-pxa/palmte2.c466
-rw-r--r--arch/arm/mach-pxa/palmtx.c46
-rw-r--r--arch/arm/mach-pxa/tosa.c2
-rw-r--r--arch/arm/mach-s3c2412/mach-jive.c5
-rw-r--r--arch/arm/mach-s3c2440/mach-anubis.c2
-rw-r--r--arch/arm/mach-s3c2440/mach-osiris.c1
-rw-r--r--arch/arm/mach-s3c6410/mach-smdk6410.c4
-rw-r--r--arch/arm/mm/mmu.c11
-rw-r--r--arch/arm/plat-mxc/include/mach/imx-uart.h2
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-mx3.h48
-rw-r--r--arch/arm/plat-mxc/include/mach/irqs.h2
-rw-r--r--arch/arm/plat-mxc/include/mach/mx21.h3
-rw-r--r--arch/arm/plat-mxc/irq.c14
-rw-r--r--arch/arm/plat-s3c/gpio-config.c3
-rw-r--r--arch/arm/plat-s3c/include/plat/devs.h1
-rw-r--r--arch/arm/plat-s3c24xx/adc.c19
-rw-r--r--arch/arm/plat-s3c24xx/gpiolib.c2
-rw-r--r--arch/frv/include/asm/Kbuild5
-rw-r--r--arch/frv/include/asm/atomic.h198
-rw-r--r--arch/frv/include/asm/auxvec.h4
-rw-r--r--arch/frv/include/asm/ax88796.h22
-rw-r--r--arch/frv/include/asm/bitops.h412
-rw-r--r--arch/frv/include/asm/bug.h53
-rw-r--r--arch/frv/include/asm/bugs.h14
-rw-r--r--arch/frv/include/asm/busctl-regs.h41
-rw-r--r--arch/frv/include/asm/byteorder.h6
-rw-r--r--arch/frv/include/asm/cache.h23
-rw-r--r--arch/frv/include/asm/cacheflush.h104
-rw-r--r--arch/frv/include/asm/checksum.h180
-rw-r--r--arch/frv/include/asm/cpu-irqs.h81
-rw-r--r--arch/frv/include/asm/cpumask.h6
-rw-r--r--arch/frv/include/asm/cputime.h6
-rw-r--r--arch/frv/include/asm/current.h30
-rw-r--r--arch/frv/include/asm/delay.h50
-rw-r--r--arch/frv/include/asm/device.h7
-rw-r--r--arch/frv/include/asm/div64.h1
-rw-r--r--arch/frv/include/asm/dm9000.h37
-rw-r--r--arch/frv/include/asm/dma-mapping.h174
-rw-r--r--arch/frv/include/asm/dma.h125
-rw-r--r--arch/frv/include/asm/elf.h142
-rw-r--r--arch/frv/include/asm/emergency-restart.h6
-rw-r--r--arch/frv/include/asm/errno.h7
-rw-r--r--arch/frv/include/asm/fb.h12
-rw-r--r--arch/frv/include/asm/fcntl.h1
-rw-r--r--arch/frv/include/asm/fpu.h11
-rw-r--r--arch/frv/include/asm/ftrace.h1
-rw-r--r--arch/frv/include/asm/futex.h19
-rw-r--r--arch/frv/include/asm/gdb-stub.h140
-rw-r--r--arch/frv/include/asm/gpio-regs.h116
-rw-r--r--arch/frv/include/asm/hardirq.h35
-rw-r--r--arch/frv/include/asm/highmem.h182
-rw-r--r--arch/frv/include/asm/hw_irq.h16
-rw-r--r--arch/frv/include/asm/init.h12
-rw-r--r--arch/frv/include/asm/io.h392
-rw-r--r--arch/frv/include/asm/ioctl.h1
-rw-r--r--arch/frv/include/asm/ioctls.h86
-rw-r--r--arch/frv/include/asm/ipcbuf.h30
-rw-r--r--arch/frv/include/asm/irc-regs.h53
-rw-r--r--arch/frv/include/asm/irq.h30
-rw-r--r--arch/frv/include/asm/irq_regs.h27
-rw-r--r--arch/frv/include/asm/kdebug.h1
-rw-r--r--arch/frv/include/asm/kmap_types.h29
-rw-r--r--arch/frv/include/asm/linkage.h7
-rw-r--r--arch/frv/include/asm/local.h6
-rw-r--r--arch/frv/include/asm/math-emu.h301
-rw-r--r--arch/frv/include/asm/mb-regs.h200
-rw-r--r--arch/frv/include/asm/mb86943a.h42
-rw-r--r--arch/frv/include/asm/mb93091-fpga-irqs.h42
-rw-r--r--arch/frv/include/asm/mb93093-fpga-irqs.h29
-rw-r--r--arch/frv/include/asm/mb93493-irqs.h50
-rw-r--r--arch/frv/include/asm/mb93493-regs.h281
-rw-r--r--arch/frv/include/asm/mc146818rtc.h16
-rw-r--r--arch/frv/include/asm/mem-layout.h86
-rw-r--r--arch/frv/include/asm/mman.h18
-rw-r--r--arch/frv/include/asm/mmu.h41
-rw-r--r--arch/frv/include/asm/mmu_context.h50
-rw-r--r--arch/frv/include/asm/module.h28
-rw-r--r--arch/frv/include/asm/msgbuf.h32
-rw-r--r--arch/frv/include/asm/mutex.h9
-rw-r--r--arch/frv/include/asm/page.h78
-rw-r--r--arch/frv/include/asm/param.h22
-rw-r--r--arch/frv/include/asm/pci.h118
-rw-r--r--arch/frv/include/asm/percpu.h6
-rw-r--r--arch/frv/include/asm/pgalloc.h69
-rw-r--r--arch/frv/include/asm/pgtable.h549
-rw-r--r--arch/frv/include/asm/poll.h12
-rw-r--r--arch/frv/include/asm/posix_types.h62
-rw-r--r--arch/frv/include/asm/processor.h153
-rw-r--r--arch/frv/include/asm/ptrace.h83
-rw-r--r--arch/frv/include/asm/registers.h232
-rw-r--r--arch/frv/include/asm/resource.h7
-rw-r--r--arch/frv/include/asm/scatterlist.h46
-rw-r--r--arch/frv/include/asm/sections.h46
-rw-r--r--arch/frv/include/asm/segment.h45
-rw-r--r--arch/frv/include/asm/sembuf.h26
-rw-r--r--arch/frv/include/asm/serial-regs.h44
-rw-r--r--arch/frv/include/asm/serial.h18
-rw-r--r--arch/frv/include/asm/setup.h31
-rw-r--r--arch/frv/include/asm/shmbuf.h43
-rw-r--r--arch/frv/include/asm/shmparam.h7
-rw-r--r--arch/frv/include/asm/sigcontext.h26
-rw-r--r--arch/frv/include/asm/siginfo.h12
-rw-r--r--arch/frv/include/asm/signal.h161
-rw-r--r--arch/frv/include/asm/smp.h9
-rw-r--r--arch/frv/include/asm/socket.h61
-rw-r--r--arch/frv/include/asm/sockios.h14
-rw-r--r--arch/frv/include/asm/spinlock.h17
-rw-r--r--arch/frv/include/asm/spr-regs.h416
-rw-r--r--arch/frv/include/asm/stat.h100
-rw-r--r--arch/frv/include/asm/statfs.h7
-rw-r--r--arch/frv/include/asm/string.h51
-rw-r--r--arch/frv/include/asm/suspend.h20
-rw-r--r--arch/frv/include/asm/swab.h10
-rw-r--r--arch/frv/include/asm/system.h301
-rw-r--r--arch/frv/include/asm/termbits.h202
-rw-r--r--arch/frv/include/asm/termios.h58
-rw-r--r--arch/frv/include/asm/thread_info.h144
-rw-r--r--arch/frv/include/asm/timer-regs.h106
-rw-r--r--arch/frv/include/asm/timex.h20
-rw-r--r--arch/frv/include/asm/tlb.h27
-rw-r--r--arch/frv/include/asm/tlbflush.h73
-rw-r--r--arch/frv/include/asm/topology.h12
-rw-r--r--arch/frv/include/asm/types.h40
-rw-r--r--arch/frv/include/asm/uaccess.h321
-rw-r--r--arch/frv/include/asm/ucontext.h12
-rw-r--r--arch/frv/include/asm/unaligned.h22
-rw-r--r--arch/frv/include/asm/unistd.h382
-rw-r--r--arch/frv/include/asm/user.h80
-rw-r--r--arch/frv/include/asm/vga.h17
-rw-r--r--arch/frv/include/asm/virtconvert.h41
-rw-r--r--arch/frv/include/asm/xor.h1
-rw-r--r--arch/h8300/include/asm/timer.h25
-rw-r--r--arch/ia64/include/asm/unistd.h4
-rw-r--r--arch/ia64/kernel/entry.S2
-rw-r--r--arch/ia64/kernel/pci-swiotlb.c2
-rw-r--r--arch/m32r/include/asm/Kbuild1
-rw-r--r--arch/m32r/include/asm/addrspace.h57
-rw-r--r--arch/m32r/include/asm/assembler.h229
-rw-r--r--arch/m32r/include/asm/atomic.h318
-rw-r--r--arch/m32r/include/asm/auxvec.h4
-rw-r--r--arch/m32r/include/asm/bitops.h275
-rw-r--r--arch/m32r/include/asm/bug.h4
-rw-r--r--arch/m32r/include/asm/bugs.h19
-rw-r--r--arch/m32r/include/asm/byteorder.h10
-rw-r--r--arch/m32r/include/asm/cache.h8
-rw-r--r--arch/m32r/include/asm/cachectl.h26
-rw-r--r--arch/m32r/include/asm/cacheflush.h69
-rw-r--r--arch/m32r/include/asm/checksum.h204
-rw-r--r--arch/m32r/include/asm/cputime.h6
-rw-r--r--arch/m32r/include/asm/current.h15
-rw-r--r--arch/m32r/include/asm/delay.h26
-rw-r--r--arch/m32r/include/asm/device.h7
-rw-r--r--arch/m32r/include/asm/div64.h1
-rw-r--r--arch/m32r/include/asm/dma.h12
-rw-r--r--arch/m32r/include/asm/elf.h134
-rw-r--r--arch/m32r/include/asm/emergency-restart.h6
-rw-r--r--arch/m32r/include/asm/errno.h6
-rw-r--r--arch/m32r/include/asm/fb.h19
-rw-r--r--arch/m32r/include/asm/fcntl.h1
-rw-r--r--arch/m32r/include/asm/flat.h146
-rw-r--r--arch/m32r/include/asm/ftrace.h1
-rw-r--r--arch/m32r/include/asm/futex.h6
-rw-r--r--arch/m32r/include/asm/hardirq.h36
-rw-r--r--arch/m32r/include/asm/hw_irq.h4
-rw-r--r--arch/m32r/include/asm/io.h200
-rw-r--r--arch/m32r/include/asm/ioctl.h1
-rw-r--r--arch/m32r/include/asm/ioctls.h87
-rw-r--r--arch/m32r/include/asm/ipcbuf.h29
-rw-r--r--arch/m32r/include/asm/irq.h90
-rw-r--r--arch/m32r/include/asm/irq_regs.h1
-rw-r--r--arch/m32r/include/asm/kdebug.h1
-rw-r--r--arch/m32r/include/asm/kmap_types.h29
-rw-r--r--arch/m32r/include/asm/linkage.h7
-rw-r--r--arch/m32r/include/asm/local.h366
-rw-r--r--arch/m32r/include/asm/m32102.h314
-rw-r--r--arch/m32r/include/asm/m32104ut/m32104ut_pld.h161
-rw-r--r--arch/m32r/include/asm/m32700ut/m32700ut_lan.h103
-rw-r--r--arch/m32r/include/asm/m32700ut/m32700ut_lcd.h55
-rw-r--r--arch/m32r/include/asm/m32700ut/m32700ut_pld.h259
-rw-r--r--arch/m32r/include/asm/m32r.h160
-rw-r--r--arch/m32r/include/asm/m32r_mp_fpga.h313
-rw-r--r--arch/m32r/include/asm/mappi2/mappi2_pld.h150
-rw-r--r--arch/m32r/include/asm/mappi3/mappi3_pld.h142
-rw-r--r--arch/m32r/include/asm/mc146818rtc.h29
-rw-r--r--arch/m32r/include/asm/mman.h17
-rw-r--r--arch/m32r/include/asm/mmu.h21
-rw-r--r--arch/m32r/include/asm/mmu_context.h164
-rw-r--r--arch/m32r/include/asm/mmzone.h59
-rw-r--r--arch/m32r/include/asm/module.h10
-rw-r--r--arch/m32r/include/asm/msgbuf.h31
-rw-r--r--arch/m32r/include/asm/mutex.h9
-rw-r--r--arch/m32r/include/asm/opsput/opsput_lan.h52
-rw-r--r--arch/m32r/include/asm/opsput/opsput_lcd.h55
-rw-r--r--arch/m32r/include/asm/opsput/opsput_pld.h255
-rw-r--r--arch/m32r/include/asm/page.h87
-rw-r--r--arch/m32r/include/asm/param.h23
-rw-r--r--arch/m32r/include/asm/pci.h8
-rw-r--r--arch/m32r/include/asm/percpu.h6
-rw-r--r--arch/m32r/include/asm/pgalloc.h76
-rw-r--r--arch/m32r/include/asm/pgtable-2level.h78
-rw-r--r--arch/m32r/include/asm/pgtable.h363
-rw-r--r--arch/m32r/include/asm/poll.h1
-rw-r--r--arch/m32r/include/asm/posix_types.h118
-rw-r--r--arch/m32r/include/asm/processor.h147
-rw-r--r--arch/m32r/include/asm/ptrace.h148
-rw-r--r--arch/m32r/include/asm/resource.h6
-rw-r--r--arch/m32r/include/asm/rtc.h65
-rw-r--r--arch/m32r/include/asm/s1d13806.h199
-rw-r--r--arch/m32r/include/asm/scatterlist.h21
-rw-r--r--arch/m32r/include/asm/sections.h7
-rw-r--r--arch/m32r/include/asm/segment.h10
-rw-r--r--arch/m32r/include/asm/sembuf.h25
-rw-r--r--arch/m32r/include/asm/serial.h9
-rw-r--r--arch/m32r/include/asm/setup.h38
-rw-r--r--arch/m32r/include/asm/shmbuf.h42
-rw-r--r--arch/m32r/include/asm/shmparam.h6
-rw-r--r--arch/m32r/include/asm/sigcontext.h39
-rw-r--r--arch/m32r/include/asm/siginfo.h6
-rw-r--r--arch/m32r/include/asm/signal.h166
-rw-r--r--arch/m32r/include/asm/smp.h119
-rw-r--r--arch/m32r/include/asm/socket.h60
-rw-r--r--arch/m32r/include/asm/sockios.h13
-rw-r--r--arch/m32r/include/asm/spinlock.h326
-rw-r--r--arch/m32r/include/asm/spinlock_types.h23
-rw-r--r--arch/m32r/include/asm/stat.h87
-rw-r--r--arch/m32r/include/asm/statfs.h6
-rw-r--r--arch/m32r/include/asm/string.h13
-rw-r--r--arch/m32r/include/asm/swab.h10
-rw-r--r--arch/m32r/include/asm/syscall.h8
-rw-r--r--arch/m32r/include/asm/system.h431
-rw-r--r--arch/m32r/include/asm/termbits.h199
-rw-r--r--arch/m32r/include/asm/termios.h91
-rw-r--r--arch/m32r/include/asm/thread_info.h184
-rw-r--r--arch/m32r/include/asm/timex.h27
-rw-r--r--arch/m32r/include/asm/tlb.h20
-rw-r--r--arch/m32r/include/asm/tlbflush.h97
-rw-r--r--arch/m32r/include/asm/topology.h6
-rw-r--r--arch/m32r/include/asm/types.h30
-rw-r--r--arch/m32r/include/asm/uaccess.h693
-rw-r--r--arch/m32r/include/asm/ucontext.h12
-rw-r--r--arch/m32r/include/asm/unaligned.h18
-rw-r--r--arch/m32r/include/asm/unistd.h389
-rw-r--r--arch/m32r/include/asm/user.h52
-rw-r--r--arch/m32r/include/asm/vga.h20
-rw-r--r--arch/m32r/include/asm/xor.h6
-rw-r--r--arch/microblaze/Kconfig141
-rw-r--r--arch/microblaze/Kconfig.debug26
-rw-r--r--arch/microblaze/Makefile69
-rw-r--r--arch/microblaze/boot/Makefile17
-rw-r--r--arch/microblaze/configs/nommu_defconfig (renamed from arch/arm/configs/mx31ads_defconfig)561
-rw-r--r--arch/microblaze/include/asm/Kbuild26
-rw-r--r--arch/microblaze/include/asm/atomic.h123
-rw-r--r--arch/microblaze/include/asm/auxvec.h1
-rw-r--r--arch/microblaze/include/asm/bitops.h27
-rw-r--r--arch/microblaze/include/asm/bug.h15
-rw-r--r--arch/microblaze/include/asm/bugs.h17
-rw-r--r--arch/microblaze/include/asm/byteorder.h6
-rw-r--r--arch/microblaze/include/asm/cache.h45
-rw-r--r--arch/microblaze/include/asm/cacheflush.h85
-rw-r--r--arch/microblaze/include/asm/checksum.h98
-rw-r--r--arch/microblaze/include/asm/clinkage.h1
-rw-r--r--arch/microblaze/include/asm/cpuinfo.h102
-rw-r--r--arch/microblaze/include/asm/cputable.h1
-rw-r--r--arch/microblaze/include/asm/cputime.h1
-rw-r--r--arch/microblaze/include/asm/current.h21
-rw-r--r--arch/microblaze/include/asm/delay.h72
-rw-r--r--arch/microblaze/include/asm/device.h21
-rw-r--r--arch/microblaze/include/asm/div64.h1
-rw-r--r--arch/microblaze/include/asm/dma-mapping.h129
-rw-r--r--arch/microblaze/include/asm/dma.h16
-rw-r--r--arch/microblaze/include/asm/elf.h30
-rw-r--r--arch/microblaze/include/asm/emergency-restart.h1
-rw-r--r--arch/microblaze/include/asm/entry.h35
-rw-r--r--arch/microblaze/include/asm/errno.h1
-rw-r--r--arch/microblaze/include/asm/exceptions.h96
-rw-r--r--arch/microblaze/include/asm/fcntl.h1
-rw-r--r--arch/microblaze/include/asm/flat.h90
-rw-r--r--arch/microblaze/include/asm/ftrace.h1
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-rw-r--r--arch/x86/include/asm/io.h6
-rw-r--r--arch/x86/include/asm/lguest_hcall.h2
-rw-r--r--arch/x86/include/asm/paravirt.h4
-rw-r--r--arch/x86/include/asm/processor.h6
-rw-r--r--arch/x86/include/asm/required-features.h2
-rw-r--r--arch/x86/include/asm/sigcontext.h6
-rw-r--r--arch/x86/include/asm/uv/uv_mmrs.h5
-rw-r--r--arch/x86/include/asm/xen/page.h3
-rw-r--r--arch/x86/include/asm/xsave.h3
-rw-r--r--arch/x86/kernel/apic/apic.c6
-rw-r--r--arch/x86/kernel/apic/x2apic_uv_x.c16
-rw-r--r--arch/x86/kernel/bios_uv.c3
-rw-r--r--arch/x86/kernel/cpu/addon_cpuid_features.c1
-rw-r--r--arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c81
-rw-r--r--arch/x86/kernel/cpu/cpufreq/longhaul.c1
-rw-r--r--arch/x86/kernel/ftrace.c2
-rw-r--r--arch/x86/kernel/microcode_core.c33
-rw-r--r--arch/x86/kernel/mpparse.c7
-rw-r--r--arch/x86/kernel/ptrace.c3
-rw-r--r--arch/x86/kernel/tlb_uv.c189
-rw-r--r--arch/x86/kernel/uv_sysfs.c4
-rw-r--r--arch/x86/kernel/xsave.c2
-rw-r--r--arch/x86/lguest/boot.c16
-rw-r--r--arch/x86/mm/ioremap.c23
-rw-r--r--arch/x86/mm/pat.c2
-rw-r--r--arch/x86/mm/pgtable.c3
-rw-r--r--arch/x86/xen/enlighten.c89
-rw-r--r--arch/x86/xen/mmu.c118
-rw-r--r--arch/x86/xen/mmu.h3
-rw-r--r--arch/x86/xen/smp.c4
-rw-r--r--arch/x86/xen/xen-ops.h2
692 files changed, 46421 insertions, 2694 deletions
diff --git a/arch/Kconfig b/arch/Kconfig
index dc81b34c5d82..78a35e9dc104 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -109,3 +109,6 @@ config HAVE_CLK
109 109
110config HAVE_DMA_API_DEBUG 110config HAVE_DMA_API_DEBUG
111 bool 111 bool
112
113config HAVE_DEFAULT_NO_SPIN_MUTEXES
114 bool
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
index ecf0bfbab107..b2a781d9ce05 100644
--- a/arch/arm/common/vic.c
+++ b/arch/arm/common/vic.c
@@ -85,12 +85,11 @@ void __init vic_init(void __iomem *base, unsigned int irq_start,
85 writel(32, base + VIC_PL190_DEF_VECT_ADDR); 85 writel(32, base + VIC_PL190_DEF_VECT_ADDR);
86 86
87 for (i = 0; i < 32; i++) { 87 for (i = 0; i < 32; i++) {
88 unsigned int irq = irq_start + i;
89
90 set_irq_chip(irq, &vic_chip);
91 set_irq_chip_data(irq, base);
92
93 if (vic_sources & (1 << i)) { 88 if (vic_sources & (1 << i)) {
89 unsigned int irq = irq_start + i;
90
91 set_irq_chip(irq, &vic_chip);
92 set_irq_chip_data(irq, base);
94 set_irq_handler(irq, handle_level_irq); 93 set_irq_handler(irq, handle_level_irq);
95 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 94 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
96 } 95 }
diff --git a/arch/arm/configs/imx27ads_defconfig b/arch/arm/configs/imx27ads_defconfig
deleted file mode 100644
index bcd95b8dd2df..000000000000
--- a/arch/arm/configs/imx27ads_defconfig
+++ /dev/null
@@ -1,826 +0,0 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.26-rc6
4# Fri Jun 20 16:29:34 2008
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y
10CONFIG_GENERIC_CLOCKEVENTS=y
11CONFIG_MMU=y
12# CONFIG_NO_IOPORT is not set
13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_STACKTRACE_SUPPORT=y
15CONFIG_LOCKDEP_SUPPORT=y
16CONFIG_TRACE_IRQFLAGS_SUPPORT=y
17CONFIG_HARDIRQS_SW_RESEND=y
18CONFIG_GENERIC_IRQ_PROBE=y
19CONFIG_RWSEM_GENERIC_SPINLOCK=y
20# CONFIG_ARCH_HAS_ILOG2_U32 is not set
21# CONFIG_ARCH_HAS_ILOG2_U64 is not set
22CONFIG_GENERIC_HWEIGHT=y
23CONFIG_GENERIC_CALIBRATE_DELAY=y
24CONFIG_ARCH_SUPPORTS_AOUT=y
25CONFIG_ZONE_DMA=y
26CONFIG_ARCH_MTD_XIP=y
27CONFIG_VECTORS_BASE=0xffff0000
28CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
29
30#
31# General setup
32#
33CONFIG_EXPERIMENTAL=y
34CONFIG_BROKEN_ON_SMP=y
35CONFIG_LOCK_KERNEL=y
36CONFIG_INIT_ENV_ARG_LIMIT=32
37CONFIG_LOCALVERSION=""
38CONFIG_LOCALVERSION_AUTO=y
39# CONFIG_SWAP is not set
40CONFIG_SYSVIPC=y
41CONFIG_SYSVIPC_SYSCTL=y
42CONFIG_POSIX_MQUEUE=y
43# CONFIG_BSD_PROCESS_ACCT is not set
44# CONFIG_TASKSTATS is not set
45# CONFIG_AUDIT is not set
46# CONFIG_IKCONFIG is not set
47CONFIG_LOG_BUF_SHIFT=14
48# CONFIG_CGROUPS is not set
49# CONFIG_GROUP_SCHED is not set
50CONFIG_SYSFS_DEPRECATED=y
51CONFIG_SYSFS_DEPRECATED_V2=y
52# CONFIG_RELAY is not set
53# CONFIG_NAMESPACES is not set
54# CONFIG_BLK_DEV_INITRD is not set
55# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
56CONFIG_SYSCTL=y
57CONFIG_EMBEDDED=y
58CONFIG_UID16=y
59CONFIG_SYSCTL_SYSCALL=y
60CONFIG_SYSCTL_SYSCALL_CHECK=y
61CONFIG_KALLSYMS=y
62CONFIG_KALLSYMS_EXTRA_PASS=y
63CONFIG_HOTPLUG=y
64CONFIG_PRINTK=y
65CONFIG_BUG=y
66CONFIG_ELF_CORE=y
67CONFIG_COMPAT_BRK=y
68CONFIG_BASE_FULL=y
69CONFIG_FUTEX=y
70CONFIG_ANON_INODES=y
71CONFIG_EPOLL=y
72CONFIG_SIGNALFD=y
73CONFIG_TIMERFD=y
74CONFIG_EVENTFD=y
75CONFIG_SHMEM=y
76CONFIG_VM_EVENT_COUNTERS=y
77CONFIG_SLAB=y
78# CONFIG_SLUB is not set
79# CONFIG_SLOB is not set
80# CONFIG_PROFILING is not set
81# CONFIG_MARKERS is not set
82CONFIG_HAVE_OPROFILE=y
83# CONFIG_KPROBES is not set
84CONFIG_HAVE_KPROBES=y
85CONFIG_HAVE_KRETPROBES=y
86# CONFIG_HAVE_DMA_ATTRS is not set
87CONFIG_PROC_PAGE_MONITOR=y
88CONFIG_SLABINFO=y
89CONFIG_RT_MUTEXES=y
90# CONFIG_TINY_SHMEM is not set
91CONFIG_BASE_SMALL=0
92CONFIG_MODULES=y
93# CONFIG_MODULE_FORCE_LOAD is not set
94CONFIG_MODULE_UNLOAD=y
95# CONFIG_MODULE_FORCE_UNLOAD is not set
96# CONFIG_MODVERSIONS is not set
97# CONFIG_MODULE_SRCVERSION_ALL is not set
98# CONFIG_KMOD is not set
99CONFIG_BLOCK=y
100# CONFIG_LBD is not set
101# CONFIG_BLK_DEV_IO_TRACE is not set
102# CONFIG_LSF is not set
103# CONFIG_BLK_DEV_BSG is not set
104
105#
106# IO Schedulers
107#
108CONFIG_IOSCHED_NOOP=y
109# CONFIG_IOSCHED_AS is not set
110# CONFIG_IOSCHED_DEADLINE is not set
111# CONFIG_IOSCHED_CFQ is not set
112# CONFIG_DEFAULT_AS is not set
113# CONFIG_DEFAULT_DEADLINE is not set
114# CONFIG_DEFAULT_CFQ is not set
115CONFIG_DEFAULT_NOOP=y
116CONFIG_DEFAULT_IOSCHED="noop"
117CONFIG_CLASSIC_RCU=y
118
119#
120# System Type
121#
122# CONFIG_ARCH_AAEC2000 is not set
123# CONFIG_ARCH_INTEGRATOR is not set
124# CONFIG_ARCH_REALVIEW is not set
125# CONFIG_ARCH_VERSATILE is not set
126# CONFIG_ARCH_AT91 is not set
127# CONFIG_ARCH_CLPS7500 is not set
128# CONFIG_ARCH_CLPS711X is not set
129# CONFIG_ARCH_CO285 is not set
130# CONFIG_ARCH_EBSA110 is not set
131# CONFIG_ARCH_EP93XX is not set
132# CONFIG_ARCH_FOOTBRIDGE is not set
133# CONFIG_ARCH_NETX is not set
134# CONFIG_ARCH_H720X is not set
135# CONFIG_ARCH_IMX is not set
136# CONFIG_ARCH_IOP13XX is not set
137# CONFIG_ARCH_IOP32X is not set
138# CONFIG_ARCH_IOP33X is not set
139# CONFIG_ARCH_IXP23XX is not set
140# CONFIG_ARCH_IXP2000 is not set
141# CONFIG_ARCH_IXP4XX is not set
142# CONFIG_ARCH_L7200 is not set
143# CONFIG_ARCH_KS8695 is not set
144# CONFIG_ARCH_NS9XXX is not set
145CONFIG_ARCH_MXC=y
146# CONFIG_ARCH_ORION5X is not set
147# CONFIG_ARCH_PNX4008 is not set
148# CONFIG_ARCH_PXA is not set
149# CONFIG_ARCH_RPC is not set
150# CONFIG_ARCH_SA1100 is not set
151# CONFIG_ARCH_S3C2410 is not set
152# CONFIG_ARCH_SHARK is not set
153# CONFIG_ARCH_LH7A40X is not set
154# CONFIG_ARCH_DAVINCI is not set
155# CONFIG_ARCH_OMAP is not set
156# CONFIG_ARCH_MSM7X00A is not set
157
158#
159# Boot options
160#
161
162#
163# Power management
164#
165
166#
167# Freescale MXC Implementations
168#
169CONFIG_ARCH_MX2=y
170# CONFIG_ARCH_MX3 is not set
171
172#
173# MX2 family CPU support
174#
175CONFIG_MACH_MX27=y
176
177#
178# MX2 Platforms
179#
180CONFIG_MACH_MX27ADS=y
181# CONFIG_MACH_PCM038 is not set
182
183#
184# Processor Type
185#
186CONFIG_CPU_32=y
187CONFIG_CPU_ARM926T=y
188CONFIG_CPU_32v5=y
189CONFIG_CPU_ABRT_EV5TJ=y
190CONFIG_CPU_PABRT_NOIFAR=y
191CONFIG_CPU_CACHE_VIVT=y
192CONFIG_CPU_COPY_V4WB=y
193CONFIG_CPU_TLB_V4WBI=y
194CONFIG_CPU_CP15=y
195CONFIG_CPU_CP15_MMU=y
196
197#
198# Processor Features
199#
200CONFIG_ARM_THUMB=y
201# CONFIG_CPU_ICACHE_DISABLE is not set
202# CONFIG_CPU_DCACHE_DISABLE is not set
203# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
204# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
205# CONFIG_OUTER_CACHE is not set
206
207#
208# Bus support
209#
210# CONFIG_PCI_SYSCALL is not set
211# CONFIG_ARCH_SUPPORTS_MSI is not set
212# CONFIG_PCCARD is not set
213
214#
215# Kernel Features
216#
217CONFIG_TICK_ONESHOT=y
218CONFIG_NO_HZ=y
219CONFIG_HIGH_RES_TIMERS=y
220CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
221CONFIG_PREEMPT=y
222CONFIG_HZ=100
223CONFIG_AEABI=y
224# CONFIG_OABI_COMPAT is not set
225# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
226CONFIG_SELECT_MEMORY_MODEL=y
227CONFIG_FLATMEM_MANUAL=y
228# CONFIG_DISCONTIGMEM_MANUAL is not set
229# CONFIG_SPARSEMEM_MANUAL is not set
230CONFIG_FLATMEM=y
231CONFIG_FLAT_NODE_MEM_MAP=y
232# CONFIG_SPARSEMEM_STATIC is not set
233# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
234CONFIG_PAGEFLAGS_EXTENDED=y
235CONFIG_SPLIT_PTLOCK_CPUS=4096
236# CONFIG_RESOURCES_64BIT is not set
237CONFIG_ZONE_DMA_FLAG=1
238CONFIG_BOUNCE=y
239CONFIG_VIRT_TO_BUS=y
240CONFIG_ALIGNMENT_TRAP=y
241
242#
243# Boot options
244#
245CONFIG_ZBOOT_ROM_TEXT=0x0
246CONFIG_ZBOOT_ROM_BSS=0x0
247CONFIG_CMDLINE=""
248# CONFIG_XIP_KERNEL is not set
249# CONFIG_KEXEC is not set
250
251#
252# Floating point emulation
253#
254
255#
256# At least one emulation must be selected
257#
258# CONFIG_VFP is not set
259
260#
261# Userspace binary formats
262#
263CONFIG_BINFMT_ELF=y
264# CONFIG_BINFMT_AOUT is not set
265# CONFIG_BINFMT_MISC is not set
266
267#
268# Power management options
269#
270# CONFIG_PM is not set
271CONFIG_ARCH_SUSPEND_POSSIBLE=y
272
273#
274# Networking
275#
276CONFIG_NET=y
277
278#
279# Networking options
280#
281CONFIG_PACKET=y
282CONFIG_PACKET_MMAP=y
283CONFIG_UNIX=y
284# CONFIG_NET_KEY is not set
285CONFIG_INET=y
286CONFIG_IP_MULTICAST=y
287# CONFIG_IP_ADVANCED_ROUTER is not set
288CONFIG_IP_FIB_HASH=y
289CONFIG_IP_PNP=y
290# CONFIG_IP_PNP_DHCP is not set
291# CONFIG_IP_PNP_BOOTP is not set
292# CONFIG_IP_PNP_RARP is not set
293# CONFIG_NET_IPIP is not set
294# CONFIG_NET_IPGRE is not set
295# CONFIG_IP_MROUTE is not set
296# CONFIG_ARPD is not set
297# CONFIG_SYN_COOKIES is not set
298# CONFIG_INET_AH is not set
299# CONFIG_INET_ESP is not set
300# CONFIG_INET_IPCOMP is not set
301# CONFIG_INET_XFRM_TUNNEL is not set
302# CONFIG_INET_TUNNEL is not set
303# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
304# CONFIG_INET_XFRM_MODE_TUNNEL is not set
305# CONFIG_INET_XFRM_MODE_BEET is not set
306# CONFIG_INET_LRO is not set
307# CONFIG_INET_DIAG is not set
308# CONFIG_TCP_CONG_ADVANCED is not set
309CONFIG_TCP_CONG_CUBIC=y
310CONFIG_DEFAULT_TCP_CONG="cubic"
311# CONFIG_TCP_MD5SIG is not set
312# CONFIG_IPV6 is not set
313# CONFIG_NETWORK_SECMARK is not set
314# CONFIG_NETFILTER is not set
315# CONFIG_IP_DCCP is not set
316# CONFIG_IP_SCTP is not set
317# CONFIG_TIPC is not set
318# CONFIG_ATM is not set
319# CONFIG_BRIDGE is not set
320# CONFIG_VLAN_8021Q is not set
321# CONFIG_DECNET is not set
322# CONFIG_LLC2 is not set
323# CONFIG_IPX is not set
324# CONFIG_ATALK is not set
325# CONFIG_X25 is not set
326# CONFIG_LAPB is not set
327# CONFIG_ECONET is not set
328# CONFIG_WAN_ROUTER is not set
329# CONFIG_NET_SCHED is not set
330
331#
332# Network testing
333#
334# CONFIG_NET_PKTGEN is not set
335# CONFIG_HAMRADIO is not set
336# CONFIG_CAN is not set
337# CONFIG_IRDA is not set
338# CONFIG_BT is not set
339# CONFIG_AF_RXRPC is not set
340
341#
342# Wireless
343#
344# CONFIG_CFG80211 is not set
345# CONFIG_WIRELESS_EXT is not set
346# CONFIG_MAC80211 is not set
347# CONFIG_IEEE80211 is not set
348# CONFIG_RFKILL is not set
349# CONFIG_NET_9P is not set
350
351#
352# Device Drivers
353#
354
355#
356# Generic Driver Options
357#
358CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
359CONFIG_STANDALONE=y
360CONFIG_PREVENT_FIRMWARE_BUILD=y
361# CONFIG_FW_LOADER is not set
362# CONFIG_SYS_HYPERVISOR is not set
363# CONFIG_CONNECTOR is not set
364CONFIG_MTD=y
365# CONFIG_MTD_DEBUG is not set
366# CONFIG_MTD_CONCAT is not set
367CONFIG_MTD_PARTITIONS=y
368# CONFIG_MTD_REDBOOT_PARTS is not set
369CONFIG_MTD_CMDLINE_PARTS=y
370# CONFIG_MTD_AFS_PARTS is not set
371# CONFIG_MTD_AR7_PARTS is not set
372
373#
374# User Modules And Translation Layers
375#
376CONFIG_MTD_CHAR=y
377CONFIG_MTD_BLKDEVS=y
378CONFIG_MTD_BLOCK=y
379# CONFIG_FTL is not set
380# CONFIG_NFTL is not set
381# CONFIG_INFTL is not set
382# CONFIG_RFD_FTL is not set
383# CONFIG_SSFDC is not set
384# CONFIG_MTD_OOPS is not set
385
386#
387# RAM/ROM/Flash chip drivers
388#
389CONFIG_MTD_CFI=y
390# CONFIG_MTD_JEDECPROBE is not set
391CONFIG_MTD_GEN_PROBE=y
392CONFIG_MTD_CFI_ADV_OPTIONS=y
393CONFIG_MTD_CFI_NOSWAP=y
394# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
395# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
396CONFIG_MTD_CFI_GEOMETRY=y
397# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
398CONFIG_MTD_MAP_BANK_WIDTH_2=y
399# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
400# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
401# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
402# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
403CONFIG_MTD_CFI_I1=y
404# CONFIG_MTD_CFI_I2 is not set
405# CONFIG_MTD_CFI_I4 is not set
406# CONFIG_MTD_CFI_I8 is not set
407# CONFIG_MTD_OTP is not set
408CONFIG_MTD_CFI_INTELEXT=y
409# CONFIG_MTD_CFI_AMDSTD is not set
410# CONFIG_MTD_CFI_STAA is not set
411CONFIG_MTD_CFI_UTIL=y
412# CONFIG_MTD_RAM is not set
413# CONFIG_MTD_ROM is not set
414# CONFIG_MTD_ABSENT is not set
415# CONFIG_MTD_XIP is not set
416
417#
418# Mapping drivers for chip access
419#
420# CONFIG_MTD_COMPLEX_MAPPINGS is not set
421CONFIG_MTD_PHYSMAP=y
422CONFIG_MTD_PHYSMAP_START=0x00000000
423CONFIG_MTD_PHYSMAP_LEN=0x0
424CONFIG_MTD_PHYSMAP_BANKWIDTH=2
425# CONFIG_MTD_ARM_INTEGRATOR is not set
426# CONFIG_MTD_PLATRAM is not set
427
428#
429# Self-contained MTD device drivers
430#
431# CONFIG_MTD_SLRAM is not set
432# CONFIG_MTD_PHRAM is not set
433# CONFIG_MTD_MTDRAM is not set
434# CONFIG_MTD_BLOCK2MTD is not set
435
436#
437# Disk-On-Chip Device Drivers
438#
439# CONFIG_MTD_DOC2000 is not set
440# CONFIG_MTD_DOC2001 is not set
441# CONFIG_MTD_DOC2001PLUS is not set
442# CONFIG_MTD_NAND is not set
443# CONFIG_MTD_ONENAND is not set
444
445#
446# UBI - Unsorted block images
447#
448# CONFIG_MTD_UBI is not set
449# CONFIG_PARPORT is not set
450CONFIG_BLK_DEV=y
451# CONFIG_BLK_DEV_COW_COMMON is not set
452# CONFIG_BLK_DEV_LOOP is not set
453# CONFIG_BLK_DEV_NBD is not set
454# CONFIG_BLK_DEV_RAM is not set
455# CONFIG_CDROM_PKTCDVD is not set
456# CONFIG_ATA_OVER_ETH is not set
457# CONFIG_MISC_DEVICES is not set
458CONFIG_HAVE_IDE=y
459# CONFIG_IDE is not set
460
461#
462# SCSI device support
463#
464# CONFIG_RAID_ATTRS is not set
465# CONFIG_SCSI is not set
466# CONFIG_SCSI_DMA is not set
467# CONFIG_SCSI_NETLINK is not set
468# CONFIG_ATA is not set
469# CONFIG_MD is not set
470CONFIG_NETDEVICES=y
471# CONFIG_NETDEVICES_MULTIQUEUE is not set
472# CONFIG_DUMMY is not set
473# CONFIG_BONDING is not set
474# CONFIG_MACVLAN is not set
475# CONFIG_EQUALIZER is not set
476# CONFIG_TUN is not set
477# CONFIG_VETH is not set
478# CONFIG_PHYLIB is not set
479CONFIG_NET_ETHERNET=y
480# CONFIG_MII is not set
481# CONFIG_AX88796 is not set
482# CONFIG_SMC91X is not set
483# CONFIG_DM9000 is not set
484# CONFIG_IBM_NEW_EMAC_ZMII is not set
485# CONFIG_IBM_NEW_EMAC_RGMII is not set
486# CONFIG_IBM_NEW_EMAC_TAH is not set
487# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
488# CONFIG_B44 is not set
489# CONFIG_FEC_OLD is not set
490# CONFIG_NETDEV_1000 is not set
491# CONFIG_NETDEV_10000 is not set
492
493#
494# Wireless LAN
495#
496# CONFIG_WLAN_PRE80211 is not set
497# CONFIG_WLAN_80211 is not set
498# CONFIG_IWLWIFI_LEDS is not set
499# CONFIG_WAN is not set
500# CONFIG_PPP is not set
501# CONFIG_SLIP is not set
502# CONFIG_NETCONSOLE is not set
503# CONFIG_NETPOLL is not set
504# CONFIG_NET_POLL_CONTROLLER is not set
505# CONFIG_ISDN is not set
506
507#
508# Input device support
509#
510CONFIG_INPUT=y
511# CONFIG_INPUT_FF_MEMLESS is not set
512# CONFIG_INPUT_POLLDEV is not set
513
514#
515# Userland interfaces
516#
517# CONFIG_INPUT_MOUSEDEV is not set
518# CONFIG_INPUT_JOYDEV is not set
519CONFIG_INPUT_EVDEV=y
520# CONFIG_INPUT_EVBUG is not set
521
522#
523# Input Device Drivers
524#
525# CONFIG_INPUT_KEYBOARD is not set
526# CONFIG_INPUT_MOUSE is not set
527# CONFIG_INPUT_JOYSTICK is not set
528# CONFIG_INPUT_TABLET is not set
529CONFIG_INPUT_TOUCHSCREEN=y
530# CONFIG_TOUCHSCREEN_FUJITSU is not set
531# CONFIG_TOUCHSCREEN_GUNZE is not set
532# CONFIG_TOUCHSCREEN_ELO is not set
533# CONFIG_TOUCHSCREEN_MTOUCH is not set
534# CONFIG_TOUCHSCREEN_MK712 is not set
535# CONFIG_TOUCHSCREEN_PENMOUNT is not set
536# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
537# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
538# CONFIG_TOUCHSCREEN_UCB1400 is not set
539# CONFIG_INPUT_MISC is not set
540
541#
542# Hardware I/O ports
543#
544# CONFIG_SERIO is not set
545# CONFIG_GAMEPORT is not set
546
547#
548# Character devices
549#
550# CONFIG_VT is not set
551CONFIG_DEVKMEM=y
552# CONFIG_SERIAL_NONSTANDARD is not set
553
554#
555# Serial drivers
556#
557# CONFIG_SERIAL_8250 is not set
558
559#
560# Non-8250 serial port support
561#
562# CONFIG_SERIAL_IMX is not set
563CONFIG_UNIX98_PTYS=y
564# CONFIG_LEGACY_PTYS is not set
565# CONFIG_IPMI_HANDLER is not set
566# CONFIG_HW_RANDOM is not set
567# CONFIG_NVRAM is not set
568# CONFIG_R3964 is not set
569# CONFIG_RAW_DRIVER is not set
570# CONFIG_TCG_TPM is not set
571# CONFIG_I2C is not set
572# CONFIG_SPI is not set
573CONFIG_HAVE_GPIO_LIB=y
574
575#
576# GPIO Support
577#
578
579#
580# I2C GPIO expanders:
581#
582
583#
584# SPI GPIO expanders:
585#
586# CONFIG_W1 is not set
587# CONFIG_POWER_SUPPLY is not set
588# CONFIG_HWMON is not set
589# CONFIG_WATCHDOG is not set
590
591#
592# Sonics Silicon Backplane
593#
594CONFIG_SSB_POSSIBLE=y
595# CONFIG_SSB is not set
596
597#
598# Multifunction device drivers
599#
600# CONFIG_MFD_SM501 is not set
601# CONFIG_MFD_ASIC3 is not set
602# CONFIG_HTC_EGPIO is not set
603# CONFIG_HTC_PASIC3 is not set
604
605#
606# Multimedia devices
607#
608
609#
610# Multimedia core support
611#
612# CONFIG_VIDEO_DEV is not set
613# CONFIG_DVB_CORE is not set
614# CONFIG_VIDEO_MEDIA is not set
615
616#
617# Multimedia drivers
618#
619# CONFIG_DAB is not set
620
621#
622# Graphics support
623#
624# CONFIG_VGASTATE is not set
625# CONFIG_VIDEO_OUTPUT_CONTROL is not set
626# CONFIG_FB is not set
627# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
628
629#
630# Display device support
631#
632# CONFIG_DISPLAY_SUPPORT is not set
633
634#
635# Sound
636#
637# CONFIG_SOUND is not set
638# CONFIG_HID_SUPPORT is not set
639# CONFIG_USB_SUPPORT is not set
640# CONFIG_MMC is not set
641# CONFIG_NEW_LEDS is not set
642CONFIG_RTC_LIB=y
643# CONFIG_RTC_CLASS is not set
644# CONFIG_UIO is not set
645
646#
647# File systems
648#
649# CONFIG_EXT2_FS is not set
650# CONFIG_EXT3_FS is not set
651# CONFIG_EXT4DEV_FS is not set
652# CONFIG_REISERFS_FS is not set
653# CONFIG_JFS_FS is not set
654# CONFIG_FS_POSIX_ACL is not set
655# CONFIG_XFS_FS is not set
656# CONFIG_OCFS2_FS is not set
657# CONFIG_DNOTIFY is not set
658# CONFIG_INOTIFY is not set
659# CONFIG_QUOTA is not set
660# CONFIG_AUTOFS_FS is not set
661# CONFIG_AUTOFS4_FS is not set
662# CONFIG_FUSE_FS is not set
663
664#
665# CD-ROM/DVD Filesystems
666#
667# CONFIG_ISO9660_FS is not set
668# CONFIG_UDF_FS is not set
669
670#
671# DOS/FAT/NT Filesystems
672#
673# CONFIG_MSDOS_FS is not set
674# CONFIG_VFAT_FS is not set
675# CONFIG_NTFS_FS is not set
676
677#
678# Pseudo filesystems
679#
680CONFIG_PROC_FS=y
681CONFIG_PROC_SYSCTL=y
682CONFIG_SYSFS=y
683CONFIG_TMPFS=y
684# CONFIG_TMPFS_POSIX_ACL is not set
685# CONFIG_HUGETLB_PAGE is not set
686# CONFIG_CONFIGFS_FS is not set
687
688#
689# Miscellaneous filesystems
690#
691# CONFIG_ADFS_FS is not set
692# CONFIG_AFFS_FS is not set
693# CONFIG_HFS_FS is not set
694# CONFIG_HFSPLUS_FS is not set
695# CONFIG_BEFS_FS is not set
696# CONFIG_BFS_FS is not set
697# CONFIG_EFS_FS is not set
698CONFIG_JFFS2_FS=y
699CONFIG_JFFS2_FS_DEBUG=0
700CONFIG_JFFS2_FS_WRITEBUFFER=y
701# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
702# CONFIG_JFFS2_SUMMARY is not set
703# CONFIG_JFFS2_FS_XATTR is not set
704# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
705CONFIG_JFFS2_ZLIB=y
706# CONFIG_JFFS2_LZO is not set
707CONFIG_JFFS2_RTIME=y
708# CONFIG_JFFS2_RUBIN is not set
709# CONFIG_CRAMFS is not set
710# CONFIG_VXFS_FS is not set
711# CONFIG_MINIX_FS is not set
712# CONFIG_HPFS_FS is not set
713# CONFIG_QNX4FS_FS is not set
714# CONFIG_ROMFS_FS is not set
715# CONFIG_SYSV_FS is not set
716# CONFIG_UFS_FS is not set
717CONFIG_NETWORK_FILESYSTEMS=y
718CONFIG_NFS_FS=y
719CONFIG_NFS_V3=y
720# CONFIG_NFS_V3_ACL is not set
721# CONFIG_NFS_V4 is not set
722# CONFIG_NFSD is not set
723CONFIG_ROOT_NFS=y
724CONFIG_LOCKD=y
725CONFIG_LOCKD_V4=y
726CONFIG_NFS_COMMON=y
727CONFIG_SUNRPC=y
728# CONFIG_SUNRPC_BIND34 is not set
729# CONFIG_RPCSEC_GSS_KRB5 is not set
730# CONFIG_RPCSEC_GSS_SPKM3 is not set
731# CONFIG_SMB_FS is not set
732# CONFIG_CIFS is not set
733# CONFIG_NCP_FS is not set
734# CONFIG_CODA_FS is not set
735# CONFIG_AFS_FS is not set
736
737#
738# Partition Types
739#
740# CONFIG_PARTITION_ADVANCED is not set
741CONFIG_MSDOS_PARTITION=y
742CONFIG_NLS=y
743CONFIG_NLS_DEFAULT="iso8859-1"
744CONFIG_NLS_CODEPAGE_437=m
745# CONFIG_NLS_CODEPAGE_737 is not set
746# CONFIG_NLS_CODEPAGE_775 is not set
747CONFIG_NLS_CODEPAGE_850=m
748# CONFIG_NLS_CODEPAGE_852 is not set
749# CONFIG_NLS_CODEPAGE_855 is not set
750# CONFIG_NLS_CODEPAGE_857 is not set
751# CONFIG_NLS_CODEPAGE_860 is not set
752# CONFIG_NLS_CODEPAGE_861 is not set
753# CONFIG_NLS_CODEPAGE_862 is not set
754# CONFIG_NLS_CODEPAGE_863 is not set
755# CONFIG_NLS_CODEPAGE_864 is not set
756# CONFIG_NLS_CODEPAGE_865 is not set
757# CONFIG_NLS_CODEPAGE_866 is not set
758# CONFIG_NLS_CODEPAGE_869 is not set
759# CONFIG_NLS_CODEPAGE_936 is not set
760# CONFIG_NLS_CODEPAGE_950 is not set
761# CONFIG_NLS_CODEPAGE_932 is not set
762# CONFIG_NLS_CODEPAGE_949 is not set
763# CONFIG_NLS_CODEPAGE_874 is not set
764# CONFIG_NLS_ISO8859_8 is not set
765# CONFIG_NLS_CODEPAGE_1250 is not set
766# CONFIG_NLS_CODEPAGE_1251 is not set
767# CONFIG_NLS_ASCII is not set
768CONFIG_NLS_ISO8859_1=y
769# CONFIG_NLS_ISO8859_2 is not set
770# CONFIG_NLS_ISO8859_3 is not set
771# CONFIG_NLS_ISO8859_4 is not set
772# CONFIG_NLS_ISO8859_5 is not set
773# CONFIG_NLS_ISO8859_6 is not set
774# CONFIG_NLS_ISO8859_7 is not set
775# CONFIG_NLS_ISO8859_9 is not set
776# CONFIG_NLS_ISO8859_13 is not set
777# CONFIG_NLS_ISO8859_14 is not set
778CONFIG_NLS_ISO8859_15=m
779# CONFIG_NLS_KOI8_R is not set
780# CONFIG_NLS_KOI8_U is not set
781# CONFIG_NLS_UTF8 is not set
782# CONFIG_DLM is not set
783
784#
785# Kernel hacking
786#
787# CONFIG_PRINTK_TIME is not set
788CONFIG_ENABLE_WARN_DEPRECATED=y
789CONFIG_ENABLE_MUST_CHECK=y
790CONFIG_FRAME_WARN=1024
791# CONFIG_MAGIC_SYSRQ is not set
792# CONFIG_UNUSED_SYMBOLS is not set
793# CONFIG_DEBUG_FS is not set
794# CONFIG_HEADERS_CHECK is not set
795# CONFIG_DEBUG_KERNEL is not set
796# CONFIG_DEBUG_BUGVERBOSE is not set
797CONFIG_FRAME_POINTER=y
798# CONFIG_SAMPLES is not set
799# CONFIG_DEBUG_USER is not set
800
801#
802# Security options
803#
804# CONFIG_KEYS is not set
805# CONFIG_SECURITY is not set
806# CONFIG_SECURITY_FILE_CAPABILITIES is not set
807# CONFIG_CRYPTO is not set
808
809#
810# Library routines
811#
812CONFIG_BITREVERSE=y
813# CONFIG_GENERIC_FIND_FIRST_BIT is not set
814# CONFIG_GENERIC_FIND_NEXT_BIT is not set
815# CONFIG_CRC_CCITT is not set
816# CONFIG_CRC16 is not set
817# CONFIG_CRC_ITU_T is not set
818CONFIG_CRC32=y
819# CONFIG_CRC7 is not set
820# CONFIG_LIBCRC32C is not set
821CONFIG_ZLIB_INFLATE=y
822CONFIG_ZLIB_DEFLATE=y
823CONFIG_PLIST=y
824CONFIG_HAS_IOMEM=y
825CONFIG_HAS_IOPORT=y
826CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/magician_defconfig b/arch/arm/configs/magician_defconfig
index 82428c2f234c..f56837f69ca7 100644
--- a/arch/arm/configs/magician_defconfig
+++ b/arch/arm/configs/magician_defconfig
@@ -1183,7 +1183,11 @@ CONFIG_RTC_INTF_DEV=y
1183CONFIG_RTC_DRV_SA1100=y 1183CONFIG_RTC_DRV_SA1100=y
1184# CONFIG_RTC_DRV_PXA is not set 1184# CONFIG_RTC_DRV_PXA is not set
1185# CONFIG_DMADEVICES is not set 1185# CONFIG_DMADEVICES is not set
1186# CONFIG_REGULATOR is not set 1186CONFIG_REGULATOR=y
1187# CONFIG_REGULATOR_DEBUG is not set
1188# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
1189# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
1190CONFIG_REGULATOR_BQ24022=y
1187# CONFIG_UIO is not set 1191# CONFIG_UIO is not set
1188# CONFIG_STAGING is not set 1192# CONFIG_STAGING is not set
1189 1193
diff --git a/arch/arm/configs/pcm037_defconfig b/arch/arm/configs/mx1_defconfig
index 6e37c77c4760..0200d67e30ba 100644
--- a/arch/arm/configs/pcm037_defconfig
+++ b/arch/arm/configs/mx1_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.26-rc6 3# Linux kernel version: 2.6.30-rc1
4# Wed Jun 25 11:52:42 2008 4# Wed Apr 8 11:11:33 2009
5# 5#
6CONFIG_ARM=y 6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y 7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
@@ -12,6 +12,7 @@ CONFIG_MMU=y
12# CONFIG_NO_IOPORT is not set 12# CONFIG_NO_IOPORT is not set
13CONFIG_GENERIC_HARDIRQS=y 13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_STACKTRACE_SUPPORT=y 14CONFIG_STACKTRACE_SUPPORT=y
15CONFIG_HAVE_LATENCYTOP_SUPPORT=y
15CONFIG_LOCKDEP_SUPPORT=y 16CONFIG_LOCKDEP_SUPPORT=y
16CONFIG_TRACE_IRQFLAGS_SUPPORT=y 17CONFIG_TRACE_IRQFLAGS_SUPPORT=y
17CONFIG_HARDIRQS_SW_RESEND=y 18CONFIG_HARDIRQS_SW_RESEND=y
@@ -21,9 +22,8 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
21# CONFIG_ARCH_HAS_ILOG2_U64 is not set 22# CONFIG_ARCH_HAS_ILOG2_U64 is not set
22CONFIG_GENERIC_HWEIGHT=y 23CONFIG_GENERIC_HWEIGHT=y
23CONFIG_GENERIC_CALIBRATE_DELAY=y 24CONFIG_GENERIC_CALIBRATE_DELAY=y
24CONFIG_ARCH_SUPPORTS_AOUT=y
25CONFIG_ZONE_DMA=y
26CONFIG_ARCH_MTD_XIP=y 25CONFIG_ARCH_MTD_XIP=y
26CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
27CONFIG_VECTORS_BASE=0xffff0000 27CONFIG_VECTORS_BASE=0xffff0000
28CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 28CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
29 29
@@ -43,15 +43,24 @@ CONFIG_SYSVIPC_SYSCTL=y
43# CONFIG_BSD_PROCESS_ACCT is not set 43# CONFIG_BSD_PROCESS_ACCT is not set
44# CONFIG_TASKSTATS is not set 44# CONFIG_TASKSTATS is not set
45# CONFIG_AUDIT is not set 45# CONFIG_AUDIT is not set
46
47#
48# RCU Subsystem
49#
50CONFIG_CLASSIC_RCU=y
51# CONFIG_TREE_RCU is not set
52# CONFIG_PREEMPT_RCU is not set
53# CONFIG_TREE_RCU_TRACE is not set
54# CONFIG_PREEMPT_RCU_TRACE is not set
46CONFIG_IKCONFIG=y 55CONFIG_IKCONFIG=y
47CONFIG_IKCONFIG_PROC=y 56CONFIG_IKCONFIG_PROC=y
48CONFIG_LOG_BUF_SHIFT=14 57CONFIG_LOG_BUF_SHIFT=14
49# CONFIG_CGROUPS is not set
50CONFIG_GROUP_SCHED=y 58CONFIG_GROUP_SCHED=y
51CONFIG_FAIR_GROUP_SCHED=y 59CONFIG_FAIR_GROUP_SCHED=y
52# CONFIG_RT_GROUP_SCHED is not set 60# CONFIG_RT_GROUP_SCHED is not set
53CONFIG_USER_SCHED=y 61CONFIG_USER_SCHED=y
54# CONFIG_CGROUP_SCHED is not set 62# CONFIG_CGROUP_SCHED is not set
63# CONFIG_CGROUPS is not set
55CONFIG_SYSFS_DEPRECATED=y 64CONFIG_SYSFS_DEPRECATED=y
56CONFIG_SYSFS_DEPRECATED_V2=y 65CONFIG_SYSFS_DEPRECATED_V2=y
57# CONFIG_RELAY is not set 66# CONFIG_RELAY is not set
@@ -59,26 +68,26 @@ CONFIG_SYSFS_DEPRECATED_V2=y
59# CONFIG_BLK_DEV_INITRD is not set 68# CONFIG_BLK_DEV_INITRD is not set
60CONFIG_CC_OPTIMIZE_FOR_SIZE=y 69CONFIG_CC_OPTIMIZE_FOR_SIZE=y
61CONFIG_SYSCTL=y 70CONFIG_SYSCTL=y
71CONFIG_ANON_INODES=y
62CONFIG_EMBEDDED=y 72CONFIG_EMBEDDED=y
63CONFIG_UID16=y 73CONFIG_UID16=y
64CONFIG_SYSCTL_SYSCALL=y 74CONFIG_SYSCTL_SYSCALL=y
65CONFIG_SYSCTL_SYSCALL_CHECK=y
66CONFIG_KALLSYMS=y 75CONFIG_KALLSYMS=y
67# CONFIG_KALLSYMS_EXTRA_PASS is not set 76# CONFIG_KALLSYMS_EXTRA_PASS is not set
68CONFIG_HOTPLUG=y 77CONFIG_HOTPLUG=y
69CONFIG_PRINTK=y 78CONFIG_PRINTK=y
70CONFIG_BUG=y 79CONFIG_BUG=y
71CONFIG_ELF_CORE=y 80CONFIG_ELF_CORE=y
72CONFIG_COMPAT_BRK=y
73CONFIG_BASE_FULL=y 81CONFIG_BASE_FULL=y
74CONFIG_FUTEX=y 82CONFIG_FUTEX=y
75CONFIG_ANON_INODES=y
76CONFIG_EPOLL=y 83CONFIG_EPOLL=y
77CONFIG_SIGNALFD=y 84CONFIG_SIGNALFD=y
78CONFIG_TIMERFD=y 85CONFIG_TIMERFD=y
79CONFIG_EVENTFD=y 86CONFIG_EVENTFD=y
80CONFIG_SHMEM=y 87CONFIG_SHMEM=y
88CONFIG_AIO=y
81CONFIG_VM_EVENT_COUNTERS=y 89CONFIG_VM_EVENT_COUNTERS=y
90CONFIG_COMPAT_BRK=y
82CONFIG_SLAB=y 91CONFIG_SLAB=y
83# CONFIG_SLUB is not set 92# CONFIG_SLUB is not set
84# CONFIG_SLOB is not set 93# CONFIG_SLOB is not set
@@ -88,11 +97,10 @@ CONFIG_HAVE_OPROFILE=y
88# CONFIG_KPROBES is not set 97# CONFIG_KPROBES is not set
89CONFIG_HAVE_KPROBES=y 98CONFIG_HAVE_KPROBES=y
90CONFIG_HAVE_KRETPROBES=y 99CONFIG_HAVE_KRETPROBES=y
91# CONFIG_HAVE_DMA_ATTRS is not set 100# CONFIG_SLOW_WORK is not set
92CONFIG_PROC_PAGE_MONITOR=y 101CONFIG_HAVE_GENERIC_DMA_COHERENT=y
93CONFIG_SLABINFO=y 102CONFIG_SLABINFO=y
94CONFIG_RT_MUTEXES=y 103CONFIG_RT_MUTEXES=y
95# CONFIG_TINY_SHMEM is not set
96CONFIG_BASE_SMALL=0 104CONFIG_BASE_SMALL=0
97CONFIG_MODULES=y 105CONFIG_MODULES=y
98# CONFIG_MODULE_FORCE_LOAD is not set 106# CONFIG_MODULE_FORCE_LOAD is not set
@@ -100,12 +108,10 @@ CONFIG_MODULE_UNLOAD=y
100CONFIG_MODULE_FORCE_UNLOAD=y 108CONFIG_MODULE_FORCE_UNLOAD=y
101CONFIG_MODVERSIONS=y 109CONFIG_MODVERSIONS=y
102# CONFIG_MODULE_SRCVERSION_ALL is not set 110# CONFIG_MODULE_SRCVERSION_ALL is not set
103CONFIG_KMOD=y
104CONFIG_BLOCK=y 111CONFIG_BLOCK=y
105# CONFIG_LBD is not set 112# CONFIG_LBD is not set
106# CONFIG_BLK_DEV_IO_TRACE is not set
107# CONFIG_LSF is not set
108# CONFIG_BLK_DEV_BSG is not set 113# CONFIG_BLK_DEV_BSG is not set
114# CONFIG_BLK_DEV_INTEGRITY is not set
109 115
110# 116#
111# IO Schedulers 117# IO Schedulers
@@ -119,7 +125,7 @@ CONFIG_IOSCHED_CFQ=y
119CONFIG_DEFAULT_CFQ=y 125CONFIG_DEFAULT_CFQ=y
120# CONFIG_DEFAULT_NOOP is not set 126# CONFIG_DEFAULT_NOOP is not set
121CONFIG_DEFAULT_IOSCHED="cfq" 127CONFIG_DEFAULT_IOSCHED="cfq"
122CONFIG_CLASSIC_RCU=y 128CONFIG_FREEZER=y
123 129
124# 130#
125# System Type 131# System Type
@@ -129,11 +135,10 @@ CONFIG_CLASSIC_RCU=y
129# CONFIG_ARCH_REALVIEW is not set 135# CONFIG_ARCH_REALVIEW is not set
130# CONFIG_ARCH_VERSATILE is not set 136# CONFIG_ARCH_VERSATILE is not set
131# CONFIG_ARCH_AT91 is not set 137# CONFIG_ARCH_AT91 is not set
132# CONFIG_ARCH_CLPS7500 is not set
133# CONFIG_ARCH_CLPS711X is not set 138# CONFIG_ARCH_CLPS711X is not set
134# CONFIG_ARCH_CO285 is not set
135# CONFIG_ARCH_EBSA110 is not set 139# CONFIG_ARCH_EBSA110 is not set
136# CONFIG_ARCH_EP93XX is not set 140# CONFIG_ARCH_EP93XX is not set
141# CONFIG_ARCH_GEMINI is not set
137# CONFIG_ARCH_FOOTBRIDGE is not set 142# CONFIG_ARCH_FOOTBRIDGE is not set
138# CONFIG_ARCH_NETX is not set 143# CONFIG_ARCH_NETX is not set
139# CONFIG_ARCH_H720X is not set 144# CONFIG_ARCH_H720X is not set
@@ -145,54 +150,55 @@ CONFIG_CLASSIC_RCU=y
145# CONFIG_ARCH_IXP2000 is not set 150# CONFIG_ARCH_IXP2000 is not set
146# CONFIG_ARCH_IXP4XX is not set 151# CONFIG_ARCH_IXP4XX is not set
147# CONFIG_ARCH_L7200 is not set 152# CONFIG_ARCH_L7200 is not set
153# CONFIG_ARCH_KIRKWOOD is not set
148# CONFIG_ARCH_KS8695 is not set 154# CONFIG_ARCH_KS8695 is not set
149# CONFIG_ARCH_NS9XXX is not set 155# CONFIG_ARCH_NS9XXX is not set
156# CONFIG_ARCH_LOKI is not set
157# CONFIG_ARCH_MV78XX0 is not set
150CONFIG_ARCH_MXC=y 158CONFIG_ARCH_MXC=y
151# CONFIG_ARCH_ORION5X is not set 159# CONFIG_ARCH_ORION5X is not set
152# CONFIG_ARCH_PNX4008 is not set 160# CONFIG_ARCH_PNX4008 is not set
153# CONFIG_ARCH_PXA is not set 161# CONFIG_ARCH_PXA is not set
162# CONFIG_ARCH_MMP is not set
154# CONFIG_ARCH_RPC is not set 163# CONFIG_ARCH_RPC is not set
155# CONFIG_ARCH_SA1100 is not set 164# CONFIG_ARCH_SA1100 is not set
156# CONFIG_ARCH_S3C2410 is not set 165# CONFIG_ARCH_S3C2410 is not set
166# CONFIG_ARCH_S3C64XX is not set
157# CONFIG_ARCH_SHARK is not set 167# CONFIG_ARCH_SHARK is not set
158# CONFIG_ARCH_LH7A40X is not set 168# CONFIG_ARCH_LH7A40X is not set
159# CONFIG_ARCH_DAVINCI is not set 169# CONFIG_ARCH_DAVINCI is not set
160# CONFIG_ARCH_OMAP is not set 170# CONFIG_ARCH_OMAP is not set
161# CONFIG_ARCH_MSM7X00A is not set 171# CONFIG_ARCH_MSM is not set
162 172# CONFIG_ARCH_W90X900 is not set
163# 173CONFIG_ARCH_MX1ADS=y
164# Boot options
165#
166
167#
168# Power management
169#
170 174
171# 175#
172# Freescale MXC Implementations 176# Freescale MXC Implementations
173# 177#
174CONFIG_ARCH_MX3=y 178CONFIG_ARCH_MX1=y
179# CONFIG_ARCH_MX2 is not set
180# CONFIG_ARCH_MX3 is not set
175 181
176# 182#
177# MX3 Options 183# MX1 platforms:
178# 184#
179# CONFIG_MACH_MX31ADS is not set 185CONFIG_MACH_MXLADS=y
180CONFIG_MACH_PCM037=y 186CONFIG_MACH_SCB9328=y
187CONFIG_MXC_IRQ_PRIOR=y
188# CONFIG_MXC_PWM is not set
181 189
182# 190#
183# Processor Type 191# Processor Type
184# 192#
185CONFIG_CPU_32=y 193CONFIG_CPU_32=y
186CONFIG_CPU_V6=y 194CONFIG_CPU_ARM920T=y
187# CONFIG_CPU_32v6K is not set 195CONFIG_CPU_32v4T=y
188CONFIG_CPU_32v6=y 196CONFIG_CPU_ABRT_EV4T=y
189CONFIG_CPU_ABRT_EV6=y
190CONFIG_CPU_PABRT_NOIFAR=y 197CONFIG_CPU_PABRT_NOIFAR=y
191CONFIG_CPU_CACHE_V6=y 198CONFIG_CPU_CACHE_V4WT=y
192CONFIG_CPU_CACHE_VIPT=y 199CONFIG_CPU_CACHE_VIVT=y
193CONFIG_CPU_COPY_V6=y 200CONFIG_CPU_COPY_V4WB=y
194CONFIG_CPU_TLB_V6=y 201CONFIG_CPU_TLB_V4WBI=y
195CONFIG_CPU_HAS_ASID=y
196CONFIG_CPU_CP15=y 202CONFIG_CPU_CP15=y
197CONFIG_CPU_CP15_MMU=y 203CONFIG_CPU_CP15_MMU=y
198 204
@@ -202,7 +208,7 @@ CONFIG_CPU_CP15_MMU=y
202CONFIG_ARM_THUMB=y 208CONFIG_ARM_THUMB=y
203# CONFIG_CPU_ICACHE_DISABLE is not set 209# CONFIG_CPU_ICACHE_DISABLE is not set
204# CONFIG_CPU_DCACHE_DISABLE is not set 210# CONFIG_CPU_DCACHE_DISABLE is not set
205# CONFIG_CPU_BPREDICT_DISABLE is not set 211# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
206# CONFIG_OUTER_CACHE is not set 212# CONFIG_OUTER_CACHE is not set
207 213
208# 214#
@@ -219,25 +225,32 @@ CONFIG_TICK_ONESHOT=y
219CONFIG_NO_HZ=y 225CONFIG_NO_HZ=y
220CONFIG_HIGH_RES_TIMERS=y 226CONFIG_HIGH_RES_TIMERS=y
221CONFIG_GENERIC_CLOCKEVENTS_BUILD=y 227CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
228CONFIG_VMSPLIT_3G=y
229# CONFIG_VMSPLIT_2G is not set
230# CONFIG_VMSPLIT_1G is not set
231CONFIG_PAGE_OFFSET=0xC0000000
222CONFIG_PREEMPT=y 232CONFIG_PREEMPT=y
223CONFIG_HZ=100 233CONFIG_HZ=100
224CONFIG_AEABI=y 234CONFIG_AEABI=y
225# CONFIG_OABI_COMPAT is not set 235CONFIG_OABI_COMPAT=y
226# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set 236CONFIG_ARCH_FLATMEM_HAS_HOLES=y
237# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
238# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
239# CONFIG_HIGHMEM is not set
227CONFIG_SELECT_MEMORY_MODEL=y 240CONFIG_SELECT_MEMORY_MODEL=y
228CONFIG_FLATMEM_MANUAL=y 241CONFIG_FLATMEM_MANUAL=y
229# CONFIG_DISCONTIGMEM_MANUAL is not set 242# CONFIG_DISCONTIGMEM_MANUAL is not set
230# CONFIG_SPARSEMEM_MANUAL is not set 243# CONFIG_SPARSEMEM_MANUAL is not set
231CONFIG_FLATMEM=y 244CONFIG_FLATMEM=y
232CONFIG_FLAT_NODE_MEM_MAP=y 245CONFIG_FLAT_NODE_MEM_MAP=y
233# CONFIG_SPARSEMEM_STATIC is not set
234# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
235CONFIG_PAGEFLAGS_EXTENDED=y 246CONFIG_PAGEFLAGS_EXTENDED=y
236CONFIG_SPLIT_PTLOCK_CPUS=4 247CONFIG_SPLIT_PTLOCK_CPUS=4096
237# CONFIG_RESOURCES_64BIT is not set 248# CONFIG_PHYS_ADDR_T_64BIT is not set
238CONFIG_ZONE_DMA_FLAG=1 249CONFIG_ZONE_DMA_FLAG=0
239CONFIG_BOUNCE=y
240CONFIG_VIRT_TO_BUS=y 250CONFIG_VIRT_TO_BUS=y
251CONFIG_UNEVICTABLE_LRU=y
252CONFIG_HAVE_MLOCK=y
253CONFIG_HAVE_MLOCKED_PAGE_BIT=y
241CONFIG_ALIGNMENT_TRAP=y 254CONFIG_ALIGNMENT_TRAP=y
242 255
243# 256#
@@ -250,30 +263,41 @@ CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw ip=off"
250# CONFIG_KEXEC is not set 263# CONFIG_KEXEC is not set
251 264
252# 265#
266# CPU Power Management
267#
268# CONFIG_CPU_IDLE is not set
269
270#
253# Floating point emulation 271# Floating point emulation
254# 272#
255 273
256# 274#
257# At least one emulation must be selected 275# At least one emulation must be selected
258# 276#
259CONFIG_VFP=y 277# CONFIG_FPE_NWFPE is not set
278# CONFIG_FPE_FASTFPE is not set
260 279
261# 280#
262# Userspace binary formats 281# Userspace binary formats
263# 282#
264CONFIG_BINFMT_ELF=y 283CONFIG_BINFMT_ELF=y
284# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
285CONFIG_HAVE_AOUT=y
265# CONFIG_BINFMT_AOUT is not set 286# CONFIG_BINFMT_AOUT is not set
266# CONFIG_BINFMT_MISC is not set 287# CONFIG_BINFMT_MISC is not set
267 288
268# 289#
269# Power management options 290# Power management options
270# 291#
271# CONFIG_PM is not set 292CONFIG_PM=y
293CONFIG_PM_DEBUG=y
294# CONFIG_PM_VERBOSE is not set
295CONFIG_CAN_PM_TRACE=y
296CONFIG_PM_SLEEP=y
297CONFIG_SUSPEND=y
298CONFIG_SUSPEND_FREEZER=y
299# CONFIG_APM_EMULATION is not set
272CONFIG_ARCH_SUSPEND_POSSIBLE=y 300CONFIG_ARCH_SUSPEND_POSSIBLE=y
273
274#
275# Networking
276#
277CONFIG_NET=y 301CONFIG_NET=y
278 302
279# 303#
@@ -317,6 +341,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
317# CONFIG_TIPC is not set 341# CONFIG_TIPC is not set
318# CONFIG_ATM is not set 342# CONFIG_ATM is not set
319# CONFIG_BRIDGE is not set 343# CONFIG_BRIDGE is not set
344# CONFIG_NET_DSA is not set
320# CONFIG_VLAN_8021Q is not set 345# CONFIG_VLAN_8021Q is not set
321# CONFIG_DECNET is not set 346# CONFIG_DECNET is not set
322# CONFIG_LLC2 is not set 347# CONFIG_LLC2 is not set
@@ -326,7 +351,9 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
326# CONFIG_LAPB is not set 351# CONFIG_LAPB is not set
327# CONFIG_ECONET is not set 352# CONFIG_ECONET is not set
328# CONFIG_WAN_ROUTER is not set 353# CONFIG_WAN_ROUTER is not set
354# CONFIG_PHONET is not set
329# CONFIG_NET_SCHED is not set 355# CONFIG_NET_SCHED is not set
356# CONFIG_DCB is not set
330 357
331# 358#
332# Network testing 359# Network testing
@@ -337,14 +364,8 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
337# CONFIG_IRDA is not set 364# CONFIG_IRDA is not set
338# CONFIG_BT is not set 365# CONFIG_BT is not set
339# CONFIG_AF_RXRPC is not set 366# CONFIG_AF_RXRPC is not set
340 367# CONFIG_WIRELESS is not set
341# 368# CONFIG_WIMAX is not set
342# Wireless
343#
344# CONFIG_CFG80211 is not set
345# CONFIG_WIRELESS_EXT is not set
346# CONFIG_MAC80211 is not set
347# CONFIG_IEEE80211 is not set
348# CONFIG_RFKILL is not set 369# CONFIG_RFKILL is not set
349# CONFIG_NET_9P is not set 370# CONFIG_NET_9P is not set
350 371
@@ -359,12 +380,15 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
359CONFIG_STANDALONE=y 380CONFIG_STANDALONE=y
360CONFIG_PREVENT_FIRMWARE_BUILD=y 381CONFIG_PREVENT_FIRMWARE_BUILD=y
361CONFIG_FW_LOADER=m 382CONFIG_FW_LOADER=m
383CONFIG_FIRMWARE_IN_KERNEL=y
384CONFIG_EXTRA_FIRMWARE=""
362# CONFIG_SYS_HYPERVISOR is not set 385# CONFIG_SYS_HYPERVISOR is not set
363# CONFIG_CONNECTOR is not set 386# CONFIG_CONNECTOR is not set
364CONFIG_MTD=y 387CONFIG_MTD=y
365# CONFIG_MTD_DEBUG is not set 388# CONFIG_MTD_DEBUG is not set
366# CONFIG_MTD_CONCAT is not set 389# CONFIG_MTD_CONCAT is not set
367CONFIG_MTD_PARTITIONS=y 390CONFIG_MTD_PARTITIONS=y
391# CONFIG_MTD_TESTS is not set
368# CONFIG_MTD_REDBOOT_PARTS is not set 392# CONFIG_MTD_REDBOOT_PARTS is not set
369CONFIG_MTD_CMDLINE_PARTS=y 393CONFIG_MTD_CMDLINE_PARTS=y
370# CONFIG_MTD_AFS_PARTS is not set 394# CONFIG_MTD_AFS_PARTS is not set
@@ -390,9 +414,6 @@ CONFIG_MTD_CFI=y
390# CONFIG_MTD_JEDECPROBE is not set 414# CONFIG_MTD_JEDECPROBE is not set
391CONFIG_MTD_GEN_PROBE=y 415CONFIG_MTD_GEN_PROBE=y
392# CONFIG_MTD_CFI_ADV_OPTIONS is not set 416# CONFIG_MTD_CFI_ADV_OPTIONS is not set
393# CONFIG_MTD_CFI_NOSWAP is not set
394# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
395# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
396CONFIG_MTD_MAP_BANK_WIDTH_1=y 417CONFIG_MTD_MAP_BANK_WIDTH_1=y
397CONFIG_MTD_MAP_BANK_WIDTH_2=y 418CONFIG_MTD_MAP_BANK_WIDTH_2=y
398CONFIG_MTD_MAP_BANK_WIDTH_4=y 419CONFIG_MTD_MAP_BANK_WIDTH_4=y
@@ -406,6 +427,7 @@ CONFIG_MTD_CFI_I2=y
406# CONFIG_MTD_CFI_INTELEXT is not set 427# CONFIG_MTD_CFI_INTELEXT is not set
407# CONFIG_MTD_CFI_AMDSTD is not set 428# CONFIG_MTD_CFI_AMDSTD is not set
408# CONFIG_MTD_CFI_STAA is not set 429# CONFIG_MTD_CFI_STAA is not set
430CONFIG_MTD_CFI_UTIL=y
409# CONFIG_MTD_RAM is not set 431# CONFIG_MTD_RAM is not set
410# CONFIG_MTD_ROM is not set 432# CONFIG_MTD_ROM is not set
411# CONFIG_MTD_ABSENT is not set 433# CONFIG_MTD_ABSENT is not set
@@ -415,9 +437,7 @@ CONFIG_MTD_CFI_I2=y
415# 437#
416# CONFIG_MTD_COMPLEX_MAPPINGS is not set 438# CONFIG_MTD_COMPLEX_MAPPINGS is not set
417CONFIG_MTD_PHYSMAP=y 439CONFIG_MTD_PHYSMAP=y
418CONFIG_MTD_PHYSMAP_START=0x0 440# CONFIG_MTD_PHYSMAP_COMPAT is not set
419CONFIG_MTD_PHYSMAP_LEN=0
420CONFIG_MTD_PHYSMAP_BANKWIDTH=2
421# CONFIG_MTD_ARM_INTEGRATOR is not set 441# CONFIG_MTD_ARM_INTEGRATOR is not set
422# CONFIG_MTD_PLATRAM is not set 442# CONFIG_MTD_PLATRAM is not set
423 443
@@ -439,6 +459,11 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2
439# CONFIG_MTD_ONENAND is not set 459# CONFIG_MTD_ONENAND is not set
440 460
441# 461#
462# LPDDR flash memory drivers
463#
464# CONFIG_MTD_LPDDR is not set
465
466#
442# UBI - Unsorted block images 467# UBI - Unsorted block images
443# 468#
444# CONFIG_MTD_UBI is not set 469# CONFIG_MTD_UBI is not set
@@ -458,7 +483,7 @@ CONFIG_HAVE_IDE=y
458# CONFIG_ATA is not set 483# CONFIG_ATA is not set
459# CONFIG_MD is not set 484# CONFIG_MD is not set
460CONFIG_NETDEVICES=y 485CONFIG_NETDEVICES=y
461# CONFIG_NETDEVICES_MULTIQUEUE is not set 486CONFIG_COMPAT_NET_DEV_OPS=y
462# CONFIG_DUMMY is not set 487# CONFIG_DUMMY is not set
463# CONFIG_BONDING is not set 488# CONFIG_BONDING is not set
464# CONFIG_MACVLAN is not set 489# CONFIG_MACVLAN is not set
@@ -488,14 +513,21 @@ CONFIG_SMSC_PHY=y
488CONFIG_NET_ETHERNET=y 513CONFIG_NET_ETHERNET=y
489CONFIG_MII=y 514CONFIG_MII=y
490# CONFIG_AX88796 is not set 515# CONFIG_AX88796 is not set
491CONFIG_SMC91X=y 516# CONFIG_SMC91X is not set
492# CONFIG_DM9000 is not set 517CONFIG_DM9000=y
518CONFIG_DM9000_DEBUGLEVEL=4
519# CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL is not set
520# CONFIG_ETHOC is not set
493# CONFIG_SMC911X is not set 521# CONFIG_SMC911X is not set
494CONFIG_SMSC911X=y 522# CONFIG_SMSC911X is not set
523# CONFIG_DNET is not set
495# CONFIG_IBM_NEW_EMAC_ZMII is not set 524# CONFIG_IBM_NEW_EMAC_ZMII is not set
496# CONFIG_IBM_NEW_EMAC_RGMII is not set 525# CONFIG_IBM_NEW_EMAC_RGMII is not set
497# CONFIG_IBM_NEW_EMAC_TAH is not set 526# CONFIG_IBM_NEW_EMAC_TAH is not set
498# CONFIG_IBM_NEW_EMAC_EMAC4 is not set 527# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
528# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
529# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
530# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
499# CONFIG_B44 is not set 531# CONFIG_B44 is not set
500# CONFIG_NETDEV_1000 is not set 532# CONFIG_NETDEV_1000 is not set
501# CONFIG_NETDEV_10000 is not set 533# CONFIG_NETDEV_10000 is not set
@@ -505,7 +537,10 @@ CONFIG_SMSC911X=y
505# 537#
506# CONFIG_WLAN_PRE80211 is not set 538# CONFIG_WLAN_PRE80211 is not set
507# CONFIG_WLAN_80211 is not set 539# CONFIG_WLAN_80211 is not set
508# CONFIG_IWLWIFI_LEDS is not set 540
541#
542# Enable WiMAX (Networking options) to see the WiMAX drivers
543#
509# CONFIG_WAN is not set 544# CONFIG_WAN is not set
510# CONFIG_PPP is not set 545# CONFIG_PPP is not set
511# CONFIG_SLIP is not set 546# CONFIG_SLIP is not set
@@ -545,46 +580,124 @@ CONFIG_SERIAL_IMX_CONSOLE=y
545CONFIG_SERIAL_CORE=y 580CONFIG_SERIAL_CORE=y
546CONFIG_SERIAL_CORE_CONSOLE=y 581CONFIG_SERIAL_CORE_CONSOLE=y
547CONFIG_UNIX98_PTYS=y 582CONFIG_UNIX98_PTYS=y
583# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
548# CONFIG_LEGACY_PTYS is not set 584# CONFIG_LEGACY_PTYS is not set
549# CONFIG_IPMI_HANDLER is not set 585# CONFIG_IPMI_HANDLER is not set
550# CONFIG_HW_RANDOM is not set 586# CONFIG_HW_RANDOM is not set
551# CONFIG_NVRAM is not set
552# CONFIG_R3964 is not set 587# CONFIG_R3964 is not set
553# CONFIG_RAW_DRIVER is not set 588# CONFIG_RAW_DRIVER is not set
554# CONFIG_TCG_TPM is not set 589# CONFIG_TCG_TPM is not set
555# CONFIG_I2C is not set 590CONFIG_I2C=y
591CONFIG_I2C_BOARDINFO=y
592CONFIG_I2C_CHARDEV=y
593CONFIG_I2C_HELPER_AUTO=y
594
595#
596# I2C Hardware Bus support
597#
598
599#
600# I2C system bus drivers (mostly embedded / system-on-chip)
601#
602# CONFIG_I2C_GPIO is not set
603CONFIG_I2C_IMX=y
604# CONFIG_I2C_OCORES is not set
605# CONFIG_I2C_SIMTEC is not set
606
607#
608# External I2C/SMBus adapter drivers
609#
610# CONFIG_I2C_PARPORT_LIGHT is not set
611# CONFIG_I2C_TAOS_EVM is not set
612
613#
614# Other I2C/SMBus bus drivers
615#
616# CONFIG_I2C_PCA_PLATFORM is not set
617# CONFIG_I2C_STUB is not set
618
619#
620# Miscellaneous I2C Chip support
621#
622# CONFIG_DS1682 is not set
623# CONFIG_SENSORS_PCF8574 is not set
624# CONFIG_PCF8575 is not set
625# CONFIG_SENSORS_PCA9539 is not set
626# CONFIG_SENSORS_MAX6875 is not set
627# CONFIG_SENSORS_TSL2550 is not set
628# CONFIG_I2C_DEBUG_CORE is not set
629# CONFIG_I2C_DEBUG_ALGO is not set
630# CONFIG_I2C_DEBUG_BUS is not set
631# CONFIG_I2C_DEBUG_CHIP is not set
556# CONFIG_SPI is not set 632# CONFIG_SPI is not set
557CONFIG_HAVE_GPIO_LIB=y 633CONFIG_ARCH_REQUIRE_GPIOLIB=y
634CONFIG_GPIOLIB=y
635# CONFIG_GPIO_SYSFS is not set
558 636
559# 637#
560# GPIO Support 638# Memory mapped GPIO expanders:
561# 639#
562 640
563# 641#
564# I2C GPIO expanders: 642# I2C GPIO expanders:
565# 643#
644# CONFIG_GPIO_MAX732X is not set
645# CONFIG_GPIO_PCA953X is not set
646# CONFIG_GPIO_PCF857X is not set
647
648#
649# PCI GPIO expanders:
650#
566 651
567# 652#
568# SPI GPIO expanders: 653# SPI GPIO expanders:
569# 654#
570# CONFIG_W1 is not set 655CONFIG_W1=y
656
657#
658# 1-wire Bus Masters
659#
660# CONFIG_W1_MASTER_DS2482 is not set
661CONFIG_W1_MASTER_MXC=y
662# CONFIG_W1_MASTER_GPIO is not set
663
664#
665# 1-wire Slaves
666#
667CONFIG_W1_SLAVE_THERM=y
668# CONFIG_W1_SLAVE_SMEM is not set
669# CONFIG_W1_SLAVE_DS2431 is not set
670# CONFIG_W1_SLAVE_DS2433 is not set
671# CONFIG_W1_SLAVE_DS2760 is not set
672# CONFIG_W1_SLAVE_BQ27000 is not set
571# CONFIG_POWER_SUPPLY is not set 673# CONFIG_POWER_SUPPLY is not set
572# CONFIG_HWMON is not set 674# CONFIG_HWMON is not set
675# CONFIG_THERMAL is not set
676# CONFIG_THERMAL_HWMON is not set
573# CONFIG_WATCHDOG is not set 677# CONFIG_WATCHDOG is not set
678CONFIG_SSB_POSSIBLE=y
574 679
575# 680#
576# Sonics Silicon Backplane 681# Sonics Silicon Backplane
577# 682#
578CONFIG_SSB_POSSIBLE=y
579# CONFIG_SSB is not set 683# CONFIG_SSB is not set
580 684
581# 685#
582# Multifunction device drivers 686# Multifunction device drivers
583# 687#
688# CONFIG_MFD_CORE is not set
584# CONFIG_MFD_SM501 is not set 689# CONFIG_MFD_SM501 is not set
585# CONFIG_MFD_ASIC3 is not set 690# CONFIG_MFD_ASIC3 is not set
586# CONFIG_HTC_EGPIO is not set 691# CONFIG_HTC_EGPIO is not set
587# CONFIG_HTC_PASIC3 is not set 692# CONFIG_HTC_PASIC3 is not set
693# CONFIG_TPS65010 is not set
694# CONFIG_TWL4030_CORE is not set
695# CONFIG_MFD_TMIO is not set
696# CONFIG_MFD_TC6393XB is not set
697# CONFIG_PMIC_DA903X is not set
698# CONFIG_MFD_WM8400 is not set
699# CONFIG_MFD_WM8350_I2C is not set
700# CONFIG_MFD_PCF50633 is not set
588 701
589# 702#
590# Multimedia devices 703# Multimedia devices
@@ -607,36 +720,131 @@ CONFIG_SSB_POSSIBLE=y
607# 720#
608# CONFIG_VGASTATE is not set 721# CONFIG_VGASTATE is not set
609# CONFIG_VIDEO_OUTPUT_CONTROL is not set 722# CONFIG_VIDEO_OUTPUT_CONTROL is not set
610# CONFIG_FB is not set 723CONFIG_FB=y
724# CONFIG_FIRMWARE_EDID is not set
725# CONFIG_FB_DDC is not set
726# CONFIG_FB_BOOT_VESA_SUPPORT is not set
727# CONFIG_FB_CFB_FILLRECT is not set
728# CONFIG_FB_CFB_COPYAREA is not set
729# CONFIG_FB_CFB_IMAGEBLIT is not set
730# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
731# CONFIG_FB_SYS_FILLRECT is not set
732# CONFIG_FB_SYS_COPYAREA is not set
733# CONFIG_FB_SYS_IMAGEBLIT is not set
734# CONFIG_FB_FOREIGN_ENDIAN is not set
735# CONFIG_FB_SYS_FOPS is not set
736# CONFIG_FB_SVGALIB is not set
737# CONFIG_FB_MACMODES is not set
738# CONFIG_FB_BACKLIGHT is not set
739# CONFIG_FB_MODE_HELPERS is not set
740# CONFIG_FB_TILEBLITTING is not set
741
742#
743# Frame buffer hardware drivers
744#
745# CONFIG_FB_S1D13XXX is not set
746# CONFIG_FB_VIRTUAL is not set
747# CONFIG_FB_METRONOME is not set
748# CONFIG_FB_MB862XX is not set
749# CONFIG_FB_BROADSHEET is not set
611# CONFIG_BACKLIGHT_LCD_SUPPORT is not set 750# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
612 751
613# 752#
614# Display device support 753# Display device support
615# 754#
616# CONFIG_DISPLAY_SUPPORT is not set 755# CONFIG_DISPLAY_SUPPORT is not set
756# CONFIG_LOGO is not set
757# CONFIG_SOUND is not set
758CONFIG_USB_SUPPORT=y
759CONFIG_USB_ARCH_HAS_HCD=y
760# CONFIG_USB_ARCH_HAS_OHCI is not set
761# CONFIG_USB_ARCH_HAS_EHCI is not set
762# CONFIG_USB is not set
763# CONFIG_USB_OTG_WHITELIST is not set
764# CONFIG_USB_OTG_BLACKLIST_HUB is not set
765# CONFIG_USB_GADGET_MUSB_HDRC is not set
617 766
618# 767#
619# Sound 768# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
769#
770CONFIG_USB_GADGET=y
771# CONFIG_USB_GADGET_DEBUG_FILES is not set
772CONFIG_USB_GADGET_VBUS_DRAW=2
773CONFIG_USB_GADGET_SELECTED=y
774# CONFIG_USB_GADGET_AT91 is not set
775# CONFIG_USB_GADGET_ATMEL_USBA is not set
776# CONFIG_USB_GADGET_FSL_USB2 is not set
777# CONFIG_USB_GADGET_LH7A40X is not set
778# CONFIG_USB_GADGET_OMAP is not set
779# CONFIG_USB_GADGET_PXA25X is not set
780# CONFIG_USB_GADGET_PXA27X is not set
781# CONFIG_USB_GADGET_S3C2410 is not set
782CONFIG_USB_GADGET_IMX=y
783CONFIG_USB_IMX=y
784# CONFIG_USB_GADGET_M66592 is not set
785# CONFIG_USB_GADGET_AMD5536UDC is not set
786# CONFIG_USB_GADGET_FSL_QE is not set
787# CONFIG_USB_GADGET_CI13XXX is not set
788# CONFIG_USB_GADGET_NET2280 is not set
789# CONFIG_USB_GADGET_GOKU is not set
790# CONFIG_USB_GADGET_DUMMY_HCD is not set
791# CONFIG_USB_GADGET_DUALSPEED is not set
792# CONFIG_USB_ZERO is not set
793CONFIG_USB_ETH=y
794CONFIG_USB_ETH_RNDIS=y
795# CONFIG_USB_GADGETFS is not set
796# CONFIG_USB_FILE_STORAGE is not set
797# CONFIG_USB_G_SERIAL is not set
798# CONFIG_USB_MIDI_GADGET is not set
799# CONFIG_USB_G_PRINTER is not set
800# CONFIG_USB_CDC_COMPOSITE is not set
801
620# 802#
621# CONFIG_SOUND is not set 803# OTG and related infrastructure
622# CONFIG_USB_SUPPORT is not set 804#
623# CONFIG_MMC is not set 805# CONFIG_USB_GPIO_VBUS is not set
806# CONFIG_NOP_USB_XCEIV is not set
807CONFIG_MMC=y
808# CONFIG_MMC_DEBUG is not set
809# CONFIG_MMC_UNSAFE_RESUME is not set
810
811#
812# MMC/SD/SDIO Card Drivers
813#
814CONFIG_MMC_BLOCK=y
815CONFIG_MMC_BLOCK_BOUNCE=y
816# CONFIG_SDIO_UART is not set
817# CONFIG_MMC_TEST is not set
818
819#
820# MMC/SD/SDIO Host Controller Drivers
821#
822# CONFIG_MMC_SDHCI is not set
823CONFIG_MMC_MXC=y
824# CONFIG_MEMSTICK is not set
825# CONFIG_ACCESSIBILITY is not set
624# CONFIG_NEW_LEDS is not set 826# CONFIG_NEW_LEDS is not set
625CONFIG_RTC_LIB=y 827CONFIG_RTC_LIB=y
626# CONFIG_RTC_CLASS is not set 828# CONFIG_RTC_CLASS is not set
829# CONFIG_DMADEVICES is not set
830# CONFIG_AUXDISPLAY is not set
831# CONFIG_REGULATOR is not set
627# CONFIG_UIO is not set 832# CONFIG_UIO is not set
833# CONFIG_STAGING is not set
628 834
629# 835#
630# File systems 836# File systems
631# 837#
632# CONFIG_EXT2_FS is not set 838# CONFIG_EXT2_FS is not set
633# CONFIG_EXT3_FS is not set 839# CONFIG_EXT3_FS is not set
634# CONFIG_EXT4DEV_FS is not set 840# CONFIG_EXT4_FS is not set
635# CONFIG_REISERFS_FS is not set 841# CONFIG_REISERFS_FS is not set
636# CONFIG_JFS_FS is not set 842# CONFIG_JFS_FS is not set
637# CONFIG_FS_POSIX_ACL is not set 843# CONFIG_FS_POSIX_ACL is not set
844CONFIG_FILE_LOCKING=y
638# CONFIG_XFS_FS is not set 845# CONFIG_XFS_FS is not set
639# CONFIG_OCFS2_FS is not set 846# CONFIG_OCFS2_FS is not set
847# CONFIG_BTRFS_FS is not set
640# CONFIG_DNOTIFY is not set 848# CONFIG_DNOTIFY is not set
641CONFIG_INOTIFY=y 849CONFIG_INOTIFY=y
642CONFIG_INOTIFY_USER=y 850CONFIG_INOTIFY_USER=y
@@ -646,6 +854,11 @@ CONFIG_INOTIFY_USER=y
646# CONFIG_FUSE_FS is not set 854# CONFIG_FUSE_FS is not set
647 855
648# 856#
857# Caches
858#
859# CONFIG_FSCACHE is not set
860
861#
649# CD-ROM/DVD Filesystems 862# CD-ROM/DVD Filesystems
650# 863#
651# CONFIG_ISO9660_FS is not set 864# CONFIG_ISO9660_FS is not set
@@ -663,15 +876,13 @@ CONFIG_INOTIFY_USER=y
663# 876#
664CONFIG_PROC_FS=y 877CONFIG_PROC_FS=y
665CONFIG_PROC_SYSCTL=y 878CONFIG_PROC_SYSCTL=y
879CONFIG_PROC_PAGE_MONITOR=y
666CONFIG_SYSFS=y 880CONFIG_SYSFS=y
667CONFIG_TMPFS=y 881CONFIG_TMPFS=y
668# CONFIG_TMPFS_POSIX_ACL is not set 882# CONFIG_TMPFS_POSIX_ACL is not set
669# CONFIG_HUGETLB_PAGE is not set 883# CONFIG_HUGETLB_PAGE is not set
670# CONFIG_CONFIGFS_FS is not set 884# CONFIG_CONFIGFS_FS is not set
671 885CONFIG_MISC_FILESYSTEMS=y
672#
673# Miscellaneous filesystems
674#
675# CONFIG_ADFS_FS is not set 886# CONFIG_ADFS_FS is not set
676# CONFIG_AFFS_FS is not set 887# CONFIG_AFFS_FS is not set
677# CONFIG_HFS_FS is not set 888# CONFIG_HFS_FS is not set
@@ -691,24 +902,29 @@ CONFIG_JFFS2_ZLIB=y
691CONFIG_JFFS2_RTIME=y 902CONFIG_JFFS2_RTIME=y
692# CONFIG_JFFS2_RUBIN is not set 903# CONFIG_JFFS2_RUBIN is not set
693# CONFIG_CRAMFS is not set 904# CONFIG_CRAMFS is not set
905# CONFIG_SQUASHFS is not set
694# CONFIG_VXFS_FS is not set 906# CONFIG_VXFS_FS is not set
695# CONFIG_MINIX_FS is not set 907# CONFIG_MINIX_FS is not set
908# CONFIG_OMFS_FS is not set
696# CONFIG_HPFS_FS is not set 909# CONFIG_HPFS_FS is not set
697# CONFIG_QNX4FS_FS is not set 910# CONFIG_QNX4FS_FS is not set
698# CONFIG_ROMFS_FS is not set 911# CONFIG_ROMFS_FS is not set
699# CONFIG_SYSV_FS is not set 912# CONFIG_SYSV_FS is not set
700# CONFIG_UFS_FS is not set 913# CONFIG_UFS_FS is not set
914# CONFIG_NILFS2_FS is not set
701CONFIG_NETWORK_FILESYSTEMS=y 915CONFIG_NETWORK_FILESYSTEMS=y
702CONFIG_NFS_FS=y 916CONFIG_NFS_FS=y
703# CONFIG_NFS_V3 is not set 917CONFIG_NFS_V3=y
704# CONFIG_NFS_V4 is not set 918# CONFIG_NFS_V3_ACL is not set
705# CONFIG_NFSD is not set 919CONFIG_NFS_V4=y
706CONFIG_ROOT_NFS=y 920CONFIG_ROOT_NFS=y
921# CONFIG_NFSD is not set
707CONFIG_LOCKD=y 922CONFIG_LOCKD=y
923CONFIG_LOCKD_V4=y
708CONFIG_NFS_COMMON=y 924CONFIG_NFS_COMMON=y
709CONFIG_SUNRPC=y 925CONFIG_SUNRPC=y
710# CONFIG_SUNRPC_BIND34 is not set 926CONFIG_SUNRPC_GSS=y
711# CONFIG_RPCSEC_GSS_KRB5 is not set 927CONFIG_RPCSEC_GSS_KRB5=y
712# CONFIG_RPCSEC_GSS_SPKM3 is not set 928# CONFIG_RPCSEC_GSS_SPKM3 is not set
713# CONFIG_SMB_FS is not set 929# CONFIG_SMB_FS is not set
714# CONFIG_CIFS is not set 930# CONFIG_CIFS is not set
@@ -737,8 +953,31 @@ CONFIG_FRAME_WARN=1024
737# CONFIG_HEADERS_CHECK is not set 953# CONFIG_HEADERS_CHECK is not set
738# CONFIG_DEBUG_KERNEL is not set 954# CONFIG_DEBUG_KERNEL is not set
739# CONFIG_DEBUG_BUGVERBOSE is not set 955# CONFIG_DEBUG_BUGVERBOSE is not set
740CONFIG_FRAME_POINTER=y 956# CONFIG_DEBUG_MEMORY_INIT is not set
957# CONFIG_RCU_CPU_STALL_DETECTOR is not set
958# CONFIG_LATENCYTOP is not set
959CONFIG_SYSCTL_SYSCALL_CHECK=y
960CONFIG_HAVE_FUNCTION_TRACER=y
961CONFIG_TRACING_SUPPORT=y
962
963#
964# Tracers
965#
966# CONFIG_FUNCTION_TRACER is not set
967# CONFIG_IRQSOFF_TRACER is not set
968# CONFIG_PREEMPT_TRACER is not set
969# CONFIG_SCHED_TRACER is not set
970# CONFIG_CONTEXT_SWITCH_TRACER is not set
971# CONFIG_EVENT_TRACER is not set
972# CONFIG_BOOT_TRACER is not set
973# CONFIG_TRACE_BRANCH_PROFILING is not set
974# CONFIG_STACK_TRACER is not set
975# CONFIG_KMEMTRACE is not set
976# CONFIG_WORKQUEUE_TRACER is not set
977# CONFIG_BLK_DEV_IO_TRACE is not set
741# CONFIG_SAMPLES is not set 978# CONFIG_SAMPLES is not set
979CONFIG_HAVE_ARCH_KGDB=y
980CONFIG_ARM_UNWIND=y
742# CONFIG_DEBUG_USER is not set 981# CONFIG_DEBUG_USER is not set
743 982
744# 983#
@@ -746,24 +985,121 @@ CONFIG_FRAME_POINTER=y
746# 985#
747# CONFIG_KEYS is not set 986# CONFIG_KEYS is not set
748# CONFIG_SECURITY is not set 987# CONFIG_SECURITY is not set
988# CONFIG_SECURITYFS is not set
749# CONFIG_SECURITY_FILE_CAPABILITIES is not set 989# CONFIG_SECURITY_FILE_CAPABILITIES is not set
750# CONFIG_CRYPTO is not set 990CONFIG_CRYPTO=y
991
992#
993# Crypto core or helper
994#
995# CONFIG_CRYPTO_FIPS is not set
996CONFIG_CRYPTO_ALGAPI=y
997CONFIG_CRYPTO_ALGAPI2=y
998CONFIG_CRYPTO_AEAD2=y
999CONFIG_CRYPTO_BLKCIPHER=y
1000CONFIG_CRYPTO_BLKCIPHER2=y
1001CONFIG_CRYPTO_HASH=y
1002CONFIG_CRYPTO_HASH2=y
1003CONFIG_CRYPTO_RNG2=y
1004CONFIG_CRYPTO_PCOMP=y
1005CONFIG_CRYPTO_MANAGER=y
1006CONFIG_CRYPTO_MANAGER2=y
1007# CONFIG_CRYPTO_GF128MUL is not set
1008# CONFIG_CRYPTO_NULL is not set
1009CONFIG_CRYPTO_WORKQUEUE=y
1010# CONFIG_CRYPTO_CRYPTD is not set
1011# CONFIG_CRYPTO_AUTHENC is not set
1012# CONFIG_CRYPTO_TEST is not set
1013
1014#
1015# Authenticated Encryption with Associated Data
1016#
1017# CONFIG_CRYPTO_CCM is not set
1018# CONFIG_CRYPTO_GCM is not set
1019# CONFIG_CRYPTO_SEQIV is not set
1020
1021#
1022# Block modes
1023#
1024CONFIG_CRYPTO_CBC=y
1025# CONFIG_CRYPTO_CTR is not set
1026# CONFIG_CRYPTO_CTS is not set
1027# CONFIG_CRYPTO_ECB is not set
1028# CONFIG_CRYPTO_LRW is not set
1029# CONFIG_CRYPTO_PCBC is not set
1030# CONFIG_CRYPTO_XTS is not set
1031
1032#
1033# Hash modes
1034#
1035# CONFIG_CRYPTO_HMAC is not set
1036# CONFIG_CRYPTO_XCBC is not set
1037
1038#
1039# Digest
1040#
1041# CONFIG_CRYPTO_CRC32C is not set
1042# CONFIG_CRYPTO_MD4 is not set
1043CONFIG_CRYPTO_MD5=y
1044# CONFIG_CRYPTO_MICHAEL_MIC is not set
1045# CONFIG_CRYPTO_RMD128 is not set
1046# CONFIG_CRYPTO_RMD160 is not set
1047# CONFIG_CRYPTO_RMD256 is not set
1048# CONFIG_CRYPTO_RMD320 is not set
1049# CONFIG_CRYPTO_SHA1 is not set
1050# CONFIG_CRYPTO_SHA256 is not set
1051# CONFIG_CRYPTO_SHA512 is not set
1052# CONFIG_CRYPTO_TGR192 is not set
1053# CONFIG_CRYPTO_WP512 is not set
1054
1055#
1056# Ciphers
1057#
1058# CONFIG_CRYPTO_AES is not set
1059# CONFIG_CRYPTO_ANUBIS is not set
1060# CONFIG_CRYPTO_ARC4 is not set
1061# CONFIG_CRYPTO_BLOWFISH is not set
1062# CONFIG_CRYPTO_CAMELLIA is not set
1063# CONFIG_CRYPTO_CAST5 is not set
1064# CONFIG_CRYPTO_CAST6 is not set
1065CONFIG_CRYPTO_DES=y
1066# CONFIG_CRYPTO_FCRYPT is not set
1067# CONFIG_CRYPTO_KHAZAD is not set
1068# CONFIG_CRYPTO_SALSA20 is not set
1069# CONFIG_CRYPTO_SEED is not set
1070# CONFIG_CRYPTO_SERPENT is not set
1071# CONFIG_CRYPTO_TEA is not set
1072# CONFIG_CRYPTO_TWOFISH is not set
1073
1074#
1075# Compression
1076#
1077# CONFIG_CRYPTO_DEFLATE is not set
1078# CONFIG_CRYPTO_ZLIB is not set
1079# CONFIG_CRYPTO_LZO is not set
1080
1081#
1082# Random Number Generation
1083#
1084# CONFIG_CRYPTO_ANSI_CPRNG is not set
1085CONFIG_CRYPTO_HW=y
1086# CONFIG_BINARY_PRINTF is not set
751 1087
752# 1088#
753# Library routines 1089# Library routines
754# 1090#
755CONFIG_BITREVERSE=y 1091CONFIG_BITREVERSE=y
756# CONFIG_GENERIC_FIND_FIRST_BIT is not set 1092CONFIG_GENERIC_FIND_LAST_BIT=y
757# CONFIG_GENERIC_FIND_NEXT_BIT is not set
758# CONFIG_CRC_CCITT is not set 1093# CONFIG_CRC_CCITT is not set
759# CONFIG_CRC16 is not set 1094# CONFIG_CRC16 is not set
1095# CONFIG_CRC_T10DIF is not set
760# CONFIG_CRC_ITU_T is not set 1096# CONFIG_CRC_ITU_T is not set
761CONFIG_CRC32=y 1097CONFIG_CRC32=y
762# CONFIG_CRC7 is not set 1098# CONFIG_CRC7 is not set
763# CONFIG_LIBCRC32C is not set 1099# CONFIG_LIBCRC32C is not set
764CONFIG_ZLIB_INFLATE=y 1100CONFIG_ZLIB_INFLATE=y
765CONFIG_ZLIB_DEFLATE=y 1101CONFIG_ZLIB_DEFLATE=y
766CONFIG_PLIST=y
767CONFIG_HAS_IOMEM=y 1102CONFIG_HAS_IOMEM=y
768CONFIG_HAS_IOPORT=y 1103CONFIG_HAS_IOPORT=y
769CONFIG_HAS_DMA=y 1104CONFIG_HAS_DMA=y
1105CONFIG_NLATTR=y
diff --git a/arch/arm/configs/pcm038_defconfig b/arch/arm/configs/mx27_defconfig
index 41429a00f58c..083516cd0d7f 100644
--- a/arch/arm/configs/pcm038_defconfig
+++ b/arch/arm/configs/mx27_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.26-rc6 3# Linux kernel version: 2.6.30-rc1
4# Fri Jun 20 16:38:36 2008 4# Wed Apr 8 10:18:06 2009
5# 5#
6CONFIG_ARM=y 6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y 7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
@@ -12,6 +12,7 @@ CONFIG_MMU=y
12# CONFIG_NO_IOPORT is not set 12# CONFIG_NO_IOPORT is not set
13CONFIG_GENERIC_HARDIRQS=y 13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_STACKTRACE_SUPPORT=y 14CONFIG_STACKTRACE_SUPPORT=y
15CONFIG_HAVE_LATENCYTOP_SUPPORT=y
15CONFIG_LOCKDEP_SUPPORT=y 16CONFIG_LOCKDEP_SUPPORT=y
16CONFIG_TRACE_IRQFLAGS_SUPPORT=y 17CONFIG_TRACE_IRQFLAGS_SUPPORT=y
17CONFIG_HARDIRQS_SW_RESEND=y 18CONFIG_HARDIRQS_SW_RESEND=y
@@ -21,9 +22,8 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
21# CONFIG_ARCH_HAS_ILOG2_U64 is not set 22# CONFIG_ARCH_HAS_ILOG2_U64 is not set
22CONFIG_GENERIC_HWEIGHT=y 23CONFIG_GENERIC_HWEIGHT=y
23CONFIG_GENERIC_CALIBRATE_DELAY=y 24CONFIG_GENERIC_CALIBRATE_DELAY=y
24CONFIG_ARCH_SUPPORTS_AOUT=y
25CONFIG_ZONE_DMA=y
26CONFIG_ARCH_MTD_XIP=y 25CONFIG_ARCH_MTD_XIP=y
26CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
27CONFIG_VECTORS_BASE=0xffff0000 27CONFIG_VECTORS_BASE=0xffff0000
28CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 28CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
29 29
@@ -40,47 +40,58 @@ CONFIG_LOCALVERSION_AUTO=y
40CONFIG_SYSVIPC=y 40CONFIG_SYSVIPC=y
41CONFIG_SYSVIPC_SYSCTL=y 41CONFIG_SYSVIPC_SYSCTL=y
42CONFIG_POSIX_MQUEUE=y 42CONFIG_POSIX_MQUEUE=y
43CONFIG_POSIX_MQUEUE_SYSCTL=y
43# CONFIG_BSD_PROCESS_ACCT is not set 44# CONFIG_BSD_PROCESS_ACCT is not set
44# CONFIG_TASKSTATS is not set 45# CONFIG_TASKSTATS is not set
45# CONFIG_AUDIT is not set 46# CONFIG_AUDIT is not set
47
48#
49# RCU Subsystem
50#
51CONFIG_CLASSIC_RCU=y
52# CONFIG_TREE_RCU is not set
53# CONFIG_PREEMPT_RCU is not set
54# CONFIG_TREE_RCU_TRACE is not set
55# CONFIG_PREEMPT_RCU_TRACE is not set
46# CONFIG_IKCONFIG is not set 56# CONFIG_IKCONFIG is not set
47CONFIG_LOG_BUF_SHIFT=14 57CONFIG_LOG_BUF_SHIFT=14
48# CONFIG_CGROUPS is not set
49CONFIG_GROUP_SCHED=y 58CONFIG_GROUP_SCHED=y
50CONFIG_FAIR_GROUP_SCHED=y 59CONFIG_FAIR_GROUP_SCHED=y
51CONFIG_RT_GROUP_SCHED=y 60CONFIG_RT_GROUP_SCHED=y
52CONFIG_USER_SCHED=y 61CONFIG_USER_SCHED=y
53# CONFIG_CGROUP_SCHED is not set 62# CONFIG_CGROUP_SCHED is not set
63# CONFIG_CGROUPS is not set
54# CONFIG_SYSFS_DEPRECATED_V2 is not set 64# CONFIG_SYSFS_DEPRECATED_V2 is not set
55# CONFIG_RELAY is not set 65# CONFIG_RELAY is not set
56# CONFIG_NAMESPACES is not set 66# CONFIG_NAMESPACES is not set
57# CONFIG_BLK_DEV_INITRD is not set 67# CONFIG_BLK_DEV_INITRD is not set
58# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 68# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
59CONFIG_SYSCTL=y 69CONFIG_SYSCTL=y
70CONFIG_ANON_INODES=y
60CONFIG_EMBEDDED=y 71CONFIG_EMBEDDED=y
61CONFIG_UID16=y 72CONFIG_UID16=y
62CONFIG_SYSCTL_SYSCALL=y 73CONFIG_SYSCTL_SYSCALL=y
63CONFIG_SYSCTL_SYSCALL_CHECK=y
64CONFIG_KALLSYMS=y 74CONFIG_KALLSYMS=y
65CONFIG_KALLSYMS_EXTRA_PASS=y 75CONFIG_KALLSYMS_EXTRA_PASS=y
66CONFIG_HOTPLUG=y 76CONFIG_HOTPLUG=y
67CONFIG_PRINTK=y 77CONFIG_PRINTK=y
68CONFIG_BUG=y 78CONFIG_BUG=y
69CONFIG_ELF_CORE=y 79CONFIG_ELF_CORE=y
70# CONFIG_COMPAT_BRK is not set
71CONFIG_BASE_FULL=y 80CONFIG_BASE_FULL=y
72CONFIG_FUTEX=y 81CONFIG_FUTEX=y
73CONFIG_ANON_INODES=y
74CONFIG_EPOLL=y 82CONFIG_EPOLL=y
75CONFIG_SIGNALFD=y 83CONFIG_SIGNALFD=y
76CONFIG_TIMERFD=y 84CONFIG_TIMERFD=y
77CONFIG_EVENTFD=y 85CONFIG_EVENTFD=y
78CONFIG_SHMEM=y 86CONFIG_SHMEM=y
87CONFIG_AIO=y
79CONFIG_VM_EVENT_COUNTERS=y 88CONFIG_VM_EVENT_COUNTERS=y
89# CONFIG_COMPAT_BRK is not set
80CONFIG_SLAB=y 90CONFIG_SLAB=y
81# CONFIG_SLUB is not set 91# CONFIG_SLUB is not set
82# CONFIG_SLOB is not set 92# CONFIG_SLOB is not set
83CONFIG_PROFILING=y 93CONFIG_PROFILING=y
94CONFIG_TRACEPOINTS=y
84CONFIG_MARKERS=y 95CONFIG_MARKERS=y
85CONFIG_OPROFILE=y 96CONFIG_OPROFILE=y
86CONFIG_HAVE_OPROFILE=y 97CONFIG_HAVE_OPROFILE=y
@@ -88,11 +99,10 @@ CONFIG_KPROBES=y
88CONFIG_KRETPROBES=y 99CONFIG_KRETPROBES=y
89CONFIG_HAVE_KPROBES=y 100CONFIG_HAVE_KPROBES=y
90CONFIG_HAVE_KRETPROBES=y 101CONFIG_HAVE_KRETPROBES=y
91# CONFIG_HAVE_DMA_ATTRS is not set 102# CONFIG_SLOW_WORK is not set
92# CONFIG_PROC_PAGE_MONITOR is not set 103CONFIG_HAVE_GENERIC_DMA_COHERENT=y
93CONFIG_SLABINFO=y 104CONFIG_SLABINFO=y
94CONFIG_RT_MUTEXES=y 105CONFIG_RT_MUTEXES=y
95# CONFIG_TINY_SHMEM is not set
96CONFIG_BASE_SMALL=0 106CONFIG_BASE_SMALL=0
97CONFIG_MODULES=y 107CONFIG_MODULES=y
98# CONFIG_MODULE_FORCE_LOAD is not set 108# CONFIG_MODULE_FORCE_LOAD is not set
@@ -100,12 +110,10 @@ CONFIG_MODULE_UNLOAD=y
100# CONFIG_MODULE_FORCE_UNLOAD is not set 110# CONFIG_MODULE_FORCE_UNLOAD is not set
101# CONFIG_MODVERSIONS is not set 111# CONFIG_MODVERSIONS is not set
102# CONFIG_MODULE_SRCVERSION_ALL is not set 112# CONFIG_MODULE_SRCVERSION_ALL is not set
103# CONFIG_KMOD is not set
104CONFIG_BLOCK=y 113CONFIG_BLOCK=y
105# CONFIG_LBD is not set 114# CONFIG_LBD is not set
106# CONFIG_BLK_DEV_IO_TRACE is not set
107# CONFIG_LSF is not set
108# CONFIG_BLK_DEV_BSG is not set 115# CONFIG_BLK_DEV_BSG is not set
116# CONFIG_BLK_DEV_INTEGRITY is not set
109 117
110# 118#
111# IO Schedulers 119# IO Schedulers
@@ -119,7 +127,7 @@ CONFIG_IOSCHED_NOOP=y
119# CONFIG_DEFAULT_CFQ is not set 127# CONFIG_DEFAULT_CFQ is not set
120CONFIG_DEFAULT_NOOP=y 128CONFIG_DEFAULT_NOOP=y
121CONFIG_DEFAULT_IOSCHED="noop" 129CONFIG_DEFAULT_IOSCHED="noop"
122CONFIG_CLASSIC_RCU=y 130CONFIG_FREEZER=y
123 131
124# 132#
125# System Type 133# System Type
@@ -129,11 +137,10 @@ CONFIG_CLASSIC_RCU=y
129# CONFIG_ARCH_REALVIEW is not set 137# CONFIG_ARCH_REALVIEW is not set
130# CONFIG_ARCH_VERSATILE is not set 138# CONFIG_ARCH_VERSATILE is not set
131# CONFIG_ARCH_AT91 is not set 139# CONFIG_ARCH_AT91 is not set
132# CONFIG_ARCH_CLPS7500 is not set
133# CONFIG_ARCH_CLPS711X is not set 140# CONFIG_ARCH_CLPS711X is not set
134# CONFIG_ARCH_CO285 is not set
135# CONFIG_ARCH_EBSA110 is not set 141# CONFIG_ARCH_EBSA110 is not set
136# CONFIG_ARCH_EP93XX is not set 142# CONFIG_ARCH_EP93XX is not set
143# CONFIG_ARCH_GEMINI is not set
137# CONFIG_ARCH_FOOTBRIDGE is not set 144# CONFIG_ARCH_FOOTBRIDGE is not set
138# CONFIG_ARCH_NETX is not set 145# CONFIG_ARCH_NETX is not set
139# CONFIG_ARCH_H720X is not set 146# CONFIG_ARCH_H720X is not set
@@ -145,46 +152,44 @@ CONFIG_CLASSIC_RCU=y
145# CONFIG_ARCH_IXP2000 is not set 152# CONFIG_ARCH_IXP2000 is not set
146# CONFIG_ARCH_IXP4XX is not set 153# CONFIG_ARCH_IXP4XX is not set
147# CONFIG_ARCH_L7200 is not set 154# CONFIG_ARCH_L7200 is not set
155# CONFIG_ARCH_KIRKWOOD is not set
148# CONFIG_ARCH_KS8695 is not set 156# CONFIG_ARCH_KS8695 is not set
149# CONFIG_ARCH_NS9XXX is not set 157# CONFIG_ARCH_NS9XXX is not set
158# CONFIG_ARCH_LOKI is not set
159# CONFIG_ARCH_MV78XX0 is not set
150CONFIG_ARCH_MXC=y 160CONFIG_ARCH_MXC=y
151# CONFIG_ARCH_ORION5X is not set 161# CONFIG_ARCH_ORION5X is not set
152# CONFIG_ARCH_PNX4008 is not set 162# CONFIG_ARCH_PNX4008 is not set
153# CONFIG_ARCH_PXA is not set 163# CONFIG_ARCH_PXA is not set
164# CONFIG_ARCH_MMP is not set
154# CONFIG_ARCH_RPC is not set 165# CONFIG_ARCH_RPC is not set
155# CONFIG_ARCH_SA1100 is not set 166# CONFIG_ARCH_SA1100 is not set
156# CONFIG_ARCH_S3C2410 is not set 167# CONFIG_ARCH_S3C2410 is not set
168# CONFIG_ARCH_S3C64XX is not set
157# CONFIG_ARCH_SHARK is not set 169# CONFIG_ARCH_SHARK is not set
158# CONFIG_ARCH_LH7A40X is not set 170# CONFIG_ARCH_LH7A40X is not set
159# CONFIG_ARCH_DAVINCI is not set 171# CONFIG_ARCH_DAVINCI is not set
160# CONFIG_ARCH_OMAP is not set 172# CONFIG_ARCH_OMAP is not set
161# CONFIG_ARCH_MSM7X00A is not set 173# CONFIG_ARCH_MSM is not set
162 174# CONFIG_ARCH_W90X900 is not set
163#
164# Boot options
165#
166
167#
168# Power management
169#
170 175
171# 176#
172# Freescale MXC Implementations 177# Freescale MXC Implementations
173# 178#
179# CONFIG_ARCH_MX1 is not set
174CONFIG_ARCH_MX2=y 180CONFIG_ARCH_MX2=y
175# CONFIG_ARCH_MX3 is not set 181# CONFIG_ARCH_MX3 is not set
176 182# CONFIG_MACH_MX21 is not set
177#
178# MX2 family CPU support
179#
180CONFIG_MACH_MX27=y 183CONFIG_MACH_MX27=y
181 184
182# 185#
183# MX2 Platforms 186# MX2 platforms:
184# 187#
185# CONFIG_MACH_MX27ADS is not set 188CONFIG_MACH_MX27ADS=y
186CONFIG_MACH_PCM038=y 189CONFIG_MACH_PCM038=y
187CONFIG_MACH_PCM970_BASEBOARD=y 190CONFIG_MACH_PCM970_BASEBOARD=y
191CONFIG_MXC_IRQ_PRIOR=y
192CONFIG_MXC_PWM=y
188 193
189# 194#
190# Processor Type 195# Processor Type
@@ -209,6 +214,7 @@ CONFIG_ARM_THUMB=y
209# CONFIG_CPU_DCACHE_WRITETHROUGH is not set 214# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
210# CONFIG_CPU_CACHE_ROUND_ROBIN is not set 215# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
211# CONFIG_OUTER_CACHE is not set 216# CONFIG_OUTER_CACHE is not set
217CONFIG_COMMON_CLKDEV=y
212 218
213# 219#
214# Bus support 220# Bus support
@@ -224,25 +230,32 @@ CONFIG_TICK_ONESHOT=y
224CONFIG_NO_HZ=y 230CONFIG_NO_HZ=y
225CONFIG_HIGH_RES_TIMERS=y 231CONFIG_HIGH_RES_TIMERS=y
226CONFIG_GENERIC_CLOCKEVENTS_BUILD=y 232CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
233CONFIG_VMSPLIT_3G=y
234# CONFIG_VMSPLIT_2G is not set
235# CONFIG_VMSPLIT_1G is not set
236CONFIG_PAGE_OFFSET=0xC0000000
227CONFIG_PREEMPT=y 237CONFIG_PREEMPT=y
228CONFIG_HZ=100 238CONFIG_HZ=100
229CONFIG_AEABI=y 239CONFIG_AEABI=y
230# CONFIG_OABI_COMPAT is not set 240CONFIG_OABI_COMPAT=y
231# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set 241CONFIG_ARCH_FLATMEM_HAS_HOLES=y
242# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
243# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
244# CONFIG_HIGHMEM is not set
232CONFIG_SELECT_MEMORY_MODEL=y 245CONFIG_SELECT_MEMORY_MODEL=y
233CONFIG_FLATMEM_MANUAL=y 246CONFIG_FLATMEM_MANUAL=y
234# CONFIG_DISCONTIGMEM_MANUAL is not set 247# CONFIG_DISCONTIGMEM_MANUAL is not set
235# CONFIG_SPARSEMEM_MANUAL is not set 248# CONFIG_SPARSEMEM_MANUAL is not set
236CONFIG_FLATMEM=y 249CONFIG_FLATMEM=y
237CONFIG_FLAT_NODE_MEM_MAP=y 250CONFIG_FLAT_NODE_MEM_MAP=y
238# CONFIG_SPARSEMEM_STATIC is not set
239# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
240CONFIG_PAGEFLAGS_EXTENDED=y 251CONFIG_PAGEFLAGS_EXTENDED=y
241CONFIG_SPLIT_PTLOCK_CPUS=4096 252CONFIG_SPLIT_PTLOCK_CPUS=4096
242# CONFIG_RESOURCES_64BIT is not set 253# CONFIG_PHYS_ADDR_T_64BIT is not set
243CONFIG_ZONE_DMA_FLAG=1 254CONFIG_ZONE_DMA_FLAG=0
244CONFIG_BOUNCE=y
245CONFIG_VIRT_TO_BUS=y 255CONFIG_VIRT_TO_BUS=y
256CONFIG_UNEVICTABLE_LRU=y
257CONFIG_HAVE_MLOCK=y
258CONFIG_HAVE_MLOCKED_PAGE_BIT=y
246CONFIG_ALIGNMENT_TRAP=y 259CONFIG_ALIGNMENT_TRAP=y
247 260
248# 261#
@@ -255,30 +268,44 @@ CONFIG_CMDLINE=""
255# CONFIG_KEXEC is not set 268# CONFIG_KEXEC is not set
256 269
257# 270#
271# CPU Power Management
272#
273# CONFIG_CPU_IDLE is not set
274
275#
258# Floating point emulation 276# Floating point emulation
259# 277#
260 278
261# 279#
262# At least one emulation must be selected 280# At least one emulation must be selected
263# 281#
282CONFIG_FPE_NWFPE=y
283CONFIG_FPE_NWFPE_XP=y
284# CONFIG_FPE_FASTFPE is not set
264# CONFIG_VFP is not set 285# CONFIG_VFP is not set
265 286
266# 287#
267# Userspace binary formats 288# Userspace binary formats
268# 289#
269CONFIG_BINFMT_ELF=y 290CONFIG_BINFMT_ELF=y
291# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
292CONFIG_HAVE_AOUT=y
270# CONFIG_BINFMT_AOUT is not set 293# CONFIG_BINFMT_AOUT is not set
271# CONFIG_BINFMT_MISC is not set 294# CONFIG_BINFMT_MISC is not set
272 295
273# 296#
274# Power management options 297# Power management options
275# 298#
276# CONFIG_PM is not set 299CONFIG_PM=y
300CONFIG_PM_DEBUG=y
301# CONFIG_PM_VERBOSE is not set
302CONFIG_CAN_PM_TRACE=y
303CONFIG_PM_SLEEP=y
304CONFIG_SUSPEND=y
305# CONFIG_PM_TEST_SUSPEND is not set
306CONFIG_SUSPEND_FREEZER=y
307# CONFIG_APM_EMULATION is not set
277CONFIG_ARCH_SUSPEND_POSSIBLE=y 308CONFIG_ARCH_SUSPEND_POSSIBLE=y
278
279#
280# Networking
281#
282CONFIG_NET=y 309CONFIG_NET=y
283 310
284# 311#
@@ -293,7 +320,7 @@ CONFIG_IP_MULTICAST=y
293# CONFIG_IP_ADVANCED_ROUTER is not set 320# CONFIG_IP_ADVANCED_ROUTER is not set
294CONFIG_IP_FIB_HASH=y 321CONFIG_IP_FIB_HASH=y
295CONFIG_IP_PNP=y 322CONFIG_IP_PNP=y
296# CONFIG_IP_PNP_DHCP is not set 323CONFIG_IP_PNP_DHCP=y
297# CONFIG_IP_PNP_BOOTP is not set 324# CONFIG_IP_PNP_BOOTP is not set
298# CONFIG_IP_PNP_RARP is not set 325# CONFIG_IP_PNP_RARP is not set
299# CONFIG_NET_IPIP is not set 326# CONFIG_NET_IPIP is not set
@@ -323,6 +350,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
323# CONFIG_TIPC is not set 350# CONFIG_TIPC is not set
324# CONFIG_ATM is not set 351# CONFIG_ATM is not set
325# CONFIG_BRIDGE is not set 352# CONFIG_BRIDGE is not set
353# CONFIG_NET_DSA is not set
326# CONFIG_VLAN_8021Q is not set 354# CONFIG_VLAN_8021Q is not set
327# CONFIG_DECNET is not set 355# CONFIG_DECNET is not set
328# CONFIG_LLC2 is not set 356# CONFIG_LLC2 is not set
@@ -332,26 +360,23 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
332# CONFIG_LAPB is not set 360# CONFIG_LAPB is not set
333# CONFIG_ECONET is not set 361# CONFIG_ECONET is not set
334# CONFIG_WAN_ROUTER is not set 362# CONFIG_WAN_ROUTER is not set
363# CONFIG_PHONET is not set
335# CONFIG_NET_SCHED is not set 364# CONFIG_NET_SCHED is not set
365# CONFIG_DCB is not set
336 366
337# 367#
338# Network testing 368# Network testing
339# 369#
340# CONFIG_NET_PKTGEN is not set 370# CONFIG_NET_PKTGEN is not set
341# CONFIG_NET_TCPPROBE is not set 371# CONFIG_NET_TCPPROBE is not set
372# CONFIG_NET_DROP_MONITOR is not set
342# CONFIG_HAMRADIO is not set 373# CONFIG_HAMRADIO is not set
343# CONFIG_CAN is not set 374# CONFIG_CAN is not set
344# CONFIG_IRDA is not set 375# CONFIG_IRDA is not set
345# CONFIG_BT is not set 376# CONFIG_BT is not set
346# CONFIG_AF_RXRPC is not set 377# CONFIG_AF_RXRPC is not set
347 378# CONFIG_WIRELESS is not set
348# 379# CONFIG_WIMAX is not set
349# Wireless
350#
351# CONFIG_CFG80211 is not set
352# CONFIG_WIRELESS_EXT is not set
353# CONFIG_MAC80211 is not set
354# CONFIG_IEEE80211 is not set
355# CONFIG_RFKILL is not set 380# CONFIG_RFKILL is not set
356# CONFIG_NET_9P is not set 381# CONFIG_NET_9P is not set
357 382
@@ -366,12 +391,15 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
366CONFIG_STANDALONE=y 391CONFIG_STANDALONE=y
367CONFIG_PREVENT_FIRMWARE_BUILD=y 392CONFIG_PREVENT_FIRMWARE_BUILD=y
368CONFIG_FW_LOADER=y 393CONFIG_FW_LOADER=y
394CONFIG_FIRMWARE_IN_KERNEL=y
395CONFIG_EXTRA_FIRMWARE=""
369# CONFIG_SYS_HYPERVISOR is not set 396# CONFIG_SYS_HYPERVISOR is not set
370# CONFIG_CONNECTOR is not set 397# CONFIG_CONNECTOR is not set
371CONFIG_MTD=y 398CONFIG_MTD=y
372# CONFIG_MTD_DEBUG is not set 399# CONFIG_MTD_DEBUG is not set
373# CONFIG_MTD_CONCAT is not set 400# CONFIG_MTD_CONCAT is not set
374CONFIG_MTD_PARTITIONS=y 401CONFIG_MTD_PARTITIONS=y
402# CONFIG_MTD_TESTS is not set
375# CONFIG_MTD_REDBOOT_PARTS is not set 403# CONFIG_MTD_REDBOOT_PARTS is not set
376CONFIG_MTD_CMDLINE_PARTS=y 404CONFIG_MTD_CMDLINE_PARTS=y
377# CONFIG_MTD_AFS_PARTS is not set 405# CONFIG_MTD_AFS_PARTS is not set
@@ -426,9 +454,7 @@ CONFIG_MTD_CFI_UTIL=y
426# 454#
427# CONFIG_MTD_COMPLEX_MAPPINGS is not set 455# CONFIG_MTD_COMPLEX_MAPPINGS is not set
428CONFIG_MTD_PHYSMAP=y 456CONFIG_MTD_PHYSMAP=y
429CONFIG_MTD_PHYSMAP_START=0x00000000 457# CONFIG_MTD_PHYSMAP_COMPAT is not set
430CONFIG_MTD_PHYSMAP_LEN=0x0
431CONFIG_MTD_PHYSMAP_BANKWIDTH=2
432# CONFIG_MTD_ARM_INTEGRATOR is not set 458# CONFIG_MTD_ARM_INTEGRATOR is not set
433# CONFIG_MTD_PLATRAM is not set 459# CONFIG_MTD_PLATRAM is not set
434 460
@@ -452,6 +478,11 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2
452# CONFIG_MTD_ONENAND is not set 478# CONFIG_MTD_ONENAND is not set
453 479
454# 480#
481# LPDDR flash memory drivers
482#
483# CONFIG_MTD_LPDDR is not set
484
485#
455# UBI - Unsorted block images 486# UBI - Unsorted block images
456# 487#
457# CONFIG_MTD_UBI is not set 488# CONFIG_MTD_UBI is not set
@@ -477,7 +508,7 @@ CONFIG_HAVE_IDE=y
477# CONFIG_ATA is not set 508# CONFIG_ATA is not set
478# CONFIG_MD is not set 509# CONFIG_MD is not set
479CONFIG_NETDEVICES=y 510CONFIG_NETDEVICES=y
480# CONFIG_NETDEVICES_MULTIQUEUE is not set 511CONFIG_COMPAT_NET_DEV_OPS=y
481# CONFIG_DUMMY is not set 512# CONFIG_DUMMY is not set
482# CONFIG_BONDING is not set 513# CONFIG_BONDING is not set
483# CONFIG_MACVLAN is not set 514# CONFIG_MACVLAN is not set
@@ -491,12 +522,20 @@ CONFIG_NET_ETHERNET=y
491# CONFIG_SMC91X is not set 522# CONFIG_SMC91X is not set
492# CONFIG_DM9000 is not set 523# CONFIG_DM9000 is not set
493# CONFIG_ENC28J60 is not set 524# CONFIG_ENC28J60 is not set
525# CONFIG_ETHOC is not set
526# CONFIG_SMC911X is not set
527# CONFIG_SMSC911X is not set
528# CONFIG_DNET is not set
494# CONFIG_IBM_NEW_EMAC_ZMII is not set 529# CONFIG_IBM_NEW_EMAC_ZMII is not set
495# CONFIG_IBM_NEW_EMAC_RGMII is not set 530# CONFIG_IBM_NEW_EMAC_RGMII is not set
496# CONFIG_IBM_NEW_EMAC_TAH is not set 531# CONFIG_IBM_NEW_EMAC_TAH is not set
497# CONFIG_IBM_NEW_EMAC_EMAC4 is not set 532# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
533# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
534# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
535# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
498# CONFIG_B44 is not set 536# CONFIG_B44 is not set
499CONFIG_FEC_OLD=y 537CONFIG_FEC=y
538# CONFIG_FEC2 is not set
500# CONFIG_NETDEV_1000 is not set 539# CONFIG_NETDEV_1000 is not set
501# CONFIG_NETDEV_10000 is not set 540# CONFIG_NETDEV_10000 is not set
502 541
@@ -505,7 +544,10 @@ CONFIG_FEC_OLD=y
505# 544#
506# CONFIG_WLAN_PRE80211 is not set 545# CONFIG_WLAN_PRE80211 is not set
507# CONFIG_WLAN_80211 is not set 546# CONFIG_WLAN_80211 is not set
508# CONFIG_IWLWIFI_LEDS is not set 547
548#
549# Enable WiMAX (Networking options) to see the WiMAX drivers
550#
509# CONFIG_WAN is not set 551# CONFIG_WAN is not set
510# CONFIG_PPP is not set 552# CONFIG_PPP is not set
511# CONFIG_SLIP is not set 553# CONFIG_SLIP is not set
@@ -541,12 +583,15 @@ CONFIG_INPUT_TOUCHSCREEN=y
541# CONFIG_TOUCHSCREEN_FUJITSU is not set 583# CONFIG_TOUCHSCREEN_FUJITSU is not set
542# CONFIG_TOUCHSCREEN_GUNZE is not set 584# CONFIG_TOUCHSCREEN_GUNZE is not set
543# CONFIG_TOUCHSCREEN_ELO is not set 585# CONFIG_TOUCHSCREEN_ELO is not set
586# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
544# CONFIG_TOUCHSCREEN_MTOUCH is not set 587# CONFIG_TOUCHSCREEN_MTOUCH is not set
588# CONFIG_TOUCHSCREEN_INEXIO is not set
545# CONFIG_TOUCHSCREEN_MK712 is not set 589# CONFIG_TOUCHSCREEN_MK712 is not set
546# CONFIG_TOUCHSCREEN_PENMOUNT is not set 590# CONFIG_TOUCHSCREEN_PENMOUNT is not set
547# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set 591# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
548# CONFIG_TOUCHSCREEN_TOUCHWIN is not set 592# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
549# CONFIG_TOUCHSCREEN_UCB1400 is not set 593# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
594# CONFIG_TOUCHSCREEN_TSC2007 is not set
550# CONFIG_INPUT_MISC is not set 595# CONFIG_INPUT_MISC is not set
551 596
552# 597#
@@ -559,6 +604,7 @@ CONFIG_INPUT_TOUCHSCREEN=y
559# Character devices 604# Character devices
560# 605#
561CONFIG_VT=y 606CONFIG_VT=y
607CONFIG_CONSOLE_TRANSLATIONS=y
562CONFIG_VT_CONSOLE=y 608CONFIG_VT_CONSOLE=y
563CONFIG_HW_CONSOLE=y 609CONFIG_HW_CONSOLE=y
564# CONFIG_VT_HW_CONSOLE_BINDING is not set 610# CONFIG_VT_HW_CONSOLE_BINDING is not set
@@ -573,42 +619,55 @@ CONFIG_DEVKMEM=y
573# 619#
574# Non-8250 serial port support 620# Non-8250 serial port support
575# 621#
622# CONFIG_SERIAL_MAX3100 is not set
576CONFIG_SERIAL_IMX=y 623CONFIG_SERIAL_IMX=y
577CONFIG_SERIAL_IMX_CONSOLE=y 624CONFIG_SERIAL_IMX_CONSOLE=y
578CONFIG_SERIAL_CORE=y 625CONFIG_SERIAL_CORE=y
579CONFIG_SERIAL_CORE_CONSOLE=y 626CONFIG_SERIAL_CORE_CONSOLE=y
580CONFIG_UNIX98_PTYS=y 627CONFIG_UNIX98_PTYS=y
628# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
581# CONFIG_LEGACY_PTYS is not set 629# CONFIG_LEGACY_PTYS is not set
582# CONFIG_IPMI_HANDLER is not set 630# CONFIG_IPMI_HANDLER is not set
583# CONFIG_HW_RANDOM is not set 631# CONFIG_HW_RANDOM is not set
584# CONFIG_NVRAM is not set
585# CONFIG_R3964 is not set 632# CONFIG_R3964 is not set
586# CONFIG_RAW_DRIVER is not set 633# CONFIG_RAW_DRIVER is not set
587# CONFIG_TCG_TPM is not set 634# CONFIG_TCG_TPM is not set
588CONFIG_I2C=y 635CONFIG_I2C=y
589CONFIG_I2C_BOARDINFO=y 636CONFIG_I2C_BOARDINFO=y
590# CONFIG_I2C_CHARDEV is not set 637CONFIG_I2C_CHARDEV=y
638CONFIG_I2C_HELPER_AUTO=y
591 639
592# 640#
593# I2C Hardware Bus support 641# I2C Hardware Bus support
594# 642#
643
644#
645# I2C system bus drivers (mostly embedded / system-on-chip)
646#
595# CONFIG_I2C_GPIO is not set 647# CONFIG_I2C_GPIO is not set
648CONFIG_I2C_IMX=y
596# CONFIG_I2C_OCORES is not set 649# CONFIG_I2C_OCORES is not set
597# CONFIG_I2C_PARPORT_LIGHT is not set
598# CONFIG_I2C_SIMTEC is not set 650# CONFIG_I2C_SIMTEC is not set
651
652#
653# External I2C/SMBus adapter drivers
654#
655# CONFIG_I2C_PARPORT_LIGHT is not set
599# CONFIG_I2C_TAOS_EVM is not set 656# CONFIG_I2C_TAOS_EVM is not set
600# CONFIG_I2C_STUB is not set 657
658#
659# Other I2C/SMBus bus drivers
660#
601# CONFIG_I2C_PCA_PLATFORM is not set 661# CONFIG_I2C_PCA_PLATFORM is not set
662# CONFIG_I2C_STUB is not set
602 663
603# 664#
604# Miscellaneous I2C Chip support 665# Miscellaneous I2C Chip support
605# 666#
606# CONFIG_DS1682 is not set 667# CONFIG_DS1682 is not set
607# CONFIG_EEPROM_LEGACY is not set
608# CONFIG_SENSORS_PCF8574 is not set 668# CONFIG_SENSORS_PCF8574 is not set
609# CONFIG_PCF8575 is not set 669# CONFIG_PCF8575 is not set
610# CONFIG_SENSORS_PCF8591 is not set 670# CONFIG_SENSORS_PCA9539 is not set
611# CONFIG_TPS65010 is not set
612# CONFIG_SENSORS_MAX6875 is not set 671# CONFIG_SENSORS_MAX6875 is not set
613# CONFIG_SENSORS_TSL2550 is not set 672# CONFIG_SENSORS_TSL2550 is not set
614# CONFIG_I2C_DEBUG_CORE is not set 673# CONFIG_I2C_DEBUG_CORE is not set
@@ -622,47 +681,83 @@ CONFIG_SPI_MASTER=y
622# SPI Master Controller Drivers 681# SPI Master Controller Drivers
623# 682#
624CONFIG_SPI_BITBANG=y 683CONFIG_SPI_BITBANG=y
684# CONFIG_SPI_GPIO is not set
625 685
626# 686#
627# SPI Protocol Masters 687# SPI Protocol Masters
628# 688#
629# CONFIG_EEPROM_AT25 is not set
630# CONFIG_SPI_SPIDEV is not set 689# CONFIG_SPI_SPIDEV is not set
631# CONFIG_SPI_TLE62X0 is not set 690# CONFIG_SPI_TLE62X0 is not set
632CONFIG_HAVE_GPIO_LIB=y 691CONFIG_ARCH_REQUIRE_GPIOLIB=y
692CONFIG_GPIOLIB=y
693# CONFIG_GPIO_SYSFS is not set
633 694
634# 695#
635# GPIO Support 696# Memory mapped GPIO expanders:
636# 697#
637 698
638# 699#
639# I2C GPIO expanders: 700# I2C GPIO expanders:
640# 701#
702# CONFIG_GPIO_MAX732X is not set
641# CONFIG_GPIO_PCA953X is not set 703# CONFIG_GPIO_PCA953X is not set
642# CONFIG_GPIO_PCF857X is not set 704# CONFIG_GPIO_PCF857X is not set
643 705
644# 706#
707# PCI GPIO expanders:
708#
709
710#
645# SPI GPIO expanders: 711# SPI GPIO expanders:
646# 712#
713# CONFIG_GPIO_MAX7301 is not set
647# CONFIG_GPIO_MCP23S08 is not set 714# CONFIG_GPIO_MCP23S08 is not set
648# CONFIG_W1 is not set 715CONFIG_W1=y
716
717#
718# 1-wire Bus Masters
719#
720# CONFIG_W1_MASTER_DS2482 is not set
721CONFIG_W1_MASTER_MXC=y
722# CONFIG_W1_MASTER_GPIO is not set
723
724#
725# 1-wire Slaves
726#
727CONFIG_W1_SLAVE_THERM=y
728# CONFIG_W1_SLAVE_SMEM is not set
729# CONFIG_W1_SLAVE_DS2431 is not set
730# CONFIG_W1_SLAVE_DS2433 is not set
731# CONFIG_W1_SLAVE_DS2760 is not set
732# CONFIG_W1_SLAVE_BQ27000 is not set
649# CONFIG_POWER_SUPPLY is not set 733# CONFIG_POWER_SUPPLY is not set
650# CONFIG_HWMON is not set 734# CONFIG_HWMON is not set
735# CONFIG_THERMAL is not set
736# CONFIG_THERMAL_HWMON is not set
651# CONFIG_WATCHDOG is not set 737# CONFIG_WATCHDOG is not set
738CONFIG_SSB_POSSIBLE=y
652 739
653# 740#
654# Sonics Silicon Backplane 741# Sonics Silicon Backplane
655# 742#
656CONFIG_SSB_POSSIBLE=y
657# CONFIG_SSB is not set 743# CONFIG_SSB is not set
658 744
659# 745#
660# Multifunction device drivers 746# Multifunction device drivers
661# 747#
748# CONFIG_MFD_CORE is not set
662# CONFIG_MFD_SM501 is not set 749# CONFIG_MFD_SM501 is not set
663# CONFIG_MFD_ASIC3 is not set 750# CONFIG_MFD_ASIC3 is not set
664# CONFIG_HTC_EGPIO is not set 751# CONFIG_HTC_EGPIO is not set
665# CONFIG_HTC_PASIC3 is not set 752# CONFIG_HTC_PASIC3 is not set
753# CONFIG_TPS65010 is not set
754# CONFIG_TWL4030_CORE is not set
755# CONFIG_MFD_TMIO is not set
756# CONFIG_MFD_TC6393XB is not set
757# CONFIG_PMIC_DA903X is not set
758# CONFIG_MFD_WM8400 is not set
759# CONFIG_MFD_WM8350_I2C is not set
760# CONFIG_MFD_PCF50633 is not set
666 761
667# 762#
668# Multimedia devices 763# Multimedia devices
@@ -683,7 +778,7 @@ CONFIG_VIDEO_MEDIA=y
683# 778#
684# CONFIG_MEDIA_ATTACH is not set 779# CONFIG_MEDIA_ATTACH is not set
685CONFIG_MEDIA_TUNER=y 780CONFIG_MEDIA_TUNER=y
686# CONFIG_MEDIA_TUNER_CUSTOMIZE is not set 781# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
687CONFIG_MEDIA_TUNER_SIMPLE=y 782CONFIG_MEDIA_TUNER_SIMPLE=y
688CONFIG_MEDIA_TUNER_TDA8290=y 783CONFIG_MEDIA_TUNER_TDA8290=y
689CONFIG_MEDIA_TUNER_TDA9887=y 784CONFIG_MEDIA_TUNER_TDA9887=y
@@ -692,16 +787,17 @@ CONFIG_MEDIA_TUNER_TEA5767=y
692CONFIG_MEDIA_TUNER_MT20XX=y 787CONFIG_MEDIA_TUNER_MT20XX=y
693CONFIG_MEDIA_TUNER_XC2028=y 788CONFIG_MEDIA_TUNER_XC2028=y
694CONFIG_MEDIA_TUNER_XC5000=y 789CONFIG_MEDIA_TUNER_XC5000=y
790CONFIG_MEDIA_TUNER_MC44S803=y
695CONFIG_VIDEO_V4L2=y 791CONFIG_VIDEO_V4L2=y
696CONFIG_VIDEO_V4L1=y 792CONFIG_VIDEO_V4L1=y
697CONFIG_VIDEO_CAPTURE_DRIVERS=y 793CONFIG_VIDEO_CAPTURE_DRIVERS=y
698# CONFIG_VIDEO_ADV_DEBUG is not set 794# CONFIG_VIDEO_ADV_DEBUG is not set
795# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
699CONFIG_VIDEO_HELPER_CHIPS_AUTO=y 796CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
700# CONFIG_VIDEO_VIVI is not set 797# CONFIG_VIDEO_VIVI is not set
701# CONFIG_VIDEO_CPIA is not set 798# CONFIG_VIDEO_CPIA is not set
702# CONFIG_VIDEO_SAA5246A is not set 799# CONFIG_VIDEO_SAA5246A is not set
703# CONFIG_VIDEO_SAA5249 is not set 800# CONFIG_VIDEO_SAA5249 is not set
704# CONFIG_TUNER_3036 is not set
705# CONFIG_SOC_CAMERA is not set 801# CONFIG_SOC_CAMERA is not set
706# CONFIG_RADIO_ADAPTERS is not set 802# CONFIG_RADIO_ADAPTERS is not set
707# CONFIG_DAB is not set 803# CONFIG_DAB is not set
@@ -714,9 +810,10 @@ CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
714CONFIG_FB=y 810CONFIG_FB=y
715# CONFIG_FIRMWARE_EDID is not set 811# CONFIG_FIRMWARE_EDID is not set
716# CONFIG_FB_DDC is not set 812# CONFIG_FB_DDC is not set
717# CONFIG_FB_CFB_FILLRECT is not set 813# CONFIG_FB_BOOT_VESA_SUPPORT is not set
718# CONFIG_FB_CFB_COPYAREA is not set 814CONFIG_FB_CFB_FILLRECT=y
719# CONFIG_FB_CFB_IMAGEBLIT is not set 815CONFIG_FB_CFB_COPYAREA=y
816CONFIG_FB_CFB_IMAGEBLIT=y
720# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set 817# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
721# CONFIG_FB_SYS_FILLRECT is not set 818# CONFIG_FB_SYS_FILLRECT is not set
722# CONFIG_FB_SYS_COPYAREA is not set 819# CONFIG_FB_SYS_COPYAREA is not set
@@ -732,8 +829,12 @@ CONFIG_FB=y
732# 829#
733# Frame buffer hardware drivers 830# Frame buffer hardware drivers
734# 831#
832CONFIG_FB_IMX=y
735# CONFIG_FB_S1D13XXX is not set 833# CONFIG_FB_S1D13XXX is not set
736# CONFIG_FB_VIRTUAL is not set 834# CONFIG_FB_VIRTUAL is not set
835# CONFIG_FB_METRONOME is not set
836# CONFIG_FB_MB862XX is not set
837# CONFIG_FB_BROADSHEET is not set
737# CONFIG_BACKLIGHT_LCD_SUPPORT is not set 838# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
738 839
739# 840#
@@ -761,14 +862,29 @@ CONFIG_FONT_8x8=y
761# CONFIG_FONT_SUN12x22 is not set 862# CONFIG_FONT_SUN12x22 is not set
762# CONFIG_FONT_10x18 is not set 863# CONFIG_FONT_10x18 is not set
763# CONFIG_LOGO is not set 864# CONFIG_LOGO is not set
764
765#
766# Sound
767#
768# CONFIG_SOUND is not set 865# CONFIG_SOUND is not set
769# CONFIG_HID_SUPPORT is not set 866# CONFIG_HID_SUPPORT is not set
770# CONFIG_USB_SUPPORT is not set 867# CONFIG_USB_SUPPORT is not set
771# CONFIG_MMC is not set 868CONFIG_MMC=y
869# CONFIG_MMC_DEBUG is not set
870# CONFIG_MMC_UNSAFE_RESUME is not set
871
872#
873# MMC/SD/SDIO Card Drivers
874#
875CONFIG_MMC_BLOCK=y
876CONFIG_MMC_BLOCK_BOUNCE=y
877# CONFIG_SDIO_UART is not set
878# CONFIG_MMC_TEST is not set
879
880#
881# MMC/SD/SDIO Host Controller Drivers
882#
883# CONFIG_MMC_SDHCI is not set
884CONFIG_MMC_MXC=y
885# CONFIG_MMC_SPI is not set
886# CONFIG_MEMSTICK is not set
887# CONFIG_ACCESSIBILITY is not set
772# CONFIG_NEW_LEDS is not set 888# CONFIG_NEW_LEDS is not set
773CONFIG_RTC_LIB=y 889CONFIG_RTC_LIB=y
774CONFIG_RTC_CLASS=y 890CONFIG_RTC_CLASS=y
@@ -800,42 +916,56 @@ CONFIG_RTC_DRV_PCF8563=y
800# CONFIG_RTC_DRV_M41T80 is not set 916# CONFIG_RTC_DRV_M41T80 is not set
801# CONFIG_RTC_DRV_S35390A is not set 917# CONFIG_RTC_DRV_S35390A is not set
802# CONFIG_RTC_DRV_FM3130 is not set 918# CONFIG_RTC_DRV_FM3130 is not set
919# CONFIG_RTC_DRV_RX8581 is not set
803 920
804# 921#
805# SPI RTC drivers 922# SPI RTC drivers
806# 923#
924# CONFIG_RTC_DRV_M41T94 is not set
925# CONFIG_RTC_DRV_DS1305 is not set
926# CONFIG_RTC_DRV_DS1390 is not set
807# CONFIG_RTC_DRV_MAX6902 is not set 927# CONFIG_RTC_DRV_MAX6902 is not set
808# CONFIG_RTC_DRV_R9701 is not set 928# CONFIG_RTC_DRV_R9701 is not set
809# CONFIG_RTC_DRV_RS5C348 is not set 929# CONFIG_RTC_DRV_RS5C348 is not set
930# CONFIG_RTC_DRV_DS3234 is not set
810 931
811# 932#
812# Platform RTC drivers 933# Platform RTC drivers
813# 934#
814# CONFIG_RTC_DRV_CMOS is not set 935# CONFIG_RTC_DRV_CMOS is not set
936# CONFIG_RTC_DRV_DS1286 is not set
815# CONFIG_RTC_DRV_DS1511 is not set 937# CONFIG_RTC_DRV_DS1511 is not set
816# CONFIG_RTC_DRV_DS1553 is not set 938# CONFIG_RTC_DRV_DS1553 is not set
817# CONFIG_RTC_DRV_DS1742 is not set 939# CONFIG_RTC_DRV_DS1742 is not set
818# CONFIG_RTC_DRV_STK17TA8 is not set 940# CONFIG_RTC_DRV_STK17TA8 is not set
819# CONFIG_RTC_DRV_M48T86 is not set 941# CONFIG_RTC_DRV_M48T86 is not set
942# CONFIG_RTC_DRV_M48T35 is not set
820# CONFIG_RTC_DRV_M48T59 is not set 943# CONFIG_RTC_DRV_M48T59 is not set
944# CONFIG_RTC_DRV_BQ4802 is not set
821# CONFIG_RTC_DRV_V3020 is not set 945# CONFIG_RTC_DRV_V3020 is not set
822 946
823# 947#
824# on-CPU RTC drivers 948# on-CPU RTC drivers
825# 949#
950# CONFIG_DMADEVICES is not set
951# CONFIG_AUXDISPLAY is not set
952# CONFIG_REGULATOR is not set
826# CONFIG_UIO is not set 953# CONFIG_UIO is not set
954# CONFIG_STAGING is not set
827 955
828# 956#
829# File systems 957# File systems
830# 958#
831# CONFIG_EXT2_FS is not set 959# CONFIG_EXT2_FS is not set
832# CONFIG_EXT3_FS is not set 960# CONFIG_EXT3_FS is not set
833# CONFIG_EXT4DEV_FS is not set 961# CONFIG_EXT4_FS is not set
834# CONFIG_REISERFS_FS is not set 962# CONFIG_REISERFS_FS is not set
835# CONFIG_JFS_FS is not set 963# CONFIG_JFS_FS is not set
836# CONFIG_FS_POSIX_ACL is not set 964# CONFIG_FS_POSIX_ACL is not set
965CONFIG_FILE_LOCKING=y
837# CONFIG_XFS_FS is not set 966# CONFIG_XFS_FS is not set
838# CONFIG_OCFS2_FS is not set 967# CONFIG_OCFS2_FS is not set
968# CONFIG_BTRFS_FS is not set
839# CONFIG_DNOTIFY is not set 969# CONFIG_DNOTIFY is not set
840# CONFIG_INOTIFY is not set 970# CONFIG_INOTIFY is not set
841# CONFIG_QUOTA is not set 971# CONFIG_QUOTA is not set
@@ -844,6 +974,11 @@ CONFIG_RTC_DRV_PCF8563=y
844# CONFIG_FUSE_FS is not set 974# CONFIG_FUSE_FS is not set
845 975
846# 976#
977# Caches
978#
979# CONFIG_FSCACHE is not set
980
981#
847# CD-ROM/DVD Filesystems 982# CD-ROM/DVD Filesystems
848# 983#
849# CONFIG_ISO9660_FS is not set 984# CONFIG_ISO9660_FS is not set
@@ -861,15 +996,13 @@ CONFIG_RTC_DRV_PCF8563=y
861# 996#
862CONFIG_PROC_FS=y 997CONFIG_PROC_FS=y
863CONFIG_PROC_SYSCTL=y 998CONFIG_PROC_SYSCTL=y
999# CONFIG_PROC_PAGE_MONITOR is not set
864CONFIG_SYSFS=y 1000CONFIG_SYSFS=y
865CONFIG_TMPFS=y 1001CONFIG_TMPFS=y
866# CONFIG_TMPFS_POSIX_ACL is not set 1002# CONFIG_TMPFS_POSIX_ACL is not set
867# CONFIG_HUGETLB_PAGE is not set 1003# CONFIG_HUGETLB_PAGE is not set
868# CONFIG_CONFIGFS_FS is not set 1004# CONFIG_CONFIGFS_FS is not set
869 1005CONFIG_MISC_FILESYSTEMS=y
870#
871# Miscellaneous filesystems
872#
873# CONFIG_ADFS_FS is not set 1006# CONFIG_ADFS_FS is not set
874# CONFIG_AFFS_FS is not set 1007# CONFIG_AFFS_FS is not set
875# CONFIG_HFS_FS is not set 1008# CONFIG_HFS_FS is not set
@@ -889,25 +1022,27 @@ CONFIG_JFFS2_ZLIB=y
889CONFIG_JFFS2_RTIME=y 1022CONFIG_JFFS2_RTIME=y
890# CONFIG_JFFS2_RUBIN is not set 1023# CONFIG_JFFS2_RUBIN is not set
891# CONFIG_CRAMFS is not set 1024# CONFIG_CRAMFS is not set
1025# CONFIG_SQUASHFS is not set
892# CONFIG_VXFS_FS is not set 1026# CONFIG_VXFS_FS is not set
893# CONFIG_MINIX_FS is not set 1027# CONFIG_MINIX_FS is not set
1028# CONFIG_OMFS_FS is not set
894# CONFIG_HPFS_FS is not set 1029# CONFIG_HPFS_FS is not set
895# CONFIG_QNX4FS_FS is not set 1030# CONFIG_QNX4FS_FS is not set
896# CONFIG_ROMFS_FS is not set 1031# CONFIG_ROMFS_FS is not set
897# CONFIG_SYSV_FS is not set 1032# CONFIG_SYSV_FS is not set
898# CONFIG_UFS_FS is not set 1033# CONFIG_UFS_FS is not set
1034# CONFIG_NILFS2_FS is not set
899CONFIG_NETWORK_FILESYSTEMS=y 1035CONFIG_NETWORK_FILESYSTEMS=y
900CONFIG_NFS_FS=y 1036CONFIG_NFS_FS=y
901CONFIG_NFS_V3=y 1037CONFIG_NFS_V3=y
902# CONFIG_NFS_V3_ACL is not set 1038# CONFIG_NFS_V3_ACL is not set
903# CONFIG_NFS_V4 is not set 1039# CONFIG_NFS_V4 is not set
904# CONFIG_NFSD is not set
905CONFIG_ROOT_NFS=y 1040CONFIG_ROOT_NFS=y
1041# CONFIG_NFSD is not set
906CONFIG_LOCKD=y 1042CONFIG_LOCKD=y
907CONFIG_LOCKD_V4=y 1043CONFIG_LOCKD_V4=y
908CONFIG_NFS_COMMON=y 1044CONFIG_NFS_COMMON=y
909CONFIG_SUNRPC=y 1045CONFIG_SUNRPC=y
910# CONFIG_SUNRPC_BIND34 is not set
911# CONFIG_RPCSEC_GSS_KRB5 is not set 1046# CONFIG_RPCSEC_GSS_KRB5 is not set
912# CONFIG_RPCSEC_GSS_SPKM3 is not set 1047# CONFIG_RPCSEC_GSS_SPKM3 is not set
913# CONFIG_SMB_FS is not set 1048# CONFIG_SMB_FS is not set
@@ -972,12 +1107,41 @@ CONFIG_ENABLE_MUST_CHECK=y
972CONFIG_FRAME_WARN=1024 1107CONFIG_FRAME_WARN=1024
973# CONFIG_MAGIC_SYSRQ is not set 1108# CONFIG_MAGIC_SYSRQ is not set
974# CONFIG_UNUSED_SYMBOLS is not set 1109# CONFIG_UNUSED_SYMBOLS is not set
975# CONFIG_DEBUG_FS is not set 1110CONFIG_DEBUG_FS=y
976# CONFIG_HEADERS_CHECK is not set 1111# CONFIG_HEADERS_CHECK is not set
977# CONFIG_DEBUG_KERNEL is not set 1112# CONFIG_DEBUG_KERNEL is not set
1113CONFIG_STACKTRACE=y
978# CONFIG_DEBUG_BUGVERBOSE is not set 1114# CONFIG_DEBUG_BUGVERBOSE is not set
979CONFIG_FRAME_POINTER=y 1115# CONFIG_DEBUG_MEMORY_INIT is not set
1116# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1117# CONFIG_LATENCYTOP is not set
1118CONFIG_SYSCTL_SYSCALL_CHECK=y
1119CONFIG_NOP_TRACER=y
1120CONFIG_HAVE_FUNCTION_TRACER=y
1121CONFIG_RING_BUFFER=y
1122CONFIG_TRACING=y
1123CONFIG_TRACING_SUPPORT=y
1124
1125#
1126# Tracers
1127#
1128# CONFIG_FUNCTION_TRACER is not set
1129# CONFIG_IRQSOFF_TRACER is not set
1130# CONFIG_PREEMPT_TRACER is not set
1131# CONFIG_SCHED_TRACER is not set
1132# CONFIG_CONTEXT_SWITCH_TRACER is not set
1133# CONFIG_EVENT_TRACER is not set
1134# CONFIG_BOOT_TRACER is not set
1135# CONFIG_TRACE_BRANCH_PROFILING is not set
1136# CONFIG_STACK_TRACER is not set
1137# CONFIG_KMEMTRACE is not set
1138# CONFIG_WORKQUEUE_TRACER is not set
1139# CONFIG_BLK_DEV_IO_TRACE is not set
1140# CONFIG_FTRACE_STARTUP_TEST is not set
1141# CONFIG_DYNAMIC_DEBUG is not set
980# CONFIG_SAMPLES is not set 1142# CONFIG_SAMPLES is not set
1143CONFIG_HAVE_ARCH_KGDB=y
1144CONFIG_ARM_UNWIND=y
981# CONFIG_DEBUG_USER is not set 1145# CONFIG_DEBUG_USER is not set
982 1146
983# 1147#
@@ -985,24 +1149,26 @@ CONFIG_FRAME_POINTER=y
985# 1149#
986# CONFIG_KEYS is not set 1150# CONFIG_KEYS is not set
987# CONFIG_SECURITY is not set 1151# CONFIG_SECURITY is not set
1152# CONFIG_SECURITYFS is not set
988# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1153# CONFIG_SECURITY_FILE_CAPABILITIES is not set
989# CONFIG_CRYPTO is not set 1154# CONFIG_CRYPTO is not set
1155CONFIG_BINARY_PRINTF=y
990 1156
991# 1157#
992# Library routines 1158# Library routines
993# 1159#
994CONFIG_BITREVERSE=y 1160CONFIG_BITREVERSE=y
995# CONFIG_GENERIC_FIND_FIRST_BIT is not set 1161CONFIG_GENERIC_FIND_LAST_BIT=y
996# CONFIG_GENERIC_FIND_NEXT_BIT is not set
997# CONFIG_CRC_CCITT is not set 1162# CONFIG_CRC_CCITT is not set
998# CONFIG_CRC16 is not set 1163# CONFIG_CRC16 is not set
1164# CONFIG_CRC_T10DIF is not set
999# CONFIG_CRC_ITU_T is not set 1165# CONFIG_CRC_ITU_T is not set
1000CONFIG_CRC32=y 1166CONFIG_CRC32=y
1001# CONFIG_CRC7 is not set 1167# CONFIG_CRC7 is not set
1002# CONFIG_LIBCRC32C is not set 1168# CONFIG_LIBCRC32C is not set
1003CONFIG_ZLIB_INFLATE=y 1169CONFIG_ZLIB_INFLATE=y
1004CONFIG_ZLIB_DEFLATE=y 1170CONFIG_ZLIB_DEFLATE=y
1005CONFIG_PLIST=y
1006CONFIG_HAS_IOMEM=y 1171CONFIG_HAS_IOMEM=y
1007CONFIG_HAS_IOPORT=y 1172CONFIG_HAS_IOPORT=y
1008CONFIG_HAS_DMA=y 1173CONFIG_HAS_DMA=y
1174CONFIG_NLATTR=y
diff --git a/arch/arm/configs/mx31litekit_defconfig b/arch/arm/configs/mx3_defconfig
index 4f41c4135685..72a8201a5370 100644
--- a/arch/arm/configs/mx31litekit_defconfig
+++ b/arch/arm/configs/mx3_defconfig
@@ -1,17 +1,18 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.26-rc5 3# Linux kernel version: 2.6.30-rc1
4# Fri Jun 13 14:23:39 2008 4# Wed Apr 8 11:06:37 2009
5# 5#
6CONFIG_ARM=y 6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y 7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8# CONFIG_GENERIC_GPIO is not set 8CONFIG_GENERIC_GPIO=y
9# CONFIG_GENERIC_TIME is not set 9CONFIG_GENERIC_TIME=y
10# CONFIG_GENERIC_CLOCKEVENTS is not set 10CONFIG_GENERIC_CLOCKEVENTS=y
11CONFIG_MMU=y 11CONFIG_MMU=y
12# CONFIG_NO_IOPORT is not set 12# CONFIG_NO_IOPORT is not set
13CONFIG_GENERIC_HARDIRQS=y 13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_STACKTRACE_SUPPORT=y 14CONFIG_STACKTRACE_SUPPORT=y
15CONFIG_HAVE_LATENCYTOP_SUPPORT=y
15CONFIG_LOCKDEP_SUPPORT=y 16CONFIG_LOCKDEP_SUPPORT=y
16CONFIG_TRACE_IRQFLAGS_SUPPORT=y 17CONFIG_TRACE_IRQFLAGS_SUPPORT=y
17CONFIG_HARDIRQS_SW_RESEND=y 18CONFIG_HARDIRQS_SW_RESEND=y
@@ -21,9 +22,8 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
21# CONFIG_ARCH_HAS_ILOG2_U64 is not set 22# CONFIG_ARCH_HAS_ILOG2_U64 is not set
22CONFIG_GENERIC_HWEIGHT=y 23CONFIG_GENERIC_HWEIGHT=y
23CONFIG_GENERIC_CALIBRATE_DELAY=y 24CONFIG_GENERIC_CALIBRATE_DELAY=y
24CONFIG_ARCH_SUPPORTS_AOUT=y
25CONFIG_ZONE_DMA=y
26CONFIG_ARCH_MTD_XIP=y 25CONFIG_ARCH_MTD_XIP=y
26CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
27CONFIG_VECTORS_BASE=0xffff0000 27CONFIG_VECTORS_BASE=0xffff0000
28CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 28CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
29 29
@@ -43,11 +43,24 @@ CONFIG_SYSVIPC_SYSCTL=y
43# CONFIG_BSD_PROCESS_ACCT is not set 43# CONFIG_BSD_PROCESS_ACCT is not set
44# CONFIG_TASKSTATS is not set 44# CONFIG_TASKSTATS is not set
45# CONFIG_AUDIT is not set 45# CONFIG_AUDIT is not set
46
47#
48# RCU Subsystem
49#
50CONFIG_CLASSIC_RCU=y
51# CONFIG_TREE_RCU is not set
52# CONFIG_PREEMPT_RCU is not set
53# CONFIG_TREE_RCU_TRACE is not set
54# CONFIG_PREEMPT_RCU_TRACE is not set
46CONFIG_IKCONFIG=y 55CONFIG_IKCONFIG=y
47CONFIG_IKCONFIG_PROC=y 56CONFIG_IKCONFIG_PROC=y
48CONFIG_LOG_BUF_SHIFT=14 57CONFIG_LOG_BUF_SHIFT=14
58CONFIG_GROUP_SCHED=y
59CONFIG_FAIR_GROUP_SCHED=y
60# CONFIG_RT_GROUP_SCHED is not set
61CONFIG_USER_SCHED=y
62# CONFIG_CGROUP_SCHED is not set
49# CONFIG_CGROUPS is not set 63# CONFIG_CGROUPS is not set
50# CONFIG_GROUP_SCHED is not set
51CONFIG_SYSFS_DEPRECATED=y 64CONFIG_SYSFS_DEPRECATED=y
52CONFIG_SYSFS_DEPRECATED_V2=y 65CONFIG_SYSFS_DEPRECATED_V2=y
53# CONFIG_RELAY is not set 66# CONFIG_RELAY is not set
@@ -55,27 +68,26 @@ CONFIG_SYSFS_DEPRECATED_V2=y
55# CONFIG_BLK_DEV_INITRD is not set 68# CONFIG_BLK_DEV_INITRD is not set
56CONFIG_CC_OPTIMIZE_FOR_SIZE=y 69CONFIG_CC_OPTIMIZE_FOR_SIZE=y
57CONFIG_SYSCTL=y 70CONFIG_SYSCTL=y
71CONFIG_ANON_INODES=y
58CONFIG_EMBEDDED=y 72CONFIG_EMBEDDED=y
59CONFIG_UID16=y 73CONFIG_UID16=y
60CONFIG_SYSCTL_SYSCALL=y 74CONFIG_SYSCTL_SYSCALL=y
61CONFIG_SYSCTL_SYSCALL_CHECK=y
62CONFIG_KALLSYMS=y 75CONFIG_KALLSYMS=y
63# CONFIG_KALLSYMS_ALL is not set
64# CONFIG_KALLSYMS_EXTRA_PASS is not set 76# CONFIG_KALLSYMS_EXTRA_PASS is not set
65CONFIG_HOTPLUG=y 77CONFIG_HOTPLUG=y
66CONFIG_PRINTK=y 78CONFIG_PRINTK=y
67CONFIG_BUG=y 79CONFIG_BUG=y
68CONFIG_ELF_CORE=y 80CONFIG_ELF_CORE=y
69CONFIG_COMPAT_BRK=y
70CONFIG_BASE_FULL=y 81CONFIG_BASE_FULL=y
71CONFIG_FUTEX=y 82CONFIG_FUTEX=y
72CONFIG_ANON_INODES=y
73CONFIG_EPOLL=y 83CONFIG_EPOLL=y
74CONFIG_SIGNALFD=y 84CONFIG_SIGNALFD=y
75CONFIG_TIMERFD=y 85CONFIG_TIMERFD=y
76CONFIG_EVENTFD=y 86CONFIG_EVENTFD=y
77CONFIG_SHMEM=y 87CONFIG_SHMEM=y
88CONFIG_AIO=y
78CONFIG_VM_EVENT_COUNTERS=y 89CONFIG_VM_EVENT_COUNTERS=y
90CONFIG_COMPAT_BRK=y
79CONFIG_SLAB=y 91CONFIG_SLAB=y
80# CONFIG_SLUB is not set 92# CONFIG_SLUB is not set
81# CONFIG_SLOB is not set 93# CONFIG_SLOB is not set
@@ -85,11 +97,10 @@ CONFIG_HAVE_OPROFILE=y
85# CONFIG_KPROBES is not set 97# CONFIG_KPROBES is not set
86CONFIG_HAVE_KPROBES=y 98CONFIG_HAVE_KPROBES=y
87CONFIG_HAVE_KRETPROBES=y 99CONFIG_HAVE_KRETPROBES=y
88# CONFIG_HAVE_DMA_ATTRS is not set 100# CONFIG_SLOW_WORK is not set
89CONFIG_PROC_PAGE_MONITOR=y 101CONFIG_HAVE_GENERIC_DMA_COHERENT=y
90CONFIG_SLABINFO=y 102CONFIG_SLABINFO=y
91CONFIG_RT_MUTEXES=y 103CONFIG_RT_MUTEXES=y
92# CONFIG_TINY_SHMEM is not set
93CONFIG_BASE_SMALL=0 104CONFIG_BASE_SMALL=0
94CONFIG_MODULES=y 105CONFIG_MODULES=y
95# CONFIG_MODULE_FORCE_LOAD is not set 106# CONFIG_MODULE_FORCE_LOAD is not set
@@ -97,12 +108,10 @@ CONFIG_MODULE_UNLOAD=y
97CONFIG_MODULE_FORCE_UNLOAD=y 108CONFIG_MODULE_FORCE_UNLOAD=y
98CONFIG_MODVERSIONS=y 109CONFIG_MODVERSIONS=y
99# CONFIG_MODULE_SRCVERSION_ALL is not set 110# CONFIG_MODULE_SRCVERSION_ALL is not set
100CONFIG_KMOD=y
101CONFIG_BLOCK=y 111CONFIG_BLOCK=y
102# CONFIG_LBD is not set 112# CONFIG_LBD is not set
103# CONFIG_BLK_DEV_IO_TRACE is not set
104# CONFIG_LSF is not set
105# CONFIG_BLK_DEV_BSG is not set 113# CONFIG_BLK_DEV_BSG is not set
114# CONFIG_BLK_DEV_INTEGRITY is not set
106 115
107# 116#
108# IO Schedulers 117# IO Schedulers
@@ -116,7 +125,7 @@ CONFIG_IOSCHED_CFQ=y
116CONFIG_DEFAULT_CFQ=y 125CONFIG_DEFAULT_CFQ=y
117# CONFIG_DEFAULT_NOOP is not set 126# CONFIG_DEFAULT_NOOP is not set
118CONFIG_DEFAULT_IOSCHED="cfq" 127CONFIG_DEFAULT_IOSCHED="cfq"
119CONFIG_CLASSIC_RCU=y 128CONFIG_FREEZER=y
120 129
121# 130#
122# System Type 131# System Type
@@ -126,11 +135,10 @@ CONFIG_CLASSIC_RCU=y
126# CONFIG_ARCH_REALVIEW is not set 135# CONFIG_ARCH_REALVIEW is not set
127# CONFIG_ARCH_VERSATILE is not set 136# CONFIG_ARCH_VERSATILE is not set
128# CONFIG_ARCH_AT91 is not set 137# CONFIG_ARCH_AT91 is not set
129# CONFIG_ARCH_CLPS7500 is not set
130# CONFIG_ARCH_CLPS711X is not set 138# CONFIG_ARCH_CLPS711X is not set
131# CONFIG_ARCH_CO285 is not set
132# CONFIG_ARCH_EBSA110 is not set 139# CONFIG_ARCH_EBSA110 is not set
133# CONFIG_ARCH_EP93XX is not set 140# CONFIG_ARCH_EP93XX is not set
141# CONFIG_ARCH_GEMINI is not set
134# CONFIG_ARCH_FOOTBRIDGE is not set 142# CONFIG_ARCH_FOOTBRIDGE is not set
135# CONFIG_ARCH_NETX is not set 143# CONFIG_ARCH_NETX is not set
136# CONFIG_ARCH_H720X is not set 144# CONFIG_ARCH_H720X is not set
@@ -142,46 +150,54 @@ CONFIG_CLASSIC_RCU=y
142# CONFIG_ARCH_IXP2000 is not set 150# CONFIG_ARCH_IXP2000 is not set
143# CONFIG_ARCH_IXP4XX is not set 151# CONFIG_ARCH_IXP4XX is not set
144# CONFIG_ARCH_L7200 is not set 152# CONFIG_ARCH_L7200 is not set
153# CONFIG_ARCH_KIRKWOOD is not set
145# CONFIG_ARCH_KS8695 is not set 154# CONFIG_ARCH_KS8695 is not set
146# CONFIG_ARCH_NS9XXX is not set 155# CONFIG_ARCH_NS9XXX is not set
156# CONFIG_ARCH_LOKI is not set
157# CONFIG_ARCH_MV78XX0 is not set
147CONFIG_ARCH_MXC=y 158CONFIG_ARCH_MXC=y
148# CONFIG_ARCH_ORION5X is not set 159# CONFIG_ARCH_ORION5X is not set
149# CONFIG_ARCH_PNX4008 is not set 160# CONFIG_ARCH_PNX4008 is not set
150# CONFIG_ARCH_PXA is not set 161# CONFIG_ARCH_PXA is not set
162# CONFIG_ARCH_MMP is not set
151# CONFIG_ARCH_RPC is not set 163# CONFIG_ARCH_RPC is not set
152# CONFIG_ARCH_SA1100 is not set 164# CONFIG_ARCH_SA1100 is not set
153# CONFIG_ARCH_S3C2410 is not set 165# CONFIG_ARCH_S3C2410 is not set
166# CONFIG_ARCH_S3C64XX is not set
154# CONFIG_ARCH_SHARK is not set 167# CONFIG_ARCH_SHARK is not set
155# CONFIG_ARCH_LH7A40X is not set 168# CONFIG_ARCH_LH7A40X is not set
156# CONFIG_ARCH_DAVINCI is not set 169# CONFIG_ARCH_DAVINCI is not set
157# CONFIG_ARCH_OMAP is not set 170# CONFIG_ARCH_OMAP is not set
158# CONFIG_ARCH_MSM7X00A is not set 171# CONFIG_ARCH_MSM is not set
159 172# CONFIG_ARCH_W90X900 is not set
160#
161# Boot options
162#
163
164#
165# Power management
166#
167 173
168# 174#
169# Freescale MXC Implementations 175# Freescale MXC Implementations
170# 176#
177# CONFIG_ARCH_MX1 is not set
178# CONFIG_ARCH_MX2 is not set
171CONFIG_ARCH_MX3=y 179CONFIG_ARCH_MX3=y
180CONFIG_ARCH_MX31=y
172 181
173# 182#
174# MX3 Options 183# MX3 platforms:
175# 184#
176# CONFIG_MACH_MX31ADS is not set 185CONFIG_MACH_MX31ADS=y
186CONFIG_MACH_MX31ADS_WM1133_EV1=y
187CONFIG_MACH_PCM037=y
177CONFIG_MACH_MX31LITE=y 188CONFIG_MACH_MX31LITE=y
189CONFIG_MACH_MX31_3DS=y
190CONFIG_MACH_MX31MOBOARD=y
191CONFIG_MACH_QONG=y
192CONFIG_MXC_IRQ_PRIOR=y
193CONFIG_MXC_PWM=y
178 194
179# 195#
180# Processor Type 196# Processor Type
181# 197#
182CONFIG_CPU_32=y 198CONFIG_CPU_32=y
183CONFIG_CPU_V6=y 199CONFIG_CPU_V6=y
184# CONFIG_CPU_32v6K is not set 200CONFIG_CPU_32v6K=y
185CONFIG_CPU_32v6=y 201CONFIG_CPU_32v6=y
186CONFIG_CPU_ABRT_EV6=y 202CONFIG_CPU_ABRT_EV6=y
187CONFIG_CPU_PABRT_NOIFAR=y 203CONFIG_CPU_PABRT_NOIFAR=y
@@ -200,45 +216,50 @@ CONFIG_ARM_THUMB=y
200# CONFIG_CPU_ICACHE_DISABLE is not set 216# CONFIG_CPU_ICACHE_DISABLE is not set
201# CONFIG_CPU_DCACHE_DISABLE is not set 217# CONFIG_CPU_DCACHE_DISABLE is not set
202# CONFIG_CPU_BPREDICT_DISABLE is not set 218# CONFIG_CPU_BPREDICT_DISABLE is not set
203# CONFIG_OUTER_CACHE is not set 219CONFIG_OUTER_CACHE=y
220CONFIG_CACHE_L2X0=y
221CONFIG_COMMON_CLKDEV=y
204 222
205# 223#
206# Bus support 224# Bus support
207# 225#
208# CONFIG_PCI_SYSCALL is not set 226# CONFIG_PCI_SYSCALL is not set
209# CONFIG_ARCH_SUPPORTS_MSI is not set 227# CONFIG_ARCH_SUPPORTS_MSI is not set
210CONFIG_PCCARD=m 228# CONFIG_PCCARD is not set
211# CONFIG_PCMCIA_DEBUG is not set
212# CONFIG_PCMCIA is not set
213
214#
215# PC-card bridges
216#
217 229
218# 230#
219# Kernel Features 231# Kernel Features
220# 232#
221# CONFIG_TICK_ONESHOT is not set 233CONFIG_TICK_ONESHOT=y
234CONFIG_NO_HZ=y
235CONFIG_HIGH_RES_TIMERS=y
236CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
237CONFIG_VMSPLIT_3G=y
238# CONFIG_VMSPLIT_2G is not set
239# CONFIG_VMSPLIT_1G is not set
240CONFIG_PAGE_OFFSET=0xC0000000
222CONFIG_PREEMPT=y 241CONFIG_PREEMPT=y
223# CONFIG_NO_IDLE_HZ is not set
224CONFIG_HZ=100 242CONFIG_HZ=100
225CONFIG_AEABI=y 243CONFIG_AEABI=y
226# CONFIG_OABI_COMPAT is not set 244CONFIG_OABI_COMPAT=y
227# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set 245CONFIG_ARCH_FLATMEM_HAS_HOLES=y
246# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
247# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
248# CONFIG_HIGHMEM is not set
228CONFIG_SELECT_MEMORY_MODEL=y 249CONFIG_SELECT_MEMORY_MODEL=y
229CONFIG_FLATMEM_MANUAL=y 250CONFIG_FLATMEM_MANUAL=y
230# CONFIG_DISCONTIGMEM_MANUAL is not set 251# CONFIG_DISCONTIGMEM_MANUAL is not set
231# CONFIG_SPARSEMEM_MANUAL is not set 252# CONFIG_SPARSEMEM_MANUAL is not set
232CONFIG_FLATMEM=y 253CONFIG_FLATMEM=y
233CONFIG_FLAT_NODE_MEM_MAP=y 254CONFIG_FLAT_NODE_MEM_MAP=y
234# CONFIG_SPARSEMEM_STATIC is not set
235# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
236CONFIG_PAGEFLAGS_EXTENDED=y 255CONFIG_PAGEFLAGS_EXTENDED=y
237CONFIG_SPLIT_PTLOCK_CPUS=4 256CONFIG_SPLIT_PTLOCK_CPUS=4
238# CONFIG_RESOURCES_64BIT is not set 257# CONFIG_PHYS_ADDR_T_64BIT is not set
239CONFIG_ZONE_DMA_FLAG=1 258CONFIG_ZONE_DMA_FLAG=0
240CONFIG_BOUNCE=y
241CONFIG_VIRT_TO_BUS=y 259CONFIG_VIRT_TO_BUS=y
260CONFIG_UNEVICTABLE_LRU=y
261CONFIG_HAVE_MLOCK=y
262CONFIG_HAVE_MLOCKED_PAGE_BIT=y
242CONFIG_ALIGNMENT_TRAP=y 263CONFIG_ALIGNMENT_TRAP=y
243 264
244# 265#
@@ -251,33 +272,42 @@ CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw ip=off"
251# CONFIG_KEXEC is not set 272# CONFIG_KEXEC is not set
252 273
253# 274#
275# CPU Power Management
276#
277# CONFIG_CPU_IDLE is not set
278
279#
254# Floating point emulation 280# Floating point emulation
255# 281#
256 282
257# 283#
258# At least one emulation must be selected 284# At least one emulation must be selected
259# 285#
286# CONFIG_FPE_NWFPE is not set
287# CONFIG_FPE_FASTFPE is not set
260CONFIG_VFP=y 288CONFIG_VFP=y
261 289
262# 290#
263# Userspace binary formats 291# Userspace binary formats
264# 292#
265CONFIG_BINFMT_ELF=y 293CONFIG_BINFMT_ELF=y
266CONFIG_BINFMT_AOUT=y 294# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
295CONFIG_HAVE_AOUT=y
296# CONFIG_BINFMT_AOUT is not set
267# CONFIG_BINFMT_MISC is not set 297# CONFIG_BINFMT_MISC is not set
268 298
269# 299#
270# Power management options 300# Power management options
271# 301#
272CONFIG_PM=y 302CONFIG_PM=y
273# CONFIG_PM_DEBUG is not set 303CONFIG_PM_DEBUG=y
274# CONFIG_SUSPEND is not set 304# CONFIG_PM_VERBOSE is not set
305CONFIG_CAN_PM_TRACE=y
306CONFIG_PM_SLEEP=y
307CONFIG_SUSPEND=y
308CONFIG_SUSPEND_FREEZER=y
275# CONFIG_APM_EMULATION is not set 309# CONFIG_APM_EMULATION is not set
276CONFIG_ARCH_SUSPEND_POSSIBLE=y 310CONFIG_ARCH_SUSPEND_POSSIBLE=y
277
278#
279# Networking
280#
281CONFIG_NET=y 311CONFIG_NET=y
282 312
283# 313#
@@ -286,11 +316,6 @@ CONFIG_NET=y
286CONFIG_PACKET=y 316CONFIG_PACKET=y
287# CONFIG_PACKET_MMAP is not set 317# CONFIG_PACKET_MMAP is not set
288CONFIG_UNIX=y 318CONFIG_UNIX=y
289CONFIG_XFRM=y
290# CONFIG_XFRM_USER is not set
291# CONFIG_XFRM_SUB_POLICY is not set
292# CONFIG_XFRM_MIGRATE is not set
293# CONFIG_XFRM_STATISTICS is not set
294# CONFIG_NET_KEY is not set 319# CONFIG_NET_KEY is not set
295CONFIG_INET=y 320CONFIG_INET=y
296# CONFIG_IP_MULTICAST is not set 321# CONFIG_IP_MULTICAST is not set
@@ -309,12 +334,11 @@ CONFIG_IP_PNP_DHCP=y
309# CONFIG_INET_IPCOMP is not set 334# CONFIG_INET_IPCOMP is not set
310# CONFIG_INET_XFRM_TUNNEL is not set 335# CONFIG_INET_XFRM_TUNNEL is not set
311# CONFIG_INET_TUNNEL is not set 336# CONFIG_INET_TUNNEL is not set
312CONFIG_INET_XFRM_MODE_TRANSPORT=y 337# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
313CONFIG_INET_XFRM_MODE_TUNNEL=y 338# CONFIG_INET_XFRM_MODE_TUNNEL is not set
314CONFIG_INET_XFRM_MODE_BEET=y 339# CONFIG_INET_XFRM_MODE_BEET is not set
315# CONFIG_INET_LRO is not set 340# CONFIG_INET_LRO is not set
316CONFIG_INET_DIAG=y 341# CONFIG_INET_DIAG is not set
317CONFIG_INET_TCP_DIAG=y
318# CONFIG_TCP_CONG_ADVANCED is not set 342# CONFIG_TCP_CONG_ADVANCED is not set
319CONFIG_TCP_CONG_CUBIC=y 343CONFIG_TCP_CONG_CUBIC=y
320CONFIG_DEFAULT_TCP_CONG="cubic" 344CONFIG_DEFAULT_TCP_CONG="cubic"
@@ -327,6 +351,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
327# CONFIG_TIPC is not set 351# CONFIG_TIPC is not set
328# CONFIG_ATM is not set 352# CONFIG_ATM is not set
329# CONFIG_BRIDGE is not set 353# CONFIG_BRIDGE is not set
354# CONFIG_NET_DSA is not set
330# CONFIG_VLAN_8021Q is not set 355# CONFIG_VLAN_8021Q is not set
331# CONFIG_DECNET is not set 356# CONFIG_DECNET is not set
332# CONFIG_LLC2 is not set 357# CONFIG_LLC2 is not set
@@ -336,7 +361,9 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
336# CONFIG_LAPB is not set 361# CONFIG_LAPB is not set
337# CONFIG_ECONET is not set 362# CONFIG_ECONET is not set
338# CONFIG_WAN_ROUTER is not set 363# CONFIG_WAN_ROUTER is not set
364# CONFIG_PHONET is not set
339# CONFIG_NET_SCHED is not set 365# CONFIG_NET_SCHED is not set
366# CONFIG_DCB is not set
340 367
341# 368#
342# Network testing 369# Network testing
@@ -347,14 +374,8 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
347# CONFIG_IRDA is not set 374# CONFIG_IRDA is not set
348# CONFIG_BT is not set 375# CONFIG_BT is not set
349# CONFIG_AF_RXRPC is not set 376# CONFIG_AF_RXRPC is not set
350 377# CONFIG_WIRELESS is not set
351# 378# CONFIG_WIMAX is not set
352# Wireless
353#
354# CONFIG_CFG80211 is not set
355# CONFIG_WIRELESS_EXT is not set
356# CONFIG_MAC80211 is not set
357# CONFIG_IEEE80211 is not set
358# CONFIG_RFKILL is not set 379# CONFIG_RFKILL is not set
359# CONFIG_NET_9P is not set 380# CONFIG_NET_9P is not set
360 381
@@ -369,18 +390,16 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
369CONFIG_STANDALONE=y 390CONFIG_STANDALONE=y
370CONFIG_PREVENT_FIRMWARE_BUILD=y 391CONFIG_PREVENT_FIRMWARE_BUILD=y
371CONFIG_FW_LOADER=m 392CONFIG_FW_LOADER=m
372# CONFIG_DEBUG_DRIVER is not set 393CONFIG_FIRMWARE_IN_KERNEL=y
373# CONFIG_DEBUG_DEVRES is not set 394CONFIG_EXTRA_FIRMWARE=""
374# CONFIG_SYS_HYPERVISOR is not set 395# CONFIG_SYS_HYPERVISOR is not set
375# CONFIG_CONNECTOR is not set 396# CONFIG_CONNECTOR is not set
376CONFIG_MTD=y 397CONFIG_MTD=y
377# CONFIG_MTD_DEBUG is not set 398# CONFIG_MTD_DEBUG is not set
378# CONFIG_MTD_CONCAT is not set 399# CONFIG_MTD_CONCAT is not set
379CONFIG_MTD_PARTITIONS=y 400CONFIG_MTD_PARTITIONS=y
380CONFIG_MTD_REDBOOT_PARTS=y 401# CONFIG_MTD_TESTS is not set
381CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 402# CONFIG_MTD_REDBOOT_PARTS is not set
382# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
383# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
384CONFIG_MTD_CMDLINE_PARTS=y 403CONFIG_MTD_CMDLINE_PARTS=y
385# CONFIG_MTD_AFS_PARTS is not set 404# CONFIG_MTD_AFS_PARTS is not set
386# CONFIG_MTD_AR7_PARTS is not set 405# CONFIG_MTD_AR7_PARTS is not set
@@ -404,36 +423,31 @@ CONFIG_MTD_BLOCK=y
404CONFIG_MTD_CFI=y 423CONFIG_MTD_CFI=y
405# CONFIG_MTD_JEDECPROBE is not set 424# CONFIG_MTD_JEDECPROBE is not set
406CONFIG_MTD_GEN_PROBE=y 425CONFIG_MTD_GEN_PROBE=y
407CONFIG_MTD_CFI_ADV_OPTIONS=y 426# CONFIG_MTD_CFI_ADV_OPTIONS is not set
408CONFIG_MTD_CFI_NOSWAP=y 427CONFIG_MTD_MAP_BANK_WIDTH_1=y
409# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
410# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
411CONFIG_MTD_CFI_GEOMETRY=y
412# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
413CONFIG_MTD_MAP_BANK_WIDTH_2=y 428CONFIG_MTD_MAP_BANK_WIDTH_2=y
414# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set 429CONFIG_MTD_MAP_BANK_WIDTH_4=y
415# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set 430# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
416# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set 431# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
417# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set 432# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
418CONFIG_MTD_CFI_I1=y 433CONFIG_MTD_CFI_I1=y
419# CONFIG_MTD_CFI_I2 is not set 434CONFIG_MTD_CFI_I2=y
420# CONFIG_MTD_CFI_I4 is not set 435# CONFIG_MTD_CFI_I4 is not set
421# CONFIG_MTD_CFI_I8 is not set 436# CONFIG_MTD_CFI_I8 is not set
422# CONFIG_MTD_OTP is not set
423# CONFIG_MTD_CFI_INTELEXT is not set 437# CONFIG_MTD_CFI_INTELEXT is not set
424CONFIG_MTD_CFI_AMDSTD=y 438# CONFIG_MTD_CFI_AMDSTD is not set
425# CONFIG_MTD_CFI_STAA is not set 439# CONFIG_MTD_CFI_STAA is not set
426CONFIG_MTD_CFI_UTIL=y 440CONFIG_MTD_CFI_UTIL=y
427CONFIG_MTD_RAM=y 441# CONFIG_MTD_RAM is not set
428# CONFIG_MTD_ROM is not set 442# CONFIG_MTD_ROM is not set
429# CONFIG_MTD_ABSENT is not set 443# CONFIG_MTD_ABSENT is not set
430# CONFIG_MTD_XIP is not set
431 444
432# 445#
433# Mapping drivers for chip access 446# Mapping drivers for chip access
434# 447#
435# CONFIG_MTD_COMPLEX_MAPPINGS is not set 448# CONFIG_MTD_COMPLEX_MAPPINGS is not set
436# CONFIG_MTD_PHYSMAP is not set 449CONFIG_MTD_PHYSMAP=y
450# CONFIG_MTD_PHYSMAP_COMPAT is not set
437# CONFIG_MTD_ARM_INTEGRATOR is not set 451# CONFIG_MTD_ARM_INTEGRATOR is not set
438# CONFIG_MTD_PLATRAM is not set 452# CONFIG_MTD_PLATRAM is not set
439 453
@@ -451,18 +465,15 @@ CONFIG_MTD_RAM=y
451# CONFIG_MTD_DOC2000 is not set 465# CONFIG_MTD_DOC2000 is not set
452# CONFIG_MTD_DOC2001 is not set 466# CONFIG_MTD_DOC2001 is not set
453# CONFIG_MTD_DOC2001PLUS is not set 467# CONFIG_MTD_DOC2001PLUS is not set
454CONFIG_MTD_NAND=y 468# CONFIG_MTD_NAND is not set
455# CONFIG_MTD_NAND_VERIFY_WRITE is not set
456# CONFIG_MTD_NAND_ECC_SMC is not set
457# CONFIG_MTD_NAND_MUSEUM_IDS is not set
458CONFIG_MTD_NAND_IDS=y
459# CONFIG_MTD_NAND_DISKONCHIP is not set
460# CONFIG_MTD_NAND_NANDSIM is not set
461# CONFIG_MTD_NAND_PLATFORM is not set
462# CONFIG_MTD_ALAUDA is not set
463# CONFIG_MTD_ONENAND is not set 469# CONFIG_MTD_ONENAND is not set
464 470
465# 471#
472# LPDDR flash memory drivers
473#
474# CONFIG_MTD_LPDDR is not set
475
476#
466# UBI - Unsorted block images 477# UBI - Unsorted block images
467# 478#
468# CONFIG_MTD_UBI is not set 479# CONFIG_MTD_UBI is not set
@@ -476,63 +487,58 @@ CONFIG_HAVE_IDE=y
476# SCSI device support 487# SCSI device support
477# 488#
478# CONFIG_RAID_ATTRS is not set 489# CONFIG_RAID_ATTRS is not set
479CONFIG_SCSI=y 490# CONFIG_SCSI is not set
480CONFIG_SCSI_DMA=y 491# CONFIG_SCSI_DMA is not set
481# CONFIG_SCSI_TGT is not set
482# CONFIG_SCSI_NETLINK is not set 492# CONFIG_SCSI_NETLINK is not set
483CONFIG_SCSI_PROC_FS=y
484
485#
486# SCSI support type (disk, tape, CD-ROM)
487#
488CONFIG_BLK_DEV_SD=y
489# CONFIG_CHR_DEV_ST is not set
490# CONFIG_CHR_DEV_OSST is not set
491# CONFIG_BLK_DEV_SR is not set
492# CONFIG_CHR_DEV_SG is not set
493# CONFIG_CHR_DEV_SCH is not set
494
495#
496# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
497#
498CONFIG_SCSI_MULTI_LUN=y
499# CONFIG_SCSI_CONSTANTS is not set
500# CONFIG_SCSI_LOGGING is not set
501# CONFIG_SCSI_SCAN_ASYNC is not set
502CONFIG_SCSI_WAIT_SCAN=m
503
504#
505# SCSI Transports
506#
507# CONFIG_SCSI_SPI_ATTRS is not set
508# CONFIG_SCSI_FC_ATTRS is not set
509# CONFIG_SCSI_ISCSI_ATTRS is not set
510# CONFIG_SCSI_SAS_LIBSAS is not set
511# CONFIG_SCSI_SRP_ATTRS is not set
512CONFIG_SCSI_LOWLEVEL=y
513# CONFIG_ISCSI_TCP is not set
514# CONFIG_SCSI_DEBUG is not set
515# CONFIG_ATA is not set 493# CONFIG_ATA is not set
516# CONFIG_MD is not set 494# CONFIG_MD is not set
517CONFIG_NETDEVICES=y 495CONFIG_NETDEVICES=y
518# CONFIG_NETDEVICES_MULTIQUEUE is not set 496CONFIG_COMPAT_NET_DEV_OPS=y
519# CONFIG_DUMMY is not set 497# CONFIG_DUMMY is not set
520# CONFIG_BONDING is not set 498# CONFIG_BONDING is not set
521# CONFIG_MACVLAN is not set 499# CONFIG_MACVLAN is not set
522# CONFIG_EQUALIZER is not set 500# CONFIG_EQUALIZER is not set
523# CONFIG_TUN is not set 501# CONFIG_TUN is not set
524# CONFIG_VETH is not set 502# CONFIG_VETH is not set
525# CONFIG_PHYLIB is not set 503CONFIG_PHYLIB=y
504
505#
506# MII PHY device drivers
507#
508# CONFIG_MARVELL_PHY is not set
509# CONFIG_DAVICOM_PHY is not set
510# CONFIG_QSEMI_PHY is not set
511# CONFIG_LXT_PHY is not set
512# CONFIG_CICADA_PHY is not set
513# CONFIG_VITESSE_PHY is not set
514CONFIG_SMSC_PHY=y
515# CONFIG_BROADCOM_PHY is not set
516# CONFIG_ICPLUS_PHY is not set
517# CONFIG_REALTEK_PHY is not set
518# CONFIG_NATIONAL_PHY is not set
519# CONFIG_STE10XP is not set
520# CONFIG_LSI_ET1011C_PHY is not set
521# CONFIG_FIXED_PHY is not set
522# CONFIG_MDIO_BITBANG is not set
526CONFIG_NET_ETHERNET=y 523CONFIG_NET_ETHERNET=y
527CONFIG_MII=y 524CONFIG_MII=y
528# CONFIG_AX88796 is not set 525# CONFIG_AX88796 is not set
529# CONFIG_SMC91X is not set 526# CONFIG_SMC91X is not set
530# CONFIG_DM9000 is not set 527# CONFIG_DM9000 is not set
528# CONFIG_ETHOC is not set
529# CONFIG_SMC911X is not set
530CONFIG_SMSC911X=y
531# CONFIG_DNET is not set
531# CONFIG_IBM_NEW_EMAC_ZMII is not set 532# CONFIG_IBM_NEW_EMAC_ZMII is not set
532# CONFIG_IBM_NEW_EMAC_RGMII is not set 533# CONFIG_IBM_NEW_EMAC_RGMII is not set
533# CONFIG_IBM_NEW_EMAC_TAH is not set 534# CONFIG_IBM_NEW_EMAC_TAH is not set
534# CONFIG_IBM_NEW_EMAC_EMAC4 is not set 535# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
536# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
537# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
538# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
535# CONFIG_B44 is not set 539# CONFIG_B44 is not set
540CONFIG_CS89x0=y
541CONFIG_CS89x0_NONISA_IRQ=y
536# CONFIG_NETDEV_1000 is not set 542# CONFIG_NETDEV_1000 is not set
537# CONFIG_NETDEV_10000 is not set 543# CONFIG_NETDEV_10000 is not set
538 544
@@ -541,16 +547,10 @@ CONFIG_MII=y
541# 547#
542# CONFIG_WLAN_PRE80211 is not set 548# CONFIG_WLAN_PRE80211 is not set
543# CONFIG_WLAN_80211 is not set 549# CONFIG_WLAN_80211 is not set
544# CONFIG_IWLWIFI_LEDS is not set
545 550
546# 551#
547# USB Network Adapters 552# Enable WiMAX (Networking options) to see the WiMAX drivers
548# 553#
549# CONFIG_USB_CATC is not set
550# CONFIG_USB_KAWETH is not set
551# CONFIG_USB_PEGASUS is not set
552# CONFIG_USB_RTL8150 is not set
553# CONFIG_USB_USBNET is not set
554# CONFIG_WAN is not set 554# CONFIG_WAN is not set
555# CONFIG_PPP is not set 555# CONFIG_PPP is not set
556# CONFIG_SLIP is not set 556# CONFIG_SLIP is not set
@@ -562,43 +562,7 @@ CONFIG_MII=y
562# 562#
563# Input device support 563# Input device support
564# 564#
565CONFIG_INPUT=y 565# CONFIG_INPUT is not set
566# CONFIG_INPUT_FF_MEMLESS is not set
567# CONFIG_INPUT_POLLDEV is not set
568
569#
570# Userland interfaces
571#
572# CONFIG_INPUT_MOUSEDEV is not set
573# CONFIG_INPUT_JOYDEV is not set
574CONFIG_INPUT_EVDEV=y
575# CONFIG_INPUT_EVBUG is not set
576
577#
578# Input Device Drivers
579#
580CONFIG_INPUT_KEYBOARD=y
581# CONFIG_KEYBOARD_ATKBD is not set
582# CONFIG_KEYBOARD_SUNKBD is not set
583# CONFIG_KEYBOARD_LKKBD is not set
584# CONFIG_KEYBOARD_XTKBD is not set
585# CONFIG_KEYBOARD_NEWTON is not set
586# CONFIG_KEYBOARD_STOWAWAY is not set
587# CONFIG_INPUT_MOUSE is not set
588# CONFIG_INPUT_JOYSTICK is not set
589# CONFIG_INPUT_TABLET is not set
590CONFIG_INPUT_TOUCHSCREEN=y
591# CONFIG_TOUCHSCREEN_FUJITSU is not set
592# CONFIG_TOUCHSCREEN_GUNZE is not set
593# CONFIG_TOUCHSCREEN_ELO is not set
594# CONFIG_TOUCHSCREEN_MTOUCH is not set
595# CONFIG_TOUCHSCREEN_MK712 is not set
596# CONFIG_TOUCHSCREEN_PENMOUNT is not set
597# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
598# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
599# CONFIG_TOUCHSCREEN_UCB1400 is not set
600# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
601# CONFIG_INPUT_MISC is not set
602 566
603# 567#
604# Hardware I/O ports 568# Hardware I/O ports
@@ -609,10 +573,7 @@ CONFIG_INPUT_TOUCHSCREEN=y
609# 573#
610# Character devices 574# Character devices
611# 575#
612CONFIG_VT=y 576# CONFIG_VT is not set
613CONFIG_VT_CONSOLE=y
614CONFIG_HW_CONSOLE=y
615# CONFIG_VT_HW_CONSOLE_BINDING is not set
616CONFIG_DEVKMEM=y 577CONFIG_DEVKMEM=y
617# CONFIG_SERIAL_NONSTANDARD is not set 578# CONFIG_SERIAL_NONSTANDARD is not set
618 579
@@ -624,45 +585,132 @@ CONFIG_DEVKMEM=y
624# 585#
625# Non-8250 serial port support 586# Non-8250 serial port support
626# 587#
588CONFIG_SERIAL_IMX=y
589CONFIG_SERIAL_IMX_CONSOLE=y
590CONFIG_SERIAL_CORE=y
591CONFIG_SERIAL_CORE_CONSOLE=y
627CONFIG_UNIX98_PTYS=y 592CONFIG_UNIX98_PTYS=y
628CONFIG_LEGACY_PTYS=y 593# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
629CONFIG_LEGACY_PTY_COUNT=256 594# CONFIG_LEGACY_PTYS is not set
630# CONFIG_IPMI_HANDLER is not set 595# CONFIG_IPMI_HANDLER is not set
631CONFIG_HW_RANDOM=y 596# CONFIG_HW_RANDOM is not set
632# CONFIG_NVRAM is not set
633# CONFIG_R3964 is not set 597# CONFIG_R3964 is not set
634# CONFIG_RAW_DRIVER is not set 598# CONFIG_RAW_DRIVER is not set
635# CONFIG_TCG_TPM is not set 599# CONFIG_TCG_TPM is not set
636# CONFIG_I2C is not set 600CONFIG_I2C=y
601CONFIG_I2C_BOARDINFO=y
602CONFIG_I2C_CHARDEV=y
603CONFIG_I2C_HELPER_AUTO=y
604
605#
606# I2C Hardware Bus support
607#
608
609#
610# I2C system bus drivers (mostly embedded / system-on-chip)
611#
612# CONFIG_I2C_GPIO is not set
613CONFIG_I2C_IMX=y
614# CONFIG_I2C_OCORES is not set
615# CONFIG_I2C_SIMTEC is not set
616
617#
618# External I2C/SMBus adapter drivers
619#
620# CONFIG_I2C_PARPORT_LIGHT is not set
621# CONFIG_I2C_TAOS_EVM is not set
622
623#
624# Other I2C/SMBus bus drivers
625#
626# CONFIG_I2C_PCA_PLATFORM is not set
627# CONFIG_I2C_STUB is not set
628
629#
630# Miscellaneous I2C Chip support
631#
632# CONFIG_DS1682 is not set
633# CONFIG_SENSORS_PCF8574 is not set
634# CONFIG_PCF8575 is not set
635# CONFIG_SENSORS_PCA9539 is not set
636# CONFIG_SENSORS_MAX6875 is not set
637# CONFIG_SENSORS_TSL2550 is not set
638# CONFIG_I2C_DEBUG_CORE is not set
639# CONFIG_I2C_DEBUG_ALGO is not set
640# CONFIG_I2C_DEBUG_BUS is not set
641# CONFIG_I2C_DEBUG_CHIP is not set
637# CONFIG_SPI is not set 642# CONFIG_SPI is not set
638# CONFIG_W1 is not set 643CONFIG_ARCH_REQUIRE_GPIOLIB=y
639# CONFIG_POWER_SUPPLY is not set 644CONFIG_GPIOLIB=y
640# CONFIG_HWMON is not set 645# CONFIG_GPIO_SYSFS is not set
641CONFIG_WATCHDOG=y
642CONFIG_WATCHDOG_NOWAYOUT=y
643 646
644# 647#
645# Watchdog Device Drivers 648# Memory mapped GPIO expanders:
646# 649#
647# CONFIG_SOFT_WATCHDOG is not set
648 650
649# 651#
650# USB-based Watchdog Cards 652# I2C GPIO expanders:
651# 653#
652# CONFIG_USBPCWATCHDOG is not set 654# CONFIG_GPIO_MAX732X is not set
655# CONFIG_GPIO_PCA953X is not set
656# CONFIG_GPIO_PCF857X is not set
653 657
654# 658#
655# Sonics Silicon Backplane 659# PCI GPIO expanders:
656# 660#
661
662#
663# SPI GPIO expanders:
664#
665CONFIG_W1=y
666
667#
668# 1-wire Bus Masters
669#
670# CONFIG_W1_MASTER_DS2482 is not set
671CONFIG_W1_MASTER_MXC=y
672# CONFIG_W1_MASTER_GPIO is not set
673
674#
675# 1-wire Slaves
676#
677CONFIG_W1_SLAVE_THERM=y
678# CONFIG_W1_SLAVE_SMEM is not set
679# CONFIG_W1_SLAVE_DS2431 is not set
680# CONFIG_W1_SLAVE_DS2433 is not set
681# CONFIG_W1_SLAVE_DS2760 is not set
682# CONFIG_W1_SLAVE_BQ27000 is not set
683# CONFIG_POWER_SUPPLY is not set
684# CONFIG_HWMON is not set
685# CONFIG_THERMAL is not set
686# CONFIG_THERMAL_HWMON is not set
687# CONFIG_WATCHDOG is not set
657CONFIG_SSB_POSSIBLE=y 688CONFIG_SSB_POSSIBLE=y
689
690#
691# Sonics Silicon Backplane
692#
658# CONFIG_SSB is not set 693# CONFIG_SSB is not set
659 694
660# 695#
661# Multifunction device drivers 696# Multifunction device drivers
662# 697#
698# CONFIG_MFD_CORE is not set
663# CONFIG_MFD_SM501 is not set 699# CONFIG_MFD_SM501 is not set
664# CONFIG_MFD_ASIC3 is not set 700# CONFIG_MFD_ASIC3 is not set
701# CONFIG_HTC_EGPIO is not set
665# CONFIG_HTC_PASIC3 is not set 702# CONFIG_HTC_PASIC3 is not set
703# CONFIG_TPS65010 is not set
704# CONFIG_TWL4030_CORE is not set
705# CONFIG_MFD_TMIO is not set
706# CONFIG_MFD_TC6393XB is not set
707# CONFIG_PMIC_DA903X is not set
708# CONFIG_MFD_WM8400 is not set
709CONFIG_MFD_WM8350=y
710CONFIG_MFD_WM8350_CONFIG_MODE_0=y
711CONFIG_MFD_WM8352_CONFIG_MODE_0=y
712CONFIG_MFD_WM8350_I2C=y
713# CONFIG_MFD_PCF50633 is not set
666 714
667# 715#
668# Multimedia devices 716# Multimedia devices
@@ -673,7 +721,7 @@ CONFIG_SSB_POSSIBLE=y
673# 721#
674CONFIG_VIDEO_DEV=y 722CONFIG_VIDEO_DEV=y
675CONFIG_VIDEO_V4L2_COMMON=y 723CONFIG_VIDEO_V4L2_COMMON=y
676CONFIG_VIDEO_ALLOW_V4L1=y 724# CONFIG_VIDEO_ALLOW_V4L1 is not set
677CONFIG_VIDEO_V4L1_COMPAT=y 725CONFIG_VIDEO_V4L1_COMPAT=y
678# CONFIG_DVB_CORE is not set 726# CONFIG_DVB_CORE is not set
679CONFIG_VIDEO_MEDIA=y 727CONFIG_VIDEO_MEDIA=y
@@ -682,34 +730,38 @@ CONFIG_VIDEO_MEDIA=y
682# Multimedia drivers 730# Multimedia drivers
683# 731#
684# CONFIG_MEDIA_ATTACH is not set 732# CONFIG_MEDIA_ATTACH is not set
733CONFIG_MEDIA_TUNER=y
734# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
735CONFIG_MEDIA_TUNER_SIMPLE=y
736CONFIG_MEDIA_TUNER_TDA8290=y
737CONFIG_MEDIA_TUNER_TDA9887=y
738CONFIG_MEDIA_TUNER_TEA5761=y
739CONFIG_MEDIA_TUNER_TEA5767=y
740CONFIG_MEDIA_TUNER_MT20XX=y
741CONFIG_MEDIA_TUNER_XC2028=y
742CONFIG_MEDIA_TUNER_XC5000=y
743CONFIG_MEDIA_TUNER_MC44S803=y
685CONFIG_VIDEO_V4L2=y 744CONFIG_VIDEO_V4L2=y
686CONFIG_VIDEO_V4L1=y 745CONFIG_VIDEOBUF_GEN=y
746CONFIG_VIDEOBUF_DMA_CONTIG=y
687CONFIG_VIDEO_CAPTURE_DRIVERS=y 747CONFIG_VIDEO_CAPTURE_DRIVERS=y
688# CONFIG_VIDEO_ADV_DEBUG is not set 748# CONFIG_VIDEO_ADV_DEBUG is not set
749# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
689CONFIG_VIDEO_HELPER_CHIPS_AUTO=y 750CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
690# CONFIG_VIDEO_VIVI is not set 751# CONFIG_VIDEO_VIVI is not set
691# CONFIG_VIDEO_CPIA is not set 752# CONFIG_VIDEO_SAA5246A is not set
692# CONFIG_VIDEO_CPIA2 is not set 753# CONFIG_VIDEO_SAA5249 is not set
693CONFIG_V4L_USB_DRIVERS=y 754CONFIG_SOC_CAMERA=y
694# CONFIG_USB_VICAM is not set 755CONFIG_SOC_CAMERA_MT9M001=y
695# CONFIG_USB_IBMCAM is not set 756CONFIG_SOC_CAMERA_MT9M111=y
696# CONFIG_USB_KONICAWC is not set 757CONFIG_SOC_CAMERA_MT9T031=y
697# CONFIG_USB_QUICKCAM_MESSENGER is not set 758CONFIG_SOC_CAMERA_MT9V022=y
698# CONFIG_USB_ET61X251 is not set 759CONFIG_SOC_CAMERA_TW9910=y
699# CONFIG_USB_OV511 is not set 760# CONFIG_SOC_CAMERA_PLATFORM is not set
700# CONFIG_USB_SE401 is not set 761# CONFIG_SOC_CAMERA_OV772X is not set
701# CONFIG_USB_SN9C102 is not set 762CONFIG_VIDEO_MX3=y
702# CONFIG_USB_STV680 is not set 763# CONFIG_RADIO_ADAPTERS is not set
703# CONFIG_USB_ZC0301 is not set 764# CONFIG_DAB is not set
704# CONFIG_USB_PWC is not set
705# CONFIG_USB_ZR364XX is not set
706# CONFIG_USB_STKWEBCAM is not set
707# CONFIG_SOC_CAMERA is not set
708CONFIG_RADIO_ADAPTERS=y
709# CONFIG_USB_DSBR is not set
710# CONFIG_USB_SI470X is not set
711CONFIG_DAB=y
712# CONFIG_USB_DABUSB is not set
713 765
714# 766#
715# Graphics support 767# Graphics support
@@ -719,9 +771,10 @@ CONFIG_DAB=y
719CONFIG_FB=y 771CONFIG_FB=y
720# CONFIG_FIRMWARE_EDID is not set 772# CONFIG_FIRMWARE_EDID is not set
721# CONFIG_FB_DDC is not set 773# CONFIG_FB_DDC is not set
722# CONFIG_FB_CFB_FILLRECT is not set 774# CONFIG_FB_BOOT_VESA_SUPPORT is not set
723# CONFIG_FB_CFB_COPYAREA is not set 775CONFIG_FB_CFB_FILLRECT=y
724# CONFIG_FB_CFB_IMAGEBLIT is not set 776CONFIG_FB_CFB_COPYAREA=y
777CONFIG_FB_CFB_IMAGEBLIT=y
725# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set 778# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
726# CONFIG_FB_SYS_FILLRECT is not set 779# CONFIG_FB_SYS_FILLRECT is not set
727# CONFIG_FB_SYS_COPYAREA is not set 780# CONFIG_FB_SYS_COPYAREA is not set
@@ -739,131 +792,79 @@ CONFIG_FB=y
739# 792#
740# CONFIG_FB_S1D13XXX is not set 793# CONFIG_FB_S1D13XXX is not set
741# CONFIG_FB_VIRTUAL is not set 794# CONFIG_FB_VIRTUAL is not set
795# CONFIG_FB_METRONOME is not set
796# CONFIG_FB_MB862XX is not set
797CONFIG_FB_MX3=y
798# CONFIG_FB_BROADSHEET is not set
742# CONFIG_BACKLIGHT_LCD_SUPPORT is not set 799# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
743 800
744# 801#
745# Display device support 802# Display device support
746# 803#
747# CONFIG_DISPLAY_SUPPORT is not set 804# CONFIG_DISPLAY_SUPPORT is not set
748 805# CONFIG_LOGO is not set
749#
750# Console display driver support
751#
752# CONFIG_VGA_CONSOLE is not set
753CONFIG_DUMMY_CONSOLE=y
754CONFIG_FRAMEBUFFER_CONSOLE=y
755# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
756# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
757# CONFIG_FONTS is not set
758CONFIG_FONT_8x8=y
759CONFIG_FONT_8x16=y
760CONFIG_LOGO=y
761# CONFIG_LOGO_LINUX_MONO is not set
762# CONFIG_LOGO_LINUX_VGA16 is not set
763CONFIG_LOGO_LINUX_CLUT224=y
764
765#
766# Sound
767#
768# CONFIG_SOUND is not set 806# CONFIG_SOUND is not set
769# CONFIG_HID_SUPPORT is not set 807# CONFIG_USB_SUPPORT is not set
770CONFIG_USB_SUPPORT=y 808CONFIG_MMC=y
771CONFIG_USB_ARCH_HAS_HCD=y 809# CONFIG_MMC_DEBUG is not set
772# CONFIG_USB_ARCH_HAS_OHCI is not set 810# CONFIG_MMC_UNSAFE_RESUME is not set
773# CONFIG_USB_ARCH_HAS_EHCI is not set
774CONFIG_USB=y
775# CONFIG_USB_DEBUG is not set
776# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
777 811
778# 812#
779# Miscellaneous USB options 813# MMC/SD/SDIO Card Drivers
780# 814#
781# CONFIG_USB_DEVICEFS is not set 815CONFIG_MMC_BLOCK=y
782CONFIG_USB_DEVICE_CLASS=y 816CONFIG_MMC_BLOCK_BOUNCE=y
783# CONFIG_USB_DYNAMIC_MINORS is not set 817# CONFIG_SDIO_UART is not set
784# CONFIG_USB_SUSPEND is not set 818# CONFIG_MMC_TEST is not set
785# CONFIG_USB_OTG is not set
786# CONFIG_USB_OTG_WHITELIST is not set
787# CONFIG_USB_OTG_BLACKLIST_HUB is not set
788 819
789# 820#
790# USB Host Controller Drivers 821# MMC/SD/SDIO Host Controller Drivers
791# 822#
792# CONFIG_USB_C67X00_HCD is not set 823# CONFIG_MMC_SDHCI is not set
793# CONFIG_USB_ISP116X_HCD is not set 824CONFIG_MMC_MXC=y
794# CONFIG_USB_ISP1760_HCD is not set 825# CONFIG_MEMSTICK is not set
795# CONFIG_USB_SL811_HCD is not set 826# CONFIG_ACCESSIBILITY is not set
796# CONFIG_USB_R8A66597_HCD is not set 827# CONFIG_NEW_LEDS is not set
797 828CONFIG_RTC_LIB=y
798# 829# CONFIG_RTC_CLASS is not set
799# USB Device Class drivers 830CONFIG_DMADEVICES=y
800#
801# CONFIG_USB_ACM is not set
802# CONFIG_USB_PRINTER is not set
803# CONFIG_USB_WDM is not set
804
805#
806# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
807#
808
809#
810# may also be needed; see USB_STORAGE Help for more information
811#
812# CONFIG_USB_STORAGE is not set
813# CONFIG_USB_LIBUSUAL is not set
814
815#
816# USB Imaging devices
817#
818# CONFIG_USB_MDC800 is not set
819# CONFIG_USB_MICROTEK is not set
820CONFIG_USB_MON=y
821 831
822# 832#
823# USB port drivers 833# DMA Devices
824# 834#
825# CONFIG_USB_SERIAL is not set 835CONFIG_MX3_IPU=y
836CONFIG_MX3_IPU_IRQS=4
837CONFIG_DMA_ENGINE=y
826 838
827# 839#
828# USB Miscellaneous drivers 840# DMA Clients
829# 841#
830# CONFIG_USB_EMI62 is not set 842# CONFIG_NET_DMA is not set
831# CONFIG_USB_EMI26 is not set 843# CONFIG_ASYNC_TX_DMA is not set
832# CONFIG_USB_ADUTUX is not set 844# CONFIG_DMATEST is not set
833# CONFIG_USB_AUERSWALD is not set 845# CONFIG_AUXDISPLAY is not set
834# CONFIG_USB_RIO500 is not set 846CONFIG_REGULATOR=y
835# CONFIG_USB_LEGOTOWER is not set 847# CONFIG_REGULATOR_DEBUG is not set
836# CONFIG_USB_LCD is not set 848# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
837# CONFIG_USB_BERRY_CHARGE is not set 849# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
838# CONFIG_USB_LED is not set 850# CONFIG_REGULATOR_BQ24022 is not set
839# CONFIG_USB_CYPRESS_CY7C63 is not set 851CONFIG_REGULATOR_WM8350=y
840# CONFIG_USB_CYTHERM is not set
841# CONFIG_USB_PHIDGET is not set
842# CONFIG_USB_IDMOUSE is not set
843# CONFIG_USB_FTDI_ELAN is not set
844# CONFIG_USB_APPLEDISPLAY is not set
845# CONFIG_USB_LD is not set
846# CONFIG_USB_TRANCEVIBRATOR is not set
847# CONFIG_USB_IOWARRIOR is not set
848# CONFIG_USB_ISIGHTFW is not set
849# CONFIG_USB_GADGET is not set
850# CONFIG_MMC is not set
851# CONFIG_NEW_LEDS is not set
852CONFIG_RTC_LIB=y
853# CONFIG_RTC_CLASS is not set
854# CONFIG_UIO is not set 852# CONFIG_UIO is not set
853# CONFIG_STAGING is not set
855 854
856# 855#
857# File systems 856# File systems
858# 857#
859# CONFIG_EXT2_FS is not set 858# CONFIG_EXT2_FS is not set
860# CONFIG_EXT3_FS is not set 859# CONFIG_EXT3_FS is not set
861# CONFIG_EXT4DEV_FS is not set 860# CONFIG_EXT4_FS is not set
862# CONFIG_REISERFS_FS is not set 861# CONFIG_REISERFS_FS is not set
863# CONFIG_JFS_FS is not set 862# CONFIG_JFS_FS is not set
864# CONFIG_FS_POSIX_ACL is not set 863# CONFIG_FS_POSIX_ACL is not set
864CONFIG_FILE_LOCKING=y
865# CONFIG_XFS_FS is not set 865# CONFIG_XFS_FS is not set
866# CONFIG_OCFS2_FS is not set 866# CONFIG_OCFS2_FS is not set
867# CONFIG_BTRFS_FS is not set
867# CONFIG_DNOTIFY is not set 868# CONFIG_DNOTIFY is not set
868CONFIG_INOTIFY=y 869CONFIG_INOTIFY=y
869CONFIG_INOTIFY_USER=y 870CONFIG_INOTIFY_USER=y
@@ -873,6 +874,11 @@ CONFIG_INOTIFY_USER=y
873# CONFIG_FUSE_FS is not set 874# CONFIG_FUSE_FS is not set
874 875
875# 876#
877# Caches
878#
879# CONFIG_FSCACHE is not set
880
881#
876# CD-ROM/DVD Filesystems 882# CD-ROM/DVD Filesystems
877# 883#
878# CONFIG_ISO9660_FS is not set 884# CONFIG_ISO9660_FS is not set
@@ -890,15 +896,13 @@ CONFIG_INOTIFY_USER=y
890# 896#
891CONFIG_PROC_FS=y 897CONFIG_PROC_FS=y
892CONFIG_PROC_SYSCTL=y 898CONFIG_PROC_SYSCTL=y
899CONFIG_PROC_PAGE_MONITOR=y
893CONFIG_SYSFS=y 900CONFIG_SYSFS=y
894CONFIG_TMPFS=y 901CONFIG_TMPFS=y
895# CONFIG_TMPFS_POSIX_ACL is not set 902# CONFIG_TMPFS_POSIX_ACL is not set
896# CONFIG_HUGETLB_PAGE is not set 903# CONFIG_HUGETLB_PAGE is not set
897# CONFIG_CONFIGFS_FS is not set 904# CONFIG_CONFIGFS_FS is not set
898 905CONFIG_MISC_FILESYSTEMS=y
899#
900# Miscellaneous filesystems
901#
902# CONFIG_ADFS_FS is not set 906# CONFIG_ADFS_FS is not set
903# CONFIG_AFFS_FS is not set 907# CONFIG_AFFS_FS is not set
904# CONFIG_HFS_FS is not set 908# CONFIG_HFS_FS is not set
@@ -917,25 +921,30 @@ CONFIG_JFFS2_ZLIB=y
917# CONFIG_JFFS2_LZO is not set 921# CONFIG_JFFS2_LZO is not set
918CONFIG_JFFS2_RTIME=y 922CONFIG_JFFS2_RTIME=y
919# CONFIG_JFFS2_RUBIN is not set 923# CONFIG_JFFS2_RUBIN is not set
920CONFIG_CRAMFS=y 924# CONFIG_CRAMFS is not set
925# CONFIG_SQUASHFS is not set
921# CONFIG_VXFS_FS is not set 926# CONFIG_VXFS_FS is not set
922# CONFIG_MINIX_FS is not set 927# CONFIG_MINIX_FS is not set
928# CONFIG_OMFS_FS is not set
923# CONFIG_HPFS_FS is not set 929# CONFIG_HPFS_FS is not set
924# CONFIG_QNX4FS_FS is not set 930# CONFIG_QNX4FS_FS is not set
925# CONFIG_ROMFS_FS is not set 931# CONFIG_ROMFS_FS is not set
926# CONFIG_SYSV_FS is not set 932# CONFIG_SYSV_FS is not set
927# CONFIG_UFS_FS is not set 933# CONFIG_UFS_FS is not set
934# CONFIG_NILFS2_FS is not set
928CONFIG_NETWORK_FILESYSTEMS=y 935CONFIG_NETWORK_FILESYSTEMS=y
929CONFIG_NFS_FS=y 936CONFIG_NFS_FS=y
930# CONFIG_NFS_V3 is not set 937CONFIG_NFS_V3=y
931# CONFIG_NFS_V4 is not set 938# CONFIG_NFS_V3_ACL is not set
932# CONFIG_NFSD is not set 939CONFIG_NFS_V4=y
933CONFIG_ROOT_NFS=y 940CONFIG_ROOT_NFS=y
941# CONFIG_NFSD is not set
934CONFIG_LOCKD=y 942CONFIG_LOCKD=y
943CONFIG_LOCKD_V4=y
935CONFIG_NFS_COMMON=y 944CONFIG_NFS_COMMON=y
936CONFIG_SUNRPC=y 945CONFIG_SUNRPC=y
937# CONFIG_SUNRPC_BIND34 is not set 946CONFIG_SUNRPC_GSS=y
938# CONFIG_RPCSEC_GSS_KRB5 is not set 947CONFIG_RPCSEC_GSS_KRB5=y
939# CONFIG_RPCSEC_GSS_SPKM3 is not set 948# CONFIG_RPCSEC_GSS_SPKM3 is not set
940# CONFIG_SMB_FS is not set 949# CONFIG_SMB_FS is not set
941# CONFIG_CIFS is not set 950# CONFIG_CIFS is not set
@@ -954,65 +963,70 @@ CONFIG_MSDOS_PARTITION=y
954# 963#
955# Kernel hacking 964# Kernel hacking
956# 965#
957CONFIG_PRINTK_TIME=y 966# CONFIG_PRINTK_TIME is not set
958CONFIG_ENABLE_WARN_DEPRECATED=y 967# CONFIG_ENABLE_WARN_DEPRECATED is not set
959CONFIG_ENABLE_MUST_CHECK=y 968# CONFIG_ENABLE_MUST_CHECK is not set
960CONFIG_FRAME_WARN=1024 969CONFIG_FRAME_WARN=1024
961# CONFIG_MAGIC_SYSRQ is not set 970# CONFIG_MAGIC_SYSRQ is not set
962# CONFIG_UNUSED_SYMBOLS is not set 971# CONFIG_UNUSED_SYMBOLS is not set
963# CONFIG_DEBUG_FS is not set 972# CONFIG_DEBUG_FS is not set
964# CONFIG_HEADERS_CHECK is not set 973# CONFIG_HEADERS_CHECK is not set
965CONFIG_DEBUG_KERNEL=y 974# CONFIG_DEBUG_KERNEL is not set
966# CONFIG_DEBUG_SHIRQ is not set 975# CONFIG_DEBUG_BUGVERBOSE is not set
967CONFIG_DETECT_SOFTLOCKUP=y 976# CONFIG_DEBUG_MEMORY_INIT is not set
968CONFIG_SCHED_DEBUG=y 977# CONFIG_RCU_CPU_STALL_DETECTOR is not set
969# CONFIG_SCHEDSTATS is not set 978# CONFIG_LATENCYTOP is not set
970# CONFIG_TIMER_STATS is not set 979CONFIG_SYSCTL_SYSCALL_CHECK=y
971# CONFIG_DEBUG_OBJECTS is not set 980CONFIG_HAVE_FUNCTION_TRACER=y
972# CONFIG_DEBUG_SLAB is not set 981CONFIG_TRACING_SUPPORT=y
973CONFIG_DEBUG_PREEMPT=y 982
974# CONFIG_DEBUG_RT_MUTEXES is not set 983#
975# CONFIG_RT_MUTEX_TESTER is not set 984# Tracers
976# CONFIG_DEBUG_SPINLOCK is not set 985#
977# CONFIG_DEBUG_MUTEXES is not set 986# CONFIG_FUNCTION_TRACER is not set
978# CONFIG_DEBUG_LOCK_ALLOC is not set 987# CONFIG_IRQSOFF_TRACER is not set
979# CONFIG_PROVE_LOCKING is not set 988# CONFIG_PREEMPT_TRACER is not set
980# CONFIG_LOCK_STAT is not set 989# CONFIG_SCHED_TRACER is not set
981# CONFIG_DEBUG_SPINLOCK_SLEEP is not set 990# CONFIG_CONTEXT_SWITCH_TRACER is not set
982# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set 991# CONFIG_EVENT_TRACER is not set
983# CONFIG_DEBUG_KOBJECT is not set 992# CONFIG_BOOT_TRACER is not set
984CONFIG_DEBUG_BUGVERBOSE=y 993# CONFIG_TRACE_BRANCH_PROFILING is not set
985# CONFIG_DEBUG_INFO is not set 994# CONFIG_STACK_TRACER is not set
986# CONFIG_DEBUG_VM is not set 995# CONFIG_KMEMTRACE is not set
987# CONFIG_DEBUG_WRITECOUNT is not set 996# CONFIG_WORKQUEUE_TRACER is not set
988# CONFIG_DEBUG_LIST is not set 997# CONFIG_BLK_DEV_IO_TRACE is not set
989# CONFIG_DEBUG_SG is not set
990CONFIG_FRAME_POINTER=y
991# CONFIG_BOOT_PRINTK_DELAY is not set
992# CONFIG_RCU_TORTURE_TEST is not set
993# CONFIG_BACKTRACE_SELF_TEST is not set
994# CONFIG_FAULT_INJECTION is not set
995# CONFIG_SAMPLES is not set 998# CONFIG_SAMPLES is not set
999CONFIG_HAVE_ARCH_KGDB=y
1000CONFIG_ARM_UNWIND=y
996# CONFIG_DEBUG_USER is not set 1001# CONFIG_DEBUG_USER is not set
997CONFIG_DEBUG_ERRORS=y
998# CONFIG_DEBUG_STACK_USAGE is not set
999CONFIG_DEBUG_LL=y
1000# CONFIG_DEBUG_ICEDCC is not set
1001 1002
1002# 1003#
1003# Security options 1004# Security options
1004# 1005#
1005# CONFIG_KEYS is not set 1006# CONFIG_KEYS is not set
1006# CONFIG_SECURITY is not set 1007# CONFIG_SECURITY is not set
1008# CONFIG_SECURITYFS is not set
1007# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1009# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1008CONFIG_CRYPTO=y 1010CONFIG_CRYPTO=y
1009 1011
1010# 1012#
1011# Crypto core or helper 1013# Crypto core or helper
1012# 1014#
1013# CONFIG_CRYPTO_MANAGER is not set 1015# CONFIG_CRYPTO_FIPS is not set
1016CONFIG_CRYPTO_ALGAPI=y
1017CONFIG_CRYPTO_ALGAPI2=y
1018CONFIG_CRYPTO_AEAD2=y
1019CONFIG_CRYPTO_BLKCIPHER=y
1020CONFIG_CRYPTO_BLKCIPHER2=y
1021CONFIG_CRYPTO_HASH=y
1022CONFIG_CRYPTO_HASH2=y
1023CONFIG_CRYPTO_RNG2=y
1024CONFIG_CRYPTO_PCOMP=y
1025CONFIG_CRYPTO_MANAGER=y
1026CONFIG_CRYPTO_MANAGER2=y
1014# CONFIG_CRYPTO_GF128MUL is not set 1027# CONFIG_CRYPTO_GF128MUL is not set
1015# CONFIG_CRYPTO_NULL is not set 1028# CONFIG_CRYPTO_NULL is not set
1029CONFIG_CRYPTO_WORKQUEUE=y
1016# CONFIG_CRYPTO_CRYPTD is not set 1030# CONFIG_CRYPTO_CRYPTD is not set
1017# CONFIG_CRYPTO_AUTHENC is not set 1031# CONFIG_CRYPTO_AUTHENC is not set
1018# CONFIG_CRYPTO_TEST is not set 1032# CONFIG_CRYPTO_TEST is not set
@@ -1027,7 +1041,7 @@ CONFIG_CRYPTO=y
1027# 1041#
1028# Block modes 1042# Block modes
1029# 1043#
1030# CONFIG_CRYPTO_CBC is not set 1044CONFIG_CRYPTO_CBC=y
1031# CONFIG_CRYPTO_CTR is not set 1045# CONFIG_CRYPTO_CTR is not set
1032# CONFIG_CRYPTO_CTS is not set 1046# CONFIG_CRYPTO_CTS is not set
1033# CONFIG_CRYPTO_ECB is not set 1047# CONFIG_CRYPTO_ECB is not set
@@ -1046,8 +1060,12 @@ CONFIG_CRYPTO=y
1046# 1060#
1047# CONFIG_CRYPTO_CRC32C is not set 1061# CONFIG_CRYPTO_CRC32C is not set
1048# CONFIG_CRYPTO_MD4 is not set 1062# CONFIG_CRYPTO_MD4 is not set
1049# CONFIG_CRYPTO_MD5 is not set 1063CONFIG_CRYPTO_MD5=y
1050# CONFIG_CRYPTO_MICHAEL_MIC is not set 1064# CONFIG_CRYPTO_MICHAEL_MIC is not set
1065# CONFIG_CRYPTO_RMD128 is not set
1066# CONFIG_CRYPTO_RMD160 is not set
1067# CONFIG_CRYPTO_RMD256 is not set
1068# CONFIG_CRYPTO_RMD320 is not set
1051# CONFIG_CRYPTO_SHA1 is not set 1069# CONFIG_CRYPTO_SHA1 is not set
1052# CONFIG_CRYPTO_SHA256 is not set 1070# CONFIG_CRYPTO_SHA256 is not set
1053# CONFIG_CRYPTO_SHA512 is not set 1071# CONFIG_CRYPTO_SHA512 is not set
@@ -1064,7 +1082,7 @@ CONFIG_CRYPTO=y
1064# CONFIG_CRYPTO_CAMELLIA is not set 1082# CONFIG_CRYPTO_CAMELLIA is not set
1065# CONFIG_CRYPTO_CAST5 is not set 1083# CONFIG_CRYPTO_CAST5 is not set
1066# CONFIG_CRYPTO_CAST6 is not set 1084# CONFIG_CRYPTO_CAST6 is not set
1067# CONFIG_CRYPTO_DES is not set 1085CONFIG_CRYPTO_DES=y
1068# CONFIG_CRYPTO_FCRYPT is not set 1086# CONFIG_CRYPTO_FCRYPT is not set
1069# CONFIG_CRYPTO_KHAZAD is not set 1087# CONFIG_CRYPTO_KHAZAD is not set
1070# CONFIG_CRYPTO_SALSA20 is not set 1088# CONFIG_CRYPTO_SALSA20 is not set
@@ -1077,24 +1095,31 @@ CONFIG_CRYPTO=y
1077# Compression 1095# Compression
1078# 1096#
1079# CONFIG_CRYPTO_DEFLATE is not set 1097# CONFIG_CRYPTO_DEFLATE is not set
1098# CONFIG_CRYPTO_ZLIB is not set
1080# CONFIG_CRYPTO_LZO is not set 1099# CONFIG_CRYPTO_LZO is not set
1100
1101#
1102# Random Number Generation
1103#
1104# CONFIG_CRYPTO_ANSI_CPRNG is not set
1081CONFIG_CRYPTO_HW=y 1105CONFIG_CRYPTO_HW=y
1106# CONFIG_BINARY_PRINTF is not set
1082 1107
1083# 1108#
1084# Library routines 1109# Library routines
1085# 1110#
1086CONFIG_BITREVERSE=y 1111CONFIG_BITREVERSE=y
1087# CONFIG_GENERIC_FIND_FIRST_BIT is not set 1112CONFIG_GENERIC_FIND_LAST_BIT=y
1088# CONFIG_GENERIC_FIND_NEXT_BIT is not set 1113# CONFIG_CRC_CCITT is not set
1089CONFIG_CRC_CCITT=m
1090# CONFIG_CRC16 is not set 1114# CONFIG_CRC16 is not set
1115# CONFIG_CRC_T10DIF is not set
1091# CONFIG_CRC_ITU_T is not set 1116# CONFIG_CRC_ITU_T is not set
1092CONFIG_CRC32=y 1117CONFIG_CRC32=y
1093# CONFIG_CRC7 is not set 1118# CONFIG_CRC7 is not set
1094# CONFIG_LIBCRC32C is not set 1119# CONFIG_LIBCRC32C is not set
1095CONFIG_ZLIB_INFLATE=y 1120CONFIG_ZLIB_INFLATE=y
1096CONFIG_ZLIB_DEFLATE=y 1121CONFIG_ZLIB_DEFLATE=y
1097CONFIG_PLIST=y
1098CONFIG_HAS_IOMEM=y 1122CONFIG_HAS_IOMEM=y
1099CONFIG_HAS_IOPORT=y 1123CONFIG_HAS_IOPORT=y
1100CONFIG_HAS_DMA=y 1124CONFIG_HAS_DMA=y
1125CONFIG_NLATTR=y
diff --git a/arch/arm/configs/s3c2410_defconfig b/arch/arm/configs/s3c2410_defconfig
index 65a583ee5df8..2d58b8fe59be 100644
--- a/arch/arm/configs/s3c2410_defconfig
+++ b/arch/arm/configs/s3c2410_defconfig
@@ -1,9 +1,9 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.26-rc8 3# Linux kernel version: 2.6.30-rc2
4# Mon Jul 7 16:59:23 2008
5# 4#
6CONFIG_ARM=y 5CONFIG_ARM=y
6CONFIG_HAVE_PWM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y 7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y 8CONFIG_GENERIC_GPIO=y
9# CONFIG_GENERIC_TIME is not set 9# CONFIG_GENERIC_TIME is not set
@@ -12,6 +12,7 @@ CONFIG_MMU=y
12CONFIG_NO_IOPORT=y 12CONFIG_NO_IOPORT=y
13CONFIG_GENERIC_HARDIRQS=y 13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_STACKTRACE_SUPPORT=y 14CONFIG_STACKTRACE_SUPPORT=y
15CONFIG_HAVE_LATENCYTOP_SUPPORT=y
15CONFIG_LOCKDEP_SUPPORT=y 16CONFIG_LOCKDEP_SUPPORT=y
16CONFIG_TRACE_IRQFLAGS_SUPPORT=y 17CONFIG_TRACE_IRQFLAGS_SUPPORT=y
17CONFIG_HARDIRQS_SW_RESEND=y 18CONFIG_HARDIRQS_SW_RESEND=y
@@ -21,8 +22,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
21# CONFIG_ARCH_HAS_ILOG2_U64 is not set 22# CONFIG_ARCH_HAS_ILOG2_U64 is not set
22CONFIG_GENERIC_HWEIGHT=y 23CONFIG_GENERIC_HWEIGHT=y
23CONFIG_GENERIC_CALIBRATE_DELAY=y 24CONFIG_GENERIC_CALIBRATE_DELAY=y
24CONFIG_ARCH_SUPPORTS_AOUT=y 25CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
25CONFIG_ZONE_DMA=y
26CONFIG_VECTORS_BASE=0xffff0000 26CONFIG_VECTORS_BASE=0xffff0000
27CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 27CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
28 28
@@ -41,11 +41,20 @@ CONFIG_SYSVIPC_SYSCTL=y
41# CONFIG_BSD_PROCESS_ACCT is not set 41# CONFIG_BSD_PROCESS_ACCT is not set
42# CONFIG_TASKSTATS is not set 42# CONFIG_TASKSTATS is not set
43# CONFIG_AUDIT is not set 43# CONFIG_AUDIT is not set
44
45#
46# RCU Subsystem
47#
48CONFIG_CLASSIC_RCU=y
49# CONFIG_TREE_RCU is not set
50# CONFIG_PREEMPT_RCU is not set
51# CONFIG_TREE_RCU_TRACE is not set
52# CONFIG_PREEMPT_RCU_TRACE is not set
44CONFIG_IKCONFIG=m 53CONFIG_IKCONFIG=m
45CONFIG_IKCONFIG_PROC=y 54CONFIG_IKCONFIG_PROC=y
46CONFIG_LOG_BUF_SHIFT=16 55CONFIG_LOG_BUF_SHIFT=16
47# CONFIG_CGROUPS is not set
48# CONFIG_GROUP_SCHED is not set 56# CONFIG_GROUP_SCHED is not set
57# CONFIG_CGROUPS is not set
49CONFIG_SYSFS_DEPRECATED=y 58CONFIG_SYSFS_DEPRECATED=y
50CONFIG_SYSFS_DEPRECATED_V2=y 59CONFIG_SYSFS_DEPRECATED_V2=y
51# CONFIG_RELAY is not set 60# CONFIG_RELAY is not set
@@ -54,31 +63,36 @@ CONFIG_NAMESPACES=y
54# CONFIG_IPC_NS is not set 63# CONFIG_IPC_NS is not set
55# CONFIG_USER_NS is not set 64# CONFIG_USER_NS is not set
56# CONFIG_PID_NS is not set 65# CONFIG_PID_NS is not set
66# CONFIG_NET_NS is not set
57CONFIG_BLK_DEV_INITRD=y 67CONFIG_BLK_DEV_INITRD=y
58CONFIG_INITRAMFS_SOURCE="" 68CONFIG_INITRAMFS_SOURCE=""
69CONFIG_RD_GZIP=y
70CONFIG_RD_BZIP2=y
71CONFIG_RD_LZMA=y
59CONFIG_CC_OPTIMIZE_FOR_SIZE=y 72CONFIG_CC_OPTIMIZE_FOR_SIZE=y
60CONFIG_SYSCTL=y 73CONFIG_SYSCTL=y
74CONFIG_ANON_INODES=y
61# CONFIG_EMBEDDED is not set 75# CONFIG_EMBEDDED is not set
62CONFIG_UID16=y 76CONFIG_UID16=y
63CONFIG_SYSCTL_SYSCALL=y 77CONFIG_SYSCTL_SYSCALL=y
64CONFIG_SYSCTL_SYSCALL_CHECK=y
65CONFIG_KALLSYMS=y 78CONFIG_KALLSYMS=y
66# CONFIG_KALLSYMS_ALL is not set 79# CONFIG_KALLSYMS_ALL is not set
67# CONFIG_KALLSYMS_EXTRA_PASS is not set 80# CONFIG_KALLSYMS_EXTRA_PASS is not set
81# CONFIG_STRIP_ASM_SYMS is not set
68CONFIG_HOTPLUG=y 82CONFIG_HOTPLUG=y
69CONFIG_PRINTK=y 83CONFIG_PRINTK=y
70CONFIG_BUG=y 84CONFIG_BUG=y
71CONFIG_ELF_CORE=y 85CONFIG_ELF_CORE=y
72CONFIG_COMPAT_BRK=y
73CONFIG_BASE_FULL=y 86CONFIG_BASE_FULL=y
74CONFIG_FUTEX=y 87CONFIG_FUTEX=y
75CONFIG_ANON_INODES=y
76CONFIG_EPOLL=y 88CONFIG_EPOLL=y
77CONFIG_SIGNALFD=y 89CONFIG_SIGNALFD=y
78CONFIG_TIMERFD=y 90CONFIG_TIMERFD=y
79CONFIG_EVENTFD=y 91CONFIG_EVENTFD=y
80CONFIG_SHMEM=y 92CONFIG_SHMEM=y
93CONFIG_AIO=y
81CONFIG_VM_EVENT_COUNTERS=y 94CONFIG_VM_EVENT_COUNTERS=y
95CONFIG_COMPAT_BRK=y
82CONFIG_SLAB=y 96CONFIG_SLAB=y
83# CONFIG_SLUB is not set 97# CONFIG_SLUB is not set
84# CONFIG_SLOB is not set 98# CONFIG_SLOB is not set
@@ -88,11 +102,11 @@ CONFIG_HAVE_OPROFILE=y
88# CONFIG_KPROBES is not set 102# CONFIG_KPROBES is not set
89CONFIG_HAVE_KPROBES=y 103CONFIG_HAVE_KPROBES=y
90CONFIG_HAVE_KRETPROBES=y 104CONFIG_HAVE_KRETPROBES=y
91# CONFIG_HAVE_DMA_ATTRS is not set 105CONFIG_HAVE_CLK=y
92CONFIG_PROC_PAGE_MONITOR=y 106# CONFIG_SLOW_WORK is not set
107CONFIG_HAVE_GENERIC_DMA_COHERENT=y
93CONFIG_SLABINFO=y 108CONFIG_SLABINFO=y
94CONFIG_RT_MUTEXES=y 109CONFIG_RT_MUTEXES=y
95# CONFIG_TINY_SHMEM is not set
96CONFIG_BASE_SMALL=0 110CONFIG_BASE_SMALL=0
97CONFIG_MODULES=y 111CONFIG_MODULES=y
98# CONFIG_MODULE_FORCE_LOAD is not set 112# CONFIG_MODULE_FORCE_LOAD is not set
@@ -100,12 +114,10 @@ CONFIG_MODULE_UNLOAD=y
100# CONFIG_MODULE_FORCE_UNLOAD is not set 114# CONFIG_MODULE_FORCE_UNLOAD is not set
101# CONFIG_MODVERSIONS is not set 115# CONFIG_MODVERSIONS is not set
102# CONFIG_MODULE_SRCVERSION_ALL is not set 116# CONFIG_MODULE_SRCVERSION_ALL is not set
103CONFIG_KMOD=y
104CONFIG_BLOCK=y 117CONFIG_BLOCK=y
105# CONFIG_LBD is not set 118# CONFIG_LBD is not set
106# CONFIG_BLK_DEV_IO_TRACE is not set
107# CONFIG_LSF is not set
108# CONFIG_BLK_DEV_BSG is not set 119# CONFIG_BLK_DEV_BSG is not set
120# CONFIG_BLK_DEV_INTEGRITY is not set
109 121
110# 122#
111# IO Schedulers 123# IO Schedulers
@@ -119,7 +131,7 @@ CONFIG_DEFAULT_AS=y
119# CONFIG_DEFAULT_CFQ is not set 131# CONFIG_DEFAULT_CFQ is not set
120# CONFIG_DEFAULT_NOOP is not set 132# CONFIG_DEFAULT_NOOP is not set
121CONFIG_DEFAULT_IOSCHED="anticipatory" 133CONFIG_DEFAULT_IOSCHED="anticipatory"
122CONFIG_CLASSIC_RCU=y 134CONFIG_FREEZER=y
123 135
124# 136#
125# System Type 137# System Type
@@ -129,11 +141,10 @@ CONFIG_CLASSIC_RCU=y
129# CONFIG_ARCH_REALVIEW is not set 141# CONFIG_ARCH_REALVIEW is not set
130# CONFIG_ARCH_VERSATILE is not set 142# CONFIG_ARCH_VERSATILE is not set
131# CONFIG_ARCH_AT91 is not set 143# CONFIG_ARCH_AT91 is not set
132# CONFIG_ARCH_CLPS7500 is not set
133# CONFIG_ARCH_CLPS711X is not set 144# CONFIG_ARCH_CLPS711X is not set
134# CONFIG_ARCH_CO285 is not set
135# CONFIG_ARCH_EBSA110 is not set 145# CONFIG_ARCH_EBSA110 is not set
136# CONFIG_ARCH_EP93XX is not set 146# CONFIG_ARCH_EP93XX is not set
147# CONFIG_ARCH_GEMINI is not set
137# CONFIG_ARCH_FOOTBRIDGE is not set 148# CONFIG_ARCH_FOOTBRIDGE is not set
138# CONFIG_ARCH_NETX is not set 149# CONFIG_ARCH_NETX is not set
139# CONFIG_ARCH_H720X is not set 150# CONFIG_ARCH_H720X is not set
@@ -145,26 +156,38 @@ CONFIG_CLASSIC_RCU=y
145# CONFIG_ARCH_IXP2000 is not set 156# CONFIG_ARCH_IXP2000 is not set
146# CONFIG_ARCH_IXP4XX is not set 157# CONFIG_ARCH_IXP4XX is not set
147# CONFIG_ARCH_L7200 is not set 158# CONFIG_ARCH_L7200 is not set
159# CONFIG_ARCH_KIRKWOOD is not set
148# CONFIG_ARCH_KS8695 is not set 160# CONFIG_ARCH_KS8695 is not set
149# CONFIG_ARCH_NS9XXX is not set 161# CONFIG_ARCH_NS9XXX is not set
162# CONFIG_ARCH_LOKI is not set
163# CONFIG_ARCH_MV78XX0 is not set
150# CONFIG_ARCH_MXC is not set 164# CONFIG_ARCH_MXC is not set
151# CONFIG_ARCH_ORION5X is not set 165# CONFIG_ARCH_ORION5X is not set
152# CONFIG_ARCH_PNX4008 is not set 166# CONFIG_ARCH_PNX4008 is not set
153# CONFIG_ARCH_PXA is not set 167# CONFIG_ARCH_PXA is not set
168# CONFIG_ARCH_MMP is not set
154# CONFIG_ARCH_RPC is not set 169# CONFIG_ARCH_RPC is not set
155# CONFIG_ARCH_SA1100 is not set 170# CONFIG_ARCH_SA1100 is not set
156CONFIG_ARCH_S3C2410=y 171CONFIG_ARCH_S3C2410=y
172# CONFIG_ARCH_S3C64XX is not set
157# CONFIG_ARCH_SHARK is not set 173# CONFIG_ARCH_SHARK is not set
158# CONFIG_ARCH_LH7A40X is not set 174# CONFIG_ARCH_LH7A40X is not set
159# CONFIG_ARCH_DAVINCI is not set 175# CONFIG_ARCH_DAVINCI is not set
160# CONFIG_ARCH_OMAP is not set 176# CONFIG_ARCH_OMAP is not set
161# CONFIG_ARCH_MSM7X00A is not set 177# CONFIG_ARCH_MSM is not set
178# CONFIG_ARCH_W90X900 is not set
162CONFIG_PLAT_S3C24XX=y 179CONFIG_PLAT_S3C24XX=y
180CONFIG_S3C2410_CLOCK=y
181CONFIG_S3C24XX_DCLK=y
163CONFIG_CPU_S3C244X=y 182CONFIG_CPU_S3C244X=y
164# CONFIG_S3C24XX_PWM is not set 183CONFIG_S3C24XX_PWM=y
184CONFIG_S3C24XX_GPIO_EXTRA=128
185CONFIG_S3C24XX_GPIO_EXTRA64=y
186CONFIG_S3C24XX_GPIO_EXTRA128=y
165CONFIG_PM_SIMTEC=y 187CONFIG_PM_SIMTEC=y
166CONFIG_S3C2410_DMA=y 188CONFIG_S3C2410_DMA=y
167# CONFIG_S3C2410_DMA_DEBUG is not set 189# CONFIG_S3C2410_DMA_DEBUG is not set
190CONFIG_S3C24XX_ADC=y
168CONFIG_MACH_SMDK=y 191CONFIG_MACH_SMDK=y
169CONFIG_PLAT_S3C=y 192CONFIG_PLAT_S3C=y
170CONFIG_CPU_LLSERIAL_S3C2410=y 193CONFIG_CPU_LLSERIAL_S3C2410=y
@@ -174,7 +197,8 @@ CONFIG_CPU_LLSERIAL_S3C2440=y
174# Boot options 197# Boot options
175# 198#
176# CONFIG_S3C_BOOT_WATCHDOG is not set 199# CONFIG_S3C_BOOT_WATCHDOG is not set
177# CONFIG_S3C_BOOT_ERROR_RESET is not set 200CONFIG_S3C_BOOT_ERROR_RESET=y
201CONFIG_S3C_BOOT_UART_FORCE_FIFO=y
178 202
179# 203#
180# Power management 204# Power management
@@ -182,6 +206,8 @@ CONFIG_CPU_LLSERIAL_S3C2440=y
182# CONFIG_S3C2410_PM_DEBUG is not set 206# CONFIG_S3C2410_PM_DEBUG is not set
183# CONFIG_S3C2410_PM_CHECK is not set 207# CONFIG_S3C2410_PM_CHECK is not set
184CONFIG_S3C_LOWLEVEL_UART_PORT=0 208CONFIG_S3C_LOWLEVEL_UART_PORT=0
209CONFIG_S3C_GPIO_SPACE=0
210CONFIG_S3C_DEV_HSMMC=y
185 211
186# 212#
187# S3C2400 Machines 213# S3C2400 Machines
@@ -190,7 +216,6 @@ CONFIG_CPU_S3C2410=y
190CONFIG_CPU_S3C2410_DMA=y 216CONFIG_CPU_S3C2410_DMA=y
191CONFIG_S3C2410_PM=y 217CONFIG_S3C2410_PM=y
192CONFIG_S3C2410_GPIO=y 218CONFIG_S3C2410_GPIO=y
193CONFIG_S3C2410_CLOCK=y
194CONFIG_SIMTEC_NOR=y 219CONFIG_SIMTEC_NOR=y
195CONFIG_MACH_BAST_IDE=y 220CONFIG_MACH_BAST_IDE=y
196 221
@@ -205,7 +230,7 @@ CONFIG_ARCH_BAST=y
205CONFIG_MACH_OTOM=y 230CONFIG_MACH_OTOM=y
206CONFIG_MACH_AML_M5900=y 231CONFIG_MACH_AML_M5900=y
207CONFIG_BAST_PC104_IRQ=y 232CONFIG_BAST_PC104_IRQ=y
208# CONFIG_MACH_TCT_HAMMER is not set 233CONFIG_MACH_TCT_HAMMER=y
209CONFIG_MACH_VR1000=y 234CONFIG_MACH_VR1000=y
210CONFIG_MACH_QT2410=y 235CONFIG_MACH_QT2410=y
211CONFIG_CPU_S3C2412=y 236CONFIG_CPU_S3C2412=y
@@ -215,10 +240,11 @@ CONFIG_S3C2412_PM=y
215# 240#
216# S3C2412 Machines 241# S3C2412 Machines
217# 242#
218# CONFIG_MACH_JIVE is not set 243CONFIG_MACH_JIVE=y
244# CONFIG_MACH_JIVE_SHOW_BOOTLOADER is not set
219CONFIG_MACH_SMDK2413=y 245CONFIG_MACH_SMDK2413=y
220CONFIG_MACH_S3C2413=y 246CONFIG_MACH_S3C2413=y
221# CONFIG_MACH_SMDK2412 is not set 247CONFIG_MACH_SMDK2412=y
222CONFIG_MACH_VSTMS=y 248CONFIG_MACH_VSTMS=y
223CONFIG_CPU_S3C2440=y 249CONFIG_CPU_S3C2440=y
224CONFIG_S3C2440_DMA=y 250CONFIG_S3C2440_DMA=y
@@ -232,7 +258,7 @@ CONFIG_MACH_RX3715=y
232CONFIG_ARCH_S3C2440=y 258CONFIG_ARCH_S3C2440=y
233CONFIG_MACH_NEXCODER_2440=y 259CONFIG_MACH_NEXCODER_2440=y
234CONFIG_SMDK2440_CPU2440=y 260CONFIG_SMDK2440_CPU2440=y
235# CONFIG_MACH_AT2440EVB is not set 261CONFIG_MACH_AT2440EVB=y
236CONFIG_CPU_S3C2442=y 262CONFIG_CPU_S3C2442=y
237 263
238# 264#
@@ -286,25 +312,31 @@ CONFIG_ISA=y
286# 312#
287# Kernel Features 313# Kernel Features
288# 314#
289# CONFIG_TICK_ONESHOT is not set 315CONFIG_VMSPLIT_3G=y
316# CONFIG_VMSPLIT_2G is not set
317# CONFIG_VMSPLIT_1G is not set
318CONFIG_PAGE_OFFSET=0xC0000000
290# CONFIG_PREEMPT is not set 319# CONFIG_PREEMPT is not set
291CONFIG_HZ=200 320CONFIG_HZ=200
292# CONFIG_AEABI is not set 321# CONFIG_AEABI is not set
293# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set 322CONFIG_ARCH_FLATMEM_HAS_HOLES=y
323# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
324# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
325# CONFIG_HIGHMEM is not set
294CONFIG_SELECT_MEMORY_MODEL=y 326CONFIG_SELECT_MEMORY_MODEL=y
295CONFIG_FLATMEM_MANUAL=y 327CONFIG_FLATMEM_MANUAL=y
296# CONFIG_DISCONTIGMEM_MANUAL is not set 328# CONFIG_DISCONTIGMEM_MANUAL is not set
297# CONFIG_SPARSEMEM_MANUAL is not set 329# CONFIG_SPARSEMEM_MANUAL is not set
298CONFIG_FLATMEM=y 330CONFIG_FLATMEM=y
299CONFIG_FLAT_NODE_MEM_MAP=y 331CONFIG_FLAT_NODE_MEM_MAP=y
300# CONFIG_SPARSEMEM_STATIC is not set
301# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
302CONFIG_PAGEFLAGS_EXTENDED=y 332CONFIG_PAGEFLAGS_EXTENDED=y
303CONFIG_SPLIT_PTLOCK_CPUS=4096 333CONFIG_SPLIT_PTLOCK_CPUS=4096
304# CONFIG_RESOURCES_64BIT is not set 334# CONFIG_PHYS_ADDR_T_64BIT is not set
305CONFIG_ZONE_DMA_FLAG=1 335CONFIG_ZONE_DMA_FLAG=0
306CONFIG_BOUNCE=y
307CONFIG_VIRT_TO_BUS=y 336CONFIG_VIRT_TO_BUS=y
337CONFIG_UNEVICTABLE_LRU=y
338CONFIG_HAVE_MLOCK=y
339CONFIG_HAVE_MLOCKED_PAGE_BIT=y
308CONFIG_ALIGNMENT_TRAP=y 340CONFIG_ALIGNMENT_TRAP=y
309 341
310# 342#
@@ -317,6 +349,11 @@ CONFIG_CMDLINE="root=/dev/hda1 ro init=/bin/bash console=ttySAC0"
317# CONFIG_KEXEC is not set 349# CONFIG_KEXEC is not set
318 350
319# 351#
352# CPU Power Management
353#
354# CONFIG_CPU_IDLE is not set
355
356#
320# Floating point emulation 357# Floating point emulation
321# 358#
322 359
@@ -332,6 +369,8 @@ CONFIG_FPE_NWFPE_XP=y
332# Userspace binary formats 369# Userspace binary formats
333# 370#
334CONFIG_BINFMT_ELF=y 371CONFIG_BINFMT_ELF=y
372# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
373CONFIG_HAVE_AOUT=y
335CONFIG_BINFMT_AOUT=y 374CONFIG_BINFMT_AOUT=y
336# CONFIG_BINFMT_MISC is not set 375# CONFIG_BINFMT_MISC is not set
337# CONFIG_ARTHUR is not set 376# CONFIG_ARTHUR is not set
@@ -346,10 +385,6 @@ CONFIG_SUSPEND=y
346CONFIG_SUSPEND_FREEZER=y 385CONFIG_SUSPEND_FREEZER=y
347CONFIG_APM_EMULATION=m 386CONFIG_APM_EMULATION=m
348CONFIG_ARCH_SUSPEND_POSSIBLE=y 387CONFIG_ARCH_SUSPEND_POSSIBLE=y
349
350#
351# Networking
352#
353CONFIG_NET=y 388CONFIG_NET=y
354 389
355# 390#
@@ -359,11 +394,13 @@ CONFIG_PACKET=y
359# CONFIG_PACKET_MMAP is not set 394# CONFIG_PACKET_MMAP is not set
360CONFIG_UNIX=y 395CONFIG_UNIX=y
361CONFIG_XFRM=y 396CONFIG_XFRM=y
362# CONFIG_XFRM_USER is not set 397CONFIG_XFRM_USER=m
363# CONFIG_XFRM_SUB_POLICY is not set 398# CONFIG_XFRM_SUB_POLICY is not set
364# CONFIG_XFRM_MIGRATE is not set 399# CONFIG_XFRM_MIGRATE is not set
365# CONFIG_XFRM_STATISTICS is not set 400# CONFIG_XFRM_STATISTICS is not set
366# CONFIG_NET_KEY is not set 401CONFIG_XFRM_IPCOMP=m
402CONFIG_NET_KEY=m
403# CONFIG_NET_KEY_MIGRATE is not set
367CONFIG_INET=y 404CONFIG_INET=y
368CONFIG_IP_MULTICAST=y 405CONFIG_IP_MULTICAST=y
369# CONFIG_IP_ADVANCED_ROUTER is not set 406# CONFIG_IP_ADVANCED_ROUTER is not set
@@ -372,15 +409,16 @@ CONFIG_IP_PNP=y
372CONFIG_IP_PNP_DHCP=y 409CONFIG_IP_PNP_DHCP=y
373CONFIG_IP_PNP_BOOTP=y 410CONFIG_IP_PNP_BOOTP=y
374# CONFIG_IP_PNP_RARP is not set 411# CONFIG_IP_PNP_RARP is not set
375# CONFIG_NET_IPIP is not set 412CONFIG_NET_IPIP=m
376# CONFIG_NET_IPGRE is not set 413CONFIG_NET_IPGRE=m
414# CONFIG_NET_IPGRE_BROADCAST is not set
377# CONFIG_IP_MROUTE is not set 415# CONFIG_IP_MROUTE is not set
378# CONFIG_ARPD is not set 416# CONFIG_ARPD is not set
379# CONFIG_SYN_COOKIES is not set 417# CONFIG_SYN_COOKIES is not set
380# CONFIG_INET_AH is not set 418CONFIG_INET_AH=m
381# CONFIG_INET_ESP is not set 419CONFIG_INET_ESP=m
382# CONFIG_INET_IPCOMP is not set 420CONFIG_INET_IPCOMP=m
383# CONFIG_INET_XFRM_TUNNEL is not set 421CONFIG_INET_XFRM_TUNNEL=m
384CONFIG_INET_TUNNEL=m 422CONFIG_INET_TUNNEL=m
385CONFIG_INET_XFRM_MODE_TRANSPORT=y 423CONFIG_INET_XFRM_MODE_TRANSPORT=y
386CONFIG_INET_XFRM_MODE_TUNNEL=y 424CONFIG_INET_XFRM_MODE_TUNNEL=y
@@ -388,8 +426,25 @@ CONFIG_INET_XFRM_MODE_BEET=y
388# CONFIG_INET_LRO is not set 426# CONFIG_INET_LRO is not set
389CONFIG_INET_DIAG=y 427CONFIG_INET_DIAG=y
390CONFIG_INET_TCP_DIAG=y 428CONFIG_INET_TCP_DIAG=y
391# CONFIG_TCP_CONG_ADVANCED is not set 429CONFIG_TCP_CONG_ADVANCED=y
430CONFIG_TCP_CONG_BIC=m
392CONFIG_TCP_CONG_CUBIC=y 431CONFIG_TCP_CONG_CUBIC=y
432CONFIG_TCP_CONG_WESTWOOD=m
433CONFIG_TCP_CONG_HTCP=m
434CONFIG_TCP_CONG_HSTCP=m
435CONFIG_TCP_CONG_HYBLA=m
436CONFIG_TCP_CONG_VEGAS=m
437CONFIG_TCP_CONG_SCALABLE=m
438CONFIG_TCP_CONG_LP=m
439CONFIG_TCP_CONG_VENO=m
440CONFIG_TCP_CONG_YEAH=m
441CONFIG_TCP_CONG_ILLINOIS=m
442# CONFIG_DEFAULT_BIC is not set
443CONFIG_DEFAULT_CUBIC=y
444# CONFIG_DEFAULT_HTCP is not set
445# CONFIG_DEFAULT_VEGAS is not set
446# CONFIG_DEFAULT_WESTWOOD is not set
447# CONFIG_DEFAULT_RENO is not set
393CONFIG_DEFAULT_TCP_CONG="cubic" 448CONFIG_DEFAULT_TCP_CONG="cubic"
394# CONFIG_TCP_MD5SIG is not set 449# CONFIG_TCP_MD5SIG is not set
395CONFIG_IPV6=m 450CONFIG_IPV6=m
@@ -413,12 +468,181 @@ CONFIG_IPV6_TUNNEL=m
413# CONFIG_IPV6_MULTIPLE_TABLES is not set 468# CONFIG_IPV6_MULTIPLE_TABLES is not set
414# CONFIG_IPV6_MROUTE is not set 469# CONFIG_IPV6_MROUTE is not set
415# CONFIG_NETWORK_SECMARK is not set 470# CONFIG_NETWORK_SECMARK is not set
416# CONFIG_NETFILTER is not set 471CONFIG_NETFILTER=y
472# CONFIG_NETFILTER_DEBUG is not set
473CONFIG_NETFILTER_ADVANCED=y
474
475#
476# Core Netfilter Configuration
477#
478CONFIG_NETFILTER_NETLINK=m
479CONFIG_NETFILTER_NETLINK_QUEUE=m
480CONFIG_NETFILTER_NETLINK_LOG=m
481CONFIG_NF_CONNTRACK=m
482CONFIG_NF_CT_ACCT=y
483CONFIG_NF_CONNTRACK_MARK=y
484CONFIG_NF_CONNTRACK_EVENTS=y
485CONFIG_NF_CT_PROTO_DCCP=m
486CONFIG_NF_CT_PROTO_GRE=m
487CONFIG_NF_CT_PROTO_SCTP=m
488CONFIG_NF_CT_PROTO_UDPLITE=m
489CONFIG_NF_CONNTRACK_AMANDA=m
490CONFIG_NF_CONNTRACK_FTP=m
491CONFIG_NF_CONNTRACK_H323=m
492CONFIG_NF_CONNTRACK_IRC=m
493CONFIG_NF_CONNTRACK_NETBIOS_NS=m
494CONFIG_NF_CONNTRACK_PPTP=m
495CONFIG_NF_CONNTRACK_SANE=m
496CONFIG_NF_CONNTRACK_SIP=m
497CONFIG_NF_CONNTRACK_TFTP=m
498CONFIG_NF_CT_NETLINK=m
499# CONFIG_NETFILTER_TPROXY is not set
500CONFIG_NETFILTER_XTABLES=m
501CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
502CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
503# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
504CONFIG_NETFILTER_XT_TARGET_HL=m
505CONFIG_NETFILTER_XT_TARGET_LED=m
506CONFIG_NETFILTER_XT_TARGET_MARK=m
507CONFIG_NETFILTER_XT_TARGET_NFLOG=m
508CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
509# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set
510CONFIG_NETFILTER_XT_TARGET_RATEEST=m
511# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
512CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
513# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set
514CONFIG_NETFILTER_XT_MATCH_CLUSTER=m
515CONFIG_NETFILTER_XT_MATCH_COMMENT=m
516CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
517CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
518CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
519CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
520CONFIG_NETFILTER_XT_MATCH_DCCP=m
521CONFIG_NETFILTER_XT_MATCH_DSCP=m
522CONFIG_NETFILTER_XT_MATCH_ESP=m
523CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
524CONFIG_NETFILTER_XT_MATCH_HELPER=m
525CONFIG_NETFILTER_XT_MATCH_HL=m
526CONFIG_NETFILTER_XT_MATCH_IPRANGE=m
527CONFIG_NETFILTER_XT_MATCH_LENGTH=m
528CONFIG_NETFILTER_XT_MATCH_LIMIT=m
529CONFIG_NETFILTER_XT_MATCH_MAC=m
530CONFIG_NETFILTER_XT_MATCH_MARK=m
531CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
532CONFIG_NETFILTER_XT_MATCH_OWNER=m
533CONFIG_NETFILTER_XT_MATCH_POLICY=m
534CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
535CONFIG_NETFILTER_XT_MATCH_QUOTA=m
536CONFIG_NETFILTER_XT_MATCH_RATEEST=m
537CONFIG_NETFILTER_XT_MATCH_REALM=m
538CONFIG_NETFILTER_XT_MATCH_RECENT=m
539# CONFIG_NETFILTER_XT_MATCH_RECENT_PROC_COMPAT is not set
540CONFIG_NETFILTER_XT_MATCH_SCTP=m
541CONFIG_NETFILTER_XT_MATCH_STATE=m
542CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
543CONFIG_NETFILTER_XT_MATCH_STRING=m
544CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
545CONFIG_NETFILTER_XT_MATCH_TIME=m
546CONFIG_NETFILTER_XT_MATCH_U32=m
547CONFIG_IP_VS=m
548# CONFIG_IP_VS_IPV6 is not set
549# CONFIG_IP_VS_DEBUG is not set
550CONFIG_IP_VS_TAB_BITS=12
551
552#
553# IPVS transport protocol load balancing support
554#
555# CONFIG_IP_VS_PROTO_TCP is not set
556# CONFIG_IP_VS_PROTO_UDP is not set
557# CONFIG_IP_VS_PROTO_ESP is not set
558# CONFIG_IP_VS_PROTO_AH is not set
559
560#
561# IPVS scheduler
562#
563# CONFIG_IP_VS_RR is not set
564# CONFIG_IP_VS_WRR is not set
565# CONFIG_IP_VS_LC is not set
566# CONFIG_IP_VS_WLC is not set
567# CONFIG_IP_VS_LBLC is not set
568# CONFIG_IP_VS_LBLCR is not set
569# CONFIG_IP_VS_DH is not set
570# CONFIG_IP_VS_SH is not set
571# CONFIG_IP_VS_SED is not set
572# CONFIG_IP_VS_NQ is not set
573
574#
575# IPVS application helper
576#
577
578#
579# IP: Netfilter Configuration
580#
581CONFIG_NF_DEFRAG_IPV4=m
582CONFIG_NF_CONNTRACK_IPV4=m
583CONFIG_NF_CONNTRACK_PROC_COMPAT=y
584CONFIG_IP_NF_QUEUE=m
585CONFIG_IP_NF_IPTABLES=m
586CONFIG_IP_NF_MATCH_ADDRTYPE=m
587CONFIG_IP_NF_MATCH_AH=m
588CONFIG_IP_NF_MATCH_ECN=m
589CONFIG_IP_NF_MATCH_TTL=m
590CONFIG_IP_NF_FILTER=m
591CONFIG_IP_NF_TARGET_REJECT=m
592CONFIG_IP_NF_TARGET_LOG=m
593CONFIG_IP_NF_TARGET_ULOG=m
594CONFIG_NF_NAT=m
595CONFIG_NF_NAT_NEEDED=y
596CONFIG_IP_NF_TARGET_MASQUERADE=m
597CONFIG_IP_NF_TARGET_NETMAP=m
598CONFIG_IP_NF_TARGET_REDIRECT=m
599CONFIG_NF_NAT_SNMP_BASIC=m
600CONFIG_NF_NAT_PROTO_DCCP=m
601CONFIG_NF_NAT_PROTO_GRE=m
602CONFIG_NF_NAT_PROTO_UDPLITE=m
603CONFIG_NF_NAT_PROTO_SCTP=m
604CONFIG_NF_NAT_FTP=m
605CONFIG_NF_NAT_IRC=m
606CONFIG_NF_NAT_TFTP=m
607CONFIG_NF_NAT_AMANDA=m
608CONFIG_NF_NAT_PPTP=m
609CONFIG_NF_NAT_H323=m
610CONFIG_NF_NAT_SIP=m
611CONFIG_IP_NF_MANGLE=m
612CONFIG_IP_NF_TARGET_CLUSTERIP=m
613CONFIG_IP_NF_TARGET_ECN=m
614CONFIG_IP_NF_TARGET_TTL=m
615CONFIG_IP_NF_RAW=m
616CONFIG_IP_NF_ARPTABLES=m
617CONFIG_IP_NF_ARPFILTER=m
618CONFIG_IP_NF_ARP_MANGLE=m
619
620#
621# IPv6: Netfilter Configuration
622#
623CONFIG_NF_CONNTRACK_IPV6=m
624CONFIG_IP6_NF_QUEUE=m
625CONFIG_IP6_NF_IPTABLES=m
626CONFIG_IP6_NF_MATCH_AH=m
627CONFIG_IP6_NF_MATCH_EUI64=m
628CONFIG_IP6_NF_MATCH_FRAG=m
629CONFIG_IP6_NF_MATCH_OPTS=m
630CONFIG_IP6_NF_MATCH_HL=m
631CONFIG_IP6_NF_MATCH_IPV6HEADER=m
632CONFIG_IP6_NF_MATCH_MH=m
633CONFIG_IP6_NF_MATCH_RT=m
634CONFIG_IP6_NF_TARGET_HL=m
635CONFIG_IP6_NF_TARGET_LOG=m
636CONFIG_IP6_NF_FILTER=m
637CONFIG_IP6_NF_TARGET_REJECT=m
638CONFIG_IP6_NF_MANGLE=m
639CONFIG_IP6_NF_RAW=m
417# CONFIG_IP_DCCP is not set 640# CONFIG_IP_DCCP is not set
418# CONFIG_IP_SCTP is not set 641# CONFIG_IP_SCTP is not set
419# CONFIG_TIPC is not set 642# CONFIG_TIPC is not set
420# CONFIG_ATM is not set 643# CONFIG_ATM is not set
421# CONFIG_BRIDGE is not set 644# CONFIG_BRIDGE is not set
645# CONFIG_NET_DSA is not set
422# CONFIG_VLAN_8021Q is not set 646# CONFIG_VLAN_8021Q is not set
423# CONFIG_DECNET is not set 647# CONFIG_DECNET is not set
424# CONFIG_LLC2 is not set 648# CONFIG_LLC2 is not set
@@ -428,8 +652,10 @@ CONFIG_IPV6_TUNNEL=m
428# CONFIG_LAPB is not set 652# CONFIG_LAPB is not set
429# CONFIG_ECONET is not set 653# CONFIG_ECONET is not set
430# CONFIG_WAN_ROUTER is not set 654# CONFIG_WAN_ROUTER is not set
655# CONFIG_PHONET is not set
431# CONFIG_NET_SCHED is not set 656# CONFIG_NET_SCHED is not set
432CONFIG_NET_SCH_FIFO=y 657CONFIG_NET_CLS_ROUTE=y
658# CONFIG_DCB is not set
433 659
434# 660#
435# Network testing 661# Network testing
@@ -451,8 +677,8 @@ CONFIG_BT_HIDP=m
451# 677#
452# Bluetooth device drivers 678# Bluetooth device drivers
453# 679#
454CONFIG_BT_HCIUSB=m 680# CONFIG_BT_HCIBTUSB is not set
455CONFIG_BT_HCIUSB_SCO=y 681# CONFIG_BT_HCIBTSDIO is not set
456CONFIG_BT_HCIUART=m 682CONFIG_BT_HCIUART=m
457CONFIG_BT_HCIUART_H4=y 683CONFIG_BT_HCIUART_H4=y
458CONFIG_BT_HCIUART_BCSP=y 684CONFIG_BT_HCIUART_BCSP=y
@@ -462,35 +688,26 @@ CONFIG_BT_HCIBPA10X=m
462CONFIG_BT_HCIBFUSB=m 688CONFIG_BT_HCIBFUSB=m
463CONFIG_BT_HCIVHCI=m 689CONFIG_BT_HCIVHCI=m
464# CONFIG_AF_RXRPC is not set 690# CONFIG_AF_RXRPC is not set
465 691CONFIG_WIRELESS=y
466#
467# Wireless
468#
469CONFIG_CFG80211=m 692CONFIG_CFG80211=m
470CONFIG_NL80211=y 693# CONFIG_CFG80211_REG_DEBUG is not set
694# CONFIG_WIRELESS_OLD_REGULATORY is not set
471CONFIG_WIRELESS_EXT=y 695CONFIG_WIRELESS_EXT=y
696CONFIG_WIRELESS_EXT_SYSFS=y
697# CONFIG_LIB80211 is not set
472CONFIG_MAC80211=m 698CONFIG_MAC80211=m
473 699
474# 700#
475# Rate control algorithm selection 701# Rate control algorithm selection
476# 702#
477CONFIG_MAC80211_RC_DEFAULT_PID=y 703CONFIG_MAC80211_RC_MINSTREL=y
478# CONFIG_MAC80211_RC_DEFAULT_NONE is not set 704# CONFIG_MAC80211_RC_DEFAULT_PID is not set
479 705CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
480# 706CONFIG_MAC80211_RC_DEFAULT="minstrel"
481# Selecting 'y' for an algorithm will
482#
483
484#
485# build the algorithm into mac80211.
486#
487CONFIG_MAC80211_RC_DEFAULT="pid"
488CONFIG_MAC80211_RC_PID=y
489CONFIG_MAC80211_MESH=y 707CONFIG_MAC80211_MESH=y
490CONFIG_MAC80211_LEDS=y 708CONFIG_MAC80211_LEDS=y
491# CONFIG_MAC80211_DEBUG_PACKET_ALIGNMENT is not set 709# CONFIG_MAC80211_DEBUG_MENU is not set
492# CONFIG_MAC80211_DEBUG is not set 710# CONFIG_WIMAX is not set
493# CONFIG_IEEE80211 is not set
494# CONFIG_RFKILL is not set 711# CONFIG_RFKILL is not set
495# CONFIG_NET_9P is not set 712# CONFIG_NET_9P is not set
496 713
@@ -504,7 +721,9 @@ CONFIG_MAC80211_LEDS=y
504CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 721CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
505CONFIG_STANDALONE=y 722CONFIG_STANDALONE=y
506CONFIG_PREVENT_FIRMWARE_BUILD=y 723CONFIG_PREVENT_FIRMWARE_BUILD=y
507CONFIG_FW_LOADER=m 724CONFIG_FW_LOADER=y
725CONFIG_FIRMWARE_IN_KERNEL=y
726CONFIG_EXTRA_FIRMWARE=""
508# CONFIG_DEBUG_DRIVER is not set 727# CONFIG_DEBUG_DRIVER is not set
509# CONFIG_DEBUG_DEVRES is not set 728# CONFIG_DEBUG_DEVRES is not set
510# CONFIG_SYS_HYPERVISOR is not set 729# CONFIG_SYS_HYPERVISOR is not set
@@ -513,6 +732,7 @@ CONFIG_MTD=y
513# CONFIG_MTD_DEBUG is not set 732# CONFIG_MTD_DEBUG is not set
514# CONFIG_MTD_CONCAT is not set 733# CONFIG_MTD_CONCAT is not set
515CONFIG_MTD_PARTITIONS=y 734CONFIG_MTD_PARTITIONS=y
735# CONFIG_MTD_TESTS is not set
516CONFIG_MTD_REDBOOT_PARTS=y 736CONFIG_MTD_REDBOOT_PARTS=y
517CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 737CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
518CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y 738CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
@@ -545,7 +765,7 @@ CONFIG_MTD_MAP_BANK_WIDTH_1=y
545CONFIG_MTD_MAP_BANK_WIDTH_2=y 765CONFIG_MTD_MAP_BANK_WIDTH_2=y
546CONFIG_MTD_MAP_BANK_WIDTH_4=y 766CONFIG_MTD_MAP_BANK_WIDTH_4=y
547# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set 767# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
548CONFIG_MTD_MAP_BANK_WIDTH_16=y 768# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
549# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set 769# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
550CONFIG_MTD_CFI_I1=y 770CONFIG_MTD_CFI_I1=y
551CONFIG_MTD_CFI_I2=y 771CONFIG_MTD_CFI_I2=y
@@ -566,8 +786,6 @@ CONFIG_MTD_ROM=y
566# CONFIG_MTD_PHYSMAP is not set 786# CONFIG_MTD_PHYSMAP is not set
567# CONFIG_MTD_ARM_INTEGRATOR is not set 787# CONFIG_MTD_ARM_INTEGRATOR is not set
568# CONFIG_MTD_IMPA7 is not set 788# CONFIG_MTD_IMPA7 is not set
569CONFIG_MTD_BAST=y
570CONFIG_MTD_BAST_MAXSIZE=4
571# CONFIG_MTD_PLATRAM is not set 789# CONFIG_MTD_PLATRAM is not set
572 790
573# 791#
@@ -590,6 +808,7 @@ CONFIG_MTD_NAND=y
590# CONFIG_MTD_NAND_VERIFY_WRITE is not set 808# CONFIG_MTD_NAND_VERIFY_WRITE is not set
591# CONFIG_MTD_NAND_ECC_SMC is not set 809# CONFIG_MTD_NAND_ECC_SMC is not set
592# CONFIG_MTD_NAND_MUSEUM_IDS is not set 810# CONFIG_MTD_NAND_MUSEUM_IDS is not set
811# CONFIG_MTD_NAND_GPIO is not set
593CONFIG_MTD_NAND_IDS=y 812CONFIG_MTD_NAND_IDS=y
594CONFIG_MTD_NAND_S3C2410=y 813CONFIG_MTD_NAND_S3C2410=y
595# CONFIG_MTD_NAND_S3C2410_DEBUG is not set 814# CONFIG_MTD_NAND_S3C2410_DEBUG is not set
@@ -602,6 +821,11 @@ CONFIG_MTD_NAND_S3C2410=y
602# CONFIG_MTD_ONENAND is not set 821# CONFIG_MTD_ONENAND is not set
603 822
604# 823#
824# LPDDR flash memory drivers
825#
826# CONFIG_MTD_LPDDR is not set
827
828#
605# UBI - Unsorted block images 829# UBI - Unsorted block images
606# 830#
607# CONFIG_MTD_UBI is not set 831# CONFIG_MTD_UBI is not set
@@ -620,7 +844,7 @@ CONFIG_BLK_DEV=y
620CONFIG_BLK_DEV_LOOP=y 844CONFIG_BLK_DEV_LOOP=y
621# CONFIG_BLK_DEV_CRYPTOLOOP is not set 845# CONFIG_BLK_DEV_CRYPTOLOOP is not set
622CONFIG_BLK_DEV_NBD=m 846CONFIG_BLK_DEV_NBD=m
623# CONFIG_BLK_DEV_UB is not set 847CONFIG_BLK_DEV_UB=m
624CONFIG_BLK_DEV_RAM=y 848CONFIG_BLK_DEV_RAM=y
625CONFIG_BLK_DEV_RAM_COUNT=16 849CONFIG_BLK_DEV_RAM_COUNT=16
626CONFIG_BLK_DEV_RAM_SIZE=4096 850CONFIG_BLK_DEV_RAM_SIZE=4096
@@ -628,32 +852,40 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
628# CONFIG_CDROM_PKTCDVD is not set 852# CONFIG_CDROM_PKTCDVD is not set
629CONFIG_ATA_OVER_ETH=m 853CONFIG_ATA_OVER_ETH=m
630CONFIG_MISC_DEVICES=y 854CONFIG_MISC_DEVICES=y
631# CONFIG_EEPROM_93CX6 is not set 855# CONFIG_ICS932S401 is not set
632# CONFIG_ENCLOSURE_SERVICES is not set 856# CONFIG_ENCLOSURE_SERVICES is not set
857# CONFIG_ISL29003 is not set
858# CONFIG_C2PORT is not set
859
860#
861# EEPROM support
862#
863CONFIG_EEPROM_AT24=m
864CONFIG_EEPROM_AT25=m
865CONFIG_EEPROM_LEGACY=m
866CONFIG_EEPROM_93CX6=m
633CONFIG_HAVE_IDE=y 867CONFIG_HAVE_IDE=y
634CONFIG_IDE=y 868CONFIG_IDE=y
635CONFIG_BLK_DEV_IDE=y
636 869
637# 870#
638# Please see Documentation/ide/ide.txt for help/info on IDE drives 871# Please see Documentation/ide/ide.txt for help/info on IDE drives
639# 872#
873CONFIG_IDE_ATAPI=y
640# CONFIG_BLK_DEV_IDE_SATA is not set 874# CONFIG_BLK_DEV_IDE_SATA is not set
641CONFIG_BLK_DEV_IDEDISK=y 875CONFIG_IDE_GD=y
642# CONFIG_IDEDISK_MULTI_MODE is not set 876CONFIG_IDE_GD_ATA=y
877# CONFIG_IDE_GD_ATAPI is not set
643CONFIG_BLK_DEV_IDECD=y 878CONFIG_BLK_DEV_IDECD=y
644CONFIG_BLK_DEV_IDECD_VERBOSE_ERRORS=y 879CONFIG_BLK_DEV_IDECD_VERBOSE_ERRORS=y
645CONFIG_BLK_DEV_IDETAPE=m 880CONFIG_BLK_DEV_IDETAPE=m
646CONFIG_BLK_DEV_IDEFLOPPY=m
647# CONFIG_BLK_DEV_IDESCSI is not set
648# CONFIG_IDE_TASK_IOCTL is not set 881# CONFIG_IDE_TASK_IOCTL is not set
649CONFIG_IDE_PROC_FS=y 882CONFIG_IDE_PROC_FS=y
650 883
651# 884#
652# IDE chipset support/bugfixes 885# IDE chipset support/bugfixes
653# 886#
654# CONFIG_BLK_DEV_PLATFORM is not set 887CONFIG_BLK_DEV_PLATFORM=y
655# CONFIG_BLK_DEV_IDEDMA is not set 888# CONFIG_BLK_DEV_IDEDMA is not set
656# CONFIG_BLK_DEV_HD is not set
657 889
658# 890#
659# SCSI device support 891# SCSI device support
@@ -699,6 +931,8 @@ CONFIG_SCSI_LOWLEVEL=y
699# CONFIG_SCSI_AIC7XXX_OLD is not set 931# CONFIG_SCSI_AIC7XXX_OLD is not set
700# CONFIG_SCSI_ADVANSYS is not set 932# CONFIG_SCSI_ADVANSYS is not set
701# CONFIG_SCSI_IN2000 is not set 933# CONFIG_SCSI_IN2000 is not set
934# CONFIG_LIBFC is not set
935# CONFIG_LIBFCOE is not set
702# CONFIG_SCSI_DTC3280 is not set 936# CONFIG_SCSI_DTC3280 is not set
703# CONFIG_SCSI_FUTURE_DOMAIN is not set 937# CONFIG_SCSI_FUTURE_DOMAIN is not set
704# CONFIG_SCSI_GENERIC_NCR5380 is not set 938# CONFIG_SCSI_GENERIC_NCR5380 is not set
@@ -711,11 +945,13 @@ CONFIG_SCSI_LOWLEVEL=y
711# CONFIG_SCSI_SYM53C416 is not set 945# CONFIG_SCSI_SYM53C416 is not set
712# CONFIG_SCSI_T128 is not set 946# CONFIG_SCSI_T128 is not set
713# CONFIG_SCSI_DEBUG is not set 947# CONFIG_SCSI_DEBUG is not set
948# CONFIG_SCSI_DH is not set
949# CONFIG_SCSI_OSD_INITIATOR is not set
714# CONFIG_ATA is not set 950# CONFIG_ATA is not set
715CONFIG_HAVE_PATA_PLATFORM=y 951CONFIG_HAVE_PATA_PLATFORM=y
716# CONFIG_MD is not set 952# CONFIG_MD is not set
717CONFIG_NETDEVICES=y 953CONFIG_NETDEVICES=y
718# CONFIG_NETDEVICES_MULTIQUEUE is not set 954CONFIG_COMPAT_NET_DEV_OPS=y
719# CONFIG_DUMMY is not set 955# CONFIG_DUMMY is not set
720# CONFIG_BONDING is not set 956# CONFIG_BONDING is not set
721# CONFIG_MACVLAN is not set 957# CONFIG_MACVLAN is not set
@@ -731,9 +967,14 @@ CONFIG_MII=y
731# CONFIG_NET_VENDOR_SMC is not set 967# CONFIG_NET_VENDOR_SMC is not set
732# CONFIG_SMC91X is not set 968# CONFIG_SMC91X is not set
733CONFIG_DM9000=y 969CONFIG_DM9000=y
734# CONFIG_ENC28J60 is not set
735CONFIG_DM9000_DEBUGLEVEL=4 970CONFIG_DM9000_DEBUGLEVEL=4
971# CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL is not set
972# CONFIG_ENC28J60 is not set
973# CONFIG_ETHOC is not set
974# CONFIG_SMC911X is not set
975# CONFIG_SMSC911X is not set
736# CONFIG_NET_VENDOR_RACAL is not set 976# CONFIG_NET_VENDOR_RACAL is not set
977# CONFIG_DNET is not set
737# CONFIG_AT1700 is not set 978# CONFIG_AT1700 is not set
738# CONFIG_DEPCA is not set 979# CONFIG_DEPCA is not set
739# CONFIG_HP100 is not set 980# CONFIG_HP100 is not set
@@ -742,11 +983,14 @@ CONFIG_DM9000_DEBUGLEVEL=4
742# CONFIG_IBM_NEW_EMAC_RGMII is not set 983# CONFIG_IBM_NEW_EMAC_RGMII is not set
743# CONFIG_IBM_NEW_EMAC_TAH is not set 984# CONFIG_IBM_NEW_EMAC_TAH is not set
744# CONFIG_IBM_NEW_EMAC_EMAC4 is not set 985# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
986# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
987# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
988# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
745# CONFIG_NET_PCI is not set 989# CONFIG_NET_PCI is not set
746# CONFIG_B44 is not set 990# CONFIG_B44 is not set
991# CONFIG_CS89x0 is not set
747# CONFIG_NET_POCKET is not set 992# CONFIG_NET_POCKET is not set
748CONFIG_NETDEV_1000=y 993CONFIG_NETDEV_1000=y
749# CONFIG_E1000E_ENABLED is not set
750CONFIG_NETDEV_10000=y 994CONFIG_NETDEV_10000=y
751# CONFIG_TR is not set 995# CONFIG_TR is not set
752 996
@@ -755,7 +999,10 @@ CONFIG_NETDEV_10000=y
755# 999#
756# CONFIG_WLAN_PRE80211 is not set 1000# CONFIG_WLAN_PRE80211 is not set
757# CONFIG_WLAN_80211 is not set 1001# CONFIG_WLAN_80211 is not set
758# CONFIG_IWLWIFI_LEDS is not set 1002
1003#
1004# Enable WiMAX (Networking options) to see the WiMAX drivers
1005#
759 1006
760# 1007#
761# USB Network Adapters 1008# USB Network Adapters
@@ -778,7 +1025,7 @@ CONFIG_NETDEV_10000=y
778# Input device support 1025# Input device support
779# 1026#
780CONFIG_INPUT=y 1027CONFIG_INPUT=y
781# CONFIG_INPUT_FF_MEMLESS is not set 1028CONFIG_INPUT_FF_MEMLESS=m
782# CONFIG_INPUT_POLLDEV is not set 1029# CONFIG_INPUT_POLLDEV is not set
783 1030
784# 1031#
@@ -789,7 +1036,7 @@ CONFIG_INPUT_MOUSEDEV_PSAUX=y
789CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 1036CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
790CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 1037CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
791# CONFIG_INPUT_JOYDEV is not set 1038# CONFIG_INPUT_JOYDEV is not set
792# CONFIG_INPUT_EVDEV is not set 1039CONFIG_INPUT_EVDEV=y
793# CONFIG_INPUT_EVBUG is not set 1040# CONFIG_INPUT_EVBUG is not set
794 1041
795# 1042#
@@ -808,20 +1055,88 @@ CONFIG_MOUSE_PS2=y
808CONFIG_MOUSE_PS2_ALPS=y 1055CONFIG_MOUSE_PS2_ALPS=y
809CONFIG_MOUSE_PS2_LOGIPS2PP=y 1056CONFIG_MOUSE_PS2_LOGIPS2PP=y
810CONFIG_MOUSE_PS2_SYNAPTICS=y 1057CONFIG_MOUSE_PS2_SYNAPTICS=y
811CONFIG_MOUSE_PS2_LIFEBOOK=y
812CONFIG_MOUSE_PS2_TRACKPOINT=y 1058CONFIG_MOUSE_PS2_TRACKPOINT=y
1059# CONFIG_MOUSE_PS2_ELANTECH is not set
813# CONFIG_MOUSE_PS2_TOUCHKIT is not set 1060# CONFIG_MOUSE_PS2_TOUCHKIT is not set
814# CONFIG_MOUSE_SERIAL is not set 1061# CONFIG_MOUSE_SERIAL is not set
815# CONFIG_MOUSE_APPLETOUCH is not set 1062CONFIG_MOUSE_APPLETOUCH=m
1063CONFIG_MOUSE_BCM5974=m
816# CONFIG_MOUSE_INPORT is not set 1064# CONFIG_MOUSE_INPORT is not set
817# CONFIG_MOUSE_LOGIBM is not set 1065# CONFIG_MOUSE_LOGIBM is not set
818# CONFIG_MOUSE_PC110PAD is not set 1066# CONFIG_MOUSE_PC110PAD is not set
819# CONFIG_MOUSE_VSXXXAA is not set 1067# CONFIG_MOUSE_VSXXXAA is not set
820# CONFIG_MOUSE_GPIO is not set 1068# CONFIG_MOUSE_GPIO is not set
821# CONFIG_INPUT_JOYSTICK is not set 1069CONFIG_INPUT_JOYSTICK=y
1070CONFIG_JOYSTICK_ANALOG=m
1071CONFIG_JOYSTICK_A3D=m
1072CONFIG_JOYSTICK_ADI=m
1073CONFIG_JOYSTICK_COBRA=m
1074CONFIG_JOYSTICK_GF2K=m
1075CONFIG_JOYSTICK_GRIP=m
1076CONFIG_JOYSTICK_GRIP_MP=m
1077CONFIG_JOYSTICK_GUILLEMOT=m
1078CONFIG_JOYSTICK_INTERACT=m
1079CONFIG_JOYSTICK_SIDEWINDER=m
1080CONFIG_JOYSTICK_TMDC=m
1081CONFIG_JOYSTICK_IFORCE=m
1082# CONFIG_JOYSTICK_IFORCE_USB is not set
1083# CONFIG_JOYSTICK_IFORCE_232 is not set
1084# CONFIG_JOYSTICK_WARRIOR is not set
1085CONFIG_JOYSTICK_MAGELLAN=m
1086CONFIG_JOYSTICK_SPACEORB=m
1087CONFIG_JOYSTICK_SPACEBALL=m
1088CONFIG_JOYSTICK_STINGER=m
1089CONFIG_JOYSTICK_TWIDJOY=m
1090CONFIG_JOYSTICK_ZHENHUA=m
1091CONFIG_JOYSTICK_DB9=m
1092CONFIG_JOYSTICK_GAMECON=m
1093CONFIG_JOYSTICK_TURBOGRAFX=m
1094CONFIG_JOYSTICK_JOYDUMP=m
1095CONFIG_JOYSTICK_XPAD=m
1096CONFIG_JOYSTICK_XPAD_FF=y
1097CONFIG_JOYSTICK_XPAD_LEDS=y
822# CONFIG_INPUT_TABLET is not set 1098# CONFIG_INPUT_TABLET is not set
823# CONFIG_INPUT_TOUCHSCREEN is not set 1099CONFIG_INPUT_TOUCHSCREEN=y
824# CONFIG_INPUT_MISC is not set 1100# CONFIG_TOUCHSCREEN_ADS7846 is not set
1101# CONFIG_TOUCHSCREEN_AD7877 is not set
1102# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
1103# CONFIG_TOUCHSCREEN_AD7879_SPI is not set
1104# CONFIG_TOUCHSCREEN_AD7879 is not set
1105# CONFIG_TOUCHSCREEN_FUJITSU is not set
1106# CONFIG_TOUCHSCREEN_GUNZE is not set
1107# CONFIG_TOUCHSCREEN_ELO is not set
1108# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
1109# CONFIG_TOUCHSCREEN_MTOUCH is not set
1110# CONFIG_TOUCHSCREEN_INEXIO is not set
1111# CONFIG_TOUCHSCREEN_MK712 is not set
1112# CONFIG_TOUCHSCREEN_HTCPEN is not set
1113# CONFIG_TOUCHSCREEN_PENMOUNT is not set
1114# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
1115# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
1116# CONFIG_TOUCHSCREEN_WM97XX is not set
1117CONFIG_TOUCHSCREEN_USB_COMPOSITE=m
1118CONFIG_TOUCHSCREEN_USB_EGALAX=y
1119CONFIG_TOUCHSCREEN_USB_PANJIT=y
1120CONFIG_TOUCHSCREEN_USB_3M=y
1121CONFIG_TOUCHSCREEN_USB_ITM=y
1122CONFIG_TOUCHSCREEN_USB_ETURBO=y
1123CONFIG_TOUCHSCREEN_USB_GUNZE=y
1124CONFIG_TOUCHSCREEN_USB_DMC_TSC10=y
1125CONFIG_TOUCHSCREEN_USB_IRTOUCH=y
1126CONFIG_TOUCHSCREEN_USB_IDEALTEK=y
1127CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH=y
1128CONFIG_TOUCHSCREEN_USB_GOTOP=y
1129# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
1130# CONFIG_TOUCHSCREEN_TSC2007 is not set
1131CONFIG_INPUT_MISC=y
1132CONFIG_INPUT_ATI_REMOTE=m
1133CONFIG_INPUT_ATI_REMOTE2=m
1134CONFIG_INPUT_KEYSPAN_REMOTE=m
1135CONFIG_INPUT_POWERMATE=m
1136CONFIG_INPUT_YEALINK=m
1137CONFIG_INPUT_CM109=m
1138CONFIG_INPUT_UINPUT=m
1139CONFIG_INPUT_GPIO_ROTARY_ENCODER=m
825 1140
826# 1141#
827# Hardware I/O ports 1142# Hardware I/O ports
@@ -831,12 +1146,15 @@ CONFIG_SERIO_SERPORT=y
831# CONFIG_SERIO_PARKBD is not set 1146# CONFIG_SERIO_PARKBD is not set
832CONFIG_SERIO_LIBPS2=y 1147CONFIG_SERIO_LIBPS2=y
833# CONFIG_SERIO_RAW is not set 1148# CONFIG_SERIO_RAW is not set
834# CONFIG_GAMEPORT is not set 1149CONFIG_GAMEPORT=m
1150# CONFIG_GAMEPORT_NS558 is not set
1151# CONFIG_GAMEPORT_L4 is not set
835 1152
836# 1153#
837# Character devices 1154# Character devices
838# 1155#
839CONFIG_VT=y 1156CONFIG_VT=y
1157CONFIG_CONSOLE_TRANSLATIONS=y
840CONFIG_VT_CONSOLE=y 1158CONFIG_VT_CONSOLE=y
841CONFIG_HW_CONSOLE=y 1159CONFIG_HW_CONSOLE=y
842# CONFIG_VT_HW_CONSOLE_BINDING is not set 1160# CONFIG_VT_HW_CONSOLE_BINDING is not set
@@ -877,14 +1195,17 @@ CONFIG_SERIAL_8250_SHARE_IRQ=y
877# Non-8250 serial port support 1195# Non-8250 serial port support
878# 1196#
879CONFIG_SERIAL_SAMSUNG=y 1197CONFIG_SERIAL_SAMSUNG=y
1198CONFIG_SERIAL_SAMSUNG_UARTS=4
880# CONFIG_SERIAL_SAMSUNG_DEBUG is not set 1199# CONFIG_SERIAL_SAMSUNG_DEBUG is not set
881CONFIG_SERIAL_SAMSUNG_CONSOLE=y 1200CONFIG_SERIAL_SAMSUNG_CONSOLE=y
882CONFIG_SERIAL_S3C2410=y 1201CONFIG_SERIAL_S3C2410=y
883CONFIG_SERIAL_S3C2412=y 1202CONFIG_SERIAL_S3C2412=y
884CONFIG_SERIAL_S3C2440=y 1203CONFIG_SERIAL_S3C2440=y
1204# CONFIG_SERIAL_MAX3100 is not set
885CONFIG_SERIAL_CORE=y 1205CONFIG_SERIAL_CORE=y
886CONFIG_SERIAL_CORE_CONSOLE=y 1206CONFIG_SERIAL_CORE_CONSOLE=y
887CONFIG_UNIX98_PTYS=y 1207CONFIG_UNIX98_PTYS=y
1208# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
888CONFIG_LEGACY_PTYS=y 1209CONFIG_LEGACY_PTYS=y
889CONFIG_LEGACY_PTY_COUNT=256 1210CONFIG_LEGACY_PTY_COUNT=256
890CONFIG_PRINTER=y 1211CONFIG_PRINTER=y
@@ -892,7 +1213,7 @@ CONFIG_PRINTER=y
892CONFIG_PPDEV=y 1213CONFIG_PPDEV=y
893# CONFIG_IPMI_HANDLER is not set 1214# CONFIG_IPMI_HANDLER is not set
894CONFIG_HW_RANDOM=y 1215CONFIG_HW_RANDOM=y
895# CONFIG_NVRAM is not set 1216# CONFIG_HW_RANDOM_TIMERIOMEM is not set
896# CONFIG_DTLK is not set 1217# CONFIG_DTLK is not set
897# CONFIG_R3964 is not set 1218# CONFIG_R3964 is not set
898# CONFIG_RAW_DRIVER is not set 1219# CONFIG_RAW_DRIVER is not set
@@ -901,33 +1222,44 @@ CONFIG_DEVPORT=y
901CONFIG_I2C=y 1222CONFIG_I2C=y
902CONFIG_I2C_BOARDINFO=y 1223CONFIG_I2C_BOARDINFO=y
903CONFIG_I2C_CHARDEV=m 1224CONFIG_I2C_CHARDEV=m
1225CONFIG_I2C_HELPER_AUTO=y
904CONFIG_I2C_ALGOBIT=y 1226CONFIG_I2C_ALGOBIT=y
905 1227
906# 1228#
907# I2C Hardware Bus support 1229# I2C Hardware Bus support
908# 1230#
909# CONFIG_I2C_ELEKTOR is not set 1231
1232#
1233# I2C system bus drivers (mostly embedded / system-on-chip)
1234#
910# CONFIG_I2C_GPIO is not set 1235# CONFIG_I2C_GPIO is not set
911# CONFIG_I2C_OCORES is not set 1236# CONFIG_I2C_OCORES is not set
912# CONFIG_I2C_PARPORT is not set
913# CONFIG_I2C_PARPORT_LIGHT is not set
914CONFIG_I2C_S3C2410=y 1237CONFIG_I2C_S3C2410=y
915CONFIG_I2C_SIMTEC=y 1238CONFIG_I2C_SIMTEC=y
1239
1240#
1241# External I2C/SMBus adapter drivers
1242#
1243# CONFIG_I2C_PARPORT is not set
1244# CONFIG_I2C_PARPORT_LIGHT is not set
916# CONFIG_I2C_TAOS_EVM is not set 1245# CONFIG_I2C_TAOS_EVM is not set
917# CONFIG_I2C_STUB is not set
918# CONFIG_I2C_TINY_USB is not set 1246# CONFIG_I2C_TINY_USB is not set
1247
1248#
1249# Other I2C/SMBus bus drivers
1250#
1251# CONFIG_I2C_ELEKTOR is not set
919# CONFIG_I2C_PCA_ISA is not set 1252# CONFIG_I2C_PCA_ISA is not set
920# CONFIG_I2C_PCA_PLATFORM is not set 1253# CONFIG_I2C_PCA_PLATFORM is not set
1254# CONFIG_I2C_STUB is not set
921 1255
922# 1256#
923# Miscellaneous I2C Chip support 1257# Miscellaneous I2C Chip support
924# 1258#
925# CONFIG_DS1682 is not set 1259# CONFIG_DS1682 is not set
926CONFIG_EEPROM_LEGACY=m
927# CONFIG_SENSORS_PCF8574 is not set 1260# CONFIG_SENSORS_PCF8574 is not set
928# CONFIG_PCF8575 is not set 1261# CONFIG_PCF8575 is not set
929# CONFIG_SENSORS_PCF8591 is not set 1262# CONFIG_SENSORS_PCA9539 is not set
930# CONFIG_TPS65010 is not set
931# CONFIG_SENSORS_MAX6875 is not set 1263# CONFIG_SENSORS_MAX6875 is not set
932# CONFIG_SENSORS_TSL2550 is not set 1264# CONFIG_SENSORS_TSL2550 is not set
933# CONFIG_I2C_DEBUG_CORE is not set 1265# CONFIG_I2C_DEBUG_CORE is not set
@@ -943,6 +1275,7 @@ CONFIG_SPI_MASTER=y
943# 1275#
944CONFIG_SPI_BITBANG=m 1276CONFIG_SPI_BITBANG=m
945# CONFIG_SPI_BUTTERFLY is not set 1277# CONFIG_SPI_BUTTERFLY is not set
1278CONFIG_SPI_GPIO=m
946# CONFIG_SPI_LM70_LLP is not set 1279# CONFIG_SPI_LM70_LLP is not set
947CONFIG_SPI_S3C24XX=m 1280CONFIG_SPI_S3C24XX=m
948CONFIG_SPI_S3C24XX_GPIO=m 1281CONFIG_SPI_S3C24XX_GPIO=m
@@ -950,44 +1283,56 @@ CONFIG_SPI_S3C24XX_GPIO=m
950# 1283#
951# SPI Protocol Masters 1284# SPI Protocol Masters
952# 1285#
953# CONFIG_EEPROM_AT25 is not set 1286CONFIG_SPI_SPIDEV=m
954# CONFIG_SPI_SPIDEV is not set 1287CONFIG_SPI_TLE62X0=m
955# CONFIG_SPI_TLE62X0 is not set 1288CONFIG_ARCH_REQUIRE_GPIOLIB=y
956CONFIG_HAVE_GPIO_LIB=y 1289CONFIG_GPIOLIB=y
1290# CONFIG_DEBUG_GPIO is not set
1291# CONFIG_GPIO_SYSFS is not set
957 1292
958# 1293#
959# GPIO Support 1294# Memory mapped GPIO expanders:
960# 1295#
961# CONFIG_DEBUG_GPIO is not set
962 1296
963# 1297#
964# I2C GPIO expanders: 1298# I2C GPIO expanders:
965# 1299#
1300# CONFIG_GPIO_MAX732X is not set
966# CONFIG_GPIO_PCA953X is not set 1301# CONFIG_GPIO_PCA953X is not set
967# CONFIG_GPIO_PCF857X is not set 1302# CONFIG_GPIO_PCF857X is not set
968 1303
969# 1304#
1305# PCI GPIO expanders:
1306#
1307
1308#
970# SPI GPIO expanders: 1309# SPI GPIO expanders:
971# 1310#
1311# CONFIG_GPIO_MAX7301 is not set
972# CONFIG_GPIO_MCP23S08 is not set 1312# CONFIG_GPIO_MCP23S08 is not set
973# CONFIG_W1 is not set 1313# CONFIG_W1 is not set
974# CONFIG_POWER_SUPPLY is not set 1314# CONFIG_POWER_SUPPLY is not set
975CONFIG_HWMON=y 1315CONFIG_HWMON=y
976CONFIG_HWMON_VID=m 1316CONFIG_HWMON_VID=m
1317# CONFIG_SENSORS_AD7414 is not set
977# CONFIG_SENSORS_AD7418 is not set 1318# CONFIG_SENSORS_AD7418 is not set
1319# CONFIG_SENSORS_ADCXX is not set
978# CONFIG_SENSORS_ADM1021 is not set 1320# CONFIG_SENSORS_ADM1021 is not set
979# CONFIG_SENSORS_ADM1025 is not set 1321# CONFIG_SENSORS_ADM1025 is not set
980# CONFIG_SENSORS_ADM1026 is not set 1322# CONFIG_SENSORS_ADM1026 is not set
981# CONFIG_SENSORS_ADM1029 is not set 1323# CONFIG_SENSORS_ADM1029 is not set
982# CONFIG_SENSORS_ADM1031 is not set 1324# CONFIG_SENSORS_ADM1031 is not set
983# CONFIG_SENSORS_ADM9240 is not set 1325# CONFIG_SENSORS_ADM9240 is not set
1326# CONFIG_SENSORS_ADT7462 is not set
984# CONFIG_SENSORS_ADT7470 is not set 1327# CONFIG_SENSORS_ADT7470 is not set
985# CONFIG_SENSORS_ADT7473 is not set 1328# CONFIG_SENSORS_ADT7473 is not set
1329# CONFIG_SENSORS_ADT7475 is not set
986# CONFIG_SENSORS_ATXP1 is not set 1330# CONFIG_SENSORS_ATXP1 is not set
987# CONFIG_SENSORS_DS1621 is not set 1331# CONFIG_SENSORS_DS1621 is not set
988# CONFIG_SENSORS_F71805F is not set 1332# CONFIG_SENSORS_F71805F is not set
989# CONFIG_SENSORS_F71882FG is not set 1333# CONFIG_SENSORS_F71882FG is not set
990# CONFIG_SENSORS_F75375S is not set 1334# CONFIG_SENSORS_F75375S is not set
1335# CONFIG_SENSORS_G760A is not set
991# CONFIG_SENSORS_GL518SM is not set 1336# CONFIG_SENSORS_GL518SM is not set
992# CONFIG_SENSORS_GL520SM is not set 1337# CONFIG_SENSORS_GL520SM is not set
993# CONFIG_SENSORS_IT87 is not set 1338# CONFIG_SENSORS_IT87 is not set
@@ -1003,10 +1348,16 @@ CONFIG_SENSORS_LM85=m
1003# CONFIG_SENSORS_LM90 is not set 1348# CONFIG_SENSORS_LM90 is not set
1004# CONFIG_SENSORS_LM92 is not set 1349# CONFIG_SENSORS_LM92 is not set
1005# CONFIG_SENSORS_LM93 is not set 1350# CONFIG_SENSORS_LM93 is not set
1351# CONFIG_SENSORS_LTC4215 is not set
1352# CONFIG_SENSORS_LTC4245 is not set
1353# CONFIG_SENSORS_LM95241 is not set
1354# CONFIG_SENSORS_MAX1111 is not set
1006# CONFIG_SENSORS_MAX1619 is not set 1355# CONFIG_SENSORS_MAX1619 is not set
1007# CONFIG_SENSORS_MAX6650 is not set 1356# CONFIG_SENSORS_MAX6650 is not set
1008# CONFIG_SENSORS_PC87360 is not set 1357# CONFIG_SENSORS_PC87360 is not set
1009# CONFIG_SENSORS_PC87427 is not set 1358# CONFIG_SENSORS_PC87427 is not set
1359# CONFIG_SENSORS_PCF8591 is not set
1360# CONFIG_SENSORS_SHT15 is not set
1010# CONFIG_SENSORS_DME1737 is not set 1361# CONFIG_SENSORS_DME1737 is not set
1011# CONFIG_SENSORS_SMSC47M1 is not set 1362# CONFIG_SENSORS_SMSC47M1 is not set
1012# CONFIG_SENSORS_SMSC47M192 is not set 1363# CONFIG_SENSORS_SMSC47M192 is not set
@@ -1022,7 +1373,10 @@ CONFIG_SENSORS_LM85=m
1022# CONFIG_SENSORS_W83L786NG is not set 1373# CONFIG_SENSORS_W83L786NG is not set
1023# CONFIG_SENSORS_W83627HF is not set 1374# CONFIG_SENSORS_W83627HF is not set
1024# CONFIG_SENSORS_W83627EHF is not set 1375# CONFIG_SENSORS_W83627EHF is not set
1376# CONFIG_SENSORS_LIS3_SPI is not set
1025# CONFIG_HWMON_DEBUG_CHIP is not set 1377# CONFIG_HWMON_DEBUG_CHIP is not set
1378# CONFIG_THERMAL is not set
1379# CONFIG_THERMAL_HWMON is not set
1026CONFIG_WATCHDOG=y 1380CONFIG_WATCHDOG=y
1027# CONFIG_WATCHDOG_NOWAYOUT is not set 1381# CONFIG_WATCHDOG_NOWAYOUT is not set
1028 1382
@@ -1043,20 +1397,33 @@ CONFIG_S3C2410_WATCHDOG=y
1043# USB-based Watchdog Cards 1397# USB-based Watchdog Cards
1044# 1398#
1045# CONFIG_USBPCWATCHDOG is not set 1399# CONFIG_USBPCWATCHDOG is not set
1400CONFIG_SSB_POSSIBLE=y
1046 1401
1047# 1402#
1048# Sonics Silicon Backplane 1403# Sonics Silicon Backplane
1049# 1404#
1050CONFIG_SSB_POSSIBLE=y
1051# CONFIG_SSB is not set 1405# CONFIG_SSB is not set
1052 1406
1053# 1407#
1054# Multifunction device drivers 1408# Multifunction device drivers
1055# 1409#
1410# CONFIG_MFD_CORE is not set
1056CONFIG_MFD_SM501=y 1411CONFIG_MFD_SM501=y
1412# CONFIG_MFD_SM501_GPIO is not set
1057# CONFIG_MFD_ASIC3 is not set 1413# CONFIG_MFD_ASIC3 is not set
1058# CONFIG_HTC_EGPIO is not set 1414# CONFIG_HTC_EGPIO is not set
1059# CONFIG_HTC_PASIC3 is not set 1415# CONFIG_HTC_PASIC3 is not set
1416# CONFIG_UCB1400_CORE is not set
1417# CONFIG_TPS65010 is not set
1418# CONFIG_TWL4030_CORE is not set
1419# CONFIG_MFD_TMIO is not set
1420# CONFIG_MFD_T7L66XB is not set
1421# CONFIG_MFD_TC6387XB is not set
1422# CONFIG_MFD_TC6393XB is not set
1423# CONFIG_PMIC_DA903X is not set
1424# CONFIG_MFD_WM8400 is not set
1425# CONFIG_MFD_WM8350_I2C is not set
1426# CONFIG_MFD_PCF50633 is not set
1060 1427
1061# 1428#
1062# Multimedia devices 1429# Multimedia devices
@@ -1065,14 +1432,189 @@ CONFIG_MFD_SM501=y
1065# 1432#
1066# Multimedia core support 1433# Multimedia core support
1067# 1434#
1068# CONFIG_VIDEO_DEV is not set 1435CONFIG_VIDEO_DEV=m
1069# CONFIG_DVB_CORE is not set 1436CONFIG_VIDEO_V4L2_COMMON=m
1070# CONFIG_VIDEO_MEDIA is not set 1437CONFIG_VIDEO_ALLOW_V4L1=y
1438CONFIG_VIDEO_V4L1_COMPAT=y
1439CONFIG_DVB_CORE=m
1440CONFIG_VIDEO_MEDIA=m
1071 1441
1072# 1442#
1073# Multimedia drivers 1443# Multimedia drivers
1074# 1444#
1075# CONFIG_DAB is not set 1445CONFIG_MEDIA_ATTACH=y
1446CONFIG_MEDIA_TUNER=m
1447# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
1448CONFIG_MEDIA_TUNER_SIMPLE=m
1449CONFIG_MEDIA_TUNER_TDA8290=m
1450CONFIG_MEDIA_TUNER_TDA827X=m
1451CONFIG_MEDIA_TUNER_TDA18271=m
1452CONFIG_MEDIA_TUNER_TDA9887=m
1453CONFIG_MEDIA_TUNER_TEA5761=m
1454CONFIG_MEDIA_TUNER_TEA5767=m
1455CONFIG_MEDIA_TUNER_MT20XX=m
1456CONFIG_MEDIA_TUNER_MT2060=m
1457CONFIG_MEDIA_TUNER_MT2266=m
1458CONFIG_MEDIA_TUNER_QT1010=m
1459CONFIG_MEDIA_TUNER_XC2028=m
1460CONFIG_MEDIA_TUNER_XC5000=m
1461CONFIG_MEDIA_TUNER_MXL5005S=m
1462CONFIG_MEDIA_TUNER_MXL5007T=m
1463CONFIG_MEDIA_TUNER_MC44S803=m
1464CONFIG_VIDEO_V4L2=m
1465CONFIG_VIDEO_V4L1=m
1466CONFIG_VIDEOBUF_GEN=m
1467CONFIG_VIDEOBUF_VMALLOC=m
1468CONFIG_VIDEO_TVEEPROM=m
1469CONFIG_VIDEO_CAPTURE_DRIVERS=y
1470# CONFIG_VIDEO_ADV_DEBUG is not set
1471# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
1472CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
1473CONFIG_VIDEO_VIVI=m
1474CONFIG_VIDEO_PMS=m
1475CONFIG_VIDEO_BWQCAM=m
1476CONFIG_VIDEO_CQCAM=m
1477CONFIG_VIDEO_W9966=m
1478CONFIG_VIDEO_CPIA=m
1479CONFIG_VIDEO_CPIA_PP=m
1480CONFIG_VIDEO_CPIA_USB=m
1481CONFIG_VIDEO_CPIA2=m
1482CONFIG_VIDEO_SAA5246A=m
1483CONFIG_VIDEO_SAA5249=m
1484CONFIG_VIDEO_AU0828=m
1485# CONFIG_SOC_CAMERA is not set
1486CONFIG_V4L_USB_DRIVERS=y
1487# CONFIG_USB_VIDEO_CLASS is not set
1488CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
1489CONFIG_USB_GSPCA=m
1490# CONFIG_USB_M5602 is not set
1491# CONFIG_USB_STV06XX is not set
1492# CONFIG_USB_GSPCA_CONEX is not set
1493# CONFIG_USB_GSPCA_ETOMS is not set
1494# CONFIG_USB_GSPCA_FINEPIX is not set
1495# CONFIG_USB_GSPCA_MARS is not set
1496# CONFIG_USB_GSPCA_MR97310A is not set
1497# CONFIG_USB_GSPCA_OV519 is not set
1498# CONFIG_USB_GSPCA_OV534 is not set
1499# CONFIG_USB_GSPCA_PAC207 is not set
1500# CONFIG_USB_GSPCA_PAC7311 is not set
1501# CONFIG_USB_GSPCA_SONIXB is not set
1502# CONFIG_USB_GSPCA_SONIXJ is not set
1503# CONFIG_USB_GSPCA_SPCA500 is not set
1504# CONFIG_USB_GSPCA_SPCA501 is not set
1505# CONFIG_USB_GSPCA_SPCA505 is not set
1506# CONFIG_USB_GSPCA_SPCA506 is not set
1507# CONFIG_USB_GSPCA_SPCA508 is not set
1508# CONFIG_USB_GSPCA_SPCA561 is not set
1509# CONFIG_USB_GSPCA_SQ905 is not set
1510# CONFIG_USB_GSPCA_SQ905C is not set
1511# CONFIG_USB_GSPCA_STK014 is not set
1512# CONFIG_USB_GSPCA_SUNPLUS is not set
1513# CONFIG_USB_GSPCA_T613 is not set
1514# CONFIG_USB_GSPCA_TV8532 is not set
1515# CONFIG_USB_GSPCA_VC032X is not set
1516# CONFIG_USB_GSPCA_ZC3XX is not set
1517# CONFIG_VIDEO_PVRUSB2 is not set
1518# CONFIG_VIDEO_HDPVR is not set
1519# CONFIG_VIDEO_EM28XX is not set
1520# CONFIG_VIDEO_CX231XX is not set
1521# CONFIG_VIDEO_USBVISION is not set
1522# CONFIG_USB_VICAM is not set
1523# CONFIG_USB_IBMCAM is not set
1524# CONFIG_USB_KONICAWC is not set
1525# CONFIG_USB_QUICKCAM_MESSENGER is not set
1526# CONFIG_USB_ET61X251 is not set
1527# CONFIG_VIDEO_OVCAMCHIP is not set
1528# CONFIG_USB_OV511 is not set
1529# CONFIG_USB_SE401 is not set
1530# CONFIG_USB_SN9C102 is not set
1531# CONFIG_USB_STV680 is not set
1532# CONFIG_USB_ZC0301 is not set
1533# CONFIG_USB_PWC is not set
1534CONFIG_USB_PWC_INPUT_EVDEV=y
1535# CONFIG_USB_ZR364XX is not set
1536# CONFIG_USB_STKWEBCAM is not set
1537# CONFIG_USB_S2255 is not set
1538CONFIG_RADIO_ADAPTERS=y
1539CONFIG_RADIO_CADET=m
1540CONFIG_RADIO_RTRACK=m
1541CONFIG_RADIO_RTRACK2=m
1542CONFIG_RADIO_AZTECH=m
1543CONFIG_RADIO_GEMTEK=m
1544CONFIG_RADIO_SF16FMI=m
1545CONFIG_RADIO_SF16FMR2=m
1546CONFIG_RADIO_TERRATEC=m
1547CONFIG_RADIO_TRUST=m
1548CONFIG_RADIO_TYPHOON=m
1549CONFIG_RADIO_TYPHOON_PROC_FS=y
1550CONFIG_RADIO_ZOLTRIX=m
1551CONFIG_USB_DSBR=m
1552CONFIG_USB_SI470X=m
1553CONFIG_USB_MR800=m
1554CONFIG_RADIO_TEA5764=m
1555CONFIG_DVB_DYNAMIC_MINORS=y
1556CONFIG_DVB_CAPTURE_DRIVERS=y
1557# CONFIG_TTPCI_EEPROM is not set
1558
1559#
1560# Supported USB Adapters
1561#
1562CONFIG_DVB_USB=m
1563# CONFIG_DVB_USB_DEBUG is not set
1564# CONFIG_DVB_USB_A800 is not set
1565CONFIG_DVB_USB_DIBUSB_MB=m
1566# CONFIG_DVB_USB_DIBUSB_MB_FAULTY is not set
1567CONFIG_DVB_USB_DIBUSB_MC=m
1568CONFIG_DVB_USB_DIB0700=m
1569CONFIG_DVB_USB_UMT_010=m
1570CONFIG_DVB_USB_CXUSB=m
1571CONFIG_DVB_USB_M920X=m
1572# CONFIG_DVB_USB_GL861 is not set
1573# CONFIG_DVB_USB_AU6610 is not set
1574# CONFIG_DVB_USB_DIGITV is not set
1575# CONFIG_DVB_USB_VP7045 is not set
1576# CONFIG_DVB_USB_VP702X is not set
1577# CONFIG_DVB_USB_GP8PSK is not set
1578# CONFIG_DVB_USB_NOVA_T_USB2 is not set
1579# CONFIG_DVB_USB_TTUSB2 is not set
1580# CONFIG_DVB_USB_DTT200U is not set
1581# CONFIG_DVB_USB_OPERA1 is not set
1582CONFIG_DVB_USB_AF9005=m
1583# CONFIG_DVB_USB_AF9005_REMOTE is not set
1584# CONFIG_DVB_USB_DW2102 is not set
1585# CONFIG_DVB_USB_CINERGY_T2 is not set
1586# CONFIG_DVB_USB_ANYSEE is not set
1587# CONFIG_DVB_USB_DTV5100 is not set
1588# CONFIG_DVB_USB_AF9015 is not set
1589# CONFIG_DVB_USB_CE6230 is not set
1590# CONFIG_DVB_SIANO_SMS1XXX is not set
1591
1592#
1593# Supported FlexCopII (B2C2) Adapters
1594#
1595# CONFIG_DVB_B2C2_FLEXCOP is not set
1596
1597#
1598# Supported DVB Frontends
1599#
1600# CONFIG_DVB_FE_CUSTOMISE is not set
1601CONFIG_DVB_CX22702=m
1602CONFIG_DVB_TDA1004X=m
1603CONFIG_DVB_MT352=m
1604CONFIG_DVB_ZL10353=m
1605CONFIG_DVB_DIB3000MB=m
1606CONFIG_DVB_DIB3000MC=m
1607CONFIG_DVB_DIB7000M=m
1608CONFIG_DVB_DIB7000P=m
1609CONFIG_DVB_LGDT330X=m
1610CONFIG_DVB_LGDT3305=m
1611CONFIG_DVB_AU8522=m
1612CONFIG_DVB_S5H1411=m
1613CONFIG_DVB_PLL=m
1614CONFIG_DVB_TUNER_DIB0070=m
1615CONFIG_DVB_LGS8GL5=m
1616CONFIG_DAB=y
1617CONFIG_USB_DABUSB=m
1076 1618
1077# 1619#
1078# Graphics support 1620# Graphics support
@@ -1082,6 +1624,7 @@ CONFIG_MFD_SM501=y
1082CONFIG_FB=y 1624CONFIG_FB=y
1083CONFIG_FIRMWARE_EDID=y 1625CONFIG_FIRMWARE_EDID=y
1084# CONFIG_FB_DDC is not set 1626# CONFIG_FB_DDC is not set
1627# CONFIG_FB_BOOT_VESA_SUPPORT is not set
1085CONFIG_FB_CFB_FILLRECT=y 1628CONFIG_FB_CFB_FILLRECT=y
1086CONFIG_FB_CFB_COPYAREA=y 1629CONFIG_FB_CFB_COPYAREA=y
1087CONFIG_FB_CFB_IMAGEBLIT=y 1630CONFIG_FB_CFB_IMAGEBLIT=y
@@ -1105,7 +1648,19 @@ CONFIG_FB_S3C2410=y
1105# CONFIG_FB_S3C2410_DEBUG is not set 1648# CONFIG_FB_S3C2410_DEBUG is not set
1106CONFIG_FB_SM501=y 1649CONFIG_FB_SM501=y
1107# CONFIG_FB_VIRTUAL is not set 1650# CONFIG_FB_VIRTUAL is not set
1108# CONFIG_BACKLIGHT_LCD_SUPPORT is not set 1651# CONFIG_FB_METRONOME is not set
1652# CONFIG_FB_MB862XX is not set
1653# CONFIG_FB_BROADSHEET is not set
1654CONFIG_BACKLIGHT_LCD_SUPPORT=y
1655CONFIG_LCD_CLASS_DEVICE=m
1656# CONFIG_LCD_LTV350QV is not set
1657# CONFIG_LCD_ILI9320 is not set
1658# CONFIG_LCD_TDO24M is not set
1659# CONFIG_LCD_VGG2432A4 is not set
1660# CONFIG_LCD_PLATFORM is not set
1661CONFIG_BACKLIGHT_CLASS_DEVICE=m
1662CONFIG_BACKLIGHT_GENERIC=m
1663CONFIG_BACKLIGHT_PWM=m
1109 1664
1110# 1665#
1111# Display device support 1666# Display device support
@@ -1125,11 +1680,54 @@ CONFIG_FRAMEBUFFER_CONSOLE=y
1125CONFIG_FONT_8x8=y 1680CONFIG_FONT_8x8=y
1126CONFIG_FONT_8x16=y 1681CONFIG_FONT_8x16=y
1127# CONFIG_LOGO is not set 1682# CONFIG_LOGO is not set
1128 1683CONFIG_SOUND=y
1129# 1684CONFIG_SOUND_OSS_CORE=y
1130# Sound 1685CONFIG_SND=y
1131# 1686CONFIG_SND_TIMER=y
1132# CONFIG_SOUND is not set 1687CONFIG_SND_PCM=y
1688CONFIG_SND_HWDEP=m
1689CONFIG_SND_RAWMIDI=m
1690CONFIG_SND_JACK=y
1691CONFIG_SND_SEQUENCER=m
1692# CONFIG_SND_SEQ_DUMMY is not set
1693CONFIG_SND_OSSEMUL=y
1694CONFIG_SND_MIXER_OSS=m
1695CONFIG_SND_PCM_OSS=m
1696CONFIG_SND_PCM_OSS_PLUGINS=y
1697CONFIG_SND_SEQUENCER_OSS=y
1698# CONFIG_SND_DYNAMIC_MINORS is not set
1699CONFIG_SND_SUPPORT_OLD_API=y
1700CONFIG_SND_VERBOSE_PROCFS=y
1701CONFIG_SND_VERBOSE_PRINTK=y
1702# CONFIG_SND_DEBUG is not set
1703CONFIG_SND_VMASTER=y
1704CONFIG_SND_AC97_CODEC=m
1705# CONFIG_SND_DRIVERS is not set
1706# CONFIG_SND_ARM is not set
1707# CONFIG_SND_SPI is not set
1708CONFIG_SND_USB=y
1709CONFIG_SND_USB_AUDIO=m
1710CONFIG_SND_USB_CAIAQ=m
1711# CONFIG_SND_USB_CAIAQ_INPUT is not set
1712CONFIG_SND_SOC=y
1713CONFIG_SND_SOC_AC97_BUS=y
1714CONFIG_SND_S3C24XX_SOC=y
1715CONFIG_SND_S3C24XX_SOC_I2S=m
1716CONFIG_SND_S3C_I2SV2_SOC=m
1717CONFIG_SND_S3C2412_SOC_I2S=m
1718CONFIG_SND_S3C2443_SOC_AC97=m
1719CONFIG_SND_S3C24XX_SOC_JIVE_WM8750=m
1720CONFIG_SND_S3C24XX_SOC_SMDK2443_WM9710=m
1721CONFIG_SND_S3C24XX_SOC_LN2440SBC_ALC650=m
1722CONFIG_SND_S3C24XX_SOC_S3C24XX_UDA134X=m
1723CONFIG_SND_SOC_I2C_AND_SPI=y
1724# CONFIG_SND_SOC_ALL_CODECS is not set
1725CONFIG_SND_SOC_AC97_CODEC=m
1726CONFIG_SND_SOC_L3=m
1727CONFIG_SND_SOC_UDA134X=m
1728CONFIG_SND_SOC_WM8750=m
1729# CONFIG_SOUND_PRIME is not set
1730CONFIG_AC97_BUS=y
1133CONFIG_HID_SUPPORT=y 1731CONFIG_HID_SUPPORT=y
1134CONFIG_HID=y 1732CONFIG_HID=y
1135# CONFIG_HID_DEBUG is not set 1733# CONFIG_HID_DEBUG is not set
@@ -1139,12 +1737,12 @@ CONFIG_HID=y
1139# USB Input Devices 1737# USB Input Devices
1140# 1738#
1141# CONFIG_USB_HID is not set 1739# CONFIG_USB_HID is not set
1740# CONFIG_HID_PID is not set
1142 1741
1143# 1742#
1144# USB HID Boot Protocol drivers 1743# Special HID drivers
1145# 1744#
1146# CONFIG_USB_KBD is not set 1745CONFIG_HID_APPLE=m
1147# CONFIG_USB_MOUSE is not set
1148CONFIG_USB_SUPPORT=y 1746CONFIG_USB_SUPPORT=y
1149CONFIG_USB_ARCH_HAS_HCD=y 1747CONFIG_USB_ARCH_HAS_HCD=y
1150CONFIG_USB_ARCH_HAS_OHCI=y 1748CONFIG_USB_ARCH_HAS_OHCI=y
@@ -1161,19 +1759,26 @@ CONFIG_USB_DEVICE_CLASS=y
1161# CONFIG_USB_DYNAMIC_MINORS is not set 1759# CONFIG_USB_DYNAMIC_MINORS is not set
1162# CONFIG_USB_SUSPEND is not set 1760# CONFIG_USB_SUSPEND is not set
1163# CONFIG_USB_OTG is not set 1761# CONFIG_USB_OTG is not set
1762CONFIG_USB_MON=y
1763# CONFIG_USB_WUSB is not set
1764# CONFIG_USB_WUSB_CBAF is not set
1164 1765
1165# 1766#
1166# USB Host Controller Drivers 1767# USB Host Controller Drivers
1167# 1768#
1168# CONFIG_USB_C67X00_HCD is not set 1769# CONFIG_USB_C67X00_HCD is not set
1770# CONFIG_USB_OXU210HP_HCD is not set
1169# CONFIG_USB_ISP116X_HCD is not set 1771# CONFIG_USB_ISP116X_HCD is not set
1170# CONFIG_USB_ISP1760_HCD is not set 1772# CONFIG_USB_ISP1760_HCD is not set
1171CONFIG_USB_OHCI_HCD=y 1773CONFIG_USB_OHCI_HCD=y
1172# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set 1774# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
1173# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set 1775# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
1174CONFIG_USB_OHCI_LITTLE_ENDIAN=y 1776CONFIG_USB_OHCI_LITTLE_ENDIAN=y
1777# CONFIG_USB_U132_HCD is not set
1175# CONFIG_USB_SL811_HCD is not set 1778# CONFIG_USB_SL811_HCD is not set
1176# CONFIG_USB_R8A66597_HCD is not set 1779# CONFIG_USB_R8A66597_HCD is not set
1780# CONFIG_USB_HWA_HCD is not set
1781# CONFIG_USB_MUSB_HDRC is not set
1177 1782
1178# 1783#
1179# USB Device Class drivers 1784# USB Device Class drivers
@@ -1181,53 +1786,51 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y
1181CONFIG_USB_ACM=m 1786CONFIG_USB_ACM=m
1182CONFIG_USB_PRINTER=m 1787CONFIG_USB_PRINTER=m
1183CONFIG_USB_WDM=m 1788CONFIG_USB_WDM=m
1789# CONFIG_USB_TMC is not set
1184 1790
1185# 1791#
1186# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' 1792# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
1187# 1793#
1188 1794
1189# 1795#
1190# may also be needed; see USB_STORAGE Help for more information 1796# also be needed; see USB_STORAGE Help for more info
1191# 1797#
1192CONFIG_USB_STORAGE=m 1798CONFIG_USB_STORAGE=m
1193# CONFIG_USB_STORAGE_DEBUG is not set 1799# CONFIG_USB_STORAGE_DEBUG is not set
1194# CONFIG_USB_STORAGE_DATAFAB is not set 1800CONFIG_USB_STORAGE_DATAFAB=m
1195# CONFIG_USB_STORAGE_FREECOM is not set 1801CONFIG_USB_STORAGE_FREECOM=m
1196# CONFIG_USB_STORAGE_ISD200 is not set 1802CONFIG_USB_STORAGE_ISD200=m
1197# CONFIG_USB_STORAGE_DPCM is not set 1803CONFIG_USB_STORAGE_USBAT=m
1198# CONFIG_USB_STORAGE_USBAT is not set 1804CONFIG_USB_STORAGE_SDDR09=m
1199# CONFIG_USB_STORAGE_SDDR09 is not set 1805CONFIG_USB_STORAGE_SDDR55=m
1200# CONFIG_USB_STORAGE_SDDR55 is not set 1806CONFIG_USB_STORAGE_JUMPSHOT=m
1201# CONFIG_USB_STORAGE_JUMPSHOT is not set 1807CONFIG_USB_STORAGE_ALAUDA=m
1202# CONFIG_USB_STORAGE_ALAUDA is not set 1808CONFIG_USB_STORAGE_ONETOUCH=m
1203# CONFIG_USB_STORAGE_ONETOUCH is not set 1809CONFIG_USB_STORAGE_KARMA=m
1204# CONFIG_USB_STORAGE_KARMA is not set 1810CONFIG_USB_STORAGE_CYPRESS_ATACB=m
1205# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
1206CONFIG_USB_LIBUSUAL=y 1811CONFIG_USB_LIBUSUAL=y
1207 1812
1208# 1813#
1209# USB Imaging devices 1814# USB Imaging devices
1210# 1815#
1211# CONFIG_USB_MDC800 is not set 1816CONFIG_USB_MDC800=m
1212# CONFIG_USB_MICROTEK is not set 1817CONFIG_USB_MICROTEK=m
1213CONFIG_USB_MON=y
1214 1818
1215# 1819#
1216# USB port drivers 1820# USB port drivers
1217# 1821#
1218# CONFIG_USB_USS720 is not set 1822CONFIG_USB_USS720=m
1219CONFIG_USB_SERIAL=y 1823CONFIG_USB_SERIAL=y
1220# CONFIG_USB_SERIAL_CONSOLE is not set 1824# CONFIG_USB_SERIAL_CONSOLE is not set
1221# CONFIG_USB_EZUSB is not set 1825# CONFIG_USB_EZUSB is not set
1222CONFIG_USB_SERIAL_GENERIC=y 1826CONFIG_USB_SERIAL_GENERIC=y
1223# CONFIG_USB_SERIAL_AIRCABLE is not set 1827# CONFIG_USB_SERIAL_AIRCABLE is not set
1224# CONFIG_USB_SERIAL_AIRPRIME is not set
1225# CONFIG_USB_SERIAL_ARK3116 is not set 1828# CONFIG_USB_SERIAL_ARK3116 is not set
1226# CONFIG_USB_SERIAL_BELKIN is not set 1829# CONFIG_USB_SERIAL_BELKIN is not set
1227# CONFIG_USB_SERIAL_CH341 is not set 1830# CONFIG_USB_SERIAL_CH341 is not set
1228# CONFIG_USB_SERIAL_WHITEHEAT is not set 1831# CONFIG_USB_SERIAL_WHITEHEAT is not set
1229# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set 1832# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
1230# CONFIG_USB_SERIAL_CP2101 is not set 1833# CONFIG_USB_SERIAL_CP210X is not set
1231# CONFIG_USB_SERIAL_CYPRESS_M8 is not set 1834# CONFIG_USB_SERIAL_CYPRESS_M8 is not set
1232# CONFIG_USB_SERIAL_EMPEG is not set 1835# CONFIG_USB_SERIAL_EMPEG is not set
1233CONFIG_USB_SERIAL_FTDI_SIO=y 1836CONFIG_USB_SERIAL_FTDI_SIO=y
@@ -1251,42 +1854,71 @@ CONFIG_USB_SERIAL_FTDI_SIO=y
1251CONFIG_USB_SERIAL_NAVMAN=m 1854CONFIG_USB_SERIAL_NAVMAN=m
1252CONFIG_USB_SERIAL_PL2303=y 1855CONFIG_USB_SERIAL_PL2303=y
1253# CONFIG_USB_SERIAL_OTI6858 is not set 1856# CONFIG_USB_SERIAL_OTI6858 is not set
1857# CONFIG_USB_SERIAL_QUALCOMM is not set
1254# CONFIG_USB_SERIAL_SPCP8X5 is not set 1858# CONFIG_USB_SERIAL_SPCP8X5 is not set
1255# CONFIG_USB_SERIAL_HP4X is not set 1859# CONFIG_USB_SERIAL_HP4X is not set
1256# CONFIG_USB_SERIAL_SAFE is not set 1860# CONFIG_USB_SERIAL_SAFE is not set
1861# CONFIG_USB_SERIAL_SIEMENS_MPI is not set
1257# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set 1862# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set
1863# CONFIG_USB_SERIAL_SYMBOL is not set
1258# CONFIG_USB_SERIAL_TI is not set 1864# CONFIG_USB_SERIAL_TI is not set
1259# CONFIG_USB_SERIAL_CYBERJACK is not set 1865# CONFIG_USB_SERIAL_CYBERJACK is not set
1260# CONFIG_USB_SERIAL_XIRCOM is not set 1866# CONFIG_USB_SERIAL_XIRCOM is not set
1261CONFIG_USB_SERIAL_OPTION=m 1867CONFIG_USB_SERIAL_OPTION=m
1262# CONFIG_USB_SERIAL_OMNINET is not set 1868# CONFIG_USB_SERIAL_OMNINET is not set
1869# CONFIG_USB_SERIAL_OPTICON is not set
1263# CONFIG_USB_SERIAL_DEBUG is not set 1870# CONFIG_USB_SERIAL_DEBUG is not set
1264 1871
1265# 1872#
1266# USB Miscellaneous drivers 1873# USB Miscellaneous drivers
1267# 1874#
1268# CONFIG_USB_EMI62 is not set 1875CONFIG_USB_EMI62=m
1269# CONFIG_USB_EMI26 is not set 1876CONFIG_USB_EMI26=m
1270# CONFIG_USB_ADUTUX is not set 1877CONFIG_USB_ADUTUX=m
1271# CONFIG_USB_AUERSWALD is not set 1878CONFIG_USB_SEVSEG=m
1272# CONFIG_USB_RIO500 is not set 1879CONFIG_USB_RIO500=m
1273# CONFIG_USB_LEGOTOWER is not set 1880CONFIG_USB_LEGOTOWER=m
1274# CONFIG_USB_LCD is not set 1881CONFIG_USB_LCD=m
1275# CONFIG_USB_BERRY_CHARGE is not set 1882CONFIG_USB_BERRY_CHARGE=m
1276CONFIG_USB_LED=m 1883CONFIG_USB_LED=m
1277# CONFIG_USB_CYPRESS_CY7C63 is not set 1884CONFIG_USB_CYPRESS_CY7C63=m
1278# CONFIG_USB_CYTHERM is not set 1885CONFIG_USB_CYTHERM=m
1279# CONFIG_USB_PHIDGET is not set 1886CONFIG_USB_IDMOUSE=m
1280# CONFIG_USB_IDMOUSE is not set 1887CONFIG_USB_FTDI_ELAN=m
1281# CONFIG_USB_FTDI_ELAN is not set 1888CONFIG_USB_APPLEDISPLAY=m
1282# CONFIG_USB_APPLEDISPLAY is not set
1283CONFIG_USB_LD=m 1889CONFIG_USB_LD=m
1284# CONFIG_USB_TRANCEVIBRATOR is not set 1890CONFIG_USB_TRANCEVIBRATOR=m
1285# CONFIG_USB_IOWARRIOR is not set 1891CONFIG_USB_IOWARRIOR=m
1286# CONFIG_USB_TEST is not set 1892CONFIG_USB_TEST=m
1287# CONFIG_USB_ISIGHTFW is not set 1893# CONFIG_USB_ISIGHTFW is not set
1894# CONFIG_USB_VST is not set
1288# CONFIG_USB_GADGET is not set 1895# CONFIG_USB_GADGET is not set
1289# CONFIG_MMC is not set 1896
1897#
1898# OTG and related infrastructure
1899#
1900# CONFIG_USB_GPIO_VBUS is not set
1901# CONFIG_NOP_USB_XCEIV is not set
1902CONFIG_MMC=y
1903# CONFIG_MMC_DEBUG is not set
1904# CONFIG_MMC_UNSAFE_RESUME is not set
1905
1906#
1907# MMC/SD/SDIO Card Drivers
1908#
1909CONFIG_MMC_BLOCK=y
1910CONFIG_MMC_BLOCK_BOUNCE=y
1911CONFIG_SDIO_UART=m
1912CONFIG_MMC_TEST=m
1913
1914#
1915# MMC/SD/SDIO Host Controller Drivers
1916#
1917CONFIG_MMC_SDHCI=m
1918CONFIG_MMC_SPI=m
1919CONFIG_MMC_S3C=y
1920# CONFIG_MEMSTICK is not set
1921# CONFIG_ACCESSIBILITY is not set
1290CONFIG_NEW_LEDS=y 1922CONFIG_NEW_LEDS=y
1291CONFIG_LEDS_CLASS=m 1923CONFIG_LEDS_CLASS=m
1292 1924
@@ -1295,7 +1927,14 @@ CONFIG_LEDS_CLASS=m
1295# 1927#
1296CONFIG_LEDS_S3C24XX=m 1928CONFIG_LEDS_S3C24XX=m
1297CONFIG_LEDS_H1940=m 1929CONFIG_LEDS_H1940=m
1298# CONFIG_LEDS_GPIO is not set 1930CONFIG_LEDS_PCA9532=m
1931CONFIG_LEDS_GPIO=m
1932CONFIG_LEDS_GPIO_PLATFORM=y
1933CONFIG_LEDS_LP5521=m
1934CONFIG_LEDS_PCA955X=m
1935CONFIG_LEDS_DAC124S085=m
1936CONFIG_LEDS_PWM=m
1937CONFIG_LEDS_BD2802=m
1299 1938
1300# 1939#
1301# LED Triggers 1940# LED Triggers
@@ -1304,7 +1943,13 @@ CONFIG_LEDS_TRIGGERS=y
1304CONFIG_LEDS_TRIGGER_TIMER=m 1943CONFIG_LEDS_TRIGGER_TIMER=m
1305# CONFIG_LEDS_TRIGGER_IDE_DISK is not set 1944# CONFIG_LEDS_TRIGGER_IDE_DISK is not set
1306CONFIG_LEDS_TRIGGER_HEARTBEAT=m 1945CONFIG_LEDS_TRIGGER_HEARTBEAT=m
1307# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set 1946CONFIG_LEDS_TRIGGER_BACKLIGHT=m
1947CONFIG_LEDS_TRIGGER_GPIO=m
1948CONFIG_LEDS_TRIGGER_DEFAULT_ON=m
1949
1950#
1951# iptables trigger is under Netfilter config (LED target)
1952#
1308CONFIG_RTC_LIB=y 1953CONFIG_RTC_LIB=y
1309CONFIG_RTC_CLASS=y 1954CONFIG_RTC_CLASS=y
1310CONFIG_RTC_HCTOSYS=y 1955CONFIG_RTC_HCTOSYS=y
@@ -1335,31 +1980,43 @@ CONFIG_RTC_INTF_DEV=y
1335# CONFIG_RTC_DRV_M41T80 is not set 1980# CONFIG_RTC_DRV_M41T80 is not set
1336# CONFIG_RTC_DRV_S35390A is not set 1981# CONFIG_RTC_DRV_S35390A is not set
1337# CONFIG_RTC_DRV_FM3130 is not set 1982# CONFIG_RTC_DRV_FM3130 is not set
1983# CONFIG_RTC_DRV_RX8581 is not set
1338 1984
1339# 1985#
1340# SPI RTC drivers 1986# SPI RTC drivers
1341# 1987#
1988# CONFIG_RTC_DRV_M41T94 is not set
1989# CONFIG_RTC_DRV_DS1305 is not set
1990# CONFIG_RTC_DRV_DS1390 is not set
1342# CONFIG_RTC_DRV_MAX6902 is not set 1991# CONFIG_RTC_DRV_MAX6902 is not set
1343# CONFIG_RTC_DRV_R9701 is not set 1992# CONFIG_RTC_DRV_R9701 is not set
1344# CONFIG_RTC_DRV_RS5C348 is not set 1993# CONFIG_RTC_DRV_RS5C348 is not set
1994# CONFIG_RTC_DRV_DS3234 is not set
1345 1995
1346# 1996#
1347# Platform RTC drivers 1997# Platform RTC drivers
1348# 1998#
1349# CONFIG_RTC_DRV_CMOS is not set 1999# CONFIG_RTC_DRV_CMOS is not set
2000# CONFIG_RTC_DRV_DS1286 is not set
1350# CONFIG_RTC_DRV_DS1511 is not set 2001# CONFIG_RTC_DRV_DS1511 is not set
1351# CONFIG_RTC_DRV_DS1553 is not set 2002# CONFIG_RTC_DRV_DS1553 is not set
1352# CONFIG_RTC_DRV_DS1742 is not set 2003# CONFIG_RTC_DRV_DS1742 is not set
1353# CONFIG_RTC_DRV_STK17TA8 is not set 2004# CONFIG_RTC_DRV_STK17TA8 is not set
1354# CONFIG_RTC_DRV_M48T86 is not set 2005# CONFIG_RTC_DRV_M48T86 is not set
2006# CONFIG_RTC_DRV_M48T35 is not set
1355# CONFIG_RTC_DRV_M48T59 is not set 2007# CONFIG_RTC_DRV_M48T59 is not set
2008# CONFIG_RTC_DRV_BQ4802 is not set
1356# CONFIG_RTC_DRV_V3020 is not set 2009# CONFIG_RTC_DRV_V3020 is not set
1357 2010
1358# 2011#
1359# on-CPU RTC drivers 2012# on-CPU RTC drivers
1360# 2013#
1361CONFIG_RTC_DRV_S3C=y 2014CONFIG_RTC_DRV_S3C=y
2015# CONFIG_DMADEVICES is not set
2016# CONFIG_AUXDISPLAY is not set
2017# CONFIG_REGULATOR is not set
1362# CONFIG_UIO is not set 2018# CONFIG_UIO is not set
2019# CONFIG_STAGING is not set
1363 2020
1364# 2021#
1365# File systems 2022# File systems
@@ -1370,27 +2027,40 @@ CONFIG_EXT2_FS_POSIX_ACL=y
1370CONFIG_EXT2_FS_SECURITY=y 2027CONFIG_EXT2_FS_SECURITY=y
1371# CONFIG_EXT2_FS_XIP is not set 2028# CONFIG_EXT2_FS_XIP is not set
1372CONFIG_EXT3_FS=y 2029CONFIG_EXT3_FS=y
2030# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
1373CONFIG_EXT3_FS_XATTR=y 2031CONFIG_EXT3_FS_XATTR=y
1374CONFIG_EXT3_FS_POSIX_ACL=y 2032CONFIG_EXT3_FS_POSIX_ACL=y
1375# CONFIG_EXT3_FS_SECURITY is not set 2033# CONFIG_EXT3_FS_SECURITY is not set
1376# CONFIG_EXT4DEV_FS is not set 2034CONFIG_EXT4_FS=m
2035# CONFIG_EXT4DEV_COMPAT is not set
2036CONFIG_EXT4_FS_XATTR=y
2037CONFIG_EXT4_FS_POSIX_ACL=y
2038# CONFIG_EXT4_FS_SECURITY is not set
1377CONFIG_JBD=y 2039CONFIG_JBD=y
2040CONFIG_JBD2=m
1378CONFIG_FS_MBCACHE=y 2041CONFIG_FS_MBCACHE=y
1379# CONFIG_REISERFS_FS is not set 2042# CONFIG_REISERFS_FS is not set
1380# CONFIG_JFS_FS is not set 2043# CONFIG_JFS_FS is not set
1381CONFIG_FS_POSIX_ACL=y 2044CONFIG_FS_POSIX_ACL=y
2045CONFIG_FILE_LOCKING=y
1382# CONFIG_XFS_FS is not set 2046# CONFIG_XFS_FS is not set
1383# CONFIG_OCFS2_FS is not set 2047# CONFIG_OCFS2_FS is not set
2048# CONFIG_BTRFS_FS is not set
1384CONFIG_DNOTIFY=y 2049CONFIG_DNOTIFY=y
1385CONFIG_INOTIFY=y 2050CONFIG_INOTIFY=y
1386CONFIG_INOTIFY_USER=y 2051CONFIG_INOTIFY_USER=y
1387# CONFIG_QUOTA is not set 2052# CONFIG_QUOTA is not set
1388# CONFIG_AUTOFS_FS is not set 2053CONFIG_AUTOFS_FS=m
1389# CONFIG_AUTOFS4_FS is not set 2054CONFIG_AUTOFS4_FS=m
1390# CONFIG_FUSE_FS is not set 2055CONFIG_FUSE_FS=m
1391CONFIG_GENERIC_ACL=y 2056CONFIG_GENERIC_ACL=y
1392 2057
1393# 2058#
2059# Caches
2060#
2061# CONFIG_FSCACHE is not set
2062
2063#
1394# CD-ROM/DVD Filesystems 2064# CD-ROM/DVD Filesystems
1395# 2065#
1396CONFIG_ISO9660_FS=y 2066CONFIG_ISO9660_FS=y
@@ -1416,15 +2086,13 @@ CONFIG_NTFS_FS=m
1416# 2086#
1417CONFIG_PROC_FS=y 2087CONFIG_PROC_FS=y
1418CONFIG_PROC_SYSCTL=y 2088CONFIG_PROC_SYSCTL=y
2089CONFIG_PROC_PAGE_MONITOR=y
1419CONFIG_SYSFS=y 2090CONFIG_SYSFS=y
1420CONFIG_TMPFS=y 2091CONFIG_TMPFS=y
1421CONFIG_TMPFS_POSIX_ACL=y 2092CONFIG_TMPFS_POSIX_ACL=y
1422# CONFIG_HUGETLB_PAGE is not set 2093# CONFIG_HUGETLB_PAGE is not set
1423CONFIG_CONFIGFS_FS=m 2094CONFIG_CONFIGFS_FS=m
1424 2095CONFIG_MISC_FILESYSTEMS=y
1425#
1426# Miscellaneous filesystems
1427#
1428# CONFIG_ADFS_FS is not set 2096# CONFIG_ADFS_FS is not set
1429# CONFIG_AFFS_FS is not set 2097# CONFIG_AFFS_FS is not set
1430# CONFIG_HFS_FS is not set 2098# CONFIG_HFS_FS is not set
@@ -1444,27 +2112,49 @@ CONFIG_JFFS2_ZLIB=y
1444CONFIG_JFFS2_RTIME=y 2112CONFIG_JFFS2_RTIME=y
1445# CONFIG_JFFS2_RUBIN is not set 2113# CONFIG_JFFS2_RUBIN is not set
1446CONFIG_CRAMFS=y 2114CONFIG_CRAMFS=y
2115CONFIG_SQUASHFS=m
2116# CONFIG_SQUASHFS_EMBEDDED is not set
2117CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3
1447# CONFIG_VXFS_FS is not set 2118# CONFIG_VXFS_FS is not set
1448# CONFIG_MINIX_FS is not set 2119# CONFIG_MINIX_FS is not set
2120# CONFIG_OMFS_FS is not set
1449# CONFIG_HPFS_FS is not set 2121# CONFIG_HPFS_FS is not set
1450# CONFIG_QNX4FS_FS is not set 2122# CONFIG_QNX4FS_FS is not set
1451CONFIG_ROMFS_FS=y 2123CONFIG_ROMFS_FS=y
2124CONFIG_ROMFS_BACKED_BY_BLOCK=y
2125# CONFIG_ROMFS_BACKED_BY_MTD is not set
2126# CONFIG_ROMFS_BACKED_BY_BOTH is not set
2127CONFIG_ROMFS_ON_BLOCK=y
1452# CONFIG_SYSV_FS is not set 2128# CONFIG_SYSV_FS is not set
1453# CONFIG_UFS_FS is not set 2129# CONFIG_UFS_FS is not set
2130# CONFIG_NILFS2_FS is not set
1454CONFIG_NETWORK_FILESYSTEMS=y 2131CONFIG_NETWORK_FILESYSTEMS=y
1455CONFIG_NFS_FS=y 2132CONFIG_NFS_FS=y
1456# CONFIG_NFS_V3 is not set 2133CONFIG_NFS_V3=y
2134CONFIG_NFS_V3_ACL=y
1457# CONFIG_NFS_V4 is not set 2135# CONFIG_NFS_V4 is not set
1458# CONFIG_NFSD is not set
1459CONFIG_ROOT_NFS=y 2136CONFIG_ROOT_NFS=y
2137CONFIG_NFSD=m
2138CONFIG_NFSD_V2_ACL=y
2139CONFIG_NFSD_V3=y
2140CONFIG_NFSD_V3_ACL=y
2141CONFIG_NFSD_V4=y
1460CONFIG_LOCKD=y 2142CONFIG_LOCKD=y
2143CONFIG_LOCKD_V4=y
2144CONFIG_EXPORTFS=m
2145CONFIG_NFS_ACL_SUPPORT=y
1461CONFIG_NFS_COMMON=y 2146CONFIG_NFS_COMMON=y
1462CONFIG_SUNRPC=y 2147CONFIG_SUNRPC=y
1463# CONFIG_SUNRPC_BIND34 is not set 2148CONFIG_SUNRPC_GSS=m
1464# CONFIG_RPCSEC_GSS_KRB5 is not set 2149CONFIG_RPCSEC_GSS_KRB5=m
1465# CONFIG_RPCSEC_GSS_SPKM3 is not set 2150# CONFIG_RPCSEC_GSS_SPKM3 is not set
1466# CONFIG_SMB_FS is not set 2151# CONFIG_SMB_FS is not set
1467# CONFIG_CIFS is not set 2152CONFIG_CIFS=m
2153# CONFIG_CIFS_STATS is not set
2154# CONFIG_CIFS_WEAK_PW_HASH is not set
2155# CONFIG_CIFS_XATTR is not set
2156# CONFIG_CIFS_DEBUG2 is not set
2157# CONFIG_CIFS_EXPERIMENTAL is not set
1468# CONFIG_NCP_FS is not set 2158# CONFIG_NCP_FS is not set
1469# CONFIG_CODA_FS is not set 2159# CONFIG_CODA_FS is not set
1470# CONFIG_AFS_FS is not set 2160# CONFIG_AFS_FS is not set
@@ -1546,6 +2236,11 @@ CONFIG_MAGIC_SYSRQ=y
1546CONFIG_DEBUG_KERNEL=y 2236CONFIG_DEBUG_KERNEL=y
1547# CONFIG_DEBUG_SHIRQ is not set 2237# CONFIG_DEBUG_SHIRQ is not set
1548CONFIG_DETECT_SOFTLOCKUP=y 2238CONFIG_DETECT_SOFTLOCKUP=y
2239# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
2240CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
2241CONFIG_DETECT_HUNG_TASK=y
2242# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
2243CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
1549CONFIG_SCHED_DEBUG=y 2244CONFIG_SCHED_DEBUG=y
1550# CONFIG_SCHEDSTATS is not set 2245# CONFIG_SCHEDSTATS is not set
1551# CONFIG_TIMER_STATS is not set 2246# CONFIG_TIMER_STATS is not set
@@ -1565,14 +2260,39 @@ CONFIG_DEBUG_BUGVERBOSE=y
1565CONFIG_DEBUG_INFO=y 2260CONFIG_DEBUG_INFO=y
1566# CONFIG_DEBUG_VM is not set 2261# CONFIG_DEBUG_VM is not set
1567# CONFIG_DEBUG_WRITECOUNT is not set 2262# CONFIG_DEBUG_WRITECOUNT is not set
2263CONFIG_DEBUG_MEMORY_INIT=y
1568# CONFIG_DEBUG_LIST is not set 2264# CONFIG_DEBUG_LIST is not set
1569# CONFIG_DEBUG_SG is not set 2265# CONFIG_DEBUG_SG is not set
2266# CONFIG_DEBUG_NOTIFIERS is not set
1570CONFIG_FRAME_POINTER=y 2267CONFIG_FRAME_POINTER=y
1571# CONFIG_BOOT_PRINTK_DELAY is not set 2268# CONFIG_BOOT_PRINTK_DELAY is not set
1572# CONFIG_RCU_TORTURE_TEST is not set 2269# CONFIG_RCU_TORTURE_TEST is not set
2270# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1573# CONFIG_BACKTRACE_SELF_TEST is not set 2271# CONFIG_BACKTRACE_SELF_TEST is not set
2272# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1574# CONFIG_FAULT_INJECTION is not set 2273# CONFIG_FAULT_INJECTION is not set
2274# CONFIG_LATENCYTOP is not set
2275CONFIG_SYSCTL_SYSCALL_CHECK=y
2276# CONFIG_PAGE_POISONING is not set
2277CONFIG_HAVE_FUNCTION_TRACER=y
2278CONFIG_TRACING_SUPPORT=y
2279
2280#
2281# Tracers
2282#
2283# CONFIG_FUNCTION_TRACER is not set
2284# CONFIG_SCHED_TRACER is not set
2285# CONFIG_CONTEXT_SWITCH_TRACER is not set
2286# CONFIG_EVENT_TRACER is not set
2287# CONFIG_BOOT_TRACER is not set
2288# CONFIG_TRACE_BRANCH_PROFILING is not set
2289# CONFIG_STACK_TRACER is not set
2290# CONFIG_KMEMTRACE is not set
2291# CONFIG_WORKQUEUE_TRACER is not set
2292# CONFIG_BLK_DEV_IO_TRACE is not set
1575# CONFIG_SAMPLES is not set 2293# CONFIG_SAMPLES is not set
2294CONFIG_HAVE_ARCH_KGDB=y
2295# CONFIG_KGDB is not set
1576CONFIG_DEBUG_USER=y 2296CONFIG_DEBUG_USER=y
1577CONFIG_DEBUG_ERRORS=y 2297CONFIG_DEBUG_ERRORS=y
1578# CONFIG_DEBUG_STACK_USAGE is not set 2298# CONFIG_DEBUG_STACK_USAGE is not set
@@ -1586,19 +2306,29 @@ CONFIG_DEBUG_S3C_UART=0
1586# 2306#
1587# CONFIG_KEYS is not set 2307# CONFIG_KEYS is not set
1588# CONFIG_SECURITY is not set 2308# CONFIG_SECURITY is not set
2309# CONFIG_SECURITYFS is not set
1589# CONFIG_SECURITY_FILE_CAPABILITIES is not set 2310# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1590CONFIG_CRYPTO=y 2311CONFIG_CRYPTO=y
1591 2312
1592# 2313#
1593# Crypto core or helper 2314# Crypto core or helper
1594# 2315#
2316# CONFIG_CRYPTO_FIPS is not set
1595CONFIG_CRYPTO_ALGAPI=m 2317CONFIG_CRYPTO_ALGAPI=m
2318CONFIG_CRYPTO_ALGAPI2=m
1596CONFIG_CRYPTO_AEAD=m 2319CONFIG_CRYPTO_AEAD=m
2320CONFIG_CRYPTO_AEAD2=m
1597CONFIG_CRYPTO_BLKCIPHER=m 2321CONFIG_CRYPTO_BLKCIPHER=m
2322CONFIG_CRYPTO_BLKCIPHER2=m
1598CONFIG_CRYPTO_HASH=m 2323CONFIG_CRYPTO_HASH=m
2324CONFIG_CRYPTO_HASH2=m
2325CONFIG_CRYPTO_RNG2=m
2326CONFIG_CRYPTO_PCOMP=m
1599CONFIG_CRYPTO_MANAGER=m 2327CONFIG_CRYPTO_MANAGER=m
2328CONFIG_CRYPTO_MANAGER2=m
1600# CONFIG_CRYPTO_GF128MUL is not set 2329# CONFIG_CRYPTO_GF128MUL is not set
1601# CONFIG_CRYPTO_NULL is not set 2330# CONFIG_CRYPTO_NULL is not set
2331CONFIG_CRYPTO_WORKQUEUE=m
1602# CONFIG_CRYPTO_CRYPTD is not set 2332# CONFIG_CRYPTO_CRYPTD is not set
1603CONFIG_CRYPTO_AUTHENC=m 2333CONFIG_CRYPTO_AUTHENC=m
1604# CONFIG_CRYPTO_TEST is not set 2334# CONFIG_CRYPTO_TEST is not set
@@ -1630,10 +2360,14 @@ CONFIG_CRYPTO_HMAC=m
1630# 2360#
1631# Digest 2361# Digest
1632# 2362#
1633# CONFIG_CRYPTO_CRC32C is not set 2363CONFIG_CRYPTO_CRC32C=m
1634# CONFIG_CRYPTO_MD4 is not set 2364# CONFIG_CRYPTO_MD4 is not set
1635CONFIG_CRYPTO_MD5=m 2365CONFIG_CRYPTO_MD5=m
1636# CONFIG_CRYPTO_MICHAEL_MIC is not set 2366# CONFIG_CRYPTO_MICHAEL_MIC is not set
2367# CONFIG_CRYPTO_RMD128 is not set
2368# CONFIG_CRYPTO_RMD160 is not set
2369# CONFIG_CRYPTO_RMD256 is not set
2370# CONFIG_CRYPTO_RMD320 is not set
1637CONFIG_CRYPTO_SHA1=m 2371CONFIG_CRYPTO_SHA1=m
1638# CONFIG_CRYPTO_SHA256 is not set 2372# CONFIG_CRYPTO_SHA256 is not set
1639# CONFIG_CRYPTO_SHA512 is not set 2373# CONFIG_CRYPTO_SHA512 is not set
@@ -1663,23 +2397,37 @@ CONFIG_CRYPTO_DES=m
1663# Compression 2397# Compression
1664# 2398#
1665CONFIG_CRYPTO_DEFLATE=m 2399CONFIG_CRYPTO_DEFLATE=m
2400# CONFIG_CRYPTO_ZLIB is not set
1666# CONFIG_CRYPTO_LZO is not set 2401# CONFIG_CRYPTO_LZO is not set
2402
2403#
2404# Random Number Generation
2405#
2406# CONFIG_CRYPTO_ANSI_CPRNG is not set
1667CONFIG_CRYPTO_HW=y 2407CONFIG_CRYPTO_HW=y
2408# CONFIG_BINARY_PRINTF is not set
1668 2409
1669# 2410#
1670# Library routines 2411# Library routines
1671# 2412#
1672CONFIG_BITREVERSE=y 2413CONFIG_BITREVERSE=y
1673# CONFIG_GENERIC_FIND_FIRST_BIT is not set 2414CONFIG_GENERIC_FIND_LAST_BIT=y
1674# CONFIG_GENERIC_FIND_NEXT_BIT is not set
1675# CONFIG_CRC_CCITT is not set 2415# CONFIG_CRC_CCITT is not set
1676# CONFIG_CRC16 is not set 2416CONFIG_CRC16=m
2417# CONFIG_CRC_T10DIF is not set
1677CONFIG_CRC_ITU_T=m 2418CONFIG_CRC_ITU_T=m
1678CONFIG_CRC32=y 2419CONFIG_CRC32=y
1679# CONFIG_CRC7 is not set 2420CONFIG_CRC7=m
1680# CONFIG_LIBCRC32C is not set 2421CONFIG_LIBCRC32C=m
1681CONFIG_ZLIB_INFLATE=y 2422CONFIG_ZLIB_INFLATE=y
1682CONFIG_ZLIB_DEFLATE=y 2423CONFIG_ZLIB_DEFLATE=y
1683CONFIG_PLIST=y 2424CONFIG_DECOMPRESS_GZIP=y
2425CONFIG_DECOMPRESS_BZIP2=y
2426CONFIG_DECOMPRESS_LZMA=y
2427CONFIG_TEXTSEARCH=y
2428CONFIG_TEXTSEARCH_KMP=m
2429CONFIG_TEXTSEARCH_BM=m
2430CONFIG_TEXTSEARCH_FSM=m
1684CONFIG_HAS_IOMEM=y 2431CONFIG_HAS_IOMEM=y
1685CONFIG_HAS_DMA=y 2432CONFIG_HAS_DMA=y
2433CONFIG_NLATTR=y
diff --git a/arch/arm/include/asm/sizes.h b/arch/arm/include/asm/sizes.h
index c10d1aa4b487..ada93a8fc2ef 100644
--- a/arch/arm/include/asm/sizes.h
+++ b/arch/arm/include/asm/sizes.h
@@ -32,6 +32,7 @@
32#define SZ_4K 0x00001000 32#define SZ_4K 0x00001000
33#define SZ_8K 0x00002000 33#define SZ_8K 0x00002000
34#define SZ_16K 0x00004000 34#define SZ_16K 0x00004000
35#define SZ_32K 0x00008000
35#define SZ_64K 0x00010000 36#define SZ_64K 0x00010000
36#define SZ_128K 0x00020000 37#define SZ_128K 0x00020000
37#define SZ_256K 0x00040000 38#define SZ_256K 0x00040000
diff --git a/arch/arm/include/asm/tlb.h b/arch/arm/include/asm/tlb.h
index 857f1dfac794..321c83e43a1e 100644
--- a/arch/arm/include/asm/tlb.h
+++ b/arch/arm/include/asm/tlb.h
@@ -36,6 +36,8 @@
36struct mmu_gather { 36struct mmu_gather {
37 struct mm_struct *mm; 37 struct mm_struct *mm;
38 unsigned int fullmm; 38 unsigned int fullmm;
39 unsigned long range_start;
40 unsigned long range_end;
39}; 41};
40 42
41DECLARE_PER_CPU(struct mmu_gather, mmu_gathers); 43DECLARE_PER_CPU(struct mmu_gather, mmu_gathers);
@@ -63,7 +65,19 @@ tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end)
63 put_cpu_var(mmu_gathers); 65 put_cpu_var(mmu_gathers);
64} 66}
65 67
66#define tlb_remove_tlb_entry(tlb,ptep,address) do { } while (0) 68/*
69 * Memorize the range for the TLB flush.
70 */
71static inline void
72tlb_remove_tlb_entry(struct mmu_gather *tlb, pte_t *ptep, unsigned long addr)
73{
74 if (!tlb->fullmm) {
75 if (addr < tlb->range_start)
76 tlb->range_start = addr;
77 if (addr + PAGE_SIZE > tlb->range_end)
78 tlb->range_end = addr + PAGE_SIZE;
79 }
80}
67 81
68/* 82/*
69 * In the case of tlb vma handling, we can optimise these away in the 83 * In the case of tlb vma handling, we can optimise these away in the
@@ -73,15 +87,18 @@ tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end)
73static inline void 87static inline void
74tlb_start_vma(struct mmu_gather *tlb, struct vm_area_struct *vma) 88tlb_start_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
75{ 89{
76 if (!tlb->fullmm) 90 if (!tlb->fullmm) {
77 flush_cache_range(vma, vma->vm_start, vma->vm_end); 91 flush_cache_range(vma, vma->vm_start, vma->vm_end);
92 tlb->range_start = TASK_SIZE;
93 tlb->range_end = 0;
94 }
78} 95}
79 96
80static inline void 97static inline void
81tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma) 98tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
82{ 99{
83 if (!tlb->fullmm) 100 if (!tlb->fullmm && tlb->range_end > 0)
84 flush_tlb_range(vma, vma->vm_start, vma->vm_end); 101 flush_tlb_range(vma, tlb->range_start, tlb->range_end);
85} 102}
86 103
87#define tlb_remove_page(tlb,page) free_page_and_swap_cache(page) 104#define tlb_remove_page(tlb,page) free_page_and_swap_cache(page)
diff --git a/arch/arm/kernel/sys_oabi-compat.c b/arch/arm/kernel/sys_oabi-compat.c
index 42623db7f870..e04173c7e621 100644
--- a/arch/arm/kernel/sys_oabi-compat.c
+++ b/arch/arm/kernel/sys_oabi-compat.c
@@ -83,6 +83,7 @@
83#include <linux/net.h> 83#include <linux/net.h>
84#include <linux/ipc.h> 84#include <linux/ipc.h>
85#include <linux/uaccess.h> 85#include <linux/uaccess.h>
86#include <linux/slab.h>
86 87
87struct oldabi_stat64 { 88struct oldabi_stat64 {
88 unsigned long long st_dev; 89 unsigned long long st_dev;
diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h
index 793fe7b25f36..e6afff849b85 100644
--- a/arch/arm/mach-at91/include/mach/board.h
+++ b/arch/arm/mach-at91/include/mach/board.h
@@ -87,7 +87,7 @@ extern void __init at91_add_device_eth(struct at91_eth_data *data);
87 /* USB Host */ 87 /* USB Host */
88struct at91_usbh_data { 88struct at91_usbh_data {
89 u8 ports; /* number of ports on root hub */ 89 u8 ports; /* number of ports on root hub */
90 u8 vbus_pin[]; /* port power-control pin */ 90 u8 vbus_pin[2]; /* port power-control pin */
91}; 91};
92extern void __init at91_add_device_usbh(struct at91_usbh_data *data); 92extern void __init at91_add_device_usbh(struct at91_usbh_data *data);
93 93
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index 6d9152de6074..ae24486f858a 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -100,7 +100,7 @@ static unsigned int last_jiffy_time;
100 100
101#define TIMER4_TICKS_PER_JIFFY ((CLOCK_TICK_RATE + (HZ/2)) / HZ) 101#define TIMER4_TICKS_PER_JIFFY ((CLOCK_TICK_RATE + (HZ/2)) / HZ)
102 102
103static int ep93xx_timer_interrupt(int irq, void *dev_id) 103static irqreturn_t ep93xx_timer_interrupt(int irq, void *dev_id)
104{ 104{
105 __raw_writel(1, EP93XX_TIMER1_CLEAR); 105 __raw_writel(1, EP93XX_TIMER1_CLEAR);
106 while ((signed long) 106 while ((signed long)
diff --git a/arch/arm/mach-mx1/mx1ads.c b/arch/arm/mach-mx1/mx1ads.c
index 7ae229bc1b79..e54057fb855b 100644
--- a/arch/arm/mach-mx1/mx1ads.c
+++ b/arch/arm/mach-mx1/mx1ads.c
@@ -28,9 +28,7 @@
28#include <mach/common.h> 28#include <mach/common.h>
29#include <mach/imx-uart.h> 29#include <mach/imx-uart.h>
30#include <mach/irqs.h> 30#include <mach/irqs.h>
31#ifdef CONFIG_I2C_IMX
32#include <mach/i2c.h> 31#include <mach/i2c.h>
33#endif
34#include <mach/iomux.h> 32#include <mach/iomux.h>
35#include "devices.h" 33#include "devices.h"
36 34
@@ -114,7 +112,6 @@ static struct platform_device flash_device = {
114 * I2C 112 * I2C
115 */ 113 */
116 114
117#ifdef CONFIG_I2C_IMX
118static int i2c_pins[] = { 115static int i2c_pins[] = {
119 PA15_PF_I2C_SDA, 116 PA15_PF_I2C_SDA,
120 PA16_PF_I2C_SCL, 117 PA16_PF_I2C_SCL,
@@ -157,7 +154,6 @@ static struct i2c_board_info mx1ads_i2c_devices[] = {
157 .platform_data = &pcf857x_data[1], 154 .platform_data = &pcf857x_data[1],
158 }, 155 },
159}; 156};
160#endif
161 157
162/* 158/*
163 * Board init 159 * Board init
@@ -172,12 +168,10 @@ static void __init mx1ads_init(void)
172 mxc_register_device(&flash_device, &mx1ads_flash_data); 168 mxc_register_device(&flash_device, &mx1ads_flash_data);
173 169
174 /* I2C */ 170 /* I2C */
175#ifdef CONFIG_I2C_IMX
176 i2c_register_board_info(0, mx1ads_i2c_devices, 171 i2c_register_board_info(0, mx1ads_i2c_devices,
177 ARRAY_SIZE(mx1ads_i2c_devices)); 172 ARRAY_SIZE(mx1ads_i2c_devices));
178 173
179 mxc_register_device(&imx_i2c_device, &mx1ads_i2c_data); 174 mxc_register_device(&imx_i2c_device, &mx1ads_i2c_data);
180#endif
181} 175}
182 176
183static void __init mx1ads_timer_init(void) 177static void __init mx1ads_timer_init(void)
diff --git a/arch/arm/mach-mx2/clock_imx21.c b/arch/arm/mach-mx2/clock_imx21.c
index 2dee5c87614c..999d013e06e3 100644
--- a/arch/arm/mach-mx2/clock_imx21.c
+++ b/arch/arm/mach-mx2/clock_imx21.c
@@ -919,19 +919,19 @@ static struct clk_lookup lookups[] __initdata = {
919 _REGISTER_CLOCK(NULL, "cspi1", cspi_clk[0]) 919 _REGISTER_CLOCK(NULL, "cspi1", cspi_clk[0])
920 _REGISTER_CLOCK(NULL, "cspi2", cspi_clk[1]) 920 _REGISTER_CLOCK(NULL, "cspi2", cspi_clk[1])
921 _REGISTER_CLOCK(NULL, "cspi3", cspi_clk[2]) 921 _REGISTER_CLOCK(NULL, "cspi3", cspi_clk[2])
922 _REGISTER_CLOCK(NULL, "lcdc", lcdc_clk[0]) 922 _REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk[0])
923 _REGISTER_CLOCK(NULL, "csi", csi_clk[0]) 923 _REGISTER_CLOCK(NULL, "csi", csi_clk[0])
924 _REGISTER_CLOCK(NULL, "usb", usb_clk[0]) 924 _REGISTER_CLOCK(NULL, "usb", usb_clk[0])
925 _REGISTER_CLOCK(NULL, "ssi1", ssi_clk[0]) 925 _REGISTER_CLOCK(NULL, "ssi1", ssi_clk[0])
926 _REGISTER_CLOCK(NULL, "ssi2", ssi_clk[1]) 926 _REGISTER_CLOCK(NULL, "ssi2", ssi_clk[1])
927 _REGISTER_CLOCK(NULL, "nfc", nfc_clk) 927 _REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk)
928 _REGISTER_CLOCK(NULL, "dma", dma_clk[0]) 928 _REGISTER_CLOCK(NULL, "dma", dma_clk[0])
929 _REGISTER_CLOCK(NULL, "brom", brom_clk) 929 _REGISTER_CLOCK(NULL, "brom", brom_clk)
930 _REGISTER_CLOCK(NULL, "emma", emma_clk[0]) 930 _REGISTER_CLOCK(NULL, "emma", emma_clk[0])
931 _REGISTER_CLOCK(NULL, "slcdc", slcdc_clk[0]) 931 _REGISTER_CLOCK(NULL, "slcdc", slcdc_clk[0])
932 _REGISTER_CLOCK(NULL, "wdog", wdog_clk) 932 _REGISTER_CLOCK("imx-wdt.0", NULL, wdog_clk)
933 _REGISTER_CLOCK(NULL, "gpio", gpio_clk) 933 _REGISTER_CLOCK(NULL, "gpio", gpio_clk)
934 _REGISTER_CLOCK(NULL, "i2c", i2c_clk) 934 _REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk)
935 _REGISTER_CLOCK("mxc-keypad", NULL, kpp_clk) 935 _REGISTER_CLOCK("mxc-keypad", NULL, kpp_clk)
936 _REGISTER_CLOCK(NULL, "owire", owire_clk) 936 _REGISTER_CLOCK(NULL, "owire", owire_clk)
937 _REGISTER_CLOCK(NULL, "rtc", rtc_clk) 937 _REGISTER_CLOCK(NULL, "rtc", rtc_clk)
diff --git a/arch/arm/mach-mx3/Kconfig b/arch/arm/mach-mx3/Kconfig
index d6235583e979..194b8428bba4 100644
--- a/arch/arm/mach-mx3/Kconfig
+++ b/arch/arm/mach-mx3/Kconfig
@@ -19,6 +19,8 @@ config MACH_MX31ADS
19config MACH_MX31ADS_WM1133_EV1 19config MACH_MX31ADS_WM1133_EV1
20 bool "Support Wolfson Microelectronics 1133-EV1 module" 20 bool "Support Wolfson Microelectronics 1133-EV1 module"
21 depends on MACH_MX31ADS 21 depends on MACH_MX31ADS
22 depends on MFD_WM8350_I2C
23 depends on REGULATOR_WM8350
22 select MFD_WM8350_CONFIG_MODE_0 24 select MFD_WM8350_CONFIG_MODE_0
23 select MFD_WM8352_CONFIG_MODE_0 25 select MFD_WM8352_CONFIG_MODE_0
24 help 26 help
diff --git a/arch/arm/mach-mx3/mx31ads.c b/arch/arm/mach-mx3/mx31ads.c
index 83e5e8e1276f..a6d6efefa6aa 100644
--- a/arch/arm/mach-mx3/mx31ads.c
+++ b/arch/arm/mach-mx3/mx31ads.c
@@ -102,7 +102,7 @@ static struct imxuart_platform_data uart_pdata = {
102 .flags = IMXUART_HAVE_RTSCTS, 102 .flags = IMXUART_HAVE_RTSCTS,
103}; 103};
104 104
105static int uart_pins[] = { 105static unsigned int uart_pins[] = {
106 MX31_PIN_CTS1__CTS1, 106 MX31_PIN_CTS1__CTS1,
107 MX31_PIN_RTS1__RTS1, 107 MX31_PIN_RTS1__RTS1,
108 MX31_PIN_TXD1__TXD1, 108 MX31_PIN_TXD1__TXD1,
@@ -452,6 +452,8 @@ static int mx31_wm8350_init(struct wm8350 *wm8350)
452 452
453 wm8350->codec.platform_data = &imx32ads_wm8350_setup; 453 wm8350->codec.platform_data = &imx32ads_wm8350_setup;
454 454
455 regulator_has_full_constraints();
456
455 return 0; 457 return 0;
456} 458}
457 459
diff --git a/arch/arm/mach-mx3/pcm037.c b/arch/arm/mach-mx3/pcm037.c
index c3648eff5137..b5227d837b2f 100644
--- a/arch/arm/mach-mx3/pcm037.c
+++ b/arch/arm/mach-mx3/pcm037.c
@@ -226,10 +226,10 @@ static void __init mxc_board_init(void)
226 mxc_iomux_setup_pin(MX31_PIN_BATT_LINE__OWIRE, "batt-0wire"); 226 mxc_iomux_setup_pin(MX31_PIN_BATT_LINE__OWIRE, "batt-0wire");
227 mxc_register_device(&mxc_w1_master_device, NULL); 227 mxc_register_device(&mxc_w1_master_device, NULL);
228 228
229 /* SMSC9215 IRQ pin */ 229 /* LAN9217 IRQ pin */
230 if (!mxc_iomux_setup_pin(IOMUX_MODE(MX31_PIN_GPIO3_1, IOMUX_CONFIG_GPIO), 230 if (!mxc_iomux_setup_pin(IOMUX_MODE(MX31_PIN_GPIO3_1, IOMUX_CONFIG_GPIO),
231 "pcm037-eth")) 231 "pcm037-eth"))
232 gpio_direction_input(MX31_PIN_GPIO3_1); 232 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1));
233 233
234#ifdef CONFIG_I2C_IMX 234#ifdef CONFIG_I2C_IMX
235 i2c_register_board_info(1, pcm037_i2c_devices, 235 i2c_register_board_info(1, pcm037_i2c_devices,
diff --git a/arch/arm/mach-mx3/qong.c b/arch/arm/mach-mx3/qong.c
index 6c4283cec6f4..5a01e48fd8f1 100644
--- a/arch/arm/mach-mx3/qong.c
+++ b/arch/arm/mach-mx3/qong.c
@@ -251,32 +251,6 @@ static void __init qong_init_fpga(void)
251} 251}
252 252
253/* 253/*
254 * This structure defines the MX31 memory map.
255 */
256static struct map_desc qong_io_desc[] __initdata = {
257 {
258 .virtual = AIPS1_BASE_ADDR_VIRT,
259 .pfn = __phys_to_pfn(AIPS1_BASE_ADDR),
260 .length = AIPS1_SIZE,
261 .type = MT_DEVICE_NONSHARED
262 }, {
263 .virtual = AIPS2_BASE_ADDR_VIRT,
264 .pfn = __phys_to_pfn(AIPS2_BASE_ADDR),
265 .length = AIPS2_SIZE,
266 .type = MT_DEVICE_NONSHARED
267 }
268};
269
270/*
271 * Set up static virtual mappings.
272 */
273static void __init qong_map_io(void)
274{
275 mxc_map_io();
276 iotable_init(qong_io_desc, ARRAY_SIZE(qong_io_desc));
277}
278
279/*
280 * Board specific initialization. 254 * Board specific initialization.
281 */ 255 */
282static void __init mxc_board_init(void) 256static void __init mxc_board_init(void)
@@ -305,7 +279,7 @@ MACHINE_START(QONG, "Dave/DENX QongEVB-LITE")
305 .phys_io = AIPS1_BASE_ADDR, 279 .phys_io = AIPS1_BASE_ADDR,
306 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 280 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
307 .boot_params = PHYS_OFFSET + 0x100, 281 .boot_params = PHYS_OFFSET + 0x100,
308 .map_io = qong_map_io, 282 .map_io = mxc_map_io,
309 .init_irq = mxc_init_irq, 283 .init_irq = mxc_init_irq,
310 .init_machine = mxc_board_init, 284 .init_machine = mxc_board_init,
311 .timer = &qong_timer, 285 .timer = &qong_timer,
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index dafe4f71d15f..336e51dc6127 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -590,27 +590,28 @@ static void omap1_init_ext_clk(struct clk * clk)
590static int omap1_clk_enable(struct clk *clk) 590static int omap1_clk_enable(struct clk *clk)
591{ 591{
592 int ret = 0; 592 int ret = 0;
593
593 if (clk->usecount++ == 0) { 594 if (clk->usecount++ == 0) {
594 if (likely(clk->parent)) { 595 if (clk->parent) {
595 ret = omap1_clk_enable(clk->parent); 596 ret = omap1_clk_enable(clk->parent);
596 597 if (ret)
597 if (unlikely(ret != 0)) { 598 goto err;
598 clk->usecount--;
599 return ret;
600 }
601 599
602 if (clk->flags & CLOCK_NO_IDLE_PARENT) 600 if (clk->flags & CLOCK_NO_IDLE_PARENT)
603 omap1_clk_deny_idle(clk->parent); 601 omap1_clk_deny_idle(clk->parent);
604 } 602 }
605 603
606 ret = clk->ops->enable(clk); 604 ret = clk->ops->enable(clk);
607 605 if (ret) {
608 if (unlikely(ret != 0) && clk->parent) { 606 if (clk->parent)
609 omap1_clk_disable(clk->parent); 607 omap1_clk_disable(clk->parent);
610 clk->usecount--; 608 goto err;
611 } 609 }
612 } 610 }
611 return ret;
613 612
613err:
614 clk->usecount--;
614 return ret; 615 return ret;
615} 616}
616 617
diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c
index fc74e913c415..34a56a136efd 100644
--- a/arch/arm/mach-omap2/usb-musb.c
+++ b/arch/arm/mach-omap2/usb-musb.c
@@ -131,14 +131,14 @@ static struct musb_hdrc_platform_data musb_plat = {
131 .power = 50, /* up to 100 mA */ 131 .power = 50, /* up to 100 mA */
132}; 132};
133 133
134static u64 musb_dmamask = DMA_32BIT_MASK; 134static u64 musb_dmamask = DMA_BIT_MASK(32);
135 135
136static struct platform_device musb_device = { 136static struct platform_device musb_device = {
137 .name = "musb_hdrc", 137 .name = "musb_hdrc",
138 .id = -1, 138 .id = -1,
139 .dev = { 139 .dev = {
140 .dma_mask = &musb_dmamask, 140 .dma_mask = &musb_dmamask,
141 .coherent_dma_mask = DMA_32BIT_MASK, 141 .coherent_dma_mask = DMA_BIT_MASK(32),
142 .platform_data = &musb_plat, 142 .platform_data = &musb_plat,
143 }, 143 },
144 .num_resources = ARRAY_SIZE(musb_resources), 144 .num_resources = ARRAY_SIZE(musb_resources),
@@ -146,14 +146,14 @@ static struct platform_device musb_device = {
146}; 146};
147 147
148#ifdef CONFIG_NOP_USB_XCEIV 148#ifdef CONFIG_NOP_USB_XCEIV
149static u64 nop_xceiv_dmamask = DMA_32BIT_MASK; 149static u64 nop_xceiv_dmamask = DMA_BIT_MASK(32);
150 150
151static struct platform_device nop_xceiv_device = { 151static struct platform_device nop_xceiv_device = {
152 .name = "nop_usb_xceiv", 152 .name = "nop_usb_xceiv",
153 .id = -1, 153 .id = -1,
154 .dev = { 154 .dev = {
155 .dma_mask = &nop_xceiv_dmamask, 155 .dma_mask = &nop_xceiv_dmamask,
156 .coherent_dma_mask = DMA_32BIT_MASK, 156 .coherent_dma_mask = DMA_BIT_MASK(32),
157 .platform_data = NULL, 157 .platform_data = NULL,
158 }, 158 },
159}; 159};
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index 96a2006cb597..3e66d9099eab 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -343,6 +343,15 @@ config ARCH_PXA_PALM
343 bool "PXA based Palm PDAs" 343 bool "PXA based Palm PDAs"
344 select HAVE_PWM 344 select HAVE_PWM
345 345
346config MACH_PALMTE2
347 bool "Palm Tungsten|E2"
348 default y
349 depends on ARCH_PXA_PALM
350 select PXA25x
351 help
352 Say Y here if you intend to run this kernel on a Palm Tungsten|E2
353 handheld computer.
354
346config MACH_PALMT5 355config MACH_PALMT5
347 bool "Palm Tungsten|T5" 356 bool "Palm Tungsten|T5"
348 default y 357 default y
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index c80e1bac4945..682dbf4e14b0 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -57,6 +57,7 @@ obj-$(CONFIG_MACH_E740) += e740.o
57obj-$(CONFIG_MACH_E750) += e750.o 57obj-$(CONFIG_MACH_E750) += e750.o
58obj-$(CONFIG_MACH_E400) += e400.o 58obj-$(CONFIG_MACH_E400) += e400.o
59obj-$(CONFIG_MACH_E800) += e800.o 59obj-$(CONFIG_MACH_E800) += e800.o
60obj-$(CONFIG_MACH_PALMTE2) += palmte2.o
60obj-$(CONFIG_MACH_PALMT5) += palmt5.o 61obj-$(CONFIG_MACH_PALMT5) += palmt5.o
61obj-$(CONFIG_MACH_PALMTX) += palmtx.o 62obj-$(CONFIG_MACH_PALMTX) += palmtx.o
62obj-$(CONFIG_MACH_PALMLD) += palmld.o 63obj-$(CONFIG_MACH_PALMLD) += palmld.o
diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c
index 117b5435f8d5..b50ef39eabfc 100644
--- a/arch/arm/mach-pxa/cm-x2xx.c
+++ b/arch/arm/mach-pxa/cm-x2xx.c
@@ -121,7 +121,7 @@ static inline void cmx2xx_init_dm9000(void) {}
121/* UCB1400 touchscreen controller */ 121/* UCB1400 touchscreen controller */
122#if defined(CONFIG_TOUCHSCREEN_UCB1400) || defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE) 122#if defined(CONFIG_TOUCHSCREEN_UCB1400) || defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
123static struct platform_device cmx2xx_ts_device = { 123static struct platform_device cmx2xx_ts_device = {
124 .name = "ucb1400_ts", 124 .name = "ucb1400_core",
125 .id = -1, 125 .id = -1,
126}; 126};
127 127
diff --git a/arch/arm/mach-pxa/colibri-pxa300.c b/arch/arm/mach-pxa/colibri-pxa300.c
index 10c2eaf93230..7c9c34c19ae2 100644
--- a/arch/arm/mach-pxa/colibri-pxa300.c
+++ b/arch/arm/mach-pxa/colibri-pxa300.c
@@ -15,7 +15,7 @@
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17#include <linux/gpio.h> 17#include <linux/gpio.h>
18#include <net/ax88796.h> 18#include <linux/interrupt.h>
19 19
20#include <asm/mach-types.h> 20#include <asm/mach-types.h>
21#include <asm/sizes.h> 21#include <asm/sizes.h>
@@ -32,12 +32,13 @@
32 32
33#if defined(CONFIG_AX88796) 33#if defined(CONFIG_AX88796)
34#define COLIBRI_ETH_IRQ_GPIO mfp_to_gpio(GPIO26_GPIO) 34#define COLIBRI_ETH_IRQ_GPIO mfp_to_gpio(GPIO26_GPIO)
35
35/* 36/*
36 * Asix AX88796 Ethernet 37 * Asix AX88796 Ethernet
37 */ 38 */
38static struct ax_plat_data colibri_asix_platdata = { 39static struct ax_plat_data colibri_asix_platdata = {
39 .flags = AXFLG_MAC_FROMDEV, 40 .flags = 0, /* defined later */
40 .wordlength = 2 41 .wordlength = 2,
41}; 42};
42 43
43static struct resource colibri_asix_resource[] = { 44static struct resource colibri_asix_resource[] = {
@@ -49,7 +50,7 @@ static struct resource colibri_asix_resource[] = {
49 [1] = { 50 [1] = {
50 .start = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO), 51 .start = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO),
51 .end = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO), 52 .end = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO),
52 .flags = IORESOURCE_IRQ 53 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
53 } 54 }
54}; 55};
55 56
@@ -70,8 +71,8 @@ static mfp_cfg_t colibri_pxa300_eth_pin_config[] __initdata = {
70 71
71static void __init colibri_pxa300_init_eth(void) 72static void __init colibri_pxa300_init_eth(void)
72{ 73{
74 colibri_pxa3xx_init_eth(&colibri_asix_platdata);
73 pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa300_eth_pin_config)); 75 pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa300_eth_pin_config));
74 set_irq_type(gpio_to_irq(COLIBRI_ETH_IRQ_GPIO), IRQ_TYPE_EDGE_FALLING);
75 platform_device_register(&asix_device); 76 platform_device_register(&asix_device);
76} 77}
77#else 78#else
diff --git a/arch/arm/mach-pxa/colibri-pxa320.c b/arch/arm/mach-pxa/colibri-pxa320.c
index 55b74a7a6151..a18d37b3c5e6 100644
--- a/arch/arm/mach-pxa/colibri-pxa320.c
+++ b/arch/arm/mach-pxa/colibri-pxa320.c
@@ -15,7 +15,7 @@
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17#include <linux/gpio.h> 17#include <linux/gpio.h>
18#include <net/ax88796.h> 18#include <linux/interrupt.h>
19 19
20#include <asm/mach-types.h> 20#include <asm/mach-types.h>
21#include <asm/sizes.h> 21#include <asm/sizes.h>
@@ -38,8 +38,8 @@
38 * Asix AX88796 Ethernet 38 * Asix AX88796 Ethernet
39 */ 39 */
40static struct ax_plat_data colibri_asix_platdata = { 40static struct ax_plat_data colibri_asix_platdata = {
41 .flags = AXFLG_MAC_FROMDEV, 41 .flags = 0, /* defined later */
42 .wordlength = 2 42 .wordlength = 2,
43}; 43};
44 44
45static struct resource colibri_asix_resource[] = { 45static struct resource colibri_asix_resource[] = {
@@ -51,7 +51,7 @@ static struct resource colibri_asix_resource[] = {
51 [1] = { 51 [1] = {
52 .start = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO), 52 .start = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO),
53 .end = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO), 53 .end = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO),
54 .flags = IORESOURCE_IRQ 54 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
55 } 55 }
56}; 56};
57 57
@@ -72,8 +72,8 @@ static mfp_cfg_t colibri_pxa320_eth_pin_config[] __initdata = {
72 72
73static void __init colibri_pxa320_init_eth(void) 73static void __init colibri_pxa320_init_eth(void)
74{ 74{
75 colibri_pxa3xx_init_eth(&colibri_asix_platdata);
75 pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa320_eth_pin_config)); 76 pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa320_eth_pin_config));
76 set_irq_type(gpio_to_irq(COLIBRI_ETH_IRQ_GPIO), IRQ_TYPE_EDGE_FALLING);
77 platform_device_register(&asix_device); 77 platform_device_register(&asix_device);
78} 78}
79#else 79#else
diff --git a/arch/arm/mach-pxa/colibri-pxa3xx.c b/arch/arm/mach-pxa/colibri-pxa3xx.c
index 12d0afc54aa5..ea34e34f8cd8 100644
--- a/arch/arm/mach-pxa/colibri-pxa3xx.c
+++ b/arch/arm/mach-pxa/colibri-pxa3xx.c
@@ -14,6 +14,7 @@
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/platform_device.h> 15#include <linux/platform_device.h>
16#include <linux/gpio.h> 16#include <linux/gpio.h>
17#include <linux/etherdevice.h>
17#include <asm/mach-types.h> 18#include <asm/mach-types.h>
18#include <mach/hardware.h> 19#include <mach/hardware.h>
19#include <asm/sizes.h> 20#include <asm/sizes.h>
@@ -28,6 +29,40 @@
28#include "generic.h" 29#include "generic.h"
29#include "devices.h" 30#include "devices.h"
30 31
32#if defined(CONFIG_AX88796)
33#define ETHER_ADDR_LEN 6
34static u8 ether_mac_addr[ETHER_ADDR_LEN];
35
36void __init colibri_pxa3xx_init_eth(struct ax_plat_data *plat_data)
37{
38 int i;
39 u64 serial = ((u64) system_serial_high << 32) | system_serial_low;
40
41 /*
42 * If the bootloader passed in a serial boot tag, which contains a
43 * valid ethernet MAC, pass it to the interface. Toradex ships the
44 * modules with their own bootloader which provides a valid MAC
45 * this way.
46 */
47
48 for (i = 0; i < ETHER_ADDR_LEN; i++) {
49 ether_mac_addr[i] = serial & 0xff;
50 serial >>= 8;
51 }
52
53 if (is_valid_ether_addr(ether_mac_addr)) {
54 plat_data->flags |= AXFLG_MAC_FROMPLATFORM;
55 plat_data->mac_addr = ether_mac_addr;
56 printk(KERN_INFO "%s(): taking MAC from serial boot tag\n",
57 __func__);
58 } else {
59 plat_data->flags |= AXFLG_MAC_FROMDEV;
60 printk(KERN_INFO "%s(): no valid serial boot tag found, "
61 "taking MAC from device\n", __func__);
62 }
63}
64#endif
65
31#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE) 66#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
32static int mmc_detect_pin; 67static int mmc_detect_pin;
33 68
diff --git a/arch/arm/mach-pxa/csb701.c b/arch/arm/mach-pxa/csb701.c
index 4a2a2952c374..5a221a49ea4d 100644
--- a/arch/arm/mach-pxa/csb701.c
+++ b/arch/arm/mach-pxa/csb701.c
@@ -5,6 +5,8 @@
5#include <linux/input.h> 5#include <linux/input.h>
6#include <linux/leds.h> 6#include <linux/leds.h>
7 7
8#include <asm/mach-types.h>
9
8static struct gpio_keys_button csb701_buttons[] = { 10static struct gpio_keys_button csb701_buttons[] = {
9 { 11 {
10 .code = 0x7, 12 .code = 0x7,
@@ -54,6 +56,9 @@ static struct platform_device *devices[] __initdata = {
54 56
55static int __init csb701_init(void) 57static int __init csb701_init(void)
56{ 58{
59 if (!machine_is_csb726())
60 return -ENODEV;
61
57 return platform_add_devices(devices, ARRAY_SIZE(devices)); 62 return platform_add_devices(devices, ARRAY_SIZE(devices));
58} 63}
59 64
diff --git a/arch/arm/mach-pxa/e740.c b/arch/arm/mach-pxa/e740.c
index 07500a04fd8c..a36fc17f671d 100644
--- a/arch/arm/mach-pxa/e740.c
+++ b/arch/arm/mach-pxa/e740.c
@@ -29,6 +29,7 @@
29#include <mach/udc.h> 29#include <mach/udc.h>
30#include <mach/irda.h> 30#include <mach/irda.h>
31#include <mach/irqs.h> 31#include <mach/irqs.h>
32#include <mach/audio.h>
32 33
33#include "generic.h" 34#include "generic.h"
34#include "eseries.h" 35#include "eseries.h"
@@ -197,6 +198,7 @@ static void __init e740_init(void)
197 eseries_get_tmio_gpios(); 198 eseries_get_tmio_gpios();
198 platform_add_devices(devices, ARRAY_SIZE(devices)); 199 platform_add_devices(devices, ARRAY_SIZE(devices));
199 pxa_set_udc_info(&e7xx_udc_mach_info); 200 pxa_set_udc_info(&e7xx_udc_mach_info);
201 pxa_set_ac97_info(NULL);
200 e7xx_irda_init(); 202 e7xx_irda_init();
201 pxa_set_ficp_info(&e7xx_ficp_platform_data); 203 pxa_set_ficp_info(&e7xx_ficp_platform_data);
202} 204}
diff --git a/arch/arm/mach-pxa/e750.c b/arch/arm/mach-pxa/e750.c
index 6126c04e02bc..1d00110590e5 100644
--- a/arch/arm/mach-pxa/e750.c
+++ b/arch/arm/mach-pxa/e750.c
@@ -28,6 +28,7 @@
28#include <mach/udc.h> 28#include <mach/udc.h>
29#include <mach/irda.h> 29#include <mach/irda.h>
30#include <mach/irqs.h> 30#include <mach/irqs.h>
31#include <mach/audio.h>
31 32
32#include "generic.h" 33#include "generic.h"
33#include "eseries.h" 34#include "eseries.h"
@@ -198,6 +199,7 @@ static void __init e750_init(void)
198 eseries_get_tmio_gpios(); 199 eseries_get_tmio_gpios();
199 platform_add_devices(devices, ARRAY_SIZE(devices)); 200 platform_add_devices(devices, ARRAY_SIZE(devices));
200 pxa_set_udc_info(&e7xx_udc_mach_info); 201 pxa_set_udc_info(&e7xx_udc_mach_info);
202 pxa_set_ac97_info(NULL);
201 e7xx_irda_init(); 203 e7xx_irda_init();
202 pxa_set_ficp_info(&e7xx_ficp_platform_data); 204 pxa_set_ficp_info(&e7xx_ficp_platform_data);
203} 205}
diff --git a/arch/arm/mach-pxa/e800.c b/arch/arm/mach-pxa/e800.c
index 74ab09812a72..9866c7b9e784 100644
--- a/arch/arm/mach-pxa/e800.c
+++ b/arch/arm/mach-pxa/e800.c
@@ -27,6 +27,7 @@
27#include <mach/eseries-gpio.h> 27#include <mach/eseries-gpio.h>
28#include <mach/udc.h> 28#include <mach/udc.h>
29#include <mach/irqs.h> 29#include <mach/irqs.h>
30#include <mach/audio.h>
30 31
31#include "generic.h" 32#include "generic.h"
32#include "eseries.h" 33#include "eseries.h"
@@ -199,6 +200,7 @@ static void __init e800_init(void)
199 eseries_get_tmio_gpios(); 200 eseries_get_tmio_gpios();
200 platform_add_devices(devices, ARRAY_SIZE(devices)); 201 platform_add_devices(devices, ARRAY_SIZE(devices));
201 pxa_set_udc_info(&e800_udc_mach_info); 202 pxa_set_udc_info(&e800_udc_mach_info);
203 pxa_set_ac97_info(NULL);
202} 204}
203 205
204MACHINE_START(E800, "Toshiba e800") 206MACHINE_START(E800, "Toshiba e800")
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
index 920dfb8d36da..bc0f73fbd4ca 100644
--- a/arch/arm/mach-pxa/em-x270.c
+++ b/arch/arm/mach-pxa/em-x270.c
@@ -25,6 +25,7 @@
25#include <linux/regulator/machine.h> 25#include <linux/regulator/machine.h>
26#include <linux/spi/spi.h> 26#include <linux/spi/spi.h>
27#include <linux/spi/tdo24m.h> 27#include <linux/spi/tdo24m.h>
28#include <linux/spi/libertas_spi.h>
28#include <linux/power_supply.h> 29#include <linux/power_supply.h>
29#include <linux/apm-emulation.h> 30#include <linux/apm-emulation.h>
30 31
@@ -62,6 +63,8 @@
62#define GPIO93_CAM_RESET (93) 63#define GPIO93_CAM_RESET (93)
63#define GPIO41_ETHIRQ (41) 64#define GPIO41_ETHIRQ (41)
64#define EM_X270_ETHIRQ IRQ_GPIO(GPIO41_ETHIRQ) 65#define EM_X270_ETHIRQ IRQ_GPIO(GPIO41_ETHIRQ)
66#define GPIO115_WLAN_PWEN (115)
67#define GPIO19_WLAN_STRAP (19)
65 68
66static int mmc_cd; 69static int mmc_cd;
67static int nand_rb; 70static int nand_rb;
@@ -159,8 +162,8 @@ static unsigned long common_pin_config[] = {
159 GPIO57_SSP1_TXD, 162 GPIO57_SSP1_TXD,
160 163
161 /* SSP2 */ 164 /* SSP2 */
162 GPIO19_SSP2_SCLK, 165 GPIO19_GPIO, /* SSP2 clock is used as GPIO for Libertas pin-strap */
163 GPIO14_SSP2_SFRM, 166 GPIO14_GPIO,
164 GPIO89_SSP2_TXD, 167 GPIO89_SSP2_TXD,
165 GPIO88_SSP2_RXD, 168 GPIO88_SSP2_RXD,
166 169
@@ -640,28 +643,95 @@ static struct pxa2xx_spi_master em_x270_spi_info = {
640}; 643};
641 644
642static struct pxa2xx_spi_chip em_x270_tdo24m_chip = { 645static struct pxa2xx_spi_chip em_x270_tdo24m_chip = {
643 .rx_threshold = 1, 646 .rx_threshold = 1,
644 .tx_threshold = 1, 647 .tx_threshold = 1,
648 .gpio_cs = -1,
645}; 649};
646 650
647static struct tdo24m_platform_data em_x270_tdo24m_pdata = { 651static struct tdo24m_platform_data em_x270_tdo24m_pdata = {
648 .model = TDO35S, 652 .model = TDO35S,
649}; 653};
650 654
655static struct pxa2xx_spi_master em_x270_spi_2_info = {
656 .num_chipselect = 1,
657 .enable_dma = 1,
658};
659
660static struct pxa2xx_spi_chip em_x270_libertas_chip = {
661 .rx_threshold = 1,
662 .tx_threshold = 1,
663 .timeout = 1000,
664};
665
666static unsigned long em_x270_libertas_pin_config[] = {
667 /* SSP2 */
668 GPIO19_SSP2_SCLK,
669 GPIO14_GPIO,
670 GPIO89_SSP2_TXD,
671 GPIO88_SSP2_RXD,
672};
673
674static int em_x270_libertas_setup(struct spi_device *spi)
675{
676 int err = gpio_request(GPIO115_WLAN_PWEN, "WLAN PWEN");
677 if (err)
678 return err;
679
680 gpio_direction_output(GPIO19_WLAN_STRAP, 1);
681 mdelay(100);
682
683 pxa2xx_mfp_config(ARRAY_AND_SIZE(em_x270_libertas_pin_config));
684
685 gpio_direction_output(GPIO115_WLAN_PWEN, 0);
686 mdelay(100);
687 gpio_set_value(GPIO115_WLAN_PWEN, 1);
688 mdelay(100);
689
690 spi->bits_per_word = 16;
691 spi_setup(spi);
692
693 return 0;
694}
695
696static int em_x270_libertas_teardown(struct spi_device *spi)
697{
698 gpio_set_value(GPIO115_WLAN_PWEN, 0);
699 gpio_free(GPIO115_WLAN_PWEN);
700
701 return 0;
702}
703
704struct libertas_spi_platform_data em_x270_libertas_pdata = {
705 .use_dummy_writes = 1,
706 .gpio_cs = 14,
707 .setup = em_x270_libertas_setup,
708 .teardown = em_x270_libertas_teardown,
709};
710
651static struct spi_board_info em_x270_spi_devices[] __initdata = { 711static struct spi_board_info em_x270_spi_devices[] __initdata = {
652 { 712 {
653 .modalias = "tdo24m", 713 .modalias = "tdo24m",
654 .max_speed_hz = 1000000, 714 .max_speed_hz = 1000000,
655 .bus_num = 1, 715 .bus_num = 1,
656 .chip_select = 0, 716 .chip_select = 0,
657 .controller_data = &em_x270_tdo24m_chip, 717 .controller_data = &em_x270_tdo24m_chip,
658 .platform_data = &em_x270_tdo24m_pdata, 718 .platform_data = &em_x270_tdo24m_pdata,
719 },
720 {
721 .modalias = "libertas_spi",
722 .max_speed_hz = 13000000,
723 .bus_num = 2,
724 .irq = IRQ_GPIO(116),
725 .chip_select = 0,
726 .controller_data = &em_x270_libertas_chip,
727 .platform_data = &em_x270_libertas_pdata,
659 }, 728 },
660}; 729};
661 730
662static void __init em_x270_init_spi(void) 731static void __init em_x270_init_spi(void)
663{ 732{
664 pxa2xx_set_spi_info(1, &em_x270_spi_info); 733 pxa2xx_set_spi_info(1, &em_x270_spi_info);
734 pxa2xx_set_spi_info(2, &em_x270_spi_2_info);
665 spi_register_board_info(ARRAY_AND_SIZE(em_x270_spi_devices)); 735 spi_register_board_info(ARRAY_AND_SIZE(em_x270_spi_devices));
666} 736}
667#else 737#else
diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h
index 3465268ca716..485fede83d97 100644
--- a/arch/arm/mach-pxa/generic.h
+++ b/arch/arm/mach-pxa/generic.h
@@ -15,6 +15,9 @@ extern struct sys_timer pxa_timer;
15extern void __init pxa_init_irq(int irq_nr, 15extern void __init pxa_init_irq(int irq_nr,
16 int (*set_wake)(unsigned int, unsigned int)); 16 int (*set_wake)(unsigned int, unsigned int));
17extern void __init pxa25x_init_irq(void); 17extern void __init pxa25x_init_irq(void);
18#ifdef CONFIG_CPU_PXA26x
19extern void __init pxa26x_init_irq(void);
20#endif
18extern void __init pxa27x_init_irq(void); 21extern void __init pxa27x_init_irq(void);
19extern void __init pxa3xx_init_irq(void); 22extern void __init pxa3xx_init_irq(void);
20extern void __init pxa_map_io(void); 23extern void __init pxa_map_io(void);
diff --git a/arch/arm/mach-pxa/include/mach/colibri.h b/arch/arm/mach-pxa/include/mach/colibri.h
index 3f2a01d6a03c..a88d7caff0d1 100644
--- a/arch/arm/mach-pxa/include/mach/colibri.h
+++ b/arch/arm/mach-pxa/include/mach/colibri.h
@@ -1,5 +1,8 @@
1#ifndef _COLIBRI_H_ 1#ifndef _COLIBRI_H_
2#define _COLIBRI_H_ 2#define _COLIBRI_H_
3
4#include <net/ax88796.h>
5
3/* 6/*
4 * common settings for all modules 7 * common settings for all modules
5 */ 8 */
@@ -7,13 +10,17 @@
7#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE) 10#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
8extern void colibri_pxa3xx_init_mmc(mfp_cfg_t *pins, int len, int detect_pin); 11extern void colibri_pxa3xx_init_mmc(mfp_cfg_t *pins, int len, int detect_pin);
9#else 12#else
10static inline void colibri_pxa3xx_init_mmc(mfp_cfg_t *, int, int) {} 13static inline void colibri_pxa3xx_init_mmc(mfp_cfg_t *pins, int len, int detect_pin) {}
11#endif 14#endif
12 15
13#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) 16#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
14extern void colibri_pxa3xx_init_lcd(int bl_pin); 17extern void colibri_pxa3xx_init_lcd(int bl_pin);
15#else 18#else
16static inline void colibri_pxa3xx_init_lcd(int) {} 19static inline void colibri_pxa3xx_init_lcd(int bl_pin) {}
20#endif
21
22#if defined(CONFIG_AX88796)
23extern void colibri_pxa3xx_init_eth(struct ax_plat_data *plat_data);
17#endif 24#endif
18 25
19/* physical memory regions */ 26/* physical memory regions */
diff --git a/arch/arm/mach-pxa/include/mach/magician.h b/arch/arm/mach-pxa/include/mach/magician.h
index 82a399f3f9f2..20ef37d4a9a7 100644
--- a/arch/arm/mach-pxa/include/mach/magician.h
+++ b/arch/arm/mach-pxa/include/mach/magician.h
@@ -27,7 +27,7 @@
27#define GPIO22_MAGICIAN_VIBRA_EN 22 27#define GPIO22_MAGICIAN_VIBRA_EN 22
28#define GPIO26_MAGICIAN_GSM_POWER 26 28#define GPIO26_MAGICIAN_GSM_POWER 26
29#define GPIO27_MAGICIAN_USBC_PUEN 27 29#define GPIO27_MAGICIAN_USBC_PUEN 27
30#define GPIO30_MAGICIAN_nCHARGE_EN 30 30#define GPIO30_MAGICIAN_BQ24022_nCHARGE_EN 30
31#define GPIO37_MAGICIAN_KEY_HANGUP 37 31#define GPIO37_MAGICIAN_KEY_HANGUP 37
32#define GPIO38_MAGICIAN_KEY_CONTACTS 38 32#define GPIO38_MAGICIAN_KEY_CONTACTS 38
33#define GPIO40_MAGICIAN_GSM_OUT2 40 33#define GPIO40_MAGICIAN_GSM_OUT2 40
@@ -98,7 +98,7 @@
98#define EGPIO_MAGICIAN_UNKNOWN_WAVEDEV_DLL MAGICIAN_EGPIO(2, 2) 98#define EGPIO_MAGICIAN_UNKNOWN_WAVEDEV_DLL MAGICIAN_EGPIO(2, 2)
99#define EGPIO_MAGICIAN_FLASH_VPP MAGICIAN_EGPIO(2, 3) 99#define EGPIO_MAGICIAN_FLASH_VPP MAGICIAN_EGPIO(2, 3)
100#define EGPIO_MAGICIAN_BL_POWER2 MAGICIAN_EGPIO(2, 4) 100#define EGPIO_MAGICIAN_BL_POWER2 MAGICIAN_EGPIO(2, 4)
101#define EGPIO_MAGICIAN_CHARGE_EN MAGICIAN_EGPIO(2, 5) 101#define EGPIO_MAGICIAN_BQ24022_ISET2 MAGICIAN_EGPIO(2, 5)
102#define EGPIO_MAGICIAN_GSM_POWER MAGICIAN_EGPIO(2, 7) 102#define EGPIO_MAGICIAN_GSM_POWER MAGICIAN_EGPIO(2, 7)
103 103
104/* input */ 104/* input */
diff --git a/arch/arm/mach-pxa/include/mach/palmld.h b/arch/arm/mach-pxa/include/mach/palmld.h
index 7c295a48d784..fb13c82ad6dc 100644
--- a/arch/arm/mach-pxa/include/mach/palmld.h
+++ b/arch/arm/mach-pxa/include/mach/palmld.h
@@ -87,6 +87,7 @@
87#define PALMLD_IDE_SIZE 0x00100000 87#define PALMLD_IDE_SIZE 0x00100000
88 88
89#define PALMLD_PHYS_IO_START 0x40000000 89#define PALMLD_PHYS_IO_START 0x40000000
90#define PALMLD_STR_BASE 0xa0200000
90 91
91/* BATTERY */ 92/* BATTERY */
92#define PALMLD_BAT_MAX_VOLTAGE 4000 /* 4.00V maximum voltage */ 93#define PALMLD_BAT_MAX_VOLTAGE 4000 /* 4.00V maximum voltage */
diff --git a/arch/arm/mach-pxa/include/mach/palmt5.h b/arch/arm/mach-pxa/include/mach/palmt5.h
index 94db2881f048..d15662aba008 100644
--- a/arch/arm/mach-pxa/include/mach/palmt5.h
+++ b/arch/arm/mach-pxa/include/mach/palmt5.h
@@ -37,7 +37,6 @@
37 37
38/* USB */ 38/* USB */
39#define GPIO_NR_PALMT5_USB_DETECT_N 15 39#define GPIO_NR_PALMT5_USB_DETECT_N 15
40#define GPIO_NR_PALMT5_USB_POWER 95
41#define GPIO_NR_PALMT5_USB_PULLUP 93 40#define GPIO_NR_PALMT5_USB_PULLUP 93
42 41
43/* LCD/BACKLIGHT */ 42/* LCD/BACKLIGHT */
@@ -59,6 +58,7 @@
59/* Various addresses */ 58/* Various addresses */
60#define PALMT5_PHYS_RAM_START 0xa0000000 59#define PALMT5_PHYS_RAM_START 0xa0000000
61#define PALMT5_PHYS_IO_START 0x40000000 60#define PALMT5_PHYS_IO_START 0x40000000
61#define PALMT5_STR_BASE 0xa0200000
62 62
63/* TOUCHSCREEN */ 63/* TOUCHSCREEN */
64#define AC97_LINK_FRAME 21 64#define AC97_LINK_FRAME 21
diff --git a/arch/arm/mach-pxa/include/mach/palmte2.h b/arch/arm/mach-pxa/include/mach/palmte2.h
new file mode 100644
index 000000000000..12361341f9d8
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/palmte2.h
@@ -0,0 +1,68 @@
1/*
2 * GPIOs and interrupts for Palm Tungsten|E2 Handheld Computer
3 *
4 * Author:
5 * Carlos Eduardo Medaglia Dyonisio <cadu@nerdfeliz.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 */
12
13#ifndef _INCLUDE_PALMTE2_H_
14#define _INCLUDE_PALMTE2_H_
15
16/** HERE ARE GPIOs **/
17
18/* GPIOs */
19#define GPIO_NR_PALMTE2_POWER_DETECT 9
20#define GPIO_NR_PALMTE2_HOTSYNC_BUTTON_N 4
21#define GPIO_NR_PALMTE2_EARPHONE_DETECT 15
22
23/* SD/MMC */
24#define GPIO_NR_PALMTE2_SD_DETECT_N 10
25#define GPIO_NR_PALMTE2_SD_POWER 55
26#define GPIO_NR_PALMTE2_SD_READONLY 51
27
28/* IRDA - disable GPIO connected to SD pin of tranceiver (TFBS4710?) ? */
29#define GPIO_NR_PALMTE2_IR_DISABLE 48
30
31/* USB */
32#define GPIO_NR_PALMTE2_USB_DETECT_N 35
33#define GPIO_NR_PALMTE2_USB_PULLUP 53
34
35/* LCD/BACKLIGHT */
36#define GPIO_NR_PALMTE2_BL_POWER 56
37#define GPIO_NR_PALMTE2_LCD_POWER 37
38
39/* KEYS */
40#define GPIO_NR_PALMTE2_KEY_NOTES 5
41#define GPIO_NR_PALMTE2_KEY_TASKS 7
42#define GPIO_NR_PALMTE2_KEY_CALENDAR 11
43#define GPIO_NR_PALMTE2_KEY_CONTACTS 13
44#define GPIO_NR_PALMTE2_KEY_CENTER 14
45#define GPIO_NR_PALMTE2_KEY_LEFT 19
46#define GPIO_NR_PALMTE2_KEY_RIGHT 20
47#define GPIO_NR_PALMTE2_KEY_DOWN 21
48#define GPIO_NR_PALMTE2_KEY_UP 22
49
50/** HERE ARE INIT VALUES **/
51
52/* BACKLIGHT */
53#define PALMTE2_MAX_INTENSITY 0xFE
54#define PALMTE2_DEFAULT_INTENSITY 0x7E
55#define PALMTE2_LIMIT_MASK 0x7F
56#define PALMTE2_PRESCALER 0x3F
57#define PALMTE2_PERIOD_NS 3500
58
59/* BATTERY */
60#define PALMTE2_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */
61#define PALMTE2_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */
62#define PALMTE2_BAT_MAX_CURRENT 0 /* unknokn */
63#define PALMTE2_BAT_MIN_CURRENT 0 /* unknown */
64#define PALMTE2_BAT_MAX_CHARGE 1 /* unknown */
65#define PALMTE2_BAT_MIN_CHARGE 1 /* unknown */
66#define PALMTE2_MAX_LIFE_MINS 360 /* on-life in minutes */
67
68#endif
diff --git a/arch/arm/mach-pxa/include/mach/palmtx.h b/arch/arm/mach-pxa/include/mach/palmtx.h
index 1e8bccbda510..e74082c872e1 100644
--- a/arch/arm/mach-pxa/include/mach/palmtx.h
+++ b/arch/arm/mach-pxa/include/mach/palmtx.h
@@ -38,7 +38,6 @@
38 38
39/* USB */ 39/* USB */
40#define GPIO_NR_PALMTX_USB_DETECT_N 13 40#define GPIO_NR_PALMTX_USB_DETECT_N 13
41#define GPIO_NR_PALMTX_USB_POWER 95
42#define GPIO_NR_PALMTX_USB_PULLUP 93 41#define GPIO_NR_PALMTX_USB_PULLUP 93
43 42
44/* LCD/BACKLIGHT */ 43/* LCD/BACKLIGHT */
@@ -78,6 +77,8 @@
78#define PALMTX_PHYS_RAM_START 0xa0000000 77#define PALMTX_PHYS_RAM_START 0xa0000000
79#define PALMTX_PHYS_IO_START 0x40000000 78#define PALMTX_PHYS_IO_START 0x40000000
80 79
80#define PALMTX_STR_BASE 0xa0200000
81
81#define PALMTX_PHYS_FLASH_START PXA_CS0_PHYS /* ChipSelect 0 */ 82#define PALMTX_PHYS_FLASH_START PXA_CS0_PHYS /* ChipSelect 0 */
82#define PALMTX_PHYS_NAND_START PXA_CS1_PHYS /* ChipSelect 1 */ 83#define PALMTX_PHYS_NAND_START PXA_CS1_PHYS /* ChipSelect 1 */
83 84
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c
index deeea1c2782b..c899bbd94dc0 100644
--- a/arch/arm/mach-pxa/magician.c
+++ b/arch/arm/mach-pxa/magician.c
@@ -25,6 +25,8 @@
25#include <linux/mtd/physmap.h> 25#include <linux/mtd/physmap.h>
26#include <linux/pda_power.h> 26#include <linux/pda_power.h>
27#include <linux/pwm_backlight.h> 27#include <linux/pwm_backlight.h>
28#include <linux/regulator/bq24022.h>
29#include <linux/regulator/machine.h>
28#include <linux/usb/gpio_vbus.h> 30#include <linux/usb/gpio_vbus.h>
29 31
30#include <mach/hardware.h> 32#include <mach/hardware.h>
@@ -552,33 +554,7 @@ static struct platform_device gpio_vbus = {
552 554
553static int power_supply_init(struct device *dev) 555static int power_supply_init(struct device *dev)
554{ 556{
555 int ret; 557 return gpio_request(EGPIO_MAGICIAN_CABLE_STATE_AC, "CABLE_STATE_AC");
556
557 ret = gpio_request(EGPIO_MAGICIAN_CABLE_STATE_AC, "CABLE_STATE_AC");
558 if (ret)
559 goto err_cs_ac;
560 ret = gpio_request(EGPIO_MAGICIAN_CABLE_STATE_USB, "CABLE_STATE_USB");
561 if (ret)
562 goto err_cs_usb;
563 ret = gpio_request(EGPIO_MAGICIAN_CHARGE_EN, "CHARGE_EN");
564 if (ret)
565 goto err_chg_en;
566 ret = gpio_request(GPIO30_MAGICIAN_nCHARGE_EN, "nCHARGE_EN");
567 if (!ret)
568 ret = gpio_direction_output(GPIO30_MAGICIAN_nCHARGE_EN, 0);
569 if (ret)
570 goto err_nchg_en;
571
572 return 0;
573
574err_nchg_en:
575 gpio_free(EGPIO_MAGICIAN_CHARGE_EN);
576err_chg_en:
577 gpio_free(EGPIO_MAGICIAN_CABLE_STATE_USB);
578err_cs_usb:
579 gpio_free(EGPIO_MAGICIAN_CABLE_STATE_AC);
580err_cs_ac:
581 return ret;
582} 558}
583 559
584static int magician_is_ac_online(void) 560static int magician_is_ac_online(void)
@@ -586,22 +562,8 @@ static int magician_is_ac_online(void)
586 return gpio_get_value(EGPIO_MAGICIAN_CABLE_STATE_AC); 562 return gpio_get_value(EGPIO_MAGICIAN_CABLE_STATE_AC);
587} 563}
588 564
589static int magician_is_usb_online(void)
590{
591 return gpio_get_value(EGPIO_MAGICIAN_CABLE_STATE_USB);
592}
593
594static void magician_set_charge(int flags)
595{
596 gpio_set_value(GPIO30_MAGICIAN_nCHARGE_EN, !flags);
597 gpio_set_value(EGPIO_MAGICIAN_CHARGE_EN, flags);
598}
599
600static void power_supply_exit(struct device *dev) 565static void power_supply_exit(struct device *dev)
601{ 566{
602 gpio_free(GPIO30_MAGICIAN_nCHARGE_EN);
603 gpio_free(EGPIO_MAGICIAN_CHARGE_EN);
604 gpio_free(EGPIO_MAGICIAN_CABLE_STATE_USB);
605 gpio_free(EGPIO_MAGICIAN_CABLE_STATE_AC); 567 gpio_free(EGPIO_MAGICIAN_CABLE_STATE_AC);
606} 568}
607 569
@@ -612,8 +574,6 @@ static char *magician_supplicants[] = {
612static struct pda_power_pdata power_supply_info = { 574static struct pda_power_pdata power_supply_info = {
613 .init = power_supply_init, 575 .init = power_supply_init,
614 .is_ac_online = magician_is_ac_online, 576 .is_ac_online = magician_is_ac_online,
615 .is_usb_online = magician_is_usb_online,
616 .set_charge = magician_set_charge,
617 .exit = power_supply_exit, 577 .exit = power_supply_exit,
618 .supplied_to = magician_supplicants, 578 .supplied_to = magician_supplicants,
619 .num_supplicants = ARRAY_SIZE(magician_supplicants), 579 .num_supplicants = ARRAY_SIZE(magician_supplicants),
@@ -646,6 +606,43 @@ static struct platform_device power_supply = {
646 .num_resources = ARRAY_SIZE(power_supply_resources), 606 .num_resources = ARRAY_SIZE(power_supply_resources),
647}; 607};
648 608
609/*
610 * Battery charger
611 */
612
613static struct regulator_consumer_supply bq24022_consumers[] = {
614 {
615 .dev = &gpio_vbus.dev,
616 .supply = "vbus_draw",
617 },
618 {
619 .dev = &power_supply.dev,
620 .supply = "ac_draw",
621 },
622};
623
624static struct regulator_init_data bq24022_init_data = {
625 .constraints = {
626 .max_uA = 500000,
627 .valid_ops_mask = REGULATOR_CHANGE_CURRENT,
628 },
629 .num_consumer_supplies = ARRAY_SIZE(bq24022_consumers),
630 .consumer_supplies = bq24022_consumers,
631};
632
633static struct bq24022_mach_info bq24022_info = {
634 .gpio_nce = GPIO30_MAGICIAN_BQ24022_nCHARGE_EN,
635 .gpio_iset2 = EGPIO_MAGICIAN_BQ24022_ISET2,
636 .init_data = &bq24022_init_data,
637};
638
639static struct platform_device bq24022 = {
640 .name = "bq24022",
641 .id = -1,
642 .dev = {
643 .platform_data = &bq24022_info,
644 },
645};
649 646
650/* 647/*
651 * MMC/SD 648 * MMC/SD
@@ -756,6 +753,7 @@ static struct platform_device *devices[] __initdata = {
756 &egpio, 753 &egpio,
757 &backlight, 754 &backlight,
758 &pasic3, 755 &pasic3,
756 &bq24022,
759 &gpio_vbus, 757 &gpio_vbus,
760 &power_supply, 758 &power_supply,
761 &strataflash, 759 &strataflash,
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index 97c93a7a285c..9203b069b35c 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -50,6 +50,7 @@
50#include <mach/pxa27x-udc.h> 50#include <mach/pxa27x-udc.h>
51#include <mach/i2c.h> 51#include <mach/i2c.h>
52#include <mach/camera.h> 52#include <mach/camera.h>
53#include <mach/audio.h>
53#include <media/soc_camera.h> 54#include <media/soc_camera.h>
54 55
55#include <mach/mioa701.h> 56#include <mach/mioa701.h>
@@ -763,8 +764,6 @@ MIO_PARENT_DEV(mioa701_backlight, "pwm-backlight", &pxa27x_device_pwm0.dev,
763 &mioa701_backlight_data); 764 &mioa701_backlight_data);
764MIO_SIMPLE_DEV(mioa701_led, "leds-gpio", &gpio_led_info) 765MIO_SIMPLE_DEV(mioa701_led, "leds-gpio", &gpio_led_info)
765MIO_SIMPLE_DEV(pxa2xx_pcm, "pxa2xx-pcm", NULL) 766MIO_SIMPLE_DEV(pxa2xx_pcm, "pxa2xx-pcm", NULL)
766MIO_SIMPLE_DEV(pxa2xx_ac97, "pxa2xx-ac97", NULL)
767MIO_PARENT_DEV(mio_wm9713_codec, "wm9713-codec", &pxa2xx_ac97.dev, NULL)
768MIO_SIMPLE_DEV(mioa701_sound, "mioa701-wm9713", NULL) 767MIO_SIMPLE_DEV(mioa701_sound, "mioa701-wm9713", NULL)
769MIO_SIMPLE_DEV(mioa701_board, "mioa701-board", NULL) 768MIO_SIMPLE_DEV(mioa701_board, "mioa701-board", NULL)
770MIO_SIMPLE_DEV(gpio_vbus, "gpio-vbus", &gpio_vbus_data); 769MIO_SIMPLE_DEV(gpio_vbus, "gpio-vbus", &gpio_vbus_data);
@@ -774,8 +773,6 @@ static struct platform_device *devices[] __initdata = {
774 &mioa701_backlight, 773 &mioa701_backlight,
775 &mioa701_led, 774 &mioa701_led,
776 &pxa2xx_pcm, 775 &pxa2xx_pcm,
777 &pxa2xx_ac97,
778 &mio_wm9713_codec,
779 &mioa701_sound, 776 &mioa701_sound,
780 &power_dev, 777 &power_dev,
781 &strataflash, 778 &strataflash,
@@ -818,6 +815,7 @@ static void __init mioa701_machine_init(void)
818 pxa_set_keypad_info(&mioa701_keypad_info); 815 pxa_set_keypad_info(&mioa701_keypad_info);
819 wm97xx_bat_set_pdata(&mioa701_battery_data); 816 wm97xx_bat_set_pdata(&mioa701_battery_data);
820 pxa_set_udc_info(&mioa701_udc_info); 817 pxa_set_udc_info(&mioa701_udc_info);
818 pxa_set_ac97_info(NULL);
821 pm_power_off = mioa701_poweroff; 819 pm_power_off = mioa701_poweroff;
822 arm_pm_restart = mioa701_restart; 820 arm_pm_restart = mioa701_restart;
823 platform_add_devices(devices, ARRAY_SIZE(devices)); 821 platform_add_devices(devices, ARRAY_SIZE(devices));
diff --git a/arch/arm/mach-pxa/palmld.c b/arch/arm/mach-pxa/palmld.c
index 8587477a9bb7..ecf5910e39d7 100644
--- a/arch/arm/mach-pxa/palmld.c
+++ b/arch/arm/mach-pxa/palmld.c
@@ -24,6 +24,7 @@
24#include <linux/gpio.h> 24#include <linux/gpio.h>
25#include <linux/wm97xx_batt.h> 25#include <linux/wm97xx_batt.h>
26#include <linux/power_supply.h> 26#include <linux/power_supply.h>
27#include <linux/sysdev.h>
27 28
28#include <asm/mach-types.h> 29#include <asm/mach-types.h>
29#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
@@ -68,10 +69,10 @@ static unsigned long palmld_pin_config[] __initdata = {
68 GPIO47_FICP_TXD, 69 GPIO47_FICP_TXD,
69 70
70 /* MATRIX KEYPAD */ 71 /* MATRIX KEYPAD */
71 GPIO100_KP_MKIN_0, 72 GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
72 GPIO101_KP_MKIN_1, 73 GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH,
73 GPIO102_KP_MKIN_2, 74 GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH,
74 GPIO97_KP_MKIN_3, 75 GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH,
75 GPIO103_KP_MKOUT_0, 76 GPIO103_KP_MKOUT_0,
76 GPIO104_KP_MKOUT_1, 77 GPIO104_KP_MKOUT_1,
77 GPIO105_KP_MKOUT_2, 78 GPIO105_KP_MKOUT_2,
@@ -507,6 +508,33 @@ static struct pxafb_mach_info palmld_lcd_screen = {
507}; 508};
508 509
509/****************************************************************************** 510/******************************************************************************
511 * Power management - standby
512 ******************************************************************************/
513#ifdef CONFIG_PM
514static u32 *addr __initdata;
515static u32 resume[3] __initdata = {
516 0xe3a00101, /* mov r0, #0x40000000 */
517 0xe380060f, /* orr r0, r0, #0x00f00000 */
518 0xe590f008, /* ldr pc, [r0, #0x08] */
519};
520
521static int __init palmld_pm_init(void)
522{
523 int i;
524
525 /* this is where the bootloader jumps */
526 addr = phys_to_virt(PALMLD_STR_BASE);
527
528 for (i = 0; i < 3; i++)
529 addr[i] = resume[i];
530
531 return 0;
532}
533
534device_initcall(palmld_pm_init);
535#endif
536
537/******************************************************************************
510 * Machine init 538 * Machine init
511 ******************************************************************************/ 539 ******************************************************************************/
512static struct platform_device *devices[] __initdata = { 540static struct platform_device *devices[] __initdata = {
diff --git a/arch/arm/mach-pxa/palmt5.c b/arch/arm/mach-pxa/palmt5.c
index 9521c7b33492..d7f81068c613 100644
--- a/arch/arm/mach-pxa/palmt5.c
+++ b/arch/arm/mach-pxa/palmt5.c
@@ -64,6 +64,7 @@ static unsigned long palmt5_pin_config[] __initdata = {
64 GPIO29_AC97_SDATA_IN_0, 64 GPIO29_AC97_SDATA_IN_0,
65 GPIO30_AC97_SDATA_OUT, 65 GPIO30_AC97_SDATA_OUT,
66 GPIO31_AC97_SYNC, 66 GPIO31_AC97_SYNC,
67 GPIO95_AC97_nRESET,
67 68
68 /* IrDA */ 69 /* IrDA */
69 GPIO40_GPIO, /* ir disable */ 70 GPIO40_GPIO, /* ir disable */
@@ -72,13 +73,13 @@ static unsigned long palmt5_pin_config[] __initdata = {
72 73
73 /* USB */ 74 /* USB */
74 GPIO15_GPIO, /* usb detect */ 75 GPIO15_GPIO, /* usb detect */
75 GPIO95_GPIO, /* usb power */ 76 GPIO93_GPIO, /* usb power */
76 77
77 /* MATRIX KEYPAD */ 78 /* MATRIX KEYPAD */
78 GPIO100_KP_MKIN_0, 79 GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
79 GPIO101_KP_MKIN_1, 80 GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH,
80 GPIO102_KP_MKIN_2, 81 GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH,
81 GPIO97_KP_MKIN_3, 82 GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH,
82 GPIO103_KP_MKOUT_0, 83 GPIO103_KP_MKOUT_0,
83 GPIO104_KP_MKOUT_1, 84 GPIO104_KP_MKOUT_1,
84 GPIO105_KP_MKOUT_2, 85 GPIO105_KP_MKOUT_2,
@@ -344,7 +345,7 @@ static struct pxaficp_platform_data palmt5_ficp_platform_data = {
344static struct pxa2xx_udc_mach_info palmt5_udc_info __initdata = { 345static struct pxa2xx_udc_mach_info palmt5_udc_info __initdata = {
345 .gpio_vbus = GPIO_NR_PALMT5_USB_DETECT_N, 346 .gpio_vbus = GPIO_NR_PALMT5_USB_DETECT_N,
346 .gpio_vbus_inverted = 1, 347 .gpio_vbus_inverted = 1,
347 .gpio_pullup = GPIO_NR_PALMT5_USB_POWER, 348 .gpio_pullup = GPIO_NR_PALMT5_USB_PULLUP,
348 .gpio_pullup_inverted = 0, 349 .gpio_pullup_inverted = 0,
349}; 350};
350 351
@@ -450,6 +451,33 @@ static struct pxafb_mach_info palmt5_lcd_screen = {
450}; 451};
451 452
452/****************************************************************************** 453/******************************************************************************
454 * Power management - standby
455 ******************************************************************************/
456#ifdef CONFIG_PM
457static u32 *addr __initdata;
458static u32 resume[3] __initdata = {
459 0xe3a00101, /* mov r0, #0x40000000 */
460 0xe380060f, /* orr r0, r0, #0x00f00000 */
461 0xe590f008, /* ldr pc, [r0, #0x08] */
462};
463
464static int __init palmt5_pm_init(void)
465{
466 int i;
467
468 /* this is where the bootloader jumps */
469 addr = phys_to_virt(PALMT5_STR_BASE);
470
471 for (i = 0; i < 3; i++)
472 addr[i] = resume[i];
473
474 return 0;
475}
476
477device_initcall(palmt5_pm_init);
478#endif
479
480/******************************************************************************
453 * Machine init 481 * Machine init
454 ******************************************************************************/ 482 ******************************************************************************/
455static struct platform_device *devices[] __initdata = { 483static struct platform_device *devices[] __initdata = {
@@ -463,9 +491,9 @@ static struct platform_device *devices[] __initdata = {
463/* setup udc GPIOs initial state */ 491/* setup udc GPIOs initial state */
464static void __init palmt5_udc_init(void) 492static void __init palmt5_udc_init(void)
465{ 493{
466 if (!gpio_request(GPIO_NR_PALMT5_USB_POWER, "UDC Vbus")) { 494 if (!gpio_request(GPIO_NR_PALMT5_USB_PULLUP, "UDC Vbus")) {
467 gpio_direction_output(GPIO_NR_PALMT5_USB_POWER, 1); 495 gpio_direction_output(GPIO_NR_PALMT5_USB_PULLUP, 1);
468 gpio_free(GPIO_NR_PALMT5_USB_POWER); 496 gpio_free(GPIO_NR_PALMT5_USB_PULLUP);
469 } 497 }
470} 498}
471 499
diff --git a/arch/arm/mach-pxa/palmte2.c b/arch/arm/mach-pxa/palmte2.c
new file mode 100644
index 000000000000..43fcf2e86887
--- /dev/null
+++ b/arch/arm/mach-pxa/palmte2.c
@@ -0,0 +1,466 @@
1/*
2 * Hardware definitions for Palm Tungsten|E2
3 *
4 * Author:
5 * Carlos Eduardo Medaglia Dyonisio <cadu@nerdfeliz.com>
6 *
7 * Rewrite for mainline:
8 * Marek Vasut <marek.vasut@gmail.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * (find more info at www.hackndev.com)
15 *
16 */
17
18#include <linux/platform_device.h>
19#include <linux/delay.h>
20#include <linux/irq.h>
21#include <linux/gpio_keys.h>
22#include <linux/input.h>
23#include <linux/pda_power.h>
24#include <linux/pwm_backlight.h>
25#include <linux/gpio.h>
26#include <linux/wm97xx_batt.h>
27#include <linux/power_supply.h>
28
29#include <asm/mach-types.h>
30#include <asm/mach/arch.h>
31#include <asm/mach/map.h>
32
33#include <mach/audio.h>
34#include <mach/palmte2.h>
35#include <mach/mmc.h>
36#include <mach/pxafb.h>
37#include <mach/mfp-pxa25x.h>
38#include <mach/irda.h>
39#include <mach/udc.h>
40
41#include "generic.h"
42#include "devices.h"
43
44/******************************************************************************
45 * Pin configuration
46 ******************************************************************************/
47static unsigned long palmte2_pin_config[] __initdata = {
48 /* MMC */
49 GPIO6_MMC_CLK,
50 GPIO8_MMC_CS0,
51 GPIO10_GPIO, /* SD detect */
52 GPIO55_GPIO, /* SD power */
53 GPIO51_GPIO, /* SD r/o switch */
54
55 /* AC97 */
56 GPIO28_AC97_BITCLK,
57 GPIO29_AC97_SDATA_IN_0,
58 GPIO30_AC97_SDATA_OUT,
59 GPIO31_AC97_SYNC,
60
61 /* PWM */
62 GPIO16_PWM0_OUT,
63
64 /* USB */
65 GPIO15_GPIO, /* usb detect */
66 GPIO53_GPIO, /* usb power */
67
68 /* IrDA */
69 GPIO48_GPIO, /* ir disable */
70 GPIO46_FICP_RXD,
71 GPIO47_FICP_TXD,
72
73 /* LCD */
74 GPIO58_LCD_LDD_0,
75 GPIO59_LCD_LDD_1,
76 GPIO60_LCD_LDD_2,
77 GPIO61_LCD_LDD_3,
78 GPIO62_LCD_LDD_4,
79 GPIO63_LCD_LDD_5,
80 GPIO64_LCD_LDD_6,
81 GPIO65_LCD_LDD_7,
82 GPIO66_LCD_LDD_8,
83 GPIO67_LCD_LDD_9,
84 GPIO68_LCD_LDD_10,
85 GPIO69_LCD_LDD_11,
86 GPIO70_LCD_LDD_12,
87 GPIO71_LCD_LDD_13,
88 GPIO72_LCD_LDD_14,
89 GPIO73_LCD_LDD_15,
90 GPIO74_LCD_FCLK,
91 GPIO75_LCD_LCLK,
92 GPIO76_LCD_PCLK,
93 GPIO77_LCD_BIAS,
94
95 /* GPIO KEYS */
96 GPIO5_GPIO, /* notes */
97 GPIO7_GPIO, /* tasks */
98 GPIO11_GPIO, /* calendar */
99 GPIO13_GPIO, /* contacts */
100 GPIO14_GPIO, /* center */
101 GPIO19_GPIO, /* left */
102 GPIO20_GPIO, /* right */
103 GPIO21_GPIO, /* down */
104 GPIO22_GPIO, /* up */
105
106 /* MISC */
107 GPIO1_RST, /* reset */
108 GPIO4_GPIO, /* Hotsync button */
109 GPIO9_GPIO, /* power detect */
110 GPIO37_GPIO, /* LCD power */
111 GPIO56_GPIO, /* Backlight power */
112};
113
114/******************************************************************************
115 * SD/MMC card controller
116 ******************************************************************************/
117static int palmte2_mci_init(struct device *dev,
118 irq_handler_t palmte2_detect_int, void *data)
119{
120 int err = 0;
121
122 /* Setup an interrupt for detecting card insert/remove events */
123 err = gpio_request(GPIO_NR_PALMTE2_SD_DETECT_N, "SD IRQ");
124 if (err)
125 goto err;
126 err = gpio_direction_input(GPIO_NR_PALMTE2_SD_DETECT_N);
127 if (err)
128 goto err2;
129 err = request_irq(gpio_to_irq(GPIO_NR_PALMTE2_SD_DETECT_N),
130 palmte2_detect_int, IRQF_DISABLED | IRQF_SAMPLE_RANDOM |
131 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
132 "SD/MMC card detect", data);
133 if (err) {
134 printk(KERN_ERR "%s: cannot request SD/MMC card detect IRQ\n",
135 __func__);
136 goto err2;
137 }
138
139 err = gpio_request(GPIO_NR_PALMTE2_SD_POWER, "SD_POWER");
140 if (err)
141 goto err3;
142 err = gpio_direction_output(GPIO_NR_PALMTE2_SD_POWER, 0);
143 if (err)
144 goto err4;
145
146 err = gpio_request(GPIO_NR_PALMTE2_SD_READONLY, "SD_READONLY");
147 if (err)
148 goto err4;
149 err = gpio_direction_input(GPIO_NR_PALMTE2_SD_READONLY);
150 if (err)
151 goto err5;
152
153 printk(KERN_DEBUG "%s: irq registered\n", __func__);
154
155 return 0;
156
157err5:
158 gpio_free(GPIO_NR_PALMTE2_SD_READONLY);
159err4:
160 gpio_free(GPIO_NR_PALMTE2_SD_POWER);
161err3:
162 free_irq(gpio_to_irq(GPIO_NR_PALMTE2_SD_DETECT_N), data);
163err2:
164 gpio_free(GPIO_NR_PALMTE2_SD_DETECT_N);
165err:
166 return err;
167}
168
169static void palmte2_mci_exit(struct device *dev, void *data)
170{
171 gpio_free(GPIO_NR_PALMTE2_SD_READONLY);
172 gpio_free(GPIO_NR_PALMTE2_SD_POWER);
173 free_irq(gpio_to_irq(GPIO_NR_PALMTE2_SD_DETECT_N), data);
174 gpio_free(GPIO_NR_PALMTE2_SD_DETECT_N);
175}
176
177static void palmte2_mci_power(struct device *dev, unsigned int vdd)
178{
179 struct pxamci_platform_data *p_d = dev->platform_data;
180 gpio_set_value(GPIO_NR_PALMTE2_SD_POWER, p_d->ocr_mask & (1 << vdd));
181}
182
183static int palmte2_mci_get_ro(struct device *dev)
184{
185 return gpio_get_value(GPIO_NR_PALMTE2_SD_READONLY);
186}
187
188static struct pxamci_platform_data palmte2_mci_platform_data = {
189 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
190 .setpower = palmte2_mci_power,
191 .get_ro = palmte2_mci_get_ro,
192 .init = palmte2_mci_init,
193 .exit = palmte2_mci_exit,
194};
195
196/******************************************************************************
197 * GPIO keys
198 ******************************************************************************/
199static struct gpio_keys_button palmte2_pxa_buttons[] = {
200 {KEY_F1, GPIO_NR_PALMTE2_KEY_CONTACTS, 1, "Contacts" },
201 {KEY_F2, GPIO_NR_PALMTE2_KEY_CALENDAR, 1, "Calendar" },
202 {KEY_F3, GPIO_NR_PALMTE2_KEY_TASKS, 1, "Tasks" },
203 {KEY_F4, GPIO_NR_PALMTE2_KEY_NOTES, 1, "Notes" },
204 {KEY_ENTER, GPIO_NR_PALMTE2_KEY_CENTER, 1, "Center" },
205 {KEY_LEFT, GPIO_NR_PALMTE2_KEY_LEFT, 1, "Left" },
206 {KEY_RIGHT, GPIO_NR_PALMTE2_KEY_RIGHT, 1, "Right" },
207 {KEY_DOWN, GPIO_NR_PALMTE2_KEY_DOWN, 1, "Down" },
208 {KEY_UP, GPIO_NR_PALMTE2_KEY_UP, 1, "Up" },
209};
210
211static struct gpio_keys_platform_data palmte2_pxa_keys_data = {
212 .buttons = palmte2_pxa_buttons,
213 .nbuttons = ARRAY_SIZE(palmte2_pxa_buttons),
214};
215
216static struct platform_device palmte2_pxa_keys = {
217 .name = "gpio-keys",
218 .id = -1,
219 .dev = {
220 .platform_data = &palmte2_pxa_keys_data,
221 },
222};
223
224/******************************************************************************
225 * Backlight
226 ******************************************************************************/
227static int palmte2_backlight_init(struct device *dev)
228{
229 int ret;
230
231 ret = gpio_request(GPIO_NR_PALMTE2_BL_POWER, "BL POWER");
232 if (ret)
233 goto err;
234 ret = gpio_direction_output(GPIO_NR_PALMTE2_BL_POWER, 0);
235 if (ret)
236 goto err2;
237 ret = gpio_request(GPIO_NR_PALMTE2_LCD_POWER, "LCD POWER");
238 if (ret)
239 goto err2;
240 ret = gpio_direction_output(GPIO_NR_PALMTE2_LCD_POWER, 0);
241 if (ret)
242 goto err3;
243
244 return 0;
245err3:
246 gpio_free(GPIO_NR_PALMTE2_LCD_POWER);
247err2:
248 gpio_free(GPIO_NR_PALMTE2_BL_POWER);
249err:
250 return ret;
251}
252
253static int palmte2_backlight_notify(int brightness)
254{
255 gpio_set_value(GPIO_NR_PALMTE2_BL_POWER, brightness);
256 gpio_set_value(GPIO_NR_PALMTE2_LCD_POWER, brightness);
257 return brightness;
258}
259
260static void palmte2_backlight_exit(struct device *dev)
261{
262 gpio_free(GPIO_NR_PALMTE2_BL_POWER);
263 gpio_free(GPIO_NR_PALMTE2_LCD_POWER);
264}
265
266static struct platform_pwm_backlight_data palmte2_backlight_data = {
267 .pwm_id = 0,
268 .max_brightness = PALMTE2_MAX_INTENSITY,
269 .dft_brightness = PALMTE2_MAX_INTENSITY,
270 .pwm_period_ns = PALMTE2_PERIOD_NS,
271 .init = palmte2_backlight_init,
272 .notify = palmte2_backlight_notify,
273 .exit = palmte2_backlight_exit,
274};
275
276static struct platform_device palmte2_backlight = {
277 .name = "pwm-backlight",
278 .dev = {
279 .parent = &pxa25x_device_pwm0.dev,
280 .platform_data = &palmte2_backlight_data,
281 },
282};
283
284/******************************************************************************
285 * IrDA
286 ******************************************************************************/
287static int palmte2_irda_startup(struct device *dev)
288{
289 int err;
290 err = gpio_request(GPIO_NR_PALMTE2_IR_DISABLE, "IR DISABLE");
291 if (err)
292 goto err;
293 err = gpio_direction_output(GPIO_NR_PALMTE2_IR_DISABLE, 1);
294 if (err)
295 gpio_free(GPIO_NR_PALMTE2_IR_DISABLE);
296err:
297 return err;
298}
299
300static void palmte2_irda_shutdown(struct device *dev)
301{
302 gpio_free(GPIO_NR_PALMTE2_IR_DISABLE);
303}
304
305static void palmte2_irda_transceiver_mode(struct device *dev, int mode)
306{
307 gpio_set_value(GPIO_NR_PALMTE2_IR_DISABLE, mode & IR_OFF);
308 pxa2xx_transceiver_mode(dev, mode);
309}
310
311static struct pxaficp_platform_data palmte2_ficp_platform_data = {
312 .startup = palmte2_irda_startup,
313 .shutdown = palmte2_irda_shutdown,
314 .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
315 .transceiver_mode = palmte2_irda_transceiver_mode,
316};
317
318/******************************************************************************
319 * UDC
320 ******************************************************************************/
321static struct pxa2xx_udc_mach_info palmte2_udc_info __initdata = {
322 .gpio_vbus = GPIO_NR_PALMTE2_USB_DETECT_N,
323 .gpio_vbus_inverted = 1,
324 .gpio_pullup = GPIO_NR_PALMTE2_USB_PULLUP,
325 .gpio_pullup_inverted = 0,
326};
327
328/******************************************************************************
329 * Power supply
330 ******************************************************************************/
331static int power_supply_init(struct device *dev)
332{
333 int ret;
334
335 ret = gpio_request(GPIO_NR_PALMTE2_POWER_DETECT, "CABLE_STATE_AC");
336 if (ret)
337 goto err1;
338 ret = gpio_direction_input(GPIO_NR_PALMTE2_POWER_DETECT);
339 if (ret)
340 goto err2;
341
342 return 0;
343
344err2:
345 gpio_free(GPIO_NR_PALMTE2_POWER_DETECT);
346err1:
347 return ret;
348}
349
350static int palmte2_is_ac_online(void)
351{
352 return gpio_get_value(GPIO_NR_PALMTE2_POWER_DETECT);
353}
354
355static void power_supply_exit(struct device *dev)
356{
357 gpio_free(GPIO_NR_PALMTE2_POWER_DETECT);
358}
359
360static char *palmte2_supplicants[] = {
361 "main-battery",
362};
363
364static struct pda_power_pdata power_supply_info = {
365 .init = power_supply_init,
366 .is_ac_online = palmte2_is_ac_online,
367 .exit = power_supply_exit,
368 .supplied_to = palmte2_supplicants,
369 .num_supplicants = ARRAY_SIZE(palmte2_supplicants),
370};
371
372static struct platform_device power_supply = {
373 .name = "pda-power",
374 .id = -1,
375 .dev = {
376 .platform_data = &power_supply_info,
377 },
378};
379
380/******************************************************************************
381 * WM97xx battery
382 ******************************************************************************/
383static struct wm97xx_batt_info wm97xx_batt_pdata = {
384 .batt_aux = WM97XX_AUX_ID3,
385 .temp_aux = WM97XX_AUX_ID2,
386 .charge_gpio = -1,
387 .max_voltage = PALMTE2_BAT_MAX_VOLTAGE,
388 .min_voltage = PALMTE2_BAT_MIN_VOLTAGE,
389 .batt_mult = 1000,
390 .batt_div = 414,
391 .temp_mult = 1,
392 .temp_div = 1,
393 .batt_tech = POWER_SUPPLY_TECHNOLOGY_LIPO,
394 .batt_name = "main-batt",
395};
396
397/******************************************************************************
398 * Framebuffer
399 ******************************************************************************/
400static struct pxafb_mode_info palmte2_lcd_modes[] = {
401{
402 .pixclock = 77757,
403 .xres = 320,
404 .yres = 320,
405 .bpp = 16,
406
407 .left_margin = 28,
408 .right_margin = 7,
409 .upper_margin = 7,
410 .lower_margin = 5,
411
412 .hsync_len = 4,
413 .vsync_len = 1,
414},
415};
416
417static struct pxafb_mach_info palmte2_lcd_screen = {
418 .modes = palmte2_lcd_modes,
419 .num_modes = ARRAY_SIZE(palmte2_lcd_modes),
420 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
421};
422
423/******************************************************************************
424 * Machine init
425 ******************************************************************************/
426static struct platform_device *devices[] __initdata = {
427#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
428 &palmte2_pxa_keys,
429#endif
430 &palmte2_backlight,
431 &power_supply,
432};
433
434/* setup udc GPIOs initial state */
435static void __init palmte2_udc_init(void)
436{
437 if (!gpio_request(GPIO_NR_PALMTE2_USB_PULLUP, "UDC Vbus")) {
438 gpio_direction_output(GPIO_NR_PALMTE2_USB_PULLUP, 1);
439 gpio_free(GPIO_NR_PALMTE2_USB_PULLUP);
440 }
441}
442
443static void __init palmte2_init(void)
444{
445 pxa2xx_mfp_config(ARRAY_AND_SIZE(palmte2_pin_config));
446
447 set_pxa_fb_info(&palmte2_lcd_screen);
448 pxa_set_mci_info(&palmte2_mci_platform_data);
449 palmte2_udc_init();
450 pxa_set_udc_info(&palmte2_udc_info);
451 pxa_set_ac97_info(NULL);
452 pxa_set_ficp_info(&palmte2_ficp_platform_data);
453 wm97xx_bat_set_pdata(&wm97xx_batt_pdata);
454
455 platform_add_devices(devices, ARRAY_SIZE(devices));
456}
457
458MACHINE_START(PALMTE2, "Palm Tungsten|E2")
459 .phys_io = 0x40000000,
460 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
461 .boot_params = 0xa0000100,
462 .map_io = pxa_map_io,
463 .init_irq = pxa25x_init_irq,
464 .timer = &pxa_timer,
465 .init_machine = palmte2_init
466MACHINE_END
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c
index b490c0924619..14393d0ad8b8 100644
--- a/arch/arm/mach-pxa/palmtx.c
+++ b/arch/arm/mach-pxa/palmtx.c
@@ -64,6 +64,7 @@ static unsigned long palmtx_pin_config[] __initdata = {
64 GPIO29_AC97_SDATA_IN_0, 64 GPIO29_AC97_SDATA_IN_0,
65 GPIO30_AC97_SDATA_OUT, 65 GPIO30_AC97_SDATA_OUT,
66 GPIO31_AC97_SYNC, 66 GPIO31_AC97_SYNC,
67 GPIO95_AC97_nRESET,
67 68
68 /* IrDA */ 69 /* IrDA */
69 GPIO40_GPIO, /* ir disable */ 70 GPIO40_GPIO, /* ir disable */
@@ -75,7 +76,7 @@ static unsigned long palmtx_pin_config[] __initdata = {
75 76
76 /* USB */ 77 /* USB */
77 GPIO13_GPIO, /* usb detect */ 78 GPIO13_GPIO, /* usb detect */
78 GPIO95_GPIO, /* usb power */ 79 GPIO93_GPIO, /* usb power */
79 80
80 /* PCMCIA */ 81 /* PCMCIA */
81 GPIO48_nPOE, 82 GPIO48_nPOE,
@@ -93,10 +94,10 @@ static unsigned long palmtx_pin_config[] __initdata = {
93 GPIO116_GPIO, /* wifi ready */ 94 GPIO116_GPIO, /* wifi ready */
94 95
95 /* MATRIX KEYPAD */ 96 /* MATRIX KEYPAD */
96 GPIO100_KP_MKIN_0, 97 GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
97 GPIO101_KP_MKIN_1, 98 GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH,
98 GPIO102_KP_MKIN_2, 99 GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH,
99 GPIO97_KP_MKIN_3, 100 GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH,
100 GPIO103_KP_MKOUT_0, 101 GPIO103_KP_MKOUT_0,
101 GPIO104_KP_MKOUT_1, 102 GPIO104_KP_MKOUT_1,
102 GPIO105_KP_MKOUT_2, 103 GPIO105_KP_MKOUT_2,
@@ -359,7 +360,7 @@ static struct pxaficp_platform_data palmtx_ficp_platform_data = {
359static struct pxa2xx_udc_mach_info palmtx_udc_info __initdata = { 360static struct pxa2xx_udc_mach_info palmtx_udc_info __initdata = {
360 .gpio_vbus = GPIO_NR_PALMTX_USB_DETECT_N, 361 .gpio_vbus = GPIO_NR_PALMTX_USB_DETECT_N,
361 .gpio_vbus_inverted = 1, 362 .gpio_vbus_inverted = 1,
362 .gpio_pullup = GPIO_NR_PALMTX_USB_POWER, 363 .gpio_pullup = GPIO_NR_PALMTX_USB_PULLUP,
363 .gpio_pullup_inverted = 0, 364 .gpio_pullup_inverted = 0,
364}; 365};
365 366
@@ -459,6 +460,33 @@ static struct pxafb_mach_info palmtx_lcd_screen = {
459}; 460};
460 461
461/****************************************************************************** 462/******************************************************************************
463 * Power management - standby
464 ******************************************************************************/
465#ifdef CONFIG_PM
466static u32 *addr __initdata;
467static u32 resume[3] __initdata = {
468 0xe3a00101, /* mov r0, #0x40000000 */
469 0xe380060f, /* orr r0, r0, #0x00f00000 */
470 0xe590f008, /* ldr pc, [r0, #0x08] */
471};
472
473static int __init palmtx_pm_init(void)
474{
475 int i;
476
477 /* this is where the bootloader jumps */
478 addr = phys_to_virt(PALMTX_STR_BASE);
479
480 for (i = 0; i < 3; i++)
481 addr[i] = resume[i];
482
483 return 0;
484}
485
486device_initcall(palmtx_pm_init);
487#endif
488
489/******************************************************************************
462 * Machine init 490 * Machine init
463 ******************************************************************************/ 491 ******************************************************************************/
464static struct platform_device *devices[] __initdata = { 492static struct platform_device *devices[] __initdata = {
@@ -487,9 +515,9 @@ static void __init palmtx_map_io(void)
487/* setup udc GPIOs initial state */ 515/* setup udc GPIOs initial state */
488static void __init palmtx_udc_init(void) 516static void __init palmtx_udc_init(void)
489{ 517{
490 if (!gpio_request(GPIO_NR_PALMTX_USB_POWER, "UDC Vbus")) { 518 if (!gpio_request(GPIO_NR_PALMTX_USB_PULLUP, "UDC Vbus")) {
491 gpio_direction_output(GPIO_NR_PALMTX_USB_POWER, 1); 519 gpio_direction_output(GPIO_NR_PALMTX_USB_PULLUP, 1);
492 gpio_free(GPIO_NR_PALMTX_USB_POWER); 520 gpio_free(GPIO_NR_PALMTX_USB_PULLUP);
493 } 521 }
494} 522}
495 523
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 6e8ade6ae339..afac5b6d3d78 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -45,6 +45,7 @@
45#include <mach/udc.h> 45#include <mach/udc.h>
46#include <mach/tosa_bt.h> 46#include <mach/tosa_bt.h>
47#include <mach/pxa2xx_spi.h> 47#include <mach/pxa2xx_spi.h>
48#include <mach/audio.h>
48 49
49#include <asm/mach/arch.h> 50#include <asm/mach/arch.h>
50#include <mach/tosa.h> 51#include <mach/tosa.h>
@@ -914,6 +915,7 @@ static void __init tosa_init(void)
914 pxa_set_udc_info(&udc_info); 915 pxa_set_udc_info(&udc_info);
915 pxa_set_ficp_info(&tosa_ficp_platform_data); 916 pxa_set_ficp_info(&tosa_ficp_platform_data);
916 pxa_set_i2c_info(NULL); 917 pxa_set_i2c_info(NULL);
918 pxa_set_ac97_info(NULL);
917 platform_scoop_config = &tosa_pcmcia_config; 919 platform_scoop_config = &tosa_pcmcia_config;
918 920
919 pxa2xx_set_spi_info(2, &pxa_ssp_master_info); 921 pxa2xx_set_spi_info(2, &pxa_ssp_master_info);
diff --git a/arch/arm/mach-s3c2412/mach-jive.c b/arch/arm/mach-s3c2412/mach-jive.c
index 332bd3263eaf..8f0d37d43b43 100644
--- a/arch/arm/mach-s3c2412/mach-jive.c
+++ b/arch/arm/mach-s3c2412/mach-jive.c
@@ -52,7 +52,6 @@
52#include <plat/cpu.h> 52#include <plat/cpu.h>
53#include <plat/pm.h> 53#include <plat/pm.h>
54#include <plat/udc.h> 54#include <plat/udc.h>
55#include <plat/iic.h>
56 55
57static struct map_desc jive_iodesc[] __initdata = { 56static struct map_desc jive_iodesc[] __initdata = {
58}; 57};
@@ -278,7 +277,7 @@ __setup("mtdset=", jive_mtdset);
278#define LCD_HTOT (LCD_HSYNC + LCD_LEFT_MARGIN + LCD_XRES + LCD_RIGHT_MARGIN) 277#define LCD_HTOT (LCD_HSYNC + LCD_LEFT_MARGIN + LCD_XRES + LCD_RIGHT_MARGIN)
279#define LCD_VTOT (LCD_VSYNC + LCD_LOWER_MARGIN + LCD_YRES + LCD_UPPER_MARGIN) 278#define LCD_VTOT (LCD_VSYNC + LCD_LOWER_MARGIN + LCD_YRES + LCD_UPPER_MARGIN)
280 279
281struct s3c2410fb_display jive_vgg2432a4_display[] = { 280static struct s3c2410fb_display jive_vgg2432a4_display[] = {
282 [0] = { 281 [0] = {
283 .width = LCD_XRES, 282 .width = LCD_XRES,
284 .height = LCD_YRES, 283 .height = LCD_YRES,
@@ -311,7 +310,7 @@ struct s3c2410fb_display jive_vgg2432a4_display[] = {
311#define S3C2410_GPCCON_MASK(x) (3 << ((x) * 2)) 310#define S3C2410_GPCCON_MASK(x) (3 << ((x) * 2))
312#define S3C2410_GPDCON_MASK(x) (3 << ((x) * 2)) 311#define S3C2410_GPDCON_MASK(x) (3 << ((x) * 2))
313 312
314struct s3c2410fb_mach_info jive_lcd_config = { 313static struct s3c2410fb_mach_info jive_lcd_config = {
315 .displays = jive_vgg2432a4_display, 314 .displays = jive_vgg2432a4_display,
316 .num_displays = ARRAY_SIZE(jive_vgg2432a4_display), 315 .num_displays = ARRAY_SIZE(jive_vgg2432a4_display),
317 .default_display = 0, 316 .default_display = 0,
diff --git a/arch/arm/mach-s3c2440/mach-anubis.c b/arch/arm/mach-s3c2440/mach-anubis.c
index b05d56e230a1..9c6abf9fb540 100644
--- a/arch/arm/mach-s3c2440/mach-anubis.c
+++ b/arch/arm/mach-s3c2440/mach-anubis.c
@@ -243,7 +243,7 @@ static struct s3c2410_platform_nand anubis_nand_info = {
243 243
244/* IDE channels */ 244/* IDE channels */
245 245
246struct pata_platform_info anubis_ide_platdata = { 246static struct pata_platform_info anubis_ide_platdata = {
247 .ioport_shift = 5, 247 .ioport_shift = 5,
248}; 248};
249 249
diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c
index 41a00f57e5da..c8a46685ce38 100644
--- a/arch/arm/mach-s3c2440/mach-osiris.c
+++ b/arch/arm/mach-s3c2440/mach-osiris.c
@@ -413,7 +413,6 @@ MACHINE_START(OSIRIS, "Simtec-OSIRIS")
413 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, 413 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
414 .boot_params = S3C2410_SDRAM_PA + 0x100, 414 .boot_params = S3C2410_SDRAM_PA + 0x100,
415 .map_io = osiris_map_io, 415 .map_io = osiris_map_io,
416 .init_machine = osiris_init,
417 .init_irq = s3c24xx_init_irq, 416 .init_irq = s3c24xx_init_irq,
418 .init_machine = osiris_init, 417 .init_machine = osiris_init,
419 .timer = &s3c24xx_timer, 418 .timer = &s3c24xx_timer,
diff --git a/arch/arm/mach-s3c6410/mach-smdk6410.c b/arch/arm/mach-s3c6410/mach-smdk6410.c
index 25f7935576f8..7f473e47e4f1 100644
--- a/arch/arm/mach-s3c6410/mach-smdk6410.c
+++ b/arch/arm/mach-s3c6410/mach-smdk6410.c
@@ -166,6 +166,10 @@ static void __init smdk6410_machine_init(void)
166 s3c_i2c1_set_platdata(NULL); 166 s3c_i2c1_set_platdata(NULL);
167 s3c_fb_set_platdata(&smdk6410_lcd_pdata); 167 s3c_fb_set_platdata(&smdk6410_lcd_pdata);
168 168
169 gpio_request(S3C64XX_GPN(5), "LCD power");
170 gpio_request(S3C64XX_GPF(13), "LCD power");
171 gpio_request(S3C64XX_GPF(15), "LCD power");
172
169 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0)); 173 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
170 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1)); 174 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
171 175
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index b438fc4fb77b..e6344ece00ce 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -828,6 +828,17 @@ void __init reserve_node_zero(pg_data_t *pgdat)
828 BOOTMEM_DEFAULT); 828 BOOTMEM_DEFAULT);
829 } 829 }
830 830
831 if (machine_is_palmld() || machine_is_palmtx()) {
832 reserve_bootmem_node(pgdat, 0xa0000000, 0x1000,
833 BOOTMEM_EXCLUSIVE);
834 reserve_bootmem_node(pgdat, 0xa0200000, 0x1000,
835 BOOTMEM_EXCLUSIVE);
836 }
837
838 if (machine_is_palmt5())
839 reserve_bootmem_node(pgdat, 0xa0200000, 0x1000,
840 BOOTMEM_EXCLUSIVE);
841
831#ifdef CONFIG_SA1111 842#ifdef CONFIG_SA1111
832 /* 843 /*
833 * Because of the SA1111 DMA bug, we want to preserve our 844 * Because of the SA1111 DMA bug, we want to preserve our
diff --git a/arch/arm/plat-mxc/include/mach/imx-uart.h b/arch/arm/plat-mxc/include/mach/imx-uart.h
index 83fb72c4048a..599217b2e13f 100644
--- a/arch/arm/plat-mxc/include/mach/imx-uart.h
+++ b/arch/arm/plat-mxc/include/mach/imx-uart.h
@@ -27,6 +27,4 @@ struct imxuart_platform_data {
27 unsigned int flags; 27 unsigned int flags;
28}; 28};
29 29
30int __init imx_init_uart(int uart_no, struct imxuart_platform_data *pdata);
31
32#endif 30#endif
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx3.h b/arch/arm/plat-mxc/include/mach/iomux-mx3.h
index ab838cfe94f9..57e927a1fd3a 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx3.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx3.h
@@ -518,6 +518,8 @@ enum iomux_pins {
518 */ 518 */
519#define MX31_PIN_CSPI3_MOSI__RXD3 IOMUX_MODE(MX31_PIN_CSPI3_MOSI, IOMUX_CONFIG_ALT1) 519#define MX31_PIN_CSPI3_MOSI__RXD3 IOMUX_MODE(MX31_PIN_CSPI3_MOSI, IOMUX_CONFIG_ALT1)
520#define MX31_PIN_CSPI3_MISO__TXD3 IOMUX_MODE(MX31_PIN_CSPI3_MISO, IOMUX_CONFIG_ALT1) 520#define MX31_PIN_CSPI3_MISO__TXD3 IOMUX_MODE(MX31_PIN_CSPI3_MISO, IOMUX_CONFIG_ALT1)
521#define MX31_PIN_CSPI3_SCLK__RTS3 IOMUX_MODE(MX31_PIN_CSPI3_SCLK, IOMUX_CONFIG_ALT1)
522#define MX31_PIN_CSPI3_SPI_RDY__CTS3 IOMUX_MODE(MX31_PIN_CSPI3_SPI_RDY, IOMUX_CONFIG_ALT1)
521#define MX31_PIN_CTS1__CTS1 IOMUX_MODE(MX31_PIN_CTS1, IOMUX_CONFIG_FUNC) 523#define MX31_PIN_CTS1__CTS1 IOMUX_MODE(MX31_PIN_CTS1, IOMUX_CONFIG_FUNC)
522#define MX31_PIN_RTS1__RTS1 IOMUX_MODE(MX31_PIN_RTS1, IOMUX_CONFIG_FUNC) 524#define MX31_PIN_RTS1__RTS1 IOMUX_MODE(MX31_PIN_RTS1, IOMUX_CONFIG_FUNC)
523#define MX31_PIN_TXD1__TXD1 IOMUX_MODE(MX31_PIN_TXD1, IOMUX_CONFIG_FUNC) 525#define MX31_PIN_TXD1__TXD1 IOMUX_MODE(MX31_PIN_TXD1, IOMUX_CONFIG_FUNC)
@@ -558,6 +560,16 @@ enum iomux_pins {
558#define MX31_PIN_SD1_DATA0__SD1_DATA0 IOMUX_MODE(MX31_PIN_SD1_DATA0, IOMUX_CONFIG_FUNC) 560#define MX31_PIN_SD1_DATA0__SD1_DATA0 IOMUX_MODE(MX31_PIN_SD1_DATA0, IOMUX_CONFIG_FUNC)
559#define MX31_PIN_SD1_CLK__SD1_CLK IOMUX_MODE(MX31_PIN_SD1_CLK, IOMUX_CONFIG_FUNC) 561#define MX31_PIN_SD1_CLK__SD1_CLK IOMUX_MODE(MX31_PIN_SD1_CLK, IOMUX_CONFIG_FUNC)
560#define MX31_PIN_SD1_CMD__SD1_CMD IOMUX_MODE(MX31_PIN_SD1_CMD, IOMUX_CONFIG_FUNC) 562#define MX31_PIN_SD1_CMD__SD1_CMD IOMUX_MODE(MX31_PIN_SD1_CMD, IOMUX_CONFIG_FUNC)
563#define MX31_PIN_ATA_CS0__GPIO3_26 IOMUX_MODE(MX31_PIN_ATA_CS0, IOMUX_CONFIG_GPIO)
564#define MX31_PIN_ATA_CS1__GPIO3_27 IOMUX_MODE(MX31_PIN_ATA_CS1, IOMUX_CONFIG_GPIO)
565#define MX31_PIN_PC_PWRON__SD2_DATA3 IOMUX_MODE(MX31_PIN_PC_PWRON, IOMUX_CONFIG_ALT1)
566#define MX31_PIN_PC_VS1__SD2_DATA2 IOMUX_MODE(MX31_PIN_PC_VS1, IOMUX_CONFIG_ALT1)
567#define MX31_PIN_PC_READY__SD2_DATA1 IOMUX_MODE(MX31_PIN_PC_READY, IOMUX_CONFIG_ALT1)
568#define MX31_PIN_PC_WAIT_B__SD2_DATA0 IOMUX_MODE(MX31_PIN_PC_WAIT_B, IOMUX_CONFIG_ALT1)
569#define MX31_PIN_PC_CD2_B__SD2_CLK IOMUX_MODE(MX31_PIN_PC_CD2_B, IOMUX_CONFIG_ALT1)
570#define MX31_PIN_PC_CD1_B__SD2_CMD IOMUX_MODE(MX31_PIN_PC_CD1_B, IOMUX_CONFIG_ALT1)
571#define MX31_PIN_ATA_DIOR__GPIO3_28 IOMUX_MODE(MX31_PIN_ATA_DIOR, IOMUX_CONFIG_GPIO)
572#define MX31_PIN_ATA_DIOW__GPIO3_29 IOMUX_MODE(MX31_PIN_ATA_DIOW, IOMUX_CONFIG_GPIO)
561#define MX31_PIN_LD0__LD0 IOMUX_MODE(MX31_PIN_LD0, IOMUX_CONFIG_FUNC) 573#define MX31_PIN_LD0__LD0 IOMUX_MODE(MX31_PIN_LD0, IOMUX_CONFIG_FUNC)
562#define MX31_PIN_LD1__LD1 IOMUX_MODE(MX31_PIN_LD1, IOMUX_CONFIG_FUNC) 574#define MX31_PIN_LD1__LD1 IOMUX_MODE(MX31_PIN_LD1, IOMUX_CONFIG_FUNC)
563#define MX31_PIN_LD2__LD2 IOMUX_MODE(MX31_PIN_LD2, IOMUX_CONFIG_FUNC) 575#define MX31_PIN_LD2__LD2 IOMUX_MODE(MX31_PIN_LD2, IOMUX_CONFIG_FUNC)
@@ -585,6 +597,42 @@ enum iomux_pins {
585#define MX31_PIN_D3_SPL__D3_SPL IOMUX_MODE(MX31_PIN_D3_SPL, IOMUX_CONFIG_FUNC) 597#define MX31_PIN_D3_SPL__D3_SPL IOMUX_MODE(MX31_PIN_D3_SPL, IOMUX_CONFIG_FUNC)
586#define MX31_PIN_D3_CLS__D3_CLS IOMUX_MODE(MX31_PIN_D3_CLS, IOMUX_CONFIG_FUNC) 598#define MX31_PIN_D3_CLS__D3_CLS IOMUX_MODE(MX31_PIN_D3_CLS, IOMUX_CONFIG_FUNC)
587#define MX31_PIN_LCS0__GPI03_23 IOMUX_MODE(MX31_PIN_LCS0, IOMUX_CONFIG_GPIO) 599#define MX31_PIN_LCS0__GPI03_23 IOMUX_MODE(MX31_PIN_LCS0, IOMUX_CONFIG_GPIO)
600#define MX31_PIN_GPIO1_1__GPIO IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO)
601#define MX31_PIN_I2C_CLK__SCL IOMUX_MODE(MX31_PIN_I2C_CLK, IOMUX_CONFIG_FUNC)
602#define MX31_PIN_I2C_DAT__SDA IOMUX_MODE(MX31_PIN_I2C_DAT, IOMUX_CONFIG_FUNC)
603#define MX31_PIN_DCD_DTE1__I2C2_SDA IOMUX_MODE(MX31_PIN_DCD_DTE1, IOMUX_CONFIG_ALT2)
604#define MX31_PIN_RI_DTE1__I2C2_SCL IOMUX_MODE(MX31_PIN_RI_DTE1, IOMUX_CONFIG_ALT2)
605#define MX31_PIN_CSI_D4__CSI_D4 IOMUX_MODE(MX31_PIN_CSI_D4, IOMUX_CONFIG_FUNC)
606#define MX31_PIN_CSI_D5__CSI_D5 IOMUX_MODE(MX31_PIN_CSI_D5, IOMUX_CONFIG_FUNC)
607#define MX31_PIN_CSI_D6__CSI_D6 IOMUX_MODE(MX31_PIN_CSI_D6, IOMUX_CONFIG_FUNC)
608#define MX31_PIN_CSI_D7__CSI_D7 IOMUX_MODE(MX31_PIN_CSI_D7, IOMUX_CONFIG_FUNC)
609#define MX31_PIN_CSI_D8__CSI_D8 IOMUX_MODE(MX31_PIN_CSI_D8, IOMUX_CONFIG_FUNC)
610#define MX31_PIN_CSI_D9__CSI_D9 IOMUX_MODE(MX31_PIN_CSI_D9, IOMUX_CONFIG_FUNC)
611#define MX31_PIN_CSI_D10__CSI_D10 IOMUX_MODE(MX31_PIN_CSI_D10, IOMUX_CONFIG_FUNC)
612#define MX31_PIN_CSI_D11__CSI_D11 IOMUX_MODE(MX31_PIN_CSI_D11, IOMUX_CONFIG_FUNC)
613#define MX31_PIN_CSI_D12__CSI_D12 IOMUX_MODE(MX31_PIN_CSI_D12, IOMUX_CONFIG_FUNC)
614#define MX31_PIN_CSI_D13__CSI_D13 IOMUX_MODE(MX31_PIN_CSI_D13, IOMUX_CONFIG_FUNC)
615#define MX31_PIN_CSI_D14__CSI_D14 IOMUX_MODE(MX31_PIN_CSI_D14, IOMUX_CONFIG_FUNC)
616#define MX31_PIN_CSI_D15__CSI_D15 IOMUX_MODE(MX31_PIN_CSI_D15, IOMUX_CONFIG_FUNC)
617#define MX31_PIN_CSI_HSYNC__CSI_HSYNC IOMUX_MODE(MX31_PIN_CSI_HSYNC, IOMUX_CONFIG_FUNC)
618#define MX31_PIN_CSI_MCLK__CSI_MCLK IOMUX_MODE(MX31_PIN_CSI_MCLK, IOMUX_CONFIG_FUNC)
619#define MX31_PIN_CSI_PIXCLK__CSI_PIXCLK IOMUX_MODE(MX31_PIN_CSI_PIXCLK, IOMUX_CONFIG_FUNC)
620#define MX31_PIN_CSI_VSYNC__CSI_VSYNC IOMUX_MODE(MX31_PIN_CSI_VSYNC, IOMUX_CONFIG_FUNC)
621#define MX31_PIN_GPIO3_0__GPIO3_0 IOMUX_MODE(MX31_PIN_GPIO3_0, IOMUX_CONFIG_GPIO)
622#define MX31_PIN_GPIO3_1__GPIO3_1 IOMUX_MODE(MX31_PIN_GPIO3_1, IOMUX_CONFIG_GPIO)
623#define MX31_PIN_TXD2__GPIO1_28 IOMUX_MODE(MX31_PIN_TXD2, IOMUX_CONFIG_GPIO)
624#define MX31_PIN_USBOTG_DATA0__USBOTG_DATA0 IOMUX_MODE(MX31_PIN_USBOTG_DATA0, IOMUX_CONFIG_FUNC)
625#define MX31_PIN_USBOTG_DATA1__USBOTG_DATA1 IOMUX_MODE(MX31_PIN_USBOTG_DATA1, IOMUX_CONFIG_FUNC)
626#define MX31_PIN_USBOTG_DATA2__USBOTG_DATA2 IOMUX_MODE(MX31_PIN_USBOTG_DATA2, IOMUX_CONFIG_FUNC)
627#define MX31_PIN_USBOTG_DATA3__USBOTG_DATA3 IOMUX_MODE(MX31_PIN_USBOTG_DATA3, IOMUX_CONFIG_FUNC)
628#define MX31_PIN_USBOTG_DATA4__USBOTG_DATA4 IOMUX_MODE(MX31_PIN_USBOTG_DATA4, IOMUX_CONFIG_FUNC)
629#define MX31_PIN_USBOTG_DATA5__USBOTG_DATA5 IOMUX_MODE(MX31_PIN_USBOTG_DATA5, IOMUX_CONFIG_FUNC)
630#define MX31_PIN_USBOTG_DATA6__USBOTG_DATA6 IOMUX_MODE(MX31_PIN_USBOTG_DATA6, IOMUX_CONFIG_FUNC)
631#define MX31_PIN_USBOTG_DATA7__USBOTG_DATA7 IOMUX_MODE(MX31_PIN_USBOTG_DATA7, IOMUX_CONFIG_FUNC)
632#define MX31_PIN_USBOTG_CLK__USBOTG_CLK IOMUX_MODE(MX31_PIN_USBOTG_CLK, IOMUX_CONFIG_FUNC)
633#define MX31_PIN_USBOTG_DIR__USBOTG_DIR IOMUX_MODE(MX31_PIN_USBOTG_DIR, IOMUX_CONFIG_FUNC)
634#define MX31_PIN_USBOTG_NXT__USBOTG_NXT IOMUX_MODE(MX31_PIN_USBOTG_NXT, IOMUX_CONFIG_FUNC)
635#define MX31_PIN_USBOTG_STP__USBOTG_STP IOMUX_MODE(MX31_PIN_USBOTG_STP, IOMUX_CONFIG_FUNC)
588 636
589/*XXX: The SS0, SS1, SS2, SS3 lines of spi3 are multiplexed by cspi2_ss0, cspi2_ss1, cspi1_ss0 637/*XXX: The SS0, SS1, SS2, SS3 lines of spi3 are multiplexed by cspi2_ss0, cspi2_ss1, cspi1_ss0
590 * cspi1_ss1*/ 638 * cspi1_ss1*/
diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h
index c02b8fc2d821..518a36504b88 100644
--- a/arch/arm/plat-mxc/include/mach/irqs.h
+++ b/arch/arm/plat-mxc/include/mach/irqs.h
@@ -45,7 +45,7 @@
45 45
46#define NR_IRQS (MXC_IPU_IRQ_START + MX3_IPU_IRQS) 46#define NR_IRQS (MXC_IPU_IRQ_START + MX3_IPU_IRQS)
47 47
48extern void imx_irq_set_priority(unsigned char irq, unsigned char prio); 48extern int imx_irq_set_priority(unsigned char irq, unsigned char prio);
49 49
50/* all normal IRQs can be FIQs */ 50/* all normal IRQs can be FIQs */
51#define FIQ_START 0 51#define FIQ_START 0
diff --git a/arch/arm/plat-mxc/include/mach/mx21.h b/arch/arm/plat-mxc/include/mach/mx21.h
index e8c4cf56c24e..8b070a041a99 100644
--- a/arch/arm/plat-mxc/include/mach/mx21.h
+++ b/arch/arm/plat-mxc/include/mach/mx21.h
@@ -54,9 +54,6 @@
54 54
55#define IRAM_BASE_ADDR 0xFFFFE800 /* internal ram */ 55#define IRAM_BASE_ADDR 0xFFFFE800 /* internal ram */
56 56
57/* this CPU supports up to 192 GPIOs (don't forget the baseboard!) */
58#define ARCH_NR_GPIOS (6*32 + 16)
59
60/* fixed interrupt numbers */ 57/* fixed interrupt numbers */
61#define MXC_INT_USBCTRL 58 58#define MXC_INT_USBCTRL 58
62#define MXC_INT_USBCTRL 58 59#define MXC_INT_USBCTRL 58
diff --git a/arch/arm/plat-mxc/irq.c b/arch/arm/plat-mxc/irq.c
index 6e7578a3514b..0fb68a531f55 100644
--- a/arch/arm/plat-mxc/irq.c
+++ b/arch/arm/plat-mxc/irq.c
@@ -50,23 +50,27 @@
50#define IIM_PROD_REV_SH 3 50#define IIM_PROD_REV_SH 3
51#define IIM_PROD_REV_LEN 5 51#define IIM_PROD_REV_LEN 5
52 52
53#ifdef CONFIG_MXC_IRQ_PRIOR 53int imx_irq_set_priority(unsigned char irq, unsigned char prio)
54void imx_irq_set_priority(unsigned char irq, unsigned char prio)
55{ 54{
55#ifdef CONFIG_MXC_IRQ_PRIOR
56 unsigned int temp; 56 unsigned int temp;
57 unsigned int mask = 0x0F << irq % 8 * 4; 57 unsigned int mask = 0x0F << irq % 8 * 4;
58 58
59 if (irq > 63) 59 if (irq >= MXC_INTERNAL_IRQS)
60 return; 60 return -EINVAL;;
61 61
62 temp = __raw_readl(AVIC_NIPRIORITY(irq / 8)); 62 temp = __raw_readl(AVIC_NIPRIORITY(irq / 8));
63 temp &= ~mask; 63 temp &= ~mask;
64 temp |= prio & mask; 64 temp |= prio & mask;
65 65
66 __raw_writel(temp, AVIC_NIPRIORITY(irq / 8)); 66 __raw_writel(temp, AVIC_NIPRIORITY(irq / 8));
67
68 return 0;
69#else
70 return -ENOSYS;
71#endif
67} 72}
68EXPORT_SYMBOL(imx_irq_set_priority); 73EXPORT_SYMBOL(imx_irq_set_priority);
69#endif
70 74
71#ifdef CONFIG_FIQ 75#ifdef CONFIG_FIQ
72int mxc_set_irq_fiq(unsigned int irq, unsigned int type) 76int mxc_set_irq_fiq(unsigned int irq, unsigned int type)
diff --git a/arch/arm/plat-s3c/gpio-config.c b/arch/arm/plat-s3c/gpio-config.c
index 7642b975a998..08044dec9731 100644
--- a/arch/arm/plat-s3c/gpio-config.c
+++ b/arch/arm/plat-s3c/gpio-config.c
@@ -13,6 +13,7 @@
13*/ 13*/
14 14
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/module.h>
16#include <linux/gpio.h> 17#include <linux/gpio.h>
17#include <linux/io.h> 18#include <linux/io.h>
18 19
@@ -38,6 +39,7 @@ int s3c_gpio_cfgpin(unsigned int pin, unsigned int config)
38 39
39 return ret; 40 return ret;
40} 41}
42EXPORT_SYMBOL(s3c_gpio_cfgpin);
41 43
42int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull) 44int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull)
43{ 45{
@@ -56,6 +58,7 @@ int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull)
56 58
57 return ret; 59 return ret;
58} 60}
61EXPORT_SYMBOL(s3c_gpio_setpull);
59 62
60#ifdef CONFIG_S3C_GPIO_CFG_S3C24XX 63#ifdef CONFIG_S3C_GPIO_CFG_S3C24XX
61int s3c_gpio_setcfg_s3c24xx_banka(struct s3c_gpio_chip *chip, 64int s3c_gpio_setcfg_s3c24xx_banka(struct s3c_gpio_chip *chip,
diff --git a/arch/arm/plat-s3c/include/plat/devs.h b/arch/arm/plat-s3c/include/plat/devs.h
index 6b1b5231511c..26f0cec3ac04 100644
--- a/arch/arm/plat-s3c/include/plat/devs.h
+++ b/arch/arm/plat-s3c/include/plat/devs.h
@@ -34,6 +34,7 @@ extern struct platform_device s3c_device_iis;
34extern struct platform_device s3c_device_rtc; 34extern struct platform_device s3c_device_rtc;
35extern struct platform_device s3c_device_adc; 35extern struct platform_device s3c_device_adc;
36extern struct platform_device s3c_device_sdi; 36extern struct platform_device s3c_device_sdi;
37extern struct platform_device s3c_device_hwmon;
37extern struct platform_device s3c_device_hsmmc0; 38extern struct platform_device s3c_device_hsmmc0;
38extern struct platform_device s3c_device_hsmmc1; 39extern struct platform_device s3c_device_hsmmc1;
39extern struct platform_device s3c_device_hsmmc2; 40extern struct platform_device s3c_device_hsmmc2;
diff --git a/arch/arm/plat-s3c24xx/adc.c b/arch/arm/plat-s3c24xx/adc.c
index 9a5c767e0a42..91adfa71c172 100644
--- a/arch/arm/plat-s3c24xx/adc.c
+++ b/arch/arm/plat-s3c24xx/adc.c
@@ -100,7 +100,7 @@ static void s3c_adc_dbgshow(struct adc_device *adc)
100 readl(adc->regs + S3C2410_ADCDLY)); 100 readl(adc->regs + S3C2410_ADCDLY));
101} 101}
102 102
103void s3c_adc_try(struct adc_device *adc) 103static void s3c_adc_try(struct adc_device *adc)
104{ 104{
105 struct s3c_adc_client *next = adc->ts_pend; 105 struct s3c_adc_client *next = adc->ts_pend;
106 106
@@ -190,6 +190,23 @@ EXPORT_SYMBOL_GPL(s3c_adc_register);
190void s3c_adc_release(struct s3c_adc_client *client) 190void s3c_adc_release(struct s3c_adc_client *client)
191{ 191{
192 /* We should really check that nothing is in progress. */ 192 /* We should really check that nothing is in progress. */
193 if (adc_dev->cur == client)
194 adc_dev->cur = NULL;
195 if (adc_dev->ts_pend == client)
196 adc_dev->ts_pend = NULL;
197 else {
198 struct list_head *p, *n;
199 struct s3c_adc_client *tmp;
200
201 list_for_each_safe(p, n, &adc_pending) {
202 tmp = list_entry(p, struct s3c_adc_client, pend);
203 if (tmp == client)
204 list_del(&tmp->pend);
205 }
206 }
207
208 if (adc_dev->cur == NULL)
209 s3c_adc_try(adc_dev);
193 kfree(client); 210 kfree(client);
194} 211}
195EXPORT_SYMBOL_GPL(s3c_adc_release); 212EXPORT_SYMBOL_GPL(s3c_adc_release);
diff --git a/arch/arm/plat-s3c24xx/gpiolib.c b/arch/arm/plat-s3c24xx/gpiolib.c
index 94a341aaa4e4..5c0491bf738b 100644
--- a/arch/arm/plat-s3c24xx/gpiolib.c
+++ b/arch/arm/plat-s3c24xx/gpiolib.c
@@ -19,7 +19,7 @@
19#include <linux/io.h> 19#include <linux/io.h>
20#include <linux/gpio.h> 20#include <linux/gpio.h>
21 21
22#include <plat/gpio-core.h> 22#include <mach/gpio-core.h>
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24#include <asm/irq.h> 24#include <asm/irq.h>
25 25
diff --git a/arch/frv/include/asm/Kbuild b/arch/frv/include/asm/Kbuild
new file mode 100644
index 000000000000..0f8956def738
--- /dev/null
+++ b/arch/frv/include/asm/Kbuild
@@ -0,0 +1,5 @@
1include include/asm-generic/Kbuild.asm
2
3header-y += registers.h
4
5unifdef-y += termios.h
diff --git a/arch/frv/include/asm/atomic.h b/arch/frv/include/asm/atomic.h
new file mode 100644
index 000000000000..296c35cfb207
--- /dev/null
+++ b/arch/frv/include/asm/atomic.h
@@ -0,0 +1,198 @@
1/* atomic.h: atomic operation emulation for FR-V
2 *
3 * For an explanation of how atomic ops work in this arch, see:
4 * Documentation/frv/atomic-ops.txt
5 *
6 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
7 * Written by David Howells (dhowells@redhat.com)
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14#ifndef _ASM_ATOMIC_H
15#define _ASM_ATOMIC_H
16
17#include <linux/types.h>
18#include <asm/spr-regs.h>
19#include <asm/system.h>
20
21#ifdef CONFIG_SMP
22#error not SMP safe
23#endif
24
25/*
26 * Atomic operations that C can't guarantee us. Useful for
27 * resource counting etc..
28 *
29 * We do not have SMP systems, so we don't have to deal with that.
30 */
31
32/* Atomic operations are already serializing */
33#define smp_mb__before_atomic_dec() barrier()
34#define smp_mb__after_atomic_dec() barrier()
35#define smp_mb__before_atomic_inc() barrier()
36#define smp_mb__after_atomic_inc() barrier()
37
38#define ATOMIC_INIT(i) { (i) }
39#define atomic_read(v) ((v)->counter)
40#define atomic_set(v, i) (((v)->counter) = (i))
41
42#ifndef CONFIG_FRV_OUTOFLINE_ATOMIC_OPS
43static inline int atomic_add_return(int i, atomic_t *v)
44{
45 unsigned long val;
46
47 asm("0: \n"
48 " orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */
49 " ckeq icc3,cc7 \n"
50 " ld.p %M0,%1 \n" /* LD.P/ORCR must be atomic */
51 " orcr cc7,cc7,cc3 \n" /* set CC3 to true */
52 " add%I2 %1,%2,%1 \n"
53 " cst.p %1,%M0 ,cc3,#1 \n"
54 " corcc gr29,gr29,gr0 ,cc3,#1 \n" /* clear ICC3.Z if store happens */
55 " beq icc3,#0,0b \n"
56 : "+U"(v->counter), "=&r"(val)
57 : "NPr"(i)
58 : "memory", "cc7", "cc3", "icc3"
59 );
60
61 return val;
62}
63
64static inline int atomic_sub_return(int i, atomic_t *v)
65{
66 unsigned long val;
67
68 asm("0: \n"
69 " orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */
70 " ckeq icc3,cc7 \n"
71 " ld.p %M0,%1 \n" /* LD.P/ORCR must be atomic */
72 " orcr cc7,cc7,cc3 \n" /* set CC3 to true */
73 " sub%I2 %1,%2,%1 \n"
74 " cst.p %1,%M0 ,cc3,#1 \n"
75 " corcc gr29,gr29,gr0 ,cc3,#1 \n" /* clear ICC3.Z if store happens */
76 " beq icc3,#0,0b \n"
77 : "+U"(v->counter), "=&r"(val)
78 : "NPr"(i)
79 : "memory", "cc7", "cc3", "icc3"
80 );
81
82 return val;
83}
84
85#else
86
87extern int atomic_add_return(int i, atomic_t *v);
88extern int atomic_sub_return(int i, atomic_t *v);
89
90#endif
91
92static inline int atomic_add_negative(int i, atomic_t *v)
93{
94 return atomic_add_return(i, v) < 0;
95}
96
97static inline void atomic_add(int i, atomic_t *v)
98{
99 atomic_add_return(i, v);
100}
101
102static inline void atomic_sub(int i, atomic_t *v)
103{
104 atomic_sub_return(i, v);
105}
106
107static inline void atomic_inc(atomic_t *v)
108{
109 atomic_add_return(1, v);
110}
111
112static inline void atomic_dec(atomic_t *v)
113{
114 atomic_sub_return(1, v);
115}
116
117#define atomic_dec_return(v) atomic_sub_return(1, (v))
118#define atomic_inc_return(v) atomic_add_return(1, (v))
119
120#define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0)
121#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)
122#define atomic_inc_and_test(v) (atomic_add_return(1, (v)) == 0)
123
124/*****************************************************************************/
125/*
126 * exchange value with memory
127 */
128#ifndef CONFIG_FRV_OUTOFLINE_ATOMIC_OPS
129
130#define xchg(ptr, x) \
131({ \
132 __typeof__(ptr) __xg_ptr = (ptr); \
133 __typeof__(*(ptr)) __xg_orig; \
134 \
135 switch (sizeof(__xg_orig)) { \
136 case 4: \
137 asm volatile( \
138 "swap%I0 %M0,%1" \
139 : "+m"(*__xg_ptr), "=r"(__xg_orig) \
140 : "1"(x) \
141 : "memory" \
142 ); \
143 break; \
144 \
145 default: \
146 __xg_orig = (__typeof__(__xg_orig))0; \
147 asm volatile("break"); \
148 break; \
149 } \
150 \
151 __xg_orig; \
152})
153
154#else
155
156extern uint32_t __xchg_32(uint32_t i, volatile void *v);
157
158#define xchg(ptr, x) \
159({ \
160 __typeof__(ptr) __xg_ptr = (ptr); \
161 __typeof__(*(ptr)) __xg_orig; \
162 \
163 switch (sizeof(__xg_orig)) { \
164 case 4: __xg_orig = (__typeof__(*(ptr))) __xchg_32((uint32_t) x, __xg_ptr); break; \
165 default: \
166 __xg_orig = (__typeof__(__xg_orig))0; \
167 asm volatile("break"); \
168 break; \
169 } \
170 __xg_orig; \
171})
172
173#endif
174
175#define tas(ptr) (xchg((ptr), 1))
176
177#define atomic_cmpxchg(v, old, new) (cmpxchg(&((v)->counter), old, new))
178#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
179
180static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
181{
182 int c, old;
183 c = atomic_read(v);
184 for (;;) {
185 if (unlikely(c == (u)))
186 break;
187 old = atomic_cmpxchg((v), c, c + (a));
188 if (likely(old == c))
189 break;
190 c = old;
191 }
192 return c != (u);
193}
194
195#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
196
197#include <asm-generic/atomic.h>
198#endif /* _ASM_ATOMIC_H */
diff --git a/arch/frv/include/asm/auxvec.h b/arch/frv/include/asm/auxvec.h
new file mode 100644
index 000000000000..07710778fa10
--- /dev/null
+++ b/arch/frv/include/asm/auxvec.h
@@ -0,0 +1,4 @@
1#ifndef __FRV_AUXVEC_H
2#define __FRV_AUXVEC_H
3
4#endif
diff --git a/arch/frv/include/asm/ax88796.h b/arch/frv/include/asm/ax88796.h
new file mode 100644
index 000000000000..637e980393c5
--- /dev/null
+++ b/arch/frv/include/asm/ax88796.h
@@ -0,0 +1,22 @@
1/* ax88796.h: access points to the driver for the AX88796 NE2000 clone
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_AX88796_H
13#define _ASM_AX88796_H
14
15#include <asm/mb-regs.h>
16
17#define AX88796_IOADDR (__region_CS1 + 0x200)
18#define AX88796_IRQ IRQ_CPU_EXTERNAL7
19#define AX88796_FULL_DUPLEX 0 /* force full duplex */
20#define AX88796_BUS_INFO "CS1#+0x200" /* bus info for ethtool */
21
22#endif /* _ASM_AX88796_H */
diff --git a/arch/frv/include/asm/bitops.h b/arch/frv/include/asm/bitops.h
new file mode 100644
index 000000000000..287f6f697ce2
--- /dev/null
+++ b/arch/frv/include/asm/bitops.h
@@ -0,0 +1,412 @@
1/* bitops.h: bit operations for the Fujitsu FR-V CPUs
2 *
3 * For an explanation of how atomic ops work in this arch, see:
4 * Documentation/frv/atomic-ops.txt
5 *
6 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
7 * Written by David Howells (dhowells@redhat.com)
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14#ifndef _ASM_BITOPS_H
15#define _ASM_BITOPS_H
16
17#include <linux/compiler.h>
18#include <asm/byteorder.h>
19
20#ifdef __KERNEL__
21
22#ifndef _LINUX_BITOPS_H
23#error only <linux/bitops.h> can be included directly
24#endif
25
26#include <asm-generic/bitops/ffz.h>
27
28/*
29 * clear_bit() doesn't provide any barrier for the compiler.
30 */
31#define smp_mb__before_clear_bit() barrier()
32#define smp_mb__after_clear_bit() barrier()
33
34#ifndef CONFIG_FRV_OUTOFLINE_ATOMIC_OPS
35static inline
36unsigned long atomic_test_and_ANDNOT_mask(unsigned long mask, volatile unsigned long *v)
37{
38 unsigned long old, tmp;
39
40 asm volatile(
41 "0: \n"
42 " orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */
43 " ckeq icc3,cc7 \n"
44 " ld.p %M0,%1 \n" /* LD.P/ORCR are atomic */
45 " orcr cc7,cc7,cc3 \n" /* set CC3 to true */
46 " and%I3 %1,%3,%2 \n"
47 " cst.p %2,%M0 ,cc3,#1 \n" /* if store happens... */
48 " corcc gr29,gr29,gr0 ,cc3,#1 \n" /* ... clear ICC3.Z */
49 " beq icc3,#0,0b \n"
50 : "+U"(*v), "=&r"(old), "=r"(tmp)
51 : "NPr"(~mask)
52 : "memory", "cc7", "cc3", "icc3"
53 );
54
55 return old;
56}
57
58static inline
59unsigned long atomic_test_and_OR_mask(unsigned long mask, volatile unsigned long *v)
60{
61 unsigned long old, tmp;
62
63 asm volatile(
64 "0: \n"
65 " orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */
66 " ckeq icc3,cc7 \n"
67 " ld.p %M0,%1 \n" /* LD.P/ORCR are atomic */
68 " orcr cc7,cc7,cc3 \n" /* set CC3 to true */
69 " or%I3 %1,%3,%2 \n"
70 " cst.p %2,%M0 ,cc3,#1 \n" /* if store happens... */
71 " corcc gr29,gr29,gr0 ,cc3,#1 \n" /* ... clear ICC3.Z */
72 " beq icc3,#0,0b \n"
73 : "+U"(*v), "=&r"(old), "=r"(tmp)
74 : "NPr"(mask)
75 : "memory", "cc7", "cc3", "icc3"
76 );
77
78 return old;
79}
80
81static inline
82unsigned long atomic_test_and_XOR_mask(unsigned long mask, volatile unsigned long *v)
83{
84 unsigned long old, tmp;
85
86 asm volatile(
87 "0: \n"
88 " orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */
89 " ckeq icc3,cc7 \n"
90 " ld.p %M0,%1 \n" /* LD.P/ORCR are atomic */
91 " orcr cc7,cc7,cc3 \n" /* set CC3 to true */
92 " xor%I3 %1,%3,%2 \n"
93 " cst.p %2,%M0 ,cc3,#1 \n" /* if store happens... */
94 " corcc gr29,gr29,gr0 ,cc3,#1 \n" /* ... clear ICC3.Z */
95 " beq icc3,#0,0b \n"
96 : "+U"(*v), "=&r"(old), "=r"(tmp)
97 : "NPr"(mask)
98 : "memory", "cc7", "cc3", "icc3"
99 );
100
101 return old;
102}
103
104#else
105
106extern unsigned long atomic_test_and_ANDNOT_mask(unsigned long mask, volatile unsigned long *v);
107extern unsigned long atomic_test_and_OR_mask(unsigned long mask, volatile unsigned long *v);
108extern unsigned long atomic_test_and_XOR_mask(unsigned long mask, volatile unsigned long *v);
109
110#endif
111
112#define atomic_clear_mask(mask, v) atomic_test_and_ANDNOT_mask((mask), (v))
113#define atomic_set_mask(mask, v) atomic_test_and_OR_mask((mask), (v))
114
115static inline int test_and_clear_bit(int nr, volatile void *addr)
116{
117 volatile unsigned long *ptr = addr;
118 unsigned long mask = 1UL << (nr & 31);
119 ptr += nr >> 5;
120 return (atomic_test_and_ANDNOT_mask(mask, ptr) & mask) != 0;
121}
122
123static inline int test_and_set_bit(int nr, volatile void *addr)
124{
125 volatile unsigned long *ptr = addr;
126 unsigned long mask = 1UL << (nr & 31);
127 ptr += nr >> 5;
128 return (atomic_test_and_OR_mask(mask, ptr) & mask) != 0;
129}
130
131static inline int test_and_change_bit(int nr, volatile void *addr)
132{
133 volatile unsigned long *ptr = addr;
134 unsigned long mask = 1UL << (nr & 31);
135 ptr += nr >> 5;
136 return (atomic_test_and_XOR_mask(mask, ptr) & mask) != 0;
137}
138
139static inline void clear_bit(int nr, volatile void *addr)
140{
141 test_and_clear_bit(nr, addr);
142}
143
144static inline void set_bit(int nr, volatile void *addr)
145{
146 test_and_set_bit(nr, addr);
147}
148
149static inline void change_bit(int nr, volatile void * addr)
150{
151 test_and_change_bit(nr, addr);
152}
153
154static inline void __clear_bit(int nr, volatile void * addr)
155{
156 volatile unsigned long *a = addr;
157 int mask;
158
159 a += nr >> 5;
160 mask = 1 << (nr & 31);
161 *a &= ~mask;
162}
163
164static inline void __set_bit(int nr, volatile void * addr)
165{
166 volatile unsigned long *a = addr;
167 int mask;
168
169 a += nr >> 5;
170 mask = 1 << (nr & 31);
171 *a |= mask;
172}
173
174static inline void __change_bit(int nr, volatile void *addr)
175{
176 volatile unsigned long *a = addr;
177 int mask;
178
179 a += nr >> 5;
180 mask = 1 << (nr & 31);
181 *a ^= mask;
182}
183
184static inline int __test_and_clear_bit(int nr, volatile void * addr)
185{
186 volatile unsigned long *a = addr;
187 int mask, retval;
188
189 a += nr >> 5;
190 mask = 1 << (nr & 31);
191 retval = (mask & *a) != 0;
192 *a &= ~mask;
193 return retval;
194}
195
196static inline int __test_and_set_bit(int nr, volatile void * addr)
197{
198 volatile unsigned long *a = addr;
199 int mask, retval;
200
201 a += nr >> 5;
202 mask = 1 << (nr & 31);
203 retval = (mask & *a) != 0;
204 *a |= mask;
205 return retval;
206}
207
208static inline int __test_and_change_bit(int nr, volatile void * addr)
209{
210 volatile unsigned long *a = addr;
211 int mask, retval;
212
213 a += nr >> 5;
214 mask = 1 << (nr & 31);
215 retval = (mask & *a) != 0;
216 *a ^= mask;
217 return retval;
218}
219
220/*
221 * This routine doesn't need to be atomic.
222 */
223static inline int __constant_test_bit(int nr, const volatile void * addr)
224{
225 return ((1UL << (nr & 31)) & (((const volatile unsigned int *) addr)[nr >> 5])) != 0;
226}
227
228static inline int __test_bit(int nr, const volatile void * addr)
229{
230 int * a = (int *) addr;
231 int mask;
232
233 a += nr >> 5;
234 mask = 1 << (nr & 0x1f);
235 return ((mask & *a) != 0);
236}
237
238#define test_bit(nr,addr) \
239(__builtin_constant_p(nr) ? \
240 __constant_test_bit((nr),(addr)) : \
241 __test_bit((nr),(addr)))
242
243#include <asm-generic/bitops/find.h>
244
245/**
246 * fls - find last bit set
247 * @x: the word to search
248 *
249 * This is defined the same way as ffs:
250 * - return 32..1 to indicate bit 31..0 most significant bit set
251 * - return 0 to indicate no bits set
252 */
253#define fls(x) \
254({ \
255 int bit; \
256 \
257 asm(" subcc %1,gr0,gr0,icc0 \n" \
258 " ckne icc0,cc4 \n" \
259 " cscan.p %1,gr0,%0 ,cc4,#1 \n" \
260 " csub %0,%0,%0 ,cc4,#0 \n" \
261 " csub %2,%0,%0 ,cc4,#1 \n" \
262 : "=&r"(bit) \
263 : "r"(x), "r"(32) \
264 : "icc0", "cc4" \
265 ); \
266 \
267 bit; \
268})
269
270/**
271 * fls64 - find last bit set in a 64-bit value
272 * @n: the value to search
273 *
274 * This is defined the same way as ffs:
275 * - return 64..1 to indicate bit 63..0 most significant bit set
276 * - return 0 to indicate no bits set
277 */
278static inline __attribute__((const))
279int fls64(u64 n)
280{
281 union {
282 u64 ll;
283 struct { u32 h, l; };
284 } _;
285 int bit, x, y;
286
287 _.ll = n;
288
289 asm(" subcc.p %3,gr0,gr0,icc0 \n"
290 " subcc %4,gr0,gr0,icc1 \n"
291 " ckne icc0,cc4 \n"
292 " ckne icc1,cc5 \n"
293 " norcr cc4,cc5,cc6 \n"
294 " csub.p %0,%0,%0 ,cc6,1 \n"
295 " orcr cc5,cc4,cc4 \n"
296 " andcr cc4,cc5,cc4 \n"
297 " cscan.p %3,gr0,%0 ,cc4,0 \n"
298 " setlos #64,%1 \n"
299 " cscan.p %4,gr0,%0 ,cc4,1 \n"
300 " setlos #32,%2 \n"
301 " csub.p %1,%0,%0 ,cc4,0 \n"
302 " csub %2,%0,%0 ,cc4,1 \n"
303 : "=&r"(bit), "=r"(x), "=r"(y)
304 : "0r"(_.h), "r"(_.l)
305 : "icc0", "icc1", "cc4", "cc5", "cc6"
306 );
307 return bit;
308
309}
310
311/**
312 * ffs - find first bit set
313 * @x: the word to search
314 *
315 * - return 32..1 to indicate bit 31..0 most least significant bit set
316 * - return 0 to indicate no bits set
317 */
318static inline __attribute__((const))
319int ffs(int x)
320{
321 /* Note: (x & -x) gives us a mask that is the least significant
322 * (rightmost) 1-bit of the value in x.
323 */
324 return fls(x & -x);
325}
326
327/**
328 * __ffs - find first bit set
329 * @x: the word to search
330 *
331 * - return 31..0 to indicate bit 31..0 most least significant bit set
332 * - if no bits are set in x, the result is undefined
333 */
334static inline __attribute__((const))
335int __ffs(unsigned long x)
336{
337 int bit;
338 asm("scan %1,gr0,%0" : "=r"(bit) : "r"(x & -x));
339 return 31 - bit;
340}
341
342/**
343 * __fls - find last (most-significant) set bit in a long word
344 * @word: the word to search
345 *
346 * Undefined if no set bit exists, so code should check against 0 first.
347 */
348static inline unsigned long __fls(unsigned long word)
349{
350 unsigned long bit;
351 asm("scan %1,gr0,%0" : "=r"(bit) : "r"(word));
352 return bit;
353}
354
355/*
356 * special slimline version of fls() for calculating ilog2_u32()
357 * - note: no protection against n == 0
358 */
359#define ARCH_HAS_ILOG2_U32
360static inline __attribute__((const))
361int __ilog2_u32(u32 n)
362{
363 int bit;
364 asm("scan %1,gr0,%0" : "=r"(bit) : "r"(n));
365 return 31 - bit;
366}
367
368/*
369 * special slimline version of fls64() for calculating ilog2_u64()
370 * - note: no protection against n == 0
371 */
372#define ARCH_HAS_ILOG2_U64
373static inline __attribute__((const))
374int __ilog2_u64(u64 n)
375{
376 union {
377 u64 ll;
378 struct { u32 h, l; };
379 } _;
380 int bit, x, y;
381
382 _.ll = n;
383
384 asm(" subcc %3,gr0,gr0,icc0 \n"
385 " ckeq icc0,cc4 \n"
386 " cscan.p %3,gr0,%0 ,cc4,0 \n"
387 " setlos #63,%1 \n"
388 " cscan.p %4,gr0,%0 ,cc4,1 \n"
389 " setlos #31,%2 \n"
390 " csub.p %1,%0,%0 ,cc4,0 \n"
391 " csub %2,%0,%0 ,cc4,1 \n"
392 : "=&r"(bit), "=r"(x), "=r"(y)
393 : "0r"(_.h), "r"(_.l)
394 : "icc0", "cc4"
395 );
396 return bit;
397}
398
399#include <asm-generic/bitops/sched.h>
400#include <asm-generic/bitops/hweight.h>
401#include <asm-generic/bitops/lock.h>
402
403#include <asm-generic/bitops/ext2-non-atomic.h>
404
405#define ext2_set_bit_atomic(lock,nr,addr) test_and_set_bit ((nr) ^ 0x18, (addr))
406#define ext2_clear_bit_atomic(lock,nr,addr) test_and_clear_bit((nr) ^ 0x18, (addr))
407
408#include <asm-generic/bitops/minix-le.h>
409
410#endif /* __KERNEL__ */
411
412#endif /* _ASM_BITOPS_H */
diff --git a/arch/frv/include/asm/bug.h b/arch/frv/include/asm/bug.h
new file mode 100644
index 000000000000..6b1b44d71028
--- /dev/null
+++ b/arch/frv/include/asm/bug.h
@@ -0,0 +1,53 @@
1/* bug.h: FRV bug trapping
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11#ifndef _ASM_BUG_H
12#define _ASM_BUG_H
13
14#include <linux/linkage.h>
15
16#ifdef CONFIG_BUG
17/*
18 * Tell the user there is some problem.
19 */
20extern asmlinkage void __debug_bug_trap(int signr);
21
22#ifdef CONFIG_NO_KERNEL_MSG
23#define _debug_bug_printk()
24#else
25extern void __debug_bug_printk(const char *file, unsigned line);
26#define _debug_bug_printk() __debug_bug_printk(__FILE__, __LINE__)
27#endif
28
29#define _debug_bug_trap(signr) \
30do { \
31 __debug_bug_trap(signr); \
32 asm volatile("nop"); \
33} while(0)
34
35#define HAVE_ARCH_BUG
36#define BUG() \
37do { \
38 _debug_bug_printk(); \
39 _debug_bug_trap(6 /*SIGABRT*/); \
40} while (0)
41
42#ifdef CONFIG_GDBSTUB
43#define HAVE_ARCH_KGDB_RAISE
44#define kgdb_raise(signr) do { _debug_bug_trap(signr); } while(0)
45
46#define HAVE_ARCH_KGDB_BAD_PAGE
47#define kgdb_bad_page(page) do { kgdb_raise(SIGABRT); } while(0)
48#endif
49#endif
50
51#include <asm-generic/bug.h>
52
53#endif
diff --git a/arch/frv/include/asm/bugs.h b/arch/frv/include/asm/bugs.h
new file mode 100644
index 000000000000..f2382be2b46c
--- /dev/null
+++ b/arch/frv/include/asm/bugs.h
@@ -0,0 +1,14 @@
1/* bugs.h: arch bug checking entry
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12static inline void check_bugs(void)
13{
14}
diff --git a/arch/frv/include/asm/busctl-regs.h b/arch/frv/include/asm/busctl-regs.h
new file mode 100644
index 000000000000..bb0ff4816e27
--- /dev/null
+++ b/arch/frv/include/asm/busctl-regs.h
@@ -0,0 +1,41 @@
1/* busctl-regs.h: FR400-series CPU bus controller registers
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_BUSCTL_REGS_H
13#define _ASM_BUSCTL_REGS_H
14
15/* bus controller registers */
16#define __get_LGCR() ({ *(volatile unsigned long *)(0xfe000010); })
17#define __get_LMAICR() ({ *(volatile unsigned long *)(0xfe000030); })
18#define __get_LEMBR() ({ *(volatile unsigned long *)(0xfe000040); })
19#define __get_LEMAM() ({ *(volatile unsigned long *)(0xfe000048); })
20#define __get_LCR(R) ({ *(volatile unsigned long *)(0xfe000100 + 8*(R)); })
21#define __get_LSBR(R) ({ *(volatile unsigned long *)(0xfe000c00 + 8*(R)); })
22#define __get_LSAM(R) ({ *(volatile unsigned long *)(0xfe000d00 + 8*(R)); })
23
24#define __set_LGCR(V) do { *(volatile unsigned long *)(0xfe000010) = (V); } while(0)
25#define __set_LMAICR(V) do { *(volatile unsigned long *)(0xfe000030) = (V); } while(0)
26#define __set_LEMBR(V) do { *(volatile unsigned long *)(0xfe000040) = (V); } while(0)
27#define __set_LEMAM(V) do { *(volatile unsigned long *)(0xfe000048) = (V); } while(0)
28#define __set_LCR(R,V) do { *(volatile unsigned long *)(0xfe000100 + 8*(R)) = (V); } while(0)
29#define __set_LSBR(R,V) do { *(volatile unsigned long *)(0xfe000c00 + 8*(R)) = (V); } while(0)
30#define __set_LSAM(R,V) do { *(volatile unsigned long *)(0xfe000d00 + 8*(R)) = (V); } while(0)
31
32/* FR401 SDRAM controller registers */
33#define __get_DBR(R) ({ *(volatile unsigned long *)(0xfe000e00 + 8*(R)); })
34#define __get_DAM(R) ({ *(volatile unsigned long *)(0xfe000f00 + 8*(R)); })
35
36/* FR551 SDRAM controller registers */
37#define __get_DARS(R) ({ *(volatile unsigned long *)(0xfeff0100 + 8*(R)); })
38#define __get_DAMK(R) ({ *(volatile unsigned long *)(0xfeff0110 + 8*(R)); })
39
40
41#endif /* _ASM_BUSCTL_REGS_H */
diff --git a/arch/frv/include/asm/byteorder.h b/arch/frv/include/asm/byteorder.h
new file mode 100644
index 000000000000..f29b7593e088
--- /dev/null
+++ b/arch/frv/include/asm/byteorder.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_BYTEORDER_H
2#define _ASM_BYTEORDER_H
3
4#include <linux/byteorder/big_endian.h>
5
6#endif /* _ASM_BYTEORDER_H */
diff --git a/arch/frv/include/asm/cache.h b/arch/frv/include/asm/cache.h
new file mode 100644
index 000000000000..2797163b8f4f
--- /dev/null
+++ b/arch/frv/include/asm/cache.h
@@ -0,0 +1,23 @@
1/* cache.h: FRV cache definitions
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef __ASM_CACHE_H
13#define __ASM_CACHE_H
14
15
16/* bytes per L1 cache line */
17#define L1_CACHE_SHIFT (CONFIG_FRV_L1_CACHE_SHIFT)
18#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
19
20#define __cacheline_aligned __attribute__((aligned(L1_CACHE_BYTES)))
21#define ____cacheline_aligned __attribute__((aligned(L1_CACHE_BYTES)))
22
23#endif
diff --git a/arch/frv/include/asm/cacheflush.h b/arch/frv/include/asm/cacheflush.h
new file mode 100644
index 000000000000..432a69e7f3d4
--- /dev/null
+++ b/arch/frv/include/asm/cacheflush.h
@@ -0,0 +1,104 @@
1/* cacheflush.h: FRV cache flushing routines
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_CACHEFLUSH_H
13#define _ASM_CACHEFLUSH_H
14
15/* Keep includes the same across arches. */
16#include <linux/mm.h>
17
18/*
19 * virtually-indexed cache management (our cache is physically indexed)
20 */
21#define flush_cache_all() do {} while(0)
22#define flush_cache_mm(mm) do {} while(0)
23#define flush_cache_dup_mm(mm) do {} while(0)
24#define flush_cache_range(mm, start, end) do {} while(0)
25#define flush_cache_page(vma, vmaddr, pfn) do {} while(0)
26#define flush_cache_vmap(start, end) do {} while(0)
27#define flush_cache_vunmap(start, end) do {} while(0)
28#define flush_dcache_mmap_lock(mapping) do {} while(0)
29#define flush_dcache_mmap_unlock(mapping) do {} while(0)
30
31/*
32 * physically-indexed cache management
33 * - see arch/frv/lib/cache.S
34 */
35extern void frv_dcache_writeback(unsigned long start, unsigned long size);
36extern void frv_cache_invalidate(unsigned long start, unsigned long size);
37extern void frv_icache_invalidate(unsigned long start, unsigned long size);
38extern void frv_cache_wback_inv(unsigned long start, unsigned long size);
39
40static inline void __flush_cache_all(void)
41{
42 asm volatile(" dcef @(gr0,gr0),#1 \n"
43 " icei @(gr0,gr0),#1 \n"
44 " membar \n"
45 : : : "memory"
46 );
47}
48
49/* dcache/icache coherency... */
50#ifdef CONFIG_MMU
51extern void flush_dcache_page(struct page *page);
52#else
53static inline void flush_dcache_page(struct page *page)
54{
55 unsigned long addr = page_to_phys(page);
56 frv_dcache_writeback(addr, addr + PAGE_SIZE);
57}
58#endif
59
60static inline void flush_page_to_ram(struct page *page)
61{
62 flush_dcache_page(page);
63}
64
65static inline void flush_icache(void)
66{
67 __flush_cache_all();
68}
69
70static inline void flush_icache_range(unsigned long start, unsigned long end)
71{
72 frv_cache_wback_inv(start, end);
73}
74
75#ifdef CONFIG_MMU
76extern void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
77 unsigned long start, unsigned long len);
78#else
79static inline void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
80 unsigned long start, unsigned long len)
81{
82 frv_cache_wback_inv(start, start + len);
83}
84#endif
85
86static inline void flush_icache_page(struct vm_area_struct *vma, struct page *page)
87{
88 flush_icache_user_range(vma, page, page_to_phys(page), PAGE_SIZE);
89}
90
91/*
92 * permit ptrace to access another process's address space through the icache
93 * and the dcache
94 */
95#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
96do { \
97 memcpy((dst), (src), (len)); \
98 flush_icache_user_range((vma), (page), (vaddr), (len)); \
99} while(0)
100
101#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
102 memcpy((dst), (src), (len))
103
104#endif /* _ASM_CACHEFLUSH_H */
diff --git a/arch/frv/include/asm/checksum.h b/arch/frv/include/asm/checksum.h
new file mode 100644
index 000000000000..269da09ff637
--- /dev/null
+++ b/arch/frv/include/asm/checksum.h
@@ -0,0 +1,180 @@
1/* checksum.h: FRV checksumming
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_CHECKSUM_H
13#define _ASM_CHECKSUM_H
14
15#include <linux/in6.h>
16
17/*
18 * computes the checksum of a memory block at buff, length len,
19 * and adds in "sum" (32-bit)
20 *
21 * returns a 32-bit number suitable for feeding into itself
22 * or csum_tcpudp_magic
23 *
24 * this function must be called with even lengths, except
25 * for the last fragment, which may be odd
26 *
27 * it's best to have buff aligned on a 32-bit boundary
28 */
29__wsum csum_partial(const void *buff, int len, __wsum sum);
30
31/*
32 * the same as csum_partial, but copies from src while it
33 * checksums
34 *
35 * here even more important to align src and dst on a 32-bit (or even
36 * better 64-bit) boundary
37 */
38__wsum csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum);
39
40/*
41 * the same as csum_partial_copy, but copies from user space.
42 *
43 * here even more important to align src and dst on a 32-bit (or even
44 * better 64-bit) boundary
45 */
46extern __wsum csum_partial_copy_from_user(const void __user *src, void *dst,
47 int len, __wsum sum, int *csum_err);
48
49/*
50 * This is a version of ip_compute_csum() optimized for IP headers,
51 * which always checksum on 4 octet boundaries.
52 *
53 */
54static inline
55__sum16 ip_fast_csum(const void *iph, unsigned int ihl)
56{
57 unsigned int tmp, inc, sum = 0;
58
59 asm(" addcc gr0,gr0,gr0,icc0\n" /* clear icc0.C */
60 " subi %1,#4,%1 \n"
61 "0: \n"
62 " ldu.p @(%1,%3),%4 \n"
63 " subicc %2,#1,%2,icc1 \n"
64 " addxcc.p %4,%0,%0,icc0 \n"
65 " bhi icc1,#2,0b \n"
66
67 /* fold the 33-bit result into 16-bits */
68 " addxcc gr0,%0,%0,icc0 \n"
69 " srli %0,#16,%1 \n"
70 " sethi #0,%0 \n"
71 " add %1,%0,%0 \n"
72 " srli %0,#16,%1 \n"
73 " add %1,%0,%0 \n"
74
75 : "=r" (sum), "=r" (iph), "=r" (ihl), "=r" (inc), "=&r"(tmp)
76 : "0" (sum), "1" (iph), "2" (ihl), "3" (4),
77 "m"(*(volatile struct { int _[100]; } *)iph)
78 : "icc0", "icc1", "memory"
79 );
80
81 return (__force __sum16)~sum;
82}
83
84/*
85 * Fold a partial checksum
86 */
87static inline __sum16 csum_fold(__wsum sum)
88{
89 unsigned int tmp;
90
91 asm(" srli %0,#16,%1 \n"
92 " sethi #0,%0 \n"
93 " add %1,%0,%0 \n"
94 " srli %0,#16,%1 \n"
95 " add %1,%0,%0 \n"
96 : "=r"(sum), "=&r"(tmp)
97 : "0"(sum)
98 );
99
100 return (__force __sum16)~sum;
101}
102
103/*
104 * computes the checksum of the TCP/UDP pseudo-header
105 * returns a 16-bit checksum, already complemented
106 */
107static inline __wsum
108csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len,
109 unsigned short proto, __wsum sum)
110{
111 asm(" addcc %1,%0,%0,icc0 \n"
112 " addxcc %2,%0,%0,icc0 \n"
113 " addxcc %3,%0,%0,icc0 \n"
114 " addxcc gr0,%0,%0,icc0 \n"
115 : "=r" (sum)
116 : "r" (daddr), "r" (saddr), "r" (len + proto), "0"(sum)
117 : "icc0"
118 );
119 return sum;
120}
121
122static inline __sum16
123csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len,
124 unsigned short proto, __wsum sum)
125{
126 return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum));
127}
128
129/*
130 * this routine is used for miscellaneous IP-like checksums, mainly
131 * in icmp.c
132 */
133extern __sum16 ip_compute_csum(const void *buff, int len);
134
135#define _HAVE_ARCH_IPV6_CSUM
136static inline __sum16
137csum_ipv6_magic(const struct in6_addr *saddr, const struct in6_addr *daddr,
138 __u32 len, unsigned short proto, __wsum sum)
139{
140 unsigned long tmp, tmp2;
141
142 asm(" addcc %2,%0,%0,icc0 \n"
143
144 /* add up the source addr */
145 " ldi @(%3,0),%1 \n"
146 " addxcc %1,%0,%0,icc0 \n"
147 " ldi @(%3,4),%2 \n"
148 " addxcc %2,%0,%0,icc0 \n"
149 " ldi @(%3,8),%1 \n"
150 " addxcc %1,%0,%0,icc0 \n"
151 " ldi @(%3,12),%2 \n"
152 " addxcc %2,%0,%0,icc0 \n"
153
154 /* add up the dest addr */
155 " ldi @(%4,0),%1 \n"
156 " addxcc %1,%0,%0,icc0 \n"
157 " ldi @(%4,4),%2 \n"
158 " addxcc %2,%0,%0,icc0 \n"
159 " ldi @(%4,8),%1 \n"
160 " addxcc %1,%0,%0,icc0 \n"
161 " ldi @(%4,12),%2 \n"
162 " addxcc %2,%0,%0,icc0 \n"
163
164 /* fold the 33-bit result into 16-bits */
165 " addxcc gr0,%0,%0,icc0 \n"
166 " srli %0,#16,%1 \n"
167 " sethi #0,%0 \n"
168 " add %1,%0,%0 \n"
169 " srli %0,#16,%1 \n"
170 " add %1,%0,%0 \n"
171
172 : "=r" (sum), "=&r" (tmp), "=r" (tmp2)
173 : "r" (saddr), "r" (daddr), "0" (sum), "2" (len + proto)
174 : "icc0"
175 );
176
177 return (__force __sum16)~sum;
178}
179
180#endif /* _ASM_CHECKSUM_H */
diff --git a/arch/frv/include/asm/cpu-irqs.h b/arch/frv/include/asm/cpu-irqs.h
new file mode 100644
index 000000000000..478f3498fcfe
--- /dev/null
+++ b/arch/frv/include/asm/cpu-irqs.h
@@ -0,0 +1,81 @@
1/* cpu-irqs.h: on-CPU peripheral irqs
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_CPU_IRQS_H
13#define _ASM_CPU_IRQS_H
14
15#ifndef __ASSEMBLY__
16
17/* IRQ to level mappings */
18#define IRQ_GDBSTUB_LEVEL 15
19#define IRQ_UART_LEVEL 13
20
21#ifdef CONFIG_GDBSTUB_UART0
22#define IRQ_UART0_LEVEL IRQ_GDBSTUB_LEVEL
23#else
24#define IRQ_UART0_LEVEL IRQ_UART_LEVEL
25#endif
26
27#ifdef CONFIG_GDBSTUB_UART1
28#define IRQ_UART1_LEVEL IRQ_GDBSTUB_LEVEL
29#else
30#define IRQ_UART1_LEVEL IRQ_UART_LEVEL
31#endif
32
33#define IRQ_DMA0_LEVEL 14
34#define IRQ_DMA1_LEVEL 14
35#define IRQ_DMA2_LEVEL 14
36#define IRQ_DMA3_LEVEL 14
37#define IRQ_DMA4_LEVEL 14
38#define IRQ_DMA5_LEVEL 14
39#define IRQ_DMA6_LEVEL 14
40#define IRQ_DMA7_LEVEL 14
41
42#define IRQ_TIMER0_LEVEL 12
43#define IRQ_TIMER1_LEVEL 11
44#define IRQ_TIMER2_LEVEL 10
45
46#define IRQ_XIRQ0_LEVEL 1
47#define IRQ_XIRQ1_LEVEL 2
48#define IRQ_XIRQ2_LEVEL 3
49#define IRQ_XIRQ3_LEVEL 4
50#define IRQ_XIRQ4_LEVEL 5
51#define IRQ_XIRQ5_LEVEL 6
52#define IRQ_XIRQ6_LEVEL 7
53#define IRQ_XIRQ7_LEVEL 8
54
55/* IRQ IDs presented to drivers */
56#define IRQ_CPU__UNUSED IRQ_BASE_CPU
57#define IRQ_CPU_UART0 (IRQ_BASE_CPU + IRQ_UART0_LEVEL)
58#define IRQ_CPU_UART1 (IRQ_BASE_CPU + IRQ_UART1_LEVEL)
59#define IRQ_CPU_TIMER0 (IRQ_BASE_CPU + IRQ_TIMER0_LEVEL)
60#define IRQ_CPU_TIMER1 (IRQ_BASE_CPU + IRQ_TIMER1_LEVEL)
61#define IRQ_CPU_TIMER2 (IRQ_BASE_CPU + IRQ_TIMER2_LEVEL)
62#define IRQ_CPU_DMA0 (IRQ_BASE_CPU + IRQ_DMA0_LEVEL)
63#define IRQ_CPU_DMA1 (IRQ_BASE_CPU + IRQ_DMA1_LEVEL)
64#define IRQ_CPU_DMA2 (IRQ_BASE_CPU + IRQ_DMA2_LEVEL)
65#define IRQ_CPU_DMA3 (IRQ_BASE_CPU + IRQ_DMA3_LEVEL)
66#define IRQ_CPU_DMA4 (IRQ_BASE_CPU + IRQ_DMA4_LEVEL)
67#define IRQ_CPU_DMA5 (IRQ_BASE_CPU + IRQ_DMA5_LEVEL)
68#define IRQ_CPU_DMA6 (IRQ_BASE_CPU + IRQ_DMA6_LEVEL)
69#define IRQ_CPU_DMA7 (IRQ_BASE_CPU + IRQ_DMA7_LEVEL)
70#define IRQ_CPU_EXTERNAL0 (IRQ_BASE_CPU + IRQ_XIRQ0_LEVEL)
71#define IRQ_CPU_EXTERNAL1 (IRQ_BASE_CPU + IRQ_XIRQ1_LEVEL)
72#define IRQ_CPU_EXTERNAL2 (IRQ_BASE_CPU + IRQ_XIRQ2_LEVEL)
73#define IRQ_CPU_EXTERNAL3 (IRQ_BASE_CPU + IRQ_XIRQ3_LEVEL)
74#define IRQ_CPU_EXTERNAL4 (IRQ_BASE_CPU + IRQ_XIRQ4_LEVEL)
75#define IRQ_CPU_EXTERNAL5 (IRQ_BASE_CPU + IRQ_XIRQ5_LEVEL)
76#define IRQ_CPU_EXTERNAL6 (IRQ_BASE_CPU + IRQ_XIRQ6_LEVEL)
77#define IRQ_CPU_EXTERNAL7 (IRQ_BASE_CPU + IRQ_XIRQ7_LEVEL)
78
79#endif /* !__ASSEMBLY__ */
80
81#endif /* _ASM_CPU_IRQS_H */
diff --git a/arch/frv/include/asm/cpumask.h b/arch/frv/include/asm/cpumask.h
new file mode 100644
index 000000000000..d999c20c84d2
--- /dev/null
+++ b/arch/frv/include/asm/cpumask.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_CPUMASK_H
2#define _ASM_CPUMASK_H
3
4#include <asm-generic/cpumask.h>
5
6#endif /* _ASM_CPUMASK_H */
diff --git a/arch/frv/include/asm/cputime.h b/arch/frv/include/asm/cputime.h
new file mode 100644
index 000000000000..f6c373ad2b80
--- /dev/null
+++ b/arch/frv/include/asm/cputime.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_CPUTIME_H
2#define _ASM_CPUTIME_H
3
4#include <asm-generic/cputime.h>
5
6#endif /* _ASM_CPUTIME_H */
diff --git a/arch/frv/include/asm/current.h b/arch/frv/include/asm/current.h
new file mode 100644
index 000000000000..86b027491b08
--- /dev/null
+++ b/arch/frv/include/asm/current.h
@@ -0,0 +1,30 @@
1/* current.h: FRV current task pointer
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_CURRENT_H
13#define _ASM_CURRENT_H
14
15#ifndef __ASSEMBLY__
16
17/*
18 * dedicate GR29 to keeping the current task pointer
19 */
20register struct task_struct *current asm("gr29");
21
22#define get_current() current
23
24#else
25
26#define CURRENT gr29
27
28#endif
29
30#endif /* _ASM_CURRENT_H */
diff --git a/arch/frv/include/asm/delay.h b/arch/frv/include/asm/delay.h
new file mode 100644
index 000000000000..597b4ebf03b4
--- /dev/null
+++ b/arch/frv/include/asm/delay.h
@@ -0,0 +1,50 @@
1/* delay.h: FRV delay code
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_DELAY_H
13#define _ASM_DELAY_H
14
15#include <asm/param.h>
16#include <asm/timer-regs.h>
17
18/*
19 * delay loop - runs at __core_clock_speed_HZ / 2 [there are 2 insns in the loop]
20 */
21extern unsigned long __delay_loops_MHz;
22
23static inline void __delay(unsigned long loops)
24{
25 asm volatile("1: subicc %0,#1,%0,icc0 \n"
26 " bnc icc0,#2,1b \n"
27 : "=r" (loops)
28 : "0" (loops)
29 : "icc0"
30 );
31}
32
33/*
34 * Use only for very small delays ( < 1 msec). Should probably use a
35 * lookup table, really, as the multiplications take much too long with
36 * short delays. This is a "reasonable" implementation, though (and the
37 * first constant multiplications gets optimized away if the delay is
38 * a constant)
39 */
40
41extern unsigned long loops_per_jiffy;
42
43static inline void udelay(unsigned long usecs)
44{
45 __delay(usecs * __delay_loops_MHz);
46}
47
48#define ndelay(n) udelay((n) * 5)
49
50#endif /* _ASM_DELAY_H */
diff --git a/arch/frv/include/asm/device.h b/arch/frv/include/asm/device.h
new file mode 100644
index 000000000000..d8f9872b0e2d
--- /dev/null
+++ b/arch/frv/include/asm/device.h
@@ -0,0 +1,7 @@
1/*
2 * Arch specific extensions to struct device
3 *
4 * This file is released under the GPLv2
5 */
6#include <asm-generic/device.h>
7
diff --git a/arch/frv/include/asm/div64.h b/arch/frv/include/asm/div64.h
new file mode 100644
index 000000000000..6cd978cefb28
--- /dev/null
+++ b/arch/frv/include/asm/div64.h
@@ -0,0 +1 @@
#include <asm-generic/div64.h>
diff --git a/arch/frv/include/asm/dm9000.h b/arch/frv/include/asm/dm9000.h
new file mode 100644
index 000000000000..f6f48fd9ec6e
--- /dev/null
+++ b/arch/frv/include/asm/dm9000.h
@@ -0,0 +1,37 @@
1/* dm9000.h: Davicom DM9000 adapter configuration
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_DM9000_H
13#define _ASM_DM9000_H
14
15#include <asm/mb-regs.h>
16
17#define DM9000_ARCH_IOBASE (__region_CS6 + 0x300)
18#define DM9000_ARCH_IRQ IRQ_CPU_EXTERNAL3 /* XIRQ #3 (shared with FPGA) */
19#undef DM9000_ARCH_IRQ_ACTLOW /* IRQ pin active high */
20#define DM9000_ARCH_BUS_INFO "CS6#+0x300" /* bus info for ethtool */
21
22#undef __is_PCI_IO
23#define __is_PCI_IO(addr) 0 /* not PCI */
24
25#undef inl
26#define inl(addr) \
27({ \
28 unsigned long __ioaddr = (unsigned long) addr; \
29 uint32_t x = readl(__ioaddr); \
30 ((x & 0xff) << 24) | ((x & 0xff00) << 8) | ((x >> 8) & 0xff00) | ((x >> 24) & 0xff); \
31})
32
33#undef insl
34#define insl(a,b,l) __insl(a,b,l,0) /* don't byte-swap */
35
36
37#endif /* _ASM_DM9000_H */
diff --git a/arch/frv/include/asm/dma-mapping.h b/arch/frv/include/asm/dma-mapping.h
new file mode 100644
index 000000000000..b2898877c07b
--- /dev/null
+++ b/arch/frv/include/asm/dma-mapping.h
@@ -0,0 +1,174 @@
1#ifndef _ASM_DMA_MAPPING_H
2#define _ASM_DMA_MAPPING_H
3
4#include <linux/device.h>
5#include <asm/cache.h>
6#include <asm/cacheflush.h>
7#include <asm/scatterlist.h>
8#include <asm/io.h>
9
10#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
11#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
12
13extern unsigned long __nongprelbss dma_coherent_mem_start;
14extern unsigned long __nongprelbss dma_coherent_mem_end;
15
16void *dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t gfp);
17void dma_free_coherent(struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle);
18
19/*
20 * Map a single buffer of the indicated size for DMA in streaming mode.
21 * The 32-bit bus address to use is returned.
22 *
23 * Once the device is given the dma address, the device owns this memory
24 * until either pci_unmap_single or pci_dma_sync_single is performed.
25 */
26extern dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
27 enum dma_data_direction direction);
28
29/*
30 * Unmap a single streaming mode DMA translation. The dma_addr and size
31 * must match what was provided for in a previous pci_map_single call. All
32 * other usages are undefined.
33 *
34 * After this call, reads by the cpu to the buffer are guarenteed to see
35 * whatever the device wrote there.
36 */
37static inline
38void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
39 enum dma_data_direction direction)
40{
41 BUG_ON(direction == DMA_NONE);
42}
43
44/*
45 * Map a set of buffers described by scatterlist in streaming
46 * mode for DMA. This is the scather-gather version of the
47 * above pci_map_single interface. Here the scatter gather list
48 * elements are each tagged with the appropriate dma address
49 * and length. They are obtained via sg_dma_{address,length}(SG).
50 *
51 * NOTE: An implementation may be able to use a smaller number of
52 * DMA address/length pairs than there are SG table elements.
53 * (for example via virtual mapping capabilities)
54 * The routine returns the number of addr/length pairs actually
55 * used, at most nents.
56 *
57 * Device ownership issues as mentioned above for pci_map_single are
58 * the same here.
59 */
60extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
61 enum dma_data_direction direction);
62
63/*
64 * Unmap a set of streaming mode DMA translations.
65 * Again, cpu read rules concerning calls here are the same as for
66 * pci_unmap_single() above.
67 */
68static inline
69void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
70 enum dma_data_direction direction)
71{
72 BUG_ON(direction == DMA_NONE);
73}
74
75extern
76dma_addr_t dma_map_page(struct device *dev, struct page *page, unsigned long offset,
77 size_t size, enum dma_data_direction direction);
78
79static inline
80void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
81 enum dma_data_direction direction)
82{
83 BUG_ON(direction == DMA_NONE);
84}
85
86
87static inline
88void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,
89 enum dma_data_direction direction)
90{
91}
92
93static inline
94void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size,
95 enum dma_data_direction direction)
96{
97 flush_write_buffers();
98}
99
100static inline
101void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
102 unsigned long offset, size_t size,
103 enum dma_data_direction direction)
104{
105}
106
107static inline
108void dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
109 unsigned long offset, size_t size,
110 enum dma_data_direction direction)
111{
112 flush_write_buffers();
113}
114
115static inline
116void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
117 enum dma_data_direction direction)
118{
119}
120
121static inline
122void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
123 enum dma_data_direction direction)
124{
125 flush_write_buffers();
126}
127
128static inline
129int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
130{
131 return 0;
132}
133
134static inline
135int dma_supported(struct device *dev, u64 mask)
136{
137 /*
138 * we fall back to GFP_DMA when the mask isn't all 1s,
139 * so we can't guarantee allocations that must be
140 * within a tighter range than GFP_DMA..
141 */
142 if (mask < 0x00ffffff)
143 return 0;
144
145 return 1;
146}
147
148static inline
149int dma_set_mask(struct device *dev, u64 mask)
150{
151 if (!dev->dma_mask || !dma_supported(dev, mask))
152 return -EIO;
153
154 *dev->dma_mask = mask;
155
156 return 0;
157}
158
159static inline
160int dma_get_cache_alignment(void)
161{
162 return 1 << L1_CACHE_SHIFT;
163}
164
165#define dma_is_consistent(d, h) (1)
166
167static inline
168void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
169 enum dma_data_direction direction)
170{
171 flush_write_buffers();
172}
173
174#endif /* _ASM_DMA_MAPPING_H */
diff --git a/arch/frv/include/asm/dma.h b/arch/frv/include/asm/dma.h
new file mode 100644
index 000000000000..683c47d48a5b
--- /dev/null
+++ b/arch/frv/include/asm/dma.h
@@ -0,0 +1,125 @@
1/* dma.h: FRV DMA controller management
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_DMA_H
13#define _ASM_DMA_H
14
15//#define DMA_DEBUG 1
16
17#include <linux/interrupt.h>
18
19#undef MAX_DMA_CHANNELS /* don't use kernel/dma.c */
20
21/* under 2.4 this is actually needed by the new bootmem allocator */
22#define MAX_DMA_ADDRESS PAGE_OFFSET
23
24/*
25 * FRV DMA controller management
26 */
27typedef irqreturn_t (*dma_irq_handler_t)(int dmachan, unsigned long cstr, void *data);
28
29extern void frv_dma_init(void);
30
31extern int frv_dma_open(const char *devname,
32 unsigned long dmamask,
33 int dmacap,
34 dma_irq_handler_t handler,
35 unsigned long irq_flags,
36 void *data);
37
38/* channels required */
39#define FRV_DMA_MASK_ANY ULONG_MAX /* any channel */
40
41/* capabilities required */
42#define FRV_DMA_CAP_DREQ 0x01 /* DMA request pin */
43#define FRV_DMA_CAP_DACK 0x02 /* DMA ACK pin */
44#define FRV_DMA_CAP_DONE 0x04 /* DMA done pin */
45
46extern void frv_dma_close(int dma);
47
48extern void frv_dma_config(int dma, unsigned long ccfr, unsigned long cctr, unsigned long apr);
49
50extern void frv_dma_start(int dma,
51 unsigned long sba, unsigned long dba,
52 unsigned long pix, unsigned long six, unsigned long bcl);
53
54extern void frv_dma_restart_circular(int dma, unsigned long six);
55
56extern void frv_dma_stop(int dma);
57
58extern int is_frv_dma_interrupting(int dma);
59
60extern void frv_dma_dump(int dma);
61
62extern void frv_dma_status_clear(int dma);
63
64#define FRV_DMA_NCHANS 8
65#define FRV_DMA_4CHANS 4
66#define FRV_DMA_8CHANS 8
67
68#define DMAC_CCFRx 0x00 /* channel configuration reg */
69#define DMAC_CCFRx_CM_SHIFT 16
70#define DMAC_CCFRx_CM_DA 0x00000000
71#define DMAC_CCFRx_CM_SCA 0x00010000
72#define DMAC_CCFRx_CM_DCA 0x00020000
73#define DMAC_CCFRx_CM_2D 0x00030000
74#define DMAC_CCFRx_ATS_SHIFT 8
75#define DMAC_CCFRx_RS_INTERN 0x00000000
76#define DMAC_CCFRx_RS_EXTERN 0x00000001
77#define DMAC_CCFRx_RS_SHIFT 0
78
79#define DMAC_CSTRx 0x08 /* channel status reg */
80#define DMAC_CSTRx_FS 0x0000003f
81#define DMAC_CSTRx_NE 0x00000100
82#define DMAC_CSTRx_FED 0x00000200
83#define DMAC_CSTRx_WER 0x00000800
84#define DMAC_CSTRx_RER 0x00001000
85#define DMAC_CSTRx_CE 0x00002000
86#define DMAC_CSTRx_INT 0x00800000
87#define DMAC_CSTRx_BUSY 0x80000000
88
89#define DMAC_CCTRx 0x10 /* channel control reg */
90#define DMAC_CCTRx_DSIZ_1 0x00000000
91#define DMAC_CCTRx_DSIZ_2 0x00000001
92#define DMAC_CCTRx_DSIZ_4 0x00000002
93#define DMAC_CCTRx_DSIZ_32 0x00000005
94#define DMAC_CCTRx_DAU_HOLD 0x00000000
95#define DMAC_CCTRx_DAU_INC 0x00000010
96#define DMAC_CCTRx_DAU_DEC 0x00000020
97#define DMAC_CCTRx_SSIZ_1 0x00000000
98#define DMAC_CCTRx_SSIZ_2 0x00000100
99#define DMAC_CCTRx_SSIZ_4 0x00000200
100#define DMAC_CCTRx_SSIZ_32 0x00000500
101#define DMAC_CCTRx_SAU_HOLD 0x00000000
102#define DMAC_CCTRx_SAU_INC 0x00001000
103#define DMAC_CCTRx_SAU_DEC 0x00002000
104#define DMAC_CCTRx_FC 0x08000000
105#define DMAC_CCTRx_ICE 0x10000000
106#define DMAC_CCTRx_IE 0x40000000
107#define DMAC_CCTRx_ACT 0x80000000
108
109#define DMAC_SBAx 0x18 /* source base address reg */
110#define DMAC_DBAx 0x20 /* data base address reg */
111#define DMAC_PIXx 0x28 /* primary index reg */
112#define DMAC_SIXx 0x30 /* secondary index reg */
113#define DMAC_BCLx 0x38 /* byte count limit reg */
114#define DMAC_APRx 0x40 /* alternate pointer reg */
115
116/*
117 * required for PCI + MODULES
118 */
119#ifdef CONFIG_PCI
120extern int isa_dma_bridge_buggy;
121#else
122#define isa_dma_bridge_buggy (0)
123#endif
124
125#endif /* _ASM_DMA_H */
diff --git a/arch/frv/include/asm/elf.h b/arch/frv/include/asm/elf.h
new file mode 100644
index 000000000000..7279ec07d62e
--- /dev/null
+++ b/arch/frv/include/asm/elf.h
@@ -0,0 +1,142 @@
1/* elf.h: FR-V ELF definitions
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * - Derived from include/asm-m68knommu/elf.h
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12#ifndef __ASM_ELF_H
13#define __ASM_ELF_H
14
15#include <asm/ptrace.h>
16#include <asm/user.h>
17
18struct elf32_hdr;
19
20/*
21 * ELF header e_flags defines.
22 */
23#define EF_FRV_GPR_MASK 0x00000003 /* mask for # of gprs */
24#define EF_FRV_GPR32 0x00000001 /* Only uses GR on 32-register */
25#define EF_FRV_GPR64 0x00000002 /* Only uses GR on 64-register */
26#define EF_FRV_FPR_MASK 0x0000000c /* mask for # of fprs */
27#define EF_FRV_FPR32 0x00000004 /* Only uses FR on 32-register */
28#define EF_FRV_FPR64 0x00000008 /* Only uses FR on 64-register */
29#define EF_FRV_FPR_NONE 0x0000000C /* Uses software floating-point */
30#define EF_FRV_DWORD_MASK 0x00000030 /* mask for dword support */
31#define EF_FRV_DWORD_YES 0x00000010 /* Assumes stack aligned to 8-byte boundaries. */
32#define EF_FRV_DWORD_NO 0x00000020 /* Assumes stack aligned to 4-byte boundaries. */
33#define EF_FRV_DOUBLE 0x00000040 /* Uses double instructions. */
34#define EF_FRV_MEDIA 0x00000080 /* Uses media instructions. */
35#define EF_FRV_PIC 0x00000100 /* Uses position independent code. */
36#define EF_FRV_NON_PIC_RELOCS 0x00000200 /* Does not use position Independent code. */
37#define EF_FRV_MULADD 0x00000400 /* -mmuladd */
38#define EF_FRV_BIGPIC 0x00000800 /* -fPIC */
39#define EF_FRV_LIBPIC 0x00001000 /* -mlibrary-pic */
40#define EF_FRV_G0 0x00002000 /* -G 0, no small data ptr */
41#define EF_FRV_NOPACK 0x00004000 /* -mnopack */
42#define EF_FRV_FDPIC 0x00008000 /* -mfdpic */
43#define EF_FRV_CPU_MASK 0xff000000 /* specific cpu bits */
44#define EF_FRV_CPU_GENERIC 0x00000000 /* Set CPU type is FR-V */
45#define EF_FRV_CPU_FR500 0x01000000 /* Set CPU type is FR500 */
46#define EF_FRV_CPU_FR300 0x02000000 /* Set CPU type is FR300 */
47#define EF_FRV_CPU_SIMPLE 0x03000000 /* SIMPLE */
48#define EF_FRV_CPU_TOMCAT 0x04000000 /* Tomcat, FR500 prototype */
49#define EF_FRV_CPU_FR400 0x05000000 /* Set CPU type is FR400 */
50#define EF_FRV_CPU_FR550 0x06000000 /* Set CPU type is FR550 */
51#define EF_FRV_CPU_FR405 0x07000000 /* Set CPU type is FR405 */
52#define EF_FRV_CPU_FR450 0x08000000 /* Set CPU type is FR450 */
53
54/*
55 * FR-V ELF relocation types
56 */
57
58
59/*
60 * ELF register definitions..
61 */
62typedef unsigned long elf_greg_t;
63
64#define ELF_NGREG (sizeof(struct pt_regs) / sizeof(elf_greg_t))
65typedef elf_greg_t elf_gregset_t[ELF_NGREG];
66
67typedef struct user_fpmedia_regs elf_fpregset_t;
68
69/*
70 * This is used to ensure we don't load something for the wrong architecture.
71 */
72extern int elf_check_arch(const struct elf32_hdr *hdr);
73
74#define elf_check_fdpic(x) ((x)->e_flags & EF_FRV_FDPIC && !((x)->e_flags & EF_FRV_NON_PIC_RELOCS))
75#define elf_check_const_displacement(x) ((x)->e_flags & EF_FRV_PIC)
76
77/*
78 * These are used to set parameters in the core dumps.
79 */
80#define ELF_CLASS ELFCLASS32
81#define ELF_DATA ELFDATA2MSB
82#define ELF_ARCH EM_FRV
83
84#define ELF_PLAT_INIT(_r) \
85do { \
86 __kernel_frame0_ptr->gr16 = 0; \
87 __kernel_frame0_ptr->gr17 = 0; \
88 __kernel_frame0_ptr->gr18 = 0; \
89 __kernel_frame0_ptr->gr19 = 0; \
90 __kernel_frame0_ptr->gr20 = 0; \
91 __kernel_frame0_ptr->gr21 = 0; \
92 __kernel_frame0_ptr->gr22 = 0; \
93 __kernel_frame0_ptr->gr23 = 0; \
94 __kernel_frame0_ptr->gr24 = 0; \
95 __kernel_frame0_ptr->gr25 = 0; \
96 __kernel_frame0_ptr->gr26 = 0; \
97 __kernel_frame0_ptr->gr27 = 0; \
98 __kernel_frame0_ptr->gr29 = 0; \
99} while(0)
100
101#define ELF_FDPIC_PLAT_INIT(_regs, _exec_map_addr, _interp_map_addr, _dynamic_addr) \
102do { \
103 __kernel_frame0_ptr->gr16 = _exec_map_addr; \
104 __kernel_frame0_ptr->gr17 = _interp_map_addr; \
105 __kernel_frame0_ptr->gr18 = _dynamic_addr; \
106 __kernel_frame0_ptr->gr19 = 0; \
107 __kernel_frame0_ptr->gr20 = 0; \
108 __kernel_frame0_ptr->gr21 = 0; \
109 __kernel_frame0_ptr->gr22 = 0; \
110 __kernel_frame0_ptr->gr23 = 0; \
111 __kernel_frame0_ptr->gr24 = 0; \
112 __kernel_frame0_ptr->gr25 = 0; \
113 __kernel_frame0_ptr->gr26 = 0; \
114 __kernel_frame0_ptr->gr27 = 0; \
115 __kernel_frame0_ptr->gr29 = 0; \
116} while(0)
117
118#define USE_ELF_CORE_DUMP
119#define ELF_FDPIC_CORE_EFLAGS EF_FRV_FDPIC
120#define ELF_EXEC_PAGESIZE 16384
121
122/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
123 use of this is to invoke "./ld.so someprog" to test out a new version of
124 the loader. We need to make sure that it is out of the way of the program
125 that it will "exec", and that there is sufficient room for the brk. */
126
127#define ELF_ET_DYN_BASE 0x08000000UL
128
129/* This yields a mask that user programs can use to figure out what
130 instruction set this cpu supports. */
131
132#define ELF_HWCAP (0)
133
134/* This yields a string that ld.so will use to load implementation
135 specific libraries for optimization. This is more specific in
136 intent than poking at uname or /proc/cpuinfo. */
137
138#define ELF_PLATFORM (NULL)
139
140#define SET_PERSONALITY(ex) set_personality(PER_LINUX)
141
142#endif
diff --git a/arch/frv/include/asm/emergency-restart.h b/arch/frv/include/asm/emergency-restart.h
new file mode 100644
index 000000000000..108d8c48e42e
--- /dev/null
+++ b/arch/frv/include/asm/emergency-restart.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_EMERGENCY_RESTART_H
2#define _ASM_EMERGENCY_RESTART_H
3
4#include <asm-generic/emergency-restart.h>
5
6#endif /* _ASM_EMERGENCY_RESTART_H */
diff --git a/arch/frv/include/asm/errno.h b/arch/frv/include/asm/errno.h
new file mode 100644
index 000000000000..d010795ceefe
--- /dev/null
+++ b/arch/frv/include/asm/errno.h
@@ -0,0 +1,7 @@
1#ifndef _ASM_ERRNO_H
2#define _ASM_ERRNO_H
3
4#include <asm-generic/errno.h>
5
6#endif /* _ASM_ERRNO_H */
7
diff --git a/arch/frv/include/asm/fb.h b/arch/frv/include/asm/fb.h
new file mode 100644
index 000000000000..c7df38030992
--- /dev/null
+++ b/arch/frv/include/asm/fb.h
@@ -0,0 +1,12 @@
1#ifndef _ASM_FB_H_
2#define _ASM_FB_H_
3#include <linux/fb.h>
4
5#define fb_pgprotect(...) do {} while (0)
6
7static inline int fb_is_primary_device(struct fb_info *info)
8{
9 return 0;
10}
11
12#endif /* _ASM_FB_H_ */
diff --git a/arch/frv/include/asm/fcntl.h b/arch/frv/include/asm/fcntl.h
new file mode 100644
index 000000000000..46ab12db5739
--- /dev/null
+++ b/arch/frv/include/asm/fcntl.h
@@ -0,0 +1 @@
#include <asm-generic/fcntl.h>
diff --git a/arch/frv/include/asm/fpu.h b/arch/frv/include/asm/fpu.h
new file mode 100644
index 000000000000..d73c60b56641
--- /dev/null
+++ b/arch/frv/include/asm/fpu.h
@@ -0,0 +1,11 @@
1#ifndef __ASM_FPU_H
2#define __ASM_FPU_H
3
4
5/*
6 * MAX floating point unit state size (FSAVE/FRESTORE)
7 */
8
9#define kernel_fpu_end() do { asm volatile("bar":::"memory"); preempt_enable(); } while(0)
10
11#endif /* __ASM_FPU_H */
diff --git a/arch/frv/include/asm/ftrace.h b/arch/frv/include/asm/ftrace.h
new file mode 100644
index 000000000000..40a8c178f10d
--- /dev/null
+++ b/arch/frv/include/asm/ftrace.h
@@ -0,0 +1 @@
/* empty */
diff --git a/arch/frv/include/asm/futex.h b/arch/frv/include/asm/futex.h
new file mode 100644
index 000000000000..08b3d1da3583
--- /dev/null
+++ b/arch/frv/include/asm/futex.h
@@ -0,0 +1,19 @@
1#ifndef _ASM_FUTEX_H
2#define _ASM_FUTEX_H
3
4#ifdef __KERNEL__
5
6#include <linux/futex.h>
7#include <asm/errno.h>
8#include <asm/uaccess.h>
9
10extern int futex_atomic_op_inuser(int encoded_op, int __user *uaddr);
11
12static inline int
13futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
14{
15 return -ENOSYS;
16}
17
18#endif
19#endif
diff --git a/arch/frv/include/asm/gdb-stub.h b/arch/frv/include/asm/gdb-stub.h
new file mode 100644
index 000000000000..24f9738670bd
--- /dev/null
+++ b/arch/frv/include/asm/gdb-stub.h
@@ -0,0 +1,140 @@
1/* gdb-stub.h: FRV GDB stub
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * - Derived from asm-mips/gdb-stub.h (c) 1995 Andreas Busse
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12#ifndef __ASM_GDB_STUB_H
13#define __ASM_GDB_STUB_H
14
15#undef GDBSTUB_DEBUG_PROTOCOL
16
17#include <asm/ptrace.h>
18
19/*
20 * important register numbers in GDB protocol
21 * - GR0, GR1, GR2, GR3, GR4, GR5, GR6, GR7,
22 * - GR8, GR9, GR10, GR11, GR12, GR13, GR14, GR15,
23 * - GR16, GR17, GR18, GR19, GR20, GR21, GR22, GR23,
24 * - GR24, GR25, GR26, GR27, GR28, GR29, GR30, GR31,
25 * - GR32, GR33, GR34, GR35, GR36, GR37, GR38, GR39,
26 * - GR40, GR41, GR42, GR43, GR44, GR45, GR46, GR47,
27 * - GR48, GR49, GR50, GR51, GR52, GR53, GR54, GR55,
28 * - GR56, GR57, GR58, GR59, GR60, GR61, GR62, GR63,
29 * - FR0, FR1, FR2, FR3, FR4, FR5, FR6, FR7,
30 * - FR8, FR9, FR10, FR11, FR12, FR13, FR14, FR15,
31 * - FR16, FR17, FR18, FR19, FR20, FR21, FR22, FR23,
32 * - FR24, FR25, FR26, FR27, FR28, FR29, FR30, FR31,
33 * - FR32, FR33, FR34, FR35, FR36, FR37, FR38, FR39,
34 * - FR40, FR41, FR42, FR43, FR44, FR45, FR46, FR47,
35 * - FR48, FR49, FR50, FR51, FR52, FR53, FR54, FR55,
36 * - FR56, FR57, FR58, FR59, FR60, FR61, FR62, FR63,
37 * - PC, PSR, CCR, CCCR,
38 * - _X132, _X133, _X134
39 * - TBR, BRR, DBAR0, DBAR1, DBAR2, DBAR3,
40 * - SCR0, SCR1, SCR2, SCR3,
41 * - LR, LCR,
42 * - IACC0H, IACC0L,
43 * - FSR0,
44 * - ACC0, ACC1, ACC2, ACC3, ACC4, ACC5, ACC6, ACC7,
45 * - ACCG0123, ACCG4567,
46 * - MSR0, MSR1,
47 * - GNER0, GNER1,
48 * - FNER0, FNER1,
49 */
50#define GDB_REG_GR(N) (N)
51#define GDB_REG_FR(N) (64+(N))
52#define GDB_REG_PC 128
53#define GDB_REG_PSR 129
54#define GDB_REG_CCR 130
55#define GDB_REG_CCCR 131
56#define GDB_REG_TBR 135
57#define GDB_REG_BRR 136
58#define GDB_REG_DBAR(N) (137+(N))
59#define GDB_REG_SCR(N) (141+(N))
60#define GDB_REG_LR 145
61#define GDB_REG_LCR 146
62#define GDB_REG_FSR0 149
63#define GDB_REG_ACC(N) (150+(N))
64#define GDB_REG_ACCG(N) (158+(N)/4)
65#define GDB_REG_MSR(N) (160+(N))
66#define GDB_REG_GNER(N) (162+(N))
67#define GDB_REG_FNER(N) (164+(N))
68
69#define GDB_REG_SP GDB_REG_GR(1)
70#define GDB_REG_FP GDB_REG_GR(2)
71
72#ifndef _LANGUAGE_ASSEMBLY
73
74/*
75 * Prototypes
76 */
77extern void show_registers_only(struct pt_regs *regs);
78
79extern void gdbstub_init(void);
80extern void gdbstub(int type);
81extern void gdbstub_exit(int status);
82
83extern void gdbstub_io_init(void);
84extern void gdbstub_set_baud(unsigned baud);
85extern int gdbstub_rx_char(unsigned char *_ch, int nonblock);
86extern void gdbstub_tx_char(unsigned char ch);
87extern void gdbstub_tx_flush(void);
88extern void gdbstub_do_rx(void);
89
90extern asmlinkage void __debug_stub_init_break(void);
91extern asmlinkage void __break_hijack_kernel_event(void);
92extern asmlinkage void __break_hijack_kernel_event_breaks_here(void);
93extern asmlinkage void start_kernel(void);
94
95extern asmlinkage void gdbstub_rx_handler(void);
96extern asmlinkage void gdbstub_rx_irq(void);
97extern asmlinkage void gdbstub_intercept(void);
98
99extern uint32_t __entry_usertrap_table[];
100extern uint32_t __entry_kerneltrap_table[];
101
102extern volatile u8 gdbstub_rx_buffer[PAGE_SIZE];
103extern volatile u32 gdbstub_rx_inp;
104extern volatile u32 gdbstub_rx_outp;
105extern volatile u8 gdbstub_rx_overflow;
106extern u8 gdbstub_rx_unget;
107
108extern void gdbstub_printk(const char *fmt, ...);
109extern void debug_to_serial(const char *p, int n);
110extern void console_set_baud(unsigned baud);
111
112#ifdef GDBSTUB_DEBUG_PROTOCOL
113#define gdbstub_proto(FMT,...) gdbstub_printk(FMT,##__VA_ARGS__)
114#else
115#define gdbstub_proto(FMT,...) ({ 0; })
116#endif
117
118/*
119 * we dedicate GR31 to keeping a pointer to the gdbstub exception frame
120 * - gr31 is destroyed on entry to the gdbstub if !MMU
121 * - gr31 is saved in scr3 on entry to the gdbstub if in !MMU
122 */
123register struct frv_frame0 *__debug_frame0 asm("gr31");
124
125#define __debug_frame (&__debug_frame0->regs)
126#define __debug_user_context (&__debug_frame0->uc)
127#define __debug_regs (&__debug_frame0->debug)
128#define __debug_reg(X) ((unsigned long *) ((unsigned long) &__debug_frame0 + (X)))
129
130struct frv_debug_status {
131 unsigned long bpsr;
132 unsigned long dcr;
133 unsigned long brr;
134 unsigned long nmar;
135};
136
137extern struct frv_debug_status __debug_status;
138
139#endif /* _LANGUAGE_ASSEMBLY */
140#endif /* __ASM_GDB_STUB_H */
diff --git a/arch/frv/include/asm/gpio-regs.h b/arch/frv/include/asm/gpio-regs.h
new file mode 100644
index 000000000000..9edf5d5d4d3f
--- /dev/null
+++ b/arch/frv/include/asm/gpio-regs.h
@@ -0,0 +1,116 @@
1/* gpio-regs.h: on-chip general purpose I/O registers
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_GPIO_REGS
13#define _ASM_GPIO_REGS
14
15#define __reg(ADDR) (*(volatile unsigned long *)(ADDR))
16
17#define __get_PDR() ({ __reg(0xfeff0400); })
18#define __set_PDR(V) do { __reg(0xfeff0400) = (V); mb(); } while(0)
19
20#define __get_GPDR() ({ __reg(0xfeff0408); })
21#define __set_GPDR(V) do { __reg(0xfeff0408) = (V); mb(); } while(0)
22
23#define __get_SIR() ({ __reg(0xfeff0410); })
24#define __set_SIR(V) do { __reg(0xfeff0410) = (V); mb(); } while(0)
25
26#define __get_SOR() ({ __reg(0xfeff0418); })
27#define __set_SOR(V) do { __reg(0xfeff0418) = (V); mb(); } while(0)
28
29#define __set_PDSR(V) do { __reg(0xfeff0420) = (V); mb(); } while(0)
30
31#define __set_PDCR(V) do { __reg(0xfeff0428) = (V); mb(); } while(0)
32
33#define __get_RSTR() ({ __reg(0xfeff0500); })
34#define __set_RSTR(V) do { __reg(0xfeff0500) = (V); mb(); } while(0)
35
36
37
38/* PDR definitions */
39#define PDR_GPIO_DATA(X) (1 << (X))
40
41/* GPDR definitions */
42#define GPDR_INPUT 0
43#define GPDR_OUTPUT 1
44#define GPDR_DREQ0_BIT 0x00001000
45#define GPDR_DREQ1_BIT 0x00008000
46#define GPDR_DREQ2_BIT 0x00040000
47#define GPDR_DREQ3_BIT 0x00080000
48#define GPDR_DREQ4_BIT 0x00004000
49#define GPDR_DREQ5_BIT 0x00020000
50#define GPDR_DREQ6_BIT 0x00100000
51#define GPDR_DREQ7_BIT 0x00200000
52#define GPDR_DACK0_BIT 0x00002000
53#define GPDR_DACK1_BIT 0x00010000
54#define GPDR_DACK2_BIT 0x00100000
55#define GPDR_DACK3_BIT 0x00200000
56#define GPDR_DONE0_BIT 0x00004000
57#define GPDR_DONE1_BIT 0x00020000
58#define GPDR_GPIO_DIR(X,D) ((D) << (X))
59
60/* SIR definitions */
61#define SIR_GPIO_INPUT 0
62#define SIR_DREQ7_INPUT 0x00200000
63#define SIR_DREQ6_INPUT 0x00100000
64#define SIR_DREQ3_INPUT 0x00080000
65#define SIR_DREQ2_INPUT 0x00040000
66#define SIR_DREQ5_INPUT 0x00020000
67#define SIR_DREQ1_INPUT 0x00008000
68#define SIR_DREQ4_INPUT 0x00004000
69#define SIR_DREQ0_INPUT 0x00001000
70#define SIR_RXD1_INPUT 0x00000400
71#define SIR_CTS0_INPUT 0x00000100
72#define SIR_RXD0_INPUT 0x00000040
73#define SIR_GATE1_INPUT 0x00000020
74#define SIR_GATE0_INPUT 0x00000010
75#define SIR_IRQ3_INPUT 0x00000008
76#define SIR_IRQ2_INPUT 0x00000004
77#define SIR_IRQ1_INPUT 0x00000002
78#define SIR_IRQ0_INPUT 0x00000001
79#define SIR_DREQ_BITS (SIR_DREQ0_INPUT | SIR_DREQ1_INPUT | \
80 SIR_DREQ2_INPUT | SIR_DREQ3_INPUT | \
81 SIR_DREQ4_INPUT | SIR_DREQ5_INPUT | \
82 SIR_DREQ6_INPUT | SIR_DREQ7_INPUT)
83
84/* SOR definitions */
85#define SOR_GPIO_OUTPUT 0
86#define SOR_DACK3_OUTPUT 0x00200000
87#define SOR_DACK2_OUTPUT 0x00100000
88#define SOR_DONE1_OUTPUT 0x00020000
89#define SOR_DACK1_OUTPUT 0x00010000
90#define SOR_DONE0_OUTPUT 0x00004000
91#define SOR_DACK0_OUTPUT 0x00002000
92#define SOR_TXD1_OUTPUT 0x00000800
93#define SOR_RTS0_OUTPUT 0x00000200
94#define SOR_TXD0_OUTPUT 0x00000080
95#define SOR_TOUT1_OUTPUT 0x00000020
96#define SOR_TOUT0_OUTPUT 0x00000010
97#define SOR_DONE_BITS (SOR_DONE0_OUTPUT | SOR_DONE1_OUTPUT)
98#define SOR_DACK_BITS (SOR_DACK0_OUTPUT | SOR_DACK1_OUTPUT | \
99 SOR_DACK2_OUTPUT | SOR_DACK3_OUTPUT)
100
101/* PDSR definitions */
102#define PDSR_UNCHANGED 0
103#define PDSR_SET_BIT(X) (1 << (X))
104
105/* PDCR definitions */
106#define PDCR_UNCHANGED 0
107#define PDCR_CLEAR_BIT(X) (1 << (X))
108
109/* RSTR definitions */
110/* Read Only */
111#define RSTR_POWERON 0x00000400
112#define RSTR_SOFTRESET_STATUS 0x00000100
113/* Write Only */
114#define RSTR_SOFTRESET 0x00000001
115
116#endif /* _ASM_GPIO_REGS */
diff --git a/arch/frv/include/asm/hardirq.h b/arch/frv/include/asm/hardirq.h
new file mode 100644
index 000000000000..fc47515822a2
--- /dev/null
+++ b/arch/frv/include/asm/hardirq.h
@@ -0,0 +1,35 @@
1/* hardirq.h: FRV hardware IRQ management
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef __ASM_HARDIRQ_H
13#define __ASM_HARDIRQ_H
14
15#include <linux/threads.h>
16#include <linux/irq.h>
17
18typedef struct {
19 unsigned int __softirq_pending;
20 unsigned long idle_timestamp;
21} ____cacheline_aligned irq_cpustat_t;
22
23#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
24
25#ifdef CONFIG_SMP
26#error SMP not available on FR-V
27#endif /* CONFIG_SMP */
28
29extern atomic_t irq_err_count;
30static inline void ack_bad_irq(int irq)
31{
32 atomic_inc(&irq_err_count);
33}
34
35#endif
diff --git a/arch/frv/include/asm/highmem.h b/arch/frv/include/asm/highmem.h
new file mode 100644
index 000000000000..68e4677fb9e7
--- /dev/null
+++ b/arch/frv/include/asm/highmem.h
@@ -0,0 +1,182 @@
1/* highmem.h: virtual kernel memory mappings for high memory
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * - Derived from include/asm-i386/highmem.h
6 *
7 * See Documentation/frv/mmu-layout.txt for more information.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14
15#ifndef _ASM_HIGHMEM_H
16#define _ASM_HIGHMEM_H
17
18#ifdef __KERNEL__
19
20#include <linux/init.h>
21#include <linux/highmem.h>
22#include <asm/mem-layout.h>
23#include <asm/spr-regs.h>
24#include <asm/mb-regs.h>
25
26#define NR_TLB_LINES 64 /* number of lines in the TLB */
27
28#ifndef __ASSEMBLY__
29
30#include <linux/interrupt.h>
31#include <asm/kmap_types.h>
32#include <asm/pgtable.h>
33
34#ifdef CONFIG_DEBUG_HIGHMEM
35#define HIGHMEM_DEBUG 1
36#else
37#define HIGHMEM_DEBUG 0
38#endif
39
40/* declarations for highmem.c */
41extern unsigned long highstart_pfn, highend_pfn;
42
43#define kmap_prot PAGE_KERNEL
44#define kmap_pte ______kmap_pte_in_TLB
45extern pte_t *pkmap_page_table;
46
47#define flush_cache_kmaps() do { } while (0)
48
49/*
50 * Right now we initialize only a single pte table. It can be extended
51 * easily, subsequent pte tables have to be allocated in one physical
52 * chunk of RAM.
53 */
54#define LAST_PKMAP PTRS_PER_PTE
55#define LAST_PKMAP_MASK (LAST_PKMAP - 1)
56#define PKMAP_NR(virt) ((virt - PKMAP_BASE) >> PAGE_SHIFT)
57#define PKMAP_ADDR(nr) (PKMAP_BASE + ((nr) << PAGE_SHIFT))
58
59extern void *kmap_high(struct page *page);
60extern void kunmap_high(struct page *page);
61
62extern void *kmap(struct page *page);
63extern void kunmap(struct page *page);
64
65extern struct page *kmap_atomic_to_page(void *ptr);
66
67#endif /* !__ASSEMBLY__ */
68
69/*
70 * The use of kmap_atomic/kunmap_atomic is discouraged - kmap/kunmap
71 * gives a more generic (and caching) interface. But kmap_atomic can
72 * be used in IRQ contexts, so in some (very limited) cases we need
73 * it.
74 */
75#define KMAP_ATOMIC_CACHE_DAMR 8
76
77#ifndef __ASSEMBLY__
78
79#define __kmap_atomic_primary(type, paddr, ampr) \
80({ \
81 unsigned long damlr, dampr; \
82 \
83 dampr = paddr | xAMPRx_L | xAMPRx_M | xAMPRx_S | xAMPRx_SS_16Kb | xAMPRx_V; \
84 \
85 if (type != __KM_CACHE) \
86 asm volatile("movgs %0,dampr"#ampr :: "r"(dampr) : "memory"); \
87 else \
88 asm volatile("movgs %0,iampr"#ampr"\n" \
89 "movgs %0,dampr"#ampr"\n" \
90 :: "r"(dampr) : "memory" \
91 ); \
92 \
93 asm("movsg damlr"#ampr",%0" : "=r"(damlr)); \
94 \
95 /*printk("DAMR"#ampr": PRIM sl=%d L=%08lx P=%08lx\n", type, damlr, dampr);*/ \
96 \
97 (void *) damlr; \
98})
99
100#define __kmap_atomic_secondary(slot, paddr) \
101({ \
102 unsigned long damlr = KMAP_ATOMIC_SECONDARY_FRAME + (slot) * PAGE_SIZE; \
103 unsigned long dampr = paddr | xAMPRx_L | xAMPRx_M | xAMPRx_S | xAMPRx_SS_16Kb | xAMPRx_V; \
104 \
105 asm volatile("movgs %0,tplr \n" \
106 "movgs %1,tppr \n" \
107 "tlbpr %0,gr0,#2,#1" \
108 : : "r"(damlr), "r"(dampr) : "memory"); \
109 \
110 /*printk("TLB: SECN sl=%d L=%08lx P=%08lx\n", slot, damlr, dampr);*/ \
111 \
112 (void *) damlr; \
113})
114
115static inline void *kmap_atomic(struct page *page, enum km_type type)
116{
117 unsigned long paddr;
118
119 pagefault_disable();
120 debug_kmap_atomic(type);
121 paddr = page_to_phys(page);
122
123 switch (type) {
124 case 0: return __kmap_atomic_primary(0, paddr, 2);
125 case 1: return __kmap_atomic_primary(1, paddr, 3);
126 case 2: return __kmap_atomic_primary(2, paddr, 4);
127 case 3: return __kmap_atomic_primary(3, paddr, 5);
128 case 4: return __kmap_atomic_primary(4, paddr, 6);
129 case 5: return __kmap_atomic_primary(5, paddr, 7);
130 case 6: return __kmap_atomic_primary(6, paddr, 8);
131 case 7: return __kmap_atomic_primary(7, paddr, 9);
132 case 8: return __kmap_atomic_primary(8, paddr, 10);
133
134 case 9 ... 9 + NR_TLB_LINES - 1:
135 return __kmap_atomic_secondary(type - 9, paddr);
136
137 default:
138 BUG();
139 return NULL;
140 }
141}
142
143#define __kunmap_atomic_primary(type, ampr) \
144do { \
145 asm volatile("movgs gr0,dampr"#ampr"\n" ::: "memory"); \
146 if (type == __KM_CACHE) \
147 asm volatile("movgs gr0,iampr"#ampr"\n" ::: "memory"); \
148} while(0)
149
150#define __kunmap_atomic_secondary(slot, vaddr) \
151do { \
152 asm volatile("tlbpr %0,gr0,#4,#1" : : "r"(vaddr) : "memory"); \
153} while(0)
154
155static inline void kunmap_atomic(void *kvaddr, enum km_type type)
156{
157 switch (type) {
158 case 0: __kunmap_atomic_primary(0, 2); break;
159 case 1: __kunmap_atomic_primary(1, 3); break;
160 case 2: __kunmap_atomic_primary(2, 4); break;
161 case 3: __kunmap_atomic_primary(3, 5); break;
162 case 4: __kunmap_atomic_primary(4, 6); break;
163 case 5: __kunmap_atomic_primary(5, 7); break;
164 case 6: __kunmap_atomic_primary(6, 8); break;
165 case 7: __kunmap_atomic_primary(7, 9); break;
166 case 8: __kunmap_atomic_primary(8, 10); break;
167
168 case 9 ... 9 + NR_TLB_LINES - 1:
169 __kunmap_atomic_secondary(type - 9, kvaddr);
170 break;
171
172 default:
173 BUG();
174 }
175 pagefault_enable();
176}
177
178#endif /* !__ASSEMBLY__ */
179
180#endif /* __KERNEL__ */
181
182#endif /* _ASM_HIGHMEM_H */
diff --git a/arch/frv/include/asm/hw_irq.h b/arch/frv/include/asm/hw_irq.h
new file mode 100644
index 000000000000..522ad37923d8
--- /dev/null
+++ b/arch/frv/include/asm/hw_irq.h
@@ -0,0 +1,16 @@
1/* hw_irq.h: FR-V specific h/w IRQ stuff
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_HW_IRQ_H
13#define _ASM_HW_IRQ_H
14
15
16#endif /* _ASM_HW_IRQ_H */
diff --git a/arch/frv/include/asm/init.h b/arch/frv/include/asm/init.h
new file mode 100644
index 000000000000..8b15838de216
--- /dev/null
+++ b/arch/frv/include/asm/init.h
@@ -0,0 +1,12 @@
1#ifndef _ASM_INIT_H
2#define _ASM_INIT_H
3
4#define __init __attribute__ ((__section__ (".text.init")))
5#define __initdata __attribute__ ((__section__ (".data.init")))
6/* For assembly routines */
7#define __INIT .section ".text.init",#alloc,#execinstr
8#define __FINIT .previous
9#define __INITDATA .section ".data.init",#alloc,#write
10
11#endif
12
diff --git a/arch/frv/include/asm/io.h b/arch/frv/include/asm/io.h
new file mode 100644
index 000000000000..ca7475e73b5e
--- /dev/null
+++ b/arch/frv/include/asm/io.h
@@ -0,0 +1,392 @@
1/* io.h: FRV I/O operations
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 *
11 * This gets interesting when talking to the PCI bus - the CPU is in big endian
12 * mode, the PCI bus is little endian and the hardware in the middle can do
13 * byte swapping
14 */
15#ifndef _ASM_IO_H
16#define _ASM_IO_H
17
18#ifdef __KERNEL__
19
20#include <linux/types.h>
21#include <asm/virtconvert.h>
22#include <asm/string.h>
23#include <asm/mb-regs.h>
24#include <linux/delay.h>
25
26/*
27 * swap functions are sometimes needed to interface little-endian hardware
28 */
29
30static inline unsigned short _swapw(unsigned short v)
31{
32 return ((v << 8) | (v >> 8));
33}
34
35static inline unsigned long _swapl(unsigned long v)
36{
37 return ((v << 24) | ((v & 0xff00) << 8) | ((v & 0xff0000) >> 8) | (v >> 24));
38}
39
40//#define __iormb() asm volatile("membar")
41//#define __iowmb() asm volatile("membar")
42
43#define __raw_readb __builtin_read8
44#define __raw_readw __builtin_read16
45#define __raw_readl __builtin_read32
46
47#define __raw_writeb(datum, addr) __builtin_write8(addr, datum)
48#define __raw_writew(datum, addr) __builtin_write16(addr, datum)
49#define __raw_writel(datum, addr) __builtin_write32(addr, datum)
50
51static inline void io_outsb(unsigned int addr, const void *buf, int len)
52{
53 unsigned long __ioaddr = (unsigned long) addr;
54 const uint8_t *bp = buf;
55
56 while (len--)
57 __builtin_write8((volatile void __iomem *) __ioaddr, *bp++);
58}
59
60static inline void io_outsw(unsigned int addr, const void *buf, int len)
61{
62 unsigned long __ioaddr = (unsigned long) addr;
63 const uint16_t *bp = buf;
64
65 while (len--)
66 __builtin_write16((volatile void __iomem *) __ioaddr, (*bp++));
67}
68
69extern void __outsl_ns(unsigned int addr, const void *buf, int len);
70extern void __outsl_sw(unsigned int addr, const void *buf, int len);
71static inline void __outsl(unsigned int addr, const void *buf, int len, int swap)
72{
73 unsigned long __ioaddr = (unsigned long) addr;
74
75 if (!swap)
76 __outsl_ns(__ioaddr, buf, len);
77 else
78 __outsl_sw(__ioaddr, buf, len);
79}
80
81static inline void io_insb(unsigned long addr, void *buf, int len)
82{
83 uint8_t *bp = buf;
84
85 while (len--)
86 *bp++ = __builtin_read8((volatile void __iomem *) addr);
87}
88
89static inline void io_insw(unsigned long addr, void *buf, int len)
90{
91 uint16_t *bp = buf;
92
93 while (len--)
94 *bp++ = __builtin_read16((volatile void __iomem *) addr);
95}
96
97extern void __insl_ns(unsigned long addr, void *buf, int len);
98extern void __insl_sw(unsigned long addr, void *buf, int len);
99static inline void __insl(unsigned long addr, void *buf, int len, int swap)
100{
101 if (!swap)
102 __insl_ns(addr, buf, len);
103 else
104 __insl_sw(addr, buf, len);
105}
106
107#define mmiowb() mb()
108
109/*
110 * make the short names macros so specific devices
111 * can override them as required
112 */
113
114static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count)
115{
116 memset((void __force *) addr, val, count);
117}
118
119static inline void memcpy_fromio(void *dst, const volatile void __iomem *src, int count)
120{
121 memcpy(dst, (void __force *) src, count);
122}
123
124static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int count)
125{
126 memcpy((void __force *) dst, src, count);
127}
128
129static inline uint8_t inb(unsigned long addr)
130{
131 return __builtin_read8((void __iomem *)addr);
132}
133
134static inline uint16_t inw(unsigned long addr)
135{
136 uint16_t ret = __builtin_read16((void __iomem *)addr);
137
138 if (__is_PCI_IO(addr))
139 ret = _swapw(ret);
140
141 return ret;
142}
143
144static inline uint32_t inl(unsigned long addr)
145{
146 uint32_t ret = __builtin_read32((void __iomem *)addr);
147
148 if (__is_PCI_IO(addr))
149 ret = _swapl(ret);
150
151 return ret;
152}
153
154static inline void outb(uint8_t datum, unsigned long addr)
155{
156 __builtin_write8((void __iomem *)addr, datum);
157}
158
159static inline void outw(uint16_t datum, unsigned long addr)
160{
161 if (__is_PCI_IO(addr))
162 datum = _swapw(datum);
163 __builtin_write16((void __iomem *)addr, datum);
164}
165
166static inline void outl(uint32_t datum, unsigned long addr)
167{
168 if (__is_PCI_IO(addr))
169 datum = _swapl(datum);
170 __builtin_write32((void __iomem *)addr, datum);
171}
172
173#define inb_p(addr) inb(addr)
174#define inw_p(addr) inw(addr)
175#define inl_p(addr) inl(addr)
176#define outb_p(x,addr) outb(x,addr)
177#define outw_p(x,addr) outw(x,addr)
178#define outl_p(x,addr) outl(x,addr)
179
180#define outsb(a,b,l) io_outsb(a,b,l)
181#define outsw(a,b,l) io_outsw(a,b,l)
182#define outsl(a,b,l) __outsl(a,b,l,0)
183
184#define insb(a,b,l) io_insb(a,b,l)
185#define insw(a,b,l) io_insw(a,b,l)
186#define insl(a,b,l) __insl(a,b,l,0)
187
188#define IO_SPACE_LIMIT 0xffffffff
189
190static inline uint8_t readb(const volatile void __iomem *addr)
191{
192 return __builtin_read8((__force void volatile __iomem *) addr);
193}
194
195static inline uint16_t readw(const volatile void __iomem *addr)
196{
197 uint16_t ret = __builtin_read16((__force void volatile __iomem *)addr);
198
199 if (__is_PCI_MEM(addr))
200 ret = _swapw(ret);
201 return ret;
202}
203
204static inline uint32_t readl(const volatile void __iomem *addr)
205{
206 uint32_t ret = __builtin_read32((__force void volatile __iomem *)addr);
207
208 if (__is_PCI_MEM(addr))
209 ret = _swapl(ret);
210
211 return ret;
212}
213
214#define readb_relaxed readb
215#define readw_relaxed readw
216#define readl_relaxed readl
217
218static inline void writeb(uint8_t datum, volatile void __iomem *addr)
219{
220 __builtin_write8(addr, datum);
221 if (__is_PCI_MEM(addr))
222 __flush_PCI_writes();
223}
224
225static inline void writew(uint16_t datum, volatile void __iomem *addr)
226{
227 if (__is_PCI_MEM(addr))
228 datum = _swapw(datum);
229
230 __builtin_write16(addr, datum);
231 if (__is_PCI_MEM(addr))
232 __flush_PCI_writes();
233}
234
235static inline void writel(uint32_t datum, volatile void __iomem *addr)
236{
237 if (__is_PCI_MEM(addr))
238 datum = _swapl(datum);
239
240 __builtin_write32(addr, datum);
241 if (__is_PCI_MEM(addr))
242 __flush_PCI_writes();
243}
244
245
246/* Values for nocacheflag and cmode */
247#define IOMAP_FULL_CACHING 0
248#define IOMAP_NOCACHE_SER 1
249#define IOMAP_NOCACHE_NONSER 2
250#define IOMAP_WRITETHROUGH 3
251
252extern void __iomem *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag);
253
254static inline void __iomem *ioremap(unsigned long physaddr, unsigned long size)
255{
256 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
257}
258
259static inline void __iomem *ioremap_nocache(unsigned long physaddr, unsigned long size)
260{
261 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
262}
263
264static inline void __iomem *ioremap_writethrough(unsigned long physaddr, unsigned long size)
265{
266 return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);
267}
268
269static inline void __iomem *ioremap_fullcache(unsigned long physaddr, unsigned long size)
270{
271 return __ioremap(physaddr, size, IOMAP_FULL_CACHING);
272}
273
274#define ioremap_wc ioremap_nocache
275
276extern void iounmap(void volatile __iomem *addr);
277
278static inline void __iomem *ioport_map(unsigned long port, unsigned int nr)
279{
280 return (void __iomem *) port;
281}
282
283static inline void ioport_unmap(void __iomem *p)
284{
285}
286
287static inline void flush_write_buffers(void)
288{
289 __asm__ __volatile__ ("membar" : : :"memory");
290}
291
292/*
293 * do appropriate I/O accesses for token type
294 */
295static inline unsigned int ioread8(void __iomem *p)
296{
297 return __builtin_read8(p);
298}
299
300static inline unsigned int ioread16(void __iomem *p)
301{
302 uint16_t ret = __builtin_read16(p);
303 if (__is_PCI_addr(p))
304 ret = _swapw(ret);
305 return ret;
306}
307
308static inline unsigned int ioread32(void __iomem *p)
309{
310 uint32_t ret = __builtin_read32(p);
311 if (__is_PCI_addr(p))
312 ret = _swapl(ret);
313 return ret;
314}
315
316static inline void iowrite8(u8 val, void __iomem *p)
317{
318 __builtin_write8(p, val);
319 if (__is_PCI_MEM(p))
320 __flush_PCI_writes();
321}
322
323static inline void iowrite16(u16 val, void __iomem *p)
324{
325 if (__is_PCI_addr(p))
326 val = _swapw(val);
327 __builtin_write16(p, val);
328 if (__is_PCI_MEM(p))
329 __flush_PCI_writes();
330}
331
332static inline void iowrite32(u32 val, void __iomem *p)
333{
334 if (__is_PCI_addr(p))
335 val = _swapl(val);
336 __builtin_write32(p, val);
337 if (__is_PCI_MEM(p))
338 __flush_PCI_writes();
339}
340
341static inline void ioread8_rep(void __iomem *p, void *dst, unsigned long count)
342{
343 io_insb((unsigned long) p, dst, count);
344}
345
346static inline void ioread16_rep(void __iomem *p, void *dst, unsigned long count)
347{
348 io_insw((unsigned long) p, dst, count);
349}
350
351static inline void ioread32_rep(void __iomem *p, void *dst, unsigned long count)
352{
353 __insl_ns((unsigned long) p, dst, count);
354}
355
356static inline void iowrite8_rep(void __iomem *p, const void *src, unsigned long count)
357{
358 io_outsb((unsigned long) p, src, count);
359}
360
361static inline void iowrite16_rep(void __iomem *p, const void *src, unsigned long count)
362{
363 io_outsw((unsigned long) p, src, count);
364}
365
366static inline void iowrite32_rep(void __iomem *p, const void *src, unsigned long count)
367{
368 __outsl_ns((unsigned long) p, src, count);
369}
370
371/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
372struct pci_dev;
373extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
374static inline void pci_iounmap(struct pci_dev *dev, void __iomem *p)
375{
376}
377
378
379/*
380 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
381 * access
382 */
383#define xlate_dev_mem_ptr(p) __va(p)
384
385/*
386 * Convert a virtual cached pointer to an uncached pointer
387 */
388#define xlate_dev_kmem_ptr(p) p
389
390#endif /* __KERNEL__ */
391
392#endif /* _ASM_IO_H */
diff --git a/arch/frv/include/asm/ioctl.h b/arch/frv/include/asm/ioctl.h
new file mode 100644
index 000000000000..b279fe06dfe5
--- /dev/null
+++ b/arch/frv/include/asm/ioctl.h
@@ -0,0 +1 @@
#include <asm-generic/ioctl.h>
diff --git a/arch/frv/include/asm/ioctls.h b/arch/frv/include/asm/ioctls.h
new file mode 100644
index 000000000000..d0c30e31fbda
--- /dev/null
+++ b/arch/frv/include/asm/ioctls.h
@@ -0,0 +1,86 @@
1#ifndef __ASM_IOCTLS_H__
2#define __ASM_IOCTLS_H__
3
4#include <asm/ioctl.h>
5
6/* 0x54 is just a magic number to make these relatively unique ('T') */
7
8#define TCGETS 0x5401
9#define TCSETS 0x5402
10#define TCSETSW 0x5403
11#define TCSETSF 0x5404
12#define TCGETA 0x5405
13#define TCSETA 0x5406
14#define TCSETAW 0x5407
15#define TCSETAF 0x5408
16#define TCSBRK 0x5409
17#define TCXONC 0x540A
18#define TCFLSH 0x540B
19#define TIOCEXCL 0x540C
20#define TIOCNXCL 0x540D
21#define TIOCSCTTY 0x540E
22#define TIOCGPGRP 0x540F
23#define TIOCSPGRP 0x5410
24#define TIOCOUTQ 0x5411
25#define TIOCSTI 0x5412
26#define TIOCGWINSZ 0x5413
27#define TIOCSWINSZ 0x5414
28#define TIOCMGET 0x5415
29#define TIOCMBIS 0x5416
30#define TIOCMBIC 0x5417
31#define TIOCMSET 0x5418
32#define TIOCGSOFTCAR 0x5419
33#define TIOCSSOFTCAR 0x541A
34#define FIONREAD 0x541B
35#define TIOCINQ FIONREAD
36#define TIOCLINUX 0x541C
37#define TIOCCONS 0x541D
38#define TIOCGSERIAL 0x541E
39#define TIOCSSERIAL 0x541F
40#define TIOCPKT 0x5420
41#define FIONBIO 0x5421
42#define TIOCNOTTY 0x5422
43#define TIOCSETD 0x5423
44#define TIOCGETD 0x5424
45#define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */
46#define TIOCTTYGSTRUCT 0x5426 /* For debugging only */
47#define TIOCSBRK 0x5427 /* BSD compatibility */
48#define TIOCCBRK 0x5428 /* BSD compatibility */
49#define TIOCGSID 0x5429 /* Return the session ID of FD */
50#define TCGETS2 _IOR('T',0x2A, struct termios2)
51#define TCSETS2 _IOW('T',0x2B, struct termios2)
52#define TCSETSW2 _IOW('T',0x2C, struct termios2)
53#define TCSETSF2 _IOW('T',0x2D, struct termios2)
54#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
55#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */
56
57#define FIONCLEX 0x5450 /* these numbers need to be adjusted. */
58#define FIOCLEX 0x5451
59#define FIOASYNC 0x5452
60#define TIOCSERCONFIG 0x5453
61#define TIOCSERGWILD 0x5454
62#define TIOCSERSWILD 0x5455
63#define TIOCGLCKTRMIOS 0x5456
64#define TIOCSLCKTRMIOS 0x5457
65#define TIOCSERGSTRUCT 0x5458 /* For debugging only */
66#define TIOCSERGETLSR 0x5459 /* Get line status register */
67#define TIOCSERGETMULTI 0x545A /* Get multiport config */
68#define TIOCSERSETMULTI 0x545B /* Set multiport config */
69
70#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */
71#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */
72#define FIOQSIZE 0x545E
73
74/* Used for packet mode */
75#define TIOCPKT_DATA 0
76#define TIOCPKT_FLUSHREAD 1
77#define TIOCPKT_FLUSHWRITE 2
78#define TIOCPKT_STOP 4
79#define TIOCPKT_START 8
80#define TIOCPKT_NOSTOP 16
81#define TIOCPKT_DOSTOP 32
82
83#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */
84
85#endif /* __ASM_IOCTLS_H__ */
86
diff --git a/arch/frv/include/asm/ipcbuf.h b/arch/frv/include/asm/ipcbuf.h
new file mode 100644
index 000000000000..b546f67e455f
--- /dev/null
+++ b/arch/frv/include/asm/ipcbuf.h
@@ -0,0 +1,30 @@
1#ifndef __ASM_IPCBUF_H__
2#define __ASM_IPCBUF_H__
3
4/*
5 * The user_ipc_perm structure for FR-V architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 32-bit mode_t and seq
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct ipc64_perm
15{
16 __kernel_key_t key;
17 __kernel_uid32_t uid;
18 __kernel_gid32_t gid;
19 __kernel_uid32_t cuid;
20 __kernel_gid32_t cgid;
21 __kernel_mode_t mode;
22 unsigned short __pad1;
23 unsigned short seq;
24 unsigned short __pad2;
25 unsigned long __unused1;
26 unsigned long __unused2;
27};
28
29#endif /* __ASM_IPCBUF_H__ */
30
diff --git a/arch/frv/include/asm/irc-regs.h b/arch/frv/include/asm/irc-regs.h
new file mode 100644
index 000000000000..afa30aeacc82
--- /dev/null
+++ b/arch/frv/include/asm/irc-regs.h
@@ -0,0 +1,53 @@
1/* irc-regs.h: on-chip interrupt controller registers
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_IRC_REGS
13#define _ASM_IRC_REGS
14
15#define __reg(ADDR) (*(volatile unsigned long *)(ADDR))
16
17#define __get_TM0() ({ __reg(0xfeff9800); })
18#define __get_TM1() ({ __reg(0xfeff9808); })
19#define __set_TM1(V) do { __reg(0xfeff9808) = (V); mb(); } while(0)
20
21#define __set_TM1x(XI,V) \
22do { \
23 int shift = (XI) * 2 + 16; \
24 unsigned long tm1 = __reg(0xfeff9808); \
25 tm1 &= ~(0x3 << shift); \
26 tm1 |= (V) << shift; \
27 __reg(0xfeff9808) = tm1; \
28 mb(); \
29} while(0)
30
31#define __get_RS(C) ({ (__reg(0xfeff9810) >> ((C)+16)) & 1; })
32
33#define __clr_RC(C) do { __reg(0xfeff9818) = 1 << ((C)+16); mb(); } while(0)
34
35#define __get_MASK(C) ({ (__reg(0xfeff9820) >> ((C)+16)) & 1; })
36#define __set_MASK(C) do { __reg(0xfeff9820) |= 1 << ((C)+16); mb(); } while(0)
37#define __clr_MASK(C) do { __reg(0xfeff9820) &= ~(1 << ((C)+16)); mb(); } while(0)
38
39#define __get_MASK_all() __get_MASK(0)
40#define __set_MASK_all() __set_MASK(0)
41#define __clr_MASK_all() __clr_MASK(0)
42
43#define __get_IRL() ({ (__reg(0xfeff9828) >> 16) & 0xf; })
44#define __clr_IRL() do { __reg(0xfeff9828) = 0x100000; mb(); } while(0)
45
46#define __get_IRR(N) ({ __reg(0xfeff9840 + (N) * 8); })
47#define __set_IRR(N,V) do { __reg(0xfeff9840 + (N) * 8) = (V); } while(0)
48
49#define __get_IITMR(N) ({ __reg(0xfeff9880 + (N) * 8); })
50#define __set_IITMR(N,V) do { __reg(0xfeff9880 + (N) * 8) = (V); } while(0)
51
52
53#endif /* _ASM_IRC_REGS */
diff --git a/arch/frv/include/asm/irq.h b/arch/frv/include/asm/irq.h
new file mode 100644
index 000000000000..3a66ebd754bd
--- /dev/null
+++ b/arch/frv/include/asm/irq.h
@@ -0,0 +1,30 @@
1/* irq.h: FRV IRQ definitions
2 *
3 * Copyright (C) 2006 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_IRQ_H_
13#define _ASM_IRQ_H_
14
15#define NR_IRQS 48
16#define IRQ_BASE_CPU (0 * 16)
17#define IRQ_BASE_FPGA (1 * 16)
18#define IRQ_BASE_MB93493 (2 * 16)
19
20/* probe returns a 32-bit IRQ mask:-/ */
21#define MIN_PROBE_IRQ (NR_IRQS - 32)
22
23#ifndef __ASSEMBLY__
24static inline int irq_canonicalize(int irq)
25{
26 return irq;
27}
28#endif
29
30#endif /* _ASM_IRQ_H_ */
diff --git a/arch/frv/include/asm/irq_regs.h b/arch/frv/include/asm/irq_regs.h
new file mode 100644
index 000000000000..d22e83289ad1
--- /dev/null
+++ b/arch/frv/include/asm/irq_regs.h
@@ -0,0 +1,27 @@
1/* FRV per-CPU frame pointer holder
2 *
3 * Copyright (C) 2006 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_IRQ_REGS_H
13#define _ASM_IRQ_REGS_H
14
15/*
16 * Per-cpu current frame pointer - the location of the last exception frame on
17 * the stack
18 * - on FRV, GR28 is dedicated to keeping a pointer to the current exception
19 * frame
20 */
21#define ARCH_HAS_OWN_IRQ_REGS
22
23#ifndef __ASSEMBLY__
24#define get_irq_regs() (__frame)
25#endif
26
27#endif /* _ASM_IRQ_REGS_H */
diff --git a/arch/frv/include/asm/kdebug.h b/arch/frv/include/asm/kdebug.h
new file mode 100644
index 000000000000..6ece1b037665
--- /dev/null
+++ b/arch/frv/include/asm/kdebug.h
@@ -0,0 +1 @@
#include <asm-generic/kdebug.h>
diff --git a/arch/frv/include/asm/kmap_types.h b/arch/frv/include/asm/kmap_types.h
new file mode 100644
index 000000000000..f8e16b2a5804
--- /dev/null
+++ b/arch/frv/include/asm/kmap_types.h
@@ -0,0 +1,29 @@
1
2#ifndef _ASM_KMAP_TYPES_H
3#define _ASM_KMAP_TYPES_H
4
5enum km_type {
6 /* arch specific kmaps - change the numbers attached to these at your peril */
7 __KM_CACHE, /* cache flush page attachment point */
8 __KM_PGD, /* current page directory */
9 __KM_ITLB_PTD, /* current instruction TLB miss page table lookup */
10 __KM_DTLB_PTD, /* current data TLB miss page table lookup */
11
12 /* general kmaps */
13 KM_BOUNCE_READ,
14 KM_SKB_SUNRPC_DATA,
15 KM_SKB_DATA_SOFTIRQ,
16 KM_USER0,
17 KM_USER1,
18 KM_BIO_SRC_IRQ,
19 KM_BIO_DST_IRQ,
20 KM_PTE0,
21 KM_PTE1,
22 KM_IRQ0,
23 KM_IRQ1,
24 KM_SOFTIRQ0,
25 KM_SOFTIRQ1,
26 KM_TYPE_NR
27};
28
29#endif
diff --git a/arch/frv/include/asm/linkage.h b/arch/frv/include/asm/linkage.h
new file mode 100644
index 000000000000..636c1bced7d4
--- /dev/null
+++ b/arch/frv/include/asm/linkage.h
@@ -0,0 +1,7 @@
1#ifndef __ASM_LINKAGE_H
2#define __ASM_LINKAGE_H
3
4#define __ALIGN .align 4
5#define __ALIGN_STR ".align 4"
6
7#endif
diff --git a/arch/frv/include/asm/local.h b/arch/frv/include/asm/local.h
new file mode 100644
index 000000000000..c27bdf04630e
--- /dev/null
+++ b/arch/frv/include/asm/local.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_LOCAL_H
2#define _ASM_LOCAL_H
3
4#include <asm-generic/local.h>
5
6#endif /* _ASM_LOCAL_H */
diff --git a/arch/frv/include/asm/math-emu.h b/arch/frv/include/asm/math-emu.h
new file mode 100644
index 000000000000..0c8f731b2180
--- /dev/null
+++ b/arch/frv/include/asm/math-emu.h
@@ -0,0 +1,301 @@
1#ifndef _ASM_MATH_EMU_H
2#define _ASM_MATH_EMU_H
3
4#include <asm/setup.h>
5#include <linux/linkage.h>
6
7/* Status Register bits */
8
9/* accrued exception bits */
10#define FPSR_AEXC_INEX 3
11#define FPSR_AEXC_DZ 4
12#define FPSR_AEXC_UNFL 5
13#define FPSR_AEXC_OVFL 6
14#define FPSR_AEXC_IOP 7
15
16/* exception status bits */
17#define FPSR_EXC_INEX1 8
18#define FPSR_EXC_INEX2 9
19#define FPSR_EXC_DZ 10
20#define FPSR_EXC_UNFL 11
21#define FPSR_EXC_OVFL 12
22#define FPSR_EXC_OPERR 13
23#define FPSR_EXC_SNAN 14
24#define FPSR_EXC_BSUN 15
25
26/* quotient byte, assumes big-endian, of course */
27#define FPSR_QUOTIENT(fpsr) (*((signed char *) &(fpsr) + 1))
28
29/* condition code bits */
30#define FPSR_CC_NAN 24
31#define FPSR_CC_INF 25
32#define FPSR_CC_Z 26
33#define FPSR_CC_NEG 27
34
35
36/* Control register bits */
37
38/* rounding mode */
39#define FPCR_ROUND_RN 0 /* round to nearest/even */
40#define FPCR_ROUND_RZ 1 /* round to zero */
41#define FPCR_ROUND_RM 2 /* minus infinity */
42#define FPCR_ROUND_RP 3 /* plus infinity */
43
44/* rounding precision */
45#define FPCR_PRECISION_X 0 /* long double */
46#define FPCR_PRECISION_S 1 /* double */
47#define FPCR_PRECISION_D 2 /* float */
48
49
50/* Flags to select the debugging output */
51#define PDECODE 0
52#define PEXECUTE 1
53#define PCONV 2
54#define PNORM 3
55#define PREGISTER 4
56#define PINSTR 5
57#define PUNIMPL 6
58#define PMOVEM 7
59
60#define PMDECODE (1<<PDECODE)
61#define PMEXECUTE (1<<PEXECUTE)
62#define PMCONV (1<<PCONV)
63#define PMNORM (1<<PNORM)
64#define PMREGISTER (1<<PREGISTER)
65#define PMINSTR (1<<PINSTR)
66#define PMUNIMPL (1<<PUNIMPL)
67#define PMMOVEM (1<<PMOVEM)
68
69#ifndef __ASSEMBLY__
70
71#include <linux/kernel.h>
72#include <linux/sched.h>
73
74union fp_mant64 {
75 unsigned long long m64;
76 unsigned long m32[2];
77};
78
79union fp_mant128 {
80 unsigned long long m64[2];
81 unsigned long m32[4];
82};
83
84/* internal representation of extended fp numbers */
85struct fp_ext {
86 unsigned char lowmant;
87 unsigned char sign;
88 unsigned short exp;
89 union fp_mant64 mant;
90};
91
92/* C representation of FPU registers */
93/* NOTE: if you change this, you have to change the assembler offsets
94 below and the size in <asm/fpu.h>, too */
95struct fp_data {
96 struct fp_ext fpreg[8];
97 unsigned int fpcr;
98 unsigned int fpsr;
99 unsigned int fpiar;
100 unsigned short prec;
101 unsigned short rnd;
102 struct fp_ext temp[2];
103};
104
105#if FPU_EMU_DEBUG
106extern unsigned int fp_debugprint;
107
108#define dprint(bit, fmt, args...) ({ \
109 if (fp_debugprint & (1 << (bit))) \
110 printk(fmt, ## args); \
111})
112#else
113#define dprint(bit, fmt, args...)
114#endif
115
116#define uprint(str) ({ \
117 static int __count = 3; \
118 \
119 if (__count > 0) { \
120 printk("You just hit an unimplemented " \
121 "fpu instruction (%s)\n", str); \
122 printk("Please report this to ....\n"); \
123 __count--; \
124 } \
125})
126
127#define FPDATA ((struct fp_data *)current->thread.fp)
128
129#else /* __ASSEMBLY__ */
130
131#define FPDATA %a2
132
133/* offsets from the base register to the floating point data in the task struct */
134#define FPD_FPREG (TASK_THREAD+THREAD_FPREG+0)
135#define FPD_FPCR (TASK_THREAD+THREAD_FPREG+96)
136#define FPD_FPSR (TASK_THREAD+THREAD_FPREG+100)
137#define FPD_FPIAR (TASK_THREAD+THREAD_FPREG+104)
138#define FPD_PREC (TASK_THREAD+THREAD_FPREG+108)
139#define FPD_RND (TASK_THREAD+THREAD_FPREG+110)
140#define FPD_TEMPFP1 (TASK_THREAD+THREAD_FPREG+112)
141#define FPD_TEMPFP2 (TASK_THREAD+THREAD_FPREG+124)
142#define FPD_SIZEOF (TASK_THREAD+THREAD_FPREG+136)
143
144/* offsets on the stack to access saved registers,
145 * these are only used during instruction decoding
146 * where we always know how deep we're on the stack.
147 */
148#define FPS_DO (PT_D0)
149#define FPS_D1 (PT_D1)
150#define FPS_D2 (PT_D2)
151#define FPS_A0 (PT_A0)
152#define FPS_A1 (PT_A1)
153#define FPS_A2 (PT_A2)
154#define FPS_SR (PT_SR)
155#define FPS_PC (PT_PC)
156#define FPS_EA (PT_PC+6)
157#define FPS_PC2 (PT_PC+10)
158
159.macro fp_get_fp_reg
160 lea (FPD_FPREG,FPDATA,%d0.w*4),%a0
161 lea (%a0,%d0.w*8),%a0
162.endm
163
164/* Macros used to get/put the current program counter.
165 * 020/030 use a different stack frame then 040/060, for the
166 * 040/060 the return pc points already to the next location,
167 * so this only needs to be modified for jump instructions.
168 */
169.macro fp_get_pc dest
170 move.l (FPS_PC+4,%sp),\dest
171.endm
172
173.macro fp_put_pc src,jump=0
174 move.l \src,(FPS_PC+4,%sp)
175.endm
176
177.macro fp_get_instr_data f,s,dest,label
178 getuser \f,%sp@(FPS_PC+4)@(0),\dest,\label,%sp@(FPS_PC+4)
179 addq.l #\s,%sp@(FPS_PC+4)
180.endm
181
182.macro fp_get_instr_word dest,label,addr
183 fp_get_instr_data w,2,\dest,\label,\addr
184.endm
185
186.macro fp_get_instr_long dest,label,addr
187 fp_get_instr_data l,4,\dest,\label,\addr
188.endm
189
190/* These macros are used to read from/write to user space
191 * on error we jump to the fixup section, load the fault
192 * address into %a0 and jump to the exit.
193 * (derived from <asm/uaccess.h>)
194 */
195.macro getuser size,src,dest,label,addr
196| printf ,"[\size<%08x]",1,\addr
197.Lu1\@: moves\size \src,\dest
198
199 .section .fixup,"ax"
200 .even
201.Lu2\@: move.l \addr,%a0
202 jra \label
203 .previous
204
205 .section __ex_table,"a"
206 .align 4
207 .long .Lu1\@,.Lu2\@
208 .previous
209.endm
210
211.macro putuser size,src,dest,label,addr
212| printf ,"[\size>%08x]",1,\addr
213.Lu1\@: moves\size \src,\dest
214.Lu2\@:
215
216 .section .fixup,"ax"
217 .even
218.Lu3\@: move.l \addr,%a0
219 jra \label
220 .previous
221
222 .section __ex_table,"a"
223 .align 4
224 .long .Lu1\@,.Lu3\@
225 .long .Lu2\@,.Lu3\@
226 .previous
227.endm
228
229
230.macro movestack nr,arg1,arg2,arg3,arg4,arg5
231 .if \nr
232 movestack (\nr-1),\arg2,\arg3,\arg4,\arg5
233 move.l \arg1,-(%sp)
234 .endif
235.endm
236
237.macro printf bit=-1,string,nr=0,arg1,arg2,arg3,arg4,arg5
238#ifdef FPU_EMU_DEBUG
239 .data
240.Lpdata\@:
241 .string "\string"
242 .previous
243
244 movem.l %d0/%d1/%a0/%a1,-(%sp)
245 .if \bit+1
246#if 0
247 moveq #\bit,%d0
248 andw #7,%d0
249 btst %d0,fp_debugprint+((31-\bit)/8)
250#else
251 btst #\bit,fp_debugprint+((31-\bit)/8)
252#endif
253 jeq .Lpskip\@
254 .endif
255 movestack \nr,\arg1,\arg2,\arg3,\arg4,\arg5
256 pea .Lpdata\@
257 jsr printk
258 lea ((\nr+1)*4,%sp),%sp
259.Lpskip\@:
260 movem.l (%sp)+,%d0/%d1/%a0/%a1
261#endif
262.endm
263
264.macro printx bit,fp
265#ifdef FPU_EMU_DEBUG
266 movem.l %d0/%a0,-(%sp)
267 lea \fp,%a0
268#if 0
269 moveq #'+',%d0
270 tst.w (%a0)
271 jeq .Lx1\@
272 moveq #'-',%d0
273.Lx1\@: printf \bit," %c",1,%d0
274 move.l (4,%a0),%d0
275 bclr #31,%d0
276 jne .Lx2\@
277 printf \bit,"0."
278 jra .Lx3\@
279.Lx2\@: printf \bit,"1."
280.Lx3\@: printf \bit,"%08x%08x",2,%d0,%a0@(8)
281 move.w (2,%a0),%d0
282 ext.l %d0
283 printf \bit,"E%04x",1,%d0
284#else
285 printf \bit," %08x%08x%08x",3,%a0@,%a0@(4),%a0@(8)
286#endif
287 movem.l (%sp)+,%d0/%a0
288#endif
289.endm
290
291.macro debug instr,args
292#ifdef FPU_EMU_DEBUG
293 \instr \args
294#endif
295.endm
296
297
298#endif /* __ASSEMBLY__ */
299
300#endif /* _ASM_FRV_MATH_EMU_H */
301
diff --git a/arch/frv/include/asm/mb-regs.h b/arch/frv/include/asm/mb-regs.h
new file mode 100644
index 000000000000..219e5f926f18
--- /dev/null
+++ b/arch/frv/include/asm/mb-regs.h
@@ -0,0 +1,200 @@
1/* mb-regs.h: motherboard registers
2 *
3 * Copyright (C) 2003, 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_MB_REGS_H
13#define _ASM_MB_REGS_H
14
15#include <asm/cpu-irqs.h>
16#include <asm/sections.h>
17#include <asm/mem-layout.h>
18
19#ifndef __ASSEMBLY__
20/* gcc builtins, annotated */
21
22unsigned long __builtin_read8(volatile void __iomem *);
23unsigned long __builtin_read16(volatile void __iomem *);
24unsigned long __builtin_read32(volatile void __iomem *);
25void __builtin_write8(volatile void __iomem *, unsigned char);
26void __builtin_write16(volatile void __iomem *, unsigned short);
27void __builtin_write32(volatile void __iomem *, unsigned long);
28#endif
29
30#define __region_IO KERNEL_IO_START /* the region from 0xe0000000 to 0xffffffff has suitable
31 * protection laid over the top for use in memory-mapped
32 * I/O
33 */
34
35#define __region_CS0 0xff000000 /* Boot ROMs area */
36
37#ifdef CONFIG_MB93091_VDK
38/*
39 * VDK motherboard and CPU card specific stuff
40 */
41
42#include <asm/mb93091-fpga-irqs.h>
43
44#define IRQ_CPU_MB93493_0 IRQ_CPU_EXTERNAL0
45#define IRQ_CPU_MB93493_1 IRQ_CPU_EXTERNAL1
46
47#define __region_CS2 0xe0000000 /* SLBUS/PCI I/O space */
48#define __region_CS2_M 0x0fffffff /* mask */
49#define __region_CS2_C 0x00000000 /* control */
50#define __region_CS5 0xf0000000 /* MB93493 CSC area (DAV daughter board) */
51#define __region_CS5_M 0x00ffffff
52#define __region_CS5_C 0x00010000
53#define __region_CS7 0xf1000000 /* CB70 CPU-card PCMCIA port I/O space */
54#define __region_CS7_M 0x00ffffff
55#define __region_CS7_C 0x00410701
56#define __region_CS1 0xfc000000 /* SLBUS/PCI bridge control registers */
57#define __region_CS1_M 0x000fffff
58#define __region_CS1_C 0x00000000
59#define __region_CS6 0xfc100000 /* CB70 CPU-card DM9000 LAN I/O space */
60#define __region_CS6_M 0x000fffff
61#define __region_CS6_C 0x00400707
62#define __region_CS3 0xfc200000 /* MB93493 CSR area (DAV daughter board) */
63#define __region_CS3_M 0x000fffff
64#define __region_CS3_C 0xc8100000
65#define __region_CS4 0xfd000000 /* CB70 CPU-card extra flash space */
66#define __region_CS4_M 0x00ffffff
67#define __region_CS4_C 0x00000f07
68
69#define __region_PCI_IO (__region_CS2 + 0x04000000UL)
70#define __region_PCI_MEM (__region_CS2 + 0x08000000UL)
71#define __flush_PCI_writes() \
72do { \
73 __builtin_write8((volatile void __iomem *) __region_PCI_MEM, 0); \
74} while(0)
75
76#define __is_PCI_IO(addr) \
77 (((unsigned long)(addr) >> 24) - (__region_PCI_IO >> 24) < (0x04000000UL >> 24))
78
79#define __is_PCI_MEM(addr) \
80 ((unsigned long)(addr) - __region_PCI_MEM < 0x08000000UL)
81
82#define __is_PCI_addr(addr) \
83 ((unsigned long)(addr) - __region_PCI_IO < 0x0c000000UL)
84
85#define __get_CLKSW() ({ *(volatile unsigned long *)(__region_CS2 + 0x0130000cUL) & 0xffUL; })
86#define __get_CLKIN() (__get_CLKSW() * 125U * 100000U / 24U)
87
88#ifndef __ASSEMBLY__
89extern int __nongprelbss mb93090_mb00_detected;
90#endif
91
92#define __addr_LEDS() (__region_CS2 + 0x01200004UL)
93#ifdef CONFIG_MB93090_MB00
94#define __set_LEDS(X) \
95do { \
96 if (mb93090_mb00_detected) \
97 __builtin_write32((void __iomem *) __addr_LEDS(), ~(X)); \
98} while (0)
99#else
100#define __set_LEDS(X)
101#endif
102
103#define __addr_LCD() (__region_CS2 + 0x01200008UL)
104#define __get_LCD(B) __builtin_read32((volatile void __iomem *) (B))
105#define __set_LCD(B,X) __builtin_write32((volatile void __iomem *) (B), (X))
106
107#define LCD_D 0x000000ff /* LCD data bus */
108#define LCD_RW 0x00000100 /* LCD R/W signal */
109#define LCD_RS 0x00000200 /* LCD Register Select */
110#define LCD_E 0x00000400 /* LCD Start Enable Signal */
111
112#define LCD_CMD_CLEAR (LCD_E|0x001)
113#define LCD_CMD_HOME (LCD_E|0x002)
114#define LCD_CMD_CURSOR_INC (LCD_E|0x004)
115#define LCD_CMD_SCROLL_INC (LCD_E|0x005)
116#define LCD_CMD_CURSOR_DEC (LCD_E|0x006)
117#define LCD_CMD_SCROLL_DEC (LCD_E|0x007)
118#define LCD_CMD_OFF (LCD_E|0x008)
119#define LCD_CMD_ON(CRSR,BLINK) (LCD_E|0x00c|(CRSR<<1)|BLINK)
120#define LCD_CMD_CURSOR_MOVE_L (LCD_E|0x010)
121#define LCD_CMD_CURSOR_MOVE_R (LCD_E|0x014)
122#define LCD_CMD_DISPLAY_SHIFT_L (LCD_E|0x018)
123#define LCD_CMD_DISPLAY_SHIFT_R (LCD_E|0x01c)
124#define LCD_CMD_FUNCSET(DL,N,F) (LCD_E|0x020|(DL<<4)|(N<<3)|(F<<2))
125#define LCD_CMD_SET_CG_ADDR(X) (LCD_E|0x040|X)
126#define LCD_CMD_SET_DD_ADDR(X) (LCD_E|0x080|X)
127#define LCD_CMD_READ_BUSY (LCD_E|LCD_RW)
128#define LCD_DATA_WRITE(X) (LCD_E|LCD_RS|(X))
129#define LCD_DATA_READ (LCD_E|LCD_RS|LCD_RW)
130
131#else
132/*
133 * PDK unit specific stuff
134 */
135
136#include <asm/mb93093-fpga-irqs.h>
137
138#define IRQ_CPU_MB93493_0 IRQ_CPU_EXTERNAL0
139#define IRQ_CPU_MB93493_1 IRQ_CPU_EXTERNAL1
140
141#define __region_CS5 0xf0000000 /* MB93493 CSC area (DAV daughter board) */
142#define __region_CS5_M 0x00ffffff /* mask */
143#define __region_CS5_C 0x00010000 /* control */
144#define __region_CS2 0x20000000 /* FPGA registers */
145#define __region_CS2_M 0x000fffff
146#define __region_CS2_C 0x00000000
147#define __region_CS1 0xfc100000 /* LAN registers */
148#define __region_CS1_M 0x000fffff
149#define __region_CS1_C 0x00010404
150#define __region_CS3 0xfc200000 /* MB93493 CSR area (DAV daughter board) */
151#define __region_CS3_M 0x000fffff
152#define __region_CS3_C 0xc8000000
153#define __region_CS4 0xfd000000 /* extra ROMs area */
154#define __region_CS4_M 0x00ffffff
155#define __region_CS4_C 0x00000f07
156
157#define __region_CS6 0xfe000000 /* not used - hide behind CPU resource I/O regs */
158#define __region_CS6_M 0x000fffff
159#define __region_CS6_C 0x00000f07
160#define __region_CS7 0xfe000000 /* not used - hide behind CPU resource I/O regs */
161#define __region_CS7_M 0x000fffff
162#define __region_CS7_C 0x00000f07
163
164#define __is_PCI_IO(addr) 0 /* no PCI */
165#define __is_PCI_MEM(addr) 0
166#define __is_PCI_addr(addr) 0
167#define __region_PCI_IO 0
168#define __region_PCI_MEM 0
169#define __flush_PCI_writes() do { } while(0)
170
171#define __get_CLKSW() 0UL
172#define __get_CLKIN() 66000000UL
173
174#define __addr_LEDS() (__region_CS2 + 0x00000023UL)
175#define __set_LEDS(X) __builtin_write8((volatile void __iomem *) __addr_LEDS(), (X))
176
177#define __addr_FPGATR() (__region_CS2 + 0x00000030UL)
178#define __set_FPGATR(X) __builtin_write32((volatile void __iomem *) __addr_FPGATR(), (X))
179#define __get_FPGATR() __builtin_read32((volatile void __iomem *) __addr_FPGATR())
180
181#define MB93093_FPGA_FPGATR_AUDIO_CLK 0x00000003
182
183#define __set_FPGATR_AUDIO_CLK(V) \
184 __set_FPGATR((__get_FPGATR() & ~MB93093_FPGA_FPGATR_AUDIO_CLK) | (V))
185
186#define MB93093_FPGA_FPGATR_AUDIO_CLK_OFF 0x0
187#define MB93093_FPGA_FPGATR_AUDIO_CLK_11MHz 0x1
188#define MB93093_FPGA_FPGATR_AUDIO_CLK_12MHz 0x2
189#define MB93093_FPGA_FPGATR_AUDIO_CLK_02MHz 0x3
190
191#define MB93093_FPGA_SWR_PUSHSWMASK (0x1F<<26)
192#define MB93093_FPGA_SWR_PUSHSW4 (1<<29)
193
194#define __addr_FPGA_SWR ((volatile void __iomem *)(__region_CS2 + 0x28UL))
195#define __get_FPGA_PUSHSW1_5() (__builtin_read32(__addr_FPGA_SWR) & MB93093_FPGA_SWR_PUSHSWMASK)
196
197
198#endif
199
200#endif /* _ASM_MB_REGS_H */
diff --git a/arch/frv/include/asm/mb86943a.h b/arch/frv/include/asm/mb86943a.h
new file mode 100644
index 000000000000..e87ef924bfb4
--- /dev/null
+++ b/arch/frv/include/asm/mb86943a.h
@@ -0,0 +1,42 @@
1/* mb86943a.h: MB86943 SPARClite <-> PCI bridge registers
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_MB86943A_H
13#define _ASM_MB86943A_H
14
15#include <asm/mb-regs.h>
16
17#define __reg_MB86943_sl_ctl *(volatile uint32_t *) (__region_CS1 + 0x00)
18
19#define MB86943_SL_CTL_BUS_WIDTH_64 0x00000001
20#define MB86943_SL_CTL_AS_HOST 0x00000002
21#define MB86943_SL_CTL_DRCT_MASTER_SWAP 0x00000004
22#define MB86943_SL_CTL_DRCT_SLAVE_SWAP 0x00000008
23#define MB86943_SL_CTL_PCI_CONFIG_SWAP 0x00000010
24#define MB86943_SL_CTL_ECS0_ENABLE 0x00000020
25#define MB86943_SL_CTL_ECS1_ENABLE 0x00000040
26#define MB86943_SL_CTL_ECS2_ENABLE 0x00000080
27
28#define __reg_MB86943_ecs_ctl(N) *(volatile uint32_t *) (__region_CS1 + 0x08 + (0x08*(N)))
29#define __reg_MB86943_ecs_range(N) *(volatile uint32_t *) (__region_CS1 + 0x20 + (0x10*(N)))
30#define __reg_MB86943_ecs_base(N) *(volatile uint32_t *) (__region_CS1 + 0x28 + (0x10*(N)))
31
32#define __reg_MB86943_sl_pci_io_range *(volatile uint32_t *) (__region_CS1 + 0x50)
33#define __reg_MB86943_sl_pci_io_base *(volatile uint32_t *) (__region_CS1 + 0x58)
34#define __reg_MB86943_sl_pci_mem_range *(volatile uint32_t *) (__region_CS1 + 0x60)
35#define __reg_MB86943_sl_pci_mem_base *(volatile uint32_t *) (__region_CS1 + 0x68)
36#define __reg_MB86943_pci_sl_io_base *(volatile uint32_t *) (__region_CS1 + 0x70)
37#define __reg_MB86943_pci_sl_mem_base *(volatile uint32_t *) (__region_CS1 + 0x78)
38
39#define __reg_MB86943_pci_arbiter *(volatile uint32_t *) (__region_CS2 + 0x01300014)
40#define MB86943_PCIARB_EN 0x00000001
41
42#endif /* _ASM_MB86943A_H */
diff --git a/arch/frv/include/asm/mb93091-fpga-irqs.h b/arch/frv/include/asm/mb93091-fpga-irqs.h
new file mode 100644
index 000000000000..19778c5ba9d6
--- /dev/null
+++ b/arch/frv/include/asm/mb93091-fpga-irqs.h
@@ -0,0 +1,42 @@
1/* mb93091-fpga-irqs.h: MB93091 CPU board FPGA IRQs
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_MB93091_FPGA_IRQS_H
13#define _ASM_MB93091_FPGA_IRQS_H
14
15#include <asm/irq.h>
16
17#ifndef __ASSEMBLY__
18
19/* IRQ IDs presented to drivers */
20enum {
21 IRQ_FPGA__UNUSED = IRQ_BASE_FPGA,
22 IRQ_FPGA_SYSINT_BUS_EXPANSION_1,
23 IRQ_FPGA_SL_BUS_EXPANSION_2,
24 IRQ_FPGA_PCI_INTD,
25 IRQ_FPGA_PCI_INTC,
26 IRQ_FPGA_PCI_INTB,
27 IRQ_FPGA_PCI_INTA,
28 IRQ_FPGA_SL_BUS_EXPANSION_7,
29 IRQ_FPGA_SYSINT_BUS_EXPANSION_8,
30 IRQ_FPGA_SL_BUS_EXPANSION_9,
31 IRQ_FPGA_MB86943_PCI_INTA,
32 IRQ_FPGA_MB86943_SLBUS_SIDE,
33 IRQ_FPGA_RTL8029_INTA,
34 IRQ_FPGA_SYSINT_BUS_EXPANSION_13,
35 IRQ_FPGA_SL_BUS_EXPANSION_14,
36 IRQ_FPGA_NMI,
37};
38
39
40#endif /* !__ASSEMBLY__ */
41
42#endif /* _ASM_MB93091_FPGA_IRQS_H */
diff --git a/arch/frv/include/asm/mb93093-fpga-irqs.h b/arch/frv/include/asm/mb93093-fpga-irqs.h
new file mode 100644
index 000000000000..590266b1a6d3
--- /dev/null
+++ b/arch/frv/include/asm/mb93093-fpga-irqs.h
@@ -0,0 +1,29 @@
1/* mb93093-fpga-irqs.h: MB93093 CPU board FPGA IRQs
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_MB93093_FPGA_IRQS_H
13#define _ASM_MB93093_FPGA_IRQS_H
14
15#include <asm/irq.h>
16
17#ifndef __ASSEMBLY__
18
19/* IRQ IDs presented to drivers */
20enum {
21 IRQ_FPGA_PUSH_BUTTON_SW1_5 = IRQ_BASE_FPGA + 8,
22 IRQ_FPGA_ROCKER_C_SW8 = IRQ_BASE_FPGA + 9,
23 IRQ_FPGA_ROCKER_C_SW9 = IRQ_BASE_FPGA + 10,
24};
25
26
27#endif /* !__ASSEMBLY__ */
28
29#endif /* _ASM_MB93093_FPGA_IRQS_H */
diff --git a/arch/frv/include/asm/mb93493-irqs.h b/arch/frv/include/asm/mb93493-irqs.h
new file mode 100644
index 000000000000..82c7aeddd333
--- /dev/null
+++ b/arch/frv/include/asm/mb93493-irqs.h
@@ -0,0 +1,50 @@
1/* mb93493-irqs.h: MB93493 companion chip IRQs
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_MB93493_IRQS_H
13#define _ASM_MB93493_IRQS_H
14
15#include <asm/irq.h>
16
17#ifndef __ASSEMBLY__
18
19/* IRQ IDs presented to drivers */
20enum {
21 IRQ_MB93493_VDC = IRQ_BASE_MB93493 + 0,
22 IRQ_MB93493_VCC = IRQ_BASE_MB93493 + 1,
23 IRQ_MB93493_AUDIO_OUT = IRQ_BASE_MB93493 + 2,
24 IRQ_MB93493_I2C_0 = IRQ_BASE_MB93493 + 3,
25 IRQ_MB93493_I2C_1 = IRQ_BASE_MB93493 + 4,
26 IRQ_MB93493_USB = IRQ_BASE_MB93493 + 5,
27 IRQ_MB93493_LOCAL_BUS = IRQ_BASE_MB93493 + 7,
28 IRQ_MB93493_PCMCIA = IRQ_BASE_MB93493 + 8,
29 IRQ_MB93493_GPIO = IRQ_BASE_MB93493 + 9,
30 IRQ_MB93493_AUDIO_IN = IRQ_BASE_MB93493 + 10,
31};
32
33/* IRQ multiplexor mappings */
34#define ROUTE_VIA_IRQ0 0 /* route IRQ by way of CPU external IRQ 0 */
35#define ROUTE_VIA_IRQ1 1 /* route IRQ by way of CPU external IRQ 1 */
36
37#define IRQ_MB93493_VDC_ROUTE ROUTE_VIA_IRQ0
38#define IRQ_MB93493_VCC_ROUTE ROUTE_VIA_IRQ1
39#define IRQ_MB93493_AUDIO_OUT_ROUTE ROUTE_VIA_IRQ1
40#define IRQ_MB93493_I2C_0_ROUTE ROUTE_VIA_IRQ1
41#define IRQ_MB93493_I2C_1_ROUTE ROUTE_VIA_IRQ1
42#define IRQ_MB93493_USB_ROUTE ROUTE_VIA_IRQ1
43#define IRQ_MB93493_LOCAL_BUS_ROUTE ROUTE_VIA_IRQ1
44#define IRQ_MB93493_PCMCIA_ROUTE ROUTE_VIA_IRQ1
45#define IRQ_MB93493_GPIO_ROUTE ROUTE_VIA_IRQ1
46#define IRQ_MB93493_AUDIO_IN_ROUTE ROUTE_VIA_IRQ1
47
48#endif /* !__ASSEMBLY__ */
49
50#endif /* _ASM_MB93493_IRQS_H */
diff --git a/arch/frv/include/asm/mb93493-regs.h b/arch/frv/include/asm/mb93493-regs.h
new file mode 100644
index 000000000000..8a1f6aac8cf1
--- /dev/null
+++ b/arch/frv/include/asm/mb93493-regs.h
@@ -0,0 +1,281 @@
1/* mb93493-regs.h: MB93493 companion chip registers
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_MB93493_REGS_H
13#define _ASM_MB93493_REGS_H
14
15#include <asm/mb-regs.h>
16#include <asm/mb93493-irqs.h>
17
18#define __addr_MB93493(X) ((volatile unsigned long *)(__region_CS3 + (X)))
19#define __get_MB93493(X) ({ *(volatile unsigned long *)(__region_CS3 + (X)); })
20
21#define __set_MB93493(X,V) \
22do { \
23 *(volatile unsigned long *)(__region_CS3 + (X)) = (V); mb(); \
24} while(0)
25
26#define __get_MB93493_STSR(X) __get_MB93493(0x3c0 + (X) * 4)
27#define __set_MB93493_STSR(X,V) __set_MB93493(0x3c0 + (X) * 4, (V))
28#define MB93493_STSR_EN
29
30#define __addr_MB93493_IQSR(X) __addr_MB93493(0x3d0 + (X) * 4)
31#define __get_MB93493_IQSR(X) __get_MB93493(0x3d0 + (X) * 4)
32#define __set_MB93493_IQSR(X,V) __set_MB93493(0x3d0 + (X) * 4, (V))
33
34#define __get_MB93493_DQSR(X) __get_MB93493(0x3e0 + (X) * 4)
35#define __set_MB93493_DQSR(X,V) __set_MB93493(0x3e0 + (X) * 4, (V))
36
37#define __get_MB93493_LBSER() __get_MB93493(0x3f0)
38#define __set_MB93493_LBSER(V) __set_MB93493(0x3f0, (V))
39
40#define MB93493_LBSER_VDC 0x00010000
41#define MB93493_LBSER_VCC 0x00020000
42#define MB93493_LBSER_AUDIO 0x00040000
43#define MB93493_LBSER_I2C_0 0x00080000
44#define MB93493_LBSER_I2C_1 0x00100000
45#define MB93493_LBSER_USB 0x00200000
46#define MB93493_LBSER_GPIO 0x00800000
47#define MB93493_LBSER_PCMCIA 0x01000000
48
49#define __get_MB93493_LBSR() __get_MB93493(0x3fc)
50#define __set_MB93493_LBSR(V) __set_MB93493(0x3fc, (V))
51
52/*
53 * video display controller
54 */
55#define __get_MB93493_VDC(X) __get_MB93493(MB93493_VDC_##X)
56#define __set_MB93493_VDC(X,V) __set_MB93493(MB93493_VDC_##X, (V))
57
58#define MB93493_VDC_RCURSOR 0x140 /* cursor position */
59#define MB93493_VDC_RCT1 0x144 /* cursor colour 1 */
60#define MB93493_VDC_RCT2 0x148 /* cursor colour 2 */
61#define MB93493_VDC_RHDC 0x150 /* horizontal display period */
62#define MB93493_VDC_RH_MARGINS 0x154 /* horizontal margin sizes */
63#define MB93493_VDC_RVDC 0x158 /* vertical display period */
64#define MB93493_VDC_RV_MARGINS 0x15c /* vertical margin sizes */
65#define MB93493_VDC_RC 0x170 /* VDC control */
66#define MB93493_VDC_RCLOCK 0x174 /* clock divider, DMA req delay */
67#define MB93493_VDC_RBLACK 0x178 /* black insert sizes */
68#define MB93493_VDC_RS 0x17c /* VDC status */
69
70#define __addr_MB93493_VDC_BCI(X) ({ (volatile unsigned long *)(__region_CS3 + 0x000 + (X)); })
71#define __addr_MB93493_VDC_TPO(X) (__region_CS3 + 0x1c0 + (X))
72
73#define VDC_TPO_WIDTH 32
74
75#define VDC_RC_DSR 0x00000080 /* VDC master reset */
76
77#define VDC_RS_IT 0x00060000 /* interrupt indicators */
78#define VDC_RS_IT_UNDERFLOW 0x00040000 /* - underflow event */
79#define VDC_RS_IT_VSYNC 0x00020000 /* - VSYNC event */
80#define VDC_RS_DFI 0x00010000 /* current interlace field number */
81#define VDC_RS_DFI_TOP 0x00000000 /* - top field */
82#define VDC_RS_DFI_BOTTOM 0x00010000 /* - bottom field */
83#define VDC_RS_DCSR 0x00000010 /* cursor state */
84#define VDC_RS_DCM 0x00000003 /* display mode */
85#define VDC_RS_DCM_DISABLED 0x00000000 /* - display disabled */
86#define VDC_RS_DCM_STOPPED 0x00000001 /* - VDC stopped */
87#define VDC_RS_DCM_FREERUNNING 0x00000002 /* - VDC free-running */
88#define VDC_RS_DCM_TRANSFERRING 0x00000003 /* - data being transferred to VDC */
89
90/*
91 * video capture controller
92 */
93#define __get_MB93493_VCC(X) __get_MB93493(MB93493_VCC_##X)
94#define __set_MB93493_VCC(X,V) __set_MB93493(MB93493_VCC_##X, (V))
95
96#define MB93493_VCC_RREDUCT 0x104 /* reduction rate */
97#define MB93493_VCC_RHY 0x108 /* horizontal brightness filter coefficients */
98#define MB93493_VCC_RHC 0x10c /* horizontal colour-difference filter coefficients */
99#define MB93493_VCC_RHSIZE 0x110 /* horizontal cycle sizes */
100#define MB93493_VCC_RHBC 0x114 /* horizontal back porch size */
101#define MB93493_VCC_RVCC 0x118 /* vertical capture period */
102#define MB93493_VCC_RVBC 0x11c /* vertical back porch period */
103#define MB93493_VCC_RV 0x120 /* vertical filter coefficients */
104#define MB93493_VCC_RDTS 0x128 /* DMA transfer size */
105#define MB93493_VCC_RDTS_4B 0x01000000 /* 4-byte transfer */
106#define MB93493_VCC_RDTS_32B 0x03000000 /* 32-byte transfer */
107#define MB93493_VCC_RDTS_SHIFT 24
108#define MB93493_VCC_RCC 0x130 /* VCC control */
109#define MB93493_VCC_RIS 0x134 /* VCC interrupt status */
110
111#define __addr_MB93493_VCC_TPI(X) (__region_CS3 + 0x180 + (X))
112
113#define VCC_RHSIZE_RHCC 0x000007ff
114#define VCC_RHSIZE_RHCC_SHIFT 0
115#define VCC_RHSIZE_RHTCC 0x0fff0000
116#define VCC_RHSIZE_RHTCC_SHIFT 16
117
118#define VCC_RVBC_RVBC 0x00003f00
119#define VCC_RVBC_RVBC_SHIFT 8
120
121#define VCC_RREDUCT_RHR 0x07ff0000
122#define VCC_RREDUCT_RHR_SHIFT 16
123#define VCC_RREDUCT_RVR 0x000007ff
124#define VCC_RREDUCT_RVR_SHIFT 0
125
126#define VCC_RCC_CE 0x00000001 /* VCC enable */
127#define VCC_RCC_CS 0x00000002 /* request video capture start */
128#define VCC_RCC_CPF 0x0000000c /* pixel format */
129#define VCC_RCC_CPF_YCBCR_16 0x00000000 /* - YCbCr 4:2:2 16-bit format */
130#define VCC_RCC_CPF_RGB 0x00000004 /* - RGB 4:4:4 format */
131#define VCC_RCC_CPF_YCBCR_24 0x00000008 /* - YCbCr 4:2:2 24-bit format */
132#define VCC_RCC_CPF_BT656 0x0000000c /* - ITU R-BT.656 format */
133#define VCC_RCC_CPF_SHIFT 2
134#define VCC_RCC_CSR 0x00000080 /* request reset */
135#define VCC_RCC_HSIP 0x00000100 /* HSYNC polarity */
136#define VCC_RCC_HSIP_LOACT 0x00000000 /* - low active */
137#define VCC_RCC_HSIP_HIACT 0x00000100 /* - high active */
138#define VCC_RCC_VSIP 0x00000200 /* VSYNC polarity */
139#define VCC_RCC_VSIP_LOACT 0x00000000 /* - low active */
140#define VCC_RCC_VSIP_HIACT 0x00000200 /* - high active */
141#define VCC_RCC_CIE 0x00000800 /* interrupt enable */
142#define VCC_RCC_CFP 0x00001000 /* RGB pixel packing */
143#define VCC_RCC_CFP_4TO3 0x00000000 /* - pack 4 pixels into 3 words */
144#define VCC_RCC_CFP_1TO1 0x00001000 /* - pack 1 pixel into 1 words */
145#define VCC_RCC_CSM 0x00006000 /* interlace specification */
146#define VCC_RCC_CSM_ONEPASS 0x00002000 /* - non-interlaced */
147#define VCC_RCC_CSM_INTERLACE 0x00004000 /* - interlaced */
148#define VCC_RCC_CSM_SHIFT 13
149#define VCC_RCC_ES 0x00008000 /* capture start polarity */
150#define VCC_RCC_ES_NEG 0x00000000 /* - negative edge */
151#define VCC_RCC_ES_POS 0x00008000 /* - positive edge */
152#define VCC_RCC_IFI 0x00080000 /* inferlace field evaluation reverse */
153#define VCC_RCC_FDTS 0x00300000 /* interlace field start */
154#define VCC_RCC_FDTS_3_8 0x00000000 /* - 3/8 of horizontal entire cycle */
155#define VCC_RCC_FDTS_1_4 0x00100000 /* - 1/4 of horizontal entire cycle */
156#define VCC_RCC_FDTS_7_16 0x00200000 /* - 7/16 of horizontal entire cycle */
157#define VCC_RCC_FDTS_SHIFT 20
158#define VCC_RCC_MOV 0x00400000 /* test bit - always set to 1 */
159#define VCC_RCC_STP 0x00800000 /* request video capture stop */
160#define VCC_RCC_TO 0x01000000 /* input during top-field only */
161
162#define VCC_RIS_VSYNC 0x01000000 /* VSYNC interrupt */
163#define VCC_RIS_OV 0x02000000 /* overflow interrupt */
164#define VCC_RIS_BOTTOM 0x08000000 /* interlace bottom field */
165#define VCC_RIS_STARTED 0x10000000 /* capture started */
166
167/*
168 * I2C
169 */
170#define MB93493_I2C_BSR 0x340 /* bus status */
171#define MB93493_I2C_BCR 0x344 /* bus control */
172#define MB93493_I2C_CCR 0x348 /* clock control */
173#define MB93493_I2C_ADR 0x34c /* address */
174#define MB93493_I2C_DTR 0x350 /* data */
175#define MB93493_I2C_BC2R 0x35c /* bus control 2 */
176
177#define __addr_MB93493_I2C(port,X) (__region_CS3 + MB93493_I2C_##X + ((port)*0x20))
178#define __get_MB93493_I2C(port,X) __get_MB93493(MB93493_I2C_##X + ((port)*0x20))
179#define __set_MB93493_I2C(port,X,V) __set_MB93493(MB93493_I2C_##X + ((port)*0x20), (V))
180
181#define I2C_BSR_BB (1 << 7)
182
183/*
184 * audio controller (I2S) registers
185 */
186#define __get_MB93493_I2S(X) __get_MB93493(MB93493_I2S_##X)
187#define __set_MB93493_I2S(X,V) __set_MB93493(MB93493_I2S_##X, (V))
188
189#define MB93493_I2S_ALDR 0x300 /* L-channel data */
190#define MB93493_I2S_ARDR 0x304 /* R-channel data */
191#define MB93493_I2S_APDR 0x308 /* 16-bit packed data */
192#define MB93493_I2S_AISTR 0x310 /* status */
193#define MB93493_I2S_AICR 0x314 /* control */
194
195#define __addr_MB93493_I2S_ALDR(X) (__region_CS3 + MB93493_I2S_ALDR + (X))
196#define __addr_MB93493_I2S_ARDR(X) (__region_CS3 + MB93493_I2S_ARDR + (X))
197#define __addr_MB93493_I2S_APDR(X) (__region_CS3 + MB93493_I2S_APDR + (X))
198#define __addr_MB93493_I2S_ADR(X) (__region_CS3 + 0x320 + (X))
199
200#define I2S_AISTR_OTST 0x00000003 /* status of output data transfer */
201#define I2S_AISTR_OTR 0x00000010 /* output transfer request pending */
202#define I2S_AISTR_OUR 0x00000020 /* output FIFO underrun detected */
203#define I2S_AISTR_OOR 0x00000040 /* output FIFO overrun detected */
204#define I2S_AISTR_ODS 0x00000100 /* output DMA transfer size */
205#define I2S_AISTR_ODE 0x00000400 /* output DMA transfer request enable */
206#define I2S_AISTR_OTRIE 0x00001000 /* output transfer request interrupt enable */
207#define I2S_AISTR_OURIE 0x00002000 /* output FIFO underrun interrupt enable */
208#define I2S_AISTR_OORIE 0x00004000 /* output FIFO overrun interrupt enable */
209#define I2S_AISTR__OUT_MASK 0x00007570
210#define I2S_AISTR_ITST 0x00030000 /* status of input data transfer */
211#define I2S_AISTR_ITST_SHIFT 16
212#define I2S_AISTR_ITR 0x00100000 /* input transfer request pending */
213#define I2S_AISTR_IUR 0x00200000 /* input FIFO underrun detected */
214#define I2S_AISTR_IOR 0x00400000 /* input FIFO overrun detected */
215#define I2S_AISTR_IDS 0x01000000 /* input DMA transfer size */
216#define I2S_AISTR_IDE 0x04000000 /* input DMA transfer request enable */
217#define I2S_AISTR_ITRIE 0x10000000 /* input transfer request interrupt enable */
218#define I2S_AISTR_IURIE 0x20000000 /* input FIFO underrun interrupt enable */
219#define I2S_AISTR_IORIE 0x40000000 /* input FIFO overrun interrupt enable */
220#define I2S_AISTR__IN_MASK 0x75700000
221
222#define I2S_AICR_MI 0x00000001 /* mono input requested */
223#define I2S_AICR_AMI 0x00000002 /* relation between LRCKI/FS1 and SDI */
224#define I2S_AICR_LRI 0x00000004 /* function of LRCKI pin */
225#define I2S_AICR_SDMI 0x00000070 /* format of input audio data */
226#define I2S_AICR_SDMI_SHIFT 4
227#define I2S_AICR_CLI 0x00000080 /* input FIFO clearing control */
228#define I2S_AICR_IM 0x00000300 /* input state control */
229#define I2S_AICR_IM_SHIFT 8
230#define I2S_AICR__IN_MASK 0x000003f7
231#define I2S_AICR_MO 0x00001000 /* mono output requested */
232#define I2S_AICR_AMO 0x00002000 /* relation between LRCKO/FS0 and SDO */
233#define I2S_AICR_AMO_SHIFT 13
234#define I2S_AICR_LRO 0x00004000 /* function of LRCKO pin */
235#define I2S_AICR_SDMO 0x00070000 /* format of output audio data */
236#define I2S_AICR_SDMO_SHIFT 16
237#define I2S_AICR_CLO 0x00080000 /* output FIFO clearing control */
238#define I2S_AICR_OM 0x00100000 /* output state control */
239#define I2S_AICR__OUT_MASK 0x001f7000
240#define I2S_AICR_DIV 0x03000000 /* frequency division rate */
241#define I2S_AICR_DIV_SHIFT 24
242#define I2S_AICR_FL 0x20000000 /* frame length */
243#define I2S_AICR_FS 0x40000000 /* frame sync method */
244#define I2S_AICR_ME 0x80000000 /* master enable */
245
246/*
247 * PCMCIA
248 */
249#define __addr_MB93493_PCMCIA(X) ((volatile unsigned long *)(__region_CS5 + (X)))
250
251/*
252 * GPIO
253 */
254#define __get_MB93493_GPIO_PDR(X) __get_MB93493(0x380 + (X) * 0xc0)
255#define __set_MB93493_GPIO_PDR(X,V) __set_MB93493(0x380 + (X) * 0xc0, (V))
256
257#define __get_MB93493_GPIO_GPDR(X) __get_MB93493(0x384 + (X) * 0xc0)
258#define __set_MB93493_GPIO_GPDR(X,V) __set_MB93493(0x384 + (X) * 0xc0, (V))
259
260#define __get_MB93493_GPIO_SIR(X) __get_MB93493(0x388 + (X) * 0xc0)
261#define __set_MB93493_GPIO_SIR(X,V) __set_MB93493(0x388 + (X) * 0xc0, (V))
262
263#define __get_MB93493_GPIO_SOR(X) __get_MB93493(0x38c + (X) * 0xc0)
264#define __set_MB93493_GPIO_SOR(X,V) __set_MB93493(0x38c + (X) * 0xc0, (V))
265
266#define __get_MB93493_GPIO_PDSR(X) __get_MB93493(0x390 + (X) * 0xc0)
267#define __set_MB93493_GPIO_PDSR(X,V) __set_MB93493(0x390 + (X) * 0xc0, (V))
268
269#define __get_MB93493_GPIO_PDCR(X) __get_MB93493(0x394 + (X) * 0xc0)
270#define __set_MB93493_GPIO_PDCR(X,V) __set_MB93493(0x394 + (X) * 0xc0, (V))
271
272#define __get_MB93493_GPIO_INTST(X) __get_MB93493(0x398 + (X) * 0xc0)
273#define __set_MB93493_GPIO_INTST(X,V) __set_MB93493(0x398 + (X) * 0xc0, (V))
274
275#define __get_MB93493_GPIO_IEHL(X) __get_MB93493(0x39c + (X) * 0xc0)
276#define __set_MB93493_GPIO_IEHL(X,V) __set_MB93493(0x39c + (X) * 0xc0, (V))
277
278#define __get_MB93493_GPIO_IELH(X) __get_MB93493(0x3a0 + (X) * 0xc0)
279#define __set_MB93493_GPIO_IELH(X,V) __set_MB93493(0x3a0 + (X) * 0xc0, (V))
280
281#endif /* _ASM_MB93493_REGS_H */
diff --git a/arch/frv/include/asm/mc146818rtc.h b/arch/frv/include/asm/mc146818rtc.h
new file mode 100644
index 000000000000..90dfb7a633d1
--- /dev/null
+++ b/arch/frv/include/asm/mc146818rtc.h
@@ -0,0 +1,16 @@
1/* mc146818rtc.h: RTC defs
2 *
3 * Copyright (C) 2005 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_MC146818RTC_H
13#define _ASM_MC146818RTC_H
14
15
16#endif /* _ASM_MC146818RTC_H */
diff --git a/arch/frv/include/asm/mem-layout.h b/arch/frv/include/asm/mem-layout.h
new file mode 100644
index 000000000000..2947764fc0e0
--- /dev/null
+++ b/arch/frv/include/asm/mem-layout.h
@@ -0,0 +1,86 @@
1/* mem-layout.h: memory layout
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_MEM_LAYOUT_H
13#define _ASM_MEM_LAYOUT_H
14
15#ifndef __ASSEMBLY__
16#define __UL(X) ((unsigned long) (X))
17#else
18#define __UL(X) (X)
19#endif
20
21/*
22 * PAGE_SHIFT determines the page size
23 */
24#define PAGE_SHIFT 14
25
26#ifndef __ASSEMBLY__
27#define PAGE_SIZE (1UL << PAGE_SHIFT)
28#else
29#define PAGE_SIZE (1 << PAGE_SHIFT)
30#endif
31
32#define PAGE_MASK (~(PAGE_SIZE-1))
33
34/*
35 * the slab must be aligned such that load- and store-double instructions don't
36 * fault if used
37 */
38#define ARCH_KMALLOC_MINALIGN 8
39#define ARCH_SLAB_MINALIGN 8
40
41/*****************************************************************************/
42/*
43 * virtual memory layout from kernel's point of view
44 */
45#define PAGE_OFFSET ((unsigned long) &__page_offset)
46
47#ifdef CONFIG_MMU
48
49/* see Documentation/frv/mmu-layout.txt */
50#define KERNEL_LOWMEM_START __UL(0xc0000000)
51#define KERNEL_LOWMEM_END __UL(0xd0000000)
52#define VMALLOC_START __UL(0xd0000000)
53#define VMALLOC_END __UL(0xd8000000)
54#define PKMAP_BASE __UL(0xd8000000)
55#define PKMAP_END __UL(0xdc000000)
56#define KMAP_ATOMIC_SECONDARY_FRAME __UL(0xdc000000)
57#define KMAP_ATOMIC_PRIMARY_FRAME __UL(0xdd000000)
58
59#endif
60
61#define KERNEL_IO_START __UL(0xe0000000)
62
63
64/*****************************************************************************/
65/*
66 * memory layout from userspace's point of view
67 */
68#define BRK_BASE __UL(2 * 1024 * 1024 + PAGE_SIZE)
69#define STACK_TOP __UL(2 * 1024 * 1024)
70#define STACK_TOP_MAX __UL(0xc0000000)
71
72/* userspace process size */
73#ifdef CONFIG_MMU
74#define TASK_SIZE (PAGE_OFFSET)
75#else
76#define TASK_SIZE __UL(0xFFFFFFFFUL)
77#endif
78
79/* base of area at which unspecified mmaps will start */
80#ifdef CONFIG_BINFMT_ELF_FDPIC
81#define TASK_UNMAPPED_BASE __UL(16 * 1024 * 1024)
82#else
83#define TASK_UNMAPPED_BASE __UL(TASK_SIZE / 3)
84#endif
85
86#endif /* _ASM_MEM_LAYOUT_H */
diff --git a/arch/frv/include/asm/mman.h b/arch/frv/include/asm/mman.h
new file mode 100644
index 000000000000..b4371e928683
--- /dev/null
+++ b/arch/frv/include/asm/mman.h
@@ -0,0 +1,18 @@
1#ifndef __ASM_MMAN_H__
2#define __ASM_MMAN_H__
3
4#include <asm-generic/mman.h>
5
6#define MAP_GROWSDOWN 0x0100 /* stack-like segment */
7#define MAP_DENYWRITE 0x0800 /* ETXTBSY */
8#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */
9#define MAP_LOCKED 0x2000 /* pages are locked */
10#define MAP_NORESERVE 0x4000 /* don't check for reservations */
11#define MAP_POPULATE 0x8000 /* populate (prefault) pagetables */
12#define MAP_NONBLOCK 0x10000 /* do not block on IO */
13
14#define MCL_CURRENT 1 /* lock all current mappings */
15#define MCL_FUTURE 2 /* lock all future mappings */
16
17#endif /* __ASM_MMAN_H__ */
18
diff --git a/arch/frv/include/asm/mmu.h b/arch/frv/include/asm/mmu.h
new file mode 100644
index 000000000000..86ca0e86e7d2
--- /dev/null
+++ b/arch/frv/include/asm/mmu.h
@@ -0,0 +1,41 @@
1/* mmu.h: memory management context for FR-V with or without MMU support
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11#ifndef _ASM_MMU_H
12#define _ASM_MMU_H
13
14typedef struct {
15#ifdef CONFIG_MMU
16 struct list_head id_link; /* link in list of context ID owners */
17 unsigned short id; /* MMU context ID */
18 unsigned short id_busy; /* true if ID is in CXNR */
19 unsigned long itlb_cached_pge; /* [SCR0] PGE cached for insn TLB handler */
20 unsigned long itlb_ptd_mapping; /* [DAMR4] PTD mapping for itlb cached PGE */
21 unsigned long dtlb_cached_pge; /* [SCR1] PGE cached for data TLB handler */
22 unsigned long dtlb_ptd_mapping; /* [DAMR5] PTD mapping for dtlb cached PGE */
23
24#else
25 unsigned long end_brk;
26
27#endif
28
29#ifdef CONFIG_BINFMT_ELF_FDPIC
30 unsigned long exec_fdpic_loadmap;
31 unsigned long interp_fdpic_loadmap;
32#endif
33
34} mm_context_t;
35
36#ifdef CONFIG_MMU
37extern int __nongpreldata cxn_pinned;
38extern int cxn_pin_by_pid(pid_t pid);
39#endif
40
41#endif /* _ASM_MMU_H */
diff --git a/arch/frv/include/asm/mmu_context.h b/arch/frv/include/asm/mmu_context.h
new file mode 100644
index 000000000000..c7daa395156a
--- /dev/null
+++ b/arch/frv/include/asm/mmu_context.h
@@ -0,0 +1,50 @@
1/* mmu_context.h: MMU context management routines
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_MMU_CONTEXT_H
13#define _ASM_MMU_CONTEXT_H
14
15#include <asm/setup.h>
16#include <asm/page.h>
17#include <asm/pgalloc.h>
18#include <asm-generic/mm_hooks.h>
19
20static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
21{
22}
23
24#ifdef CONFIG_MMU
25extern int init_new_context(struct task_struct *tsk, struct mm_struct *mm);
26extern void change_mm_context(mm_context_t *old, mm_context_t *ctx, pgd_t *_pgd);
27extern void destroy_context(struct mm_struct *mm);
28
29#else
30#define init_new_context(tsk, mm) ({ 0; })
31#define change_mm_context(old, ctx, _pml4) do {} while(0)
32#define destroy_context(mm) do {} while(0)
33#endif
34
35#define switch_mm(prev, next, tsk) \
36do { \
37 if (prev != next) \
38 change_mm_context(&prev->context, &next->context, next->pgd); \
39} while(0)
40
41#define activate_mm(prev, next) \
42do { \
43 change_mm_context(&prev->context, &next->context, next->pgd); \
44} while(0)
45
46#define deactivate_mm(tsk, mm) \
47do { \
48} while(0)
49
50#endif
diff --git a/arch/frv/include/asm/module.h b/arch/frv/include/asm/module.h
new file mode 100644
index 000000000000..3d5c6360289a
--- /dev/null
+++ b/arch/frv/include/asm/module.h
@@ -0,0 +1,28 @@
1/* module.h: FRV module stuff
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11#ifndef _ASM_MODULE_H
12#define _ASM_MODULE_H
13
14struct mod_arch_specific
15{
16};
17
18#define Elf_Shdr Elf32_Shdr
19#define Elf_Sym Elf32_Sym
20#define Elf_Ehdr Elf32_Ehdr
21
22/*
23 * Include the architecture version.
24 */
25#define MODULE_ARCH_VERMAGIC __stringify(PROCESSOR_MODEL_NAME) " "
26
27#endif /* _ASM_MODULE_H */
28
diff --git a/arch/frv/include/asm/msgbuf.h b/arch/frv/include/asm/msgbuf.h
new file mode 100644
index 000000000000..97ceb55a06fb
--- /dev/null
+++ b/arch/frv/include/asm/msgbuf.h
@@ -0,0 +1,32 @@
1#ifndef _ASM_MSGBUF_H
2#define _ASM_MSGBUF_H
3
4/*
5 * The msqid64_ds structure for FR-V architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct msqid64_ds {
15 struct ipc64_perm msg_perm;
16 __kernel_time_t msg_stime; /* last msgsnd time */
17 unsigned long __unused1;
18 __kernel_time_t msg_rtime; /* last msgrcv time */
19 unsigned long __unused2;
20 __kernel_time_t msg_ctime; /* last change time */
21 unsigned long __unused3;
22 unsigned long msg_cbytes; /* current number of bytes on queue */
23 unsigned long msg_qnum; /* number of messages in queue */
24 unsigned long msg_qbytes; /* max number of bytes on queue */
25 __kernel_pid_t msg_lspid; /* pid of last msgsnd */
26 __kernel_pid_t msg_lrpid; /* last receive pid */
27 unsigned long __unused4;
28 unsigned long __unused5;
29};
30
31#endif /* _ASM_MSGBUF_H */
32
diff --git a/arch/frv/include/asm/mutex.h b/arch/frv/include/asm/mutex.h
new file mode 100644
index 000000000000..458c1f7fbc18
--- /dev/null
+++ b/arch/frv/include/asm/mutex.h
@@ -0,0 +1,9 @@
1/*
2 * Pull in the generic implementation for the mutex fastpath.
3 *
4 * TODO: implement optimized primitives instead, or leave the generic
5 * implementation in place, or pick the atomic_xchg() based generic
6 * implementation. (see asm-generic/mutex-xchg.h for details)
7 */
8
9#include <asm-generic/mutex-dec.h>
diff --git a/arch/frv/include/asm/page.h b/arch/frv/include/asm/page.h
new file mode 100644
index 000000000000..bd9c220094c7
--- /dev/null
+++ b/arch/frv/include/asm/page.h
@@ -0,0 +1,78 @@
1#ifndef _ASM_PAGE_H
2#define _ASM_PAGE_H
3
4#include <asm/virtconvert.h>
5#include <asm/mem-layout.h>
6#include <asm/sections.h>
7#include <asm/setup.h>
8
9#ifndef __ASSEMBLY__
10
11#define get_user_page(vaddr) __get_free_page(GFP_KERNEL)
12#define free_user_page(page, addr) free_page(addr)
13
14#define clear_page(pgaddr) memset((pgaddr), 0, PAGE_SIZE)
15#define copy_page(to,from) memcpy((to), (from), PAGE_SIZE)
16
17#define clear_user_page(pgaddr, vaddr, page) memset((pgaddr), 0, PAGE_SIZE)
18#define copy_user_page(vto, vfrom, vaddr, topg) memcpy((vto), (vfrom), PAGE_SIZE)
19
20/*
21 * These are used to make use of C type-checking..
22 */
23typedef struct { unsigned long pte; } pte_t;
24typedef struct { unsigned long ste[64];} pmd_t;
25typedef struct { pmd_t pue[1]; } pud_t;
26typedef struct { pud_t pge[1]; } pgd_t;
27typedef struct { unsigned long pgprot; } pgprot_t;
28typedef struct page *pgtable_t;
29
30#define pte_val(x) ((x).pte)
31#define pmd_val(x) ((x).ste[0])
32#define pud_val(x) ((x).pue[0])
33#define pgd_val(x) ((x).pge[0])
34#define pgprot_val(x) ((x).pgprot)
35
36#define __pte(x) ((pte_t) { (x) } )
37#define __pmd(x) ((pmd_t) { (x) } )
38#define __pud(x) ((pud_t) { (x) } )
39#define __pgd(x) ((pgd_t) { (x) } )
40#define __pgprot(x) ((pgprot_t) { (x) } )
41#define PTE_MASK PAGE_MASK
42
43#define devmem_is_allowed(pfn) 1
44
45#define __pa(vaddr) virt_to_phys((void *) (unsigned long) (vaddr))
46#define __va(paddr) phys_to_virt((unsigned long) (paddr))
47
48#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
49
50extern unsigned long max_low_pfn;
51extern unsigned long min_low_pfn;
52extern unsigned long max_pfn;
53
54#ifdef CONFIG_MMU
55#define pfn_valid(pfn) ((pfn) < max_mapnr)
56#else
57#define ARCH_PFN_OFFSET (PAGE_OFFSET >> PAGE_SHIFT)
58#define pfn_valid(pfn) ((pfn) >= min_low_pfn && (pfn) < max_low_pfn)
59
60#endif
61
62#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
63#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
64
65
66#ifdef CONFIG_MMU
67#define VM_DATA_DEFAULT_FLAGS \
68 (VM_READ | VM_WRITE | \
69 ((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0 ) | \
70 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
71#endif
72
73#endif /* __ASSEMBLY__ */
74
75#include <asm-generic/memory_model.h>
76#include <asm-generic/page.h>
77
78#endif /* _ASM_PAGE_H */
diff --git a/arch/frv/include/asm/param.h b/arch/frv/include/asm/param.h
new file mode 100644
index 000000000000..6859dd503ed3
--- /dev/null
+++ b/arch/frv/include/asm/param.h
@@ -0,0 +1,22 @@
1#ifndef _ASM_PARAM_H
2#define _ASM_PARAM_H
3
4#ifdef __KERNEL__
5#define HZ CONFIG_HZ /* Internal kernel timer frequency */
6#define USER_HZ 100 /* .. some user interfaces are in "ticks" */
7#define CLOCKS_PER_SEC (USER_HZ) /* like times() */
8#endif
9
10#ifndef HZ
11#define HZ 100
12#endif
13
14#define EXEC_PAGESIZE 16384
15
16#ifndef NOGROUP
17#define NOGROUP (-1)
18#endif
19
20#define MAXHOSTNAMELEN 64 /* max length of hostname */
21
22#endif /* _ASM_PARAM_H */
diff --git a/arch/frv/include/asm/pci.h b/arch/frv/include/asm/pci.h
new file mode 100644
index 000000000000..585d9b49949a
--- /dev/null
+++ b/arch/frv/include/asm/pci.h
@@ -0,0 +1,118 @@
1/* pci.h: FR-V specific PCI declarations
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * - Derived from include/asm-m68k/pci.h
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13#ifndef ASM_PCI_H
14#define ASM_PCI_H
15
16#include <linux/mm.h>
17#include <asm/scatterlist.h>
18#include <asm-generic/pci-dma-compat.h>
19#include <asm-generic/pci.h>
20
21struct pci_dev;
22
23#define pcibios_assign_all_busses() 0
24
25extern void pcibios_set_master(struct pci_dev *dev);
26
27extern void pcibios_penalize_isa_irq(int irq);
28
29#ifdef CONFIG_MMU
30extern void *consistent_alloc(gfp_t gfp, size_t size, dma_addr_t *dma_handle);
31extern void consistent_free(void *vaddr);
32extern void consistent_sync(void *vaddr, size_t size, int direction);
33extern void consistent_sync_page(struct page *page, unsigned long offset,
34 size_t size, int direction);
35#endif
36
37extern void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
38 dma_addr_t *dma_handle);
39
40extern void pci_free_consistent(struct pci_dev *hwdev, size_t size,
41 void *vaddr, dma_addr_t dma_handle);
42
43/* Return the index of the PCI controller for device PDEV. */
44#define pci_controller_num(PDEV) (0)
45
46/* The PCI address space does equal the physical memory
47 * address space. The networking and block device layers use
48 * this boolean for bounce buffer decisions.
49 */
50#define PCI_DMA_BUS_IS_PHYS (1)
51
52/* pci_unmap_{page,single} is a nop so... */
53#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
54#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
55#define pci_unmap_addr(PTR, ADDR_NAME) (0)
56#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
57#define pci_unmap_len(PTR, LEN_NAME) (0)
58#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
59
60#ifdef CONFIG_PCI
61static inline void pci_dma_burst_advice(struct pci_dev *pdev,
62 enum pci_dma_burst_strategy *strat,
63 unsigned long *strategy_parameter)
64{
65 *strat = PCI_DMA_BURST_INFINITY;
66 *strategy_parameter = ~0UL;
67}
68#endif
69
70/*
71 * These are pretty much arbitary with the CoMEM implementation.
72 * We have the whole address space to ourselves.
73 */
74#define PCIBIOS_MIN_IO 0x100
75#define PCIBIOS_MIN_MEM 0x00010000
76
77/* Make physical memory consistent for a single
78 * streaming mode DMA translation after a transfer.
79 *
80 * If you perform a pci_map_single() but wish to interrogate the
81 * buffer using the cpu, yet do not wish to teardown the PCI dma
82 * mapping, you must call this function before doing so. At the
83 * next point you give the PCI dma address back to the card, the
84 * device again owns the buffer.
85 */
86static inline void pci_dma_sync_single(struct pci_dev *hwdev,
87 dma_addr_t dma_handle,
88 size_t size, int direction)
89{
90 if (direction == PCI_DMA_NONE)
91 BUG();
92
93 frv_cache_wback_inv((unsigned long)bus_to_virt(dma_handle),
94 (unsigned long)bus_to_virt(dma_handle) + size);
95}
96
97/* Make physical memory consistent for a set of streaming
98 * mode DMA translations after a transfer.
99 *
100 * The same as pci_dma_sync_single but for a scatter-gather list,
101 * same rules and usage.
102 */
103static inline void pci_dma_sync_sg(struct pci_dev *hwdev,
104 struct scatterlist *sg,
105 int nelems, int direction)
106{
107 int i;
108
109 if (direction == PCI_DMA_NONE)
110 BUG();
111
112 for (i = 0; i < nelems; i++)
113 frv_cache_wback_inv(sg_dma_address(&sg[i]),
114 sg_dma_address(&sg[i])+sg_dma_len(&sg[i]));
115}
116
117
118#endif
diff --git a/arch/frv/include/asm/percpu.h b/arch/frv/include/asm/percpu.h
new file mode 100644
index 000000000000..2cad3f874ded
--- /dev/null
+++ b/arch/frv/include/asm/percpu.h
@@ -0,0 +1,6 @@
1#ifndef __ASM_PERCPU_H
2#define __ASM_PERCPU_H
3
4#include <asm-generic/percpu.h>
5
6#endif /* __ASM_PERCPU_H */
diff --git a/arch/frv/include/asm/pgalloc.h b/arch/frv/include/asm/pgalloc.h
new file mode 100644
index 000000000000..971e6addb009
--- /dev/null
+++ b/arch/frv/include/asm/pgalloc.h
@@ -0,0 +1,69 @@
1/* pgalloc.h: Page allocation routines for FRV
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 *
11 * Derived from:
12 * include/asm-m68knommu/pgalloc.h
13 * include/asm-i386/pgalloc.h
14 */
15#ifndef _ASM_PGALLOC_H
16#define _ASM_PGALLOC_H
17
18#include <asm/setup.h>
19#include <asm/virtconvert.h>
20
21#ifdef CONFIG_MMU
22
23#define pmd_populate_kernel(mm, pmd, pte) __set_pmd(pmd, __pa(pte) | _PAGE_TABLE)
24#define pmd_populate(MM, PMD, PAGE) \
25do { \
26 __set_pmd((PMD), page_to_pfn(PAGE) << PAGE_SHIFT | _PAGE_TABLE); \
27} while(0)
28#define pmd_pgtable(pmd) pmd_page(pmd)
29
30/*
31 * Allocate and free page tables.
32 */
33
34extern pgd_t *pgd_alloc(struct mm_struct *);
35extern void pgd_free(struct mm_struct *mm, pgd_t *);
36
37extern pte_t *pte_alloc_one_kernel(struct mm_struct *, unsigned long);
38
39extern pgtable_t pte_alloc_one(struct mm_struct *, unsigned long);
40
41static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
42{
43 free_page((unsigned long)pte);
44}
45
46static inline void pte_free(struct mm_struct *mm, pgtable_t pte)
47{
48 pgtable_page_dtor(pte);
49 __free_page(pte);
50}
51
52#define __pte_free_tlb(tlb,pte) \
53do { \
54 pgtable_page_dtor(pte); \
55 tlb_remove_page((tlb),(pte)); \
56} while (0)
57
58/*
59 * allocating and freeing a pmd is trivial: the 1-entry pmd is
60 * inside the pgd, so has no extra memory associated with it.
61 * (In the PAE case we free the pmds as part of the pgd.)
62 */
63#define pmd_alloc_one(mm, addr) ({ BUG(); ((pmd_t *) 2); })
64#define pmd_free(mm, x) do { } while (0)
65#define __pmd_free_tlb(tlb,x) do { } while (0)
66
67#endif /* CONFIG_MMU */
68
69#endif /* _ASM_PGALLOC_H */
diff --git a/arch/frv/include/asm/pgtable.h b/arch/frv/include/asm/pgtable.h
new file mode 100644
index 000000000000..33233011b1c1
--- /dev/null
+++ b/arch/frv/include/asm/pgtable.h
@@ -0,0 +1,549 @@
1/* pgtable.h: FR-V page table mangling
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 *
11 * Derived from:
12 * include/asm-m68knommu/pgtable.h
13 * include/asm-i386/pgtable.h
14 */
15
16#ifndef _ASM_PGTABLE_H
17#define _ASM_PGTABLE_H
18
19#include <asm/mem-layout.h>
20#include <asm/setup.h>
21#include <asm/processor.h>
22
23#ifndef __ASSEMBLY__
24#include <linux/threads.h>
25#include <linux/slab.h>
26#include <linux/list.h>
27#include <linux/spinlock.h>
28#include <linux/sched.h>
29struct vm_area_struct;
30#endif
31
32#ifndef __ASSEMBLY__
33#if defined(CONFIG_HIGHPTE)
34typedef unsigned long pte_addr_t;
35#else
36typedef pte_t *pte_addr_t;
37#endif
38#endif
39
40/*****************************************************************************/
41/*
42 * MMU-less operation case first
43 */
44#ifndef CONFIG_MMU
45
46#define pgd_present(pgd) (1) /* pages are always present on NO_MM */
47#define pgd_none(pgd) (0)
48#define pgd_bad(pgd) (0)
49#define pgd_clear(pgdp)
50#define kern_addr_valid(addr) (1)
51#define pmd_offset(a, b) ((void *) 0)
52
53#define PAGE_NONE __pgprot(0) /* these mean nothing to NO_MM */
54#define PAGE_SHARED __pgprot(0) /* these mean nothing to NO_MM */
55#define PAGE_COPY __pgprot(0) /* these mean nothing to NO_MM */
56#define PAGE_READONLY __pgprot(0) /* these mean nothing to NO_MM */
57#define PAGE_KERNEL __pgprot(0) /* these mean nothing to NO_MM */
58
59#define __swp_type(x) (0)
60#define __swp_offset(x) (0)
61#define __swp_entry(typ,off) ((swp_entry_t) { ((typ) | ((off) << 7)) })
62#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
63#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
64
65#ifndef __ASSEMBLY__
66static inline int pte_file(pte_t pte) { return 0; }
67#endif
68
69#define ZERO_PAGE(vaddr) ({ BUG(); NULL; })
70
71#define swapper_pg_dir ((pgd_t *) NULL)
72
73#define pgtable_cache_init() do {} while (0)
74
75#include <asm-generic/pgtable.h>
76
77#else /* !CONFIG_MMU */
78/*****************************************************************************/
79/*
80 * then MMU operation
81 */
82
83/*
84 * ZERO_PAGE is a global shared page that is always zero: used
85 * for zero-mapped memory areas etc..
86 */
87#ifndef __ASSEMBLY__
88extern unsigned long empty_zero_page;
89#define ZERO_PAGE(vaddr) virt_to_page(empty_zero_page)
90#endif
91
92/*
93 * we use 2-level page tables, folding the PMD (mid-level table) into the PGE (top-level entry)
94 * [see Documentation/frv/mmu-layout.txt]
95 *
96 * Page Directory:
97 * - Size: 16KB
98 * - 64 PGEs per PGD
99 * - Each PGE holds 1 PUD and covers 64MB
100 *
101 * Page Upper Directory:
102 * - Size: 256B
103 * - 1 PUE per PUD
104 * - Each PUE holds 1 PMD and covers 64MB
105 *
106 * Page Mid-Level Directory
107 * - Size: 256B
108 * - 1 PME per PMD
109 * - Each PME holds 64 STEs, all of which point to separate chunks of the same Page Table
110 * - All STEs are instantiated at the same time
111 *
112 * Page Table
113 * - Size: 16KB
114 * - 4096 PTEs per PT
115 * - Each Linux PT is subdivided into 64 FR451 PT's, each of which holds 64 entries
116 *
117 * Pages
118 * - Size: 4KB
119 *
120 * total PTEs
121 * = 1 PML4E * 64 PGEs * 1 PUEs * 1 PMEs * 4096 PTEs
122 * = 1 PML4E * 64 PGEs * 64 STEs * 64 PTEs/FR451-PT
123 * = 262144 (or 256 * 1024)
124 */
125#define PGDIR_SHIFT 26
126#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
127#define PGDIR_MASK (~(PGDIR_SIZE - 1))
128#define PTRS_PER_PGD 64
129
130#define PUD_SHIFT 26
131#define PTRS_PER_PUD 1
132#define PUD_SIZE (1UL << PUD_SHIFT)
133#define PUD_MASK (~(PUD_SIZE - 1))
134#define PUE_SIZE 256
135
136#define PMD_SHIFT 26
137#define PMD_SIZE (1UL << PMD_SHIFT)
138#define PMD_MASK (~(PMD_SIZE - 1))
139#define PTRS_PER_PMD 1
140#define PME_SIZE 256
141
142#define __frv_PT_SIZE 256
143
144#define PTRS_PER_PTE 4096
145
146#define USER_PGDS_IN_LAST_PML4 (TASK_SIZE / PGDIR_SIZE)
147#define FIRST_USER_ADDRESS 0
148
149#define USER_PGD_PTRS (PAGE_OFFSET >> PGDIR_SHIFT)
150#define KERNEL_PGD_PTRS (PTRS_PER_PGD - USER_PGD_PTRS)
151
152#define TWOLEVEL_PGDIR_SHIFT 26
153#define BOOT_USER_PGD_PTRS (__PAGE_OFFSET >> TWOLEVEL_PGDIR_SHIFT)
154#define BOOT_KERNEL_PGD_PTRS (PTRS_PER_PGD - BOOT_USER_PGD_PTRS)
155
156#ifndef __ASSEMBLY__
157
158extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
159
160#define pte_ERROR(e) \
161 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, (e).pte)
162#define pmd_ERROR(e) \
163 printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
164#define pud_ERROR(e) \
165 printk("%s:%d: bad pud %08lx.\n", __FILE__, __LINE__, pmd_val(pud_val(e)))
166#define pgd_ERROR(e) \
167 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pmd_val(pud_val(pgd_val(e))))
168
169/*
170 * Certain architectures need to do special things when PTEs
171 * within a page table are directly modified. Thus, the following
172 * hook is made available.
173 */
174#define set_pte(pteptr, pteval) \
175do { \
176 *(pteptr) = (pteval); \
177 asm volatile("dcf %M0" :: "U"(*pteptr)); \
178} while(0)
179#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
180
181/*
182 * pgd_offset() returns a (pgd_t *)
183 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
184 */
185#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
186
187/*
188 * a shortcut which implies the use of the kernel's pgd, instead
189 * of a process's
190 */
191#define pgd_offset_k(address) pgd_offset(&init_mm, address)
192
193/*
194 * The "pgd_xxx()" functions here are trivial for a folded two-level
195 * setup: the pud is never bad, and a pud always exists (as it's folded
196 * into the pgd entry)
197 */
198static inline int pgd_none(pgd_t pgd) { return 0; }
199static inline int pgd_bad(pgd_t pgd) { return 0; }
200static inline int pgd_present(pgd_t pgd) { return 1; }
201static inline void pgd_clear(pgd_t *pgd) { }
202
203#define pgd_populate(mm, pgd, pud) do { } while (0)
204/*
205 * (puds are folded into pgds so this doesn't get actually called,
206 * but the define is needed for a generic inline function.)
207 */
208#define set_pgd(pgdptr, pgdval) \
209do { \
210 memcpy((pgdptr), &(pgdval), sizeof(pgd_t)); \
211 asm volatile("dcf %M0" :: "U"(*(pgdptr))); \
212} while(0)
213
214static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
215{
216 return (pud_t *) pgd;
217}
218
219#define pgd_page(pgd) (pud_page((pud_t){ pgd }))
220#define pgd_page_vaddr(pgd) (pud_page_vaddr((pud_t){ pgd }))
221
222/*
223 * allocating and freeing a pud is trivial: the 1-entry pud is
224 * inside the pgd, so has no extra memory associated with it.
225 */
226#define pud_alloc_one(mm, address) NULL
227#define pud_free(mm, x) do { } while (0)
228#define __pud_free_tlb(tlb, x) do { } while (0)
229
230/*
231 * The "pud_xxx()" functions here are trivial for a folded two-level
232 * setup: the pmd is never bad, and a pmd always exists (as it's folded
233 * into the pud entry)
234 */
235static inline int pud_none(pud_t pud) { return 0; }
236static inline int pud_bad(pud_t pud) { return 0; }
237static inline int pud_present(pud_t pud) { return 1; }
238static inline void pud_clear(pud_t *pud) { }
239
240#define pud_populate(mm, pmd, pte) do { } while (0)
241
242/*
243 * (pmds are folded into puds so this doesn't get actually called,
244 * but the define is needed for a generic inline function.)
245 */
246#define set_pud(pudptr, pudval) set_pmd((pmd_t *)(pudptr), (pmd_t) { pudval })
247
248#define pud_page(pud) (pmd_page((pmd_t){ pud }))
249#define pud_page_vaddr(pud) (pmd_page_vaddr((pmd_t){ pud }))
250
251/*
252 * (pmds are folded into pgds so this doesn't get actually called,
253 * but the define is needed for a generic inline function.)
254 */
255extern void __set_pmd(pmd_t *pmdptr, unsigned long __pmd);
256
257#define set_pmd(pmdptr, pmdval) \
258do { \
259 __set_pmd((pmdptr), (pmdval).ste[0]); \
260} while(0)
261
262#define __pmd_index(address) 0
263
264static inline pmd_t *pmd_offset(pud_t *dir, unsigned long address)
265{
266 return (pmd_t *) dir + __pmd_index(address);
267}
268
269#define pte_same(a, b) ((a).pte == (b).pte)
270#define pte_page(x) (mem_map + ((unsigned long)(((x).pte >> PAGE_SHIFT))))
271#define pte_none(x) (!(x).pte)
272#define pte_pfn(x) ((unsigned long)(((x).pte >> PAGE_SHIFT)))
273#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
274#define pfn_pmd(pfn, prot) __pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
275
276#define VMALLOC_VMADDR(x) ((unsigned long) (x))
277
278#endif /* !__ASSEMBLY__ */
279
280/*
281 * control flags in AMPR registers and TLB entries
282 */
283#define _PAGE_BIT_PRESENT xAMPRx_V_BIT
284#define _PAGE_BIT_WP DAMPRx_WP_BIT
285#define _PAGE_BIT_NOCACHE xAMPRx_C_BIT
286#define _PAGE_BIT_SUPER xAMPRx_S_BIT
287#define _PAGE_BIT_ACCESSED xAMPRx_RESERVED8_BIT
288#define _PAGE_BIT_DIRTY xAMPRx_M_BIT
289#define _PAGE_BIT_NOTGLOBAL xAMPRx_NG_BIT
290
291#define _PAGE_PRESENT xAMPRx_V
292#define _PAGE_WP DAMPRx_WP
293#define _PAGE_NOCACHE xAMPRx_C
294#define _PAGE_SUPER xAMPRx_S
295#define _PAGE_ACCESSED xAMPRx_RESERVED8 /* accessed if set */
296#define _PAGE_DIRTY xAMPRx_M
297#define _PAGE_NOTGLOBAL xAMPRx_NG
298
299#define _PAGE_RESERVED_MASK (xAMPRx_RESERVED8 | xAMPRx_RESERVED13)
300
301#define _PAGE_FILE 0x002 /* set:pagecache unset:swap */
302#define _PAGE_PROTNONE 0x000 /* If not present */
303
304#define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
305
306#define __PGPROT_BASE \
307 (_PAGE_PRESENT | xAMPRx_SS_16Kb | xAMPRx_D | _PAGE_NOTGLOBAL | _PAGE_ACCESSED)
308
309#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
310#define PAGE_SHARED __pgprot(__PGPROT_BASE)
311#define PAGE_COPY __pgprot(__PGPROT_BASE | _PAGE_WP)
312#define PAGE_READONLY __pgprot(__PGPROT_BASE | _PAGE_WP)
313
314#define __PAGE_KERNEL (__PGPROT_BASE | _PAGE_SUPER | _PAGE_DIRTY)
315#define __PAGE_KERNEL_NOCACHE (__PGPROT_BASE | _PAGE_SUPER | _PAGE_DIRTY | _PAGE_NOCACHE)
316#define __PAGE_KERNEL_RO (__PGPROT_BASE | _PAGE_SUPER | _PAGE_DIRTY | _PAGE_WP)
317
318#define MAKE_GLOBAL(x) __pgprot((x) & ~_PAGE_NOTGLOBAL)
319
320#define PAGE_KERNEL MAKE_GLOBAL(__PAGE_KERNEL)
321#define PAGE_KERNEL_RO MAKE_GLOBAL(__PAGE_KERNEL_RO)
322#define PAGE_KERNEL_NOCACHE MAKE_GLOBAL(__PAGE_KERNEL_NOCACHE)
323
324#define _PAGE_TABLE (_PAGE_PRESENT | xAMPRx_SS_16Kb)
325
326#ifndef __ASSEMBLY__
327
328/*
329 * The FR451 can do execute protection by virtue of having separate TLB miss handlers for
330 * instruction access and for data access. However, we don't have enough reserved bits to say
331 * "execute only", so we don't bother. If you can read it, you can execute it and vice versa.
332 */
333#define __P000 PAGE_NONE
334#define __P001 PAGE_READONLY
335#define __P010 PAGE_COPY
336#define __P011 PAGE_COPY
337#define __P100 PAGE_READONLY
338#define __P101 PAGE_READONLY
339#define __P110 PAGE_COPY
340#define __P111 PAGE_COPY
341
342#define __S000 PAGE_NONE
343#define __S001 PAGE_READONLY
344#define __S010 PAGE_SHARED
345#define __S011 PAGE_SHARED
346#define __S100 PAGE_READONLY
347#define __S101 PAGE_READONLY
348#define __S110 PAGE_SHARED
349#define __S111 PAGE_SHARED
350
351/*
352 * Define this to warn about kernel memory accesses that are
353 * done without a 'access_ok(VERIFY_WRITE,..)'
354 */
355#undef TEST_ACCESS_OK
356
357#define pte_present(x) (pte_val(x) & _PAGE_PRESENT)
358#define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)
359
360#define pmd_none(x) (!pmd_val(x))
361#define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT)
362#define pmd_bad(x) (pmd_val(x) & xAMPRx_SS)
363#define pmd_clear(xp) do { __set_pmd(xp, 0); } while(0)
364
365#define pmd_page_vaddr(pmd) \
366 ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
367
368#ifndef CONFIG_DISCONTIGMEM
369#define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
370#endif
371
372#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
373
374/*
375 * The following only work if pte_present() is true.
376 * Undefined behaviour if not..
377 */
378static inline int pte_dirty(pte_t pte) { return (pte).pte & _PAGE_DIRTY; }
379static inline int pte_young(pte_t pte) { return (pte).pte & _PAGE_ACCESSED; }
380static inline int pte_write(pte_t pte) { return !((pte).pte & _PAGE_WP); }
381static inline int pte_special(pte_t pte) { return 0; }
382
383static inline pte_t pte_mkclean(pte_t pte) { (pte).pte &= ~_PAGE_DIRTY; return pte; }
384static inline pte_t pte_mkold(pte_t pte) { (pte).pte &= ~_PAGE_ACCESSED; return pte; }
385static inline pte_t pte_wrprotect(pte_t pte) { (pte).pte |= _PAGE_WP; return pte; }
386static inline pte_t pte_mkdirty(pte_t pte) { (pte).pte |= _PAGE_DIRTY; return pte; }
387static inline pte_t pte_mkyoung(pte_t pte) { (pte).pte |= _PAGE_ACCESSED; return pte; }
388static inline pte_t pte_mkwrite(pte_t pte) { (pte).pte &= ~_PAGE_WP; return pte; }
389static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
390
391static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
392{
393 int i = test_and_clear_bit(_PAGE_BIT_ACCESSED, ptep);
394 asm volatile("dcf %M0" :: "U"(*ptep));
395 return i;
396}
397
398static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
399{
400 unsigned long x = xchg(&ptep->pte, 0);
401 asm volatile("dcf %M0" :: "U"(*ptep));
402 return __pte(x);
403}
404
405static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
406{
407 set_bit(_PAGE_BIT_WP, ptep);
408 asm volatile("dcf %M0" :: "U"(*ptep));
409}
410
411/*
412 * Macro to mark a page protection value as "uncacheable"
413 */
414#define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | _PAGE_NOCACHE))
415
416/*
417 * Conversion functions: convert a page and protection to a page entry,
418 * and a page entry and page directory to the page they refer to.
419 */
420
421#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
422#define mk_pte_huge(entry) ((entry).pte_low |= _PAGE_PRESENT | _PAGE_PSE)
423
424/* This takes a physical page address that is used by the remapping functions */
425#define mk_pte_phys(physpage, pgprot) pfn_pte((physpage) >> PAGE_SHIFT, pgprot)
426
427static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
428{
429 pte.pte &= _PAGE_CHG_MASK;
430 pte.pte |= pgprot_val(newprot);
431 return pte;
432}
433
434/* to find an entry in a page-table-directory. */
435#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
436#define pgd_index_k(addr) pgd_index(addr)
437
438/* Find an entry in the bottom-level page table.. */
439#define __pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
440
441/*
442 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
443 *
444 * this macro returns the index of the entry in the pte page which would
445 * control the given virtual address
446 */
447#define pte_index(address) \
448 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
449#define pte_offset_kernel(dir, address) \
450 ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address))
451
452#if defined(CONFIG_HIGHPTE)
453#define pte_offset_map(dir, address) \
454 ((pte_t *)kmap_atomic(pmd_page(*(dir)),KM_PTE0) + pte_index(address))
455#define pte_offset_map_nested(dir, address) \
456 ((pte_t *)kmap_atomic(pmd_page(*(dir)),KM_PTE1) + pte_index(address))
457#define pte_unmap(pte) kunmap_atomic(pte, KM_PTE0)
458#define pte_unmap_nested(pte) kunmap_atomic((pte), KM_PTE1)
459#else
460#define pte_offset_map(dir, address) \
461 ((pte_t *)page_address(pmd_page(*(dir))) + pte_index(address))
462#define pte_offset_map_nested(dir, address) pte_offset_map((dir), (address))
463#define pte_unmap(pte) do { } while (0)
464#define pte_unmap_nested(pte) do { } while (0)
465#endif
466
467/*
468 * Handle swap and file entries
469 * - the PTE is encoded in the following format:
470 * bit 0: Must be 0 (!_PAGE_PRESENT)
471 * bit 1: Type: 0 for swap, 1 for file (_PAGE_FILE)
472 * bits 2-7: Swap type
473 * bits 8-31: Swap offset
474 * bits 2-31: File pgoff
475 */
476#define __swp_type(x) (((x).val >> 2) & 0x1f)
477#define __swp_offset(x) ((x).val >> 8)
478#define __swp_entry(type, offset) ((swp_entry_t) { ((type) << 2) | ((offset) << 8) })
479#define __pte_to_swp_entry(_pte) ((swp_entry_t) { (_pte).pte })
480#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
481
482static inline int pte_file(pte_t pte)
483{
484 return pte.pte & _PAGE_FILE;
485}
486
487#define PTE_FILE_MAX_BITS 29
488
489#define pte_to_pgoff(PTE) ((PTE).pte >> 2)
490#define pgoff_to_pte(off) __pte((off) << 2 | _PAGE_FILE)
491
492/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
493#define PageSkip(page) (0)
494#define kern_addr_valid(addr) (1)
495
496#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
497 remap_pfn_range(vma, vaddr, pfn, size, prot)
498
499#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
500#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
501#define __HAVE_ARCH_PTEP_SET_WRPROTECT
502#define __HAVE_ARCH_PTE_SAME
503#include <asm-generic/pgtable.h>
504
505/*
506 * preload information about a newly instantiated PTE into the SCR0/SCR1 PGE cache
507 */
508static inline void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t pte)
509{
510 struct mm_struct *mm;
511 unsigned long ampr;
512
513 mm = current->mm;
514 if (mm) {
515 pgd_t *pge = pgd_offset(mm, address);
516 pud_t *pue = pud_offset(pge, address);
517 pmd_t *pme = pmd_offset(pue, address);
518
519 ampr = pme->ste[0] & 0xffffff00;
520 ampr |= xAMPRx_L | xAMPRx_SS_16Kb | xAMPRx_S | xAMPRx_C |
521 xAMPRx_V;
522 } else {
523 address = ULONG_MAX;
524 ampr = 0;
525 }
526
527 asm volatile("movgs %0,scr0\n"
528 "movgs %0,scr1\n"
529 "movgs %1,dampr4\n"
530 "movgs %1,dampr5\n"
531 :
532 : "r"(address), "r"(ampr)
533 );
534}
535
536#ifdef CONFIG_PROC_FS
537extern char *proc_pid_status_frv_cxnr(struct mm_struct *mm, char *buffer);
538#endif
539
540extern void __init pgtable_cache_init(void);
541
542#endif /* !__ASSEMBLY__ */
543#endif /* !CONFIG_MMU */
544
545#ifndef __ASSEMBLY__
546extern void __init paging_init(void);
547#endif /* !__ASSEMBLY__ */
548
549#endif /* _ASM_PGTABLE_H */
diff --git a/arch/frv/include/asm/poll.h b/arch/frv/include/asm/poll.h
new file mode 100644
index 000000000000..0d01479ccc56
--- /dev/null
+++ b/arch/frv/include/asm/poll.h
@@ -0,0 +1,12 @@
1#ifndef _ASM_POLL_H
2#define _ASM_POLL_H
3
4#define POLLWRNORM POLLOUT
5#define POLLWRBAND 256
6
7#include <asm-generic/poll.h>
8
9#undef POLLREMOVE
10
11#endif
12
diff --git a/arch/frv/include/asm/posix_types.h b/arch/frv/include/asm/posix_types.h
new file mode 100644
index 000000000000..a9f1f5be0632
--- /dev/null
+++ b/arch/frv/include/asm/posix_types.h
@@ -0,0 +1,62 @@
1#ifndef _ASM_POSIX_TYPES_H
2#define _ASM_POSIX_TYPES_H
3
4/*
5 * This file is generally used by user-level software, so you need to
6 * be a little careful about namespace pollution etc. Also, we cannot
7 * assume GCC is being used.
8 */
9
10typedef unsigned long __kernel_ino_t;
11typedef unsigned short __kernel_mode_t;
12typedef unsigned short __kernel_nlink_t;
13typedef long __kernel_off_t;
14typedef int __kernel_pid_t;
15typedef unsigned short __kernel_ipc_pid_t;
16typedef unsigned short __kernel_uid_t;
17typedef unsigned short __kernel_gid_t;
18typedef unsigned int __kernel_size_t;
19typedef int __kernel_ssize_t;
20typedef int __kernel_ptrdiff_t;
21typedef long __kernel_time_t;
22typedef long __kernel_suseconds_t;
23typedef long __kernel_clock_t;
24typedef int __kernel_timer_t;
25typedef int __kernel_clockid_t;
26typedef int __kernel_daddr_t;
27typedef char * __kernel_caddr_t;
28typedef unsigned short __kernel_uid16_t;
29typedef unsigned short __kernel_gid16_t;
30typedef unsigned int __kernel_uid32_t;
31typedef unsigned int __kernel_gid32_t;
32
33typedef unsigned short __kernel_old_uid_t;
34typedef unsigned short __kernel_old_gid_t;
35typedef unsigned short __kernel_old_dev_t;
36
37#ifdef __GNUC__
38typedef long long __kernel_loff_t;
39#endif
40
41typedef struct {
42 int val[2];
43} __kernel_fsid_t;
44
45#if defined(__KERNEL__)
46
47#undef __FD_SET
48#define __FD_SET(d, set) ((set)->fds_bits[__FDELT(d)] |= __FDMASK(d))
49
50#undef __FD_CLR
51#define __FD_CLR(d, set) ((set)->fds_bits[__FDELT(d)] &= ~__FDMASK(d))
52
53#undef __FD_ISSET
54#define __FD_ISSET(d, set) (!!((set)->fds_bits[__FDELT(d)] & __FDMASK(d)))
55
56#undef __FD_ZERO
57#define __FD_ZERO(fdsetp) (memset (fdsetp, 0, sizeof(*(fd_set *)fdsetp)))
58
59#endif /* defined(__KERNEL__) */
60
61#endif
62
diff --git a/arch/frv/include/asm/processor.h b/arch/frv/include/asm/processor.h
new file mode 100644
index 000000000000..3744f2e47f48
--- /dev/null
+++ b/arch/frv/include/asm/processor.h
@@ -0,0 +1,153 @@
1/* processor.h: FRV processor definitions
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_PROCESSOR_H
13#define _ASM_PROCESSOR_H
14
15#include <asm/mem-layout.h>
16
17#ifndef __ASSEMBLY__
18/*
19 * Default implementation of macro that returns current
20 * instruction pointer ("program counter").
21 */
22#define current_text_addr() ({ __label__ _l; _l: &&_l;})
23
24#include <linux/compiler.h>
25#include <linux/linkage.h>
26#include <asm/sections.h>
27#include <asm/segment.h>
28#include <asm/fpu.h>
29#include <asm/registers.h>
30#include <asm/ptrace.h>
31#include <asm/current.h>
32#include <asm/cache.h>
33
34/* Forward declaration, a strange C thing */
35struct task_struct;
36
37/*
38 * CPU type and hardware bug flags. Kept separately for each CPU.
39 */
40struct cpuinfo_frv {
41#ifdef CONFIG_MMU
42 unsigned long *pgd_quick;
43 unsigned long *pte_quick;
44 unsigned long pgtable_cache_sz;
45#endif
46} __cacheline_aligned;
47
48extern struct cpuinfo_frv __nongprelbss boot_cpu_data;
49
50#define cpu_data (&boot_cpu_data)
51#define current_cpu_data boot_cpu_data
52
53/*
54 * Bus types
55 */
56#define EISA_bus 0
57#define MCA_bus 0
58
59struct thread_struct {
60 struct pt_regs *frame; /* [GR28] exception frame ptr for this thread */
61 struct task_struct *curr; /* [GR29] current pointer for this thread */
62 unsigned long sp; /* [GR1 ] kernel stack pointer */
63 unsigned long fp; /* [GR2 ] kernel frame pointer */
64 unsigned long lr; /* link register */
65 unsigned long pc; /* program counter */
66 unsigned long gr[12]; /* [GR16-GR27] */
67 unsigned long sched_lr; /* LR from schedule() */
68
69 union {
70 struct pt_regs *frame0; /* top (user) stack frame */
71 struct user_context *user; /* userspace context */
72 };
73} __attribute__((aligned(8)));
74
75extern struct pt_regs *__kernel_frame0_ptr;
76extern struct task_struct *__kernel_current_task;
77
78#endif
79
80#ifndef __ASSEMBLY__
81#define INIT_THREAD_FRAME0 \
82 ((struct pt_regs *) \
83 (sizeof(init_stack) + (unsigned long) init_stack - sizeof(struct user_context)))
84
85#define INIT_THREAD { \
86 NULL, \
87 (struct task_struct *) init_stack, \
88 0, 0, 0, 0, \
89 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, \
90 0, \
91 { INIT_THREAD_FRAME0 }, \
92}
93
94/*
95 * do necessary setup to start up a newly executed thread.
96 * - need to discard the frame stacked by init() invoking the execve syscall
97 */
98#define start_thread(_regs, _pc, _usp) \
99do { \
100 set_fs(USER_DS); /* reads from user space */ \
101 __frame = __kernel_frame0_ptr; \
102 __frame->pc = (_pc); \
103 __frame->psr &= ~PSR_S; \
104 __frame->sp = (_usp); \
105} while(0)
106
107extern void prepare_to_copy(struct task_struct *tsk);
108
109/* Free all resources held by a thread. */
110static inline void release_thread(struct task_struct *dead_task)
111{
112}
113
114extern asmlinkage int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
115extern asmlinkage void save_user_regs(struct user_context *target);
116extern asmlinkage void *restore_user_regs(const struct user_context *target, ...);
117
118#define copy_segments(tsk, mm) do { } while (0)
119#define release_segments(mm) do { } while (0)
120#define forget_segments() do { } while (0)
121
122/*
123 * Free current thread data structures etc..
124 */
125static inline void exit_thread(void)
126{
127}
128
129/*
130 * Return saved PC of a blocked thread.
131 */
132extern unsigned long thread_saved_pc(struct task_struct *tsk);
133
134unsigned long get_wchan(struct task_struct *p);
135
136#define KSTK_EIP(tsk) ((tsk)->thread.frame0->pc)
137#define KSTK_ESP(tsk) ((tsk)->thread.frame0->sp)
138
139/* Allocation and freeing of basic task resources. */
140extern struct task_struct *alloc_task_struct(void);
141extern void free_task_struct(struct task_struct *p);
142
143#define cpu_relax() barrier()
144
145/* data cache prefetch */
146#define ARCH_HAS_PREFETCH
147static inline void prefetch(const void *x)
148{
149 asm volatile("dcpl %0,gr0,#0" : : "r"(x));
150}
151
152#endif /* __ASSEMBLY__ */
153#endif /* _ASM_PROCESSOR_H */
diff --git a/arch/frv/include/asm/ptrace.h b/arch/frv/include/asm/ptrace.h
new file mode 100644
index 000000000000..cf6934012b64
--- /dev/null
+++ b/arch/frv/include/asm/ptrace.h
@@ -0,0 +1,83 @@
1/* ptrace.h: ptrace() relevant definitions
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11#ifndef _ASM_PTRACE_H
12#define _ASM_PTRACE_H
13
14#include <asm/registers.h>
15#ifdef __KERNEL__
16#include <asm/irq_regs.h>
17
18#define in_syscall(regs) (((regs)->tbr & TBR_TT) == TBR_TT_TRAP0)
19#endif
20
21
22#define PT_PSR 0
23#define PT_ISR 1
24#define PT_CCR 2
25#define PT_CCCR 3
26#define PT_LR 4
27#define PT_LCR 5
28#define PT_PC 6
29
30#define PT__STATUS 7 /* exception status */
31#define PT_SYSCALLNO 8 /* syscall number or -1 */
32#define PT_ORIG_GR8 9 /* saved GR8 for signal handling */
33#define PT_GNER0 10
34#define PT_GNER1 11
35#define PT_IACC0H 12
36#define PT_IACC0L 13
37
38#define PT_GR(j) ( 14 + (j)) /* GRj for 0<=j<=63 */
39#define PT_FR(j) ( 78 + (j)) /* FRj for 0<=j<=63 */
40#define PT_FNER(j) (142 + (j)) /* FNERj for 0<=j<=1 */
41#define PT_MSR(j) (144 + (j)) /* MSRj for 0<=j<=2 */
42#define PT_ACC(j) (146 + (j)) /* ACCj for 0<=j<=7 */
43#define PT_ACCG(jklm) (154 + (jklm)) /* ACCGjklm for 0<=jklm<=1 (reads four regs per slot) */
44#define PT_FSR(j) (156 + (j)) /* FSRj for 0<=j<=0 */
45#define PT__GPEND 78
46#define PT__END 157
47
48#define PT_TBR PT_GR(0)
49#define PT_SP PT_GR(1)
50#define PT_FP PT_GR(2)
51#define PT_PREV_FRAME PT_GR(28) /* previous exception frame pointer (old gr28 value) */
52#define PT_CURR_TASK PT_GR(29) /* current task */
53
54
55/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
56#define PTRACE_GETREGS 12
57#define PTRACE_SETREGS 13
58#define PTRACE_GETFPREGS 14
59#define PTRACE_SETFPREGS 15
60#define PTRACE_GETFDPIC 31 /* get the ELF fdpic loadmap address */
61
62#define PTRACE_GETFDPIC_EXEC 0 /* [addr] request the executable loadmap */
63#define PTRACE_GETFDPIC_INTERP 1 /* [addr] request the interpreter loadmap */
64
65#ifdef __KERNEL__
66#ifndef __ASSEMBLY__
67
68/*
69 * we dedicate GR28 to keeping a pointer to the current exception frame
70 * - gr28 is destroyed on entry to the kernel from userspace
71 */
72register struct pt_regs *__frame asm("gr28");
73
74#define user_mode(regs) (!((regs)->psr & PSR_S))
75#define instruction_pointer(regs) ((regs)->pc)
76
77extern unsigned long user_stack(const struct pt_regs *);
78extern void show_regs(struct pt_regs *);
79#define profile_pc(regs) ((regs)->pc)
80#endif
81
82#endif /* !__ASSEMBLY__ */
83#endif /* _ASM_PTRACE_H */
diff --git a/arch/frv/include/asm/registers.h b/arch/frv/include/asm/registers.h
new file mode 100644
index 000000000000..9666119fcf6e
--- /dev/null
+++ b/arch/frv/include/asm/registers.h
@@ -0,0 +1,232 @@
1/* registers.h: register frame declarations
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12/*
13 * notes:
14 *
15 * (1) that the members of all these structures are carefully aligned to permit
16 * usage of STD/STDF instructions
17 *
18 * (2) if you change these structures, you must change the code in
19 * arch/frvnommu/kernel/{break.S,entry.S,switch_to.S,gdb-stub.c}
20 *
21 *
22 * the kernel stack space block looks like this:
23 *
24 * +0x2000 +----------------------
25 * | union {
26 * | struct frv_frame0 {
27 * | struct user_context {
28 * | struct user_int_regs
29 * | struct user_fpmedia_regs
30 * | }
31 * | struct frv_debug_regs
32 * | }
33 * | struct pt_regs [user exception]
34 * | }
35 * +---------------------- <-- __kernel_frame0_ptr (maybe GR28)
36 * |
37 * | kernel stack
38 * |
39 * |......................
40 * | struct pt_regs [kernel exception]
41 * |...................... <-- __kernel_frame0_ptr (maybe GR28)
42 * |
43 * | kernel stack
44 * |
45 * |...................... <-- stack pointer (GR1)
46 * |
47 * | unused stack space
48 * |
49 * +----------------------
50 * | struct thread_info
51 * +0x0000 +---------------------- <-- __current_thread_info (GR15);
52 *
53 * note that GR28 points to the current exception frame
54 */
55
56#ifndef _ASM_REGISTERS_H
57#define _ASM_REGISTERS_H
58
59#ifndef __ASSEMBLY__
60#define __OFFSET(X,N) ((X)+(N)*4)
61#define __OFFSETC(X,N) xxxxxxxxxxxxxxxxxxxxxxxx
62#else
63#define __OFFSET(X,N) ((X)+(N)*4)
64#define __OFFSETC(X,N) ((X)+(N))
65#endif
66
67/*****************************************************************************/
68/*
69 * Exception/Interrupt frame
70 * - held on kernel stack
71 * - 8-byte aligned on stack (old SP is saved in frame)
72 * - GR0 is fixed 0, so we don't save it
73 */
74#ifndef __ASSEMBLY__
75
76struct pt_regs {
77 unsigned long psr; /* Processor Status Register */
78 unsigned long isr; /* Integer Status Register */
79 unsigned long ccr; /* Condition Code Register */
80 unsigned long cccr; /* Condition Code for Conditional Insns Register */
81 unsigned long lr; /* Link Register */
82 unsigned long lcr; /* Loop Count Register */
83 unsigned long pc; /* Program Counter Register */
84 unsigned long __status; /* exception status */
85 unsigned long syscallno; /* syscall number or -1 */
86 unsigned long orig_gr8; /* original syscall arg #1 */
87 unsigned long gner0;
88 unsigned long gner1;
89 unsigned long long iacc0;
90 unsigned long tbr; /* GR0 is fixed zero, so we use this for TBR */
91 unsigned long sp; /* GR1: USP/KSP */
92 unsigned long fp; /* GR2: FP */
93 unsigned long gr3;
94 unsigned long gr4;
95 unsigned long gr5;
96 unsigned long gr6;
97 unsigned long gr7; /* syscall number */
98 unsigned long gr8; /* 1st syscall param; syscall return */
99 unsigned long gr9; /* 2nd syscall param */
100 unsigned long gr10; /* 3rd syscall param */
101 unsigned long gr11; /* 4th syscall param */
102 unsigned long gr12; /* 5th syscall param */
103 unsigned long gr13; /* 6th syscall param */
104 unsigned long gr14;
105 unsigned long gr15;
106 unsigned long gr16; /* GP pointer */
107 unsigned long gr17; /* small data */
108 unsigned long gr18; /* PIC/PID */
109 unsigned long gr19;
110 unsigned long gr20;
111 unsigned long gr21;
112 unsigned long gr22;
113 unsigned long gr23;
114 unsigned long gr24;
115 unsigned long gr25;
116 unsigned long gr26;
117 unsigned long gr27;
118 struct pt_regs *next_frame; /* GR28 - next exception frame */
119 unsigned long gr29; /* GR29 - OS reserved */
120 unsigned long gr30; /* GR30 - OS reserved */
121 unsigned long gr31; /* GR31 - OS reserved */
122} __attribute__((aligned(8)));
123
124#endif
125
126#define REG__STATUS_STEP 0x00000001 /* - reenable single stepping on return */
127#define REG__STATUS_STEPPED 0x00000002 /* - single step caused exception */
128#define REG__STATUS_BROKE 0x00000004 /* - BREAK insn caused exception */
129#define REG__STATUS_SYSC_ENTRY 0x40000000 /* - T on syscall entry (ptrace.c only) */
130#define REG__STATUS_SYSC_EXIT 0x80000000 /* - T on syscall exit (ptrace.c only) */
131
132#define REG_GR(R) __OFFSET(REG_GR0, (R))
133
134#define REG_SP REG_GR(1)
135#define REG_FP REG_GR(2)
136#define REG_PREV_FRAME REG_GR(28) /* previous exception frame pointer (old gr28 value) */
137#define REG_CURR_TASK REG_GR(29) /* current task */
138
139/*****************************************************************************/
140/*
141 * debugging registers
142 */
143#ifndef __ASSEMBLY__
144
145struct frv_debug_regs
146{
147 unsigned long dcr;
148 unsigned long ibar[4] __attribute__((aligned(8)));
149 unsigned long dbar[4] __attribute__((aligned(8)));
150 unsigned long dbdr[4][4] __attribute__((aligned(8)));
151 unsigned long dbmr[4][4] __attribute__((aligned(8)));
152} __attribute__((aligned(8)));
153
154#endif
155
156/*****************************************************************************/
157/*
158 * userspace registers
159 */
160#ifndef __ASSEMBLY__
161
162struct user_int_regs
163{
164 /* integer registers
165 * - up to gr[31] mirror pt_regs
166 * - total size must be multiple of 8 bytes
167 */
168 unsigned long psr; /* Processor Status Register */
169 unsigned long isr; /* Integer Status Register */
170 unsigned long ccr; /* Condition Code Register */
171 unsigned long cccr; /* Condition Code for Conditional Insns Register */
172 unsigned long lr; /* Link Register */
173 unsigned long lcr; /* Loop Count Register */
174 unsigned long pc; /* Program Counter Register */
175 unsigned long __status; /* exception status */
176 unsigned long syscallno; /* syscall number or -1 */
177 unsigned long orig_gr8; /* original syscall arg #1 */
178 unsigned long gner[2];
179 unsigned long long iacc[1];
180
181 union {
182 unsigned long tbr;
183 unsigned long gr[64];
184 };
185};
186
187struct user_fpmedia_regs
188{
189 /* FP/Media registers */
190 unsigned long fr[64];
191 unsigned long fner[2];
192 unsigned long msr[2];
193 unsigned long acc[8];
194 unsigned char accg[8];
195 unsigned long fsr[1];
196};
197
198struct user_context
199{
200 struct user_int_regs i;
201 struct user_fpmedia_regs f;
202
203 /* we provide a context extension so that we can save the regs for CPUs that
204 * implement many more of Fujitsu's lavish register spec
205 */
206 void *extension;
207} __attribute__((aligned(8)));
208
209struct frv_frame0 {
210 union {
211 struct pt_regs regs;
212 struct user_context uc;
213 };
214
215 struct frv_debug_regs debug;
216
217} __attribute__((aligned(32)));
218
219#endif
220
221#define __INT_GR(R) __OFFSET(__INT_GR0, (R))
222
223#define __FPMEDIA_FR(R) __OFFSET(__FPMEDIA_FR0, (R))
224#define __FPMEDIA_FNER(R) __OFFSET(__FPMEDIA_FNER0, (R))
225#define __FPMEDIA_MSR(R) __OFFSET(__FPMEDIA_MSR0, (R))
226#define __FPMEDIA_ACC(R) __OFFSET(__FPMEDIA_ACC0, (R))
227#define __FPMEDIA_ACCG(R) __OFFSETC(__FPMEDIA_ACCG0, (R))
228#define __FPMEDIA_FSR(R) __OFFSET(__FPMEDIA_FSR0, (R))
229
230#define __THREAD_GR(R) __OFFSET(__THREAD_GR16, (R) - 16)
231
232#endif /* _ASM_REGISTERS_H */
diff --git a/arch/frv/include/asm/resource.h b/arch/frv/include/asm/resource.h
new file mode 100644
index 000000000000..5fc60548fd02
--- /dev/null
+++ b/arch/frv/include/asm/resource.h
@@ -0,0 +1,7 @@
1#ifndef _ASM_RESOURCE_H
2#define _ASM_RESOURCE_H
3
4#include <asm-generic/resource.h>
5
6#endif /* _ASM_RESOURCE_H */
7
diff --git a/arch/frv/include/asm/scatterlist.h b/arch/frv/include/asm/scatterlist.h
new file mode 100644
index 000000000000..4bca8a28546c
--- /dev/null
+++ b/arch/frv/include/asm/scatterlist.h
@@ -0,0 +1,46 @@
1#ifndef _ASM_SCATTERLIST_H
2#define _ASM_SCATTERLIST_H
3
4#include <asm/types.h>
5
6/*
7 * Drivers must set either ->address or (preferred) page and ->offset
8 * to indicate where data must be transferred to/from.
9 *
10 * Using page is recommended since it handles highmem data as well as
11 * low mem. ->address is restricted to data which has a virtual mapping, and
12 * it will go away in the future. Updating to page can be automated very
13 * easily -- something like
14 *
15 * sg->address = some_ptr;
16 *
17 * can be rewritten as
18 *
19 * sg_set_buf(sg, some_ptr, length);
20 *
21 * and that's it. There's no excuse for not highmem enabling YOUR driver. /jens
22 */
23struct scatterlist {
24#ifdef CONFIG_DEBUG_SG
25 unsigned long sg_magic;
26#endif
27 unsigned long page_link;
28 unsigned int offset; /* for highmem, page offset */
29
30 dma_addr_t dma_address;
31 unsigned int length;
32};
33
34/*
35 * These macros should be used after a pci_map_sg call has been done
36 * to get bus addresses of each of the SG entries and their lengths.
37 * You should only work with the number of sg entries pci_map_sg
38 * returns, or alternatively stop on the first sg_dma_len(sg) which
39 * is 0.
40 */
41#define sg_dma_address(sg) ((sg)->dma_address)
42#define sg_dma_len(sg) ((sg)->length)
43
44#define ISA_DMA_THRESHOLD (0xffffffffUL)
45
46#endif /* !_ASM_SCATTERLIST_H */
diff --git a/arch/frv/include/asm/sections.h b/arch/frv/include/asm/sections.h
new file mode 100644
index 000000000000..17d0fb171bba
--- /dev/null
+++ b/arch/frv/include/asm/sections.h
@@ -0,0 +1,46 @@
1/* sections.h: linkage layout variables
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_SECTIONS_H
13#define _ASM_SECTIONS_H
14
15#ifndef __ASSEMBLY__
16
17#include <linux/types.h>
18#include <asm-generic/sections.h>
19
20#ifdef __KERNEL__
21
22/*
23 * we don't want to put variables in the GP-REL section if they're not used very much - that would
24 * be waste since GP-REL addressing is limited to GP16+/-2048
25 */
26#define __nongpreldata __attribute__((section(".data")))
27#define __nongprelbss __attribute__((section(".bss")))
28
29/*
30 * linker symbols
31 */
32extern const void __kernel_image_start, __kernel_image_end, __page_offset;
33
34extern unsigned long __nongprelbss memory_start;
35extern unsigned long __nongprelbss memory_end;
36extern unsigned long __nongprelbss rom_length;
37
38/* determine if we're running from ROM */
39static inline int is_in_rom(unsigned long addr)
40{
41 return 0; /* default case: not in ROM */
42}
43
44#endif
45#endif
46#endif /* _ASM_SECTIONS_H */
diff --git a/arch/frv/include/asm/segment.h b/arch/frv/include/asm/segment.h
new file mode 100644
index 000000000000..e3616a6f941d
--- /dev/null
+++ b/arch/frv/include/asm/segment.h
@@ -0,0 +1,45 @@
1/* segment.h: MMU segment settings
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_SEGMENT_H
13#define _ASM_SEGMENT_H
14
15
16#ifndef __ASSEMBLY__
17
18typedef struct {
19 unsigned long seg;
20} mm_segment_t;
21
22#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) })
23
24#define KERNEL_DS MAKE_MM_SEG(0xdfffffffUL)
25
26#ifdef CONFIG_MMU
27#define USER_DS MAKE_MM_SEG(TASK_SIZE - 1)
28#else
29#define USER_DS KERNEL_DS
30#endif
31
32#define get_ds() (KERNEL_DS)
33#define get_fs() (__current_thread_info->addr_limit)
34#define segment_eq(a,b) ((a).seg == (b).seg)
35#define __kernel_ds_p() segment_eq(get_fs(), KERNEL_DS)
36#define get_addr_limit() (get_fs().seg)
37
38#define set_fs(_x) \
39do { \
40 __current_thread_info->addr_limit = (_x); \
41} while(0)
42
43
44#endif /* __ASSEMBLY__ */
45#endif /* _ASM_SEGMENT_H */
diff --git a/arch/frv/include/asm/sembuf.h b/arch/frv/include/asm/sembuf.h
new file mode 100644
index 000000000000..164b12786d6d
--- /dev/null
+++ b/arch/frv/include/asm/sembuf.h
@@ -0,0 +1,26 @@
1#ifndef _ASM_SEMBUF_H
2#define _ASM_SEMBUF_H
3
4/*
5 * The semid64_ds structure for FR-V architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct semid64_ds {
15 struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
16 __kernel_time_t sem_otime; /* last semop time */
17 unsigned long __unused1;
18 __kernel_time_t sem_ctime; /* last change time */
19 unsigned long __unused2;
20 unsigned long sem_nsems; /* no. of semaphores in array */
21 unsigned long __unused3;
22 unsigned long __unused4;
23};
24
25#endif /* _ASM_SEMBUF_H */
26
diff --git a/arch/frv/include/asm/serial-regs.h b/arch/frv/include/asm/serial-regs.h
new file mode 100644
index 000000000000..e1286bda00eb
--- /dev/null
+++ b/arch/frv/include/asm/serial-regs.h
@@ -0,0 +1,44 @@
1/* serial-regs.h: serial port registers
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_SERIAL_REGS_H
13#define _ASM_SERIAL_REGS_H
14
15#include <linux/serial_reg.h>
16#include <asm/irc-regs.h>
17
18#define SERIAL_ICLK 33333333 /* the target serial input clock */
19#define UART0_BASE 0xfeff9c00
20#define UART1_BASE 0xfeff9c40
21
22#define __get_UART0(R) ({ __reg(UART0_BASE + (R) * 8) >> 24; })
23#define __get_UART1(R) ({ __reg(UART1_BASE + (R) * 8) >> 24; })
24#define __set_UART0(R,V) do { __reg(UART0_BASE + (R) * 8) = (V) << 24; } while(0)
25#define __set_UART1(R,V) do { __reg(UART1_BASE + (R) * 8) = (V) << 24; } while(0)
26
27#define __get_UART0_LSR() ({ __get_UART0(UART_LSR); })
28#define __get_UART1_LSR() ({ __get_UART1(UART_LSR); })
29
30#define __set_UART0_IER(V) __set_UART0(UART_IER,(V))
31#define __set_UART1_IER(V) __set_UART1(UART_IER,(V))
32
33/* serial prescaler select register */
34#define __get_UCPSR() ({ *(volatile unsigned long *)(0xfeff9c90); })
35#define __set_UCPSR(V) do { *(volatile unsigned long *)(0xfeff9c90) = (V); } while(0)
36#define UCPSR_SELECT0 0x07000000
37#define UCPSR_SELECT1 0x38000000
38
39/* serial prescaler base value register */
40#define __get_UCPVR() ({ *(volatile unsigned long *)(0xfeff9c98); mb(); })
41#define __set_UCPVR(V) do { *(volatile unsigned long *)(0xfeff9c98) = (V) << 24; mb(); } while(0)
42
43
44#endif /* _ASM_SERIAL_REGS_H */
diff --git a/arch/frv/include/asm/serial.h b/arch/frv/include/asm/serial.h
new file mode 100644
index 000000000000..dbb825998689
--- /dev/null
+++ b/arch/frv/include/asm/serial.h
@@ -0,0 +1,18 @@
1/*
2 * serial.h
3 *
4 * Copyright (C) 2003 Develer S.r.l. (http://www.develer.com/)
5 * Author: Bernardo Innocenti <bernie@codewiz.org>
6 *
7 * Based on linux/include/asm-i386/serial.h
8 */
9#include <asm/serial-regs.h>
10
11/*
12 * the base baud is derived from the clock speed and so is variable
13 */
14#define BASE_BAUD 0
15
16#define STD_COM_FLAGS ASYNC_BOOT_AUTOCONF
17
18#define SERIAL_PORT_DFNS
diff --git a/arch/frv/include/asm/setup.h b/arch/frv/include/asm/setup.h
new file mode 100644
index 000000000000..afd787ceede6
--- /dev/null
+++ b/arch/frv/include/asm/setup.h
@@ -0,0 +1,31 @@
1/* setup.h: setup stuff
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_SETUP_H
13#define _ASM_SETUP_H
14
15#define COMMAND_LINE_SIZE 512
16
17#ifdef __KERNEL__
18
19#include <linux/init.h>
20
21#ifndef __ASSEMBLY__
22
23#ifdef CONFIG_MMU
24extern unsigned long __initdata num_mappedpages;
25#endif
26
27#endif /* !__ASSEMBLY__ */
28
29#endif /* __KERNEL__ */
30
31#endif /* _ASM_SETUP_H */
diff --git a/arch/frv/include/asm/shmbuf.h b/arch/frv/include/asm/shmbuf.h
new file mode 100644
index 000000000000..4c6e711a4779
--- /dev/null
+++ b/arch/frv/include/asm/shmbuf.h
@@ -0,0 +1,43 @@
1#ifndef _ASM_SHMBUF_H
2#define _ASM_SHMBUF_H
3
4/*
5 * The shmid64_ds structure for FR-V architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct shmid64_ds {
15 struct ipc64_perm shm_perm; /* operation perms */
16 size_t shm_segsz; /* size of segment (bytes) */
17 __kernel_time_t shm_atime; /* last attach time */
18 unsigned long __unused1;
19 __kernel_time_t shm_dtime; /* last detach time */
20 unsigned long __unused2;
21 __kernel_time_t shm_ctime; /* last change time */
22 unsigned long __unused3;
23 __kernel_pid_t shm_cpid; /* pid of creator */
24 __kernel_pid_t shm_lpid; /* pid of last operator */
25 unsigned long shm_nattch; /* no. of current attaches */
26 unsigned long __unused4;
27 unsigned long __unused5;
28};
29
30struct shminfo64 {
31 unsigned long shmmax;
32 unsigned long shmmin;
33 unsigned long shmmni;
34 unsigned long shmseg;
35 unsigned long shmall;
36 unsigned long __unused1;
37 unsigned long __unused2;
38 unsigned long __unused3;
39 unsigned long __unused4;
40};
41
42#endif /* _ASM_SHMBUF_H */
43
diff --git a/arch/frv/include/asm/shmparam.h b/arch/frv/include/asm/shmparam.h
new file mode 100644
index 000000000000..ab711009cfaa
--- /dev/null
+++ b/arch/frv/include/asm/shmparam.h
@@ -0,0 +1,7 @@
1#ifndef _ASM_SHMPARAM_H
2#define _ASM_SHMPARAM_H
3
4#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
5
6#endif /* _ASM_SHMPARAM_H */
7
diff --git a/arch/frv/include/asm/sigcontext.h b/arch/frv/include/asm/sigcontext.h
new file mode 100644
index 000000000000..3b263f3cc96f
--- /dev/null
+++ b/arch/frv/include/asm/sigcontext.h
@@ -0,0 +1,26 @@
1/* sigcontext.h: FRV signal context
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11#ifndef _ASM_SIGCONTEXT_H
12#define _ASM_SIGCONTEXT_H
13
14#include <asm/registers.h>
15
16/*
17 * Signal context structure - contains all info to do with the state
18 * before the signal handler was invoked. Note: only add new entries
19 * to the end of the structure.
20 */
21struct sigcontext {
22 struct user_context sc_context;
23 unsigned long sc_oldmask; /* old sigmask */
24} __attribute__((aligned(8)));
25
26#endif
diff --git a/arch/frv/include/asm/siginfo.h b/arch/frv/include/asm/siginfo.h
new file mode 100644
index 000000000000..d3fd1ca45653
--- /dev/null
+++ b/arch/frv/include/asm/siginfo.h
@@ -0,0 +1,12 @@
1#ifndef _ASM_SIGINFO_H
2#define _ASM_SIGINFO_H
3
4#include <linux/types.h>
5#include <asm-generic/siginfo.h>
6
7#define FPE_MDAOVF (__SI_FAULT|9) /* media overflow */
8#undef NSIGFPE
9#define NSIGFPE 9
10
11#endif
12
diff --git a/arch/frv/include/asm/signal.h b/arch/frv/include/asm/signal.h
new file mode 100644
index 000000000000..2079197d483d
--- /dev/null
+++ b/arch/frv/include/asm/signal.h
@@ -0,0 +1,161 @@
1#ifndef _ASM_SIGNAL_H
2#define _ASM_SIGNAL_H
3
4#include <linux/types.h>
5
6/* Avoid too many header ordering problems. */
7struct siginfo;
8
9#ifdef __KERNEL__
10/* Most things should be clean enough to redefine this at will, if care
11 is taken to make libc match. */
12
13#define _NSIG 64
14#define _NSIG_BPW 32
15#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
16
17typedef unsigned long old_sigset_t; /* at least 32 bits */
18
19typedef struct {
20 unsigned long sig[_NSIG_WORDS];
21} sigset_t;
22
23#else
24/* Here we must cater to libcs that poke about in kernel headers. */
25
26#define NSIG 32
27typedef unsigned long sigset_t;
28
29#endif /* __KERNEL__ */
30
31#define SIGHUP 1
32#define SIGINT 2
33#define SIGQUIT 3
34#define SIGILL 4
35#define SIGTRAP 5
36#define SIGABRT 6
37#define SIGIOT 6
38#define SIGBUS 7
39#define SIGFPE 8
40#define SIGKILL 9
41#define SIGUSR1 10
42#define SIGSEGV 11
43#define SIGUSR2 12
44#define SIGPIPE 13
45#define SIGALRM 14
46#define SIGTERM 15
47#define SIGSTKFLT 16
48#define SIGCHLD 17
49#define SIGCONT 18
50#define SIGSTOP 19
51#define SIGTSTP 20
52#define SIGTTIN 21
53#define SIGTTOU 22
54#define SIGURG 23
55#define SIGXCPU 24
56#define SIGXFSZ 25
57#define SIGVTALRM 26
58#define SIGPROF 27
59#define SIGWINCH 28
60#define SIGIO 29
61#define SIGPOLL SIGIO
62/*
63#define SIGLOST 29
64*/
65#define SIGPWR 30
66#define SIGSYS 31
67#define SIGUNUSED 31
68
69/* These should not be considered constants from userland. */
70#define SIGRTMIN 32
71#define SIGRTMAX (_NSIG-1)
72
73/*
74 * SA_FLAGS values:
75 *
76 * SA_ONSTACK indicates that a registered stack_t will be used.
77 * SA_RESTART flag to get restarting signals (which were the default long ago)
78 * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
79 * SA_RESETHAND clears the handler when the signal is delivered.
80 * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
81 * SA_NODEFER prevents the current signal from being masked in the handler.
82 *
83 * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
84 * Unix names RESETHAND and NODEFER respectively.
85 */
86#define SA_NOCLDSTOP 0x00000001
87#define SA_NOCLDWAIT 0x00000002 /* not supported yet */
88#define SA_SIGINFO 0x00000004
89#define SA_ONSTACK 0x08000000
90#define SA_RESTART 0x10000000
91#define SA_NODEFER 0x40000000
92#define SA_RESETHAND 0x80000000
93
94#define SA_NOMASK SA_NODEFER
95#define SA_ONESHOT SA_RESETHAND
96
97#define SA_RESTORER 0x04000000
98
99/*
100 * sigaltstack controls
101 */
102#define SS_ONSTACK 1
103#define SS_DISABLE 2
104
105#define MINSIGSTKSZ 2048
106#define SIGSTKSZ 8192
107
108#include <asm-generic/signal.h>
109
110#ifdef __KERNEL__
111struct old_sigaction {
112 __sighandler_t sa_handler;
113 old_sigset_t sa_mask;
114 unsigned long sa_flags;
115 __sigrestore_t sa_restorer;
116};
117
118struct sigaction {
119 __sighandler_t sa_handler;
120 unsigned long sa_flags;
121 __sigrestore_t sa_restorer;
122 sigset_t sa_mask; /* mask last for extensibility */
123};
124
125struct k_sigaction {
126 struct sigaction sa;
127};
128#else
129/* Here we must cater to libcs that poke about in kernel headers. */
130
131struct sigaction {
132 union {
133 __sighandler_t _sa_handler;
134 void (*_sa_sigaction)(int, struct siginfo *, void *);
135 } _u;
136 sigset_t sa_mask;
137 unsigned long sa_flags;
138 void (*sa_restorer)(void);
139};
140
141#define sa_handler _u._sa_handler
142#define sa_sigaction _u._sa_sigaction
143
144#endif /* __KERNEL__ */
145
146typedef struct sigaltstack {
147 void __user *ss_sp;
148 int ss_flags;
149 size_t ss_size;
150} stack_t;
151
152#define ptrace_signal_deliver(regs, cookie) do { } while (0)
153
154#ifdef __KERNEL__
155
156#include <asm/sigcontext.h>
157#undef __HAVE_ARCH_SIG_BITOPS
158
159#endif /* __KERNEL__ */
160
161#endif /* _ASM_SIGNAL_H */
diff --git a/arch/frv/include/asm/smp.h b/arch/frv/include/asm/smp.h
new file mode 100644
index 000000000000..38349ec8b61b
--- /dev/null
+++ b/arch/frv/include/asm/smp.h
@@ -0,0 +1,9 @@
1#ifndef __ASM_SMP_H
2#define __ASM_SMP_H
3
4
5#ifdef CONFIG_SMP
6#error SMP not supported
7#endif
8
9#endif
diff --git a/arch/frv/include/asm/socket.h b/arch/frv/include/asm/socket.h
new file mode 100644
index 000000000000..57c3d4054e8b
--- /dev/null
+++ b/arch/frv/include/asm/socket.h
@@ -0,0 +1,61 @@
1#ifndef _ASM_SOCKET_H
2#define _ASM_SOCKET_H
3
4#include <asm/sockios.h>
5
6/* For setsockopt(2) */
7#define SOL_SOCKET 1
8
9#define SO_DEBUG 1
10#define SO_REUSEADDR 2
11#define SO_TYPE 3
12#define SO_ERROR 4
13#define SO_DONTROUTE 5
14#define SO_BROADCAST 6
15#define SO_SNDBUF 7
16#define SO_RCVBUF 8
17#define SO_SNDBUFFORCE 32
18#define SO_RCVBUFFORCE 33
19#define SO_KEEPALIVE 9
20#define SO_OOBINLINE 10
21#define SO_NO_CHECK 11
22#define SO_PRIORITY 12
23#define SO_LINGER 13
24#define SO_BSDCOMPAT 14
25/* To add :#define SO_REUSEPORT 15 */
26#define SO_PASSCRED 16
27#define SO_PEERCRED 17
28#define SO_RCVLOWAT 18
29#define SO_SNDLOWAT 19
30#define SO_RCVTIMEO 20
31#define SO_SNDTIMEO 21
32
33/* Security levels - as per NRL IPv6 - don't actually do anything */
34#define SO_SECURITY_AUTHENTICATION 22
35#define SO_SECURITY_ENCRYPTION_TRANSPORT 23
36#define SO_SECURITY_ENCRYPTION_NETWORK 24
37
38#define SO_BINDTODEVICE 25
39
40/* Socket filtering */
41#define SO_ATTACH_FILTER 26
42#define SO_DETACH_FILTER 27
43
44#define SO_PEERNAME 28
45#define SO_TIMESTAMP 29
46#define SCM_TIMESTAMP SO_TIMESTAMP
47
48#define SO_ACCEPTCONN 30
49
50#define SO_PEERSEC 31
51#define SO_PASSSEC 34
52#define SO_TIMESTAMPNS 35
53#define SCM_TIMESTAMPNS SO_TIMESTAMPNS
54
55#define SO_MARK 36
56
57#define SO_TIMESTAMPING 37
58#define SCM_TIMESTAMPING SO_TIMESTAMPING
59
60#endif /* _ASM_SOCKET_H */
61
diff --git a/arch/frv/include/asm/sockios.h b/arch/frv/include/asm/sockios.h
new file mode 100644
index 000000000000..5dbdd13e6de3
--- /dev/null
+++ b/arch/frv/include/asm/sockios.h
@@ -0,0 +1,14 @@
1#ifndef _ASM_SOCKIOS__
2#define _ASM_SOCKIOS__
3
4/* Socket-level I/O control calls. */
5#define FIOSETOWN 0x8901
6#define SIOCSPGRP 0x8902
7#define FIOGETOWN 0x8903
8#define SIOCGPGRP 0x8904
9#define SIOCATMARK 0x8905
10#define SIOCGSTAMP 0x8906 /* Get stamp (timeval) */
11#define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */
12
13#endif /* _ASM_SOCKIOS__ */
14
diff --git a/arch/frv/include/asm/spinlock.h b/arch/frv/include/asm/spinlock.h
new file mode 100644
index 000000000000..fe385f45d1fd
--- /dev/null
+++ b/arch/frv/include/asm/spinlock.h
@@ -0,0 +1,17 @@
1/* spinlock.h: spinlocks for FR-V
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_SPINLOCK_H
13#define _ASM_SPINLOCK_H
14
15#error no spinlocks for FR-V yet
16
17#endif /* _ASM_SPINLOCK_H */
diff --git a/arch/frv/include/asm/spr-regs.h b/arch/frv/include/asm/spr-regs.h
new file mode 100644
index 000000000000..01e6af5e99b8
--- /dev/null
+++ b/arch/frv/include/asm/spr-regs.h
@@ -0,0 +1,416 @@
1/* spr-regs.h: special-purpose registers on the FRV
2 *
3 * Copyright (C) 2003, 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_SPR_REGS_H
13#define _ASM_SPR_REGS_H
14
15/*
16 * PSR - Processor Status Register
17 */
18#define PSR_ET 0x00000001 /* enable interrupts/exceptions flag */
19#define PSR_PS 0x00000002 /* previous supervisor mode flag */
20#define PSR_S 0x00000004 /* supervisor mode flag */
21#define PSR_PIL 0x00000078 /* processor external interrupt level */
22#define PSR_PIL_0 0x00000000 /* - no interrupt in progress */
23#define PSR_PIL_13 0x00000068 /* - debugging only */
24#define PSR_PIL_14 0x00000070 /* - debugging in progress */
25#define PSR_PIL_15 0x00000078 /* - NMI in progress */
26#define PSR_EM 0x00000080 /* enable media operation */
27#define PSR_EF 0x00000100 /* enable FPU operation */
28#define PSR_BE 0x00001000 /* endianness mode */
29#define PSR_BE_LE 0x00000000 /* - little endian mode */
30#define PSR_BE_BE 0x00001000 /* - big endian mode */
31#define PSR_CM 0x00002000 /* conditional mode */
32#define PSR_NEM 0x00004000 /* non-excepting mode */
33#define PSR_ICE 0x00010000 /* in-circuit emulation mode */
34#define PSR_VERSION_SHIFT 24 /* CPU silicon ID */
35#define PSR_IMPLE_SHIFT 28 /* CPU core ID */
36
37#define PSR_VERSION(psr) (((psr) >> PSR_VERSION_SHIFT) & 0xf)
38#define PSR_IMPLE(psr) (((psr) >> PSR_IMPLE_SHIFT) & 0xf)
39
40#define PSR_IMPLE_FR401 0x2
41#define PSR_VERSION_FR401_MB93401 0x0
42#define PSR_VERSION_FR401_MB93401A 0x1
43#define PSR_VERSION_FR401_MB93403 0x2
44
45#define PSR_IMPLE_FR405 0x4
46#define PSR_VERSION_FR405_MB93405 0x0
47
48#define PSR_IMPLE_FR451 0x5
49#define PSR_VERSION_FR451_MB93451 0x0
50
51#define PSR_IMPLE_FR501 0x1
52#define PSR_VERSION_FR501_MB93501 0x1
53#define PSR_VERSION_FR501_MB93501A 0x2
54
55#define PSR_IMPLE_FR551 0x3
56#define PSR_VERSION_FR551_MB93555 0x1
57
58#define __get_PSR() ({ unsigned long x; asm volatile("movsg psr,%0" : "=r"(x)); x; })
59#define __set_PSR(V) do { asm volatile("movgs %0,psr" : : "r"(V)); } while(0)
60
61/*
62 * TBR - Trap Base Register
63 */
64#define TBR_TT 0x00000ff0
65#define TBR_TT_INSTR_MMU_MISS (0x01 << 4)
66#define TBR_TT_INSTR_ACC_ERROR (0x02 << 4)
67#define TBR_TT_INSTR_ACC_EXCEP (0x03 << 4)
68#define TBR_TT_PRIV_INSTR (0x06 << 4)
69#define TBR_TT_ILLEGAL_INSTR (0x07 << 4)
70#define TBR_TT_FP_EXCEPTION (0x0d << 4)
71#define TBR_TT_MP_EXCEPTION (0x0e << 4)
72#define TBR_TT_DATA_ACC_ERROR (0x11 << 4)
73#define TBR_TT_DATA_MMU_MISS (0x12 << 4)
74#define TBR_TT_DATA_ACC_EXCEP (0x13 << 4)
75#define TBR_TT_DATA_STR_ERROR (0x14 << 4)
76#define TBR_TT_DIVISION_EXCEP (0x17 << 4)
77#define TBR_TT_COMMIT_EXCEP (0x19 << 4)
78#define TBR_TT_INSTR_TLB_MISS (0x1a << 4)
79#define TBR_TT_DATA_TLB_MISS (0x1b << 4)
80#define TBR_TT_DATA_DAT_EXCEP (0x1d << 4)
81#define TBR_TT_DECREMENT_TIMER (0x1f << 4)
82#define TBR_TT_COMPOUND_EXCEP (0x20 << 4)
83#define TBR_TT_INTERRUPT_1 (0x21 << 4)
84#define TBR_TT_INTERRUPT_2 (0x22 << 4)
85#define TBR_TT_INTERRUPT_3 (0x23 << 4)
86#define TBR_TT_INTERRUPT_4 (0x24 << 4)
87#define TBR_TT_INTERRUPT_5 (0x25 << 4)
88#define TBR_TT_INTERRUPT_6 (0x26 << 4)
89#define TBR_TT_INTERRUPT_7 (0x27 << 4)
90#define TBR_TT_INTERRUPT_8 (0x28 << 4)
91#define TBR_TT_INTERRUPT_9 (0x29 << 4)
92#define TBR_TT_INTERRUPT_10 (0x2a << 4)
93#define TBR_TT_INTERRUPT_11 (0x2b << 4)
94#define TBR_TT_INTERRUPT_12 (0x2c << 4)
95#define TBR_TT_INTERRUPT_13 (0x2d << 4)
96#define TBR_TT_INTERRUPT_14 (0x2e << 4)
97#define TBR_TT_INTERRUPT_15 (0x2f << 4)
98#define TBR_TT_TRAP0 (0x80 << 4)
99#define TBR_TT_TRAP1 (0x81 << 4)
100#define TBR_TT_TRAP2 (0x82 << 4)
101#define TBR_TT_TRAP3 (0x83 << 4)
102#define TBR_TT_TRAP120 (0xf8 << 4)
103#define TBR_TT_TRAP121 (0xf9 << 4)
104#define TBR_TT_TRAP122 (0xfa << 4)
105#define TBR_TT_TRAP123 (0xfb << 4)
106#define TBR_TT_TRAP124 (0xfc << 4)
107#define TBR_TT_TRAP125 (0xfd << 4)
108#define TBR_TT_TRAP126 (0xfe << 4)
109#define TBR_TT_BREAK (0xff << 4)
110
111#define TBR_TT_ATOMIC_CMPXCHG32 TBR_TT_TRAP120
112#define TBR_TT_ATOMIC_XCHG32 TBR_TT_TRAP121
113#define TBR_TT_ATOMIC_XOR TBR_TT_TRAP122
114#define TBR_TT_ATOMIC_OR TBR_TT_TRAP123
115#define TBR_TT_ATOMIC_AND TBR_TT_TRAP124
116#define TBR_TT_ATOMIC_SUB TBR_TT_TRAP125
117#define TBR_TT_ATOMIC_ADD TBR_TT_TRAP126
118
119#define __get_TBR() ({ unsigned long x; asm volatile("movsg tbr,%0" : "=r"(x)); x; })
120
121/*
122 * HSR0 - Hardware Status Register 0
123 */
124#define HSR0_PDM 0x00000007 /* power down mode */
125#define HSR0_PDM_NORMAL 0x00000000 /* - normal mode */
126#define HSR0_PDM_CORE_SLEEP 0x00000001 /* - CPU core sleep mode */
127#define HSR0_PDM_BUS_SLEEP 0x00000003 /* - bus sleep mode */
128#define HSR0_PDM_PLL_RUN 0x00000005 /* - PLL run */
129#define HSR0_PDM_PLL_STOP 0x00000007 /* - PLL stop */
130#define HSR0_GRLE 0x00000040 /* GR lower register set enable */
131#define HSR0_GRHE 0x00000080 /* GR higher register set enable */
132#define HSR0_FRLE 0x00000100 /* FR lower register set enable */
133#define HSR0_FRHE 0x00000200 /* FR higher register set enable */
134#define HSR0_GRN 0x00000400 /* GR quantity */
135#define HSR0_GRN_64 0x00000000 /* - 64 GR registers */
136#define HSR0_GRN_32 0x00000400 /* - 32 GR registers */
137#define HSR0_FRN 0x00000800 /* FR quantity */
138#define HSR0_FRN_64 0x00000000 /* - 64 FR registers */
139#define HSR0_FRN_32 0x00000800 /* - 32 FR registers */
140#define HSR0_SA 0x00001000 /* start address (RAMBOOT#) */
141#define HSR0_ETMI 0x00008000 /* enable TIMERI (64-bit up timer) */
142#define HSR0_ETMD 0x00004000 /* enable TIMERD (32-bit down timer) */
143#define HSR0_PEDAT 0x00010000 /* previous DAT mode */
144#define HSR0_XEDAT 0x00020000 /* exception DAT mode */
145#define HSR0_EDAT 0x00080000 /* enable DAT mode */
146#define HSR0_RME 0x00400000 /* enable RAM mode */
147#define HSR0_EMEM 0x00800000 /* enable MMU_Miss mask */
148#define HSR0_EXMMU 0x01000000 /* enable extended MMU mode */
149#define HSR0_EDMMU 0x02000000 /* enable data MMU */
150#define HSR0_EIMMU 0x04000000 /* enable instruction MMU */
151#define HSR0_CBM 0x08000000 /* copy back mode */
152#define HSR0_CBM_WRITE_THRU 0x00000000 /* - write through */
153#define HSR0_CBM_COPY_BACK 0x08000000 /* - copy back */
154#define HSR0_NWA 0x10000000 /* no write allocate */
155#define HSR0_DCE 0x40000000 /* data cache enable */
156#define HSR0_ICE 0x80000000 /* instruction cache enable */
157
158#define __get_HSR(R) ({ unsigned long x; asm volatile("movsg hsr"#R",%0" : "=r"(x)); x; })
159#define __set_HSR(R,V) do { asm volatile("movgs %0,hsr"#R : : "r"(V)); } while(0)
160
161/*
162 * CCR - Condition Codes Register
163 */
164#define CCR_FCC0 0x0000000f /* FP/Media condition 0 (fcc0 reg) */
165#define CCR_FCC1 0x000000f0 /* FP/Media condition 1 (fcc1 reg) */
166#define CCR_FCC2 0x00000f00 /* FP/Media condition 2 (fcc2 reg) */
167#define CCR_FCC3 0x0000f000 /* FP/Media condition 3 (fcc3 reg) */
168#define CCR_ICC0 0x000f0000 /* Integer condition 0 (icc0 reg) */
169#define CCR_ICC0_C 0x00010000 /* - Carry flag */
170#define CCR_ICC0_V 0x00020000 /* - Overflow flag */
171#define CCR_ICC0_Z 0x00040000 /* - Zero flag */
172#define CCR_ICC0_N 0x00080000 /* - Negative flag */
173#define CCR_ICC1 0x00f00000 /* Integer condition 1 (icc1 reg) */
174#define CCR_ICC2 0x0f000000 /* Integer condition 2 (icc2 reg) */
175#define CCR_ICC3 0xf0000000 /* Integer condition 3 (icc3 reg) */
176
177/*
178 * CCCR - Condition Codes for Conditional Instructions Register
179 */
180#define CCCR_CC0 0x00000003 /* condition 0 (cc0 reg) */
181#define CCCR_CC0_FALSE 0x00000002 /* - condition is false */
182#define CCCR_CC0_TRUE 0x00000003 /* - condition is true */
183#define CCCR_CC1 0x0000000c /* condition 1 (cc1 reg) */
184#define CCCR_CC2 0x00000030 /* condition 2 (cc2 reg) */
185#define CCCR_CC3 0x000000c0 /* condition 3 (cc3 reg) */
186#define CCCR_CC4 0x00000300 /* condition 4 (cc4 reg) */
187#define CCCR_CC5 0x00000c00 /* condition 5 (cc5 reg) */
188#define CCCR_CC6 0x00003000 /* condition 6 (cc6 reg) */
189#define CCCR_CC7 0x0000c000 /* condition 7 (cc7 reg) */
190
191/*
192 * ISR - Integer Status Register
193 */
194#define ISR_EMAM 0x00000001 /* memory misaligned access handling */
195#define ISR_EMAM_EXCEPTION 0x00000000 /* - generate exception */
196#define ISR_EMAM_FUDGE 0x00000001 /* - mask out invalid address bits */
197#define ISR_AEXC 0x00000004 /* accrued [overflow] exception */
198#define ISR_DTT 0x00000018 /* division type trap */
199#define ISR_DTT_IGNORE 0x00000000 /* - ignore division error */
200#define ISR_DTT_DIVBYZERO 0x00000008 /* - generate exception */
201#define ISR_DTT_OVERFLOW 0x00000010 /* - record overflow */
202#define ISR_EDE 0x00000020 /* enable division exception */
203#define ISR_PLI 0x20000000 /* pre-load instruction information */
204#define ISR_QI 0x80000000 /* quad data implementation information */
205
206/*
207 * EPCR0 - Exception PC Register
208 */
209#define EPCR0_V 0x00000001 /* register content validity indicator */
210#define EPCR0_PC 0xfffffffc /* faulting instruction address */
211
212/*
213 * ESR0/14/15 - Exception Status Register
214 */
215#define ESRx_VALID 0x00000001 /* register content validity indicator */
216#define ESRx_EC 0x0000003e /* exception type */
217#define ESRx_EC_DATA_STORE 0x00000000 /* - data_store_error */
218#define ESRx_EC_INSN_ACCESS 0x00000006 /* - instruction_access_error */
219#define ESRx_EC_PRIV_INSN 0x00000008 /* - privileged_instruction */
220#define ESRx_EC_ILL_INSN 0x0000000a /* - illegal_instruction */
221#define ESRx_EC_MP_EXCEP 0x0000001c /* - mp_exception */
222#define ESRx_EC_DATA_ACCESS 0x00000020 /* - data_access_error */
223#define ESRx_EC_DIVISION 0x00000026 /* - division_exception */
224#define ESRx_EC_ITLB_MISS 0x00000034 /* - instruction_access_TLB_miss */
225#define ESRx_EC_DTLB_MISS 0x00000036 /* - data_access_TLB_miss */
226#define ESRx_EC_DATA_ACCESS_DAT 0x0000003a /* - data_access_DAT_exception */
227
228#define ESR0_IAEC 0x00000100 /* info for instruction-access-exception */
229#define ESR0_IAEC_RESV 0x00000000 /* - reserved */
230#define ESR0_IAEC_PROT_VIOL 0x00000100 /* - protection violation */
231
232#define ESR0_ATXC 0x00f00000 /* address translation exception code */
233#define ESR0_ATXC_MMU_MISS 0x00000000 /* - MMU miss exception and more (?) */
234#define ESR0_ATXC_MULTI_DAT 0x00800000 /* - multiple DAT entry hit */
235#define ESR0_ATXC_MULTI_SAT 0x00900000 /* - multiple SAT entry hit */
236#define ESR0_ATXC_AMRTLB_MISS 0x00a00000 /* - MMU/TLB miss exception */
237#define ESR0_ATXC_PRIV_EXCEP 0x00c00000 /* - privilege protection fault */
238#define ESR0_ATXC_WP_EXCEP 0x00d00000 /* - write protection fault */
239
240#define ESR0_EAV 0x00000800 /* true if EAR0 register valid */
241#define ESR15_EAV 0x00000800 /* true if EAR15 register valid */
242
243/*
244 * ESFR1 - Exception Status Valid Flag Register
245 */
246#define ESFR1_ESR0 0x00000001 /* true if ESR0 is valid */
247#define ESFR1_ESR14 0x00004000 /* true if ESR14 is valid */
248#define ESFR1_ESR15 0x00008000 /* true if ESR15 is valid */
249
250/*
251 * MSR - Media Status Register
252 */
253#define MSR0_AOVF 0x00000001 /* overflow exception accrued */
254#define MSRx_OVF 0x00000002 /* overflow exception detected */
255#define MSRx_SIE 0x0000003c /* last SIMD instruction exception detected */
256#define MSRx_SIE_NONE 0x00000000 /* - none detected */
257#define MSRx_SIE_FRkHI_ACCk 0x00000020 /* - exception at FRkHI or ACCk */
258#define MSRx_SIE_FRkLO_ACCk1 0x00000010 /* - exception at FRkLO or ACCk+1 */
259#define MSRx_SIE_FRk1HI_ACCk2 0x00000008 /* - exception at FRk+1HI or ACCk+2 */
260#define MSRx_SIE_FRk1LO_ACCk3 0x00000004 /* - exception at FRk+1LO or ACCk+3 */
261#define MSR0_MTT 0x00007000 /* type of last media trap detected */
262#define MSR0_MTT_NONE 0x00000000 /* - none detected */
263#define MSR0_MTT_OVERFLOW 0x00001000 /* - overflow detected */
264#define MSR0_HI 0x00c00000 /* hardware implementation */
265#define MSR0_HI_ROUNDING 0x00000000 /* - rounding mode */
266#define MSR0_HI_NONROUNDING 0x00c00000 /* - non-rounding mode */
267#define MSR0_EMCI 0x01000000 /* enable media custom instructions */
268#define MSR0_SRDAV 0x10000000 /* select rounding mode of MAVEH */
269#define MSR0_SRDAV_RDAV 0x00000000 /* - controlled by MSR.RDAV */
270#define MSR0_SRDAV_RD 0x10000000 /* - controlled by MSR.RD */
271#define MSR0_RDAV 0x20000000 /* rounding mode of MAVEH */
272#define MSR0_RDAV_NEAREST_MI 0x00000000 /* - round to nearest minus */
273#define MSR0_RDAV_NEAREST_PL 0x20000000 /* - round to nearest plus */
274#define MSR0_RD 0xc0000000 /* rounding mode */
275#define MSR0_RD_NEAREST 0x00000000 /* - nearest */
276#define MSR0_RD_ZERO 0x40000000 /* - zero */
277#define MSR0_RD_POS_INF 0x80000000 /* - postive infinity */
278#define MSR0_RD_NEG_INF 0xc0000000 /* - negative infinity */
279
280/*
281 * IAMPR0-7 - Instruction Address Mapping Register
282 * DAMPR0-7 - Data Address Mapping Register
283 */
284#define xAMPRx_V 0x00000001 /* register content validity indicator */
285#define DAMPRx_WP 0x00000002 /* write protect */
286#define DAMPRx_WP_RW 0x00000000 /* - read/write */
287#define DAMPRx_WP_RO 0x00000002 /* - read-only */
288#define xAMPRx_C 0x00000004 /* cached/uncached */
289#define xAMPRx_C_CACHED 0x00000000 /* - cached */
290#define xAMPRx_C_UNCACHED 0x00000004 /* - uncached */
291#define xAMPRx_S 0x00000008 /* supervisor only */
292#define xAMPRx_S_USER 0x00000000 /* - userspace can access */
293#define xAMPRx_S_KERNEL 0x00000008 /* - kernel only */
294#define xAMPRx_SS 0x000000f0 /* segment size */
295#define xAMPRx_SS_16Kb 0x00000000 /* - 16 kilobytes */
296#define xAMPRx_SS_64Kb 0x00000010 /* - 64 kilobytes */
297#define xAMPRx_SS_256Kb 0x00000020 /* - 256 kilobytes */
298#define xAMPRx_SS_1Mb 0x00000030 /* - 1 megabyte */
299#define xAMPRx_SS_2Mb 0x00000040 /* - 2 megabytes */
300#define xAMPRx_SS_4Mb 0x00000050 /* - 4 megabytes */
301#define xAMPRx_SS_8Mb 0x00000060 /* - 8 megabytes */
302#define xAMPRx_SS_16Mb 0x00000070 /* - 16 megabytes */
303#define xAMPRx_SS_32Mb 0x00000080 /* - 32 megabytes */
304#define xAMPRx_SS_64Mb 0x00000090 /* - 64 megabytes */
305#define xAMPRx_SS_128Mb 0x000000a0 /* - 128 megabytes */
306#define xAMPRx_SS_256Mb 0x000000b0 /* - 256 megabytes */
307#define xAMPRx_SS_512Mb 0x000000c0 /* - 512 megabytes */
308#define xAMPRx_RESERVED8 0x00000100 /* reserved bit */
309#define xAMPRx_NG 0x00000200 /* non-global */
310#define xAMPRx_L 0x00000400 /* locked */
311#define xAMPRx_M 0x00000800 /* modified */
312#define xAMPRx_D 0x00001000 /* DAT entry */
313#define xAMPRx_RESERVED13 0x00002000 /* reserved bit */
314#define xAMPRx_PPFN 0xfff00000 /* physical page frame number */
315
316#define xAMPRx_V_BIT 0
317#define DAMPRx_WP_BIT 1
318#define xAMPRx_C_BIT 2
319#define xAMPRx_S_BIT 3
320#define xAMPRx_RESERVED8_BIT 8
321#define xAMPRx_NG_BIT 9
322#define xAMPRx_L_BIT 10
323#define xAMPRx_M_BIT 11
324#define xAMPRx_D_BIT 12
325#define xAMPRx_RESERVED13_BIT 13
326
327#define __get_IAMPR(R) ({ unsigned long x; asm volatile("movsg iampr"#R",%0" : "=r"(x)); x; })
328#define __get_DAMPR(R) ({ unsigned long x; asm volatile("movsg dampr"#R",%0" : "=r"(x)); x; })
329
330#define __get_IAMLR(R) ({ unsigned long x; asm volatile("movsg iamlr"#R",%0" : "=r"(x)); x; })
331#define __get_DAMLR(R) ({ unsigned long x; asm volatile("movsg damlr"#R",%0" : "=r"(x)); x; })
332
333#define __set_IAMPR(R,V) do { asm volatile("movgs %0,iampr"#R : : "r"(V)); } while(0)
334#define __set_DAMPR(R,V) do { asm volatile("movgs %0,dampr"#R : : "r"(V)); } while(0)
335
336#define __set_IAMLR(R,V) do { asm volatile("movgs %0,iamlr"#R : : "r"(V)); } while(0)
337#define __set_DAMLR(R,V) do { asm volatile("movgs %0,damlr"#R : : "r"(V)); } while(0)
338
339#define save_dampr(R, _dampr) \
340do { \
341 asm volatile("movsg dampr"R",%0" : "=r"(_dampr)); \
342} while(0)
343
344#define restore_dampr(R, _dampr) \
345do { \
346 asm volatile("movgs %0,dampr"R :: "r"(_dampr)); \
347} while(0)
348
349/*
350 * AMCR - Address Mapping Control Register
351 */
352#define AMCR_IAMRN 0x000000ff /* quantity of IAMPR registers */
353#define AMCR_DAMRN 0x0000ff00 /* quantity of DAMPR registers */
354
355/*
356 * TTBR - Address Translation Table Base Register
357 */
358#define __get_TTBR() ({ unsigned long x; asm volatile("movsg ttbr,%0" : "=r"(x)); x; })
359
360/*
361 * TPXR - TLB Probe Extend Register
362 */
363#define TPXR_E 0x00000001
364#define TPXR_LMAX_SHIFT 20
365#define TPXR_LMAX_SMASK 0xf
366#define TPXR_WMAX_SHIFT 24
367#define TPXR_WMAX_SMASK 0xf
368#define TPXR_WAY_SHIFT 28
369#define TPXR_WAY_SMASK 0xf
370
371/*
372 * DCR - Debug Control Register
373 */
374#define DCR_IBCE3 0x00000001 /* break on conditional insn pointed to by IBAR3 */
375#define DCR_IBE3 0x00000002 /* break on insn pointed to by IBAR3 */
376#define DCR_IBCE1 0x00000004 /* break on conditional insn pointed to by IBAR2 */
377#define DCR_IBE1 0x00000008 /* break on insn pointed to by IBAR2 */
378#define DCR_IBCE2 0x00000010 /* break on conditional insn pointed to by IBAR1 */
379#define DCR_IBE2 0x00000020 /* break on insn pointed to by IBAR1 */
380#define DCR_IBCE0 0x00000040 /* break on conditional insn pointed to by IBAR0 */
381#define DCR_IBE0 0x00000080 /* break on insn pointed to by IBAR0 */
382
383#define DCR_DDBE1 0x00004000 /* use DBDR1x when checking DBAR1 */
384#define DCR_DWBE1 0x00008000 /* break on store to address in DBAR1/DBMR1x */
385#define DCR_DRBE1 0x00010000 /* break on load from address in DBAR1/DBMR1x */
386#define DCR_DDBE0 0x00020000 /* use DBDR0x when checking DBAR0 */
387#define DCR_DWBE0 0x00040000 /* break on store to address in DBAR0/DBMR0x */
388#define DCR_DRBE0 0x00080000 /* break on load from address in DBAR0/DBMR0x */
389
390#define DCR_EIM 0x0c000000 /* external interrupt disable */
391#define DCR_IBM 0x10000000 /* instruction break disable */
392#define DCR_SE 0x20000000 /* single step enable */
393#define DCR_EBE 0x40000000 /* exception break enable */
394
395/*
396 * BRR - Break Interrupt Request Register
397 */
398#define BRR_ST 0x00000001 /* single-step detected */
399#define BRR_SB 0x00000002 /* break instruction detected */
400#define BRR_BB 0x00000004 /* branch with hint detected */
401#define BRR_CBB 0x00000008 /* branch to LR detected */
402#define BRR_IBx 0x000000f0 /* hardware breakpoint detected */
403#define BRR_DBx 0x00000f00 /* hardware watchpoint detected */
404#define BRR_DBNEx 0x0000f000 /* ? */
405#define BRR_EBTT 0x00ff0000 /* trap type of exception break */
406#define BRR_TB 0x10000000 /* external break request detected */
407#define BRR_CB 0x20000000 /* ICE break command detected */
408#define BRR_EB 0x40000000 /* exception break detected */
409
410/*
411 * BPSR - Break PSR Save Register
412 */
413#define BPSR_BET 0x00000001 /* former PSR.ET */
414#define BPSR_BS 0x00001000 /* former PSR.S */
415
416#endif /* _ASM_SPR_REGS_H */
diff --git a/arch/frv/include/asm/stat.h b/arch/frv/include/asm/stat.h
new file mode 100644
index 000000000000..ce56de9b37ba
--- /dev/null
+++ b/arch/frv/include/asm/stat.h
@@ -0,0 +1,100 @@
1#ifndef _ASM_STAT_H
2#define _ASM_STAT_H
3
4struct __old_kernel_stat {
5 unsigned short st_dev;
6 unsigned short st_ino;
7 unsigned short st_mode;
8 unsigned short st_nlink;
9 unsigned short st_uid;
10 unsigned short st_gid;
11 unsigned short st_rdev;
12 unsigned long st_size;
13 unsigned long st_atime;
14 unsigned long st_mtime;
15 unsigned long st_ctime;
16};
17
18/* This matches struct stat in uClibc/glibc. */
19struct stat {
20 unsigned char __pad1[6];
21 unsigned short st_dev;
22
23 unsigned long __pad2;
24 unsigned long st_ino;
25
26 unsigned short __pad3;
27 unsigned short st_mode;
28 unsigned short __pad4;
29 unsigned short st_nlink;
30
31 unsigned short __pad5;
32 unsigned short st_uid;
33 unsigned short __pad6;
34 unsigned short st_gid;
35
36 unsigned char __pad7[6];
37 unsigned short st_rdev;
38
39 unsigned long __pad8;
40 unsigned long st_size;
41
42 unsigned long __pad9; /* align 64-bit st_blocks to 2-word */
43 unsigned long st_blksize;
44
45 unsigned long __pad10; /* future possible st_blocks high bits */
46 unsigned long st_blocks; /* Number 512-byte blocks allocated. */
47
48 unsigned long __unused1;
49 unsigned long st_atime;
50
51 unsigned long __unused2;
52 unsigned long st_mtime;
53
54 unsigned long __unused3;
55 unsigned long st_ctime;
56
57 unsigned long long __unused4;
58};
59
60/* This matches struct stat64 in uClibc/glibc. The layout is exactly
61 the same as that of struct stat above, with 64-bit types taking up
62 space that was formerly used by padding. stat syscalls are still
63 different from stat64, though, in that the former tests for
64 overflow. */
65struct stat64 {
66 unsigned char __pad1[6];
67 unsigned short st_dev;
68
69 unsigned long long st_ino;
70
71 unsigned int st_mode;
72 unsigned int st_nlink;
73
74 unsigned long st_uid;
75 unsigned long st_gid;
76
77 unsigned char __pad2[6];
78 unsigned short st_rdev;
79
80 long long st_size;
81
82 unsigned long __pad3; /* align 64-bit st_blocks to 2-word */
83 unsigned long st_blksize;
84
85 unsigned long __pad4; /* future possible st_blocks high bits */
86 unsigned long st_blocks; /* Number 512-byte blocks allocated. */
87
88 unsigned long st_atime_nsec;
89 unsigned long st_atime;
90
91 unsigned int st_mtime_nsec;
92 unsigned long st_mtime;
93
94 unsigned long st_ctime_nsec;
95 unsigned long st_ctime;
96
97 unsigned long long __unused4;
98};
99
100#endif /* _ASM_STAT_H */
diff --git a/arch/frv/include/asm/statfs.h b/arch/frv/include/asm/statfs.h
new file mode 100644
index 000000000000..741f586045ba
--- /dev/null
+++ b/arch/frv/include/asm/statfs.h
@@ -0,0 +1,7 @@
1#ifndef _ASM_STATFS_H
2#define _ASM_STATFS_H
3
4#include <asm-generic/statfs.h>
5
6#endif /* _ASM_STATFS_H */
7
diff --git a/arch/frv/include/asm/string.h b/arch/frv/include/asm/string.h
new file mode 100644
index 000000000000..5ed310f64b7e
--- /dev/null
+++ b/arch/frv/include/asm/string.h
@@ -0,0 +1,51 @@
1/* string.h: FRV string handling
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_STRING_H_
13#define _ASM_STRING_H_
14
15#ifdef __KERNEL__ /* only set these up for kernel code */
16
17#define __HAVE_ARCH_MEMSET 1
18#define __HAVE_ARCH_MEMCPY 1
19
20extern void *memset(void *, int, __kernel_size_t);
21extern void *memcpy(void *, const void *, __kernel_size_t);
22
23#else /* KERNEL */
24
25/*
26 * let user libraries deal with these,
27 * IMHO the kernel has no place defining these functions for user apps
28 */
29
30#define __HAVE_ARCH_STRCPY 1
31#define __HAVE_ARCH_STRNCPY 1
32#define __HAVE_ARCH_STRCAT 1
33#define __HAVE_ARCH_STRNCAT 1
34#define __HAVE_ARCH_STRCMP 1
35#define __HAVE_ARCH_STRNCMP 1
36#define __HAVE_ARCH_STRNICMP 1
37#define __HAVE_ARCH_STRCHR 1
38#define __HAVE_ARCH_STRRCHR 1
39#define __HAVE_ARCH_STRSTR 1
40#define __HAVE_ARCH_STRLEN 1
41#define __HAVE_ARCH_STRNLEN 1
42#define __HAVE_ARCH_MEMSET 1
43#define __HAVE_ARCH_MEMCPY 1
44#define __HAVE_ARCH_MEMMOVE 1
45#define __HAVE_ARCH_MEMSCAN 1
46#define __HAVE_ARCH_MEMCMP 1
47#define __HAVE_ARCH_MEMCHR 1
48#define __HAVE_ARCH_STRTOK 1
49
50#endif /* KERNEL */
51#endif /* _ASM_STRING_H_ */
diff --git a/arch/frv/include/asm/suspend.h b/arch/frv/include/asm/suspend.h
new file mode 100644
index 000000000000..5fa7b5a6ee40
--- /dev/null
+++ b/arch/frv/include/asm/suspend.h
@@ -0,0 +1,20 @@
1/* suspend.h: suspension stuff
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_SUSPEND_H
13#define _ASM_SUSPEND_H
14
15static inline int arch_prepare_suspend(void)
16{
17 return 0;
18}
19
20#endif /* _ASM_SUSPEND_H */
diff --git a/arch/frv/include/asm/swab.h b/arch/frv/include/asm/swab.h
new file mode 100644
index 000000000000..f305834b4799
--- /dev/null
+++ b/arch/frv/include/asm/swab.h
@@ -0,0 +1,10 @@
1#ifndef _ASM_SWAB_H
2#define _ASM_SWAB_H
3
4#include <linux/types.h>
5
6#if defined(__GNUC__) && !defined(__STRICT_ANSI__) || defined(__KERNEL__)
7# define __SWAB_64_THRU_32__
8#endif
9
10#endif /* _ASM_SWAB_H */
diff --git a/arch/frv/include/asm/system.h b/arch/frv/include/asm/system.h
new file mode 100644
index 000000000000..7742ec000cc4
--- /dev/null
+++ b/arch/frv/include/asm/system.h
@@ -0,0 +1,301 @@
1/* system.h: FR-V CPU control definitions
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_SYSTEM_H
13#define _ASM_SYSTEM_H
14
15#include <linux/types.h>
16#include <linux/linkage.h>
17#include <linux/kernel.h>
18
19struct thread_struct;
20
21/*
22 * switch_to(prev, next) should switch from task `prev' to `next'
23 * `prev' will never be the same as `next'.
24 * The `mb' is to tell GCC not to cache `current' across this call.
25 */
26extern asmlinkage
27struct task_struct *__switch_to(struct thread_struct *prev_thread,
28 struct thread_struct *next_thread,
29 struct task_struct *prev);
30
31#define switch_to(prev, next, last) \
32do { \
33 (prev)->thread.sched_lr = \
34 (unsigned long) __builtin_return_address(0); \
35 (last) = __switch_to(&(prev)->thread, &(next)->thread, (prev)); \
36 mb(); \
37} while(0)
38
39/*
40 * interrupt flag manipulation
41 * - use virtual interrupt management since touching the PSR is slow
42 * - ICC2.Z: T if interrupts virtually disabled
43 * - ICC2.C: F if interrupts really disabled
44 * - if Z==1 upon interrupt:
45 * - C is set to 0
46 * - interrupts are really disabled
47 * - entry.S returns immediately
48 * - uses TIHI (TRAP if Z==0 && C==0) #2 to really reenable interrupts
49 * - if taken, the trap:
50 * - sets ICC2.C
51 * - enables interrupts
52 */
53#define local_irq_disable() \
54do { \
55 /* set Z flag, but don't change the C flag */ \
56 asm volatile(" andcc gr0,gr0,gr0,icc2 \n" \
57 : \
58 : \
59 : "memory", "icc2" \
60 ); \
61} while(0)
62
63#define local_irq_enable() \
64do { \
65 /* clear Z flag and then test the C flag */ \
66 asm volatile(" oricc gr0,#1,gr0,icc2 \n" \
67 " tihi icc2,gr0,#2 \n" \
68 : \
69 : \
70 : "memory", "icc2" \
71 ); \
72} while(0)
73
74#define local_save_flags(flags) \
75do { \
76 typecheck(unsigned long, flags); \
77 asm volatile("movsg ccr,%0" \
78 : "=r"(flags) \
79 : \
80 : "memory"); \
81 \
82 /* shift ICC2.Z to bit 0 */ \
83 flags >>= 26; \
84 \
85 /* make flags 1 if interrupts disabled, 0 otherwise */ \
86 flags &= 1UL; \
87} while(0)
88
89#define irqs_disabled() \
90 ({unsigned long flags; local_save_flags(flags); !!flags; })
91
92#define local_irq_save(flags) \
93do { \
94 typecheck(unsigned long, flags); \
95 local_save_flags(flags); \
96 local_irq_disable(); \
97} while(0)
98
99#define local_irq_restore(flags) \
100do { \
101 typecheck(unsigned long, flags); \
102 \
103 /* load the Z flag by turning 1 if disabled into 0 if disabled \
104 * and thus setting the Z flag but not the C flag */ \
105 asm volatile(" xoricc %0,#1,gr0,icc2 \n" \
106 /* then test Z=0 and C=0 */ \
107 " tihi icc2,gr0,#2 \n" \
108 : \
109 : "r"(flags) \
110 : "memory", "icc2" \
111 ); \
112 \
113} while(0)
114
115/*
116 * real interrupt flag manipulation
117 */
118#define __local_irq_disable() \
119do { \
120 unsigned long psr; \
121 asm volatile(" movsg psr,%0 \n" \
122 " andi %0,%2,%0 \n" \
123 " ori %0,%1,%0 \n" \
124 " movgs %0,psr \n" \
125 : "=r"(psr) \
126 : "i" (PSR_PIL_14), "i" (~PSR_PIL) \
127 : "memory"); \
128} while(0)
129
130#define __local_irq_enable() \
131do { \
132 unsigned long psr; \
133 asm volatile(" movsg psr,%0 \n" \
134 " andi %0,%1,%0 \n" \
135 " movgs %0,psr \n" \
136 : "=r"(psr) \
137 : "i" (~PSR_PIL) \
138 : "memory"); \
139} while(0)
140
141#define __local_save_flags(flags) \
142do { \
143 typecheck(unsigned long, flags); \
144 asm("movsg psr,%0" \
145 : "=r"(flags) \
146 : \
147 : "memory"); \
148} while(0)
149
150#define __local_irq_save(flags) \
151do { \
152 unsigned long npsr; \
153 typecheck(unsigned long, flags); \
154 asm volatile(" movsg psr,%0 \n" \
155 " andi %0,%3,%1 \n" \
156 " ori %1,%2,%1 \n" \
157 " movgs %1,psr \n" \
158 : "=r"(flags), "=r"(npsr) \
159 : "i" (PSR_PIL_14), "i" (~PSR_PIL) \
160 : "memory"); \
161} while(0)
162
163#define __local_irq_restore(flags) \
164do { \
165 typecheck(unsigned long, flags); \
166 asm volatile(" movgs %0,psr \n" \
167 : \
168 : "r" (flags) \
169 : "memory"); \
170} while(0)
171
172#define __irqs_disabled() \
173 ((__get_PSR() & PSR_PIL) >= PSR_PIL_14)
174
175/*
176 * Force strict CPU ordering.
177 */
178#define nop() asm volatile ("nop"::)
179#define mb() asm volatile ("membar" : : :"memory")
180#define rmb() asm volatile ("membar" : : :"memory")
181#define wmb() asm volatile ("membar" : : :"memory")
182#define read_barrier_depends() do { } while (0)
183
184#ifdef CONFIG_SMP
185#define smp_mb() mb()
186#define smp_rmb() rmb()
187#define smp_wmb() wmb()
188#define smp_read_barrier_depends() read_barrier_depends()
189#define set_mb(var, value) \
190 do { xchg(&var, (value)); } while (0)
191#else
192#define smp_mb() barrier()
193#define smp_rmb() barrier()
194#define smp_wmb() barrier()
195#define smp_read_barrier_depends() do {} while(0)
196#define set_mb(var, value) \
197 do { var = (value); barrier(); } while (0)
198#endif
199
200extern void die_if_kernel(const char *, ...) __attribute__((format(printf, 1, 2)));
201extern void free_initmem(void);
202
203#define arch_align_stack(x) (x)
204
205/*****************************************************************************/
206/*
207 * compare and conditionally exchange value with memory
208 * - if (*ptr == test) then orig = *ptr; *ptr = test;
209 * - if (*ptr != test) then orig = *ptr;
210 */
211#ifndef CONFIG_FRV_OUTOFLINE_ATOMIC_OPS
212
213#define cmpxchg(ptr, test, new) \
214({ \
215 __typeof__(ptr) __xg_ptr = (ptr); \
216 __typeof__(*(ptr)) __xg_orig, __xg_tmp; \
217 __typeof__(*(ptr)) __xg_test = (test); \
218 __typeof__(*(ptr)) __xg_new = (new); \
219 \
220 switch (sizeof(__xg_orig)) { \
221 case 4: \
222 asm volatile( \
223 "0: \n" \
224 " orcc gr0,gr0,gr0,icc3 \n" \
225 " ckeq icc3,cc7 \n" \
226 " ld.p %M0,%1 \n" \
227 " orcr cc7,cc7,cc3 \n" \
228 " sub%I4cc %1,%4,%2,icc0 \n" \
229 " bne icc0,#0,1f \n" \
230 " cst.p %3,%M0 ,cc3,#1 \n" \
231 " corcc gr29,gr29,gr0 ,cc3,#1 \n" \
232 " beq icc3,#0,0b \n" \
233 "1: \n" \
234 : "+U"(*__xg_ptr), "=&r"(__xg_orig), "=&r"(__xg_tmp) \
235 : "r"(__xg_new), "NPr"(__xg_test) \
236 : "memory", "cc7", "cc3", "icc3", "icc0" \
237 ); \
238 break; \
239 \
240 default: \
241 __xg_orig = (__typeof__(__xg_orig))0; \
242 asm volatile("break"); \
243 break; \
244 } \
245 \
246 __xg_orig; \
247})
248
249#else
250
251extern uint32_t __cmpxchg_32(uint32_t *v, uint32_t test, uint32_t new);
252
253#define cmpxchg(ptr, test, new) \
254({ \
255 __typeof__(ptr) __xg_ptr = (ptr); \
256 __typeof__(*(ptr)) __xg_orig; \
257 __typeof__(*(ptr)) __xg_test = (test); \
258 __typeof__(*(ptr)) __xg_new = (new); \
259 \
260 switch (sizeof(__xg_orig)) { \
261 case 4: __xg_orig = (__force __typeof__(*ptr)) \
262 __cmpxchg_32((__force uint32_t *)__xg_ptr, \
263 (__force uint32_t)__xg_test, \
264 (__force uint32_t)__xg_new); break; \
265 default: \
266 __xg_orig = (__typeof__(__xg_orig))0; \
267 asm volatile("break"); \
268 break; \
269 } \
270 \
271 __xg_orig; \
272})
273
274#endif
275
276#include <asm-generic/cmpxchg-local.h>
277
278static inline unsigned long __cmpxchg_local(volatile void *ptr,
279 unsigned long old,
280 unsigned long new, int size)
281{
282 switch (size) {
283 case 4:
284 return cmpxchg((unsigned long *)ptr, old, new);
285 default:
286 return __cmpxchg_local_generic(ptr, old, new, size);
287 }
288
289 return old;
290}
291
292/*
293 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
294 * them available.
295 */
296#define cmpxchg_local(ptr, o, n) \
297 ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \
298 (unsigned long)(n), sizeof(*(ptr))))
299#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
300
301#endif /* _ASM_SYSTEM_H */
diff --git a/arch/frv/include/asm/termbits.h b/arch/frv/include/asm/termbits.h
new file mode 100644
index 000000000000..5568492b5086
--- /dev/null
+++ b/arch/frv/include/asm/termbits.h
@@ -0,0 +1,202 @@
1#ifndef _ASM_TERMBITS_H__
2#define _ASM_TERMBITS_H__
3
4#include <linux/posix_types.h>
5
6typedef unsigned char cc_t;
7typedef unsigned int speed_t;
8typedef unsigned int tcflag_t;
9
10#define NCCS 19
11struct termios {
12 tcflag_t c_iflag; /* input mode flags */
13 tcflag_t c_oflag; /* output mode flags */
14 tcflag_t c_cflag; /* control mode flags */
15 tcflag_t c_lflag; /* local mode flags */
16 cc_t c_line; /* line discipline */
17 cc_t c_cc[NCCS]; /* control characters */
18};
19
20struct termios2 {
21 tcflag_t c_iflag; /* input mode flags */
22 tcflag_t c_oflag; /* output mode flags */
23 tcflag_t c_cflag; /* control mode flags */
24 tcflag_t c_lflag; /* local mode flags */
25 cc_t c_line; /* line discipline */
26 cc_t c_cc[NCCS]; /* control characters */
27 speed_t c_ispeed; /* input speed */
28 speed_t c_ospeed; /* output speed */
29};
30
31struct ktermios {
32 tcflag_t c_iflag; /* input mode flags */
33 tcflag_t c_oflag; /* output mode flags */
34 tcflag_t c_cflag; /* control mode flags */
35 tcflag_t c_lflag; /* local mode flags */
36 cc_t c_line; /* line discipline */
37 cc_t c_cc[NCCS]; /* control characters */
38 speed_t c_ispeed; /* input speed */
39 speed_t c_ospeed; /* output speed */
40};
41
42/* c_cc characters */
43#define VINTR 0
44#define VQUIT 1
45#define VERASE 2
46#define VKILL 3
47#define VEOF 4
48#define VTIME 5
49#define VMIN 6
50#define VSWTC 7
51#define VSTART 8
52#define VSTOP 9
53#define VSUSP 10
54#define VEOL 11
55#define VREPRINT 12
56#define VDISCARD 13
57#define VWERASE 14
58#define VLNEXT 15
59#define VEOL2 16
60
61
62/* c_iflag bits */
63#define IGNBRK 0000001
64#define BRKINT 0000002
65#define IGNPAR 0000004
66#define PARMRK 0000010
67#define INPCK 0000020
68#define ISTRIP 0000040
69#define INLCR 0000100
70#define IGNCR 0000200
71#define ICRNL 0000400
72#define IUCLC 0001000
73#define IXON 0002000
74#define IXANY 0004000
75#define IXOFF 0010000
76#define IMAXBEL 0020000
77#define IUTF8 0040000
78
79/* c_oflag bits */
80#define OPOST 0000001
81#define OLCUC 0000002
82#define ONLCR 0000004
83#define OCRNL 0000010
84#define ONOCR 0000020
85#define ONLRET 0000040
86#define OFILL 0000100
87#define OFDEL 0000200
88#define NLDLY 0000400
89#define NL0 0000000
90#define NL1 0000400
91#define CRDLY 0003000
92#define CR0 0000000
93#define CR1 0001000
94#define CR2 0002000
95#define CR3 0003000
96#define TABDLY 0014000
97#define TAB0 0000000
98#define TAB1 0004000
99#define TAB2 0010000
100#define TAB3 0014000
101#define XTABS 0014000
102#define BSDLY 0020000
103#define BS0 0000000
104#define BS1 0020000
105#define VTDLY 0040000
106#define VT0 0000000
107#define VT1 0040000
108#define FFDLY 0100000
109#define FF0 0000000
110#define FF1 0100000
111
112/* c_cflag bit meaning */
113#define CBAUD 0010017
114#define B0 0000000 /* hang up */
115#define B50 0000001
116#define B75 0000002
117#define B110 0000003
118#define B134 0000004
119#define B150 0000005
120#define B200 0000006
121#define B300 0000007
122#define B600 0000010
123#define B1200 0000011
124#define B1800 0000012
125#define B2400 0000013
126#define B4800 0000014
127#define B9600 0000015
128#define B19200 0000016
129#define B38400 0000017
130#define EXTA B19200
131#define EXTB B38400
132#define CSIZE 0000060
133#define CS5 0000000
134#define CS6 0000020
135#define CS7 0000040
136#define CS8 0000060
137#define CSTOPB 0000100
138#define CREAD 0000200
139#define PARENB 0000400
140#define PARODD 0001000
141#define HUPCL 0002000
142#define CLOCAL 0004000
143#define CBAUDEX 0010000
144#define BOTHER 0010000
145#define B57600 0010001
146#define B115200 0010002
147#define B230400 0010003
148#define B460800 0010004
149#define B500000 0010005
150#define B576000 0010006
151#define B921600 0010007
152#define B1000000 0010010
153#define B1152000 0010011
154#define B1500000 0010012
155#define B2000000 0010013
156#define B2500000 0010014
157#define B3000000 0010015
158#define B3500000 0010016
159#define B4000000 0010017
160#define CIBAUD 002003600000 /* Input baud rate */
161#define CTVB 004000000000 /* VisioBraille Terminal flow control */
162#define CMSPAR 010000000000 /* mark or space (stick) parity */
163#define CRTSCTS 020000000000 /* flow control */
164
165#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */
166
167/* c_lflag bits */
168#define ISIG 0000001
169#define ICANON 0000002
170#define XCASE 0000004
171#define ECHO 0000010
172#define ECHOE 0000020
173#define ECHOK 0000040
174#define ECHONL 0000100
175#define NOFLSH 0000200
176#define TOSTOP 0000400
177#define ECHOCTL 0001000
178#define ECHOPRT 0002000
179#define ECHOKE 0004000
180#define FLUSHO 0010000
181#define PENDIN 0040000
182#define IEXTEN 0100000
183
184
185/* tcflow() and TCXONC use these */
186#define TCOOFF 0
187#define TCOON 1
188#define TCIOFF 2
189#define TCION 3
190
191/* tcflush() and TCFLSH use these */
192#define TCIFLUSH 0
193#define TCOFLUSH 1
194#define TCIOFLUSH 2
195
196/* tcsetattr uses these */
197#define TCSANOW 0
198#define TCSADRAIN 1
199#define TCSAFLUSH 2
200
201#endif /* _ASM_TERMBITS_H__ */
202
diff --git a/arch/frv/include/asm/termios.h b/arch/frv/include/asm/termios.h
new file mode 100644
index 000000000000..a62fb5872375
--- /dev/null
+++ b/arch/frv/include/asm/termios.h
@@ -0,0 +1,58 @@
1#ifndef _ASM_TERMIOS_H
2#define _ASM_TERMIOS_H
3
4#include <asm/termbits.h>
5#include <asm/ioctls.h>
6
7struct winsize {
8 unsigned short ws_row;
9 unsigned short ws_col;
10 unsigned short ws_xpixel;
11 unsigned short ws_ypixel;
12};
13
14#define NCC 8
15struct termio {
16 unsigned short c_iflag; /* input mode flags */
17 unsigned short c_oflag; /* output mode flags */
18 unsigned short c_cflag; /* control mode flags */
19 unsigned short c_lflag; /* local mode flags */
20 unsigned char c_line; /* line discipline */
21 unsigned char c_cc[NCC]; /* control characters */
22};
23
24#ifdef __KERNEL__
25/* intr=^C quit=^| erase=del kill=^U
26 eof=^D vtime=\0 vmin=\1 sxtc=\0
27 start=^Q stop=^S susp=^Z eol=\0
28 reprint=^R discard=^U werase=^W lnext=^V
29 eol2=\0
30*/
31#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
32#endif
33
34/* modem lines */
35#define TIOCM_LE 0x001
36#define TIOCM_DTR 0x002
37#define TIOCM_RTS 0x004
38#define TIOCM_ST 0x008
39#define TIOCM_SR 0x010
40#define TIOCM_CTS 0x020
41#define TIOCM_CAR 0x040
42#define TIOCM_RNG 0x080
43#define TIOCM_DSR 0x100
44#define TIOCM_CD TIOCM_CAR
45#define TIOCM_RI TIOCM_RNG
46#define TIOCM_OUT1 0x2000
47#define TIOCM_OUT2 0x4000
48#define TIOCM_LOOP 0x8000
49
50#define TIOCM_MODEM_BITS TIOCM_OUT2 /* IRDA support */
51
52/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
53
54#ifdef __KERNEL__
55#include <asm-generic/termios.h>
56#endif
57
58#endif /* _ASM_TERMIOS_H */
diff --git a/arch/frv/include/asm/thread_info.h b/arch/frv/include/asm/thread_info.h
new file mode 100644
index 000000000000..bb53ab753ffb
--- /dev/null
+++ b/arch/frv/include/asm/thread_info.h
@@ -0,0 +1,144 @@
1/* thread_info.h: description
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * Derived from include/asm-i386/thread_info.h
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13#ifndef _ASM_THREAD_INFO_H
14#define _ASM_THREAD_INFO_H
15
16#ifdef __KERNEL__
17
18#ifndef __ASSEMBLY__
19#include <asm/processor.h>
20#endif
21
22#define THREAD_SIZE 8192
23
24/*
25 * low level task data that entry.S needs immediate access to
26 * - this struct should fit entirely inside of one cache line
27 * - this struct shares the supervisor stack pages
28 * - if the contents of this structure are changed, the assembly constants must also be changed
29 */
30#ifndef __ASSEMBLY__
31
32struct thread_info {
33 struct task_struct *task; /* main task structure */
34 struct exec_domain *exec_domain; /* execution domain */
35 unsigned long flags; /* low level flags */
36 unsigned long status; /* thread-synchronous flags */
37 __u32 cpu; /* current CPU */
38 int preempt_count; /* 0 => preemptable, <0 => BUG */
39
40 mm_segment_t addr_limit; /* thread address space:
41 * 0-0xBFFFFFFF for user-thead
42 * 0-0xFFFFFFFF for kernel-thread
43 */
44 struct restart_block restart_block;
45
46 __u8 supervisor_stack[0];
47};
48
49#else /* !__ASSEMBLY__ */
50
51#include <asm/asm-offsets.h>
52
53#endif
54
55#define PREEMPT_ACTIVE 0x10000000
56
57/*
58 * macros/functions for gaining access to the thread information structure
59 *
60 * preempt_count needs to be 1 initially, until the scheduler is functional.
61 */
62#ifndef __ASSEMBLY__
63
64#define INIT_THREAD_INFO(tsk) \
65{ \
66 .task = &tsk, \
67 .exec_domain = &default_exec_domain, \
68 .flags = 0, \
69 .cpu = 0, \
70 .preempt_count = 1, \
71 .addr_limit = KERNEL_DS, \
72 .restart_block = { \
73 .fn = do_no_restart_syscall, \
74 }, \
75}
76
77#define init_thread_info (init_thread_union.thread_info)
78#define init_stack (init_thread_union.stack)
79
80/* how to get the thread information struct from C */
81register struct thread_info *__current_thread_info asm("gr15");
82
83#define current_thread_info() ({ __current_thread_info; })
84
85#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR
86
87/* thread information allocation */
88#ifdef CONFIG_DEBUG_STACK_USAGE
89#define alloc_thread_info(tsk) \
90 ({ \
91 struct thread_info *ret; \
92 \
93 ret = kzalloc(THREAD_SIZE, GFP_KERNEL); \
94 \
95 ret; \
96 })
97#else
98#define alloc_thread_info(tsk) kmalloc(THREAD_SIZE, GFP_KERNEL)
99#endif
100
101#define free_thread_info(info) kfree(info)
102
103#endif /* __ASSEMBLY__ */
104
105/*
106 * thread information flags
107 * - these are process state flags that various assembly files may need to access
108 * - pending work-to-be-done flags are in LSW
109 * - other flags in MSW
110 */
111#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
112#define TIF_SIGPENDING 1 /* signal pending */
113#define TIF_NEED_RESCHED 2 /* rescheduling necessary */
114#define TIF_SINGLESTEP 3 /* restore singlestep on return to user mode */
115#define TIF_IRET 4 /* return with iret */
116#define TIF_RESTORE_SIGMASK 5 /* restore signal mask in do_signal() */
117#define TIF_POLLING_NRFLAG 16 /* true if poll_idle() is polling TIF_NEED_RESCHED */
118#define TIF_MEMDIE 17 /* OOM killer killed process */
119#define TIF_FREEZE 18 /* freezing for suspend */
120
121#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE)
122#define _TIF_SIGPENDING (1 << TIF_SIGPENDING)
123#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED)
124#define _TIF_SINGLESTEP (1 << TIF_SINGLESTEP)
125#define _TIF_IRET (1 << TIF_IRET)
126#define _TIF_RESTORE_SIGMASK (1 << TIF_RESTORE_SIGMASK)
127#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG)
128#define _TIF_FREEZE (1 << TIF_FREEZE)
129
130#define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */
131#define _TIF_ALLWORK_MASK 0x0000FFFF /* work to do on any return to u-space */
132
133/*
134 * Thread-synchronous status.
135 *
136 * This is different from the flags in that nobody else
137 * ever touches our thread-synchronous status, so we don't
138 * have to worry about atomic accesses.
139 */
140#define TS_USEDFPM 0x0001 /* FPU/Media was used by this task this quantum (SMP) */
141
142#endif /* __KERNEL__ */
143
144#endif /* _ASM_THREAD_INFO_H */
diff --git a/arch/frv/include/asm/timer-regs.h b/arch/frv/include/asm/timer-regs.h
new file mode 100644
index 000000000000..6c5a871ce5e9
--- /dev/null
+++ b/arch/frv/include/asm/timer-regs.h
@@ -0,0 +1,106 @@
1/* timer-regs.h: hardware timer register definitions
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_TIMER_REGS_H
13#define _ASM_TIMER_REGS_H
14
15#include <asm/sections.h>
16
17extern unsigned long __nongprelbss __clkin_clock_speed_HZ;
18extern unsigned long __nongprelbss __ext_bus_clock_speed_HZ;
19extern unsigned long __nongprelbss __res_bus_clock_speed_HZ;
20extern unsigned long __nongprelbss __sdram_clock_speed_HZ;
21extern unsigned long __nongprelbss __core_bus_clock_speed_HZ;
22extern unsigned long __nongprelbss __core_clock_speed_HZ;
23extern unsigned long __nongprelbss __dsu_clock_speed_HZ;
24extern unsigned long __nongprelbss __serial_clock_speed_HZ;
25
26#define __get_CLKC() ({ *(volatile unsigned long *)(0xfeff9a00); })
27
28static inline void __set_CLKC(unsigned long v)
29{
30 int tmp;
31
32 asm volatile(" st%I0.p %2,%M0 \n"
33 " setlos %3,%1 \n"
34 " membar \n"
35 "0: \n"
36 " subicc %1,#1,%1,icc0 \n"
37 " bnc icc0,#1,0b \n"
38 : "=m"(*(volatile unsigned long *) 0xfeff9a00), "=r"(tmp)
39 : "r"(v), "i"(256)
40 : "icc0");
41}
42
43#define __get_TCTR() ({ *(volatile unsigned long *)(0xfeff9418); })
44#define __get_TPRV() ({ *(volatile unsigned long *)(0xfeff9420); })
45#define __get_TPRCKSL() ({ *(volatile unsigned long *)(0xfeff9428); })
46#define __get_TCSR(T) ({ *(volatile unsigned long *)(0xfeff9400 + 8 * (T)); })
47#define __get_TxCKSL(T) ({ *(volatile unsigned long *)(0xfeff9430 + 8 * (T)); })
48
49#define __get_TCSR_DATA(T) ({ __get_TCSR(T) >> 24; })
50
51#define __set_TCTR(V) do { *(volatile unsigned long *)(0xfeff9418) = (V); mb(); } while(0)
52#define __set_TPRV(V) do { *(volatile unsigned long *)(0xfeff9420) = (V) << 24; mb(); } while(0)
53#define __set_TPRCKSL(V) do { *(volatile unsigned long *)(0xfeff9428) = (V); mb(); } while(0)
54#define __set_TCSR(T,V) \
55do { *(volatile unsigned long *)(0xfeff9400 + 8 * (T)) = (V); mb(); } while(0)
56
57#define __set_TxCKSL(T,V) \
58do { *(volatile unsigned long *)(0xfeff9430 + 8 * (T)) = (V); mb(); } while(0)
59
60#define __set_TCSR_DATA(T,V) __set_TCSR(T, (V) << 24)
61#define __set_TxCKSL_DATA(T,V) __set_TxCKSL(T, TxCKSL_EIGHT | __TxCKSL_SELECT((V)))
62
63/* clock control register */
64#define CLKC_CMODE 0x0f000000
65#define CLKC_SLPL 0x000f0000
66#define CLKC_P0 0x00000100
67#define CLKC_CM 0x00000003
68
69#define CLKC_CMODE_s 24
70
71/* timer control register - non-readback mode */
72#define TCTR_MODE_0 0x00000000
73#define TCTR_MODE_2 0x04000000
74#define TCTR_MODE_4 0x08000000
75#define TCTR_MODE_5 0x0a000000
76#define TCTR_RL_LATCH 0x00000000
77#define TCTR_RL_RW_LOW8 0x10000000
78#define TCTR_RL_RW_HIGH8 0x20000000
79#define TCTR_RL_RW_LH8 0x30000000
80#define TCTR_SC_CTR0 0x00000000
81#define TCTR_SC_CTR1 0x40000000
82#define TCTR_SC_CTR2 0x80000000
83
84/* timer control register - readback mode */
85#define TCTR_CNT0 0x02000000
86#define TCTR_CNT1 0x04000000
87#define TCTR_CNT2 0x08000000
88#define TCTR_NSTATUS 0x10000000
89#define TCTR_NCOUNT 0x20000000
90#define TCTR_SC_READBACK 0xc0000000
91
92/* timer control status registers - non-readback mode */
93#define TCSRx_DATA 0xff000000
94
95/* timer control status registers - readback mode */
96#define TCSRx_OUTPUT 0x80000000
97#define TCSRx_NULLCOUNT 0x40000000
98#define TCSRx_RL 0x30000000
99#define TCSRx_MODE 0x07000000
100
101/* timer clock select registers */
102#define TxCKSL_SELECT 0x0f000000
103#define __TxCKSL_SELECT(X) ((X) << 24)
104#define TxCKSL_EIGHT 0xf0000000
105
106#endif /* _ASM_TIMER_REGS_H */
diff --git a/arch/frv/include/asm/timex.h b/arch/frv/include/asm/timex.h
new file mode 100644
index 000000000000..a89bddefdacf
--- /dev/null
+++ b/arch/frv/include/asm/timex.h
@@ -0,0 +1,20 @@
1/* timex.h: FR-V architecture timex specifications
2 */
3#ifndef _ASM_TIMEX_H
4#define _ASM_TIMEX_H
5
6#define CLOCK_TICK_RATE 1193180 /* Underlying HZ */
7#define CLOCK_TICK_FACTOR 20 /* Factor of both 1000000 and CLOCK_TICK_RATE */
8
9typedef unsigned long cycles_t;
10
11static inline cycles_t get_cycles(void)
12{
13 return 0;
14}
15
16#define vxtime_lock() do {} while (0)
17#define vxtime_unlock() do {} while (0)
18
19#endif
20
diff --git a/arch/frv/include/asm/tlb.h b/arch/frv/include/asm/tlb.h
new file mode 100644
index 000000000000..cd458eb6d75e
--- /dev/null
+++ b/arch/frv/include/asm/tlb.h
@@ -0,0 +1,27 @@
1#ifndef _ASM_TLB_H
2#define _ASM_TLB_H
3
4#include <asm/tlbflush.h>
5
6#ifdef CONFIG_MMU
7extern void check_pgt_cache(void);
8#else
9#define check_pgt_cache() do {} while(0)
10#endif
11
12/*
13 * we don't need any special per-pte or per-vma handling...
14 */
15#define tlb_start_vma(tlb, vma) do { } while (0)
16#define tlb_end_vma(tlb, vma) do { } while (0)
17#define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)
18
19/*
20 * .. because we flush the whole mm when it fills up
21 */
22#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
23
24#include <asm-generic/tlb.h>
25
26#endif /* _ASM_TLB_H */
27
diff --git a/arch/frv/include/asm/tlbflush.h b/arch/frv/include/asm/tlbflush.h
new file mode 100644
index 000000000000..7ac5eafc5d98
--- /dev/null
+++ b/arch/frv/include/asm/tlbflush.h
@@ -0,0 +1,73 @@
1/* tlbflush.h: TLB flushing functions
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_TLBFLUSH_H
13#define _ASM_TLBFLUSH_H
14
15#include <linux/mm.h>
16#include <asm/processor.h>
17
18#ifdef CONFIG_MMU
19
20#ifndef __ASSEMBLY__
21extern void asmlinkage __flush_tlb_all(void);
22extern void asmlinkage __flush_tlb_mm(unsigned long contextid);
23extern void asmlinkage __flush_tlb_page(unsigned long contextid, unsigned long start);
24extern void asmlinkage __flush_tlb_range(unsigned long contextid,
25 unsigned long start, unsigned long end);
26#endif /* !__ASSEMBLY__ */
27
28#define flush_tlb_all() \
29do { \
30 preempt_disable(); \
31 __flush_tlb_all(); \
32 preempt_enable(); \
33} while(0)
34
35#define flush_tlb_mm(mm) \
36do { \
37 preempt_disable(); \
38 __flush_tlb_mm((mm)->context.id); \
39 preempt_enable(); \
40} while(0)
41
42#define flush_tlb_range(vma,start,end) \
43do { \
44 preempt_disable(); \
45 __flush_tlb_range((vma)->vm_mm->context.id, start, end); \
46 preempt_enable(); \
47} while(0)
48
49#define flush_tlb_page(vma,addr) \
50do { \
51 preempt_disable(); \
52 __flush_tlb_page((vma)->vm_mm->context.id, addr); \
53 preempt_enable(); \
54} while(0)
55
56
57#define __flush_tlb_global() flush_tlb_all()
58#define flush_tlb() flush_tlb_all()
59#define flush_tlb_kernel_range(start, end) flush_tlb_all()
60
61#else
62
63#define flush_tlb() BUG()
64#define flush_tlb_all() BUG()
65#define flush_tlb_mm(mm) BUG()
66#define flush_tlb_page(vma,addr) BUG()
67#define flush_tlb_range(mm,start,end) BUG()
68#define flush_tlb_kernel_range(start, end) BUG()
69
70#endif
71
72
73#endif /* _ASM_TLBFLUSH_H */
diff --git a/arch/frv/include/asm/topology.h b/arch/frv/include/asm/topology.h
new file mode 100644
index 000000000000..942724352705
--- /dev/null
+++ b/arch/frv/include/asm/topology.h
@@ -0,0 +1,12 @@
1#ifndef _ASM_TOPOLOGY_H
2#define _ASM_TOPOLOGY_H
3
4#ifdef CONFIG_NUMA
5
6#error NUMA not supported yet
7
8#endif /* CONFIG_NUMA */
9
10#include <asm-generic/topology.h>
11
12#endif /* _ASM_TOPOLOGY_H */
diff --git a/arch/frv/include/asm/types.h b/arch/frv/include/asm/types.h
new file mode 100644
index 000000000000..613bf1e962f0
--- /dev/null
+++ b/arch/frv/include/asm/types.h
@@ -0,0 +1,40 @@
1/* types.h: FRV types
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_TYPES_H
13#define _ASM_TYPES_H
14
15#include <asm-generic/int-ll64.h>
16
17#ifndef __ASSEMBLY__
18
19typedef unsigned short umode_t;
20
21#endif /* __ASSEMBLY__ */
22
23/*
24 * These aren't exported outside the kernel to avoid name space clashes
25 */
26#ifdef __KERNEL__
27
28#define BITS_PER_LONG 32
29
30#ifndef __ASSEMBLY__
31
32/* Dma addresses are 32-bits wide. */
33
34typedef u32 dma_addr_t;
35
36#endif /* __ASSEMBLY__ */
37
38#endif /* __KERNEL__ */
39
40#endif /* _ASM_TYPES_H */
diff --git a/arch/frv/include/asm/uaccess.h b/arch/frv/include/asm/uaccess.h
new file mode 100644
index 000000000000..53650c958f41
--- /dev/null
+++ b/arch/frv/include/asm/uaccess.h
@@ -0,0 +1,321 @@
1/* uaccess.h: userspace accessor functions
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_UACCESS_H
13#define _ASM_UACCESS_H
14
15/*
16 * User space memory access functions
17 */
18#include <linux/sched.h>
19#include <linux/mm.h>
20#include <asm/segment.h>
21#include <asm/sections.h>
22
23#define HAVE_ARCH_UNMAPPED_AREA /* we decide where to put mmaps */
24
25#define __ptr(x) ((unsigned long __force *)(x))
26
27#define VERIFY_READ 0
28#define VERIFY_WRITE 1
29
30#define __addr_ok(addr) ((unsigned long)(addr) < get_addr_limit())
31
32/*
33 * check that a range of addresses falls within the current address limit
34 */
35static inline int ___range_ok(unsigned long addr, unsigned long size)
36{
37#ifdef CONFIG_MMU
38 int flag = -EFAULT, tmp;
39
40 asm volatile (
41 " addcc %3,%2,%1,icc0 \n" /* set C-flag if addr+size>4GB */
42 " subcc.p %1,%4,gr0,icc1 \n" /* jump if addr+size>limit */
43 " bc icc0,#0,0f \n"
44 " bhi icc1,#0,0f \n"
45 " setlos #0,%0 \n" /* mark okay */
46 "0: \n"
47 : "=r"(flag), "=&r"(tmp)
48 : "r"(addr), "r"(size), "r"(get_addr_limit()), "0"(flag)
49 );
50
51 return flag;
52
53#else
54
55 if (addr < memory_start ||
56 addr > memory_end ||
57 size > memory_end - memory_start ||
58 addr + size > memory_end)
59 return -EFAULT;
60
61 return 0;
62#endif
63}
64
65#define __range_ok(addr,size) ___range_ok((unsigned long) (addr), (unsigned long) (size))
66
67#define access_ok(type,addr,size) (__range_ok((void __user *)(addr), (size)) == 0)
68#define __access_ok(addr,size) (__range_ok((addr), (size)) == 0)
69
70/*
71 * The exception table consists of pairs of addresses: the first is the
72 * address of an instruction that is allowed to fault, and the second is
73 * the address at which the program should continue. No registers are
74 * modified, so it is entirely up to the continuation code to figure out
75 * what to do.
76 *
77 * All the routines below use bits of fixup code that are out of line
78 * with the main instruction path. This means when everything is well,
79 * we don't even have to jump over them. Further, they do not intrude
80 * on our cache or tlb entries.
81 */
82struct exception_table_entry
83{
84 unsigned long insn, fixup;
85};
86
87/* Returns 0 if exception not found and fixup otherwise. */
88extern unsigned long search_exception_table(unsigned long);
89
90
91/*
92 * These are the main single-value transfer routines. They automatically
93 * use the right size if we just have the right pointer type.
94 */
95#define __put_user(x, ptr) \
96({ \
97 int __pu_err = 0; \
98 \
99 typeof(*(ptr)) __pu_val = (x); \
100 __chk_user_ptr(ptr); \
101 \
102 switch (sizeof (*(ptr))) { \
103 case 1: \
104 __put_user_asm(__pu_err, __pu_val, ptr, "b", "r"); \
105 break; \
106 case 2: \
107 __put_user_asm(__pu_err, __pu_val, ptr, "h", "r"); \
108 break; \
109 case 4: \
110 __put_user_asm(__pu_err, __pu_val, ptr, "", "r"); \
111 break; \
112 case 8: \
113 __put_user_asm(__pu_err, __pu_val, ptr, "d", "e"); \
114 break; \
115 default: \
116 __pu_err = __put_user_bad(); \
117 break; \
118 } \
119 __pu_err; \
120})
121
122#define put_user(x, ptr) \
123({ \
124 typeof(*(ptr)) __user *_p = (ptr); \
125 int _e; \
126 \
127 _e = __range_ok(_p, sizeof(*_p)); \
128 if (_e == 0) \
129 _e = __put_user((x), _p); \
130 _e; \
131})
132
133extern int __put_user_bad(void);
134
135/*
136 * Tell gcc we read from memory instead of writing: this is because
137 * we do not write to any memory gcc knows about, so there are no
138 * aliasing issues.
139 */
140
141#ifdef CONFIG_MMU
142
143#define __put_user_asm(err,x,ptr,dsize,constraint) \
144do { \
145 asm volatile("1: st"dsize"%I1 %2,%M1 \n" \
146 "2: \n" \
147 ".subsection 2 \n" \
148 "3: setlos %3,%0 \n" \
149 " bra 2b \n" \
150 ".previous \n" \
151 ".section __ex_table,\"a\" \n" \
152 " .balign 8 \n" \
153 " .long 1b,3b \n" \
154 ".previous" \
155 : "=r" (err) \
156 : "m" (*__ptr(ptr)), constraint (x), "i"(-EFAULT), "0"(err) \
157 : "memory"); \
158} while (0)
159
160#else
161
162#define __put_user_asm(err,x,ptr,bwl,con) \
163do { \
164 asm(" st"bwl"%I0 %1,%M0 \n" \
165 " membar \n" \
166 : \
167 : "m" (*__ptr(ptr)), con (x) \
168 : "memory"); \
169} while (0)
170
171#endif
172
173/*****************************************************************************/
174/*
175 *
176 */
177#define __get_user(x, ptr) \
178({ \
179 int __gu_err = 0; \
180 __chk_user_ptr(ptr); \
181 \
182 switch (sizeof(*(ptr))) { \
183 case 1: { \
184 unsigned char __gu_val; \
185 __get_user_asm(__gu_err, __gu_val, ptr, "ub", "=r"); \
186 (x) = *(__force __typeof__(*(ptr)) *) &__gu_val; \
187 break; \
188 } \
189 case 2: { \
190 unsigned short __gu_val; \
191 __get_user_asm(__gu_err, __gu_val, ptr, "uh", "=r"); \
192 (x) = *(__force __typeof__(*(ptr)) *) &__gu_val; \
193 break; \
194 } \
195 case 4: { \
196 unsigned int __gu_val; \
197 __get_user_asm(__gu_err, __gu_val, ptr, "", "=r"); \
198 (x) = *(__force __typeof__(*(ptr)) *) &__gu_val; \
199 break; \
200 } \
201 case 8: { \
202 unsigned long long __gu_val; \
203 __get_user_asm(__gu_err, __gu_val, ptr, "d", "=e"); \
204 (x) = *(__force __typeof__(*(ptr)) *) &__gu_val; \
205 break; \
206 } \
207 default: \
208 __gu_err = __get_user_bad(); \
209 break; \
210 } \
211 __gu_err; \
212})
213
214#define get_user(x, ptr) \
215({ \
216 const typeof(*(ptr)) __user *_p = (ptr);\
217 int _e; \
218 \
219 _e = __range_ok(_p, sizeof(*_p)); \
220 if (likely(_e == 0)) \
221 _e = __get_user((x), _p); \
222 else \
223 (x) = (typeof(x)) 0; \
224 _e; \
225})
226
227extern int __get_user_bad(void);
228
229#ifdef CONFIG_MMU
230
231#define __get_user_asm(err,x,ptr,dtype,constraint) \
232do { \
233 asm("1: ld"dtype"%I2 %M2,%1 \n" \
234 "2: \n" \
235 ".subsection 2 \n" \
236 "3: setlos %3,%0 \n" \
237 " setlos #0,%1 \n" \
238 " bra 2b \n" \
239 ".previous \n" \
240 ".section __ex_table,\"a\" \n" \
241 " .balign 8 \n" \
242 " .long 1b,3b \n" \
243 ".previous" \
244 : "=r" (err), constraint (x) \
245 : "m" (*__ptr(ptr)), "i"(-EFAULT), "0"(err) \
246 ); \
247} while(0)
248
249#else
250
251#define __get_user_asm(err,x,ptr,bwl,con) \
252 asm(" ld"bwl"%I1 %M1,%0 \n" \
253 " membar \n" \
254 : con(x) \
255 : "m" (*__ptr(ptr)))
256
257#endif
258
259/*****************************************************************************/
260/*
261 *
262 */
263#define ____force(x) (__force void *)(void __user *)(x)
264#ifdef CONFIG_MMU
265extern long __memset_user(void *dst, unsigned long count);
266extern long __memcpy_user(void *dst, const void *src, unsigned long count);
267
268#define clear_user(dst,count) __memset_user(____force(dst), (count))
269#define __copy_from_user_inatomic(to, from, n) __memcpy_user((to), ____force(from), (n))
270#define __copy_to_user_inatomic(to, from, n) __memcpy_user(____force(to), (from), (n))
271
272#else
273
274#define clear_user(dst,count) (memset(____force(dst), 0, (count)), 0)
275#define __copy_from_user_inatomic(to, from, n) (memcpy((to), ____force(from), (n)), 0)
276#define __copy_to_user_inatomic(to, from, n) (memcpy(____force(to), (from), (n)), 0)
277
278#endif
279
280#define __clear_user clear_user
281
282static inline unsigned long __must_check
283__copy_to_user(void __user *to, const void *from, unsigned long n)
284{
285 might_sleep();
286 return __copy_to_user_inatomic(to, from, n);
287}
288
289static inline unsigned long
290__copy_from_user(void *to, const void __user *from, unsigned long n)
291{
292 might_sleep();
293 return __copy_from_user_inatomic(to, from, n);
294}
295
296static inline long copy_from_user(void *to, const void __user *from, unsigned long n)
297{
298 unsigned long ret = n;
299
300 if (likely(__access_ok(from, n)))
301 ret = __copy_from_user(to, from, n);
302
303 if (unlikely(ret != 0))
304 memset(to + (n - ret), 0, ret);
305
306 return ret;
307}
308
309static inline long copy_to_user(void __user *to, const void *from, unsigned long n)
310{
311 return likely(__access_ok(to, n)) ? __copy_to_user(to, from, n) : n;
312}
313
314extern long strncpy_from_user(char *dst, const char __user *src, long count);
315extern long strnlen_user(const char __user *src, long count);
316
317#define strlen_user(str) strnlen_user(str, 32767)
318
319extern unsigned long search_exception_table(unsigned long addr);
320
321#endif /* _ASM_UACCESS_H */
diff --git a/arch/frv/include/asm/ucontext.h b/arch/frv/include/asm/ucontext.h
new file mode 100644
index 000000000000..8d8c0c948007
--- /dev/null
+++ b/arch/frv/include/asm/ucontext.h
@@ -0,0 +1,12 @@
1#ifndef _ASM_UCONTEXT_H
2#define _ASM_UCONTEXT_H
3
4struct ucontext {
5 unsigned long uc_flags;
6 struct ucontext *uc_link;
7 stack_t uc_stack;
8 struct sigcontext uc_mcontext;
9 sigset_t uc_sigmask; /* mask last for extensibility */
10};
11
12#endif
diff --git a/arch/frv/include/asm/unaligned.h b/arch/frv/include/asm/unaligned.h
new file mode 100644
index 000000000000..6c61c05b2e0c
--- /dev/null
+++ b/arch/frv/include/asm/unaligned.h
@@ -0,0 +1,22 @@
1/* unaligned.h: unaligned access handler
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_UNALIGNED_H
13#define _ASM_UNALIGNED_H
14
15#include <linux/unaligned/le_byteshift.h>
16#include <linux/unaligned/be_struct.h>
17#include <linux/unaligned/generic.h>
18
19#define get_unaligned __get_unaligned_be
20#define put_unaligned __put_unaligned_be
21
22#endif /* _ASM_UNALIGNED_H */
diff --git a/arch/frv/include/asm/unistd.h b/arch/frv/include/asm/unistd.h
new file mode 100644
index 000000000000..edcfaf5f0414
--- /dev/null
+++ b/arch/frv/include/asm/unistd.h
@@ -0,0 +1,382 @@
1#ifndef _ASM_UNISTD_H_
2#define _ASM_UNISTD_H_
3
4/*
5 * This file contains the system call numbers.
6 */
7
8#define __NR_restart_syscall 0
9#define __NR_exit 1
10#define __NR_fork 2
11#define __NR_read 3
12#define __NR_write 4
13#define __NR_open 5
14#define __NR_close 6
15#define __NR_waitpid 7
16#define __NR_creat 8
17#define __NR_link 9
18#define __NR_unlink 10
19#define __NR_execve 11
20#define __NR_chdir 12
21#define __NR_time 13
22#define __NR_mknod 14
23#define __NR_chmod 15
24#define __NR_lchown 16
25#define __NR_break 17
26#define __NR_oldstat 18
27#define __NR_lseek 19
28#define __NR_getpid 20
29#define __NR_mount 21
30#define __NR_umount 22
31#define __NR_setuid 23
32#define __NR_getuid 24
33#define __NR_stime 25
34#define __NR_ptrace 26
35#define __NR_alarm 27
36#define __NR_oldfstat 28
37#define __NR_pause 29
38#define __NR_utime 30
39#define __NR_stty 31
40#define __NR_gtty 32
41#define __NR_access 33
42#define __NR_nice 34
43#define __NR_ftime 35
44#define __NR_sync 36
45#define __NR_kill 37
46#define __NR_rename 38
47#define __NR_mkdir 39
48#define __NR_rmdir 40
49#define __NR_dup 41
50#define __NR_pipe 42
51#define __NR_times 43
52#define __NR_prof 44
53#define __NR_brk 45
54#define __NR_setgid 46
55#define __NR_getgid 47
56#define __NR_signal 48
57#define __NR_geteuid 49
58#define __NR_getegid 50
59#define __NR_acct 51
60#define __NR_umount2 52
61#define __NR_lock 53
62#define __NR_ioctl 54
63#define __NR_fcntl 55
64#define __NR_mpx 56
65#define __NR_setpgid 57
66#define __NR_ulimit 58
67// #define __NR_oldolduname /* 59 */ obsolete
68#define __NR_umask 60
69#define __NR_chroot 61
70#define __NR_ustat 62
71#define __NR_dup2 63
72#define __NR_getppid 64
73#define __NR_getpgrp 65
74#define __NR_setsid 66
75#define __NR_sigaction 67
76#define __NR_sgetmask 68
77#define __NR_ssetmask 69
78#define __NR_setreuid 70
79#define __NR_setregid 71
80#define __NR_sigsuspend 72
81#define __NR_sigpending 73
82#define __NR_sethostname 74
83#define __NR_setrlimit 75
84#define __NR_getrlimit 76 /* Back compatible 2Gig limited rlimit */
85#define __NR_getrusage 77
86#define __NR_gettimeofday 78
87#define __NR_settimeofday 79
88#define __NR_getgroups 80
89#define __NR_setgroups 81
90#define __NR_select 82
91#define __NR_symlink 83
92#define __NR_oldlstat 84
93#define __NR_readlink 85
94#define __NR_uselib 86
95#define __NR_swapon 87
96#define __NR_reboot 88
97#define __NR_readdir 89
98// #define __NR_mmap 90 /* obsolete - not implemented */
99#define __NR_munmap 91
100#define __NR_truncate 92
101#define __NR_ftruncate 93
102#define __NR_fchmod 94
103#define __NR_fchown 95
104#define __NR_getpriority 96
105#define __NR_setpriority 97
106// #define __NR_profil /* 98 */ obsolete
107#define __NR_statfs 99
108#define __NR_fstatfs 100
109// #define __NR_ioperm /* 101 */ not supported
110#define __NR_socketcall 102
111#define __NR_syslog 103
112#define __NR_setitimer 104
113#define __NR_getitimer 105
114#define __NR_stat 106
115#define __NR_lstat 107
116#define __NR_fstat 108
117// #define __NR_olduname /* 109 */ obsolete
118// #define __NR_iopl /* 110 */ not supported
119#define __NR_vhangup 111
120// #define __NR_idle /* 112 */ Obsolete
121// #define __NR_vm86old /* 113 */ not supported
122#define __NR_wait4 114
123#define __NR_swapoff 115
124#define __NR_sysinfo 116
125#define __NR_ipc 117
126#define __NR_fsync 118
127#define __NR_sigreturn 119
128#define __NR_clone 120
129#define __NR_setdomainname 121
130#define __NR_uname 122
131// #define __NR_modify_ldt /* 123 */ not supported
132#define __NR_cacheflush 123
133#define __NR_adjtimex 124
134#define __NR_mprotect 125
135#define __NR_sigprocmask 126
136#define __NR_create_module 127
137#define __NR_init_module 128
138#define __NR_delete_module 129
139#define __NR_get_kernel_syms 130
140#define __NR_quotactl 131
141#define __NR_getpgid 132
142#define __NR_fchdir 133
143#define __NR_bdflush 134
144#define __NR_sysfs 135
145#define __NR_personality 136
146#define __NR_afs_syscall 137 /* Syscall for Andrew File System */
147#define __NR_setfsuid 138
148#define __NR_setfsgid 139
149#define __NR__llseek 140
150#define __NR_getdents 141
151#define __NR__newselect 142
152#define __NR_flock 143
153#define __NR_msync 144
154#define __NR_readv 145
155#define __NR_writev 146
156#define __NR_getsid 147
157#define __NR_fdatasync 148
158#define __NR__sysctl 149
159#define __NR_mlock 150
160#define __NR_munlock 151
161#define __NR_mlockall 152
162#define __NR_munlockall 153
163#define __NR_sched_setparam 154
164#define __NR_sched_getparam 155
165#define __NR_sched_setscheduler 156
166#define __NR_sched_getscheduler 157
167#define __NR_sched_yield 158
168#define __NR_sched_get_priority_max 159
169#define __NR_sched_get_priority_min 160
170#define __NR_sched_rr_get_interval 161
171#define __NR_nanosleep 162
172#define __NR_mremap 163
173#define __NR_setresuid 164
174#define __NR_getresuid 165
175// #define __NR_vm86 /* 166 */ not supported
176#define __NR_query_module 167
177#define __NR_poll 168
178#define __NR_nfsservctl 169
179#define __NR_setresgid 170
180#define __NR_getresgid 171
181#define __NR_prctl 172
182#define __NR_rt_sigreturn 173
183#define __NR_rt_sigaction 174
184#define __NR_rt_sigprocmask 175
185#define __NR_rt_sigpending 176
186#define __NR_rt_sigtimedwait 177
187#define __NR_rt_sigqueueinfo 178
188#define __NR_rt_sigsuspend 179
189#define __NR_pread64 180
190#define __NR_pwrite64 181
191#define __NR_chown 182
192#define __NR_getcwd 183
193#define __NR_capget 184
194#define __NR_capset 185
195#define __NR_sigaltstack 186
196#define __NR_sendfile 187
197#define __NR_getpmsg 188 /* some people actually want streams */
198#define __NR_putpmsg 189 /* some people actually want streams */
199#define __NR_vfork 190
200#define __NR_ugetrlimit 191 /* SuS compliant getrlimit */
201#define __NR_mmap2 192
202#define __NR_truncate64 193
203#define __NR_ftruncate64 194
204#define __NR_stat64 195
205#define __NR_lstat64 196
206#define __NR_fstat64 197
207#define __NR_lchown32 198
208#define __NR_getuid32 199
209#define __NR_getgid32 200
210#define __NR_geteuid32 201
211#define __NR_getegid32 202
212#define __NR_setreuid32 203
213#define __NR_setregid32 204
214#define __NR_getgroups32 205
215#define __NR_setgroups32 206
216#define __NR_fchown32 207
217#define __NR_setresuid32 208
218#define __NR_getresuid32 209
219#define __NR_setresgid32 210
220#define __NR_getresgid32 211
221#define __NR_chown32 212
222#define __NR_setuid32 213
223#define __NR_setgid32 214
224#define __NR_setfsuid32 215
225#define __NR_setfsgid32 216
226#define __NR_pivot_root 217
227#define __NR_mincore 218
228#define __NR_madvise 219
229
230#define __NR_getdents64 220
231#define __NR_fcntl64 221
232#define __NR_security 223 /* syscall for security modules */
233#define __NR_gettid 224
234#define __NR_readahead 225
235#define __NR_setxattr 226
236#define __NR_lsetxattr 227
237#define __NR_fsetxattr 228
238#define __NR_getxattr 229
239#define __NR_lgetxattr 230
240#define __NR_fgetxattr 231
241#define __NR_listxattr 232
242#define __NR_llistxattr 233
243#define __NR_flistxattr 234
244#define __NR_removexattr 235
245#define __NR_lremovexattr 236
246#define __NR_fremovexattr 237
247#define __NR_tkill 238
248#define __NR_sendfile64 239
249#define __NR_futex 240
250#define __NR_sched_setaffinity 241
251#define __NR_sched_getaffinity 242
252#define __NR_set_thread_area 243
253#define __NR_get_thread_area 244
254#define __NR_io_setup 245
255#define __NR_io_destroy 246
256#define __NR_io_getevents 247
257#define __NR_io_submit 248
258#define __NR_io_cancel 249
259#define __NR_fadvise64 250
260
261#define __NR_exit_group 252
262#define __NR_lookup_dcookie 253
263#define __NR_epoll_create 254
264#define __NR_epoll_ctl 255
265#define __NR_epoll_wait 256
266#define __NR_remap_file_pages 257
267#define __NR_set_tid_address 258
268#define __NR_timer_create 259
269#define __NR_timer_settime (__NR_timer_create+1)
270#define __NR_timer_gettime (__NR_timer_create+2)
271#define __NR_timer_getoverrun (__NR_timer_create+3)
272#define __NR_timer_delete (__NR_timer_create+4)
273#define __NR_clock_settime (__NR_timer_create+5)
274#define __NR_clock_gettime (__NR_timer_create+6)
275#define __NR_clock_getres (__NR_timer_create+7)
276#define __NR_clock_nanosleep (__NR_timer_create+8)
277#define __NR_statfs64 268
278#define __NR_fstatfs64 269
279#define __NR_tgkill 270
280#define __NR_utimes 271
281#define __NR_fadvise64_64 272
282#define __NR_vserver 273
283#define __NR_mbind 274
284#define __NR_get_mempolicy 275
285#define __NR_set_mempolicy 276
286#define __NR_mq_open 277
287#define __NR_mq_unlink (__NR_mq_open+1)
288#define __NR_mq_timedsend (__NR_mq_open+2)
289#define __NR_mq_timedreceive (__NR_mq_open+3)
290#define __NR_mq_notify (__NR_mq_open+4)
291#define __NR_mq_getsetattr (__NR_mq_open+5)
292#define __NR_kexec_load 283
293#define __NR_waitid 284
294/* #define __NR_sys_setaltroot 285 */
295#define __NR_add_key 286
296#define __NR_request_key 287
297#define __NR_keyctl 288
298#define __NR_ioprio_set 289
299#define __NR_ioprio_get 290
300#define __NR_inotify_init 291
301#define __NR_inotify_add_watch 292
302#define __NR_inotify_rm_watch 293
303#define __NR_migrate_pages 294
304#define __NR_openat 295
305#define __NR_mkdirat 296
306#define __NR_mknodat 297
307#define __NR_fchownat 298
308#define __NR_futimesat 299
309#define __NR_fstatat64 300
310#define __NR_unlinkat 301
311#define __NR_renameat 302
312#define __NR_linkat 303
313#define __NR_symlinkat 304
314#define __NR_readlinkat 305
315#define __NR_fchmodat 306
316#define __NR_faccessat 307
317#define __NR_pselect6 308
318#define __NR_ppoll 309
319#define __NR_unshare 310
320#define __NR_set_robust_list 311
321#define __NR_get_robust_list 312
322#define __NR_splice 313
323#define __NR_sync_file_range 314
324#define __NR_tee 315
325#define __NR_vmsplice 316
326#define __NR_move_pages 317
327#define __NR_getcpu 318
328#define __NR_epoll_pwait 319
329#define __NR_utimensat 320
330#define __NR_signalfd 321
331#define __NR_timerfd_create 322
332#define __NR_eventfd 323
333#define __NR_fallocate 324
334#define __NR_timerfd_settime 325
335#define __NR_timerfd_gettime 326
336#define __NR_signalfd4 327
337#define __NR_eventfd2 328
338#define __NR_epoll_create1 329
339#define __NR_dup3 330
340#define __NR_pipe2 331
341#define __NR_inotify_init1 332
342
343#ifdef __KERNEL__
344
345#define NR_syscalls 333
346
347#define __ARCH_WANT_IPC_PARSE_VERSION
348/* #define __ARCH_WANT_OLD_READDIR */
349#define __ARCH_WANT_OLD_STAT
350#define __ARCH_WANT_STAT64
351#define __ARCH_WANT_SYS_ALARM
352/* #define __ARCH_WANT_SYS_GETHOSTNAME */
353#define __ARCH_WANT_SYS_PAUSE
354/* #define __ARCH_WANT_SYS_SGETMASK */
355/* #define __ARCH_WANT_SYS_SIGNAL */
356#define __ARCH_WANT_SYS_TIME
357#define __ARCH_WANT_SYS_UTIME
358#define __ARCH_WANT_SYS_WAITPID
359#define __ARCH_WANT_SYS_SOCKETCALL
360#define __ARCH_WANT_SYS_FADVISE64
361#define __ARCH_WANT_SYS_GETPGRP
362#define __ARCH_WANT_SYS_LLSEEK
363#define __ARCH_WANT_SYS_NICE
364/* #define __ARCH_WANT_SYS_OLD_GETRLIMIT */
365#define __ARCH_WANT_SYS_OLDUMOUNT
366/* #define __ARCH_WANT_SYS_SIGPENDING */
367#define __ARCH_WANT_SYS_SIGPROCMASK
368#define __ARCH_WANT_SYS_RT_SIGACTION
369#define __ARCH_WANT_SYS_RT_SIGSUSPEND
370
371/*
372 * "Conditional" syscalls
373 *
374 * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
375 * but it doesn't work on all toolchains, so we just do it by hand
376 */
377#ifndef cond_syscall
378#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
379#endif
380
381#endif /* __KERNEL__ */
382#endif /* _ASM_UNISTD_H_ */
diff --git a/arch/frv/include/asm/user.h b/arch/frv/include/asm/user.h
new file mode 100644
index 000000000000..82fa8fab64ae
--- /dev/null
+++ b/arch/frv/include/asm/user.h
@@ -0,0 +1,80 @@
1/* user.h: FR-V core file format stuff
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11#ifndef _ASM_USER_H
12#define _ASM_USER_H
13
14#include <asm/page.h>
15#include <asm/registers.h>
16
17/* Core file format: The core file is written in such a way that gdb
18 * can understand it and provide useful information to the user (under
19 * linux we use the 'trad-core' bfd). There are quite a number of
20 * obstacles to being able to view the contents of the floating point
21 * registers, and until these are solved you will not be able to view
22 * the contents of them. Actually, you can read in the core file and
23 * look at the contents of the user struct to find out what the
24 * floating point registers contain.
25 *
26 * The actual file contents are as follows:
27 * UPAGE:
28 * 1 page consisting of a user struct that tells gdb what is present
29 * in the file. Directly after this is a copy of the task_struct,
30 * which is currently not used by gdb, but it may come in useful at
31 * some point. All of the registers are stored as part of the
32 * upage. The upage should always be only one page.
33 *
34 * DATA:
35 * The data area is stored. We use current->end_text to
36 * current->brk to pick up all of the user variables, plus any
37 * memory that may have been malloced. No attempt is made to
38 * determine if a page is demand-zero or if a page is totally
39 * unused, we just cover the entire range. All of the addresses are
40 * rounded in such a way that an integral number of pages is
41 * written.
42 *
43 * STACK:
44 * We need the stack information in order to get a meaningful
45 * backtrace. We need to write the data from (esp) to
46 * current->start_stack, so we round each of these off in order to
47 * be able to write an integer number of pages. The minimum core
48 * file size is 3 pages, or 12288 bytes.
49 */
50
51/* When the kernel dumps core, it starts by dumping the user struct -
52 * this will be used by gdb to figure out where the data and stack segments
53 * are within the file, and what virtual addresses to use.
54 */
55struct user {
56 /* We start with the registers, to mimic the way that "memory" is returned
57 * from the ptrace(3,...) function. */
58 struct user_context regs;
59
60 /* The rest of this junk is to help gdb figure out what goes where */
61 unsigned long u_tsize; /* Text segment size (pages). */
62 unsigned long u_dsize; /* Data segment size (pages). */
63 unsigned long u_ssize; /* Stack segment size (pages). */
64 unsigned long start_code; /* Starting virtual address of text. */
65 unsigned long start_stack; /* Starting virtual address of stack area.
66 * This is actually the bottom of the stack,
67 * the top of the stack is always found in the
68 * esp register. */
69 long int signal; /* Signal that caused the core dump. */
70
71 unsigned long magic; /* To uniquely identify a core file */
72 char u_comm[32]; /* User command that was responsible */
73};
74
75#define NBPG PAGE_SIZE
76#define UPAGES 1
77#define HOST_TEXT_START_ADDR (u.start_code)
78#define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG)
79
80#endif
diff --git a/arch/frv/include/asm/vga.h b/arch/frv/include/asm/vga.h
new file mode 100644
index 000000000000..a702c800a229
--- /dev/null
+++ b/arch/frv/include/asm/vga.h
@@ -0,0 +1,17 @@
1/* vga.h: VGA register stuff
2 *
3 * Copyright (C) 2006 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_VGA_H
13#define _ASM_VGA_H
14
15
16
17#endif /* _ASM_VGA_H */
diff --git a/arch/frv/include/asm/virtconvert.h b/arch/frv/include/asm/virtconvert.h
new file mode 100644
index 000000000000..59788fa2a813
--- /dev/null
+++ b/arch/frv/include/asm/virtconvert.h
@@ -0,0 +1,41 @@
1/* virtconvert.h: virtual/physical/page address convertion
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11#ifndef _ASM_VIRTCONVERT_H
12#define _ASM_VIRTCONVERT_H
13
14/*
15 * Macros used for converting between virtual and physical mappings.
16 */
17
18#ifdef __KERNEL__
19
20#include <asm/setup.h>
21
22#ifdef CONFIG_MMU
23
24#define phys_to_virt(vaddr) ((void *) ((unsigned long)(vaddr) + PAGE_OFFSET))
25#define virt_to_phys(vaddr) ((unsigned long) (vaddr) - PAGE_OFFSET)
26
27#else
28
29#define phys_to_virt(vaddr) ((void *) (vaddr))
30#define virt_to_phys(vaddr) ((unsigned long) (vaddr))
31
32#endif
33
34#define virt_to_bus virt_to_phys
35#define bus_to_virt phys_to_virt
36
37#define __page_address(page) (PAGE_OFFSET + (((page) - mem_map) << PAGE_SHIFT))
38#define page_to_phys(page) virt_to_phys((void *)__page_address(page))
39
40#endif
41#endif
diff --git a/arch/frv/include/asm/xor.h b/arch/frv/include/asm/xor.h
new file mode 100644
index 000000000000..c82eb12a5b18
--- /dev/null
+++ b/arch/frv/include/asm/xor.h
@@ -0,0 +1 @@
#include <asm-generic/xor.h>
diff --git a/arch/h8300/include/asm/timer.h b/arch/h8300/include/asm/timer.h
new file mode 100644
index 000000000000..def80464d38f
--- /dev/null
+++ b/arch/h8300/include/asm/timer.h
@@ -0,0 +1,25 @@
1#ifndef __H8300_TIMER_H
2#define __H8300_TIMER_H
3
4void h8300_timer_tick(void);
5void h8300_timer_setup(void);
6void h8300_gettod(unsigned int *year, unsigned int *mon, unsigned int *day,
7 unsigned int *hour, unsigned int *min, unsigned int *sec);
8
9#define TIMER_FREQ (CONFIG_CPU_CLOCK*10000) /* Timer input freq. */
10
11#define calc_param(cnt, div, rate, limit) \
12do { \
13 cnt = TIMER_FREQ / HZ; \
14 for (div = 0; div < ARRAY_SIZE(divide_rate); div++) { \
15 if (rate[div] == 0) \
16 continue; \
17 if ((cnt / rate[div]) > limit) \
18 break; \
19 } \
20 if (div == ARRAY_SIZE(divide_rate)) \
21 panic("Timer counter overflow"); \
22 cnt /= divide_rate[div]; \
23} while(0)
24
25#endif
diff --git a/arch/ia64/include/asm/unistd.h b/arch/ia64/include/asm/unistd.h
index 9015979ebe0f..10a9eb05f74d 100644
--- a/arch/ia64/include/asm/unistd.h
+++ b/arch/ia64/include/asm/unistd.h
@@ -308,11 +308,13 @@
308#define __NR_dup3 1316 308#define __NR_dup3 1316
309#define __NR_pipe2 1317 309#define __NR_pipe2 1317
310#define __NR_inotify_init1 1318 310#define __NR_inotify_init1 1318
311#define __NR_preadv 1319
312#define __NR_pwritev 1320
311 313
312#ifdef __KERNEL__ 314#ifdef __KERNEL__
313 315
314 316
315#define NR_syscalls 295 /* length of syscall table */ 317#define NR_syscalls 297 /* length of syscall table */
316 318
317/* 319/*
318 * The following defines stop scripts/checksyscalls.sh from complaining about 320 * The following defines stop scripts/checksyscalls.sh from complaining about
diff --git a/arch/ia64/kernel/entry.S b/arch/ia64/kernel/entry.S
index 8dc69669586a..7bebac0e1d44 100644
--- a/arch/ia64/kernel/entry.S
+++ b/arch/ia64/kernel/entry.S
@@ -1803,6 +1803,8 @@ sys_call_table:
1803 data8 sys_dup3 1803 data8 sys_dup3
1804 data8 sys_pipe2 1804 data8 sys_pipe2
1805 data8 sys_inotify_init1 1805 data8 sys_inotify_init1
1806 data8 sys_preadv
1807 data8 sys_pwritev // 1320
1806 1808
1807 .org sys_call_table + 8*NR_syscalls // guard against failures to increase NR_syscalls 1809 .org sys_call_table + 8*NR_syscalls // guard against failures to increase NR_syscalls
1808#endif /* __IA64_ASM_PARAVIRTUALIZED_NATIVE */ 1810#endif /* __IA64_ASM_PARAVIRTUALIZED_NATIVE */
diff --git a/arch/ia64/kernel/pci-swiotlb.c b/arch/ia64/kernel/pci-swiotlb.c
index 573f02c39a00..285aae8431c6 100644
--- a/arch/ia64/kernel/pci-swiotlb.c
+++ b/arch/ia64/kernel/pci-swiotlb.c
@@ -16,7 +16,7 @@ EXPORT_SYMBOL(swiotlb);
16static void *ia64_swiotlb_alloc_coherent(struct device *dev, size_t size, 16static void *ia64_swiotlb_alloc_coherent(struct device *dev, size_t size,
17 dma_addr_t *dma_handle, gfp_t gfp) 17 dma_addr_t *dma_handle, gfp_t gfp)
18{ 18{
19 if (dev->coherent_dma_mask != DMA_64BIT_MASK) 19 if (dev->coherent_dma_mask != DMA_BIT_MASK(64))
20 gfp |= GFP_DMA; 20 gfp |= GFP_DMA;
21 return swiotlb_alloc_coherent(dev, size, dma_handle, gfp); 21 return swiotlb_alloc_coherent(dev, size, dma_handle, gfp);
22} 22}
diff --git a/arch/m32r/include/asm/Kbuild b/arch/m32r/include/asm/Kbuild
new file mode 100644
index 000000000000..c68e1680da01
--- /dev/null
+++ b/arch/m32r/include/asm/Kbuild
@@ -0,0 +1 @@
include include/asm-generic/Kbuild.asm
diff --git a/arch/m32r/include/asm/addrspace.h b/arch/m32r/include/asm/addrspace.h
new file mode 100644
index 000000000000..81782c122da4
--- /dev/null
+++ b/arch/m32r/include/asm/addrspace.h
@@ -0,0 +1,57 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2001 by Hiroyuki Kondo
7 *
8 * Defitions for the address spaces of the M32R CPUs.
9 */
10#ifndef __ASM_M32R_ADDRSPACE_H
11#define __ASM_M32R_ADDRSPACE_H
12
13/*
14 * Memory segments (32bit kernel mode addresses)
15 */
16#define KUSEG 0x00000000
17#define KSEG0 0x80000000
18#define KSEG1 0xa0000000
19#define KSEG2 0xc0000000
20#define KSEG3 0xe0000000
21
22#define K0BASE KSEG0
23
24/*
25 * Returns the kernel segment base of a given address
26 */
27#ifndef __ASSEMBLY__
28#define KSEGX(a) (((unsigned long)(a)) & 0xe0000000)
29#else
30#define KSEGX(a) ((a) & 0xe0000000)
31#endif
32
33/*
34 * Returns the physical address of a KSEG0/KSEG1 address
35 */
36#ifndef __ASSEMBLY__
37#define PHYSADDR(a) (((unsigned long)(a)) & 0x1fffffff)
38#else
39#define PHYSADDR(a) ((a) & 0x1fffffff)
40#endif
41
42/*
43 * Map an address to a certain kernel segment
44 */
45#ifndef __ASSEMBLY__
46#define KSEG0ADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | KSEG0))
47#define KSEG1ADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | KSEG1))
48#define KSEG2ADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | KSEG2))
49#define KSEG3ADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | KSEG3))
50#else
51#define KSEG0ADDR(a) (((a) & 0x1fffffff) | KSEG0)
52#define KSEG1ADDR(a) (((a) & 0x1fffffff) | KSEG1)
53#define KSEG2ADDR(a) (((a) & 0x1fffffff) | KSEG2)
54#define KSEG3ADDR(a) (((a) & 0x1fffffff) | KSEG3)
55#endif
56
57#endif /* __ASM_M32R_ADDRSPACE_H */
diff --git a/arch/m32r/include/asm/assembler.h b/arch/m32r/include/asm/assembler.h
new file mode 100644
index 000000000000..26351539b5ff
--- /dev/null
+++ b/arch/m32r/include/asm/assembler.h
@@ -0,0 +1,229 @@
1#ifndef _ASM_M32R_ASSEMBLER_H
2#define _ASM_M32R_ASSEMBLER_H
3
4/*
5 * linux/asm-m32r/assembler.h
6 *
7 * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
8 *
9 * This file contains M32R architecture specific macro definitions.
10 */
11
12
13#ifndef __STR
14#ifdef __ASSEMBLY__
15#define __STR(x) x
16#else
17#define __STR(x) #x
18#endif
19#endif /* __STR */
20
21#ifdef CONFIG_SMP
22#define M32R_LOCK __STR(lock)
23#define M32R_UNLOCK __STR(unlock)
24#else
25#define M32R_LOCK __STR(ld)
26#define M32R_UNLOCK __STR(st)
27#endif
28
29#ifdef __ASSEMBLY__
30#undef ENTRY
31#define ENTRY(name) ENTRY_M name
32 .macro ENTRY_M name
33 .global \name
34 ALIGN
35\name:
36 .endm
37#endif
38
39
40/**
41 * LDIMM - load immediate value
42 * STI - enable interruption
43 * CLI - disable interruption
44 */
45
46#ifdef __ASSEMBLY__
47
48#define LDIMM(reg,x) LDIMM reg x
49 .macro LDIMM reg x
50 seth \reg, #high(\x)
51 or3 \reg, \reg, #low(\x)
52 .endm
53
54#if !(defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_M32104))
55#define ENABLE_INTERRUPTS(reg) ENABLE_INTERRUPTS reg
56 .macro ENABLE_INTERRUPTS reg
57 setpsw #0x40 -> nop
58 ; WORKAROUND: "-> nop" is a workaround for the M32700(TS1).
59 .endm
60
61#define DISABLE_INTERRUPTS(reg) DISABLE_INTERRUPTS reg
62 .macro DISABLE_INTERRUPTS reg
63 clrpsw #0x40 -> nop
64 ; WORKAROUND: "-> nop" is a workaround for the M32700(TS1).
65 .endm
66#else /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
67#define ENABLE_INTERRUPTS(reg) ENABLE_INTERRUPTS reg
68 .macro ENABLE_INTERRUPTS reg
69 mvfc \reg, psw
70 or3 \reg, \reg, #0x0040
71 mvtc \reg, psw
72 .endm
73
74#define DISABLE_INTERRUPTS(reg) DISABLE_INTERRUPTS reg
75 .macro DISABLE_INTERRUPTS reg
76 mvfc \reg, psw
77 and3 \reg, \reg, #0xffbf
78 mvtc \reg, psw
79 .endm
80#endif /* CONFIG_CHIP_M32102 */
81
82 .macro SAVE_ALL
83 push r0 ; orig_r0
84 push sp ; spi (r15)
85 push lr ; r14
86 push r13
87 mvfc r13, cr3 ; spu
88 push r13
89 mvfc r13, bbpc
90 push r13
91 mvfc r13, bbpsw
92 push r13
93 mvfc r13, bpc
94 push r13
95 mvfc r13, psw
96 push r13
97#if defined(CONFIG_ISA_M32R2) && defined(CONFIG_ISA_DSP_LEVEL2)
98 mvfaclo r13, a1
99 push r13
100 mvfachi r13, a1
101 push r13
102 mvfaclo r13, a0
103 push r13
104 mvfachi r13, a0
105 push r13
106#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R)
107 mvfaclo r13
108 push r13
109 mvfachi r13
110 push r13
111 ldi r13, #0
112 push r13 ; dummy push acc1h
113 push r13 ; dummy push acc1l
114#else
115#error unknown isa configuration
116#endif
117 ldi r13, #-1
118 push r13 ; syscall_nr (default: -1)
119 push r12
120 push r11
121 push r10
122 push r9
123 push r8
124 push r7
125 push r3
126 push r2
127 push r1
128 push r0
129 addi sp, #-4 ; room for implicit pt_regs parameter
130 push r6
131 push r5
132 push r4
133 .endm
134
135 .macro RESTORE_ALL
136 pop r4
137 pop r5
138 pop r6
139 addi sp, #4
140 pop r0
141 pop r1
142 pop r2
143 pop r3
144 pop r7
145 pop r8
146 pop r9
147 pop r10
148 pop r11
149 pop r12
150 addi r15, #4 ; Skip syscall number
151#if defined(CONFIG_ISA_M32R2) && defined(CONFIG_ISA_DSP_LEVEL2)
152 pop r13
153 mvtachi r13, a0
154 pop r13
155 mvtaclo r13, a0
156 pop r13
157 mvtachi r13, a1
158 pop r13
159 mvtaclo r13, a1
160#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R)
161 pop r13 ; dummy pop acc1h
162 pop r13 ; dummy pop acc1l
163 pop r13
164 mvtachi r13
165 pop r13
166 mvtaclo r13
167#else
168#error unknown isa configuration
169#endif
170 pop r14
171 mvtc r14, psw
172 pop r14
173 mvtc r14, bpc
174 addi sp, #8 ; Skip bbpsw, bbpc
175 pop r14
176 mvtc r14, cr3 ; spu
177 pop r13
178 pop lr ; r14
179 pop sp ; spi (r15)
180 addi sp, #4 ; Skip orig_r0
181 .fillinsn
1821: rte
183 .section .fixup,"ax"
1842: bl do_exit
185 .previous
186 .section __ex_table,"a"
187 ALIGN
188 .long 1b, 2b
189 .previous
190 .endm
191
192#define GET_CURRENT(reg) get_current reg
193 .macro get_current reg
194 ldi \reg, #-8192
195 and \reg, sp
196 .endm
197
198#if !(defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_M32104))
199 .macro SWITCH_TO_KERNEL_STACK
200 ; switch to kernel stack (spi)
201 clrpsw #0x80 -> nop
202 .endm
203#else /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
204 .macro SWITCH_TO_KERNEL_STACK
205 push r0 ; save r0 for working
206 mvfc r0, psw
207 and3 r0, r0, #0x00ff7f
208 mvtc r0, psw
209 slli r0, #16
210 bltz r0, 1f ; check BSM-bit
211;
212 ;; called from kernel context: previous stack = spi
213 pop r0 ; retrieve r0
214 bra 2f
215 .fillinsn
2161:
217 ;; called from user context: previous stack = spu
218 mvfc r0, cr3 ; spu
219 addi r0, #4
220 mvtc r0, cr3 ; spu
221 ld r0, @(-4,r0) ; retrieve r0
222 .fillinsn
2232:
224 .endm
225#endif /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
226
227#endif /* __ASSEMBLY__ */
228
229#endif /* _ASM_M32R_ASSEMBLER_H */
diff --git a/arch/m32r/include/asm/atomic.h b/arch/m32r/include/asm/atomic.h
new file mode 100644
index 000000000000..2eed30f84080
--- /dev/null
+++ b/arch/m32r/include/asm/atomic.h
@@ -0,0 +1,318 @@
1#ifndef _ASM_M32R_ATOMIC_H
2#define _ASM_M32R_ATOMIC_H
3
4/*
5 * linux/include/asm-m32r/atomic.h
6 *
7 * M32R version:
8 * Copyright (C) 2001, 2002 Hitoshi Yamamoto
9 * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
10 */
11
12#include <linux/types.h>
13#include <asm/assembler.h>
14#include <asm/system.h>
15
16/*
17 * Atomic operations that C can't guarantee us. Useful for
18 * resource counting etc..
19 */
20
21#define ATOMIC_INIT(i) { (i) }
22
23/**
24 * atomic_read - read atomic variable
25 * @v: pointer of type atomic_t
26 *
27 * Atomically reads the value of @v.
28 */
29#define atomic_read(v) ((v)->counter)
30
31/**
32 * atomic_set - set atomic variable
33 * @v: pointer of type atomic_t
34 * @i: required value
35 *
36 * Atomically sets the value of @v to @i.
37 */
38#define atomic_set(v,i) (((v)->counter) = (i))
39
40/**
41 * atomic_add_return - add integer to atomic variable and return it
42 * @i: integer value to add
43 * @v: pointer of type atomic_t
44 *
45 * Atomically adds @i to @v and return (@i + @v).
46 */
47static __inline__ int atomic_add_return(int i, atomic_t *v)
48{
49 unsigned long flags;
50 int result;
51
52 local_irq_save(flags);
53 __asm__ __volatile__ (
54 "# atomic_add_return \n\t"
55 DCACHE_CLEAR("%0", "r4", "%1")
56 M32R_LOCK" %0, @%1; \n\t"
57 "add %0, %2; \n\t"
58 M32R_UNLOCK" %0, @%1; \n\t"
59 : "=&r" (result)
60 : "r" (&v->counter), "r" (i)
61 : "memory"
62#ifdef CONFIG_CHIP_M32700_TS1
63 , "r4"
64#endif /* CONFIG_CHIP_M32700_TS1 */
65 );
66 local_irq_restore(flags);
67
68 return result;
69}
70
71/**
72 * atomic_sub_return - subtract integer from atomic variable and return it
73 * @i: integer value to subtract
74 * @v: pointer of type atomic_t
75 *
76 * Atomically subtracts @i from @v and return (@v - @i).
77 */
78static __inline__ int atomic_sub_return(int i, atomic_t *v)
79{
80 unsigned long flags;
81 int result;
82
83 local_irq_save(flags);
84 __asm__ __volatile__ (
85 "# atomic_sub_return \n\t"
86 DCACHE_CLEAR("%0", "r4", "%1")
87 M32R_LOCK" %0, @%1; \n\t"
88 "sub %0, %2; \n\t"
89 M32R_UNLOCK" %0, @%1; \n\t"
90 : "=&r" (result)
91 : "r" (&v->counter), "r" (i)
92 : "memory"
93#ifdef CONFIG_CHIP_M32700_TS1
94 , "r4"
95#endif /* CONFIG_CHIP_M32700_TS1 */
96 );
97 local_irq_restore(flags);
98
99 return result;
100}
101
102/**
103 * atomic_add - add integer to atomic variable
104 * @i: integer value to add
105 * @v: pointer of type atomic_t
106 *
107 * Atomically adds @i to @v.
108 */
109#define atomic_add(i,v) ((void) atomic_add_return((i), (v)))
110
111/**
112 * atomic_sub - subtract the atomic variable
113 * @i: integer value to subtract
114 * @v: pointer of type atomic_t
115 *
116 * Atomically subtracts @i from @v.
117 */
118#define atomic_sub(i,v) ((void) atomic_sub_return((i), (v)))
119
120/**
121 * atomic_sub_and_test - subtract value from variable and test result
122 * @i: integer value to subtract
123 * @v: pointer of type atomic_t
124 *
125 * Atomically subtracts @i from @v and returns
126 * true if the result is zero, or false for all
127 * other cases.
128 */
129#define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0)
130
131/**
132 * atomic_inc_return - increment atomic variable and return it
133 * @v: pointer of type atomic_t
134 *
135 * Atomically increments @v by 1 and returns the result.
136 */
137static __inline__ int atomic_inc_return(atomic_t *v)
138{
139 unsigned long flags;
140 int result;
141
142 local_irq_save(flags);
143 __asm__ __volatile__ (
144 "# atomic_inc_return \n\t"
145 DCACHE_CLEAR("%0", "r4", "%1")
146 M32R_LOCK" %0, @%1; \n\t"
147 "addi %0, #1; \n\t"
148 M32R_UNLOCK" %0, @%1; \n\t"
149 : "=&r" (result)
150 : "r" (&v->counter)
151 : "memory"
152#ifdef CONFIG_CHIP_M32700_TS1
153 , "r4"
154#endif /* CONFIG_CHIP_M32700_TS1 */
155 );
156 local_irq_restore(flags);
157
158 return result;
159}
160
161/**
162 * atomic_dec_return - decrement atomic variable and return it
163 * @v: pointer of type atomic_t
164 *
165 * Atomically decrements @v by 1 and returns the result.
166 */
167static __inline__ int atomic_dec_return(atomic_t *v)
168{
169 unsigned long flags;
170 int result;
171
172 local_irq_save(flags);
173 __asm__ __volatile__ (
174 "# atomic_dec_return \n\t"
175 DCACHE_CLEAR("%0", "r4", "%1")
176 M32R_LOCK" %0, @%1; \n\t"
177 "addi %0, #-1; \n\t"
178 M32R_UNLOCK" %0, @%1; \n\t"
179 : "=&r" (result)
180 : "r" (&v->counter)
181 : "memory"
182#ifdef CONFIG_CHIP_M32700_TS1
183 , "r4"
184#endif /* CONFIG_CHIP_M32700_TS1 */
185 );
186 local_irq_restore(flags);
187
188 return result;
189}
190
191/**
192 * atomic_inc - increment atomic variable
193 * @v: pointer of type atomic_t
194 *
195 * Atomically increments @v by 1.
196 */
197#define atomic_inc(v) ((void)atomic_inc_return(v))
198
199/**
200 * atomic_dec - decrement atomic variable
201 * @v: pointer of type atomic_t
202 *
203 * Atomically decrements @v by 1.
204 */
205#define atomic_dec(v) ((void)atomic_dec_return(v))
206
207/**
208 * atomic_inc_and_test - increment and test
209 * @v: pointer of type atomic_t
210 *
211 * Atomically increments @v by 1
212 * and returns true if the result is zero, or false for all
213 * other cases.
214 */
215#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
216
217/**
218 * atomic_dec_and_test - decrement and test
219 * @v: pointer of type atomic_t
220 *
221 * Atomically decrements @v by 1 and
222 * returns true if the result is 0, or false for all
223 * other cases.
224 */
225#define atomic_dec_and_test(v) (atomic_dec_return(v) == 0)
226
227/**
228 * atomic_add_negative - add and test if negative
229 * @v: pointer of type atomic_t
230 * @i: integer value to add
231 *
232 * Atomically adds @i to @v and returns true
233 * if the result is negative, or false when
234 * result is greater than or equal to zero.
235 */
236#define atomic_add_negative(i,v) (atomic_add_return((i), (v)) < 0)
237
238#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
239#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
240
241/**
242 * atomic_add_unless - add unless the number is a given value
243 * @v: pointer of type atomic_t
244 * @a: the amount to add to v...
245 * @u: ...unless v is equal to u.
246 *
247 * Atomically adds @a to @v, so long as it was not @u.
248 * Returns non-zero if @v was not @u, and zero otherwise.
249 */
250static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
251{
252 int c, old;
253 c = atomic_read(v);
254 for (;;) {
255 if (unlikely(c == (u)))
256 break;
257 old = atomic_cmpxchg((v), c, c + (a));
258 if (likely(old == c))
259 break;
260 c = old;
261 }
262 return c != (u);
263}
264
265#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
266
267static __inline__ void atomic_clear_mask(unsigned long mask, atomic_t *addr)
268{
269 unsigned long flags;
270 unsigned long tmp;
271
272 local_irq_save(flags);
273 __asm__ __volatile__ (
274 "# atomic_clear_mask \n\t"
275 DCACHE_CLEAR("%0", "r5", "%1")
276 M32R_LOCK" %0, @%1; \n\t"
277 "and %0, %2; \n\t"
278 M32R_UNLOCK" %0, @%1; \n\t"
279 : "=&r" (tmp)
280 : "r" (addr), "r" (~mask)
281 : "memory"
282#ifdef CONFIG_CHIP_M32700_TS1
283 , "r5"
284#endif /* CONFIG_CHIP_M32700_TS1 */
285 );
286 local_irq_restore(flags);
287}
288
289static __inline__ void atomic_set_mask(unsigned long mask, atomic_t *addr)
290{
291 unsigned long flags;
292 unsigned long tmp;
293
294 local_irq_save(flags);
295 __asm__ __volatile__ (
296 "# atomic_set_mask \n\t"
297 DCACHE_CLEAR("%0", "r5", "%1")
298 M32R_LOCK" %0, @%1; \n\t"
299 "or %0, %2; \n\t"
300 M32R_UNLOCK" %0, @%1; \n\t"
301 : "=&r" (tmp)
302 : "r" (addr), "r" (mask)
303 : "memory"
304#ifdef CONFIG_CHIP_M32700_TS1
305 , "r5"
306#endif /* CONFIG_CHIP_M32700_TS1 */
307 );
308 local_irq_restore(flags);
309}
310
311/* Atomic operations are already serializing on m32r */
312#define smp_mb__before_atomic_dec() barrier()
313#define smp_mb__after_atomic_dec() barrier()
314#define smp_mb__before_atomic_inc() barrier()
315#define smp_mb__after_atomic_inc() barrier()
316
317#include <asm-generic/atomic.h>
318#endif /* _ASM_M32R_ATOMIC_H */
diff --git a/arch/m32r/include/asm/auxvec.h b/arch/m32r/include/asm/auxvec.h
new file mode 100644
index 000000000000..f76dcc860fae
--- /dev/null
+++ b/arch/m32r/include/asm/auxvec.h
@@ -0,0 +1,4 @@
1#ifndef _ASM_M32R__AUXVEC_H
2#define _ASM_M32R__AUXVEC_H
3
4#endif /* _ASM_M32R__AUXVEC_H */
diff --git a/arch/m32r/include/asm/bitops.h b/arch/m32r/include/asm/bitops.h
new file mode 100644
index 000000000000..aaddf0d57603
--- /dev/null
+++ b/arch/m32r/include/asm/bitops.h
@@ -0,0 +1,275 @@
1#ifndef _ASM_M32R_BITOPS_H
2#define _ASM_M32R_BITOPS_H
3
4/*
5 * linux/include/asm-m32r/bitops.h
6 *
7 * Copyright 1992, Linus Torvalds.
8 *
9 * M32R version:
10 * Copyright (C) 2001, 2002 Hitoshi Yamamoto
11 * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
12 */
13
14#ifndef _LINUX_BITOPS_H
15#error only <linux/bitops.h> can be included directly
16#endif
17
18#include <linux/compiler.h>
19#include <asm/assembler.h>
20#include <asm/system.h>
21#include <asm/byteorder.h>
22#include <asm/types.h>
23
24/*
25 * These have to be done with inline assembly: that way the bit-setting
26 * is guaranteed to be atomic. All bit operations return 0 if the bit
27 * was cleared before the operation and != 0 if it was not.
28 *
29 * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
30 */
31
32/**
33 * set_bit - Atomically set a bit in memory
34 * @nr: the bit to set
35 * @addr: the address to start counting from
36 *
37 * This function is atomic and may not be reordered. See __set_bit()
38 * if you do not require the atomic guarantees.
39 * Note that @nr may be almost arbitrarily large; this function is not
40 * restricted to acting on a single-word quantity.
41 */
42static __inline__ void set_bit(int nr, volatile void * addr)
43{
44 __u32 mask;
45 volatile __u32 *a = addr;
46 unsigned long flags;
47 unsigned long tmp;
48
49 a += (nr >> 5);
50 mask = (1 << (nr & 0x1F));
51
52 local_irq_save(flags);
53 __asm__ __volatile__ (
54 DCACHE_CLEAR("%0", "r6", "%1")
55 M32R_LOCK" %0, @%1; \n\t"
56 "or %0, %2; \n\t"
57 M32R_UNLOCK" %0, @%1; \n\t"
58 : "=&r" (tmp)
59 : "r" (a), "r" (mask)
60 : "memory"
61#ifdef CONFIG_CHIP_M32700_TS1
62 , "r6"
63#endif /* CONFIG_CHIP_M32700_TS1 */
64 );
65 local_irq_restore(flags);
66}
67
68/**
69 * clear_bit - Clears a bit in memory
70 * @nr: Bit to clear
71 * @addr: Address to start counting from
72 *
73 * clear_bit() is atomic and may not be reordered. However, it does
74 * not contain a memory barrier, so if it is used for locking purposes,
75 * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
76 * in order to ensure changes are visible on other processors.
77 */
78static __inline__ void clear_bit(int nr, volatile void * addr)
79{
80 __u32 mask;
81 volatile __u32 *a = addr;
82 unsigned long flags;
83 unsigned long tmp;
84
85 a += (nr >> 5);
86 mask = (1 << (nr & 0x1F));
87
88 local_irq_save(flags);
89
90 __asm__ __volatile__ (
91 DCACHE_CLEAR("%0", "r6", "%1")
92 M32R_LOCK" %0, @%1; \n\t"
93 "and %0, %2; \n\t"
94 M32R_UNLOCK" %0, @%1; \n\t"
95 : "=&r" (tmp)
96 : "r" (a), "r" (~mask)
97 : "memory"
98#ifdef CONFIG_CHIP_M32700_TS1
99 , "r6"
100#endif /* CONFIG_CHIP_M32700_TS1 */
101 );
102 local_irq_restore(flags);
103}
104
105#define smp_mb__before_clear_bit() barrier()
106#define smp_mb__after_clear_bit() barrier()
107
108/**
109 * change_bit - Toggle a bit in memory
110 * @nr: Bit to clear
111 * @addr: Address to start counting from
112 *
113 * change_bit() is atomic and may not be reordered.
114 * Note that @nr may be almost arbitrarily large; this function is not
115 * restricted to acting on a single-word quantity.
116 */
117static __inline__ void change_bit(int nr, volatile void * addr)
118{
119 __u32 mask;
120 volatile __u32 *a = addr;
121 unsigned long flags;
122 unsigned long tmp;
123
124 a += (nr >> 5);
125 mask = (1 << (nr & 0x1F));
126
127 local_irq_save(flags);
128 __asm__ __volatile__ (
129 DCACHE_CLEAR("%0", "r6", "%1")
130 M32R_LOCK" %0, @%1; \n\t"
131 "xor %0, %2; \n\t"
132 M32R_UNLOCK" %0, @%1; \n\t"
133 : "=&r" (tmp)
134 : "r" (a), "r" (mask)
135 : "memory"
136#ifdef CONFIG_CHIP_M32700_TS1
137 , "r6"
138#endif /* CONFIG_CHIP_M32700_TS1 */
139 );
140 local_irq_restore(flags);
141}
142
143/**
144 * test_and_set_bit - Set a bit and return its old value
145 * @nr: Bit to set
146 * @addr: Address to count from
147 *
148 * This operation is atomic and cannot be reordered.
149 * It also implies a memory barrier.
150 */
151static __inline__ int test_and_set_bit(int nr, volatile void * addr)
152{
153 __u32 mask, oldbit;
154 volatile __u32 *a = addr;
155 unsigned long flags;
156 unsigned long tmp;
157
158 a += (nr >> 5);
159 mask = (1 << (nr & 0x1F));
160
161 local_irq_save(flags);
162 __asm__ __volatile__ (
163 DCACHE_CLEAR("%0", "%1", "%2")
164 M32R_LOCK" %0, @%2; \n\t"
165 "mv %1, %0; \n\t"
166 "and %0, %3; \n\t"
167 "or %1, %3; \n\t"
168 M32R_UNLOCK" %1, @%2; \n\t"
169 : "=&r" (oldbit), "=&r" (tmp)
170 : "r" (a), "r" (mask)
171 : "memory"
172 );
173 local_irq_restore(flags);
174
175 return (oldbit != 0);
176}
177
178/**
179 * test_and_clear_bit - Clear a bit and return its old value
180 * @nr: Bit to set
181 * @addr: Address to count from
182 *
183 * This operation is atomic and cannot be reordered.
184 * It also implies a memory barrier.
185 */
186static __inline__ int test_and_clear_bit(int nr, volatile void * addr)
187{
188 __u32 mask, oldbit;
189 volatile __u32 *a = addr;
190 unsigned long flags;
191 unsigned long tmp;
192
193 a += (nr >> 5);
194 mask = (1 << (nr & 0x1F));
195
196 local_irq_save(flags);
197
198 __asm__ __volatile__ (
199 DCACHE_CLEAR("%0", "%1", "%3")
200 M32R_LOCK" %0, @%3; \n\t"
201 "mv %1, %0; \n\t"
202 "and %0, %2; \n\t"
203 "not %2, %2; \n\t"
204 "and %1, %2; \n\t"
205 M32R_UNLOCK" %1, @%3; \n\t"
206 : "=&r" (oldbit), "=&r" (tmp), "+r" (mask)
207 : "r" (a)
208 : "memory"
209 );
210 local_irq_restore(flags);
211
212 return (oldbit != 0);
213}
214
215/**
216 * test_and_change_bit - Change a bit and return its old value
217 * @nr: Bit to set
218 * @addr: Address to count from
219 *
220 * This operation is atomic and cannot be reordered.
221 * It also implies a memory barrier.
222 */
223static __inline__ int test_and_change_bit(int nr, volatile void * addr)
224{
225 __u32 mask, oldbit;
226 volatile __u32 *a = addr;
227 unsigned long flags;
228 unsigned long tmp;
229
230 a += (nr >> 5);
231 mask = (1 << (nr & 0x1F));
232
233 local_irq_save(flags);
234 __asm__ __volatile__ (
235 DCACHE_CLEAR("%0", "%1", "%2")
236 M32R_LOCK" %0, @%2; \n\t"
237 "mv %1, %0; \n\t"
238 "and %0, %3; \n\t"
239 "xor %1, %3; \n\t"
240 M32R_UNLOCK" %1, @%2; \n\t"
241 : "=&r" (oldbit), "=&r" (tmp)
242 : "r" (a), "r" (mask)
243 : "memory"
244 );
245 local_irq_restore(flags);
246
247 return (oldbit != 0);
248}
249
250#include <asm-generic/bitops/non-atomic.h>
251#include <asm-generic/bitops/ffz.h>
252#include <asm-generic/bitops/__ffs.h>
253#include <asm-generic/bitops/fls.h>
254#include <asm-generic/bitops/__fls.h>
255#include <asm-generic/bitops/fls64.h>
256
257#ifdef __KERNEL__
258
259#include <asm-generic/bitops/sched.h>
260#include <asm-generic/bitops/find.h>
261#include <asm-generic/bitops/ffs.h>
262#include <asm-generic/bitops/hweight.h>
263#include <asm-generic/bitops/lock.h>
264
265#endif /* __KERNEL__ */
266
267#ifdef __KERNEL__
268
269#include <asm-generic/bitops/ext2-non-atomic.h>
270#include <asm-generic/bitops/ext2-atomic.h>
271#include <asm-generic/bitops/minix.h>
272
273#endif /* __KERNEL__ */
274
275#endif /* _ASM_M32R_BITOPS_H */
diff --git a/arch/m32r/include/asm/bug.h b/arch/m32r/include/asm/bug.h
new file mode 100644
index 000000000000..4cc0462c15b8
--- /dev/null
+++ b/arch/m32r/include/asm/bug.h
@@ -0,0 +1,4 @@
1#ifndef _M32R_BUG_H
2#define _M32R_BUG_H
3#include <asm-generic/bug.h>
4#endif
diff --git a/arch/m32r/include/asm/bugs.h b/arch/m32r/include/asm/bugs.h
new file mode 100644
index 000000000000..f77214eff136
--- /dev/null
+++ b/arch/m32r/include/asm/bugs.h
@@ -0,0 +1,19 @@
1#ifndef _ASM_M32R_BUGS_H
2#define _ASM_M32R_BUGS_H
3
4/*
5 * This is included by init/main.c to check for architecture-dependent bugs.
6 *
7 * Needs:
8 * void check_bugs(void);
9 */
10#include <asm/processor.h>
11
12static void __init check_bugs(void)
13{
14 extern unsigned long loops_per_jiffy;
15
16 current_cpu_data.loops_per_jiffy = loops_per_jiffy;
17}
18
19#endif /* _ASM_M32R_BUGS_H */
diff --git a/arch/m32r/include/asm/byteorder.h b/arch/m32r/include/asm/byteorder.h
new file mode 100644
index 000000000000..21855d8b028b
--- /dev/null
+++ b/arch/m32r/include/asm/byteorder.h
@@ -0,0 +1,10 @@
1#ifndef _ASM_M32R_BYTEORDER_H
2#define _ASM_M32R_BYTEORDER_H
3
4#if defined(__LITTLE_ENDIAN__)
5# include <linux/byteorder/little_endian.h>
6#else
7# include <linux/byteorder/big_endian.h>
8#endif
9
10#endif /* _ASM_M32R_BYTEORDER_H */
diff --git a/arch/m32r/include/asm/cache.h b/arch/m32r/include/asm/cache.h
new file mode 100644
index 000000000000..40b3ee98193d
--- /dev/null
+++ b/arch/m32r/include/asm/cache.h
@@ -0,0 +1,8 @@
1#ifndef _ASM_M32R_CACHE_H
2#define _ASM_M32R_CACHE_H
3
4/* L1 cache line size */
5#define L1_CACHE_SHIFT 4
6#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
7
8#endif /* _ASM_M32R_CACHE_H */
diff --git a/arch/m32r/include/asm/cachectl.h b/arch/m32r/include/asm/cachectl.h
new file mode 100644
index 000000000000..2aab8f6fff41
--- /dev/null
+++ b/arch/m32r/include/asm/cachectl.h
@@ -0,0 +1,26 @@
1/*
2 * cachectl.h -- defines for M32R cache control system calls
3 *
4 * Copyright (C) 2003 by Kazuhiro Inaoka
5 */
6#ifndef __ASM_M32R_CACHECTL
7#define __ASM_M32R_CACHECTL
8
9/*
10 * Options for cacheflush system call
11 *
12 * cacheflush() is currently fluch_cache_all().
13 */
14#define ICACHE (1<<0) /* flush instruction cache */
15#define DCACHE (1<<1) /* writeback and flush data cache */
16#define BCACHE (ICACHE|DCACHE) /* flush both caches */
17
18/*
19 * Caching modes for the cachectl(2) call
20 *
21 * cachectl(2) is currently not supported and returns ENOSYS.
22 */
23#define CACHEABLE 0 /* make pages cacheable */
24#define UNCACHEABLE 1 /* make pages uncacheable */
25
26#endif /* __ASM_M32R_CACHECTL */
diff --git a/arch/m32r/include/asm/cacheflush.h b/arch/m32r/include/asm/cacheflush.h
new file mode 100644
index 000000000000..78587c958146
--- /dev/null
+++ b/arch/m32r/include/asm/cacheflush.h
@@ -0,0 +1,69 @@
1#ifndef _ASM_M32R_CACHEFLUSH_H
2#define _ASM_M32R_CACHEFLUSH_H
3
4#include <linux/mm.h>
5
6extern void _flush_cache_all(void);
7extern void _flush_cache_copyback_all(void);
8
9#if defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104)
10#define flush_cache_all() do { } while (0)
11#define flush_cache_mm(mm) do { } while (0)
12#define flush_cache_dup_mm(mm) do { } while (0)
13#define flush_cache_range(vma, start, end) do { } while (0)
14#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
15#define flush_dcache_page(page) do { } while (0)
16#define flush_dcache_mmap_lock(mapping) do { } while (0)
17#define flush_dcache_mmap_unlock(mapping) do { } while (0)
18#ifndef CONFIG_SMP
19#define flush_icache_range(start, end) _flush_cache_copyback_all()
20#define flush_icache_page(vma,pg) _flush_cache_copyback_all()
21#define flush_icache_user_range(vma,pg,adr,len) _flush_cache_copyback_all()
22#define flush_cache_sigtramp(addr) _flush_cache_copyback_all()
23#else /* CONFIG_SMP */
24extern void smp_flush_cache_all(void);
25#define flush_icache_range(start, end) smp_flush_cache_all()
26#define flush_icache_page(vma,pg) smp_flush_cache_all()
27#define flush_icache_user_range(vma,pg,adr,len) smp_flush_cache_all()
28#define flush_cache_sigtramp(addr) _flush_cache_copyback_all()
29#endif /* CONFIG_SMP */
30#elif defined(CONFIG_CHIP_M32102)
31#define flush_cache_all() do { } while (0)
32#define flush_cache_mm(mm) do { } while (0)
33#define flush_cache_dup_mm(mm) do { } while (0)
34#define flush_cache_range(vma, start, end) do { } while (0)
35#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
36#define flush_dcache_page(page) do { } while (0)
37#define flush_dcache_mmap_lock(mapping) do { } while (0)
38#define flush_dcache_mmap_unlock(mapping) do { } while (0)
39#define flush_icache_range(start, end) _flush_cache_all()
40#define flush_icache_page(vma,pg) _flush_cache_all()
41#define flush_icache_user_range(vma,pg,adr,len) _flush_cache_all()
42#define flush_cache_sigtramp(addr) _flush_cache_all()
43#else
44#define flush_cache_all() do { } while (0)
45#define flush_cache_mm(mm) do { } while (0)
46#define flush_cache_dup_mm(mm) do { } while (0)
47#define flush_cache_range(vma, start, end) do { } while (0)
48#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
49#define flush_dcache_page(page) do { } while (0)
50#define flush_dcache_mmap_lock(mapping) do { } while (0)
51#define flush_dcache_mmap_unlock(mapping) do { } while (0)
52#define flush_icache_range(start, end) do { } while (0)
53#define flush_icache_page(vma,pg) do { } while (0)
54#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
55#define flush_cache_sigtramp(addr) do { } while (0)
56#endif /* CONFIG_CHIP_* */
57
58#define flush_cache_vmap(start, end) do { } while (0)
59#define flush_cache_vunmap(start, end) do { } while (0)
60
61#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
62do { \
63 memcpy(dst, src, len); \
64 flush_icache_user_range(vma, page, vaddr, len); \
65} while (0)
66#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
67 memcpy(dst, src, len)
68
69#endif /* _ASM_M32R_CACHEFLUSH_H */
diff --git a/arch/m32r/include/asm/checksum.h b/arch/m32r/include/asm/checksum.h
new file mode 100644
index 000000000000..a7a7c4f44abe
--- /dev/null
+++ b/arch/m32r/include/asm/checksum.h
@@ -0,0 +1,204 @@
1#ifdef __KERNEL__
2#ifndef _ASM_M32R_CHECKSUM_H
3#define _ASM_M32R_CHECKSUM_H
4
5/*
6 * include/asm-m32r/checksum.h
7 *
8 * IP/TCP/UDP checksum routines
9 *
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file "COPYING" in the main directory of this archive
12 * for more details.
13 *
14 * Some code taken from mips and parisc architecture.
15 *
16 * Copyright (C) 2001, 2002 Hiroyuki Kondo, Hirokazu Takata
17 * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
18 */
19
20#include <linux/in6.h>
21
22/*
23 * computes the checksum of a memory block at buff, length len,
24 * and adds in "sum" (32-bit)
25 *
26 * returns a 32-bit number suitable for feeding into itself
27 * or csum_tcpudp_magic
28 *
29 * this function must be called with even lengths, except
30 * for the last fragment, which may be odd
31 *
32 * it's best to have buff aligned on a 32-bit boundary
33 */
34asmlinkage __wsum csum_partial(const void *buff, int len, __wsum sum);
35
36/*
37 * The same as csum_partial, but copies from src while it checksums.
38 *
39 * Here even more important to align src and dst on a 32-bit (or even
40 * better 64-bit) boundary
41 */
42extern __wsum csum_partial_copy_nocheck(const void *src, void *dst,
43 int len, __wsum sum);
44
45/*
46 * This is a new version of the above that records errors it finds in *errp,
47 * but continues and zeros thre rest of the buffer.
48 */
49extern __wsum csum_partial_copy_from_user(const void __user *src, void *dst,
50 int len, __wsum sum,
51 int *err_ptr);
52
53/*
54 * Fold a partial checksum
55 */
56
57static inline __sum16 csum_fold(__wsum sum)
58{
59 unsigned long tmpreg;
60 __asm__(
61 " sll3 %1, %0, #16 \n"
62 " cmp %0, %0 \n"
63 " addx %0, %1 \n"
64 " ldi %1, #0 \n"
65 " srli %0, #16 \n"
66 " addx %0, %1 \n"
67 " xor3 %0, %0, #0x0000ffff \n"
68 : "=r" (sum), "=&r" (tmpreg)
69 : "0" (sum)
70 : "cbit"
71 );
72 return (__force __sum16)sum;
73}
74
75/*
76 * This is a version of ip_compute_csum() optimized for IP headers,
77 * which always checksum on 4 octet boundaries.
78 */
79static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
80{
81 unsigned long tmpreg0, tmpreg1;
82 __wsum sum;
83
84 __asm__ __volatile__(
85 " ld %0, @%1+ \n"
86 " addi %2, #-4 \n"
87 "# bgez %2, 2f \n"
88 " cmp %0, %0 \n"
89 " ld %3, @%1+ \n"
90 " ld %4, @%1+ \n"
91 " addx %0, %3 \n"
92 " ld %3, @%1+ \n"
93 " addx %0, %4 \n"
94 " addx %0, %3 \n"
95 " .fillinsn\n"
96 "1: \n"
97 " ld %4, @%1+ \n"
98 " addi %2, #-1 \n"
99 " addx %0, %4 \n"
100 " bgtz %2, 1b \n"
101 "\n"
102 " ldi %3, #0 \n"
103 " addx %0, %3 \n"
104 " .fillinsn\n"
105 "2: \n"
106 /* Since the input registers which are loaded with iph and ihl
107 are modified, we must also specify them as outputs, or gcc
108 will assume they contain their original values. */
109 : "=&r" (sum), "=r" (iph), "=r" (ihl), "=&r" (tmpreg0), "=&r" (tmpreg1)
110 : "1" (iph), "2" (ihl)
111 : "cbit", "memory");
112
113 return csum_fold(sum);
114}
115
116static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr,
117 unsigned short len,
118 unsigned short proto,
119 __wsum sum)
120{
121#if defined(__LITTLE_ENDIAN)
122 unsigned long len_proto = (proto + len) << 8;
123#else
124 unsigned long len_proto = proto + len;
125#endif
126 unsigned long tmpreg;
127
128 __asm__(
129 " cmp %0, %0 \n"
130 " addx %0, %2 \n"
131 " addx %0, %3 \n"
132 " addx %0, %4 \n"
133 " ldi %1, #0 \n"
134 " addx %0, %1 \n"
135 : "=r" (sum), "=&r" (tmpreg)
136 : "r" (daddr), "r" (saddr), "r" (len_proto), "0" (sum)
137 : "cbit"
138 );
139
140 return sum;
141}
142
143/*
144 * computes the checksum of the TCP/UDP pseudo-header
145 * returns a 16-bit checksum, already complemented
146 */
147static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr,
148 unsigned short len,
149 unsigned short proto,
150 __wsum sum)
151{
152 return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum));
153}
154
155/*
156 * this routine is used for miscellaneous IP-like checksums, mainly
157 * in icmp.c
158 */
159
160static inline __sum16 ip_compute_csum(const void *buff, int len)
161{
162 return csum_fold (csum_partial(buff, len, 0));
163}
164
165#define _HAVE_ARCH_IPV6_CSUM
166static inline __sum16 csum_ipv6_magic(const struct in6_addr *saddr,
167 const struct in6_addr *daddr,
168 __u32 len, unsigned short proto,
169 __wsum sum)
170{
171 unsigned long tmpreg0, tmpreg1, tmpreg2, tmpreg3;
172 __asm__(
173 " ld %1, @(%5) \n"
174 " ld %2, @(4,%5) \n"
175 " ld %3, @(8,%5) \n"
176 " ld %4, @(12,%5) \n"
177 " add %0, %1 \n"
178 " addx %0, %2 \n"
179 " addx %0, %3 \n"
180 " addx %0, %4 \n"
181 " ld %1, @(%6) \n"
182 " ld %2, @(4,%6) \n"
183 " ld %3, @(8,%6) \n"
184 " ld %4, @(12,%6) \n"
185 " addx %0, %1 \n"
186 " addx %0, %2 \n"
187 " addx %0, %3 \n"
188 " addx %0, %4 \n"
189 " addx %0, %7 \n"
190 " addx %0, %8 \n"
191 " ldi %1, #0 \n"
192 " addx %0, %1 \n"
193 : "=&r" (sum), "=&r" (tmpreg0), "=&r" (tmpreg1),
194 "=&r" (tmpreg2), "=&r" (tmpreg3)
195 : "r" (saddr), "r" (daddr),
196 "r" (htonl(len)), "r" (htonl(proto)), "0" (sum)
197 : "cbit"
198 );
199
200 return csum_fold(sum);
201}
202
203#endif /* _ASM_M32R_CHECKSUM_H */
204#endif /* __KERNEL__ */
diff --git a/arch/m32r/include/asm/cputime.h b/arch/m32r/include/asm/cputime.h
new file mode 100644
index 000000000000..0a47550df2b7
--- /dev/null
+++ b/arch/m32r/include/asm/cputime.h
@@ -0,0 +1,6 @@
1#ifndef __M32R_CPUTIME_H
2#define __M32R_CPUTIME_H
3
4#include <asm-generic/cputime.h>
5
6#endif /* __M32R_CPUTIME_H */
diff --git a/arch/m32r/include/asm/current.h b/arch/m32r/include/asm/current.h
new file mode 100644
index 000000000000..7859d864f2c2
--- /dev/null
+++ b/arch/m32r/include/asm/current.h
@@ -0,0 +1,15 @@
1#ifndef _ASM_M32R_CURRENT_H
2#define _ASM_M32R_CURRENT_H
3
4#include <linux/thread_info.h>
5
6struct task_struct;
7
8static __inline__ struct task_struct *get_current(void)
9{
10 return current_thread_info()->task;
11}
12
13#define current (get_current())
14
15#endif /* _ASM_M32R_CURRENT_H */
diff --git a/arch/m32r/include/asm/delay.h b/arch/m32r/include/asm/delay.h
new file mode 100644
index 000000000000..9dd9e999ea69
--- /dev/null
+++ b/arch/m32r/include/asm/delay.h
@@ -0,0 +1,26 @@
1#ifndef _ASM_M32R_DELAY_H
2#define _ASM_M32R_DELAY_H
3
4/*
5 * Copyright (C) 1993 Linus Torvalds
6 *
7 * Delay routines calling functions in arch/m32r/lib/delay.c
8 */
9
10extern void __bad_udelay(void);
11extern void __bad_ndelay(void);
12
13extern void __udelay(unsigned long usecs);
14extern void __ndelay(unsigned long nsecs);
15extern void __const_udelay(unsigned long xloops);
16extern void __delay(unsigned long loops);
17
18#define udelay(n) (__builtin_constant_p(n) ? \
19 ((n) > 20000 ? __bad_udelay() : __const_udelay((n) * 0x10c7ul)) : \
20 __udelay(n))
21
22#define ndelay(n) (__builtin_constant_p(n) ? \
23 ((n) > 20000 ? __bad_ndelay() : __const_udelay((n) * 5ul)) : \
24 __ndelay(n))
25
26#endif /* _ASM_M32R_DELAY_H */
diff --git a/arch/m32r/include/asm/device.h b/arch/m32r/include/asm/device.h
new file mode 100644
index 000000000000..d8f9872b0e2d
--- /dev/null
+++ b/arch/m32r/include/asm/device.h
@@ -0,0 +1,7 @@
1/*
2 * Arch specific extensions to struct device
3 *
4 * This file is released under the GPLv2
5 */
6#include <asm-generic/device.h>
7
diff --git a/arch/m32r/include/asm/div64.h b/arch/m32r/include/asm/div64.h
new file mode 100644
index 000000000000..6cd978cefb28
--- /dev/null
+++ b/arch/m32r/include/asm/div64.h
@@ -0,0 +1 @@
#include <asm-generic/div64.h>
diff --git a/arch/m32r/include/asm/dma.h b/arch/m32r/include/asm/dma.h
new file mode 100644
index 000000000000..52f6a22dd232
--- /dev/null
+++ b/arch/m32r/include/asm/dma.h
@@ -0,0 +1,12 @@
1#ifndef _ASM_M32R_DMA_H
2#define _ASM_M32R_DMA_H
3
4#include <asm/io.h>
5
6/*
7 * The maximum address that we can perform a DMA transfer
8 * to on this platform
9 */
10#define MAX_DMA_ADDRESS (PAGE_OFFSET+0x20000000)
11
12#endif /* _ASM_M32R_DMA_H */
diff --git a/arch/m32r/include/asm/elf.h b/arch/m32r/include/asm/elf.h
new file mode 100644
index 000000000000..0cc34c94bf2b
--- /dev/null
+++ b/arch/m32r/include/asm/elf.h
@@ -0,0 +1,134 @@
1#ifndef _ASM_M32R__ELF_H
2#define _ASM_M32R__ELF_H
3
4/*
5 * ELF-specific definitions.
6 *
7 * Copyright (C) 1999-2004, Renesas Technology Corp.
8 * Hirokazu Takata <takata at linux-m32r.org>
9 */
10
11#include <asm/ptrace.h>
12#include <asm/user.h>
13#include <asm/page.h>
14
15/* M32R relocation types */
16#define R_M32R_NONE 0
17#define R_M32R_16 1
18#define R_M32R_32 2
19#define R_M32R_24 3
20#define R_M32R_10_PCREL 4
21#define R_M32R_18_PCREL 5
22#define R_M32R_26_PCREL 6
23#define R_M32R_HI16_ULO 7
24#define R_M32R_HI16_SLO 8
25#define R_M32R_LO16 9
26#define R_M32R_SDA16 10
27#define R_M32R_GNU_VTINHERIT 11
28#define R_M32R_GNU_VTENTRY 12
29
30#define R_M32R_16_RELA 33
31#define R_M32R_32_RELA 34
32#define R_M32R_24_RELA 35
33#define R_M32R_10_PCREL_RELA 36
34#define R_M32R_18_PCREL_RELA 37
35#define R_M32R_26_PCREL_RELA 38
36#define R_M32R_HI16_ULO_RELA 39
37#define R_M32R_HI16_SLO_RELA 40
38#define R_M32R_LO16_RELA 41
39#define R_M32R_SDA16_RELA 42
40#define R_M32R_RELA_GNU_VTINHERIT 43
41#define R_M32R_RELA_GNU_VTENTRY 44
42
43#define R_M32R_GOT24 48
44#define R_M32R_26_PLTREL 49
45#define R_M32R_COPY 50
46#define R_M32R_GLOB_DAT 51
47#define R_M32R_JMP_SLOT 52
48#define R_M32R_RELATIVE 53
49#define R_M32R_GOTOFF 54
50#define R_M32R_GOTPC24 55
51#define R_M32R_GOT16_HI_ULO 56
52#define R_M32R_GOT16_HI_SLO 57
53#define R_M32R_GOT16_LO 58
54#define R_M32R_GOTPC_HI_ULO 59
55#define R_M32R_GOTPC_HI_SLO 60
56#define R_M32R_GOTPC_LO 61
57#define R_M32R_GOTOFF_HI_ULO 62
58#define R_M32R_GOTOFF_HI_SLO 63
59#define R_M32R_GOTOFF_LO 64
60
61#define R_M32R_NUM 256
62
63/*
64 * ELF register definitions..
65 */
66#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t))
67
68typedef unsigned long elf_greg_t;
69typedef elf_greg_t elf_gregset_t[ELF_NGREG];
70
71/* We have no FP mumumu. */
72typedef double elf_fpreg_t;
73typedef elf_fpreg_t elf_fpregset_t;
74
75/*
76 * This is used to ensure we don't load something for the wrong architecture.
77 */
78#define elf_check_arch(x) \
79 (((x)->e_machine == EM_M32R) || ((x)->e_machine == EM_CYGNUS_M32R))
80
81/*
82 * These are used to set parameters in the core dumps.
83 */
84#define ELF_CLASS ELFCLASS32
85#if defined(__LITTLE_ENDIAN)
86#define ELF_DATA ELFDATA2LSB
87#elif defined(__BIG_ENDIAN)
88#define ELF_DATA ELFDATA2MSB
89#else
90#error no endian defined
91#endif
92#define ELF_ARCH EM_M32R
93
94/* r0 is set by ld.so to a pointer to a function which might be
95 * registered using 'atexit'. This provides a mean for the dynamic
96 * linker to call DT_FINI functions for shared libraries that have
97 * been loaded before the code runs.
98 *
99 * So that we can use the same startup file with static executables,
100 * we start programs with a value of 0 to indicate that there is no
101 * such function.
102 */
103#define ELF_PLAT_INIT(_r, load_addr) (_r)->r0 = 0
104
105#define USE_ELF_CORE_DUMP
106#define ELF_EXEC_PAGESIZE PAGE_SIZE
107
108/*
109 * This is the location that an ET_DYN program is loaded if exec'ed.
110 * Typical use of this is to invoke "./ld.so someprog" to test out a
111 * new version of the loader. We need to make sure that it is out of
112 * the way of the program that it will "exec", and that there is
113 * sufficient room for the brk.
114 */
115#define ELF_ET_DYN_BASE (TASK_SIZE / 3 * 2)
116
117/* regs is struct pt_regs, pr_reg is elf_gregset_t (which is
118 now struct_user_regs, they are different) */
119
120#define ELF_CORE_COPY_REGS(pr_reg, regs) \
121 memcpy((char *)pr_reg, (char *)regs, sizeof (struct pt_regs));
122
123/* This yields a mask that user programs can use to figure out what
124 instruction set this CPU supports. */
125#define ELF_HWCAP (0)
126
127/* This yields a string that ld.so will use to load implementation
128 specific libraries for optimization. This is more specific in
129 intent than poking at uname or /proc/cpuinfo. */
130#define ELF_PLATFORM (NULL)
131
132#define SET_PERSONALITY(ex) set_personality(PER_LINUX)
133
134#endif /* _ASM_M32R__ELF_H */
diff --git a/arch/m32r/include/asm/emergency-restart.h b/arch/m32r/include/asm/emergency-restart.h
new file mode 100644
index 000000000000..108d8c48e42e
--- /dev/null
+++ b/arch/m32r/include/asm/emergency-restart.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_EMERGENCY_RESTART_H
2#define _ASM_EMERGENCY_RESTART_H
3
4#include <asm-generic/emergency-restart.h>
5
6#endif /* _ASM_EMERGENCY_RESTART_H */
diff --git a/arch/m32r/include/asm/errno.h b/arch/m32r/include/asm/errno.h
new file mode 100644
index 000000000000..777149262aad
--- /dev/null
+++ b/arch/m32r/include/asm/errno.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_M32R_ERRNO_H
2#define _ASM_M32R_ERRNO_H
3
4#include <asm-generic/errno.h>
5
6#endif /* _ASM_M32R_ERRNO_H */
diff --git a/arch/m32r/include/asm/fb.h b/arch/m32r/include/asm/fb.h
new file mode 100644
index 000000000000..d92e99cd8c8a
--- /dev/null
+++ b/arch/m32r/include/asm/fb.h
@@ -0,0 +1,19 @@
1#ifndef _ASM_FB_H_
2#define _ASM_FB_H_
3
4#include <linux/fb.h>
5#include <linux/fs.h>
6#include <asm/page.h>
7
8static inline void fb_pgprotect(struct file *file, struct vm_area_struct *vma,
9 unsigned long off)
10{
11 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
12}
13
14static inline int fb_is_primary_device(struct fb_info *info)
15{
16 return 0;
17}
18
19#endif /* _ASM_FB_H_ */
diff --git a/arch/m32r/include/asm/fcntl.h b/arch/m32r/include/asm/fcntl.h
new file mode 100644
index 000000000000..46ab12db5739
--- /dev/null
+++ b/arch/m32r/include/asm/fcntl.h
@@ -0,0 +1 @@
#include <asm-generic/fcntl.h>
diff --git a/arch/m32r/include/asm/flat.h b/arch/m32r/include/asm/flat.h
new file mode 100644
index 000000000000..d851cf0c4aa5
--- /dev/null
+++ b/arch/m32r/include/asm/flat.h
@@ -0,0 +1,146 @@
1/*
2 * include/asm-m32r/flat.h
3 *
4 * uClinux flat-format executables
5 *
6 * Copyright (C) 2004 Kazuhiro Inaoka
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive for
10 * more details.
11 */
12#ifndef __ASM_M32R_FLAT_H
13#define __ASM_M32R_FLAT_H
14
15#define flat_stack_align(sp) (*sp += (*sp & 3 ? (4 - (*sp & 3)): 0))
16#define flat_argvp_envp_on_stack() 0
17#define flat_old_ram_flag(flags) (flags)
18#define flat_set_persistent(relval, p) 0
19#define flat_reloc_valid(reloc, size) \
20 (((reloc) - textlen_for_m32r_lo16_data) <= (size))
21#define flat_get_addr_from_rp(rp, relval, flags, persistent) \
22 m32r_flat_get_addr_from_rp(rp, relval, (text_len) )
23
24#define flat_put_addr_at_rp(rp, addr, relval) \
25 m32r_flat_put_addr_at_rp(rp, addr, relval)
26
27/* Convert a relocation entry into an address. */
28static inline unsigned long
29flat_get_relocate_addr (unsigned long relval)
30{
31 return relval & 0x00ffffff; /* Mask out top 8-bits */
32}
33
34#define flat_m32r_get_reloc_type(relval) ((relval) >> 24)
35
36#define M32R_SETH_OPCODE 0xd0c00000 /* SETH instruction code */
37
38#define FLAT_M32R_32 0x00 /* 32bits reloc */
39#define FLAT_M32R_24 0x01 /* unsigned 24bits reloc */
40#define FLAT_M32R_16 0x02 /* 16bits reloc */
41#define FLAT_M32R_LO16 0x03 /* signed low 16bits reloc (low()) */
42#define FLAT_M32R_LO16_DATA 0x04 /* signed low 16bits reloc (low())
43 for a symbol in .data section */
44 /* High 16bits of an address used
45 when the lower 16bbits are treated
46 as unsigned.
47 To create SETH instruction only.
48 0x1X: X means a number of register.
49 0x10 - 0x3F are reserved. */
50#define FLAT_M32R_HI16_ULO 0x10 /* reloc for SETH Rn,#high(imm16) */
51 /* High 16bits of an address used
52 when the lower 16bbits are treated
53 as signed.
54 To create SETH instruction only.
55 0x2X: X means a number of register.
56 0x20 - 0x4F are reserved. */
57#define FLAT_M32R_HI16_SLO 0x20 /* reloc for SETH Rn,#shigh(imm16) */
58
59static unsigned long textlen_for_m32r_lo16_data = 0;
60
61static inline unsigned long m32r_flat_get_addr_from_rp (unsigned long *rp,
62 unsigned long relval,
63 unsigned long textlen)
64{
65 unsigned int reloc = flat_m32r_get_reloc_type (relval);
66 textlen_for_m32r_lo16_data = 0;
67 if (reloc & 0xf0) {
68 unsigned long addr = htonl(*rp);
69 switch (reloc & 0xf0)
70 {
71 case FLAT_M32R_HI16_ULO:
72 case FLAT_M32R_HI16_SLO:
73 if (addr == 0) {
74 /* put "seth Rn,#0x0" instead of 0 (addr). */
75 *rp = (M32R_SETH_OPCODE | ((reloc & 0x0f)<<24));
76 }
77 return addr;
78 default:
79 break;
80 }
81 } else {
82 switch (reloc)
83 {
84 case FLAT_M32R_LO16:
85 return htonl(*rp) & 0xFFFF;
86 case FLAT_M32R_LO16_DATA:
87 /* FIXME: The return value will decrease by textlen
88 at m32r_flat_put_addr_at_rp () */
89 textlen_for_m32r_lo16_data = textlen;
90 return (htonl(*rp) & 0xFFFF) + textlen;
91 case FLAT_M32R_16:
92 return htons(*(unsigned short *)rp) & 0xFFFF;
93 case FLAT_M32R_24:
94 return htonl(*rp) & 0xFFFFFF;
95 case FLAT_M32R_32:
96 return htonl(*rp);
97 default:
98 break;
99 }
100 }
101 return ~0; /* bogus value */
102}
103
104static inline void m32r_flat_put_addr_at_rp (unsigned long *rp,
105 unsigned long addr,
106 unsigned long relval)
107{
108 unsigned int reloc = flat_m32r_get_reloc_type (relval);
109 if (reloc & 0xf0) {
110 unsigned long Rn = reloc & 0x0f; /* get a number of register */
111 Rn <<= 24; /* 0x0R000000 */
112 reloc &= 0xf0;
113 switch (reloc)
114 {
115 case FLAT_M32R_HI16_ULO: /* To create SETH Rn,#high(imm16) */
116 *rp = (M32R_SETH_OPCODE | Rn
117 | ((addr >> 16) & 0xFFFF));
118 break;
119 case FLAT_M32R_HI16_SLO: /* To create SETH Rn,#shigh(imm16) */
120 *rp = (M32R_SETH_OPCODE | Rn
121 | (((addr >> 16) + ((addr & 0x8000) ? 1 : 0))
122 & 0xFFFF));
123 break;
124 }
125 } else {
126 switch (reloc) {
127 case FLAT_M32R_LO16_DATA:
128 addr -= textlen_for_m32r_lo16_data;
129 textlen_for_m32r_lo16_data = 0;
130 case FLAT_M32R_LO16:
131 *rp = (htonl(*rp) & 0xFFFF0000) | (addr & 0xFFFF);
132 break;
133 case FLAT_M32R_16:
134 *(unsigned short *)rp = addr & 0xFFFF;
135 break;
136 case FLAT_M32R_24:
137 *rp = (htonl(*rp) & 0xFF000000) | (addr & 0xFFFFFF);
138 break;
139 case FLAT_M32R_32:
140 *rp = addr;
141 break;
142 }
143 }
144}
145
146#endif /* __ASM_M32R_FLAT_H */
diff --git a/arch/m32r/include/asm/ftrace.h b/arch/m32r/include/asm/ftrace.h
new file mode 100644
index 000000000000..40a8c178f10d
--- /dev/null
+++ b/arch/m32r/include/asm/ftrace.h
@@ -0,0 +1 @@
/* empty */
diff --git a/arch/m32r/include/asm/futex.h b/arch/m32r/include/asm/futex.h
new file mode 100644
index 000000000000..6a332a9f099c
--- /dev/null
+++ b/arch/m32r/include/asm/futex.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_FUTEX_H
2#define _ASM_FUTEX_H
3
4#include <asm-generic/futex.h>
5
6#endif
diff --git a/arch/m32r/include/asm/hardirq.h b/arch/m32r/include/asm/hardirq.h
new file mode 100644
index 000000000000..cb8aa762f235
--- /dev/null
+++ b/arch/m32r/include/asm/hardirq.h
@@ -0,0 +1,36 @@
1#ifdef __KERNEL__
2#ifndef __ASM_HARDIRQ_H
3#define __ASM_HARDIRQ_H
4
5#include <linux/threads.h>
6#include <linux/irq.h>
7
8typedef struct {
9 unsigned int __softirq_pending;
10} ____cacheline_aligned irq_cpustat_t;
11
12#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
13
14#if NR_IRQS > 256
15#define HARDIRQ_BITS 9
16#else
17#define HARDIRQ_BITS 8
18#endif
19
20/*
21 * The hardirq mask has to be large enough to have
22 * space for potentially all IRQ sources in the system
23 * nesting on a single CPU:
24 */
25#if (1 << HARDIRQ_BITS) < NR_IRQS
26# error HARDIRQ_BITS is too low!
27#endif
28
29static inline void ack_bad_irq(int irq)
30{
31 printk(KERN_CRIT "unexpected IRQ trap at vector %02x\n", irq);
32 BUG();
33}
34
35#endif /* __ASM_HARDIRQ_H */
36#endif /* __KERNEL__ */
diff --git a/arch/m32r/include/asm/hw_irq.h b/arch/m32r/include/asm/hw_irq.h
new file mode 100644
index 000000000000..7138537cda03
--- /dev/null
+++ b/arch/m32r/include/asm/hw_irq.h
@@ -0,0 +1,4 @@
1#ifndef _ASM_M32R_HW_IRQ_H
2#define _ASM_M32R_HW_IRQ_H
3
4#endif /* _ASM_M32R_HW_IRQ_H */
diff --git a/arch/m32r/include/asm/io.h b/arch/m32r/include/asm/io.h
new file mode 100644
index 000000000000..d06933bd6318
--- /dev/null
+++ b/arch/m32r/include/asm/io.h
@@ -0,0 +1,200 @@
1#ifndef _ASM_M32R_IO_H
2#define _ASM_M32R_IO_H
3
4#include <linux/string.h>
5#include <linux/compiler.h>
6#include <asm/page.h> /* __va */
7
8#ifdef __KERNEL__
9
10#define IO_SPACE_LIMIT 0xFFFFFFFF
11
12/**
13 * virt_to_phys - map virtual addresses to physical
14 * @address: address to remap
15 *
16 * The returned physical address is the physical (CPU) mapping for
17 * the memory address given. It is only valid to use this function on
18 * addresses directly mapped or allocated via kmalloc.
19 *
20 * This function does not give bus mappings for DMA transfers. In
21 * almost all conceivable cases a device driver should not be using
22 * this function
23 */
24
25static inline unsigned long virt_to_phys(volatile void * address)
26{
27 return __pa(address);
28}
29
30/**
31 * phys_to_virt - map physical address to virtual
32 * @address: address to remap
33 *
34 * The returned virtual address is a current CPU mapping for
35 * the memory address given. It is only valid to use this function on
36 * addresses that have a kernel mapping
37 *
38 * This function does not handle bus mappings for DMA transfers. In
39 * almost all conceivable cases a device driver should not be using
40 * this function
41 */
42
43static inline void *phys_to_virt(unsigned long address)
44{
45 return __va(address);
46}
47
48extern void __iomem *
49__ioremap(unsigned long offset, unsigned long size, unsigned long flags);
50
51/**
52 * ioremap - map bus memory into CPU space
53 * @offset: bus address of the memory
54 * @size: size of the resource to map
55 *
56 * ioremap performs a platform specific sequence of operations to
57 * make bus memory CPU accessible via the readb/readw/readl/writeb/
58 * writew/writel functions and the other mmio helpers. The returned
59 * address is not guaranteed to be usable directly as a virtual
60 * address.
61 */
62
63static inline void __iomem *ioremap(unsigned long offset, unsigned long size)
64{
65 return __ioremap(offset, size, 0);
66}
67
68extern void iounmap(volatile void __iomem *addr);
69#define ioremap_nocache(off,size) ioremap(off,size)
70
71/*
72 * IO bus memory addresses are also 1:1 with the physical address
73 */
74#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
75#define page_to_bus page_to_phys
76#define virt_to_bus virt_to_phys
77
78extern unsigned char _inb(unsigned long);
79extern unsigned short _inw(unsigned long);
80extern unsigned long _inl(unsigned long);
81extern unsigned char _inb_p(unsigned long);
82extern unsigned short _inw_p(unsigned long);
83extern unsigned long _inl_p(unsigned long);
84extern void _outb(unsigned char, unsigned long);
85extern void _outw(unsigned short, unsigned long);
86extern void _outl(unsigned long, unsigned long);
87extern void _outb_p(unsigned char, unsigned long);
88extern void _outw_p(unsigned short, unsigned long);
89extern void _outl_p(unsigned long, unsigned long);
90extern void _insb(unsigned int, void *, unsigned long);
91extern void _insw(unsigned int, void *, unsigned long);
92extern void _insl(unsigned int, void *, unsigned long);
93extern void _outsb(unsigned int, const void *, unsigned long);
94extern void _outsw(unsigned int, const void *, unsigned long);
95extern void _outsl(unsigned int, const void *, unsigned long);
96
97static inline unsigned char _readb(unsigned long addr)
98{
99 return *(volatile unsigned char __force *)addr;
100}
101
102static inline unsigned short _readw(unsigned long addr)
103{
104 return *(volatile unsigned short __force *)addr;
105}
106
107static inline unsigned long _readl(unsigned long addr)
108{
109 return *(volatile unsigned long __force *)addr;
110}
111
112static inline void _writeb(unsigned char b, unsigned long addr)
113{
114 *(volatile unsigned char __force *)addr = b;
115}
116
117static inline void _writew(unsigned short w, unsigned long addr)
118{
119 *(volatile unsigned short __force *)addr = w;
120}
121
122static inline void _writel(unsigned long l, unsigned long addr)
123{
124 *(volatile unsigned long __force *)addr = l;
125}
126
127#define inb _inb
128#define inw _inw
129#define inl _inl
130#define outb _outb
131#define outw _outw
132#define outl _outl
133
134#define inb_p _inb_p
135#define inw_p _inw_p
136#define inl_p _inl_p
137#define outb_p _outb_p
138#define outw_p _outw_p
139#define outl_p _outl_p
140
141#define insb _insb
142#define insw _insw
143#define insl _insl
144#define outsb _outsb
145#define outsw _outsw
146#define outsl _outsl
147
148#define readb(addr) _readb((unsigned long)(addr))
149#define readw(addr) _readw((unsigned long)(addr))
150#define readl(addr) _readl((unsigned long)(addr))
151#define __raw_readb readb
152#define __raw_readw readw
153#define __raw_readl readl
154#define readb_relaxed readb
155#define readw_relaxed readw
156#define readl_relaxed readl
157
158#define writeb(val, addr) _writeb((val), (unsigned long)(addr))
159#define writew(val, addr) _writew((val), (unsigned long)(addr))
160#define writel(val, addr) _writel((val), (unsigned long)(addr))
161#define __raw_writeb writeb
162#define __raw_writew writew
163#define __raw_writel writel
164
165#define mmiowb()
166
167#define flush_write_buffers() do { } while (0) /* M32R_FIXME */
168
169static inline void
170memset_io(volatile void __iomem *addr, unsigned char val, int count)
171{
172 memset((void __force *) addr, val, count);
173}
174
175static inline void
176memcpy_fromio(void *dst, volatile void __iomem *src, int count)
177{
178 memcpy(dst, (void __force *) src, count);
179}
180
181static inline void
182memcpy_toio(volatile void __iomem *dst, const void *src, int count)
183{
184 memcpy((void __force *) dst, src, count);
185}
186
187/*
188 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
189 * access
190 */
191#define xlate_dev_mem_ptr(p) __va(p)
192
193/*
194 * Convert a virtual cached pointer to an uncached pointer
195 */
196#define xlate_dev_kmem_ptr(p) p
197
198#endif /* __KERNEL__ */
199
200#endif /* _ASM_M32R_IO_H */
diff --git a/arch/m32r/include/asm/ioctl.h b/arch/m32r/include/asm/ioctl.h
new file mode 100644
index 000000000000..b279fe06dfe5
--- /dev/null
+++ b/arch/m32r/include/asm/ioctl.h
@@ -0,0 +1 @@
#include <asm-generic/ioctl.h>
diff --git a/arch/m32r/include/asm/ioctls.h b/arch/m32r/include/asm/ioctls.h
new file mode 100644
index 000000000000..b9f54bb5d7cf
--- /dev/null
+++ b/arch/m32r/include/asm/ioctls.h
@@ -0,0 +1,87 @@
1#ifndef __ARCH_M32R_IOCTLS_H__
2#define __ARCH_M32R_IOCTLS_H__
3
4#include <asm/ioctl.h>
5
6/* 0x54 is just a magic number to make these relatively unique ('T') */
7
8#define TCGETS 0x5401
9#define TCSETS 0x5402 /* Clashes with SNDCTL_TMR_START sound ioctl */
10#define TCSETSW 0x5403
11#define TCSETSF 0x5404
12#define TCGETA 0x5405
13#define TCSETA 0x5406
14#define TCSETAW 0x5407
15#define TCSETAF 0x5408
16#define TCSBRK 0x5409
17#define TCXONC 0x540A
18#define TCFLSH 0x540B
19#define TIOCEXCL 0x540C
20#define TIOCNXCL 0x540D
21#define TIOCSCTTY 0x540E
22#define TIOCGPGRP 0x540F
23#define TIOCSPGRP 0x5410
24#define TIOCOUTQ 0x5411
25#define TIOCSTI 0x5412
26#define TIOCGWINSZ 0x5413
27#define TIOCSWINSZ 0x5414
28#define TIOCMGET 0x5415
29#define TIOCMBIS 0x5416
30#define TIOCMBIC 0x5417
31#define TIOCMSET 0x5418
32#define TIOCGSOFTCAR 0x5419
33#define TIOCSSOFTCAR 0x541A
34#define FIONREAD 0x541B
35#define TIOCINQ FIONREAD
36#define TIOCLINUX 0x541C
37#define TIOCCONS 0x541D
38#define TIOCGSERIAL 0x541E
39#define TIOCSSERIAL 0x541F
40#define TIOCPKT 0x5420
41#define FIONBIO 0x5421
42#define TIOCNOTTY 0x5422
43#define TIOCSETD 0x5423
44#define TIOCGETD 0x5424
45#define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */
46/* #define TIOCTTYGSTRUCT 0x5426 - Former debugging-only ioctl */
47#define TIOCSBRK 0x5427 /* BSD compatibility */
48#define TIOCCBRK 0x5428 /* BSD compatibility */
49#define TIOCGSID 0x5429 /* Return the session ID of FD */
50#define TCGETS2 _IOR('T',0x2A, struct termios2)
51#define TCSETS2 _IOW('T',0x2B, struct termios2)
52#define TCSETSW2 _IOW('T',0x2C, struct termios2)
53#define TCSETSF2 _IOW('T',0x2D, struct termios2)
54#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
55#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */
56
57#define FIONCLEX 0x5450
58#define FIOCLEX 0x5451
59#define FIOASYNC 0x5452
60#define TIOCSERCONFIG 0x5453
61#define TIOCSERGWILD 0x5454
62#define TIOCSERSWILD 0x5455
63#define TIOCGLCKTRMIOS 0x5456
64#define TIOCSLCKTRMIOS 0x5457
65#define TIOCSERGSTRUCT 0x5458 /* For debugging only */
66#define TIOCSERGETLSR 0x5459 /* Get line status register */
67#define TIOCSERGETMULTI 0x545A /* Get multiport config */
68#define TIOCSERSETMULTI 0x545B /* Set multiport config */
69
70#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */
71#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */
72#define TIOCGHAYESESP 0x545E /* Get Hayes ESP configuration */
73#define TIOCSHAYESESP 0x545F /* Set Hayes ESP configuration */
74#define FIOQSIZE 0x5460
75
76/* Used for packet mode */
77#define TIOCPKT_DATA 0
78#define TIOCPKT_FLUSHREAD 1
79#define TIOCPKT_FLUSHWRITE 2
80#define TIOCPKT_STOP 4
81#define TIOCPKT_START 8
82#define TIOCPKT_NOSTOP 16
83#define TIOCPKT_DOSTOP 32
84
85#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */
86
87#endif /* __ARCH_M32R_IOCTLS_H__ */
diff --git a/arch/m32r/include/asm/ipcbuf.h b/arch/m32r/include/asm/ipcbuf.h
new file mode 100644
index 000000000000..8d2d7c8ffdb0
--- /dev/null
+++ b/arch/m32r/include/asm/ipcbuf.h
@@ -0,0 +1,29 @@
1#ifndef _ASM_M32R_IPCBUF_H
2#define _ASM_M32R_IPCBUF_H
3
4/*
5 * The ipc64_perm structure for m32r architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 32-bit mode_t and seq
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct ipc64_perm
15{
16 __kernel_key_t key;
17 __kernel_uid32_t uid;
18 __kernel_gid32_t gid;
19 __kernel_uid32_t cuid;
20 __kernel_gid32_t cgid;
21 __kernel_mode_t mode;
22 unsigned short __pad1;
23 unsigned short seq;
24 unsigned short __pad2;
25 unsigned long __unused1;
26 unsigned long __unused2;
27};
28
29#endif /* _ASM_M32R_IPCBUF_H */
diff --git a/arch/m32r/include/asm/irq.h b/arch/m32r/include/asm/irq.h
new file mode 100644
index 000000000000..242028b4d86a
--- /dev/null
+++ b/arch/m32r/include/asm/irq.h
@@ -0,0 +1,90 @@
1#ifdef __KERNEL__
2#ifndef _ASM_M32R_IRQ_H
3#define _ASM_M32R_IRQ_H
4
5
6#if defined(CONFIG_PLAT_USRV)
7/*
8 * IRQ definitions for M32700UT
9 * M32700 Chip: 64 interrupts
10 * ICU of M32700UT-on-board PLD: 32 interrupts cascaded to INT1# chip pin
11 */
12#define M32700UT_NUM_CPU_IRQ (64)
13#define M32700UT_NUM_PLD_IRQ (32)
14#define M32700UT_IRQ_BASE 0
15#define M32700UT_CPU_IRQ_BASE M32700UT_IRQ_BASE
16#define M32700UT_PLD_IRQ_BASE (M32700UT_CPU_IRQ_BASE + M32700UT_NUM_CPU_IRQ)
17
18#define NR_IRQS (M32700UT_NUM_CPU_IRQ + M32700UT_NUM_PLD_IRQ)
19#elif defined(CONFIG_PLAT_M32700UT)
20/*
21 * IRQ definitions for M32700UT(Rev.C) + M32R-LAN
22 * M32700 Chip: 64 interrupts
23 * ICU of M32700UT-on-board PLD: 32 interrupts cascaded to INT1# chip pin
24 * ICU of M32R-LCD-on-board PLD: 32 interrupts cascaded to INT2# chip pin
25 * ICU of M32R-LAN-on-board PLD: 32 interrupts cascaded to INT0# chip pin
26 */
27#define M32700UT_NUM_CPU_IRQ (64)
28#define M32700UT_NUM_PLD_IRQ (32)
29#define M32700UT_NUM_LCD_PLD_IRQ (32)
30#define M32700UT_NUM_LAN_PLD_IRQ (32)
31#define M32700UT_IRQ_BASE 0
32#define M32700UT_CPU_IRQ_BASE (M32700UT_IRQ_BASE)
33#define M32700UT_PLD_IRQ_BASE \
34 (M32700UT_CPU_IRQ_BASE + M32700UT_NUM_CPU_IRQ)
35#define M32700UT_LCD_PLD_IRQ_BASE \
36 (M32700UT_PLD_IRQ_BASE + M32700UT_NUM_PLD_IRQ)
37#define M32700UT_LAN_PLD_IRQ_BASE \
38 (M32700UT_LCD_PLD_IRQ_BASE + M32700UT_NUM_LCD_PLD_IRQ)
39
40#define NR_IRQS \
41 (M32700UT_NUM_CPU_IRQ + M32700UT_NUM_PLD_IRQ \
42 + M32700UT_NUM_LCD_PLD_IRQ + M32700UT_NUM_LAN_PLD_IRQ)
43#elif defined(CONFIG_PLAT_OPSPUT)
44/*
45 * IRQ definitions for OPSPUT + M32R-LAN
46 * OPSP Chip: 64 interrupts
47 * ICU of OPSPUT-on-board PLD: 32 interrupts cascaded to INT1# chip pin
48 * ICU of M32R-LCD-on-board PLD: 32 interrupts cascaded to INT2# chip pin
49 * ICU of M32R-LAN-on-board PLD: 32 interrupts cascaded to INT0# chip pin
50 */
51#define OPSPUT_NUM_CPU_IRQ (64)
52#define OPSPUT_NUM_PLD_IRQ (32)
53#define OPSPUT_NUM_LCD_PLD_IRQ (32)
54#define OPSPUT_NUM_LAN_PLD_IRQ (32)
55#define OPSPUT_IRQ_BASE 0
56#define OPSPUT_CPU_IRQ_BASE (OPSPUT_IRQ_BASE)
57#define OPSPUT_PLD_IRQ_BASE \
58 (OPSPUT_CPU_IRQ_BASE + OPSPUT_NUM_CPU_IRQ)
59#define OPSPUT_LCD_PLD_IRQ_BASE \
60 (OPSPUT_PLD_IRQ_BASE + OPSPUT_NUM_PLD_IRQ)
61#define OPSPUT_LAN_PLD_IRQ_BASE \
62 (OPSPUT_LCD_PLD_IRQ_BASE + OPSPUT_NUM_LCD_PLD_IRQ)
63
64#define NR_IRQS \
65 (OPSPUT_NUM_CPU_IRQ + OPSPUT_NUM_PLD_IRQ \
66 + OPSPUT_NUM_LCD_PLD_IRQ + OPSPUT_NUM_LAN_PLD_IRQ)
67
68#elif defined(CONFIG_PLAT_M32104UT)
69/*
70 * IRQ definitions for M32104UT
71 * M32104 Chip: 64 interrupts
72 * ICU of M32104UT-on-board PLD: 32 interrupts cascaded to INT1# chip pin
73 */
74#define M32104UT_NUM_CPU_IRQ (64)
75#define M32104UT_NUM_PLD_IRQ (32)
76#define M32104UT_IRQ_BASE 0
77#define M32104UT_CPU_IRQ_BASE M32104UT_IRQ_BASE
78#define M32104UT_PLD_IRQ_BASE (M32104UT_CPU_IRQ_BASE + M32104UT_NUM_CPU_IRQ)
79
80#define NR_IRQS \
81 (M32104UT_NUM_CPU_IRQ + M32104UT_NUM_PLD_IRQ)
82
83#else
84#define NR_IRQS 64
85#endif
86
87#define irq_canonicalize(irq) (irq)
88
89#endif /* _ASM_M32R_IRQ_H */
90#endif /* __KERNEL__ */
diff --git a/arch/m32r/include/asm/irq_regs.h b/arch/m32r/include/asm/irq_regs.h
new file mode 100644
index 000000000000..3dd9c0b70270
--- /dev/null
+++ b/arch/m32r/include/asm/irq_regs.h
@@ -0,0 +1 @@
#include <asm-generic/irq_regs.h>
diff --git a/arch/m32r/include/asm/kdebug.h b/arch/m32r/include/asm/kdebug.h
new file mode 100644
index 000000000000..6ece1b037665
--- /dev/null
+++ b/arch/m32r/include/asm/kdebug.h
@@ -0,0 +1 @@
#include <asm-generic/kdebug.h>
diff --git a/arch/m32r/include/asm/kmap_types.h b/arch/m32r/include/asm/kmap_types.h
new file mode 100644
index 000000000000..fa94dc6410ea
--- /dev/null
+++ b/arch/m32r/include/asm/kmap_types.h
@@ -0,0 +1,29 @@
1#ifndef __M32R_KMAP_TYPES_H
2#define __M32R_KMAP_TYPES_H
3
4#ifdef CONFIG_DEBUG_HIGHMEM
5# define D(n) __KM_FENCE_##n ,
6#else
7# define D(n)
8#endif
9
10enum km_type {
11D(0) KM_BOUNCE_READ,
12D(1) KM_SKB_SUNRPC_DATA,
13D(2) KM_SKB_DATA_SOFTIRQ,
14D(3) KM_USER0,
15D(4) KM_USER1,
16D(5) KM_BIO_SRC_IRQ,
17D(6) KM_BIO_DST_IRQ,
18D(7) KM_PTE0,
19D(8) KM_PTE1,
20D(9) KM_IRQ0,
21D(10) KM_IRQ1,
22D(11) KM_SOFTIRQ0,
23D(12) KM_SOFTIRQ1,
24D(13) KM_TYPE_NR
25};
26
27#undef D
28
29#endif /* __M32R_KMAP_TYPES_H */
diff --git a/arch/m32r/include/asm/linkage.h b/arch/m32r/include/asm/linkage.h
new file mode 100644
index 000000000000..a9fb151cf648
--- /dev/null
+++ b/arch/m32r/include/asm/linkage.h
@@ -0,0 +1,7 @@
1#ifndef __ASM_LINKAGE_H
2#define __ASM_LINKAGE_H
3
4#define __ALIGN .balign 4
5#define __ALIGN_STR ".balign 4"
6
7#endif /* __ASM_LINKAGE_H */
diff --git a/arch/m32r/include/asm/local.h b/arch/m32r/include/asm/local.h
new file mode 100644
index 000000000000..22256d138630
--- /dev/null
+++ b/arch/m32r/include/asm/local.h
@@ -0,0 +1,366 @@
1#ifndef __M32R_LOCAL_H
2#define __M32R_LOCAL_H
3
4/*
5 * linux/include/asm-m32r/local.h
6 *
7 * M32R version:
8 * Copyright (C) 2001, 2002 Hitoshi Yamamoto
9 * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
10 * Copyright (C) 2007 Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca>
11 */
12
13#include <linux/percpu.h>
14#include <asm/assembler.h>
15#include <asm/system.h>
16#include <asm/local.h>
17
18/*
19 * Atomic operations that C can't guarantee us. Useful for
20 * resource counting etc..
21 */
22
23/*
24 * Make sure gcc doesn't try to be clever and move things around
25 * on us. We need to use _exactly_ the address the user gave us,
26 * not some alias that contains the same information.
27 */
28typedef struct { volatile int counter; } local_t;
29
30#define LOCAL_INIT(i) { (i) }
31
32/**
33 * local_read - read local variable
34 * @l: pointer of type local_t
35 *
36 * Atomically reads the value of @l.
37 */
38#define local_read(l) ((l)->counter)
39
40/**
41 * local_set - set local variable
42 * @l: pointer of type local_t
43 * @i: required value
44 *
45 * Atomically sets the value of @l to @i.
46 */
47#define local_set(l, i) (((l)->counter) = (i))
48
49/**
50 * local_add_return - add long to local variable and return it
51 * @i: long value to add
52 * @l: pointer of type local_t
53 *
54 * Atomically adds @i to @l and return (@i + @l).
55 */
56static inline long local_add_return(long i, local_t *l)
57{
58 unsigned long flags;
59 long result;
60
61 local_irq_save(flags);
62 __asm__ __volatile__ (
63 "# local_add_return \n\t"
64 DCACHE_CLEAR("%0", "r4", "%1")
65 "ld %0, @%1; \n\t"
66 "add %0, %2; \n\t"
67 "st %0, @%1; \n\t"
68 : "=&r" (result)
69 : "r" (&l->counter), "r" (i)
70 : "memory"
71#ifdef CONFIG_CHIP_M32700_TS1
72 , "r4"
73#endif /* CONFIG_CHIP_M32700_TS1 */
74 );
75 local_irq_restore(flags);
76
77 return result;
78}
79
80/**
81 * local_sub_return - subtract long from local variable and return it
82 * @i: long value to subtract
83 * @l: pointer of type local_t
84 *
85 * Atomically subtracts @i from @l and return (@l - @i).
86 */
87static inline long local_sub_return(long i, local_t *l)
88{
89 unsigned long flags;
90 long result;
91
92 local_irq_save(flags);
93 __asm__ __volatile__ (
94 "# local_sub_return \n\t"
95 DCACHE_CLEAR("%0", "r4", "%1")
96 "ld %0, @%1; \n\t"
97 "sub %0, %2; \n\t"
98 "st %0, @%1; \n\t"
99 : "=&r" (result)
100 : "r" (&l->counter), "r" (i)
101 : "memory"
102#ifdef CONFIG_CHIP_M32700_TS1
103 , "r4"
104#endif /* CONFIG_CHIP_M32700_TS1 */
105 );
106 local_irq_restore(flags);
107
108 return result;
109}
110
111/**
112 * local_add - add long to local variable
113 * @i: long value to add
114 * @l: pointer of type local_t
115 *
116 * Atomically adds @i to @l.
117 */
118#define local_add(i, l) ((void) local_add_return((i), (l)))
119
120/**
121 * local_sub - subtract the local variable
122 * @i: long value to subtract
123 * @l: pointer of type local_t
124 *
125 * Atomically subtracts @i from @l.
126 */
127#define local_sub(i, l) ((void) local_sub_return((i), (l)))
128
129/**
130 * local_sub_and_test - subtract value from variable and test result
131 * @i: integer value to subtract
132 * @l: pointer of type local_t
133 *
134 * Atomically subtracts @i from @l and returns
135 * true if the result is zero, or false for all
136 * other cases.
137 */
138#define local_sub_and_test(i, l) (local_sub_return((i), (l)) == 0)
139
140/**
141 * local_inc_return - increment local variable and return it
142 * @l: pointer of type local_t
143 *
144 * Atomically increments @l by 1 and returns the result.
145 */
146static inline long local_inc_return(local_t *l)
147{
148 unsigned long flags;
149 long result;
150
151 local_irq_save(flags);
152 __asm__ __volatile__ (
153 "# local_inc_return \n\t"
154 DCACHE_CLEAR("%0", "r4", "%1")
155 "ld %0, @%1; \n\t"
156 "addi %0, #1; \n\t"
157 "st %0, @%1; \n\t"
158 : "=&r" (result)
159 : "r" (&l->counter)
160 : "memory"
161#ifdef CONFIG_CHIP_M32700_TS1
162 , "r4"
163#endif /* CONFIG_CHIP_M32700_TS1 */
164 );
165 local_irq_restore(flags);
166
167 return result;
168}
169
170/**
171 * local_dec_return - decrement local variable and return it
172 * @l: pointer of type local_t
173 *
174 * Atomically decrements @l by 1 and returns the result.
175 */
176static inline long local_dec_return(local_t *l)
177{
178 unsigned long flags;
179 long result;
180
181 local_irq_save(flags);
182 __asm__ __volatile__ (
183 "# local_dec_return \n\t"
184 DCACHE_CLEAR("%0", "r4", "%1")
185 "ld %0, @%1; \n\t"
186 "addi %0, #-1; \n\t"
187 "st %0, @%1; \n\t"
188 : "=&r" (result)
189 : "r" (&l->counter)
190 : "memory"
191#ifdef CONFIG_CHIP_M32700_TS1
192 , "r4"
193#endif /* CONFIG_CHIP_M32700_TS1 */
194 );
195 local_irq_restore(flags);
196
197 return result;
198}
199
200/**
201 * local_inc - increment local variable
202 * @l: pointer of type local_t
203 *
204 * Atomically increments @l by 1.
205 */
206#define local_inc(l) ((void)local_inc_return(l))
207
208/**
209 * local_dec - decrement local variable
210 * @l: pointer of type local_t
211 *
212 * Atomically decrements @l by 1.
213 */
214#define local_dec(l) ((void)local_dec_return(l))
215
216/**
217 * local_inc_and_test - increment and test
218 * @l: pointer of type local_t
219 *
220 * Atomically increments @l by 1
221 * and returns true if the result is zero, or false for all
222 * other cases.
223 */
224#define local_inc_and_test(l) (local_inc_return(l) == 0)
225
226/**
227 * local_dec_and_test - decrement and test
228 * @l: pointer of type local_t
229 *
230 * Atomically decrements @l by 1 and
231 * returns true if the result is 0, or false for all
232 * other cases.
233 */
234#define local_dec_and_test(l) (local_dec_return(l) == 0)
235
236/**
237 * local_add_negative - add and test if negative
238 * @l: pointer of type local_t
239 * @i: integer value to add
240 *
241 * Atomically adds @i to @l and returns true
242 * if the result is negative, or false when
243 * result is greater than or equal to zero.
244 */
245#define local_add_negative(i, l) (local_add_return((i), (l)) < 0)
246
247#define local_cmpxchg(l, o, n) (cmpxchg_local(&((l)->counter), (o), (n)))
248#define local_xchg(v, new) (xchg_local(&((l)->counter), new))
249
250/**
251 * local_add_unless - add unless the number is a given value
252 * @l: pointer of type local_t
253 * @a: the amount to add to l...
254 * @u: ...unless l is equal to u.
255 *
256 * Atomically adds @a to @l, so long as it was not @u.
257 * Returns non-zero if @l was not @u, and zero otherwise.
258 */
259static inline int local_add_unless(local_t *l, long a, long u)
260{
261 long c, old;
262 c = local_read(l);
263 for (;;) {
264 if (unlikely(c == (u)))
265 break;
266 old = local_cmpxchg((l), c, c + (a));
267 if (likely(old == c))
268 break;
269 c = old;
270 }
271 return c != (u);
272}
273
274#define local_inc_not_zero(l) local_add_unless((l), 1, 0)
275
276static inline void local_clear_mask(unsigned long mask, local_t *addr)
277{
278 unsigned long flags;
279 unsigned long tmp;
280
281 local_irq_save(flags);
282 __asm__ __volatile__ (
283 "# local_clear_mask \n\t"
284 DCACHE_CLEAR("%0", "r5", "%1")
285 "ld %0, @%1; \n\t"
286 "and %0, %2; \n\t"
287 "st %0, @%1; \n\t"
288 : "=&r" (tmp)
289 : "r" (addr), "r" (~mask)
290 : "memory"
291#ifdef CONFIG_CHIP_M32700_TS1
292 , "r5"
293#endif /* CONFIG_CHIP_M32700_TS1 */
294 );
295 local_irq_restore(flags);
296}
297
298static inline void local_set_mask(unsigned long mask, local_t *addr)
299{
300 unsigned long flags;
301 unsigned long tmp;
302
303 local_irq_save(flags);
304 __asm__ __volatile__ (
305 "# local_set_mask \n\t"
306 DCACHE_CLEAR("%0", "r5", "%1")
307 "ld %0, @%1; \n\t"
308 "or %0, %2; \n\t"
309 "st %0, @%1; \n\t"
310 : "=&r" (tmp)
311 : "r" (addr), "r" (mask)
312 : "memory"
313#ifdef CONFIG_CHIP_M32700_TS1
314 , "r5"
315#endif /* CONFIG_CHIP_M32700_TS1 */
316 );
317 local_irq_restore(flags);
318}
319
320/* Atomic operations are already serializing on m32r */
321#define smp_mb__before_local_dec() barrier()
322#define smp_mb__after_local_dec() barrier()
323#define smp_mb__before_local_inc() barrier()
324#define smp_mb__after_local_inc() barrier()
325
326/* Use these for per-cpu local_t variables: on some archs they are
327 * much more efficient than these naive implementations. Note they take
328 * a variable, not an address.
329 */
330
331#define __local_inc(l) ((l)->a.counter++)
332#define __local_dec(l) ((l)->a.counter++)
333#define __local_add(i, l) ((l)->a.counter += (i))
334#define __local_sub(i, l) ((l)->a.counter -= (i))
335
336/* Use these for per-cpu local_t variables: on some archs they are
337 * much more efficient than these naive implementations. Note they take
338 * a variable, not an address.
339 */
340
341/* Need to disable preemption for the cpu local counters otherwise we could
342 still access a variable of a previous CPU in a non local way. */
343#define cpu_local_wrap_v(l) \
344 ({ local_t res__; \
345 preempt_disable(); \
346 res__ = (l); \
347 preempt_enable(); \
348 res__; })
349#define cpu_local_wrap(l) \
350 ({ preempt_disable(); \
351 l; \
352 preempt_enable(); }) \
353
354#define cpu_local_read(l) cpu_local_wrap_v(local_read(&__get_cpu_var(l)))
355#define cpu_local_set(l, i) cpu_local_wrap(local_set(&__get_cpu_var(l), (i)))
356#define cpu_local_inc(l) cpu_local_wrap(local_inc(&__get_cpu_var(l)))
357#define cpu_local_dec(l) cpu_local_wrap(local_dec(&__get_cpu_var(l)))
358#define cpu_local_add(i, l) cpu_local_wrap(local_add((i), &__get_cpu_var(l)))
359#define cpu_local_sub(i, l) cpu_local_wrap(local_sub((i), &__get_cpu_var(l)))
360
361#define __cpu_local_inc(l) cpu_local_inc(l)
362#define __cpu_local_dec(l) cpu_local_dec(l)
363#define __cpu_local_add(i, l) cpu_local_add((i), (l))
364#define __cpu_local_sub(i, l) cpu_local_sub((i), (l))
365
366#endif /* __M32R_LOCAL_H */
diff --git a/arch/m32r/include/asm/m32102.h b/arch/m32r/include/asm/m32102.h
new file mode 100644
index 000000000000..52807f8db166
--- /dev/null
+++ b/arch/m32r/include/asm/m32102.h
@@ -0,0 +1,314 @@
1#ifndef _M32102_H_
2#define _M32102_H_
3
4/*
5 * Renesas M32R 32102 group
6 *
7 * Copyright (c) 2001 Hitoshi Yamamoto
8 * Copyright (c) 2003, 2004 Renesas Technology Corp.
9 */
10
11/*======================================================================*
12 * Special Function Register
13 *======================================================================*/
14#if !defined(CONFIG_CHIP_M32104)
15#define M32R_SFR_OFFSET (0x00E00000) /* 0x00E00000-0x00EFFFFF 1[MB] */
16#else
17#define M32R_SFR_OFFSET (0x00700000) /* 0x00700000-0x007FFFFF 1[MB] */
18#endif
19
20/*
21 * Clock and Power Management registers.
22 */
23#define M32R_CPM_OFFSET (0x000F4000+M32R_SFR_OFFSET)
24
25#define M32R_CPM_CPUCLKCR_PORTL (0x00+M32R_CPM_OFFSET)
26#define M32R_CPM_CLKMOD_PORTL (0x04+M32R_CPM_OFFSET)
27#define M32R_CPM_PLLCR_PORTL (0x08+M32R_CPM_OFFSET)
28
29/*
30 * DMA Controller registers.
31 */
32#define M32R_DMA_OFFSET (0x000F8000+M32R_SFR_OFFSET)
33
34#define M32R_DMAEN_PORTL (0x000+M32R_DMA_OFFSET)
35#define M32R_DMAISTS_PORTL (0x004+M32R_DMA_OFFSET)
36#define M32R_DMAEDET_PORTL (0x008+M32R_DMA_OFFSET)
37#define M32R_DMAASTS_PORTL (0x00c+M32R_DMA_OFFSET)
38
39#define M32R_DMA0CR0_PORTL (0x100+M32R_DMA_OFFSET)
40#define M32R_DMA0CR1_PORTL (0x104+M32R_DMA_OFFSET)
41#define M32R_DMA0CSA_PORTL (0x108+M32R_DMA_OFFSET)
42#define M32R_DMA0RSA_PORTL (0x10c+M32R_DMA_OFFSET)
43#define M32R_DMA0CDA_PORTL (0x110+M32R_DMA_OFFSET)
44#define M32R_DMA0RDA_PORTL (0x114+M32R_DMA_OFFSET)
45#define M32R_DMA0CBCUT_PORTL (0x118+M32R_DMA_OFFSET)
46#define M32R_DMA0RBCUT_PORTL (0x11c+M32R_DMA_OFFSET)
47
48#define M32R_DMA1CR0_PORTL (0x200+M32R_DMA_OFFSET)
49#define M32R_DMA1CR1_PORTL (0x204+M32R_DMA_OFFSET)
50#define M32R_DMA1CSA_PORTL (0x208+M32R_DMA_OFFSET)
51#define M32R_DMA1RSA_PORTL (0x20c+M32R_DMA_OFFSET)
52#define M32R_DMA1CDA_PORTL (0x210+M32R_DMA_OFFSET)
53#define M32R_DMA1RDA_PORTL (0x214+M32R_DMA_OFFSET)
54#define M32R_DMA1CBCUT_PORTL (0x218+M32R_DMA_OFFSET)
55#define M32R_DMA1RBCUT_PORTL (0x21c+M32R_DMA_OFFSET)
56
57/*
58 * Multi Function Timer registers.
59 */
60#define M32R_MFT_OFFSET (0x000FC000+M32R_SFR_OFFSET)
61
62#define M32R_MFTCR_PORTL (0x000+M32R_MFT_OFFSET) /* MFT control */
63#define M32R_MFTRPR_PORTL (0x004+M32R_MFT_OFFSET) /* MFT real port */
64
65#define M32R_MFT0_OFFSET (0x100+M32R_MFT_OFFSET)
66#define M32R_MFT0MOD_PORTL (0x00+M32R_MFT0_OFFSET) /* MFT0 mode */
67#define M32R_MFT0BOS_PORTL (0x04+M32R_MFT0_OFFSET) /* MFT0 b-port output status */
68#define M32R_MFT0CUT_PORTL (0x08+M32R_MFT0_OFFSET) /* MFT0 count */
69#define M32R_MFT0RLD_PORTL (0x0C+M32R_MFT0_OFFSET) /* MFT0 reload */
70#define M32R_MFT0CMPRLD_PORTL (0x10+M32R_MFT0_OFFSET) /* MFT0 compare reload */
71
72#define M32R_MFT1_OFFSET (0x200+M32R_MFT_OFFSET)
73#define M32R_MFT1MOD_PORTL (0x00+M32R_MFT1_OFFSET) /* MFT1 mode */
74#define M32R_MFT1BOS_PORTL (0x04+M32R_MFT1_OFFSET) /* MFT1 b-port output status */
75#define M32R_MFT1CUT_PORTL (0x08+M32R_MFT1_OFFSET) /* MFT1 count */
76#define M32R_MFT1RLD_PORTL (0x0C+M32R_MFT1_OFFSET) /* MFT1 reload */
77#define M32R_MFT1CMPRLD_PORTL (0x10+M32R_MFT1_OFFSET) /* MFT1 compare reload */
78
79#define M32R_MFT2_OFFSET (0x300+M32R_MFT_OFFSET)
80#define M32R_MFT2MOD_PORTL (0x00+M32R_MFT2_OFFSET) /* MFT2 mode */
81#define M32R_MFT2BOS_PORTL (0x04+M32R_MFT2_OFFSET) /* MFT2 b-port output status */
82#define M32R_MFT2CUT_PORTL (0x08+M32R_MFT2_OFFSET) /* MFT2 count */
83#define M32R_MFT2RLD_PORTL (0x0C+M32R_MFT2_OFFSET) /* MFT2 reload */
84#define M32R_MFT2CMPRLD_PORTL (0x10+M32R_MFT2_OFFSET) /* MFT2 compare reload */
85
86#define M32R_MFT3_OFFSET (0x400+M32R_MFT_OFFSET)
87#define M32R_MFT3MOD_PORTL (0x00+M32R_MFT3_OFFSET) /* MFT3 mode */
88#define M32R_MFT3BOS_PORTL (0x04+M32R_MFT3_OFFSET) /* MFT3 b-port output status */
89#define M32R_MFT3CUT_PORTL (0x08+M32R_MFT3_OFFSET) /* MFT3 count */
90#define M32R_MFT3RLD_PORTL (0x0C+M32R_MFT3_OFFSET) /* MFT3 reload */
91#define M32R_MFT3CMPRLD_PORTL (0x10+M32R_MFT3_OFFSET) /* MFT3 compare reload */
92
93#define M32R_MFT4_OFFSET (0x500+M32R_MFT_OFFSET)
94#define M32R_MFT4MOD_PORTL (0x00+M32R_MFT4_OFFSET) /* MFT4 mode */
95#define M32R_MFT4BOS_PORTL (0x04+M32R_MFT4_OFFSET) /* MFT4 b-port output status */
96#define M32R_MFT4CUT_PORTL (0x08+M32R_MFT4_OFFSET) /* MFT4 count */
97#define M32R_MFT4RLD_PORTL (0x0C+M32R_MFT4_OFFSET) /* MFT4 reload */
98#define M32R_MFT4CMPRLD_PORTL (0x10+M32R_MFT4_OFFSET) /* MFT4 compare reload */
99
100#define M32R_MFT5_OFFSET (0x600+M32R_MFT_OFFSET)
101#define M32R_MFT5MOD_PORTL (0x00+M32R_MFT5_OFFSET) /* MFT4 mode */
102#define M32R_MFT5BOS_PORTL (0x04+M32R_MFT5_OFFSET) /* MFT4 b-port output status */
103#define M32R_MFT5CUT_PORTL (0x08+M32R_MFT5_OFFSET) /* MFT4 count */
104#define M32R_MFT5RLD_PORTL (0x0C+M32R_MFT5_OFFSET) /* MFT4 reload */
105#define M32R_MFT5CMPRLD_PORTL (0x10+M32R_MFT5_OFFSET) /* MFT4 compare reload */
106
107#if (defined(CONFIG_CHIP_M32700) && !defined(CONFIG_PLAT_MAPPI2)) \
108 || defined(CONFIG_CHIP_M32104)
109#define M32R_MFTCR_MFT0MSK (1UL<<31) /* b0 */
110#define M32R_MFTCR_MFT1MSK (1UL<<30) /* b1 */
111#define M32R_MFTCR_MFT2MSK (1UL<<29) /* b2 */
112#define M32R_MFTCR_MFT3MSK (1UL<<28) /* b3 */
113#define M32R_MFTCR_MFT4MSK (1UL<<27) /* b4 */
114#define M32R_MFTCR_MFT5MSK (1UL<<26) /* b5 */
115#define M32R_MFTCR_MFT0EN (1UL<<23) /* b8 */
116#define M32R_MFTCR_MFT1EN (1UL<<22) /* b9 */
117#define M32R_MFTCR_MFT2EN (1UL<<21) /* b10 */
118#define M32R_MFTCR_MFT3EN (1UL<<20) /* b11 */
119#define M32R_MFTCR_MFT4EN (1UL<<19) /* b12 */
120#define M32R_MFTCR_MFT5EN (1UL<<18) /* b13 */
121#else
122#define M32R_MFTCR_MFT0MSK (1UL<<15) /* b16 */
123#define M32R_MFTCR_MFT1MSK (1UL<<14) /* b17 */
124#define M32R_MFTCR_MFT2MSK (1UL<<13) /* b18 */
125#define M32R_MFTCR_MFT3MSK (1UL<<12) /* b19 */
126#define M32R_MFTCR_MFT4MSK (1UL<<11) /* b20 */
127#define M32R_MFTCR_MFT5MSK (1UL<<10) /* b21 */
128#define M32R_MFTCR_MFT0EN (1UL<<7) /* b24 */
129#define M32R_MFTCR_MFT1EN (1UL<<6) /* b25 */
130#define M32R_MFTCR_MFT2EN (1UL<<5) /* b26 */
131#define M32R_MFTCR_MFT3EN (1UL<<4) /* b27 */
132#define M32R_MFTCR_MFT4EN (1UL<<3) /* b28 */
133#define M32R_MFTCR_MFT5EN (1UL<<2) /* b29 */
134#endif
135
136#define M32R_MFTMOD_CC_MASK (1UL<<15) /* b16 */
137#define M32R_MFTMOD_TCCR (1UL<<13) /* b18 */
138#define M32R_MFTMOD_GTSEL000 (0UL<<8) /* b21-23 : 000 */
139#define M32R_MFTMOD_GTSEL001 (1UL<<8) /* b21-23 : 001 */
140#define M32R_MFTMOD_GTSEL010 (2UL<<8) /* b21-23 : 010 */
141#define M32R_MFTMOD_GTSEL011 (3UL<<8) /* b21-23 : 011 */
142#define M32R_MFTMOD_GTSEL110 (6UL<<8) /* b21-23 : 110 */
143#define M32R_MFTMOD_GTSEL111 (7UL<<8) /* b21-23 : 111 */
144#define M32R_MFTMOD_CMSEL (1UL<<3) /* b28 */
145#define M32R_MFTMOD_CSSEL000 (0UL<<0) /* b29-b31 : 000 */
146#define M32R_MFTMOD_CSSEL001 (1UL<<0) /* b29-b31 : 001 */
147#define M32R_MFTMOD_CSSEL010 (2UL<<0) /* b29-b31 : 010 */
148#define M32R_MFTMOD_CSSEL011 (3UL<<0) /* b29-b31 : 011 */
149#define M32R_MFTMOD_CSSEL100 (4UL<<0) /* b29-b31 : 100 */
150#define M32R_MFTMOD_CSSEL110 (6UL<<0) /* b29-b31 : 110 */
151
152/*
153 * Serial I/O registers.
154 */
155#define M32R_SIO_OFFSET (0x000FD000+M32R_SFR_OFFSET)
156
157#define M32R_SIO0_CR_PORTL (0x000+M32R_SIO_OFFSET)
158#define M32R_SIO0_MOD0_PORTL (0x004+M32R_SIO_OFFSET)
159#define M32R_SIO0_MOD1_PORTL (0x008+M32R_SIO_OFFSET)
160#define M32R_SIO0_STS_PORTL (0x00C+M32R_SIO_OFFSET)
161#define M32R_SIO0_TRCR_PORTL (0x010+M32R_SIO_OFFSET)
162#define M32R_SIO0_BAUR_PORTL (0x014+M32R_SIO_OFFSET)
163#define M32R_SIO0_RBAUR_PORTL (0x018+M32R_SIO_OFFSET)
164#define M32R_SIO0_TXB_PORTL (0x01C+M32R_SIO_OFFSET)
165#define M32R_SIO0_RXB_PORTL (0x020+M32R_SIO_OFFSET)
166
167/*
168 * Interrupt Control Unit registers.
169 */
170#define M32R_ICU_OFFSET (0x000FF000+M32R_SFR_OFFSET)
171#define M32R_ICU_ISTS_PORTL (0x004+M32R_ICU_OFFSET)
172#define M32R_ICU_IREQ0_PORTL (0x008+M32R_ICU_OFFSET)
173#define M32R_ICU_IREQ1_PORTL (0x00C+M32R_ICU_OFFSET)
174#define M32R_ICU_SBICR_PORTL (0x018+M32R_ICU_OFFSET)
175#define M32R_ICU_IMASK_PORTL (0x01C+M32R_ICU_OFFSET)
176#define M32R_ICU_CR1_PORTL (0x200+M32R_ICU_OFFSET) /* INT0 */
177#define M32R_ICU_CR2_PORTL (0x204+M32R_ICU_OFFSET) /* INT1 */
178#define M32R_ICU_CR3_PORTL (0x208+M32R_ICU_OFFSET) /* INT2 */
179#define M32R_ICU_CR4_PORTL (0x20C+M32R_ICU_OFFSET) /* INT3 */
180#define M32R_ICU_CR5_PORTL (0x210+M32R_ICU_OFFSET) /* INT4 */
181#define M32R_ICU_CR6_PORTL (0x214+M32R_ICU_OFFSET) /* INT5 */
182#define M32R_ICU_CR7_PORTL (0x218+M32R_ICU_OFFSET) /* INT6 */
183#define M32R_ICU_CR8_PORTL (0x219+M32R_ICU_OFFSET) /* INT7 */
184#define M32R_ICU_CR16_PORTL (0x23C+M32R_ICU_OFFSET) /* MFT0 */
185#define M32R_ICU_CR17_PORTL (0x240+M32R_ICU_OFFSET) /* MFT1 */
186#define M32R_ICU_CR18_PORTL (0x244+M32R_ICU_OFFSET) /* MFT2 */
187#define M32R_ICU_CR19_PORTL (0x248+M32R_ICU_OFFSET) /* MFT3 */
188#define M32R_ICU_CR20_PORTL (0x24C+M32R_ICU_OFFSET) /* MFT4 */
189#define M32R_ICU_CR21_PORTL (0x250+M32R_ICU_OFFSET) /* MFT5 */
190#define M32R_ICU_CR32_PORTL (0x27C+M32R_ICU_OFFSET) /* DMA0 */
191#define M32R_ICU_CR33_PORTL (0x280+M32R_ICU_OFFSET) /* DMA1 */
192#define M32R_ICU_CR48_PORTL (0x2BC+M32R_ICU_OFFSET) /* SIO0 */
193#define M32R_ICU_CR49_PORTL (0x2C0+M32R_ICU_OFFSET) /* SIO0 */
194#define M32R_ICU_CR50_PORTL (0x2C4+M32R_ICU_OFFSET) /* SIO1 */
195#define M32R_ICU_CR51_PORTL (0x2C8+M32R_ICU_OFFSET) /* SIO1 */
196#define M32R_ICU_CR52_PORTL (0x2CC+M32R_ICU_OFFSET) /* SIO2 */
197#define M32R_ICU_CR53_PORTL (0x2D0+M32R_ICU_OFFSET) /* SIO2 */
198#define M32R_ICU_CR54_PORTL (0x2D4+M32R_ICU_OFFSET) /* SIO3 */
199#define M32R_ICU_CR55_PORTL (0x2D8+M32R_ICU_OFFSET) /* SIO3 */
200#define M32R_ICU_CR56_PORTL (0x2DC+M32R_ICU_OFFSET) /* SIO4 */
201#define M32R_ICU_CR57_PORTL (0x2E0+M32R_ICU_OFFSET) /* SIO4 */
202
203#ifdef CONFIG_SMP
204#define M32R_ICU_IPICR0_PORTL (0x2dc+M32R_ICU_OFFSET) /* IPI0 */
205#define M32R_ICU_IPICR1_PORTL (0x2e0+M32R_ICU_OFFSET) /* IPI1 */
206#define M32R_ICU_IPICR2_PORTL (0x2e4+M32R_ICU_OFFSET) /* IPI2 */
207#define M32R_ICU_IPICR3_PORTL (0x2e8+M32R_ICU_OFFSET) /* IPI3 */
208#define M32R_ICU_IPICR4_PORTL (0x2ec+M32R_ICU_OFFSET) /* IPI4 */
209#define M32R_ICU_IPICR5_PORTL (0x2f0+M32R_ICU_OFFSET) /* IPI5 */
210#define M32R_ICU_IPICR6_PORTL (0x2f4+M32R_ICU_OFFSET) /* IPI6 */
211#define M32R_ICU_IPICR7_PORTL (0x2f8+M32R_ICU_OFFSET) /* IPI7 */
212#endif /* CONFIG_SMP */
213
214#define M32R_ICUIMASK_IMSK0 (0UL<<16) /* b13-b15: Disable interrupt */
215#define M32R_ICUIMASK_IMSK1 (1UL<<16) /* b13-b15: Enable level 0 interrupt */
216#define M32R_ICUIMASK_IMSK2 (2UL<<16) /* b13-b15: Enable level 0,1 interrupt */
217#define M32R_ICUIMASK_IMSK3 (3UL<<16) /* b13-b15: Enable level 0-2 interrupt */
218#define M32R_ICUIMASK_IMSK4 (4UL<<16) /* b13-b15: Enable level 0-3 interrupt */
219#define M32R_ICUIMASK_IMSK5 (5UL<<16) /* b13-b15: Enable level 0-4 interrupt */
220#define M32R_ICUIMASK_IMSK6 (6UL<<16) /* b13-b15: Enable level 0-5 interrupt */
221#define M32R_ICUIMASK_IMSK7 (7UL<<16) /* b13-b15: Enable level 0-6 interrupt */
222
223#define M32R_ICUCR_IEN (1UL<<12) /* b19: Interrupt enable */
224#define M32R_ICUCR_IRQ (1UL<<8) /* b23: Interrupt request */
225#define M32R_ICUCR_ISMOD00 (0UL<<4) /* b26-b27: Interrupt sense mode Edge HtoL */
226#define M32R_ICUCR_ISMOD01 (1UL<<4) /* b26-b27: Interrupt sense mode Level L */
227#define M32R_ICUCR_ISMOD10 (2UL<<4) /* b26-b27: Interrupt sense mode Edge LtoH*/
228#define M32R_ICUCR_ISMOD11 (3UL<<4) /* b26-b27: Interrupt sense mode Level H */
229#define M32R_ICUCR_ILEVEL0 (0UL<<0) /* b29-b31: Interrupt priority level 0 */
230#define M32R_ICUCR_ILEVEL1 (1UL<<0) /* b29-b31: Interrupt priority level 1 */
231#define M32R_ICUCR_ILEVEL2 (2UL<<0) /* b29-b31: Interrupt priority level 2 */
232#define M32R_ICUCR_ILEVEL3 (3UL<<0) /* b29-b31: Interrupt priority level 3 */
233#define M32R_ICUCR_ILEVEL4 (4UL<<0) /* b29-b31: Interrupt priority level 4 */
234#define M32R_ICUCR_ILEVEL5 (5UL<<0) /* b29-b31: Interrupt priority level 5 */
235#define M32R_ICUCR_ILEVEL6 (6UL<<0) /* b29-b31: Interrupt priority level 6 */
236#define M32R_ICUCR_ILEVEL7 (7UL<<0) /* b29-b31: Disable interrupt */
237
238#define M32R_IRQ_INT0 (1) /* INT0 */
239#define M32R_IRQ_INT1 (2) /* INT1 */
240#define M32R_IRQ_INT2 (3) /* INT2 */
241#define M32R_IRQ_INT3 (4) /* INT3 */
242#define M32R_IRQ_INT4 (5) /* INT4 */
243#define M32R_IRQ_INT5 (6) /* INT5 */
244#define M32R_IRQ_INT6 (7) /* INT6 */
245#define M32R_IRQ_MFT0 (16) /* MFT0 */
246#define M32R_IRQ_MFT1 (17) /* MFT1 */
247#define M32R_IRQ_MFT2 (18) /* MFT2 */
248#define M32R_IRQ_MFT3 (19) /* MFT3 */
249#ifdef CONFIG_CHIP_M32104
250#define M32R_IRQ_MFTX0 (24) /* MFTX0 */
251#define M32R_IRQ_MFTX1 (25) /* MFTX1 */
252#define M32R_IRQ_DMA0 (32) /* DMA0 */
253#define M32R_IRQ_DMA1 (33) /* DMA1 */
254#define M32R_IRQ_DMA2 (34) /* DMA2 */
255#define M32R_IRQ_DMA3 (35) /* DMA3 */
256#define M32R_IRQ_SIO0_R (40) /* SIO0 send */
257#define M32R_IRQ_SIO0_S (41) /* SIO0 receive */
258#define M32R_IRQ_SIO1_R (42) /* SIO1 send */
259#define M32R_IRQ_SIO1_S (43) /* SIO1 receive */
260#define M32R_IRQ_SIO2_R (44) /* SIO2 send */
261#define M32R_IRQ_SIO2_S (45) /* SIO2 receive */
262#define M32R_IRQ_SIO3_R (46) /* SIO3 send */
263#define M32R_IRQ_SIO3_S (47) /* SIO3 receive */
264#define M32R_IRQ_ADC (56) /* ADC */
265#define M32R_IRQ_PC (57) /* PC */
266#else /* ! M32104 */
267#define M32R_IRQ_DMA0 (32) /* DMA0 */
268#define M32R_IRQ_DMA1 (33) /* DMA1 */
269#define M32R_IRQ_SIO0_R (48) /* SIO0 send */
270#define M32R_IRQ_SIO0_S (49) /* SIO0 receive */
271#define M32R_IRQ_SIO1_R (50) /* SIO1 send */
272#define M32R_IRQ_SIO1_S (51) /* SIO1 receive */
273#define M32R_IRQ_SIO2_R (52) /* SIO2 send */
274#define M32R_IRQ_SIO2_S (53) /* SIO2 receive */
275#define M32R_IRQ_SIO3_R (54) /* SIO3 send */
276#define M32R_IRQ_SIO3_S (55) /* SIO3 receive */
277#define M32R_IRQ_SIO4_R (56) /* SIO4 send */
278#define M32R_IRQ_SIO4_S (57) /* SIO4 receive */
279#endif /* ! M32104 */
280
281#ifdef CONFIG_SMP
282#define M32R_IRQ_IPI0 (56)
283#define M32R_IRQ_IPI1 (57)
284#define M32R_IRQ_IPI2 (58)
285#define M32R_IRQ_IPI3 (59)
286#define M32R_IRQ_IPI4 (60)
287#define M32R_IRQ_IPI5 (61)
288#define M32R_IRQ_IPI6 (62)
289#define M32R_IRQ_IPI7 (63)
290#define M32R_CPUID_PORTL (0xffffffe0)
291
292#define M32R_FPGA_TOP (0x000F0000+M32R_SFR_OFFSET)
293
294#define M32R_FPGA_NUM_OF_CPUS_PORTL (0x00+M32R_FPGA_TOP)
295#define M32R_FPGA_CPU_NAME0_PORTL (0x10+M32R_FPGA_TOP)
296#define M32R_FPGA_CPU_NAME1_PORTL (0x14+M32R_FPGA_TOP)
297#define M32R_FPGA_CPU_NAME2_PORTL (0x18+M32R_FPGA_TOP)
298#define M32R_FPGA_CPU_NAME3_PORTL (0x1c+M32R_FPGA_TOP)
299#define M32R_FPGA_MODEL_ID0_PORTL (0x20+M32R_FPGA_TOP)
300#define M32R_FPGA_MODEL_ID1_PORTL (0x24+M32R_FPGA_TOP)
301#define M32R_FPGA_MODEL_ID2_PORTL (0x28+M32R_FPGA_TOP)
302#define M32R_FPGA_MODEL_ID3_PORTL (0x2c+M32R_FPGA_TOP)
303#define M32R_FPGA_VERSION0_PORTL (0x30+M32R_FPGA_TOP)
304#define M32R_FPGA_VERSION1_PORTL (0x34+M32R_FPGA_TOP)
305
306#endif /* CONFIG_SMP */
307
308#ifndef __ASSEMBLY__
309typedef struct {
310 unsigned long icucr; /* ICU Control Register */
311} icu_data_t;
312#endif
313
314#endif /* _M32102_H_ */
diff --git a/arch/m32r/include/asm/m32104ut/m32104ut_pld.h b/arch/m32r/include/asm/m32104ut/m32104ut_pld.h
new file mode 100644
index 000000000000..2dc89d68b6d9
--- /dev/null
+++ b/arch/m32r/include/asm/m32104ut/m32104ut_pld.h
@@ -0,0 +1,161 @@
1#ifndef _M32104UT_M32104UT_PLD_H
2#define _M32104UT_M32104UT_PLD_H
3
4/*
5 * include/asm-m32r/m32104ut/m32104ut_pld.h
6 *
7 * Definitions for Programable Logic Device(PLD) on M32104UT board.
8 * Based on m32700ut_pld.h
9 *
10 * Copyright (c) 2002 Takeo Takahashi
11 * Copyright (c) 2005 Naoto Sugai
12 *
13 * This file is subject to the terms and conditions of the GNU General
14 * Public License. See the file "COPYING" in the main directory of
15 * this archive for more details.
16 */
17
18#if defined(CONFIG_PLAT_M32104UT)
19#define PLD_PLAT_BASE 0x02c00000
20#else
21#error "no platform configuration"
22#endif
23
24#ifndef __ASSEMBLY__
25/*
26 * C functions use non-cache address.
27 */
28#define PLD_BASE (PLD_PLAT_BASE /* + NONCACHE_OFFSET */)
29#define __reg8 (volatile unsigned char *)
30#define __reg16 (volatile unsigned short *)
31#define __reg32 (volatile unsigned int *)
32#else
33#define PLD_BASE (PLD_PLAT_BASE + NONCACHE_OFFSET)
34#define __reg8
35#define __reg16
36#define __reg32
37#endif /* __ASSEMBLY__ */
38
39/* CFC */
40#define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000)
41#define PLD_CFSTS __reg16(PLD_BASE + 0x0002)
42#define PLD_CFIMASK __reg16(PLD_BASE + 0x0004)
43#define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006)
44
45/* MMC */
46#define PLD_MMCCR __reg16(PLD_BASE + 0x4000)
47#define PLD_MMCMOD __reg16(PLD_BASE + 0x4002)
48#define PLD_MMCSTS __reg16(PLD_BASE + 0x4006)
49#define PLD_MMCBAUR __reg16(PLD_BASE + 0x400a)
50#define PLD_MMCCMDBCUT __reg16(PLD_BASE + 0x400c)
51#define PLD_MMCCDTBCUT __reg16(PLD_BASE + 0x400e)
52#define PLD_MMCDET __reg16(PLD_BASE + 0x4010)
53#define PLD_MMCWP __reg16(PLD_BASE + 0x4012)
54#define PLD_MMCWDATA __reg16(PLD_BASE + 0x5000)
55#define PLD_MMCRDATA __reg16(PLD_BASE + 0x6000)
56#define PLD_MMCCMDDATA __reg16(PLD_BASE + 0x7000)
57#define PLD_MMCRSPDATA __reg16(PLD_BASE + 0x7006)
58
59/* ICU
60 * ICUISTS: status register
61 * ICUIREQ0: request register
62 * ICUIREQ1: request register
63 * ICUCR3: control register for CFIREQ# interrupt
64 * ICUCR4: control register for CFC Card insert interrupt
65 * ICUCR5: control register for CFC Card eject interrupt
66 * ICUCR6: control register for external interrupt
67 * ICUCR11: control register for MMC Card insert/eject interrupt
68 * ICUCR13: control register for SC error interrupt
69 * ICUCR14: control register for SC receive interrupt
70 * ICUCR15: control register for SC send interrupt
71 */
72
73#define PLD_IRQ_INT0 (M32104UT_PLD_IRQ_BASE + 0) /* None */
74#define PLD_IRQ_CFIREQ (M32104UT_PLD_IRQ_BASE + 3) /* CF IREQ */
75#define PLD_IRQ_CFC_INSERT (M32104UT_PLD_IRQ_BASE + 4) /* CF Insert */
76#define PLD_IRQ_CFC_EJECT (M32104UT_PLD_IRQ_BASE + 5) /* CF Eject */
77#define PLD_IRQ_EXINT (M32104UT_PLD_IRQ_BASE + 6) /* EXINT */
78#define PLD_IRQ_MMCCARD (M32104UT_PLD_IRQ_BASE + 11) /* MMC Insert/Eject */
79#define PLD_IRQ_SC_ERROR (M32104UT_PLD_IRQ_BASE + 13) /* SC error */
80#define PLD_IRQ_SC_RCV (M32104UT_PLD_IRQ_BASE + 14) /* SC receive */
81#define PLD_IRQ_SC_SND (M32104UT_PLD_IRQ_BASE + 15) /* SC send */
82
83#define PLD_ICUISTS __reg16(PLD_BASE + 0x8002)
84#define PLD_ICUISTS_VECB_MASK (0xf000)
85#define PLD_ICUISTS_VECB(x) ((x) & PLD_ICUISTS_VECB_MASK)
86#define PLD_ICUISTS_ISN_MASK (0x07c0)
87#define PLD_ICUISTS_ISN(x) ((x) & PLD_ICUISTS_ISN_MASK)
88#define PLD_ICUCR3 __reg16(PLD_BASE + 0x8104)
89#define PLD_ICUCR4 __reg16(PLD_BASE + 0x8106)
90#define PLD_ICUCR5 __reg16(PLD_BASE + 0x8108)
91#define PLD_ICUCR6 __reg16(PLD_BASE + 0x810a)
92#define PLD_ICUCR11 __reg16(PLD_BASE + 0x8114)
93#define PLD_ICUCR13 __reg16(PLD_BASE + 0x8118)
94#define PLD_ICUCR14 __reg16(PLD_BASE + 0x811a)
95#define PLD_ICUCR15 __reg16(PLD_BASE + 0x811c)
96#define PLD_ICUCR_IEN (0x1000)
97#define PLD_ICUCR_IREQ (0x0100)
98#define PLD_ICUCR_ISMOD00 (0x0000) /* Low edge */
99#define PLD_ICUCR_ISMOD01 (0x0010) /* Low level */
100#define PLD_ICUCR_ISMOD02 (0x0020) /* High edge */
101#define PLD_ICUCR_ISMOD03 (0x0030) /* High level */
102#define PLD_ICUCR_ILEVEL0 (0x0000)
103#define PLD_ICUCR_ILEVEL1 (0x0001)
104#define PLD_ICUCR_ILEVEL2 (0x0002)
105#define PLD_ICUCR_ILEVEL3 (0x0003)
106#define PLD_ICUCR_ILEVEL4 (0x0004)
107#define PLD_ICUCR_ILEVEL5 (0x0005)
108#define PLD_ICUCR_ILEVEL6 (0x0006)
109#define PLD_ICUCR_ILEVEL7 (0x0007)
110
111/* Power Control of MMC and CF */
112#define PLD_CPCR __reg16(PLD_BASE + 0x14000)
113#define PLD_CPCR_CDP 0x0001
114
115/* LED Control
116 *
117 * 1: DIP swich side
118 * 2: Reset switch side
119 */
120#define PLD_IOLEDCR __reg16(PLD_BASE + 0x14002)
121#define PLD_IOLED_1_ON 0x001
122#define PLD_IOLED_1_OFF 0x000
123#define PLD_IOLED_2_ON 0x002
124#define PLD_IOLED_2_OFF 0x000
125
126/* DIP Switch
127 * 0: Write-protect of Flash Memory (0:protected, 1:non-protected)
128 * 1: -
129 * 2: -
130 * 3: -
131 */
132#define PLD_IOSWSTS __reg16(PLD_BASE + 0x14004)
133#define PLD_IOSWSTS_IOSW2 0x0200
134#define PLD_IOSWSTS_IOSW1 0x0100
135#define PLD_IOSWSTS_IOWP0 0x0001
136
137/* CRC */
138#define PLD_CRC7DATA __reg16(PLD_BASE + 0x18000)
139#define PLD_CRC7INDATA __reg16(PLD_BASE + 0x18002)
140#define PLD_CRC16DATA __reg16(PLD_BASE + 0x18004)
141#define PLD_CRC16INDATA __reg16(PLD_BASE + 0x18006)
142#define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008)
143#define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a)
144
145/* RTC */
146#define PLD_RTCCR __reg16(PLD_BASE + 0x1c000)
147#define PLD_RTCBAUR __reg16(PLD_BASE + 0x1c002)
148#define PLD_RTCWRDATA __reg16(PLD_BASE + 0x1c004)
149#define PLD_RTCRDDATA __reg16(PLD_BASE + 0x1c006)
150#define PLD_RTCRSTODT __reg16(PLD_BASE + 0x1c008)
151
152/* SIM Card */
153#define PLD_SCCR __reg16(PLD_BASE + 0x38000)
154#define PLD_SCMOD __reg16(PLD_BASE + 0x38004)
155#define PLD_SCSTS __reg16(PLD_BASE + 0x38006)
156#define PLD_SCINTCR __reg16(PLD_BASE + 0x38008)
157#define PLD_SCBAUR __reg16(PLD_BASE + 0x3800a)
158#define PLD_SCTXB __reg16(PLD_BASE + 0x3800c)
159#define PLD_SCRXB __reg16(PLD_BASE + 0x3800e)
160
161#endif /* _M32104UT_M32104UT_PLD_H */
diff --git a/arch/m32r/include/asm/m32700ut/m32700ut_lan.h b/arch/m32r/include/asm/m32700ut/m32700ut_lan.h
new file mode 100644
index 000000000000..aae810a4fb2c
--- /dev/null
+++ b/arch/m32r/include/asm/m32700ut/m32700ut_lan.h
@@ -0,0 +1,103 @@
1#ifndef _M32700UT_M32700UT_LAN_H
2#define _M32700UT_M32700UT_LAN_H
3
4/*
5 * include/asm-m32r/m32700ut/m32700ut_lan.h
6 *
7 * M32700UT-LAN board
8 *
9 * Copyright (c) 2002 Takeo Takahashi
10 *
11 * This file is subject to the terms and conditions of the GNU General
12 * Public License. See the file "COPYING" in the main directory of
13 * this archive for more details.
14 */
15
16#ifndef __ASSEMBLY__
17/*
18 * C functions use non-cache address.
19 */
20#define M32700UT_LAN_BASE (0x10000000 /* + NONCACHE_OFFSET */)
21#else
22#define M32700UT_LAN_BASE (0x10000000 + NONCACHE_OFFSET)
23#endif /* __ASSEMBLY__ */
24
25/* ICU
26 * ICUISTS: status register
27 * ICUIREQ0: request register
28 * ICUIREQ1: request register
29 * ICUCR3: control register for CFIREQ# interrupt
30 * ICUCR4: control register for CFC Card insert interrupt
31 * ICUCR5: control register for CFC Card eject interrupt
32 * ICUCR6: control register for external interrupt
33 * ICUCR11: control register for MMC Card insert/eject interrupt
34 * ICUCR13: control register for SC error interrupt
35 * ICUCR14: control register for SC receive interrupt
36 * ICUCR15: control register for SC send interrupt
37 * ICUCR16: control register for SIO0 receive interrupt
38 * ICUCR17: control register for SIO0 send interrupt
39 */
40#define M32700UT_LAN_IRQ_LAN (M32700UT_LAN_PLD_IRQ_BASE + 1) /* LAN */
41#define M32700UT_LAN_IRQ_I2C (M32700UT_LAN_PLD_IRQ_BASE + 3) /* I2C */
42
43#define M32700UT_LAN_ICUISTS __reg16(M32700UT_LAN_BASE + 0xc0002)
44#define M32700UT_LAN_ICUISTS_VECB_MASK (0xf000)
45#define M32700UT_LAN_VECB(x) ((x) & M32700UT_LAN_ICUISTS_VECB_MASK)
46#define M32700UT_LAN_ICUISTS_ISN_MASK (0x07c0)
47#define M32700UT_LAN_ICUISTS_ISN(x) ((x) & M32700UT_LAN_ICUISTS_ISN_MASK)
48#define M32700UT_LAN_ICUIREQ0 __reg16(M32700UT_LAN_BASE + 0xc0004)
49#define M32700UT_LAN_ICUCR1 __reg16(M32700UT_LAN_BASE + 0xc0010)
50#define M32700UT_LAN_ICUCR3 __reg16(M32700UT_LAN_BASE + 0xc0014)
51
52/*
53 * AR register on PLD
54 */
55#define ARVCR0 __reg32(M32700UT_LAN_BASE + 0x40000)
56#define ARVCR0_VDS 0x00080000
57#define ARVCR0_RST 0x00010000
58#define ARVCR1 __reg32(M32700UT_LAN_BASE + 0x40004)
59#define ARVCR1_QVGA 0x02000000
60#define ARVCR1_NORMAL 0x01000000
61#define ARVCR1_HIEN 0x00010000
62#define ARVHCOUNT __reg32(M32700UT_LAN_BASE + 0x40008)
63#define ARDATA __reg32(M32700UT_LAN_BASE + 0x40010)
64#define ARINTSEL __reg32(M32700UT_LAN_BASE + 0x40014)
65#define ARINTSEL_INT3 0x10000000 /* CPU INT3 */
66#define ARDATA32 __reg32(M32700UT_LAN_BASE + 0x04040010) // Block 5
67/*
68#define ARINTSEL_SEL2 0x00002000
69#define ARINTSEL_SEL3 0x00001000
70#define ARINTSEL_SEL6 0x00000200
71#define ARINTSEL_SEL7 0x00000100
72#define ARINTSEL_SEL9 0x00000040
73#define ARINTSEL_SEL10 0x00000020
74#define ARINTSEL_SEL11 0x00000010
75#define ARINTSEL_SEL12 0x00000008
76*/
77
78/*
79 * I2C register on PLD
80 */
81#define PLDI2CCR __reg32(M32700UT_LAN_BASE + 0x40040)
82#define PLDI2CCR_ES0 0x00000001 /* enable I2C interface */
83#define PLDI2CMOD __reg32(M32700UT_LAN_BASE + 0x40044)
84#define PLDI2CMOD_ACKCLK 0x00000200
85#define PLDI2CMOD_DTWD 0x00000100
86#define PLDI2CMOD_10BT 0x00000004
87#define PLDI2CMOD_ATM_NORMAL 0x00000000
88#define PLDI2CMOD_ATM_AUTO 0x00000003
89#define PLDI2CACK __reg32(M32700UT_LAN_BASE + 0x40048)
90#define PLDI2CACK_ACK 0x00000001
91#define PLDI2CFREQ __reg32(M32700UT_LAN_BASE + 0x4004c)
92#define PLDI2CCND __reg32(M32700UT_LAN_BASE + 0x40050)
93#define PLDI2CCND_START 0x00000001
94#define PLDI2CCND_STOP 0x00000002
95#define PLDI2CSTEN __reg32(M32700UT_LAN_BASE + 0x40054)
96#define PLDI2CSTEN_STEN 0x00000001
97#define PLDI2CDATA __reg32(M32700UT_LAN_BASE + 0x40060)
98#define PLDI2CSTS __reg32(M32700UT_LAN_BASE + 0x40064)
99#define PLDI2CSTS_TRX 0x00000020
100#define PLDI2CSTS_BB 0x00000010
101#define PLDI2CSTS_NOACK 0x00000001 /* 0:ack, 1:noack */
102
103#endif /* _M32700UT_M32700UT_LAN_H */
diff --git a/arch/m32r/include/asm/m32700ut/m32700ut_lcd.h b/arch/m32r/include/asm/m32700ut/m32700ut_lcd.h
new file mode 100644
index 000000000000..4c2489079788
--- /dev/null
+++ b/arch/m32r/include/asm/m32700ut/m32700ut_lcd.h
@@ -0,0 +1,55 @@
1#ifndef _M32700UT_M32700UT_LCD_H
2#define _M32700UT_M32700UT_LCD_H
3
4/*
5 * include/asm-m32r/m32700ut/m32700ut_lcd.h
6 *
7 * M32700UT-LCD board
8 *
9 * Copyright (c) 2002 Takeo Takahashi
10 *
11 * This file is subject to the terms and conditions of the GNU General
12 * Public License. See the file "COPYING" in the main directory of
13 * this archive for more details.
14 */
15
16#ifndef __ASSEMBLY__
17/*
18 * C functions use non-cache address.
19 */
20#define M32700UT_LCD_BASE (0x10000000 /* + NONCACHE_OFFSET */)
21#else
22#define M32700UT_LCD_BASE (0x10000000 + NONCACHE_OFFSET)
23#endif /* __ASSEMBLY__ */
24
25/*
26 * ICU
27 */
28#define M32700UT_LCD_IRQ_BAT_INT (M32700UT_LCD_PLD_IRQ_BASE + 1)
29#define M32700UT_LCD_IRQ_USB_INT1 (M32700UT_LCD_PLD_IRQ_BASE + 2)
30#define M32700UT_LCD_IRQ_AUDT0 (M32700UT_LCD_PLD_IRQ_BASE + 3)
31#define M32700UT_LCD_IRQ_AUDT2 (M32700UT_LCD_PLD_IRQ_BASE + 4)
32#define M32700UT_LCD_IRQ_BATSIO_RCV (M32700UT_LCD_PLD_IRQ_BASE + 16)
33#define M32700UT_LCD_IRQ_BATSIO_SND (M32700UT_LCD_PLD_IRQ_BASE + 17)
34#define M32700UT_LCD_IRQ_ASNDSIO_RCV (M32700UT_LCD_PLD_IRQ_BASE + 18)
35#define M32700UT_LCD_IRQ_ASNDSIO_SND (M32700UT_LCD_PLD_IRQ_BASE + 19)
36#define M32700UT_LCD_IRQ_ACNLSIO_SND (M32700UT_LCD_PLD_IRQ_BASE + 21)
37
38#define M32700UT_LCD_ICUISTS __reg16(M32700UT_LCD_BASE + 0x300002)
39#define M32700UT_LCD_ICUISTS_VECB_MASK (0xf000)
40#define M32700UT_LCD_VECB(x) ((x) & M32700UT_LCD_ICUISTS_VECB_MASK)
41#define M32700UT_LCD_ICUISTS_ISN_MASK (0x07c0)
42#define M32700UT_LCD_ICUISTS_ISN(x) ((x) & M32700UT_LCD_ICUISTS_ISN_MASK)
43#define M32700UT_LCD_ICUIREQ0 __reg16(M32700UT_LCD_BASE + 0x300004)
44#define M32700UT_LCD_ICUIREQ1 __reg16(M32700UT_LCD_BASE + 0x300006)
45#define M32700UT_LCD_ICUCR1 __reg16(M32700UT_LCD_BASE + 0x300020)
46#define M32700UT_LCD_ICUCR2 __reg16(M32700UT_LCD_BASE + 0x300022)
47#define M32700UT_LCD_ICUCR3 __reg16(M32700UT_LCD_BASE + 0x300024)
48#define M32700UT_LCD_ICUCR4 __reg16(M32700UT_LCD_BASE + 0x300026)
49#define M32700UT_LCD_ICUCR16 __reg16(M32700UT_LCD_BASE + 0x300030)
50#define M32700UT_LCD_ICUCR17 __reg16(M32700UT_LCD_BASE + 0x300032)
51#define M32700UT_LCD_ICUCR18 __reg16(M32700UT_LCD_BASE + 0x300034)
52#define M32700UT_LCD_ICUCR19 __reg16(M32700UT_LCD_BASE + 0x300036)
53#define M32700UT_LCD_ICUCR21 __reg16(M32700UT_LCD_BASE + 0x30003a)
54
55#endif /* _M32700UT_M32700UT_LCD_H */
diff --git a/arch/m32r/include/asm/m32700ut/m32700ut_pld.h b/arch/m32r/include/asm/m32700ut/m32700ut_pld.h
new file mode 100644
index 000000000000..57623beb44cb
--- /dev/null
+++ b/arch/m32r/include/asm/m32700ut/m32700ut_pld.h
@@ -0,0 +1,259 @@
1#ifndef _M32700UT_M32700UT_PLD_H
2#define _M32700UT_M32700UT_PLD_H
3
4/*
5 * include/asm-m32r/m32700ut/m32700ut_pld.h
6 *
7 * Definitions for Programable Logic Device(PLD) on M32700UT board.
8 *
9 * Copyright (c) 2002 Takeo Takahashi
10 *
11 * This file is subject to the terms and conditions of the GNU General
12 * Public License. See the file "COPYING" in the main directory of
13 * this archive for more details.
14 */
15
16#if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_USRV)
17#define PLD_PLAT_BASE 0x04c00000
18#else
19#error "no platform configuration"
20#endif
21
22#ifndef __ASSEMBLY__
23/*
24 * C functions use non-cache address.
25 */
26#define PLD_BASE (PLD_PLAT_BASE /* + NONCACHE_OFFSET */)
27#define __reg8 (volatile unsigned char *)
28#define __reg16 (volatile unsigned short *)
29#define __reg32 (volatile unsigned int *)
30#else
31#define PLD_BASE (PLD_PLAT_BASE + NONCACHE_OFFSET)
32#define __reg8
33#define __reg16
34#define __reg32
35#endif /* __ASSEMBLY__ */
36
37/* CFC */
38#define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000)
39#define PLD_CFSTS __reg16(PLD_BASE + 0x0002)
40#define PLD_CFIMASK __reg16(PLD_BASE + 0x0004)
41#define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006)
42#define PLD_CFVENCR __reg16(PLD_BASE + 0x0008)
43#define PLD_CFCR0 __reg16(PLD_BASE + 0x000a)
44#define PLD_CFCR1 __reg16(PLD_BASE + 0x000c)
45#define PLD_IDERSTCR __reg16(PLD_BASE + 0x0010)
46
47/* MMC */
48#define PLD_MMCCR __reg16(PLD_BASE + 0x4000)
49#define PLD_MMCMOD __reg16(PLD_BASE + 0x4002)
50#define PLD_MMCSTS __reg16(PLD_BASE + 0x4006)
51#define PLD_MMCBAUR __reg16(PLD_BASE + 0x400a)
52#define PLD_MMCCMDBCUT __reg16(PLD_BASE + 0x400c)
53#define PLD_MMCCDTBCUT __reg16(PLD_BASE + 0x400e)
54#define PLD_MMCDET __reg16(PLD_BASE + 0x4010)
55#define PLD_MMCWP __reg16(PLD_BASE + 0x4012)
56#define PLD_MMCWDATA __reg16(PLD_BASE + 0x5000)
57#define PLD_MMCRDATA __reg16(PLD_BASE + 0x6000)
58#define PLD_MMCCMDDATA __reg16(PLD_BASE + 0x7000)
59#define PLD_MMCRSPDATA __reg16(PLD_BASE + 0x7006)
60
61/* ICU
62 * ICUISTS: status register
63 * ICUIREQ0: request register
64 * ICUIREQ1: request register
65 * ICUCR3: control register for CFIREQ# interrupt
66 * ICUCR4: control register for CFC Card insert interrupt
67 * ICUCR5: control register for CFC Card eject interrupt
68 * ICUCR6: control register for external interrupt
69 * ICUCR11: control register for MMC Card insert/eject interrupt
70 * ICUCR13: control register for SC error interrupt
71 * ICUCR14: control register for SC receive interrupt
72 * ICUCR15: control register for SC send interrupt
73 * ICUCR16: control register for SIO0 receive interrupt
74 * ICUCR17: control register for SIO0 send interrupt
75 */
76#if !defined(CONFIG_PLAT_USRV)
77#define PLD_IRQ_INT0 (M32700UT_PLD_IRQ_BASE + 0) /* None */
78#define PLD_IRQ_INT1 (M32700UT_PLD_IRQ_BASE + 1) /* reserved */
79#define PLD_IRQ_INT2 (M32700UT_PLD_IRQ_BASE + 2) /* reserved */
80#define PLD_IRQ_CFIREQ (M32700UT_PLD_IRQ_BASE + 3) /* CF IREQ */
81#define PLD_IRQ_CFC_INSERT (M32700UT_PLD_IRQ_BASE + 4) /* CF Insert */
82#define PLD_IRQ_CFC_EJECT (M32700UT_PLD_IRQ_BASE + 5) /* CF Eject */
83#define PLD_IRQ_EXINT (M32700UT_PLD_IRQ_BASE + 6) /* EXINT */
84#define PLD_IRQ_INT7 (M32700UT_PLD_IRQ_BASE + 7) /* reserved */
85#define PLD_IRQ_INT8 (M32700UT_PLD_IRQ_BASE + 8) /* reserved */
86#define PLD_IRQ_INT9 (M32700UT_PLD_IRQ_BASE + 9) /* reserved */
87#define PLD_IRQ_INT10 (M32700UT_PLD_IRQ_BASE + 10) /* reserved */
88#define PLD_IRQ_MMCCARD (M32700UT_PLD_IRQ_BASE + 11) /* MMC Insert/Eject */
89#define PLD_IRQ_INT12 (M32700UT_PLD_IRQ_BASE + 12) /* reserved */
90#define PLD_IRQ_SC_ERROR (M32700UT_PLD_IRQ_BASE + 13) /* SC error */
91#define PLD_IRQ_SC_RCV (M32700UT_PLD_IRQ_BASE + 14) /* SC receive */
92#define PLD_IRQ_SC_SND (M32700UT_PLD_IRQ_BASE + 15) /* SC send */
93#define PLD_IRQ_SIO0_RCV (M32700UT_PLD_IRQ_BASE + 16) /* SIO receive */
94#define PLD_IRQ_SIO0_SND (M32700UT_PLD_IRQ_BASE + 17) /* SIO send */
95#define PLD_IRQ_INT18 (M32700UT_PLD_IRQ_BASE + 18) /* reserved */
96#define PLD_IRQ_INT19 (M32700UT_PLD_IRQ_BASE + 19) /* reserved */
97#define PLD_IRQ_INT20 (M32700UT_PLD_IRQ_BASE + 20) /* reserved */
98#define PLD_IRQ_INT21 (M32700UT_PLD_IRQ_BASE + 21) /* reserved */
99#define PLD_IRQ_INT22 (M32700UT_PLD_IRQ_BASE + 22) /* reserved */
100#define PLD_IRQ_INT23 (M32700UT_PLD_IRQ_BASE + 23) /* reserved */
101#define PLD_IRQ_INT24 (M32700UT_PLD_IRQ_BASE + 24) /* reserved */
102#define PLD_IRQ_INT25 (M32700UT_PLD_IRQ_BASE + 25) /* reserved */
103#define PLD_IRQ_INT26 (M32700UT_PLD_IRQ_BASE + 26) /* reserved */
104#define PLD_IRQ_INT27 (M32700UT_PLD_IRQ_BASE + 27) /* reserved */
105#define PLD_IRQ_INT28 (M32700UT_PLD_IRQ_BASE + 28) /* reserved */
106#define PLD_IRQ_INT29 (M32700UT_PLD_IRQ_BASE + 29) /* reserved */
107#define PLD_IRQ_INT30 (M32700UT_PLD_IRQ_BASE + 30) /* reserved */
108#define PLD_IRQ_INT31 (M32700UT_PLD_IRQ_BASE + 31) /* reserved */
109
110#else /* CONFIG_PLAT_USRV */
111
112#define PLD_IRQ_INT0 (M32700UT_PLD_IRQ_BASE + 0) /* None */
113#define PLD_IRQ_INT1 (M32700UT_PLD_IRQ_BASE + 1) /* reserved */
114#define PLD_IRQ_INT2 (M32700UT_PLD_IRQ_BASE + 2) /* reserved */
115#define PLD_IRQ_CF0 (M32700UT_PLD_IRQ_BASE + 3) /* CF0# */
116#define PLD_IRQ_CF1 (M32700UT_PLD_IRQ_BASE + 4) /* CF1# */
117#define PLD_IRQ_CF2 (M32700UT_PLD_IRQ_BASE + 5) /* CF2# */
118#define PLD_IRQ_CF3 (M32700UT_PLD_IRQ_BASE + 6) /* CF3# */
119#define PLD_IRQ_CF4 (M32700UT_PLD_IRQ_BASE + 7) /* CF4# */
120#define PLD_IRQ_INT8 (M32700UT_PLD_IRQ_BASE + 8) /* reserved */
121#define PLD_IRQ_INT9 (M32700UT_PLD_IRQ_BASE + 9) /* reserved */
122#define PLD_IRQ_INT10 (M32700UT_PLD_IRQ_BASE + 10) /* reserved */
123#define PLD_IRQ_INT11 (M32700UT_PLD_IRQ_BASE + 11) /* reserved */
124#define PLD_IRQ_UART0 (M32700UT_PLD_IRQ_BASE + 12) /* UARTIRQ0 */
125#define PLD_IRQ_UART1 (M32700UT_PLD_IRQ_BASE + 13) /* UARTIRQ1 */
126#define PLD_IRQ_INT14 (M32700UT_PLD_IRQ_BASE + 14) /* reserved */
127#define PLD_IRQ_INT15 (M32700UT_PLD_IRQ_BASE + 15) /* reserved */
128#define PLD_IRQ_SNDINT (M32700UT_PLD_IRQ_BASE + 16) /* SNDINT# */
129#define PLD_IRQ_INT17 (M32700UT_PLD_IRQ_BASE + 17) /* reserved */
130#define PLD_IRQ_INT18 (M32700UT_PLD_IRQ_BASE + 18) /* reserved */
131#define PLD_IRQ_INT19 (M32700UT_PLD_IRQ_BASE + 19) /* reserved */
132#define PLD_IRQ_INT20 (M32700UT_PLD_IRQ_BASE + 20) /* reserved */
133#define PLD_IRQ_INT21 (M32700UT_PLD_IRQ_BASE + 21) /* reserved */
134#define PLD_IRQ_INT22 (M32700UT_PLD_IRQ_BASE + 22) /* reserved */
135#define PLD_IRQ_INT23 (M32700UT_PLD_IRQ_BASE + 23) /* reserved */
136#define PLD_IRQ_INT24 (M32700UT_PLD_IRQ_BASE + 24) /* reserved */
137#define PLD_IRQ_INT25 (M32700UT_PLD_IRQ_BASE + 25) /* reserved */
138#define PLD_IRQ_INT26 (M32700UT_PLD_IRQ_BASE + 26) /* reserved */
139#define PLD_IRQ_INT27 (M32700UT_PLD_IRQ_BASE + 27) /* reserved */
140#define PLD_IRQ_INT28 (M32700UT_PLD_IRQ_BASE + 28) /* reserved */
141#define PLD_IRQ_INT29 (M32700UT_PLD_IRQ_BASE + 29) /* reserved */
142#define PLD_IRQ_INT30 (M32700UT_PLD_IRQ_BASE + 30) /* reserved */
143
144#endif /* CONFIG_PLAT_USRV */
145
146#define PLD_ICUISTS __reg16(PLD_BASE + 0x8002)
147#define PLD_ICUISTS_VECB_MASK (0xf000)
148#define PLD_ICUISTS_VECB(x) ((x) & PLD_ICUISTS_VECB_MASK)
149#define PLD_ICUISTS_ISN_MASK (0x07c0)
150#define PLD_ICUISTS_ISN(x) ((x) & PLD_ICUISTS_ISN_MASK)
151#define PLD_ICUIREQ0 __reg16(PLD_BASE + 0x8004)
152#define PLD_ICUIREQ1 __reg16(PLD_BASE + 0x8006)
153#define PLD_ICUCR1 __reg16(PLD_BASE + 0x8100)
154#define PLD_ICUCR2 __reg16(PLD_BASE + 0x8102)
155#define PLD_ICUCR3 __reg16(PLD_BASE + 0x8104)
156#define PLD_ICUCR4 __reg16(PLD_BASE + 0x8106)
157#define PLD_ICUCR5 __reg16(PLD_BASE + 0x8108)
158#define PLD_ICUCR6 __reg16(PLD_BASE + 0x810a)
159#define PLD_ICUCR7 __reg16(PLD_BASE + 0x810c)
160#define PLD_ICUCR8 __reg16(PLD_BASE + 0x810e)
161#define PLD_ICUCR9 __reg16(PLD_BASE + 0x8110)
162#define PLD_ICUCR10 __reg16(PLD_BASE + 0x8112)
163#define PLD_ICUCR11 __reg16(PLD_BASE + 0x8114)
164#define PLD_ICUCR12 __reg16(PLD_BASE + 0x8116)
165#define PLD_ICUCR13 __reg16(PLD_BASE + 0x8118)
166#define PLD_ICUCR14 __reg16(PLD_BASE + 0x811a)
167#define PLD_ICUCR15 __reg16(PLD_BASE + 0x811c)
168#define PLD_ICUCR16 __reg16(PLD_BASE + 0x811e)
169#define PLD_ICUCR17 __reg16(PLD_BASE + 0x8120)
170#define PLD_ICUCR_IEN (0x1000)
171#define PLD_ICUCR_IREQ (0x0100)
172#define PLD_ICUCR_ISMOD00 (0x0000) /* Low edge */
173#define PLD_ICUCR_ISMOD01 (0x0010) /* Low level */
174#define PLD_ICUCR_ISMOD02 (0x0020) /* High edge */
175#define PLD_ICUCR_ISMOD03 (0x0030) /* High level */
176#define PLD_ICUCR_ILEVEL0 (0x0000)
177#define PLD_ICUCR_ILEVEL1 (0x0001)
178#define PLD_ICUCR_ILEVEL2 (0x0002)
179#define PLD_ICUCR_ILEVEL3 (0x0003)
180#define PLD_ICUCR_ILEVEL4 (0x0004)
181#define PLD_ICUCR_ILEVEL5 (0x0005)
182#define PLD_ICUCR_ILEVEL6 (0x0006)
183#define PLD_ICUCR_ILEVEL7 (0x0007)
184
185/* Power Control of MMC and CF */
186#define PLD_CPCR __reg16(PLD_BASE + 0x14000)
187#define PLD_CPCR_CF 0x0001
188#define PLD_CPCR_MMC 0x0002
189
190/* LED Control
191 *
192 * 1: DIP swich side
193 * 2: Reset switch side
194 */
195#define PLD_IOLEDCR __reg16(PLD_BASE + 0x14002)
196#define PLD_IOLED_1_ON 0x001
197#define PLD_IOLED_1_OFF 0x000
198#define PLD_IOLED_2_ON 0x002
199#define PLD_IOLED_2_OFF 0x000
200
201/* DIP Switch
202 * 0: Write-protect of Flash Memory (0:protected, 1:non-protected)
203 * 1: -
204 * 2: -
205 * 3: -
206 */
207#define PLD_IOSWSTS __reg16(PLD_BASE + 0x14004)
208#define PLD_IOSWSTS_IOSW2 0x0200
209#define PLD_IOSWSTS_IOSW1 0x0100
210#define PLD_IOSWSTS_IOWP0 0x0001
211
212/* CRC */
213#define PLD_CRC7DATA __reg16(PLD_BASE + 0x18000)
214#define PLD_CRC7INDATA __reg16(PLD_BASE + 0x18002)
215#define PLD_CRC16DATA __reg16(PLD_BASE + 0x18004)
216#define PLD_CRC16INDATA __reg16(PLD_BASE + 0x18006)
217#define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008)
218#define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a)
219
220/* RTC */
221#define PLD_RTCCR __reg16(PLD_BASE + 0x1c000)
222#define PLD_RTCBAUR __reg16(PLD_BASE + 0x1c002)
223#define PLD_RTCWRDATA __reg16(PLD_BASE + 0x1c004)
224#define PLD_RTCRDDATA __reg16(PLD_BASE + 0x1c006)
225#define PLD_RTCRSTODT __reg16(PLD_BASE + 0x1c008)
226
227/* SIO0 */
228#define PLD_ESIO0CR __reg16(PLD_BASE + 0x20000)
229#define PLD_ESIO0CR_TXEN 0x0001
230#define PLD_ESIO0CR_RXEN 0x0002
231#define PLD_ESIO0MOD0 __reg16(PLD_BASE + 0x20002)
232#define PLD_ESIO0MOD0_CTSS 0x0040
233#define PLD_ESIO0MOD0_RTSS 0x0080
234#define PLD_ESIO0MOD1 __reg16(PLD_BASE + 0x20004)
235#define PLD_ESIO0MOD1_LMFS 0x0010
236#define PLD_ESIO0STS __reg16(PLD_BASE + 0x20006)
237#define PLD_ESIO0STS_TEMP 0x0001
238#define PLD_ESIO0STS_TXCP 0x0002
239#define PLD_ESIO0STS_RXCP 0x0004
240#define PLD_ESIO0STS_TXSC 0x0100
241#define PLD_ESIO0STS_RXSC 0x0200
242#define PLD_ESIO0STS_TXREADY (PLD_ESIO0STS_TXCP | PLD_ESIO0STS_TEMP)
243#define PLD_ESIO0INTCR __reg16(PLD_BASE + 0x20008)
244#define PLD_ESIO0INTCR_TXIEN 0x0002
245#define PLD_ESIO0INTCR_RXCEN 0x0004
246#define PLD_ESIO0BAUR __reg16(PLD_BASE + 0x2000a)
247#define PLD_ESIO0TXB __reg16(PLD_BASE + 0x2000c)
248#define PLD_ESIO0RXB __reg16(PLD_BASE + 0x2000e)
249
250/* SIM Card */
251#define PLD_SCCR __reg16(PLD_BASE + 0x38000)
252#define PLD_SCMOD __reg16(PLD_BASE + 0x38004)
253#define PLD_SCSTS __reg16(PLD_BASE + 0x38006)
254#define PLD_SCINTCR __reg16(PLD_BASE + 0x38008)
255#define PLD_SCBAUR __reg16(PLD_BASE + 0x3800a)
256#define PLD_SCTXB __reg16(PLD_BASE + 0x3800c)
257#define PLD_SCRXB __reg16(PLD_BASE + 0x3800e)
258
259#endif /* _M32700UT_M32700UT_PLD.H */
diff --git a/arch/m32r/include/asm/m32r.h b/arch/m32r/include/asm/m32r.h
new file mode 100644
index 000000000000..214b44b40757
--- /dev/null
+++ b/arch/m32r/include/asm/m32r.h
@@ -0,0 +1,160 @@
1#ifndef _ASM_M32R_M32R_H_
2#define _ASM_M32R_M32R_H_
3
4/*
5 * Renesas M32R processor
6 *
7 * Copyright (C) 2003, 2004 Renesas Technology Corp.
8 */
9
10
11/* Chip type */
12#if defined(CONFIG_CHIP_XNUX_MP) || defined(CONFIG_CHIP_XNUX2_MP)
13#include <asm/m32r_mp_fpga.h>
14#elif defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_XNUX2) \
15 || defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_M32102) \
16 || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104)
17#include <asm/m32102.h>
18#endif
19
20/* Platform type */
21#if defined(CONFIG_PLAT_M32700UT)
22#include <asm/m32700ut/m32700ut_pld.h>
23#include <asm/m32700ut/m32700ut_lan.h>
24#include <asm/m32700ut/m32700ut_lcd.h>
25/* for ei_handler:linux/arch/m32r/kernel/entry.S */
26#define M32R_INT1ICU_ISTS PLD_ICUISTS
27#define M32R_INT1ICU_IRQ_BASE M32700UT_PLD_IRQ_BASE
28#define M32R_INT0ICU_ISTS M32700UT_LAN_ICUISTS
29#define M32R_INT0ICU_IRQ_BASE M32700UT_LAN_PLD_IRQ_BASE
30#define M32R_INT2ICU_ISTS M32700UT_LCD_ICUISTS
31#define M32R_INT2ICU_IRQ_BASE M32700UT_LCD_PLD_IRQ_BASE
32#endif /* CONFIG_PLAT_M32700UT */
33
34#if defined(CONFIG_PLAT_OPSPUT)
35#include <asm/opsput/opsput_pld.h>
36#include <asm/opsput/opsput_lan.h>
37#include <asm/opsput/opsput_lcd.h>
38/* for ei_handler:linux/arch/m32r/kernel/entry.S */
39#define M32R_INT1ICU_ISTS PLD_ICUISTS
40#define M32R_INT1ICU_IRQ_BASE OPSPUT_PLD_IRQ_BASE
41#define M32R_INT0ICU_ISTS OPSPUT_LAN_ICUISTS
42#define M32R_INT0ICU_IRQ_BASE OPSPUT_LAN_PLD_IRQ_BASE
43#define M32R_INT2ICU_ISTS OPSPUT_LCD_ICUISTS
44#define M32R_INT2ICU_IRQ_BASE OPSPUT_LCD_PLD_IRQ_BASE
45#endif /* CONFIG_PLAT_OPSPUT */
46
47#if defined(CONFIG_PLAT_MAPPI2)
48#include <asm/mappi2/mappi2_pld.h>
49#endif /* CONFIG_PLAT_MAPPI2 */
50
51#if defined(CONFIG_PLAT_MAPPI3)
52#include <asm/mappi3/mappi3_pld.h>
53#endif /* CONFIG_PLAT_MAPPI3 */
54
55#if defined(CONFIG_PLAT_USRV)
56#include <asm/m32700ut/m32700ut_pld.h>
57/* for ei_handler:linux/arch/m32r/kernel/entry.S */
58#define M32R_INT1ICU_ISTS PLD_ICUISTS
59#define M32R_INT1ICU_IRQ_BASE M32700UT_PLD_IRQ_BASE
60#endif
61
62#if defined(CONFIG_PLAT_M32104UT)
63#include <asm/m32104ut/m32104ut_pld.h>
64/* for ei_handler:linux/arch/m32r/kernel/entry.S */
65#define M32R_INT1ICU_ISTS PLD_ICUISTS
66#define M32R_INT1ICU_IRQ_BASE M32104UT_PLD_IRQ_BASE
67#endif /* CONFIG_PLAT_M32104 */
68
69/*
70 * M32R Register
71 */
72
73/*
74 * MMU Register
75 */
76
77#define MMU_REG_BASE (0xffff0000)
78#define ITLB_BASE (0xfe000000)
79#define DTLB_BASE (0xfe000800)
80
81#define NR_TLB_ENTRIES CONFIG_TLB_ENTRIES
82
83#define MATM MMU_REG_BASE /* MMU Address Translation Mode
84 Register */
85#define MPSZ (0x04 + MMU_REG_BASE) /* MMU Page Size Designation Register */
86#define MASID (0x08 + MMU_REG_BASE) /* MMU Address Space ID Register */
87#define MESTS (0x0c + MMU_REG_BASE) /* MMU Exception Status Register */
88#define MDEVA (0x10 + MMU_REG_BASE) /* MMU Operand Exception Virtual
89 Address Register */
90#define MDEVP (0x14 + MMU_REG_BASE) /* MMU Operand Exception Virtual Page
91 Number Register */
92#define MPTB (0x18 + MMU_REG_BASE) /* MMU Page Table Base Register */
93#define MSVA (0x20 + MMU_REG_BASE) /* MMU Search Virtual Address
94 Register */
95#define MTOP (0x24 + MMU_REG_BASE) /* MMU TLB Operation Register */
96#define MIDXI (0x28 + MMU_REG_BASE) /* MMU Index Register for
97 Instruciton */
98#define MIDXD (0x2c + MMU_REG_BASE) /* MMU Index Register for Operand */
99
100#define MATM_offset (MATM - MMU_REG_BASE)
101#define MPSZ_offset (MPSZ - MMU_REG_BASE)
102#define MASID_offset (MASID - MMU_REG_BASE)
103#define MESTS_offset (MESTS - MMU_REG_BASE)
104#define MDEVA_offset (MDEVA - MMU_REG_BASE)
105#define MDEVP_offset (MDEVP - MMU_REG_BASE)
106#define MPTB_offset (MPTB - MMU_REG_BASE)
107#define MSVA_offset (MSVA - MMU_REG_BASE)
108#define MTOP_offset (MTOP - MMU_REG_BASE)
109#define MIDXI_offset (MIDXI - MMU_REG_BASE)
110#define MIDXD_offset (MIDXD - MMU_REG_BASE)
111
112#define MESTS_IT (1 << 0) /* Instruction TLB miss */
113#define MESTS_IA (1 << 1) /* Instruction Access Exception */
114#define MESTS_DT (1 << 4) /* Operand TLB miss */
115#define MESTS_DA (1 << 5) /* Operand Access Exception */
116#define MESTS_DRW (1 << 6) /* Operand Write Exception Flag */
117
118/*
119 * PSW (Processor Status Word)
120 */
121
122/* PSW bit */
123#define M32R_PSW_BIT_SM (7) /* Stack Mode */
124#define M32R_PSW_BIT_IE (6) /* Interrupt Enable */
125#define M32R_PSW_BIT_PM (3) /* Processor Mode [0:Supervisor,1:User] */
126#define M32R_PSW_BIT_C (0) /* Condition */
127#define M32R_PSW_BIT_BSM (7+8) /* Backup Stack Mode */
128#define M32R_PSW_BIT_BIE (6+8) /* Backup Interrupt Enable */
129#define M32R_PSW_BIT_BPM (3+8) /* Backup Processor Mode */
130#define M32R_PSW_BIT_BC (0+8) /* Backup Condition */
131
132/* PSW bit map */
133#define M32R_PSW_SM (1UL<< M32R_PSW_BIT_SM) /* Stack Mode */
134#define M32R_PSW_IE (1UL<< M32R_PSW_BIT_IE) /* Interrupt Enable */
135#define M32R_PSW_PM (1UL<< M32R_PSW_BIT_PM) /* Processor Mode */
136#define M32R_PSW_C (1UL<< M32R_PSW_BIT_C) /* Condition */
137#define M32R_PSW_BSM (1UL<< M32R_PSW_BIT_BSM) /* Backup Stack Mode */
138#define M32R_PSW_BIE (1UL<< M32R_PSW_BIT_BIE) /* Backup Interrupt Enable */
139#define M32R_PSW_BPM (1UL<< M32R_PSW_BIT_BPM) /* Backup Processor Mode */
140#define M32R_PSW_BC (1UL<< M32R_PSW_BIT_BC) /* Backup Condition */
141
142/*
143 * Direct address to SFR
144 */
145
146#include <asm/page.h>
147#ifdef CONFIG_MMU
148#define NONCACHE_OFFSET (__PAGE_OFFSET + 0x20000000)
149#else
150#define NONCACHE_OFFSET __PAGE_OFFSET
151#endif /* CONFIG_MMU */
152
153#define M32R_ICU_ISTS_ADDR M32R_ICU_ISTS_PORTL+NONCACHE_OFFSET
154#define M32R_ICU_IPICR_ADDR M32R_ICU_IPICR0_PORTL+NONCACHE_OFFSET
155#define M32R_ICU_IMASK_ADDR M32R_ICU_IMASK_PORTL+NONCACHE_OFFSET
156#define M32R_FPGA_CPU_NAME_ADDR M32R_FPGA_CPU_NAME0_PORTL+NONCACHE_OFFSET
157#define M32R_FPGA_MODEL_ID_ADDR M32R_FPGA_MODEL_ID0_PORTL+NONCACHE_OFFSET
158#define M32R_FPGA_VERSION_ADDR M32R_FPGA_VERSION0_PORTL+NONCACHE_OFFSET
159
160#endif /* _ASM_M32R_M32R_H_ */
diff --git a/arch/m32r/include/asm/m32r_mp_fpga.h b/arch/m32r/include/asm/m32r_mp_fpga.h
new file mode 100644
index 000000000000..976d2b995919
--- /dev/null
+++ b/arch/m32r/include/asm/m32r_mp_fpga.h
@@ -0,0 +1,313 @@
1#ifndef _ASM_M32R_M32R_MP_FPGA_
2#define _ASM_M32R_M32R_MP_FPGA_
3
4/*
5 * Renesas M32R-MP-FPGA
6 *
7 * Copyright (c) 2002 Hitoshi Yamamoto
8 * Copyright (c) 2003, 2004 Renesas Technology Corp.
9 */
10
11/*
12 * ========================================================
13 * M32R-MP-FPGA Memory Map
14 * ========================================================
15 * 0x00000000 : Block#0 : 64[MB]
16 * 0x03E00000 : SFR
17 * 0x03E00000 : reserved
18 * 0x03EF0000 : FPGA
19 * 0x03EF1000 : reserved
20 * 0x03EF4000 : CKM
21 * 0x03EF4000 : BSELC
22 * 0x03EF5000 : reserved
23 * 0x03EFC000 : MFT
24 * 0x03EFD000 : SIO
25 * 0x03EFE000 : reserved
26 * 0x03EFF000 : ICU
27 * 0x03F00000 : Internal SRAM 64[KB]
28 * 0x03F10000 : reserved
29 * --------------------------------------------------------
30 * 0x04000000 : Block#1 : 64[MB]
31 * 0x04000000 : Debug board SRAM 4[MB]
32 * 0x04400000 : reserved
33 * --------------------------------------------------------
34 * 0x08000000 : Block#2 : 64[MB]
35 * --------------------------------------------------------
36 * 0x0C000000 : Block#3 : 64[MB]
37 * --------------------------------------------------------
38 * 0x10000000 : Block#4 : 64[MB]
39 * --------------------------------------------------------
40 * 0x14000000 : Block#5 : 64[MB]
41 * --------------------------------------------------------
42 * 0x18000000 : Block#6 : 64[MB]
43 * --------------------------------------------------------
44 * 0x1C000000 : Block#7 : 64[MB]
45 * --------------------------------------------------------
46 * 0xFE000000 : TLB
47 * 0xFE000000 : ITLB
48 * 0xFE000080 : reserved
49 * 0xFE000800 : DTLB
50 * 0xFE000880 : reserved
51 * --------------------------------------------------------
52 * 0xFF000000 : System area
53 * 0xFFFF0000 : MMU
54 * 0xFFFF0030 : reserved
55 * 0xFFFF8000 : Debug function
56 * 0xFFFFA000 : reserved
57 * 0xFFFFC000 : CPU control
58 * 0xFFFFFFFF
59 * ========================================================
60 */
61
62/*======================================================================*
63 * Special Function Register
64 *======================================================================*/
65#define M32R_SFR_OFFSET (0x00E00000) /* 0x03E00000-0x03EFFFFF 1[MB] */
66
67/*
68 * FPGA registers.
69 */
70#define M32R_FPGA_TOP (0x000F0000+M32R_SFR_OFFSET)
71
72#define M32R_FPGA_NUM_OF_CPUS_PORTL (0x00+M32R_FPGA_TOP)
73#define M32R_FPGA_CPU_NAME0_PORTL (0x10+M32R_FPGA_TOP)
74#define M32R_FPGA_CPU_NAME1_PORTL (0x14+M32R_FPGA_TOP)
75#define M32R_FPGA_CPU_NAME2_PORTL (0x18+M32R_FPGA_TOP)
76#define M32R_FPGA_CPU_NAME3_PORTL (0x1C+M32R_FPGA_TOP)
77#define M32R_FPGA_MODEL_ID0_PORTL (0x20+M32R_FPGA_TOP)
78#define M32R_FPGA_MODEL_ID1_PORTL (0x24+M32R_FPGA_TOP)
79#define M32R_FPGA_MODEL_ID2_PORTL (0x28+M32R_FPGA_TOP)
80#define M32R_FPGA_MODEL_ID3_PORTL (0x2C+M32R_FPGA_TOP)
81#define M32R_FPGA_VERSION0_PORTL (0x30+M32R_FPGA_TOP)
82#define M32R_FPGA_VERSION1_PORTL (0x34+M32R_FPGA_TOP)
83
84/*
85 * Clock and Power Manager registers.
86 */
87#define M32R_CPM_OFFSET (0x000F4000+M32R_SFR_OFFSET)
88
89#define M32R_CPM_CPUCLKCR_PORTL (0x00+M32R_CPM_OFFSET)
90#define M32R_CPM_CLKMOD_PORTL (0x04+M32R_CPM_OFFSET)
91#define M32R_CPM_PLLCR_PORTL (0x08+M32R_CPM_OFFSET)
92
93/*
94 * Block SELect Controller registers.
95 */
96#define M32R_BSELC_OFFSET (0x000F5000+M32R_SFR_OFFSET)
97
98#define M32R_BSEL0_CR0_PORTL (0x000+M32R_BSELC_OFFSET)
99#define M32R_BSEL0_CR1_PORTL (0x004+M32R_BSELC_OFFSET)
100#define M32R_BSEL1_CR0_PORTL (0x100+M32R_BSELC_OFFSET)
101#define M32R_BSEL1_CR1_PORTL (0x104+M32R_BSELC_OFFSET)
102#define M32R_BSEL2_CR0_PORTL (0x200+M32R_BSELC_OFFSET)
103#define M32R_BSEL2_CR1_PORTL (0x204+M32R_BSELC_OFFSET)
104#define M32R_BSEL3_CR0_PORTL (0x300+M32R_BSELC_OFFSET)
105#define M32R_BSEL3_CR1_PORTL (0x304+M32R_BSELC_OFFSET)
106#define M32R_BSEL4_CR0_PORTL (0x400+M32R_BSELC_OFFSET)
107#define M32R_BSEL4_CR1_PORTL (0x404+M32R_BSELC_OFFSET)
108#define M32R_BSEL5_CR0_PORTL (0x500+M32R_BSELC_OFFSET)
109#define M32R_BSEL5_CR1_PORTL (0x504+M32R_BSELC_OFFSET)
110#define M32R_BSEL6_CR0_PORTL (0x600+M32R_BSELC_OFFSET)
111#define M32R_BSEL6_CR1_PORTL (0x604+M32R_BSELC_OFFSET)
112#define M32R_BSEL7_CR0_PORTL (0x700+M32R_BSELC_OFFSET)
113#define M32R_BSEL7_CR1_PORTL (0x704+M32R_BSELC_OFFSET)
114
115/*
116 * Multi Function Timer registers.
117 */
118#define M32R_MFT_OFFSET (0x000FC000+M32R_SFR_OFFSET)
119
120#define M32R_MFTCR_PORTL (0x000+M32R_MFT_OFFSET) /* MFT control */
121#define M32R_MFTRPR_PORTL (0x004+M32R_MFT_OFFSET) /* MFT real port */
122
123#define M32R_MFT0_OFFSET (0x100+M32R_MFT_OFFSET)
124#define M32R_MFT0MOD_PORTL (0x00+M32R_MFT0_OFFSET) /* MFT0 mode */
125#define M32R_MFT0BOS_PORTL (0x04+M32R_MFT0_OFFSET) /* MFT0 b-port output status */
126#define M32R_MFT0CUT_PORTL (0x08+M32R_MFT0_OFFSET) /* MFT0 count */
127#define M32R_MFT0RLD_PORTL (0x0C+M32R_MFT0_OFFSET) /* MFT0 reload */
128#define M32R_MFT0CMPRLD_PORTL (0x10+M32R_MFT0_OFFSET) /* MFT0 compare reload */
129
130#define M32R_MFT1_OFFSET (0x200+M32R_MFT_OFFSET)
131#define M32R_MFT1MOD_PORTL (0x00+M32R_MFT1_OFFSET) /* MFT1 mode */
132#define M32R_MFT1BOS_PORTL (0x04+M32R_MFT1_OFFSET) /* MFT1 b-port output status */
133#define M32R_MFT1CUT_PORTL (0x08+M32R_MFT1_OFFSET) /* MFT1 count */
134#define M32R_MFT1RLD_PORTL (0x0C+M32R_MFT1_OFFSET) /* MFT1 reload */
135#define M32R_MFT1CMPRLD_PORTL (0x10+M32R_MFT1_OFFSET) /* MFT1 compare reload */
136
137#define M32R_MFT2_OFFSET (0x300+M32R_MFT_OFFSET)
138#define M32R_MFT2MOD_PORTL (0x00+M32R_MFT2_OFFSET) /* MFT2 mode */
139#define M32R_MFT2BOS_PORTL (0x04+M32R_MFT2_OFFSET) /* MFT2 b-port output status */
140#define M32R_MFT2CUT_PORTL (0x08+M32R_MFT2_OFFSET) /* MFT2 count */
141#define M32R_MFT2RLD_PORTL (0x0C+M32R_MFT2_OFFSET) /* MFT2 reload */
142#define M32R_MFT2CMPRLD_PORTL (0x10+M32R_MFT2_OFFSET) /* MFT2 compare reload */
143
144#define M32R_MFT3_OFFSET (0x400+M32R_MFT_OFFSET)
145#define M32R_MFT3MOD_PORTL (0x00+M32R_MFT3_OFFSET) /* MFT3 mode */
146#define M32R_MFT3BOS_PORTL (0x04+M32R_MFT3_OFFSET) /* MFT3 b-port output status */
147#define M32R_MFT3CUT_PORTL (0x08+M32R_MFT3_OFFSET) /* MFT3 count */
148#define M32R_MFT3RLD_PORTL (0x0C+M32R_MFT3_OFFSET) /* MFT3 reload */
149#define M32R_MFT3CMPRLD_PORTL (0x10+M32R_MFT3_OFFSET) /* MFT3 compare reload */
150
151#define M32R_MFT4_OFFSET (0x500+M32R_MFT_OFFSET)
152#define M32R_MFT4MOD_PORTL (0x00+M32R_MFT4_OFFSET) /* MFT4 mode */
153#define M32R_MFT4BOS_PORTL (0x04+M32R_MFT4_OFFSET) /* MFT4 b-port output status */
154#define M32R_MFT4CUT_PORTL (0x08+M32R_MFT4_OFFSET) /* MFT4 count */
155#define M32R_MFT4RLD_PORTL (0x0C+M32R_MFT4_OFFSET) /* MFT4 reload */
156#define M32R_MFT4CMPRLD_PORTL (0x10+M32R_MFT4_OFFSET) /* MFT4 compare reload */
157
158#define M32R_MFT5_OFFSET (0x600+M32R_MFT_OFFSET)
159#define M32R_MFT5MOD_PORTL (0x00+M32R_MFT5_OFFSET) /* MFT4 mode */
160#define M32R_MFT5BOS_PORTL (0x04+M32R_MFT5_OFFSET) /* MFT4 b-port output status */
161#define M32R_MFT5CUT_PORTL (0x08+M32R_MFT5_OFFSET) /* MFT4 count */
162#define M32R_MFT5RLD_PORTL (0x0C+M32R_MFT5_OFFSET) /* MFT4 reload */
163#define M32R_MFT5CMPRLD_PORTL (0x10+M32R_MFT5_OFFSET) /* MFT4 compare reload */
164
165#define M32R_MFTCR_MFT0MSK (1UL<<15) /* b16 */
166#define M32R_MFTCR_MFT1MSK (1UL<<14) /* b17 */
167#define M32R_MFTCR_MFT2MSK (1UL<<13) /* b18 */
168#define M32R_MFTCR_MFT3MSK (1UL<<12) /* b19 */
169#define M32R_MFTCR_MFT4MSK (1UL<<11) /* b20 */
170#define M32R_MFTCR_MFT5MSK (1UL<<10) /* b21 */
171#define M32R_MFTCR_MFT0EN (1UL<<7) /* b24 */
172#define M32R_MFTCR_MFT1EN (1UL<<6) /* b25 */
173#define M32R_MFTCR_MFT2EN (1UL<<5) /* b26 */
174#define M32R_MFTCR_MFT3EN (1UL<<4) /* b27 */
175#define M32R_MFTCR_MFT4EN (1UL<<3) /* b28 */
176#define M32R_MFTCR_MFT5EN (1UL<<2) /* b29 */
177
178#define M32R_MFTMOD_CC_MASK (1UL<<15) /* b16 */
179#define M32R_MFTMOD_TCCR (1UL<<13) /* b18 */
180#define M32R_MFTMOD_GTSEL000 (0UL<<8) /* b21-23 : 000 */
181#define M32R_MFTMOD_GTSEL001 (1UL<<8) /* b21-23 : 001 */
182#define M32R_MFTMOD_GTSEL010 (2UL<<8) /* b21-23 : 010 */
183#define M32R_MFTMOD_GTSEL011 (3UL<<8) /* b21-23 : 011 */
184#define M32R_MFTMOD_GTSEL110 (6UL<<8) /* b21-23 : 110 */
185#define M32R_MFTMOD_GTSEL111 (7UL<<8) /* b21-23 : 111 */
186#define M32R_MFTMOD_CMSEL (1UL<<3) /* b28 */
187#define M32R_MFTMOD_CSSEL000 (0UL<<0) /* b29-b31 : 000 */
188#define M32R_MFTMOD_CSSEL001 (1UL<<0) /* b29-b31 : 001 */
189#define M32R_MFTMOD_CSSEL010 (2UL<<0) /* b29-b31 : 010 */
190#define M32R_MFTMOD_CSSEL011 (3UL<<0) /* b29-b31 : 011 */
191#define M32R_MFTMOD_CSSEL100 (4UL<<0) /* b29-b31 : 100 */
192#define M32R_MFTMOD_CSSEL110 (6UL<<0) /* b29-b31 : 110 */
193
194/*
195 * Serial I/O registers.
196 */
197#define M32R_SIO_OFFSET (0x000FD000+M32R_SFR_OFFSET)
198
199#define M32R_SIO0_CR_PORTL (0x000+M32R_SIO_OFFSET)
200#define M32R_SIO0_MOD0_PORTL (0x004+M32R_SIO_OFFSET)
201#define M32R_SIO0_MOD1_PORTL (0x008+M32R_SIO_OFFSET)
202#define M32R_SIO0_STS_PORTL (0x00C+M32R_SIO_OFFSET)
203#define M32R_SIO0_TRCR_PORTL (0x010+M32R_SIO_OFFSET)
204#define M32R_SIO0_BAUR_PORTL (0x014+M32R_SIO_OFFSET)
205#define M32R_SIO0_RBAUR_PORTL (0x018+M32R_SIO_OFFSET)
206#define M32R_SIO0_TXB_PORTL (0x01C+M32R_SIO_OFFSET)
207#define M32R_SIO0_RXB_PORTL (0x020+M32R_SIO_OFFSET)
208
209/*
210 * Interrupt Control Unit registers.
211 */
212#define M32R_ICU_OFFSET (0x000FF000+M32R_SFR_OFFSET)
213
214#define M32R_ICU_ISTS_PORTL (0x004+M32R_ICU_OFFSET)
215#define M32R_ICU_IREQ0_PORTL (0x008+M32R_ICU_OFFSET)
216#define M32R_ICU_IREQ1_PORTL (0x00C+M32R_ICU_OFFSET)
217#define M32R_ICU_SBICR_PORTL (0x018+M32R_ICU_OFFSET)
218#define M32R_ICU_IMASK_PORTL (0x01C+M32R_ICU_OFFSET)
219#define M32R_ICU_CR1_PORTL (0x200+M32R_ICU_OFFSET) /* INT0 */
220#define M32R_ICU_CR2_PORTL (0x204+M32R_ICU_OFFSET) /* INT1 */
221#define M32R_ICU_CR3_PORTL (0x208+M32R_ICU_OFFSET) /* INT2 */
222#define M32R_ICU_CR4_PORTL (0x20C+M32R_ICU_OFFSET) /* INT3 */
223#define M32R_ICU_CR5_PORTL (0x210+M32R_ICU_OFFSET) /* INT4 */
224#define M32R_ICU_CR6_PORTL (0x214+M32R_ICU_OFFSET) /* INT5 */
225#define M32R_ICU_CR7_PORTL (0x218+M32R_ICU_OFFSET) /* INT6 */
226#define M32R_ICU_CR8_PORTL (0x218+M32R_ICU_OFFSET) /* INT7 */
227#define M32R_ICU_CR32_PORTL (0x27C+M32R_ICU_OFFSET) /* SIO0 RX */
228#define M32R_ICU_CR33_PORTL (0x280+M32R_ICU_OFFSET) /* SIO0 TX */
229#define M32R_ICU_CR40_PORTL (0x29C+M32R_ICU_OFFSET) /* DMAC0 */
230#define M32R_ICU_CR41_PORTL (0x2A0+M32R_ICU_OFFSET) /* DMAC1 */
231#define M32R_ICU_CR48_PORTL (0x2BC+M32R_ICU_OFFSET) /* MFT0 */
232#define M32R_ICU_CR49_PORTL (0x2C0+M32R_ICU_OFFSET) /* MFT1 */
233#define M32R_ICU_CR50_PORTL (0x2C4+M32R_ICU_OFFSET) /* MFT2 */
234#define M32R_ICU_CR51_PORTL (0x2C8+M32R_ICU_OFFSET) /* MFT3 */
235#define M32R_ICU_CR52_PORTL (0x2CC+M32R_ICU_OFFSET) /* MFT4 */
236#define M32R_ICU_CR53_PORTL (0x2D0+M32R_ICU_OFFSET) /* MFT5 */
237#define M32R_ICU_IPICR0_PORTL (0x2DC+M32R_ICU_OFFSET) /* IPI0 */
238#define M32R_ICU_IPICR1_PORTL (0x2E0+M32R_ICU_OFFSET) /* IPI1 */
239#define M32R_ICU_IPICR2_PORTL (0x2E4+M32R_ICU_OFFSET) /* IPI2 */
240#define M32R_ICU_IPICR3_PORTL (0x2E8+M32R_ICU_OFFSET) /* IPI3 */
241#define M32R_ICU_IPICR4_PORTL (0x2EC+M32R_ICU_OFFSET) /* IPI4 */
242#define M32R_ICU_IPICR5_PORTL (0x2F0+M32R_ICU_OFFSET) /* IPI5 */
243#define M32R_ICU_IPICR6_PORTL (0x2F4+M32R_ICU_OFFSET) /* IPI6 */
244#define M32R_ICU_IPICR7_PORTL (0x2FC+M32R_ICU_OFFSET) /* IPI7 */
245
246#define M32R_ICUISTS_VECB(val) ((val>>28) & 0xF)
247#define M32R_ICUISTS_ISN(val) ((val>>22) & 0x3F)
248#define M32R_ICUISTS_PIML(val) ((val>>16) & 0x7)
249
250#define M32R_ICUIMASK_IMSK0 (0UL<<16) /* b13-b15: Disable interrupt */
251#define M32R_ICUIMASK_IMSK1 (1UL<<16) /* b13-b15: Enable level 0 interrupt */
252#define M32R_ICUIMASK_IMSK2 (2UL<<16) /* b13-b15: Enable level 0,1 interrupt */
253#define M32R_ICUIMASK_IMSK3 (3UL<<16) /* b13-b15: Enable level 0-2 interrupt */
254#define M32R_ICUIMASK_IMSK4 (4UL<<16) /* b13-b15: Enable level 0-3 interrupt */
255#define M32R_ICUIMASK_IMSK5 (5UL<<16) /* b13-b15: Enable level 0-4 interrupt */
256#define M32R_ICUIMASK_IMSK6 (6UL<<16) /* b13-b15: Enable level 0-5 interrupt */
257#define M32R_ICUIMASK_IMSK7 (7UL<<16) /* b13-b15: Enable level 0-6 interrupt */
258
259#define M32R_ICUCR_IEN (1UL<<12) /* b19: Interrupt enable */
260#define M32R_ICUCR_IRQ (1UL<<8) /* b23: Interrupt request */
261#define M32R_ICUCR_ISMOD00 (0UL<<4) /* b26-b27: Interrupt sense mode Edge HtoL */
262#define M32R_ICUCR_ISMOD01 (1UL<<4) /* b26-b27: Interrupt sense mode Level L */
263#define M32R_ICUCR_ISMOD10 (2UL<<4) /* b26-b27: Interrupt sense mode Edge LtoH*/
264#define M32R_ICUCR_ISMOD11 (3UL<<4) /* b26-b27: Interrupt sense mode Level H */
265#define M32R_ICUCR_ILEVEL0 (0UL<<0) /* b29-b31: Interrupt priority level 0 */
266#define M32R_ICUCR_ILEVEL1 (1UL<<0) /* b29-b31: Interrupt priority level 1 */
267#define M32R_ICUCR_ILEVEL2 (2UL<<0) /* b29-b31: Interrupt priority level 2 */
268#define M32R_ICUCR_ILEVEL3 (3UL<<0) /* b29-b31: Interrupt priority level 3 */
269#define M32R_ICUCR_ILEVEL4 (4UL<<0) /* b29-b31: Interrupt priority level 4 */
270#define M32R_ICUCR_ILEVEL5 (5UL<<0) /* b29-b31: Interrupt priority level 5 */
271#define M32R_ICUCR_ILEVEL6 (6UL<<0) /* b29-b31: Interrupt priority level 6 */
272#define M32R_ICUCR_ILEVEL7 (7UL<<0) /* b29-b31: Disable interrupt */
273#define M32R_ICUCR_ILEVEL_MASK (7UL)
274
275#define M32R_IRQ_INT0 (1) /* INT0 */
276#define M32R_IRQ_INT1 (2) /* INT1 */
277#define M32R_IRQ_INT2 (3) /* INT2 */
278#define M32R_IRQ_INT3 (4) /* INT3 */
279#define M32R_IRQ_INT4 (5) /* INT4 */
280#define M32R_IRQ_INT5 (6) /* INT5 */
281#define M32R_IRQ_INT6 (7) /* INT6 */
282#define M32R_IRQ_INT7 (8) /* INT7 */
283#define M32R_IRQ_MFT0 (16) /* MFT0 */
284#define M32R_IRQ_MFT1 (17) /* MFT1 */
285#define M32R_IRQ_MFT2 (18) /* MFT2 */
286#define M32R_IRQ_MFT3 (19) /* MFT3 */
287#define M32R_IRQ_MFT4 (20) /* MFT4 */
288#define M32R_IRQ_MFT5 (21) /* MFT5 */
289#define M32R_IRQ_DMAC0 (32) /* DMAC0 */
290#define M32R_IRQ_DMAC1 (33) /* DMAC1 */
291#define M32R_IRQ_SIO0_R (48) /* SIO0 receive */
292#define M32R_IRQ_SIO0_S (49) /* SIO0 send */
293#define M32R_IRQ_SIO1_R (50) /* SIO1 send */
294#define M32R_IRQ_SIO1_S (51) /* SIO1 receive */
295#define M32R_IRQ_IPI0 (56) /* IPI0 */
296#define M32R_IRQ_IPI1 (57) /* IPI1 */
297#define M32R_IRQ_IPI2 (58) /* IPI2 */
298#define M32R_IRQ_IPI3 (59) /* IPI3 */
299#define M32R_IRQ_IPI4 (60) /* IPI4 */
300#define M32R_IRQ_IPI5 (61) /* IPI5 */
301#define M32R_IRQ_IPI6 (62) /* IPI6 */
302#define M32R_IRQ_IPI7 (63) /* IPI7 */
303
304/*======================================================================*
305 * CPU
306 *======================================================================*/
307
308#define M32R_CPUID_PORTL (0xFFFFFFE0)
309#define M32R_MCICAR_PORTL (0xFFFFFFF0)
310#define M32R_MCDCAR_PORTL (0xFFFFFFF4)
311#define M32R_MCCR_PORTL (0xFFFFFFFC)
312
313#endif /* _ASM_M32R_M32R_MP_FPGA_ */
diff --git a/arch/m32r/include/asm/mappi2/mappi2_pld.h b/arch/m32r/include/asm/mappi2/mappi2_pld.h
new file mode 100644
index 000000000000..2624c9db7255
--- /dev/null
+++ b/arch/m32r/include/asm/mappi2/mappi2_pld.h
@@ -0,0 +1,150 @@
1#ifndef _MAPPI2_PLD_H
2#define _MAPPI2_PLD_H
3
4/*
5 * include/asm-m32r/mappi2/mappi2_pld.h
6 *
7 * Definitions for Extended IO Logic on MAPPI2 board.
8 * based on m32700ut_pld.h
9 *
10 * This file is subject to the terms and conditions of the GNU General
11 * Public License. See the file "COPYING" in the main directory of
12 * this archive for more details.
13 */
14
15#ifndef __ASSEMBLY__
16/* FIXME:
17 * Some C functions use non-cache address, so can't define non-cache address.
18 */
19#define PLD_BASE (0x10c00000 /* + NONCACHE_OFFSET */)
20#define __reg8 (volatile unsigned char *)
21#define __reg16 (volatile unsigned short *)
22#define __reg32 (volatile unsigned int *)
23#else
24#define PLD_BASE (0x10c00000 + NONCACHE_OFFSET)
25#define __reg8
26#define __reg16
27#define __reg32
28#endif /* __ASSEMBLY__ */
29
30/* CFC */
31#define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000)
32#define PLD_CFSTS __reg16(PLD_BASE + 0x0002)
33#define PLD_CFIMASK __reg16(PLD_BASE + 0x0004)
34#define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006)
35#define PLD_CFCR0 __reg16(PLD_BASE + 0x000a)
36#define PLD_CFCR1 __reg16(PLD_BASE + 0x000c)
37
38/* MMC */
39#define PLD_MMCCR __reg16(PLD_BASE + 0x4000)
40#define PLD_MMCMOD __reg16(PLD_BASE + 0x4002)
41#define PLD_MMCSTS __reg16(PLD_BASE + 0x4006)
42#define PLD_MMCBAUR __reg16(PLD_BASE + 0x400a)
43#define PLD_MMCCMDBCUT __reg16(PLD_BASE + 0x400c)
44#define PLD_MMCCDTBCUT __reg16(PLD_BASE + 0x400e)
45#define PLD_MMCDET __reg16(PLD_BASE + 0x4010)
46#define PLD_MMCWP __reg16(PLD_BASE + 0x4012)
47#define PLD_MMCWDATA __reg16(PLD_BASE + 0x5000)
48#define PLD_MMCRDATA __reg16(PLD_BASE + 0x6000)
49#define PLD_MMCCMDDATA __reg16(PLD_BASE + 0x7000)
50#define PLD_MMCRSPDATA __reg16(PLD_BASE + 0x7006)
51
52/* Power Control of MMC and CF */
53#define PLD_CPCR __reg16(PLD_BASE + 0x14000)
54
55
56/*==== ICU ====*/
57#define M32R_IRQ_PC104 (5) /* INT4(PC/104) */
58#define M32R_IRQ_I2C (28) /* I2C-BUS */
59#if 1
60#define PLD_IRQ_CFIREQ (40) /* CFC Card Interrupt */
61#define PLD_IRQ_CFC_INSERT (41) /* CFC Card Insert */
62#define PLD_IRQ_CFC_EJECT (42) /* CFC Card Eject */
63#define PLD_IRQ_MMCCARD (43) /* MMC Card Insert */
64#define PLD_IRQ_MMCIRQ (44) /* MMC Transfer Done */
65#else
66#define PLD_IRQ_CFIREQ (34) /* CFC Card Interrupt */
67#define PLD_IRQ_CFC_INSERT (35) /* CFC Card Insert */
68#define PLD_IRQ_CFC_EJECT (36) /* CFC Card Eject */
69#define PLD_IRQ_MMCCARD (37) /* MMC Card Insert */
70#define PLD_IRQ_MMCIRQ (38) /* MMC Transfer Done */
71#endif
72
73
74#if 0
75/* LED Control
76 *
77 * 1: DIP swich side
78 * 2: Reset switch side
79 */
80#define PLD_IOLEDCR __reg16(PLD_BASE + 0x14002)
81#define PLD_IOLED_1_ON 0x001
82#define PLD_IOLED_1_OFF 0x000
83#define PLD_IOLED_2_ON 0x002
84#define PLD_IOLED_2_OFF 0x000
85
86/* DIP Switch
87 * 0: Write-protect of Flash Memory (0:protected, 1:non-protected)
88 * 1: -
89 * 2: -
90 * 3: -
91 */
92#define PLD_IOSWSTS __reg16(PLD_BASE + 0x14004)
93#define PLD_IOSWSTS_IOSW2 0x0200
94#define PLD_IOSWSTS_IOSW1 0x0100
95#define PLD_IOSWSTS_IOWP0 0x0001
96
97#endif
98
99/* CRC */
100#define PLD_CRC7DATA __reg16(PLD_BASE + 0x18000)
101#define PLD_CRC7INDATA __reg16(PLD_BASE + 0x18002)
102#define PLD_CRC16DATA __reg16(PLD_BASE + 0x18004)
103#define PLD_CRC16INDATA __reg16(PLD_BASE + 0x18006)
104#define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008)
105#define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a)
106
107
108#if 0
109/* RTC */
110#define PLD_RTCCR __reg16(PLD_BASE + 0x1c000)
111#define PLD_RTCBAUR __reg16(PLD_BASE + 0x1c002)
112#define PLD_RTCWRDATA __reg16(PLD_BASE + 0x1c004)
113#define PLD_RTCRDDATA __reg16(PLD_BASE + 0x1c006)
114#define PLD_RTCRSTODT __reg16(PLD_BASE + 0x1c008)
115
116/* SIO0 */
117#define PLD_ESIO0CR __reg16(PLD_BASE + 0x20000)
118#define PLD_ESIO0CR_TXEN 0x0001
119#define PLD_ESIO0CR_RXEN 0x0002
120#define PLD_ESIO0MOD0 __reg16(PLD_BASE + 0x20002)
121#define PLD_ESIO0MOD0_CTSS 0x0040
122#define PLD_ESIO0MOD0_RTSS 0x0080
123#define PLD_ESIO0MOD1 __reg16(PLD_BASE + 0x20004)
124#define PLD_ESIO0MOD1_LMFS 0x0010
125#define PLD_ESIO0STS __reg16(PLD_BASE + 0x20006)
126#define PLD_ESIO0STS_TEMP 0x0001
127#define PLD_ESIO0STS_TXCP 0x0002
128#define PLD_ESIO0STS_RXCP 0x0004
129#define PLD_ESIO0STS_TXSC 0x0100
130#define PLD_ESIO0STS_RXSC 0x0200
131#define PLD_ESIO0STS_TXREADY (PLD_ESIO0STS_TXCP | PLD_ESIO0STS_TEMP)
132#define PLD_ESIO0INTCR __reg16(PLD_BASE + 0x20008)
133#define PLD_ESIO0INTCR_TXIEN 0x0002
134#define PLD_ESIO0INTCR_RXCEN 0x0004
135#define PLD_ESIO0BAUR __reg16(PLD_BASE + 0x2000a)
136#define PLD_ESIO0TXB __reg16(PLD_BASE + 0x2000c)
137#define PLD_ESIO0RXB __reg16(PLD_BASE + 0x2000e)
138
139/* SIM Card */
140#define PLD_SCCR __reg16(PLD_BASE + 0x38000)
141#define PLD_SCMOD __reg16(PLD_BASE + 0x38004)
142#define PLD_SCSTS __reg16(PLD_BASE + 0x38006)
143#define PLD_SCINTCR __reg16(PLD_BASE + 0x38008)
144#define PLD_SCBAUR __reg16(PLD_BASE + 0x3800a)
145#define PLD_SCTXB __reg16(PLD_BASE + 0x3800c)
146#define PLD_SCRXB __reg16(PLD_BASE + 0x3800e)
147
148#endif
149
150#endif /* _MAPPI2_PLD.H */
diff --git a/arch/m32r/include/asm/mappi3/mappi3_pld.h b/arch/m32r/include/asm/mappi3/mappi3_pld.h
new file mode 100644
index 000000000000..451c40ee70af
--- /dev/null
+++ b/arch/m32r/include/asm/mappi3/mappi3_pld.h
@@ -0,0 +1,142 @@
1#ifndef _MAPPI3_PLD_H
2#define _MAPPI3_PLD_H
3
4/*
5 * include/asm-m32r/mappi3/mappi3_pld.h
6 *
7 * Definitions for Extended IO Logic on MAPPI3 board.
8 * based on m32700ut_pld.h
9 *
10 * This file is subject to the terms and conditions of the GNU General
11 * Public License. See the file "COPYING" in the main directory of
12 * this archive for more details.
13 */
14
15#ifndef __ASSEMBLY__
16/* FIXME:
17 * Some C functions use non-cache address, so can't define non-cache address.
18 */
19#define PLD_BASE (0x1c000000 /* + NONCACHE_OFFSET */)
20#define __reg8 (volatile unsigned char *)
21#define __reg16 (volatile unsigned short *)
22#define __reg32 (volatile unsigned int *)
23#else
24#define PLD_BASE (0x1c000000 + NONCACHE_OFFSET)
25#define __reg8
26#define __reg16
27#define __reg32
28#endif /* __ASSEMBLY__ */
29
30/* CFC */
31#define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000)
32#define PLD_CFSTS __reg16(PLD_BASE + 0x0002)
33#define PLD_CFIMASK __reg16(PLD_BASE + 0x0004)
34#define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006)
35#define PLD_CFCR0 __reg16(PLD_BASE + 0x000a)
36#define PLD_CFCR1 __reg16(PLD_BASE + 0x000c)
37
38/* MMC */
39#define PLD_MMCCR __reg16(PLD_BASE + 0x4000)
40#define PLD_MMCMOD __reg16(PLD_BASE + 0x4002)
41#define PLD_MMCSTS __reg16(PLD_BASE + 0x4006)
42#define PLD_MMCBAUR __reg16(PLD_BASE + 0x400a)
43#define PLD_MMCCMDBCUT __reg16(PLD_BASE + 0x400c)
44#define PLD_MMCCDTBCUT __reg16(PLD_BASE + 0x400e)
45#define PLD_MMCDET __reg16(PLD_BASE + 0x4010)
46#define PLD_MMCWP __reg16(PLD_BASE + 0x4012)
47#define PLD_MMCWDATA __reg16(PLD_BASE + 0x5000)
48#define PLD_MMCRDATA __reg16(PLD_BASE + 0x6000)
49#define PLD_MMCCMDDATA __reg16(PLD_BASE + 0x7000)
50#define PLD_MMCRSPDATA __reg16(PLD_BASE + 0x7006)
51
52/* Power Control of MMC and CF */
53#define PLD_CPCR __reg16(PLD_BASE + 0x14000)
54
55/* ICU */
56#define M32R_IRQ_PC104 (5) /* INT4(PC/104) */
57#define M32R_IRQ_I2C (28) /* I2C-BUS */
58#define PLD_IRQ_CFIREQ (6) /* INT5 CFC Card Interrupt */
59#define PLD_IRQ_CFC_INSERT (7) /* INT6 CFC Card Insert & Eject */
60#define PLD_IRQ_IDEIREQ (8) /* INT7 IDE Interrupt */
61#define PLD_IRQ_MMCCARD (43) /* MMC Card Insert */
62#define PLD_IRQ_MMCIRQ (44) /* MMC Transfer Done */
63
64#if 0
65/* LED Control
66 *
67 * 1: DIP swich side
68 * 2: Reset switch side
69 */
70#define PLD_IOLEDCR __reg16(PLD_BASE + 0x14002)
71#define PLD_IOLED_1_ON 0x001
72#define PLD_IOLED_1_OFF 0x000
73#define PLD_IOLED_2_ON 0x002
74#define PLD_IOLED_2_OFF 0x000
75
76/* DIP Switch
77 * 0: Write-protect of Flash Memory (0:protected, 1:non-protected)
78 * 1: -
79 * 2: -
80 * 3: -
81 */
82#define PLD_IOSWSTS __reg16(PLD_BASE + 0x14004)
83#define PLD_IOSWSTS_IOSW2 0x0200
84#define PLD_IOSWSTS_IOSW1 0x0100
85#define PLD_IOSWSTS_IOWP0 0x0001
86
87#endif
88
89/* CRC */
90#define PLD_CRC7DATA __reg16(PLD_BASE + 0x18000)
91#define PLD_CRC7INDATA __reg16(PLD_BASE + 0x18002)
92#define PLD_CRC16DATA __reg16(PLD_BASE + 0x18004)
93#define PLD_CRC16INDATA __reg16(PLD_BASE + 0x18006)
94#define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008)
95#define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a)
96
97#if 0
98/* RTC */
99#define PLD_RTCCR __reg16(PLD_BASE + 0x1c000)
100#define PLD_RTCBAUR __reg16(PLD_BASE + 0x1c002)
101#define PLD_RTCWRDATA __reg16(PLD_BASE + 0x1c004)
102#define PLD_RTCRDDATA __reg16(PLD_BASE + 0x1c006)
103#define PLD_RTCRSTODT __reg16(PLD_BASE + 0x1c008)
104
105/* SIO0 */
106#define PLD_ESIO0CR __reg16(PLD_BASE + 0x20000)
107#define PLD_ESIO0CR_TXEN 0x0001
108#define PLD_ESIO0CR_RXEN 0x0002
109#define PLD_ESIO0MOD0 __reg16(PLD_BASE + 0x20002)
110#define PLD_ESIO0MOD0_CTSS 0x0040
111#define PLD_ESIO0MOD0_RTSS 0x0080
112#define PLD_ESIO0MOD1 __reg16(PLD_BASE + 0x20004)
113#define PLD_ESIO0MOD1_LMFS 0x0010
114#define PLD_ESIO0STS __reg16(PLD_BASE + 0x20006)
115#define PLD_ESIO0STS_TEMP 0x0001
116#define PLD_ESIO0STS_TXCP 0x0002
117#define PLD_ESIO0STS_RXCP 0x0004
118#define PLD_ESIO0STS_TXSC 0x0100
119#define PLD_ESIO0STS_RXSC 0x0200
120#define PLD_ESIO0STS_TXREADY (PLD_ESIO0STS_TXCP | PLD_ESIO0STS_TEMP)
121#define PLD_ESIO0INTCR __reg16(PLD_BASE + 0x20008)
122#define PLD_ESIO0INTCR_TXIEN 0x0002
123#define PLD_ESIO0INTCR_RXCEN 0x0004
124#define PLD_ESIO0BAUR __reg16(PLD_BASE + 0x2000a)
125#define PLD_ESIO0TXB __reg16(PLD_BASE + 0x2000c)
126#define PLD_ESIO0RXB __reg16(PLD_BASE + 0x2000e)
127
128/* SIM Card */
129#define PLD_SCCR __reg16(PLD_BASE + 0x38000)
130#define PLD_SCMOD __reg16(PLD_BASE + 0x38004)
131#define PLD_SCSTS __reg16(PLD_BASE + 0x38006)
132#define PLD_SCINTCR __reg16(PLD_BASE + 0x38008)
133#define PLD_SCBAUR __reg16(PLD_BASE + 0x3800a)
134#define PLD_SCTXB __reg16(PLD_BASE + 0x3800c)
135#define PLD_SCRXB __reg16(PLD_BASE + 0x3800e)
136
137#endif
138
139/* Reset Control */
140#define PLD_REBOOT __reg16(PLD_BASE + 0x38000)
141
142#endif /* _MAPPI3_PLD.H */
diff --git a/arch/m32r/include/asm/mc146818rtc.h b/arch/m32r/include/asm/mc146818rtc.h
new file mode 100644
index 000000000000..aa1b7bf84f51
--- /dev/null
+++ b/arch/m32r/include/asm/mc146818rtc.h
@@ -0,0 +1,29 @@
1/*
2 * Machine dependent access functions for RTC registers.
3 */
4#ifndef _ASM_MC146818RTC_H
5#define _ASM_MC146818RTC_H
6
7#include <asm/io.h>
8
9#ifndef RTC_PORT
10#define RTC_PORT(x) ((x))
11#define RTC_ALWAYS_BCD 1 /* RTC operates in binary mode */
12#endif
13
14/*
15 * The yet supported machines all access the RTC index register via
16 * an ISA port access but the way to access the date register differs ...
17 */
18#define CMOS_READ(addr) ({ \
19outb_p((addr),RTC_PORT(0)); \
20inb_p(RTC_PORT(1)); \
21})
22#define CMOS_WRITE(val, addr) ({ \
23outb_p((addr),RTC_PORT(0)); \
24outb_p((val),RTC_PORT(1)); \
25})
26
27#define RTC_IRQ 8
28
29#endif /* _ASM_MC146818RTC_H */
diff --git a/arch/m32r/include/asm/mman.h b/arch/m32r/include/asm/mman.h
new file mode 100644
index 000000000000..516a8973b130
--- /dev/null
+++ b/arch/m32r/include/asm/mman.h
@@ -0,0 +1,17 @@
1#ifndef __M32R_MMAN_H__
2#define __M32R_MMAN_H__
3
4#include <asm-generic/mman.h>
5
6#define MAP_GROWSDOWN 0x0100 /* stack-like segment */
7#define MAP_DENYWRITE 0x0800 /* ETXTBSY */
8#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */
9#define MAP_LOCKED 0x2000 /* pages are locked */
10#define MAP_NORESERVE 0x4000 /* don't check for reservations */
11#define MAP_POPULATE 0x8000 /* populate (prefault) pagetables */
12#define MAP_NONBLOCK 0x10000 /* do not block on IO */
13
14#define MCL_CURRENT 1 /* lock all current mappings */
15#define MCL_FUTURE 2 /* lock all future mappings */
16
17#endif /* __M32R_MMAN_H__ */
diff --git a/arch/m32r/include/asm/mmu.h b/arch/m32r/include/asm/mmu.h
new file mode 100644
index 000000000000..150cb92bb666
--- /dev/null
+++ b/arch/m32r/include/asm/mmu.h
@@ -0,0 +1,21 @@
1#ifndef _ASM_M32R_MMU_H
2#define _ASM_M32R_MMU_H
3
4#if !defined(CONFIG_MMU)
5
6typedef struct {
7 unsigned long end_brk;
8} mm_context_t;
9
10#else /* CONFIG_MMU */
11
12/* Default "unsigned long" context */
13#ifndef CONFIG_SMP
14typedef unsigned long mm_context_t;
15#else
16typedef unsigned long mm_context_t[NR_CPUS];
17#endif
18
19#endif /* CONFIG_MMU */
20
21#endif /* _ASM_M32R_MMU_H */
diff --git a/arch/m32r/include/asm/mmu_context.h b/arch/m32r/include/asm/mmu_context.h
new file mode 100644
index 000000000000..91909e5dd9d0
--- /dev/null
+++ b/arch/m32r/include/asm/mmu_context.h
@@ -0,0 +1,164 @@
1#ifndef _ASM_M32R_MMU_CONTEXT_H
2#define _ASM_M32R_MMU_CONTEXT_H
3#ifdef __KERNEL__
4
5#include <asm/m32r.h>
6
7#define MMU_CONTEXT_ASID_MASK (0x000000FF)
8#define MMU_CONTEXT_VERSION_MASK (0xFFFFFF00)
9#define MMU_CONTEXT_FIRST_VERSION (0x00000100)
10#define NO_CONTEXT (0x00000000)
11
12#ifndef __ASSEMBLY__
13
14#include <asm/atomic.h>
15#include <asm/pgalloc.h>
16#include <asm/mmu.h>
17#include <asm/tlbflush.h>
18#include <asm-generic/mm_hooks.h>
19
20/*
21 * Cache of MMU context last used.
22 */
23#ifndef CONFIG_SMP
24extern unsigned long mmu_context_cache_dat;
25#define mmu_context_cache mmu_context_cache_dat
26#define mm_context(mm) mm->context
27#else /* not CONFIG_SMP */
28extern unsigned long mmu_context_cache_dat[];
29#define mmu_context_cache mmu_context_cache_dat[smp_processor_id()]
30#define mm_context(mm) mm->context[smp_processor_id()]
31#endif /* not CONFIG_SMP */
32
33#define set_tlb_tag(entry, tag) (*entry = (tag & PAGE_MASK)|get_asid())
34#define set_tlb_data(entry, data) (*entry = (data | _PAGE_PRESENT))
35
36#ifdef CONFIG_MMU
37#define enter_lazy_tlb(mm, tsk) do { } while (0)
38
39static inline void get_new_mmu_context(struct mm_struct *mm)
40{
41 unsigned long mc = ++mmu_context_cache;
42
43 if (!(mc & MMU_CONTEXT_ASID_MASK)) {
44 /* We exhaust ASID of this version.
45 Flush all TLB and start new cycle. */
46 local_flush_tlb_all();
47 /* Fix version if needed.
48 Note that we avoid version #0 to distingush NO_CONTEXT. */
49 if (!mc)
50 mmu_context_cache = mc = MMU_CONTEXT_FIRST_VERSION;
51 }
52 mm_context(mm) = mc;
53}
54
55/*
56 * Get MMU context if needed.
57 */
58static inline void get_mmu_context(struct mm_struct *mm)
59{
60 if (mm) {
61 unsigned long mc = mmu_context_cache;
62
63 /* Check if we have old version of context.
64 If it's old, we need to get new context with new version. */
65 if ((mm_context(mm) ^ mc) & MMU_CONTEXT_VERSION_MASK)
66 get_new_mmu_context(mm);
67 }
68}
69
70/*
71 * Initialize the context related info for a new mm_struct
72 * instance.
73 */
74static inline int init_new_context(struct task_struct *tsk,
75 struct mm_struct *mm)
76{
77#ifndef CONFIG_SMP
78 mm->context = NO_CONTEXT;
79#else /* CONFIG_SMP */
80 int num_cpus = num_online_cpus();
81 int i;
82
83 for (i = 0 ; i < num_cpus ; i++)
84 mm->context[i] = NO_CONTEXT;
85#endif /* CONFIG_SMP */
86
87 return 0;
88}
89
90/*
91 * Destroy context related info for an mm_struct that is about
92 * to be put to rest.
93 */
94#define destroy_context(mm) do { } while (0)
95
96static inline void set_asid(unsigned long asid)
97{
98 *(volatile unsigned long *)MASID = (asid & MMU_CONTEXT_ASID_MASK);
99}
100
101static inline unsigned long get_asid(void)
102{
103 unsigned long asid;
104
105 asid = *(volatile long *)MASID;
106 asid &= MMU_CONTEXT_ASID_MASK;
107
108 return asid;
109}
110
111/*
112 * After we have set current->mm to a new value, this activates
113 * the context for the new mm so we see the new mappings.
114 */
115static inline void activate_context(struct mm_struct *mm)
116{
117 get_mmu_context(mm);
118 set_asid(mm_context(mm) & MMU_CONTEXT_ASID_MASK);
119}
120
121static inline void switch_mm(struct mm_struct *prev,
122 struct mm_struct *next, struct task_struct *tsk)
123{
124#ifdef CONFIG_SMP
125 int cpu = smp_processor_id();
126#endif /* CONFIG_SMP */
127
128 if (prev != next) {
129#ifdef CONFIG_SMP
130 cpu_set(cpu, next->cpu_vm_mask);
131#endif /* CONFIG_SMP */
132 /* Set MPTB = next->pgd */
133 *(volatile unsigned long *)MPTB = (unsigned long)next->pgd;
134 activate_context(next);
135 }
136#ifdef CONFIG_SMP
137 else
138 if (!cpu_test_and_set(cpu, next->cpu_vm_mask))
139 activate_context(next);
140#endif /* CONFIG_SMP */
141}
142
143#define deactivate_mm(tsk, mm) do { } while (0)
144
145#define activate_mm(prev, next) \
146 switch_mm((prev), (next), NULL)
147
148#else /* not CONFIG_MMU */
149#define get_mmu_context(mm) do { } while (0)
150#define init_new_context(tsk,mm) (0)
151#define destroy_context(mm) do { } while (0)
152#define set_asid(asid) do { } while (0)
153#define get_asid() (0)
154#define activate_context(mm) do { } while (0)
155#define switch_mm(prev,next,tsk) do { } while (0)
156#define deactivate_mm(mm,tsk) do { } while (0)
157#define activate_mm(prev,next) do { } while (0)
158#define enter_lazy_tlb(mm,tsk) do { } while (0)
159#endif /* not CONFIG_MMU */
160
161#endif /* not __ASSEMBLY__ */
162
163#endif /* __KERNEL__ */
164#endif /* _ASM_M32R_MMU_CONTEXT_H */
diff --git a/arch/m32r/include/asm/mmzone.h b/arch/m32r/include/asm/mmzone.h
new file mode 100644
index 000000000000..9f3b5accda88
--- /dev/null
+++ b/arch/m32r/include/asm/mmzone.h
@@ -0,0 +1,59 @@
1/*
2 * Written by Pat Gaughen (gone@us.ibm.com) Mar 2002
3 *
4 */
5
6#ifndef _ASM_MMZONE_H_
7#define _ASM_MMZONE_H_
8
9#include <asm/smp.h>
10
11#ifdef CONFIG_DISCONTIGMEM
12
13extern struct pglist_data *node_data[];
14#define NODE_DATA(nid) (node_data[nid])
15
16#define node_localnr(pfn, nid) ((pfn) - NODE_DATA(nid)->node_start_pfn)
17#define node_start_pfn(nid) (NODE_DATA(nid)->node_start_pfn)
18#define node_end_pfn(nid) \
19({ \
20 pg_data_t *__pgdat = NODE_DATA(nid); \
21 __pgdat->node_start_pfn + __pgdat->node_spanned_pages - 1; \
22})
23
24#define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
25/*
26 * pfn_valid should be made as fast as possible, and the current definition
27 * is valid for machines that are NUMA, but still contiguous, which is what
28 * is currently supported. A more generalised, but slower definition would
29 * be something like this - mbligh:
30 * ( pfn_to_pgdat(pfn) && ((pfn) < node_end_pfn(pfn_to_nid(pfn))) )
31 */
32#if 1 /* M32R_FIXME */
33#define pfn_valid(pfn) (1)
34#else
35#define pfn_valid(pfn) ((pfn) < num_physpages)
36#endif
37
38/*
39 * generic node memory support, the following assumptions apply:
40 */
41
42static __inline__ int pfn_to_nid(unsigned long pfn)
43{
44 int node;
45
46 for (node = 0 ; node < MAX_NUMNODES ; node++)
47 if (pfn >= node_start_pfn(node) && pfn <= node_end_pfn(node))
48 break;
49
50 return node;
51}
52
53static __inline__ struct pglist_data *pfn_to_pgdat(unsigned long pfn)
54{
55 return(NODE_DATA(pfn_to_nid(pfn)));
56}
57
58#endif /* CONFIG_DISCONTIGMEM */
59#endif /* _ASM_MMZONE_H_ */
diff --git a/arch/m32r/include/asm/module.h b/arch/m32r/include/asm/module.h
new file mode 100644
index 000000000000..eb73ee011215
--- /dev/null
+++ b/arch/m32r/include/asm/module.h
@@ -0,0 +1,10 @@
1#ifndef _ASM_M32R_MODULE_H
2#define _ASM_M32R_MODULE_H
3
4struct mod_arch_specific { };
5
6#define Elf_Shdr Elf32_Shdr
7#define Elf_Sym Elf32_Sym
8#define Elf_Ehdr Elf32_Ehdr
9
10#endif /* _ASM_M32R_MODULE_H */
diff --git a/arch/m32r/include/asm/msgbuf.h b/arch/m32r/include/asm/msgbuf.h
new file mode 100644
index 000000000000..0d5a877b813e
--- /dev/null
+++ b/arch/m32r/include/asm/msgbuf.h
@@ -0,0 +1,31 @@
1#ifndef _ASM_M32R_MSGBUF_H
2#define _ASM_M32R_MSGBUF_H
3
4/*
5 * The msqid64_ds structure for m32r architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct msqid64_ds {
15 struct ipc64_perm msg_perm;
16 __kernel_time_t msg_stime; /* last msgsnd time */
17 unsigned long __unused1;
18 __kernel_time_t msg_rtime; /* last msgrcv time */
19 unsigned long __unused2;
20 __kernel_time_t msg_ctime; /* last change time */
21 unsigned long __unused3;
22 unsigned long msg_cbytes; /* current number of bytes on queue */
23 unsigned long msg_qnum; /* number of messages in queue */
24 unsigned long msg_qbytes; /* max number of bytes on queue */
25 __kernel_pid_t msg_lspid; /* pid of last msgsnd */
26 __kernel_pid_t msg_lrpid; /* last receive pid */
27 unsigned long __unused4;
28 unsigned long __unused5;
29};
30
31#endif /* _ASM_M32R_MSGBUF_H */
diff --git a/arch/m32r/include/asm/mutex.h b/arch/m32r/include/asm/mutex.h
new file mode 100644
index 000000000000..458c1f7fbc18
--- /dev/null
+++ b/arch/m32r/include/asm/mutex.h
@@ -0,0 +1,9 @@
1/*
2 * Pull in the generic implementation for the mutex fastpath.
3 *
4 * TODO: implement optimized primitives instead, or leave the generic
5 * implementation in place, or pick the atomic_xchg() based generic
6 * implementation. (see asm-generic/mutex-xchg.h for details)
7 */
8
9#include <asm-generic/mutex-dec.h>
diff --git a/arch/m32r/include/asm/opsput/opsput_lan.h b/arch/m32r/include/asm/opsput/opsput_lan.h
new file mode 100644
index 000000000000..a5f18dd1ab20
--- /dev/null
+++ b/arch/m32r/include/asm/opsput/opsput_lan.h
@@ -0,0 +1,52 @@
1#ifndef _OPSPUT_OPSPUT_LAN_H
2#define _OPSPUT_OPSPUT_LAN_H
3
4/*
5 * include/asm-m32r/opsput/opsput_lan.h
6 *
7 * OPSPUT-LAN board
8 *
9 * Copyright (c) 2002-2004 Takeo Takahashi, Mamoru Sakugawa
10 *
11 * This file is subject to the terms and conditions of the GNU General
12 * Public License. See the file "COPYING" in the main directory of
13 * this archive for more details.
14 */
15
16#ifndef __ASSEMBLY__
17/*
18 * C functions use non-cache address.
19 */
20#define OPSPUT_LAN_BASE (0x10000000 /* + NONCACHE_OFFSET */)
21#else
22#define OPSPUT_LAN_BASE (0x10000000 + NONCACHE_OFFSET)
23#endif /* __ASSEMBLY__ */
24
25/* ICU
26 * ICUISTS: status register
27 * ICUIREQ0: request register
28 * ICUIREQ1: request register
29 * ICUCR3: control register for CFIREQ# interrupt
30 * ICUCR4: control register for CFC Card insert interrupt
31 * ICUCR5: control register for CFC Card eject interrupt
32 * ICUCR6: control register for external interrupt
33 * ICUCR11: control register for MMC Card insert/eject interrupt
34 * ICUCR13: control register for SC error interrupt
35 * ICUCR14: control register for SC receive interrupt
36 * ICUCR15: control register for SC send interrupt
37 * ICUCR16: control register for SIO0 receive interrupt
38 * ICUCR17: control register for SIO0 send interrupt
39 */
40#define OPSPUT_LAN_IRQ_LAN (OPSPUT_LAN_PLD_IRQ_BASE + 1) /* LAN */
41#define OPSPUT_LAN_IRQ_I2C (OPSPUT_LAN_PLD_IRQ_BASE + 3) /* I2C */
42
43#define OPSPUT_LAN_ICUISTS __reg16(OPSPUT_LAN_BASE + 0xc0002)
44#define OPSPUT_LAN_ICUISTS_VECB_MASK (0xf000)
45#define OPSPUT_LAN_VECB(x) ((x) & OPSPUT_LAN_ICUISTS_VECB_MASK)
46#define OPSPUT_LAN_ICUISTS_ISN_MASK (0x07c0)
47#define OPSPUT_LAN_ICUISTS_ISN(x) ((x) & OPSPUT_LAN_ICUISTS_ISN_MASK)
48#define OPSPUT_LAN_ICUIREQ0 __reg16(OPSPUT_LAN_BASE + 0xc0004)
49#define OPSPUT_LAN_ICUCR1 __reg16(OPSPUT_LAN_BASE + 0xc0010)
50#define OPSPUT_LAN_ICUCR3 __reg16(OPSPUT_LAN_BASE + 0xc0014)
51
52#endif /* _OPSPUT_OPSPUT_LAN_H */
diff --git a/arch/m32r/include/asm/opsput/opsput_lcd.h b/arch/m32r/include/asm/opsput/opsput_lcd.h
new file mode 100644
index 000000000000..369c9f0832a6
--- /dev/null
+++ b/arch/m32r/include/asm/opsput/opsput_lcd.h
@@ -0,0 +1,55 @@
1#ifndef _OPSPUT_OPSPUT_LCD_H
2#define _OPSPUT_OPSPUT_LCD_H
3
4/*
5 * include/asm-m32r/opsput/opsput_lcd.h
6 *
7 * OPSPUT-LCD board
8 *
9 * Copyright (c) 2002 Takeo Takahashi
10 *
11 * This file is subject to the terms and conditions of the GNU General
12 * Public License. See the file "COPYING" in the main directory of
13 * this archive for more details.
14 */
15
16#ifndef __ASSEMBLY__
17/*
18 * C functions use non-cache address.
19 */
20#define OPSPUT_LCD_BASE (0x10000000 /* + NONCACHE_OFFSET */)
21#else
22#define OPSPUT_LCD_BASE (0x10000000 + NONCACHE_OFFSET)
23#endif /* __ASSEMBLY__ */
24
25/*
26 * ICU
27 */
28#define OPSPUT_LCD_IRQ_BAT_INT (OPSPUT_LCD_PLD_IRQ_BASE + 1)
29#define OPSPUT_LCD_IRQ_USB_INT1 (OPSPUT_LCD_PLD_IRQ_BASE + 2)
30#define OPSPUT_LCD_IRQ_AUDT0 (OPSPUT_LCD_PLD_IRQ_BASE + 3)
31#define OPSPUT_LCD_IRQ_AUDT2 (OPSPUT_LCD_PLD_IRQ_BASE + 4)
32#define OPSPUT_LCD_IRQ_BATSIO_RCV (OPSPUT_LCD_PLD_IRQ_BASE + 16)
33#define OPSPUT_LCD_IRQ_BATSIO_SND (OPSPUT_LCD_PLD_IRQ_BASE + 17)
34#define OPSPUT_LCD_IRQ_ASNDSIO_RCV (OPSPUT_LCD_PLD_IRQ_BASE + 18)
35#define OPSPUT_LCD_IRQ_ASNDSIO_SND (OPSPUT_LCD_PLD_IRQ_BASE + 19)
36#define OPSPUT_LCD_IRQ_ACNLSIO_SND (OPSPUT_LCD_PLD_IRQ_BASE + 21)
37
38#define OPSPUT_LCD_ICUISTS __reg16(OPSPUT_LCD_BASE + 0x300002)
39#define OPSPUT_LCD_ICUISTS_VECB_MASK (0xf000)
40#define OPSPUT_LCD_VECB(x) ((x) & OPSPUT_LCD_ICUISTS_VECB_MASK)
41#define OPSPUT_LCD_ICUISTS_ISN_MASK (0x07c0)
42#define OPSPUT_LCD_ICUISTS_ISN(x) ((x) & OPSPUT_LCD_ICUISTS_ISN_MASK)
43#define OPSPUT_LCD_ICUIREQ0 __reg16(OPSPUT_LCD_BASE + 0x300004)
44#define OPSPUT_LCD_ICUIREQ1 __reg16(OPSPUT_LCD_BASE + 0x300006)
45#define OPSPUT_LCD_ICUCR1 __reg16(OPSPUT_LCD_BASE + 0x300020)
46#define OPSPUT_LCD_ICUCR2 __reg16(OPSPUT_LCD_BASE + 0x300022)
47#define OPSPUT_LCD_ICUCR3 __reg16(OPSPUT_LCD_BASE + 0x300024)
48#define OPSPUT_LCD_ICUCR4 __reg16(OPSPUT_LCD_BASE + 0x300026)
49#define OPSPUT_LCD_ICUCR16 __reg16(OPSPUT_LCD_BASE + 0x300030)
50#define OPSPUT_LCD_ICUCR17 __reg16(OPSPUT_LCD_BASE + 0x300032)
51#define OPSPUT_LCD_ICUCR18 __reg16(OPSPUT_LCD_BASE + 0x300034)
52#define OPSPUT_LCD_ICUCR19 __reg16(OPSPUT_LCD_BASE + 0x300036)
53#define OPSPUT_LCD_ICUCR21 __reg16(OPSPUT_LCD_BASE + 0x30003a)
54
55#endif /* _OPSPUT_OPSPUT_LCD_H */
diff --git a/arch/m32r/include/asm/opsput/opsput_pld.h b/arch/m32r/include/asm/opsput/opsput_pld.h
new file mode 100644
index 000000000000..3f11ea1aac2d
--- /dev/null
+++ b/arch/m32r/include/asm/opsput/opsput_pld.h
@@ -0,0 +1,255 @@
1#ifndef _OPSPUT_OPSPUT_PLD_H
2#define _OPSPUT_OPSPUT_PLD_H
3
4/*
5 * include/asm-m32r/opsput/opsput_pld.h
6 *
7 * Definitions for Programable Logic Device(PLD) on OPSPUT board.
8 *
9 * Copyright (c) 2002 Takeo Takahashi
10 *
11 * This file is subject to the terms and conditions of the GNU General
12 * Public License. See the file "COPYING" in the main directory of
13 * this archive for more details.
14 */
15
16#define PLD_PLAT_BASE 0x1cc00000
17
18#ifndef __ASSEMBLY__
19/*
20 * C functions use non-cache address.
21 */
22#define PLD_BASE (PLD_PLAT_BASE /* + NONCACHE_OFFSET */)
23#define __reg8 (volatile unsigned char *)
24#define __reg16 (volatile unsigned short *)
25#define __reg32 (volatile unsigned int *)
26#else
27#define PLD_BASE (PLD_PLAT_BASE + NONCACHE_OFFSET)
28#define __reg8
29#define __reg16
30#define __reg32
31#endif /* __ASSEMBLY__ */
32
33/* CFC */
34#define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000)
35#define PLD_CFSTS __reg16(PLD_BASE + 0x0002)
36#define PLD_CFIMASK __reg16(PLD_BASE + 0x0004)
37#define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006)
38#define PLD_CFVENCR __reg16(PLD_BASE + 0x0008)
39#define PLD_CFCR0 __reg16(PLD_BASE + 0x000a)
40#define PLD_CFCR1 __reg16(PLD_BASE + 0x000c)
41#define PLD_IDERSTCR __reg16(PLD_BASE + 0x0010)
42
43/* MMC */
44#define PLD_MMCCR __reg16(PLD_BASE + 0x4000)
45#define PLD_MMCMOD __reg16(PLD_BASE + 0x4002)
46#define PLD_MMCSTS __reg16(PLD_BASE + 0x4006)
47#define PLD_MMCBAUR __reg16(PLD_BASE + 0x400a)
48#define PLD_MMCCMDBCUT __reg16(PLD_BASE + 0x400c)
49#define PLD_MMCCDTBCUT __reg16(PLD_BASE + 0x400e)
50#define PLD_MMCDET __reg16(PLD_BASE + 0x4010)
51#define PLD_MMCWP __reg16(PLD_BASE + 0x4012)
52#define PLD_MMCWDATA __reg16(PLD_BASE + 0x5000)
53#define PLD_MMCRDATA __reg16(PLD_BASE + 0x6000)
54#define PLD_MMCCMDDATA __reg16(PLD_BASE + 0x7000)
55#define PLD_MMCRSPDATA __reg16(PLD_BASE + 0x7006)
56
57/* ICU
58 * ICUISTS: status register
59 * ICUIREQ0: request register
60 * ICUIREQ1: request register
61 * ICUCR3: control register for CFIREQ# interrupt
62 * ICUCR4: control register for CFC Card insert interrupt
63 * ICUCR5: control register for CFC Card eject interrupt
64 * ICUCR6: control register for external interrupt
65 * ICUCR11: control register for MMC Card insert/eject interrupt
66 * ICUCR13: control register for SC error interrupt
67 * ICUCR14: control register for SC receive interrupt
68 * ICUCR15: control register for SC send interrupt
69 * ICUCR16: control register for SIO0 receive interrupt
70 * ICUCR17: control register for SIO0 send interrupt
71 */
72#if !defined(CONFIG_PLAT_USRV)
73#define PLD_IRQ_INT0 (OPSPUT_PLD_IRQ_BASE + 0) /* None */
74#define PLD_IRQ_INT1 (OPSPUT_PLD_IRQ_BASE + 1) /* reserved */
75#define PLD_IRQ_INT2 (OPSPUT_PLD_IRQ_BASE + 2) /* reserved */
76#define PLD_IRQ_CFIREQ (OPSPUT_PLD_IRQ_BASE + 3) /* CF IREQ */
77#define PLD_IRQ_CFC_INSERT (OPSPUT_PLD_IRQ_BASE + 4) /* CF Insert */
78#define PLD_IRQ_CFC_EJECT (OPSPUT_PLD_IRQ_BASE + 5) /* CF Eject */
79#define PLD_IRQ_EXINT (OPSPUT_PLD_IRQ_BASE + 6) /* EXINT */
80#define PLD_IRQ_INT7 (OPSPUT_PLD_IRQ_BASE + 7) /* reserved */
81#define PLD_IRQ_INT8 (OPSPUT_PLD_IRQ_BASE + 8) /* reserved */
82#define PLD_IRQ_INT9 (OPSPUT_PLD_IRQ_BASE + 9) /* reserved */
83#define PLD_IRQ_INT10 (OPSPUT_PLD_IRQ_BASE + 10) /* reserved */
84#define PLD_IRQ_MMCCARD (OPSPUT_PLD_IRQ_BASE + 11) /* MMC Insert/Eject */
85#define PLD_IRQ_INT12 (OPSPUT_PLD_IRQ_BASE + 12) /* reserved */
86#define PLD_IRQ_SC_ERROR (OPSPUT_PLD_IRQ_BASE + 13) /* SC error */
87#define PLD_IRQ_SC_RCV (OPSPUT_PLD_IRQ_BASE + 14) /* SC receive */
88#define PLD_IRQ_SC_SND (OPSPUT_PLD_IRQ_BASE + 15) /* SC send */
89#define PLD_IRQ_SIO0_RCV (OPSPUT_PLD_IRQ_BASE + 16) /* SIO receive */
90#define PLD_IRQ_SIO0_SND (OPSPUT_PLD_IRQ_BASE + 17) /* SIO send */
91#define PLD_IRQ_INT18 (OPSPUT_PLD_IRQ_BASE + 18) /* reserved */
92#define PLD_IRQ_INT19 (OPSPUT_PLD_IRQ_BASE + 19) /* reserved */
93#define PLD_IRQ_INT20 (OPSPUT_PLD_IRQ_BASE + 20) /* reserved */
94#define PLD_IRQ_INT21 (OPSPUT_PLD_IRQ_BASE + 21) /* reserved */
95#define PLD_IRQ_INT22 (OPSPUT_PLD_IRQ_BASE + 22) /* reserved */
96#define PLD_IRQ_INT23 (OPSPUT_PLD_IRQ_BASE + 23) /* reserved */
97#define PLD_IRQ_INT24 (OPSPUT_PLD_IRQ_BASE + 24) /* reserved */
98#define PLD_IRQ_INT25 (OPSPUT_PLD_IRQ_BASE + 25) /* reserved */
99#define PLD_IRQ_INT26 (OPSPUT_PLD_IRQ_BASE + 26) /* reserved */
100#define PLD_IRQ_INT27 (OPSPUT_PLD_IRQ_BASE + 27) /* reserved */
101#define PLD_IRQ_INT28 (OPSPUT_PLD_IRQ_BASE + 28) /* reserved */
102#define PLD_IRQ_INT29 (OPSPUT_PLD_IRQ_BASE + 29) /* reserved */
103#define PLD_IRQ_INT30 (OPSPUT_PLD_IRQ_BASE + 30) /* reserved */
104#define PLD_IRQ_INT31 (OPSPUT_PLD_IRQ_BASE + 31) /* reserved */
105
106#else /* CONFIG_PLAT_USRV */
107
108#define PLD_IRQ_INT0 (OPSPUT_PLD_IRQ_BASE + 0) /* None */
109#define PLD_IRQ_INT1 (OPSPUT_PLD_IRQ_BASE + 1) /* reserved */
110#define PLD_IRQ_INT2 (OPSPUT_PLD_IRQ_BASE + 2) /* reserved */
111#define PLD_IRQ_CF0 (OPSPUT_PLD_IRQ_BASE + 3) /* CF0# */
112#define PLD_IRQ_CF1 (OPSPUT_PLD_IRQ_BASE + 4) /* CF1# */
113#define PLD_IRQ_CF2 (OPSPUT_PLD_IRQ_BASE + 5) /* CF2# */
114#define PLD_IRQ_CF3 (OPSPUT_PLD_IRQ_BASE + 6) /* CF3# */
115#define PLD_IRQ_CF4 (OPSPUT_PLD_IRQ_BASE + 7) /* CF4# */
116#define PLD_IRQ_INT8 (OPSPUT_PLD_IRQ_BASE + 8) /* reserved */
117#define PLD_IRQ_INT9 (OPSPUT_PLD_IRQ_BASE + 9) /* reserved */
118#define PLD_IRQ_INT10 (OPSPUT_PLD_IRQ_BASE + 10) /* reserved */
119#define PLD_IRQ_INT11 (OPSPUT_PLD_IRQ_BASE + 11) /* reserved */
120#define PLD_IRQ_UART0 (OPSPUT_PLD_IRQ_BASE + 12) /* UARTIRQ0 */
121#define PLD_IRQ_UART1 (OPSPUT_PLD_IRQ_BASE + 13) /* UARTIRQ1 */
122#define PLD_IRQ_INT14 (OPSPUT_PLD_IRQ_BASE + 14) /* reserved */
123#define PLD_IRQ_INT15 (OPSPUT_PLD_IRQ_BASE + 15) /* reserved */
124#define PLD_IRQ_SNDINT (OPSPUT_PLD_IRQ_BASE + 16) /* SNDINT# */
125#define PLD_IRQ_INT17 (OPSPUT_PLD_IRQ_BASE + 17) /* reserved */
126#define PLD_IRQ_INT18 (OPSPUT_PLD_IRQ_BASE + 18) /* reserved */
127#define PLD_IRQ_INT19 (OPSPUT_PLD_IRQ_BASE + 19) /* reserved */
128#define PLD_IRQ_INT20 (OPSPUT_PLD_IRQ_BASE + 20) /* reserved */
129#define PLD_IRQ_INT21 (OPSPUT_PLD_IRQ_BASE + 21) /* reserved */
130#define PLD_IRQ_INT22 (OPSPUT_PLD_IRQ_BASE + 22) /* reserved */
131#define PLD_IRQ_INT23 (OPSPUT_PLD_IRQ_BASE + 23) /* reserved */
132#define PLD_IRQ_INT24 (OPSPUT_PLD_IRQ_BASE + 24) /* reserved */
133#define PLD_IRQ_INT25 (OPSPUT_PLD_IRQ_BASE + 25) /* reserved */
134#define PLD_IRQ_INT26 (OPSPUT_PLD_IRQ_BASE + 26) /* reserved */
135#define PLD_IRQ_INT27 (OPSPUT_PLD_IRQ_BASE + 27) /* reserved */
136#define PLD_IRQ_INT28 (OPSPUT_PLD_IRQ_BASE + 28) /* reserved */
137#define PLD_IRQ_INT29 (OPSPUT_PLD_IRQ_BASE + 29) /* reserved */
138#define PLD_IRQ_INT30 (OPSPUT_PLD_IRQ_BASE + 30) /* reserved */
139
140#endif /* CONFIG_PLAT_USRV */
141
142#define PLD_ICUISTS __reg16(PLD_BASE + 0x8002)
143#define PLD_ICUISTS_VECB_MASK (0xf000)
144#define PLD_ICUISTS_VECB(x) ((x) & PLD_ICUISTS_VECB_MASK)
145#define PLD_ICUISTS_ISN_MASK (0x07c0)
146#define PLD_ICUISTS_ISN(x) ((x) & PLD_ICUISTS_ISN_MASK)
147#define PLD_ICUIREQ0 __reg16(PLD_BASE + 0x8004)
148#define PLD_ICUIREQ1 __reg16(PLD_BASE + 0x8006)
149#define PLD_ICUCR1 __reg16(PLD_BASE + 0x8100)
150#define PLD_ICUCR2 __reg16(PLD_BASE + 0x8102)
151#define PLD_ICUCR3 __reg16(PLD_BASE + 0x8104)
152#define PLD_ICUCR4 __reg16(PLD_BASE + 0x8106)
153#define PLD_ICUCR5 __reg16(PLD_BASE + 0x8108)
154#define PLD_ICUCR6 __reg16(PLD_BASE + 0x810a)
155#define PLD_ICUCR7 __reg16(PLD_BASE + 0x810c)
156#define PLD_ICUCR8 __reg16(PLD_BASE + 0x810e)
157#define PLD_ICUCR9 __reg16(PLD_BASE + 0x8110)
158#define PLD_ICUCR10 __reg16(PLD_BASE + 0x8112)
159#define PLD_ICUCR11 __reg16(PLD_BASE + 0x8114)
160#define PLD_ICUCR12 __reg16(PLD_BASE + 0x8116)
161#define PLD_ICUCR13 __reg16(PLD_BASE + 0x8118)
162#define PLD_ICUCR14 __reg16(PLD_BASE + 0x811a)
163#define PLD_ICUCR15 __reg16(PLD_BASE + 0x811c)
164#define PLD_ICUCR16 __reg16(PLD_BASE + 0x811e)
165#define PLD_ICUCR17 __reg16(PLD_BASE + 0x8120)
166#define PLD_ICUCR_IEN (0x1000)
167#define PLD_ICUCR_IREQ (0x0100)
168#define PLD_ICUCR_ISMOD00 (0x0000) /* Low edge */
169#define PLD_ICUCR_ISMOD01 (0x0010) /* Low level */
170#define PLD_ICUCR_ISMOD02 (0x0020) /* High edge */
171#define PLD_ICUCR_ISMOD03 (0x0030) /* High level */
172#define PLD_ICUCR_ILEVEL0 (0x0000)
173#define PLD_ICUCR_ILEVEL1 (0x0001)
174#define PLD_ICUCR_ILEVEL2 (0x0002)
175#define PLD_ICUCR_ILEVEL3 (0x0003)
176#define PLD_ICUCR_ILEVEL4 (0x0004)
177#define PLD_ICUCR_ILEVEL5 (0x0005)
178#define PLD_ICUCR_ILEVEL6 (0x0006)
179#define PLD_ICUCR_ILEVEL7 (0x0007)
180
181/* Power Control of MMC and CF */
182#define PLD_CPCR __reg16(PLD_BASE + 0x14000)
183#define PLD_CPCR_CF 0x0001
184#define PLD_CPCR_MMC 0x0002
185
186/* LED Control
187 *
188 * 1: DIP swich side
189 * 2: Reset switch side
190 */
191#define PLD_IOLEDCR __reg16(PLD_BASE + 0x14002)
192#define PLD_IOLED_1_ON 0x001
193#define PLD_IOLED_1_OFF 0x000
194#define PLD_IOLED_2_ON 0x002
195#define PLD_IOLED_2_OFF 0x000
196
197/* DIP Switch
198 * 0: Write-protect of Flash Memory (0:protected, 1:non-protected)
199 * 1: -
200 * 2: -
201 * 3: -
202 */
203#define PLD_IOSWSTS __reg16(PLD_BASE + 0x14004)
204#define PLD_IOSWSTS_IOSW2 0x0200
205#define PLD_IOSWSTS_IOSW1 0x0100
206#define PLD_IOSWSTS_IOWP0 0x0001
207
208/* CRC */
209#define PLD_CRC7DATA __reg16(PLD_BASE + 0x18000)
210#define PLD_CRC7INDATA __reg16(PLD_BASE + 0x18002)
211#define PLD_CRC16DATA __reg16(PLD_BASE + 0x18004)
212#define PLD_CRC16INDATA __reg16(PLD_BASE + 0x18006)
213#define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008)
214#define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a)
215
216/* RTC */
217#define PLD_RTCCR __reg16(PLD_BASE + 0x1c000)
218#define PLD_RTCBAUR __reg16(PLD_BASE + 0x1c002)
219#define PLD_RTCWRDATA __reg16(PLD_BASE + 0x1c004)
220#define PLD_RTCRDDATA __reg16(PLD_BASE + 0x1c006)
221#define PLD_RTCRSTODT __reg16(PLD_BASE + 0x1c008)
222
223/* SIO0 */
224#define PLD_ESIO0CR __reg16(PLD_BASE + 0x20000)
225#define PLD_ESIO0CR_TXEN 0x0001
226#define PLD_ESIO0CR_RXEN 0x0002
227#define PLD_ESIO0MOD0 __reg16(PLD_BASE + 0x20002)
228#define PLD_ESIO0MOD0_CTSS 0x0040
229#define PLD_ESIO0MOD0_RTSS 0x0080
230#define PLD_ESIO0MOD1 __reg16(PLD_BASE + 0x20004)
231#define PLD_ESIO0MOD1_LMFS 0x0010
232#define PLD_ESIO0STS __reg16(PLD_BASE + 0x20006)
233#define PLD_ESIO0STS_TEMP 0x0001
234#define PLD_ESIO0STS_TXCP 0x0002
235#define PLD_ESIO0STS_RXCP 0x0004
236#define PLD_ESIO0STS_TXSC 0x0100
237#define PLD_ESIO0STS_RXSC 0x0200
238#define PLD_ESIO0STS_TXREADY (PLD_ESIO0STS_TXCP | PLD_ESIO0STS_TEMP)
239#define PLD_ESIO0INTCR __reg16(PLD_BASE + 0x20008)
240#define PLD_ESIO0INTCR_TXIEN 0x0002
241#define PLD_ESIO0INTCR_RXCEN 0x0004
242#define PLD_ESIO0BAUR __reg16(PLD_BASE + 0x2000a)
243#define PLD_ESIO0TXB __reg16(PLD_BASE + 0x2000c)
244#define PLD_ESIO0RXB __reg16(PLD_BASE + 0x2000e)
245
246/* SIM Card */
247#define PLD_SCCR __reg16(PLD_BASE + 0x38000)
248#define PLD_SCMOD __reg16(PLD_BASE + 0x38004)
249#define PLD_SCSTS __reg16(PLD_BASE + 0x38006)
250#define PLD_SCINTCR __reg16(PLD_BASE + 0x38008)
251#define PLD_SCBAUR __reg16(PLD_BASE + 0x3800a)
252#define PLD_SCTXB __reg16(PLD_BASE + 0x3800c)
253#define PLD_SCRXB __reg16(PLD_BASE + 0x3800e)
254
255#endif /* _OPSPUT_OPSPUT_PLD.H */
diff --git a/arch/m32r/include/asm/page.h b/arch/m32r/include/asm/page.h
new file mode 100644
index 000000000000..c9333089fe11
--- /dev/null
+++ b/arch/m32r/include/asm/page.h
@@ -0,0 +1,87 @@
1#ifndef _ASM_M32R_PAGE_H
2#define _ASM_M32R_PAGE_H
3
4/* PAGE_SHIFT determines the page size */
5#define PAGE_SHIFT 12
6#define PAGE_SIZE (1UL << PAGE_SHIFT)
7#define PAGE_MASK (~(PAGE_SIZE-1))
8
9#ifndef __ASSEMBLY__
10
11extern void clear_page(void *to);
12extern void copy_page(void *to, void *from);
13
14#define clear_user_page(page, vaddr, pg) clear_page(page)
15#define copy_user_page(to, from, vaddr, pg) copy_page(to, from)
16
17#define __alloc_zeroed_user_highpage(movableflags, vma, vaddr) \
18 alloc_page_vma(GFP_HIGHUSER | __GFP_ZERO | movableflags, vma, vaddr)
19#define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE
20
21/*
22 * These are used to make use of C type-checking..
23 */
24typedef struct { unsigned long pte; } pte_t;
25typedef struct { unsigned long pmd; } pmd_t;
26typedef struct { unsigned long pgd; } pgd_t;
27#define pte_val(x) ((x).pte)
28#define PTE_MASK PAGE_MASK
29
30typedef struct { unsigned long pgprot; } pgprot_t;
31typedef struct page *pgtable_t;
32
33#define pmd_val(x) ((x).pmd)
34#define pgd_val(x) ((x).pgd)
35#define pgprot_val(x) ((x).pgprot)
36
37#define __pte(x) ((pte_t) { (x) } )
38#define __pmd(x) ((pmd_t) { (x) } )
39#define __pgd(x) ((pgd_t) { (x) } )
40#define __pgprot(x) ((pgprot_t) { (x) } )
41
42#endif /* !__ASSEMBLY__ */
43
44/*
45 * This handles the memory map.. We could make this a config
46 * option, but too many people screw it up, and too few need
47 * it.
48 *
49 * A __PAGE_OFFSET of 0xC0000000 means that the kernel has
50 * a virtual address space of one gigabyte, which limits the
51 * amount of physical memory you can use to about 950MB.
52 *
53 * If you want more physical memory than this then see the CONFIG_HIGHMEM4G
54 * and CONFIG_HIGHMEM64G options in the kernel configuration.
55 */
56
57#define __MEMORY_START CONFIG_MEMORY_START
58#define __MEMORY_SIZE CONFIG_MEMORY_SIZE
59
60#ifdef CONFIG_MMU
61#define __PAGE_OFFSET (0x80000000)
62#else
63#define __PAGE_OFFSET (0x00000000)
64#endif
65
66#define PAGE_OFFSET ((unsigned long)__PAGE_OFFSET)
67#define __pa(x) ((unsigned long)(x) - PAGE_OFFSET)
68#define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET))
69
70#ifndef CONFIG_DISCONTIGMEM
71#define PFN_BASE (CONFIG_MEMORY_START >> PAGE_SHIFT)
72#define ARCH_PFN_OFFSET PFN_BASE
73#define pfn_valid(pfn) (((pfn) - PFN_BASE) < max_mapnr)
74#endif /* !CONFIG_DISCONTIGMEM */
75
76#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
77#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
78
79#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
80 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC )
81
82#define devmem_is_allowed(x) 1
83
84#include <asm-generic/memory_model.h>
85#include <asm-generic/page.h>
86
87#endif /* _ASM_M32R_PAGE_H */
diff --git a/arch/m32r/include/asm/param.h b/arch/m32r/include/asm/param.h
new file mode 100644
index 000000000000..94c770196048
--- /dev/null
+++ b/arch/m32r/include/asm/param.h
@@ -0,0 +1,23 @@
1#ifndef _ASM_M32R_PARAM_H
2#define _ASM_M32R_PARAM_H
3
4#ifdef __KERNEL__
5# define HZ CONFIG_HZ /* Internal kernel timer frequency */
6# define USER_HZ 100 /* .. some user interfaces are in "ticks" */
7# define CLOCKS_PER_SEC (USER_HZ) /* like times() */
8#endif
9
10#ifndef HZ
11#define HZ 100
12#endif
13
14#define EXEC_PAGESIZE 4096
15
16#ifndef NOGROUP
17#define NOGROUP (-1)
18#endif
19
20#define MAXHOSTNAMELEN 64 /* max length of hostname */
21
22#endif /* _ASM_M32R_PARAM_H */
23
diff --git a/arch/m32r/include/asm/pci.h b/arch/m32r/include/asm/pci.h
new file mode 100644
index 000000000000..fe785d167db6
--- /dev/null
+++ b/arch/m32r/include/asm/pci.h
@@ -0,0 +1,8 @@
1#ifndef _ASM_M32R_PCI_H
2#define _ASM_M32R_PCI_H
3
4#include <asm-generic/pci.h>
5
6#define PCI_DMA_BUS_IS_PHYS (1)
7
8#endif /* _ASM_M32R_PCI_H */
diff --git a/arch/m32r/include/asm/percpu.h b/arch/m32r/include/asm/percpu.h
new file mode 100644
index 000000000000..e3169301fe66
--- /dev/null
+++ b/arch/m32r/include/asm/percpu.h
@@ -0,0 +1,6 @@
1#ifndef __ARCH_M32R_PERCPU__
2#define __ARCH_M32R_PERCPU__
3
4#include <asm-generic/percpu.h>
5
6#endif /* __ARCH_M32R_PERCPU__ */
diff --git a/arch/m32r/include/asm/pgalloc.h b/arch/m32r/include/asm/pgalloc.h
new file mode 100644
index 000000000000..f11a2b909cdb
--- /dev/null
+++ b/arch/m32r/include/asm/pgalloc.h
@@ -0,0 +1,76 @@
1#ifndef _ASM_M32R_PGALLOC_H
2#define _ASM_M32R_PGALLOC_H
3
4#include <linux/mm.h>
5
6#include <asm/io.h>
7
8#define pmd_populate_kernel(mm, pmd, pte) \
9 set_pmd(pmd, __pmd(_PAGE_TABLE + __pa(pte)))
10
11static __inline__ void pmd_populate(struct mm_struct *mm, pmd_t *pmd,
12 pgtable_t pte)
13{
14 set_pmd(pmd, __pmd(_PAGE_TABLE + page_to_phys(pte)));
15}
16#define pmd_pgtable(pmd) pmd_page(pmd)
17
18/*
19 * Allocate and free page tables.
20 */
21static __inline__ pgd_t *pgd_alloc(struct mm_struct *mm)
22{
23 pgd_t *pgd = (pgd_t *)__get_free_page(GFP_KERNEL|__GFP_ZERO);
24
25 return pgd;
26}
27
28static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)
29{
30 free_page((unsigned long)pgd);
31}
32
33static __inline__ pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
34 unsigned long address)
35{
36 pte_t *pte = (pte_t *)__get_free_page(GFP_KERNEL|__GFP_ZERO);
37
38 return pte;
39}
40
41static __inline__ pgtable_t pte_alloc_one(struct mm_struct *mm,
42 unsigned long address)
43{
44 struct page *pte = alloc_page(GFP_KERNEL|__GFP_ZERO);
45
46 pgtable_page_ctor(pte);
47 return pte;
48}
49
50static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
51{
52 free_page((unsigned long)pte);
53}
54
55static inline void pte_free(struct mm_struct *mm, pgtable_t pte)
56{
57 pgtable_page_dtor(pte);
58 __free_page(pte);
59}
60
61#define __pte_free_tlb(tlb, pte) pte_free((tlb)->mm, (pte))
62
63/*
64 * allocating and freeing a pmd is trivial: the 1-entry pmd is
65 * inside the pgd, so has no extra memory associated with it.
66 * (In the PAE case we free the pmds as part of the pgd.)
67 */
68
69#define pmd_alloc_one(mm, addr) ({ BUG(); ((pmd_t *)2); })
70#define pmd_free(mm, x) do { } while (0)
71#define __pmd_free_tlb(tlb, x) do { } while (0)
72#define pgd_populate(mm, pmd, pte) BUG()
73
74#define check_pgt_cache() do { } while (0)
75
76#endif /* _ASM_M32R_PGALLOC_H */
diff --git a/arch/m32r/include/asm/pgtable-2level.h b/arch/m32r/include/asm/pgtable-2level.h
new file mode 100644
index 000000000000..bca3475f9595
--- /dev/null
+++ b/arch/m32r/include/asm/pgtable-2level.h
@@ -0,0 +1,78 @@
1#ifndef _ASM_M32R_PGTABLE_2LEVEL_H
2#define _ASM_M32R_PGTABLE_2LEVEL_H
3#ifdef __KERNEL__
4
5/*
6 * traditional M32R two-level paging structure:
7 */
8
9#define PGDIR_SHIFT 22
10#define PTRS_PER_PGD 1024
11
12/*
13 * the M32R is two-level, so we don't really have any
14 * PMD directory physically.
15 */
16#define PMD_SHIFT 22
17#define PTRS_PER_PMD 1
18
19#define PTRS_PER_PTE 1024
20
21#define pte_ERROR(e) \
22 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
23#define pmd_ERROR(e) \
24 printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
25#define pgd_ERROR(e) \
26 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
27
28/*
29 * The "pgd_xxx()" functions here are trivial for a folded two-level
30 * setup: the pgd is never bad, and a pmd always exists (as it's folded
31 * into the pgd entry)
32 */
33static inline int pgd_none(pgd_t pgd) { return 0; }
34static inline int pgd_bad(pgd_t pgd) { return 0; }
35static inline int pgd_present(pgd_t pgd) { return 1; }
36#define pgd_clear(xp) do { } while (0)
37
38/*
39 * Certain architectures need to do special things when PTEs
40 * within a page table are directly modified. Thus, the following
41 * hook is made available.
42 */
43#define set_pte(pteptr, pteval) (*(pteptr) = pteval)
44#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
45
46/*
47 * (pmds are folded into pgds so this doesnt get actually called,
48 * but the define is needed for a generic inline function.)
49 */
50#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval)
51#define set_pgd(pgdptr, pgdval) (*(pgdptr) = pgdval)
52
53#define pgd_page_vaddr(pgd) \
54((unsigned long) __va(pgd_val(pgd) & PAGE_MASK))
55
56#ifndef CONFIG_DISCONTIGMEM
57#define pgd_page(pgd) (mem_map + ((pgd_val(pgd) >> PAGE_SHIFT) - PFN_BASE))
58#endif /* !CONFIG_DISCONTIGMEM */
59
60static inline pmd_t *pmd_offset(pgd_t * dir, unsigned long address)
61{
62 return (pmd_t *) dir;
63}
64
65#define ptep_get_and_clear(mm,addr,xp) __pte(xchg(&(xp)->pte, 0))
66#define pte_same(a, b) (pte_val(a) == pte_val(b))
67#define pte_page(x) pfn_to_page(pte_pfn(x))
68#define pte_none(x) (!pte_val(x))
69#define pte_pfn(x) (pte_val(x) >> PAGE_SHIFT)
70#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
71#define pfn_pmd(pfn, prot) __pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
72
73#define PTE_FILE_MAX_BITS 29
74#define pte_to_pgoff(pte) (((pte_val(pte) >> 2) & 0x7f) | (((pte_val(pte) >> 10)) << 7))
75#define pgoff_to_pte(off) ((pte_t) { (((off) & 0x7f) << 2) | (((off) >> 7) << 10) | _PAGE_FILE })
76
77#endif /* __KERNEL__ */
78#endif /* _ASM_M32R_PGTABLE_2LEVEL_H */
diff --git a/arch/m32r/include/asm/pgtable.h b/arch/m32r/include/asm/pgtable.h
new file mode 100644
index 000000000000..e6359c566b50
--- /dev/null
+++ b/arch/m32r/include/asm/pgtable.h
@@ -0,0 +1,363 @@
1#ifndef _ASM_M32R_PGTABLE_H
2#define _ASM_M32R_PGTABLE_H
3
4#include <asm-generic/4level-fixup.h>
5
6#ifdef __KERNEL__
7/*
8 * The Linux memory management assumes a three-level page table setup. On
9 * the M32R, we use that, but "fold" the mid level into the top-level page
10 * table, so that we physically have the same two-level page table as the
11 * M32R mmu expects.
12 *
13 * This file contains the functions and defines necessary to modify and use
14 * the M32R page table tree.
15 */
16
17/* CAUTION!: If you change macro definitions in this file, you might have to
18 * change arch/m32r/mmu.S manually.
19 */
20
21#ifndef __ASSEMBLY__
22
23#include <linux/threads.h>
24#include <linux/bitops.h>
25#include <asm/processor.h>
26#include <asm/addrspace.h>
27#include <asm/page.h>
28
29struct mm_struct;
30struct vm_area_struct;
31
32extern pgd_t swapper_pg_dir[1024];
33extern void paging_init(void);
34
35/*
36 * ZERO_PAGE is a global shared page that is always zero: used
37 * for zero-mapped memory areas etc..
38 */
39extern unsigned long empty_zero_page[1024];
40#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
41
42#endif /* !__ASSEMBLY__ */
43
44#ifndef __ASSEMBLY__
45#include <asm/pgtable-2level.h>
46#endif
47
48#define pgtable_cache_init() do { } while (0)
49
50#define PMD_SIZE (1UL << PMD_SHIFT)
51#define PMD_MASK (~(PMD_SIZE - 1))
52#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
53#define PGDIR_MASK (~(PGDIR_SIZE - 1))
54
55#define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE)
56#define FIRST_USER_ADDRESS 0
57
58#ifndef __ASSEMBLY__
59/* Just any arbitrary offset to the start of the vmalloc VM area: the
60 * current 8MB value just means that there will be a 8MB "hole" after the
61 * physical memory until the kernel virtual memory starts. That means that
62 * any out-of-bounds memory accesses will hopefully be caught.
63 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
64 * area for the same reason. ;)
65 */
66#define VMALLOC_START KSEG2
67#define VMALLOC_END KSEG3
68
69/*
70 * M32R TLB format
71 *
72 * [0] [1:19] [20:23] [24:31]
73 * +-----------------------+----+-------------+
74 * | VPN |0000| ASID |
75 * +-----------------------+----+-------------+
76 * +-+---------------------+----+-+---+-+-+-+-+
77 * |0 PPN |0000|N|AC |L|G|V| |
78 * +-+---------------------+----+-+---+-+-+-+-+
79 * RWX
80 */
81
82#define _PAGE_BIT_DIRTY 0 /* software: page changed */
83#define _PAGE_BIT_FILE 0 /* when !present: nonlinear file
84 mapping */
85#define _PAGE_BIT_PRESENT 1 /* Valid: page is valid */
86#define _PAGE_BIT_GLOBAL 2 /* Global */
87#define _PAGE_BIT_LARGE 3 /* Large */
88#define _PAGE_BIT_EXEC 4 /* Execute */
89#define _PAGE_BIT_WRITE 5 /* Write */
90#define _PAGE_BIT_READ 6 /* Read */
91#define _PAGE_BIT_NONCACHABLE 7 /* Non cachable */
92#define _PAGE_BIT_ACCESSED 8 /* software: page referenced */
93#define _PAGE_BIT_PROTNONE 9 /* software: if not present */
94
95#define _PAGE_DIRTY (1UL << _PAGE_BIT_DIRTY)
96#define _PAGE_FILE (1UL << _PAGE_BIT_FILE)
97#define _PAGE_PRESENT (1UL << _PAGE_BIT_PRESENT)
98#define _PAGE_GLOBAL (1UL << _PAGE_BIT_GLOBAL)
99#define _PAGE_LARGE (1UL << _PAGE_BIT_LARGE)
100#define _PAGE_EXEC (1UL << _PAGE_BIT_EXEC)
101#define _PAGE_WRITE (1UL << _PAGE_BIT_WRITE)
102#define _PAGE_READ (1UL << _PAGE_BIT_READ)
103#define _PAGE_NONCACHABLE (1UL << _PAGE_BIT_NONCACHABLE)
104#define _PAGE_ACCESSED (1UL << _PAGE_BIT_ACCESSED)
105#define _PAGE_PROTNONE (1UL << _PAGE_BIT_PROTNONE)
106
107#define _PAGE_TABLE \
108 ( _PAGE_PRESENT | _PAGE_WRITE | _PAGE_READ | _PAGE_ACCESSED \
109 | _PAGE_DIRTY )
110#define _KERNPG_TABLE \
111 ( _PAGE_PRESENT | _PAGE_WRITE | _PAGE_READ | _PAGE_ACCESSED \
112 | _PAGE_DIRTY )
113#define _PAGE_CHG_MASK \
114 ( PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY )
115
116#ifdef CONFIG_MMU
117#define PAGE_NONE \
118 __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
119#define PAGE_SHARED \
120 __pgprot(_PAGE_PRESENT | _PAGE_WRITE | _PAGE_READ | _PAGE_ACCESSED)
121#define PAGE_SHARED_EXEC \
122 __pgprot(_PAGE_PRESENT | _PAGE_EXEC | _PAGE_WRITE | _PAGE_READ \
123 | _PAGE_ACCESSED)
124#define PAGE_COPY \
125 __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_ACCESSED)
126#define PAGE_COPY_EXEC \
127 __pgprot(_PAGE_PRESENT | _PAGE_EXEC | _PAGE_READ | _PAGE_ACCESSED)
128#define PAGE_READONLY \
129 __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_ACCESSED)
130#define PAGE_READONLY_EXEC \
131 __pgprot(_PAGE_PRESENT | _PAGE_EXEC | _PAGE_READ | _PAGE_ACCESSED)
132
133#define __PAGE_KERNEL \
134 ( _PAGE_PRESENT | _PAGE_EXEC | _PAGE_WRITE | _PAGE_READ | _PAGE_DIRTY \
135 | _PAGE_ACCESSED )
136#define __PAGE_KERNEL_RO ( __PAGE_KERNEL & ~_PAGE_WRITE )
137#define __PAGE_KERNEL_NOCACHE ( __PAGE_KERNEL | _PAGE_NONCACHABLE)
138
139#define MAKE_GLOBAL(x) __pgprot((x) | _PAGE_GLOBAL)
140
141#define PAGE_KERNEL MAKE_GLOBAL(__PAGE_KERNEL)
142#define PAGE_KERNEL_RO MAKE_GLOBAL(__PAGE_KERNEL_RO)
143#define PAGE_KERNEL_NOCACHE MAKE_GLOBAL(__PAGE_KERNEL_NOCACHE)
144
145#else
146#define PAGE_NONE __pgprot(0)
147#define PAGE_SHARED __pgprot(0)
148#define PAGE_SHARED_EXEC __pgprot(0)
149#define PAGE_COPY __pgprot(0)
150#define PAGE_COPY_EXEC __pgprot(0)
151#define PAGE_READONLY __pgprot(0)
152#define PAGE_READONLY_EXEC __pgprot(0)
153
154#define PAGE_KERNEL __pgprot(0)
155#define PAGE_KERNEL_RO __pgprot(0)
156#define PAGE_KERNEL_NOCACHE __pgprot(0)
157#endif /* CONFIG_MMU */
158
159 /* xwr */
160#define __P000 PAGE_NONE
161#define __P001 PAGE_READONLY
162#define __P010 PAGE_COPY
163#define __P011 PAGE_COPY
164#define __P100 PAGE_READONLY_EXEC
165#define __P101 PAGE_READONLY_EXEC
166#define __P110 PAGE_COPY_EXEC
167#define __P111 PAGE_COPY_EXEC
168
169#define __S000 PAGE_NONE
170#define __S001 PAGE_READONLY
171#define __S010 PAGE_SHARED
172#define __S011 PAGE_SHARED
173#define __S100 PAGE_READONLY_EXEC
174#define __S101 PAGE_READONLY_EXEC
175#define __S110 PAGE_SHARED_EXEC
176#define __S111 PAGE_SHARED_EXEC
177
178/* page table for 0-4MB for everybody */
179
180#define pte_present(x) (pte_val(x) & (_PAGE_PRESENT | _PAGE_PROTNONE))
181#define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)
182
183#define pmd_none(x) (!pmd_val(x))
184#define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT)
185#define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0)
186#define pmd_bad(x) ((pmd_val(x) & ~PAGE_MASK) != _KERNPG_TABLE)
187
188#define pages_to_mb(x) ((x) >> (20 - PAGE_SHIFT))
189
190/*
191 * The following only work if pte_present() is true.
192 * Undefined behaviour if not..
193 */
194static inline int pte_dirty(pte_t pte)
195{
196 return pte_val(pte) & _PAGE_DIRTY;
197}
198
199static inline int pte_young(pte_t pte)
200{
201 return pte_val(pte) & _PAGE_ACCESSED;
202}
203
204static inline int pte_write(pte_t pte)
205{
206 return pte_val(pte) & _PAGE_WRITE;
207}
208
209/*
210 * The following only works if pte_present() is not true.
211 */
212static inline int pte_file(pte_t pte)
213{
214 return pte_val(pte) & _PAGE_FILE;
215}
216
217static inline int pte_special(pte_t pte)
218{
219 return 0;
220}
221
222static inline pte_t pte_mkclean(pte_t pte)
223{
224 pte_val(pte) &= ~_PAGE_DIRTY;
225 return pte;
226}
227
228static inline pte_t pte_mkold(pte_t pte)
229{
230 pte_val(pte) &= ~_PAGE_ACCESSED;
231 return pte;
232}
233
234static inline pte_t pte_wrprotect(pte_t pte)
235{
236 pte_val(pte) &= ~_PAGE_WRITE;
237 return pte;
238}
239
240static inline pte_t pte_mkdirty(pte_t pte)
241{
242 pte_val(pte) |= _PAGE_DIRTY;
243 return pte;
244}
245
246static inline pte_t pte_mkyoung(pte_t pte)
247{
248 pte_val(pte) |= _PAGE_ACCESSED;
249 return pte;
250}
251
252static inline pte_t pte_mkwrite(pte_t pte)
253{
254 pte_val(pte) |= _PAGE_WRITE;
255 return pte;
256}
257
258static inline pte_t pte_mkspecial(pte_t pte)
259{
260 return pte;
261}
262
263static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
264{
265 return test_and_clear_bit(_PAGE_BIT_ACCESSED, ptep);
266}
267
268static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
269{
270 clear_bit(_PAGE_BIT_WRITE, ptep);
271}
272
273/*
274 * Macro and implementation to make a page protection as uncachable.
275 */
276static inline pgprot_t pgprot_noncached(pgprot_t _prot)
277{
278 unsigned long prot = pgprot_val(_prot);
279
280 prot |= _PAGE_NONCACHABLE;
281 return __pgprot(prot);
282}
283
284#define pgprot_writecombine(prot) pgprot_noncached(prot)
285
286/*
287 * Conversion functions: convert a page and protection to a page entry,
288 * and a page entry and page directory to the page they refer to.
289 */
290#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), pgprot)
291
292static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
293{
294 set_pte(&pte, __pte((pte_val(pte) & _PAGE_CHG_MASK) \
295 | pgprot_val(newprot)));
296
297 return pte;
298}
299
300/*
301 * Conversion functions: convert a page and protection to a page entry,
302 * and a page entry and page directory to the page they refer to.
303 */
304
305static inline void pmd_set(pmd_t * pmdp, pte_t * ptep)
306{
307 pmd_val(*pmdp) = (((unsigned long) ptep) & PAGE_MASK);
308}
309
310#define pmd_page_vaddr(pmd) \
311 ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
312
313#ifndef CONFIG_DISCONTIGMEM
314#define pmd_page(pmd) (mem_map + ((pmd_val(pmd) >> PAGE_SHIFT) - PFN_BASE))
315#endif /* !CONFIG_DISCONTIGMEM */
316
317/* to find an entry in a page-table-directory. */
318#define pgd_index(address) \
319 (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
320
321#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
322
323/* to find an entry in a kernel page-table-directory */
324#define pgd_offset_k(address) pgd_offset(&init_mm, address)
325
326#define pmd_index(address) \
327 (((address) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
328
329#define pte_index(address) \
330 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
331#define pte_offset_kernel(dir, address) \
332 ((pte_t *)pmd_page_vaddr(*(dir)) + pte_index(address))
333#define pte_offset_map(dir, address) \
334 ((pte_t *)page_address(pmd_page(*(dir))) + pte_index(address))
335#define pte_offset_map_nested(dir, address) pte_offset_map(dir, address)
336#define pte_unmap(pte) do { } while (0)
337#define pte_unmap_nested(pte) do { } while (0)
338
339/* Encode and de-code a swap entry */
340#define __swp_type(x) (((x).val >> 2) & 0x1f)
341#define __swp_offset(x) ((x).val >> 10)
342#define __swp_entry(type, offset) \
343 ((swp_entry_t) { ((type) << 2) | ((offset) << 10) })
344#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
345#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
346
347#endif /* !__ASSEMBLY__ */
348
349/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
350#define kern_addr_valid(addr) (1)
351
352#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
353 remap_pfn_range(vma, vaddr, pfn, size, prot)
354
355#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
356#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
357#define __HAVE_ARCH_PTEP_SET_WRPROTECT
358#define __HAVE_ARCH_PTE_SAME
359#include <asm-generic/pgtable.h>
360
361#endif /* __KERNEL__ */
362
363#endif /* _ASM_M32R_PGTABLE_H */
diff --git a/arch/m32r/include/asm/poll.h b/arch/m32r/include/asm/poll.h
new file mode 100644
index 000000000000..c98509d3149e
--- /dev/null
+++ b/arch/m32r/include/asm/poll.h
@@ -0,0 +1 @@
#include <asm-generic/poll.h>
diff --git a/arch/m32r/include/asm/posix_types.h b/arch/m32r/include/asm/posix_types.h
new file mode 100644
index 000000000000..b309c5858637
--- /dev/null
+++ b/arch/m32r/include/asm/posix_types.h
@@ -0,0 +1,118 @@
1#ifndef _ASM_M32R_POSIX_TYPES_H
2#define _ASM_M32R_POSIX_TYPES_H
3
4/*
5 * This file is generally used by user-level software, so you need to
6 * be a little careful about namespace pollution etc. Also, we cannot
7 * assume GCC is being used.
8 */
9
10typedef unsigned long __kernel_ino_t;
11typedef unsigned short __kernel_mode_t;
12typedef unsigned short __kernel_nlink_t;
13typedef long __kernel_off_t;
14typedef int __kernel_pid_t;
15typedef unsigned short __kernel_ipc_pid_t;
16typedef unsigned short __kernel_uid_t;
17typedef unsigned short __kernel_gid_t;
18typedef unsigned int __kernel_size_t;
19typedef int __kernel_ssize_t;
20typedef int __kernel_ptrdiff_t;
21typedef long __kernel_time_t;
22typedef long __kernel_suseconds_t;
23typedef long __kernel_clock_t;
24typedef int __kernel_timer_t;
25typedef int __kernel_clockid_t;
26typedef int __kernel_daddr_t;
27typedef char * __kernel_caddr_t;
28typedef unsigned short __kernel_uid16_t;
29typedef unsigned short __kernel_gid16_t;
30typedef unsigned int __kernel_uid32_t;
31typedef unsigned int __kernel_gid32_t;
32
33typedef unsigned short __kernel_old_uid_t;
34typedef unsigned short __kernel_old_gid_t;
35typedef unsigned short __kernel_old_dev_t;
36
37#ifdef __GNUC__
38typedef long long __kernel_loff_t;
39#endif
40
41typedef struct {
42 int val[2];
43} __kernel_fsid_t;
44
45#if defined(__KERNEL__)
46
47#undef __FD_SET
48static __inline__ void __FD_SET(unsigned long __fd, __kernel_fd_set *__fdsetp)
49{
50 unsigned long __tmp = __fd / __NFDBITS;
51 unsigned long __rem = __fd % __NFDBITS;
52 __fdsetp->fds_bits[__tmp] |= (1UL<<__rem);
53}
54
55#undef __FD_CLR
56static __inline__ void __FD_CLR(unsigned long __fd, __kernel_fd_set *__fdsetp)
57{
58 unsigned long __tmp = __fd / __NFDBITS;
59 unsigned long __rem = __fd % __NFDBITS;
60 __fdsetp->fds_bits[__tmp] &= ~(1UL<<__rem);
61}
62
63
64#undef __FD_ISSET
65static __inline__ int __FD_ISSET(unsigned long __fd, const __kernel_fd_set *__p)
66{
67 unsigned long __tmp = __fd / __NFDBITS;
68 unsigned long __rem = __fd % __NFDBITS;
69 return (__p->fds_bits[__tmp] & (1UL<<__rem)) != 0;
70}
71
72/*
73 * This will unroll the loop for the normal constant case (8 ints,
74 * for a 256-bit fd_set)
75 */
76#undef __FD_ZERO
77static __inline__ void __FD_ZERO(__kernel_fd_set *__p)
78{
79 unsigned long *__tmp = __p->fds_bits;
80 int __i;
81
82 if (__builtin_constant_p(__FDSET_LONGS)) {
83 switch (__FDSET_LONGS) {
84 case 16:
85 __tmp[ 0] = 0; __tmp[ 1] = 0;
86 __tmp[ 2] = 0; __tmp[ 3] = 0;
87 __tmp[ 4] = 0; __tmp[ 5] = 0;
88 __tmp[ 6] = 0; __tmp[ 7] = 0;
89 __tmp[ 8] = 0; __tmp[ 9] = 0;
90 __tmp[10] = 0; __tmp[11] = 0;
91 __tmp[12] = 0; __tmp[13] = 0;
92 __tmp[14] = 0; __tmp[15] = 0;
93 return;
94
95 case 8:
96 __tmp[ 0] = 0; __tmp[ 1] = 0;
97 __tmp[ 2] = 0; __tmp[ 3] = 0;
98 __tmp[ 4] = 0; __tmp[ 5] = 0;
99 __tmp[ 6] = 0; __tmp[ 7] = 0;
100 return;
101
102 case 4:
103 __tmp[ 0] = 0; __tmp[ 1] = 0;
104 __tmp[ 2] = 0; __tmp[ 3] = 0;
105 return;
106 }
107 }
108 __i = __FDSET_LONGS;
109 while (__i) {
110 __i--;
111 *__tmp = 0;
112 __tmp++;
113 }
114}
115
116#endif /* defined(__KERNEL__) */
117
118#endif /* _ASM_M32R_POSIX_TYPES_H */
diff --git a/arch/m32r/include/asm/processor.h b/arch/m32r/include/asm/processor.h
new file mode 100644
index 000000000000..1a997fc148a2
--- /dev/null
+++ b/arch/m32r/include/asm/processor.h
@@ -0,0 +1,147 @@
1#ifndef _ASM_M32R_PROCESSOR_H
2#define _ASM_M32R_PROCESSOR_H
3
4/*
5 * include/asm-m32r/processor.h
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 *
11 * Copyright (C) 1994 Linus Torvalds
12 * Copyright (C) 2001 Hiroyuki Kondo, Hirokazu Takata, and Hitoshi Yamamoto
13 * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
14 */
15
16#include <linux/kernel.h>
17#include <asm/cache.h>
18#include <asm/ptrace.h> /* pt_regs */
19
20/*
21 * Default implementation of macro that returns current
22 * instruction pointer ("program counter").
23 */
24#define current_text_addr() ({ __label__ _l; _l: &&_l; })
25
26/*
27 * CPU type and hardware bug flags. Kept separately for each CPU.
28 * Members of this structure are referenced in head.S, so think twice
29 * before touching them. [mj]
30 */
31
32struct cpuinfo_m32r {
33 unsigned long pgtable_cache_sz;
34 unsigned long cpu_clock;
35 unsigned long bus_clock;
36 unsigned long timer_divide;
37 unsigned long loops_per_jiffy;
38};
39
40/*
41 * capabilities of CPUs
42 */
43
44extern struct cpuinfo_m32r boot_cpu_data;
45
46#ifdef CONFIG_SMP
47extern struct cpuinfo_m32r cpu_data[];
48#define current_cpu_data cpu_data[smp_processor_id()]
49#else
50#define cpu_data (&boot_cpu_data)
51#define current_cpu_data boot_cpu_data
52#endif
53
54/*
55 * User space process size: 2GB (default).
56 */
57#ifdef CONFIG_MMU
58#define TASK_SIZE (0x80000000UL)
59#else
60#define TASK_SIZE (0x00400000UL)
61#endif
62
63#ifdef __KERNEL__
64#define STACK_TOP TASK_SIZE
65#define STACK_TOP_MAX STACK_TOP
66#endif
67
68/* This decides where the kernel will search for a free chunk of vm
69 * space during mmap's.
70 */
71#define TASK_UNMAPPED_BASE PAGE_ALIGN(TASK_SIZE / 3)
72
73typedef struct {
74 unsigned long seg;
75} mm_segment_t;
76
77#define MAX_TRAPS 10
78
79struct debug_trap {
80 int nr_trap;
81 unsigned long addr[MAX_TRAPS];
82 unsigned long insn[MAX_TRAPS];
83};
84
85struct thread_struct {
86 unsigned long address;
87 unsigned long trap_no; /* Trap number */
88 unsigned long error_code; /* Error code of trap */
89 unsigned long lr; /* saved pc */
90 unsigned long sp; /* user stack pointer */
91 struct debug_trap debug_trap;
92};
93
94#define INIT_SP (sizeof(init_stack) + (unsigned long) &init_stack)
95
96#define INIT_THREAD { \
97 .sp = INIT_SP, \
98}
99
100/*
101 * Do necessary setup to start up a newly executed thread.
102 */
103
104/* User process Backup PSW */
105#define USERPS_BPSW (M32R_PSW_BSM|M32R_PSW_BIE|M32R_PSW_BPM)
106
107#define start_thread(regs, new_pc, new_spu) \
108 do { \
109 set_fs(USER_DS); \
110 regs->psw = (regs->psw | USERPS_BPSW) & 0x0000FFFFUL; \
111 regs->bpc = new_pc; \
112 regs->spu = new_spu; \
113 } while (0)
114
115/* Forward declaration, a strange C thing */
116struct task_struct;
117struct mm_struct;
118
119/* Free all resources held by a thread. */
120extern void release_thread(struct task_struct *);
121
122#define prepare_to_copy(tsk) do { } while (0)
123
124/*
125 * create a kernel thread without removing it from tasklists
126 */
127extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
128
129/* Copy and release all segment info associated with a VM */
130extern void copy_segments(struct task_struct *p, struct mm_struct * mm);
131extern void release_segments(struct mm_struct * mm);
132
133extern unsigned long thread_saved_pc(struct task_struct *);
134
135/* Copy and release all segment info associated with a VM */
136#define copy_segments(p, mm) do { } while (0)
137#define release_segments(mm) do { } while (0)
138
139unsigned long get_wchan(struct task_struct *p);
140#define KSTK_EIP(tsk) ((tsk)->thread.lr)
141#define KSTK_ESP(tsk) ((tsk)->thread.sp)
142
143#define THREAD_SIZE (2*PAGE_SIZE)
144
145#define cpu_relax() barrier()
146
147#endif /* _ASM_M32R_PROCESSOR_H */
diff --git a/arch/m32r/include/asm/ptrace.h b/arch/m32r/include/asm/ptrace.h
new file mode 100644
index 000000000000..a0755b982028
--- /dev/null
+++ b/arch/m32r/include/asm/ptrace.h
@@ -0,0 +1,148 @@
1#ifndef _ASM_M32R_PTRACE_H
2#define _ASM_M32R_PTRACE_H
3
4/*
5 * linux/include/asm-m32r/ptrace.h
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 *
11 * M32R version:
12 * Copyright (C) 2001-2002, 2004 Hirokazu Takata <takata at linux-m32r.org>
13 */
14
15/* 0 - 13 are integer registers (general purpose registers). */
16#define PT_R4 0
17#define PT_R5 1
18#define PT_R6 2
19#define PT_REGS 3
20#define PT_R0 4
21#define PT_R1 5
22#define PT_R2 6
23#define PT_R3 7
24#define PT_R7 8
25#define PT_R8 9
26#define PT_R9 10
27#define PT_R10 11
28#define PT_R11 12
29#define PT_R12 13
30#define PT_SYSCNR 14
31#define PT_R13 PT_FP
32#define PT_R14 PT_LR
33#define PT_R15 PT_SP
34
35/* processor status and miscellaneous context registers. */
36#define PT_ACC0H 15
37#define PT_ACC0L 16
38#define PT_ACC1H 17 /* ISA_DSP_LEVEL2 only */
39#define PT_ACC1L 18 /* ISA_DSP_LEVEL2 only */
40#define PT_PSW 19
41#define PT_BPC 20
42#define PT_BBPSW 21
43#define PT_BBPC 22
44#define PT_SPU 23
45#define PT_FP 24
46#define PT_LR 25
47#define PT_SPI 26
48#define PT_ORIGR0 27
49
50/* virtual pt_reg entry for gdb */
51#define PT_PC 30
52#define PT_CBR 31
53#define PT_EVB 32
54
55
56/* Control registers. */
57#define SPR_CR0 PT_PSW
58#define SPR_CR1 PT_CBR /* read only */
59#define SPR_CR2 PT_SPI
60#define SPR_CR3 PT_SPU
61#define SPR_CR4
62#define SPR_CR5 PT_EVB /* part of M32R/E, M32R/I core only */
63#define SPR_CR6 PT_BPC
64#define SPR_CR7
65#define SPR_CR8 PT_BBPSW
66#define SPR_CR9
67#define SPR_CR10
68#define SPR_CR11
69#define SPR_CR12
70#define SPR_CR13 PT_WR
71#define SPR_CR14 PT_BBPC
72#define SPR_CR15
73
74/* this struct defines the way the registers are stored on the
75 stack during a system call. */
76struct pt_regs {
77 /* Saved main processor registers. */
78 unsigned long r4;
79 unsigned long r5;
80 unsigned long r6;
81 struct pt_regs *pt_regs;
82 unsigned long r0;
83 unsigned long r1;
84 unsigned long r2;
85 unsigned long r3;
86 unsigned long r7;
87 unsigned long r8;
88 unsigned long r9;
89 unsigned long r10;
90 unsigned long r11;
91 unsigned long r12;
92 long syscall_nr;
93
94 /* Saved main processor status and miscellaneous context registers. */
95 unsigned long acc0h;
96 unsigned long acc0l;
97 unsigned long acc1h; /* ISA_DSP_LEVEL2 only */
98 unsigned long acc1l; /* ISA_DSP_LEVEL2 only */
99 unsigned long psw;
100 unsigned long bpc; /* saved PC for TRAP syscalls */
101 unsigned long bbpsw;
102 unsigned long bbpc;
103 unsigned long spu; /* saved user stack */
104 unsigned long fp;
105 unsigned long lr; /* saved PC for JL syscalls */
106 unsigned long spi; /* saved kernel stack */
107 unsigned long orig_r0;
108};
109
110/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
111#define PTRACE_GETREGS 12
112#define PTRACE_SETREGS 13
113
114#define PTRACE_OLDSETOPTIONS 21
115
116/* options set using PTRACE_SETOPTIONS */
117#define PTRACE_O_TRACESYSGOOD 0x00000001
118
119#ifdef __KERNEL__
120
121#include <asm/m32r.h> /* M32R_PSW_BSM, M32R_PSW_BPM */
122
123struct task_struct;
124extern void init_debug_traps(struct task_struct *);
125#define arch_ptrace_attach(child) \
126 init_debug_traps(child)
127
128#if defined(CONFIG_ISA_M32R2) || defined(CONFIG_CHIP_VDEC2)
129#define user_mode(regs) ((M32R_PSW_BPM & (regs)->psw) != 0)
130#elif defined(CONFIG_ISA_M32R)
131#define user_mode(regs) ((M32R_PSW_BSM & (regs)->psw) != 0)
132#else
133#error unknown isa configuration
134#endif
135
136#define instruction_pointer(regs) ((regs)->bpc)
137#define profile_pc(regs) instruction_pointer(regs)
138
139extern void show_regs(struct pt_regs *);
140
141extern void withdraw_debug_trap(struct pt_regs *regs);
142
143#define task_pt_regs(task) \
144 ((struct pt_regs *)(task_stack_page(task) + THREAD_SIZE) - 1)
145
146#endif /* __KERNEL */
147
148#endif /* _ASM_M32R_PTRACE_H */
diff --git a/arch/m32r/include/asm/resource.h b/arch/m32r/include/asm/resource.h
new file mode 100644
index 000000000000..b1ce766e37a0
--- /dev/null
+++ b/arch/m32r/include/asm/resource.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_M32R_RESOURCE_H
2#define _ASM_M32R_RESOURCE_H
3
4#include <asm-generic/resource.h>
5
6#endif /* _ASM_M32R_RESOURCE_H */
diff --git a/arch/m32r/include/asm/rtc.h b/arch/m32r/include/asm/rtc.h
new file mode 100644
index 000000000000..0340633f3f4d
--- /dev/null
+++ b/arch/m32r/include/asm/rtc.h
@@ -0,0 +1,65 @@
1#ifndef __RTC_H__
2#define __RTC_H__
3
4 /* Dallas DS1302 clock/calendar register numbers. */
5# define RTC_SECONDS 0
6# define RTC_MINUTES 1
7# define RTC_HOURS 2
8# define RTC_DAY_OF_MONTH 3
9# define RTC_MONTH 4
10# define RTC_WEEKDAY 5
11# define RTC_YEAR 6
12# define RTC_CONTROL 7
13
14 /* Bits in CONTROL register. */
15# define RTC_CONTROL_WRITEPROTECT 0x80
16# define RTC_TRICKLECHARGER 8
17
18 /* Bits in TRICKLECHARGER register TCS TCS TCS TCS DS DS RS RS. */
19# define RTC_TCR_PATTERN 0xA0 /* 1010xxxx */
20# define RTC_TCR_1DIOD 0x04 /* xxxx01xx */
21# define RTC_TCR_2DIOD 0x08 /* xxxx10xx */
22# define RTC_TCR_DISABLED 0x00 /* xxxxxx00 Disabled */
23# define RTC_TCR_2KOHM 0x01 /* xxxxxx01 2KOhm */
24# define RTC_TCR_4KOHM 0x02 /* xxxxxx10 4kOhm */
25# define RTC_TCR_8KOHM 0x03 /* xxxxxx11 8kOhm */
26
27#ifdef CONFIG_DS1302
28extern unsigned char ds1302_readreg(int reg);
29extern void ds1302_writereg(int reg, unsigned char val);
30extern int ds1302_init(void);
31# define CMOS_READ(x) ds1302_readreg(x)
32# define CMOS_WRITE(val,reg) ds1302_writereg(reg,val)
33# define RTC_INIT() ds1302_init()
34#else
35 /* No RTC configured so we shouldn't try to access any. */
36# define CMOS_READ(x) 42
37# define CMOS_WRITE(x,y)
38# define RTC_INIT() (-1)
39#endif
40
41/*
42 * The struct used to pass data via the following ioctl. Similar to the
43 * struct tm in <time.h>, but it needs to be here so that the kernel
44 * source is self contained, allowing cross-compiles, etc. etc.
45 */
46struct rtc_time {
47 int tm_sec;
48 int tm_min;
49 int tm_hour;
50 int tm_mday;
51 int tm_mon;
52 int tm_year;
53 int tm_wday;
54 int tm_yday;
55 int tm_isdst;
56};
57
58/* ioctl() calls that are permitted to the /dev/rtc interface. */
59#define RTC_MAGIC 'p'
60#define RTC_RD_TIME _IOR(RTC_MAGIC, 0x09, struct rtc_time) /* Read RTC time. */
61#define RTC_SET_TIME _IOW(RTC_MAGIC, 0x0a, struct rtc_time) /* Set RTC time. */
62#define RTC_SET_CHARGE _IOW(RTC_MAGIC, 0x0b, int)
63#define RTC_MAX_IOCTL 0x0b
64
65#endif /* __RTC_H__ */
diff --git a/arch/m32r/include/asm/s1d13806.h b/arch/m32r/include/asm/s1d13806.h
new file mode 100644
index 000000000000..248d36a82d79
--- /dev/null
+++ b/arch/m32r/include/asm/s1d13806.h
@@ -0,0 +1,199 @@
1//----------------------------------------------------------------------------
2//
3// File generated by S1D13806CFG.EXE
4//
5// Copyright (c) 2000,2001 Epson Research and Development, Inc.
6// All rights reserved.
7//
8//----------------------------------------------------------------------------
9
10// Panel: (active) 640x480 77Hz STN Single 8-bit (PCLK=CLKI=25.175MHz)
11// Memory: Embedded SDRAM (MCLK=CLKI3=50.000MHz) (BUSCLK=33.333MHz)
12
13#define SWIVEL_VIEW 0 /* 0:none, 1:90 not completed */
14
15static struct s1d13xxxfb_regval s1d13xxxfb_initregs[] = {
16
17 {0x0001,0x00}, // Miscellaneous Register
18 {0x01FC,0x00}, // Display Mode Register
19#if defined(CONFIG_PLAT_MAPPI)
20 {0x0004,0x00}, // General IO Pins Configuration Register 0
21 {0x0005,0x00}, // General IO Pins Configuration Register 1
22 {0x0008,0x00}, // General IO Pins Control Register 0
23 {0x0009,0x00}, // General IO Pins Control Register 1
24 {0x0010,0x00}, // Memory Clock Configuration Register
25 {0x0014,0x00}, // LCD Pixel Clock Configuration Register
26 {0x0018,0x00}, // CRT/TV Pixel Clock Configuration Register
27 {0x001C,0x00}, // MediaPlug Clock Configuration Register
28/*
29 * .. 10MHz: 0x00
30 * .. 30MHz: 0x01
31 * 30MHz ..: 0x02
32 */
33 {0x001E,0x02}, // CPU To Memory Wait State Select Register
34 {0x0021,0x02}, // DRAM Refresh Rate Register
35 {0x002A,0x11}, // DRAM Timings Control Register 0
36 {0x002B,0x13}, // DRAM Timings Control Register 1
37 {0x0020,0x80}, // Memory Configuration Register
38 {0x0030,0x25}, // Panel Type Register
39 {0x0031,0x00}, // MOD Rate Register
40 {0x0032,0x4F}, // LCD Horizontal Display Width Register
41 {0x0034,0x12}, // LCD Horizontal Non-Display Period Register
42 {0x0035,0x01}, // TFT FPLINE Start Position Register
43 {0x0036,0x0B}, // TFT FPLINE Pulse Width Register
44 {0x0038,0xDF}, // LCD Vertical Display Height Register 0
45 {0x0039,0x01}, // LCD Vertical Display Height Register 1
46 {0x003A,0x2C}, // LCD Vertical Non-Display Period Register
47 {0x003B,0x0A}, // TFT FPFRAME Start Position Register
48 {0x003C,0x01}, // TFT FPFRAME Pulse Width Register
49
50 {0x0041,0x00}, // LCD Miscellaneous Register
51 {0x0042,0x00}, // LCD Display Start Address Register 0
52 {0x0043,0x00}, // LCD Display Start Address Register 1
53 {0x0044,0x00}, // LCD Display Start Address Register 2
54
55#elif defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_OPSPUT) || defined(CONFIG_PLAT_MAPPI3)
56 {0x0004,0x07}, // GPIO[0:7] direction
57 {0x0005,0x00}, // GPIO[8:12] direction
58 {0x0008,0x00}, // GPIO[0:7] data
59 {0x0009,0x00}, // GPIO[8:12] data
60 {0x0008,0x04}, // LCD panel Vcc on
61 {0x0008,0x05}, // LCD panel reset
62 {0x0010,0x01}, // Memory Clock Configuration Register
63 {0x0014,0x30}, // LCD Pixel Clock Configuration Register (CLKI 22MHz/4)
64 {0x0018,0x00}, // CRT/TV Pixel Clock Configuration Register
65 {0x001C,0x00}, // MediaPlug Clock Configuration Register(10MHz)
66 {0x001E,0x00}, // CPU To Memory Wait State Select Register
67 {0x0020,0x80}, // Memory Configuration Register
68 {0x0021,0x03}, // DRAM Refresh Rate Register
69 {0x002A,0x00}, // DRAM Timings Control Register 0
70 {0x002B,0x01}, // DRAM Timings Control Register 1
71 {0x0030,0x25}, // Panel Type Register
72 {0x0031,0x00}, // MOD Rate Register
73 {0x0032,0x1d}, // LCD Horizontal Display Width Register
74 {0x0034,0x05}, // LCD Horizontal Non-Display Period Register
75 {0x0035,0x01}, // TFT FPLINE Start Position Register
76 {0x0036,0x01}, // TFT FPLINE Pulse Width Register
77 {0x0038,0x3F}, // LCD Vertical Display Height Register 0
78 {0x0039,0x01}, // LCD Vertical Display Height Register 1
79 {0x003A,0x0b}, // LCD Vertical Non-Display Period Register
80 {0x003B,0x07}, // TFT FPFRAME Start Position Register
81 {0x003C,0x02}, // TFT FPFRAME Pulse Width Register
82
83 {0x0041,0x00}, // LCD Miscellaneous Register
84#if (SWIVEL_VIEW == 0)
85 {0x0042,0x00}, // LCD Display Start Address Register 0
86 {0x0043,0x00}, // LCD Display Start Address Register 1
87 {0x0044,0x00}, // LCD Display Start Address Register 2
88
89#elif (SWIVEL_VIEW == 1)
90 // 1024 - W(320) = 0x2C0
91 {0x0042,0xC0}, // LCD Display Start Address Register 0
92 {0x0043,0x02}, // LCD Display Start Address Register 1
93 {0x0044,0x00}, // LCD Display Start Address Register 2
94 // 1024
95 {0x0046,0x00}, // LCD Memory Address Offset Register 0
96 {0x0047,0x02}, // LCD Memory Address Offset Register 1
97#else
98#error unsupported SWIVEL_VIEW mode
99#endif
100#else
101#error no platform configuration
102#endif /* CONFIG_PLAT_XXX */
103
104 {0x0048,0x00}, // LCD Pixel Panning Register
105 {0x004A,0x00}, // LCD Display FIFO High Threshold Control Register
106 {0x004B,0x00}, // LCD Display FIFO Low Threshold Control Register
107 {0x0050,0x4F}, // CRT/TV Horizontal Display Width Register
108 {0x0052,0x13}, // CRT/TV Horizontal Non-Display Period Register
109 {0x0053,0x01}, // CRT/TV HRTC Start Position Register
110 {0x0054,0x0B}, // CRT/TV HRTC Pulse Width Register
111 {0x0056,0xDF}, // CRT/TV Vertical Display Height Register 0
112 {0x0057,0x01}, // CRT/TV Vertical Display Height Register 1
113 {0x0058,0x2B}, // CRT/TV Vertical Non-Display Period Register
114 {0x0059,0x09}, // CRT/TV VRTC Start Position Register
115 {0x005A,0x01}, // CRT/TV VRTC Pulse Width Register
116 {0x005B,0x10}, // TV Output Control Register
117
118 {0x0062,0x00}, // CRT/TV Display Start Address Register 0
119 {0x0063,0x00}, // CRT/TV Display Start Address Register 1
120 {0x0064,0x00}, // CRT/TV Display Start Address Register 2
121
122 {0x0068,0x00}, // CRT/TV Pixel Panning Register
123 {0x006A,0x00}, // CRT/TV Display FIFO High Threshold Control Register
124 {0x006B,0x00}, // CRT/TV Display FIFO Low Threshold Control Register
125 {0x0070,0x00}, // LCD Ink/Cursor Control Register
126 {0x0071,0x01}, // LCD Ink/Cursor Start Address Register
127 {0x0072,0x00}, // LCD Cursor X Position Register 0
128 {0x0073,0x00}, // LCD Cursor X Position Register 1
129 {0x0074,0x00}, // LCD Cursor Y Position Register 0
130 {0x0075,0x00}, // LCD Cursor Y Position Register 1
131 {0x0076,0x00}, // LCD Ink/Cursor Blue Color 0 Register
132 {0x0077,0x00}, // LCD Ink/Cursor Green Color 0 Register
133 {0x0078,0x00}, // LCD Ink/Cursor Red Color 0 Register
134 {0x007A,0x1F}, // LCD Ink/Cursor Blue Color 1 Register
135 {0x007B,0x3F}, // LCD Ink/Cursor Green Color 1 Register
136 {0x007C,0x1F}, // LCD Ink/Cursor Red Color 1 Register
137 {0x007E,0x00}, // LCD Ink/Cursor FIFO Threshold Register
138 {0x0080,0x00}, // CRT/TV Ink/Cursor Control Register
139 {0x0081,0x01}, // CRT/TV Ink/Cursor Start Address Register
140 {0x0082,0x00}, // CRT/TV Cursor X Position Register 0
141 {0x0083,0x00}, // CRT/TV Cursor X Position Register 1
142 {0x0084,0x00}, // CRT/TV Cursor Y Position Register 0
143 {0x0085,0x00}, // CRT/TV Cursor Y Position Register 1
144 {0x0086,0x00}, // CRT/TV Ink/Cursor Blue Color 0 Register
145 {0x0087,0x00}, // CRT/TV Ink/Cursor Green Color 0 Register
146 {0x0088,0x00}, // CRT/TV Ink/Cursor Red Color 0 Register
147 {0x008A,0x1F}, // CRT/TV Ink/Cursor Blue Color 1 Register
148 {0x008B,0x3F}, // CRT/TV Ink/Cursor Green Color 1 Register
149 {0x008C,0x1F}, // CRT/TV Ink/Cursor Red Color 1 Register
150 {0x008E,0x00}, // CRT/TV Ink/Cursor FIFO Threshold Register
151 {0x0100,0x00}, // BitBlt Control Register 0
152 {0x0101,0x00}, // BitBlt Control Register 1
153 {0x0102,0x00}, // BitBlt ROP Code/Color Expansion Register
154 {0x0103,0x00}, // BitBlt Operation Register
155 {0x0104,0x00}, // BitBlt Source Start Address Register 0
156 {0x0105,0x00}, // BitBlt Source Start Address Register 1
157 {0x0106,0x00}, // BitBlt Source Start Address Register 2
158 {0x0108,0x00}, // BitBlt Destination Start Address Register 0
159 {0x0109,0x00}, // BitBlt Destination Start Address Register 1
160 {0x010A,0x00}, // BitBlt Destination Start Address Register 2
161 {0x010C,0x00}, // BitBlt Memory Address Offset Register 0
162 {0x010D,0x00}, // BitBlt Memory Address Offset Register 1
163 {0x0110,0x00}, // BitBlt Width Register 0
164 {0x0111,0x00}, // BitBlt Width Register 1
165 {0x0112,0x00}, // BitBlt Height Register 0
166 {0x0113,0x00}, // BitBlt Height Register 1
167 {0x0114,0x00}, // BitBlt Background Color Register 0
168 {0x0115,0x00}, // BitBlt Background Color Register 1
169 {0x0118,0x00}, // BitBlt Foreground Color Register 0
170 {0x0119,0x00}, // BitBlt Foreground Color Register 1
171 {0x01E0,0x00}, // Look-Up Table Mode Register
172 {0x01E2,0x00}, // Look-Up Table Address Register
173 {0x01F0,0x10}, // Power Save Configuration Register
174 {0x01F1,0x00}, // Power Save Status Register
175 {0x01F4,0x00}, // CPU-to-Memory Access Watchdog Timer Register
176#if (SWIVEL_VIEW == 0)
177 {0x01FC,0x01}, // Display Mode Register(0x01:LCD, 0x02:CRT, 0x03:LCD&CRT)
178#elif (SWIVEL_VIEW == 1)
179 {0x01FC,0x41}, // Display Mode Register(0x01:LCD, 0x02:CRT, 0x03:LCD&CRT)
180#else
181#error unsupported SWIVEL_VIEW mode
182#endif /* SWIVEL_VIEW */
183
184#if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_OPSPUT) || defined(CONFIG_PLAT_MAPPI3)
185 {0x0008,0x07}, // LCD panel Vdd & Vg on
186#endif
187
188 {0x0040,0x05}, // LCD Display Mode Register (2:4bpp,3:8bpp,5:16bpp)
189#if defined(CONFIG_PLAT_MAPPI)
190 {0x0046,0x80}, // LCD Memory Address Offset Register 0
191 {0x0047,0x02}, // LCD Memory Address Offset Register 1
192#elif defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_OPSPUT) || defined(CONFIG_PLAT_MAPPI3)
193 {0x0046,0xf0}, // LCD Memory Address Offset Register 0
194 {0x0047,0x00}, // LCD Memory Address Offset Register 1
195#endif
196 {0x0060,0x05}, // CRT/TV Display Mode Register (2:4bpp,3:8bpp,5:16bpp)
197 {0x0066,0x80}, // CRT/TV Memory Address Offset Register 0 // takeo
198 {0x0067,0x02}, // CRT/TV Memory Address Offset Register 1
199};
diff --git a/arch/m32r/include/asm/scatterlist.h b/arch/m32r/include/asm/scatterlist.h
new file mode 100644
index 000000000000..1ed372c73d0b
--- /dev/null
+++ b/arch/m32r/include/asm/scatterlist.h
@@ -0,0 +1,21 @@
1#ifndef _ASM_M32R_SCATTERLIST_H
2#define _ASM_M32R_SCATTERLIST_H
3
4#include <asm/types.h>
5
6struct scatterlist {
7#ifdef CONFIG_DEBUG_SG
8 unsigned long sg_magic;
9#endif
10 char * address; /* Location data is to be transferred to, NULL for
11 * highmem page */
12 unsigned long page_link;
13 unsigned int offset;/* for highmem, page offset */
14
15 dma_addr_t dma_address;
16 unsigned int length;
17};
18
19#define ISA_DMA_THRESHOLD (0x1fffffff)
20
21#endif /* _ASM_M32R_SCATTERLIST_H */
diff --git a/arch/m32r/include/asm/sections.h b/arch/m32r/include/asm/sections.h
new file mode 100644
index 000000000000..5e5d21c4908a
--- /dev/null
+++ b/arch/m32r/include/asm/sections.h
@@ -0,0 +1,7 @@
1#ifndef _M32R_SECTIONS_H
2#define _M32R_SECTIONS_H
3
4/* nothing to see, move along */
5#include <asm-generic/sections.h>
6
7#endif /* _M32R_SECTIONS_H */
diff --git a/arch/m32r/include/asm/segment.h b/arch/m32r/include/asm/segment.h
new file mode 100644
index 000000000000..42b11aeb3249
--- /dev/null
+++ b/arch/m32r/include/asm/segment.h
@@ -0,0 +1,10 @@
1#ifndef _ASM_M32R_SEGMENT_H
2#define _ASM_M32R_SEGMENT_H
3
4#define __KERNEL_CS 0x10
5#define __KERNEL_DS 0x18
6
7#define __USER_CS 0x23
8#define __USER_DS 0x2B
9
10#endif /* _ASM_M32R_SEGMENT_H */
diff --git a/arch/m32r/include/asm/sembuf.h b/arch/m32r/include/asm/sembuf.h
new file mode 100644
index 000000000000..c9873d6890e2
--- /dev/null
+++ b/arch/m32r/include/asm/sembuf.h
@@ -0,0 +1,25 @@
1#ifndef _ASM_M32R_SEMBUF_H
2#define _ASM_M32R_SEMBUF_H
3
4/*
5 * The semid64_ds structure for m32r architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct semid64_ds {
15 struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
16 __kernel_time_t sem_otime; /* last semop time */
17 unsigned long __unused1;
18 __kernel_time_t sem_ctime; /* last change time */
19 unsigned long __unused2;
20 unsigned long sem_nsems; /* no. of semaphores in array */
21 unsigned long __unused3;
22 unsigned long __unused4;
23};
24
25#endif /* _ASM_M32R_SEMBUF_H */
diff --git a/arch/m32r/include/asm/serial.h b/arch/m32r/include/asm/serial.h
new file mode 100644
index 000000000000..5ac244c72f15
--- /dev/null
+++ b/arch/m32r/include/asm/serial.h
@@ -0,0 +1,9 @@
1#ifndef _ASM_M32R_SERIAL_H
2#define _ASM_M32R_SERIAL_H
3
4/* include/asm-m32r/serial.h */
5
6
7#define BASE_BAUD 115200
8
9#endif /* _ASM_M32R_SERIAL_H */
diff --git a/arch/m32r/include/asm/setup.h b/arch/m32r/include/asm/setup.h
new file mode 100644
index 000000000000..c637ab992394
--- /dev/null
+++ b/arch/m32r/include/asm/setup.h
@@ -0,0 +1,38 @@
1#ifndef _ASM_M32R_SETUP_H
2#define _ASM_M32R_SETUP_H
3
4/*
5 * This is set up by the setup-routine at boot-time
6 */
7
8#define COMMAND_LINE_SIZE 512
9
10#ifdef __KERNEL__
11
12#define PARAM ((unsigned char *)empty_zero_page)
13
14#define MOUNT_ROOT_RDONLY (*(unsigned long *) (PARAM+0x000))
15#define RAMDISK_FLAGS (*(unsigned long *) (PARAM+0x004))
16#define ORIG_ROOT_DEV (*(unsigned long *) (PARAM+0x008))
17#define LOADER_TYPE (*(unsigned long *) (PARAM+0x00c))
18#define INITRD_START (*(unsigned long *) (PARAM+0x010))
19#define INITRD_SIZE (*(unsigned long *) (PARAM+0x014))
20
21#define M32R_CPUCLK (*(unsigned long *) (PARAM+0x018))
22#define M32R_BUSCLK (*(unsigned long *) (PARAM+0x01c))
23#define M32R_TIMER_DIVIDE (*(unsigned long *) (PARAM+0x020))
24
25#define COMMAND_LINE ((char *) (PARAM+0x100))
26
27#define SCREEN_INFO (*(struct screen_info *) (PARAM+0x200))
28
29#define RAMDISK_IMAGE_START_MASK (0x07FF)
30#define RAMDISK_PROMPT_FLAG (0x8000)
31#define RAMDISK_LOAD_FLAG (0x4000)
32
33extern unsigned long memory_start;
34extern unsigned long memory_end;
35
36#endif /* __KERNEL__ */
37
38#endif /* _ASM_M32R_SETUP_H */
diff --git a/arch/m32r/include/asm/shmbuf.h b/arch/m32r/include/asm/shmbuf.h
new file mode 100644
index 000000000000..b0cdf0aa7d65
--- /dev/null
+++ b/arch/m32r/include/asm/shmbuf.h
@@ -0,0 +1,42 @@
1#ifndef _ASM_M32R_SHMBUF_H
2#define _ASM_M32R_SHMBUF_H
3
4/*
5 * The shmid64_ds structure for M32R architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct shmid64_ds {
15 struct ipc64_perm shm_perm; /* operation perms */
16 size_t shm_segsz; /* size of segment (bytes) */
17 __kernel_time_t shm_atime; /* last attach time */
18 unsigned long __unused1;
19 __kernel_time_t shm_dtime; /* last detach time */
20 unsigned long __unused2;
21 __kernel_time_t shm_ctime; /* last change time */
22 unsigned long __unused3;
23 __kernel_pid_t shm_cpid; /* pid of creator */
24 __kernel_pid_t shm_lpid; /* pid of last operator */
25 unsigned long shm_nattch; /* no. of current attaches */
26 unsigned long __unused4;
27 unsigned long __unused5;
28};
29
30struct shminfo64 {
31 unsigned long shmmax;
32 unsigned long shmmin;
33 unsigned long shmmni;
34 unsigned long shmseg;
35 unsigned long shmall;
36 unsigned long __unused1;
37 unsigned long __unused2;
38 unsigned long __unused3;
39 unsigned long __unused4;
40};
41
42#endif /* _ASM_M32R_SHMBUF_H */
diff --git a/arch/m32r/include/asm/shmparam.h b/arch/m32r/include/asm/shmparam.h
new file mode 100644
index 000000000000..35986d81a528
--- /dev/null
+++ b/arch/m32r/include/asm/shmparam.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_M32R_SHMPARAM_H
2#define _ASM_M32R_SHMPARAM_H
3
4#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
5
6#endif /* _ASM_M32R_SHMPARAM_H */
diff --git a/arch/m32r/include/asm/sigcontext.h b/arch/m32r/include/asm/sigcontext.h
new file mode 100644
index 000000000000..da4a9c36d09b
--- /dev/null
+++ b/arch/m32r/include/asm/sigcontext.h
@@ -0,0 +1,39 @@
1#ifndef _ASM_M32R_SIGCONTEXT_H
2#define _ASM_M32R_SIGCONTEXT_H
3
4struct sigcontext {
5 /* CPU registers */
6 /* Saved main processor registers. */
7 unsigned long sc_r4;
8 unsigned long sc_r5;
9 unsigned long sc_r6;
10 struct pt_regs *sc_pt_regs;
11 unsigned long sc_r0;
12 unsigned long sc_r1;
13 unsigned long sc_r2;
14 unsigned long sc_r3;
15 unsigned long sc_r7;
16 unsigned long sc_r8;
17 unsigned long sc_r9;
18 unsigned long sc_r10;
19 unsigned long sc_r11;
20 unsigned long sc_r12;
21
22 /* Saved main processor status and miscellaneous context registers. */
23 unsigned long sc_acc0h;
24 unsigned long sc_acc0l;
25 unsigned long sc_acc1h; /* ISA_DSP_LEVEL2 only */
26 unsigned long sc_acc1l; /* ISA_DSP_LEVEL2 only */
27 unsigned long sc_psw;
28 unsigned long sc_bpc; /* saved PC for TRAP syscalls */
29 unsigned long sc_bbpsw;
30 unsigned long sc_bbpc;
31 unsigned long sc_spu; /* saved user stack */
32 unsigned long sc_fp;
33 unsigned long sc_lr; /* saved PC for JL syscalls */
34 unsigned long sc_spi; /* saved kernel stack */
35
36 unsigned long oldmask;
37};
38
39#endif /* _ASM_M32R_SIGCONTEXT_H */
diff --git a/arch/m32r/include/asm/siginfo.h b/arch/m32r/include/asm/siginfo.h
new file mode 100644
index 000000000000..7d9cd9ebfd0e
--- /dev/null
+++ b/arch/m32r/include/asm/siginfo.h
@@ -0,0 +1,6 @@
1#ifndef _M32R_SIGINFO_H
2#define _M32R_SIGINFO_H
3
4#include <asm-generic/siginfo.h>
5
6#endif /* _M32R_SIGINFO_H */
diff --git a/arch/m32r/include/asm/signal.h b/arch/m32r/include/asm/signal.h
new file mode 100644
index 000000000000..1a607066bc64
--- /dev/null
+++ b/arch/m32r/include/asm/signal.h
@@ -0,0 +1,166 @@
1#ifndef _ASM_M32R_SIGNAL_H
2#define _ASM_M32R_SIGNAL_H
3
4#include <linux/types.h>
5#include <linux/time.h>
6#include <linux/compiler.h>
7
8/* Avoid too many header ordering problems. */
9struct siginfo;
10
11#ifdef __KERNEL__
12/* Most things should be clean enough to redefine this at will, if care
13 is taken to make libc match. */
14
15#define _NSIG 64
16#define _NSIG_BPW 32
17#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
18
19typedef unsigned long old_sigset_t; /* at least 32 bits */
20
21typedef struct {
22 unsigned long sig[_NSIG_WORDS];
23} sigset_t;
24
25#else
26/* Here we must cater to libcs that poke about in kernel headers. */
27
28#define NSIG 32
29typedef unsigned long sigset_t;
30
31#endif /* __KERNEL__ */
32
33#define SIGHUP 1
34#define SIGINT 2
35#define SIGQUIT 3
36#define SIGILL 4
37#define SIGTRAP 5
38#define SIGABRT 6
39#define SIGIOT 6
40#define SIGBUS 7
41#define SIGFPE 8
42#define SIGKILL 9
43#define SIGUSR1 10
44#define SIGSEGV 11
45#define SIGUSR2 12
46#define SIGPIPE 13
47#define SIGALRM 14
48#define SIGTERM 15
49#define SIGSTKFLT 16
50#define SIGCHLD 17
51#define SIGCONT 18
52#define SIGSTOP 19
53#define SIGTSTP 20
54#define SIGTTIN 21
55#define SIGTTOU 22
56#define SIGURG 23
57#define SIGXCPU 24
58#define SIGXFSZ 25
59#define SIGVTALRM 26
60#define SIGPROF 27
61#define SIGWINCH 28
62#define SIGIO 29
63#define SIGPOLL SIGIO
64/*
65#define SIGLOST 29
66*/
67#define SIGPWR 30
68#define SIGSYS 31
69#define SIGUNUSED 31
70
71/* These should not be considered constants from userland. */
72#define SIGRTMIN 32
73#define SIGRTMAX _NSIG
74
75/*
76 * SA_FLAGS values:
77 *
78 * SA_ONSTACK indicates that a registered stack_t will be used.
79 * SA_RESTART flag to get restarting signals (which were the default long ago)
80 * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
81 * SA_RESETHAND clears the handler when the signal is delivered.
82 * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
83 * SA_NODEFER prevents the current signal from being masked in the handler.
84 *
85 * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
86 * Unix names RESETHAND and NODEFER respectively.
87 */
88#define SA_NOCLDSTOP 0x00000001u
89#define SA_NOCLDWAIT 0x00000002u
90#define SA_SIGINFO 0x00000004u
91#define SA_ONSTACK 0x08000000u
92#define SA_RESTART 0x10000000u
93#define SA_NODEFER 0x40000000u
94#define SA_RESETHAND 0x80000000u
95
96#define SA_NOMASK SA_NODEFER
97#define SA_ONESHOT SA_RESETHAND
98
99#define SA_RESTORER 0x04000000
100
101/*
102 * sigaltstack controls
103 */
104#define SS_ONSTACK 1
105#define SS_DISABLE 2
106
107#define MINSIGSTKSZ 2048
108#define SIGSTKSZ 8192
109
110#include <asm-generic/signal.h>
111
112#ifdef __KERNEL__
113struct old_sigaction {
114 __sighandler_t sa_handler;
115 old_sigset_t sa_mask;
116 unsigned long sa_flags;
117 __sigrestore_t sa_restorer;
118};
119
120struct sigaction {
121 __sighandler_t sa_handler;
122 unsigned long sa_flags;
123 __sigrestore_t sa_restorer;
124 sigset_t sa_mask; /* mask last for extensibility */
125};
126
127struct k_sigaction {
128 struct sigaction sa;
129};
130#else
131/* Here we must cater to libcs that poke about in kernel headers. */
132
133struct sigaction {
134 union {
135 __sighandler_t _sa_handler;
136 void (*_sa_sigaction)(int, struct siginfo *, void *);
137 } _u;
138 sigset_t sa_mask;
139 unsigned long sa_flags;
140 void (*sa_restorer)(void);
141};
142
143#define sa_handler _u._sa_handler
144#define sa_sigaction _u._sa_sigaction
145
146#endif /* __KERNEL__ */
147
148typedef struct sigaltstack {
149 void __user *ss_sp;
150 int ss_flags;
151 size_t ss_size;
152} stack_t;
153
154#ifdef __KERNEL__
155#include <asm/sigcontext.h>
156
157#undef __HAVE_ARCH_SIG_BITOPS
158
159struct pt_regs;
160extern int do_signal(struct pt_regs *regs, sigset_t *oldset);
161
162#define ptrace_signal_deliver(regs, cookie) do { } while (0)
163
164#endif /* __KERNEL__ */
165
166#endif /* _ASM_M32R_SIGNAL_H */
diff --git a/arch/m32r/include/asm/smp.h b/arch/m32r/include/asm/smp.h
new file mode 100644
index 000000000000..b96a6d2ffbc3
--- /dev/null
+++ b/arch/m32r/include/asm/smp.h
@@ -0,0 +1,119 @@
1#ifndef _ASM_M32R_SMP_H
2#define _ASM_M32R_SMP_H
3
4#ifdef CONFIG_SMP
5#ifndef __ASSEMBLY__
6
7#include <linux/cpumask.h>
8#include <linux/spinlock.h>
9#include <linux/threads.h>
10#include <asm/m32r.h>
11
12#define PHYSID_ARRAY_SIZE 1
13
14struct physid_mask
15{
16 unsigned long mask[PHYSID_ARRAY_SIZE];
17};
18
19typedef struct physid_mask physid_mask_t;
20
21#define physid_set(physid, map) set_bit(physid, (map).mask)
22#define physid_clear(physid, map) clear_bit(physid, (map).mask)
23#define physid_isset(physid, map) test_bit(physid, (map).mask)
24#define physid_test_and_set(physid, map) test_and_set_bit(physid, (map).mask)
25
26#define physids_and(dst, src1, src2) bitmap_and((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
27#define physids_or(dst, src1, src2) bitmap_or((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
28#define physids_clear(map) bitmap_zero((map).mask, MAX_APICS)
29#define physids_complement(dst, src) bitmap_complement((dst).mask,(src).mask, MAX_APICS)
30#define physids_empty(map) bitmap_empty((map).mask, MAX_APICS)
31#define physids_equal(map1, map2) bitmap_equal((map1).mask, (map2).mask, MAX_APICS)
32#define physids_weight(map) bitmap_weight((map).mask, MAX_APICS)
33#define physids_shift_right(d, s, n) bitmap_shift_right((d).mask, (s).mask, n, MAX_APICS)
34#define physids_shift_left(d, s, n) bitmap_shift_left((d).mask, (s).mask, n, MAX_APICS)
35#define physids_coerce(map) ((map).mask[0])
36
37#define physids_promote(physids) \
38 ({ \
39 physid_mask_t __physid_mask = PHYSID_MASK_NONE; \
40 __physid_mask.mask[0] = physids; \
41 __physid_mask; \
42 })
43
44#define physid_mask_of_physid(physid) \
45 ({ \
46 physid_mask_t __physid_mask = PHYSID_MASK_NONE; \
47 physid_set(physid, __physid_mask); \
48 __physid_mask; \
49 })
50
51#define PHYSID_MASK_ALL { {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} }
52#define PHYSID_MASK_NONE { {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} }
53
54extern physid_mask_t phys_cpu_present_map;
55
56/*
57 * Some lowlevel functions might want to know about
58 * the real CPU ID <-> CPU # mapping.
59 */
60extern volatile int cpu_2_physid[NR_CPUS];
61#define cpu_to_physid(cpu_id) cpu_2_physid[cpu_id]
62
63#define raw_smp_processor_id() (current_thread_info()->cpu)
64
65extern cpumask_t cpu_callout_map;
66
67static __inline__ int hard_smp_processor_id(void)
68{
69 return (int)*(volatile long *)M32R_CPUID_PORTL;
70}
71
72static __inline__ int cpu_logical_map(int cpu)
73{
74 return cpu;
75}
76
77static __inline__ int cpu_number_map(int cpu)
78{
79 return cpu;
80}
81
82static __inline__ unsigned int num_booting_cpus(void)
83{
84 return cpus_weight(cpu_callout_map);
85}
86
87extern void smp_send_timer(void);
88extern unsigned long send_IPI_mask_phys(cpumask_t, int, int);
89
90extern void arch_send_call_function_single_ipi(int cpu);
91extern void arch_send_call_function_ipi(cpumask_t mask);
92
93#endif /* not __ASSEMBLY__ */
94
95#define NO_PROC_ID (0xff) /* No processor magic marker */
96
97#define PROC_CHANGE_PENALTY (15) /* Schedule penalty */
98
99/*
100 * M32R-mp IPI
101 */
102#define RESCHEDULE_IPI (M32R_IRQ_IPI0-M32R_IRQ_IPI0)
103#define INVALIDATE_TLB_IPI (M32R_IRQ_IPI1-M32R_IRQ_IPI0)
104#define CALL_FUNCTION_IPI (M32R_IRQ_IPI2-M32R_IRQ_IPI0)
105#define LOCAL_TIMER_IPI (M32R_IRQ_IPI3-M32R_IRQ_IPI0)
106#define INVALIDATE_CACHE_IPI (M32R_IRQ_IPI4-M32R_IRQ_IPI0)
107#define CPU_BOOT_IPI (M32R_IRQ_IPI5-M32R_IRQ_IPI0)
108#define CALL_FUNC_SINGLE_IPI (M32R_IRQ_IPI6-M32R_IRQ_IPI0)
109
110#define IPI_SHIFT (0)
111#define NR_IPIS (8)
112
113#else /* CONFIG_SMP */
114
115#define hard_smp_processor_id() 0
116
117#endif /* CONFIG_SMP */
118
119#endif /* _ASM_M32R_SMP_H */
diff --git a/arch/m32r/include/asm/socket.h b/arch/m32r/include/asm/socket.h
new file mode 100644
index 000000000000..be7ed589af5c
--- /dev/null
+++ b/arch/m32r/include/asm/socket.h
@@ -0,0 +1,60 @@
1#ifndef _ASM_M32R_SOCKET_H
2#define _ASM_M32R_SOCKET_H
3
4#include <asm/sockios.h>
5
6/* For setsockoptions(2) */
7#define SOL_SOCKET 1
8
9#define SO_DEBUG 1
10#define SO_REUSEADDR 2
11#define SO_TYPE 3
12#define SO_ERROR 4
13#define SO_DONTROUTE 5
14#define SO_BROADCAST 6
15#define SO_SNDBUF 7
16#define SO_RCVBUF 8
17#define SO_SNDBUFFORCE 32
18#define SO_RCVBUFFORCE 33
19#define SO_KEEPALIVE 9
20#define SO_OOBINLINE 10
21#define SO_NO_CHECK 11
22#define SO_PRIORITY 12
23#define SO_LINGER 13
24#define SO_BSDCOMPAT 14
25/* To add :#define SO_REUSEPORT 15 */
26#define SO_PASSCRED 16
27#define SO_PEERCRED 17
28#define SO_RCVLOWAT 18
29#define SO_SNDLOWAT 19
30#define SO_RCVTIMEO 20
31#define SO_SNDTIMEO 21
32
33/* Security levels - as per NRL IPv6 - don't actually do anything */
34#define SO_SECURITY_AUTHENTICATION 22
35#define SO_SECURITY_ENCRYPTION_TRANSPORT 23
36#define SO_SECURITY_ENCRYPTION_NETWORK 24
37
38#define SO_BINDTODEVICE 25
39
40/* Socket filtering */
41#define SO_ATTACH_FILTER 26
42#define SO_DETACH_FILTER 27
43
44#define SO_PEERNAME 28
45#define SO_TIMESTAMP 29
46#define SCM_TIMESTAMP SO_TIMESTAMP
47
48#define SO_ACCEPTCONN 30
49
50#define SO_PEERSEC 31
51#define SO_PASSSEC 34
52#define SO_TIMESTAMPNS 35
53#define SCM_TIMESTAMPNS SO_TIMESTAMPNS
54
55#define SO_MARK 36
56
57#define SO_TIMESTAMPING 37
58#define SCM_TIMESTAMPING SO_TIMESTAMPING
59
60#endif /* _ASM_M32R_SOCKET_H */
diff --git a/arch/m32r/include/asm/sockios.h b/arch/m32r/include/asm/sockios.h
new file mode 100644
index 000000000000..6c1fb9b43bdb
--- /dev/null
+++ b/arch/m32r/include/asm/sockios.h
@@ -0,0 +1,13 @@
1#ifndef _ASM_M32R_SOCKIOS_H
2#define _ASM_M32R_SOCKIOS_H
3
4/* Socket-level I/O control calls. */
5#define FIOSETOWN 0x8901
6#define SIOCSPGRP 0x8902
7#define FIOGETOWN 0x8903
8#define SIOCGPGRP 0x8904
9#define SIOCATMARK 0x8905
10#define SIOCGSTAMP 0x8906 /* Get stamp (timeval) */
11#define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */
12
13#endif /* _ASM_M32R_SOCKIOS_H */
diff --git a/arch/m32r/include/asm/spinlock.h b/arch/m32r/include/asm/spinlock.h
new file mode 100644
index 000000000000..dded923883b2
--- /dev/null
+++ b/arch/m32r/include/asm/spinlock.h
@@ -0,0 +1,326 @@
1#ifndef _ASM_M32R_SPINLOCK_H
2#define _ASM_M32R_SPINLOCK_H
3
4/*
5 * linux/include/asm-m32r/spinlock.h
6 *
7 * M32R version:
8 * Copyright (C) 2001, 2002 Hitoshi Yamamoto
9 * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
10 */
11
12#include <linux/compiler.h>
13#include <asm/atomic.h>
14#include <asm/page.h>
15
16/*
17 * Your basic SMP spinlocks, allowing only a single CPU anywhere
18 *
19 * (the type definitions are in asm/spinlock_types.h)
20 *
21 * Simple spin lock operations. There are two variants, one clears IRQ's
22 * on the local processor, one does not.
23 *
24 * We make no fairness assumptions. They have a cost.
25 */
26
27#define __raw_spin_is_locked(x) (*(volatile int *)(&(x)->slock) <= 0)
28#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock)
29#define __raw_spin_unlock_wait(x) \
30 do { cpu_relax(); } while (__raw_spin_is_locked(x))
31
32/**
33 * __raw_spin_trylock - Try spin lock and return a result
34 * @lock: Pointer to the lock variable
35 *
36 * __raw_spin_trylock() tries to get the lock and returns a result.
37 * On the m32r, the result value is 1 (= Success) or 0 (= Failure).
38 */
39static inline int __raw_spin_trylock(raw_spinlock_t *lock)
40{
41 int oldval;
42 unsigned long tmp1, tmp2;
43
44 /*
45 * lock->slock : =1 : unlock
46 * : <=0 : lock
47 * {
48 * oldval = lock->slock; <--+ need atomic operation
49 * lock->slock = 0; <--+
50 * }
51 */
52 __asm__ __volatile__ (
53 "# __raw_spin_trylock \n\t"
54 "ldi %1, #0; \n\t"
55 "mvfc %2, psw; \n\t"
56 "clrpsw #0x40 -> nop; \n\t"
57 DCACHE_CLEAR("%0", "r6", "%3")
58 "lock %0, @%3; \n\t"
59 "unlock %1, @%3; \n\t"
60 "mvtc %2, psw; \n\t"
61 : "=&r" (oldval), "=&r" (tmp1), "=&r" (tmp2)
62 : "r" (&lock->slock)
63 : "memory"
64#ifdef CONFIG_CHIP_M32700_TS1
65 , "r6"
66#endif /* CONFIG_CHIP_M32700_TS1 */
67 );
68
69 return (oldval > 0);
70}
71
72static inline void __raw_spin_lock(raw_spinlock_t *lock)
73{
74 unsigned long tmp0, tmp1;
75
76 /*
77 * lock->slock : =1 : unlock
78 * : <=0 : lock
79 *
80 * for ( ; ; ) {
81 * lock->slock -= 1; <-- need atomic operation
82 * if (lock->slock == 0) break;
83 * for ( ; lock->slock <= 0 ; );
84 * }
85 */
86 __asm__ __volatile__ (
87 "# __raw_spin_lock \n\t"
88 ".fillinsn \n"
89 "1: \n\t"
90 "mvfc %1, psw; \n\t"
91 "clrpsw #0x40 -> nop; \n\t"
92 DCACHE_CLEAR("%0", "r6", "%2")
93 "lock %0, @%2; \n\t"
94 "addi %0, #-1; \n\t"
95 "unlock %0, @%2; \n\t"
96 "mvtc %1, psw; \n\t"
97 "bltz %0, 2f; \n\t"
98 LOCK_SECTION_START(".balign 4 \n\t")
99 ".fillinsn \n"
100 "2: \n\t"
101 "ld %0, @%2; \n\t"
102 "bgtz %0, 1b; \n\t"
103 "bra 2b; \n\t"
104 LOCK_SECTION_END
105 : "=&r" (tmp0), "=&r" (tmp1)
106 : "r" (&lock->slock)
107 : "memory"
108#ifdef CONFIG_CHIP_M32700_TS1
109 , "r6"
110#endif /* CONFIG_CHIP_M32700_TS1 */
111 );
112}
113
114static inline void __raw_spin_unlock(raw_spinlock_t *lock)
115{
116 mb();
117 lock->slock = 1;
118}
119
120/*
121 * Read-write spinlocks, allowing multiple readers
122 * but only one writer.
123 *
124 * NOTE! it is quite common to have readers in interrupts
125 * but no interrupt writers. For those circumstances we
126 * can "mix" irq-safe locks - any writer needs to get a
127 * irq-safe write-lock, but readers can get non-irqsafe
128 * read-locks.
129 *
130 * On x86, we implement read-write locks as a 32-bit counter
131 * with the high bit (sign) being the "contended" bit.
132 *
133 * The inline assembly is non-obvious. Think about it.
134 *
135 * Changed to use the same technique as rw semaphores. See
136 * semaphore.h for details. -ben
137 */
138
139/**
140 * read_can_lock - would read_trylock() succeed?
141 * @lock: the rwlock in question.
142 */
143#define __raw_read_can_lock(x) ((int)(x)->lock > 0)
144
145/**
146 * write_can_lock - would write_trylock() succeed?
147 * @lock: the rwlock in question.
148 */
149#define __raw_write_can_lock(x) ((x)->lock == RW_LOCK_BIAS)
150
151static inline void __raw_read_lock(raw_rwlock_t *rw)
152{
153 unsigned long tmp0, tmp1;
154
155 /*
156 * rw->lock : >0 : unlock
157 * : <=0 : lock
158 *
159 * for ( ; ; ) {
160 * rw->lock -= 1; <-- need atomic operation
161 * if (rw->lock >= 0) break;
162 * rw->lock += 1; <-- need atomic operation
163 * for ( ; rw->lock <= 0 ; );
164 * }
165 */
166 __asm__ __volatile__ (
167 "# read_lock \n\t"
168 ".fillinsn \n"
169 "1: \n\t"
170 "mvfc %1, psw; \n\t"
171 "clrpsw #0x40 -> nop; \n\t"
172 DCACHE_CLEAR("%0", "r6", "%2")
173 "lock %0, @%2; \n\t"
174 "addi %0, #-1; \n\t"
175 "unlock %0, @%2; \n\t"
176 "mvtc %1, psw; \n\t"
177 "bltz %0, 2f; \n\t"
178 LOCK_SECTION_START(".balign 4 \n\t")
179 ".fillinsn \n"
180 "2: \n\t"
181 "clrpsw #0x40 -> nop; \n\t"
182 DCACHE_CLEAR("%0", "r6", "%2")
183 "lock %0, @%2; \n\t"
184 "addi %0, #1; \n\t"
185 "unlock %0, @%2; \n\t"
186 "mvtc %1, psw; \n\t"
187 ".fillinsn \n"
188 "3: \n\t"
189 "ld %0, @%2; \n\t"
190 "bgtz %0, 1b; \n\t"
191 "bra 3b; \n\t"
192 LOCK_SECTION_END
193 : "=&r" (tmp0), "=&r" (tmp1)
194 : "r" (&rw->lock)
195 : "memory"
196#ifdef CONFIG_CHIP_M32700_TS1
197 , "r6"
198#endif /* CONFIG_CHIP_M32700_TS1 */
199 );
200}
201
202static inline void __raw_write_lock(raw_rwlock_t *rw)
203{
204 unsigned long tmp0, tmp1, tmp2;
205
206 /*
207 * rw->lock : =RW_LOCK_BIAS_STR : unlock
208 * : !=RW_LOCK_BIAS_STR : lock
209 *
210 * for ( ; ; ) {
211 * rw->lock -= RW_LOCK_BIAS_STR; <-- need atomic operation
212 * if (rw->lock == 0) break;
213 * rw->lock += RW_LOCK_BIAS_STR; <-- need atomic operation
214 * for ( ; rw->lock != RW_LOCK_BIAS_STR ; ) ;
215 * }
216 */
217 __asm__ __volatile__ (
218 "# write_lock \n\t"
219 "seth %1, #high(" RW_LOCK_BIAS_STR "); \n\t"
220 "or3 %1, %1, #low(" RW_LOCK_BIAS_STR "); \n\t"
221 ".fillinsn \n"
222 "1: \n\t"
223 "mvfc %2, psw; \n\t"
224 "clrpsw #0x40 -> nop; \n\t"
225 DCACHE_CLEAR("%0", "r7", "%3")
226 "lock %0, @%3; \n\t"
227 "sub %0, %1; \n\t"
228 "unlock %0, @%3; \n\t"
229 "mvtc %2, psw; \n\t"
230 "bnez %0, 2f; \n\t"
231 LOCK_SECTION_START(".balign 4 \n\t")
232 ".fillinsn \n"
233 "2: \n\t"
234 "clrpsw #0x40 -> nop; \n\t"
235 DCACHE_CLEAR("%0", "r7", "%3")
236 "lock %0, @%3; \n\t"
237 "add %0, %1; \n\t"
238 "unlock %0, @%3; \n\t"
239 "mvtc %2, psw; \n\t"
240 ".fillinsn \n"
241 "3: \n\t"
242 "ld %0, @%3; \n\t"
243 "beq %0, %1, 1b; \n\t"
244 "bra 3b; \n\t"
245 LOCK_SECTION_END
246 : "=&r" (tmp0), "=&r" (tmp1), "=&r" (tmp2)
247 : "r" (&rw->lock)
248 : "memory"
249#ifdef CONFIG_CHIP_M32700_TS1
250 , "r7"
251#endif /* CONFIG_CHIP_M32700_TS1 */
252 );
253}
254
255static inline void __raw_read_unlock(raw_rwlock_t *rw)
256{
257 unsigned long tmp0, tmp1;
258
259 __asm__ __volatile__ (
260 "# read_unlock \n\t"
261 "mvfc %1, psw; \n\t"
262 "clrpsw #0x40 -> nop; \n\t"
263 DCACHE_CLEAR("%0", "r6", "%2")
264 "lock %0, @%2; \n\t"
265 "addi %0, #1; \n\t"
266 "unlock %0, @%2; \n\t"
267 "mvtc %1, psw; \n\t"
268 : "=&r" (tmp0), "=&r" (tmp1)
269 : "r" (&rw->lock)
270 : "memory"
271#ifdef CONFIG_CHIP_M32700_TS1
272 , "r6"
273#endif /* CONFIG_CHIP_M32700_TS1 */
274 );
275}
276
277static inline void __raw_write_unlock(raw_rwlock_t *rw)
278{
279 unsigned long tmp0, tmp1, tmp2;
280
281 __asm__ __volatile__ (
282 "# write_unlock \n\t"
283 "seth %1, #high(" RW_LOCK_BIAS_STR "); \n\t"
284 "or3 %1, %1, #low(" RW_LOCK_BIAS_STR "); \n\t"
285 "mvfc %2, psw; \n\t"
286 "clrpsw #0x40 -> nop; \n\t"
287 DCACHE_CLEAR("%0", "r7", "%3")
288 "lock %0, @%3; \n\t"
289 "add %0, %1; \n\t"
290 "unlock %0, @%3; \n\t"
291 "mvtc %2, psw; \n\t"
292 : "=&r" (tmp0), "=&r" (tmp1), "=&r" (tmp2)
293 : "r" (&rw->lock)
294 : "memory"
295#ifdef CONFIG_CHIP_M32700_TS1
296 , "r7"
297#endif /* CONFIG_CHIP_M32700_TS1 */
298 );
299}
300
301static inline int __raw_read_trylock(raw_rwlock_t *lock)
302{
303 atomic_t *count = (atomic_t*)lock;
304 if (atomic_dec_return(count) >= 0)
305 return 1;
306 atomic_inc(count);
307 return 0;
308}
309
310static inline int __raw_write_trylock(raw_rwlock_t *lock)
311{
312 atomic_t *count = (atomic_t *)lock;
313 if (atomic_sub_and_test(RW_LOCK_BIAS, count))
314 return 1;
315 atomic_add(RW_LOCK_BIAS, count);
316 return 0;
317}
318
319#define __raw_read_lock_flags(lock, flags) __raw_read_lock(lock)
320#define __raw_write_lock_flags(lock, flags) __raw_write_lock(lock)
321
322#define _raw_spin_relax(lock) cpu_relax()
323#define _raw_read_relax(lock) cpu_relax()
324#define _raw_write_relax(lock) cpu_relax()
325
326#endif /* _ASM_M32R_SPINLOCK_H */
diff --git a/arch/m32r/include/asm/spinlock_types.h b/arch/m32r/include/asm/spinlock_types.h
new file mode 100644
index 000000000000..83f52105c0e4
--- /dev/null
+++ b/arch/m32r/include/asm/spinlock_types.h
@@ -0,0 +1,23 @@
1#ifndef _ASM_M32R_SPINLOCK_TYPES_H
2#define _ASM_M32R_SPINLOCK_TYPES_H
3
4#ifndef __LINUX_SPINLOCK_TYPES_H
5# error "please don't include this file directly"
6#endif
7
8typedef struct {
9 volatile int slock;
10} raw_spinlock_t;
11
12#define __RAW_SPIN_LOCK_UNLOCKED { 1 }
13
14typedef struct {
15 volatile int lock;
16} raw_rwlock_t;
17
18#define RW_LOCK_BIAS 0x01000000
19#define RW_LOCK_BIAS_STR "0x01000000"
20
21#define __RAW_RW_LOCK_UNLOCKED { RW_LOCK_BIAS }
22
23#endif /* _ASM_M32R_SPINLOCK_TYPES_H */
diff --git a/arch/m32r/include/asm/stat.h b/arch/m32r/include/asm/stat.h
new file mode 100644
index 000000000000..da4518f82d6d
--- /dev/null
+++ b/arch/m32r/include/asm/stat.h
@@ -0,0 +1,87 @@
1#ifndef _ASM_M32R_STAT_H
2#define _ASM_M32R_STAT_H
3
4#include <asm/byteorder.h>
5
6struct __old_kernel_stat {
7 unsigned short st_dev;
8 unsigned short st_ino;
9 unsigned short st_mode;
10 unsigned short st_nlink;
11 unsigned short st_uid;
12 unsigned short st_gid;
13 unsigned short st_rdev;
14 unsigned long st_size;
15 unsigned long st_atime;
16 unsigned long st_mtime;
17 unsigned long st_ctime;
18};
19
20#define STAT_HAVE_NSEC 1
21
22struct stat {
23 unsigned short st_dev;
24 unsigned short __pad1;
25 unsigned long st_ino;
26 unsigned short st_mode;
27 unsigned short st_nlink;
28 unsigned short st_uid;
29 unsigned short st_gid;
30 unsigned short st_rdev;
31 unsigned short __pad2;
32 unsigned long st_size;
33 unsigned long st_blksize;
34 unsigned long st_blocks;
35 unsigned long st_atime;
36 unsigned long st_atime_nsec;
37 unsigned long st_mtime;
38 unsigned long st_mtime_nsec;
39 unsigned long st_ctime;
40 unsigned long st_ctime_nsec;
41 unsigned long __unused4;
42 unsigned long __unused5;
43};
44
45/* This matches struct stat64 in glibc2.1, hence the absolutely
46 * insane amounts of padding around dev_t's.
47 */
48struct stat64 {
49 unsigned long long st_dev;
50 unsigned char __pad0[4];
51#define STAT64_HAS_BROKEN_ST_INO
52 unsigned long __st_ino;
53
54 unsigned int st_mode;
55 unsigned int st_nlink;
56
57 unsigned long st_uid;
58 unsigned long st_gid;
59
60 unsigned long long st_rdev;
61 unsigned char __pad3[4];
62
63 long long st_size;
64 unsigned long st_blksize;
65
66#if defined(__BIG_ENDIAN)
67 unsigned long __pad4; /* future possible st_blocks high bits */
68 unsigned long st_blocks; /* Number 512-byte blocks allocated. */
69#elif defined(__LITTLE_ENDIAN)
70 unsigned long st_blocks; /* Number 512-byte blocks allocated. */
71 unsigned long __pad4; /* future possible st_blocks high bits */
72#else
73#error no endian defined
74#endif
75 unsigned long st_atime;
76 unsigned long st_atime_nsec;
77
78 unsigned long st_mtime;
79 unsigned long st_mtime_nsec;
80
81 unsigned long st_ctime;
82 unsigned long st_ctime_nsec;
83
84 unsigned long long st_ino;
85};
86
87#endif /* _ASM_M32R_STAT_H */
diff --git a/arch/m32r/include/asm/statfs.h b/arch/m32r/include/asm/statfs.h
new file mode 100644
index 000000000000..6eb4c6007e6b
--- /dev/null
+++ b/arch/m32r/include/asm/statfs.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_M32R_STATFS_H
2#define _ASM_M32R_STATFS_H
3
4#include <asm-generic/statfs.h>
5
6#endif /* _ASM_M32R_STATFS_H */
diff --git a/arch/m32r/include/asm/string.h b/arch/m32r/include/asm/string.h
new file mode 100644
index 000000000000..e61e2b0bfc1f
--- /dev/null
+++ b/arch/m32r/include/asm/string.h
@@ -0,0 +1,13 @@
1#ifndef _ASM_M32R_STRING_H
2#define _ASM_M32R_STRING_H
3
4#define __HAVE_ARCH_STRLEN
5extern size_t strlen(const char * s);
6
7#define __HAVE_ARCH_MEMCPY
8extern void *memcpy(void *__to, __const__ void *__from, size_t __n);
9
10#define __HAVE_ARCH_MEMSET
11extern void *memset(void *__s, int __c, size_t __count);
12
13#endif /* _ASM_M32R_STRING_H */
diff --git a/arch/m32r/include/asm/swab.h b/arch/m32r/include/asm/swab.h
new file mode 100644
index 000000000000..54dab001d6d1
--- /dev/null
+++ b/arch/m32r/include/asm/swab.h
@@ -0,0 +1,10 @@
1#ifndef _ASM_M32R_SWAB_H
2#define _ASM_M32R_SWAB_H
3
4#include <linux/types.h>
5
6#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
7# define __SWAB_64_THRU_32__
8#endif
9
10#endif /* _ASM_M32R_SWAB_H */
diff --git a/arch/m32r/include/asm/syscall.h b/arch/m32r/include/asm/syscall.h
new file mode 100644
index 000000000000..25f316f2b78d
--- /dev/null
+++ b/arch/m32r/include/asm/syscall.h
@@ -0,0 +1,8 @@
1#ifndef _ASM_M32R_SYSCALL_H
2#define _ASM_M32R_SYSCALL_H
3
4/* Definitions for the system call vector. */
5#define SYSCALL_VECTOR "2"
6#define SYSCALL_VECTOR_ADDRESS "0xa0"
7
8#endif /* _ASM_M32R_SYSCALL_H */
diff --git a/arch/m32r/include/asm/system.h b/arch/m32r/include/asm/system.h
new file mode 100644
index 000000000000..c980f5ba8de7
--- /dev/null
+++ b/arch/m32r/include/asm/system.h
@@ -0,0 +1,431 @@
1#ifndef _ASM_M32R_SYSTEM_H
2#define _ASM_M32R_SYSTEM_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * Copyright (C) 2001 Hiroyuki Kondo, Hirokazu Takata, and Hitoshi Yamamoto
10 * Copyright (C) 2004, 2006 Hirokazu Takata <takata at linux-m32r.org>
11 */
12
13#include <linux/compiler.h>
14#include <asm/assembler.h>
15
16#ifdef __KERNEL__
17
18/*
19 * switch_to(prev, next) should switch from task `prev' to `next'
20 * `prev' will never be the same as `next'.
21 *
22 * `next' and `prev' should be struct task_struct, but it isn't always defined
23 */
24
25#if defined(CONFIG_FRAME_POINTER) || \
26 !defined(CONFIG_SCHED_OMIT_FRAME_POINTER)
27#define M32R_PUSH_FP " push fp\n"
28#define M32R_POP_FP " pop fp\n"
29#else
30#define M32R_PUSH_FP ""
31#define M32R_POP_FP ""
32#endif
33
34#define switch_to(prev, next, last) do { \
35 __asm__ __volatile__ ( \
36 " seth lr, #high(1f) \n" \
37 " or3 lr, lr, #low(1f) \n" \
38 " st lr, @%4 ; store old LR \n" \
39 " ld lr, @%5 ; load new LR \n" \
40 M32R_PUSH_FP \
41 " st sp, @%2 ; store old SP \n" \
42 " ld sp, @%3 ; load new SP \n" \
43 " push %1 ; store `prev' on new stack \n" \
44 " jmp lr \n" \
45 " .fillinsn \n" \
46 "1: \n" \
47 " pop %0 ; restore `__last' from new stack \n" \
48 M32R_POP_FP \
49 : "=r" (last) \
50 : "0" (prev), \
51 "r" (&(prev->thread.sp)), "r" (&(next->thread.sp)), \
52 "r" (&(prev->thread.lr)), "r" (&(next->thread.lr)) \
53 : "memory", "lr" \
54 ); \
55} while(0)
56
57/* Interrupt Control */
58#if !defined(CONFIG_CHIP_M32102) && !defined(CONFIG_CHIP_M32104)
59#define local_irq_enable() \
60 __asm__ __volatile__ ("setpsw #0x40 -> nop": : :"memory")
61#define local_irq_disable() \
62 __asm__ __volatile__ ("clrpsw #0x40 -> nop": : :"memory")
63#else /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
64static inline void local_irq_enable(void)
65{
66 unsigned long tmpreg;
67 __asm__ __volatile__(
68 "mvfc %0, psw; \n\t"
69 "or3 %0, %0, #0x0040; \n\t"
70 "mvtc %0, psw; \n\t"
71 : "=&r" (tmpreg) : : "cbit", "memory");
72}
73
74static inline void local_irq_disable(void)
75{
76 unsigned long tmpreg0, tmpreg1;
77 __asm__ __volatile__(
78 "ld24 %0, #0 ; Use 32-bit insn. \n\t"
79 "mvfc %1, psw ; No interrupt can be accepted here. \n\t"
80 "mvtc %0, psw \n\t"
81 "and3 %0, %1, #0xffbf \n\t"
82 "mvtc %0, psw \n\t"
83 : "=&r" (tmpreg0), "=&r" (tmpreg1) : : "cbit", "memory");
84}
85#endif /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
86
87#define local_save_flags(x) \
88 __asm__ __volatile__("mvfc %0,psw" : "=r"(x) : /* no input */)
89
90#define local_irq_restore(x) \
91 __asm__ __volatile__("mvtc %0,psw" : /* no outputs */ \
92 : "r" (x) : "cbit", "memory")
93
94#if !(defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_M32104))
95#define local_irq_save(x) \
96 __asm__ __volatile__( \
97 "mvfc %0, psw; \n\t" \
98 "clrpsw #0x40 -> nop; \n\t" \
99 : "=r" (x) : /* no input */ : "memory")
100#else /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
101#define local_irq_save(x) \
102 ({ \
103 unsigned long tmpreg; \
104 __asm__ __volatile__( \
105 "ld24 %1, #0 \n\t" \
106 "mvfc %0, psw \n\t" \
107 "mvtc %1, psw \n\t" \
108 "and3 %1, %0, #0xffbf \n\t" \
109 "mvtc %1, psw \n\t" \
110 : "=r" (x), "=&r" (tmpreg) \
111 : : "cbit", "memory"); \
112 })
113#endif /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
114
115#define irqs_disabled() \
116 ({ \
117 unsigned long flags; \
118 local_save_flags(flags); \
119 !(flags & 0x40); \
120 })
121
122#define nop() __asm__ __volatile__ ("nop" : : )
123
124#define xchg(ptr, x) \
125 ((__typeof__(*(ptr)))__xchg((unsigned long)(x), (ptr), sizeof(*(ptr))))
126#define xchg_local(ptr, x) \
127 ((__typeof__(*(ptr)))__xchg_local((unsigned long)(x), (ptr), \
128 sizeof(*(ptr))))
129
130extern void __xchg_called_with_bad_pointer(void);
131
132#ifdef CONFIG_CHIP_M32700_TS1
133#define DCACHE_CLEAR(reg0, reg1, addr) \
134 "seth "reg1", #high(dcache_dummy); \n\t" \
135 "or3 "reg1", "reg1", #low(dcache_dummy); \n\t" \
136 "lock "reg0", @"reg1"; \n\t" \
137 "add3 "reg0", "addr", #0x1000; \n\t" \
138 "ld "reg0", @"reg0"; \n\t" \
139 "add3 "reg0", "addr", #0x2000; \n\t" \
140 "ld "reg0", @"reg0"; \n\t" \
141 "unlock "reg0", @"reg1"; \n\t"
142 /* FIXME: This workaround code cannot handle kernel modules
143 * correctly under SMP environment.
144 */
145#else /* CONFIG_CHIP_M32700_TS1 */
146#define DCACHE_CLEAR(reg0, reg1, addr)
147#endif /* CONFIG_CHIP_M32700_TS1 */
148
149static __always_inline unsigned long
150__xchg(unsigned long x, volatile void *ptr, int size)
151{
152 unsigned long flags;
153 unsigned long tmp = 0;
154
155 local_irq_save(flags);
156
157 switch (size) {
158#ifndef CONFIG_SMP
159 case 1:
160 __asm__ __volatile__ (
161 "ldb %0, @%2 \n\t"
162 "stb %1, @%2 \n\t"
163 : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory");
164 break;
165 case 2:
166 __asm__ __volatile__ (
167 "ldh %0, @%2 \n\t"
168 "sth %1, @%2 \n\t"
169 : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory");
170 break;
171 case 4:
172 __asm__ __volatile__ (
173 "ld %0, @%2 \n\t"
174 "st %1, @%2 \n\t"
175 : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory");
176 break;
177#else /* CONFIG_SMP */
178 case 4:
179 __asm__ __volatile__ (
180 DCACHE_CLEAR("%0", "r4", "%2")
181 "lock %0, @%2; \n\t"
182 "unlock %1, @%2; \n\t"
183 : "=&r" (tmp) : "r" (x), "r" (ptr)
184 : "memory"
185#ifdef CONFIG_CHIP_M32700_TS1
186 , "r4"
187#endif /* CONFIG_CHIP_M32700_TS1 */
188 );
189 break;
190#endif /* CONFIG_SMP */
191 default:
192 __xchg_called_with_bad_pointer();
193 }
194
195 local_irq_restore(flags);
196
197 return (tmp);
198}
199
200static __always_inline unsigned long
201__xchg_local(unsigned long x, volatile void *ptr, int size)
202{
203 unsigned long flags;
204 unsigned long tmp = 0;
205
206 local_irq_save(flags);
207
208 switch (size) {
209 case 1:
210 __asm__ __volatile__ (
211 "ldb %0, @%2 \n\t"
212 "stb %1, @%2 \n\t"
213 : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory");
214 break;
215 case 2:
216 __asm__ __volatile__ (
217 "ldh %0, @%2 \n\t"
218 "sth %1, @%2 \n\t"
219 : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory");
220 break;
221 case 4:
222 __asm__ __volatile__ (
223 "ld %0, @%2 \n\t"
224 "st %1, @%2 \n\t"
225 : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory");
226 break;
227 default:
228 __xchg_called_with_bad_pointer();
229 }
230
231 local_irq_restore(flags);
232
233 return (tmp);
234}
235
236#define __HAVE_ARCH_CMPXCHG 1
237
238static inline unsigned long
239__cmpxchg_u32(volatile unsigned int *p, unsigned int old, unsigned int new)
240{
241 unsigned long flags;
242 unsigned int retval;
243
244 local_irq_save(flags);
245 __asm__ __volatile__ (
246 DCACHE_CLEAR("%0", "r4", "%1")
247 M32R_LOCK" %0, @%1; \n"
248 " bne %0, %2, 1f; \n"
249 M32R_UNLOCK" %3, @%1; \n"
250 " bra 2f; \n"
251 " .fillinsn \n"
252 "1:"
253 M32R_UNLOCK" %0, @%1; \n"
254 " .fillinsn \n"
255 "2:"
256 : "=&r" (retval)
257 : "r" (p), "r" (old), "r" (new)
258 : "cbit", "memory"
259#ifdef CONFIG_CHIP_M32700_TS1
260 , "r4"
261#endif /* CONFIG_CHIP_M32700_TS1 */
262 );
263 local_irq_restore(flags);
264
265 return retval;
266}
267
268static inline unsigned long
269__cmpxchg_local_u32(volatile unsigned int *p, unsigned int old,
270 unsigned int new)
271{
272 unsigned long flags;
273 unsigned int retval;
274
275 local_irq_save(flags);
276 __asm__ __volatile__ (
277 DCACHE_CLEAR("%0", "r4", "%1")
278 "ld %0, @%1; \n"
279 " bne %0, %2, 1f; \n"
280 "st %3, @%1; \n"
281 " bra 2f; \n"
282 " .fillinsn \n"
283 "1:"
284 "st %0, @%1; \n"
285 " .fillinsn \n"
286 "2:"
287 : "=&r" (retval)
288 : "r" (p), "r" (old), "r" (new)
289 : "cbit", "memory"
290#ifdef CONFIG_CHIP_M32700_TS1
291 , "r4"
292#endif /* CONFIG_CHIP_M32700_TS1 */
293 );
294 local_irq_restore(flags);
295
296 return retval;
297}
298
299/* This function doesn't exist, so you'll get a linker error
300 if something tries to do an invalid cmpxchg(). */
301extern void __cmpxchg_called_with_bad_pointer(void);
302
303static inline unsigned long
304__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
305{
306 switch (size) {
307 case 4:
308 return __cmpxchg_u32(ptr, old, new);
309#if 0 /* we don't have __cmpxchg_u64 */
310 case 8:
311 return __cmpxchg_u64(ptr, old, new);
312#endif /* 0 */
313 }
314 __cmpxchg_called_with_bad_pointer();
315 return old;
316}
317
318#define cmpxchg(ptr, o, n) \
319 ((__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)(o), \
320 (unsigned long)(n), sizeof(*(ptr))))
321
322#include <asm-generic/cmpxchg-local.h>
323
324static inline unsigned long __cmpxchg_local(volatile void *ptr,
325 unsigned long old,
326 unsigned long new, int size)
327{
328 switch (size) {
329 case 4:
330 return __cmpxchg_local_u32(ptr, old, new);
331 default:
332 return __cmpxchg_local_generic(ptr, old, new, size);
333 }
334
335 return old;
336}
337
338/*
339 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
340 * them available.
341 */
342#define cmpxchg_local(ptr, o, n) \
343 ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \
344 (unsigned long)(n), sizeof(*(ptr))))
345#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
346
347#endif /* __KERNEL__ */
348
349/*
350 * Memory barrier.
351 *
352 * mb() prevents loads and stores being reordered across this point.
353 * rmb() prevents loads being reordered across this point.
354 * wmb() prevents stores being reordered across this point.
355 */
356#define mb() barrier()
357#define rmb() mb()
358#define wmb() mb()
359
360/**
361 * read_barrier_depends - Flush all pending reads that subsequents reads
362 * depend on.
363 *
364 * No data-dependent reads from memory-like regions are ever reordered
365 * over this barrier. All reads preceding this primitive are guaranteed
366 * to access memory (but not necessarily other CPUs' caches) before any
367 * reads following this primitive that depend on the data return by
368 * any of the preceding reads. This primitive is much lighter weight than
369 * rmb() on most CPUs, and is never heavier weight than is
370 * rmb().
371 *
372 * These ordering constraints are respected by both the local CPU
373 * and the compiler.
374 *
375 * Ordering is not guaranteed by anything other than these primitives,
376 * not even by data dependencies. See the documentation for
377 * memory_barrier() for examples and URLs to more information.
378 *
379 * For example, the following code would force ordering (the initial
380 * value of "a" is zero, "b" is one, and "p" is "&a"):
381 *
382 * <programlisting>
383 * CPU 0 CPU 1
384 *
385 * b = 2;
386 * memory_barrier();
387 * p = &b; q = p;
388 * read_barrier_depends();
389 * d = *q;
390 * </programlisting>
391 *
392 *
393 * because the read of "*q" depends on the read of "p" and these
394 * two reads are separated by a read_barrier_depends(). However,
395 * the following code, with the same initial values for "a" and "b":
396 *
397 * <programlisting>
398 * CPU 0 CPU 1
399 *
400 * a = 2;
401 * memory_barrier();
402 * b = 3; y = b;
403 * read_barrier_depends();
404 * x = a;
405 * </programlisting>
406 *
407 * does not enforce ordering, since there is no data dependency between
408 * the read of "a" and the read of "b". Therefore, on some CPUs, such
409 * as Alpha, "y" could be set to 3 and "x" to 0. Use rmb()
410 * in cases like this where there are no data dependencies.
411 **/
412
413#define read_barrier_depends() do { } while (0)
414
415#ifdef CONFIG_SMP
416#define smp_mb() mb()
417#define smp_rmb() rmb()
418#define smp_wmb() wmb()
419#define smp_read_barrier_depends() read_barrier_depends()
420#define set_mb(var, value) do { (void) xchg(&var, value); } while (0)
421#else
422#define smp_mb() barrier()
423#define smp_rmb() barrier()
424#define smp_wmb() barrier()
425#define smp_read_barrier_depends() do { } while (0)
426#define set_mb(var, value) do { var = value; barrier(); } while (0)
427#endif
428
429#define arch_align_stack(x) (x)
430
431#endif /* _ASM_M32R_SYSTEM_H */
diff --git a/arch/m32r/include/asm/termbits.h b/arch/m32r/include/asm/termbits.h
new file mode 100644
index 000000000000..bc104008b55b
--- /dev/null
+++ b/arch/m32r/include/asm/termbits.h
@@ -0,0 +1,199 @@
1#ifndef _ASM_M32R_TERMBITS_H
2#define _ASM_M32R_TERMBITS_H
3
4#include <linux/posix_types.h>
5
6typedef unsigned char cc_t;
7typedef unsigned int speed_t;
8typedef unsigned int tcflag_t;
9
10#define NCCS 19
11struct termios {
12 tcflag_t c_iflag; /* input mode flags */
13 tcflag_t c_oflag; /* output mode flags */
14 tcflag_t c_cflag; /* control mode flags */
15 tcflag_t c_lflag; /* local mode flags */
16 cc_t c_line; /* line discipline */
17 cc_t c_cc[NCCS]; /* control characters */
18};
19
20struct termios2 {
21 tcflag_t c_iflag; /* input mode flags */
22 tcflag_t c_oflag; /* output mode flags */
23 tcflag_t c_cflag; /* control mode flags */
24 tcflag_t c_lflag; /* local mode flags */
25 cc_t c_line; /* line discipline */
26 cc_t c_cc[NCCS]; /* control characters */
27 speed_t c_ispeed; /* input speed */
28 speed_t c_ospeed; /* output speed */
29};
30
31struct ktermios {
32 tcflag_t c_iflag; /* input mode flags */
33 tcflag_t c_oflag; /* output mode flags */
34 tcflag_t c_cflag; /* control mode flags */
35 tcflag_t c_lflag; /* local mode flags */
36 cc_t c_line; /* line discipline */
37 cc_t c_cc[NCCS]; /* control characters */
38 speed_t c_ispeed; /* input speed */
39 speed_t c_ospeed; /* output speed */
40};
41
42/* c_cc characters */
43#define VINTR 0
44#define VQUIT 1
45#define VERASE 2
46#define VKILL 3
47#define VEOF 4
48#define VTIME 5
49#define VMIN 6
50#define VSWTC 7
51#define VSTART 8
52#define VSTOP 9
53#define VSUSP 10
54#define VEOL 11
55#define VREPRINT 12
56#define VDISCARD 13
57#define VWERASE 14
58#define VLNEXT 15
59#define VEOL2 16
60
61/* c_iflag bits */
62#define IGNBRK 0000001
63#define BRKINT 0000002
64#define IGNPAR 0000004
65#define PARMRK 0000010
66#define INPCK 0000020
67#define ISTRIP 0000040
68#define INLCR 0000100
69#define IGNCR 0000200
70#define ICRNL 0000400
71#define IUCLC 0001000
72#define IXON 0002000
73#define IXANY 0004000
74#define IXOFF 0010000
75#define IMAXBEL 0020000
76#define IUTF8 0040000
77
78/* c_oflag bits */
79#define OPOST 0000001
80#define OLCUC 0000002
81#define ONLCR 0000004
82#define OCRNL 0000010
83#define ONOCR 0000020
84#define ONLRET 0000040
85#define OFILL 0000100
86#define OFDEL 0000200
87#define NLDLY 0000400
88#define NL0 0000000
89#define NL1 0000400
90#define CRDLY 0003000
91#define CR0 0000000
92#define CR1 0001000
93#define CR2 0002000
94#define CR3 0003000
95#define TABDLY 0014000
96#define TAB0 0000000
97#define TAB1 0004000
98#define TAB2 0010000
99#define TAB3 0014000
100#define XTABS 0014000
101#define BSDLY 0020000
102#define BS0 0000000
103#define BS1 0020000
104#define VTDLY 0040000
105#define VT0 0000000
106#define VT1 0040000
107#define FFDLY 0100000
108#define FF0 0000000
109#define FF1 0100000
110
111/* c_cflag bit meaning */
112#define CBAUD 0010017
113#define B0 0000000 /* hang up */
114#define B50 0000001
115#define B75 0000002
116#define B110 0000003
117#define B134 0000004
118#define B150 0000005
119#define B200 0000006
120#define B300 0000007
121#define B600 0000010
122#define B1200 0000011
123#define B1800 0000012
124#define B2400 0000013
125#define B4800 0000014
126#define B9600 0000015
127#define B19200 0000016
128#define B38400 0000017
129#define EXTA B19200
130#define EXTB B38400
131#define CSIZE 0000060
132#define CS5 0000000
133#define CS6 0000020
134#define CS7 0000040
135#define CS8 0000060
136#define CSTOPB 0000100
137#define CREAD 0000200
138#define PARENB 0000400
139#define PARODD 0001000
140#define HUPCL 0002000
141#define CLOCAL 0004000
142#define CBAUDEX 0010000
143#define BOTHER 0010000
144#define B57600 0010001
145#define B115200 0010002
146#define B230400 0010003
147#define B460800 0010004
148#define B500000 0010005
149#define B576000 0010006
150#define B921600 0010007
151#define B1000000 0010010
152#define B1152000 0010011
153#define B1500000 0010012
154#define B2000000 0010013
155#define B2500000 0010014
156#define B3000000 0010015
157#define B3500000 0010016
158#define B4000000 0010017
159#define CIBAUD 002003600000 /** input baud rate */
160#define CTVB 004000000000 /* VisioBraille Terminal flow control */
161#define CMSPAR 010000000000 /* mark or space (stick) parity */
162#define CRTSCTS 020000000000 /* flow control */
163
164#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */
165
166/* c_lflag bits */
167#define ISIG 0000001
168#define ICANON 0000002
169#define XCASE 0000004
170#define ECHO 0000010
171#define ECHOE 0000020
172#define ECHOK 0000040
173#define ECHONL 0000100
174#define NOFLSH 0000200
175#define TOSTOP 0000400
176#define ECHOCTL 0001000
177#define ECHOPRT 0002000
178#define ECHOKE 0004000
179#define FLUSHO 0010000
180#define PENDIN 0040000
181#define IEXTEN 0100000
182
183/* tcflow() and TCXONC use these */
184#define TCOOFF 0
185#define TCOON 1
186#define TCIOFF 2
187#define TCION 3
188
189/* tcflush() and TCFLSH use these */
190#define TCIFLUSH 0
191#define TCOFLUSH 1
192#define TCIOFLUSH 2
193
194/* tcsetattr uses these */
195#define TCSANOW 0
196#define TCSADRAIN 1
197#define TCSAFLUSH 2
198
199#endif /* _ASM_M32R_TERMBITS_H */
diff --git a/arch/m32r/include/asm/termios.h b/arch/m32r/include/asm/termios.h
new file mode 100644
index 000000000000..93ce79fd342a
--- /dev/null
+++ b/arch/m32r/include/asm/termios.h
@@ -0,0 +1,91 @@
1#ifndef _M32R_TERMIOS_H
2#define _M32R_TERMIOS_H
3
4#include <asm/termbits.h>
5#include <asm/ioctls.h>
6
7struct winsize {
8 unsigned short ws_row;
9 unsigned short ws_col;
10 unsigned short ws_xpixel;
11 unsigned short ws_ypixel;
12};
13
14#define NCC 8
15struct termio {
16 unsigned short c_iflag; /* input mode flags */
17 unsigned short c_oflag; /* output mode flags */
18 unsigned short c_cflag; /* control mode flags */
19 unsigned short c_lflag; /* local mode flags */
20 unsigned char c_line; /* line discipline */
21 unsigned char c_cc[NCC]; /* control characters */
22};
23
24/* modem lines */
25#define TIOCM_LE 0x001
26#define TIOCM_DTR 0x002
27#define TIOCM_RTS 0x004
28#define TIOCM_ST 0x008
29#define TIOCM_SR 0x010
30#define TIOCM_CTS 0x020
31#define TIOCM_CAR 0x040
32#define TIOCM_RNG 0x080
33#define TIOCM_DSR 0x100
34#define TIOCM_CD TIOCM_CAR
35#define TIOCM_RI TIOCM_RNG
36#define TIOCM_OUT1 0x2000
37#define TIOCM_OUT2 0x4000
38#define TIOCM_LOOP 0x8000
39
40/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
41
42#ifdef __KERNEL__
43#include <linux/module.h>
44
45/* intr=^C quit=^\ erase=del kill=^U
46 eof=^D vtime=\0 vmin=\1 sxtc=\0
47 start=^Q stop=^S susp=^Z eol=\0
48 reprint=^R discard=^U werase=^W lnext=^V
49 eol2=\0
50*/
51#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
52
53/*
54 * Translate a "termio" structure into a "termios". Ugh.
55 */
56#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \
57 unsigned short __tmp; \
58 get_user(__tmp,&(termio)->x); \
59 *(unsigned short *) &(termios)->x = __tmp; \
60}
61
62#define user_termio_to_kernel_termios(termios, termio) \
63({ \
64 SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \
65 SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \
66 SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \
67 SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \
68 copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
69})
70
71/*
72 * Translate a "termios" structure into a "termio". Ugh.
73 */
74#define kernel_termios_to_user_termio(termio, termios) \
75({ \
76 put_user((termios)->c_iflag, &(termio)->c_iflag); \
77 put_user((termios)->c_oflag, &(termio)->c_oflag); \
78 put_user((termios)->c_cflag, &(termio)->c_cflag); \
79 put_user((termios)->c_lflag, &(termio)->c_lflag); \
80 put_user((termios)->c_line, &(termio)->c_line); \
81 copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
82})
83
84#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios2))
85#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios2))
86#define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios))
87#define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios))
88
89#endif /* __KERNEL__ */
90
91#endif /* _M32R_TERMIOS_H */
diff --git a/arch/m32r/include/asm/thread_info.h b/arch/m32r/include/asm/thread_info.h
new file mode 100644
index 000000000000..8589d462df27
--- /dev/null
+++ b/arch/m32r/include/asm/thread_info.h
@@ -0,0 +1,184 @@
1#ifndef _ASM_M32R_THREAD_INFO_H
2#define _ASM_M32R_THREAD_INFO_H
3
4/* thread_info.h: m32r low-level thread information
5 *
6 * Copyright (C) 2002 David Howells (dhowells@redhat.com)
7 * - Incorporating suggestions made by Linus Torvalds and Dave Miller
8 * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
9 */
10
11#ifdef __KERNEL__
12
13#ifndef __ASSEMBLY__
14#include <asm/processor.h>
15#endif
16
17/*
18 * low level task data that entry.S needs immediate access to
19 * - this struct should fit entirely inside of one cache line
20 * - this struct shares the supervisor stack pages
21 * - if the contents of this structure are changed, the assembly constants must also be changed
22 */
23#ifndef __ASSEMBLY__
24
25struct thread_info {
26 struct task_struct *task; /* main task structure */
27 struct exec_domain *exec_domain; /* execution domain */
28 unsigned long flags; /* low level flags */
29 unsigned long status; /* thread-synchronous flags */
30 __u32 cpu; /* current CPU */
31 int preempt_count; /* 0 => preemptable, <0 => BUG */
32
33 mm_segment_t addr_limit; /* thread address space:
34 0-0xBFFFFFFF for user-thread
35 0-0xFFFFFFFF for kernel-thread
36 */
37 struct restart_block restart_block;
38
39 __u8 supervisor_stack[0];
40};
41
42#else /* !__ASSEMBLY__ */
43
44/* offsets into the thread_info struct for assembly code access */
45#define TI_TASK 0x00000000
46#define TI_EXEC_DOMAIN 0x00000004
47#define TI_FLAGS 0x00000008
48#define TI_STATUS 0x0000000C
49#define TI_CPU 0x00000010
50#define TI_PRE_COUNT 0x00000014
51#define TI_ADDR_LIMIT 0x00000018
52#define TI_RESTART_BLOCK 0x000001C
53
54#endif
55
56#define PREEMPT_ACTIVE 0x10000000
57
58/*
59 * macros/functions for gaining access to the thread information structure
60 *
61 * preempt_count needs to be 1 initially, until the scheduler is functional.
62 */
63#ifndef __ASSEMBLY__
64
65#define INIT_THREAD_INFO(tsk) \
66{ \
67 .task = &tsk, \
68 .exec_domain = &default_exec_domain, \
69 .flags = 0, \
70 .cpu = 0, \
71 .preempt_count = 1, \
72 .addr_limit = KERNEL_DS, \
73 .restart_block = { \
74 .fn = do_no_restart_syscall, \
75 }, \
76}
77
78#define init_thread_info (init_thread_union.thread_info)
79#define init_stack (init_thread_union.stack)
80
81#define THREAD_SIZE (2*PAGE_SIZE)
82
83/* how to get the thread information struct from C */
84static inline struct thread_info *current_thread_info(void)
85{
86 struct thread_info *ti;
87
88 __asm__ __volatile__ (
89 "ldi %0, #%1 \n\t"
90 "and %0, sp \n\t"
91 : "=r" (ti) : "i" (~(THREAD_SIZE - 1))
92 );
93
94 return ti;
95}
96
97#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR
98
99/* thread information allocation */
100#ifdef CONFIG_DEBUG_STACK_USAGE
101#define alloc_thread_info(tsk) \
102 ({ \
103 struct thread_info *ret; \
104 \
105 ret = kzalloc(THREAD_SIZE, GFP_KERNEL); \
106 \
107 ret; \
108 })
109#else
110#define alloc_thread_info(tsk) kmalloc(THREAD_SIZE, GFP_KERNEL)
111#endif
112
113#define free_thread_info(info) kfree(info)
114
115#define TI_FLAG_FAULT_CODE_SHIFT 28
116
117static inline void set_thread_fault_code(unsigned int val)
118{
119 struct thread_info *ti = current_thread_info();
120 ti->flags = (ti->flags & (~0 >> (32 - TI_FLAG_FAULT_CODE_SHIFT)))
121 | (val << TI_FLAG_FAULT_CODE_SHIFT);
122}
123
124static inline unsigned int get_thread_fault_code(void)
125{
126 struct thread_info *ti = current_thread_info();
127 return ti->flags >> TI_FLAG_FAULT_CODE_SHIFT;
128}
129
130#else /* !__ASSEMBLY__ */
131
132#define THREAD_SIZE 8192
133
134/* how to get the thread information struct from ASM */
135#define GET_THREAD_INFO(reg) GET_THREAD_INFO reg
136 .macro GET_THREAD_INFO reg
137 ldi \reg, #-THREAD_SIZE
138 and \reg, sp
139 .endm
140
141#endif
142
143/*
144 * thread information flags
145 * - these are process state flags that various assembly files may need to access
146 * - pending work-to-be-done flags are in LSW
147 * - other flags in MSW
148 */
149#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
150#define TIF_SIGPENDING 1 /* signal pending */
151#define TIF_NEED_RESCHED 2 /* rescheduling necessary */
152#define TIF_SINGLESTEP 3 /* restore singlestep on return to user mode */
153#define TIF_IRET 4 /* return with iret */
154#define TIF_RESTORE_SIGMASK 8 /* restore signal mask in do_signal() */
155#define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */
156#define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */
157#define TIF_MEMDIE 18 /* OOM killer killed process */
158#define TIF_FREEZE 19 /* is freezing for suspend */
159
160#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
161#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
162#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
163#define _TIF_SINGLESTEP (1<<TIF_SINGLESTEP)
164#define _TIF_IRET (1<<TIF_IRET)
165#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK)
166#define _TIF_USEDFPU (1<<TIF_USEDFPU)
167#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
168#define _TIF_FREEZE (1<<TIF_FREEZE)
169
170#define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */
171#define _TIF_ALLWORK_MASK 0x0000FFFF /* work to do on any return to u-space */
172
173/*
174 * Thread-synchronous status.
175 *
176 * This is different from the flags in that nobody else
177 * ever touches our thread-synchronous status, so we don't
178 * have to worry about atomic accesses.
179 */
180#define TS_USEDFPU 0x0001 /* FPU was used by this task this quantum (SMP) */
181
182#endif /* __KERNEL__ */
183
184#endif /* _ASM_M32R_THREAD_INFO_H */
diff --git a/arch/m32r/include/asm/timex.h b/arch/m32r/include/asm/timex.h
new file mode 100644
index 000000000000..bb9fe4feb12d
--- /dev/null
+++ b/arch/m32r/include/asm/timex.h
@@ -0,0 +1,27 @@
1#ifndef _ASM_M32R_TIMEX_H
2#define _ASM_M32R_TIMEX_H
3
4/*
5 * linux/include/asm-m32r/timex.h
6 *
7 * m32r architecture timex specifications
8 */
9
10#define CLOCK_TICK_RATE (CONFIG_BUS_CLOCK / CONFIG_TIMER_DIVIDE)
11#define CLOCK_TICK_FACTOR 20 /* Factor of both 1000000 and CLOCK_TICK_RATE */
12
13#ifdef __KERNEL__
14/*
15 * Standard way to access the cycle counter.
16 * Currently only used on SMP.
17 */
18
19typedef unsigned long long cycles_t;
20
21static __inline__ cycles_t get_cycles (void)
22{
23 return 0;
24}
25#endif /* __KERNEL__ */
26
27#endif /* _ASM_M32R_TIMEX_H */
diff --git a/arch/m32r/include/asm/tlb.h b/arch/m32r/include/asm/tlb.h
new file mode 100644
index 000000000000..c7ebd8d48f3b
--- /dev/null
+++ b/arch/m32r/include/asm/tlb.h
@@ -0,0 +1,20 @@
1#ifndef _M32R_TLB_H
2#define _M32R_TLB_H
3
4/*
5 * x86 doesn't need any special per-pte or
6 * per-vma handling..
7 */
8#define tlb_start_vma(tlb, vma) do { } while (0)
9#define tlb_end_vma(tlb, vma) do { } while (0)
10#define __tlb_remove_tlb_entry(tlb, pte, address) do { } while (0)
11
12/*
13 * .. because we flush the whole mm when it
14 * fills up.
15 */
16#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
17
18#include <asm-generic/tlb.h>
19
20#endif /* _M32R_TLB_H */
diff --git a/arch/m32r/include/asm/tlbflush.h b/arch/m32r/include/asm/tlbflush.h
new file mode 100644
index 000000000000..0ef95307784e
--- /dev/null
+++ b/arch/m32r/include/asm/tlbflush.h
@@ -0,0 +1,97 @@
1#ifndef _ASM_M32R_TLBFLUSH_H
2#define _ASM_M32R_TLBFLUSH_H
3
4#include <asm/m32r.h>
5
6/*
7 * TLB flushing:
8 *
9 * - flush_tlb() flushes the current mm struct TLBs
10 * - flush_tlb_all() flushes all processes TLBs
11 * - flush_tlb_mm(mm) flushes the specified mm context TLB's
12 * - flush_tlb_page(vma, vmaddr) flushes one page
13 * - flush_tlb_range(vma, start, end) flushes a range of pages
14 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
15 */
16
17extern void local_flush_tlb_all(void);
18extern void local_flush_tlb_mm(struct mm_struct *);
19extern void local_flush_tlb_page(struct vm_area_struct *, unsigned long);
20extern void local_flush_tlb_range(struct vm_area_struct *, unsigned long,
21 unsigned long);
22
23#ifndef CONFIG_SMP
24#ifdef CONFIG_MMU
25#define flush_tlb_all() local_flush_tlb_all()
26#define flush_tlb_mm(mm) local_flush_tlb_mm(mm)
27#define flush_tlb_page(vma, page) local_flush_tlb_page(vma, page)
28#define flush_tlb_range(vma, start, end) \
29 local_flush_tlb_range(vma, start, end)
30#define flush_tlb_kernel_range(start, end) local_flush_tlb_all()
31#else /* CONFIG_MMU */
32#define flush_tlb_all() do { } while (0)
33#define flush_tlb_mm(mm) do { } while (0)
34#define flush_tlb_page(vma, vmaddr) do { } while (0)
35#define flush_tlb_range(vma, start, end) do { } while (0)
36#endif /* CONFIG_MMU */
37#else /* CONFIG_SMP */
38extern void smp_flush_tlb_all(void);
39extern void smp_flush_tlb_mm(struct mm_struct *);
40extern void smp_flush_tlb_page(struct vm_area_struct *, unsigned long);
41extern void smp_flush_tlb_range(struct vm_area_struct *, unsigned long,
42 unsigned long);
43
44#define flush_tlb_all() smp_flush_tlb_all()
45#define flush_tlb_mm(mm) smp_flush_tlb_mm(mm)
46#define flush_tlb_page(vma, page) smp_flush_tlb_page(vma, page)
47#define flush_tlb_range(vma, start, end) \
48 smp_flush_tlb_range(vma, start, end)
49#define flush_tlb_kernel_range(start, end) smp_flush_tlb_all()
50#endif /* CONFIG_SMP */
51
52static __inline__ void __flush_tlb_page(unsigned long page)
53{
54 unsigned int tmpreg0, tmpreg1, tmpreg2;
55
56 __asm__ __volatile__ (
57 "seth %0, #high(%4) \n\t"
58 "st %3, @(%5, %0) \n\t"
59 "ldi %1, #1 \n\t"
60 "st %1, @(%6, %0) \n\t"
61 "add3 %1, %0, %7 \n\t"
62 ".fillinsn \n"
63 "1: \n\t"
64 "ld %2, @(%6, %0) \n\t"
65 "bnez %2, 1b \n\t"
66 "ld %0, @%1+ \n\t"
67 "ld %1, @%1 \n\t"
68 "st %2, @+%0 \n\t"
69 "st %2, @+%1 \n\t"
70 : "=&r" (tmpreg0), "=&r" (tmpreg1), "=&r" (tmpreg2)
71 : "r" (page), "i" (MMU_REG_BASE), "i" (MSVA_offset),
72 "i" (MTOP_offset), "i" (MIDXI_offset)
73 : "memory"
74 );
75}
76
77static __inline__ void __flush_tlb_all(void)
78{
79 unsigned int tmpreg0, tmpreg1;
80
81 __asm__ __volatile__ (
82 "seth %0, #high(%2) \n\t"
83 "or3 %0, %0, #low(%2) \n\t"
84 "ldi %1, #0xc \n\t"
85 "st %1, @%0 \n\t"
86 ".fillinsn \n"
87 "1: \n\t"
88 "ld %1, @%0 \n\t"
89 "bnez %1, 1b \n\t"
90 : "=&r" (tmpreg0), "=&r" (tmpreg1)
91 : "i" (MTOP) : "memory"
92 );
93}
94
95extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
96
97#endif /* _ASM_M32R_TLBFLUSH_H */
diff --git a/arch/m32r/include/asm/topology.h b/arch/m32r/include/asm/topology.h
new file mode 100644
index 000000000000..d607eb32bd7e
--- /dev/null
+++ b/arch/m32r/include/asm/topology.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_M32R_TOPOLOGY_H
2#define _ASM_M32R_TOPOLOGY_H
3
4#include <asm-generic/topology.h>
5
6#endif /* _ASM_M32R_TOPOLOGY_H */
diff --git a/arch/m32r/include/asm/types.h b/arch/m32r/include/asm/types.h
new file mode 100644
index 000000000000..bc9f7fff0ac3
--- /dev/null
+++ b/arch/m32r/include/asm/types.h
@@ -0,0 +1,30 @@
1#ifndef _ASM_M32R_TYPES_H
2#define _ASM_M32R_TYPES_H
3
4#include <asm-generic/int-ll64.h>
5
6#ifndef __ASSEMBLY__
7
8typedef unsigned short umode_t;
9
10#endif /* __ASSEMBLY__ */
11
12/*
13 * These aren't exported outside the kernel to avoid name space clashes
14 */
15#ifdef __KERNEL__
16
17#define BITS_PER_LONG 32
18
19#ifndef __ASSEMBLY__
20
21/* DMA addresses are 32-bits wide. */
22
23typedef u32 dma_addr_t;
24typedef u64 dma64_addr_t;
25
26#endif /* __ASSEMBLY__ */
27
28#endif /* __KERNEL__ */
29
30#endif /* _ASM_M32R_TYPES_H */
diff --git a/arch/m32r/include/asm/uaccess.h b/arch/m32r/include/asm/uaccess.h
new file mode 100644
index 000000000000..1c7047bea200
--- /dev/null
+++ b/arch/m32r/include/asm/uaccess.h
@@ -0,0 +1,693 @@
1#ifndef _ASM_M32R_UACCESS_H
2#define _ASM_M32R_UACCESS_H
3
4/*
5 * linux/include/asm-m32r/uaccess.h
6 *
7 * M32R version.
8 * Copyright (C) 2004, 2006 Hirokazu Takata <takata at linux-m32r.org>
9 */
10
11/*
12 * User space memory access functions
13 */
14#include <linux/errno.h>
15#include <linux/thread_info.h>
16#include <asm/page.h>
17#include <asm/setup.h>
18
19#define VERIFY_READ 0
20#define VERIFY_WRITE 1
21
22/*
23 * The fs value determines whether argument validity checking should be
24 * performed or not. If get_fs() == USER_DS, checking is performed, with
25 * get_fs() == KERNEL_DS, checking is bypassed.
26 *
27 * For historical reasons, these macros are grossly misnamed.
28 */
29
30#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) })
31
32#ifdef CONFIG_MMU
33
34#define KERNEL_DS MAKE_MM_SEG(0xFFFFFFFF)
35#define USER_DS MAKE_MM_SEG(PAGE_OFFSET)
36#define get_ds() (KERNEL_DS)
37#define get_fs() (current_thread_info()->addr_limit)
38#define set_fs(x) (current_thread_info()->addr_limit = (x))
39
40#else /* not CONFIG_MMU */
41
42#define KERNEL_DS MAKE_MM_SEG(0xFFFFFFFF)
43#define USER_DS MAKE_MM_SEG(0xFFFFFFFF)
44#define get_ds() (KERNEL_DS)
45
46static inline mm_segment_t get_fs(void)
47{
48 return USER_DS;
49}
50
51static inline void set_fs(mm_segment_t s)
52{
53}
54
55#endif /* not CONFIG_MMU */
56
57#define segment_eq(a,b) ((a).seg == (b).seg)
58
59#define __addr_ok(addr) \
60 ((unsigned long)(addr) < (current_thread_info()->addr_limit.seg))
61
62/*
63 * Test whether a block of memory is a valid user space address.
64 * Returns 0 if the range is valid, nonzero otherwise.
65 *
66 * This is equivalent to the following test:
67 * (u33)addr + (u33)size >= (u33)current->addr_limit.seg
68 *
69 * This needs 33-bit arithmetic. We have a carry...
70 */
71#define __range_ok(addr,size) ({ \
72 unsigned long flag, roksum; \
73 __chk_user_ptr(addr); \
74 asm ( \
75 " cmpu %1, %1 ; clear cbit\n" \
76 " addx %1, %3 ; set cbit if overflow\n" \
77 " subx %0, %0\n" \
78 " cmpu %4, %1\n" \
79 " subx %0, %5\n" \
80 : "=&r" (flag), "=r" (roksum) \
81 : "1" (addr), "r" ((int)(size)), \
82 "r" (current_thread_info()->addr_limit.seg), "r" (0) \
83 : "cbit" ); \
84 flag; })
85
86/**
87 * access_ok: - Checks if a user space pointer is valid
88 * @type: Type of access: %VERIFY_READ or %VERIFY_WRITE. Note that
89 * %VERIFY_WRITE is a superset of %VERIFY_READ - if it is safe
90 * to write to a block, it is always safe to read from it.
91 * @addr: User space pointer to start of block to check
92 * @size: Size of block to check
93 *
94 * Context: User context only. This function may sleep.
95 *
96 * Checks if a pointer to a block of memory in user space is valid.
97 *
98 * Returns true (nonzero) if the memory block may be valid, false (zero)
99 * if it is definitely invalid.
100 *
101 * Note that, depending on architecture, this function probably just
102 * checks that the pointer is in the user space range - after calling
103 * this function, memory access functions may still return -EFAULT.
104 */
105#ifdef CONFIG_MMU
106#define access_ok(type,addr,size) (likely(__range_ok(addr,size) == 0))
107#else
108static inline int access_ok(int type, const void *addr, unsigned long size)
109{
110 unsigned long val = (unsigned long)addr;
111
112 return ((val >= memory_start) && ((val + size) < memory_end));
113}
114#endif /* CONFIG_MMU */
115
116/*
117 * The exception table consists of pairs of addresses: the first is the
118 * address of an instruction that is allowed to fault, and the second is
119 * the address at which the program should continue. No registers are
120 * modified, so it is entirely up to the continuation code to figure out
121 * what to do.
122 *
123 * All the routines below use bits of fixup code that are out of line
124 * with the main instruction path. This means when everything is well,
125 * we don't even have to jump over them. Further, they do not intrude
126 * on our cache or tlb entries.
127 */
128
129struct exception_table_entry
130{
131 unsigned long insn, fixup;
132};
133
134extern int fixup_exception(struct pt_regs *regs);
135
136/*
137 * These are the main single-value transfer routines. They automatically
138 * use the right size if we just have the right pointer type.
139 *
140 * This gets kind of ugly. We want to return _two_ values in "get_user()"
141 * and yet we don't want to do any pointers, because that is too much
142 * of a performance impact. Thus we have a few rather ugly macros here,
143 * and hide all the uglyness from the user.
144 *
145 * The "__xxx" versions of the user access functions are versions that
146 * do not verify the address space, that must have been done previously
147 * with a separate "access_ok()" call (this is used when we do multiple
148 * accesses to the same area of user memory).
149 */
150
151/* Careful: we have to cast the result to the type of the pointer for sign
152 reasons */
153/**
154 * get_user: - Get a simple variable from user space.
155 * @x: Variable to store result.
156 * @ptr: Source address, in user space.
157 *
158 * Context: User context only. This function may sleep.
159 *
160 * This macro copies a single simple variable from user space to kernel
161 * space. It supports simple types like char and int, but not larger
162 * data types like structures or arrays.
163 *
164 * @ptr must have pointer-to-simple-variable type, and the result of
165 * dereferencing @ptr must be assignable to @x without a cast.
166 *
167 * Returns zero on success, or -EFAULT on error.
168 * On error, the variable @x is set to zero.
169 */
170#define get_user(x,ptr) \
171 __get_user_check((x),(ptr),sizeof(*(ptr)))
172
173/**
174 * put_user: - Write a simple value into user space.
175 * @x: Value to copy to user space.
176 * @ptr: Destination address, in user space.
177 *
178 * Context: User context only. This function may sleep.
179 *
180 * This macro copies a single simple value from kernel space to user
181 * space. It supports simple types like char and int, but not larger
182 * data types like structures or arrays.
183 *
184 * @ptr must have pointer-to-simple-variable type, and @x must be assignable
185 * to the result of dereferencing @ptr.
186 *
187 * Returns zero on success, or -EFAULT on error.
188 */
189#define put_user(x,ptr) \
190 __put_user_check((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr)))
191
192/**
193 * __get_user: - Get a simple variable from user space, with less checking.
194 * @x: Variable to store result.
195 * @ptr: Source address, in user space.
196 *
197 * Context: User context only. This function may sleep.
198 *
199 * This macro copies a single simple variable from user space to kernel
200 * space. It supports simple types like char and int, but not larger
201 * data types like structures or arrays.
202 *
203 * @ptr must have pointer-to-simple-variable type, and the result of
204 * dereferencing @ptr must be assignable to @x without a cast.
205 *
206 * Caller must check the pointer with access_ok() before calling this
207 * function.
208 *
209 * Returns zero on success, or -EFAULT on error.
210 * On error, the variable @x is set to zero.
211 */
212#define __get_user(x,ptr) \
213 __get_user_nocheck((x),(ptr),sizeof(*(ptr)))
214
215#define __get_user_nocheck(x,ptr,size) \
216({ \
217 long __gu_err = 0; \
218 unsigned long __gu_val; \
219 might_sleep(); \
220 __get_user_size(__gu_val,(ptr),(size),__gu_err); \
221 (x) = (__typeof__(*(ptr)))__gu_val; \
222 __gu_err; \
223})
224
225#define __get_user_check(x,ptr,size) \
226({ \
227 long __gu_err = -EFAULT; \
228 unsigned long __gu_val = 0; \
229 const __typeof__(*(ptr)) __user *__gu_addr = (ptr); \
230 might_sleep(); \
231 if (access_ok(VERIFY_READ,__gu_addr,size)) \
232 __get_user_size(__gu_val,__gu_addr,(size),__gu_err); \
233 (x) = (__typeof__(*(ptr)))__gu_val; \
234 __gu_err; \
235})
236
237extern long __get_user_bad(void);
238
239#define __get_user_size(x,ptr,size,retval) \
240do { \
241 retval = 0; \
242 __chk_user_ptr(ptr); \
243 switch (size) { \
244 case 1: __get_user_asm(x,ptr,retval,"ub"); break; \
245 case 2: __get_user_asm(x,ptr,retval,"uh"); break; \
246 case 4: __get_user_asm(x,ptr,retval,""); break; \
247 default: (x) = __get_user_bad(); \
248 } \
249} while (0)
250
251#define __get_user_asm(x, addr, err, itype) \
252 __asm__ __volatile__( \
253 " .fillinsn\n" \
254 "1: ld"itype" %1,@%2\n" \
255 " .fillinsn\n" \
256 "2:\n" \
257 ".section .fixup,\"ax\"\n" \
258 " .balign 4\n" \
259 "3: ldi %0,%3\n" \
260 " seth r14,#high(2b)\n" \
261 " or3 r14,r14,#low(2b)\n" \
262 " jmp r14\n" \
263 ".previous\n" \
264 ".section __ex_table,\"a\"\n" \
265 " .balign 4\n" \
266 " .long 1b,3b\n" \
267 ".previous" \
268 : "=&r" (err), "=&r" (x) \
269 : "r" (addr), "i" (-EFAULT), "0" (err) \
270 : "r14", "memory")
271
272/**
273 * __put_user: - Write a simple value into user space, with less checking.
274 * @x: Value to copy to user space.
275 * @ptr: Destination address, in user space.
276 *
277 * Context: User context only. This function may sleep.
278 *
279 * This macro copies a single simple value from kernel space to user
280 * space. It supports simple types like char and int, but not larger
281 * data types like structures or arrays.
282 *
283 * @ptr must have pointer-to-simple-variable type, and @x must be assignable
284 * to the result of dereferencing @ptr.
285 *
286 * Caller must check the pointer with access_ok() before calling this
287 * function.
288 *
289 * Returns zero on success, or -EFAULT on error.
290 */
291#define __put_user(x,ptr) \
292 __put_user_nocheck((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr)))
293
294
295#define __put_user_nocheck(x,ptr,size) \
296({ \
297 long __pu_err; \
298 might_sleep(); \
299 __put_user_size((x),(ptr),(size),__pu_err); \
300 __pu_err; \
301})
302
303
304#define __put_user_check(x,ptr,size) \
305({ \
306 long __pu_err = -EFAULT; \
307 __typeof__(*(ptr)) __user *__pu_addr = (ptr); \
308 might_sleep(); \
309 if (access_ok(VERIFY_WRITE,__pu_addr,size)) \
310 __put_user_size((x),__pu_addr,(size),__pu_err); \
311 __pu_err; \
312})
313
314#if defined(__LITTLE_ENDIAN__)
315#define __put_user_u64(x, addr, err) \
316 __asm__ __volatile__( \
317 " .fillinsn\n" \
318 "1: st %L1,@%2\n" \
319 " .fillinsn\n" \
320 "2: st %H1,@(4,%2)\n" \
321 " .fillinsn\n" \
322 "3:\n" \
323 ".section .fixup,\"ax\"\n" \
324 " .balign 4\n" \
325 "4: ldi %0,%3\n" \
326 " seth r14,#high(3b)\n" \
327 " or3 r14,r14,#low(3b)\n" \
328 " jmp r14\n" \
329 ".previous\n" \
330 ".section __ex_table,\"a\"\n" \
331 " .balign 4\n" \
332 " .long 1b,4b\n" \
333 " .long 2b,4b\n" \
334 ".previous" \
335 : "=&r" (err) \
336 : "r" (x), "r" (addr), "i" (-EFAULT), "0" (err) \
337 : "r14", "memory")
338
339#elif defined(__BIG_ENDIAN__)
340#define __put_user_u64(x, addr, err) \
341 __asm__ __volatile__( \
342 " .fillinsn\n" \
343 "1: st %H1,@%2\n" \
344 " .fillinsn\n" \
345 "2: st %L1,@(4,%2)\n" \
346 " .fillinsn\n" \
347 "3:\n" \
348 ".section .fixup,\"ax\"\n" \
349 " .balign 4\n" \
350 "4: ldi %0,%3\n" \
351 " seth r14,#high(3b)\n" \
352 " or3 r14,r14,#low(3b)\n" \
353 " jmp r14\n" \
354 ".previous\n" \
355 ".section __ex_table,\"a\"\n" \
356 " .balign 4\n" \
357 " .long 1b,4b\n" \
358 " .long 2b,4b\n" \
359 ".previous" \
360 : "=&r" (err) \
361 : "r" (x), "r" (addr), "i" (-EFAULT), "0" (err) \
362 : "r14", "memory")
363#else
364#error no endian defined
365#endif
366
367extern void __put_user_bad(void);
368
369#define __put_user_size(x,ptr,size,retval) \
370do { \
371 retval = 0; \
372 __chk_user_ptr(ptr); \
373 switch (size) { \
374 case 1: __put_user_asm(x,ptr,retval,"b"); break; \
375 case 2: __put_user_asm(x,ptr,retval,"h"); break; \
376 case 4: __put_user_asm(x,ptr,retval,""); break; \
377 case 8: __put_user_u64((__typeof__(*ptr))(x),ptr,retval); break;\
378 default: __put_user_bad(); \
379 } \
380} while (0)
381
382struct __large_struct { unsigned long buf[100]; };
383#define __m(x) (*(struct __large_struct *)(x))
384
385/*
386 * Tell gcc we read from memory instead of writing: this is because
387 * we do not write to any memory gcc knows about, so there are no
388 * aliasing issues.
389 */
390#define __put_user_asm(x, addr, err, itype) \
391 __asm__ __volatile__( \
392 " .fillinsn\n" \
393 "1: st"itype" %1,@%2\n" \
394 " .fillinsn\n" \
395 "2:\n" \
396 ".section .fixup,\"ax\"\n" \
397 " .balign 4\n" \
398 "3: ldi %0,%3\n" \
399 " seth r14,#high(2b)\n" \
400 " or3 r14,r14,#low(2b)\n" \
401 " jmp r14\n" \
402 ".previous\n" \
403 ".section __ex_table,\"a\"\n" \
404 " .balign 4\n" \
405 " .long 1b,3b\n" \
406 ".previous" \
407 : "=&r" (err) \
408 : "r" (x), "r" (addr), "i" (-EFAULT), "0" (err) \
409 : "r14", "memory")
410
411/*
412 * Here we special-case 1, 2 and 4-byte copy_*_user invocations. On a fault
413 * we return the initial request size (1, 2 or 4), as copy_*_user should do.
414 * If a store crosses a page boundary and gets a fault, the m32r will not write
415 * anything, so this is accurate.
416 */
417
418/*
419 * Copy To/From Userspace
420 */
421
422/* Generic arbitrary sized copy. */
423/* Return the number of bytes NOT copied. */
424#define __copy_user(to,from,size) \
425do { \
426 unsigned long __dst, __src, __c; \
427 __asm__ __volatile__ ( \
428 " mv r14, %0\n" \
429 " or r14, %1\n" \
430 " beq %0, %1, 9f\n" \
431 " beqz %2, 9f\n" \
432 " and3 r14, r14, #3\n" \
433 " bnez r14, 2f\n" \
434 " and3 %2, %2, #3\n" \
435 " beqz %3, 2f\n" \
436 " addi %0, #-4 ; word_copy \n" \
437 " .fillinsn\n" \
438 "0: ld r14, @%1+\n" \
439 " addi %3, #-1\n" \
440 " .fillinsn\n" \
441 "1: st r14, @+%0\n" \
442 " bnez %3, 0b\n" \
443 " beqz %2, 9f\n" \
444 " addi %0, #4\n" \
445 " .fillinsn\n" \
446 "2: ldb r14, @%1 ; byte_copy \n" \
447 " .fillinsn\n" \
448 "3: stb r14, @%0\n" \
449 " addi %1, #1\n" \
450 " addi %2, #-1\n" \
451 " addi %0, #1\n" \
452 " bnez %2, 2b\n" \
453 " .fillinsn\n" \
454 "9:\n" \
455 ".section .fixup,\"ax\"\n" \
456 " .balign 4\n" \
457 "5: addi %3, #1\n" \
458 " addi %1, #-4\n" \
459 " .fillinsn\n" \
460 "6: slli %3, #2\n" \
461 " add %2, %3\n" \
462 " addi %0, #4\n" \
463 " .fillinsn\n" \
464 "7: seth r14, #high(9b)\n" \
465 " or3 r14, r14, #low(9b)\n" \
466 " jmp r14\n" \
467 ".previous\n" \
468 ".section __ex_table,\"a\"\n" \
469 " .balign 4\n" \
470 " .long 0b,6b\n" \
471 " .long 1b,5b\n" \
472 " .long 2b,9b\n" \
473 " .long 3b,9b\n" \
474 ".previous\n" \
475 : "=&r" (__dst), "=&r" (__src), "=&r" (size), \
476 "=&r" (__c) \
477 : "0" (to), "1" (from), "2" (size), "3" (size / 4) \
478 : "r14", "memory"); \
479} while (0)
480
481#define __copy_user_zeroing(to,from,size) \
482do { \
483 unsigned long __dst, __src, __c; \
484 __asm__ __volatile__ ( \
485 " mv r14, %0\n" \
486 " or r14, %1\n" \
487 " beq %0, %1, 9f\n" \
488 " beqz %2, 9f\n" \
489 " and3 r14, r14, #3\n" \
490 " bnez r14, 2f\n" \
491 " and3 %2, %2, #3\n" \
492 " beqz %3, 2f\n" \
493 " addi %0, #-4 ; word_copy \n" \
494 " .fillinsn\n" \
495 "0: ld r14, @%1+\n" \
496 " addi %3, #-1\n" \
497 " .fillinsn\n" \
498 "1: st r14, @+%0\n" \
499 " bnez %3, 0b\n" \
500 " beqz %2, 9f\n" \
501 " addi %0, #4\n" \
502 " .fillinsn\n" \
503 "2: ldb r14, @%1 ; byte_copy \n" \
504 " .fillinsn\n" \
505 "3: stb r14, @%0\n" \
506 " addi %1, #1\n" \
507 " addi %2, #-1\n" \
508 " addi %0, #1\n" \
509 " bnez %2, 2b\n" \
510 " .fillinsn\n" \
511 "9:\n" \
512 ".section .fixup,\"ax\"\n" \
513 " .balign 4\n" \
514 "5: addi %3, #1\n" \
515 " addi %1, #-4\n" \
516 " .fillinsn\n" \
517 "6: slli %3, #2\n" \
518 " add %2, %3\n" \
519 " addi %0, #4\n" \
520 " .fillinsn\n" \
521 "7: ldi r14, #0 ; store zero \n" \
522 " .fillinsn\n" \
523 "8: addi %2, #-1\n" \
524 " stb r14, @%0 ; ACE? \n" \
525 " addi %0, #1\n" \
526 " bnez %2, 8b\n" \
527 " seth r14, #high(9b)\n" \
528 " or3 r14, r14, #low(9b)\n" \
529 " jmp r14\n" \
530 ".previous\n" \
531 ".section __ex_table,\"a\"\n" \
532 " .balign 4\n" \
533 " .long 0b,6b\n" \
534 " .long 1b,5b\n" \
535 " .long 2b,7b\n" \
536 " .long 3b,7b\n" \
537 ".previous\n" \
538 : "=&r" (__dst), "=&r" (__src), "=&r" (size), \
539 "=&r" (__c) \
540 : "0" (to), "1" (from), "2" (size), "3" (size / 4) \
541 : "r14", "memory"); \
542} while (0)
543
544
545/* We let the __ versions of copy_from/to_user inline, because they're often
546 * used in fast paths and have only a small space overhead.
547 */
548static inline unsigned long __generic_copy_from_user_nocheck(void *to,
549 const void __user *from, unsigned long n)
550{
551 __copy_user_zeroing(to,from,n);
552 return n;
553}
554
555static inline unsigned long __generic_copy_to_user_nocheck(void __user *to,
556 const void *from, unsigned long n)
557{
558 __copy_user(to,from,n);
559 return n;
560}
561
562unsigned long __generic_copy_to_user(void __user *, const void *, unsigned long);
563unsigned long __generic_copy_from_user(void *, const void __user *, unsigned long);
564
565/**
566 * __copy_to_user: - Copy a block of data into user space, with less checking.
567 * @to: Destination address, in user space.
568 * @from: Source address, in kernel space.
569 * @n: Number of bytes to copy.
570 *
571 * Context: User context only. This function may sleep.
572 *
573 * Copy data from kernel space to user space. Caller must check
574 * the specified block with access_ok() before calling this function.
575 *
576 * Returns number of bytes that could not be copied.
577 * On success, this will be zero.
578 */
579#define __copy_to_user(to,from,n) \
580 __generic_copy_to_user_nocheck((to),(from),(n))
581
582#define __copy_to_user_inatomic __copy_to_user
583#define __copy_from_user_inatomic __copy_from_user
584
585/**
586 * copy_to_user: - Copy a block of data into user space.
587 * @to: Destination address, in user space.
588 * @from: Source address, in kernel space.
589 * @n: Number of bytes to copy.
590 *
591 * Context: User context only. This function may sleep.
592 *
593 * Copy data from kernel space to user space.
594 *
595 * Returns number of bytes that could not be copied.
596 * On success, this will be zero.
597 */
598#define copy_to_user(to,from,n) \
599({ \
600 might_sleep(); \
601 __generic_copy_to_user((to),(from),(n)); \
602})
603
604/**
605 * __copy_from_user: - Copy a block of data from user space, with less checking. * @to: Destination address, in kernel space.
606 * @from: Source address, in user space.
607 * @n: Number of bytes to copy.
608 *
609 * Context: User context only. This function may sleep.
610 *
611 * Copy data from user space to kernel space. Caller must check
612 * the specified block with access_ok() before calling this function.
613 *
614 * Returns number of bytes that could not be copied.
615 * On success, this will be zero.
616 *
617 * If some data could not be copied, this function will pad the copied
618 * data to the requested size using zero bytes.
619 */
620#define __copy_from_user(to,from,n) \
621 __generic_copy_from_user_nocheck((to),(from),(n))
622
623/**
624 * copy_from_user: - Copy a block of data from user space.
625 * @to: Destination address, in kernel space.
626 * @from: Source address, in user space.
627 * @n: Number of bytes to copy.
628 *
629 * Context: User context only. This function may sleep.
630 *
631 * Copy data from user space to kernel space.
632 *
633 * Returns number of bytes that could not be copied.
634 * On success, this will be zero.
635 *
636 * If some data could not be copied, this function will pad the copied
637 * data to the requested size using zero bytes.
638 */
639#define copy_from_user(to,from,n) \
640({ \
641 might_sleep(); \
642 __generic_copy_from_user((to),(from),(n)); \
643})
644
645long __must_check strncpy_from_user(char *dst, const char __user *src,
646 long count);
647long __must_check __strncpy_from_user(char *dst,
648 const char __user *src, long count);
649
650/**
651 * __clear_user: - Zero a block of memory in user space, with less checking.
652 * @to: Destination address, in user space.
653 * @n: Number of bytes to zero.
654 *
655 * Zero a block of memory in user space. Caller must check
656 * the specified block with access_ok() before calling this function.
657 *
658 * Returns number of bytes that could not be cleared.
659 * On success, this will be zero.
660 */
661unsigned long __clear_user(void __user *mem, unsigned long len);
662
663/**
664 * clear_user: - Zero a block of memory in user space.
665 * @to: Destination address, in user space.
666 * @n: Number of bytes to zero.
667 *
668 * Zero a block of memory in user space. Caller must check
669 * the specified block with access_ok() before calling this function.
670 *
671 * Returns number of bytes that could not be cleared.
672 * On success, this will be zero.
673 */
674unsigned long clear_user(void __user *mem, unsigned long len);
675
676/**
677 * strlen_user: - Get the size of a string in user space.
678 * @str: The string to measure.
679 *
680 * Context: User context only. This function may sleep.
681 *
682 * Get the size of a NUL-terminated string in user space.
683 *
684 * Returns the size of the string INCLUDING the terminating NUL.
685 * On exception, returns 0.
686 *
687 * If there is a limit on the length of a valid string, you may wish to
688 * consider using strnlen_user() instead.
689 */
690#define strlen_user(str) strnlen_user(str, ~0UL >> 1)
691long strnlen_user(const char __user *str, long n);
692
693#endif /* _ASM_M32R_UACCESS_H */
diff --git a/arch/m32r/include/asm/ucontext.h b/arch/m32r/include/asm/ucontext.h
new file mode 100644
index 000000000000..09324741eec3
--- /dev/null
+++ b/arch/m32r/include/asm/ucontext.h
@@ -0,0 +1,12 @@
1#ifndef _ASM_M32R_UCONTEXT_H
2#define _ASM_M32R_UCONTEXT_H
3
4struct ucontext {
5 unsigned long uc_flags;
6 struct ucontext *uc_link;
7 stack_t uc_stack;
8 struct sigcontext uc_mcontext;
9 sigset_t uc_sigmask; /* mask last for extensibility */
10};
11
12#endif /* _ASM_M32R_UCONTEXT_H */
diff --git a/arch/m32r/include/asm/unaligned.h b/arch/m32r/include/asm/unaligned.h
new file mode 100644
index 000000000000..377eb20d1ec6
--- /dev/null
+++ b/arch/m32r/include/asm/unaligned.h
@@ -0,0 +1,18 @@
1#ifndef _ASM_M32R_UNALIGNED_H
2#define _ASM_M32R_UNALIGNED_H
3
4#if defined(__LITTLE_ENDIAN__)
5# include <linux/unaligned/le_memmove.h>
6# include <linux/unaligned/be_byteshift.h>
7# include <linux/unaligned/generic.h>
8# define get_unaligned __get_unaligned_le
9# define put_unaligned __put_unaligned_le
10#else
11# include <linux/unaligned/be_memmove.h>
12# include <linux/unaligned/le_byteshift.h>
13# include <linux/unaligned/generic.h>
14# define get_unaligned __get_unaligned_be
15# define put_unaligned __put_unaligned_be
16#endif
17
18#endif /* _ASM_M32R_UNALIGNED_H */
diff --git a/arch/m32r/include/asm/unistd.h b/arch/m32r/include/asm/unistd.h
new file mode 100644
index 000000000000..cf701c933249
--- /dev/null
+++ b/arch/m32r/include/asm/unistd.h
@@ -0,0 +1,389 @@
1#ifndef _ASM_M32R_UNISTD_H
2#define _ASM_M32R_UNISTD_H
3
4/*
5 * This file contains the system call numbers.
6 */
7
8#define __NR_restart_syscall 0
9#define __NR_exit 1
10#define __NR_fork 2
11#define __NR_read 3
12#define __NR_write 4
13#define __NR_open 5
14#define __NR_close 6
15#define __NR_waitpid 7
16#define __NR_creat 8
17#define __NR_link 9
18#define __NR_unlink 10
19#define __NR_execve 11
20#define __NR_chdir 12
21#define __NR_time 13
22#define __NR_mknod 14
23#define __NR_chmod 15
24/* 16 is unused */
25/* 17 is unused */
26/* 18 is unused */
27#define __NR_lseek 19
28#define __NR_getpid 20
29#define __NR_mount 21
30#define __NR_umount 22
31/* 23 is unused */
32/* 24 is unused */
33#define __NR_stime 25
34#define __NR_ptrace 26
35#define __NR_alarm 27
36/* 28 is unused */
37#define __NR_pause 29
38#define __NR_utime 30
39/* 31 is unused */
40#define __NR_cachectl 32 /* old #define __NR_gtty 32*/
41#define __NR_access 33
42/* 34 is unused */
43/* 35 is unused */
44#define __NR_sync 36
45#define __NR_kill 37
46#define __NR_rename 38
47#define __NR_mkdir 39
48#define __NR_rmdir 40
49#define __NR_dup 41
50#define __NR_pipe 42
51#define __NR_times 43
52/* 44 is unused */
53#define __NR_brk 45
54/* 46 is unused */
55/* 47 is unused (getgid16) */
56/* 48 is unused */
57/* 49 is unused */
58/* 50 is unused */
59#define __NR_acct 51
60#define __NR_umount2 52
61/* 53 is unused */
62#define __NR_ioctl 54
63/* 55 is unused (fcntl) */
64/* 56 is unused */
65#define __NR_setpgid 57
66/* 58 is unused */
67/* 59 is unused */
68#define __NR_umask 60
69#define __NR_chroot 61
70#define __NR_ustat 62
71#define __NR_dup2 63
72#define __NR_getppid 64
73#define __NR_getpgrp 65
74#define __NR_setsid 66
75/* 67 is unused */
76/* 68 is unused*/
77/* 69 is unused*/
78/* 70 is unused */
79/* 71 is unused */
80/* 72 is unused */
81/* 73 is unused */
82#define __NR_sethostname 74
83#define __NR_setrlimit 75
84/* 76 is unused (old getrlimit) */
85#define __NR_getrusage 77
86#define __NR_gettimeofday 78
87#define __NR_settimeofday 79
88/* 80 is unused */
89/* 81 is unused */
90/* 82 is unused */
91#define __NR_symlink 83
92/* 84 is unused */
93#define __NR_readlink 85
94#define __NR_uselib 86
95#define __NR_swapon 87
96#define __NR_reboot 88
97/* 89 is unused */
98/* 90 is unused */
99#define __NR_munmap 91
100#define __NR_truncate 92
101#define __NR_ftruncate 93
102#define __NR_fchmod 94
103/* 95 is unused */
104#define __NR_getpriority 96
105#define __NR_setpriority 97
106/* 98 is unused */
107#define __NR_statfs 99
108#define __NR_fstatfs 100
109/* 101 is unused */
110#define __NR_socketcall 102
111#define __NR_syslog 103
112#define __NR_setitimer 104
113#define __NR_getitimer 105
114#define __NR_stat 106
115#define __NR_lstat 107
116#define __NR_fstat 108
117/* 109 is unused */
118/* 110 is unused */
119#define __NR_vhangup 111
120/* 112 is unused */
121/* 113 is unused */
122#define __NR_wait4 114
123#define __NR_swapoff 115
124#define __NR_sysinfo 116
125#define __NR_ipc 117
126#define __NR_fsync 118
127/* 119 is unused */
128#define __NR_clone 120
129#define __NR_setdomainname 121
130#define __NR_uname 122
131/* 123 is unused */
132#define __NR_adjtimex 124
133#define __NR_mprotect 125
134/* 126 is unused */
135/* 127 is unused */
136#define __NR_init_module 128
137#define __NR_delete_module 129
138/* 130 is unused */
139#define __NR_quotactl 131
140#define __NR_getpgid 132
141#define __NR_fchdir 133
142#define __NR_bdflush 134
143#define __NR_sysfs 135
144#define __NR_personality 136
145/* 137 is unused */
146/* 138 is unused */
147/* 139 is unused */
148#define __NR__llseek 140
149#define __NR_getdents 141
150#define __NR__newselect 142
151#define __NR_flock 143
152#define __NR_msync 144
153#define __NR_readv 145
154#define __NR_writev 146
155#define __NR_getsid 147
156#define __NR_fdatasync 148
157#define __NR__sysctl 149
158#define __NR_mlock 150
159#define __NR_munlock 151
160#define __NR_mlockall 152
161#define __NR_munlockall 153
162#define __NR_sched_setparam 154
163#define __NR_sched_getparam 155
164#define __NR_sched_setscheduler 156
165#define __NR_sched_getscheduler 157
166#define __NR_sched_yield 158
167#define __NR_sched_get_priority_max 159
168#define __NR_sched_get_priority_min 160
169#define __NR_sched_rr_get_interval 161
170#define __NR_nanosleep 162
171#define __NR_mremap 163
172/* 164 is unused */
173/* 165 is unused */
174#define __NR_tas 166
175/* 167 is unused */
176#define __NR_poll 168
177#define __NR_nfsservctl 169
178/* 170 is unused */
179/* 171 is unused */
180#define __NR_prctl 172
181#define __NR_rt_sigreturn 173
182#define __NR_rt_sigaction 174
183#define __NR_rt_sigprocmask 175
184#define __NR_rt_sigpending 176
185#define __NR_rt_sigtimedwait 177
186#define __NR_rt_sigqueueinfo 178
187#define __NR_rt_sigsuspend 179
188#define __NR_pread64 180
189#define __NR_pwrite64 181
190/* 182 is unused */
191#define __NR_getcwd 183
192#define __NR_capget 184
193#define __NR_capset 185
194#define __NR_sigaltstack 186
195#define __NR_sendfile 187
196/* 188 is unused */
197/* 189 is unused */
198#define __NR_vfork 190
199#define __NR_ugetrlimit 191 /* SuS compliant getrlimit */
200#define __NR_mmap2 192
201#define __NR_truncate64 193
202#define __NR_ftruncate64 194
203#define __NR_stat64 195
204#define __NR_lstat64 196
205#define __NR_fstat64 197
206#define __NR_lchown32 198
207#define __NR_getuid32 199
208#define __NR_getgid32 200
209#define __NR_geteuid32 201
210#define __NR_getegid32 202
211#define __NR_setreuid32 203
212#define __NR_setregid32 204
213#define __NR_getgroups32 205
214#define __NR_setgroups32 206
215#define __NR_fchown32 207
216#define __NR_setresuid32 208
217#define __NR_getresuid32 209
218#define __NR_setresgid32 210
219#define __NR_getresgid32 211
220#define __NR_chown32 212
221#define __NR_setuid32 213
222#define __NR_setgid32 214
223#define __NR_setfsuid32 215
224#define __NR_setfsgid32 216
225#define __NR_pivot_root 217
226#define __NR_mincore 218
227#define __NR_madvise 219
228#define __NR_getdents64 220
229#define __NR_fcntl64 221
230/* 222 is unused */
231/* 223 is unused */
232#define __NR_gettid 224
233#define __NR_readahead 225
234#define __NR_setxattr 226
235#define __NR_lsetxattr 227
236#define __NR_fsetxattr 228
237#define __NR_getxattr 229
238#define __NR_lgetxattr 230
239#define __NR_fgetxattr 231
240#define __NR_listxattr 232
241#define __NR_llistxattr 233
242#define __NR_flistxattr 234
243#define __NR_removexattr 235
244#define __NR_lremovexattr 236
245#define __NR_fremovexattr 237
246#define __NR_tkill 238
247#define __NR_sendfile64 239
248#define __NR_futex 240
249#define __NR_sched_setaffinity 241
250#define __NR_sched_getaffinity 242
251#define __NR_set_thread_area 243
252#define __NR_get_thread_area 244
253#define __NR_io_setup 245
254#define __NR_io_destroy 246
255#define __NR_io_getevents 247
256#define __NR_io_submit 248
257#define __NR_io_cancel 249
258#define __NR_fadvise64 250
259/* 251 is unused */
260#define __NR_exit_group 252
261#define __NR_lookup_dcookie 253
262#define __NR_epoll_create 254
263#define __NR_epoll_ctl 255
264#define __NR_epoll_wait 256
265#define __NR_remap_file_pages 257
266#define __NR_set_tid_address 258
267#define __NR_timer_create 259
268#define __NR_timer_settime (__NR_timer_create+1)
269#define __NR_timer_gettime (__NR_timer_create+2)
270#define __NR_timer_getoverrun (__NR_timer_create+3)
271#define __NR_timer_delete (__NR_timer_create+4)
272#define __NR_clock_settime (__NR_timer_create+5)
273#define __NR_clock_gettime (__NR_timer_create+6)
274#define __NR_clock_getres (__NR_timer_create+7)
275#define __NR_clock_nanosleep (__NR_timer_create+8)
276#define __NR_statfs64 268
277#define __NR_fstatfs64 269
278#define __NR_tgkill 270
279#define __NR_utimes 271
280#define __NR_fadvise64_64 272
281#define __NR_vserver 273
282#define __NR_mbind 274
283#define __NR_get_mempolicy 275
284#define __NR_set_mempolicy 276
285#define __NR_mq_open 277
286#define __NR_mq_unlink (__NR_mq_open+1)
287#define __NR_mq_timedsend (__NR_mq_open+2)
288#define __NR_mq_timedreceive (__NR_mq_open+3)
289#define __NR_mq_notify (__NR_mq_open+4)
290#define __NR_mq_getsetattr (__NR_mq_open+5)
291#define __NR_kexec_load 283
292#define __NR_waitid 284
293/* 285 is unused */
294#define __NR_add_key 286
295#define __NR_request_key 287
296#define __NR_keyctl 288
297#define __NR_ioprio_set 289
298#define __NR_ioprio_get 290
299#define __NR_inotify_init 291
300#define __NR_inotify_add_watch 292
301#define __NR_inotify_rm_watch 293
302#define __NR_migrate_pages 294
303#define __NR_openat 295
304#define __NR_mkdirat 296
305#define __NR_mknodat 297
306#define __NR_fchownat 298
307#define __NR_futimesat 299
308#define __NR_fstatat64 300
309#define __NR_unlinkat 301
310#define __NR_renameat 302
311#define __NR_linkat 303
312#define __NR_symlinkat 304
313#define __NR_readlinkat 305
314#define __NR_fchmodat 306
315#define __NR_faccessat 307
316#define __NR_pselect6 308
317#define __NR_ppoll 309
318#define __NR_unshare 310
319#define __NR_set_robust_list 311
320#define __NR_get_robust_list 312
321#define __NR_splice 313
322#define __NR_sync_file_range 314
323#define __NR_tee 315
324#define __NR_vmsplice 316
325#define __NR_move_pages 317
326#define __NR_getcpu 318
327#define __NR_epoll_pwait 319
328#define __NR_utimensat 320
329#define __NR_signalfd 321
330/* #define __NR_timerfd 322 removed */
331#define __NR_eventfd 323
332#define __NR_fallocate 324
333
334#ifdef __KERNEL__
335
336#define NR_syscalls 325
337
338#define __ARCH_WANT_IPC_PARSE_VERSION
339#define __ARCH_WANT_STAT64
340#define __ARCH_WANT_SYS_ALARM
341#define __ARCH_WANT_SYS_GETHOSTNAME
342#define __ARCH_WANT_SYS_PAUSE
343#define __ARCH_WANT_SYS_TIME
344#define __ARCH_WANT_SYS_UTIME
345#define __ARCH_WANT_SYS_WAITPID
346#define __ARCH_WANT_SYS_SOCKETCALL
347#define __ARCH_WANT_SYS_FADVISE64
348#define __ARCH_WANT_SYS_GETPGRP
349#define __ARCH_WANT_SYS_LLSEEK
350#define __ARCH_WANT_SYS_OLD_GETRLIMIT /*will be unused*/
351#define __ARCH_WANT_SYS_OLDUMOUNT
352#define __ARCH_WANT_SYS_RT_SIGACTION
353
354#define __IGNORE_lchown
355#define __IGNORE_setuid
356#define __IGNORE_getuid
357#define __IGNORE_setgid
358#define __IGNORE_getgid
359#define __IGNORE_geteuid
360#define __IGNORE_getegid
361#define __IGNORE_fcntl
362#define __IGNORE_setreuid
363#define __IGNORE_setregid
364#define __IGNORE_getrlimit
365#define __IGNORE_getgroups
366#define __IGNORE_setgroups
367#define __IGNORE_select
368#define __IGNORE_mmap
369#define __IGNORE_fchown
370#define __IGNORE_setfsuid
371#define __IGNORE_setfsgid
372#define __IGNORE_setresuid
373#define __IGNORE_getresuid
374#define __IGNORE_setresgid
375#define __IGNORE_getresgid
376#define __IGNORE_chown
377
378/*
379 * "Conditional" syscalls
380 *
381 * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
382 * but it doesn't work on all toolchains, so we just do it by hand
383 */
384#ifndef cond_syscall
385#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
386#endif
387
388#endif /* __KERNEL__ */
389#endif /* _ASM_M32R_UNISTD_H */
diff --git a/arch/m32r/include/asm/user.h b/arch/m32r/include/asm/user.h
new file mode 100644
index 000000000000..03b3c11c2aff
--- /dev/null
+++ b/arch/m32r/include/asm/user.h
@@ -0,0 +1,52 @@
1#ifndef _ASM_M32R_USER_H
2#define _ASM_M32R_USER_H
3
4#include <linux/types.h>
5#include <asm/ptrace.h>
6#include <asm/page.h>
7
8/*
9 * Core file format: The core file is written in such a way that gdb
10 * can understand it and provide useful information to the user (under
11 * linux we use the `trad-core' bfd).
12 *
13 * The actual file contents are as follows:
14 * UPAGE: 1 page consisting of a user struct that tells gdb
15 * what is present in the file. Directly after this is a
16 * copy of the task_struct, which is currently not used by gdb,
17 * but it may come in handy at some point. All of the registers
18 * are stored as part of the upage. The upage should always be
19 * only one page.
20 * DATA: The data area is stored. We use current->end_text to
21 * current->brk to pick up all of the user variables, plus any memory
22 * that may have been sbrk'ed. No attempt is made to determine if a
23 * page is demand-zero or if a page is totally unused, we just cover
24 * the entire range. All of the addresses are rounded in such a way
25 * that an integral number of pages is written.
26 * STACK: We need the stack information in order to get a meaningful
27 * backtrace. We need to write the data from usp to
28 * current->start_stack, so we round each of these off in order to be
29 * able to write an integer number of pages.
30 */
31
32struct user {
33 struct pt_regs regs; /* entire machine state */
34 size_t u_tsize; /* text size (pages) */
35 size_t u_dsize; /* data size (pages) */
36 size_t u_ssize; /* stack size (pages) */
37 unsigned long start_code; /* text starting address */
38 unsigned long start_data; /* data starting address */
39 unsigned long start_stack; /* stack starting address */
40 long int signal; /* signal causing core dump */
41 unsigned long u_ar0; /* help gdb find registers */
42 unsigned long magic; /* identifies a core file */
43 char u_comm[32]; /* user command name */
44};
45
46#define NBPG PAGE_SIZE
47#define UPAGES 1
48#define HOST_TEXT_START_ADDR (u.start_code)
49#define HOST_DATA_START_ADDR (u.start_data)
50#define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG)
51
52#endif /* _ASM_M32R_USER_H */
diff --git a/arch/m32r/include/asm/vga.h b/arch/m32r/include/asm/vga.h
new file mode 100644
index 000000000000..a1b63061c06f
--- /dev/null
+++ b/arch/m32r/include/asm/vga.h
@@ -0,0 +1,20 @@
1#ifndef _ASM_M32R_VGA_H
2#define _ASM_M32R_VGA_H
3
4/*
5 * Access to VGA videoram
6 *
7 * (c) 1998 Martin Mares <mj@ucw.cz>
8 */
9
10/*
11 * On the PC, we can just recalculate addresses and then
12 * access the videoram directly without any black magic.
13 */
14
15#define VGA_MAP_MEM(x,s) (unsigned long)phys_to_virt(x)
16
17#define vga_readb(x) (*(x))
18#define vga_writeb(x,y) (*(y) = (x))
19
20#endif /* _ASM_M32R_VGA_H */
diff --git a/arch/m32r/include/asm/xor.h b/arch/m32r/include/asm/xor.h
new file mode 100644
index 000000000000..6d525259df3e
--- /dev/null
+++ b/arch/m32r/include/asm/xor.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_M32R_XOR_H
2#define _ASM_M32R_XOR_H
3
4#include <asm-generic/xor.h>
5
6#endif /* _ASM_M32R_XOR_H */
diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig
new file mode 100644
index 000000000000..8cc312b5d4dc
--- /dev/null
+++ b/arch/microblaze/Kconfig
@@ -0,0 +1,141 @@
1# For a description of the syntax of this configuration file,
2# see Documentation/kbuild/kconfig-language.txt.
3
4mainmenu "Linux/Microblaze Kernel Configuration"
5
6config MICROBLAZE
7 def_bool y
8 select HAVE_LMB
9
10config SWAP
11 def_bool n
12
13config RWSEM_GENERIC_SPINLOCK
14 def_bool y
15
16config RWSEM_XCHGADD_ALGORITHM
17 bool
18
19config ARCH_HAS_ILOG2_U32
20 def_bool n
21
22config ARCH_HAS_ILOG2_U64
23 def_bool n
24
25config GENERIC_FIND_NEXT_BIT
26 def_bool y
27
28config GENERIC_HWEIGHT
29 def_bool y
30
31config GENERIC_HARDIRQS
32 def_bool y
33
34config GENERIC_IRQ_PROBE
35 def_bool y
36
37config GENERIC_CALIBRATE_DELAY
38 def_bool y
39
40config GENERIC_TIME
41 def_bool y
42
43config GENERIC_TIME_VSYSCALL
44 def_bool n
45
46config GENERIC_CLOCKEVENTS
47 def_bool y
48
49config GENERIC_HARDIRQS_NO__DO_IRQ
50 def_bool y
51
52config PCI
53 depends on !MMU
54 def_bool n
55
56config NO_DMA
57 depends on !MMU
58 def_bool n
59
60source "init/Kconfig"
61
62source "kernel/Kconfig.freezer"
63
64source "arch/microblaze/platform/Kconfig.platform"
65
66menu "Processor type and features"
67
68source kernel/time/Kconfig
69
70source "kernel/Kconfig.preempt"
71
72source "kernel/Kconfig.hz"
73
74config MMU
75 def_bool n
76
77config NO_MMU
78 bool
79 depends on !MMU
80 default y
81
82comment "Boot options"
83
84config CMDLINE_BOOL
85 bool "Default bootloader kernel arguments"
86
87config CMDLINE
88 string "Default kernel command string"
89 depends on CMDLINE_BOOL
90 default "console=ttyUL0,115200"
91 help
92 On some architectures there is currently no way for the boot loader
93 to pass arguments to the kernel. For these architectures, you should
94 supply some command-line options at build time by entering them
95 here.
96
97config CMDLINE_FORCE
98 bool "Force default kernel command string"
99 depends on CMDLINE_BOOL
100 default n
101 help
102 Set this to have arguments from the default kernel command string
103 override those passed by the boot loader.
104
105config OF
106 def_bool y
107
108config OF_DEVICE
109 def_bool y
110
111config PROC_DEVICETREE
112 bool "Support for device tree in /proc"
113 depends on PROC_FS
114 help
115 This option adds a device-tree directory under /proc which contains
116 an image of the device tree that the kernel copies from Open
117 Firmware or other boot firmware. If unsure, say Y here.
118
119endmenu
120
121source "mm/Kconfig"
122
123menu "Exectuable file formats"
124
125source "fs/Kconfig.binfmt"
126
127endmenu
128
129source "net/Kconfig"
130
131source "drivers/Kconfig"
132
133source "fs/Kconfig"
134
135source "arch/microblaze/Kconfig.debug"
136
137source "security/Kconfig"
138
139source "crypto/Kconfig"
140
141source "lib/Kconfig"
diff --git a/arch/microblaze/Kconfig.debug b/arch/microblaze/Kconfig.debug
new file mode 100644
index 000000000000..242cd35bdb4b
--- /dev/null
+++ b/arch/microblaze/Kconfig.debug
@@ -0,0 +1,26 @@
1# For a description of the syntax of this configuration file,
2# see Documentation/kbuild/kconfig-language.txt.
3
4menu "Kernel hacking"
5
6source "lib/Kconfig.debug"
7
8config EARLY_PRINTK
9 bool "Early printk function for kernel"
10 default n
11 help
12 This option turns on/off early printk messages to console.
13 First Uartlite node is taken.
14
15config HEART_BEAT
16 bool "Heart beat function for kernel"
17 default n
18 help
19 This option turns on/off heart beat kernel functionality.
20 First GPIO node is taken.
21
22config DEBUG_BOOTMEM
23 depends on DEBUG_KERNEL
24 bool "Debug BOOTMEM initialization"
25
26endmenu
diff --git a/arch/microblaze/Makefile b/arch/microblaze/Makefile
new file mode 100644
index 000000000000..0dcbb9832974
--- /dev/null
+++ b/arch/microblaze/Makefile
@@ -0,0 +1,69 @@
1UTS_SYSNAME = -DUTS_SYSNAME=\"uClinux\"
2
3# What CPU vesion are we building for, and crack it open
4# as major.minor.rev
5CPU_VER=$(subst ",,$(CONFIG_XILINX_MICROBLAZE0_HW_VER) )
6CPU_MAJOR=$(shell echo $(CPU_VER) | cut -d '.' -f 1)
7CPU_MINOR=$(shell echo $(CPU_VER) | cut -d '.' -f 2)
8CPU_REV=$(shell echo $(CPU_VER) | cut -d '.' -f 3)
9
10export CPU_VER CPU_MAJOR CPU_MINOR CPU_REV
11
12# Use cpu-related CONFIG_ vars to set compile options.
13
14# Work out HW multipler support. This is icky.
15# 1. Spartan2 has no HW multiplers.
16# 2. MicroBlaze v3.x always uses them, except in Spartan 2
17# 3. All other FPGa/CPU ver combos, we can trust the CONFIG_ settings
18ifeq (,$(findstring spartan2,$(CONFIG_XILINX_MICROBLAZE0_FAMILY)))
19 ifeq ($(CPU_MAJOR),3)
20 CPUFLAGS-1 += -mno-xl-soft-mul
21 else
22 # USE_HW_MUL can be 0, 1, or 2, defining a heirarchy of HW Mul support.
23 CPUFLAGS-$(subst 1,,$(CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL)) += -mxl-multiply-high
24 CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL) += -mno-xl-soft-mul
25 endif
26endif
27CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_DIV) += -mno-xl-soft-div
28CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_BARREL) += -mxl-barrel-shift
29CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_PCMP) += -mxl-pattern-compare
30
31CPUFLAGS-1 += $(call cc-option,-mcpu=v$(CPU_VER))
32
33# The various CONFIG_XILINX cpu features options are integers 0/1/2...
34# rather than bools y/n
35CFLAGS += $(CPUFLAGS-1)
36CFLAGS += $(CPUFLAGS-2)
37
38# r31 holds current when in kernel mode
39CFLAGS += -ffixed-r31
40
41LDFLAGS_BLOB := --format binary --oformat elf32-microblaze
42
43LIBGCC := $(shell $(CC) $(CFLAGS) -print-libgcc-file-name)
44
45head-y := arch/microblaze/kernel/head.o
46libs-y += arch/microblaze/lib/ $(LIBGCC)
47core-y += arch/microblaze/kernel/ arch/microblaze/mm/ \
48 arch/microblaze/platform/
49
50boot := arch/$(ARCH)/boot
51
52# defines filename extension depending memory management type
53ifeq ($(CONFIG_MMU),)
54MMUEXT := -nommu
55endif
56export MMUEXT
57
58all: linux.bin
59
60archclean:
61 $(Q)$(MAKE) $(clean)=$(boot)
62
63linux.bin linux.bin.gz: vmlinux
64 $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
65
66define archhelp
67 echo '* linux.bin - Create raw binary'
68 echo ' linux.bin.gz - Create compressed raw binary'
69endef
diff --git a/arch/microblaze/boot/Makefile b/arch/microblaze/boot/Makefile
new file mode 100644
index 000000000000..844edf406d34
--- /dev/null
+++ b/arch/microblaze/boot/Makefile
@@ -0,0 +1,17 @@
1#
2# arch/microblaze/boot/Makefile
3#
4
5targets := linux.bin linux.bin.gz
6
7OBJCOPYFLAGS_linux.bin := -O binary
8
9$(obj)/linux.bin: vmlinux FORCE
10 $(call if_changed,objcopy)
11 @echo 'Kernel: $@ is ready' ' (#'`cat .version`')'
12
13$(obj)/linux.bin.gz: $(obj)/linux.bin FORCE
14 $(call if_changed,gzip)
15 @echo 'Kernel: $@ is ready' ' (#'`cat .version`')'
16
17clean-kernel += linux.bin linux.bin.gz
diff --git a/arch/arm/configs/mx31ads_defconfig b/arch/microblaze/configs/nommu_defconfig
index e05271753e15..beb7ecd72793 100644
--- a/arch/arm/configs/mx31ads_defconfig
+++ b/arch/microblaze/configs/nommu_defconfig
@@ -1,30 +1,24 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.26-rc6 3# Linux kernel version: 2.6.29
4# Fri Jun 20 16:21:11 2008 4# Tue Mar 24 10:23:20 2009
5# 5#
6CONFIG_ARM=y 6CONFIG_MICROBLAZE=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y 7# CONFIG_SWAP is not set
8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y
10CONFIG_GENERIC_CLOCKEVENTS=y
11CONFIG_MMU=y
12# CONFIG_NO_IOPORT is not set
13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_STACKTRACE_SUPPORT=y
15CONFIG_LOCKDEP_SUPPORT=y
16CONFIG_TRACE_IRQFLAGS_SUPPORT=y
17CONFIG_HARDIRQS_SW_RESEND=y
18CONFIG_GENERIC_IRQ_PROBE=y
19CONFIG_RWSEM_GENERIC_SPINLOCK=y 8CONFIG_RWSEM_GENERIC_SPINLOCK=y
20# CONFIG_ARCH_HAS_ILOG2_U32 is not set 9# CONFIG_ARCH_HAS_ILOG2_U32 is not set
21# CONFIG_ARCH_HAS_ILOG2_U64 is not set 10# CONFIG_ARCH_HAS_ILOG2_U64 is not set
11CONFIG_GENERIC_FIND_NEXT_BIT=y
22CONFIG_GENERIC_HWEIGHT=y 12CONFIG_GENERIC_HWEIGHT=y
13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_GENERIC_IRQ_PROBE=y
23CONFIG_GENERIC_CALIBRATE_DELAY=y 15CONFIG_GENERIC_CALIBRATE_DELAY=y
24CONFIG_ARCH_SUPPORTS_AOUT=y 16CONFIG_GENERIC_TIME=y
25CONFIG_ZONE_DMA=y 17# CONFIG_GENERIC_TIME_VSYSCALL is not set
26CONFIG_ARCH_MTD_XIP=y 18CONFIG_GENERIC_CLOCKEVENTS=y
27CONFIG_VECTORS_BASE=0xffff0000 19CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
20# CONFIG_PCI is not set
21# CONFIG_NO_DMA is not set
28CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 22CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
29 23
30# 24#
@@ -32,26 +26,30 @@ CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
32# 26#
33CONFIG_EXPERIMENTAL=y 27CONFIG_EXPERIMENTAL=y
34CONFIG_BROKEN_ON_SMP=y 28CONFIG_BROKEN_ON_SMP=y
35CONFIG_LOCK_KERNEL=y
36CONFIG_INIT_ENV_ARG_LIMIT=32 29CONFIG_INIT_ENV_ARG_LIMIT=32
37CONFIG_LOCALVERSION="" 30CONFIG_LOCALVERSION=""
38CONFIG_LOCALVERSION_AUTO=y 31CONFIG_LOCALVERSION_AUTO=y
39CONFIG_SWAP=y
40CONFIG_SYSVIPC=y 32CONFIG_SYSVIPC=y
41CONFIG_SYSVIPC_SYSCTL=y 33CONFIG_SYSVIPC_SYSCTL=y
42# CONFIG_POSIX_MQUEUE is not set 34CONFIG_POSIX_MQUEUE=y
43# CONFIG_BSD_PROCESS_ACCT is not set 35CONFIG_BSD_PROCESS_ACCT=y
36CONFIG_BSD_PROCESS_ACCT_V3=y
44# CONFIG_TASKSTATS is not set 37# CONFIG_TASKSTATS is not set
45# CONFIG_AUDIT is not set 38# CONFIG_AUDIT is not set
39
40#
41# RCU Subsystem
42#
43CONFIG_CLASSIC_RCU=y
44# CONFIG_TREE_RCU is not set
45# CONFIG_PREEMPT_RCU is not set
46# CONFIG_TREE_RCU_TRACE is not set
47# CONFIG_PREEMPT_RCU_TRACE is not set
46CONFIG_IKCONFIG=y 48CONFIG_IKCONFIG=y
47CONFIG_IKCONFIG_PROC=y 49CONFIG_IKCONFIG_PROC=y
48CONFIG_LOG_BUF_SHIFT=14 50CONFIG_LOG_BUF_SHIFT=17
51# CONFIG_GROUP_SCHED is not set
49# CONFIG_CGROUPS is not set 52# CONFIG_CGROUPS is not set
50CONFIG_GROUP_SCHED=y
51CONFIG_FAIR_GROUP_SCHED=y
52# CONFIG_RT_GROUP_SCHED is not set
53CONFIG_USER_SCHED=y
54# CONFIG_CGROUP_SCHED is not set
55CONFIG_SYSFS_DEPRECATED=y 53CONFIG_SYSFS_DEPRECATED=y
56CONFIG_SYSFS_DEPRECATED_V2=y 54CONFIG_SYSFS_DEPRECATED_V2=y
57# CONFIG_RELAY is not set 55# CONFIG_RELAY is not set
@@ -59,53 +57,44 @@ CONFIG_SYSFS_DEPRECATED_V2=y
59# CONFIG_BLK_DEV_INITRD is not set 57# CONFIG_BLK_DEV_INITRD is not set
60CONFIG_CC_OPTIMIZE_FOR_SIZE=y 58CONFIG_CC_OPTIMIZE_FOR_SIZE=y
61CONFIG_SYSCTL=y 59CONFIG_SYSCTL=y
60CONFIG_ANON_INODES=y
62CONFIG_EMBEDDED=y 61CONFIG_EMBEDDED=y
63CONFIG_UID16=y
64CONFIG_SYSCTL_SYSCALL=y 62CONFIG_SYSCTL_SYSCALL=y
65CONFIG_SYSCTL_SYSCALL_CHECK=y
66CONFIG_KALLSYMS=y 63CONFIG_KALLSYMS=y
67# CONFIG_KALLSYMS_EXTRA_PASS is not set 64CONFIG_KALLSYMS_ALL=y
68CONFIG_HOTPLUG=y 65CONFIG_KALLSYMS_EXTRA_PASS=y
66# CONFIG_HOTPLUG is not set
69CONFIG_PRINTK=y 67CONFIG_PRINTK=y
70CONFIG_BUG=y 68CONFIG_BUG=y
71CONFIG_ELF_CORE=y 69CONFIG_ELF_CORE=y
72CONFIG_COMPAT_BRK=y 70# CONFIG_BASE_FULL is not set
73CONFIG_BASE_FULL=y
74CONFIG_FUTEX=y 71CONFIG_FUTEX=y
75CONFIG_ANON_INODES=y
76CONFIG_EPOLL=y 72CONFIG_EPOLL=y
77CONFIG_SIGNALFD=y 73CONFIG_SIGNALFD=y
78CONFIG_TIMERFD=y 74CONFIG_TIMERFD=y
79CONFIG_EVENTFD=y 75CONFIG_EVENTFD=y
80CONFIG_SHMEM=y 76CONFIG_AIO=y
81CONFIG_VM_EVENT_COUNTERS=y 77CONFIG_VM_EVENT_COUNTERS=y
78CONFIG_COMPAT_BRK=y
82CONFIG_SLAB=y 79CONFIG_SLAB=y
83# CONFIG_SLUB is not set 80# CONFIG_SLUB is not set
84# CONFIG_SLOB is not set 81# CONFIG_SLOB is not set
85# CONFIG_PROFILING is not set 82# CONFIG_PROFILING is not set
86# CONFIG_MARKERS is not set 83# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
87CONFIG_HAVE_OPROFILE=y
88# CONFIG_KPROBES is not set
89CONFIG_HAVE_KPROBES=y
90CONFIG_HAVE_KRETPROBES=y
91# CONFIG_HAVE_DMA_ATTRS is not set
92CONFIG_PROC_PAGE_MONITOR=y
93CONFIG_SLABINFO=y 84CONFIG_SLABINFO=y
94CONFIG_RT_MUTEXES=y 85CONFIG_RT_MUTEXES=y
95# CONFIG_TINY_SHMEM is not set 86CONFIG_BASE_SMALL=1
96CONFIG_BASE_SMALL=0
97CONFIG_MODULES=y 87CONFIG_MODULES=y
98# CONFIG_MODULE_FORCE_LOAD is not set 88# CONFIG_MODULE_FORCE_LOAD is not set
99CONFIG_MODULE_UNLOAD=y 89CONFIG_MODULE_UNLOAD=y
100CONFIG_MODULE_FORCE_UNLOAD=y 90# CONFIG_MODULE_FORCE_UNLOAD is not set
101CONFIG_MODVERSIONS=y 91# CONFIG_MODVERSIONS is not set
102# CONFIG_MODULE_SRCVERSION_ALL is not set 92# CONFIG_MODULE_SRCVERSION_ALL is not set
103CONFIG_KMOD=y
104CONFIG_BLOCK=y 93CONFIG_BLOCK=y
105# CONFIG_LBD is not set 94# CONFIG_LBD is not set
106# CONFIG_BLK_DEV_IO_TRACE is not set 95# CONFIG_BLK_DEV_IO_TRACE is not set
107# CONFIG_LSF is not set
108# CONFIG_BLK_DEV_BSG is not set 96# CONFIG_BLK_DEV_BSG is not set
97# CONFIG_BLK_DEV_INTEGRITY is not set
109 98
110# 99#
111# IO Schedulers 100# IO Schedulers
@@ -119,167 +108,79 @@ CONFIG_IOSCHED_CFQ=y
119CONFIG_DEFAULT_CFQ=y 108CONFIG_DEFAULT_CFQ=y
120# CONFIG_DEFAULT_NOOP is not set 109# CONFIG_DEFAULT_NOOP is not set
121CONFIG_DEFAULT_IOSCHED="cfq" 110CONFIG_DEFAULT_IOSCHED="cfq"
122CONFIG_CLASSIC_RCU=y 111# CONFIG_FREEZER is not set
123
124#
125# System Type
126#
127# CONFIG_ARCH_AAEC2000 is not set
128# CONFIG_ARCH_INTEGRATOR is not set
129# CONFIG_ARCH_REALVIEW is not set
130# CONFIG_ARCH_VERSATILE is not set
131# CONFIG_ARCH_AT91 is not set
132# CONFIG_ARCH_CLPS7500 is not set
133# CONFIG_ARCH_CLPS711X is not set
134# CONFIG_ARCH_CO285 is not set
135# CONFIG_ARCH_EBSA110 is not set
136# CONFIG_ARCH_EP93XX is not set
137# CONFIG_ARCH_FOOTBRIDGE is not set
138# CONFIG_ARCH_NETX is not set
139# CONFIG_ARCH_H720X is not set
140# CONFIG_ARCH_IMX is not set
141# CONFIG_ARCH_IOP13XX is not set
142# CONFIG_ARCH_IOP32X is not set
143# CONFIG_ARCH_IOP33X is not set
144# CONFIG_ARCH_IXP23XX is not set
145# CONFIG_ARCH_IXP2000 is not set
146# CONFIG_ARCH_IXP4XX is not set
147# CONFIG_ARCH_L7200 is not set
148# CONFIG_ARCH_KS8695 is not set
149# CONFIG_ARCH_NS9XXX is not set
150CONFIG_ARCH_MXC=y
151# CONFIG_ARCH_ORION5X is not set
152# CONFIG_ARCH_PNX4008 is not set
153# CONFIG_ARCH_PXA is not set
154# CONFIG_ARCH_RPC is not set
155# CONFIG_ARCH_SA1100 is not set
156# CONFIG_ARCH_S3C2410 is not set
157# CONFIG_ARCH_SHARK is not set
158# CONFIG_ARCH_LH7A40X is not set
159# CONFIG_ARCH_DAVINCI is not set
160# CONFIG_ARCH_OMAP is not set
161# CONFIG_ARCH_MSM7X00A is not set
162
163#
164# Boot options
165#
166
167#
168# Power management
169#
170 112
171# 113#
172# Freescale MXC Implementations 114# Platform options
173# 115#
174# CONFIG_ARCH_MX2 is not set 116CONFIG_PLATFORM_GENERIC=y
175CONFIG_ARCH_MX3=y 117# CONFIG_SELFMOD is not set
118# CONFIG_OPT_LIB_FUNCTION is not set
119# CONFIG_ALLOW_EDIT_AUTO is not set
120CONFIG_KERNEL_BASE_ADDR=0x90000000
121CONFIG_XILINX_MICROBLAZE0_FAMILY="virtex5"
122CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1
123CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR=1
124CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1
125CONFIG_XILINX_MICROBLAZE0_USE_DIV=1
126CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=2
127CONFIG_XILINX_MICROBLAZE0_USE_FPU=2
128CONFIG_XILINX_MICROBLAZE0_HW_VER="7.10.d"
176 129
177# 130#
178# MX3 Options 131# Processor type and features
179#
180CONFIG_MACH_MX31ADS=y
181# CONFIG_MACH_PCM037 is not set
182
183#
184# Processor Type
185#
186CONFIG_CPU_32=y
187CONFIG_CPU_V6=y
188# CONFIG_CPU_32v6K is not set
189CONFIG_CPU_32v6=y
190CONFIG_CPU_ABRT_EV6=y
191CONFIG_CPU_PABRT_NOIFAR=y
192CONFIG_CPU_CACHE_V6=y
193CONFIG_CPU_CACHE_VIPT=y
194CONFIG_CPU_COPY_V6=y
195CONFIG_CPU_TLB_V6=y
196CONFIG_CPU_HAS_ASID=y
197CONFIG_CPU_CP15=y
198CONFIG_CPU_CP15_MMU=y
199
200#
201# Processor Features
202#
203CONFIG_ARM_THUMB=y
204# CONFIG_CPU_ICACHE_DISABLE is not set
205# CONFIG_CPU_DCACHE_DISABLE is not set
206# CONFIG_CPU_BPREDICT_DISABLE is not set
207# CONFIG_OUTER_CACHE is not set
208
209#
210# Bus support
211#
212# CONFIG_PCI_SYSCALL is not set
213# CONFIG_ARCH_SUPPORTS_MSI is not set
214# CONFIG_PCCARD is not set
215
216#
217# Kernel Features
218# 132#
219CONFIG_TICK_ONESHOT=y 133CONFIG_TICK_ONESHOT=y
220CONFIG_NO_HZ=y 134# CONFIG_NO_HZ is not set
221CONFIG_HIGH_RES_TIMERS=y 135CONFIG_HIGH_RES_TIMERS=y
222CONFIG_GENERIC_CLOCKEVENTS_BUILD=y 136CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
223CONFIG_PREEMPT=y 137CONFIG_PREEMPT_NONE=y
138# CONFIG_PREEMPT_VOLUNTARY is not set
139# CONFIG_PREEMPT is not set
140CONFIG_HZ_100=y
141# CONFIG_HZ_250 is not set
142# CONFIG_HZ_300 is not set
143# CONFIG_HZ_1000 is not set
224CONFIG_HZ=100 144CONFIG_HZ=100
225CONFIG_AEABI=y 145CONFIG_SCHED_HRTICK=y
226# CONFIG_OABI_COMPAT is not set 146# CONFIG_MMU is not set
227# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set 147CONFIG_NO_MMU=y
148
149#
150# Boot options
151#
152CONFIG_CMDLINE_BOOL=y
153CONFIG_CMDLINE="console=ttyUL0,115200"
154# CONFIG_CMDLINE_FORCE is not set
155CONFIG_OF=y
156CONFIG_OF_DEVICE=y
157CONFIG_PROC_DEVICETREE=y
228CONFIG_SELECT_MEMORY_MODEL=y 158CONFIG_SELECT_MEMORY_MODEL=y
229CONFIG_FLATMEM_MANUAL=y 159CONFIG_FLATMEM_MANUAL=y
230# CONFIG_DISCONTIGMEM_MANUAL is not set 160# CONFIG_DISCONTIGMEM_MANUAL is not set
231# CONFIG_SPARSEMEM_MANUAL is not set 161# CONFIG_SPARSEMEM_MANUAL is not set
232CONFIG_FLATMEM=y 162CONFIG_FLATMEM=y
233CONFIG_FLAT_NODE_MEM_MAP=y 163CONFIG_FLAT_NODE_MEM_MAP=y
234# CONFIG_SPARSEMEM_STATIC is not set
235# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
236CONFIG_PAGEFLAGS_EXTENDED=y 164CONFIG_PAGEFLAGS_EXTENDED=y
237CONFIG_SPLIT_PTLOCK_CPUS=4 165CONFIG_SPLIT_PTLOCK_CPUS=4
238# CONFIG_RESOURCES_64BIT is not set 166# CONFIG_PHYS_ADDR_T_64BIT is not set
239CONFIG_ZONE_DMA_FLAG=1 167CONFIG_ZONE_DMA_FLAG=0
240CONFIG_BOUNCE=y
241CONFIG_VIRT_TO_BUS=y 168CONFIG_VIRT_TO_BUS=y
242CONFIG_ALIGNMENT_TRAP=y
243
244#
245# Boot options
246#
247CONFIG_ZBOOT_ROM_TEXT=0x0
248CONFIG_ZBOOT_ROM_BSS=0x0
249CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw ip=off"
250# CONFIG_XIP_KERNEL is not set
251# CONFIG_KEXEC is not set
252
253#
254# Floating point emulation
255#
256 169
257# 170#
258# At least one emulation must be selected 171# Exectuable file formats
259# 172#
260CONFIG_VFP=y 173CONFIG_BINFMT_FLAT=y
261 174# CONFIG_BINFMT_ZFLAT is not set
262# 175# CONFIG_BINFMT_SHARED_FLAT is not set
263# Userspace binary formats 176# CONFIG_HAVE_AOUT is not set
264#
265CONFIG_BINFMT_ELF=y
266# CONFIG_BINFMT_AOUT is not set
267# CONFIG_BINFMT_MISC is not set 177# CONFIG_BINFMT_MISC is not set
268
269#
270# Power management options
271#
272# CONFIG_PM is not set
273CONFIG_ARCH_SUSPEND_POSSIBLE=y
274
275#
276# Networking
277#
278CONFIG_NET=y 178CONFIG_NET=y
279 179
280# 180#
281# Networking options 181# Networking options
282# 182#
183CONFIG_COMPAT_NET_DEV_OPS=y
283CONFIG_PACKET=y 184CONFIG_PACKET=y
284# CONFIG_PACKET_MMAP is not set 185# CONFIG_PACKET_MMAP is not set
285CONFIG_UNIX=y 186CONFIG_UNIX=y
@@ -293,10 +194,7 @@ CONFIG_INET=y
293# CONFIG_IP_MULTICAST is not set 194# CONFIG_IP_MULTICAST is not set
294# CONFIG_IP_ADVANCED_ROUTER is not set 195# CONFIG_IP_ADVANCED_ROUTER is not set
295CONFIG_IP_FIB_HASH=y 196CONFIG_IP_FIB_HASH=y
296CONFIG_IP_PNP=y 197# CONFIG_IP_PNP is not set
297CONFIG_IP_PNP_DHCP=y
298# CONFIG_IP_PNP_BOOTP is not set
299# CONFIG_IP_PNP_RARP is not set
300# CONFIG_NET_IPIP is not set 198# CONFIG_NET_IPIP is not set
301# CONFIG_NET_IPGRE is not set 199# CONFIG_NET_IPGRE is not set
302# CONFIG_ARPD is not set 200# CONFIG_ARPD is not set
@@ -324,6 +222,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
324# CONFIG_TIPC is not set 222# CONFIG_TIPC is not set
325# CONFIG_ATM is not set 223# CONFIG_ATM is not set
326# CONFIG_BRIDGE is not set 224# CONFIG_BRIDGE is not set
225# CONFIG_NET_DSA is not set
327# CONFIG_VLAN_8021Q is not set 226# CONFIG_VLAN_8021Q is not set
328# CONFIG_DECNET is not set 227# CONFIG_DECNET is not set
329# CONFIG_LLC2 is not set 228# CONFIG_LLC2 is not set
@@ -334,6 +233,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
334# CONFIG_ECONET is not set 233# CONFIG_ECONET is not set
335# CONFIG_WAN_ROUTER is not set 234# CONFIG_WAN_ROUTER is not set
336# CONFIG_NET_SCHED is not set 235# CONFIG_NET_SCHED is not set
236# CONFIG_DCB is not set
337 237
338# 238#
339# Network testing 239# Network testing
@@ -344,14 +244,14 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
344# CONFIG_IRDA is not set 244# CONFIG_IRDA is not set
345# CONFIG_BT is not set 245# CONFIG_BT is not set
346# CONFIG_AF_RXRPC is not set 246# CONFIG_AF_RXRPC is not set
347 247# CONFIG_PHONET is not set
348# 248CONFIG_WIRELESS=y
349# Wireless
350#
351# CONFIG_CFG80211 is not set 249# CONFIG_CFG80211 is not set
250CONFIG_WIRELESS_OLD_REGULATORY=y
352# CONFIG_WIRELESS_EXT is not set 251# CONFIG_WIRELESS_EXT is not set
252# CONFIG_LIB80211 is not set
353# CONFIG_MAC80211 is not set 253# CONFIG_MAC80211 is not set
354# CONFIG_IEEE80211 is not set 254# CONFIG_WIMAX is not set
355# CONFIG_RFKILL is not set 255# CONFIG_RFKILL is not set
356# CONFIG_NET_9P is not set 256# CONFIG_NET_9P is not set
357 257
@@ -362,22 +262,19 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
362# 262#
363# Generic Driver Options 263# Generic Driver Options
364# 264#
365CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
366CONFIG_STANDALONE=y 265CONFIG_STANDALONE=y
367CONFIG_PREVENT_FIRMWARE_BUILD=y 266# CONFIG_PREVENT_FIRMWARE_BUILD is not set
368CONFIG_FW_LOADER=m 267# CONFIG_DEBUG_DRIVER is not set
268# CONFIG_DEBUG_DEVRES is not set
369# CONFIG_SYS_HYPERVISOR is not set 269# CONFIG_SYS_HYPERVISOR is not set
370# CONFIG_CONNECTOR is not set 270# CONFIG_CONNECTOR is not set
371CONFIG_MTD=y 271CONFIG_MTD=y
372# CONFIG_MTD_DEBUG is not set 272# CONFIG_MTD_DEBUG is not set
373# CONFIG_MTD_CONCAT is not set 273CONFIG_MTD_CONCAT=y
374CONFIG_MTD_PARTITIONS=y 274CONFIG_MTD_PARTITIONS=y
375CONFIG_MTD_REDBOOT_PARTS=y 275# CONFIG_MTD_TESTS is not set
376CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 276# CONFIG_MTD_REDBOOT_PARTS is not set
377# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
378# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
379CONFIG_MTD_CMDLINE_PARTS=y 277CONFIG_MTD_CMDLINE_PARTS=y
380# CONFIG_MTD_AFS_PARTS is not set
381# CONFIG_MTD_AR7_PARTS is not set 278# CONFIG_MTD_AR7_PARTS is not set
382 279
383# 280#
@@ -399,37 +296,31 @@ CONFIG_MTD_BLOCK=y
399CONFIG_MTD_CFI=y 296CONFIG_MTD_CFI=y
400# CONFIG_MTD_JEDECPROBE is not set 297# CONFIG_MTD_JEDECPROBE is not set
401CONFIG_MTD_GEN_PROBE=y 298CONFIG_MTD_GEN_PROBE=y
402CONFIG_MTD_CFI_ADV_OPTIONS=y 299# CONFIG_MTD_CFI_ADV_OPTIONS is not set
403CONFIG_MTD_CFI_NOSWAP=y 300CONFIG_MTD_MAP_BANK_WIDTH_1=y
404# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
405# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
406CONFIG_MTD_CFI_GEOMETRY=y
407# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
408CONFIG_MTD_MAP_BANK_WIDTH_2=y 301CONFIG_MTD_MAP_BANK_WIDTH_2=y
409# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set 302CONFIG_MTD_MAP_BANK_WIDTH_4=y
410# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set 303# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
411# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set 304# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
412# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set 305# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
413CONFIG_MTD_CFI_I1=y 306CONFIG_MTD_CFI_I1=y
414# CONFIG_MTD_CFI_I2 is not set 307CONFIG_MTD_CFI_I2=y
415# CONFIG_MTD_CFI_I4 is not set 308# CONFIG_MTD_CFI_I4 is not set
416# CONFIG_MTD_CFI_I8 is not set 309# CONFIG_MTD_CFI_I8 is not set
417# CONFIG_MTD_OTP is not set 310CONFIG_MTD_CFI_INTELEXT=y
418# CONFIG_MTD_CFI_INTELEXT is not set
419CONFIG_MTD_CFI_AMDSTD=y 311CONFIG_MTD_CFI_AMDSTD=y
420# CONFIG_MTD_CFI_STAA is not set 312# CONFIG_MTD_CFI_STAA is not set
421CONFIG_MTD_CFI_UTIL=y 313CONFIG_MTD_CFI_UTIL=y
422CONFIG_MTD_RAM=y 314CONFIG_MTD_RAM=y
423# CONFIG_MTD_ROM is not set 315# CONFIG_MTD_ROM is not set
424# CONFIG_MTD_ABSENT is not set 316# CONFIG_MTD_ABSENT is not set
425# CONFIG_MTD_XIP is not set
426 317
427# 318#
428# Mapping drivers for chip access 319# Mapping drivers for chip access
429# 320#
430# CONFIG_MTD_COMPLEX_MAPPINGS is not set 321# CONFIG_MTD_COMPLEX_MAPPINGS is not set
431# CONFIG_MTD_PHYSMAP is not set 322# CONFIG_MTD_PHYSMAP is not set
432# CONFIG_MTD_ARM_INTEGRATOR is not set 323CONFIG_MTD_UCLINUX=y
433# CONFIG_MTD_PLATRAM is not set 324# CONFIG_MTD_PLATRAM is not set
434 325
435# 326#
@@ -446,25 +337,37 @@ CONFIG_MTD_RAM=y
446# CONFIG_MTD_DOC2000 is not set 337# CONFIG_MTD_DOC2000 is not set
447# CONFIG_MTD_DOC2001 is not set 338# CONFIG_MTD_DOC2001 is not set
448# CONFIG_MTD_DOC2001PLUS is not set 339# CONFIG_MTD_DOC2001PLUS is not set
449CONFIG_MTD_NAND=y 340# CONFIG_MTD_NAND is not set
450# CONFIG_MTD_NAND_VERIFY_WRITE is not set
451# CONFIG_MTD_NAND_ECC_SMC is not set
452# CONFIG_MTD_NAND_MUSEUM_IDS is not set
453CONFIG_MTD_NAND_IDS=y
454# CONFIG_MTD_NAND_DISKONCHIP is not set
455# CONFIG_MTD_NAND_NANDSIM is not set
456# CONFIG_MTD_NAND_PLATFORM is not set
457# CONFIG_MTD_ONENAND is not set 341# CONFIG_MTD_ONENAND is not set
458 342
459# 343#
344# LPDDR flash memory drivers
345#
346# CONFIG_MTD_LPDDR is not set
347
348#
460# UBI - Unsorted block images 349# UBI - Unsorted block images
461# 350#
462# CONFIG_MTD_UBI is not set 351# CONFIG_MTD_UBI is not set
463# CONFIG_PARPORT is not set 352# CONFIG_PARPORT is not set
464# CONFIG_BLK_DEV is not set 353CONFIG_BLK_DEV=y
465# CONFIG_MISC_DEVICES is not set 354# CONFIG_BLK_DEV_COW_COMMON is not set
466CONFIG_HAVE_IDE=y 355# CONFIG_BLK_DEV_LOOP is not set
467# CONFIG_IDE is not set 356CONFIG_BLK_DEV_NBD=y
357CONFIG_BLK_DEV_RAM=y
358CONFIG_BLK_DEV_RAM_COUNT=16
359CONFIG_BLK_DEV_RAM_SIZE=4096
360# CONFIG_BLK_DEV_XIP is not set
361# CONFIG_CDROM_PKTCDVD is not set
362# CONFIG_ATA_OVER_ETH is not set
363CONFIG_MISC_DEVICES=y
364# CONFIG_ENCLOSURE_SERVICES is not set
365# CONFIG_C2PORT is not set
366
367#
368# EEPROM support
369#
370# CONFIG_EEPROM_93CX6 is not set
468 371
469# 372#
470# SCSI device support 373# SCSI device support
@@ -476,7 +379,6 @@ CONFIG_HAVE_IDE=y
476# CONFIG_ATA is not set 379# CONFIG_ATA is not set
477# CONFIG_MD is not set 380# CONFIG_MD is not set
478CONFIG_NETDEVICES=y 381CONFIG_NETDEVICES=y
479# CONFIG_NETDEVICES_MULTIQUEUE is not set
480# CONFIG_DUMMY is not set 382# CONFIG_DUMMY is not set
481# CONFIG_BONDING is not set 383# CONFIG_BONDING is not set
482# CONFIG_MACVLAN is not set 384# CONFIG_MACVLAN is not set
@@ -485,17 +387,18 @@ CONFIG_NETDEVICES=y
485# CONFIG_VETH is not set 387# CONFIG_VETH is not set
486# CONFIG_PHYLIB is not set 388# CONFIG_PHYLIB is not set
487CONFIG_NET_ETHERNET=y 389CONFIG_NET_ETHERNET=y
488CONFIG_MII=y 390# CONFIG_MII is not set
489# CONFIG_AX88796 is not set 391# CONFIG_DNET is not set
490# CONFIG_SMC91X is not set
491# CONFIG_DM9000 is not set
492# CONFIG_IBM_NEW_EMAC_ZMII is not set 392# CONFIG_IBM_NEW_EMAC_ZMII is not set
493# CONFIG_IBM_NEW_EMAC_RGMII is not set 393# CONFIG_IBM_NEW_EMAC_RGMII is not set
494# CONFIG_IBM_NEW_EMAC_TAH is not set 394# CONFIG_IBM_NEW_EMAC_TAH is not set
495# CONFIG_IBM_NEW_EMAC_EMAC4 is not set 395# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
396# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
397# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
398# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
496# CONFIG_B44 is not set 399# CONFIG_B44 is not set
497# CONFIG_NETDEV_1000 is not set 400CONFIG_NETDEV_1000=y
498# CONFIG_NETDEV_10000 is not set 401CONFIG_NETDEV_10000=y
499 402
500# 403#
501# Wireless LAN 404# Wireless LAN
@@ -503,6 +406,10 @@ CONFIG_MII=y
503# CONFIG_WLAN_PRE80211 is not set 406# CONFIG_WLAN_PRE80211 is not set
504# CONFIG_WLAN_80211 is not set 407# CONFIG_WLAN_80211 is not set
505# CONFIG_IWLWIFI_LEDS is not set 408# CONFIG_IWLWIFI_LEDS is not set
409
410#
411# Enable WiMAX (Networking options) to see the WiMAX drivers
412#
506# CONFIG_WAN is not set 413# CONFIG_WAN is not set
507# CONFIG_PPP is not set 414# CONFIG_PPP is not set
508# CONFIG_SLIP is not set 415# CONFIG_SLIP is not set
@@ -510,6 +417,7 @@ CONFIG_MII=y
510# CONFIG_NETPOLL is not set 417# CONFIG_NETPOLL is not set
511# CONFIG_NET_POLL_CONTROLLER is not set 418# CONFIG_NET_POLL_CONTROLLER is not set
512# CONFIG_ISDN is not set 419# CONFIG_ISDN is not set
420# CONFIG_PHONE is not set
513 421
514# 422#
515# Input device support 423# Input device support
@@ -537,51 +445,44 @@ CONFIG_DEVKMEM=y
537# 445#
538# Non-8250 serial port support 446# Non-8250 serial port support
539# 447#
540CONFIG_SERIAL_IMX=y 448CONFIG_SERIAL_UARTLITE=y
541CONFIG_SERIAL_IMX_CONSOLE=y 449CONFIG_SERIAL_UARTLITE_CONSOLE=y
542CONFIG_SERIAL_CORE=y 450CONFIG_SERIAL_CORE=y
543CONFIG_SERIAL_CORE_CONSOLE=y 451CONFIG_SERIAL_CORE_CONSOLE=y
544CONFIG_UNIX98_PTYS=y 452CONFIG_UNIX98_PTYS=y
545# CONFIG_LEGACY_PTYS is not set 453# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
454CONFIG_LEGACY_PTYS=y
455CONFIG_LEGACY_PTY_COUNT=256
546# CONFIG_IPMI_HANDLER is not set 456# CONFIG_IPMI_HANDLER is not set
547# CONFIG_HW_RANDOM is not set 457CONFIG_HW_RANDOM=y
548# CONFIG_NVRAM is not set 458# CONFIG_RTC is not set
459# CONFIG_GEN_RTC is not set
549# CONFIG_R3964 is not set 460# CONFIG_R3964 is not set
550# CONFIG_RAW_DRIVER is not set 461# CONFIG_RAW_DRIVER is not set
551# CONFIG_TCG_TPM is not set 462# CONFIG_TCG_TPM is not set
552# CONFIG_I2C is not set 463# CONFIG_I2C is not set
553# CONFIG_SPI is not set 464# CONFIG_SPI is not set
554CONFIG_HAVE_GPIO_LIB=y
555
556#
557# GPIO Support
558#
559
560#
561# I2C GPIO expanders:
562#
563
564#
565# SPI GPIO expanders:
566#
567# CONFIG_W1 is not set 465# CONFIG_W1 is not set
568# CONFIG_POWER_SUPPLY is not set 466# CONFIG_POWER_SUPPLY is not set
569# CONFIG_HWMON is not set 467# CONFIG_HWMON is not set
468# CONFIG_THERMAL is not set
469# CONFIG_THERMAL_HWMON is not set
570# CONFIG_WATCHDOG is not set 470# CONFIG_WATCHDOG is not set
471CONFIG_SSB_POSSIBLE=y
571 472
572# 473#
573# Sonics Silicon Backplane 474# Sonics Silicon Backplane
574# 475#
575CONFIG_SSB_POSSIBLE=y
576# CONFIG_SSB is not set 476# CONFIG_SSB is not set
577 477
578# 478#
579# Multifunction device drivers 479# Multifunction device drivers
580# 480#
481# CONFIG_MFD_CORE is not set
581# CONFIG_MFD_SM501 is not set 482# CONFIG_MFD_SM501 is not set
582# CONFIG_MFD_ASIC3 is not set
583# CONFIG_HTC_EGPIO is not set
584# CONFIG_HTC_PASIC3 is not set 483# CONFIG_HTC_PASIC3 is not set
484# CONFIG_MFD_TMIO is not set
485# CONFIG_REGULATOR is not set
585 486
586# 487#
587# Multimedia devices 488# Multimedia devices
@@ -597,13 +498,13 @@ CONFIG_SSB_POSSIBLE=y
597# 498#
598# Multimedia drivers 499# Multimedia drivers
599# 500#
600# CONFIG_DAB is not set 501CONFIG_DAB=y
601 502
602# 503#
603# Graphics support 504# Graphics support
604# 505#
605# CONFIG_VGASTATE is not set 506# CONFIG_VGASTATE is not set
606# CONFIG_VIDEO_OUTPUT_CONTROL is not set 507CONFIG_VIDEO_OUTPUT_CONTROL=y
607# CONFIG_FB is not set 508# CONFIG_FB is not set
608# CONFIG_BACKLIGHT_LCD_SUPPORT is not set 509# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
609 510
@@ -611,32 +512,51 @@ CONFIG_SSB_POSSIBLE=y
611# Display device support 512# Display device support
612# 513#
613# CONFIG_DISPLAY_SUPPORT is not set 514# CONFIG_DISPLAY_SUPPORT is not set
515# CONFIG_SOUND is not set
516CONFIG_USB_SUPPORT=y
517# CONFIG_USB_ARCH_HAS_HCD is not set
518# CONFIG_USB_ARCH_HAS_OHCI is not set
519# CONFIG_USB_ARCH_HAS_EHCI is not set
520# CONFIG_USB_OTG_WHITELIST is not set
521# CONFIG_USB_OTG_BLACKLIST_HUB is not set
614 522
615# 523#
616# Sound 524# Enable Host or Gadget support to see Inventra options
525#
526
527#
528# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
529#
530# CONFIG_USB_GADGET is not set
531
532#
533# OTG and related infrastructure
617# 534#
618# CONFIG_SOUND is not set
619# CONFIG_USB_SUPPORT is not set
620# CONFIG_MMC is not set 535# CONFIG_MMC is not set
536# CONFIG_MEMSTICK is not set
621# CONFIG_NEW_LEDS is not set 537# CONFIG_NEW_LEDS is not set
622CONFIG_RTC_LIB=y 538# CONFIG_ACCESSIBILITY is not set
623# CONFIG_RTC_CLASS is not set 539# CONFIG_RTC_CLASS is not set
540# CONFIG_DMADEVICES is not set
624# CONFIG_UIO is not set 541# CONFIG_UIO is not set
542# CONFIG_STAGING is not set
625 543
626# 544#
627# File systems 545# File systems
628# 546#
629# CONFIG_EXT2_FS is not set 547CONFIG_EXT2_FS=y
548# CONFIG_EXT2_FS_XATTR is not set
630# CONFIG_EXT3_FS is not set 549# CONFIG_EXT3_FS is not set
631# CONFIG_EXT4DEV_FS is not set 550# CONFIG_EXT4_FS is not set
632# CONFIG_REISERFS_FS is not set 551# CONFIG_REISERFS_FS is not set
633# CONFIG_JFS_FS is not set 552# CONFIG_JFS_FS is not set
634# CONFIG_FS_POSIX_ACL is not set 553CONFIG_FS_POSIX_ACL=y
554CONFIG_FILE_LOCKING=y
635# CONFIG_XFS_FS is not set 555# CONFIG_XFS_FS is not set
636# CONFIG_OCFS2_FS is not set 556# CONFIG_OCFS2_FS is not set
557# CONFIG_BTRFS_FS is not set
637# CONFIG_DNOTIFY is not set 558# CONFIG_DNOTIFY is not set
638CONFIG_INOTIFY=y 559# CONFIG_INOTIFY is not set
639CONFIG_INOTIFY_USER=y
640# CONFIG_QUOTA is not set 560# CONFIG_QUOTA is not set
641# CONFIG_AUTOFS_FS is not set 561# CONFIG_AUTOFS_FS is not set
642# CONFIG_AUTOFS4_FS is not set 562# CONFIG_AUTOFS4_FS is not set
@@ -661,14 +581,10 @@ CONFIG_INOTIFY_USER=y
661CONFIG_PROC_FS=y 581CONFIG_PROC_FS=y
662CONFIG_PROC_SYSCTL=y 582CONFIG_PROC_SYSCTL=y
663CONFIG_SYSFS=y 583CONFIG_SYSFS=y
664CONFIG_TMPFS=y 584# CONFIG_TMPFS is not set
665# CONFIG_TMPFS_POSIX_ACL is not set
666# CONFIG_HUGETLB_PAGE is not set 585# CONFIG_HUGETLB_PAGE is not set
667# CONFIG_CONFIGFS_FS is not set 586# CONFIG_CONFIGFS_FS is not set
668 587CONFIG_MISC_FILESYSTEMS=y
669#
670# Miscellaneous filesystems
671#
672# CONFIG_ADFS_FS is not set 588# CONFIG_ADFS_FS is not set
673# CONFIG_AFFS_FS is not set 589# CONFIG_AFFS_FS is not set
674# CONFIG_HFS_FS is not set 590# CONFIG_HFS_FS is not set
@@ -676,35 +592,29 @@ CONFIG_TMPFS=y
676# CONFIG_BEFS_FS is not set 592# CONFIG_BEFS_FS is not set
677# CONFIG_BFS_FS is not set 593# CONFIG_BFS_FS is not set
678# CONFIG_EFS_FS is not set 594# CONFIG_EFS_FS is not set
679CONFIG_JFFS2_FS=y 595# CONFIG_JFFS2_FS is not set
680CONFIG_JFFS2_FS_DEBUG=0
681CONFIG_JFFS2_FS_WRITEBUFFER=y
682# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
683# CONFIG_JFFS2_SUMMARY is not set
684# CONFIG_JFFS2_FS_XATTR is not set
685# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
686CONFIG_JFFS2_ZLIB=y
687# CONFIG_JFFS2_LZO is not set
688CONFIG_JFFS2_RTIME=y
689# CONFIG_JFFS2_RUBIN is not set
690CONFIG_CRAMFS=y 596CONFIG_CRAMFS=y
597# CONFIG_SQUASHFS is not set
691# CONFIG_VXFS_FS is not set 598# CONFIG_VXFS_FS is not set
692# CONFIG_MINIX_FS is not set 599# CONFIG_MINIX_FS is not set
600# CONFIG_OMFS_FS is not set
693# CONFIG_HPFS_FS is not set 601# CONFIG_HPFS_FS is not set
694# CONFIG_QNX4FS_FS is not set 602# CONFIG_QNX4FS_FS is not set
695# CONFIG_ROMFS_FS is not set 603CONFIG_ROMFS_FS=y
696# CONFIG_SYSV_FS is not set 604# CONFIG_SYSV_FS is not set
697# CONFIG_UFS_FS is not set 605# CONFIG_UFS_FS is not set
698CONFIG_NETWORK_FILESYSTEMS=y 606CONFIG_NETWORK_FILESYSTEMS=y
699CONFIG_NFS_FS=y 607CONFIG_NFS_FS=y
700# CONFIG_NFS_V3 is not set 608CONFIG_NFS_V3=y
609CONFIG_NFS_V3_ACL=y
701# CONFIG_NFS_V4 is not set 610# CONFIG_NFS_V4 is not set
702# CONFIG_NFSD is not set 611# CONFIG_NFSD is not set
703CONFIG_ROOT_NFS=y
704CONFIG_LOCKD=y 612CONFIG_LOCKD=y
613CONFIG_LOCKD_V4=y
614CONFIG_NFS_ACL_SUPPORT=y
705CONFIG_NFS_COMMON=y 615CONFIG_NFS_COMMON=y
706CONFIG_SUNRPC=y 616CONFIG_SUNRPC=y
707# CONFIG_SUNRPC_BIND34 is not set 617# CONFIG_SUNRPC_REGISTER_V4 is not set
708# CONFIG_RPCSEC_GSS_KRB5 is not set 618# CONFIG_RPCSEC_GSS_KRB5 is not set
709# CONFIG_RPCSEC_GSS_SPKM3 is not set 619# CONFIG_RPCSEC_GSS_SPKM3 is not set
710# CONFIG_SMB_FS is not set 620# CONFIG_SMB_FS is not set
@@ -724,32 +634,79 @@ CONFIG_MSDOS_PARTITION=y
724# 634#
725# Kernel hacking 635# Kernel hacking
726# 636#
727CONFIG_PRINTK_TIME=y 637# CONFIG_PRINTK_TIME is not set
728CONFIG_ENABLE_WARN_DEPRECATED=y 638CONFIG_ENABLE_WARN_DEPRECATED=y
729CONFIG_ENABLE_MUST_CHECK=y 639CONFIG_ENABLE_MUST_CHECK=y
730CONFIG_FRAME_WARN=1024 640CONFIG_FRAME_WARN=1024
731# CONFIG_MAGIC_SYSRQ is not set 641# CONFIG_MAGIC_SYSRQ is not set
732# CONFIG_UNUSED_SYMBOLS is not set 642CONFIG_UNUSED_SYMBOLS=y
733# CONFIG_DEBUG_FS is not set 643CONFIG_DEBUG_FS=y
734# CONFIG_HEADERS_CHECK is not set 644# CONFIG_HEADERS_CHECK is not set
735# CONFIG_DEBUG_KERNEL is not set 645CONFIG_DEBUG_KERNEL=y
736# CONFIG_DEBUG_BUGVERBOSE is not set 646CONFIG_DEBUG_SHIRQ=y
737CONFIG_FRAME_POINTER=y 647CONFIG_DETECT_SOFTLOCKUP=y
648CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y
649CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=1
650CONFIG_SCHED_DEBUG=y
651CONFIG_SCHEDSTATS=y
652CONFIG_TIMER_STATS=y
653CONFIG_DEBUG_OBJECTS=y
654CONFIG_DEBUG_OBJECTS_SELFTEST=y
655CONFIG_DEBUG_OBJECTS_FREE=y
656CONFIG_DEBUG_OBJECTS_TIMERS=y
657CONFIG_DEBUG_OBJECTS_ENABLE_DEFAULT=1
658# CONFIG_DEBUG_SLAB is not set
659# CONFIG_DEBUG_RT_MUTEXES is not set
660# CONFIG_RT_MUTEX_TESTER is not set
661# CONFIG_DEBUG_SPINLOCK is not set
662# CONFIG_DEBUG_MUTEXES is not set
663# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
664# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
665# CONFIG_DEBUG_KOBJECT is not set
666CONFIG_DEBUG_INFO=y
667# CONFIG_DEBUG_VM is not set
668# CONFIG_DEBUG_NOMMU_REGIONS is not set
669# CONFIG_DEBUG_WRITECOUNT is not set
670# CONFIG_DEBUG_MEMORY_INIT is not set
671CONFIG_DEBUG_LIST=y
672CONFIG_DEBUG_SG=y
673# CONFIG_DEBUG_NOTIFIERS is not set
674# CONFIG_BOOT_PRINTK_DELAY is not set
675# CONFIG_RCU_TORTURE_TEST is not set
676# CONFIG_RCU_CPU_STALL_DETECTOR is not set
677# CONFIG_BACKTRACE_SELF_TEST is not set
678# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
679# CONFIG_FAULT_INJECTION is not set
680CONFIG_SYSCTL_SYSCALL_CHECK=y
681
682#
683# Tracers
684#
685# CONFIG_SCHED_TRACER is not set
686# CONFIG_CONTEXT_SWITCH_TRACER is not set
687# CONFIG_BOOT_TRACER is not set
688# CONFIG_TRACE_BRANCH_PROFILING is not set
689# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
738# CONFIG_SAMPLES is not set 690# CONFIG_SAMPLES is not set
739# CONFIG_DEBUG_USER is not set 691CONFIG_EARLY_PRINTK=y
692CONFIG_HEART_BEAT=y
693# CONFIG_DEBUG_BOOTMEM is not set
740 694
741# 695#
742# Security options 696# Security options
743# 697#
744# CONFIG_KEYS is not set 698# CONFIG_KEYS is not set
745# CONFIG_SECURITY is not set 699# CONFIG_SECURITY is not set
700# CONFIG_SECURITYFS is not set
746# CONFIG_SECURITY_FILE_CAPABILITIES is not set 701# CONFIG_SECURITY_FILE_CAPABILITIES is not set
747CONFIG_CRYPTO=y 702CONFIG_CRYPTO=y
748 703
749# 704#
750# Crypto core or helper 705# Crypto core or helper
751# 706#
707# CONFIG_CRYPTO_FIPS is not set
752# CONFIG_CRYPTO_MANAGER is not set 708# CONFIG_CRYPTO_MANAGER is not set
709# CONFIG_CRYPTO_MANAGER2 is not set
753# CONFIG_CRYPTO_GF128MUL is not set 710# CONFIG_CRYPTO_GF128MUL is not set
754# CONFIG_CRYPTO_NULL is not set 711# CONFIG_CRYPTO_NULL is not set
755# CONFIG_CRYPTO_CRYPTD is not set 712# CONFIG_CRYPTO_CRYPTD is not set
@@ -787,6 +744,10 @@ CONFIG_CRYPTO=y
787# CONFIG_CRYPTO_MD4 is not set 744# CONFIG_CRYPTO_MD4 is not set
788# CONFIG_CRYPTO_MD5 is not set 745# CONFIG_CRYPTO_MD5 is not set
789# CONFIG_CRYPTO_MICHAEL_MIC is not set 746# CONFIG_CRYPTO_MICHAEL_MIC is not set
747# CONFIG_CRYPTO_RMD128 is not set
748# CONFIG_CRYPTO_RMD160 is not set
749# CONFIG_CRYPTO_RMD256 is not set
750# CONFIG_CRYPTO_RMD320 is not set
790# CONFIG_CRYPTO_SHA1 is not set 751# CONFIG_CRYPTO_SHA1 is not set
791# CONFIG_CRYPTO_SHA256 is not set 752# CONFIG_CRYPTO_SHA256 is not set
792# CONFIG_CRYPTO_SHA512 is not set 753# CONFIG_CRYPTO_SHA512 is not set
@@ -817,23 +778,27 @@ CONFIG_CRYPTO=y
817# 778#
818# CONFIG_CRYPTO_DEFLATE is not set 779# CONFIG_CRYPTO_DEFLATE is not set
819# CONFIG_CRYPTO_LZO is not set 780# CONFIG_CRYPTO_LZO is not set
820# CONFIG_CRYPTO_HW is not set 781
782#
783# Random Number Generation
784#
785# CONFIG_CRYPTO_ANSI_CPRNG is not set
786CONFIG_CRYPTO_HW=y
821 787
822# 788#
823# Library routines 789# Library routines
824# 790#
825CONFIG_BITREVERSE=y 791CONFIG_GENERIC_FIND_LAST_BIT=y
826# CONFIG_GENERIC_FIND_FIRST_BIT is not set
827# CONFIG_GENERIC_FIND_NEXT_BIT is not set
828# CONFIG_CRC_CCITT is not set 792# CONFIG_CRC_CCITT is not set
829# CONFIG_CRC16 is not set 793# CONFIG_CRC16 is not set
794# CONFIG_CRC_T10DIF is not set
830# CONFIG_CRC_ITU_T is not set 795# CONFIG_CRC_ITU_T is not set
831CONFIG_CRC32=y 796# CONFIG_CRC32 is not set
832# CONFIG_CRC7 is not set 797# CONFIG_CRC7 is not set
833# CONFIG_LIBCRC32C is not set 798# CONFIG_LIBCRC32C is not set
834CONFIG_ZLIB_INFLATE=y 799CONFIG_ZLIB_INFLATE=y
835CONFIG_ZLIB_DEFLATE=y
836CONFIG_PLIST=y 800CONFIG_PLIST=y
837CONFIG_HAS_IOMEM=y 801CONFIG_HAS_IOMEM=y
838CONFIG_HAS_IOPORT=y 802CONFIG_HAS_IOPORT=y
839CONFIG_HAS_DMA=y 803CONFIG_HAS_DMA=y
804CONFIG_HAVE_LMB=y
diff --git a/arch/microblaze/include/asm/Kbuild b/arch/microblaze/include/asm/Kbuild
new file mode 100644
index 000000000000..31820dfef56b
--- /dev/null
+++ b/arch/microblaze/include/asm/Kbuild
@@ -0,0 +1,26 @@
1include include/asm-generic/Kbuild.asm
2
3header-y += auxvec.h
4header-y += errno.h
5header-y += fcntl.h
6header-y += ioctl.h
7header-y += ioctls.h
8header-y += ipcbuf.h
9header-y += linkage.h
10header-y += msgbuf.h
11header-y += poll.h
12header-y += resource.h
13header-y += sembuf.h
14header-y += shmbuf.h
15header-y += sigcontext.h
16header-y += siginfo.h
17header-y += socket.h
18header-y += sockios.h
19header-y += statfs.h
20header-y += stat.h
21header-y += termbits.h
22header-y += ucontext.h
23
24unifdef-y += cputable.h
25unifdef-y += elf.h
26unifdef-y += termios.h
diff --git a/arch/microblaze/include/asm/atomic.h b/arch/microblaze/include/asm/atomic.h
new file mode 100644
index 000000000000..a448d94ab721
--- /dev/null
+++ b/arch/microblaze/include/asm/atomic.h
@@ -0,0 +1,123 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_ATOMIC_H
10#define _ASM_MICROBLAZE_ATOMIC_H
11
12#include <linux/types.h>
13#include <linux/compiler.h> /* likely */
14#include <asm/system.h> /* local_irq_XXX and friends */
15
16#define ATOMIC_INIT(i) { (i) }
17#define atomic_read(v) ((v)->counter)
18#define atomic_set(v, i) (((v)->counter) = (i))
19
20#define atomic_inc(v) (atomic_add_return(1, (v)))
21#define atomic_dec(v) (atomic_sub_return(1, (v)))
22
23#define atomic_add(i, v) (atomic_add_return(i, (v)))
24#define atomic_sub(i, v) (atomic_sub_return(i, (v)))
25
26#define atomic_inc_return(v) (atomic_add_return(1, (v)))
27#define atomic_dec_return(v) (atomic_sub_return(1, (v)))
28
29#define atomic_inc_and_test(v) (atomic_add_return(1, (v)) == 0)
30#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)
31
32#define atomic_inc_not_zero(v) (atomic_add_unless((v), 1, 0))
33
34#define atomic_sub_and_test(i, v) (atomic_sub_return((i), (v)) == 0)
35
36static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
37{
38 int ret;
39 unsigned long flags;
40
41 local_irq_save(flags);
42 ret = v->counter;
43 if (likely(ret == old))
44 v->counter = new;
45 local_irq_restore(flags);
46
47 return ret;
48}
49
50static inline int atomic_add_unless(atomic_t *v, int a, int u)
51{
52 int c, old;
53
54 c = atomic_read(v);
55 while (c != u && (old = atomic_cmpxchg((v), c, c + a)) != c)
56 c = old;
57 return c != u;
58}
59
60static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr)
61{
62 unsigned long flags;
63
64 local_irq_save(flags);
65 *addr &= ~mask;
66 local_irq_restore(flags);
67}
68
69/**
70 * atomic_add_return - add and return
71 * @i: integer value to add
72 * @v: pointer of type atomic_t
73 *
74 * Atomically adds @i to @v and returns @i + @v
75 */
76static inline int atomic_add_return(int i, atomic_t *v)
77{
78 unsigned long flags;
79 int val;
80
81 local_irq_save(flags);
82 val = v->counter;
83 v->counter = val += i;
84 local_irq_restore(flags);
85
86 return val;
87}
88
89static inline int atomic_sub_return(int i, atomic_t *v)
90{
91 return atomic_add_return(-i, v);
92}
93
94/*
95 * Atomically test *v and decrement if it is greater than 0.
96 * The function returns the old value of *v minus 1.
97 */
98static inline int atomic_dec_if_positive(atomic_t *v)
99{
100 unsigned long flags;
101 int res;
102
103 local_irq_save(flags);
104 res = v->counter - 1;
105 if (res >= 0)
106 v->counter = res;
107 local_irq_restore(flags);
108
109 return res;
110}
111
112#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0)
113#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
114
115/* Atomic operations are already serializing */
116#define smp_mb__before_atomic_dec() barrier()
117#define smp_mb__after_atomic_dec() barrier()
118#define smp_mb__before_atomic_inc() barrier()
119#define smp_mb__after_atomic_inc() barrier()
120
121#include <asm-generic/atomic.h>
122
123#endif /* _ASM_MICROBLAZE_ATOMIC_H */
diff --git a/arch/microblaze/include/asm/auxvec.h b/arch/microblaze/include/asm/auxvec.h
new file mode 100644
index 000000000000..8b137891791f
--- /dev/null
+++ b/arch/microblaze/include/asm/auxvec.h
@@ -0,0 +1 @@
diff --git a/arch/microblaze/include/asm/bitops.h b/arch/microblaze/include/asm/bitops.h
new file mode 100644
index 000000000000..d6df1fd4e1e8
--- /dev/null
+++ b/arch/microblaze/include/asm/bitops.h
@@ -0,0 +1,27 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_BITOPS_H
10#define _ASM_MICROBLAZE_BITOPS_H
11
12/*
13 * Copyright 1992, Linus Torvalds.
14 */
15
16#include <asm/byteorder.h> /* swab32 */
17#include <asm/system.h> /* save_flags */
18
19/*
20 * clear_bit() doesn't provide any barrier for the compiler.
21 */
22#define smp_mb__before_clear_bit() barrier()
23#define smp_mb__after_clear_bit() barrier()
24#include <asm-generic/bitops.h>
25#include <asm-generic/bitops/__fls.h>
26
27#endif /* _ASM_MICROBLAZE_BITOPS_H */
diff --git a/arch/microblaze/include/asm/bug.h b/arch/microblaze/include/asm/bug.h
new file mode 100644
index 000000000000..8eb2cdde11d7
--- /dev/null
+++ b/arch/microblaze/include/asm/bug.h
@@ -0,0 +1,15 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_BUG_H
10#define _ASM_MICROBLAZE_BUG_H
11
12#include <linux/kernel.h>
13#include <asm-generic/bug.h>
14
15#endif /* _ASM_MICROBLAZE_BUG_H */
diff --git a/arch/microblaze/include/asm/bugs.h b/arch/microblaze/include/asm/bugs.h
new file mode 100644
index 000000000000..f2c6593653fb
--- /dev/null
+++ b/arch/microblaze/include/asm/bugs.h
@@ -0,0 +1,17 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_BUGS_H
10#define _ASM_MICROBLAZE_BUGS_H
11
12static inline void check_bugs(void)
13{
14 /* nothing to do */
15}
16
17#endif /* _ASM_MICROBLAZE_BUGS_H */
diff --git a/arch/microblaze/include/asm/byteorder.h b/arch/microblaze/include/asm/byteorder.h
new file mode 100644
index 000000000000..ce9c58732ffc
--- /dev/null
+++ b/arch/microblaze/include/asm/byteorder.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_MICROBLAZE_BYTEORDER_H
2#define _ASM_MICROBLAZE_BYTEORDER_H
3
4#include <linux/byteorder/big_endian.h>
5
6#endif /* _ASM_MICROBLAZE_BYTEORDER_H */
diff --git a/arch/microblaze/include/asm/cache.h b/arch/microblaze/include/asm/cache.h
new file mode 100644
index 000000000000..c4c64b43c074
--- /dev/null
+++ b/arch/microblaze/include/asm/cache.h
@@ -0,0 +1,45 @@
1/*
2 * Cache operations
3 *
4 * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
5 * Copyright (C) 2007-2009 PetaLogix
6 * Copyright (C) 2003 John Williams <jwilliams@itee.uq.edu.au>
7 *
8 * This file is subject to the terms and conditions of the GNU General
9 * Public License. See the file COPYING in the main directory of this
10 * archive for more details.
11 */
12
13#ifndef _ASM_MICROBLAZE_CACHE_H
14#define _ASM_MICROBLAZE_CACHE_H
15
16#include <asm/registers.h>
17
18#define L1_CACHE_SHIFT 2
19/* word-granular cache in microblaze */
20#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
21
22#define SMP_CACHE_BYTES L1_CACHE_BYTES
23
24void _enable_icache(void);
25void _disable_icache(void);
26void _invalidate_icache(unsigned int addr);
27
28#define __enable_icache() _enable_icache()
29#define __disable_icache() _disable_icache()
30#define __invalidate_icache(addr) _invalidate_icache(addr)
31
32void _enable_dcache(void);
33void _disable_dcache(void);
34void _invalidate_dcache(unsigned int addr);
35
36#define __enable_dcache() _enable_dcache()
37#define __disable_dcache() _disable_dcache()
38#define __invalidate_dcache(addr) _invalidate_dcache(addr)
39
40/* FIXME - I don't think this is right */
41#ifdef CONFIG_XILINX_UNCACHED_SHADOW
42#define UNCACHED_SHADOW_MASK (CONFIG_XILINX_ERAM_SIZE)
43#endif
44
45#endif /* _ASM_MICROBLAZE_CACHE_H */
diff --git a/arch/microblaze/include/asm/cacheflush.h b/arch/microblaze/include/asm/cacheflush.h
new file mode 100644
index 000000000000..3300b785049b
--- /dev/null
+++ b/arch/microblaze/include/asm/cacheflush.h
@@ -0,0 +1,85 @@
1/*
2 * Copyright (C) 2007 PetaLogix
3 * Copyright (C) 2007 John Williams <john.williams@petalogix.com>
4 * based on v850 version which was
5 * Copyright (C) 2001,02,03 NEC Electronics Corporation
6 * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
7 *
8 * This file is subject to the terms and conditions of the GNU General
9 * Public License. See the file COPYING in the main directory of this
10 * archive for more details.
11 *
12 */
13
14#ifndef _ASM_MICROBLAZE_CACHEFLUSH_H
15#define _ASM_MICROBLAZE_CACHEFLUSH_H
16
17/* Somebody depends on this; sigh... */
18#include <linux/mm.h>
19
20/*
21 * Cache handling functions.
22 * Microblaze has a write-through data cache, meaning that the data cache
23 * never needs to be flushed. The only flushing operations that are
24 * implemented are to invalidate the instruction cache. These are called
25 * after loading a user application into memory, we must invalidate the
26 * instruction cache to make sure we don't fetch old, bad code.
27 */
28
29/* FIXME for LL-temac driver */
30#define invalidate_dcache_range(start, end) \
31 __invalidate_dcache_range(start, end)
32
33#define flush_cache_all() __invalidate_cache_all()
34#define flush_cache_mm(mm) do { } while (0)
35#define flush_cache_range(vma, start, end) __invalidate_cache_all()
36#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
37
38#define flush_dcache_range(start, end) __invalidate_dcache_range(start, end)
39#define flush_dcache_page(page) do { } while (0)
40#define flush_dcache_mmap_lock(mapping) do { } while (0)
41#define flush_dcache_mmap_unlock(mapping) do { } while (0)
42
43#define flush_icache_range(start, len) __invalidate_icache_range(start, len)
44#define flush_icache_page(vma, pg) do { } while (0)
45
46#define flush_cache_vmap(start, end) do { } while (0)
47#define flush_cache_vunmap(start, end) do { } while (0)
48
49struct page;
50struct mm_struct;
51struct vm_area_struct;
52
53/* see arch/microblaze/kernel/cache.c */
54extern void __invalidate_icache_all(void);
55extern void __invalidate_icache_range(unsigned long start, unsigned long end);
56extern void __invalidate_icache_page(struct vm_area_struct *vma,
57 struct page *page);
58extern void __invalidate_icache_user_range(struct vm_area_struct *vma,
59 struct page *page,
60 unsigned long adr, int len);
61extern void __invalidate_cache_sigtramp(unsigned long addr);
62
63extern void __invalidate_dcache_all(void);
64extern void __invalidate_dcache_range(unsigned long start, unsigned long end);
65extern void __invalidate_dcache_page(struct vm_area_struct *vma,
66 struct page *page);
67extern void __invalidate_dcache_user_range(struct vm_area_struct *vma,
68 struct page *page,
69 unsigned long adr, int len);
70
71extern inline void __invalidate_cache_all(void)
72{
73 __invalidate_icache_all();
74 __invalidate_dcache_all();
75}
76
77#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
78do { memcpy((dst), (src), (len)); \
79 flush_icache_range((unsigned) (dst), (unsigned) (dst) + (len)); \
80} while (0)
81
82#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
83 memcpy((dst), (src), (len))
84
85#endif /* _ASM_MICROBLAZE_CACHEFLUSH_H */
diff --git a/arch/microblaze/include/asm/checksum.h b/arch/microblaze/include/asm/checksum.h
new file mode 100644
index 000000000000..92b30762ce59
--- /dev/null
+++ b/arch/microblaze/include/asm/checksum.h
@@ -0,0 +1,98 @@
1/*
2 * Copyright (C) 2008 Michal Simek <monstr@monstr.eu>
3 * Copyright (C) 2006 Atmark Techno, Inc.
4 *
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 */
9
10#ifndef _ASM_MICROBLAZE_CHECKSUM_H
11#define _ASM_MICROBLAZE_CHECKSUM_H
12
13#include <linux/in6.h>
14
15/*
16 * computes the checksum of the TCP/UDP pseudo-header
17 * returns a 16-bit checksum, already complemented
18 */
19static inline __wsum
20csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len,
21 unsigned short proto, __wsum sum)
22{
23 __asm__("add %0, %0, %1\n\t"
24 "addc %0, %0, %2\n\t"
25 "addc %0, %0, %3\n\t"
26 "addc %0, %0, r0\n\t"
27 : "+&d" (sum)
28 : "d" (saddr), "d" (daddr), "d" (len + proto));
29
30 return sum;
31}
32
33/*
34 * computes the checksum of a memory block at buff, length len,
35 * and adds in "sum" (32-bit)
36 *
37 * returns a 32-bit number suitable for feeding into itself
38 * or csum_tcpudp_magic
39 *
40 * this function must be called with even lengths, except
41 * for the last fragment, which may be odd
42 *
43 * it's best to have buff aligned on a 32-bit boundary
44 */
45extern __wsum csum_partial(const void *buff, int len, __wsum sum);
46
47/*
48 * the same as csum_partial, but copies from src while it
49 * checksums
50 *
51 * here even more important to align src and dst on a 32-bit (or even
52 * better 64-bit) boundary
53 */
54extern __wsum csum_partial_copy(const char *src, char *dst, int len, int sum);
55
56/*
57 * the same as csum_partial_copy, but copies from user space.
58 *
59 * here even more important to align src and dst on a 32-bit (or even
60 * better 64-bit) boundary
61 */
62extern __wsum csum_partial_copy_from_user(const char *src, char *dst,
63 int len, int sum, int *csum_err);
64
65#define csum_partial_copy_nocheck(src, dst, len, sum) \
66 csum_partial_copy((src), (dst), (len), (sum))
67
68/*
69 * This is a version of ip_compute_csum() optimized for IP headers,
70 * which always checksum on 4 octet boundaries.
71 *
72 */
73extern __sum16 ip_fast_csum(const void *iph, unsigned int ihl);
74
75/*
76 * Fold a partial checksum
77 */
78static inline __sum16 csum_fold(unsigned int sum)
79{
80 sum = (sum & 0xffff) + (sum >> 16);
81 sum = (sum & 0xffff) + (sum >> 16);
82 return ~sum;
83}
84
85static inline __sum16
86csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len,
87 unsigned short proto, __wsum sum)
88{
89 return csum_fold(csum_tcpudp_nofold(saddr, daddr, len, proto, sum));
90}
91
92/*
93 * this routine is used for miscellaneous IP-like checksums, mainly
94 * in icmp.c
95 */
96extern __sum16 ip_compute_csum(const unsigned char *buff, int len);
97
98#endif /* _ASM_MICROBLAZE_CHECKSUM_H */
diff --git a/arch/microblaze/include/asm/clinkage.h b/arch/microblaze/include/asm/clinkage.h
new file mode 100644
index 000000000000..9e218435a55c
--- /dev/null
+++ b/arch/microblaze/include/asm/clinkage.h
@@ -0,0 +1 @@
#include <linux/linkage.h>
diff --git a/arch/microblaze/include/asm/cpuinfo.h b/arch/microblaze/include/asm/cpuinfo.h
new file mode 100644
index 000000000000..52f28f6dc4eb
--- /dev/null
+++ b/arch/microblaze/include/asm/cpuinfo.h
@@ -0,0 +1,102 @@
1/*
2 * Generic support for queying CPU info
3 *
4 * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
5 * Copyright (C) 2007-2009 PetaLogix
6 * Copyright (C) 2007 John Williams <jwilliams@itee.uq.edu.au>
7 *
8 * This file is subject to the terms and conditions of the GNU General
9 * Public License. See the file COPYING in the main directory of this
10 * archive for more details.
11 */
12
13#ifndef _ASM_MICROBLAZE_CPUINFO_H
14#define _ASM_MICROBLAZE_CPUINFO_H
15
16#include <asm/prom.h>
17
18/* CPU Version and FPGA Family code conversion table type */
19struct cpu_ver_key {
20 const char *s;
21 const unsigned k;
22};
23
24extern const struct cpu_ver_key cpu_ver_lookup[];
25
26struct family_string_key {
27 const char *s;
28 const unsigned k;
29};
30
31extern const struct family_string_key family_string_lookup[];
32
33struct cpuinfo {
34 /* Core CPU configuration */
35 u32 use_instr;
36 u32 use_mult;
37 u32 use_fpu;
38 u32 use_exc;
39 u32 ver_code;
40 u32 mmu;
41
42 /* CPU caches */
43 u32 use_icache;
44 u32 icache_tagbits;
45 u32 icache_write;
46 u32 icache_line;
47 u32 icache_size;
48 unsigned long icache_base;
49 unsigned long icache_high;
50
51 u32 use_dcache;
52 u32 dcache_tagbits;
53 u32 dcache_write;
54 u32 dcache_line;
55 u32 dcache_size;
56 unsigned long dcache_base;
57 unsigned long dcache_high;
58
59 /* Bus connections */
60 u32 use_dopb;
61 u32 use_iopb;
62 u32 use_dlmb;
63 u32 use_ilmb;
64 u32 num_fsl;
65
66 /* CPU interrupt line info */
67 u32 irq_edge;
68 u32 irq_positive;
69
70 u32 area_optimised;
71
72 /* HW debug support */
73 u32 hw_debug;
74 u32 num_pc_brk;
75 u32 num_rd_brk;
76 u32 num_wr_brk;
77 u32 cpu_clock_freq; /* store real freq of cpu */
78 u32 freq_div_hz; /* store freq/HZ */
79
80 /* FPGA family */
81 u32 fpga_family_code;
82
83 /* User define */
84 u32 pvr_user1;
85 u32 pvr_user2;
86};
87
88extern struct cpuinfo cpuinfo;
89
90/* fwd declarations of the various CPUinfo populators */
91void setup_cpuinfo(void);
92
93void set_cpuinfo_static(struct cpuinfo *ci, struct device_node *cpu);
94void set_cpuinfo_pvr_full(struct cpuinfo *ci, struct device_node *cpu);
95
96static inline unsigned int fcpu(struct device_node *cpu, char *n)
97{
98 int *val;
99 return (val = (int *) of_get_property(cpu, n, NULL)) ? *val : 0;
100}
101
102#endif /* _ASM_MICROBLAZE_CPUINFO_H */
diff --git a/arch/microblaze/include/asm/cputable.h b/arch/microblaze/include/asm/cputable.h
new file mode 100644
index 000000000000..8b137891791f
--- /dev/null
+++ b/arch/microblaze/include/asm/cputable.h
@@ -0,0 +1 @@
diff --git a/arch/microblaze/include/asm/cputime.h b/arch/microblaze/include/asm/cputime.h
new file mode 100644
index 000000000000..6d68ad7e0ea3
--- /dev/null
+++ b/arch/microblaze/include/asm/cputime.h
@@ -0,0 +1 @@
#include <asm-generic/cputime.h>
diff --git a/arch/microblaze/include/asm/current.h b/arch/microblaze/include/asm/current.h
new file mode 100644
index 000000000000..8375ea991e26
--- /dev/null
+++ b/arch/microblaze/include/asm/current.h
@@ -0,0 +1,21 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_CURRENT_H
10#define _ASM_MICROBLAZE_CURRENT_H
11
12# ifndef __ASSEMBLY__
13/*
14 * Dedicate r31 to keeping the current task pointer
15 */
16register struct task_struct *current asm("r31");
17
18# define get_current() current
19# endif /* __ASSEMBLY__ */
20
21#endif /* _ASM_MICROBLAZE_CURRENT_H */
diff --git a/arch/microblaze/include/asm/delay.h b/arch/microblaze/include/asm/delay.h
new file mode 100644
index 000000000000..05b7d39e4391
--- /dev/null
+++ b/arch/microblaze/include/asm/delay.h
@@ -0,0 +1,72 @@
1/*
2 * include/asm-microblaze/delay.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2008 Michal Simek
9 * Copyright (C) 2007 John Williams
10 * Copyright (C) 2006 Atmark Techno, Inc.
11 */
12
13#ifndef _ASM_MICROBLAZE_DELAY_H
14#define _ASM_MICROBLAZE_DELAY_H
15
16extern inline void __delay(unsigned long loops)
17{
18 asm volatile ("# __delay \n\t" \
19 "1: addi %0, %0, -1\t\n" \
20 "bneid %0, 1b \t\n" \
21 "nop \t\n"
22 : "=r" (loops)
23 : "0" (loops));
24}
25
26/*
27 * Note that 19 * 226 == 4294 ==~ 2^32 / 10^6, so
28 * loops = (4294 * usecs * loops_per_jiffy * HZ) / 2^32.
29 *
30 * The mul instruction gives us loops = (a * b) / 2^32.
31 * We choose a = usecs * 19 * HZ and b = loops_per_jiffy * 226
32 * because this lets us support a wide range of HZ and
33 * loops_per_jiffy values without either a or b overflowing 2^32.
34 * Thus we need usecs * HZ <= (2^32 - 1) / 19 = 226050910 and
35 * loops_per_jiffy <= (2^32 - 1) / 226 = 19004280
36 * (which corresponds to ~3800 bogomips at HZ = 100).
37 * -- paulus
38 */
39#define __MAX_UDELAY (226050910UL/HZ) /* maximum udelay argument */
40#define __MAX_NDELAY (4294967295UL/HZ) /* maximum ndelay argument */
41
42extern unsigned long loops_per_jiffy;
43
44extern inline void __udelay(unsigned int x)
45{
46
47 unsigned long long tmp =
48 (unsigned long long)x * (unsigned long long)loops_per_jiffy \
49 * 226LL;
50 unsigned loops = tmp >> 32;
51
52/*
53 __asm__("mulxuu %0,%1,%2" : "=r" (loops) :
54 "r" (x), "r" (loops_per_jiffy * 226));
55*/
56 __delay(loops);
57}
58
59extern void __bad_udelay(void); /* deliberately undefined */
60extern void __bad_ndelay(void); /* deliberately undefined */
61
62#define udelay(n) (__builtin_constant_p(n) ? \
63 ((n) > __MAX_UDELAY ? __bad_udelay() : __udelay((n) * (19 * HZ))) : \
64 __udelay((n) * (19 * HZ)))
65
66#define ndelay(n) (__builtin_constant_p(n) ? \
67 ((n) > __MAX_NDELAY ? __bad_ndelay() : __udelay((n) * HZ)) : \
68 __udelay((n) * HZ))
69
70#define muldiv(a, b, c) (((a)*(b))/(c))
71
72#endif /* _ASM_MICROBLAZE_DELAY_H */
diff --git a/arch/microblaze/include/asm/device.h b/arch/microblaze/include/asm/device.h
new file mode 100644
index 000000000000..c042830793ed
--- /dev/null
+++ b/arch/microblaze/include/asm/device.h
@@ -0,0 +1,21 @@
1/*
2 * Arch specific extensions to struct device
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License v2. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_DEVICE_H
10#define _ASM_MICROBLAZE_DEVICE_H
11
12struct device_node;
13
14struct dev_archdata {
15 /* Optional pointer to an OF device node */
16 struct device_node *of_node;
17};
18
19#endif /* _ASM_MICROBLAZE_DEVICE_H */
20
21
diff --git a/arch/microblaze/include/asm/div64.h b/arch/microblaze/include/asm/div64.h
new file mode 100644
index 000000000000..6cd978cefb28
--- /dev/null
+++ b/arch/microblaze/include/asm/div64.h
@@ -0,0 +1 @@
#include <asm-generic/div64.h>
diff --git a/arch/microblaze/include/asm/dma-mapping.h b/arch/microblaze/include/asm/dma-mapping.h
new file mode 100644
index 000000000000..17336252a9b8
--- /dev/null
+++ b/arch/microblaze/include/asm/dma-mapping.h
@@ -0,0 +1,129 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_DMA_MAPPING_H
10#define _ASM_MICROBLAZE_DMA_MAPPING_H
11
12#include <asm/cacheflush.h>
13#include <linux/io.h>
14#include <linux/bug.h>
15
16struct scatterlist;
17
18#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
19#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
20
21/* FIXME */
22static inline int
23dma_supported(struct device *dev, u64 mask)
24{
25 return 1;
26}
27
28static inline dma_addr_t
29dma_map_page(struct device *dev, struct page *page,
30 unsigned long offset, size_t size,
31 enum dma_data_direction direction)
32{
33 BUG();
34 return 0;
35}
36
37static inline void
38dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
39 enum dma_data_direction direction)
40{
41 BUG();
42}
43
44static inline int
45dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
46 enum dma_data_direction direction)
47{
48 BUG();
49 return 0;
50}
51
52static inline void
53dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
54 enum dma_data_direction direction)
55{
56 BUG();
57}
58
59static inline void
60dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,
61 enum dma_data_direction direction)
62{
63 BUG();
64}
65
66static inline void
67dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
68 size_t size, enum dma_data_direction direction)
69{
70 BUG();
71}
72
73static inline void
74dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
75 enum dma_data_direction direction)
76{
77 BUG();
78}
79
80static inline void
81dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
82 enum dma_data_direction direction)
83{
84 BUG();
85}
86
87static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
88{
89 return 0;
90}
91
92static inline void *dma_alloc_coherent(struct device *dev, size_t size,
93 dma_addr_t *dma_handle, int flag)
94{
95 return NULL; /* consistent_alloc(flag, size, dma_handle); */
96}
97
98static inline void dma_free_coherent(struct device *dev, size_t size,
99 void *vaddr, dma_addr_t dma_handle)
100{
101 BUG();
102}
103
104static inline dma_addr_t
105dma_map_single(struct device *dev, void *ptr, size_t size,
106 enum dma_data_direction direction)
107{
108 BUG_ON(direction == DMA_NONE);
109
110 return virt_to_bus(ptr);
111}
112
113static inline void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
114 size_t size,
115 enum dma_data_direction direction)
116{
117 switch (direction) {
118 case DMA_FROM_DEVICE:
119 flush_dcache_range((unsigned)dma_addr,
120 (unsigned)dma_addr + size);
121 /* Fall through */
122 case DMA_TO_DEVICE:
123 break;
124 default:
125 BUG();
126 }
127}
128
129#endif /* _ASM_MICROBLAZE_DMA_MAPPING_H */
diff --git a/arch/microblaze/include/asm/dma.h b/arch/microblaze/include/asm/dma.h
new file mode 100644
index 000000000000..0967fa04fc5e
--- /dev/null
+++ b/arch/microblaze/include/asm/dma.h
@@ -0,0 +1,16 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_DMA_H
10#define _ASM_MICROBLAZE_DMA_H
11
12/* we don't have dma address limit. define it as zero to be
13 * unlimited. */
14#define MAX_DMA_ADDRESS (0)
15
16#endif /* _ASM_MICROBLAZE_DMA_H */
diff --git a/arch/microblaze/include/asm/elf.h b/arch/microblaze/include/asm/elf.h
new file mode 100644
index 000000000000..81337f241347
--- /dev/null
+++ b/arch/microblaze/include/asm/elf.h
@@ -0,0 +1,30 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_ELF_H
10#define _ASM_MICROBLAZE_ELF_H
11
12/*
13 * Note there is no "official" ELF designation for Microblaze.
14 * I've snaffled the value from the microblaze binutils source code
15 * /binutils/microblaze/include/elf/microblaze.h
16 */
17#define EM_XILINX_MICROBLAZE 0xbaab
18#define ELF_ARCH EM_XILINX_MICROBLAZE
19
20/*
21 * This is used to ensure we don't load something for the wrong architecture.
22 */
23#define elf_check_arch(x) ((x)->e_machine == EM_XILINX_MICROBLAZE)
24
25/*
26 * These are used to set parameters in the core dumps.
27 */
28#define ELF_CLASS ELFCLASS32
29
30#endif /* _ASM_MICROBLAZE_ELF_H */
diff --git a/arch/microblaze/include/asm/emergency-restart.h b/arch/microblaze/include/asm/emergency-restart.h
new file mode 100644
index 000000000000..3711bd9d50bd
--- /dev/null
+++ b/arch/microblaze/include/asm/emergency-restart.h
@@ -0,0 +1 @@
#include <asm-generic/emergency-restart.h>
diff --git a/arch/microblaze/include/asm/entry.h b/arch/microblaze/include/asm/entry.h
new file mode 100644
index 000000000000..7f57e42ee467
--- /dev/null
+++ b/arch/microblaze/include/asm/entry.h
@@ -0,0 +1,35 @@
1/*
2 * Definitions used by low-level trap handlers
3 *
4 * Copyright (C) 2008 Michal Simek
5 * Copyright (C) 2007 - 2008 PetaLogix
6 * Copyright (C) 2007 John Williams <john.williams@petalogix.com>
7 *
8 * This file is subject to the terms and conditions of the GNU General
9 * Public License. See the file COPYING in the main directory of this
10 * archive for more details.
11 */
12
13#ifndef _ASM_MICROBLAZE_ENTRY_H
14#define _ASM_MICROBLAZE_ENTRY_H
15
16#include <asm/percpu.h>
17#include <asm/ptrace.h>
18
19/*
20 * These are per-cpu variables required in entry.S, among other
21 * places
22 */
23
24#define PER_CPU(var) per_cpu__##var
25
26# ifndef __ASSEMBLY__
27DECLARE_PER_CPU(unsigned int, KSP); /* Saved kernel stack pointer */
28DECLARE_PER_CPU(unsigned int, KM); /* Kernel/user mode */
29DECLARE_PER_CPU(unsigned int, ENTRY_SP); /* Saved SP on kernel entry */
30DECLARE_PER_CPU(unsigned int, R11_SAVE); /* Temp variable for entry */
31DECLARE_PER_CPU(unsigned int, CURRENT_SAVE); /* Saved current pointer */
32DECLARE_PER_CPU(unsigned int, SYSCALL_SAVE); /* Saved syscall number */
33# endif /* __ASSEMBLY__ */
34
35#endif /* _ASM_MICROBLAZE_ENTRY_H */
diff --git a/arch/microblaze/include/asm/errno.h b/arch/microblaze/include/asm/errno.h
new file mode 100644
index 000000000000..4c82b503d92f
--- /dev/null
+++ b/arch/microblaze/include/asm/errno.h
@@ -0,0 +1 @@
#include <asm-generic/errno.h>
diff --git a/arch/microblaze/include/asm/exceptions.h b/arch/microblaze/include/asm/exceptions.h
new file mode 100644
index 000000000000..4cdd2159f470
--- /dev/null
+++ b/arch/microblaze/include/asm/exceptions.h
@@ -0,0 +1,96 @@
1/*
2 * Preliminary support for HW exception handing for Microblaze
3 *
4 * Copyright (C) 2008 Michal Simek
5 * Copyright (C) 2008 PetaLogix
6 * Copyright (C) 2005 John Williams <jwilliams@itee.uq.edu.au>
7 *
8 * This file is subject to the terms and conditions of the GNU General
9 * Public License. See the file COPYING in the main directory of this
10 * archive for more details.
11 */
12
13#ifndef _ASM_MICROBLAZE_EXCEPTIONS_H
14#define _ASM_MICROBLAZE_EXCEPTIONS_H
15
16#ifdef __KERNEL__
17#ifndef __ASSEMBLY__
18
19/* Macros to enable and disable HW exceptions in the MSR */
20/* Define MSR enable bit for HW exceptions */
21#define HWEX_MSR_BIT (1 << 8)
22
23#if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
24#define __enable_hw_exceptions() \
25 __asm__ __volatile__ (" msrset r0, %0; \
26 nop;" \
27 : \
28 : "i" (HWEX_MSR_BIT) \
29 : "memory")
30
31#define __disable_hw_exceptions() \
32 __asm__ __volatile__ (" msrclr r0, %0; \
33 nop;" \
34 : \
35 : "i" (HWEX_MSR_BIT) \
36 : "memory")
37#else /* !CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR */
38#define __enable_hw_exceptions() \
39 __asm__ __volatile__ (" \
40 mfs r12, rmsr; \
41 nop; \
42 ori r12, r12, %0; \
43 mts rmsr, r12; \
44 nop;" \
45 : \
46 : "i" (HWEX_MSR_BIT) \
47 : "memory", "r12")
48
49#define __disable_hw_exceptions() \
50 __asm__ __volatile__ (" \
51 mfs r12, rmsr; \
52 nop; \
53 andi r12, r12, ~%0; \
54 mts rmsr, r12; \
55 nop;" \
56 : \
57 : "i" (HWEX_MSR_BIT) \
58 : "memory", "r12")
59#endif /* CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR */
60
61asmlinkage void full_exception(struct pt_regs *regs, unsigned int type,
62 int fsr, int addr);
63
64#if defined(CONFIG_XMON)
65extern void xmon(struct pt_regs *regs);
66extern int xmon_bpt(struct pt_regs *regs);
67extern int xmon_sstep(struct pt_regs *regs);
68extern int xmon_iabr_match(struct pt_regs *regs);
69extern int xmon_dabr_match(struct pt_regs *regs);
70extern void (*xmon_fault_handler)(struct pt_regs *regs);
71
72void (*debugger)(struct pt_regs *regs) = xmon;
73int (*debugger_bpt)(struct pt_regs *regs) = xmon_bpt;
74int (*debugger_sstep)(struct pt_regs *regs) = xmon_sstep;
75int (*debugger_iabr_match)(struct pt_regs *regs) = xmon_iabr_match;
76int (*debugger_dabr_match)(struct pt_regs *regs) = xmon_dabr_match;
77void (*debugger_fault_handler)(struct pt_regs *regs);
78#elif defined(CONFIG_KGDB)
79void (*debugger)(struct pt_regs *regs);
80int (*debugger_bpt)(struct pt_regs *regs);
81int (*debugger_sstep)(struct pt_regs *regs);
82int (*debugger_iabr_match)(struct pt_regs *regs);
83int (*debugger_dabr_match)(struct pt_regs *regs);
84void (*debugger_fault_handler)(struct pt_regs *regs);
85#else
86#define debugger(regs) do { } while (0)
87#define debugger_bpt(regs) 0
88#define debugger_sstep(regs) 0
89#define debugger_iabr_match(regs) 0
90#define debugger_dabr_match(regs) 0
91#define debugger_fault_handler ((void (*)(struct pt_regs *))0)
92#endif
93
94#endif /*__ASSEMBLY__ */
95#endif /* __KERNEL__ */
96#endif /* _ASM_MICROBLAZE_EXCEPTIONS_H */
diff --git a/arch/microblaze/include/asm/fcntl.h b/arch/microblaze/include/asm/fcntl.h
new file mode 100644
index 000000000000..46ab12db5739
--- /dev/null
+++ b/arch/microblaze/include/asm/fcntl.h
@@ -0,0 +1 @@
#include <asm-generic/fcntl.h>
diff --git a/arch/microblaze/include/asm/flat.h b/arch/microblaze/include/asm/flat.h
new file mode 100644
index 000000000000..acf0da543ef1
--- /dev/null
+++ b/arch/microblaze/include/asm/flat.h
@@ -0,0 +1,90 @@
1/*
2 * uClinux flat-format executables
3 *
4 * Copyright (C) 2005 John Williams <jwilliams@itee.uq.edu.au>
5 *
6 * This file is subject to the terms and conditions of the GNU General
7 * Public License. See the file COPYING in the main directory of this
8 * archive for more details.
9 */
10
11#ifndef _ASM_MICROBLAZE_FLAT_H
12#define _ASM_MICROBLAZE_FLAT_H
13
14#include <asm/unaligned.h>
15
16#define flat_stack_align(sp) /* nothing needed */
17#define flat_argvp_envp_on_stack() 0
18#define flat_old_ram_flag(flags) (flags)
19#define flat_reloc_valid(reloc, size) ((reloc) <= (size))
20#define flat_set_persistent(relval, p) 0
21
22/*
23 * Microblaze works a little differently from other arches, because
24 * of the MICROBLAZE_64 reloc type. Here, a 32 bit address is split
25 * over two instructions, an 'imm' instruction which provides the top
26 * 16 bits, then the instruction "proper" which provides the low 16
27 * bits.
28 */
29
30/*
31 * Crack open a symbol reference and extract the address to be
32 * relocated. rp is a potentially unaligned pointer to the
33 * reference
34 */
35
36static inline unsigned long
37flat_get_addr_from_rp(unsigned long *rp, unsigned long relval,
38 unsigned long flags, unsigned long *persistent)
39{
40 unsigned long addr;
41 (void)flags;
42
43 /* Is it a split 64/32 reference? */
44 if (relval & 0x80000000) {
45 /* Grab the two halves of the reference */
46 unsigned long val_hi, val_lo;
47
48 val_hi = get_unaligned(rp);
49 val_lo = get_unaligned(rp+1);
50
51 /* Crack the address out */
52 addr = ((val_hi & 0xffff) << 16) + (val_lo & 0xffff);
53 } else {
54 /* Get the address straight out */
55 addr = get_unaligned(rp);
56 }
57
58 return addr;
59}
60
61/*
62 * Insert an address into the symbol reference at rp. rp is potentially
63 * unaligned.
64 */
65
66static inline void
67flat_put_addr_at_rp(unsigned long *rp, unsigned long addr, unsigned long relval)
68{
69 /* Is this a split 64/32 reloc? */
70 if (relval & 0x80000000) {
71 /* Get the two "halves" */
72 unsigned long val_hi = get_unaligned(rp);
73 unsigned long val_lo = get_unaligned(rp + 1);
74
75 /* insert the address */
76 val_hi = (val_hi & 0xffff0000) | addr >> 16;
77 val_lo = (val_lo & 0xffff0000) | (addr & 0xffff);
78
79 /* store the two halves back into memory */
80 put_unaligned(val_hi, rp);
81 put_unaligned(val_lo, rp+1);
82 } else {
83 /* Put it straight in, no messing around */
84 put_unaligned(addr, rp);
85 }
86}
87
88#define flat_get_relocate_addr(rel) (rel & 0x7fffffff)
89
90#endif /* _ASM_MICROBLAZE_FLAT_H */
diff --git a/arch/microblaze/include/asm/ftrace.h b/arch/microblaze/include/asm/ftrace.h
new file mode 100644
index 000000000000..8b137891791f
--- /dev/null
+++ b/arch/microblaze/include/asm/ftrace.h
@@ -0,0 +1 @@
diff --git a/arch/microblaze/include/asm/futex.h b/arch/microblaze/include/asm/futex.h
new file mode 100644
index 000000000000..0b745828f42b
--- /dev/null
+++ b/arch/microblaze/include/asm/futex.h
@@ -0,0 +1 @@
#include <asm-generic/futex.h>
diff --git a/arch/microblaze/include/asm/gpio.h b/arch/microblaze/include/asm/gpio.h
new file mode 100644
index 000000000000..ea04632399d8
--- /dev/null
+++ b/arch/microblaze/include/asm/gpio.h
@@ -0,0 +1,56 @@
1/*
2 * Generic GPIO API implementation for PowerPC.
3 *
4 * Copyright (c) 2007-2008 MontaVista Software, Inc.
5 *
6 * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 */
13
14#ifndef __ASM_POWERPC_GPIO_H
15#define __ASM_POWERPC_GPIO_H
16
17#include <linux/errno.h>
18#include <asm-generic/gpio.h>
19
20#ifdef CONFIG_GPIOLIB
21
22/*
23 * We don't (yet) implement inlined/rapid versions for on-chip gpios.
24 * Just call gpiolib.
25 */
26static inline int gpio_get_value(unsigned int gpio)
27{
28 return __gpio_get_value(gpio);
29}
30
31static inline void gpio_set_value(unsigned int gpio, int value)
32{
33 __gpio_set_value(gpio, value);
34}
35
36static inline int gpio_cansleep(unsigned int gpio)
37{
38 return __gpio_cansleep(gpio);
39}
40
41/*
42 * Not implemented, yet.
43 */
44static inline int gpio_to_irq(unsigned int gpio)
45{
46 return -ENOSYS;
47}
48
49static inline int irq_to_gpio(unsigned int irq)
50{
51 return -EINVAL;
52}
53
54#endif /* CONFIG_GPIOLIB */
55
56#endif /* __ASM_POWERPC_GPIO_H */
diff --git a/arch/microblaze/include/asm/hardirq.h b/arch/microblaze/include/asm/hardirq.h
new file mode 100644
index 000000000000..0f2d6b013e11
--- /dev/null
+++ b/arch/microblaze/include/asm/hardirq.h
@@ -0,0 +1,29 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_HARDIRQ_H
10#define _ASM_MICROBLAZE_HARDIRQ_H
11
12#include <linux/cache.h>
13#include <linux/irq.h>
14#include <asm/irq.h>
15#include <asm/current.h>
16#include <linux/ptrace.h>
17
18/* should be defined in each interrupt controller driver */
19extern unsigned int get_irq(struct pt_regs *regs);
20
21typedef struct {
22 unsigned int __softirq_pending;
23} ____cacheline_aligned irq_cpustat_t;
24
25void ack_bad_irq(unsigned int irq);
26
27#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
28
29#endif /* _ASM_MICROBLAZE_HARDIRQ_H */
diff --git a/arch/microblaze/include/asm/hw_irq.h b/arch/microblaze/include/asm/hw_irq.h
new file mode 100644
index 000000000000..8b137891791f
--- /dev/null
+++ b/arch/microblaze/include/asm/hw_irq.h
@@ -0,0 +1 @@
diff --git a/arch/microblaze/include/asm/io.h b/arch/microblaze/include/asm/io.h
new file mode 100644
index 000000000000..8b5853ee6b5c
--- /dev/null
+++ b/arch/microblaze/include/asm/io.h
@@ -0,0 +1,208 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_IO_H
10#define _ASM_MICROBLAZE_IO_H
11
12#include <asm/byteorder.h>
13#include <asm/page.h>
14#include <linux/types.h>
15
16#define IO_SPACE_LIMIT (0xFFFFFFFF)
17
18static inline unsigned char __raw_readb(const volatile void __iomem *addr)
19{
20 return *(volatile unsigned char __force *)addr;
21}
22static inline unsigned short __raw_readw(const volatile void __iomem *addr)
23{
24 return *(volatile unsigned short __force *)addr;
25}
26static inline unsigned int __raw_readl(const volatile void __iomem *addr)
27{
28 return *(volatile unsigned int __force *)addr;
29}
30static inline unsigned long __raw_readq(const volatile void __iomem *addr)
31{
32 return *(volatile unsigned long __force *)addr;
33}
34static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr)
35{
36 *(volatile unsigned char __force *)addr = v;
37}
38static inline void __raw_writew(unsigned short v, volatile void __iomem *addr)
39{
40 *(volatile unsigned short __force *)addr = v;
41}
42static inline void __raw_writel(unsigned int v, volatile void __iomem *addr)
43{
44 *(volatile unsigned int __force *)addr = v;
45}
46static inline void __raw_writeq(unsigned long v, volatile void __iomem *addr)
47{
48 *(volatile unsigned long __force *)addr = v;
49}
50
51/*
52 * read (readb, readw, readl, readq) and write (writeb, writew,
53 * writel, writeq) accessors are for PCI and thus littel endian.
54 * Linux 2.4 for Microblaze had this wrong.
55 */
56static inline unsigned char readb(const volatile void __iomem *addr)
57{
58 return *(volatile unsigned char __force *)addr;
59}
60static inline unsigned short readw(const volatile void __iomem *addr)
61{
62 return le16_to_cpu(*(volatile unsigned short __force *)addr);
63}
64static inline unsigned int readl(const volatile void __iomem *addr)
65{
66 return le32_to_cpu(*(volatile unsigned int __force *)addr);
67}
68static inline void writeb(unsigned char v, volatile void __iomem *addr)
69{
70 *(volatile unsigned char __force *)addr = v;
71}
72static inline void writew(unsigned short v, volatile void __iomem *addr)
73{
74 *(volatile unsigned short __force *)addr = cpu_to_le16(v);
75}
76static inline void writel(unsigned int v, volatile void __iomem *addr)
77{
78 *(volatile unsigned int __force *)addr = cpu_to_le32(v);
79}
80
81/* ioread and iowrite variants. thease are for now same as __raw_
82 * variants of accessors. we might check for endianess in the feature
83 */
84#define ioread8(addr) __raw_readb((u8 *)(addr))
85#define ioread16(addr) __raw_readw((u16 *)(addr))
86#define ioread32(addr) __raw_readl((u32 *)(addr))
87#define iowrite8(v, addr) __raw_writeb((u8)(v), (u8 *)(addr))
88#define iowrite16(v, addr) __raw_writew((u16)(v), (u16 *)(addr))
89#define iowrite32(v, addr) __raw_writel((u32)(v), (u32 *)(addr))
90
91/* These are the definitions for the x86 IO instructions
92 * inb/inw/inl/outb/outw/outl, the "string" versions
93 * insb/insw/insl/outsb/outsw/outsl, and the "pausing" versions
94 * inb_p/inw_p/...
95 * The macros don't do byte-swapping.
96 */
97#define inb(port) readb((u8 *)((port)))
98#define outb(val, port) writeb((val), (u8 *)((unsigned long)(port)))
99#define inw(port) readw((u16 *)((port)))
100#define outw(val, port) writew((val), (u16 *)((unsigned long)(port)))
101#define inl(port) readl((u32 *)((port)))
102#define outl(val, port) writel((val), (u32 *)((unsigned long)(port)))
103
104#define inb_p(port) inb((port))
105#define outb_p(val, port) outb((val), (port))
106#define inw_p(port) inw((port))
107#define outw_p(val, port) outw((val), (port))
108#define inl_p(port) inl((port))
109#define outl_p(val, port) outl((val), (port))
110
111#define memset_io(a, b, c) memset((void *)(a), (b), (c))
112#define memcpy_fromio(a, b, c) memcpy((a), (void *)(b), (c))
113#define memcpy_toio(a, b, c) memcpy((void *)(a), (b), (c))
114
115/**
116 * virt_to_phys - map virtual addresses to physical
117 * @address: address to remap
118 *
119 * The returned physical address is the physical (CPU) mapping for
120 * the memory address given. It is only valid to use this function on
121 * addresses directly mapped or allocated via kmalloc.
122 *
123 * This function does not give bus mappings for DMA transfers. In
124 * almost all conceivable cases a device driver should not be using
125 * this function
126 */
127static inline unsigned long __iomem virt_to_phys(volatile void *address)
128{
129 return __pa((unsigned long)address);
130}
131
132#define virt_to_bus virt_to_phys
133
134/**
135 * phys_to_virt - map physical address to virtual
136 * @address: address to remap
137 *
138 * The returned virtual address is a current CPU mapping for
139 * the memory address given. It is only valid to use this function on
140 * addresses that have a kernel mapping
141 *
142 * This function does not handle bus mappings for DMA transfers. In
143 * almost all conceivable cases a device driver should not be using
144 * this function
145 */
146static inline void *phys_to_virt(unsigned long address)
147{
148 return (void *)__va(address);
149}
150
151#define bus_to_virt(a) phys_to_virt(a)
152
153static inline void __iomem *__ioremap(phys_addr_t address, unsigned long size,
154 unsigned long flags)
155{
156 return (void *)address;
157}
158
159#define ioremap(physaddr, size) ((void __iomem *)(unsigned long)(physaddr))
160#define iounmap(addr) ((void)0)
161#define ioremap_nocache(physaddr, size) ioremap(physaddr, size)
162
163/*
164 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
165 * access
166 */
167#define xlate_dev_mem_ptr(p) __va(p)
168
169/*
170 * Convert a virtual cached pointer to an uncached pointer
171 */
172#define xlate_dev_kmem_ptr(p) p
173
174/*
175 * Big Endian
176 */
177#define out_be32(a, v) __raw_writel((v), (void __iomem __force *)(a))
178#define out_be16(a, v) __raw_writew((v), (a))
179
180#define in_be32(a) __raw_readl((const void __iomem __force *)(a))
181#define in_be16(a) __raw_readw(a)
182
183/*
184 * Little endian
185 */
186
187#define out_le32(a, v) __raw_writel(__cpu_to_le32(v), (a));
188#define out_le16(a, v) __raw_writew(__cpu_to_le16(v), (a))
189
190#define in_le32(a) __le32_to_cpu(__raw_readl(a))
191#define in_le16(a) __le16_to_cpu(__raw_readw(a))
192
193/* Byte ops */
194#define out_8(a, v) __raw_writeb((v), (a))
195#define in_8(a) __raw_readb(a)
196
197/* FIXME */
198static inline void __iomem *ioport_map(unsigned long port, unsigned int len)
199{
200 return (void __iomem *) (port);
201}
202
203static inline void ioport_unmap(void __iomem *addr)
204{
205 /* Nothing to do */
206}
207
208#endif /* _ASM_MICROBLAZE_IO_H */
diff --git a/arch/microblaze/include/asm/ioctl.h b/arch/microblaze/include/asm/ioctl.h
new file mode 100644
index 000000000000..b279fe06dfe5
--- /dev/null
+++ b/arch/microblaze/include/asm/ioctl.h
@@ -0,0 +1 @@
#include <asm-generic/ioctl.h>
diff --git a/arch/microblaze/include/asm/ioctls.h b/arch/microblaze/include/asm/ioctls.h
new file mode 100644
index 000000000000..03582b249204
--- /dev/null
+++ b/arch/microblaze/include/asm/ioctls.h
@@ -0,0 +1,91 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_IOCTLS_H
10#define _ASM_MICROBLAZE_IOCTLS_H
11
12#include <linux/ioctl.h>
13
14/* 0x54 is just a magic number to make these relatively unique ('T') */
15
16#define TCGETS 0x5401
17#define TCSETS 0x5402
18#define TCSETSW 0x5403
19#define TCSETSF 0x5404
20#define TCGETA 0x5405
21#define TCSETA 0x5406
22#define TCSETAW 0x5407
23#define TCSETAF 0x5408
24#define TCSBRK 0x5409
25#define TCXONC 0x540A
26#define TCFLSH 0x540B
27#define TIOCEXCL 0x540C
28#define TIOCNXCL 0x540D
29#define TIOCSCTTY 0x540E
30#define TIOCGPGRP 0x540F
31#define TIOCSPGRP 0x5410
32#define TIOCOUTQ 0x5411
33#define TIOCSTI 0x5412
34#define TIOCGWINSZ 0x5413
35#define TIOCSWINSZ 0x5414
36#define TIOCMGET 0x5415
37#define TIOCMBIS 0x5416
38#define TIOCMBIC 0x5417
39#define TIOCMSET 0x5418
40#define TIOCGSOFTCAR 0x5419
41#define TIOCSSOFTCAR 0x541A
42#define FIONREAD 0x541B
43#define TIOCINQ FIONREAD
44#define TIOCLINUX 0x541C
45#define TIOCCONS 0x541D
46#define TIOCGSERIAL 0x541E
47#define TIOCSSERIAL 0x541F
48#define TIOCPKT 0x5420
49#define FIONBIO 0x5421
50#define TIOCNOTTY 0x5422
51#define TIOCSETD 0x5423
52#define TIOCGETD 0x5424
53#define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */
54#define TIOCTTYGSTRUCT 0x5426 /* For debugging only */
55#define TIOCSBRK 0x5427 /* BSD compatibility */
56#define TIOCCBRK 0x5428 /* BSD compatibility */
57#define TIOCGSID 0x5429 /* Return the session ID of FD */
58/* Get Pty Number (of pty-mux device) */
59#define TIOCGPTN _IOR('T', 0x30, unsigned int)
60#define TIOCSPTLCK _IOW('T', 0x31, int) /* Lock/unlock Pty */
61
62#define FIONCLEX 0x5450 /* these numbers need to be adjusted. */
63#define FIOCLEX 0x5451
64#define FIOASYNC 0x5452
65#define TIOCSERCONFIG 0x5453
66#define TIOCSERGWILD 0x5454
67#define TIOCSERSWILD 0x5455
68#define TIOCGLCKTRMIOS 0x5456
69#define TIOCSLCKTRMIOS 0x5457
70#define TIOCSERGSTRUCT 0x5458 /* For debugging only */
71#define TIOCSERGETLSR 0x5459 /* Get line status register */
72#define TIOCSERGETMULTI 0x545A /* Get multiport config */
73#define TIOCSERSETMULTI 0x545B /* Set multiport config */
74
75#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */
76#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */
77
78#define FIOQSIZE 0x545E
79
80/* Used for packet mode */
81#define TIOCPKT_DATA 0
82#define TIOCPKT_FLUSHREAD 1
83#define TIOCPKT_FLUSHWRITE 2
84#define TIOCPKT_STOP 4
85#define TIOCPKT_START 8
86#define TIOCPKT_NOSTOP 16
87#define TIOCPKT_DOSTOP 32
88
89#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */
90
91#endif /* _ASM_MICROBLAZE_IOCTLS_H */
diff --git a/arch/microblaze/include/asm/ipc.h b/arch/microblaze/include/asm/ipc.h
new file mode 100644
index 000000000000..a46e3d9c2a3f
--- /dev/null
+++ b/arch/microblaze/include/asm/ipc.h
@@ -0,0 +1 @@
#include <asm-generic/ipc.h>
diff --git a/arch/microblaze/include/asm/ipcbuf.h b/arch/microblaze/include/asm/ipcbuf.h
new file mode 100644
index 000000000000..b056fa420654
--- /dev/null
+++ b/arch/microblaze/include/asm/ipcbuf.h
@@ -0,0 +1,36 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_IPCBUF_H
10#define _ASM_MICROBLAZE_IPCBUF_H
11
12/*
13 * The user_ipc_perm structure for microblaze architecture.
14 * Note extra padding because this structure is passed back and forth
15 * between kernel and user space.
16 *
17 * Pad space is left for:
18 * - 32-bit mode_t and seq
19 * - 2 miscellaneous 32-bit values
20 */
21
22struct ipc64_perm {
23 __kernel_key_t key;
24 __kernel_uid32_t uid;
25 __kernel_gid32_t gid;
26 __kernel_uid32_t cuid;
27 __kernel_gid32_t cgid;
28 __kernel_mode_t mode;
29 unsigned short __pad1;
30 unsigned short seq;
31 unsigned short __pad2;
32 unsigned long __unused1;
33 unsigned long __unused2;
34};
35
36#endif /* _ASM_MICROBLAZE_IPCBUF_H */
diff --git a/arch/microblaze/include/asm/irq.h b/arch/microblaze/include/asm/irq.h
new file mode 100644
index 000000000000..db515deaa720
--- /dev/null
+++ b/arch/microblaze/include/asm/irq.h
@@ -0,0 +1,47 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_IRQ_H
10#define _ASM_MICROBLAZE_IRQ_H
11
12#define NR_IRQS 32
13
14#include <linux/interrupt.h>
15
16extern unsigned int nr_irq;
17
18#define NO_IRQ (-1)
19
20static inline int irq_canonicalize(int irq)
21{
22 return irq;
23}
24
25struct pt_regs;
26extern void do_IRQ(struct pt_regs *regs);
27
28/* irq_of_parse_and_map - Parse and Map an interrupt into linux virq space
29 * @device: Device node of the device whose interrupt is to be mapped
30 * @index: Index of the interrupt to map
31 *
32 * This function is a wrapper that chains of_irq_map_one() and
33 * irq_create_of_mapping() to make things easier to callers
34 */
35struct device_node;
36extern unsigned int irq_of_parse_and_map(struct device_node *dev, int index);
37
38/** FIXME - not implement
39 * irq_dispose_mapping - Unmap an interrupt
40 * @virq: linux virq number of the interrupt to unmap
41 */
42static inline void irq_dispose_mapping(unsigned int virq)
43{
44 return;
45}
46
47#endif /* _ASM_MICROBLAZE_IRQ_H */
diff --git a/arch/microblaze/include/asm/irq_regs.h b/arch/microblaze/include/asm/irq_regs.h
new file mode 100644
index 000000000000..3dd9c0b70270
--- /dev/null
+++ b/arch/microblaze/include/asm/irq_regs.h
@@ -0,0 +1 @@
#include <asm-generic/irq_regs.h>
diff --git a/arch/microblaze/include/asm/irqflags.h b/arch/microblaze/include/asm/irqflags.h
new file mode 100644
index 000000000000..dea65645a4f8
--- /dev/null
+++ b/arch/microblaze/include/asm/irqflags.h
@@ -0,0 +1,123 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_IRQFLAGS_H
10#define _ASM_MICROBLAZE_IRQFLAGS_H
11
12#include <linux/irqflags.h>
13
14# if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
15
16# define local_irq_save(flags) \
17 do { \
18 asm volatile ("# local_irq_save \n\t" \
19 "msrclr %0, %1 \n\t" \
20 "nop \n\t" \
21 : "=r"(flags) \
22 : "i"(MSR_IE) \
23 : "memory"); \
24 } while (0)
25
26# define local_irq_disable() \
27 do { \
28 asm volatile ("# local_irq_disable \n\t" \
29 "msrclr r0, %0 \n\t" \
30 "nop \n\t" \
31 : \
32 : "i"(MSR_IE) \
33 : "memory"); \
34 } while (0)
35
36# define local_irq_enable() \
37 do { \
38 asm volatile ("# local_irq_enable \n\t" \
39 "msrset r0, %0 \n\t" \
40 "nop \n\t" \
41 : \
42 : "i"(MSR_IE) \
43 : "memory"); \
44 } while (0)
45
46# else /* CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR == 0 */
47
48# define local_irq_save(flags) \
49 do { \
50 register unsigned tmp; \
51 asm volatile ("# local_irq_save \n\t" \
52 "mfs %0, rmsr \n\t" \
53 "nop \n\t" \
54 "andi %1, %0, %2 \n\t" \
55 "mts rmsr, %1 \n\t" \
56 "nop \n\t" \
57 : "=r"(flags), "=r" (tmp) \
58 : "i"(~MSR_IE) \
59 : "memory"); \
60 } while (0)
61
62# define local_irq_disable() \
63 do { \
64 register unsigned tmp; \
65 asm volatile ("# local_irq_disable \n\t" \
66 "mfs %0, rmsr \n\t" \
67 "nop \n\t" \
68 "andi %0, %0, %1 \n\t" \
69 "mts rmsr, %0 \n\t" \
70 "nop \n\t" \
71 : "=r"(tmp) \
72 : "i"(~MSR_IE) \
73 : "memory"); \
74 } while (0)
75
76# define local_irq_enable() \
77 do { \
78 register unsigned tmp; \
79 asm volatile ("# local_irq_enable \n\t" \
80 "mfs %0, rmsr \n\t" \
81 "nop \n\t" \
82 "ori %0, %0, %1 \n\t" \
83 "mts rmsr, %0 \n\t" \
84 "nop \n\t" \
85 : "=r"(tmp) \
86 : "i"(MSR_IE) \
87 : "memory"); \
88 } while (0)
89
90# endif /* CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR */
91
92#define local_save_flags(flags) \
93 do { \
94 asm volatile ("# local_save_flags \n\t" \
95 "mfs %0, rmsr \n\t" \
96 "nop \n\t" \
97 : "=r"(flags) \
98 : \
99 : "memory"); \
100 } while (0)
101
102#define local_irq_restore(flags) \
103 do { \
104 asm volatile ("# local_irq_restore \n\t"\
105 "mts rmsr, %0 \n\t" \
106 "nop \n\t" \
107 : \
108 : "r"(flags) \
109 : "memory"); \
110 } while (0)
111
112static inline int irqs_disabled(void)
113{
114 unsigned long flags;
115
116 local_save_flags(flags);
117 return ((flags & MSR_IE) == 0);
118}
119
120#define raw_irqs_disabled irqs_disabled
121#define raw_irqs_disabled_flags(flags) ((flags) == 0)
122
123#endif /* _ASM_MICROBLAZE_IRQFLAGS_H */
diff --git a/arch/microblaze/include/asm/kdebug.h b/arch/microblaze/include/asm/kdebug.h
new file mode 100644
index 000000000000..6ece1b037665
--- /dev/null
+++ b/arch/microblaze/include/asm/kdebug.h
@@ -0,0 +1 @@
#include <asm-generic/kdebug.h>
diff --git a/arch/microblaze/include/asm/kmap_types.h b/arch/microblaze/include/asm/kmap_types.h
new file mode 100644
index 000000000000..4d7e222f5dd7
--- /dev/null
+++ b/arch/microblaze/include/asm/kmap_types.h
@@ -0,0 +1,29 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_KMAP_TYPES_H
10#define _ASM_MICROBLAZE_KMAP_TYPES_H
11
12enum km_type {
13 KM_BOUNCE_READ,
14 KM_SKB_SUNRPC_DATA,
15 KM_SKB_DATA_SOFTIRQ,
16 KM_USER0,
17 KM_USER1,
18 KM_BIO_SRC_IRQ,
19 KM_BIO_DST_IRQ,
20 KM_PTE0,
21 KM_PTE1,
22 KM_IRQ0,
23 KM_IRQ1,
24 KM_SOFTIRQ0,
25 KM_SOFTIRQ1,
26 KM_TYPE_NR,
27};
28
29#endif /* _ASM_MICROBLAZE_KMAP_TYPES_H */
diff --git a/arch/microblaze/include/asm/linkage.h b/arch/microblaze/include/asm/linkage.h
new file mode 100644
index 000000000000..3a8e36d057eb
--- /dev/null
+++ b/arch/microblaze/include/asm/linkage.h
@@ -0,0 +1,15 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_LINKAGE_H
10#define _ASM_MICROBLAZE_LINKAGE_H
11
12#define __ALIGN .align 4
13#define __ALIGN_STR ".align 4"
14
15#endif /* _ASM_MICROBLAZE_LINKAGE_H */
diff --git a/arch/microblaze/include/asm/lmb.h b/arch/microblaze/include/asm/lmb.h
new file mode 100644
index 000000000000..a0a0a929c293
--- /dev/null
+++ b/arch/microblaze/include/asm/lmb.h
@@ -0,0 +1,17 @@
1/*
2 * Copyright (C) 2008 Michal Simek <monstr@monstr.eu>
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_LMB_H
10#define _ASM_MICROBLAZE_LMB_H
11
12/* LMB limit is OFF */
13#define LMB_REAL_LIMIT 0xFFFFFFFF
14
15#endif /* _ASM_MICROBLAZE_LMB_H */
16
17
diff --git a/arch/microblaze/include/asm/local.h b/arch/microblaze/include/asm/local.h
new file mode 100644
index 000000000000..c11c530f74d0
--- /dev/null
+++ b/arch/microblaze/include/asm/local.h
@@ -0,0 +1 @@
#include <asm-generic/local.h>
diff --git a/arch/microblaze/include/asm/mman.h b/arch/microblaze/include/asm/mman.h
new file mode 100644
index 000000000000..4914b1329445
--- /dev/null
+++ b/arch/microblaze/include/asm/mman.h
@@ -0,0 +1,25 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_MMAN_H
10#define _ASM_MICROBLAZE_MMAN_H
11
12#include <asm-generic/mman.h>
13
14#define MAP_GROWSDOWN 0x0100 /* stack-like segment */
15#define MAP_DENYWRITE 0x0800 /* ETXTBSY */
16#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */
17#define MAP_LOCKED 0x2000 /* pages are locked */
18#define MAP_NORESERVE 0x4000 /* don't check for reservations */
19#define MAP_POPULATE 0x8000 /* populate (prefault) pagetables */
20#define MAP_NONBLOCK 0x10000 /* do not block on IO */
21
22#define MCL_CURRENT 1 /* lock all current mappings */
23#define MCL_FUTURE 2 /* lock all future mappings */
24
25#endif /* _ASM_MICROBLAZE_MMAN_H */
diff --git a/arch/microblaze/include/asm/mmu.h b/arch/microblaze/include/asm/mmu.h
new file mode 100644
index 000000000000..0e0431d61635
--- /dev/null
+++ b/arch/microblaze/include/asm/mmu.h
@@ -0,0 +1,19 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_MMU_H
10#define _ASM_MICROBLAZE_MMU_H
11
12#ifndef __ASSEMBLY__
13typedef struct {
14 struct vm_list_struct *vmlist;
15 unsigned long end_brk;
16} mm_context_t;
17#endif /* __ASSEMBLY__ */
18
19#endif /* _ASM_MICROBLAZE_MMU_H */
diff --git a/arch/microblaze/include/asm/mmu_context.h b/arch/microblaze/include/asm/mmu_context.h
new file mode 100644
index 000000000000..150ca01b74ba
--- /dev/null
+++ b/arch/microblaze/include/asm/mmu_context.h
@@ -0,0 +1,21 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_MMU_CONTEXT_H
10#define _ASM_MICROBLAZE_MMU_CONTEXT_H
11
12# define init_new_context(tsk, mm) ({ 0; })
13
14# define enter_lazy_tlb(mm, tsk) do {} while (0)
15# define change_mm_context(old, ctx, _pml4) do {} while (0)
16# define destroy_context(mm) do {} while (0)
17# define deactivate_mm(tsk, mm) do {} while (0)
18# define switch_mm(prev, next, tsk) do {} while (0)
19# define activate_mm(prev, next) do {} while (0)
20
21#endif /* _ASM_MICROBLAZE_MMU_CONTEXT_H */
diff --git a/arch/microblaze/include/asm/module.h b/arch/microblaze/include/asm/module.h
new file mode 100644
index 000000000000..914565a90315
--- /dev/null
+++ b/arch/microblaze/include/asm/module.h
@@ -0,0 +1,37 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_MODULE_H
10#define _ASM_MICROBLAZE_MODULE_H
11
12/* Microblaze Relocations */
13#define R_MICROBLAZE_NONE 0
14#define R_MICROBLAZE_32 1
15#define R_MICROBLAZE_32_PCREL 2
16#define R_MICROBLAZE_64_PCREL 3
17#define R_MICROBLAZE_32_PCREL_LO 4
18#define R_MICROBLAZE_64 5
19#define R_MICROBLAZE_32_LO 6
20#define R_MICROBLAZE_SRO32 7
21#define R_MICROBLAZE_SRW32 8
22#define R_MICROBLAZE_64_NONE 9
23#define R_MICROBLAZE_32_SYM_OP_SYM 10
24/* Keep this the last entry. */
25#define R_MICROBLAZE_NUM 11
26
27struct mod_arch_specific {
28 int foo;
29};
30
31#define Elf_Shdr Elf32_Shdr
32#define Elf_Sym Elf32_Sym
33#define Elf_Ehdr Elf32_Ehdr
34
35typedef struct { volatile int counter; } module_t;
36
37#endif /* _ASM_MICROBLAZE_MODULE_H */
diff --git a/arch/microblaze/include/asm/msgbuf.h b/arch/microblaze/include/asm/msgbuf.h
new file mode 100644
index 000000000000..09dd97097211
--- /dev/null
+++ b/arch/microblaze/include/asm/msgbuf.h
@@ -0,0 +1,31 @@
1#ifndef _ASM_MICROBLAZE_MSGBUF_H
2#define _ASM_MICROBLAZE_MSGBUF_H
3
4/*
5 * The msqid64_ds structure for microblaze architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct msqid64_ds {
15 struct ipc64_perm msg_perm;
16 __kernel_time_t msg_stime; /* last msgsnd time */
17 unsigned long __unused1;
18 __kernel_time_t msg_rtime; /* last msgrcv time */
19 unsigned long __unused2;
20 __kernel_time_t msg_ctime; /* last change time */
21 unsigned long __unused3;
22 unsigned long msg_cbytes; /* current number of bytes on queue */
23 unsigned long msg_qnum; /* number of messages in queue */
24 unsigned long msg_qbytes; /* max number of bytes on queue */
25 __kernel_pid_t msg_lspid; /* pid of last msgsnd */
26 __kernel_pid_t msg_lrpid; /* last receive pid */
27 unsigned long __unused4;
28 unsigned long __unused5;
29};
30
31#endif /* _ASM_MICROBLAZE_MSGBUF_H */
diff --git a/arch/microblaze/include/asm/mutex.h b/arch/microblaze/include/asm/mutex.h
new file mode 100644
index 000000000000..ff6101aa2c71
--- /dev/null
+++ b/arch/microblaze/include/asm/mutex.h
@@ -0,0 +1 @@
#include <asm-generic/mutex-dec.h>
diff --git a/arch/microblaze/include/asm/namei.h b/arch/microblaze/include/asm/namei.h
new file mode 100644
index 000000000000..61d60b8a07d5
--- /dev/null
+++ b/arch/microblaze/include/asm/namei.h
@@ -0,0 +1,22 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_NAMEI_H
10#define _ASM_MICROBLAZE_NAMEI_H
11
12#ifdef __KERNEL__
13
14/* This dummy routine maybe changed to something useful
15 * for /usr/gnemul/ emulation stuff.
16 * Look at asm-sparc/namei.h for details.
17 */
18#define __emul_prefix() NULL
19
20#endif /* __KERNEL__ */
21
22#endif /* _ASM_MICROBLAZE_NAMEI_H */
diff --git a/arch/microblaze/include/asm/of_device.h b/arch/microblaze/include/asm/of_device.h
new file mode 100644
index 000000000000..ba917cfaefe6
--- /dev/null
+++ b/arch/microblaze/include/asm/of_device.h
@@ -0,0 +1,45 @@
1/*
2 * Copyright (C) 2007-2008 Michal Simek <monstr@monstr.eu>
3 *
4 * based on PowerPC of_device.h
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#ifndef _ASM_MICROBLAZE_OF_DEVICE_H
12#define _ASM_MICROBLAZE_OF_DEVICE_H
13#ifdef __KERNEL__
14
15#include <linux/device.h>
16#include <linux/of.h>
17
18/*
19 * The of_device is a kind of "base class" that is a superset of
20 * struct device for use by devices attached to an OF node and
21 * probed using OF properties.
22 */
23struct of_device {
24 struct device_node *node; /* to be obsoleted */
25 u64 dma_mask; /* DMA mask */
26 struct device dev; /* Generic device interface */
27};
28
29extern ssize_t of_device_get_modalias(struct of_device *ofdev,
30 char *str, ssize_t len);
31
32extern struct of_device *of_device_alloc(struct device_node *np,
33 const char *bus_id,
34 struct device *parent);
35
36extern int of_device_uevent(struct device *dev,
37 struct kobj_uevent_env *env);
38
39extern void of_device_make_bus_id(struct of_device *dev);
40
41/* This is just here during the transition */
42#include <linux/of_device.h>
43
44#endif /* __KERNEL__ */
45#endif /* _ASM_MICROBLAZE_OF_DEVICE_H */
diff --git a/arch/microblaze/include/asm/of_platform.h b/arch/microblaze/include/asm/of_platform.h
new file mode 100644
index 000000000000..187c0eedaece
--- /dev/null
+++ b/arch/microblaze/include/asm/of_platform.h
@@ -0,0 +1,64 @@
1/*
2 * Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corp.
3 * <benh@kernel.crashing.org>
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version
8 * 2 of the License, or (at your option) any later version.
9 */
10
11#ifndef _ASM_MICROBLAZE_OF_PLATFORM_H
12#define _ASM_MICROBLAZE_OF_PLATFORM_H
13
14/* This is just here during the transition */
15#include <linux/of_platform.h>
16
17/*
18 * The list of OF IDs below is used for matching bus types in the
19 * system whose devices are to be exposed as of_platform_devices.
20 *
21 * This is the default list valid for most platforms. This file provides
22 * functions who can take an explicit list if necessary though
23 *
24 * The search is always performed recursively looking for children of
25 * the provided device_node and recursively if such a children matches
26 * a bus type in the list
27 */
28
29static const struct of_device_id of_default_bus_ids[] = {
30 { .type = "soc", },
31 { .compatible = "soc", },
32 { .type = "plb5", },
33 { .type = "plb4", },
34 { .type = "opb", },
35 { .type = "simple", },
36 {},
37};
38
39/* Platform drivers register/unregister */
40static inline int of_register_platform_driver(struct of_platform_driver *drv)
41{
42 return of_register_driver(drv, &of_platform_bus_type);
43}
44static inline void of_unregister_platform_driver(struct of_platform_driver *drv)
45{
46 of_unregister_driver(drv);
47}
48
49/* Platform devices and busses creation */
50extern struct of_device *of_platform_device_create(struct device_node *np,
51 const char *bus_id,
52 struct device *parent);
53/* pseudo "matches" value to not do deep probe */
54#define OF_NO_DEEP_PROBE ((struct of_device_id *)-1)
55
56extern int of_platform_bus_probe(struct device_node *root,
57 const struct of_device_id *matches,
58 struct device *parent);
59
60extern struct of_device *of_find_device_by_phandle(phandle ph);
61
62extern void of_instantiate_rtc(void);
63
64#endif /* _ASM_MICROBLAZE_OF_PLATFORM_H */
diff --git a/arch/microblaze/include/asm/page.h b/arch/microblaze/include/asm/page.h
new file mode 100644
index 000000000000..7238dcfcc517
--- /dev/null
+++ b/arch/microblaze/include/asm/page.h
@@ -0,0 +1,140 @@
1/*
2 * Copyright (C) 2008 Michal Simek
3 * Copyright (C) 2008 PetaLogix
4 * Copyright (C) 2006 Atmark Techno, Inc.
5 * Changes for MMU support:
6 * Copyright (C) 2007 Xilinx, Inc. All rights reserved.
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12
13#ifndef _ASM_MICROBLAZE_PAGE_H
14#define _ASM_MICROBLAZE_PAGE_H
15
16#include <linux/pfn.h>
17#include <asm/setup.h>
18
19/* PAGE_SHIFT determines the page size */
20#define PAGE_SHIFT (12)
21#define PAGE_SIZE (1UL << PAGE_SHIFT)
22#define PAGE_MASK (~(PAGE_SIZE-1))
23
24#ifdef __KERNEL__
25
26#ifndef __ASSEMBLY__
27
28#define PAGE_UP(addr) (((addr)+((PAGE_SIZE)-1))&(~((PAGE_SIZE)-1)))
29#define PAGE_DOWN(addr) ((addr)&(~((PAGE_SIZE)-1)))
30
31/* align addr on a size boundary - adjust address up/down if needed */
32#define _ALIGN_UP(addr, size) (((addr)+((size)-1))&(~((size)-1)))
33#define _ALIGN_DOWN(addr, size) ((addr)&(~((size)-1)))
34
35/* align addr on a size boundary - adjust address up if needed */
36#define _ALIGN(addr, size) _ALIGN_UP(addr, size)
37
38/*
39 * PAGE_OFFSET -- the first address of the first page of memory. When not
40 * using MMU this corresponds to the first free page in physical memory (aligned
41 * on a page boundary).
42 */
43extern unsigned int __page_offset;
44#define PAGE_OFFSET __page_offset
45
46#define copy_page(to, from) memcpy((to), (from), PAGE_SIZE)
47#define get_user_page(vaddr) __get_free_page(GFP_KERNEL)
48#define free_user_page(page, addr) free_page(addr)
49
50#define clear_page(pgaddr) memset((pgaddr), 0, PAGE_SIZE)
51
52
53#define clear_user_page(pgaddr, vaddr, page) memset((pgaddr), 0, PAGE_SIZE)
54#define copy_user_page(vto, vfrom, vaddr, topg) \
55 memcpy((vto), (vfrom), PAGE_SIZE)
56
57/*
58 * These are used to make use of C type-checking..
59 */
60typedef struct page *pgtable_t;
61typedef struct { unsigned long pte; } pte_t;
62typedef struct { unsigned long pgprot; } pgprot_t;
63typedef struct { unsigned long ste[64]; } pmd_t;
64typedef struct { pmd_t pue[1]; } pud_t;
65typedef struct { pud_t pge[1]; } pgd_t;
66
67
68#define pte_val(x) ((x).pte)
69#define pgprot_val(x) ((x).pgprot)
70#define pmd_val(x) ((x).ste[0])
71#define pud_val(x) ((x).pue[0])
72#define pgd_val(x) ((x).pge[0])
73
74#define __pte(x) ((pte_t) { (x) })
75#define __pmd(x) ((pmd_t) { (x) })
76#define __pgd(x) ((pgd_t) { (x) })
77#define __pgprot(x) ((pgprot_t) { (x) })
78
79/**
80 * Conversions for virtual address, physical address, pfn, and struct
81 * page are defined in the following files.
82 *
83 * virt -+
84 * | asm-microblaze/page.h
85 * phys -+
86 * | linux/pfn.h
87 * pfn -+
88 * | asm-generic/memory_model.h
89 * page -+
90 *
91 */
92
93extern unsigned long max_low_pfn;
94extern unsigned long min_low_pfn;
95extern unsigned long max_pfn;
96
97#define __pa(vaddr) ((unsigned long) (vaddr))
98#define __va(paddr) ((void *) (paddr))
99
100#define phys_to_pfn(phys) (PFN_DOWN(phys))
101#define pfn_to_phys(pfn) (PFN_PHYS(pfn))
102
103#define virt_to_pfn(vaddr) (phys_to_pfn((__pa(vaddr))))
104#define pfn_to_virt(pfn) __va(pfn_to_phys((pfn)))
105
106#define virt_to_page(vaddr) (pfn_to_page(virt_to_pfn(vaddr)))
107#define page_to_virt(page) (pfn_to_virt(page_to_pfn(page)))
108
109#define page_to_phys(page) (pfn_to_phys(page_to_pfn(page)))
110#define page_to_bus(page) (page_to_phys(page))
111#define phys_to_page(paddr) (pfn_to_page(phys_to_pfn(paddr)))
112
113extern unsigned int memory_start;
114extern unsigned int memory_end;
115extern unsigned int memory_size;
116
117#define pfn_valid(pfn) ((pfn) >= min_low_pfn && (pfn) < max_mapnr)
118
119#define ARCH_PFN_OFFSET (PAGE_OFFSET >> PAGE_SHIFT)
120
121#else
122#define tophys(rd, rs) (addik rd, rs, 0)
123#define tovirt(rd, rs) (addik rd, rs, 0)
124#endif /* __ASSEMBLY__ */
125
126#define virt_addr_valid(vaddr) (pfn_valid(virt_to_pfn(vaddr)))
127
128/* Convert between virtual and physical address for MMU. */
129/* Handle MicroBlaze processor with virtual memory. */
130#define __virt_to_phys(addr) addr
131#define __phys_to_virt(addr) addr
132
133#define TOPHYS(addr) __virt_to_phys(addr)
134
135#endif /* __KERNEL__ */
136
137#include <asm-generic/memory_model.h>
138#include <asm-generic/page.h>
139
140#endif /* _ASM_MICROBLAZE_PAGE_H */
diff --git a/arch/microblaze/include/asm/param.h b/arch/microblaze/include/asm/param.h
new file mode 100644
index 000000000000..8c538a49616d
--- /dev/null
+++ b/arch/microblaze/include/asm/param.h
@@ -0,0 +1,30 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_PARAM_H
10#define _ASM_MICROBLAZE_PARAM_H
11
12#ifdef __KERNEL__
13#define HZ CONFIG_HZ /* internal kernel timer frequency */
14#define USER_HZ 100 /* for user interfaces in "ticks" */
15#define CLOCKS_PER_SEC (USER_HZ) /* frequency at which times() counts */
16#endif /* __KERNEL__ */
17
18#ifndef HZ
19#define HZ 100
20#endif
21
22#define EXEC_PAGESIZE 4096
23
24#ifndef NOGROUP
25#define NOGROUP (-1)
26#endif
27
28#define MAXHOSTNAMELEN 64 /* max length of hostname */
29
30#endif /* _ASM_MICROBLAZE_PARAM_H */
diff --git a/arch/microblaze/include/asm/pci-bridge.h b/arch/microblaze/include/asm/pci-bridge.h
new file mode 100644
index 000000000000..7ad28f6f5f1a
--- /dev/null
+++ b/arch/microblaze/include/asm/pci-bridge.h
@@ -0,0 +1 @@
#include <linux/pci.h>
diff --git a/arch/microblaze/include/asm/pci.h b/arch/microblaze/include/asm/pci.h
new file mode 100644
index 000000000000..ca03794cf3f0
--- /dev/null
+++ b/arch/microblaze/include/asm/pci.h
@@ -0,0 +1 @@
#include <linux/io.h>
diff --git a/arch/microblaze/include/asm/percpu.h b/arch/microblaze/include/asm/percpu.h
new file mode 100644
index 000000000000..06a959d67234
--- /dev/null
+++ b/arch/microblaze/include/asm/percpu.h
@@ -0,0 +1 @@
#include <asm-generic/percpu.h>
diff --git a/arch/microblaze/include/asm/pgalloc.h b/arch/microblaze/include/asm/pgalloc.h
new file mode 100644
index 000000000000..2a4b35484010
--- /dev/null
+++ b/arch/microblaze/include/asm/pgalloc.h
@@ -0,0 +1,14 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_PGALLOC_H
10#define _ASM_MICROBLAZE_PGALLOC_H
11
12#define check_pgt_cache() do {} while (0)
13
14#endif /* _ASM_MICROBLAZE_PGALLOC_H */
diff --git a/arch/microblaze/include/asm/pgtable.h b/arch/microblaze/include/asm/pgtable.h
new file mode 100644
index 000000000000..4df31e46568e
--- /dev/null
+++ b/arch/microblaze/include/asm/pgtable.h
@@ -0,0 +1,54 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_PGTABLE_H
10#define _ASM_MICROBLAZE_PGTABLE_H
11
12#include <asm/setup.h>
13
14#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
15 remap_pfn_range(vma, vaddr, pfn, size, prot)
16
17#define pgd_present(pgd) (1) /* pages are always present on non MMU */
18#define pgd_none(pgd) (0)
19#define pgd_bad(pgd) (0)
20#define pgd_clear(pgdp)
21#define kern_addr_valid(addr) (1)
22#define pmd_offset(a, b) ((void *) 0)
23
24#define PAGE_NONE __pgprot(0) /* these mean nothing to non MMU */
25#define PAGE_SHARED __pgprot(0) /* these mean nothing to non MMU */
26#define PAGE_COPY __pgprot(0) /* these mean nothing to non MMU */
27#define PAGE_READONLY __pgprot(0) /* these mean nothing to non MMU */
28#define PAGE_KERNEL __pgprot(0) /* these mean nothing to non MMU */
29
30#define __swp_type(x) (0)
31#define __swp_offset(x) (0)
32#define __swp_entry(typ, off) ((swp_entry_t) { ((typ) | ((off) << 7)) })
33#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
34#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
35
36#ifndef __ASSEMBLY__
37static inline int pte_file(pte_t pte) { return 0; }
38#endif /* __ASSEMBLY__ */
39
40#define ZERO_PAGE(vaddr) ({ BUG(); NULL; })
41
42#define swapper_pg_dir ((pgd_t *) NULL)
43
44#define pgtable_cache_init() do {} while (0)
45
46#define arch_enter_lazy_cpu_mode() do {} while (0)
47
48#ifndef __ASSEMBLY__
49#include <asm-generic/pgtable.h>
50
51void setup_memory(void);
52#endif /* __ASSEMBLY__ */
53
54#endif /* _ASM_MICROBLAZE_PGTABLE_H */
diff --git a/arch/microblaze/include/asm/poll.h b/arch/microblaze/include/asm/poll.h
new file mode 100644
index 000000000000..c98509d3149e
--- /dev/null
+++ b/arch/microblaze/include/asm/poll.h
@@ -0,0 +1 @@
#include <asm-generic/poll.h>
diff --git a/arch/microblaze/include/asm/posix_types.h b/arch/microblaze/include/asm/posix_types.h
new file mode 100644
index 000000000000..b4df41c5dde2
--- /dev/null
+++ b/arch/microblaze/include/asm/posix_types.h
@@ -0,0 +1,73 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_POSIX_TYPES_H
10#define _ASM_MICROBLAZE_POSIX_TYPES_H
11
12/*
13 * This file is generally used by user-level software, so you need to
14 * be a little careful about namespace pollution etc. Also, we cannot
15 * assume GCC is being used.
16 */
17
18typedef unsigned long __kernel_ino_t;
19typedef unsigned int __kernel_mode_t;
20typedef unsigned int __kernel_nlink_t;
21typedef long __kernel_off_t;
22typedef int __kernel_pid_t;
23typedef unsigned int __kernel_ipc_pid_t;
24typedef unsigned int __kernel_uid_t;
25typedef unsigned int __kernel_gid_t;
26typedef unsigned long __kernel_size_t;
27typedef long __kernel_ssize_t;
28typedef int __kernel_ptrdiff_t;
29typedef long __kernel_time_t;
30typedef long __kernel_suseconds_t;
31typedef long __kernel_clock_t;
32typedef int __kernel_timer_t;
33typedef int __kernel_clockid_t;
34typedef int __kernel_daddr_t;
35typedef char *__kernel_caddr_t;
36typedef unsigned short __kernel_uid16_t;
37typedef unsigned short __kernel_gid16_t;
38typedef unsigned int __kernel_uid32_t;
39typedef unsigned int __kernel_gid32_t;
40
41typedef unsigned int __kernel_old_uid_t;
42typedef unsigned int __kernel_old_gid_t;
43typedef unsigned int __kernel_old_dev_t;
44
45#ifdef __GNUC__
46typedef long long __kernel_loff_t;
47#endif
48
49typedef struct {
50#if defined(__KERNEL__) || defined(__USE_ALL)
51 int val[2];
52#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */
53 int __val[2];
54#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */
55} __kernel_fsid_t;
56
57#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2)
58
59#undef __FD_SET
60#define __FD_SET(d, set) ((set)->fds_bits[__FDELT(d)] |= __FDMASK(d))
61
62#undef __FD_CLR
63#define __FD_CLR(d, set) ((set)->fds_bits[__FDELT(d)] &= ~__FDMASK(d))
64
65#undef __FD_ISSET
66#define __FD_ISSET(d, set) (!!((set)->fds_bits[__FDELT(d)] & __FDMASK(d)))
67
68#undef __FD_ZERO
69#define __FD_ZERO(fdsetp) (memset(fdsetp, 0, sizeof(*(fd_set *)fdsetp)))
70
71#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */
72
73#endif /* _ASM_MICROBLAZE_POSIX_TYPES_H */
diff --git a/arch/microblaze/include/asm/processor.h b/arch/microblaze/include/asm/processor.h
new file mode 100644
index 000000000000..d8e15434ba21
--- /dev/null
+++ b/arch/microblaze/include/asm/processor.h
@@ -0,0 +1,93 @@
1/*
2 * Copyright (C) 2008 Michal Simek
3 * Copyright (C) 2008 PetaLogix
4 * Copyright (C) 2006 Atmark Techno, Inc.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#ifndef _ASM_MICROBLAZE_PROCESSOR_H
12#define _ASM_MICROBLAZE_PROCESSOR_H
13
14#include <asm/ptrace.h>
15#include <asm/setup.h>
16#include <asm/registers.h>
17#include <asm/segment.h>
18
19# ifndef __ASSEMBLY__
20/* from kernel/cpu/mb.c */
21extern const struct seq_operations cpuinfo_op;
22
23# define cpu_relax() barrier()
24# define cpu_sleep() do {} while (0)
25# define prepare_to_copy(tsk) do {} while (0)
26
27# endif /* __ASSEMBLY__ */
28
29/*
30 * User space process size: memory size
31 *
32 * TASK_SIZE on MMU cpu is usually 1GB. However, on no-MMU arch, both
33 * user processes and the kernel is on the same memory region. They
34 * both share the memory space and that is limited by the amount of
35 * physical memory. thus, we set TASK_SIZE == amount of total memory.
36 */
37# define TASK_SIZE (0x81000000 - 0x80000000)
38
39/*
40 * Default implementation of macro that returns current
41 * instruction pointer ("program counter").
42 */
43# define current_text_addr() ({ __label__ _l; _l: &&_l; })
44
45/*
46 * This decides where the kernel will search for a free chunk of vm
47 * space during mmap's. We won't be using it
48 */
49# define TASK_UNMAPPED_BASE 0
50
51/* definition in include/linux/sched.h */
52struct task_struct;
53
54/* thread_struct is gone. use thread_info instead. */
55struct thread_struct { };
56# define INIT_THREAD { }
57
58/* Do necessary setup to start up a newly executed thread. */
59static inline void start_thread(struct pt_regs *regs,
60 unsigned long pc,
61 unsigned long usp)
62{
63 regs->pc = pc;
64 regs->r1 = usp;
65 regs->kernel_mode = 0;
66}
67
68/* Free all resources held by a thread. */
69static inline void release_thread(struct task_struct *dead_task)
70{
71}
72
73/* Free all resources held by a thread. */
74static inline void exit_thread(void)
75{
76}
77
78extern unsigned long thread_saved_pc(struct task_struct *t);
79
80extern unsigned long get_wchan(struct task_struct *p);
81
82/*
83 * create a kernel thread without removing it from tasklists
84 */
85extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
86
87# define task_pt_regs(tsk) \
88 (((struct pt_regs *)(THREAD_SIZE + task_stack_page(tsk))) - 1)
89
90# define KSTK_EIP(tsk) (0)
91# define KSTK_ESP(tsk) (0)
92
93#endif /* _ASM_MICROBLAZE_PROCESSOR_H */
diff --git a/arch/microblaze/include/asm/prom.h b/arch/microblaze/include/asm/prom.h
new file mode 100644
index 000000000000..20f7b3a926e8
--- /dev/null
+++ b/arch/microblaze/include/asm/prom.h
@@ -0,0 +1,313 @@
1/*
2 * Definitions for talking to the Open Firmware PROM on
3 * Power Macintosh computers.
4 *
5 * Copyright (C) 1996-2005 Paul Mackerras.
6 *
7 * Updates for PPC64 by Peter Bergner & David Engebretsen, IBM Corp.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14
15#ifndef _ASM_MICROBLAZE_PROM_H
16#define _ASM_MICROBLAZE_PROM_H
17#ifdef __KERNEL__
18
19#include <linux/types.h>
20#include <linux/proc_fs.h>
21#include <linux/platform_device.h>
22#include <asm/irq.h>
23#include <asm/atomic.h>
24
25#define OF_ROOT_NODE_ADDR_CELLS_DEFAULT 1
26#define OF_ROOT_NODE_SIZE_CELLS_DEFAULT 1
27
28#define of_compat_cmp(s1, s2, l) strncasecmp((s1), (s2), (l))
29#define of_prop_cmp(s1, s2) strcmp((s1), (s2))
30#define of_node_cmp(s1, s2) strcasecmp((s1), (s2))
31
32/* Definitions used by the flattened device tree */
33#define OF_DT_HEADER 0xd00dfeed /* marker */
34#define OF_DT_BEGIN_NODE 0x1 /* Start of node, full name */
35#define OF_DT_END_NODE 0x2 /* End node */
36#define OF_DT_PROP 0x3 /* Property: name off, size, content */
37#define OF_DT_NOP 0x4 /* nop */
38#define OF_DT_END 0x9
39
40#define OF_DT_VERSION 0x10
41
42/*
43 * This is what gets passed to the kernel by prom_init or kexec
44 *
45 * The dt struct contains the device tree structure, full pathes and
46 * property contents. The dt strings contain a separate block with just
47 * the strings for the property names, and is fully page aligned and
48 * self contained in a page, so that it can be kept around by the kernel,
49 * each property name appears only once in this page (cheap compression)
50 *
51 * the mem_rsvmap contains a map of reserved ranges of physical memory,
52 * passing it here instead of in the device-tree itself greatly simplifies
53 * the job of everybody. It's just a list of u64 pairs (base/size) that
54 * ends when size is 0
55 */
56struct boot_param_header {
57 u32 magic; /* magic word OF_DT_HEADER */
58 u32 totalsize; /* total size of DT block */
59 u32 off_dt_struct; /* offset to structure */
60 u32 off_dt_strings; /* offset to strings */
61 u32 off_mem_rsvmap; /* offset to memory reserve map */
62 u32 version; /* format version */
63 u32 last_comp_version; /* last compatible version */
64 /* version 2 fields below */
65 u32 boot_cpuid_phys; /* Physical CPU id we're booting on */
66 /* version 3 fields below */
67 u32 dt_strings_size; /* size of the DT strings block */
68 /* version 17 fields below */
69 u32 dt_struct_size; /* size of the DT structure block */
70};
71
72typedef u32 phandle;
73typedef u32 ihandle;
74
75struct property {
76 char *name;
77 int length;
78 void *value;
79 struct property *next;
80};
81
82struct device_node {
83 const char *name;
84 const char *type;
85 phandle node;
86 phandle linux_phandle;
87 char *full_name;
88
89 struct property *properties;
90 struct property *deadprops; /* removed properties */
91 struct device_node *parent;
92 struct device_node *child;
93 struct device_node *sibling;
94 struct device_node *next; /* next device of same type */
95 struct device_node *allnext; /* next in list of all nodes */
96 struct proc_dir_entry *pde; /* this node's proc directory */
97 struct kref kref;
98 unsigned long _flags;
99 void *data;
100};
101
102extern struct device_node *of_chosen;
103
104static inline int of_node_check_flag(struct device_node *n, unsigned long flag)
105{
106 return test_bit(flag, &n->_flags);
107}
108
109static inline void of_node_set_flag(struct device_node *n, unsigned long flag)
110{
111 set_bit(flag, &n->_flags);
112}
113
114#define HAVE_ARCH_DEVTREE_FIXUPS
115
116static inline void set_node_proc_entry(struct device_node *dn,
117 struct proc_dir_entry *de)
118{
119 dn->pde = de;
120}
121
122extern struct device_node *allnodes; /* temporary while merging */
123extern rwlock_t devtree_lock; /* temporary while merging */
124
125extern struct device_node *of_find_all_nodes(struct device_node *prev);
126extern struct device_node *of_node_get(struct device_node *node);
127extern void of_node_put(struct device_node *node);
128
129/* For scanning the flat device-tree at boot time */
130extern int __init of_scan_flat_dt(int (*it)(unsigned long node,
131 const char *uname, int depth,
132 void *data),
133 void *data);
134extern void *__init of_get_flat_dt_prop(unsigned long node, const char *name,
135 unsigned long *size);
136extern int __init
137 of_flat_dt_is_compatible(unsigned long node, const char *name);
138extern unsigned long __init of_get_flat_dt_root(void);
139
140/* For updating the device tree at runtime */
141extern void of_attach_node(struct device_node *);
142extern void of_detach_node(struct device_node *);
143
144/* Other Prototypes */
145extern void finish_device_tree(void);
146extern void unflatten_device_tree(void);
147extern int early_uartlite_console(void);
148extern void early_init_devtree(void *);
149extern int machine_is_compatible(const char *compat);
150extern void print_properties(struct device_node *node);
151extern int prom_n_intr_cells(struct device_node *np);
152extern void prom_get_irq_senses(unsigned char *senses, int off, int max);
153extern int prom_add_property(struct device_node *np, struct property *prop);
154extern int prom_remove_property(struct device_node *np, struct property *prop);
155extern int prom_update_property(struct device_node *np,
156 struct property *newprop,
157 struct property *oldprop);
158
159extern struct resource *request_OF_resource(struct device_node *node,
160 int index, const char *name_postfix);
161extern int release_OF_resource(struct device_node *node, int index);
162
163/*
164 * OF address retreival & translation
165 */
166
167/* Helper to read a big number; size is in cells (not bytes) */
168static inline u64 of_read_number(const u32 *cell, int size)
169{
170 u64 r = 0;
171 while (size--)
172 r = (r << 32) | *(cell++);
173 return r;
174}
175
176/* Like of_read_number, but we want an unsigned long result */
177#define of_read_ulong(cell, size) of_read_number(cell, size)
178
179/* Translate an OF address block into a CPU physical address
180 */
181extern u64 of_translate_address(struct device_node *np, const u32 *addr);
182
183/* Extract an address from a device, returns the region size and
184 * the address space flags too. The PCI version uses a BAR number
185 * instead of an absolute index
186 */
187extern const u32 *of_get_address(struct device_node *dev, int index,
188 u64 *size, unsigned int *flags);
189extern const u32 *of_get_pci_address(struct device_node *dev, int bar_no,
190 u64 *size, unsigned int *flags);
191
192/* Get an address as a resource. Note that if your address is
193 * a PIO address, the conversion will fail if the physical address
194 * can't be internally converted to an IO token with
195 * pci_address_to_pio(), that is because it's either called to early
196 * or it can't be matched to any host bridge IO space
197 */
198extern int of_address_to_resource(struct device_node *dev, int index,
199 struct resource *r);
200extern int of_pci_address_to_resource(struct device_node *dev, int bar,
201 struct resource *r);
202
203/* Parse the ibm,dma-window property of an OF node into the busno, phys and
204 * size parameters.
205 */
206void of_parse_dma_window(struct device_node *dn, const void *dma_window_prop,
207 unsigned long *busno, unsigned long *phys, unsigned long *size);
208
209extern void kdump_move_device_tree(void);
210
211/* CPU OF node matching */
212struct device_node *of_get_cpu_node(int cpu, unsigned int *thread);
213
214/* Get the MAC address */
215extern const void *of_get_mac_address(struct device_node *np);
216
217/*
218 * OF interrupt mapping
219 */
220
221/* This structure is returned when an interrupt is mapped. The controller
222 * field needs to be put() after use
223 */
224
225#define OF_MAX_IRQ_SPEC 4 /* We handle specifiers of at most 4 cells */
226
227struct of_irq {
228 struct device_node *controller; /* Interrupt controller node */
229 u32 size; /* Specifier size */
230 u32 specifier[OF_MAX_IRQ_SPEC]; /* Specifier copy */
231};
232
233/**
234 * of_irq_map_init - Initialize the irq remapper
235 * @flags: flags defining workarounds to enable
236 *
237 * Some machines have bugs in the device-tree which require certain workarounds
238 * to be applied. Call this before any interrupt mapping attempts to enable
239 * those workarounds.
240 */
241#define OF_IMAP_OLDWORLD_MAC 0x00000001
242#define OF_IMAP_NO_PHANDLE 0x00000002
243
244extern void of_irq_map_init(unsigned int flags);
245
246/**
247 * of_irq_map_raw - Low level interrupt tree parsing
248 * @parent: the device interrupt parent
249 * @intspec: interrupt specifier ("interrupts" property of the device)
250 * @ointsize: size of the passed in interrupt specifier
251 * @addr: address specifier (start of "reg" property of the device)
252 * @out_irq: structure of_irq filled by this function
253 *
254 * Returns 0 on success and a negative number on error
255 *
256 * This function is a low-level interrupt tree walking function. It
257 * can be used to do a partial walk with synthetized reg and interrupts
258 * properties, for example when resolving PCI interrupts when no device
259 * node exist for the parent.
260 *
261 */
262
263extern int of_irq_map_raw(struct device_node *parent, const u32 *intspec,
264 u32 ointsize, const u32 *addr,
265 struct of_irq *out_irq);
266
267/**
268 * of_irq_map_one - Resolve an interrupt for a device
269 * @device: the device whose interrupt is to be resolved
270 * @index: index of the interrupt to resolve
271 * @out_irq: structure of_irq filled by this function
272 *
273 * This function resolves an interrupt, walking the tree, for a given
274 * device-tree node. It's the high level pendant to of_irq_map_raw().
275 * It also implements the workarounds for OldWolrd Macs.
276 */
277extern int of_irq_map_one(struct device_node *device, int index,
278 struct of_irq *out_irq);
279
280/**
281 * of_irq_map_pci - Resolve the interrupt for a PCI device
282 * @pdev: the device whose interrupt is to be resolved
283 * @out_irq: structure of_irq filled by this function
284 *
285 * This function resolves the PCI interrupt for a given PCI device. If a
286 * device-node exists for a given pci_dev, it will use normal OF tree
287 * walking. If not, it will implement standard swizzling and walk up the
288 * PCI tree until an device-node is found, at which point it will finish
289 * resolving using the OF tree walking.
290 */
291struct pci_dev;
292extern int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq);
293
294extern int of_irq_to_resource(struct device_node *dev, int index,
295 struct resource *r);
296
297/**
298 * of_iomap - Maps the memory mapped IO for a given device_node
299 * @device: the device whose io range will be mapped
300 * @index: index of the io range
301 *
302 * Returns a pointer to the mapped memory
303 */
304extern void __iomem *of_iomap(struct device_node *device, int index);
305
306/*
307 * NB: This is here while we transition from using asm/prom.h
308 * to linux/of.h
309 */
310#include <linux/of.h>
311
312#endif /* __KERNEL__ */
313#endif /* _ASM_MICROBLAZE_PROM_H */
diff --git a/arch/microblaze/include/asm/ptrace.h b/arch/microblaze/include/asm/ptrace.h
new file mode 100644
index 000000000000..f1f03486428a
--- /dev/null
+++ b/arch/microblaze/include/asm/ptrace.h
@@ -0,0 +1,68 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_PTRACE_H
10#define _ASM_MICROBLAZE_PTRACE_H
11
12#ifndef __ASSEMBLY__
13#include <linux/types.h>
14
15typedef unsigned long microblaze_reg_t;
16
17struct pt_regs {
18 microblaze_reg_t r0;
19 microblaze_reg_t r1;
20 microblaze_reg_t r2;
21 microblaze_reg_t r3;
22 microblaze_reg_t r4;
23 microblaze_reg_t r5;
24 microblaze_reg_t r6;
25 microblaze_reg_t r7;
26 microblaze_reg_t r8;
27 microblaze_reg_t r9;
28 microblaze_reg_t r10;
29 microblaze_reg_t r11;
30 microblaze_reg_t r12;
31 microblaze_reg_t r13;
32 microblaze_reg_t r14;
33 microblaze_reg_t r15;
34 microblaze_reg_t r16;
35 microblaze_reg_t r17;
36 microblaze_reg_t r18;
37 microblaze_reg_t r19;
38 microblaze_reg_t r20;
39 microblaze_reg_t r21;
40 microblaze_reg_t r22;
41 microblaze_reg_t r23;
42 microblaze_reg_t r24;
43 microblaze_reg_t r25;
44 microblaze_reg_t r26;
45 microblaze_reg_t r27;
46 microblaze_reg_t r28;
47 microblaze_reg_t r29;
48 microblaze_reg_t r30;
49 microblaze_reg_t r31;
50 microblaze_reg_t pc;
51 microblaze_reg_t msr;
52 microblaze_reg_t ear;
53 microblaze_reg_t esr;
54 microblaze_reg_t fsr;
55 int kernel_mode;
56};
57
58#define kernel_mode(regs) ((regs)->kernel_mode)
59#define user_mode(regs) (!kernel_mode(regs))
60
61#define instruction_pointer(regs) ((regs)->pc)
62#define profile_pc(regs) instruction_pointer(regs)
63
64void show_regs(struct pt_regs *);
65
66#endif /* __ASSEMBLY__ */
67
68#endif /* _ASM_MICROBLAZE_PTRACE_H */
diff --git a/arch/microblaze/include/asm/pvr.h b/arch/microblaze/include/asm/pvr.h
new file mode 100644
index 000000000000..66f1b30dd097
--- /dev/null
+++ b/arch/microblaze/include/asm/pvr.h
@@ -0,0 +1,209 @@
1/*
2 * Support for the MicroBlaze PVR (Processor Version Register)
3 *
4 * Copyright (C) 2009 Michal Simek <monstr@monstr.eu>
5 * Copyright (C) 2007 John Williams <john.williams@petalogix.com>
6 * Copyright (C) 2007 - 2009 PetaLogix
7 *
8 * This file is subject to the terms and conditions of the GNU General
9 * Public License. See the file COPYING in the main directory of this
10 * archive for more details.
11 */
12
13#ifndef _ASM_MICROBLAZE_PVR_H
14#define _ASM_MICROBLAZE_PVR_H
15
16#define PVR_MSR_BIT 0x400
17
18struct pvr_s {
19 unsigned pvr[16];
20};
21
22/* The following taken from Xilinx's standalone BSP pvr.h */
23
24/* Basic PVR mask */
25#define PVR0_PVR_FULL_MASK 0x80000000
26#define PVR0_USE_BARREL_MASK 0x40000000
27#define PVR0_USE_DIV_MASK 0x20000000
28#define PVR0_USE_HW_MUL_MASK 0x10000000
29#define PVR0_USE_FPU_MASK 0x08000000
30#define PVR0_USE_EXC_MASK 0x04000000
31#define PVR0_USE_ICACHE_MASK 0x02000000
32#define PVR0_USE_DCACHE_MASK 0x01000000
33#define PVR0_USE_MMU 0x00800000 /* new */
34#define PVR0_VERSION_MASK 0x0000FF00
35#define PVR0_USER1_MASK 0x000000FF
36
37/* User 2 PVR mask */
38#define PVR1_USER2_MASK 0xFFFFFFFF
39
40/* Configuration PVR masks */
41#define PVR2_D_OPB_MASK 0x80000000
42#define PVR2_D_LMB_MASK 0x40000000
43#define PVR2_I_OPB_MASK 0x20000000
44#define PVR2_I_LMB_MASK 0x10000000
45#define PVR2_INTERRUPT_IS_EDGE_MASK 0x08000000
46#define PVR2_EDGE_IS_POSITIVE_MASK 0x04000000
47#define PVR2_D_PLB_MASK 0x02000000 /* new */
48#define PVR2_I_PLB_MASK 0x01000000 /* new */
49#define PVR2_INTERCONNECT 0x00800000 /* new */
50#define PVR2_USE_EXTEND_FSL 0x00080000 /* new */
51#define PVR2_USE_FSL_EXC 0x00040000 /* new */
52#define PVR2_USE_MSR_INSTR 0x00020000
53#define PVR2_USE_PCMP_INSTR 0x00010000
54#define PVR2_AREA_OPTIMISED 0x00008000
55#define PVR2_USE_BARREL_MASK 0x00004000
56#define PVR2_USE_DIV_MASK 0x00002000
57#define PVR2_USE_HW_MUL_MASK 0x00001000
58#define PVR2_USE_FPU_MASK 0x00000800
59#define PVR2_USE_MUL64_MASK 0x00000400
60#define PVR2_USE_FPU2_MASK 0x00000200 /* new */
61#define PVR2_USE_IPLBEXC 0x00000100
62#define PVR2_USE_DPLBEXC 0x00000080
63#define PVR2_OPCODE_0x0_ILL_MASK 0x00000040
64#define PVR2_UNALIGNED_EXC_MASK 0x00000020
65#define PVR2_ILL_OPCODE_EXC_MASK 0x00000010
66#define PVR2_IOPB_BUS_EXC_MASK 0x00000008
67#define PVR2_DOPB_BUS_EXC_MASK 0x00000004
68#define PVR2_DIV_ZERO_EXC_MASK 0x00000002
69#define PVR2_FPU_EXC_MASK 0x00000001
70
71/* Debug and exception PVR masks */
72#define PVR3_DEBUG_ENABLED_MASK 0x80000000
73#define PVR3_NUMBER_OF_PC_BRK_MASK 0x1E000000
74#define PVR3_NUMBER_OF_RD_ADDR_BRK_MASK 0x00380000
75#define PVR3_NUMBER_OF_WR_ADDR_BRK_MASK 0x0000E000
76#define PVR3_FSL_LINKS_MASK 0x00000380
77
78/* ICache config PVR masks */
79#define PVR4_USE_ICACHE_MASK 0x80000000
80#define PVR4_ICACHE_ADDR_TAG_BITS_MASK 0x7C000000
81#define PVR4_ICACHE_USE_FSL_MASK 0x02000000
82#define PVR4_ICACHE_ALLOW_WR_MASK 0x01000000
83#define PVR4_ICACHE_LINE_LEN_MASK 0x00E00000
84#define PVR4_ICACHE_BYTE_SIZE_MASK 0x001F0000
85
86/* DCache config PVR masks */
87#define PVR5_USE_DCACHE_MASK 0x80000000
88#define PVR5_DCACHE_ADDR_TAG_BITS_MASK 0x7C000000
89#define PVR5_DCACHE_USE_FSL_MASK 0x02000000
90#define PVR5_DCACHE_ALLOW_WR_MASK 0x01000000
91#define PVR5_DCACHE_LINE_LEN_MASK 0x00E00000
92#define PVR5_DCACHE_BYTE_SIZE_MASK 0x001F0000
93
94/* ICache base address PVR mask */
95#define PVR6_ICACHE_BASEADDR_MASK 0xFFFFFFFF
96
97/* ICache high address PVR mask */
98#define PVR7_ICACHE_HIGHADDR_MASK 0xFFFFFFFF
99
100/* DCache base address PVR mask */
101#define PVR8_DCACHE_BASEADDR_MASK 0xFFFFFFFF
102
103/* DCache high address PVR mask */
104#define PVR9_DCACHE_HIGHADDR_MASK 0xFFFFFFFF
105
106/* Target family PVR mask */
107#define PVR10_TARGET_FAMILY_MASK 0xFF000000
108
109/* MMU descrtiption */
110#define PVR11_USE_MMU 0xC0000000
111#define PVR11_MMU_ITLB_SIZE 0x38000000
112#define PVR11_MMU_DTLB_SIZE 0x07000000
113#define PVR11_MMU_TLB_ACCESS 0x00C00000
114#define PVR11_MMU_ZONES 0x003C0000
115/* MSR Reset value PVR mask */
116#define PVR11_MSR_RESET_VALUE_MASK 0x000007FF
117
118
119/* PVR access macros */
120#define PVR_IS_FULL(pvr) (pvr.pvr[0] & PVR0_PVR_FULL_MASK)
121#define PVR_USE_BARREL(pvr) (pvr.pvr[0] & PVR0_USE_BARREL_MASK)
122#define PVR_USE_DIV(pvr) (pvr.pvr[0] & PVR0_USE_DIV_MASK)
123#define PVR_USE_HW_MUL(pvr) (pvr.pvr[0] & PVR0_USE_HW_MUL_MASK)
124#define PVR_USE_FPU(pvr) (pvr.pvr[0] & PVR0_USE_FPU_MASK)
125#define PVR_USE_FPU2(pvr) (pvr.pvr[2] & PVR2_USE_FPU2_MASK)
126#define PVR_USE_ICACHE(pvr) (pvr.pvr[0] & PVR0_USE_ICACHE_MASK)
127#define PVR_USE_DCACHE(pvr) (pvr.pvr[0] & PVR0_USE_DCACHE_MASK)
128#define PVR_VERSION(pvr) ((pvr.pvr[0] & PVR0_VERSION_MASK) >> 8)
129#define PVR_USER1(pvr) (pvr.pvr[0] & PVR0_USER1_MASK)
130#define PVR_USER2(pvr) (pvr.pvr[1] & PVR1_USER2_MASK)
131
132#define PVR_D_OPB(pvr) (pvr.pvr[2] & PVR2_D_OPB_MASK)
133#define PVR_D_LMB(pvr) (pvr.pvr[2] & PVR2_D_LMB_MASK)
134#define PVR_I_OPB(pvr) (pvr.pvr[2] & PVR2_I_OPB_MASK)
135#define PVR_I_LMB(pvr) (pvr.pvr[2] & PVR2_I_LMB_MASK)
136#define PVR_INTERRUPT_IS_EDGE(pvr) \
137 (pvr.pvr[2] & PVR2_INTERRUPT_IS_EDGE_MASK)
138#define PVR_EDGE_IS_POSITIVE(pvr) \
139 (pvr.pvr[2] & PVR2_EDGE_IS_POSITIVE_MASK)
140#define PVR_USE_MSR_INSTR(pvr) (pvr.pvr[2] & PVR2_USE_MSR_INSTR)
141#define PVR_USE_PCMP_INSTR(pvr) (pvr.pvr[2] & PVR2_USE_PCMP_INSTR)
142#define PVR_AREA_OPTIMISED(pvr) (pvr.pvr[2] & PVR2_AREA_OPTIMISED)
143#define PVR_USE_MUL64(pvr) (pvr.pvr[2] & PVR2_USE_MUL64_MASK)
144#define PVR_OPCODE_0x0_ILLEGAL(pvr) \
145 (pvr.pvr[2] & PVR2_OPCODE_0x0_ILL_MASK)
146#define PVR_UNALIGNED_EXCEPTION(pvr) \
147 (pvr.pvr[2] & PVR2_UNALIGNED_EXC_MASK)
148#define PVR_ILL_OPCODE_EXCEPTION(pvr) \
149 (pvr.pvr[2] & PVR2_ILL_OPCODE_EXC_MASK)
150#define PVR_IOPB_BUS_EXCEPTION(pvr) \
151 (pvr.pvr[2] & PVR2_IOPB_BUS_EXC_MASK)
152#define PVR_DOPB_BUS_EXCEPTION(pvr) \
153 (pvr.pvr[2] & PVR2_DOPB_BUS_EXC_MASK)
154#define PVR_DIV_ZERO_EXCEPTION(pvr) \
155 (pvr.pvr[2] & PVR2_DIV_ZERO_EXC_MASK)
156#define PVR_FPU_EXCEPTION(pvr) (pvr.pvr[2] & PVR2_FPU_EXC_MASK)
157#define PVR_FSL_EXCEPTION(pvr) (pvr.pvr[2] & PVR2_USE_EXTEND_FSL)
158
159#define PVR_DEBUG_ENABLED(pvr) (pvr.pvr[3] & PVR3_DEBUG_ENABLED_MASK)
160#define PVR_NUMBER_OF_PC_BRK(pvr) \
161 ((pvr.pvr[3] & PVR3_NUMBER_OF_PC_BRK_MASK) >> 25)
162#define PVR_NUMBER_OF_RD_ADDR_BRK(pvr) \
163 ((pvr.pvr[3] & PVR3_NUMBER_OF_RD_ADDR_BRK_MASK) >> 19)
164#define PVR_NUMBER_OF_WR_ADDR_BRK(pvr) \
165 ((pvr.pvr[3] & PVR3_NUMBER_OF_WR_ADDR_BRK_MASK) >> 13)
166#define PVR_FSL_LINKS(pvr) ((pvr.pvr[3] & PVR3_FSL_LINKS_MASK) >> 7)
167
168#define PVR_ICACHE_ADDR_TAG_BITS(pvr) \
169 ((pvr.pvr[4] & PVR4_ICACHE_ADDR_TAG_BITS_MASK) >> 26)
170#define PVR_ICACHE_USE_FSL(pvr) (pvr.pvr[4] & PVR4_ICACHE_USE_FSL_MASK)
171#define PVR_ICACHE_ALLOW_WR(pvr) (pvr.pvr[4] & PVR4_ICACHE_ALLOW_WR_MASK)
172#define PVR_ICACHE_LINE_LEN(pvr) \
173 (1 << ((pvr.pvr[4] & PVR4_ICACHE_LINE_LEN_MASK) >> 21))
174#define PVR_ICACHE_BYTE_SIZE(pvr) \
175 (1 << ((pvr.pvr[4] & PVR4_ICACHE_BYTE_SIZE_MASK) >> 16))
176
177#define PVR_DCACHE_ADDR_TAG_BITS(pvr) \
178 ((pvr.pvr[5] & PVR5_DCACHE_ADDR_TAG_BITS_MASK) >> 26)
179#define PVR_DCACHE_USE_FSL(pvr) (pvr.pvr[5] & PVR5_DCACHE_USE_FSL_MASK)
180#define PVR_DCACHE_ALLOW_WR(pvr) (pvr.pvr[5] & PVR5_DCACHE_ALLOW_WR_MASK)
181#define PVR_DCACHE_LINE_LEN(pvr) \
182 (1 << ((pvr.pvr[5] & PVR5_DCACHE_LINE_LEN_MASK) >> 21))
183#define PVR_DCACHE_BYTE_SIZE(pvr) \
184 (1 << ((pvr.pvr[5] & PVR5_DCACHE_BYTE_SIZE_MASK) >> 16))
185
186
187#define PVR_ICACHE_BASEADDR(pvr) (pvr.pvr[6] & PVR6_ICACHE_BASEADDR_MASK)
188#define PVR_ICACHE_HIGHADDR(pvr) (pvr.pvr[7] & PVR7_ICACHE_HIGHADDR_MASK)
189
190#define PVR_DCACHE_BASEADDR(pvr) (pvr.pvr[8] & PVR8_DCACHE_BASEADDR_MASK)
191#define PVR_DCACHE_HIGHADDR(pvr) (pvr.pvr[9] & PVR9_DCACHE_HIGHADDR_MASK)
192
193#define PVR_TARGET_FAMILY(pvr) ((pvr.pvr[10] & PVR10_TARGET_FAMILY_MASK) >> 24)
194
195#define PVR_MSR_RESET_VALUE(pvr) \
196 (pvr.pvr[11] & PVR11_MSR_RESET_VALUE_MASK)
197
198/* mmu */
199#define PVR_USE_MMU(pvr) ((pvr.pvr[11] & PVR11_USE_MMU) >> 30)
200#define PVR_MMU_ITLB_SIZE(pvr) (pvr.pvr[11] & PVR11_MMU_ITLB_SIZE)
201#define PVR_MMU_DTLB_SIZE(pvr) (pvr.pvr[11] & PVR11_MMU_DTLB_SIZE)
202#define PVR_MMU_TLB_ACCESS(pvr) (pvr.pvr[11] & PVR11_MMU_TLB_ACCESS)
203#define PVR_MMU_ZONES(pvr) (pvr.pvr[11] & PVR11_MMU_ZONES)
204
205
206int cpu_has_pvr(void);
207void get_pvr(struct pvr_s *pvr);
208
209#endif /* _ASM_MICROBLAZE_PVR_H */
diff --git a/arch/microblaze/include/asm/registers.h b/arch/microblaze/include/asm/registers.h
new file mode 100644
index 000000000000..834142d9356f
--- /dev/null
+++ b/arch/microblaze/include/asm/registers.h
@@ -0,0 +1,33 @@
1/*
2 * Copyright (C) 2008 Michal Simek
3 * Copyright (C) 2008 PetaLogix
4 * Copyright (C) 2006 Atmark Techno, Inc.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#ifndef _ASM_MICROBLAZE_REGISTERS_H
12#define _ASM_MICROBLAZE_REGISTERS_H
13
14#define MSR_BE (1<<0) /* 0x001 */
15#define MSR_IE (1<<1) /* 0x002 */
16#define MSR_C (1<<2) /* 0x004 */
17#define MSR_BIP (1<<3) /* 0x008 */
18#define MSR_FSL (1<<4) /* 0x010 */
19#define MSR_ICE (1<<5) /* 0x020 */
20#define MSR_DZ (1<<6) /* 0x040 */
21#define MSR_DCE (1<<7) /* 0x080 */
22#define MSR_EE (1<<8) /* 0x100 */
23#define MSR_EIP (1<<9) /* 0x200 */
24#define MSR_CC (1<<31)
25
26/* Floating Point Status Register (FSR) Bits */
27#define FSR_IO (1<<4) /* Invalid operation */
28#define FSR_DZ (1<<3) /* Divide-by-zero */
29#define FSR_OF (1<<2) /* Overflow */
30#define FSR_UF (1<<1) /* Underflow */
31#define FSR_DO (1<<0) /* Denormalized operand error */
32
33#endif /* _ASM_MICROBLAZE_REGISTERS_H */
diff --git a/arch/microblaze/include/asm/resource.h b/arch/microblaze/include/asm/resource.h
new file mode 100644
index 000000000000..04bc4db8921b
--- /dev/null
+++ b/arch/microblaze/include/asm/resource.h
@@ -0,0 +1 @@
#include <asm-generic/resource.h>
diff --git a/arch/microblaze/include/asm/scatterlist.h b/arch/microblaze/include/asm/scatterlist.h
new file mode 100644
index 000000000000..08ff1d049b42
--- /dev/null
+++ b/arch/microblaze/include/asm/scatterlist.h
@@ -0,0 +1,28 @@
1/*
2 * Copyright (C) 2008 Michal Simek <monstr@monstr.eu>
3 * Copyright (C) 2006 Atmark Techno, Inc.
4 *
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 */
9
10#ifndef _ASM_MICROBLAZE_SCATTERLIST_H
11#define _ASM_MICROBLAZE_SCATTERLIST_H
12
13struct scatterlist {
14#ifdef CONFIG_DEBUG_SG
15 unsigned long sg_magic;
16#endif
17 unsigned long page_link;
18 dma_addr_t dma_address;
19 unsigned int offset;
20 unsigned int length;
21};
22
23#define sg_dma_address(sg) ((sg)->dma_address)
24#define sg_dma_len(sg) ((sg)->length)
25
26#define ISA_DMA_THRESHOLD (~0UL)
27
28#endif /* _ASM_MICROBLAZE_SCATTERLIST_H */
diff --git a/arch/microblaze/include/asm/sections.h b/arch/microblaze/include/asm/sections.h
new file mode 100644
index 000000000000..8434a43e5421
--- /dev/null
+++ b/arch/microblaze/include/asm/sections.h
@@ -0,0 +1,25 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_SECTIONS_H
10#define _ASM_MICROBLAZE_SECTIONS_H
11
12#include <asm-generic/sections.h>
13
14# ifndef __ASSEMBLY__
15extern char _ssbss[], _esbss[];
16extern unsigned long __ivt_start[], __ivt_end[];
17
18# ifdef CONFIG_MTD_UCLINUX
19extern char *_ebss;
20# endif
21
22extern u32 _fdt_start[], _fdt_end[];
23
24# endif /* !__ASSEMBLY__ */
25#endif /* _ASM_MICROBLAZE_SECTIONS_H */
diff --git a/arch/microblaze/include/asm/segment.h b/arch/microblaze/include/asm/segment.h
new file mode 100644
index 000000000000..7f5dcc56eea1
--- /dev/null
+++ b/arch/microblaze/include/asm/segment.h
@@ -0,0 +1,43 @@
1/*
2 * Copyright (C) 2008 Michal Simek
3 * Copyright (C) 2008 PetaLogix
4 * Copyright (C) 2006 Atmark Techno, Inc.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#ifndef _ASM_MICROBLAZE_SEGMENT_H
12#define _ASM_MICROBLAZE_SEGMENT_H
13
14#ifndef __ASSEMBLY__
15
16typedef struct {
17 unsigned long seg;
18} mm_segment_t;
19
20/*
21 * On Microblaze the fs value is actually the top of the corresponding
22 * address space.
23 *
24 * The fs value determines whether argument validity checking should be
25 * performed or not. If get_fs() == USER_DS, checking is performed, with
26 * get_fs() == KERNEL_DS, checking is bypassed.
27 *
28 * For historical reasons, these macros are grossly misnamed.
29 *
30 * For non-MMU arch like Microblaze, KERNEL_DS and USER_DS is equal.
31 */
32# define KERNEL_DS ((mm_segment_t){0})
33# define USER_DS KERNEL_DS
34
35# define get_ds() (KERNEL_DS)
36# define get_fs() (current_thread_info()->addr_limit)
37# define set_fs(x) \
38 do { current_thread_info()->addr_limit = (x); } while (0)
39
40# define segment_eq(a, b) ((a).seg == (b).seg)
41
42# endif /* __ASSEMBLY__ */
43#endif /* _ASM_MICROBLAZE_SEGMENT_H */
diff --git a/arch/microblaze/include/asm/selfmod.h b/arch/microblaze/include/asm/selfmod.h
new file mode 100644
index 000000000000..c42aff2e6cd0
--- /dev/null
+++ b/arch/microblaze/include/asm/selfmod.h
@@ -0,0 +1,24 @@
1/*
2 * Copyright (C) 2007-2008 Michal Simek <monstr@monstr.eu>
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_SELFMOD_H
10#define _ASM_MICROBLAZE_SELFMOD_H
11
12/*
13 * BARRIER_BASE_ADDR is constant address for selfmod function.
14 * do not change this value - selfmod function is in
15 * arch/microblaze/kernel/selfmod.c: selfmod_function()
16 *
17 * last 16 bits is used for storing register offset
18 */
19
20#define BARRIER_BASE_ADDR 0x1234ff00
21
22void selfmod_function(const int *arr_fce, const unsigned int base);
23
24#endif /* _ASM_MICROBLAZE_SELFMOD_H */
diff --git a/arch/microblaze/include/asm/sembuf.h b/arch/microblaze/include/asm/sembuf.h
new file mode 100644
index 000000000000..b804ed71a57e
--- /dev/null
+++ b/arch/microblaze/include/asm/sembuf.h
@@ -0,0 +1,34 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_SEMBUF_H
10#define _ASM_MICROBLAZE_SEMBUF_H
11
12/*
13 * The semid64_ds structure for microblaze architecture.
14 * Note extra padding because this structure is passed back and forth
15 * between kernel and user space.
16 *
17 * Pad space is left for:
18 * - 64-bit time_t to solve y2038 problem
19 * - 2 miscellaneous 32-bit values
20 */
21
22struct semid64_ds {
23 struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
24 __kernel_time_t sem_otime; /* last semop time */
25 unsigned long __unused1;
26 __kernel_time_t sem_ctime; /* last change time */
27 unsigned long __unused2;
28 unsigned long sem_nsems; /* no. of semaphores in array */
29 unsigned long __unused3;
30 unsigned long __unused4;
31};
32
33
34#endif /* _ASM_MICROBLAZE_SEMBUF_H */
diff --git a/arch/microblaze/include/asm/serial.h b/arch/microblaze/include/asm/serial.h
new file mode 100644
index 000000000000..39bfc8ce6af5
--- /dev/null
+++ b/arch/microblaze/include/asm/serial.h
@@ -0,0 +1,14 @@
1/*
2 * Copyright (C) 2009 Michal Simek <monstr@monstr.eu>
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_SERIAL_H
10#define _ASM_MICROBLAZE_SERIAL_H
11
12# define BASE_BAUD (1843200 / 16)
13
14#endif /* _ASM_MICROBLAZE_SERIAL_H */
diff --git a/arch/microblaze/include/asm/setup.h b/arch/microblaze/include/asm/setup.h
new file mode 100644
index 000000000000..9b98e8e6abae
--- /dev/null
+++ b/arch/microblaze/include/asm/setup.h
@@ -0,0 +1,44 @@
1/*
2 * Copyright (C) 2007-2008 Michal Simek <monstr@monstr.eu>
3 * Copyright (C) 2006 Atmark Techno, Inc.
4 *
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 */
9
10#ifndef _ASM_MICROBLAZE_SETUP_H
11#define _ASM_MICROBLAZE_SETUP_H
12
13#define COMMAND_LINE_SIZE 256
14
15# ifndef __ASSEMBLY__
16
17# ifdef __KERNEL__
18extern unsigned int boot_cpuid; /* move to smp.h */
19
20extern char cmd_line[COMMAND_LINE_SIZE];
21# endif/* __KERNEL__ */
22
23void early_printk(const char *fmt, ...);
24
25int setup_early_printk(char *opt);
26void disable_early_printk(void);
27
28void heartbeat(void);
29void setup_heartbeat(void);
30
31unsigned long long sched_clock(void);
32
33void time_init(void);
34void init_IRQ(void);
35void machine_early_init(const char *cmdline, unsigned int ram,
36 unsigned int fdt);
37
38void machine_restart(char *cmd);
39void machine_shutdown(void);
40void machine_halt(void);
41void machine_power_off(void);
42
43# endif /* __ASSEMBLY__ */
44#endif /* _ASM_MICROBLAZE_SETUP_H */
diff --git a/arch/microblaze/include/asm/shmbuf.h b/arch/microblaze/include/asm/shmbuf.h
new file mode 100644
index 000000000000..f829c5843618
--- /dev/null
+++ b/arch/microblaze/include/asm/shmbuf.h
@@ -0,0 +1,42 @@
1#ifndef _ASM_MICROBLAZE_SHMBUF_H
2#define _ASM_MICROBLAZE_SHMBUF_H
3
4/*
5 * The shmid64_ds structure for microblaze architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct shmid64_ds {
15 struct ipc64_perm shm_perm; /* operation perms */
16 size_t shm_segsz; /* size of segment (bytes) */
17 __kernel_time_t shm_atime; /* last attach time */
18 unsigned long __unused1;
19 __kernel_time_t shm_dtime; /* last detach time */
20 unsigned long __unused2;
21 __kernel_time_t shm_ctime; /* last change time */
22 unsigned long __unused3;
23 __kernel_pid_t shm_cpid; /* pid of creator */
24 __kernel_pid_t shm_lpid; /* pid of last operator */
25 unsigned long shm_nattch; /* no. of current attaches */
26 unsigned long __unused4;
27 unsigned long __unused5;
28};
29
30struct shminfo64 {
31 unsigned long shmmax;
32 unsigned long shmmin;
33 unsigned long shmmni;
34 unsigned long shmseg;
35 unsigned long shmall;
36 unsigned long __unused1;
37 unsigned long __unused2;
38 unsigned long __unused3;
39 unsigned long __unused4;
40};
41
42#endif /* _ASM_MICROBLAZE_SHMBUF_H */
diff --git a/arch/microblaze/include/asm/shmparam.h b/arch/microblaze/include/asm/shmparam.h
new file mode 100644
index 000000000000..9f5fc2b3b6a3
--- /dev/null
+++ b/arch/microblaze/include/asm/shmparam.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_MICROBLAZE_SHMPARAM_H
2#define _ASM_MICROBLAZE_SHMPARAM_H
3
4#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
5
6#endif /* _ASM_MICROBLAZE_SHMPARAM_H */
diff --git a/arch/microblaze/include/asm/sigcontext.h b/arch/microblaze/include/asm/sigcontext.h
new file mode 100644
index 000000000000..55873c80c917
--- /dev/null
+++ b/arch/microblaze/include/asm/sigcontext.h
@@ -0,0 +1,20 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_SIGCONTEXT_H
10#define _ASM_MICROBLAZE_SIGCONTEXT_H
11
12/* FIXME should be linux/ptrace.h */
13#include <asm/ptrace.h>
14
15struct sigcontext {
16 struct pt_regs regs;
17 unsigned long oldmask;
18};
19
20#endif /* _ASM_MICROBLAZE_SIGCONTEXT_H */
diff --git a/arch/microblaze/include/asm/siginfo.h b/arch/microblaze/include/asm/siginfo.h
new file mode 100644
index 000000000000..f162911a8f50
--- /dev/null
+++ b/arch/microblaze/include/asm/siginfo.h
@@ -0,0 +1,15 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_SIGINFO_H
10#define _ASM_MICROBLAZE_SIGINFO_H
11
12#include <linux/types.h>
13#include <asm-generic/siginfo.h>
14
15#endif /* _ASM_MICROBLAZE_SIGINFO_H */
diff --git a/arch/microblaze/include/asm/signal.h b/arch/microblaze/include/asm/signal.h
new file mode 100644
index 000000000000..9676fad3486c
--- /dev/null
+++ b/arch/microblaze/include/asm/signal.h
@@ -0,0 +1,165 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 * Yasushi SHOJI <yashi@atmark-techno.com>
4 * Tetsuya OHKAWA <tetsuya@atmark-techno.com>
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#ifndef _ASM_MICROBLAZE_SIGNAL_H
12#define _ASM_MICROBLAZE_SIGNAL_H
13
14#define SIGHUP 1
15#define SIGINT 2
16#define SIGQUIT 3
17#define SIGILL 4
18#define SIGTRAP 5
19#define SIGABRT 6
20#define SIGIOT 6
21#define SIGBUS 7
22#define SIGFPE 8
23#define SIGKILL 9
24#define SIGUSR1 10
25#define SIGSEGV 11
26#define SIGUSR2 12
27#define SIGPIPE 13
28#define SIGALRM 14
29#define SIGTERM 15
30#define SIGSTKFLT 16
31#define SIGCHLD 17
32#define SIGCONT 18
33#define SIGSTOP 19
34#define SIGTSTP 20
35#define SIGTTIN 21
36#define SIGTTOU 22
37#define SIGURG 23
38#define SIGXCPU 24
39#define SIGXFSZ 25
40#define SIGVTALRM 26
41#define SIGPROF 27
42#define SIGWINCH 28
43#define SIGIO 29
44#define SIGPOLL SIGIO
45/*
46#define SIGLOST 29
47*/
48#define SIGPWR 30
49#define SIGSYS 31
50#define SIGUNUSED 31
51
52/* These should not be considered constants from userland. */
53#define SIGRTMIN 32
54#define SIGRTMAX _NSIG
55
56/*
57 * SA_FLAGS values:
58 *
59 * SA_ONSTACK indicates that a registered stack_t will be used.
60 * SA_RESTART flag to get restarting signals (which were the default long ago)
61 * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
62 * SA_RESETHAND clears the handler when the signal is delivered.
63 * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
64 * SA_NODEFER prevents the current signal from being masked in the handler.
65 *
66 * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
67 * Unix names RESETHAND and NODEFER respectively.
68 */
69#define SA_NOCLDSTOP 0x00000001
70#define SA_NOCLDWAIT 0x00000002
71#define SA_SIGINFO 0x00000004
72#define SA_ONSTACK 0x08000000
73#define SA_RESTART 0x10000000
74#define SA_NODEFER 0x40000000
75#define SA_RESETHAND 0x80000000
76
77#define SA_NOMASK SA_NODEFER
78#define SA_ONESHOT SA_RESETHAND
79
80#define SA_RESTORER 0x04000000
81
82/*
83 * sigaltstack controls
84 */
85#define SS_ONSTACK 1
86#define SS_DISABLE 2
87
88#define MINSIGSTKSZ 2048
89#define SIGSTKSZ 8192
90
91# ifndef __ASSEMBLY__
92# include <linux/types.h>
93# include <asm-generic/signal.h>
94
95/* Avoid too many header ordering problems. */
96struct siginfo;
97
98# ifdef __KERNEL__
99/*
100 * Most things should be clean enough to redefine this at will, if care
101 * is taken to make libc match.
102 */
103# define _NSIG 64
104# define _NSIG_BPW 32
105# define _NSIG_WORDS (_NSIG / _NSIG_BPW)
106
107typedef unsigned long old_sigset_t; /* at least 32 bits */
108
109typedef struct {
110 unsigned long sig[_NSIG_WORDS];
111} sigset_t;
112
113struct old_sigaction {
114 __sighandler_t sa_handler;
115 old_sigset_t sa_mask;
116 unsigned long sa_flags;
117 void (*sa_restorer)(void);
118};
119
120struct sigaction {
121 __sighandler_t sa_handler;
122 unsigned long sa_flags;
123 void (*sa_restorer)(void);
124 sigset_t sa_mask; /* mask last for extensibility */
125};
126
127struct k_sigaction {
128 struct sigaction sa;
129};
130
131# include <asm/sigcontext.h>
132# undef __HAVE_ARCH_SIG_BITOPS
133
134# define ptrace_signal_deliver(regs, cookie) do { } while (0)
135
136# else /* !__KERNEL__ */
137
138/* Here we must cater to libcs that poke about in kernel headers. */
139
140# define NSIG 32
141typedef unsigned long sigset_t;
142
143struct sigaction {
144 union {
145 __sighandler_t _sa_handler;
146 void (*_sa_sigaction)(int, struct siginfo *, void *);
147 } _u;
148 sigset_t sa_mask;
149 unsigned long sa_flags;
150 void (*sa_restorer)(void);
151};
152
153# define sa_handler _u._sa_handler
154# define sa_sigaction _u._sa_sigaction
155
156# endif /* __KERNEL__ */
157
158typedef struct sigaltstack {
159 void *ss_sp;
160 int ss_flags;
161 size_t ss_size;
162} stack_t;
163
164# endif /* __ASSEMBLY__ */
165#endif /* _ASM_MICROBLAZE_SIGNAL_H */
diff --git a/arch/microblaze/include/asm/socket.h b/arch/microblaze/include/asm/socket.h
new file mode 100644
index 000000000000..825936860314
--- /dev/null
+++ b/arch/microblaze/include/asm/socket.h
@@ -0,0 +1,69 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_SOCKET_H
10#define _ASM_MICROBLAZE_SOCKET_H
11
12#include <asm/sockios.h>
13
14/* For setsockoptions(2) */
15#define SOL_SOCKET 1
16
17#define SO_DEBUG 1
18#define SO_REUSEADDR 2
19#define SO_TYPE 3
20#define SO_ERROR 4
21#define SO_DONTROUTE 5
22#define SO_BROADCAST 6
23#define SO_SNDBUF 7
24#define SO_RCVBUF 8
25#define SO_SNDBUFFORCE 32
26#define SO_RCVBUFFORCE 33
27#define SO_KEEPALIVE 9
28#define SO_OOBINLINE 10
29#define SO_NO_CHECK 11
30#define SO_PRIORITY 12
31#define SO_LINGER 13
32#define SO_BSDCOMPAT 14
33/* To add :#define SO_REUSEPORT 15 */
34#define SO_PASSCRED 16
35#define SO_PEERCRED 17
36#define SO_RCVLOWAT 18
37#define SO_SNDLOWAT 19
38#define SO_RCVTIMEO 20
39#define SO_SNDTIMEO 21
40
41/* Security levels - as per NRL IPv6 - don't actually do anything */
42#define SO_SECURITY_AUTHENTICATION 22
43#define SO_SECURITY_ENCRYPTION_TRANSPORT 23
44#define SO_SECURITY_ENCRYPTION_NETWORK 24
45
46#define SO_BINDTODEVICE 25
47
48/* Socket filtering */
49#define SO_ATTACH_FILTER 26
50#define SO_DETACH_FILTER 27
51
52#define SO_PEERNAME 28
53#define SO_TIMESTAMP 29
54#define SCM_TIMESTAMP SO_TIMESTAMP
55
56#define SO_ACCEPTCONN 30
57
58#define SO_PEERSEC 31
59#define SO_PASSSEC 34
60
61#define SO_TIMESTAMPNS 35
62#define SCM_TIMESTAMPNS SO_TIMESTAMPNS
63
64#define SO_MARK 36
65
66#define SO_TIMESTAMPING 37
67#define SCM_TIMESTAMPING SO_TIMESTAMPING
68
69#endif /* _ASM_MICROBLAZE_SOCKET_H */
diff --git a/arch/microblaze/include/asm/sockios.h b/arch/microblaze/include/asm/sockios.h
new file mode 100644
index 000000000000..9fff57a701e1
--- /dev/null
+++ b/arch/microblaze/include/asm/sockios.h
@@ -0,0 +1,23 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_SOCKIOS_H
10#define _ASM_MICROBLAZE_SOCKIOS_H
11
12#include <linux/ioctl.h>
13
14/* Socket-level I/O control calls. */
15#define FIOSETOWN 0x8901
16#define SIOCSPGRP 0x8902
17#define FIOGETOWN 0x8903
18#define SIOCGPGRP 0x8904
19#define SIOCATMARK 0x8905
20#define SIOCGSTAMP 0x8906 /* Get stamp (timeval) */
21#define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */
22
23#endif /* _ASM_MICROBLAZE_SOCKIOS_H */
diff --git a/arch/microblaze/include/asm/stat.h b/arch/microblaze/include/asm/stat.h
new file mode 100644
index 000000000000..5f18b8aed220
--- /dev/null
+++ b/arch/microblaze/include/asm/stat.h
@@ -0,0 +1,73 @@
1/*
2 * Microblaze stat structure
3 *
4 * Copyright (C) 2001,02,03 NEC Electronics Corporation
5 * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef _ASM_MICROBLAZE_STAT_H
15#define _ASM_MICROBLAZE_STAT_H
16
17#include <linux/posix_types.h>
18
19struct stat {
20 unsigned int st_dev;
21 unsigned long st_ino;
22 unsigned int st_mode;
23 unsigned int st_nlink;
24 unsigned int st_uid;
25 unsigned int st_gid;
26 unsigned int st_rdev;
27 unsigned long st_size;
28 unsigned long st_blksize;
29 unsigned long st_blocks;
30 unsigned long st_atime;
31 unsigned long __unused1; /* unsigned long st_atime_nsec */
32 unsigned long st_mtime;
33 unsigned long __unused2; /* unsigned long st_mtime_nsec */
34 unsigned long st_ctime;
35 unsigned long __unused3; /* unsigned long st_ctime_nsec */
36 unsigned long __unused4;
37 unsigned long __unused5;
38};
39
40struct stat64 {
41 unsigned long long st_dev;
42 unsigned long __unused1;
43
44 unsigned long long st_ino;
45
46 unsigned int st_mode;
47 unsigned int st_nlink;
48
49 unsigned int st_uid;
50 unsigned int st_gid;
51
52 unsigned long long st_rdev;
53 unsigned long __unused3;
54
55 long long st_size;
56 unsigned long st_blksize;
57
58 unsigned long st_blocks; /* No. of 512-byte blocks allocated */
59 unsigned long __unused4; /* future possible st_blocks high bits */
60
61 unsigned long st_atime;
62 unsigned long st_atime_nsec;
63
64 unsigned long st_mtime;
65 unsigned long st_mtime_nsec;
66
67 unsigned long st_ctime;
68 unsigned long st_ctime_nsec;
69
70 unsigned long __unused8;
71};
72
73#endif /* _ASM_MICROBLAZE_STAT_H */
diff --git a/arch/microblaze/include/asm/statfs.h b/arch/microblaze/include/asm/statfs.h
new file mode 100644
index 000000000000..0b91fe198c20
--- /dev/null
+++ b/arch/microblaze/include/asm/statfs.h
@@ -0,0 +1 @@
#include <asm-generic/statfs.h>
diff --git a/arch/microblaze/include/asm/string.h b/arch/microblaze/include/asm/string.h
new file mode 100644
index 000000000000..f7728c90fc18
--- /dev/null
+++ b/arch/microblaze/include/asm/string.h
@@ -0,0 +1,24 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_STRING_H
10#define _ASM_MICROBLAZE_STRING_H
11
12#ifndef __KERNEL__
13
14#define __HAVE_ARCH_MEMSET
15#define __HAVE_ARCH_MEMCPY
16#define __HAVE_ARCH_MEMMOVE
17
18extern void *memset(void *, int, __kernel_size_t);
19extern void *memcpy(void *, const void *, __kernel_size_t);
20extern void *memmove(void *, const void *, __kernel_size_t);
21
22#endif /* __KERNEL__ */
23
24#endif /* _ASM_MICROBLAZE_STRING_H */
diff --git a/arch/microblaze/include/asm/swab.h b/arch/microblaze/include/asm/swab.h
new file mode 100644
index 000000000000..b375d7b65ad7
--- /dev/null
+++ b/arch/microblaze/include/asm/swab.h
@@ -0,0 +1,8 @@
1#ifndef _ASM_MICROBLAZE_SWAB_H
2#define _ASM_MICROBLAZE_SWAB_H
3
4#if defined(__GNUC__) && !defined(__STRICT_ANSI__) || defined(__KERNEL__)
5#define __SWAB_64_THRU_32__
6#endif
7
8#endif /* _ASM_MICROBLAZE_SWAB_H */
diff --git a/arch/microblaze/include/asm/syscalls.h b/arch/microblaze/include/asm/syscalls.h
new file mode 100644
index 000000000000..9cb4ff0edeb2
--- /dev/null
+++ b/arch/microblaze/include/asm/syscalls.h
@@ -0,0 +1,45 @@
1#ifndef __ASM_MICROBLAZE_SYSCALLS_H
2#define __ASM_MICROBLAZE_SYSCALLS_H
3#ifdef __KERNEL__
4
5#include <linux/compiler.h>
6#include <linux/linkage.h>
7#include <linux/types.h>
8#include <linux/signal.h>
9
10/* FIXME will be removed */
11asmlinkage int sys_ipc(uint call, int first, int second,
12 int third, void *ptr, long fifth);
13
14struct pt_regs;
15asmlinkage int sys_vfork(struct pt_regs *regs);
16asmlinkage int sys_clone(int flags, unsigned long stack, struct pt_regs *regs);
17asmlinkage int sys_execve(char __user *filenamei, char __user *__user *argv,
18 char __user *__user *envp, struct pt_regs *regs);
19
20asmlinkage unsigned long sys_mmap2(unsigned long addr, size_t len,
21 unsigned long prot, unsigned long flags,
22 unsigned long fd, unsigned long pgoff);
23
24asmlinkage unsigned long sys_mmap(unsigned long addr, size_t len,
25 unsigned long prot, unsigned long flags,
26 unsigned long fd, off_t offset);
27
28/* from signal.c */
29asmlinkage int sys_sigsuspend(old_sigset_t mask, struct pt_regs *regs);
30
31asmlinkage int sys_rt_sigsuspend(sigset_t __user *unewset, size_t sigsetsize,
32 struct pt_regs *regs);
33
34asmlinkage int sys_sigaction(int sig, const struct old_sigaction *act,
35 struct old_sigaction *oact);
36
37asmlinkage int sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss,
38 struct pt_regs *regs);
39
40asmlinkage int sys_sigreturn(struct pt_regs *regs);
41
42asmlinkage int sys_rt_sigreturn(struct pt_regs *regs);
43
44#endif /* __KERNEL__ */
45#endif /* __ASM_MICROBLAZE_SYSCALLS_H */
diff --git a/arch/microblaze/include/asm/system.h b/arch/microblaze/include/asm/system.h
new file mode 100644
index 000000000000..c4e308850b5d
--- /dev/null
+++ b/arch/microblaze/include/asm/system.h
@@ -0,0 +1,91 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_SYSTEM_H
10#define _ASM_MICROBLAZE_SYSTEM_H
11
12#include <asm/registers.h>
13#include <asm/setup.h>
14#include <asm/irqflags.h>
15
16struct task_struct;
17struct thread_info;
18
19extern struct task_struct *_switch_to(struct thread_info *prev,
20 struct thread_info *next);
21
22#define switch_to(prev, next, last) \
23 do { \
24 (last) = _switch_to(task_thread_info(prev), \
25 task_thread_info(next)); \
26 } while (0)
27
28#define smp_read_barrier_depends() do {} while (0)
29#define read_barrier_depends() do {} while (0)
30
31#define nop() asm volatile ("nop")
32#define mb() barrier()
33#define rmb() mb()
34#define wmb() mb()
35#define set_mb(var, value) do { var = value; mb(); } while (0)
36#define set_wmb(var, value) do { var = value; wmb(); } while (0)
37
38#define smp_mb() mb()
39#define smp_rmb() rmb()
40#define smp_wmb() wmb()
41
42void show_trace(struct task_struct *task, unsigned long *stack);
43void __bad_xchg(volatile void *ptr, int size);
44
45static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
46 int size)
47{
48 unsigned long ret;
49 unsigned long flags;
50
51 switch (size) {
52 case 1:
53 local_irq_save(flags);
54 ret = *(volatile unsigned char *)ptr;
55 *(volatile unsigned char *)ptr = x;
56 local_irq_restore(flags);
57 break;
58
59 case 4:
60 local_irq_save(flags);
61 ret = *(volatile unsigned long *)ptr;
62 *(volatile unsigned long *)ptr = x;
63 local_irq_restore(flags);
64 break;
65 default:
66 __bad_xchg(ptr, size), ret = 0;
67 break;
68 }
69
70 return ret;
71}
72
73void disable_hlt(void);
74void enable_hlt(void);
75void default_idle(void);
76
77#define xchg(ptr, x) \
78 ((__typeof__(*(ptr))) __xchg((unsigned long)(x), (ptr), sizeof(*(ptr))))
79
80void free_init_pages(char *what, unsigned long begin, unsigned long end);
81void free_initmem(void);
82extern char *klimit;
83extern void ret_from_fork(void);
84
85#ifdef CONFIG_DEBUG_FS
86extern struct dentry *of_debugfs_root;
87#endif
88
89#define arch_align_stack(x) (x)
90
91#endif /* _ASM_MICROBLAZE_SYSTEM_H */
diff --git a/arch/microblaze/include/asm/termbits.h b/arch/microblaze/include/asm/termbits.h
new file mode 100644
index 000000000000..a1b64bc4724a
--- /dev/null
+++ b/arch/microblaze/include/asm/termbits.h
@@ -0,0 +1,203 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_TERMBITS_H
10#define _ASM_MICROBLAZE_TERMBITS_H
11
12#include <linux/posix_types.h>
13
14typedef unsigned char cc_t;
15typedef unsigned int speed_t;
16typedef unsigned int tcflag_t;
17
18#define NCCS 19
19struct termios {
20 tcflag_t c_iflag; /* input mode flags */
21 tcflag_t c_oflag; /* output mode flags */
22 tcflag_t c_cflag; /* control mode flags */
23 tcflag_t c_lflag; /* local mode flags */
24 cc_t c_line; /* line discipline */
25 cc_t c_cc[NCCS]; /* control characters */
26};
27
28struct ktermios {
29 tcflag_t c_iflag; /* input mode flags */
30 tcflag_t c_oflag; /* output mode flags */
31 tcflag_t c_cflag; /* control mode flags */
32 tcflag_t c_lflag; /* local mode flags */
33 cc_t c_line; /* line discipline */
34 cc_t c_cc[NCCS]; /* control characters */
35 speed_t c_ispeed; /* input speed */
36 speed_t c_ospeed; /* output speed */
37};
38
39/* c_cc characters */
40
41#define VINTR 0
42#define VQUIT 1
43#define VERASE 2
44#define VKILL 3
45#define VEOF 4
46#define VTIME 5
47#define VMIN 6
48#define VSWTC 7
49#define VSTART 8
50#define VSTOP 9
51#define VSUSP 10
52#define VEOL 11
53#define VREPRINT 12
54#define VDISCARD 13
55#define VWERASE 14
56#define VLNEXT 15
57#define VEOL2 16
58
59/* c_iflag bits */
60
61#define IGNBRK 0000001
62#define BRKINT 0000002
63#define IGNPAR 0000004
64#define PARMRK 0000010
65#define INPCK 0000020
66#define ISTRIP 0000040
67#define INLCR 0000100
68#define IGNCR 0000200
69#define ICRNL 0000400
70#define IUCLC 0001000
71#define IXON 0002000
72#define IXANY 0004000
73#define IXOFF 0010000
74#define IMAXBEL 0020000
75#define IUTF8 0040000
76
77/* c_oflag bits */
78
79#define OPOST 0000001
80#define OLCUC 0000002
81#define ONLCR 0000004
82#define OCRNL 0000010
83#define ONOCR 0000020
84#define ONLRET 0000040
85#define OFILL 0000100
86#define OFDEL 0000200
87#define NLDLY 0000400
88#define NL0 0000000
89#define NL1 0000400
90#define CRDLY 0003000
91#define CR0 0000000
92#define CR1 0001000
93#define CR2 0002000
94#define CR3 0003000
95#define TABDLY 0014000
96#define TAB0 0000000
97#define TAB1 0004000
98#define TAB2 0010000
99#define TAB3 0014000
100#define XTABS 0014000
101#define BSDLY 0020000
102#define BS0 0000000
103#define BS1 0020000
104#define VTDLY 0040000
105#define VT0 0000000
106#define VT1 0040000
107#define FFDLY 0100000
108#define FF0 0000000
109#define FF1 0100000
110
111/* c_cflag bit meaning */
112
113#define CBAUD 0010017
114#define B0 0000000 /* hang up */
115#define B50 0000001
116#define B75 0000002
117#define B110 0000003
118#define B134 0000004
119#define B150 0000005
120#define B200 0000006
121#define B300 0000007
122#define B600 0000010
123#define B1200 0000011
124#define B1800 0000012
125#define B2400 0000013
126#define B4800 0000014
127#define B9600 0000015
128#define B19200 0000016
129#define B38400 0000017
130#define EXTA B19200
131#define EXTB B38400
132#define CSIZE 0000060
133#define CS5 0000000
134#define CS6 0000020
135#define CS7 0000040
136#define CS8 0000060
137#define CSTOPB 0000100
138#define CREAD 0000200
139#define PARENB 0000400
140#define PARODD 0001000
141#define HUPCL 0002000
142#define CLOCAL 0004000
143#define CBAUDEX 0010000
144#define B57600 0010001
145#define B115200 0010002
146#define B230400 0010003
147#define B460800 0010004
148#define B500000 0010005
149#define B576000 0010006
150#define B921600 0010007
151#define BOTHER 0010000
152#define B1000000 0010010
153#define B1152000 0010011
154#define B1500000 0010012
155#define B2000000 0010013
156#define B2500000 0010014
157#define B3000000 0010015
158#define B3500000 0010016
159#define B4000000 0010017
160#define CIBAUD 002003600000 /* input baud rate (not used) */
161#define CMSPAR 010000000000 /* mark or space (stick) parity */
162#define CRTSCTS 020000000000 /* flow control */
163
164#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */
165
166/* c_lflag bits */
167
168#define ISIG 0000001
169#define ICANON 0000002
170#define XCASE 0000004
171#define ECHO 0000010
172#define ECHOE 0000020
173#define ECHOK 0000040
174#define ECHONL 0000100
175#define NOFLSH 0000200
176#define TOSTOP 0000400
177#define ECHOCTL 0001000
178#define ECHOPRT 0002000
179#define ECHOKE 0004000
180#define FLUSHO 0010000
181#define PENDIN 0040000
182#define IEXTEN 0100000
183
184/* tcflow() and TCXONC use these */
185
186#define TCOOFF 0
187#define TCOON 1
188#define TCIOFF 2
189#define TCION 3
190
191/* tcflush() and TCFLSH use these */
192
193#define TCIFLUSH 0
194#define TCOFLUSH 1
195#define TCIOFLUSH 2
196
197/* tcsetattr uses these */
198
199#define TCSANOW 0
200#define TCSADRAIN 1
201#define TCSAFLUSH 2
202
203#endif /* _ASM_MICROBLAZE_TERMBITS_H */
diff --git a/arch/microblaze/include/asm/termios.h b/arch/microblaze/include/asm/termios.h
new file mode 100644
index 000000000000..102d77258668
--- /dev/null
+++ b/arch/microblaze/include/asm/termios.h
@@ -0,0 +1,88 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_TERMIOS_H
10#define _ASM_MICROBLAZE_TERMIOS_H
11
12#include <linux/string.h>
13#include <asm/termbits.h>
14#include <asm/ioctls.h>
15
16struct winsize {
17 unsigned short ws_row;
18 unsigned short ws_col;
19 unsigned short ws_xpixel;
20 unsigned short ws_ypixel;
21};
22
23#define NCC 8
24struct termio {
25 unsigned short c_iflag; /* input mode flags */
26 unsigned short c_oflag; /* output mode flags */
27 unsigned short c_cflag; /* control mode flags */
28 unsigned short c_lflag; /* local mode flags */
29 unsigned char c_line; /* line discipline */
30 unsigned char c_cc[NCC]; /* control characters */
31};
32
33#ifdef __KERNEL__
34/* intr=^C quit=^| erase=del kill=^U
35 eof=^D vtime=\0 vmin=\1 sxtc=\0
36 start=^Q stop=^S susp=^Z eol=\0
37 reprint=^R discard=^U werase=^W lnext=^V
38 eol2=\0
39*/
40#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
41#endif
42
43/* Modem lines */
44
45#define TIOCM_LE 0x001
46#define TIOCM_DTR 0x002
47#define TIOCM_RTS 0x004
48#define TIOCM_ST 0x008
49#define TIOCM_SR 0x010
50#define TIOCM_CTS 0x020
51#define TIOCM_CAR 0x040
52#define TIOCM_RNG 0x080
53#define TIOCM_DSR 0x100
54#define TIOCM_CD TIOCM_CAR
55#define TIOCM_RI TIOCM_RNG
56#define TIOCM_OUT1 0x2000
57#define TIOCM_OUT2 0x4000
58#define TIOCM_LOOP 0x8000
59
60/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
61
62/* Line disciplines */
63
64#define N_TTY 0
65#define N_SLIP 1
66#define N_MOUSE 2
67#define N_PPP 3
68#define N_STRIP 4
69#define N_AX25 5
70#define N_X25 6 /* X.25 async */
71#define N_6PACK 7
72#define N_MASC 8 /* Reserved for Mobitex module <kaz@cafe.net> */
73#define N_R3964 9 /* Reserved for Simatic R3964 module */
74#define N_PROFIBUS_FDL 10 /* Reserved for Profibus <Dave@mvhi.com> */
75#define N_IRDA 11 /* Linux IR - http://irda.sourceforge.net/ */
76#define N_SMSBLOCK 12 /* SMS block mode - for talking to GSM data cards
77 about SMS messages */
78#define N_HDLC 13 /* synchronous HDLC */
79#define N_SYNC_PPP 14
80#define N_HCI 15 /* Bluetooth HCI UART */
81
82#ifdef __KERNEL__
83
84#include <asm-generic/termios.h>
85
86#endif /* __KERNEL__ */
87
88#endif /* _ASM_MICROBLAZE_TERMIOS_H */
diff --git a/arch/microblaze/include/asm/thread_info.h b/arch/microblaze/include/asm/thread_info.h
new file mode 100644
index 000000000000..4c3943e3f403
--- /dev/null
+++ b/arch/microblaze/include/asm/thread_info.h
@@ -0,0 +1,159 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_THREAD_INFO_H
10#define _ASM_MICROBLAZE_THREAD_INFO_H
11
12#ifdef __KERNEL__
13
14/* we have 8k stack */
15#define THREAD_SHIFT 13
16#define THREAD_SIZE (1 << THREAD_SHIFT)
17#define THREAD_SIZE_ORDER 1
18
19#ifndef __ASSEMBLY__
20# include <linux/types.h>
21# include <asm/processor.h>
22# include <asm/segment.h>
23
24/*
25 * low level task data that entry.S needs immediate access to
26 * - this struct should fit entirely inside of one cache line
27 * - this struct shares the supervisor stack pages
28 * - if the contents of this structure are changed, the assembly constants
29 * must also be changed
30 */
31
32struct cpu_context {
33 __u32 r1; /* stack pointer */
34 __u32 r2;
35 /* dedicated registers */
36 __u32 r13;
37 __u32 r14;
38 __u32 r15;
39 __u32 r16;
40 __u32 r17;
41 __u32 r18;
42 /* non-volatile registers */
43 __u32 r19;
44 __u32 r20;
45 __u32 r21;
46 __u32 r22;
47 __u32 r23;
48 __u32 r24;
49 __u32 r25;
50 __u32 r26;
51 __u32 r27;
52 __u32 r28;
53 __u32 r29;
54 __u32 r30;
55 /* r31 is used as current task pointer */
56 /* special purpose registers */
57 __u32 msr;
58 __u32 ear;
59 __u32 esr;
60 __u32 fsr;
61};
62
63struct thread_info {
64 struct task_struct *task; /* main task structure */
65 struct exec_domain *exec_domain; /* execution domain */
66 unsigned long flags; /* low level flags */
67 unsigned long status; /* thread-synchronous flags */
68 __u32 cpu; /* current CPU */
69 __s32 preempt_count; /* 0 => preemptable,< 0 => BUG*/
70 mm_segment_t addr_limit; /* thread address space */
71 struct restart_block restart_block;
72
73 struct cpu_context cpu_context;
74};
75
76/*
77 * macros/functions for gaining access to the thread information structure
78 *
79 * preempt_count needs to be 1 initially, until the scheduler is functional.
80 */
81#define INIT_THREAD_INFO(tsk) \
82{ \
83 .task = &tsk, \
84 .exec_domain = &default_exec_domain, \
85 .flags = 0, \
86 .cpu = 0, \
87 .preempt_count = 1, \
88 .addr_limit = KERNEL_DS, \
89 .restart_block = { \
90 .fn = do_no_restart_syscall, \
91 }, \
92}
93
94#define init_thread_info (init_thread_union.thread_info)
95#define init_stack (init_thread_union.stack)
96
97/* how to get the thread information struct from C */
98static inline struct thread_info *current_thread_info(void)
99{
100 register unsigned long sp asm("r1");
101
102 return (struct thread_info *)(sp & ~(THREAD_SIZE-1));
103}
104
105/* thread information allocation */
106#endif /* __ASSEMBLY__ */
107
108#define PREEMPT_ACTIVE 0x10000000
109
110/*
111 * thread information flags
112 * - these are process state flags that various assembly files may
113 * need to access
114 * - pending work-to-be-done flags are in LSW
115 * - other flags in MSW
116 */
117#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
118#define TIF_NOTIFY_RESUME 1 /* resumption notification requested */
119#define TIF_SIGPENDING 2 /* signal pending */
120#define TIF_NEED_RESCHED 3 /* rescheduling necessary */
121/* restore singlestep on return to user mode */
122#define TIF_SINGLESTEP 4
123#define TIF_IRET 5 /* return with iret */
124#define TIF_MEMDIE 6
125#define TIF_FREEZE 14 /* Freezing for suspend */
126
127/* FIXME change in entry.S */
128#define TIF_KERNEL_TRACE 8 /* kernel trace active */
129
130/* true if poll_idle() is polling TIF_NEED_RESCHED */
131#define TIF_POLLING_NRFLAG 16
132
133#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
134#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME)
135#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
136#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
137#define _TIF_SINGLESTEP (1<<TIF_SINGLESTEP)
138#define _TIF_IRET (1<<TIF_IRET)
139#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
140#define _TIF_FREEZE (1<<TIF_FREEZE)
141#define _TIF_KERNEL_TRACE (1 << TIF_KERNEL_TRACE)
142
143/* work to do on interrupt/exception return */
144#define _TIF_WORK_MASK 0x0000FFFE
145/* work to do on any return to u-space */
146#define _TIF_ALLWORK_MASK 0x0000FFFF
147
148/*
149 * Thread-synchronous status.
150 *
151 * This is different from the flags in that nobody else
152 * ever touches our thread-synchronous status, so we don't
153 * have to worry about atomic accesses.
154 */
155/* FPU was used by this task this quantum (SMP) */
156#define TS_USEDFPU 0x0001
157
158#endif /* __KERNEL__ */
159#endif /* _ASM_MICROBLAZE_THREAD_INFO_H */
diff --git a/arch/microblaze/include/asm/timex.h b/arch/microblaze/include/asm/timex.h
new file mode 100644
index 000000000000..678525dc6d0b
--- /dev/null
+++ b/arch/microblaze/include/asm/timex.h
@@ -0,0 +1,18 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_TIMEX_H
10#define _ASM_MICROBLAZE_TIMEX_H
11
12#define CLOCK_TICK_RATE 1000 /* Timer input freq. */
13
14typedef unsigned long cycles_t;
15
16#define get_cycles() (0)
17
18#endif /* _ASM_TIMEX_H */
diff --git a/arch/microblaze/include/asm/tlb.h b/arch/microblaze/include/asm/tlb.h
new file mode 100644
index 000000000000..d1dfe3791127
--- /dev/null
+++ b/arch/microblaze/include/asm/tlb.h
@@ -0,0 +1,16 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_TLB_H
10#define _ASM_MICROBLAZE_TLB_H
11
12#define tlb_flush(tlb) do {} while (0)
13
14#include <asm-generic/tlb.h>
15
16#endif /* _ASM_MICROBLAZE_TLB_H */
diff --git a/arch/microblaze/include/asm/tlbflush.h b/arch/microblaze/include/asm/tlbflush.h
new file mode 100644
index 000000000000..d7fe7629001b
--- /dev/null
+++ b/arch/microblaze/include/asm/tlbflush.h
@@ -0,0 +1,20 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_TLBFLUSH_H
10#define _ASM_MICROBLAZE_TLBFLUSH_H
11
12#define flush_tlb() BUG()
13#define flush_tlb_all() BUG()
14#define flush_tlb_mm(mm) BUG()
15#define flush_tlb_page(vma, addr) BUG()
16#define flush_tlb_range(mm, start, end) BUG()
17#define flush_tlb_pgtables(mm, start, end) BUG()
18#define flush_tlb_kernel_range(start, end) BUG()
19
20#endif /* _ASM_MICROBLAZE_TLBFLUSH_H */
diff --git a/arch/microblaze/include/asm/topology.h b/arch/microblaze/include/asm/topology.h
new file mode 100644
index 000000000000..96bcea5a9920
--- /dev/null
+++ b/arch/microblaze/include/asm/topology.h
@@ -0,0 +1,11 @@
1#include <asm-generic/topology.h>
2
3#ifndef _ASM_MICROBLAZE_TOPOLOGY_H
4#define _ASM_MICROBLAZE_TOPOLOGY_H
5
6struct device_node;
7static inline int of_node_to_nid(struct device_node *device)
8{
9 return 0;
10}
11#endif /* _ASM_MICROBLAZE_TOPOLOGY_H */
diff --git a/arch/microblaze/include/asm/types.h b/arch/microblaze/include/asm/types.h
new file mode 100644
index 000000000000..bebc018318f5
--- /dev/null
+++ b/arch/microblaze/include/asm/types.h
@@ -0,0 +1,38 @@
1/*
2 * Copyright (C) Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_TYPES_H
10#define _ASM_MICROBLAZE_TYPES_H
11
12/*
13 * This file is never included by application software unless
14 * explicitly requested (e.g., via linux/types.h) in which case the
15 * application is Linux specific so (user-) name space pollution is
16 * not a major issue. However, for interoperability, libraries still
17 * need to be careful to avoid a name clashes.
18 */
19
20#include <asm-generic/int-ll64.h>
21
22# ifndef __ASSEMBLY__
23
24typedef unsigned short umode_t;
25
26/*
27 * These aren't exported outside the kernel to avoid name space clashes
28 */
29# ifdef __KERNEL__
30# define BITS_PER_LONG 32
31
32/* Dma addresses are 32-bits wide. */
33
34typedef u32 dma_addr_t;
35
36# endif/* __KERNEL__ */
37# endif /* __ASSEMBLY__ */
38#endif /* _ASM_MICROBLAZE_TYPES_H */
diff --git a/arch/microblaze/include/asm/uaccess.h b/arch/microblaze/include/asm/uaccess.h
new file mode 100644
index 000000000000..5a3ffc308e12
--- /dev/null
+++ b/arch/microblaze/include/asm/uaccess.h
@@ -0,0 +1,134 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_UACCESS_H
10#define _ASM_MICROBLAZE_UACCESS_H
11
12#ifdef __KERNEL__
13#ifndef __ASSEMBLY__
14
15#include <linux/kernel.h>
16#include <linux/errno.h>
17#include <linux/sched.h> /* RLIMIT_FSIZE */
18#include <linux/mm.h>
19
20#include <asm/mmu.h>
21#include <asm/page.h>
22#include <asm/pgtable.h>
23#include <asm/segment.h>
24#include <linux/string.h>
25
26#define VERIFY_READ 0
27#define VERIFY_WRITE 1
28
29extern int ___range_ok(unsigned long addr, unsigned long size);
30
31#define __range_ok(addr, size) \
32 ___range_ok((unsigned long)(addr), (unsigned long)(size))
33
34#define access_ok(type, addr, size) (__range_ok((addr), (size)) == 0)
35#define __access_ok(add, size) (__range_ok((addr), (size)) == 0)
36
37extern inline int bad_user_access_length(void)
38{
39 return 0;
40}
41/* FIXME this is function for optimalization -> memcpy */
42#define __get_user(var, ptr) \
43 ({ \
44 int __gu_err = 0; \
45 switch (sizeof(*(ptr))) { \
46 case 1: \
47 case 2: \
48 case 4: \
49 (var) = *(ptr); \
50 break; \
51 case 8: \
52 memcpy((void *) &(var), (ptr), 8); \
53 break; \
54 default: \
55 (var) = 0; \
56 __gu_err = __get_user_bad(); \
57 break; \
58 } \
59 __gu_err; \
60 })
61
62#define __get_user_bad() (bad_user_access_length(), (-EFAULT))
63
64#define __put_user(var, ptr) \
65 ({ \
66 int __pu_err = 0; \
67 switch (sizeof(*(ptr))) { \
68 case 1: \
69 case 2: \
70 case 4: \
71 *(ptr) = (var); \
72 break; \
73 case 8: { \
74 typeof(*(ptr)) __pu_val = var; \
75 memcpy(ptr, &__pu_val, sizeof(__pu_val));\
76 } \
77 break; \
78 default: \
79 __pu_err = __put_user_bad(); \
80 break; \
81 } \
82 __pu_err; \
83 })
84
85#define __put_user_bad() (bad_user_access_length(), (-EFAULT))
86
87#define put_user(x, ptr) __put_user(x, ptr)
88#define get_user(x, ptr) __get_user(x, ptr)
89
90#define copy_to_user(to, from, n) (memcpy(to, from, n), 0)
91#define copy_from_user(to, from, n) (memcpy(to, from, n), 0)
92
93#define __copy_to_user(to, from, n) (copy_to_user(to, from, n))
94#define __copy_from_user(to, from, n) (copy_from_user(to, from, n))
95#define __copy_to_user_inatomic(to, from, n) (__copy_to_user(to, from, n))
96#define __copy_from_user_inatomic(to, from, n) (__copy_from_user(to, from, n))
97
98#define __clear_user(addr, n) (memset((void *)addr, 0, n), 0)
99
100static inline unsigned long clear_user(void *addr, unsigned long size)
101{
102 if (access_ok(VERIFY_WRITE, addr, size))
103 size = __clear_user(addr, size);
104 return size;
105}
106
107/* Returns 0 if exception not found and fixup otherwise. */
108extern unsigned long search_exception_table(unsigned long);
109
110
111extern long strncpy_from_user(char *dst, const char __user *src, long count);
112extern long strnlen_user(const char __user *src, long count);
113extern long __strncpy_from_user(char *dst, const char __user *src, long count);
114
115/*
116 * The exception table consists of pairs of addresses: the first is the
117 * address of an instruction that is allowed to fault, and the second is
118 * the address at which the program should continue. No registers are
119 * modified, so it is entirely up to the continuation code to figure out
120 * what to do.
121 *
122 * All the routines below use bits of fixup code that are out of line
123 * with the main instruction path. This means when everything is well,
124 * we don't even have to jump over them. Further, they do not intrude
125 * on our cache or tlb entries.
126 */
127struct exception_table_entry {
128 unsigned long insn, fixup;
129};
130
131#endif /* __ASSEMBLY__ */
132#endif /* __KERNEL__ */
133
134#endif /* _ASM_MICROBLAZE_UACCESS_H */
diff --git a/arch/microblaze/include/asm/ucontext.h b/arch/microblaze/include/asm/ucontext.h
new file mode 100644
index 000000000000..11f6bb3ae3a4
--- /dev/null
+++ b/arch/microblaze/include/asm/ucontext.h
@@ -0,0 +1,22 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_UCONTEXT_H
10#define _ASM_MICROBLAZE_UCONTEXT_H
11
12#include <asm/sigcontext.h>
13
14struct ucontext {
15 unsigned long uc_flags;
16 struct ucontext *uc_link;
17 stack_t uc_stack;
18 struct sigcontext uc_mcontext;
19 sigset_t uc_sigmask; /* mask last for extensibility */
20};
21
22#endif /* _ASM_MICROBLAZE_UCONTEXT_H */
diff --git a/arch/microblaze/include/asm/unaligned.h b/arch/microblaze/include/asm/unaligned.h
new file mode 100644
index 000000000000..9d66b640c910
--- /dev/null
+++ b/arch/microblaze/include/asm/unaligned.h
@@ -0,0 +1,22 @@
1/*
2 * Copyright (C) 2008 Michal Simek <monstr@monstr.eu>
3 * Copyright (C) 2006 Atmark Techno, Inc.
4 *
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 */
9
10#ifndef _ASM_MICROBLAZE_UNALIGNED_H
11#define _ASM_MICROBLAZE_UNALIGNED_H
12
13# ifdef __KERNEL__
14
15# include <linux/unaligned/access_ok.h>
16# include <linux/unaligned/generic.h>
17
18# define get_unaligned __get_unaligned_be
19# define put_unaligned __put_unaligned_be
20
21# endif /* __KERNEL__ */
22#endif /* _ASM_MICROBLAZE_UNALIGNED_H */
diff --git a/arch/microblaze/include/asm/unistd.h b/arch/microblaze/include/asm/unistd.h
new file mode 100644
index 000000000000..d9d3903fde3f
--- /dev/null
+++ b/arch/microblaze/include/asm/unistd.h
@@ -0,0 +1,421 @@
1/*
2 * Copyright (C) 2007-2008 Michal Simek <monstr@monstr.eu>
3 * Copyright (C) 2006 Atmark Techno, Inc.
4 *
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 */
9
10#ifndef _ASM_MICROBLAZE_UNISTD_H
11#define _ASM_MICROBLAZE_UNISTD_H
12
13#define __NR_restart_syscall 0 /* ok */
14#define __NR_exit 1 /* ok */
15#define __NR_fork 2 /* not for no MMU - weird */
16#define __NR_read 3 /* ok */
17#define __NR_write 4 /* ok */
18#define __NR_open 5 /* openat */
19#define __NR_close 6 /* ok */
20#define __NR_waitpid 7 /* waitid */
21#define __NR_creat 8 /* openat */
22#define __NR_link 9 /* linkat */
23#define __NR_unlink 10 /* unlinkat */
24#define __NR_execve 11 /* ok */
25#define __NR_chdir 12 /* ok */
26#define __NR_time 13 /* obsolete -> sys_gettimeofday */
27#define __NR_mknod 14 /* mknodat */
28#define __NR_chmod 15 /* fchmodat */
29#define __NR_lchown 16 /* ok */
30#define __NR_break 17 /* don't know */
31#define __NR_oldstat 18 /* remove */
32#define __NR_lseek 19 /* ok */
33#define __NR_getpid 20 /* ok */
34#define __NR_mount 21 /* ok */
35#define __NR_umount 22 /* ok */ /* use only umount2 */
36#define __NR_setuid 23 /* ok */
37#define __NR_getuid 24 /* ok */
38#define __NR_stime 25 /* obsolete -> sys_settimeofday */
39#define __NR_ptrace 26 /* ok */
40#define __NR_alarm 27 /* obsolete -> sys_setitimer */
41#define __NR_oldfstat 28 /* remove */
42#define __NR_pause 29 /* obsolete -> sys_rt_sigtimedwait */
43#define __NR_utime 30 /* obsolete -> sys_utimesat */
44#define __NR_stty 31 /* remove */
45#define __NR_gtty 32 /* remove */
46#define __NR_access 33 /* faccessat */
47/* can be implemented by sys_setpriority */
48#define __NR_nice 34
49#define __NR_ftime 35 /* remove */
50#define __NR_sync 36 /* ok */
51#define __NR_kill 37 /* ok */
52#define __NR_rename 38 /* renameat */
53#define __NR_mkdir 39 /* mkdirat */
54#define __NR_rmdir 40 /* unlinkat */
55#define __NR_dup 41 /* ok */
56#define __NR_pipe 42 /* ok */
57#define __NR_times 43 /* ok */
58#define __NR_prof 44 /* remove */
59#define __NR_brk 45 /* ok -mmu, nommu specific */
60#define __NR_setgid 46 /* ok */
61#define __NR_getgid 47 /* ok */
62#define __NR_signal 48 /* obsolete -> sys_rt_sigaction */
63#define __NR_geteuid 49 /* ok */
64#define __NR_getegid 50 /* ok */
65#define __NR_acct 51 /* add it and then I can disable it */
66#define __NR_umount2 52 /* remove */
67#define __NR_lock 53 /* remove */
68#define __NR_ioctl 54 /* ok */
69#define __NR_fcntl 55 /* ok -> 64bit version*/
70#define __NR_mpx 56 /* remove */
71#define __NR_setpgid 57 /* ok */
72#define __NR_ulimit 58 /* remove */
73#define __NR_oldolduname 59 /* remove */
74#define __NR_umask 60 /* ok */
75#define __NR_chroot 61 /* ok */
76#define __NR_ustat 62 /* obsolete -> statfs64 */
77#define __NR_dup2 63 /* ok */
78#define __NR_getppid 64 /* ok */
79#define __NR_getpgrp 65 /* obsolete -> sys_getpgid */
80#define __NR_setsid 66 /* ok */
81#define __NR_sigaction 67 /* obsolete -> rt_sigaction */
82#define __NR_sgetmask 68 /* obsolete -> sys_rt_sigprocmask */
83#define __NR_ssetmask 69 /* obsolete ->sys_rt_sigprocmask */
84#define __NR_setreuid 70 /* ok */
85#define __NR_setregid 71 /* ok */
86#define __NR_sigsuspend 72 /* obsolete -> rt_sigsuspend */
87#define __NR_sigpending 73 /* obsolete -> sys_rt_sigpending */
88#define __NR_sethostname 74 /* ok */
89#define __NR_setrlimit 75 /* ok */
90#define __NR_getrlimit 76 /* ok Back compatible 2G limited rlimit */
91#define __NR_getrusage 77 /* ok */
92#define __NR_gettimeofday 78 /* ok */
93#define __NR_settimeofday 79 /* ok */
94#define __NR_getgroups 80 /* ok */
95#define __NR_setgroups 81 /* ok */
96#define __NR_select 82 /* obsolete -> sys_pselect7 */
97#define __NR_symlink 83 /* symlinkat */
98#define __NR_oldlstat 84 /* remove */
99#define __NR_readlink 85 /* obsolete -> sys_readlinkat */
100#define __NR_uselib 86 /* remove */
101#define __NR_swapon 87 /* ok */
102#define __NR_reboot 88 /* ok */
103#define __NR_readdir 89 /* remove ? */
104#define __NR_mmap 90 /* obsolete -> sys_mmap2 */
105#define __NR_munmap 91 /* ok - mmu and nommu */
106#define __NR_truncate 92 /* ok or truncate64 */
107#define __NR_ftruncate 93 /* ok or ftruncate64 */
108#define __NR_fchmod 94 /* ok */
109#define __NR_fchown 95 /* ok */
110#define __NR_getpriority 96 /* ok */
111#define __NR_setpriority 97 /* ok */
112#define __NR_profil 98 /* remove */
113#define __NR_statfs 99 /* ok or statfs64 */
114#define __NR_fstatfs 100 /* ok or fstatfs64 */
115#define __NR_ioperm 101 /* remove */
116#define __NR_socketcall 102 /* remove */
117#define __NR_syslog 103 /* ok */
118#define __NR_setitimer 104 /* ok */
119#define __NR_getitimer 105 /* ok */
120#define __NR_stat 106 /* remove */
121#define __NR_lstat 107 /* remove */
122#define __NR_fstat 108 /* remove */
123#define __NR_olduname 109 /* remove */
124#define __NR_iopl 110 /* remove */
125#define __NR_vhangup 111 /* ok */
126#define __NR_idle 112 /* remove */
127#define __NR_vm86old 113 /* remove */
128#define __NR_wait4 114 /* obsolete -> waitid */
129#define __NR_swapoff 115 /* ok */
130#define __NR_sysinfo 116 /* ok */
131#define __NR_ipc 117 /* remove - direct call */
132#define __NR_fsync 118 /* ok */
133#define __NR_sigreturn 119 /* obsolete -> sys_rt_sigreturn */
134#define __NR_clone 120 /* ok */
135#define __NR_setdomainname 121 /* ok */
136#define __NR_uname 122 /* remove */
137#define __NR_modify_ldt 123 /* remove */
138#define __NR_adjtimex 124 /* ok */
139#define __NR_mprotect 125 /* remove */
140#define __NR_sigprocmask 126 /* obsolete -> sys_rt_sigprocmask */
141#define __NR_create_module 127 /* remove */
142#define __NR_init_module 128 /* ok */
143#define __NR_delete_module 129 /* ok */
144#define __NR_get_kernel_syms 130 /* remove */
145#define __NR_quotactl 131 /* ok */
146#define __NR_getpgid 132 /* ok */
147#define __NR_fchdir 133 /* ok */
148#define __NR_bdflush 134 /* remove */
149#define __NR_sysfs 135 /* needed for busybox */
150#define __NR_personality 136 /* ok */
151#define __NR_afs_syscall 137 /* Syscall for Andrew File System */
152#define __NR_setfsuid 138 /* ok */
153#define __NR_setfsgid 139 /* ok */
154#define __NR__llseek 140 /* remove only lseek */
155#define __NR_getdents 141 /* ok or getdents64 */
156#define __NR__newselect 142 /* remove */
157#define __NR_flock 143 /* ok */
158#define __NR_msync 144 /* remove */
159#define __NR_readv 145 /* ok */
160#define __NR_writev 146 /* ok */
161#define __NR_getsid 147 /* ok */
162#define __NR_fdatasync 148 /* ok */
163#define __NR__sysctl 149 /* remove */
164#define __NR_mlock 150 /* ok - nommu or mmu */
165#define __NR_munlock 151 /* ok - nommu or mmu */
166#define __NR_mlockall 152 /* ok - nommu or mmu */
167#define __NR_munlockall 153 /* ok - nommu or mmu */
168#define __NR_sched_setparam 154 /* ok */
169#define __NR_sched_getparam 155 /* ok */
170#define __NR_sched_setscheduler 156 /* ok */
171#define __NR_sched_getscheduler 157 /* ok */
172#define __NR_sched_yield 158 /* ok */
173#define __NR_sched_get_priority_max 159 /* ok */
174#define __NR_sched_get_priority_min 160 /* ok */
175#define __NR_sched_rr_get_interval 161 /* ok */
176#define __NR_nanosleep 162 /* ok */
177#define __NR_mremap 163 /* ok - nommu or mmu */
178#define __NR_setresuid 164 /* ok */
179#define __NR_getresuid 165 /* ok */
180#define __NR_vm86 166 /* remove */
181#define __NR_query_module 167 /* ok */
182#define __NR_poll 168 /* obsolete -> sys_ppoll */
183#define __NR_nfsservctl 169 /* ok */
184#define __NR_setresgid 170 /* ok */
185#define __NR_getresgid 171 /* ok */
186#define __NR_prctl 172 /* ok */
187#define __NR_rt_sigreturn 173 /* ok */
188#define __NR_rt_sigaction 174 /* ok */
189#define __NR_rt_sigprocmask 175 /* ok */
190#define __NR_rt_sigpending 176 /* ok */
191#define __NR_rt_sigtimedwait 177 /* ok */
192#define __NR_rt_sigqueueinfo 178 /* ok */
193#define __NR_rt_sigsuspend 179 /* ok */
194#define __NR_pread64 180 /* ok */
195#define __NR_pwrite64 181 /* ok */
196#define __NR_chown 182 /* obsolete -> fchownat */
197#define __NR_getcwd 183 /* ok */
198#define __NR_capget 184 /* ok */
199#define __NR_capset 185 /* ok */
200#define __NR_sigaltstack 186 /* remove */
201#define __NR_sendfile 187 /* ok -> exist 64bit version*/
202#define __NR_getpmsg 188 /* remove */
203/* remove - some people actually want streams */
204#define __NR_putpmsg 189
205/* for noMMU - group with clone -> maybe remove */
206#define __NR_vfork 190
207#define __NR_ugetrlimit 191 /* remove - SuS compliant getrlimit */
208#define __NR_mmap2 192 /* ok */
209#define __NR_truncate64 193 /* ok */
210#define __NR_ftruncate64 194 /* ok */
211#define __NR_stat64 195 /* remove _ARCH_WANT_STAT64 */
212#define __NR_lstat64 196 /* remove _ARCH_WANT_STAT64 */
213#define __NR_fstat64 197 /* remove _ARCH_WANT_STAT64 */
214#define __NR_lchown32 198 /* ok - without 32 */
215#define __NR_getuid32 199 /* ok - without 32 */
216#define __NR_getgid32 200 /* ok - without 32 */
217#define __NR_geteuid32 201 /* ok - without 32 */
218#define __NR_getegid32 202 /* ok - without 32 */
219#define __NR_setreuid32 203 /* ok - without 32 */
220#define __NR_setregid32 204 /* ok - without 32 */
221#define __NR_getgroups32 205 /* ok - without 32 */
222#define __NR_setgroups32 206 /* ok - without 32 */
223#define __NR_fchown32 207 /* ok - without 32 */
224#define __NR_setresuid32 208 /* ok - without 32 */
225#define __NR_getresuid32 209 /* ok - without 32 */
226#define __NR_setresgid32 210 /* ok - without 32 */
227#define __NR_getresgid32 211 /* ok - without 32 */
228#define __NR_chown32 212 /* ok - without 32 -obsolete -> fchownat */
229#define __NR_setuid32 213 /* ok - without 32 */
230#define __NR_setgid32 214 /* ok - without 32 */
231#define __NR_setfsuid32 215 /* ok - without 32 */
232#define __NR_setfsgid32 216 /* ok - without 32 */
233#define __NR_pivot_root 217 /* ok */
234#define __NR_mincore 218 /* ok */
235#define __NR_madvise 219 /* ok */
236#define __NR_getdents64 220 /* ok */
237#define __NR_fcntl64 221 /* ok */
238/* 223 is unused */
239#define __NR_gettid 224 /* ok */
240#define __NR_readahead 225 /* ok */
241#define __NR_setxattr 226 /* ok */
242#define __NR_lsetxattr 227 /* ok */
243#define __NR_fsetxattr 228 /* ok */
244#define __NR_getxattr 229 /* ok */
245#define __NR_lgetxattr 230 /* ok */
246#define __NR_fgetxattr 231 /* ok */
247#define __NR_listxattr 232 /* ok */
248#define __NR_llistxattr 233 /* ok */
249#define __NR_flistxattr 234 /* ok */
250#define __NR_removexattr 235 /* ok */
251#define __NR_lremovexattr 236 /* ok */
252#define __NR_fremovexattr 237 /* ok */
253#define __NR_tkill 238 /* ok */
254#define __NR_sendfile64 239 /* ok */
255#define __NR_futex 240 /* ok */
256#define __NR_sched_setaffinity 241 /* ok */
257#define __NR_sched_getaffinity 242 /* ok */
258#define __NR_set_thread_area 243 /* remove */
259#define __NR_get_thread_area 244 /* remove */
260#define __NR_io_setup 245 /* ok */
261#define __NR_io_destroy 246 /* ok */
262#define __NR_io_getevents 247 /* ok */
263#define __NR_io_submit 248 /* ok */
264#define __NR_io_cancel 249 /* ok */
265#define __NR_fadvise64 250 /* remove -> sys_fadvise64_64 */
266/* 251 is available for reuse (was briefly sys_set_zone_reclaim) */
267#define __NR_exit_group 252 /* ok */
268#define __NR_lookup_dcookie 253 /* ok */
269#define __NR_epoll_create 254 /* ok */
270#define __NR_epoll_ctl 255 /* ok */
271#define __NR_epoll_wait 256 /* obsolete -> sys_epoll_pwait */
272#define __NR_remap_file_pages 257 /* only for mmu */
273#define __NR_set_tid_address 258 /* ok */
274#define __NR_timer_create 259 /* ok */
275#define __NR_timer_settime (__NR_timer_create+1) /* 260 */ /* ok */
276#define __NR_timer_gettime (__NR_timer_create+2) /* 261 */ /* ok */
277#define __NR_timer_getoverrun (__NR_timer_create+3) /* 262 */ /* ok */
278#define __NR_timer_delete (__NR_timer_create+4) /* 263 */ /* ok */
279#define __NR_clock_settime (__NR_timer_create+5) /* 264 */ /* ok */
280#define __NR_clock_gettime (__NR_timer_create+6) /* 265 */ /* ok */
281#define __NR_clock_getres (__NR_timer_create+7) /* 266 */ /* ok */
282#define __NR_clock_nanosleep (__NR_timer_create+8) /* 267 */ /* ok */
283#define __NR_statfs64 268 /* ok */
284#define __NR_fstatfs64 269 /* ok */
285#define __NR_tgkill 270 /* ok */
286#define __NR_utimes 271 /* obsolete -> sys_futimesat */
287#define __NR_fadvise64_64 272 /* ok */
288#define __NR_vserver 273 /* ok */
289#define __NR_mbind 274 /* only for mmu */
290#define __NR_get_mempolicy 275 /* only for mmu */
291#define __NR_set_mempolicy 276 /* only for mmu */
292#define __NR_mq_open 277 /* ok */
293#define __NR_mq_unlink (__NR_mq_open+1) /* 278 */ /* ok */
294#define __NR_mq_timedsend (__NR_mq_open+2) /* 279 */ /* ok */
295#define __NR_mq_timedreceive (__NR_mq_open+3) /* 280 */ /* ok */
296#define __NR_mq_notify (__NR_mq_open+4) /* 281 */ /* ok */
297#define __NR_mq_getsetattr (__NR_mq_open+5) /* 282 */ /* ok */
298#define __NR_kexec_load 283 /* ok */
299#define __NR_waitid 284 /* ok */
300/* #define __NR_sys_setaltroot 285 */
301#define __NR_add_key 286 /* ok */
302#define __NR_request_key 287 /* ok */
303#define __NR_keyctl 288 /* ok */
304#define __NR_ioprio_set 289 /* ok */
305#define __NR_ioprio_get 290 /* ok */
306#define __NR_inotify_init 291 /* ok */
307#define __NR_inotify_add_watch 292 /* ok */
308#define __NR_inotify_rm_watch 293 /* ok */
309#define __NR_migrate_pages 294 /* mmu */
310#define __NR_openat 295 /* ok */
311#define __NR_mkdirat 296 /* ok */
312#define __NR_mknodat 297 /* ok */
313#define __NR_fchownat 298 /* ok */
314#define __NR_futimesat 299 /* obsolete -> sys_utimesat */
315#define __NR_fstatat64 300 /* stat64 */
316#define __NR_unlinkat 301 /* ok */
317#define __NR_renameat 302 /* ok */
318#define __NR_linkat 303 /* ok */
319#define __NR_symlinkat 304 /* ok */
320#define __NR_readlinkat 305 /* ok */
321#define __NR_fchmodat 306 /* ok */
322#define __NR_faccessat 307 /* ok */
323#define __NR_pselect6 308 /* obsolete -> sys_pselect7 */
324#define __NR_ppoll 309 /* ok */
325#define __NR_unshare 310 /* ok */
326#define __NR_set_robust_list 311 /* ok */
327#define __NR_get_robust_list 312 /* ok */
328#define __NR_splice 313 /* ok */
329#define __NR_sync_file_range 314 /* ok */
330#define __NR_tee 315 /* ok */
331#define __NR_vmsplice 316 /* ok */
332#define __NR_move_pages 317 /* mmu */
333#define __NR_getcpu 318 /* ok */
334#define __NR_epoll_pwait 319 /* ok */
335#define __NR_utimensat 320 /* ok */
336#define __NR_signalfd 321 /* ok */
337#define __NR_timerfd_create 322 /* ok */
338#define __NR_eventfd 323 /* ok */
339#define __NR_fallocate 324 /* ok */
340#define __NR_semtimedop 325 /* ok - semaphore group */
341#define __NR_timerfd_settime 326 /* ok */
342#define __NR_timerfd_gettime 327 /* ok */
343/* sysv ipc syscalls */
344#define __NR_semctl 328 /* ok */
345#define __NR_semget 329 /* ok */
346#define __NR_semop 330 /* ok */
347#define __NR_msgctl 331 /* ok */
348#define __NR_msgget 332 /* ok */
349#define __NR_msgrcv 333 /* ok */
350#define __NR_msgsnd 334 /* ok */
351#define __NR_shmat 335 /* ok */
352#define __NR_shmctl 336 /* ok */
353#define __NR_shmdt 337 /* ok */
354#define __NR_shmget 338 /* ok */
355
356
357#define __NR_signalfd4 339 /* new */
358#define __NR_eventfd2 340 /* new */
359#define __NR_epoll_create1 341 /* new */
360#define __NR_dup3 342 /* new */
361#define __NR_pipe2 343 /* new */
362#define __NR_inotify_init1 344 /* new */
363#define __NR_socket 345 /* new */
364#define __NR_socketpair 346 /* new */
365#define __NR_bind 347 /* new */
366#define __NR_listen 348 /* new */
367#define __NR_accept 349 /* new */
368#define __NR_connect 350 /* new */
369#define __NR_getsockname 351 /* new */
370#define __NR_getpeername 352 /* new */
371#define __NR_sendto 353 /* new */
372#define __NR_send 354 /* new */
373#define __NR_recvfrom 355 /* new */
374#define __NR_recv 356 /* new */
375#define __NR_setsockopt 357 /* new */
376#define __NR_getsockopt 358 /* new */
377#define __NR_shutdown 359 /* new */
378#define __NR_sendmsg 360 /* new */
379#define __NR_recvmsg 361 /* new */
380#define __NR_accept04 362 /* new */
381
382#define __NR_syscalls 363
383
384#ifdef __KERNEL__
385#ifndef __ASSEMBLY__
386
387#define __ARCH_WANT_IPC_PARSE_VERSION
388/* #define __ARCH_WANT_OLD_READDIR */
389/* #define __ARCH_WANT_OLD_STAT */
390#define __ARCH_WANT_STAT64
391#define __ARCH_WANT_SYS_ALARM
392#define __ARCH_WANT_SYS_GETHOSTNAME
393#define __ARCH_WANT_SYS_PAUSE
394#define __ARCH_WANT_SYS_SGETMASK
395#define __ARCH_WANT_SYS_SIGNAL
396#define __ARCH_WANT_SYS_TIME
397#define __ARCH_WANT_SYS_UTIME
398#define __ARCH_WANT_SYS_WAITPID
399#define __ARCH_WANT_SYS_SOCKETCALL
400#define __ARCH_WANT_SYS_FADVISE64
401#define __ARCH_WANT_SYS_GETPGRP
402#define __ARCH_WANT_SYS_LLSEEK
403#define __ARCH_WANT_SYS_NICE
404/* #define __ARCH_WANT_SYS_OLD_GETRLIMIT */
405#define __ARCH_WANT_SYS_OLDUMOUNT
406#define __ARCH_WANT_SYS_SIGPENDING
407#define __ARCH_WANT_SYS_SIGPROCMASK
408#define __ARCH_WANT_SYS_RT_SIGACTION
409/* #define __ARCH_WANT_SYS_RT_SIGSUSPEND */
410
411/*
412 * "Conditional" syscalls
413 *
414 * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
415 * but it doesn't work on all toolchains, so we just do it by hand
416 */
417#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall");
418
419#endif /* __ASSEMBLY__ */
420#endif /* __KERNEL__ */
421#endif /* _ASM_MICROBLAZE_UNISTD_H */
diff --git a/arch/microblaze/include/asm/user.h b/arch/microblaze/include/asm/user.h
new file mode 100644
index 000000000000..8b137891791f
--- /dev/null
+++ b/arch/microblaze/include/asm/user.h
@@ -0,0 +1 @@
diff --git a/arch/microblaze/include/asm/vga.h b/arch/microblaze/include/asm/vga.h
new file mode 100644
index 000000000000..8b137891791f
--- /dev/null
+++ b/arch/microblaze/include/asm/vga.h
@@ -0,0 +1 @@
diff --git a/arch/microblaze/include/asm/xor.h b/arch/microblaze/include/asm/xor.h
new file mode 100644
index 000000000000..c82eb12a5b18
--- /dev/null
+++ b/arch/microblaze/include/asm/xor.h
@@ -0,0 +1 @@
#include <asm-generic/xor.h>
diff --git a/arch/microblaze/kernel/Makefile b/arch/microblaze/kernel/Makefile
new file mode 100644
index 000000000000..da94bec4ecba
--- /dev/null
+++ b/arch/microblaze/kernel/Makefile
@@ -0,0 +1,19 @@
1#
2# Makefile
3#
4
5extra-y := head.o vmlinux.lds
6
7obj-y += exceptions.o \
8 hw_exception_handler.o init_task.o intc.o irq.o of_device.o \
9 of_platform.o process.o prom.o prom_parse.o ptrace.o \
10 setup.o signal.o sys_microblaze.o timer.o traps.o
11
12obj-y += cpu/
13
14obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
15obj-$(CONFIG_SELFMOD) += selfmod.o
16obj-$(CONFIG_HEART_BEAT) += heartbeat.o
17obj-$(CONFIG_MODULES) += microblaze_ksyms.o module.o
18
19obj-y += entry$(MMUEXT).o
diff --git a/arch/microblaze/kernel/asm-offsets.c b/arch/microblaze/kernel/asm-offsets.c
new file mode 100644
index 000000000000..38e1a2e8ad0c
--- /dev/null
+++ b/arch/microblaze/kernel/asm-offsets.c
@@ -0,0 +1,115 @@
1/*
2 * Copyright (C) 2007-2009 PetaLogix
3 * Copyright (C) 2006 Atmark Techno, Inc.
4 *
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 */
9
10#include <linux/init.h>
11#include <linux/stddef.h>
12#include <linux/sched.h>
13#include <linux/kernel_stat.h>
14#include <linux/ptrace.h>
15#include <linux/hardirq.h>
16#include <linux/thread_info.h>
17#include <linux/kbuild.h>
18
19int main(int argc, char *argv[])
20{
21 /* struct pt_regs */
22 DEFINE(PT_SIZE, sizeof(struct pt_regs));
23 DEFINE(PT_MSR, offsetof(struct pt_regs, msr));
24 DEFINE(PT_EAR, offsetof(struct pt_regs, ear));
25 DEFINE(PT_ESR, offsetof(struct pt_regs, esr));
26 DEFINE(PT_FSR, offsetof(struct pt_regs, fsr));
27 DEFINE(PT_PC, offsetof(struct pt_regs, pc));
28 DEFINE(PT_R0, offsetof(struct pt_regs, r0));
29 DEFINE(PT_R1, offsetof(struct pt_regs, r1));
30 DEFINE(PT_R2, offsetof(struct pt_regs, r2));
31 DEFINE(PT_R3, offsetof(struct pt_regs, r3));
32 DEFINE(PT_R4, offsetof(struct pt_regs, r4));
33 DEFINE(PT_R5, offsetof(struct pt_regs, r5));
34 DEFINE(PT_R6, offsetof(struct pt_regs, r6));
35 DEFINE(PT_R7, offsetof(struct pt_regs, r7));
36 DEFINE(PT_R8, offsetof(struct pt_regs, r8));
37 DEFINE(PT_R9, offsetof(struct pt_regs, r9));
38 DEFINE(PT_R10, offsetof(struct pt_regs, r10));
39 DEFINE(PT_R11, offsetof(struct pt_regs, r11));
40 DEFINE(PT_R12, offsetof(struct pt_regs, r12));
41 DEFINE(PT_R13, offsetof(struct pt_regs, r13));
42 DEFINE(PT_R14, offsetof(struct pt_regs, r14));
43 DEFINE(PT_R15, offsetof(struct pt_regs, r15));
44 DEFINE(PT_R16, offsetof(struct pt_regs, r16));
45 DEFINE(PT_R17, offsetof(struct pt_regs, r17));
46 DEFINE(PT_R18, offsetof(struct pt_regs, r18));
47 DEFINE(PT_R19, offsetof(struct pt_regs, r19));
48 DEFINE(PT_R20, offsetof(struct pt_regs, r20));
49 DEFINE(PT_R21, offsetof(struct pt_regs, r21));
50 DEFINE(PT_R22, offsetof(struct pt_regs, r22));
51 DEFINE(PT_R23, offsetof(struct pt_regs, r23));
52 DEFINE(PT_R24, offsetof(struct pt_regs, r24));
53 DEFINE(PT_R25, offsetof(struct pt_regs, r25));
54 DEFINE(PT_R26, offsetof(struct pt_regs, r26));
55 DEFINE(PT_R27, offsetof(struct pt_regs, r27));
56 DEFINE(PT_R28, offsetof(struct pt_regs, r28));
57 DEFINE(PT_R29, offsetof(struct pt_regs, r29));
58 DEFINE(PT_R30, offsetof(struct pt_regs, r30));
59 DEFINE(PT_R31, offsetof(struct pt_regs, r31));
60 DEFINE(PT_MODE, offsetof(struct pt_regs, kernel_mode));
61 BLANK();
62
63 /* Magic offsets for PTRACE PEEK/POKE etc */
64 DEFINE(PT_TEXT_ADDR, sizeof(struct pt_regs) + 1);
65 DEFINE(PT_TEXT_LEN, sizeof(struct pt_regs) + 2);
66 DEFINE(PT_DATA_ADDR, sizeof(struct pt_regs) + 3);
67 BLANK();
68
69 /* struct task_struct */
70 DEFINE(TS_THREAD_INFO, offsetof(struct task_struct, stack));
71
72 /* struct thread_info */
73 DEFINE(TI_TASK, offsetof(struct thread_info, task));
74 DEFINE(TI_EXEC_DOMAIN, offsetof(struct thread_info, exec_domain));
75 DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
76 DEFINE(TI_STATUS, offsetof(struct thread_info, status));
77 DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
78 DEFINE(TI_PRE_COUNT, offsetof(struct thread_info, preempt_count));
79 DEFINE(TI_ADDR_LIMIT, offsetof(struct thread_info, addr_limit));
80 DEFINE(TI_RESTART_BLOCK, offsetof(struct thread_info, restart_block));
81 DEFINE(TI_CPU_CONTEXT, offsetof(struct thread_info, cpu_context));
82 BLANK();
83
84 /* struct cpu_context */
85 DEFINE(CC_R1, offsetof(struct cpu_context, r1)); /* r1 */
86 DEFINE(CC_R2, offsetof(struct cpu_context, r2));
87 /* dedicated registers */
88 DEFINE(CC_R13, offsetof(struct cpu_context, r13));
89 DEFINE(CC_R14, offsetof(struct cpu_context, r14));
90 DEFINE(CC_R15, offsetof(struct cpu_context, r15));
91 DEFINE(CC_R16, offsetof(struct cpu_context, r16));
92 DEFINE(CC_R17, offsetof(struct cpu_context, r17));
93 DEFINE(CC_R18, offsetof(struct cpu_context, r18));
94 /* non-volatile registers */
95 DEFINE(CC_R19, offsetof(struct cpu_context, r19));
96 DEFINE(CC_R20, offsetof(struct cpu_context, r20));
97 DEFINE(CC_R21, offsetof(struct cpu_context, r21));
98 DEFINE(CC_R22, offsetof(struct cpu_context, r22));
99 DEFINE(CC_R23, offsetof(struct cpu_context, r23));
100 DEFINE(CC_R24, offsetof(struct cpu_context, r24));
101 DEFINE(CC_R25, offsetof(struct cpu_context, r25));
102 DEFINE(CC_R26, offsetof(struct cpu_context, r26));
103 DEFINE(CC_R27, offsetof(struct cpu_context, r27));
104 DEFINE(CC_R28, offsetof(struct cpu_context, r28));
105 DEFINE(CC_R29, offsetof(struct cpu_context, r29));
106 DEFINE(CC_R30, offsetof(struct cpu_context, r30));
107 /* special purpose registers */
108 DEFINE(CC_MSR, offsetof(struct cpu_context, msr));
109 DEFINE(CC_EAR, offsetof(struct cpu_context, ear));
110 DEFINE(CC_ESR, offsetof(struct cpu_context, esr));
111 DEFINE(CC_FSR, offsetof(struct cpu_context, fsr));
112 BLANK();
113
114 return 0;
115}
diff --git a/arch/microblaze/kernel/cpu/Makefile b/arch/microblaze/kernel/cpu/Makefile
new file mode 100644
index 000000000000..20646e549271
--- /dev/null
+++ b/arch/microblaze/kernel/cpu/Makefile
@@ -0,0 +1,8 @@
1#
2# Build the appropriate CPU version support
3#
4
5EXTRA_CFLAGS += -DCPU_MAJOR=$(CPU_MAJOR) -DCPU_MINOR=$(CPU_MINOR) \
6 -DCPU_REV=$(CPU_REV)
7
8obj-y += cache.o cpuinfo.o cpuinfo-pvr-full.o cpuinfo-static.o mb.o pvr.o
diff --git a/arch/microblaze/kernel/cpu/cache.c b/arch/microblaze/kernel/cpu/cache.c
new file mode 100644
index 000000000000..be9fecca4f91
--- /dev/null
+++ b/arch/microblaze/kernel/cpu/cache.c
@@ -0,0 +1,258 @@
1/*
2 * Cache control for MicroBlaze cache memories
3 *
4 * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
5 * Copyright (C) 2007-2009 PetaLogix
6 * Copyright (C) 2007 John Williams <john.williams@petalogix.com>
7 *
8 * This file is subject to the terms and conditions of the GNU General
9 * Public License. See the file COPYING in the main directory of this
10 * archive for more details.
11 */
12
13#include <asm/cacheflush.h>
14#include <linux/cache.h>
15#include <asm/cpuinfo.h>
16
17/* Exported functions */
18
19void _enable_icache(void)
20{
21 if (cpuinfo.use_icache) {
22#if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
23 __asm__ __volatile__ (" \
24 msrset r0, %0; \
25 nop; " \
26 : \
27 : "i" (MSR_ICE) \
28 : "memory");
29#else
30 __asm__ __volatile__ (" \
31 mfs r12, rmsr; \
32 nop; \
33 ori r12, r12, %0; \
34 mts rmsr, r12; \
35 nop; " \
36 : \
37 : "i" (MSR_ICE) \
38 : "memory", "r12");
39#endif
40 }
41}
42
43void _disable_icache(void)
44{
45 if (cpuinfo.use_icache) {
46#if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
47 __asm__ __volatile__ (" \
48 msrclr r0, %0; \
49 nop; " \
50 : \
51 : "i" (MSR_ICE) \
52 : "memory");
53#else
54 __asm__ __volatile__ (" \
55 mfs r12, rmsr; \
56 nop; \
57 andi r12, r12, ~%0; \
58 mts rmsr, r12; \
59 nop; " \
60 : \
61 : "i" (MSR_ICE) \
62 : "memory", "r12");
63#endif
64 }
65}
66
67void _invalidate_icache(unsigned int addr)
68{
69 if (cpuinfo.use_icache) {
70 __asm__ __volatile__ (" \
71 wic %0, r0" \
72 : \
73 : "r" (addr));
74 }
75}
76
77void _enable_dcache(void)
78{
79 if (cpuinfo.use_dcache) {
80#if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
81 __asm__ __volatile__ (" \
82 msrset r0, %0; \
83 nop; " \
84 : \
85 : "i" (MSR_DCE) \
86 : "memory");
87#else
88 __asm__ __volatile__ (" \
89 mfs r12, rmsr; \
90 nop; \
91 ori r12, r12, %0; \
92 mts rmsr, r12; \
93 nop; " \
94 : \
95 : "i" (MSR_DCE) \
96 : "memory", "r12");
97#endif
98 }
99}
100
101void _disable_dcache(void)
102{
103 if (cpuinfo.use_dcache) {
104#if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
105 __asm__ __volatile__ (" \
106 msrclr r0, %0; \
107 nop; " \
108 : \
109 : "i" (MSR_DCE) \
110 : "memory");
111#else
112 __asm__ __volatile__ (" \
113 mfs r12, rmsr; \
114 nop; \
115 andi r12, r12, ~%0; \
116 mts rmsr, r12; \
117 nop; " \
118 : \
119 : "i" (MSR_DCE) \
120 : "memory", "r12");
121#endif
122 }
123}
124
125void _invalidate_dcache(unsigned int addr)
126{
127 if (cpuinfo.use_dcache)
128 __asm__ __volatile__ (" \
129 wdc %0, r0" \
130 : \
131 : "r" (addr));
132}
133
134void __invalidate_icache_all(void)
135{
136 unsigned int i;
137 unsigned flags;
138
139 if (cpuinfo.use_icache) {
140 local_irq_save(flags);
141 __disable_icache();
142
143 /* Just loop through cache size and invalidate, no need to add
144 CACHE_BASE address */
145 for (i = 0; i < cpuinfo.icache_size;
146 i += cpuinfo.icache_line)
147 __invalidate_icache(i);
148
149 __enable_icache();
150 local_irq_restore(flags);
151 }
152}
153
154void __invalidate_icache_range(unsigned long start, unsigned long end)
155{
156 unsigned int i;
157 unsigned flags;
158 unsigned int align;
159
160 if (cpuinfo.use_icache) {
161 /*
162 * No need to cover entire cache range,
163 * just cover cache footprint
164 */
165 end = min(start + cpuinfo.icache_size, end);
166 align = ~(cpuinfo.icache_line - 1);
167 start &= align; /* Make sure we are aligned */
168 /* Push end up to the next cache line */
169 end = ((end & align) + cpuinfo.icache_line);
170
171 local_irq_save(flags);
172 __disable_icache();
173
174 for (i = start; i < end; i += cpuinfo.icache_line)
175 __invalidate_icache(i);
176
177 __enable_icache();
178 local_irq_restore(flags);
179 }
180}
181
182void __invalidate_icache_page(struct vm_area_struct *vma, struct page *page)
183{
184 __invalidate_icache_all();
185}
186
187void __invalidate_icache_user_range(struct vm_area_struct *vma,
188 struct page *page, unsigned long adr,
189 int len)
190{
191 __invalidate_icache_all();
192}
193
194void __invalidate_cache_sigtramp(unsigned long addr)
195{
196 __invalidate_icache_range(addr, addr + 8);
197}
198
199void __invalidate_dcache_all(void)
200{
201 unsigned int i;
202 unsigned flags;
203
204 if (cpuinfo.use_dcache) {
205 local_irq_save(flags);
206 __disable_dcache();
207
208 /*
209 * Just loop through cache size and invalidate,
210 * no need to add CACHE_BASE address
211 */
212 for (i = 0; i < cpuinfo.dcache_size;
213 i += cpuinfo.dcache_line)
214 __invalidate_dcache(i);
215
216 __enable_dcache();
217 local_irq_restore(flags);
218 }
219}
220
221void __invalidate_dcache_range(unsigned long start, unsigned long end)
222{
223 unsigned int i;
224 unsigned flags;
225 unsigned int align;
226
227 if (cpuinfo.use_dcache) {
228 /*
229 * No need to cover entire cache range,
230 * just cover cache footprint
231 */
232 end = min(start + cpuinfo.dcache_size, end);
233 align = ~(cpuinfo.dcache_line - 1);
234 start &= align; /* Make sure we are aligned */
235 /* Push end up to the next cache line */
236 end = ((end & align) + cpuinfo.dcache_line);
237 local_irq_save(flags);
238 __disable_dcache();
239
240 for (i = start; i < end; i += cpuinfo.dcache_line)
241 __invalidate_dcache(i);
242
243 __enable_dcache();
244 local_irq_restore(flags);
245 }
246}
247
248void __invalidate_dcache_page(struct vm_area_struct *vma, struct page *page)
249{
250 __invalidate_dcache_all();
251}
252
253void __invalidate_dcache_user_range(struct vm_area_struct *vma,
254 struct page *page, unsigned long adr,
255 int len)
256{
257 __invalidate_dcache_all();
258}
diff --git a/arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c b/arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c
new file mode 100644
index 000000000000..cf7424a6bb87
--- /dev/null
+++ b/arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c
@@ -0,0 +1,101 @@
1/*
2 * Support for MicroBlaze PVR (processor version register)
3 *
4 * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
5 * Copyright (C) 2007-2009 PetaLogix
6 * Copyright (C) 2007 John Williams <john.williams@petalogix.com>
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12
13#include <linux/init.h>
14#include <linux/string.h>
15#include <asm/pvr.h>
16#include <asm/cpuinfo.h>
17
18/*
19 * Helper macro to map between fields in our struct cpuinfo, and
20 * the PVR macros in pvr.h.
21 */
22
23#define CI(c, p) { ci->c = PVR_##p(pvr); }
24#define err_printk(x) \
25 early_printk("ERROR: Microblaze " x " - different for PVR and DTS\n");
26
27void set_cpuinfo_pvr_full(struct cpuinfo *ci, struct device_node *cpu)
28{
29 struct pvr_s pvr;
30 int temp; /* for saving temp value */
31 get_pvr(&pvr);
32
33 temp = PVR_USE_BARREL(pvr) | PVR_USE_MSR_INSTR(pvr) |\
34 PVR_USE_PCMP_INSTR(pvr) | PVR_USE_DIV(pvr);
35 if (ci->use_instr != temp)
36 err_printk("BARREL, MSR, PCMP or DIV");
37 ci->use_instr = temp;
38
39 temp = PVR_USE_HW_MUL(pvr) | PVR_USE_MUL64(pvr);
40 if (ci->use_mult != temp)
41 err_printk("HW_MUL");
42 ci->use_mult = temp;
43
44 temp = PVR_USE_FPU(pvr) | PVR_USE_FPU2(pvr);
45 if (ci->use_fpu != temp)
46 err_printk("HW_FPU");
47 ci->use_fpu = temp;
48
49 ci->use_exc = PVR_OPCODE_0x0_ILLEGAL(pvr) |\
50 PVR_UNALIGNED_EXCEPTION(pvr) |\
51 PVR_ILL_OPCODE_EXCEPTION(pvr) |\
52 PVR_IOPB_BUS_EXCEPTION(pvr) |\
53 PVR_DOPB_BUS_EXCEPTION(pvr) |\
54 PVR_DIV_ZERO_EXCEPTION(pvr) |\
55 PVR_FPU_EXCEPTION(pvr) |\
56 PVR_FSL_EXCEPTION(pvr);
57
58 CI(pvr_user1, USER1);
59 CI(pvr_user2, USER2);
60
61 CI(mmu, USE_MMU);
62
63 CI(ver_code, VERSION);
64
65 CI(use_icache, USE_ICACHE);
66 CI(icache_tagbits, ICACHE_ADDR_TAG_BITS);
67 CI(icache_write, ICACHE_ALLOW_WR);
68 CI(icache_line, ICACHE_LINE_LEN);
69 CI(icache_size, ICACHE_BYTE_SIZE);
70 CI(icache_base, ICACHE_BASEADDR);
71 CI(icache_high, ICACHE_HIGHADDR);
72
73 CI(use_dcache, USE_DCACHE);
74 CI(dcache_tagbits, DCACHE_ADDR_TAG_BITS);
75 CI(dcache_write, DCACHE_ALLOW_WR);
76 CI(dcache_line, DCACHE_LINE_LEN);
77 CI(dcache_size, DCACHE_BYTE_SIZE);
78 CI(dcache_base, DCACHE_BASEADDR);
79 CI(dcache_high, DCACHE_HIGHADDR);
80
81 CI(use_dopb, D_OPB);
82 CI(use_iopb, I_OPB);
83 CI(use_dlmb, D_LMB);
84 CI(use_ilmb, I_LMB);
85 CI(num_fsl, FSL_LINKS);
86
87 CI(irq_edge, INTERRUPT_IS_EDGE);
88 CI(irq_positive, EDGE_IS_POSITIVE);
89
90 CI(area_optimised, AREA_OPTIMISED);
91
92 CI(hw_debug, DEBUG_ENABLED);
93 CI(num_pc_brk, NUMBER_OF_PC_BRK);
94 CI(num_rd_brk, NUMBER_OF_RD_ADDR_BRK);
95 CI(num_wr_brk, NUMBER_OF_WR_ADDR_BRK);
96
97 CI(fpga_family_code, TARGET_FAMILY);
98
99 /* take timebase-frequency from DTS */
100 ci->cpu_clock_freq = fcpu(cpu, "timebase-frequency");
101}
diff --git a/arch/microblaze/kernel/cpu/cpuinfo-static.c b/arch/microblaze/kernel/cpu/cpuinfo-static.c
new file mode 100644
index 000000000000..cfe44effdb77
--- /dev/null
+++ b/arch/microblaze/kernel/cpu/cpuinfo-static.c
@@ -0,0 +1,144 @@
1/*
2 * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
3 * Copyright (C) 2007-2009 PetaLogix
4 * Copyright (C) 2007 John Williams <john.williams@petalogix.com>
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/string.h>
14#include <asm/cpuinfo.h>
15#include <asm/pvr.h>
16
17const static char family_string[] = CONFIG_XILINX_MICROBLAZE0_FAMILY;
18const static char cpu_ver_string[] = CONFIG_XILINX_MICROBLAZE0_HW_VER;
19
20#define err_printk(x) \
21 early_printk("ERROR: Microblaze " x "- different for kernel and DTS\n");
22
23void __init set_cpuinfo_static(struct cpuinfo *ci, struct device_node *cpu)
24{
25 int i = 0;
26
27 ci->use_instr =
28 (fcpu(cpu, "xlnx,use-barrel") ? PVR0_USE_BARREL_MASK : 0) |
29 (fcpu(cpu, "xlnx,use-msr-instr") ? PVR2_USE_MSR_INSTR : 0) |
30 (fcpu(cpu, "xlnx,use-pcmp-instr") ? PVR2_USE_PCMP_INSTR : 0) |
31 (fcpu(cpu, "xlnx,use-div") ? PVR0_USE_DIV_MASK : 0);
32 if (CONFIG_XILINX_MICROBLAZE0_USE_BARREL)
33 i |= PVR0_USE_BARREL_MASK;
34 if (CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR)
35 i |= PVR2_USE_MSR_INSTR;
36 if (CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR)
37 i |= PVR2_USE_PCMP_INSTR;
38 if (CONFIG_XILINX_MICROBLAZE0_USE_DIV)
39 i |= PVR0_USE_DIV_MASK;
40 if (ci->use_instr != i)
41 err_printk("BARREL, MSR, PCMP or DIV");
42
43 ci->use_mult = fcpu(cpu, "xlnx,use-hw-mul");
44 if (ci->use_mult != CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL)
45 err_printk("HW_MUL");
46 ci->use_mult =
47 (ci->use_mult > 1 ?
48 (PVR2_USE_MUL64_MASK | PVR0_USE_HW_MUL_MASK) :
49 (ci->use_mult == 1 ? PVR0_USE_HW_MUL_MASK : 0));
50
51 ci->use_fpu = fcpu(cpu, "xlnx,use-fpu");
52 if (ci->use_fpu != CONFIG_XILINX_MICROBLAZE0_USE_FPU)
53 err_printk("HW_FPU");
54 ci->use_fpu = (ci->use_fpu > 1 ?
55 (PVR2_USE_FPU2_MASK | PVR0_USE_FPU_MASK) :
56 (ci->use_fpu == 1 ? PVR0_USE_FPU_MASK : 0));
57
58 ci->use_exc =
59 (fcpu(cpu, "xlnx,unaligned-exceptions") ?
60 PVR2_UNALIGNED_EXC_MASK : 0) |
61 (fcpu(cpu, "xlnx,ill-opcode-exception") ?
62 PVR2_ILL_OPCODE_EXC_MASK : 0) |
63 (fcpu(cpu, "xlnx,iopb-bus-exception") ?
64 PVR2_IOPB_BUS_EXC_MASK : 0) |
65 (fcpu(cpu, "xlnx,dopb-bus-exception") ?
66 PVR2_DOPB_BUS_EXC_MASK : 0) |
67 (fcpu(cpu, "xlnx,div-zero-exception") ?
68 PVR2_DIV_ZERO_EXC_MASK : 0) |
69 (fcpu(cpu, "xlnx,fpu-exception") ? PVR2_FPU_EXC_MASK : 0) |
70 (fcpu(cpu, "xlnx,fsl-exception") ? PVR2_USE_EXTEND_FSL : 0);
71
72 ci->use_icache = fcpu(cpu, "xlnx,use-icache");
73 ci->icache_tagbits = fcpu(cpu, "xlnx,addr-tag-bits");
74 ci->icache_write = fcpu(cpu, "xlnx,allow-icache-wr");
75 ci->icache_line = fcpu(cpu, "xlnx,icache-line-len") << 2;
76 if (!ci->icache_line) {
77 if (fcpu(cpu, "xlnx,icache-use-fsl"))
78 ci->icache_line = 4 << 2;
79 else
80 ci->icache_line = 1 << 2;
81 }
82 ci->icache_size = fcpu(cpu, "i-cache-size");
83 ci->icache_base = fcpu(cpu, "i-cache-baseaddr");
84 ci->icache_high = fcpu(cpu, "i-cache-highaddr");
85
86 ci->use_dcache = fcpu(cpu, "xlnx,use-dcache");
87 ci->dcache_tagbits = fcpu(cpu, "xlnx,dcache-addr-tag");
88 ci->dcache_write = fcpu(cpu, "xlnx,allow-dcache-wr");
89 ci->dcache_line = fcpu(cpu, "xlnx,dcache-line-len") << 2;
90 if (!ci->dcache_line) {
91 if (fcpu(cpu, "xlnx,dcache-use-fsl"))
92 ci->dcache_line = 4 << 2;
93 else
94 ci->dcache_line = 1 << 2;
95 }
96 ci->dcache_size = fcpu(cpu, "d-cache-size");
97 ci->dcache_base = fcpu(cpu, "d-cache-baseaddr");
98 ci->dcache_high = fcpu(cpu, "d-cache-highaddr");
99
100 ci->use_dopb = fcpu(cpu, "xlnx,d-opb");
101 ci->use_iopb = fcpu(cpu, "xlnx,i-opb");
102 ci->use_dlmb = fcpu(cpu, "xlnx,d-lmb");
103 ci->use_ilmb = fcpu(cpu, "xlnx,i-lmb");
104
105 ci->num_fsl = fcpu(cpu, "xlnx,fsl-links");
106 ci->irq_edge = fcpu(cpu, "xlnx,interrupt-is-edge");
107 ci->irq_positive = fcpu(cpu, "xlnx,edge-is-positive");
108 ci->area_optimised = 0;
109
110 ci->hw_debug = fcpu(cpu, "xlnx,debug-enabled");
111 ci->num_pc_brk = fcpu(cpu, "xlnx,number-of-pc-brk");
112 ci->num_rd_brk = fcpu(cpu, "xlnx,number-of-rd-addr-brk");
113 ci->num_wr_brk = fcpu(cpu, "xlnx,number-of-wr-addr-brk");
114
115 ci->cpu_clock_freq = fcpu(cpu, "timebase-frequency");
116
117 ci->pvr_user1 = fcpu(cpu, "xlnx,pvr-user1");
118 ci->pvr_user2 = fcpu(cpu, "xlnx,pvr-user2");
119
120 ci->mmu = fcpu(cpu, "xlnx,use-mmu");
121
122 ci->ver_code = 0;
123 ci->fpga_family_code = 0;
124
125 /* Do various fixups based on CPU version and FPGA family strings */
126
127 /* Resolved the CPU version code */
128 for (i = 0; cpu_ver_lookup[i].s != NULL; i++) {
129 if (strcmp(cpu_ver_lookup[i].s, cpu_ver_string) == 0)
130 ci->ver_code = cpu_ver_lookup[i].k;
131 }
132
133 /* Resolved the fpga family code */
134 for (i = 0; family_string_lookup[i].s != NULL; i++) {
135 if (strcmp(family_string_lookup[i].s, family_string) == 0)
136 ci->fpga_family_code = family_string_lookup[i].k;
137 }
138
139 /* FIXME - mb3 and spartan2 do not exist in PVR */
140 /* This is mb3 and on a non Spartan2 */
141 if (ci->ver_code == 0x20 && ci->fpga_family_code != 0xf0)
142 /* Hardware Multiplier in use */
143 ci->use_mult = 1;
144}
diff --git a/arch/microblaze/kernel/cpu/cpuinfo.c b/arch/microblaze/kernel/cpu/cpuinfo.c
new file mode 100644
index 000000000000..4a740dfcf6da
--- /dev/null
+++ b/arch/microblaze/kernel/cpu/cpuinfo.c
@@ -0,0 +1,86 @@
1/*
2 * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
3 * Copyright (C) 2007-2009 PetaLogix
4 * Copyright (C) 2007 John Williams <john.williams@petalogix.com>
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/init.h>
12#include <linux/slab.h>
13#include <asm/cpuinfo.h>
14#include <asm/pvr.h>
15
16const struct cpu_ver_key cpu_ver_lookup[] = {
17 /* These key value are as per MBV field in PVR0 */
18 {"5.00.a", 0x01},
19 {"5.00.b", 0x02},
20 {"5.00.c", 0x03},
21 {"6.00.a", 0x04},
22 {"6.00.b", 0x06},
23 {"7.00.a", 0x05},
24 {"7.00.b", 0x07},
25 {"7.10.a", 0x08},
26 {"7.10.b", 0x09},
27 {"7.10.c", 0x0a},
28 {"7.10.d", 0x0b},
29 /* FIXME There is no keycode defined in MBV for these versions */
30 {"2.10.a", 0x10},
31 {"3.00.a", 0x20},
32 {"4.00.a", 0x30},
33 {"4.00.b", 0x40},
34 {NULL, 0},
35};
36
37/*
38 * FIXME Not sure if the actual key is defined by Xilinx in the PVR
39 */
40const struct family_string_key family_string_lookup[] = {
41 {"virtex2", 0x4},
42 {"virtex2pro", 0x5},
43 {"spartan3", 0x6},
44 {"virtex4", 0x7},
45 {"virtex5", 0x8},
46 {"spartan3e", 0x9},
47 {"spartan3a", 0xa},
48 {"spartan3an", 0xb},
49 {"spartan3adsp", 0xc},
50 /* FIXME There is no key code defined for spartan2 */
51 {"spartan2", 0xf0},
52 {NULL, 0},
53};
54
55struct cpuinfo cpuinfo;
56
57void __init setup_cpuinfo(void)
58{
59 struct device_node *cpu = NULL;
60
61 cpu = (struct device_node *) of_find_node_by_type(NULL, "cpu");
62 if (!cpu)
63 printk(KERN_ERR "You don't have cpu!!!\n");
64
65 printk(KERN_INFO "%s: initialising\n", __func__);
66
67 switch (cpu_has_pvr()) {
68 case 0:
69 printk(KERN_WARNING
70 "%s: No PVR support. Using static CPU info from FDT\n",
71 __func__);
72 set_cpuinfo_static(&cpuinfo, cpu);
73 break;
74/* FIXME I found weird behavior with MB 7.00.a/b
75 * please do not use FULL PVR with MMU */
76 case 1:
77 printk(KERN_INFO "%s: Using full CPU PVR support\n",
78 __func__);
79 set_cpuinfo_static(&cpuinfo, cpu);
80 set_cpuinfo_pvr_full(&cpuinfo, cpu);
81 break;
82 default:
83 printk(KERN_WARNING "%s: Unsupported PVR setting\n", __func__);
84 set_cpuinfo_static(&cpuinfo, cpu);
85 }
86}
diff --git a/arch/microblaze/kernel/cpu/mb.c b/arch/microblaze/kernel/cpu/mb.c
new file mode 100644
index 000000000000..3b6212bdc8dc
--- /dev/null
+++ b/arch/microblaze/kernel/cpu/mb.c
@@ -0,0 +1,148 @@
1/*
2 * CPU-version specific code
3 *
4 * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
5 * Copyright (C) 2006-2009 PetaLogix
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11
12#include <linux/init.h>
13#include <linux/string.h>
14#include <linux/seq_file.h>
15#include <linux/cpu.h>
16#include <linux/initrd.h>
17
18#include <linux/bug.h>
19#include <asm/cpuinfo.h>
20#include <linux/delay.h>
21#include <linux/io.h>
22#include <asm/page.h>
23#include <linux/param.h>
24#include <asm/pvr.h>
25#include <asm/sections.h>
26#include <asm/setup.h>
27
28static int show_cpuinfo(struct seq_file *m, void *v)
29{
30 int count = 0;
31 char *fpga_family = "Unknown";
32 char *cpu_ver = "Unknown";
33 int i;
34
35 /* Denormalised to get the fpga family string */
36 for (i = 0; family_string_lookup[i].s != NULL; i++) {
37 if (cpuinfo.fpga_family_code == family_string_lookup[i].k) {
38 fpga_family = (char *)family_string_lookup[i].s;
39 break;
40 }
41 }
42
43 /* Denormalised to get the hw version string */
44 for (i = 0; cpu_ver_lookup[i].s != NULL; i++) {
45 if (cpuinfo.ver_code == cpu_ver_lookup[i].k) {
46 cpu_ver = (char *)cpu_ver_lookup[i].s;
47 break;
48 }
49 }
50
51 count = seq_printf(m,
52 "CPU-Family: MicroBlaze\n"
53 "FPGA-Arch: %s\n"
54 "CPU-Ver: %s\n"
55 "CPU-MHz: %d.%02d\n"
56 "BogoMips: %lu.%02lu\n",
57 fpga_family,
58 cpu_ver,
59 cpuinfo.cpu_clock_freq /
60 1000000,
61 cpuinfo.cpu_clock_freq %
62 1000000,
63 loops_per_jiffy / (500000 / HZ),
64 (loops_per_jiffy / (5000 / HZ)) % 100);
65
66 count += seq_printf(m,
67 "HW:\n Shift:\t\t%s\n"
68 " MSR:\t\t%s\n"
69 " PCMP:\t\t%s\n"
70 " DIV:\t\t%s\n",
71 (cpuinfo.use_instr & PVR0_USE_BARREL_MASK) ? "yes" : "no",
72 (cpuinfo.use_instr & PVR2_USE_MSR_INSTR) ? "yes" : "no",
73 (cpuinfo.use_instr & PVR2_USE_PCMP_INSTR) ? "yes" : "no",
74 (cpuinfo.use_instr & PVR0_USE_DIV_MASK) ? "yes" : "no");
75
76 count += seq_printf(m,
77 " MMU:\t\t%x\n",
78 cpuinfo.mmu);
79
80 count += seq_printf(m,
81 " MUL:\t\t%s\n"
82 " FPU:\t\t%s\n",
83 (cpuinfo.use_mult & PVR2_USE_MUL64_MASK) ? "v2" :
84 (cpuinfo.use_mult & PVR0_USE_HW_MUL_MASK) ? "v1" : "no",
85 (cpuinfo.use_fpu & PVR2_USE_FPU2_MASK) ? "v2" :
86 (cpuinfo.use_fpu & PVR0_USE_FPU_MASK) ? "v1" : "no");
87
88 count += seq_printf(m,
89 " Exc:\t\t%s%s%s%s%s%s%s%s\n",
90 (cpuinfo.use_exc & PVR2_OPCODE_0x0_ILL_MASK) ? "op0x0 " : "",
91 (cpuinfo.use_exc & PVR2_UNALIGNED_EXC_MASK) ? "unal " : "",
92 (cpuinfo.use_exc & PVR2_ILL_OPCODE_EXC_MASK) ? "ill " : "",
93 (cpuinfo.use_exc & PVR2_IOPB_BUS_EXC_MASK) ? "iopb " : "",
94 (cpuinfo.use_exc & PVR2_DOPB_BUS_EXC_MASK) ? "dopb " : "",
95 (cpuinfo.use_exc & PVR2_DIV_ZERO_EXC_MASK) ? "zero " : "",
96 (cpuinfo.use_exc & PVR2_FPU_EXC_MASK) ? "fpu " : "",
97 (cpuinfo.use_exc & PVR2_USE_FSL_EXC) ? "fsl " : "");
98
99 if (cpuinfo.use_icache)
100 count += seq_printf(m,
101 "Icache:\t\t%ukB\n",
102 cpuinfo.icache_size >> 10);
103 else
104 count += seq_printf(m, "Icache:\t\tno\n");
105
106 if (cpuinfo.use_dcache)
107 count += seq_printf(m,
108 "Dcache:\t\t%ukB\n",
109 cpuinfo.dcache_size >> 10);
110 else
111 count += seq_printf(m, "Dcache:\t\tno\n");
112
113 count += seq_printf(m,
114 "HW-Debug:\t%s\n",
115 cpuinfo.hw_debug ? "yes" : "no");
116
117 count += seq_printf(m,
118 "PVR-USR1:\t%x\n"
119 "PVR-USR2:\t%x\n",
120 cpuinfo.pvr_user1,
121 cpuinfo.pvr_user2);
122
123 return 0;
124}
125
126static void *c_start(struct seq_file *m, loff_t *pos)
127{
128 int i = *pos;
129
130 return i < NR_CPUS ? (void *) (i + 1) : NULL;
131}
132
133static void *c_next(struct seq_file *m, void *v, loff_t *pos)
134{
135 ++*pos;
136 return c_start(m, pos);
137}
138
139static void c_stop(struct seq_file *m, void *v)
140{
141}
142
143const struct seq_operations cpuinfo_op = {
144 .start = c_start,
145 .next = c_next,
146 .stop = c_stop,
147 .show = show_cpuinfo,
148};
diff --git a/arch/microblaze/kernel/cpu/pvr.c b/arch/microblaze/kernel/cpu/pvr.c
new file mode 100644
index 000000000000..c9a4340ddd53
--- /dev/null
+++ b/arch/microblaze/kernel/cpu/pvr.c
@@ -0,0 +1,81 @@
1/*
2 * Support for MicroBlaze PVR (processor version register)
3 *
4 * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
5 * Copyright (C) 2007-2009 PetaLogix
6 * Copyright (C) 2007 John Williams <john.williams@petalogix.com>
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12
13#include <linux/kernel.h>
14#include <linux/compiler.h>
15#include <asm/system.h>
16#include <asm/exceptions.h>
17#include <asm/pvr.h>
18
19/*
20 * Until we get an assembler that knows about the pvr registers,
21 * this horrible cruft will have to do.
22 * That hardcoded opcode is mfs r3, rpvrNN
23 */
24
25#define get_single_pvr(pvrid, val) \
26{ \
27 register unsigned tmp __asm__("r3"); \
28 tmp = 0x0; /* Prevent warning about unused */ \
29 __asm__ __volatile__ ( \
30 ".byte 0x94,0x60,0xa0, " #pvrid "\n\t" \
31 : "=r" (tmp) : : "memory"); \
32 val = tmp; \
33}
34
35/*
36 * Does the CPU support the PVR register?
37 * return value:
38 * 0: no PVR
39 * 1: simple PVR
40 * 2: full PVR
41 *
42 * This must work on all CPU versions, including those before the
43 * PVR was even an option.
44 */
45
46int cpu_has_pvr(void)
47{
48 unsigned flags;
49 unsigned pvr0;
50
51 local_save_flags(flags);
52
53 /* PVR bit in MSR tells us if there is any support */
54 if (!(flags & PVR_MSR_BIT))
55 return 0;
56
57 get_single_pvr(0x00, pvr0);
58 pr_debug("%s: pvr0 is 0x%08x\n", __func__, pvr0);
59
60 if (pvr0 & PVR0_PVR_FULL_MASK)
61 return 1;
62
63 /* for partial PVR use static cpuinfo */
64 return 2;
65}
66
67void get_pvr(struct pvr_s *p)
68{
69 get_single_pvr(0, p->pvr[0]);
70 get_single_pvr(1, p->pvr[1]);
71 get_single_pvr(2, p->pvr[2]);
72 get_single_pvr(3, p->pvr[3]);
73 get_single_pvr(4, p->pvr[4]);
74 get_single_pvr(5, p->pvr[5]);
75 get_single_pvr(6, p->pvr[6]);
76 get_single_pvr(7, p->pvr[7]);
77 get_single_pvr(8, p->pvr[8]);
78 get_single_pvr(9, p->pvr[9]);
79 get_single_pvr(10, p->pvr[10]);
80 get_single_pvr(11, p->pvr[11]);
81}
diff --git a/arch/microblaze/kernel/early_printk.c b/arch/microblaze/kernel/early_printk.c
new file mode 100644
index 000000000000..62cc78993f44
--- /dev/null
+++ b/arch/microblaze/kernel/early_printk.c
@@ -0,0 +1,107 @@
1/*
2 * Early printk support for Microblaze.
3 *
4 * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
5 * Copyright (C) 2007-2009 PetaLogix
6 * Copyright (C) 2003-2006 Yasushi SHOJI <yashi@atmark-techno.com>
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12
13#include <linux/console.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/string.h>
17#include <linux/tty.h>
18#include <linux/io.h>
19#include <asm/processor.h>
20#include <linux/fcntl.h>
21#include <asm/setup.h>
22#include <asm/prom.h>
23
24static u32 early_console_initialized;
25static u32 base_addr;
26
27static void early_printk_putc(char c)
28{
29 /*
30 * Limit how many times we'll spin waiting for TX FIFO status.
31 * This will prevent lockups if the base address is incorrectly
32 * set, or any other issue on the UARTLITE.
33 * This limit is pretty arbitrary, unless we are at about 10 baud
34 * we'll never timeout on a working UART.
35 */
36
37 unsigned retries = 10000;
38 /* read status bit - 0x8 offset */
39 while (retries-- && (in_be32(base_addr + 8) & (1 << 3)))
40 ;
41
42 /* Only attempt the iowrite if we didn't timeout */
43 /* write to TX_FIFO - 0x4 offset */
44 if (retries)
45 out_be32(base_addr + 4, c & 0xff);
46}
47
48static void early_printk_write(struct console *unused,
49 const char *s, unsigned n)
50{
51 while (*s && n-- > 0) {
52 early_printk_putc(*s);
53 if (*s == '\n')
54 early_printk_putc('\r');
55 s++;
56 }
57}
58
59static struct console early_serial_console = {
60 .name = "earlyser",
61 .write = early_printk_write,
62 .flags = CON_PRINTBUFFER,
63 .index = -1,
64};
65
66static struct console *early_console = &early_serial_console;
67
68void early_printk(const char *fmt, ...)
69{
70 char buf[512];
71 int n;
72 va_list ap;
73
74 if (early_console_initialized) {
75 va_start(ap, fmt);
76 n = vscnprintf(buf, 512, fmt, ap);
77 early_console->write(early_console, buf, n);
78 va_end(ap);
79 }
80}
81
82int __init setup_early_printk(char *opt)
83{
84 if (early_console_initialized)
85 return 1;
86
87 base_addr = early_uartlite_console();
88 if (base_addr) {
89 early_console_initialized = 1;
90 early_printk("early_printk_console is enabled at 0x%08x\n",
91 base_addr);
92
93 /* register_console(early_console); */
94
95 return 0;
96 } else
97 return 1;
98}
99
100void __init disable_early_printk(void)
101{
102 if (!early_console_initialized || !early_console)
103 return;
104 printk(KERN_WARNING "disabling early console\n");
105 unregister_console(early_console);
106 early_console_initialized = 0;
107}
diff --git a/arch/microblaze/kernel/entry-nommu.S b/arch/microblaze/kernel/entry-nommu.S
new file mode 100644
index 000000000000..f24b1268baaf
--- /dev/null
+++ b/arch/microblaze/kernel/entry-nommu.S
@@ -0,0 +1,596 @@
1/*
2 * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
3 * Copyright (C) 2007-2009 PetaLogix
4 * Copyright (C) 2006 Atmark Techno, Inc.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/linkage.h>
12#include <asm/thread_info.h>
13#include <asm/errno.h>
14#include <asm/entry.h>
15#include <asm/asm-offsets.h>
16#include <asm/registers.h>
17#include <asm/unistd.h>
18#include <asm/percpu.h>
19#include <asm/signal.h>
20
21#if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
22 .macro disable_irq
23 msrclr r0, MSR_IE
24 .endm
25
26 .macro enable_irq
27 msrset r0, MSR_IE
28 .endm
29
30 .macro clear_bip
31 msrclr r0, MSR_BIP
32 .endm
33#else
34 .macro disable_irq
35 mfs r11, rmsr
36 andi r11, r11, ~MSR_IE
37 mts rmsr, r11
38 .endm
39
40 .macro enable_irq
41 mfs r11, rmsr
42 ori r11, r11, MSR_IE
43 mts rmsr, r11
44 .endm
45
46 .macro clear_bip
47 mfs r11, rmsr
48 andi r11, r11, ~MSR_BIP
49 mts rmsr, r11
50 .endm
51#endif
52
53ENTRY(_interrupt)
54 swi r1, r0, PER_CPU(ENTRY_SP) /* save the current sp */
55 swi r11, r0, PER_CPU(R11_SAVE) /* temporarily save r11 */
56 lwi r11, r0, PER_CPU(KM) /* load mode indicator */
57 beqid r11, 1f
58 nop
59 brid 2f /* jump over */
60 addik r1, r1, (-PT_SIZE) /* room for pt_regs (delay slot) */
611: /* switch to kernel stack */
62 lwi r1, r0, PER_CPU(CURRENT_SAVE) /* get the saved current */
63 lwi r1, r1, TS_THREAD_INFO /* get the thread info */
64 /* calculate kernel stack pointer */
65 addik r1, r1, THREAD_SIZE - PT_SIZE
662:
67 swi r11, r1, PT_MODE /* store the mode */
68 lwi r11, r0, PER_CPU(R11_SAVE) /* reload r11 */
69 swi r2, r1, PT_R2
70 swi r3, r1, PT_R3
71 swi r4, r1, PT_R4
72 swi r5, r1, PT_R5
73 swi r6, r1, PT_R6
74 swi r7, r1, PT_R7
75 swi r8, r1, PT_R8
76 swi r9, r1, PT_R9
77 swi r10, r1, PT_R10
78 swi r11, r1, PT_R11
79 swi r12, r1, PT_R12
80 swi r13, r1, PT_R13
81 swi r14, r1, PT_R14
82 swi r14, r1, PT_PC
83 swi r15, r1, PT_R15
84 swi r16, r1, PT_R16
85 swi r17, r1, PT_R17
86 swi r18, r1, PT_R18
87 swi r19, r1, PT_R19
88 swi r20, r1, PT_R20
89 swi r21, r1, PT_R21
90 swi r22, r1, PT_R22
91 swi r23, r1, PT_R23
92 swi r24, r1, PT_R24
93 swi r25, r1, PT_R25
94 swi r26, r1, PT_R26
95 swi r27, r1, PT_R27
96 swi r28, r1, PT_R28
97 swi r29, r1, PT_R29
98 swi r30, r1, PT_R30
99 swi r31, r1, PT_R31
100 /* special purpose registers */
101 mfs r11, rmsr
102 swi r11, r1, PT_MSR
103 mfs r11, rear
104 swi r11, r1, PT_EAR
105 mfs r11, resr
106 swi r11, r1, PT_ESR
107 mfs r11, rfsr
108 swi r11, r1, PT_FSR
109 /* reload original stack pointer and save it */
110 lwi r11, r0, PER_CPU(ENTRY_SP)
111 swi r11, r1, PT_R1
112 /* update mode indicator we are in kernel mode */
113 addik r11, r0, 1
114 swi r11, r0, PER_CPU(KM)
115 /* restore r31 */
116 lwi r31, r0, PER_CPU(CURRENT_SAVE)
117 /* prepare the link register, the argument and jump */
118 la r15, r0, ret_from_intr - 8
119 addk r6, r0, r15
120 braid do_IRQ
121 add r5, r0, r1
122
123ret_from_intr:
124 lwi r11, r1, PT_MODE
125 bneid r11, 3f
126
127 lwi r6, r31, TS_THREAD_INFO /* get thread info */
128 lwi r19, r6, TI_FLAGS /* get flags in thread info */
129 /* do an extra work if any bits are set */
130
131 andi r11, r19, _TIF_NEED_RESCHED
132 beqi r11, 1f
133 bralid r15, schedule
134 nop
1351: andi r11, r19, _TIF_SIGPENDING
136 beqid r11, no_intr_reshed
137 addk r5, r1, r0
138 addk r7, r0, r0
139 bralid r15, do_signal
140 addk r6, r0, r0
141
142no_intr_reshed:
143 /* save mode indicator */
144 lwi r11, r1, PT_MODE
1453:
146 swi r11, r0, PER_CPU(KM)
147
148 /* save r31 */
149 swi r31, r0, PER_CPU(CURRENT_SAVE)
150restore_context:
151 /* special purpose registers */
152 lwi r11, r1, PT_FSR
153 mts rfsr, r11
154 lwi r11, r1, PT_ESR
155 mts resr, r11
156 lwi r11, r1, PT_EAR
157 mts rear, r11
158 lwi r11, r1, PT_MSR
159 mts rmsr, r11
160
161 lwi r31, r1, PT_R31
162 lwi r30, r1, PT_R30
163 lwi r29, r1, PT_R29
164 lwi r28, r1, PT_R28
165 lwi r27, r1, PT_R27
166 lwi r26, r1, PT_R26
167 lwi r25, r1, PT_R25
168 lwi r24, r1, PT_R24
169 lwi r23, r1, PT_R23
170 lwi r22, r1, PT_R22
171 lwi r21, r1, PT_R21
172 lwi r20, r1, PT_R20
173 lwi r19, r1, PT_R19
174 lwi r18, r1, PT_R18
175 lwi r17, r1, PT_R17
176 lwi r16, r1, PT_R16
177 lwi r15, r1, PT_R15
178 lwi r14, r1, PT_PC
179 lwi r13, r1, PT_R13
180 lwi r12, r1, PT_R12
181 lwi r11, r1, PT_R11
182 lwi r10, r1, PT_R10
183 lwi r9, r1, PT_R9
184 lwi r8, r1, PT_R8
185 lwi r7, r1, PT_R7
186 lwi r6, r1, PT_R6
187 lwi r5, r1, PT_R5
188 lwi r4, r1, PT_R4
189 lwi r3, r1, PT_R3
190 lwi r2, r1, PT_R2
191 lwi r1, r1, PT_R1
192 rtid r14, 0
193 nop
194
195ENTRY(_reset)
196 brai 0;
197
198ENTRY(_user_exception)
199 swi r1, r0, PER_CPU(ENTRY_SP) /* save the current sp */
200 swi r11, r0, PER_CPU(R11_SAVE) /* temporarily save r11 */
201 lwi r11, r0, PER_CPU(KM) /* load mode indicator */
202 beqid r11, 1f /* Already in kernel mode? */
203 nop
204 brid 2f /* jump over */
205 addik r1, r1, (-PT_SIZE) /* Room for pt_regs (delay slot) */
2061: /* Switch to kernel stack */
207 lwi r1, r0, PER_CPU(CURRENT_SAVE) /* get the saved current */
208 lwi r1, r1, TS_THREAD_INFO /* get the thread info */
209 /* calculate kernel stack pointer */
210 addik r1, r1, THREAD_SIZE - PT_SIZE
211 swi r11, r0, PER_CPU(R11_SAVE) /* temporarily save r11 */
212 lwi r11, r0, PER_CPU(KM) /* load mode indicator */
2132:
214 swi r11, r1, PT_MODE /* store the mode */
215 lwi r11, r0, PER_CPU(R11_SAVE) /* reload r11 */
216 /* save them on stack */
217 swi r2, r1, PT_R2
218 swi r3, r1, PT_R3 /* r3: _always_ in clobber list; see unistd.h */
219 swi r4, r1, PT_R4 /* r4: _always_ in clobber list; see unistd.h */
220 swi r5, r1, PT_R5
221 swi r6, r1, PT_R6
222 swi r7, r1, PT_R7
223 swi r8, r1, PT_R8
224 swi r9, r1, PT_R9
225 swi r10, r1, PT_R10
226 swi r11, r1, PT_R11
227 /* r12: _always_ in clobber list; see unistd.h */
228 swi r12, r1, PT_R12
229 swi r13, r1, PT_R13
230 /* r14: _always_ in clobber list; see unistd.h */
231 swi r14, r1, PT_R14
232 /* but we want to return to the next inst. */
233 addik r14, r14, 0x4
234 swi r14, r1, PT_PC /* increment by 4 and store in pc */
235 swi r15, r1, PT_R15
236 swi r16, r1, PT_R16
237 swi r17, r1, PT_R17
238 swi r18, r1, PT_R18
239 swi r19, r1, PT_R19
240 swi r20, r1, PT_R20
241 swi r21, r1, PT_R21
242 swi r22, r1, PT_R22
243 swi r23, r1, PT_R23
244 swi r24, r1, PT_R24
245 swi r25, r1, PT_R25
246 swi r26, r1, PT_R26
247 swi r27, r1, PT_R27
248 swi r28, r1, PT_R28
249 swi r29, r1, PT_R29
250 swi r30, r1, PT_R30
251 swi r31, r1, PT_R31
252
253 disable_irq
254 nop /* make sure IE bit is in effect */
255 clear_bip /* once IE is in effect it is safe to clear BIP */
256 nop
257
258 /* special purpose registers */
259 mfs r11, rmsr
260 swi r11, r1, PT_MSR
261 mfs r11, rear
262 swi r11, r1, PT_EAR
263 mfs r11, resr
264 swi r11, r1, PT_ESR
265 mfs r11, rfsr
266 swi r11, r1, PT_FSR
267 /* reload original stack pointer and save it */
268 lwi r11, r0, PER_CPU(ENTRY_SP)
269 swi r11, r1, PT_R1
270 /* update mode indicator we are in kernel mode */
271 addik r11, r0, 1
272 swi r11, r0, PER_CPU(KM)
273 /* restore r31 */
274 lwi r31, r0, PER_CPU(CURRENT_SAVE)
275 /* re-enable interrupts now we are in kernel mode */
276 enable_irq
277
278 /* See if the system call number is valid. */
279 addi r11, r12, -__NR_syscalls
280 bgei r11, 1f /* return to user if not valid */
281 /* Figure out which function to use for this system call. */
282 /* Note Microblaze barrel shift is optional, so don't rely on it */
283 add r12, r12, r12 /* convert num -> ptr */
284 add r12, r12, r12
285 lwi r12, r12, sys_call_table /* Get function pointer */
286 la r15, r0, ret_to_user-8 /* set return address */
287 bra r12 /* Make the system call. */
288 bri 0 /* won't reach here */
2891:
290 brid ret_to_user /* jump to syscall epilogue */
291 addi r3, r0, -ENOSYS /* set errno in delay slot */
292
293/*
294 * Debug traps are like a system call, but entered via brki r14, 0x60
295 * All we need to do is send the SIGTRAP signal to current, ptrace and do_signal
296 * will handle the rest
297 */
298ENTRY(_debug_exception)
299 swi r1, r0, PER_CPU(ENTRY_SP) /* save the current sp */
300 lwi r1, r0, PER_CPU(CURRENT_SAVE) /* get the saved current */
301 lwi r1, r1, TS_THREAD_INFO /* get the thread info */
302 addik r1, r1, THREAD_SIZE - PT_SIZE /* get the kernel stack */
303 swi r11, r0, PER_CPU(R11_SAVE) /* temporarily save r11 */
304 lwi r11, r0, PER_CPU(KM) /* load mode indicator */
305//save_context:
306 swi r11, r1, PT_MODE /* store the mode */
307 lwi r11, r0, PER_CPU(R11_SAVE) /* reload r11 */
308 /* save them on stack */
309 swi r2, r1, PT_R2
310 swi r3, r1, PT_R3 /* r3: _always_ in clobber list; see unistd.h */
311 swi r4, r1, PT_R4 /* r4: _always_ in clobber list; see unistd.h */
312 swi r5, r1, PT_R5
313 swi r6, r1, PT_R6
314 swi r7, r1, PT_R7
315 swi r8, r1, PT_R8
316 swi r9, r1, PT_R9
317 swi r10, r1, PT_R10
318 swi r11, r1, PT_R11
319 /* r12: _always_ in clobber list; see unistd.h */
320 swi r12, r1, PT_R12
321 swi r13, r1, PT_R13
322 /* r14: _always_ in clobber list; see unistd.h */
323 swi r14, r1, PT_R14
324 swi r14, r1, PT_PC /* Will return to interrupted instruction */
325 swi r15, r1, PT_R15
326 swi r16, r1, PT_R16
327 swi r17, r1, PT_R17
328 swi r18, r1, PT_R18
329 swi r19, r1, PT_R19
330 swi r20, r1, PT_R20
331 swi r21, r1, PT_R21
332 swi r22, r1, PT_R22
333 swi r23, r1, PT_R23
334 swi r24, r1, PT_R24
335 swi r25, r1, PT_R25
336 swi r26, r1, PT_R26
337 swi r27, r1, PT_R27
338 swi r28, r1, PT_R28
339 swi r29, r1, PT_R29
340 swi r30, r1, PT_R30
341 swi r31, r1, PT_R31
342
343 disable_irq
344 nop /* make sure IE bit is in effect */
345 clear_bip /* once IE is in effect it is safe to clear BIP */
346 nop
347
348 /* special purpose registers */
349 mfs r11, rmsr
350 swi r11, r1, PT_MSR
351 mfs r11, rear
352 swi r11, r1, PT_EAR
353 mfs r11, resr
354 swi r11, r1, PT_ESR
355 mfs r11, rfsr
356 swi r11, r1, PT_FSR
357 /* reload original stack pointer and save it */
358 lwi r11, r0, PER_CPU(ENTRY_SP)
359 swi r11, r1, PT_R1
360 /* update mode indicator we are in kernel mode */
361 addik r11, r0, 1
362 swi r11, r0, PER_CPU(KM)
363 /* restore r31 */
364 lwi r31, r0, PER_CPU(CURRENT_SAVE)
365 /* re-enable interrupts now we are in kernel mode */
366 enable_irq
367
368 addi r5, r0, SIGTRAP /* sending the trap signal */
369 add r6, r0, r31 /* to current */
370 bralid r15, send_sig
371 add r7, r0, r0 /* 3rd param zero */
372
373 /* Restore r3/r4 to work around how ret_to_user works */
374 lwi r3, r1, PT_R3
375 lwi r4, r1, PT_R4
376 bri ret_to_user
377
378ENTRY(_break)
379 bri 0
380
381/* struct task_struct *_switch_to(struct thread_info *prev,
382 struct thread_info *next); */
383ENTRY(_switch_to)
384 /* prepare return value */
385 addk r3, r0, r31
386
387 /* save registers in cpu_context */
388 /* use r11 and r12, volatile registers, as temp register */
389 addik r11, r5, TI_CPU_CONTEXT
390 swi r1, r11, CC_R1
391 swi r2, r11, CC_R2
392 /* skip volatile registers.
393 * they are saved on stack when we jumped to _switch_to() */
394 /* dedicated registers */
395 swi r13, r11, CC_R13
396 swi r14, r11, CC_R14
397 swi r15, r11, CC_R15
398 swi r16, r11, CC_R16
399 swi r17, r11, CC_R17
400 swi r18, r11, CC_R18
401 /* save non-volatile registers */
402 swi r19, r11, CC_R19
403 swi r20, r11, CC_R20
404 swi r21, r11, CC_R21
405 swi r22, r11, CC_R22
406 swi r23, r11, CC_R23
407 swi r24, r11, CC_R24
408 swi r25, r11, CC_R25
409 swi r26, r11, CC_R26
410 swi r27, r11, CC_R27
411 swi r28, r11, CC_R28
412 swi r29, r11, CC_R29
413 swi r30, r11, CC_R30
414 /* special purpose registers */
415 mfs r12, rmsr
416 swi r12, r11, CC_MSR
417 mfs r12, rear
418 swi r12, r11, CC_EAR
419 mfs r12, resr
420 swi r12, r11, CC_ESR
421 mfs r12, rfsr
422 swi r12, r11, CC_FSR
423
424 /* update r31, the current */
425 lwi r31, r6, TI_TASK
426 swi r31, r0, PER_CPU(CURRENT_SAVE)
427
428 /* get new process' cpu context and restore */
429 addik r11, r6, TI_CPU_CONTEXT
430
431 /* special purpose registers */
432 lwi r12, r11, CC_FSR
433 mts rfsr, r12
434 lwi r12, r11, CC_ESR
435 mts resr, r12
436 lwi r12, r11, CC_EAR
437 mts rear, r12
438 lwi r12, r11, CC_MSR
439 mts rmsr, r12
440 /* non-volatile registers */
441 lwi r30, r11, CC_R30
442 lwi r29, r11, CC_R29
443 lwi r28, r11, CC_R28
444 lwi r27, r11, CC_R27
445 lwi r26, r11, CC_R26
446 lwi r25, r11, CC_R25
447 lwi r24, r11, CC_R24
448 lwi r23, r11, CC_R23
449 lwi r22, r11, CC_R22
450 lwi r21, r11, CC_R21
451 lwi r20, r11, CC_R20
452 lwi r19, r11, CC_R19
453 /* dedicated registers */
454 lwi r18, r11, CC_R18
455 lwi r17, r11, CC_R17
456 lwi r16, r11, CC_R16
457 lwi r15, r11, CC_R15
458 lwi r14, r11, CC_R14
459 lwi r13, r11, CC_R13
460 /* skip volatile registers */
461 lwi r2, r11, CC_R2
462 lwi r1, r11, CC_R1
463
464 rtsd r15, 8
465 nop
466
467ENTRY(ret_from_fork)
468 addk r5, r0, r3
469 addk r6, r0, r1
470 brlid r15, schedule_tail
471 nop
472 swi r31, r1, PT_R31 /* save r31 in user context. */
473 /* will soon be restored to r31 in ret_to_user */
474 addk r3, r0, r0
475 brid ret_to_user
476 nop
477
478work_pending:
479 andi r11, r19, _TIF_NEED_RESCHED
480 beqi r11, 1f
481 bralid r15, schedule
482 nop
4831: andi r11, r19, _TIF_SIGPENDING
484 beqi r11, no_work_pending
485 addk r5, r1, r0
486 addik r7, r0, 1
487 bralid r15, do_signal
488 addk r6, r0, r0
489 bri no_work_pending
490
491ENTRY(ret_to_user)
492 disable_irq
493
494 swi r4, r1, PT_R4 /* return val */
495 swi r3, r1, PT_R3 /* return val */
496
497 lwi r6, r31, TS_THREAD_INFO /* get thread info */
498 lwi r19, r6, TI_FLAGS /* get flags in thread info */
499 bnei r19, work_pending /* do an extra work if any bits are set */
500no_work_pending:
501 disable_irq
502
503 /* save r31 */
504 swi r31, r0, PER_CPU(CURRENT_SAVE)
505 /* save mode indicator */
506 lwi r18, r1, PT_MODE
507 swi r18, r0, PER_CPU(KM)
508//restore_context:
509 /* special purpose registers */
510 lwi r18, r1, PT_FSR
511 mts rfsr, r18
512 lwi r18, r1, PT_ESR
513 mts resr, r18
514 lwi r18, r1, PT_EAR
515 mts rear, r18
516 lwi r18, r1, PT_MSR
517 mts rmsr, r18
518
519 lwi r31, r1, PT_R31
520 lwi r30, r1, PT_R30
521 lwi r29, r1, PT_R29
522 lwi r28, r1, PT_R28
523 lwi r27, r1, PT_R27
524 lwi r26, r1, PT_R26
525 lwi r25, r1, PT_R25
526 lwi r24, r1, PT_R24
527 lwi r23, r1, PT_R23
528 lwi r22, r1, PT_R22
529 lwi r21, r1, PT_R21
530 lwi r20, r1, PT_R20
531 lwi r19, r1, PT_R19
532 lwi r18, r1, PT_R18
533 lwi r17, r1, PT_R17
534 lwi r16, r1, PT_R16
535 lwi r15, r1, PT_R15
536 lwi r14, r1, PT_PC
537 lwi r13, r1, PT_R13
538 lwi r12, r1, PT_R12
539 lwi r11, r1, PT_R11
540 lwi r10, r1, PT_R10
541 lwi r9, r1, PT_R9
542 lwi r8, r1, PT_R8
543 lwi r7, r1, PT_R7
544 lwi r6, r1, PT_R6
545 lwi r5, r1, PT_R5
546 lwi r4, r1, PT_R4 /* return val */
547 lwi r3, r1, PT_R3 /* return val */
548 lwi r2, r1, PT_R2
549 lwi r1, r1, PT_R1
550
551 rtid r14, 0
552 nop
553
554sys_vfork_wrapper:
555 brid sys_vfork
556 addk r5, r1, r0
557
558sys_clone_wrapper:
559 brid sys_clone
560 addk r7, r1, r0
561
562sys_execve_wrapper:
563 brid sys_execve
564 addk r8, r1, r0
565
566sys_sigreturn_wrapper:
567 brid sys_sigreturn
568 addk r5, r1, r0
569
570sys_rt_sigreturn_wrapper:
571 brid sys_rt_sigreturn
572 addk r5, r1, r0
573
574sys_sigsuspend_wrapper:
575 brid sys_rt_sigsuspend
576 addk r6, r1, r0
577
578sys_rt_sigsuspend_wrapper:
579 brid sys_rt_sigsuspend
580 addk r7, r1, r0
581
582 /* Interrupt vector table */
583 .section .init.ivt, "ax"
584 .org 0x0
585 brai _reset
586 brai _user_exception
587 brai _interrupt
588 brai _break
589 brai _hw_exception_handler
590 .org 0x60
591 brai _debug_exception
592
593.section .rodata,"a"
594#include "syscall_table.S"
595
596syscall_table_size=(.-sys_call_table)
diff --git a/arch/microblaze/kernel/exceptions.c b/arch/microblaze/kernel/exceptions.c
new file mode 100644
index 000000000000..4a8a4064c7ee
--- /dev/null
+++ b/arch/microblaze/kernel/exceptions.c
@@ -0,0 +1,124 @@
1/*
2 * HW exception handling
3 *
4 * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
5 * Copyright (C) 2008 PetaLogix
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 */
11
12/*
13 * This file handles the architecture-dependent parts of hardware exceptions
14 */
15
16#include <linux/kernel.h>
17#include <linux/signal.h>
18#include <linux/sched.h>
19#include <linux/kallsyms.h>
20#include <linux/module.h>
21
22#include <asm/exceptions.h>
23#include <asm/entry.h> /* For KM CPU var */
24#include <asm/uaccess.h>
25#include <asm/errno.h>
26#include <asm/ptrace.h>
27#include <asm/current.h>
28
29#define MICROBLAZE_ILL_OPCODE_EXCEPTION 0x02
30#define MICROBLAZE_IBUS_EXCEPTION 0x03
31#define MICROBLAZE_DBUS_EXCEPTION 0x04
32#define MICROBLAZE_DIV_ZERO_EXCEPTION 0x05
33#define MICROBLAZE_FPU_EXCEPTION 0x06
34#define MICROBLAZE_PRIVILEG_EXCEPTION 0x07
35
36static DEFINE_SPINLOCK(die_lock);
37
38void die(const char *str, struct pt_regs *fp, long err)
39{
40 console_verbose();
41 spin_lock_irq(&die_lock);
42 printk(KERN_WARNING "Oops: %s, sig: %ld\n", str, err);
43 show_regs(fp);
44 spin_unlock_irq(&die_lock);
45 /* do_exit() should take care of panic'ing from an interrupt
46 * context so we don't handle it here
47 */
48 do_exit(err);
49}
50
51void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr)
52{
53 siginfo_t info;
54
55 if (kernel_mode(regs)) {
56 debugger(regs);
57 die("Exception in kernel mode", regs, signr);
58 }
59 info.si_signo = signr;
60 info.si_errno = 0;
61 info.si_code = code;
62 info.si_addr = (void __user *) addr;
63 force_sig_info(signr, &info, current);
64}
65
66asmlinkage void full_exception(struct pt_regs *regs, unsigned int type,
67 int fsr, int addr)
68{
69#if 0
70 printk(KERN_WARNING "Exception %02x in %s mode, FSR=%08x PC=%08x ESR=%08x\n",
71 type, user_mode(regs) ? "user" : "kernel", fsr,
72 (unsigned int) regs->pc, (unsigned int) regs->esr);
73#endif
74
75 switch (type & 0x1F) {
76 case MICROBLAZE_ILL_OPCODE_EXCEPTION:
77 _exception(SIGILL, regs, ILL_ILLOPC, addr);
78 break;
79 case MICROBLAZE_IBUS_EXCEPTION:
80 if (user_mode(regs)) {
81 printk(KERN_WARNING "Instruction bus error exception in user mode.\n");
82 _exception(SIGBUS, regs, BUS_ADRERR, addr);
83 return;
84 }
85 printk(KERN_WARNING "Instruction bus error exception in kernel mode.\n");
86 die("bus exception", regs, SIGBUS);
87 break;
88 case MICROBLAZE_DBUS_EXCEPTION:
89 if (user_mode(regs)) {
90 printk(KERN_WARNING "Data bus error exception in user mode.\n");
91 _exception(SIGBUS, regs, BUS_ADRERR, addr);
92 return;
93 }
94 printk(KERN_WARNING "Data bus error exception in kernel mode.\n");
95 die("bus exception", regs, SIGBUS);
96 break;
97 case MICROBLAZE_DIV_ZERO_EXCEPTION:
98 printk(KERN_WARNING "Divide by zero exception\n");
99 _exception(SIGILL, regs, ILL_ILLOPC, addr);
100 break;
101
102 case MICROBLAZE_FPU_EXCEPTION:
103 /* IEEE FP exception */
104 /* I removed fsr variable and use code var for storing fsr */
105 if (fsr & FSR_IO)
106 fsr = FPE_FLTINV;
107 else if (fsr & FSR_OF)
108 fsr = FPE_FLTOVF;
109 else if (fsr & FSR_UF)
110 fsr = FPE_FLTUND;
111 else if (fsr & FSR_DZ)
112 fsr = FPE_FLTDIV;
113 else if (fsr & FSR_DO)
114 fsr = FPE_FLTRES;
115 _exception(SIGFPE, regs, fsr, addr);
116 break;
117
118 default:
119 printk(KERN_WARNING "Unexpected exception %02x "
120 "PC=%08x in %s mode\n", type, (unsigned int) addr,
121 kernel_mode(regs) ? "kernel" : "user");
122 }
123 return;
124}
diff --git a/arch/microblaze/kernel/head.S b/arch/microblaze/kernel/head.S
new file mode 100644
index 000000000000..319dc35fc922
--- /dev/null
+++ b/arch/microblaze/kernel/head.S
@@ -0,0 +1,56 @@
1/*
2 * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
3 * Copyright (C) 2007-2009 PetaLogix
4 * Copyright (C) 2006 Atmark Techno, Inc.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/linkage.h>
12#include <asm/thread_info.h>
13#include <asm/page.h>
14
15 .text
16ENTRY(_start)
17 mfs r1, rmsr
18 andi r1, r1, ~2
19 mts rmsr, r1
20
21/* save fdt to kernel location */
22/* r7 stores pointer to fdt blob */
23 beqi r7, no_fdt_arg
24 or r11, r0, r0 /* incremment */
25 ori r4, r0, TOPHYS(_fdt_start) /* save bram context */
26 ori r3, r0, (0x4000 - 4)
27_copy_fdt:
28 lw r12, r7, r11 /* r12 = r7 + r11 */
29 sw r12, r4, r11 /* addr[r4 + r11] = r12 */
30 addik r11, r11, 4 /* increment counting */
31 bgtid r3, _copy_fdt /* loop for all entries */
32 addik r3, r3, -4 /* descrement loop */
33no_fdt_arg:
34
35 /* Initialize small data anchors */
36 la r13, r0, _KERNEL_SDA_BASE_
37 la r2, r0, _KERNEL_SDA2_BASE_
38
39 /* Initialize stack pointer */
40 la r1, r0, init_thread_union + THREAD_SIZE - 4
41
42 /* Initialize r31 with current task address */
43 la r31, r0, init_task
44
45 /*
46 * Call platform dependent initialize function.
47 * Please see $(ARCH)/mach-$(SUBARCH)/setup.c for
48 * the function.
49 */
50 la r8, r0, machine_early_init
51 brald r15, r8
52 nop
53
54 la r15, r0, machine_halt
55 braid start_kernel
56 nop
diff --git a/arch/microblaze/kernel/heartbeat.c b/arch/microblaze/kernel/heartbeat.c
new file mode 100644
index 000000000000..1bdf20222b92
--- /dev/null
+++ b/arch/microblaze/kernel/heartbeat.c
@@ -0,0 +1,67 @@
1/*
2 * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
3 * Copyright (C) 2007-2009 PetaLogix
4 * Copyright (C) 2006 Atmark Techno, Inc.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/sched.h>
12#include <linux/io.h>
13
14#include <asm/setup.h>
15#include <asm/page.h>
16#include <asm/prom.h>
17
18static unsigned int base_addr;
19
20void heartbeat(void)
21{
22 static unsigned int cnt, period, dist;
23
24 if (base_addr) {
25 if (cnt == 0 || cnt == dist)
26 out_be32(base_addr, 1);
27 else if (cnt == 7 || cnt == dist + 7)
28 out_be32(base_addr, 0);
29
30 if (++cnt > period) {
31 cnt = 0;
32 /*
33 * The hyperbolic function below modifies the heartbeat
34 * period length in dependency of the current (5min)
35 * load. It goes through the points f(0)=126, f(1)=86,
36 * f(5)=51, f(inf)->30.
37 */
38 period = ((672 << FSHIFT) / (5 * avenrun[0] +
39 (7 << FSHIFT))) + 30;
40 dist = period / 4;
41 }
42 }
43}
44
45void setup_heartbeat(void)
46{
47 struct device_node *gpio = NULL;
48 int j;
49 char *gpio_list[] = {
50 "xlnx,xps-gpio-1.00.a",
51 "xlnx,opb-gpio-1.00.a",
52 NULL
53 };
54
55 for (j = 0; gpio_list[j] != NULL; j++) {
56 gpio = of_find_compatible_node(NULL, NULL, gpio_list[j]);
57 if (gpio)
58 break;
59 }
60
61 base_addr = *(int *) of_get_property(gpio, "reg", NULL);
62 base_addr = (unsigned long) ioremap(base_addr, PAGE_SIZE);
63 printk(KERN_NOTICE "Heartbeat GPIO at 0x%x\n", base_addr);
64
65 if (*(int *) of_get_property(gpio, "xlnx,is-bidir", NULL))
66 out_be32(base_addr + 4, 0); /* GPIO is configured as output */
67}
diff --git a/arch/microblaze/kernel/hw_exception_handler.S b/arch/microblaze/kernel/hw_exception_handler.S
new file mode 100644
index 000000000000..cf9486d99838
--- /dev/null
+++ b/arch/microblaze/kernel/hw_exception_handler.S
@@ -0,0 +1,458 @@
1/*
2 * Exception handling for Microblaze
3 *
4 * Rewriten interrupt handling
5 *
6 * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
7 * Copyright (C) 2008-2009 PetaLogix
8 *
9 * uClinux customisation (C) 2005 John Williams
10 *
11 * MMU code derived from arch/ppc/kernel/head_4xx.S:
12 * Copyright (C) 1995-1996 Gary Thomas <gdt@linuxppc.org>
13 * Initial PowerPC version.
14 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
15 * Rewritten for PReP
16 * Copyright (C) 1996 Paul Mackerras <paulus@cs.anu.edu.au>
17 * Low-level exception handers, MMU support, and rewrite.
18 * Copyright (C) 1997 Dan Malek <dmalek@jlc.net>
19 * PowerPC 8xx modifications.
20 * Copyright (C) 1998-1999 TiVo, Inc.
21 * PowerPC 403GCX modifications.
22 * Copyright (C) 1999 Grant Erickson <grant@lcse.umn.edu>
23 * PowerPC 403GCX/405GP modifications.
24 * Copyright 2000 MontaVista Software Inc.
25 * PPC405 modifications
26 * PowerPC 403GCX/405GP modifications.
27 * Author: MontaVista Software, Inc.
28 * frank_rowand@mvista.com or source@mvista.com
29 * debbie_chu@mvista.com
30 *
31 * Original code
32 * Copyright (C) 2004 Xilinx, Inc.
33 *
34 * This program is free software; you can redistribute it and/or modify it
35 * under the terms of the GNU General Public License version 2 as published
36 * by the Free Software Foundation.
37 */
38
39/*
40 * Here are the handlers which don't require enabling translation
41 * and calling other kernel code thus we can keep their design very simple
42 * and do all processing in real mode. All what they need is a valid current
43 * (that is an issue for the CONFIG_REGISTER_TASK_PTR case)
44 * This handlers use r3,r4,r5,r6 and optionally r[current] to work therefore
45 * these registers are saved/restored
46 * The handlers which require translation are in entry.S --KAA
47 *
48 * Microblaze HW Exception Handler
49 * - Non self-modifying exception handler for the following exception conditions
50 * - Unalignment
51 * - Instruction bus error
52 * - Data bus error
53 * - Illegal instruction opcode
54 * - Divide-by-zero
55 *
56 * Note we disable interrupts during exception handling, otherwise we will
57 * possibly get multiple re-entrancy if interrupt handles themselves cause
58 * exceptions. JW
59 */
60
61#include <asm/exceptions.h>
62#include <asm/unistd.h>
63#include <asm/page.h>
64
65#include <asm/entry.h>
66#include <asm/current.h>
67#include <linux/linkage.h>
68
69#include <asm/mmu.h>
70#include <asm/pgtable.h>
71#include <asm/asm-offsets.h>
72
73/* Helpful Macros */
74#define EX_HANDLER_STACK_SIZ (4*19)
75#define NUM_TO_REG(num) r ## num
76
77#define LWREG_NOP \
78 bri ex_handler_unhandled; \
79 nop;
80
81#define SWREG_NOP \
82 bri ex_handler_unhandled; \
83 nop;
84
85/* FIXME this is weird - for noMMU kernel is not possible to use brid
86 * instruction which can shorten executed time
87 */
88
89/* r3 is the source */
90#define R3_TO_LWREG_V(regnum) \
91 swi r3, r1, 4 * regnum; \
92 bri ex_handler_done;
93
94/* r3 is the source */
95#define R3_TO_LWREG(regnum) \
96 or NUM_TO_REG (regnum), r0, r3; \
97 bri ex_handler_done;
98
99/* r3 is the target */
100#define SWREG_TO_R3_V(regnum) \
101 lwi r3, r1, 4 * regnum; \
102 bri ex_sw_tail;
103
104/* r3 is the target */
105#define SWREG_TO_R3(regnum) \
106 or r3, r0, NUM_TO_REG (regnum); \
107 bri ex_sw_tail;
108
109.extern other_exception_handler /* Defined in exception.c */
110
111/*
112 * hw_exception_handler - Handler for exceptions
113 *
114 * Exception handler notes:
115 * - Handles all exceptions
116 * - Does not handle unaligned exceptions during load into r17, r1, r0.
117 * - Does not handle unaligned exceptions during store from r17 (cannot be
118 * done) and r1 (slows down common case)
119 *
120 * Relevant register structures
121 *
122 * EAR - |----|----|----|----|----|----|----|----|
123 * - < ## 32 bit faulting address ## >
124 *
125 * ESR - |----|----|----|----|----| - | - |-----|-----|
126 * - W S REG EXC
127 *
128 *
129 * STACK FRAME STRUCTURE (for NO_MMU)
130 * ---------------------------------
131 *
132 * +-------------+ + 0
133 * | MSR |
134 * +-------------+ + 4
135 * | r1 |
136 * | . |
137 * | . |
138 * | . |
139 * | . |
140 * | r18 |
141 * +-------------+ + 76
142 * | . |
143 * | . |
144 *
145 * NO_MMU kernel use the same r0_ram pointed space - look to vmlinux.lds.S
146 * which is used for storing register values - old style was, that value were
147 * stored in stack but in case of failure you lost information about register.
148 * Currently you can see register value in memory in specific place.
149 * In compare to with previous solution the speed should be the same.
150 *
151 * MMU exception handler has different handling compare to no MMU kernel.
152 * Exception handler use jump table for directing of what happen. For MMU kernel
153 * is this approach better because MMU relate exception are handled by asm code
154 * in this file. In compare to with MMU expect of unaligned exception
155 * is everything handled by C code.
156 */
157
158/*
159 * every of these handlers is entered having R3/4/5/6/11/current saved on stack
160 * and clobbered so care should be taken to restore them if someone is going to
161 * return from exception
162 */
163
164/* wrappers to restore state before coming to entry.S */
165
166.global _hw_exception_handler
167.section .text
168.align 4
169.ent _hw_exception_handler
170_hw_exception_handler:
171 addik r1, r1, -(EX_HANDLER_STACK_SIZ); /* Create stack frame */
172 swi r3, r1, PT_R3
173 swi r4, r1, PT_R4
174 swi r5, r1, PT_R5
175 swi r6, r1, PT_R6
176
177 mfs r5, rmsr;
178 nop
179 swi r5, r1, 0;
180 mfs r4, rbtr /* Save BTR before jumping to handler */
181 nop
182 mfs r3, resr
183 nop
184
185 andi r5, r3, 0x1000; /* Check ESR[DS] */
186 beqi r5, not_in_delay_slot; /* Branch if ESR[DS] not set */
187 mfs r17, rbtr; /* ESR[DS] set - return address in BTR */
188 nop
189not_in_delay_slot:
190 swi r17, r1, PT_R17
191
192 andi r5, r3, 0x1F; /* Extract ESR[EXC] */
193
194 /* Exceptions enabled here. This will allow nested exceptions */
195 mfs r6, rmsr;
196 nop
197 swi r6, r1, 0; /* RMSR_OFFSET */
198 ori r6, r6, 0x100; /* Turn ON the EE bit */
199 andi r6, r6, ~2; /* Disable interrupts */
200 mts rmsr, r6;
201 nop
202
203 xori r6, r5, 1; /* 00001 = Unaligned Exception */
204 /* Jump to unalignment exception handler */
205 beqi r6, handle_unaligned_ex;
206
207handle_other_ex: /* Handle Other exceptions here */
208 /* Save other volatiles before we make procedure calls below */
209 swi r7, r1, PT_R7
210 swi r8, r1, PT_R8
211 swi r9, r1, PT_R9
212 swi r10, r1, PT_R10
213 swi r11, r1, PT_R11
214 swi r12, r1, PT_R12
215 swi r14, r1, PT_R14
216 swi r15, r1, PT_R15
217 swi r18, r1, PT_R18
218
219 or r5, r1, r0
220 andi r6, r3, 0x1F; /* Load ESR[EC] */
221 lwi r7, r0, PER_CPU(KM) /* MS: saving current kernel mode to regs */
222 swi r7, r1, PT_MODE
223 mfs r7, rfsr
224 nop
225 addk r8, r17, r0; /* Load exception address */
226 bralid r15, full_exception; /* Branch to the handler */
227 nop;
228
229 /*
230 * Trigger execution of the signal handler by enabling
231 * interrupts and calling an invalid syscall.
232 */
233 mfs r5, rmsr;
234 nop
235 ori r5, r5, 2;
236 mts rmsr, r5; /* enable interrupt */
237 nop
238 addi r12, r0, __NR_syscalls;
239 brki r14, 0x08;
240 mfs r5, rmsr; /* disable interrupt */
241 nop
242 andi r5, r5, ~2;
243 mts rmsr, r5;
244 nop
245
246 lwi r7, r1, PT_R7
247 lwi r8, r1, PT_R8
248 lwi r9, r1, PT_R9
249 lwi r10, r1, PT_R10
250 lwi r11, r1, PT_R11
251 lwi r12, r1, PT_R12
252 lwi r14, r1, PT_R14
253 lwi r15, r1, PT_R15
254 lwi r18, r1, PT_R18
255
256 bri ex_handler_done; /* Complete exception handling */
257
258/* 0x01 - Unaligned data access exception
259 * This occurs when a word access is not aligned on a word boundary,
260 * or when a 16-bit access is not aligned on a 16-bit boundary.
261 * This handler perform the access, and returns, except for MMU when
262 * the unaligned address is last on a 4k page or the physical address is
263 * not found in the page table, in which case unaligned_data_trap is called.
264 */
265handle_unaligned_ex:
266 /* Working registers already saved: R3, R4, R5, R6
267 * R3 = ESR
268 * R4 = BTR
269 */
270 mfs r4, rear;
271 nop
272
273 andi r6, r3, 0x3E0; /* Mask and extract the register operand */
274 srl r6, r6; /* r6 >> 5 */
275 srl r6, r6;
276 srl r6, r6;
277 srl r6, r6;
278 srl r6, r6;
279 /* Store the register operand in a temporary location */
280 sbi r6, r0, TOPHYS(ex_reg_op);
281
282 andi r6, r3, 0x400; /* Extract ESR[S] */
283 bnei r6, ex_sw;
284ex_lw:
285 andi r6, r3, 0x800; /* Extract ESR[W] */
286 beqi r6, ex_lhw;
287 lbui r5, r4, 0; /* Exception address in r4 */
288 /* Load a word, byte-by-byte from destination address
289 and save it in tmp space */
290 sbi r5, r0, TOPHYS(ex_tmp_data_loc_0);
291 lbui r5, r4, 1;
292 sbi r5, r0, TOPHYS(ex_tmp_data_loc_1);
293 lbui r5, r4, 2;
294 sbi r5, r0, TOPHYS(ex_tmp_data_loc_2);
295 lbui r5, r4, 3;
296 sbi r5, r0, TOPHYS(ex_tmp_data_loc_3);
297 /* Get the destination register value into r3 */
298 lwi r3, r0, TOPHYS(ex_tmp_data_loc_0);
299 bri ex_lw_tail;
300ex_lhw:
301 lbui r5, r4, 0; /* Exception address in r4 */
302 /* Load a half-word, byte-by-byte from destination
303 address and save it in tmp space */
304 sbi r5, r0, TOPHYS(ex_tmp_data_loc_0);
305 lbui r5, r4, 1;
306 sbi r5, r0, TOPHYS(ex_tmp_data_loc_1);
307 /* Get the destination register value into r3 */
308 lhui r3, r0, TOPHYS(ex_tmp_data_loc_0);
309ex_lw_tail:
310 /* Get the destination register number into r5 */
311 lbui r5, r0, TOPHYS(ex_reg_op);
312 /* Form load_word jump table offset (lw_table + (8 * regnum)) */
313 la r6, r0, TOPHYS(lw_table);
314 addk r5, r5, r5;
315 addk r5, r5, r5;
316 addk r5, r5, r5;
317 addk r5, r5, r6;
318 bra r5;
319ex_lw_end: /* Exception handling of load word, ends */
320ex_sw:
321 /* Get the destination register number into r5 */
322 lbui r5, r0, TOPHYS(ex_reg_op);
323 /* Form store_word jump table offset (sw_table + (8 * regnum)) */
324 la r6, r0, TOPHYS(sw_table);
325 add r5, r5, r5;
326 add r5, r5, r5;
327 add r5, r5, r5;
328 add r5, r5, r6;
329 bra r5;
330ex_sw_tail:
331 mfs r6, resr;
332 nop
333 andi r6, r6, 0x800; /* Extract ESR[W] */
334 beqi r6, ex_shw;
335 /* Get the word - delay slot */
336 swi r3, r0, TOPHYS(ex_tmp_data_loc_0);
337 /* Store the word, byte-by-byte into destination address */
338 lbui r3, r0, TOPHYS(ex_tmp_data_loc_0);
339 sbi r3, r4, 0;
340 lbui r3, r0, TOPHYS(ex_tmp_data_loc_1);
341 sbi r3, r4, 1;
342 lbui r3, r0, TOPHYS(ex_tmp_data_loc_2);
343 sbi r3, r4, 2;
344 lbui r3, r0, TOPHYS(ex_tmp_data_loc_3);
345 sbi r3, r4, 3;
346 bri ex_handler_done;
347
348ex_shw:
349 /* Store the lower half-word, byte-by-byte into destination address */
350 swi r3, r0, TOPHYS(ex_tmp_data_loc_0);
351 lbui r3, r0, TOPHYS(ex_tmp_data_loc_2);
352 sbi r3, r4, 0;
353 lbui r3, r0, TOPHYS(ex_tmp_data_loc_3);
354 sbi r3, r4, 1;
355ex_sw_end: /* Exception handling of store word, ends. */
356
357ex_handler_done:
358 lwi r5, r1, 0 /* RMSR */
359 mts rmsr, r5
360 nop
361 lwi r3, r1, PT_R3
362 lwi r4, r1, PT_R4
363 lwi r5, r1, PT_R5
364 lwi r6, r1, PT_R6
365 lwi r17, r1, PT_R17
366
367 rted r17, 0
368 addik r1, r1, (EX_HANDLER_STACK_SIZ); /* Restore stack frame */
369
370.end _hw_exception_handler
371
372ex_handler_unhandled:
373/* FIXME add handle function for unhandled exception - dump register */
374 bri 0
375
376.section .text
377.align 4
378lw_table:
379lw_r0: R3_TO_LWREG (0);
380lw_r1: LWREG_NOP;
381lw_r2: R3_TO_LWREG (2);
382lw_r3: R3_TO_LWREG_V (3);
383lw_r4: R3_TO_LWREG_V (4);
384lw_r5: R3_TO_LWREG_V (5);
385lw_r6: R3_TO_LWREG_V (6);
386lw_r7: R3_TO_LWREG (7);
387lw_r8: R3_TO_LWREG (8);
388lw_r9: R3_TO_LWREG (9);
389lw_r10: R3_TO_LWREG (10);
390lw_r11: R3_TO_LWREG (11);
391lw_r12: R3_TO_LWREG (12);
392lw_r13: R3_TO_LWREG (13);
393lw_r14: R3_TO_LWREG (14);
394lw_r15: R3_TO_LWREG (15);
395lw_r16: R3_TO_LWREG (16);
396lw_r17: LWREG_NOP;
397lw_r18: R3_TO_LWREG (18);
398lw_r19: R3_TO_LWREG (19);
399lw_r20: R3_TO_LWREG (20);
400lw_r21: R3_TO_LWREG (21);
401lw_r22: R3_TO_LWREG (22);
402lw_r23: R3_TO_LWREG (23);
403lw_r24: R3_TO_LWREG (24);
404lw_r25: R3_TO_LWREG (25);
405lw_r26: R3_TO_LWREG (26);
406lw_r27: R3_TO_LWREG (27);
407lw_r28: R3_TO_LWREG (28);
408lw_r29: R3_TO_LWREG (29);
409lw_r30: R3_TO_LWREG (30);
410lw_r31: R3_TO_LWREG (31);
411
412sw_table:
413sw_r0: SWREG_TO_R3 (0);
414sw_r1: SWREG_NOP;
415sw_r2: SWREG_TO_R3 (2);
416sw_r3: SWREG_TO_R3_V (3);
417sw_r4: SWREG_TO_R3_V (4);
418sw_r5: SWREG_TO_R3_V (5);
419sw_r6: SWREG_TO_R3_V (6);
420sw_r7: SWREG_TO_R3 (7);
421sw_r8: SWREG_TO_R3 (8);
422sw_r9: SWREG_TO_R3 (9);
423sw_r10: SWREG_TO_R3 (10);
424sw_r11: SWREG_TO_R3 (11);
425sw_r12: SWREG_TO_R3 (12);
426sw_r13: SWREG_TO_R3 (13);
427sw_r14: SWREG_TO_R3 (14);
428sw_r15: SWREG_TO_R3 (15);
429sw_r16: SWREG_TO_R3 (16);
430sw_r17: SWREG_NOP;
431sw_r18: SWREG_TO_R3 (18);
432sw_r19: SWREG_TO_R3 (19);
433sw_r20: SWREG_TO_R3 (20);
434sw_r21: SWREG_TO_R3 (21);
435sw_r22: SWREG_TO_R3 (22);
436sw_r23: SWREG_TO_R3 (23);
437sw_r24: SWREG_TO_R3 (24);
438sw_r25: SWREG_TO_R3 (25);
439sw_r26: SWREG_TO_R3 (26);
440sw_r27: SWREG_TO_R3 (27);
441sw_r28: SWREG_TO_R3 (28);
442sw_r29: SWREG_TO_R3 (29);
443sw_r30: SWREG_TO_R3 (30);
444sw_r31: SWREG_TO_R3 (31);
445
446/* Temporary data structures used in the handler */
447.section .data
448.align 4
449ex_tmp_data_loc_0:
450 .byte 0
451ex_tmp_data_loc_1:
452 .byte 0
453ex_tmp_data_loc_2:
454 .byte 0
455ex_tmp_data_loc_3:
456 .byte 0
457ex_reg_op:
458 .byte 0
diff --git a/arch/microblaze/kernel/init_task.c b/arch/microblaze/kernel/init_task.c
new file mode 100644
index 000000000000..48eb9fb255fa
--- /dev/null
+++ b/arch/microblaze/kernel/init_task.c
@@ -0,0 +1,29 @@
1/*
2 * Copyright (C) 2009 Michal Simek <monstr@monstr.eu>
3 * Copyright (C) 2009 PetaLogix
4 * Copyright (C) 2006 Atmark Techno, Inc.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/module.h>
12#include <linux/sched.h>
13#include <linux/init_task.h>
14#include <linux/fs.h>
15#include <linux/mqueue.h>
16
17#include <asm/pgtable.h>
18
19static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
20static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
21struct mm_struct init_mm = INIT_MM(init_mm);
22EXPORT_SYMBOL(init_mm);
23
24union thread_union init_thread_union
25 __attribute__((__section__(".data.init_task"))) =
26{ INIT_THREAD_INFO(init_task) };
27
28struct task_struct init_task = INIT_TASK(init_task);
29EXPORT_SYMBOL(init_task);
diff --git a/arch/microblaze/kernel/intc.c b/arch/microblaze/kernel/intc.c
new file mode 100644
index 000000000000..a69d3e3c2fd4
--- /dev/null
+++ b/arch/microblaze/kernel/intc.c
@@ -0,0 +1,172 @@
1/*
2 * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
3 * Copyright (C) 2007-2009 PetaLogix
4 * Copyright (C) 2006 Atmark Techno, Inc.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/init.h>
12#include <linux/irq.h>
13#include <asm/page.h>
14#include <linux/io.h>
15
16#include <asm/prom.h>
17#include <asm/irq.h>
18
19#ifdef CONFIG_SELFMOD_INTC
20#include <asm/selfmod.h>
21#define INTC_BASE BARRIER_BASE_ADDR
22#else
23static unsigned int intc_baseaddr;
24#define INTC_BASE intc_baseaddr
25#endif
26
27unsigned int nr_irq;
28
29/* No one else should require these constants, so define them locally here. */
30#define ISR 0x00 /* Interrupt Status Register */
31#define IPR 0x04 /* Interrupt Pending Register */
32#define IER 0x08 /* Interrupt Enable Register */
33#define IAR 0x0c /* Interrupt Acknowledge Register */
34#define SIE 0x10 /* Set Interrupt Enable bits */
35#define CIE 0x14 /* Clear Interrupt Enable bits */
36#define IVR 0x18 /* Interrupt Vector Register */
37#define MER 0x1c /* Master Enable Register */
38
39#define MER_ME (1<<0)
40#define MER_HIE (1<<1)
41
42static void intc_enable_or_unmask(unsigned int irq)
43{
44 pr_debug("enable_or_unmask: %d\n", irq);
45 out_be32(INTC_BASE + SIE, 1 << irq);
46}
47
48static void intc_disable_or_mask(unsigned int irq)
49{
50 pr_debug("disable: %d\n", irq);
51 out_be32(INTC_BASE + CIE, 1 << irq);
52}
53
54static void intc_ack(unsigned int irq)
55{
56 pr_debug("ack: %d\n", irq);
57 out_be32(INTC_BASE + IAR, 1 << irq);
58}
59
60static void intc_mask_ack(unsigned int irq)
61{
62 unsigned long mask = 1 << irq;
63 pr_debug("disable_and_ack: %d\n", irq);
64 out_be32(INTC_BASE + CIE, mask);
65 out_be32(INTC_BASE + IAR, mask);
66}
67
68static void intc_end(unsigned int irq)
69{
70 unsigned long mask = 1 << irq;
71 pr_debug("end: %d\n", irq);
72 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
73 out_be32(INTC_BASE + SIE, mask);
74 /* ack level sensitive intr */
75 if (irq_desc[irq].status & IRQ_LEVEL)
76 out_be32(INTC_BASE + IAR, mask);
77 }
78}
79
80static struct irq_chip intc_dev = {
81 .name = "Xilinx INTC",
82 .unmask = intc_enable_or_unmask,
83 .mask = intc_disable_or_mask,
84 .ack = intc_ack,
85 .mask_ack = intc_mask_ack,
86 .end = intc_end,
87};
88
89unsigned int get_irq(struct pt_regs *regs)
90{
91 int irq;
92
93 /*
94 * NOTE: This function is the one that needs to be improved in
95 * order to handle multiple interrupt controllers. It currently
96 * is hardcoded to check for interrupts only on the first INTC.
97 */
98 irq = in_be32(INTC_BASE + IVR);
99 pr_debug("get_irq: %d\n", irq);
100
101 return irq;
102}
103
104void __init init_IRQ(void)
105{
106 u32 i, j, intr_type;
107 struct device_node *intc = NULL;
108#ifdef CONFIG_SELFMOD_INTC
109 unsigned int intc_baseaddr = 0;
110 static int arr_func[] = {
111 (int)&get_irq,
112 (int)&intc_enable_or_unmask,
113 (int)&intc_disable_or_mask,
114 (int)&intc_mask_ack,
115 (int)&intc_ack,
116 (int)&intc_end,
117 0
118 };
119#endif
120 static char *intc_list[] = {
121 "xlnx,xps-intc-1.00.a",
122 "xlnx,opb-intc-1.00.c",
123 "xlnx,opb-intc-1.00.b",
124 "xlnx,opb-intc-1.00.a",
125 NULL
126 };
127
128 for (j = 0; intc_list[j] != NULL; j++) {
129 intc = of_find_compatible_node(NULL, NULL, intc_list[j]);
130 if (intc)
131 break;
132 }
133
134 intc_baseaddr = *(int *) of_get_property(intc, "reg", NULL);
135 intc_baseaddr = (unsigned long) ioremap(intc_baseaddr, PAGE_SIZE);
136 nr_irq = *(int *) of_get_property(intc, "xlnx,num-intr-inputs", NULL);
137
138 intr_type =
139 *(int *) of_get_property(intc, "xlnx,kind-of-intr", NULL);
140 if (intr_type >= (1 << nr_irq))
141 printk(KERN_INFO " ERROR: Mishmash in king-of-intr param\n");
142
143#ifdef CONFIG_SELFMOD_INTC
144 selfmod_function((int *) arr_func, intc_baseaddr);
145#endif
146 printk(KERN_INFO "%s #0 at 0x%08x, num_irq=%d, edge=0x%x\n",
147 intc_list[j], intc_baseaddr, nr_irq, intr_type);
148
149 /*
150 * Disable all external interrupts until they are
151 * explicity requested.
152 */
153 out_be32(intc_baseaddr + IER, 0);
154
155 /* Acknowledge any pending interrupts just in case. */
156 out_be32(intc_baseaddr + IAR, 0xffffffff);
157
158 /* Turn on the Master Enable. */
159 out_be32(intc_baseaddr + MER, MER_HIE | MER_ME);
160
161 for (i = 0; i < nr_irq; ++i) {
162 if (intr_type & (0x00000001 << i)) {
163 set_irq_chip_and_handler_name(i, &intc_dev,
164 handle_edge_irq, intc_dev.name);
165 irq_desc[i].status &= ~IRQ_LEVEL;
166 } else {
167 set_irq_chip_and_handler_name(i, &intc_dev,
168 handle_level_irq, intc_dev.name);
169 irq_desc[i].status |= IRQ_LEVEL;
170 }
171 }
172}
diff --git a/arch/microblaze/kernel/irq.c b/arch/microblaze/kernel/irq.c
new file mode 100644
index 000000000000..f688ee93e3b9
--- /dev/null
+++ b/arch/microblaze/kernel/irq.c
@@ -0,0 +1,104 @@
1/*
2 * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
3 * Copyright (C) 2007-2009 PetaLogix
4 * Copyright (C) 2006 Atmark Techno, Inc.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/init.h>
12#include <linux/kernel.h>
13#include <linux/hardirq.h>
14#include <linux/interrupt.h>
15#include <linux/irqflags.h>
16#include <linux/seq_file.h>
17#include <linux/kernel_stat.h>
18#include <linux/irq.h>
19
20#include <asm/prom.h>
21
22unsigned int irq_of_parse_and_map(struct device_node *dev, int index)
23{
24 struct of_irq oirq;
25
26 if (of_irq_map_one(dev, index, &oirq))
27 return NO_IRQ;
28
29 return oirq.specifier[0];
30}
31EXPORT_SYMBOL_GPL(irq_of_parse_and_map);
32
33/*
34 * 'what should we do if we get a hw irq event on an illegal vector'.
35 * each architecture has to answer this themselves.
36 */
37void ack_bad_irq(unsigned int irq)
38{
39 printk(KERN_WARNING "unexpected IRQ trap at vector %02x\n", irq);
40}
41
42static u32 concurrent_irq;
43
44void do_IRQ(struct pt_regs *regs)
45{
46 unsigned int irq;
47 struct pt_regs *old_regs = set_irq_regs(regs);
48
49 irq_enter();
50 irq = get_irq(regs);
51next_irq:
52 BUG_ON(irq == -1U);
53 generic_handle_irq(irq);
54
55 irq = get_irq(regs);
56 if (irq != -1U) {
57 pr_debug("next irq: %d\n", irq);
58 ++concurrent_irq;
59 goto next_irq;
60 }
61
62 irq_exit();
63 set_irq_regs(old_regs);
64}
65
66int show_interrupts(struct seq_file *p, void *v)
67{
68 int i = *(loff_t *) v, j;
69 struct irqaction *action;
70 unsigned long flags;
71
72 if (i == 0) {
73 seq_printf(p, " ");
74 for_each_online_cpu(j)
75 seq_printf(p, "CPU%-8d", j);
76 seq_putc(p, '\n');
77 }
78
79 if (i < nr_irq) {
80 spin_lock_irqsave(&irq_desc[i].lock, flags);
81 action = irq_desc[i].action;
82 if (!action)
83 goto skip;
84 seq_printf(p, "%3d: ", i);
85#ifndef CONFIG_SMP
86 seq_printf(p, "%10u ", kstat_irqs(i));
87#else
88 for_each_online_cpu(j)
89 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
90#endif
91 seq_printf(p, " %8s", irq_desc[i].status &
92 IRQ_LEVEL ? "level" : "edge");
93 seq_printf(p, " %8s", irq_desc[i].chip->name);
94 seq_printf(p, " %s", action->name);
95
96 for (action = action->next; action; action = action->next)
97 seq_printf(p, ", %s", action->name);
98
99 seq_putc(p, '\n');
100skip:
101 spin_unlock_irqrestore(&irq_desc[i].lock, flags);
102 }
103 return 0;
104}
diff --git a/arch/microblaze/kernel/microblaze_ksyms.c b/arch/microblaze/kernel/microblaze_ksyms.c
new file mode 100644
index 000000000000..5f71790e3c3c
--- /dev/null
+++ b/arch/microblaze/kernel/microblaze_ksyms.c
@@ -0,0 +1,47 @@
1/*
2 * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
3 * Copyright (C) 2008-2009 PetaLogix
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
10#include <linux/module.h>
11#include <linux/string.h>
12#include <linux/cryptohash.h>
13#include <linux/delay.h>
14#include <linux/in6.h>
15#include <linux/syscalls.h>
16
17#include <asm/checksum.h>
18#include <linux/io.h>
19#include <asm/page.h>
20#include <asm/system.h>
21#include <linux/uaccess.h>
22
23/*
24 * libgcc functions - functions that are used internally by the
25 * compiler... (prototypes are not correct though, but that
26 * doesn't really matter since they're not versioned).
27 */
28extern void __ashldi3(void);
29EXPORT_SYMBOL(__ashldi3);
30extern void __ashrdi3(void);
31EXPORT_SYMBOL(__ashrdi3);
32extern void __divsi3(void);
33EXPORT_SYMBOL(__divsi3);
34extern void __lshrdi3(void);
35EXPORT_SYMBOL(__lshrdi3);
36extern void __modsi3(void);
37EXPORT_SYMBOL(__modsi3);
38extern void __mulsi3(void);
39EXPORT_SYMBOL(__mulsi3);
40extern void __muldi3(void);
41EXPORT_SYMBOL(__muldi3);
42extern void __ucmpdi2(void);
43EXPORT_SYMBOL(__ucmpdi2);
44extern void __udivsi3(void);
45EXPORT_SYMBOL(__udivsi3);
46extern void __umodsi3(void);
47EXPORT_SYMBOL(__umodsi3);
diff --git a/arch/microblaze/kernel/module.c b/arch/microblaze/kernel/module.c
new file mode 100644
index 000000000000..51414171326f
--- /dev/null
+++ b/arch/microblaze/kernel/module.c
@@ -0,0 +1,151 @@
1/*
2 * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
3 * Copyright (C) 2007-2009 PetaLogix
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
10#include <linux/module.h>
11#include <linux/moduleloader.h>
12#include <linux/kernel.h>
13#include <linux/elf.h>
14#include <linux/vmalloc.h>
15#include <linux/slab.h>
16#include <linux/fs.h>
17#include <linux/string.h>
18
19#include <asm/pgtable.h>
20
21void *module_alloc(unsigned long size)
22{
23 void *ret;
24 ret = (size == 0) ? NULL : vmalloc(size);
25 pr_debug("module_alloc (%08lx@%08lx)\n", size, (unsigned long int)ret);
26 return ret;
27}
28
29void module_free(struct module *module, void *region)
30{
31 pr_debug("module_free(%s,%08lx)\n", module->name,
32 (unsigned long)region);
33 vfree(region);
34}
35
36int module_frob_arch_sections(Elf_Ehdr *hdr,
37 Elf_Shdr *sechdrs,
38 char *secstrings,
39 struct module *mod)
40{
41 return 0;
42}
43
44int apply_relocate(Elf32_Shdr *sechdrs, const char *strtab,
45 unsigned int symindex, unsigned int relsec, struct module *module)
46{
47 printk(KERN_ERR "module %s: ADD RELOCATION unsupported\n",
48 module->name);
49 return -ENOEXEC;
50}
51
52int apply_relocate_add(Elf32_Shdr *sechdrs, const char *strtab,
53 unsigned int symindex, unsigned int relsec, struct module *module)
54{
55
56 unsigned int i;
57 Elf32_Rela *rela = (void *)sechdrs[relsec].sh_addr;
58 Elf32_Sym *sym;
59 unsigned long int *location;
60 unsigned long int locoffs;
61 unsigned long int value;
62#if __GNUC__ < 4
63 unsigned long int old_value;
64#endif
65
66 pr_debug("Applying add relocation section %u to %u\n",
67 relsec, sechdrs[relsec].sh_info);
68
69 for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rela); i++) {
70
71 location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr +
72 rela[i].r_offset;
73 sym = (Elf32_Sym *)sechdrs[symindex].sh_addr +
74 ELF32_R_SYM(rela[i].r_info);
75 value = sym->st_value + rela[i].r_addend;
76
77 switch (ELF32_R_TYPE(rela[i].r_info)) {
78
79 /*
80 * Be careful! mb-gcc / mb-ld splits the relocs between the
81 * text and the reloc table. In general this means we must
82 * read the current contents of (*location), add any offset
83 * then store the result back in
84 */
85
86 case R_MICROBLAZE_32:
87#if __GNUC__ < 4
88 old_value = *location;
89 *location = value + old_value;
90
91 pr_debug("R_MICROBLAZE_32 (%08lx->%08lx)\n",
92 old_value, value);
93#else
94 *location = value;
95#endif
96 break;
97
98 case R_MICROBLAZE_64:
99#if __GNUC__ < 4
100 /* Split relocs only required/used pre gcc4.1.1 */
101 old_value = ((location[0] & 0x0000FFFF) << 16) |
102 (location[1] & 0x0000FFFF);
103 value += old_value;
104#endif
105 location[0] = (location[0] & 0xFFFF0000) |
106 (value >> 16);
107 location[1] = (location[1] & 0xFFFF0000) |
108 (value & 0xFFFF);
109#if __GNUC__ < 4
110 pr_debug("R_MICROBLAZE_64 (%08lx->%08lx)\n",
111 old_value, value);
112#endif
113 break;
114
115 case R_MICROBLAZE_64_PCREL:
116 locoffs = (location[0] & 0xFFFF) << 16 |
117 (location[1] & 0xFFFF);
118 value -= (unsigned long int)(location) + 4 +
119 locoffs;
120 location[0] = (location[0] & 0xFFFF0000) |
121 (value >> 16);
122 location[1] = (location[1] & 0xFFFF0000) |
123 (value & 0xFFFF);
124 pr_debug("R_MICROBLAZE_64_PCREL (%08lx)\n",
125 value);
126 break;
127
128 case R_MICROBLAZE_NONE:
129 pr_debug("R_MICROBLAZE_NONE\n");
130 break;
131
132 default:
133 printk(KERN_ERR "module %s: "
134 "Unknown relocation: %u\n",
135 module->name,
136 ELF32_R_TYPE(rela->r_info));
137 return -ENOEXEC;
138 }
139 }
140 return 0;
141}
142
143int module_finalize(const Elf32_Ehdr *hdr, const Elf_Shdr *sechdrs,
144 struct module *module)
145{
146 return 0;
147}
148
149void module_arch_cleanup(struct module *mod)
150{
151}
diff --git a/arch/microblaze/kernel/of_device.c b/arch/microblaze/kernel/of_device.c
new file mode 100644
index 000000000000..9a0f7632c47c
--- /dev/null
+++ b/arch/microblaze/kernel/of_device.c
@@ -0,0 +1,113 @@
1#include <linux/string.h>
2#include <linux/kernel.h>
3#include <linux/of.h>
4#include <linux/init.h>
5#include <linux/module.h>
6#include <linux/mod_devicetable.h>
7#include <linux/slab.h>
8#include <linux/of_device.h>
9
10#include <linux/errno.h>
11
12void of_device_make_bus_id(struct of_device *dev)
13{
14 static atomic_t bus_no_reg_magic;
15 struct device_node *node = dev->node;
16 const u32 *reg;
17 u64 addr;
18 int magic;
19
20 /*
21 * For MMIO, get the physical address
22 */
23 reg = of_get_property(node, "reg", NULL);
24 if (reg) {
25 addr = of_translate_address(node, reg);
26 if (addr != OF_BAD_ADDR) {
27 dev_set_name(&dev->dev, "%llx.%s",
28 (unsigned long long)addr, node->name);
29 return;
30 }
31 }
32
33 /*
34 * No BusID, use the node name and add a globally incremented
35 * counter (and pray...)
36 */
37 magic = atomic_add_return(1, &bus_no_reg_magic);
38 dev_set_name(&dev->dev, "%s.%d", node->name, magic - 1);
39}
40EXPORT_SYMBOL(of_device_make_bus_id);
41
42struct of_device *of_device_alloc(struct device_node *np,
43 const char *bus_id,
44 struct device *parent)
45{
46 struct of_device *dev;
47
48 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
49 if (!dev)
50 return NULL;
51
52 dev->node = of_node_get(np);
53 dev->dev.dma_mask = &dev->dma_mask;
54 dev->dev.parent = parent;
55 dev->dev.release = of_release_dev;
56 dev->dev.archdata.of_node = np;
57
58 if (bus_id)
59 dev_set_name(&dev->dev, bus_id);
60 else
61 of_device_make_bus_id(dev);
62
63 return dev;
64}
65EXPORT_SYMBOL(of_device_alloc);
66
67int of_device_uevent(struct device *dev, struct kobj_uevent_env *env)
68{
69 struct of_device *ofdev;
70 const char *compat;
71 int seen = 0, cplen, sl;
72
73 if (!dev)
74 return -ENODEV;
75
76 ofdev = to_of_device(dev);
77
78 if (add_uevent_var(env, "OF_NAME=%s", ofdev->node->name))
79 return -ENOMEM;
80
81 if (add_uevent_var(env, "OF_TYPE=%s", ofdev->node->type))
82 return -ENOMEM;
83
84 /* Since the compatible field can contain pretty much anything
85 * it's not really legal to split it out with commas. We split it
86 * up using a number of environment variables instead. */
87
88 compat = of_get_property(ofdev->node, "compatible", &cplen);
89 while (compat && *compat && cplen > 0) {
90 if (add_uevent_var(env, "OF_COMPATIBLE_%d=%s", seen, compat))
91 return -ENOMEM;
92
93 sl = strlen(compat) + 1;
94 compat += sl;
95 cplen -= sl;
96 seen++;
97 }
98
99 if (add_uevent_var(env, "OF_COMPATIBLE_N=%d", seen))
100 return -ENOMEM;
101
102 /* modalias is trickier, we add it in 2 steps */
103 if (add_uevent_var(env, "MODALIAS="))
104 return -ENOMEM;
105 sl = of_device_get_modalias(ofdev, &env->buf[env->buflen-1],
106 sizeof(env->buf) - env->buflen);
107 if (sl >= (sizeof(env->buf) - env->buflen))
108 return -ENOMEM;
109 env->buflen += sl;
110
111 return 0;
112}
113EXPORT_SYMBOL(of_device_uevent);
diff --git a/arch/microblaze/kernel/of_platform.c b/arch/microblaze/kernel/of_platform.c
new file mode 100644
index 000000000000..acf4574d0f18
--- /dev/null
+++ b/arch/microblaze/kernel/of_platform.c
@@ -0,0 +1,201 @@
1/*
2 * Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corp.
3 * <benh@kernel.crashing.org>
4 * and Arnd Bergmann, IBM Corp.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 *
11 */
12
13#undef DEBUG
14
15#include <linux/string.h>
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/module.h>
19#include <linux/mod_devicetable.h>
20#include <linux/slab.h>
21#include <linux/pci.h>
22#include <linux/of.h>
23#include <linux/of_device.h>
24#include <linux/of_platform.h>
25
26#include <linux/errno.h>
27#include <linux/topology.h>
28#include <asm/atomic.h>
29
30struct bus_type of_platform_bus_type = {
31 .uevent = of_device_uevent,
32};
33EXPORT_SYMBOL(of_platform_bus_type);
34
35static int __init of_bus_driver_init(void)
36{
37 return of_bus_type_init(&of_platform_bus_type, "of_platform");
38}
39postcore_initcall(of_bus_driver_init);
40
41struct of_device *of_platform_device_create(struct device_node *np,
42 const char *bus_id,
43 struct device *parent)
44{
45 struct of_device *dev;
46
47 dev = of_device_alloc(np, bus_id, parent);
48 if (!dev)
49 return NULL;
50
51 dev->dma_mask = 0xffffffffUL;
52 dev->dev.bus = &of_platform_bus_type;
53
54 /* We do not fill the DMA ops for platform devices by default.
55 * This is currently the responsibility of the platform code
56 * to do such, possibly using a device notifier
57 */
58
59 if (of_device_register(dev) != 0) {
60 of_device_free(dev);
61 return NULL;
62 }
63
64 return dev;
65}
66EXPORT_SYMBOL(of_platform_device_create);
67
68/**
69 * of_platform_bus_create - Create an OF device for a bus node and all its
70 * children. Optionally recursively instanciate matching busses.
71 * @bus: device node of the bus to instanciate
72 * @matches: match table, NULL to use the default, OF_NO_DEEP_PROBE to
73 * disallow recursive creation of child busses
74 */
75static int of_platform_bus_create(const struct device_node *bus,
76 const struct of_device_id *matches,
77 struct device *parent)
78{
79 struct device_node *child;
80 struct of_device *dev;
81 int rc = 0;
82
83 for_each_child_of_node(bus, child) {
84 pr_debug(" create child: %s\n", child->full_name);
85 dev = of_platform_device_create(child, NULL, parent);
86 if (dev == NULL)
87 rc = -ENOMEM;
88 else if (!of_match_node(matches, child))
89 continue;
90 if (rc == 0) {
91 pr_debug(" and sub busses\n");
92 rc = of_platform_bus_create(child, matches, &dev->dev);
93 }
94 if (rc) {
95 of_node_put(child);
96 break;
97 }
98 }
99 return rc;
100}
101
102
103/**
104 * of_platform_bus_probe - Probe the device-tree for platform busses
105 * @root: parent of the first level to probe or NULL for the root of the tree
106 * @matches: match table, NULL to use the default
107 * @parent: parent to hook devices from, NULL for toplevel
108 *
109 * Note that children of the provided root are not instanciated as devices
110 * unless the specified root itself matches the bus list and is not NULL.
111 */
112
113int of_platform_bus_probe(struct device_node *root,
114 const struct of_device_id *matches,
115 struct device *parent)
116{
117 struct device_node *child;
118 struct of_device *dev;
119 int rc = 0;
120
121 if (matches == NULL)
122 matches = of_default_bus_ids;
123 if (matches == OF_NO_DEEP_PROBE)
124 return -EINVAL;
125 if (root == NULL)
126 root = of_find_node_by_path("/");
127 else
128 of_node_get(root);
129
130 pr_debug("of_platform_bus_probe()\n");
131 pr_debug(" starting at: %s\n", root->full_name);
132
133 /* Do a self check of bus type, if there's a match, create
134 * children
135 */
136 if (of_match_node(matches, root)) {
137 pr_debug(" root match, create all sub devices\n");
138 dev = of_platform_device_create(root, NULL, parent);
139 if (dev == NULL) {
140 rc = -ENOMEM;
141 goto bail;
142 }
143 pr_debug(" create all sub busses\n");
144 rc = of_platform_bus_create(root, matches, &dev->dev);
145 goto bail;
146 }
147 for_each_child_of_node(root, child) {
148 if (!of_match_node(matches, child))
149 continue;
150
151 pr_debug(" match: %s\n", child->full_name);
152 dev = of_platform_device_create(child, NULL, parent);
153 if (dev == NULL)
154 rc = -ENOMEM;
155 else
156 rc = of_platform_bus_create(child, matches, &dev->dev);
157 if (rc) {
158 of_node_put(child);
159 break;
160 }
161 }
162 bail:
163 of_node_put(root);
164 return rc;
165}
166EXPORT_SYMBOL(of_platform_bus_probe);
167
168static int of_dev_node_match(struct device *dev, void *data)
169{
170 return to_of_device(dev)->node == data;
171}
172
173struct of_device *of_find_device_by_node(struct device_node *np)
174{
175 struct device *dev;
176
177 dev = bus_find_device(&of_platform_bus_type,
178 NULL, np, of_dev_node_match);
179 if (dev)
180 return to_of_device(dev);
181 return NULL;
182}
183EXPORT_SYMBOL(of_find_device_by_node);
184
185static int of_dev_phandle_match(struct device *dev, void *data)
186{
187 phandle *ph = data;
188 return to_of_device(dev)->node->linux_phandle == *ph;
189}
190
191struct of_device *of_find_device_by_phandle(phandle ph)
192{
193 struct device *dev;
194
195 dev = bus_find_device(&of_platform_bus_type,
196 NULL, &ph, of_dev_phandle_match);
197 if (dev)
198 return to_of_device(dev);
199 return NULL;
200}
201EXPORT_SYMBOL(of_find_device_by_phandle);
diff --git a/arch/microblaze/kernel/process.c b/arch/microblaze/kernel/process.c
new file mode 100644
index 000000000000..436f26ccbfa9
--- /dev/null
+++ b/arch/microblaze/kernel/process.c
@@ -0,0 +1,186 @@
1/*
2 * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
3 * Copyright (C) 2008-2009 PetaLogix
4 * Copyright (C) 2006 Atmark Techno, Inc.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/module.h>
12#include <linux/sched.h>
13#include <linux/pm.h>
14#include <linux/tick.h>
15#include <linux/bitops.h>
16#include <asm/system.h>
17#include <asm/pgalloc.h>
18
19void show_regs(struct pt_regs *regs)
20{
21 printk(KERN_INFO " Registers dump: mode=%X\r\n", regs->kernel_mode);
22 printk(KERN_INFO " r1=%08lX, r2=%08lX, r3=%08lX, r4=%08lX\n",
23 regs->r1, regs->r2, regs->r3, regs->r4);
24 printk(KERN_INFO " r5=%08lX, r6=%08lX, r7=%08lX, r8=%08lX\n",
25 regs->r5, regs->r6, regs->r7, regs->r8);
26 printk(KERN_INFO " r9=%08lX, r10=%08lX, r11=%08lX, r12=%08lX\n",
27 regs->r9, regs->r10, regs->r11, regs->r12);
28 printk(KERN_INFO " r13=%08lX, r14=%08lX, r15=%08lX, r16=%08lX\n",
29 regs->r13, regs->r14, regs->r15, regs->r16);
30 printk(KERN_INFO " r17=%08lX, r18=%08lX, r19=%08lX, r20=%08lX\n",
31 regs->r17, regs->r18, regs->r19, regs->r20);
32 printk(KERN_INFO " r21=%08lX, r22=%08lX, r23=%08lX, r24=%08lX\n",
33 regs->r21, regs->r22, regs->r23, regs->r24);
34 printk(KERN_INFO " r25=%08lX, r26=%08lX, r27=%08lX, r28=%08lX\n",
35 regs->r25, regs->r26, regs->r27, regs->r28);
36 printk(KERN_INFO " r29=%08lX, r30=%08lX, r31=%08lX, rPC=%08lX\n",
37 regs->r29, regs->r30, regs->r31, regs->pc);
38 printk(KERN_INFO " msr=%08lX, ear=%08lX, esr=%08lX, fsr=%08lX\n",
39 regs->msr, regs->ear, regs->esr, regs->fsr);
40 while (1)
41 ;
42}
43
44void (*pm_idle)(void);
45void (*pm_power_off)(void) = NULL;
46EXPORT_SYMBOL(pm_power_off);
47
48static int hlt_counter = 1;
49
50void disable_hlt(void)
51{
52 hlt_counter++;
53}
54EXPORT_SYMBOL(disable_hlt);
55
56void enable_hlt(void)
57{
58 hlt_counter--;
59}
60EXPORT_SYMBOL(enable_hlt);
61
62static int __init nohlt_setup(char *__unused)
63{
64 hlt_counter = 1;
65 return 1;
66}
67__setup("nohlt", nohlt_setup);
68
69static int __init hlt_setup(char *__unused)
70{
71 hlt_counter = 0;
72 return 1;
73}
74__setup("hlt", hlt_setup);
75
76void default_idle(void)
77{
78 if (!hlt_counter) {
79 clear_thread_flag(TIF_POLLING_NRFLAG);
80 smp_mb__after_clear_bit();
81 local_irq_disable();
82 while (!need_resched())
83 cpu_sleep();
84 local_irq_enable();
85 set_thread_flag(TIF_POLLING_NRFLAG);
86 } else
87 while (!need_resched())
88 cpu_relax();
89}
90
91void cpu_idle(void)
92{
93 set_thread_flag(TIF_POLLING_NRFLAG);
94
95 /* endless idle loop with no priority at all */
96 while (1) {
97 void (*idle)(void) = pm_idle;
98
99 if (!idle)
100 idle = default_idle;
101
102 tick_nohz_stop_sched_tick(1);
103 while (!need_resched())
104 idle();
105 tick_nohz_restart_sched_tick();
106
107 preempt_enable_no_resched();
108 schedule();
109 preempt_disable();
110 check_pgt_cache();
111 }
112}
113
114void flush_thread(void)
115{
116}
117
118int copy_thread(unsigned long clone_flags, unsigned long usp,
119 unsigned long unused,
120 struct task_struct *p, struct pt_regs *regs)
121{
122 struct pt_regs *childregs = task_pt_regs(p);
123 struct thread_info *ti = task_thread_info(p);
124
125 *childregs = *regs;
126 if (user_mode(regs))
127 childregs->r1 = usp;
128 else
129 childregs->r1 = ((unsigned long) ti) + THREAD_SIZE;
130
131 memset(&ti->cpu_context, 0, sizeof(struct cpu_context));
132 ti->cpu_context.r1 = (unsigned long)childregs;
133 ti->cpu_context.msr = (unsigned long)childregs->msr;
134 ti->cpu_context.r15 = (unsigned long)ret_from_fork - 8;
135
136 if (clone_flags & CLONE_SETTLS)
137 ;
138
139 return 0;
140}
141
142/*
143 * Return saved PC of a blocked thread.
144 */
145unsigned long thread_saved_pc(struct task_struct *tsk)
146{
147 struct cpu_context *ctx =
148 &(((struct thread_info *)(tsk->stack))->cpu_context);
149
150 /* Check whether the thread is blocked in resume() */
151 if (in_sched_functions(ctx->r15))
152 return (unsigned long)ctx->r15;
153 else
154 return ctx->r14;
155}
156
157static void kernel_thread_helper(int (*fn)(void *), void *arg)
158{
159 fn(arg);
160 do_exit(-1);
161}
162
163int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
164{
165 struct pt_regs regs;
166 int ret;
167
168 memset(&regs, 0, sizeof(regs));
169 /* store them in non-volatile registers */
170 regs.r5 = (unsigned long)fn;
171 regs.r6 = (unsigned long)arg;
172 local_save_flags(regs.msr);
173 regs.pc = (unsigned long)kernel_thread_helper;
174 regs.kernel_mode = 1;
175
176 ret = do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0,
177 &regs, 0, NULL, NULL);
178
179 return ret;
180}
181
182unsigned long get_wchan(struct task_struct *p)
183{
184/* TBD (used by procfs) */
185 return 0;
186}
diff --git a/arch/microblaze/kernel/prom.c b/arch/microblaze/kernel/prom.c
new file mode 100644
index 000000000000..34c48718061a
--- /dev/null
+++ b/arch/microblaze/kernel/prom.c
@@ -0,0 +1,1146 @@
1/*
2 * Procedures for creating, accessing and interpreting the device tree.
3 *
4 * Paul Mackerras August 1996.
5 * Copyright (C) 1996-2005 Paul Mackerras.
6 *
7 * Adapted for 64bit PowerPC by Dave Engebretsen and Peter Bergner.
8 * {engebret|bergner}@us.ibm.com
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version
13 * 2 of the License, or (at your option) any later version.
14 */
15
16#include <stdarg.h>
17#include <linux/kernel.h>
18#include <linux/string.h>
19#include <linux/init.h>
20#include <linux/threads.h>
21#include <linux/spinlock.h>
22#include <linux/types.h>
23#include <linux/pci.h>
24#include <linux/stringify.h>
25#include <linux/delay.h>
26#include <linux/initrd.h>
27#include <linux/bitops.h>
28#include <linux/module.h>
29#include <linux/kexec.h>
30#include <linux/debugfs.h>
31#include <linux/irq.h>
32#include <linux/lmb.h>
33
34#include <asm/prom.h>
35#include <asm/page.h>
36#include <asm/processor.h>
37#include <asm/irq.h>
38#include <linux/io.h>
39#include <asm/system.h>
40#include <asm/mmu.h>
41#include <asm/pgtable.h>
42#include <asm/sections.h>
43#include <asm/pci-bridge.h>
44
45static int __initdata dt_root_addr_cells;
46static int __initdata dt_root_size_cells;
47
48typedef u32 cell_t;
49
50static struct boot_param_header *initial_boot_params;
51
52/* export that to outside world */
53struct device_node *of_chosen;
54
55static inline char *find_flat_dt_string(u32 offset)
56{
57 return ((char *)initial_boot_params) +
58 initial_boot_params->off_dt_strings + offset;
59}
60
61/**
62 * This function is used to scan the flattened device-tree, it is
63 * used to extract the memory informations at boot before we can
64 * unflatten the tree
65 */
66int __init of_scan_flat_dt(int (*it)(unsigned long node,
67 const char *uname, int depth,
68 void *data),
69 void *data)
70{
71 unsigned long p = ((unsigned long)initial_boot_params) +
72 initial_boot_params->off_dt_struct;
73 int rc = 0;
74 int depth = -1;
75
76 do {
77 u32 tag = *((u32 *)p);
78 char *pathp;
79
80 p += 4;
81 if (tag == OF_DT_END_NODE) {
82 depth--;
83 continue;
84 }
85 if (tag == OF_DT_NOP)
86 continue;
87 if (tag == OF_DT_END)
88 break;
89 if (tag == OF_DT_PROP) {
90 u32 sz = *((u32 *)p);
91 p += 8;
92 if (initial_boot_params->version < 0x10)
93 p = _ALIGN(p, sz >= 8 ? 8 : 4);
94 p += sz;
95 p = _ALIGN(p, 4);
96 continue;
97 }
98 if (tag != OF_DT_BEGIN_NODE) {
99 printk(KERN_WARNING "Invalid tag %x scanning flattened"
100 " device tree !\n", tag);
101 return -EINVAL;
102 }
103 depth++;
104 pathp = (char *)p;
105 p = _ALIGN(p + strlen(pathp) + 1, 4);
106 if ((*pathp) == '/') {
107 char *lp, *np;
108 for (lp = NULL, np = pathp; *np; np++)
109 if ((*np) == '/')
110 lp = np+1;
111 if (lp != NULL)
112 pathp = lp;
113 }
114 rc = it(p, pathp, depth, data);
115 if (rc != 0)
116 break;
117 } while (1);
118
119 return rc;
120}
121
122unsigned long __init of_get_flat_dt_root(void)
123{
124 unsigned long p = ((unsigned long)initial_boot_params) +
125 initial_boot_params->off_dt_struct;
126
127 while (*((u32 *)p) == OF_DT_NOP)
128 p += 4;
129 BUG_ON(*((u32 *)p) != OF_DT_BEGIN_NODE);
130 p += 4;
131 return _ALIGN(p + strlen((char *)p) + 1, 4);
132}
133
134/**
135 * This function can be used within scan_flattened_dt callback to get
136 * access to properties
137 */
138void *__init of_get_flat_dt_prop(unsigned long node, const char *name,
139 unsigned long *size)
140{
141 unsigned long p = node;
142
143 do {
144 u32 tag = *((u32 *)p);
145 u32 sz, noff;
146 const char *nstr;
147
148 p += 4;
149 if (tag == OF_DT_NOP)
150 continue;
151 if (tag != OF_DT_PROP)
152 return NULL;
153
154 sz = *((u32 *)p);
155 noff = *((u32 *)(p + 4));
156 p += 8;
157 if (initial_boot_params->version < 0x10)
158 p = _ALIGN(p, sz >= 8 ? 8 : 4);
159
160 nstr = find_flat_dt_string(noff);
161 if (nstr == NULL) {
162 printk(KERN_WARNING "Can't find property index"
163 " name !\n");
164 return NULL;
165 }
166 if (strcmp(name, nstr) == 0) {
167 if (size)
168 *size = sz;
169 return (void *)p;
170 }
171 p += sz;
172 p = _ALIGN(p, 4);
173 } while (1);
174}
175
176int __init of_flat_dt_is_compatible(unsigned long node, const char *compat)
177{
178 const char *cp;
179 unsigned long cplen, l;
180
181 cp = of_get_flat_dt_prop(node, "compatible", &cplen);
182 if (cp == NULL)
183 return 0;
184 while (cplen > 0) {
185 if (strncasecmp(cp, compat, strlen(compat)) == 0)
186 return 1;
187 l = strlen(cp) + 1;
188 cp += l;
189 cplen -= l;
190 }
191
192 return 0;
193}
194
195static void *__init unflatten_dt_alloc(unsigned long *mem, unsigned long size,
196 unsigned long align)
197{
198 void *res;
199
200 *mem = _ALIGN(*mem, align);
201 res = (void *)*mem;
202 *mem += size;
203
204 return res;
205}
206
207static unsigned long __init unflatten_dt_node(unsigned long mem,
208 unsigned long *p,
209 struct device_node *dad,
210 struct device_node ***allnextpp,
211 unsigned long fpsize)
212{
213 struct device_node *np;
214 struct property *pp, **prev_pp = NULL;
215 char *pathp;
216 u32 tag;
217 unsigned int l, allocl;
218 int has_name = 0;
219 int new_format = 0;
220
221 tag = *((u32 *)(*p));
222 if (tag != OF_DT_BEGIN_NODE) {
223 printk("Weird tag at start of node: %x\n", tag);
224 return mem;
225 }
226 *p += 4;
227 pathp = (char *)*p;
228 l = allocl = strlen(pathp) + 1;
229 *p = _ALIGN(*p + l, 4);
230
231 /* version 0x10 has a more compact unit name here instead of the full
232 * path. we accumulate the full path size using "fpsize", we'll rebuild
233 * it later. We detect this because the first character of the name is
234 * not '/'.
235 */
236 if ((*pathp) != '/') {
237 new_format = 1;
238 if (fpsize == 0) {
239 /* root node: special case. fpsize accounts for path
240 * plus terminating zero. root node only has '/', so
241 * fpsize should be 2, but we want to avoid the first
242 * level nodes to have two '/' so we use fpsize 1 here
243 */
244 fpsize = 1;
245 allocl = 2;
246 } else {
247 /* account for '/' and path size minus terminal 0
248 * already in 'l'
249 */
250 fpsize += l;
251 allocl = fpsize;
252 }
253 }
254
255 np = unflatten_dt_alloc(&mem, sizeof(struct device_node) + allocl,
256 __alignof__(struct device_node));
257 if (allnextpp) {
258 memset(np, 0, sizeof(*np));
259 np->full_name = ((char *)np) + sizeof(struct device_node);
260 if (new_format) {
261 char *p2 = np->full_name;
262 /* rebuild full path for new format */
263 if (dad && dad->parent) {
264 strcpy(p2, dad->full_name);
265#ifdef DEBUG
266 if ((strlen(p2) + l + 1) != allocl) {
267 pr_debug("%s: p: %d, l: %d, a: %d\n",
268 pathp, (int)strlen(p2),
269 l, allocl);
270 }
271#endif
272 p2 += strlen(p2);
273 }
274 *(p2++) = '/';
275 memcpy(p2, pathp, l);
276 } else
277 memcpy(np->full_name, pathp, l);
278 prev_pp = &np->properties;
279 **allnextpp = np;
280 *allnextpp = &np->allnext;
281 if (dad != NULL) {
282 np->parent = dad;
283 /* we temporarily use the next field as `last_child'*/
284 if (dad->next == NULL)
285 dad->child = np;
286 else
287 dad->next->sibling = np;
288 dad->next = np;
289 }
290 kref_init(&np->kref);
291 }
292 while (1) {
293 u32 sz, noff;
294 char *pname;
295
296 tag = *((u32 *)(*p));
297 if (tag == OF_DT_NOP) {
298 *p += 4;
299 continue;
300 }
301 if (tag != OF_DT_PROP)
302 break;
303 *p += 4;
304 sz = *((u32 *)(*p));
305 noff = *((u32 *)((*p) + 4));
306 *p += 8;
307 if (initial_boot_params->version < 0x10)
308 *p = _ALIGN(*p, sz >= 8 ? 8 : 4);
309
310 pname = find_flat_dt_string(noff);
311 if (pname == NULL) {
312 printk(KERN_INFO
313 "Can't find property name in list !\n");
314 break;
315 }
316 if (strcmp(pname, "name") == 0)
317 has_name = 1;
318 l = strlen(pname) + 1;
319 pp = unflatten_dt_alloc(&mem, sizeof(struct property),
320 __alignof__(struct property));
321 if (allnextpp) {
322 if (strcmp(pname, "linux,phandle") == 0) {
323 np->node = *((u32 *)*p);
324 if (np->linux_phandle == 0)
325 np->linux_phandle = np->node;
326 }
327 if (strcmp(pname, "ibm,phandle") == 0)
328 np->linux_phandle = *((u32 *)*p);
329 pp->name = pname;
330 pp->length = sz;
331 pp->value = (void *)*p;
332 *prev_pp = pp;
333 prev_pp = &pp->next;
334 }
335 *p = _ALIGN((*p) + sz, 4);
336 }
337 /* with version 0x10 we may not have the name property, recreate
338 * it here from the unit name if absent
339 */
340 if (!has_name) {
341 char *p1 = pathp, *ps = pathp, *pa = NULL;
342 int sz;
343
344 while (*p1) {
345 if ((*p1) == '@')
346 pa = p1;
347 if ((*p1) == '/')
348 ps = p1 + 1;
349 p1++;
350 }
351 if (pa < ps)
352 pa = p1;
353 sz = (pa - ps) + 1;
354 pp = unflatten_dt_alloc(&mem, sizeof(struct property) + sz,
355 __alignof__(struct property));
356 if (allnextpp) {
357 pp->name = "name";
358 pp->length = sz;
359 pp->value = pp + 1;
360 *prev_pp = pp;
361 prev_pp = &pp->next;
362 memcpy(pp->value, ps, sz - 1);
363 ((char *)pp->value)[sz - 1] = 0;
364 pr_debug("fixed up name for %s -> %s\n", pathp,
365 (char *)pp->value);
366 }
367 }
368 if (allnextpp) {
369 *prev_pp = NULL;
370 np->name = of_get_property(np, "name", NULL);
371 np->type = of_get_property(np, "device_type", NULL);
372
373 if (!np->name)
374 np->name = "<NULL>";
375 if (!np->type)
376 np->type = "<NULL>";
377 }
378 while (tag == OF_DT_BEGIN_NODE) {
379 mem = unflatten_dt_node(mem, p, np, allnextpp, fpsize);
380 tag = *((u32 *)(*p));
381 }
382 if (tag != OF_DT_END_NODE) {
383 printk(KERN_INFO "Weird tag at end of node: %x\n", tag);
384 return mem;
385 }
386 *p += 4;
387 return mem;
388}
389
390/**
391 * unflattens the device-tree passed by the firmware, creating the
392 * tree of struct device_node. It also fills the "name" and "type"
393 * pointers of the nodes so the normal device-tree walking functions
394 * can be used (this used to be done by finish_device_tree)
395 */
396void __init unflatten_device_tree(void)
397{
398 unsigned long start, mem, size;
399 struct device_node **allnextp = &allnodes;
400
401 pr_debug(" -> unflatten_device_tree()\n");
402
403 /* First pass, scan for size */
404 start = ((unsigned long)initial_boot_params) +
405 initial_boot_params->off_dt_struct;
406 size = unflatten_dt_node(0, &start, NULL, NULL, 0);
407 size = (size | 3) + 1;
408
409 pr_debug(" size is %lx, allocating...\n", size);
410
411 /* Allocate memory for the expanded device tree */
412 mem = lmb_alloc(size + 4, __alignof__(struct device_node));
413 mem = (unsigned long) __va(mem);
414
415 ((u32 *)mem)[size / 4] = 0xdeadbeef;
416
417 pr_debug(" unflattening %lx...\n", mem);
418
419 /* Second pass, do actual unflattening */
420 start = ((unsigned long)initial_boot_params) +
421 initial_boot_params->off_dt_struct;
422 unflatten_dt_node(mem, &start, NULL, &allnextp, 0);
423 if (*((u32 *)start) != OF_DT_END)
424 printk(KERN_WARNING "Weird tag at end of tree: %08x\n",
425 *((u32 *)start));
426 if (((u32 *)mem)[size / 4] != 0xdeadbeef)
427 printk(KERN_WARNING "End of tree marker overwritten: %08x\n",
428 ((u32 *)mem)[size / 4]);
429 *allnextp = NULL;
430
431 /* Get pointer to OF "/chosen" node for use everywhere */
432 of_chosen = of_find_node_by_path("/chosen");
433 if (of_chosen == NULL)
434 of_chosen = of_find_node_by_path("/chosen@0");
435
436 pr_debug(" <- unflatten_device_tree()\n");
437}
438
439#define early_init_dt_scan_drconf_memory(node) 0
440
441static int __init early_init_dt_scan_cpus(unsigned long node,
442 const char *uname, int depth,
443 void *data)
444{
445 static int logical_cpuid;
446 char *type = of_get_flat_dt_prop(node, "device_type", NULL);
447 const u32 *intserv;
448 int i, nthreads;
449 int found = 0;
450
451 /* We are scanning "cpu" nodes only */
452 if (type == NULL || strcmp(type, "cpu") != 0)
453 return 0;
454
455 /* Get physical cpuid */
456 intserv = of_get_flat_dt_prop(node, "reg", NULL);
457 nthreads = 1;
458
459 /*
460 * Now see if any of these threads match our boot cpu.
461 * NOTE: This must match the parsing done in smp_setup_cpu_maps.
462 */
463 for (i = 0; i < nthreads; i++) {
464 /*
465 * version 2 of the kexec param format adds the phys cpuid of
466 * booted proc.
467 */
468 if (initial_boot_params && initial_boot_params->version >= 2) {
469 if (intserv[i] ==
470 initial_boot_params->boot_cpuid_phys) {
471 found = 1;
472 break;
473 }
474 } else {
475 /*
476 * Check if it's the boot-cpu, set it's hw index now,
477 * unfortunately this format did not support booting
478 * off secondary threads.
479 */
480 if (of_get_flat_dt_prop(node,
481 "linux,boot-cpu", NULL) != NULL) {
482 found = 1;
483 break;
484 }
485 }
486
487#ifdef CONFIG_SMP
488 /* logical cpu id is always 0 on UP kernels */
489 logical_cpuid++;
490#endif
491 }
492
493 if (found) {
494 pr_debug("boot cpu: logical %d physical %d\n", logical_cpuid,
495 intserv[i]);
496 boot_cpuid = logical_cpuid;
497 }
498
499 return 0;
500}
501
502#ifdef CONFIG_BLK_DEV_INITRD
503static void __init early_init_dt_check_for_initrd(unsigned long node)
504{
505 unsigned long l;
506 u32 *prop;
507
508 pr_debug("Looking for initrd properties... ");
509
510 prop = of_get_flat_dt_prop(node, "linux,initrd-start", &l);
511 if (prop) {
512 initrd_start = (unsigned long)__va(of_read_ulong(prop, l/4));
513
514 prop = of_get_flat_dt_prop(node, "linux,initrd-end", &l);
515 if (prop) {
516 initrd_end = (unsigned long)
517 __va(of_read_ulong(prop, l/4));
518 initrd_below_start_ok = 1;
519 } else {
520 initrd_start = 0;
521 }
522 }
523
524 pr_debug("initrd_start=0x%lx initrd_end=0x%lx\n",
525 initrd_start, initrd_end);
526}
527#else
528static inline void early_init_dt_check_for_initrd(unsigned long node)
529{
530}
531#endif /* CONFIG_BLK_DEV_INITRD */
532
533static int __init early_init_dt_scan_chosen(unsigned long node,
534 const char *uname, int depth, void *data)
535{
536 unsigned long l;
537 char *p;
538
539 pr_debug("search \"chosen\", depth: %d, uname: %s\n", depth, uname);
540
541 if (depth != 1 ||
542 (strcmp(uname, "chosen") != 0 &&
543 strcmp(uname, "chosen@0") != 0))
544 return 0;
545
546#ifdef CONFIG_KEXEC
547 lprop = (u64 *)of_get_flat_dt_prop(node,
548 "linux,crashkernel-base", NULL);
549 if (lprop)
550 crashk_res.start = *lprop;
551
552 lprop = (u64 *)of_get_flat_dt_prop(node,
553 "linux,crashkernel-size", NULL);
554 if (lprop)
555 crashk_res.end = crashk_res.start + *lprop - 1;
556#endif
557
558 early_init_dt_check_for_initrd(node);
559
560 /* Retreive command line */
561 p = of_get_flat_dt_prop(node, "bootargs", &l);
562 if (p != NULL && l > 0)
563 strlcpy(cmd_line, p, min((int)l, COMMAND_LINE_SIZE));
564
565#ifdef CONFIG_CMDLINE
566 if (p == NULL || l == 0 || (l == 1 && (*p) == 0))
567 strlcpy(cmd_line, CONFIG_CMDLINE, COMMAND_LINE_SIZE);
568#endif /* CONFIG_CMDLINE */
569
570 pr_debug("Command line is: %s\n", cmd_line);
571
572 /* break now */
573 return 1;
574}
575
576static int __init early_init_dt_scan_root(unsigned long node,
577 const char *uname, int depth, void *data)
578{
579 u32 *prop;
580
581 if (depth != 0)
582 return 0;
583
584 prop = of_get_flat_dt_prop(node, "#size-cells", NULL);
585 dt_root_size_cells = (prop == NULL) ? 1 : *prop;
586 pr_debug("dt_root_size_cells = %x\n", dt_root_size_cells);
587
588 prop = of_get_flat_dt_prop(node, "#address-cells", NULL);
589 dt_root_addr_cells = (prop == NULL) ? 2 : *prop;
590 pr_debug("dt_root_addr_cells = %x\n", dt_root_addr_cells);
591
592 /* break now */
593 return 1;
594}
595
596static u64 __init dt_mem_next_cell(int s, cell_t **cellp)
597{
598 cell_t *p = *cellp;
599
600 *cellp = p + s;
601 return of_read_number(p, s);
602}
603
604static int __init early_init_dt_scan_memory(unsigned long node,
605 const char *uname, int depth, void *data)
606{
607 char *type = of_get_flat_dt_prop(node, "device_type", NULL);
608 cell_t *reg, *endp;
609 unsigned long l;
610
611 /* Look for the ibm,dynamic-reconfiguration-memory node */
612/* if (depth == 1 &&
613 strcmp(uname, "ibm,dynamic-reconfiguration-memory") == 0)
614 return early_init_dt_scan_drconf_memory(node);
615*/
616 /* We are scanning "memory" nodes only */
617 if (type == NULL) {
618 /*
619 * The longtrail doesn't have a device_type on the
620 * /memory node, so look for the node called /memory@0.
621 */
622 if (depth != 1 || strcmp(uname, "memory@0") != 0)
623 return 0;
624 } else if (strcmp(type, "memory") != 0)
625 return 0;
626
627 reg = (cell_t *)of_get_flat_dt_prop(node, "linux,usable-memory", &l);
628 if (reg == NULL)
629 reg = (cell_t *)of_get_flat_dt_prop(node, "reg", &l);
630 if (reg == NULL)
631 return 0;
632
633 endp = reg + (l / sizeof(cell_t));
634
635 pr_debug("memory scan node %s, reg size %ld, data: %x %x %x %x,\n",
636 uname, l, reg[0], reg[1], reg[2], reg[3]);
637
638 while ((endp - reg) >= (dt_root_addr_cells + dt_root_size_cells)) {
639 u64 base, size;
640
641 base = dt_mem_next_cell(dt_root_addr_cells, &reg);
642 size = dt_mem_next_cell(dt_root_size_cells, &reg);
643
644 if (size == 0)
645 continue;
646 pr_debug(" - %llx , %llx\n", (unsigned long long)base,
647 (unsigned long long)size);
648
649 lmb_add(base, size);
650 }
651 return 0;
652}
653
654#ifdef CONFIG_PHYP_DUMP
655/**
656 * phyp_dump_calculate_reserve_size() - reserve variable boot area 5% or arg
657 *
658 * Function to find the largest size we need to reserve
659 * during early boot process.
660 *
661 * It either looks for boot param and returns that OR
662 * returns larger of 256 or 5% rounded down to multiples of 256MB.
663 *
664 */
665static inline unsigned long phyp_dump_calculate_reserve_size(void)
666{
667 unsigned long tmp;
668
669 if (phyp_dump_info->reserve_bootvar)
670 return phyp_dump_info->reserve_bootvar;
671
672 /* divide by 20 to get 5% of value */
673 tmp = lmb_end_of_DRAM();
674 do_div(tmp, 20);
675
676 /* round it down in multiples of 256 */
677 tmp = tmp & ~0x0FFFFFFFUL;
678
679 return (tmp > PHYP_DUMP_RMR_END ? tmp : PHYP_DUMP_RMR_END);
680}
681
682/**
683 * phyp_dump_reserve_mem() - reserve all not-yet-dumped mmemory
684 *
685 * This routine may reserve memory regions in the kernel only
686 * if the system is supported and a dump was taken in last
687 * boot instance or if the hardware is supported and the
688 * scratch area needs to be setup. In other instances it returns
689 * without reserving anything. The memory in case of dump being
690 * active is freed when the dump is collected (by userland tools).
691 */
692static void __init phyp_dump_reserve_mem(void)
693{
694 unsigned long base, size;
695 unsigned long variable_reserve_size;
696
697 if (!phyp_dump_info->phyp_dump_configured) {
698 printk(KERN_ERR "Phyp-dump not supported on this hardware\n");
699 return;
700 }
701
702 if (!phyp_dump_info->phyp_dump_at_boot) {
703 printk(KERN_INFO "Phyp-dump disabled at boot time\n");
704 return;
705 }
706
707 variable_reserve_size = phyp_dump_calculate_reserve_size();
708
709 if (phyp_dump_info->phyp_dump_is_active) {
710 /* Reserve *everything* above RMR.Area freed by userland tools*/
711 base = variable_reserve_size;
712 size = lmb_end_of_DRAM() - base;
713
714 /* XXX crashed_ram_end is wrong, since it may be beyond
715 * the memory_limit, it will need to be adjusted. */
716 lmb_reserve(base, size);
717
718 phyp_dump_info->init_reserve_start = base;
719 phyp_dump_info->init_reserve_size = size;
720 } else {
721 size = phyp_dump_info->cpu_state_size +
722 phyp_dump_info->hpte_region_size +
723 variable_reserve_size;
724 base = lmb_end_of_DRAM() - size;
725 lmb_reserve(base, size);
726 phyp_dump_info->init_reserve_start = base;
727 phyp_dump_info->init_reserve_size = size;
728 }
729}
730#else
731static inline void __init phyp_dump_reserve_mem(void) {}
732#endif /* CONFIG_PHYP_DUMP && CONFIG_PPC_RTAS */
733
734#ifdef CONFIG_EARLY_PRINTK
735/* MS this is Microblaze specifig function */
736static int __init early_init_dt_scan_serial(unsigned long node,
737 const char *uname, int depth, void *data)
738{
739 unsigned long l;
740 char *p;
741 int *addr;
742
743 pr_debug("search \"chosen\", depth: %d, uname: %s\n", depth, uname);
744
745/* find all serial nodes */
746 if (strncmp(uname, "serial", 6) != 0)
747 return 0;
748
749 early_init_dt_check_for_initrd(node);
750
751/* find compatible node with uartlite */
752 p = of_get_flat_dt_prop(node, "compatible", &l);
753 if ((strncmp(p, "xlnx,xps-uartlite", 17) != 0) &&
754 (strncmp(p, "xlnx,opb-uartlite", 17) != 0))
755 return 0;
756
757 addr = of_get_flat_dt_prop(node, "reg", &l);
758 return *addr; /* return address */
759}
760
761/* this function is looking for early uartlite console - Microblaze specific */
762int __init early_uartlite_console(void)
763{
764 return of_scan_flat_dt(early_init_dt_scan_serial, NULL);
765}
766#endif
767
768void __init early_init_devtree(void *params)
769{
770 pr_debug(" -> early_init_devtree(%p)\n", params);
771
772 /* Setup flat device-tree pointer */
773 initial_boot_params = params;
774
775#ifdef CONFIG_PHYP_DUMP
776 /* scan tree to see if dump occured during last boot */
777 of_scan_flat_dt(early_init_dt_scan_phyp_dump, NULL);
778#endif
779
780 /* Retrieve various informations from the /chosen node of the
781 * device-tree, including the platform type, initrd location and
782 * size, TCE reserve, and more ...
783 */
784 of_scan_flat_dt(early_init_dt_scan_chosen, NULL);
785
786 /* Scan memory nodes and rebuild LMBs */
787 lmb_init();
788 of_scan_flat_dt(early_init_dt_scan_root, NULL);
789 of_scan_flat_dt(early_init_dt_scan_memory, NULL);
790
791 /* Save command line for /proc/cmdline and then parse parameters */
792 strlcpy(boot_command_line, cmd_line, COMMAND_LINE_SIZE);
793 parse_early_param();
794
795 lmb_analyze();
796
797 pr_debug("Phys. mem: %lx\n", (unsigned long) lmb_phys_mem_size());
798
799 pr_debug("Scanning CPUs ...\n");
800
801 /* Retreive CPU related informations from the flat tree
802 * (altivec support, boot CPU ID, ...)
803 */
804 of_scan_flat_dt(early_init_dt_scan_cpus, NULL);
805
806 pr_debug(" <- early_init_devtree()\n");
807}
808
809/**
810 * Indicates whether the root node has a given value in its
811 * compatible property.
812 */
813int machine_is_compatible(const char *compat)
814{
815 struct device_node *root;
816 int rc = 0;
817
818 root = of_find_node_by_path("/");
819 if (root) {
820 rc = of_device_is_compatible(root, compat);
821 of_node_put(root);
822 }
823 return rc;
824}
825EXPORT_SYMBOL(machine_is_compatible);
826
827/*******
828 *
829 * New implementation of the OF "find" APIs, return a refcounted
830 * object, call of_node_put() when done. The device tree and list
831 * are protected by a rw_lock.
832 *
833 * Note that property management will need some locking as well,
834 * this isn't dealt with yet.
835 *
836 *******/
837
838/**
839 * of_find_node_by_phandle - Find a node given a phandle
840 * @handle: phandle of the node to find
841 *
842 * Returns a node pointer with refcount incremented, use
843 * of_node_put() on it when done.
844 */
845struct device_node *of_find_node_by_phandle(phandle handle)
846{
847 struct device_node *np;
848
849 read_lock(&devtree_lock);
850 for (np = allnodes; np != NULL; np = np->allnext)
851 if (np->linux_phandle == handle)
852 break;
853 of_node_get(np);
854 read_unlock(&devtree_lock);
855 return np;
856}
857EXPORT_SYMBOL(of_find_node_by_phandle);
858
859/**
860 * of_find_all_nodes - Get next node in global list
861 * @prev: Previous node or NULL to start iteration
862 * of_node_put() will be called on it
863 *
864 * Returns a node pointer with refcount incremented, use
865 * of_node_put() on it when done.
866 */
867struct device_node *of_find_all_nodes(struct device_node *prev)
868{
869 struct device_node *np;
870
871 read_lock(&devtree_lock);
872 np = prev ? prev->allnext : allnodes;
873 for (; np != NULL; np = np->allnext)
874 if (of_node_get(np))
875 break;
876 of_node_put(prev);
877 read_unlock(&devtree_lock);
878 return np;
879}
880EXPORT_SYMBOL(of_find_all_nodes);
881
882/**
883 * of_node_get - Increment refcount of a node
884 * @node: Node to inc refcount, NULL is supported to
885 * simplify writing of callers
886 *
887 * Returns node.
888 */
889struct device_node *of_node_get(struct device_node *node)
890{
891 if (node)
892 kref_get(&node->kref);
893 return node;
894}
895EXPORT_SYMBOL(of_node_get);
896
897static inline struct device_node *kref_to_device_node(struct kref *kref)
898{
899 return container_of(kref, struct device_node, kref);
900}
901
902/**
903 * of_node_release - release a dynamically allocated node
904 * @kref: kref element of the node to be released
905 *
906 * In of_node_put() this function is passed to kref_put()
907 * as the destructor.
908 */
909static void of_node_release(struct kref *kref)
910{
911 struct device_node *node = kref_to_device_node(kref);
912 struct property *prop = node->properties;
913
914 /* We should never be releasing nodes that haven't been detached. */
915 if (!of_node_check_flag(node, OF_DETACHED)) {
916 printk(KERN_INFO "WARNING: Bad of_node_put() on %s\n",
917 node->full_name);
918 dump_stack();
919 kref_init(&node->kref);
920 return;
921 }
922
923 if (!of_node_check_flag(node, OF_DYNAMIC))
924 return;
925
926 while (prop) {
927 struct property *next = prop->next;
928 kfree(prop->name);
929 kfree(prop->value);
930 kfree(prop);
931 prop = next;
932
933 if (!prop) {
934 prop = node->deadprops;
935 node->deadprops = NULL;
936 }
937 }
938 kfree(node->full_name);
939 kfree(node->data);
940 kfree(node);
941}
942
943/**
944 * of_node_put - Decrement refcount of a node
945 * @node: Node to dec refcount, NULL is supported to
946 * simplify writing of callers
947 *
948 */
949void of_node_put(struct device_node *node)
950{
951 if (node)
952 kref_put(&node->kref, of_node_release);
953}
954EXPORT_SYMBOL(of_node_put);
955
956/*
957 * Plug a device node into the tree and global list.
958 */
959void of_attach_node(struct device_node *np)
960{
961 unsigned long flags;
962
963 write_lock_irqsave(&devtree_lock, flags);
964 np->sibling = np->parent->child;
965 np->allnext = allnodes;
966 np->parent->child = np;
967 allnodes = np;
968 write_unlock_irqrestore(&devtree_lock, flags);
969}
970
971/*
972 * "Unplug" a node from the device tree. The caller must hold
973 * a reference to the node. The memory associated with the node
974 * is not freed until its refcount goes to zero.
975 */
976void of_detach_node(struct device_node *np)
977{
978 struct device_node *parent;
979 unsigned long flags;
980
981 write_lock_irqsave(&devtree_lock, flags);
982
983 parent = np->parent;
984 if (!parent)
985 goto out_unlock;
986
987 if (allnodes == np)
988 allnodes = np->allnext;
989 else {
990 struct device_node *prev;
991 for (prev = allnodes;
992 prev->allnext != np;
993 prev = prev->allnext)
994 ;
995 prev->allnext = np->allnext;
996 }
997
998 if (parent->child == np)
999 parent->child = np->sibling;
1000 else {
1001 struct device_node *prevsib;
1002 for (prevsib = np->parent->child;
1003 prevsib->sibling != np;
1004 prevsib = prevsib->sibling)
1005 ;
1006 prevsib->sibling = np->sibling;
1007 }
1008
1009 of_node_set_flag(np, OF_DETACHED);
1010
1011out_unlock:
1012 write_unlock_irqrestore(&devtree_lock, flags);
1013}
1014
1015/*
1016 * Add a property to a node
1017 */
1018int prom_add_property(struct device_node *np, struct property *prop)
1019{
1020 struct property **next;
1021 unsigned long flags;
1022
1023 prop->next = NULL;
1024 write_lock_irqsave(&devtree_lock, flags);
1025 next = &np->properties;
1026 while (*next) {
1027 if (strcmp(prop->name, (*next)->name) == 0) {
1028 /* duplicate ! don't insert it */
1029 write_unlock_irqrestore(&devtree_lock, flags);
1030 return -1;
1031 }
1032 next = &(*next)->next;
1033 }
1034 *next = prop;
1035 write_unlock_irqrestore(&devtree_lock, flags);
1036
1037#ifdef CONFIG_PROC_DEVICETREE
1038 /* try to add to proc as well if it was initialized */
1039 if (np->pde)
1040 proc_device_tree_add_prop(np->pde, prop);
1041#endif /* CONFIG_PROC_DEVICETREE */
1042
1043 return 0;
1044}
1045
1046/*
1047 * Remove a property from a node. Note that we don't actually
1048 * remove it, since we have given out who-knows-how-many pointers
1049 * to the data using get-property. Instead we just move the property
1050 * to the "dead properties" list, so it won't be found any more.
1051 */
1052int prom_remove_property(struct device_node *np, struct property *prop)
1053{
1054 struct property **next;
1055 unsigned long flags;
1056 int found = 0;
1057
1058 write_lock_irqsave(&devtree_lock, flags);
1059 next = &np->properties;
1060 while (*next) {
1061 if (*next == prop) {
1062 /* found the node */
1063 *next = prop->next;
1064 prop->next = np->deadprops;
1065 np->deadprops = prop;
1066 found = 1;
1067 break;
1068 }
1069 next = &(*next)->next;
1070 }
1071 write_unlock_irqrestore(&devtree_lock, flags);
1072
1073 if (!found)
1074 return -ENODEV;
1075
1076#ifdef CONFIG_PROC_DEVICETREE
1077 /* try to remove the proc node as well */
1078 if (np->pde)
1079 proc_device_tree_remove_prop(np->pde, prop);
1080#endif /* CONFIG_PROC_DEVICETREE */
1081
1082 return 0;
1083}
1084
1085/*
1086 * Update a property in a node. Note that we don't actually
1087 * remove it, since we have given out who-knows-how-many pointers
1088 * to the data using get-property. Instead we just move the property
1089 * to the "dead properties" list, and add the new property to the
1090 * property list
1091 */
1092int prom_update_property(struct device_node *np,
1093 struct property *newprop,
1094 struct property *oldprop)
1095{
1096 struct property **next;
1097 unsigned long flags;
1098 int found = 0;
1099
1100 write_lock_irqsave(&devtree_lock, flags);
1101 next = &np->properties;
1102 while (*next) {
1103 if (*next == oldprop) {
1104 /* found the node */
1105 newprop->next = oldprop->next;
1106 *next = newprop;
1107 oldprop->next = np->deadprops;
1108 np->deadprops = oldprop;
1109 found = 1;
1110 break;
1111 }
1112 next = &(*next)->next;
1113 }
1114 write_unlock_irqrestore(&devtree_lock, flags);
1115
1116 if (!found)
1117 return -ENODEV;
1118
1119#ifdef CONFIG_PROC_DEVICETREE
1120 /* try to add to proc as well if it was initialized */
1121 if (np->pde)
1122 proc_device_tree_update_prop(np->pde, newprop, oldprop);
1123#endif /* CONFIG_PROC_DEVICETREE */
1124
1125 return 0;
1126}
1127
1128#if defined(CONFIG_DEBUG_FS) && defined(DEBUG)
1129static struct debugfs_blob_wrapper flat_dt_blob;
1130
1131static int __init export_flat_device_tree(void)
1132{
1133 struct dentry *d;
1134
1135 flat_dt_blob.data = initial_boot_params;
1136 flat_dt_blob.size = initial_boot_params->totalsize;
1137
1138 d = debugfs_create_blob("flat-device-tree", S_IFREG | S_IRUSR,
1139 of_debugfs_root, &flat_dt_blob);
1140 if (!d)
1141 return 1;
1142
1143 return 0;
1144}
1145device_initcall(export_flat_device_tree);
1146#endif
diff --git a/arch/microblaze/kernel/prom_parse.c b/arch/microblaze/kernel/prom_parse.c
new file mode 100644
index 000000000000..ae0352ecd5a9
--- /dev/null
+++ b/arch/microblaze/kernel/prom_parse.c
@@ -0,0 +1,1025 @@
1#undef DEBUG
2
3#include <linux/kernel.h>
4#include <linux/string.h>
5#include <linux/pci_regs.h>
6#include <linux/module.h>
7#include <linux/ioport.h>
8#include <linux/etherdevice.h>
9#include <asm/prom.h>
10#include <asm/pci-bridge.h>
11
12#define PRu64 "%llx"
13
14/* Max address size we deal with */
15#define OF_MAX_ADDR_CELLS 4
16#define OF_CHECK_COUNTS(na, ns) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS && \
17 (ns) > 0)
18
19static struct of_bus *of_match_bus(struct device_node *np);
20static int __of_address_to_resource(struct device_node *dev,
21 const u32 *addrp, u64 size, unsigned int flags,
22 struct resource *r);
23
24/* Debug utility */
25#ifdef DEBUG
26static void of_dump_addr(const char *s, const u32 *addr, int na)
27{
28 printk(KERN_INFO "%s", s);
29 while (na--)
30 printk(KERN_INFO " %08x", *(addr++));
31 printk(KERN_INFO "\n");
32}
33#else
34static void of_dump_addr(const char *s, const u32 *addr, int na) { }
35#endif
36
37/* Callbacks for bus specific translators */
38struct of_bus {
39 const char *name;
40 const char *addresses;
41 int (*match)(struct device_node *parent);
42 void (*count_cells)(struct device_node *child,
43 int *addrc, int *sizec);
44 u64 (*map)(u32 *addr, const u32 *range,
45 int na, int ns, int pna);
46 int (*translate)(u32 *addr, u64 offset, int na);
47 unsigned int (*get_flags)(const u32 *addr);
48};
49
50/*
51 * Default translator (generic bus)
52 */
53
54static void of_bus_default_count_cells(struct device_node *dev,
55 int *addrc, int *sizec)
56{
57 if (addrc)
58 *addrc = of_n_addr_cells(dev);
59 if (sizec)
60 *sizec = of_n_size_cells(dev);
61}
62
63static u64 of_bus_default_map(u32 *addr, const u32 *range,
64 int na, int ns, int pna)
65{
66 u64 cp, s, da;
67
68 cp = of_read_number(range, na);
69 s = of_read_number(range + na + pna, ns);
70 da = of_read_number(addr, na);
71
72 pr_debug("OF: default map, cp="PRu64", s="PRu64", da="PRu64"\n",
73 cp, s, da);
74
75 if (da < cp || da >= (cp + s))
76 return OF_BAD_ADDR;
77 return da - cp;
78}
79
80static int of_bus_default_translate(u32 *addr, u64 offset, int na)
81{
82 u64 a = of_read_number(addr, na);
83 memset(addr, 0, na * 4);
84 a += offset;
85 if (na > 1)
86 addr[na - 2] = a >> 32;
87 addr[na - 1] = a & 0xffffffffu;
88
89 return 0;
90}
91
92static unsigned int of_bus_default_get_flags(const u32 *addr)
93{
94 return IORESOURCE_MEM;
95}
96
97#ifdef CONFIG_PCI
98/*
99 * PCI bus specific translator
100 */
101
102static int of_bus_pci_match(struct device_node *np)
103{
104 /* "vci" is for the /chaos bridge on 1st-gen PCI powermacs */
105 return !strcmp(np->type, "pci") || !strcmp(np->type, "vci");
106}
107
108static void of_bus_pci_count_cells(struct device_node *np,
109 int *addrc, int *sizec)
110{
111 if (addrc)
112 *addrc = 3;
113 if (sizec)
114 *sizec = 2;
115}
116
117static u64 of_bus_pci_map(u32 *addr, const u32 *range, int na, int ns, int pna)
118{
119 u64 cp, s, da;
120
121 /* Check address type match */
122 if ((addr[0] ^ range[0]) & 0x03000000)
123 return OF_BAD_ADDR;
124
125 /* Read address values, skipping high cell */
126 cp = of_read_number(range + 1, na - 1);
127 s = of_read_number(range + na + pna, ns);
128 da = of_read_number(addr + 1, na - 1);
129
130 pr_debug("OF: PCI map, cp="PRu64", s="PRu64", da="PRu64"\n", cp, s, da);
131
132 if (da < cp || da >= (cp + s))
133 return OF_BAD_ADDR;
134 return da - cp;
135}
136
137static int of_bus_pci_translate(u32 *addr, u64 offset, int na)
138{
139 return of_bus_default_translate(addr + 1, offset, na - 1);
140}
141
142static unsigned int of_bus_pci_get_flags(const u32 *addr)
143{
144 unsigned int flags = 0;
145 u32 w = addr[0];
146
147 switch ((w >> 24) & 0x03) {
148 case 0x01:
149 flags |= IORESOURCE_IO;
150 break;
151 case 0x02: /* 32 bits */
152 case 0x03: /* 64 bits */
153 flags |= IORESOURCE_MEM;
154 break;
155 }
156 if (w & 0x40000000)
157 flags |= IORESOURCE_PREFETCH;
158 return flags;
159}
160
161const u32 *of_get_pci_address(struct device_node *dev, int bar_no, u64 *size,
162 unsigned int *flags)
163{
164 const u32 *prop;
165 unsigned int psize;
166 struct device_node *parent;
167 struct of_bus *bus;
168 int onesize, i, na, ns;
169
170 /* Get parent & match bus type */
171 parent = of_get_parent(dev);
172 if (parent == NULL)
173 return NULL;
174 bus = of_match_bus(parent);
175 if (strcmp(bus->name, "pci")) {
176 of_node_put(parent);
177 return NULL;
178 }
179 bus->count_cells(dev, &na, &ns);
180 of_node_put(parent);
181 if (!OF_CHECK_COUNTS(na, ns))
182 return NULL;
183
184 /* Get "reg" or "assigned-addresses" property */
185 prop = of_get_property(dev, bus->addresses, &psize);
186 if (prop == NULL)
187 return NULL;
188 psize /= 4;
189
190 onesize = na + ns;
191 for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++)
192 if ((prop[0] & 0xff) == ((bar_no * 4) + PCI_BASE_ADDRESS_0)) {
193 if (size)
194 *size = of_read_number(prop + na, ns);
195 if (flags)
196 *flags = bus->get_flags(prop);
197 return prop;
198 }
199 return NULL;
200}
201EXPORT_SYMBOL(of_get_pci_address);
202
203int of_pci_address_to_resource(struct device_node *dev, int bar,
204 struct resource *r)
205{
206 const u32 *addrp;
207 u64 size;
208 unsigned int flags;
209
210 addrp = of_get_pci_address(dev, bar, &size, &flags);
211 if (addrp == NULL)
212 return -EINVAL;
213 return __of_address_to_resource(dev, addrp, size, flags, r);
214}
215EXPORT_SYMBOL_GPL(of_pci_address_to_resource);
216
217static u8 of_irq_pci_swizzle(u8 slot, u8 pin)
218{
219 return (((pin - 1) + slot) % 4) + 1;
220}
221
222int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq)
223{
224 struct device_node *dn, *ppnode;
225 struct pci_dev *ppdev;
226 u32 lspec;
227 u32 laddr[3];
228 u8 pin;
229 int rc;
230
231 /* Check if we have a device node, if yes, fallback to standard OF
232 * parsing
233 */
234 dn = pci_device_to_OF_node(pdev);
235 if (dn)
236 return of_irq_map_one(dn, 0, out_irq);
237
238 /* Ok, we don't, time to have fun. Let's start by building up an
239 * interrupt spec. we assume #interrupt-cells is 1, which is standard
240 * for PCI. If you do different, then don't use that routine.
241 */
242 rc = pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pin);
243 if (rc != 0)
244 return rc;
245 /* No pin, exit */
246 if (pin == 0)
247 return -ENODEV;
248
249 /* Now we walk up the PCI tree */
250 lspec = pin;
251 for (;;) {
252 /* Get the pci_dev of our parent */
253 ppdev = pdev->bus->self;
254
255 /* Ouch, it's a host bridge... */
256 if (ppdev == NULL) {
257 struct pci_controller *host;
258 host = pci_bus_to_host(pdev->bus);
259 ppnode = host ? host->arch_data : NULL;
260 /* No node for host bridge ? give up */
261 if (ppnode == NULL)
262 return -EINVAL;
263 } else
264 /* We found a P2P bridge, check if it has a node */
265 ppnode = pci_device_to_OF_node(ppdev);
266
267 /* Ok, we have found a parent with a device-node, hand over to
268 * the OF parsing code.
269 * We build a unit address from the linux device to be used for
270 * resolution. Note that we use the linux bus number which may
271 * not match your firmware bus numbering.
272 * Fortunately, in most cases, interrupt-map-mask doesn't
273 * include the bus number as part of the matching.
274 * You should still be careful about that though if you intend
275 * to rely on this function (you ship a firmware that doesn't
276 * create device nodes for all PCI devices).
277 */
278 if (ppnode)
279 break;
280
281 /* We can only get here if we hit a P2P bridge with no node,
282 * let's do standard swizzling and try again
283 */
284 lspec = of_irq_pci_swizzle(PCI_SLOT(pdev->devfn), lspec);
285 pdev = ppdev;
286 }
287
288 laddr[0] = (pdev->bus->number << 16)
289 | (pdev->devfn << 8);
290 laddr[1] = laddr[2] = 0;
291 return of_irq_map_raw(ppnode, &lspec, 1, laddr, out_irq);
292}
293EXPORT_SYMBOL_GPL(of_irq_map_pci);
294#endif /* CONFIG_PCI */
295
296/*
297 * ISA bus specific translator
298 */
299
300static int of_bus_isa_match(struct device_node *np)
301{
302 return !strcmp(np->name, "isa");
303}
304
305static void of_bus_isa_count_cells(struct device_node *child,
306 int *addrc, int *sizec)
307{
308 if (addrc)
309 *addrc = 2;
310 if (sizec)
311 *sizec = 1;
312}
313
314static u64 of_bus_isa_map(u32 *addr, const u32 *range, int na, int ns, int pna)
315{
316 u64 cp, s, da;
317
318 /* Check address type match */
319 if ((addr[0] ^ range[0]) & 0x00000001)
320 return OF_BAD_ADDR;
321
322 /* Read address values, skipping high cell */
323 cp = of_read_number(range + 1, na - 1);
324 s = of_read_number(range + na + pna, ns);
325 da = of_read_number(addr + 1, na - 1);
326
327 pr_debug("OF: ISA map, cp="PRu64", s="PRu64", da="PRu64"\n", cp, s, da);
328
329 if (da < cp || da >= (cp + s))
330 return OF_BAD_ADDR;
331 return da - cp;
332}
333
334static int of_bus_isa_translate(u32 *addr, u64 offset, int na)
335{
336 return of_bus_default_translate(addr + 1, offset, na - 1);
337}
338
339static unsigned int of_bus_isa_get_flags(const u32 *addr)
340{
341 unsigned int flags = 0;
342 u32 w = addr[0];
343
344 if (w & 1)
345 flags |= IORESOURCE_IO;
346 else
347 flags |= IORESOURCE_MEM;
348 return flags;
349}
350
351/*
352 * Array of bus specific translators
353 */
354
355static struct of_bus of_busses[] = {
356#ifdef CONFIG_PCI
357 /* PCI */
358 {
359 .name = "pci",
360 .addresses = "assigned-addresses",
361 .match = of_bus_pci_match,
362 .count_cells = of_bus_pci_count_cells,
363 .map = of_bus_pci_map,
364 .translate = of_bus_pci_translate,
365 .get_flags = of_bus_pci_get_flags,
366 },
367#endif /* CONFIG_PCI */
368 /* ISA */
369 {
370 .name = "isa",
371 .addresses = "reg",
372 .match = of_bus_isa_match,
373 .count_cells = of_bus_isa_count_cells,
374 .map = of_bus_isa_map,
375 .translate = of_bus_isa_translate,
376 .get_flags = of_bus_isa_get_flags,
377 },
378 /* Default */
379 {
380 .name = "default",
381 .addresses = "reg",
382 .match = NULL,
383 .count_cells = of_bus_default_count_cells,
384 .map = of_bus_default_map,
385 .translate = of_bus_default_translate,
386 .get_flags = of_bus_default_get_flags,
387 },
388};
389
390static struct of_bus *of_match_bus(struct device_node *np)
391{
392 int i;
393
394 for (i = 0; i < ARRAY_SIZE(of_busses); i++)
395 if (!of_busses[i].match || of_busses[i].match(np))
396 return &of_busses[i];
397 BUG();
398 return NULL;
399}
400
401static int of_translate_one(struct device_node *parent, struct of_bus *bus,
402 struct of_bus *pbus, u32 *addr,
403 int na, int ns, int pna)
404{
405 const u32 *ranges;
406 unsigned int rlen;
407 int rone;
408 u64 offset = OF_BAD_ADDR;
409
410 /* Normally, an absence of a "ranges" property means we are
411 * crossing a non-translatable boundary, and thus the addresses
412 * below the current not cannot be converted to CPU physical ones.
413 * Unfortunately, while this is very clear in the spec, it's not
414 * what Apple understood, and they do have things like /uni-n or
415 * /ht nodes with no "ranges" property and a lot of perfectly
416 * useable mapped devices below them. Thus we treat the absence of
417 * "ranges" as equivalent to an empty "ranges" property which means
418 * a 1:1 translation at that level. It's up to the caller not to try
419 * to translate addresses that aren't supposed to be translated in
420 * the first place. --BenH.
421 */
422 ranges = of_get_property(parent, "ranges", (int *) &rlen);
423 if (ranges == NULL || rlen == 0) {
424 offset = of_read_number(addr, na);
425 memset(addr, 0, pna * 4);
426 pr_debug("OF: no ranges, 1:1 translation\n");
427 goto finish;
428 }
429
430 pr_debug("OF: walking ranges...\n");
431
432 /* Now walk through the ranges */
433 rlen /= 4;
434 rone = na + pna + ns;
435 for (; rlen >= rone; rlen -= rone, ranges += rone) {
436 offset = bus->map(addr, ranges, na, ns, pna);
437 if (offset != OF_BAD_ADDR)
438 break;
439 }
440 if (offset == OF_BAD_ADDR) {
441 pr_debug("OF: not found !\n");
442 return 1;
443 }
444 memcpy(addr, ranges + na, 4 * pna);
445
446 finish:
447 of_dump_addr("OF: parent translation for:", addr, pna);
448 pr_debug("OF: with offset: "PRu64"\n", offset);
449
450 /* Translate it into parent bus space */
451 return pbus->translate(addr, offset, pna);
452}
453
454/*
455 * Translate an address from the device-tree into a CPU physical address,
456 * this walks up the tree and applies the various bus mappings on the
457 * way.
458 *
459 * Note: We consider that crossing any level with #size-cells == 0 to mean
460 * that translation is impossible (that is we are not dealing with a value
461 * that can be mapped to a cpu physical address). This is not really specified
462 * that way, but this is traditionally the way IBM at least do things
463 */
464u64 of_translate_address(struct device_node *dev, const u32 *in_addr)
465{
466 struct device_node *parent = NULL;
467 struct of_bus *bus, *pbus;
468 u32 addr[OF_MAX_ADDR_CELLS];
469 int na, ns, pna, pns;
470 u64 result = OF_BAD_ADDR;
471
472 pr_debug("OF: ** translation for device %s **\n", dev->full_name);
473
474 /* Increase refcount at current level */
475 of_node_get(dev);
476
477 /* Get parent & match bus type */
478 parent = of_get_parent(dev);
479 if (parent == NULL)
480 goto bail;
481 bus = of_match_bus(parent);
482
483 /* Cound address cells & copy address locally */
484 bus->count_cells(dev, &na, &ns);
485 if (!OF_CHECK_COUNTS(na, ns)) {
486 printk(KERN_ERR "prom_parse: Bad cell count for %s\n",
487 dev->full_name);
488 goto bail;
489 }
490 memcpy(addr, in_addr, na * 4);
491
492 pr_debug("OF: bus is %s (na=%d, ns=%d) on %s\n",
493 bus->name, na, ns, parent->full_name);
494 of_dump_addr("OF: translating address:", addr, na);
495
496 /* Translate */
497 for (;;) {
498 /* Switch to parent bus */
499 of_node_put(dev);
500 dev = parent;
501 parent = of_get_parent(dev);
502
503 /* If root, we have finished */
504 if (parent == NULL) {
505 pr_debug("OF: reached root node\n");
506 result = of_read_number(addr, na);
507 break;
508 }
509
510 /* Get new parent bus and counts */
511 pbus = of_match_bus(parent);
512 pbus->count_cells(dev, &pna, &pns);
513 if (!OF_CHECK_COUNTS(pna, pns)) {
514 printk(KERN_ERR "prom_parse: Bad cell count for %s\n",
515 dev->full_name);
516 break;
517 }
518
519 pr_debug("OF: parent bus is %s (na=%d, ns=%d) on %s\n",
520 pbus->name, pna, pns, parent->full_name);
521
522 /* Apply bus translation */
523 if (of_translate_one(dev, bus, pbus, addr, na, ns, pna))
524 break;
525
526 /* Complete the move up one level */
527 na = pna;
528 ns = pns;
529 bus = pbus;
530
531 of_dump_addr("OF: one level translation:", addr, na);
532 }
533 bail:
534 of_node_put(parent);
535 of_node_put(dev);
536
537 return result;
538}
539EXPORT_SYMBOL(of_translate_address);
540
541const u32 *of_get_address(struct device_node *dev, int index, u64 *size,
542 unsigned int *flags)
543{
544 const u32 *prop;
545 unsigned int psize;
546 struct device_node *parent;
547 struct of_bus *bus;
548 int onesize, i, na, ns;
549
550 /* Get parent & match bus type */
551 parent = of_get_parent(dev);
552 if (parent == NULL)
553 return NULL;
554 bus = of_match_bus(parent);
555 bus->count_cells(dev, &na, &ns);
556 of_node_put(parent);
557 if (!OF_CHECK_COUNTS(na, ns))
558 return NULL;
559
560 /* Get "reg" or "assigned-addresses" property */
561 prop = of_get_property(dev, bus->addresses, (int *) &psize);
562 if (prop == NULL)
563 return NULL;
564 psize /= 4;
565
566 onesize = na + ns;
567 for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++)
568 if (i == index) {
569 if (size)
570 *size = of_read_number(prop + na, ns);
571 if (flags)
572 *flags = bus->get_flags(prop);
573 return prop;
574 }
575 return NULL;
576}
577EXPORT_SYMBOL(of_get_address);
578
579static int __of_address_to_resource(struct device_node *dev, const u32 *addrp,
580 u64 size, unsigned int flags,
581 struct resource *r)
582{
583 u64 taddr;
584
585 if ((flags & (IORESOURCE_IO | IORESOURCE_MEM)) == 0)
586 return -EINVAL;
587 taddr = of_translate_address(dev, addrp);
588 if (taddr == OF_BAD_ADDR)
589 return -EINVAL;
590 memset(r, 0, sizeof(struct resource));
591 if (flags & IORESOURCE_IO) {
592 unsigned long port;
593 port = -1; /* pci_address_to_pio(taddr); */
594 if (port == (unsigned long)-1)
595 return -EINVAL;
596 r->start = port;
597 r->end = port + size - 1;
598 } else {
599 r->start = taddr;
600 r->end = taddr + size - 1;
601 }
602 r->flags = flags;
603 r->name = dev->name;
604 return 0;
605}
606
607int of_address_to_resource(struct device_node *dev, int index,
608 struct resource *r)
609{
610 const u32 *addrp;
611 u64 size;
612 unsigned int flags;
613
614 addrp = of_get_address(dev, index, &size, &flags);
615 if (addrp == NULL)
616 return -EINVAL;
617 return __of_address_to_resource(dev, addrp, size, flags, r);
618}
619EXPORT_SYMBOL_GPL(of_address_to_resource);
620
621void of_parse_dma_window(struct device_node *dn, const void *dma_window_prop,
622 unsigned long *busno, unsigned long *phys, unsigned long *size)
623{
624 const u32 *dma_window;
625 u32 cells;
626 const unsigned char *prop;
627
628 dma_window = dma_window_prop;
629
630 /* busno is always one cell */
631 *busno = *(dma_window++);
632
633 prop = of_get_property(dn, "ibm,#dma-address-cells", NULL);
634 if (!prop)
635 prop = of_get_property(dn, "#address-cells", NULL);
636
637 cells = prop ? *(u32 *)prop : of_n_addr_cells(dn);
638 *phys = of_read_number(dma_window, cells);
639
640 dma_window += cells;
641
642 prop = of_get_property(dn, "ibm,#dma-size-cells", NULL);
643 cells = prop ? *(u32 *)prop : of_n_size_cells(dn);
644 *size = of_read_number(dma_window, cells);
645}
646
647/*
648 * Interrupt remapper
649 */
650
651static unsigned int of_irq_workarounds;
652static struct device_node *of_irq_dflt_pic;
653
654static struct device_node *of_irq_find_parent(struct device_node *child)
655{
656 struct device_node *p;
657 const phandle *parp;
658
659 if (!of_node_get(child))
660 return NULL;
661
662 do {
663 parp = of_get_property(child, "interrupt-parent", NULL);
664 if (parp == NULL)
665 p = of_get_parent(child);
666 else {
667 if (of_irq_workarounds & OF_IMAP_NO_PHANDLE)
668 p = of_node_get(of_irq_dflt_pic);
669 else
670 p = of_find_node_by_phandle(*parp);
671 }
672 of_node_put(child);
673 child = p;
674 } while (p && of_get_property(p, "#interrupt-cells", NULL) == NULL);
675
676 return p;
677}
678
679/* This doesn't need to be called if you don't have any special workaround
680 * flags to pass
681 */
682void of_irq_map_init(unsigned int flags)
683{
684 of_irq_workarounds = flags;
685
686 /* OldWorld, don't bother looking at other things */
687 if (flags & OF_IMAP_OLDWORLD_MAC)
688 return;
689
690 /* If we don't have phandles, let's try to locate a default interrupt
691 * controller (happens when booting with BootX). We do a first match
692 * here, hopefully, that only ever happens on machines with one
693 * controller.
694 */
695 if (flags & OF_IMAP_NO_PHANDLE) {
696 struct device_node *np;
697
698 for (np = NULL; (np = of_find_all_nodes(np)) != NULL;) {
699 if (of_get_property(np, "interrupt-controller", NULL)
700 == NULL)
701 continue;
702 /* Skip /chosen/interrupt-controller */
703 if (strcmp(np->name, "chosen") == 0)
704 continue;
705 /* It seems like at least one person on this planet
706 * wants to use BootX on a machine with an AppleKiwi
707 * controller which happens to pretend to be an
708 * interrupt controller too.
709 */
710 if (strcmp(np->name, "AppleKiwi") == 0)
711 continue;
712 /* I think we found one ! */
713 of_irq_dflt_pic = np;
714 break;
715 }
716 }
717
718}
719
720int of_irq_map_raw(struct device_node *parent, const u32 *intspec, u32 ointsize,
721 const u32 *addr, struct of_irq *out_irq)
722{
723 struct device_node *ipar, *tnode, *old = NULL, *newpar = NULL;
724 const u32 *tmp, *imap, *imask;
725 u32 intsize = 1, addrsize, newintsize = 0, newaddrsize = 0;
726 int imaplen, match, i;
727
728 pr_debug("of_irq_map_raw: par=%s,intspec=[0x%08x 0x%08x...],"
729 "ointsize=%d\n",
730 parent->full_name, intspec[0], intspec[1], ointsize);
731
732 ipar = of_node_get(parent);
733
734 /* First get the #interrupt-cells property of the current cursor
735 * that tells us how to interpret the passed-in intspec. If there
736 * is none, we are nice and just walk up the tree
737 */
738 do {
739 tmp = of_get_property(ipar, "#interrupt-cells", NULL);
740 if (tmp != NULL) {
741 intsize = *tmp;
742 break;
743 }
744 tnode = ipar;
745 ipar = of_irq_find_parent(ipar);
746 of_node_put(tnode);
747 } while (ipar);
748 if (ipar == NULL) {
749 pr_debug(" -> no parent found !\n");
750 goto fail;
751 }
752
753 pr_debug("of_irq_map_raw: ipar=%s, size=%d\n",
754 ipar->full_name, intsize);
755
756 if (ointsize != intsize)
757 return -EINVAL;
758
759 /* Look for this #address-cells. We have to implement the old linux
760 * trick of looking for the parent here as some device-trees rely on it
761 */
762 old = of_node_get(ipar);
763 do {
764 tmp = of_get_property(old, "#address-cells", NULL);
765 tnode = of_get_parent(old);
766 of_node_put(old);
767 old = tnode;
768 } while (old && tmp == NULL);
769 of_node_put(old);
770 old = NULL;
771 addrsize = (tmp == NULL) ? 2 : *tmp;
772
773 pr_debug(" -> addrsize=%d\n", addrsize);
774
775 /* Now start the actual "proper" walk of the interrupt tree */
776 while (ipar != NULL) {
777 /* Now check if cursor is an interrupt-controller and if it is
778 * then we are done
779 */
780 if (of_get_property(ipar, "interrupt-controller", NULL) !=
781 NULL) {
782 pr_debug(" -> got it !\n");
783 memcpy(out_irq->specifier, intspec,
784 intsize * sizeof(u32));
785 out_irq->size = intsize;
786 out_irq->controller = ipar;
787 of_node_put(old);
788 return 0;
789 }
790
791 /* Now look for an interrupt-map */
792 imap = of_get_property(ipar, "interrupt-map", &imaplen);
793 /* No interrupt map, check for an interrupt parent */
794 if (imap == NULL) {
795 pr_debug(" -> no map, getting parent\n");
796 newpar = of_irq_find_parent(ipar);
797 goto skiplevel;
798 }
799 imaplen /= sizeof(u32);
800
801 /* Look for a mask */
802 imask = of_get_property(ipar, "interrupt-map-mask", NULL);
803
804 /* If we were passed no "reg" property and we attempt to parse
805 * an interrupt-map, then #address-cells must be 0.
806 * Fail if it's not.
807 */
808 if (addr == NULL && addrsize != 0) {
809 pr_debug(" -> no reg passed in when needed !\n");
810 goto fail;
811 }
812
813 /* Parse interrupt-map */
814 match = 0;
815 while (imaplen > (addrsize + intsize + 1) && !match) {
816 /* Compare specifiers */
817 match = 1;
818 for (i = 0; i < addrsize && match; ++i) {
819 u32 mask = imask ? imask[i] : 0xffffffffu;
820 match = ((addr[i] ^ imap[i]) & mask) == 0;
821 }
822 for (; i < (addrsize + intsize) && match; ++i) {
823 u32 mask = imask ? imask[i] : 0xffffffffu;
824 match =
825 ((intspec[i-addrsize] ^ imap[i])
826 & mask) == 0;
827 }
828 imap += addrsize + intsize;
829 imaplen -= addrsize + intsize;
830
831 pr_debug(" -> match=%d (imaplen=%d)\n", match, imaplen);
832
833 /* Get the interrupt parent */
834 if (of_irq_workarounds & OF_IMAP_NO_PHANDLE)
835 newpar = of_node_get(of_irq_dflt_pic);
836 else
837 newpar =
838 of_find_node_by_phandle((phandle)*imap);
839 imap++;
840 --imaplen;
841
842 /* Check if not found */
843 if (newpar == NULL) {
844 pr_debug(" -> imap parent not found !\n");
845 goto fail;
846 }
847
848 /* Get #interrupt-cells and #address-cells of new
849 * parent
850 */
851 tmp = of_get_property(newpar, "#interrupt-cells", NULL);
852 if (tmp == NULL) {
853 pr_debug(" -> parent lacks "
854 "#interrupt-cells!\n");
855 goto fail;
856 }
857 newintsize = *tmp;
858 tmp = of_get_property(newpar, "#address-cells", NULL);
859 newaddrsize = (tmp == NULL) ? 0 : *tmp;
860
861 pr_debug(" -> newintsize=%d, newaddrsize=%d\n",
862 newintsize, newaddrsize);
863
864 /* Check for malformed properties */
865 if (imaplen < (newaddrsize + newintsize))
866 goto fail;
867
868 imap += newaddrsize + newintsize;
869 imaplen -= newaddrsize + newintsize;
870
871 pr_debug(" -> imaplen=%d\n", imaplen);
872 }
873 if (!match)
874 goto fail;
875
876 of_node_put(old);
877 old = of_node_get(newpar);
878 addrsize = newaddrsize;
879 intsize = newintsize;
880 intspec = imap - intsize;
881 addr = intspec - addrsize;
882
883skiplevel:
884 /* Iterate again with new parent */
885 pr_debug(" -> new parent: %s\n",
886 newpar ? newpar->full_name : "<>");
887 of_node_put(ipar);
888 ipar = newpar;
889 newpar = NULL;
890 }
891fail:
892 of_node_put(ipar);
893 of_node_put(old);
894 of_node_put(newpar);
895
896 return -EINVAL;
897}
898EXPORT_SYMBOL_GPL(of_irq_map_raw);
899
900int of_irq_map_one(struct device_node *device,
901 int index, struct of_irq *out_irq)
902{
903 struct device_node *p;
904 const u32 *intspec, *tmp, *addr;
905 u32 intsize, intlen;
906 int res;
907
908 pr_debug("of_irq_map_one: dev=%s, index=%d\n",
909 device->full_name, index);
910
911 /* Get the interrupts property */
912 intspec = of_get_property(device, "interrupts", (int *) &intlen);
913 if (intspec == NULL)
914 return -EINVAL;
915 intlen /= sizeof(u32);
916
917 pr_debug(" intspec=%d intlen=%d\n", *intspec, intlen);
918
919 /* Get the reg property (if any) */
920 addr = of_get_property(device, "reg", NULL);
921
922 /* Look for the interrupt parent. */
923 p = of_irq_find_parent(device);
924 if (p == NULL)
925 return -EINVAL;
926
927 /* Get size of interrupt specifier */
928 tmp = of_get_property(p, "#interrupt-cells", NULL);
929 if (tmp == NULL) {
930 of_node_put(p);
931 return -EINVAL;
932 }
933 intsize = *tmp;
934
935 pr_debug(" intsize=%d intlen=%d\n", intsize, intlen);
936
937 /* Check index */
938 if ((index + 1) * intsize > intlen)
939 return -EINVAL;
940
941 /* Get new specifier and map it */
942 res = of_irq_map_raw(p, intspec + index * intsize, intsize,
943 addr, out_irq);
944 of_node_put(p);
945 return res;
946}
947EXPORT_SYMBOL_GPL(of_irq_map_one);
948
949/**
950 * Search the device tree for the best MAC address to use. 'mac-address' is
951 * checked first, because that is supposed to contain to "most recent" MAC
952 * address. If that isn't set, then 'local-mac-address' is checked next,
953 * because that is the default address. If that isn't set, then the obsolete
954 * 'address' is checked, just in case we're using an old device tree.
955 *
956 * Note that the 'address' property is supposed to contain a virtual address of
957 * the register set, but some DTS files have redefined that property to be the
958 * MAC address.
959 *
960 * All-zero MAC addresses are rejected, because those could be properties that
961 * exist in the device tree, but were not set by U-Boot. For example, the
962 * DTS could define 'mac-address' and 'local-mac-address', with zero MAC
963 * addresses. Some older U-Boots only initialized 'local-mac-address'. In
964 * this case, the real MAC is in 'local-mac-address', and 'mac-address' exists
965 * but is all zeros.
966*/
967const void *of_get_mac_address(struct device_node *np)
968{
969 struct property *pp;
970
971 pp = of_find_property(np, "mac-address", NULL);
972 if (pp && (pp->length == 6) && is_valid_ether_addr(pp->value))
973 return pp->value;
974
975 pp = of_find_property(np, "local-mac-address", NULL);
976 if (pp && (pp->length == 6) && is_valid_ether_addr(pp->value))
977 return pp->value;
978
979 pp = of_find_property(np, "address", NULL);
980 if (pp && (pp->length == 6) && is_valid_ether_addr(pp->value))
981 return pp->value;
982
983 return NULL;
984}
985EXPORT_SYMBOL(of_get_mac_address);
986
987int of_irq_to_resource(struct device_node *dev, int index, struct resource *r)
988{
989 struct of_irq out_irq;
990 int irq;
991 int res;
992
993 res = of_irq_map_one(dev, index, &out_irq);
994
995 /* Get irq for the device */
996 if (res) {
997 pr_debug("IRQ not found... code = %d", res);
998 return NO_IRQ;
999 }
1000 /* Assuming single interrupt controller... */
1001 irq = out_irq.specifier[0];
1002
1003 pr_debug("IRQ found = %d", irq);
1004
1005 /* Only dereference the resource if both the
1006 * resource and the irq are valid. */
1007 if (r && irq != NO_IRQ) {
1008 r->start = r->end = irq;
1009 r->flags = IORESOURCE_IRQ;
1010 }
1011
1012 return irq;
1013}
1014EXPORT_SYMBOL_GPL(of_irq_to_resource);
1015
1016void __iomem *of_iomap(struct device_node *np, int index)
1017{
1018 struct resource res;
1019
1020 if (of_address_to_resource(np, index, &res))
1021 return NULL;
1022
1023 return ioremap(res.start, 1 + res.end - res.start);
1024}
1025EXPORT_SYMBOL(of_iomap);
diff --git a/arch/microblaze/kernel/ptrace.c b/arch/microblaze/kernel/ptrace.c
new file mode 100644
index 000000000000..b86aa623e36d
--- /dev/null
+++ b/arch/microblaze/kernel/ptrace.c
@@ -0,0 +1,181 @@
1/*
2 * `ptrace' system call
3 *
4 * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
5 * Copyright (C) 2007-2009 PetaLogix
6 * Copyright (C) 2004-2007 John Williams <john.williams@petalogix.com>
7 *
8 * derived from arch/v850/kernel/ptrace.c
9 *
10 * Copyright (C) 2002,03 NEC Electronics Corporation
11 * Copyright (C) 2002,03 Miles Bader <miles@gnu.org>
12 *
13 * Derived from arch/mips/kernel/ptrace.c:
14 *
15 * Copyright (C) 1992 Ross Biro
16 * Copyright (C) Linus Torvalds
17 * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle
18 * Copyright (C) 1996 David S. Miller
19 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
20 * Copyright (C) 1999 MIPS Technologies, Inc.
21 *
22 * This file is subject to the terms and conditions of the GNU General
23 * Public License. See the file COPYING in the main directory of this
24 * archive for more details.
25 */
26
27#include <linux/kernel.h>
28#include <linux/mm.h>
29#include <linux/sched.h>
30#include <linux/smp_lock.h>
31#include <linux/ptrace.h>
32#include <linux/signal.h>
33
34#include <linux/errno.h>
35#include <asm/processor.h>
36#include <linux/uaccess.h>
37#include <asm/asm-offsets.h>
38
39/* Returns the address where the register at REG_OFFS in P is stashed away. */
40static microblaze_reg_t *reg_save_addr(unsigned reg_offs,
41 struct task_struct *t)
42{
43 struct pt_regs *regs;
44
45 /*
46 * Three basic cases:
47 *
48 * (1) A register normally saved before calling the scheduler, is
49 * available in the kernel entry pt_regs structure at the top
50 * of the kernel stack. The kernel trap/irq exit path takes
51 * care to save/restore almost all registers for ptrace'd
52 * processes.
53 *
54 * (2) A call-clobbered register, where the process P entered the
55 * kernel via [syscall] trap, is not stored anywhere; that's
56 * OK, because such registers are not expected to be preserved
57 * when the trap returns anyway (so we don't actually bother to
58 * test for this case).
59 *
60 * (3) A few registers not used at all by the kernel, and so
61 * normally never saved except by context-switches, are in the
62 * context switch state.
63 */
64
65 /* Register saved during kernel entry (or not available). */
66 regs = task_pt_regs(t);
67
68 return (microblaze_reg_t *)((char *)regs + reg_offs);
69}
70
71long arch_ptrace(struct task_struct *child, long request, long addr, long data)
72{
73 int rval;
74 unsigned long val = 0;
75 unsigned long copied;
76
77 switch (request) {
78 case PTRACE_PEEKTEXT: /* read word at location addr. */
79 case PTRACE_PEEKDATA:
80 pr_debug("PEEKTEXT/PEEKDATA at %08lX\n", addr);
81 copied = access_process_vm(child, addr, &val, sizeof(val), 0);
82 rval = -EIO;
83 if (copied != sizeof(val))
84 break;
85 rval = put_user(val, (unsigned long *)data);
86 break;
87
88 case PTRACE_POKETEXT: /* write the word at location addr. */
89 case PTRACE_POKEDATA:
90 pr_debug("POKETEXT/POKEDATA to %08lX\n", addr);
91 rval = 0;
92 if (access_process_vm(child, addr, &data, sizeof(data), 1)
93 == sizeof(data))
94 break;
95 rval = -EIO;
96 break;
97
98 /* Read/write the word at location ADDR in the registers. */
99 case PTRACE_PEEKUSR:
100 case PTRACE_POKEUSR:
101 pr_debug("PEEKUSR/POKEUSR : 0x%08lx\n", addr);
102 rval = 0;
103 if (addr >= PT_SIZE && request == PTRACE_PEEKUSR) {
104 /*
105 * Special requests that don't actually correspond
106 * to offsets in struct pt_regs.
107 */
108 if (addr == PT_TEXT_ADDR) {
109 val = child->mm->start_code;
110 } else if (addr == PT_DATA_ADDR) {
111 val = child->mm->start_data;
112 } else if (addr == PT_TEXT_LEN) {
113 val = child->mm->end_code
114 - child->mm->start_code;
115 } else {
116 rval = -EIO;
117 }
118 } else if (addr >= 0 && addr < PT_SIZE && (addr & 0x3) == 0) {
119 microblaze_reg_t *reg_addr = reg_save_addr(addr, child);
120 if (request == PTRACE_PEEKUSR)
121 val = *reg_addr;
122 else
123 *reg_addr = data;
124 } else
125 rval = -EIO;
126
127 if (rval == 0 && request == PTRACE_PEEKUSR)
128 rval = put_user(val, (unsigned long *)data);
129 break;
130 /* Continue and stop at next (return from) syscall */
131 case PTRACE_SYSCALL:
132 pr_debug("PTRACE_SYSCALL\n");
133 case PTRACE_SINGLESTEP:
134 pr_debug("PTRACE_SINGLESTEP\n");
135 /* Restart after a signal. */
136 case PTRACE_CONT:
137 pr_debug("PTRACE_CONT\n");
138 rval = -EIO;
139 if (!valid_signal(data))
140 break;
141
142 if (request == PTRACE_SYSCALL)
143 set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
144 else
145 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
146
147 child->exit_code = data;
148 pr_debug("wakeup_process\n");
149 wake_up_process(child);
150 rval = 0;
151 break;
152
153 /*
154 * make the child exit. Best I can do is send it a sigkill.
155 * perhaps it should be put in the status that it wants to
156 * exit.
157 */
158 case PTRACE_KILL:
159 pr_debug("PTRACE_KILL\n");
160 rval = 0;
161 if (child->exit_state == EXIT_ZOMBIE) /* already dead */
162 break;
163 child->exit_code = SIGKILL;
164 wake_up_process(child);
165 break;
166
167 case PTRACE_DETACH: /* detach a process that was attached. */
168 pr_debug("PTRACE_DETACH\n");
169 rval = ptrace_detach(child, data);
170 break;
171 default:
172 /* rval = ptrace_request(child, request, addr, data); noMMU */
173 rval = -EIO;
174 }
175 return rval;
176}
177
178void ptrace_disable(struct task_struct *child)
179{
180 /* nothing to do */
181}
diff --git a/arch/microblaze/kernel/selfmod.c b/arch/microblaze/kernel/selfmod.c
new file mode 100644
index 000000000000..89508bdc9f3c
--- /dev/null
+++ b/arch/microblaze/kernel/selfmod.c
@@ -0,0 +1,81 @@
1/*
2 * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
3 * Copyright (C) 2009 PetaLogix
4 *
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 */
9
10#include <linux/interrupt.h>
11#include <asm/selfmod.h>
12
13#undef DEBUG
14
15#if __GNUC__ > 3
16#error GCC 4 unsupported SELFMOD. Please disable SELFMOD from menuconfig.
17#endif
18
19#define OPCODE_IMM 0xB0000000
20#define OPCODE_LWI 0xE8000000
21#define OPCODE_LWI_MASK 0xEC000000
22#define OPCODE_RTSD 0xB60F0008 /* return from func: rtsd r15, 8 */
23#define OPCODE_ADDIK 0x30000000
24#define OPCODE_ADDIK_MASK 0xFC000000
25
26#define IMM_BASE (OPCODE_IMM | (BARRIER_BASE_ADDR >> 16))
27#define LWI_BASE (OPCODE_LWI | (BARRIER_BASE_ADDR & 0x0000ff00))
28#define LWI_BASE_MASK (OPCODE_LWI_MASK | (BARRIER_BASE_ADDR & 0x0000ff00))
29#define ADDIK_BASE (OPCODE_ADDIK | (BARRIER_BASE_ADDR & 0x0000ff00))
30#define ADDIK_BASE_MASK (OPCODE_ADDIK_MASK | (BARRIER_BASE_ADDR & 0x0000ff00))
31
32#define MODIFY_INSTR { \
33 pr_debug("%s: curr instr, (%d):0x%x, next(%d):0x%x\n", \
34 __func__, i, addr[i], i + 1, addr[i + 1]); \
35 addr[i] = OPCODE_IMM + (base >> 16); \
36 /* keep instruction opcode and add only last 16bits */ \
37 addr[i + 1] = (addr[i + 1] & 0xffff00ff) + (base & 0xffff); \
38 __invalidate_icache(addr[i]); \
39 __invalidate_icache(addr[i + 1]); \
40 pr_debug("%s: hack instr, (%d):0x%x, next(%d):0x%x\n", \
41 __func__, i, addr[i], i + 1, addr[i + 1]); }
42
43/* NOTE
44 * self-modified part of code for improvement of interrupt controller
45 * save instruction in interrupt rutine
46 */
47void selfmod_function(const int *arr_fce, const unsigned int base)
48{
49 unsigned int flags, i, j, *addr = NULL;
50
51 local_irq_save(flags);
52 __disable_icache();
53
54 /* zero terminated array */
55 for (j = 0; arr_fce[j] != 0; j++) {
56 /* get start address of function */
57 addr = (unsigned int *) arr_fce[j];
58 pr_debug("%s: func(%d) at 0x%x\n",
59 __func__, j, (unsigned int) addr);
60 for (i = 0; ; i++) {
61 pr_debug("%s: instruction code at %d: 0x%x\n",
62 __func__, i, addr[i]);
63 if (addr[i] == IMM_BASE) {
64 /* detecting of lwi (0xE8) or swi (0xF8) instr
65 * I can detect both opcode with one mask */
66 if ((addr[i + 1] & LWI_BASE_MASK) == LWI_BASE) {
67 MODIFY_INSTR;
68 } else /* detection addik for ack */
69 if ((addr[i + 1] & ADDIK_BASE_MASK) ==
70 ADDIK_BASE) {
71 MODIFY_INSTR;
72 }
73 } else if (addr[i] == OPCODE_RTSD) {
74 /* return from function means end of function */
75 pr_debug("%s: end of array %d\n", __func__, i);
76 break;
77 }
78 }
79 }
80 local_irq_restore(flags);
81} /* end of self-modified code */
diff --git a/arch/microblaze/kernel/setup.c b/arch/microblaze/kernel/setup.c
new file mode 100644
index 000000000000..eb6b41758e23
--- /dev/null
+++ b/arch/microblaze/kernel/setup.c
@@ -0,0 +1,199 @@
1/*
2 * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
3 * Copyright (C) 2007-2009 PetaLogix
4 * Copyright (C) 2006 Atmark Techno, Inc.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/init.h>
12#include <linux/string.h>
13#include <linux/seq_file.h>
14#include <linux/cpu.h>
15#include <linux/initrd.h>
16#include <linux/console.h>
17#include <linux/debugfs.h>
18
19#include <asm/setup.h>
20#include <asm/sections.h>
21#include <asm/page.h>
22#include <linux/io.h>
23#include <linux/bug.h>
24#include <linux/param.h>
25#include <linux/cache.h>
26#include <asm/cacheflush.h>
27#include <asm/entry.h>
28#include <asm/cpuinfo.h>
29
30#include <asm/system.h>
31#include <asm/prom.h>
32#include <asm/pgtable.h>
33
34DEFINE_PER_CPU(unsigned int, KSP); /* Saved kernel stack pointer */
35DEFINE_PER_CPU(unsigned int, KM); /* Kernel/user mode */
36DEFINE_PER_CPU(unsigned int, ENTRY_SP); /* Saved SP on kernel entry */
37DEFINE_PER_CPU(unsigned int, R11_SAVE); /* Temp variable for entry */
38DEFINE_PER_CPU(unsigned int, CURRENT_SAVE); /* Saved current pointer */
39
40unsigned int boot_cpuid;
41char cmd_line[COMMAND_LINE_SIZE];
42
43void __init setup_arch(char **cmdline_p)
44{
45#ifdef CONFIG_CMDLINE_FORCE
46 strlcpy(cmd_line, CONFIG_CMDLINE, COMMAND_LINE_SIZE);
47 strlcpy(boot_command_line, CONFIG_CMDLINE, COMMAND_LINE_SIZE);
48#endif
49 *cmdline_p = cmd_line;
50
51 console_verbose();
52
53 unflatten_device_tree();
54
55 /* NOTE I think that this function is not necessary to call */
56 /* irq_early_init(); */
57 setup_cpuinfo();
58
59 __invalidate_icache_all();
60 __enable_icache();
61
62 __invalidate_dcache_all();
63 __enable_dcache();
64
65 panic_timeout = 120;
66
67 setup_memory();
68
69#if defined(CONFIG_SELFMOD_INTC) || defined(CONFIG_SELFMOD_TIMER)
70 printk(KERN_NOTICE "Self modified code enable\n");
71#endif
72
73#ifdef CONFIG_VT
74#if defined(CONFIG_XILINX_CONSOLE)
75 conswitchp = &xil_con;
76#elif defined(CONFIG_DUMMY_CONSOLE)
77 conswitchp = &dummy_con;
78#endif
79#endif
80}
81
82#ifdef CONFIG_MTD_UCLINUX
83/* Handle both romfs and cramfs types, without generating unnecessary
84 code (ie no point checking for CRAMFS if it's not even enabled) */
85inline unsigned get_romfs_len(unsigned *addr)
86{
87#ifdef CONFIG_ROMFS_FS
88 if (memcmp(&addr[0], "-rom1fs-", 8) == 0) /* romfs */
89 return be32_to_cpu(addr[2]);
90#endif
91
92#ifdef CONFIG_CRAMFS
93 if (addr[0] == le32_to_cpu(0x28cd3d45)) /* cramfs */
94 return le32_to_cpu(addr[1]);
95#endif
96 return 0;
97}
98#endif /* CONFIG_MTD_UCLINUX_EBSS */
99
100void __init machine_early_init(const char *cmdline, unsigned int ram,
101 unsigned int fdt)
102{
103 unsigned long *src, *dst = (unsigned long *)0x0;
104
105/* clearing bss section */
106 memset(__bss_start, 0, __bss_stop-__bss_start);
107 memset(_ssbss, 0, _esbss-_ssbss);
108
109 /*
110 * Copy command line passed from bootloader, or use default
111 * if none provided, or forced
112 */
113#ifndef CONFIG_CMDLINE_BOOL
114 if (cmdline && cmdline[0] != '\0')
115 strlcpy(cmd_line, cmdline, COMMAND_LINE_SIZE);
116#endif
117
118/* initialize device tree for usage in early_printk */
119 early_init_devtree((void *)_fdt_start);
120
121#ifdef CONFIG_EARLY_PRINTK
122 setup_early_printk(NULL);
123#endif
124
125 early_printk("Ramdisk addr 0x%08x, FDT 0x%08x\n", ram, fdt);
126 printk(KERN_NOTICE "Found FDT at 0x%08x\n", fdt);
127
128#ifdef CONFIG_MTD_UCLINUX
129 {
130 int size;
131 unsigned int romfs_base;
132 romfs_base = (ram ? ram : (unsigned int)&__init_end);
133 /* if CONFIG_MTD_UCLINUX_EBSS is defined, assume ROMFS is at the
134 * end of kernel, which is ROMFS_LOCATION defined above. */
135 size = PAGE_ALIGN(get_romfs_len((unsigned *)romfs_base));
136 early_printk("Found romfs @ 0x%08x (0x%08x)\n",
137 romfs_base, size);
138 early_printk("#### klimit %p ####\n", klimit);
139 BUG_ON(size < 0); /* What else can we do? */
140
141 /* Use memmove to handle likely case of memory overlap */
142 early_printk("Moving 0x%08x bytes from 0x%08x to 0x%08x\n",
143 size, romfs_base, (unsigned)&_ebss);
144 memmove(&_ebss, (int *)romfs_base, size);
145
146 /* update klimit */
147 klimit += PAGE_ALIGN(size);
148 early_printk("New klimit: 0x%08x\n", (unsigned)klimit);
149 }
150#endif
151
152 for (src = __ivt_start; src < __ivt_end; src++, dst++)
153 *dst = *src;
154
155 /* Initialize global data */
156 per_cpu(KM, 0) = 0x1; /* We start in kernel mode */
157 per_cpu(CURRENT_SAVE, 0) = (unsigned long)current;
158}
159
160#ifdef CONFIG_DEBUG_FS
161struct dentry *of_debugfs_root;
162
163static int microblaze_debugfs_init(void)
164{
165 of_debugfs_root = debugfs_create_dir("microblaze", NULL);
166
167 return of_debugfs_root == NULL;
168}
169arch_initcall(microblaze_debugfs_init);
170#endif
171
172void machine_restart(char *cmd)
173{
174 printk(KERN_NOTICE "Machine restart...\n");
175 dump_stack();
176 while (1)
177 ;
178}
179
180void machine_shutdown(void)
181{
182 printk(KERN_NOTICE "Machine shutdown...\n");
183 while (1)
184 ;
185}
186
187void machine_halt(void)
188{
189 printk(KERN_NOTICE "Machine halt...\n");
190 while (1)
191 ;
192}
193
194void machine_power_off(void)
195{
196 printk(KERN_NOTICE "Machine power off...\n");
197 while (1)
198 ;
199}
diff --git a/arch/microblaze/kernel/signal.c b/arch/microblaze/kernel/signal.c
new file mode 100644
index 000000000000..3889cf45fa71
--- /dev/null
+++ b/arch/microblaze/kernel/signal.c
@@ -0,0 +1,537 @@
1/*
2 * Signal handling
3 *
4 * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
5 * Copyright (C) 2008-2009 PetaLogix
6 * Copyright (C) 2003,2004 John Williams <jwilliams@itee.uq.edu.au>
7 * Copyright (C) 2001 NEC Corporation
8 * Copyright (C) 2001 Miles Bader <miles@gnu.org>
9 * Copyright (C) 1999,2000 Niibe Yutaka & Kaz Kojima
10 * Copyright (C) 1991,1992 Linus Torvalds
11 *
12 * 1997-11-28 Modified for POSIX.1b signals by Richard Henderson
13 *
14 * This file was was derived from the sh version, arch/sh/kernel/signal.c
15 *
16 * This file is subject to the terms and conditions of the GNU General
17 * Public License. See the file COPYING in the main directory of this
18 * archive for more details.
19 */
20
21#include <linux/sched.h>
22#include <linux/mm.h>
23#include <linux/smp.h>
24#include <linux/smp_lock.h>
25#include <linux/kernel.h>
26#include <linux/signal.h>
27#include <linux/errno.h>
28#include <linux/wait.h>
29#include <linux/ptrace.h>
30#include <linux/unistd.h>
31#include <linux/stddef.h>
32#include <linux/personality.h>
33#include <linux/percpu.h>
34#include <linux/linkage.h>
35#include <asm/entry.h>
36#include <asm/ucontext.h>
37#include <linux/uaccess.h>
38#include <asm/pgtable.h>
39#include <asm/pgalloc.h>
40#include <linux/syscalls.h>
41#include <asm/cacheflush.h>
42#include <asm/syscalls.h>
43
44#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
45
46asmlinkage int do_signal(struct pt_regs *regs, sigset_t *oldset, int in_sycall);
47
48/*
49 * Atomically swap in the new signal mask, and wait for a signal.
50 */
51asmlinkage int
52sys_sigsuspend(old_sigset_t mask, struct pt_regs *regs)
53{
54 sigset_t saveset;
55
56 mask &= _BLOCKABLE;
57 spin_lock_irq(&current->sighand->siglock);
58 saveset = current->blocked;
59 siginitset(&current->blocked, mask);
60 recalc_sigpending();
61 spin_unlock_irq(&current->sighand->siglock);
62
63 regs->r3 = -EINTR;
64 while (1) {
65 current->state = TASK_INTERRUPTIBLE;
66 schedule();
67 if (do_signal(regs, &saveset, 1))
68 return -EINTR;
69 }
70}
71
72asmlinkage int
73sys_rt_sigsuspend(sigset_t __user *unewset, size_t sigsetsize,
74 struct pt_regs *regs)
75{
76 sigset_t saveset, newset;
77
78 /* XXX: Don't preclude handling different sized sigset_t's. */
79 if (sigsetsize != sizeof(sigset_t))
80 return -EINVAL;
81
82 if (copy_from_user(&newset, unewset, sizeof(newset)))
83 return -EFAULT;
84 sigdelsetmask(&newset, ~_BLOCKABLE);
85 spin_lock_irq(&current->sighand->siglock);
86 saveset = current->blocked;
87 current->blocked = newset;
88 recalc_sigpending();
89 spin_unlock_irq(&current->sighand->siglock);
90
91 regs->r3 = -EINTR;
92 while (1) {
93 current->state = TASK_INTERRUPTIBLE;
94 schedule();
95 if (do_signal(regs, &saveset, 1))
96 return -EINTR;
97 }
98}
99
100asmlinkage int
101sys_sigaction(int sig, const struct old_sigaction *act,
102 struct old_sigaction *oact)
103{
104 struct k_sigaction new_ka, old_ka;
105 int ret;
106
107 if (act) {
108 old_sigset_t mask;
109 if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||
110 __get_user(new_ka.sa.sa_handler, &act->sa_handler) ||
111 __get_user(new_ka.sa.sa_restorer, &act->sa_restorer))
112 return -EFAULT;
113 __get_user(new_ka.sa.sa_flags, &act->sa_flags);
114 __get_user(mask, &act->sa_mask);
115 siginitset(&new_ka.sa.sa_mask, mask);
116 }
117
118 ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL);
119
120 if (!ret && oact) {
121 if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||
122 __put_user(old_ka.sa.sa_handler, &oact->sa_handler) ||
123 __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer))
124 return -EFAULT;
125 __put_user(old_ka.sa.sa_flags, &oact->sa_flags);
126 __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask);
127 }
128
129 return ret;
130}
131
132asmlinkage int
133sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss,
134 struct pt_regs *regs)
135{
136 return do_sigaltstack(uss, uoss, regs->r1);
137}
138
139/*
140 * Do a signal return; undo the signal stack.
141 */
142
143struct sigframe {
144 struct sigcontext sc;
145 unsigned long extramask[_NSIG_WORDS-1];
146 unsigned long tramp[2]; /* signal trampoline */
147};
148
149struct rt_sigframe {
150 struct siginfo info;
151 struct ucontext uc;
152 unsigned long tramp[2]; /* signal trampoline */
153};
154
155static int
156restore_sigcontext(struct pt_regs *regs, struct sigcontext *sc, int *rval_p)
157{
158 unsigned int err = 0;
159
160#define COPY(x) {err |= __get_user(regs->x, &sc->regs.x); }
161 COPY(r0);
162 COPY(r1);
163 COPY(r2); COPY(r3); COPY(r4); COPY(r5);
164 COPY(r6); COPY(r7); COPY(r8); COPY(r9);
165 COPY(r10); COPY(r11); COPY(r12); COPY(r13);
166 COPY(r14); COPY(r15); COPY(r16); COPY(r17);
167 COPY(r18); COPY(r19); COPY(r20); COPY(r21);
168 COPY(r22); COPY(r23); COPY(r24); COPY(r25);
169 COPY(r26); COPY(r27); COPY(r28); COPY(r29);
170 COPY(r30); COPY(r31);
171 COPY(pc); COPY(ear); COPY(esr); COPY(fsr);
172#undef COPY
173
174 *rval_p = regs->r3;
175
176 return err;
177}
178
179asmlinkage int sys_sigreturn(struct pt_regs *regs)
180{
181 struct sigframe *frame = (struct sigframe *)regs->r1;
182 sigset_t set;
183 int rval;
184
185 if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
186 goto badframe;
187
188 if (__get_user(set.sig[0], &frame->sc.oldmask)
189 || (_NSIG_WORDS > 1
190 && __copy_from_user(&set.sig[1], &frame->extramask,
191 sizeof(frame->extramask))))
192 goto badframe;
193
194 sigdelsetmask(&set, ~_BLOCKABLE);
195
196 spin_lock_irq(&current->sighand->siglock);
197 current->blocked = set;
198 recalc_sigpending();
199 spin_unlock_irq(&current->sighand->siglock);
200
201 if (restore_sigcontext(regs, &frame->sc, &rval))
202 goto badframe;
203 return rval;
204
205badframe:
206 force_sig(SIGSEGV, current);
207 return 0;
208}
209
210asmlinkage int sys_rt_sigreturn(struct pt_regs *regs)
211{
212 struct rt_sigframe *frame = (struct rt_sigframe *)regs->r1;
213 sigset_t set;
214 stack_t st;
215 int rval;
216
217 if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
218 goto badframe;
219
220 if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set)))
221 goto badframe;
222
223 sigdelsetmask(&set, ~_BLOCKABLE);
224 spin_lock_irq(&current->sighand->siglock);
225 current->blocked = set;
226 recalc_sigpending();
227 spin_unlock_irq(&current->sighand->siglock);
228
229 if (restore_sigcontext(regs, &frame->uc.uc_mcontext, &rval))
230 goto badframe;
231
232 if (__copy_from_user((void *)&st, &frame->uc.uc_stack, sizeof(st)))
233 goto badframe;
234 /* It is more difficult to avoid calling this function than to
235 call it and ignore errors. */
236 do_sigaltstack(&st, NULL, regs->r1);
237
238 return rval;
239
240badframe:
241 force_sig(SIGSEGV, current);
242 return 0;
243}
244
245/*
246 * Set up a signal frame.
247 */
248
249static int
250setup_sigcontext(struct sigcontext *sc, struct pt_regs *regs,
251 unsigned long mask)
252{
253 int err = 0;
254
255#define COPY(x) {err |= __put_user(regs->x, &sc->regs.x); }
256 COPY(r0);
257 COPY(r1);
258 COPY(r2); COPY(r3); COPY(r4); COPY(r5);
259 COPY(r6); COPY(r7); COPY(r8); COPY(r9);
260 COPY(r10); COPY(r11); COPY(r12); COPY(r13);
261 COPY(r14); COPY(r15); COPY(r16); COPY(r17);
262 COPY(r18); COPY(r19); COPY(r20); COPY(r21);
263 COPY(r22); COPY(r23); COPY(r24); COPY(r25);
264 COPY(r26); COPY(r27); COPY(r28); COPY(r29);
265 COPY(r30); COPY(r31);
266 COPY(pc); COPY(ear); COPY(esr); COPY(fsr);
267#undef COPY
268
269 err |= __put_user(mask, &sc->oldmask);
270
271 return err;
272}
273
274/*
275 * Determine which stack to use..
276 */
277static inline void *
278get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size)
279{
280 /* Default to using normal stack */
281 unsigned long sp = regs->r1;
282
283 if ((ka->sa.sa_flags & SA_ONSTACK) != 0 && !on_sig_stack(sp))
284 sp = current->sas_ss_sp + current->sas_ss_size;
285
286 return (void *)((sp - frame_size) & -8UL);
287}
288
289static void setup_frame(int sig, struct k_sigaction *ka,
290 sigset_t *set, struct pt_regs *regs)
291{
292 struct sigframe *frame;
293 int err = 0;
294 int signal;
295
296 frame = get_sigframe(ka, regs, sizeof(*frame));
297
298 if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))
299 goto give_sigsegv;
300
301 signal = current_thread_info()->exec_domain
302 && current_thread_info()->exec_domain->signal_invmap
303 && sig < 32
304 ? current_thread_info()->exec_domain->signal_invmap[sig]
305 : sig;
306
307 err |= setup_sigcontext(&frame->sc, regs, set->sig[0]);
308
309 if (_NSIG_WORDS > 1) {
310 err |= __copy_to_user(frame->extramask, &set->sig[1],
311 sizeof(frame->extramask));
312 }
313
314 /* Set up to return from userspace. If provided, use a stub
315 already in userspace. */
316 /* minus 8 is offset to cater for "rtsd r15,8" offset */
317 if (ka->sa.sa_flags & SA_RESTORER) {
318 regs->r15 = ((unsigned long)ka->sa.sa_restorer)-8;
319 } else {
320 /* Note, these encodings are _big endian_! */
321
322 /* addi r12, r0, __NR_sigreturn */
323 err |= __put_user(0x31800000 | __NR_sigreturn ,
324 frame->tramp + 0);
325 /* brki r14, 0x8 */
326 err |= __put_user(0xb9cc0008, frame->tramp + 1);
327
328 /* Return from sighandler will jump to the tramp.
329 Negative 8 offset because return is rtsd r15, 8 */
330 regs->r15 = ((unsigned long)frame->tramp)-8;
331
332 __invalidate_cache_sigtramp((unsigned long)frame->tramp);
333 }
334
335 if (err)
336 goto give_sigsegv;
337
338 /* Set up registers for signal handler */
339 regs->r1 = (unsigned long) frame;
340 /* Signal handler args: */
341 regs->r5 = signal; /* Arg 0: signum */
342 regs->r6 = (unsigned long) &frame->sc; /* arg 1: sigcontext */
343
344 /* Offset of 4 to handle microblaze rtid r14, 0 */
345 regs->pc = (unsigned long)ka->sa.sa_handler;
346
347 set_fs(USER_DS);
348
349#ifdef DEBUG_SIG
350 printk(KERN_INFO "SIG deliver (%s:%d): sp=%p pc=%08lx\n",
351 current->comm, current->pid, frame, regs->pc);
352#endif
353
354 return;
355
356give_sigsegv:
357 if (sig == SIGSEGV)
358 ka->sa.sa_handler = SIG_DFL;
359 force_sig(SIGSEGV, current);
360}
361
362static void setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
363 sigset_t *set, struct pt_regs *regs)
364{
365 struct rt_sigframe *frame;
366 int err = 0;
367 int signal;
368
369 frame = get_sigframe(ka, regs, sizeof(*frame));
370
371 if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))
372 goto give_sigsegv;
373
374 signal = current_thread_info()->exec_domain
375 && current_thread_info()->exec_domain->signal_invmap
376 && sig < 32
377 ? current_thread_info()->exec_domain->signal_invmap[sig]
378 : sig;
379
380 err |= copy_siginfo_to_user(&frame->info, info);
381
382 /* Create the ucontext. */
383 err |= __put_user(0, &frame->uc.uc_flags);
384 err |= __put_user(0, &frame->uc.uc_link);
385 err |= __put_user((void *)current->sas_ss_sp,
386 &frame->uc.uc_stack.ss_sp);
387 err |= __put_user(sas_ss_flags(regs->r1),
388 &frame->uc.uc_stack.ss_flags);
389 err |= __put_user(current->sas_ss_size, &frame->uc.uc_stack.ss_size);
390 err |= setup_sigcontext(&frame->uc.uc_mcontext,
391 regs, set->sig[0]);
392 err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set));
393
394 /* Set up to return from userspace. If provided, use a stub
395 already in userspace. */
396 /* minus 8 is offset to cater for "rtsd r15,8" */
397 if (ka->sa.sa_flags & SA_RESTORER) {
398 regs->r15 = ((unsigned long)ka->sa.sa_restorer)-8;
399 } else {
400 /* addi r12, r0, __NR_sigreturn */
401 err |= __put_user(0x31800000 | __NR_rt_sigreturn ,
402 frame->tramp + 0);
403 /* brki r14, 0x8 */
404 err |= __put_user(0xb9cc0008, frame->tramp + 1);
405
406 /* Return from sighandler will jump to the tramp.
407 Negative 8 offset because return is rtsd r15, 8 */
408 regs->r15 = ((unsigned long)frame->tramp)-8;
409
410 __invalidate_cache_sigtramp((unsigned long)frame->tramp);
411 }
412
413 if (err)
414 goto give_sigsegv;
415
416 /* Set up registers for signal handler */
417 regs->r1 = (unsigned long) frame;
418 /* Signal handler args: */
419 regs->r5 = signal; /* arg 0: signum */
420 regs->r6 = (unsigned long) &frame->info; /* arg 1: siginfo */
421 regs->r7 = (unsigned long) &frame->uc; /* arg2: ucontext */
422 /* Offset to handle microblaze rtid r14, 0 */
423 regs->pc = (unsigned long)ka->sa.sa_handler;
424
425 set_fs(USER_DS);
426
427#ifdef DEBUG_SIG
428 printk(KERN_INFO "SIG deliver (%s:%d): sp=%p pc=%08lx\n",
429 current->comm, current->pid, frame, regs->pc);
430#endif
431
432 return;
433
434give_sigsegv:
435 if (sig == SIGSEGV)
436 ka->sa.sa_handler = SIG_DFL;
437 force_sig(SIGSEGV, current);
438}
439
440/* Handle restarting system calls */
441static inline void
442handle_restart(struct pt_regs *regs, struct k_sigaction *ka, int has_handler)
443{
444 switch (regs->r3) {
445 case -ERESTART_RESTARTBLOCK:
446 case -ERESTARTNOHAND:
447 if (!has_handler)
448 goto do_restart;
449 regs->r3 = -EINTR;
450 break;
451 case -ERESTARTSYS:
452 if (has_handler && !(ka->sa.sa_flags & SA_RESTART)) {
453 regs->r3 = -EINTR;
454 break;
455 }
456 /* fallthrough */
457 case -ERESTARTNOINTR:
458do_restart:
459 /* offset of 4 bytes to re-execute trap (brki) instruction */
460 regs->pc -= 4;
461 break;
462 }
463}
464
465/*
466 * OK, we're invoking a handler
467 */
468
469static void
470handle_signal(unsigned long sig, struct k_sigaction *ka,
471 siginfo_t *info, sigset_t *oldset, struct pt_regs *regs)
472{
473 /* Set up the stack frame */
474 if (ka->sa.sa_flags & SA_SIGINFO)
475 setup_rt_frame(sig, ka, info, oldset, regs);
476 else
477 setup_frame(sig, ka, oldset, regs);
478
479 if (ka->sa.sa_flags & SA_ONESHOT)
480 ka->sa.sa_handler = SIG_DFL;
481
482 if (!(ka->sa.sa_flags & SA_NODEFER)) {
483 spin_lock_irq(&current->sighand->siglock);
484 sigorsets(&current->blocked,
485 &current->blocked, &ka->sa.sa_mask);
486 sigaddset(&current->blocked, sig);
487 recalc_sigpending();
488 spin_unlock_irq(&current->sighand->siglock);
489 }
490}
491
492/*
493 * Note that 'init' is a special process: it doesn't get signals it doesn't
494 * want to handle. Thus you cannot kill init even with a SIGKILL even by
495 * mistake.
496 *
497 * Note that we go through the signals twice: once to check the signals that
498 * the kernel can handle, and then we build all the user-level signal handling
499 * stack-frames in one go after that.
500 */
501int do_signal(struct pt_regs *regs, sigset_t *oldset, int in_syscall)
502{
503 siginfo_t info;
504 int signr;
505 struct k_sigaction ka;
506#ifdef DEBUG_SIG
507 printk(KERN_INFO "do signal: %p %p %d\n", regs, oldset, in_syscall);
508 printk(KERN_INFO "do signal2: %lx %lx %ld [%lx]\n", regs->pc, regs->r1,
509 regs->r12, current_thread_info()->flags);
510#endif
511 /*
512 * We want the common case to go fast, which
513 * is why we may in certain cases get here from
514 * kernel mode. Just return without doing anything
515 * if so.
516 */
517 if (kernel_mode(regs))
518 return 1;
519
520 if (!oldset)
521 oldset = &current->blocked;
522
523 signr = get_signal_to_deliver(&info, &ka, regs, NULL);
524 if (signr > 0) {
525 /* Whee! Actually deliver the signal. */
526 if (in_syscall)
527 handle_restart(regs, &ka, 1);
528 handle_signal(signr, &ka, &info, oldset, regs);
529 return 1;
530 }
531
532 if (in_syscall)
533 handle_restart(regs, NULL, 0);
534
535 /* Did we come from a system call? */
536 return 0;
537}
diff --git a/arch/microblaze/kernel/sys_microblaze.c b/arch/microblaze/kernel/sys_microblaze.c
new file mode 100644
index 000000000000..ba0568c2cc1c
--- /dev/null
+++ b/arch/microblaze/kernel/sys_microblaze.c
@@ -0,0 +1,225 @@
1/*
2 * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
3 * Copyright (C) 2007-2009 PetaLogix
4 * Copyright (C) 2007 John Williams <john.williams@petalogix.com>
5 *
6 * Copyright (C) 2006 Atmark Techno, Inc.
7 * Yasushi SHOJI <yashi@atmark-techno.com>
8 * Tetsuya OHKAWA <tetsuya@atmark-techno.com>
9 *
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file "COPYING" in the main directory of this archive
12 * for more details.
13 */
14
15#include <linux/errno.h>
16#include <linux/mm.h>
17#include <linux/smp.h>
18#include <linux/smp_lock.h>
19#include <linux/syscalls.h>
20#include <linux/sem.h>
21#include <linux/msg.h>
22#include <linux/shm.h>
23#include <linux/stat.h>
24#include <linux/mman.h>
25#include <linux/sys.h>
26#include <linux/ipc.h>
27#include <linux/utsname.h>
28#include <linux/file.h>
29#include <linux/module.h>
30#include <linux/err.h>
31#include <linux/fs.h>
32#include <linux/semaphore.h>
33#include <linux/uaccess.h>
34#include <linux/unistd.h>
35
36#include <asm/syscalls.h>
37/*
38 * sys_ipc() is the de-multiplexer for the SysV IPC calls..
39 *
40 * This is really horribly ugly. This will be remove with new toolchain.
41 */
42asmlinkage int
43sys_ipc(uint call, int first, int second, int third, void *ptr, long fifth)
44{
45 int version, ret;
46
47 version = call >> 16; /* hack for backward compatibility */
48 call &= 0xffff;
49
50 ret = -EINVAL;
51 switch (call) {
52 case SEMOP:
53 ret = sys_semop(first, (struct sembuf *)ptr, second);
54 break;
55 case SEMGET:
56 ret = sys_semget(first, second, third);
57 break;
58 case SEMCTL:
59 {
60 union semun fourth;
61
62 if (!ptr)
63 break;
64 ret = (access_ok(VERIFY_READ, ptr, sizeof(long)) ? 0 : -EFAULT)
65 || (get_user(fourth.__pad, (void **)ptr)) ;
66 if (ret)
67 break;
68 ret = sys_semctl(first, second, third, fourth);
69 break;
70 }
71 case MSGSND:
72 ret = sys_msgsnd(first, (struct msgbuf *) ptr, second, third);
73 break;
74 case MSGRCV:
75 switch (version) {
76 case 0: {
77 struct ipc_kludge tmp;
78
79 if (!ptr)
80 break;
81 ret = (access_ok(VERIFY_READ, ptr, sizeof(tmp))
82 ? 0 : -EFAULT) || copy_from_user(&tmp,
83 (struct ipc_kludge *) ptr, sizeof(tmp));
84 if (ret)
85 break;
86 ret = sys_msgrcv(first, tmp.msgp, second, tmp.msgtyp,
87 third);
88 break;
89 }
90 default:
91 ret = sys_msgrcv(first, (struct msgbuf *) ptr,
92 second, fifth, third);
93 break;
94 }
95 break;
96 case MSGGET:
97 ret = sys_msgget((key_t) first, second);
98 break;
99 case MSGCTL:
100 ret = sys_msgctl(first, second, (struct msqid_ds *) ptr);
101 break;
102 case SHMAT:
103 switch (version) {
104 default: {
105 ulong raddr;
106 ret = access_ok(VERIFY_WRITE, (ulong *) third,
107 sizeof(ulong)) ? 0 : -EFAULT;
108 if (ret)
109 break;
110 ret = do_shmat(first, (char *) ptr, second, &raddr);
111 if (ret)
112 break;
113 ret = put_user(raddr, (ulong *) third);
114 break;
115 }
116 case 1: /* iBCS2 emulator entry point */
117 if (!segment_eq(get_fs(), get_ds()))
118 break;
119 ret = do_shmat(first, (char *) ptr, second,
120 (ulong *) third);
121 break;
122 }
123 break;
124 case SHMDT:
125 ret = sys_shmdt((char *)ptr);
126 break;
127 case SHMGET:
128 ret = sys_shmget(first, second, third);
129 break;
130 case SHMCTL:
131 ret = sys_shmctl(first, second, (struct shmid_ds *) ptr);
132 break;
133 }
134 return -EINVAL;
135}
136
137asmlinkage int sys_vfork(struct pt_regs *regs)
138{
139 return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->r1,
140 regs, 0, NULL, NULL);
141}
142
143asmlinkage int sys_clone(int flags, unsigned long stack, struct pt_regs *regs)
144{
145 if (!stack)
146 stack = regs->r1;
147 return do_fork(flags, stack, regs, 0, NULL, NULL);
148}
149
150asmlinkage int sys_execve(char __user *filenamei, char __user *__user *argv,
151 char __user *__user *envp, struct pt_regs *regs)
152{
153 int error;
154 char *filename;
155
156 filename = getname(filenamei);
157 error = PTR_ERR(filename);
158 if (IS_ERR(filename))
159 goto out;
160 error = do_execve(filename, argv, envp, regs);
161 putname(filename);
162out:
163 return error;
164}
165
166asmlinkage unsigned long
167sys_mmap2(unsigned long addr, size_t len,
168 unsigned long prot, unsigned long flags,
169 unsigned long fd, unsigned long pgoff)
170{
171 struct file *file = NULL;
172 int ret = -EBADF;
173
174 flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
175 if (!(flags & MAP_ANONYMOUS)) {
176 file = fget(fd);
177 if (!file) {
178 printk(KERN_INFO "no fd in mmap\r\n");
179 goto out;
180 }
181 }
182
183 down_write(&current->mm->mmap_sem);
184 ret = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
185 up_write(&current->mm->mmap_sem);
186 if (file)
187 fput(file);
188out:
189 return ret;
190}
191
192asmlinkage unsigned long sys_mmap(unsigned long addr, size_t len,
193 unsigned long prot, unsigned long flags,
194 unsigned long fd, off_t offset)
195{
196 int err = -EINVAL;
197
198 if (offset & ~PAGE_MASK) {
199 printk(KERN_INFO "no pagemask in mmap\r\n");
200 goto out;
201 }
202
203 err = sys_mmap2(addr, len, prot, flags, fd, offset >> PAGE_SHIFT);
204out:
205 return err;
206}
207
208/*
209 * Do a system call from kernel instead of calling sys_execve so we
210 * end up with proper pt_regs.
211 */
212int kernel_execve(const char *filename, char *const argv[], char *const envp[])
213{
214 register const char *__a __asm__("r5") = filename;
215 register const void *__b __asm__("r6") = argv;
216 register const void *__c __asm__("r7") = envp;
217 register unsigned long __syscall __asm__("r12") = __NR_execve;
218 register unsigned long __ret __asm__("r3");
219 __asm__ __volatile__ ("brki r14, 0x8"
220 : "=r" (__ret), "=r" (__syscall)
221 : "1" (__syscall), "r" (__a), "r" (__b), "r" (__c)
222 : "r4", "r8", "r9",
223 "r10", "r11", "r14", "cc", "memory");
224 return __ret;
225}
diff --git a/arch/microblaze/kernel/syscall_table.S b/arch/microblaze/kernel/syscall_table.S
new file mode 100644
index 000000000000..529b0dbf4fe9
--- /dev/null
+++ b/arch/microblaze/kernel/syscall_table.S
@@ -0,0 +1,365 @@
1ENTRY(sys_call_table)
2 .long sys_restart_syscall /* 0 - old "setup()" system call,
3 * used for restarting */
4 .long sys_exit
5 .long sys_ni_syscall /* was fork */
6 .long sys_read
7 .long sys_write
8 .long sys_open /* 5 */
9 .long sys_close
10 .long sys_waitpid
11 .long sys_creat
12 .long sys_link
13 .long sys_unlink /* 10 */
14 .long sys_execve_wrapper
15 .long sys_chdir
16 .long sys_time
17 .long sys_mknod
18 .long sys_chmod /* 15 */
19 .long sys_lchown
20 .long sys_ni_syscall /* old break syscall holder */
21 .long sys_ni_syscall /* old stat */
22 .long sys_lseek
23 .long sys_getpid /* 20 */
24 .long sys_mount
25 .long sys_oldumount
26 .long sys_setuid
27 .long sys_getuid
28 .long sys_stime /* 25 */
29 .long sys_ptrace
30 .long sys_alarm
31 .long sys_ni_syscall /* oldfstat */
32 .long sys_pause
33 .long sys_utime /* 30 */
34 .long sys_ni_syscall /* old stty syscall holder */
35 .long sys_ni_syscall /* old gtty syscall holder */
36 .long sys_access
37 .long sys_nice
38 .long sys_ni_syscall /* 35 - old ftime syscall holder */
39 .long sys_sync
40 .long sys_kill
41 .long sys_rename
42 .long sys_mkdir
43 .long sys_rmdir /* 40 */
44 .long sys_dup
45 .long sys_pipe
46 .long sys_times
47 .long sys_ni_syscall /* old prof syscall holder */
48 .long sys_brk /* 45 */
49 .long sys_setgid
50 .long sys_getgid
51 .long sys_signal
52 .long sys_geteuid
53 .long sys_getegid /* 50 */
54 .long sys_acct
55 .long sys_umount /* recycled never used phys() */
56 .long sys_ni_syscall /* old lock syscall holder */
57 .long sys_ioctl
58 .long sys_fcntl /* 55 */
59 .long sys_ni_syscall /* old mpx syscall holder */
60 .long sys_setpgid
61 .long sys_ni_syscall /* old ulimit syscall holder */
62 .long sys_ni_syscall /* olduname */
63 .long sys_umask /* 60 */
64 .long sys_chroot
65 .long sys_ustat
66 .long sys_dup2
67 .long sys_getppid
68 .long sys_getpgrp /* 65 */
69 .long sys_setsid
70 .long sys_sigaction
71 .long sys_sgetmask
72 .long sys_ssetmask
73 .long sys_setreuid /* 70 */
74 .long sys_setregid
75 .long sys_sigsuspend_wrapper
76 .long sys_sigpending
77 .long sys_sethostname
78 .long sys_setrlimit /* 75 */
79 .long sys_ni_syscall /* old_getrlimit */
80 .long sys_getrusage
81 .long sys_gettimeofday
82 .long sys_settimeofday
83 .long sys_getgroups /* 80 */
84 .long sys_setgroups
85 .long sys_ni_syscall /* old_select */
86 .long sys_symlink
87 .long sys_ni_syscall /* oldlstat */
88 .long sys_readlink /* 85 */
89 .long sys_uselib
90 .long sys_swapon
91 .long sys_reboot
92 .long sys_ni_syscall /* old_readdir */
93 .long sys_mmap /* 90 */ /* old_mmap */
94 .long sys_munmap
95 .long sys_truncate
96 .long sys_ftruncate
97 .long sys_fchmod
98 .long sys_fchown /* 95 */
99 .long sys_getpriority
100 .long sys_setpriority
101 .long sys_ni_syscall /* old profil syscall holder */
102 .long sys_statfs
103 .long sys_fstatfs /* 100 */
104 .long sys_ni_syscall /* ioperm */
105 .long sys_socketcall
106 .long sys_syslog /* operation with system console */
107 .long sys_setitimer
108 .long sys_getitimer /* 105 */
109 .long sys_newstat
110 .long sys_newlstat
111 .long sys_newfstat
112 .long sys_ni_syscall /* uname */
113 .long sys_ni_syscall /* 110 */ /* iopl */
114 .long sys_vhangup
115 .long sys_ni_syscall /* old "idle" system call */
116 .long sys_ni_syscall /* old sys_vm86old */
117 .long sys_wait4
118 .long sys_swapoff /* 115 */
119 .long sys_sysinfo
120 .long sys_ipc
121 .long sys_fsync
122 .long sys_sigreturn_wrapper
123 .long sys_clone_wrapper /* 120 */
124 .long sys_setdomainname
125 .long sys_newuname
126 .long sys_ni_syscall /* modify_ldt */
127 .long sys_adjtimex
128 .long sys_mprotect /* 125: sys_mprotect */
129 .long sys_sigprocmask
130 .long sys_ni_syscall /* old "create_module" */
131 .long sys_init_module
132 .long sys_delete_module
133 .long sys_ni_syscall /* 130: old "get_kernel_syms" */
134 .long sys_quotactl
135 .long sys_getpgid
136 .long sys_fchdir
137 .long sys_bdflush
138 .long sys_sysfs /* 135 */
139 .long sys_personality
140 .long sys_ni_syscall /* reserved for afs_syscall */
141 .long sys_setfsuid
142 .long sys_setfsgid
143 .long sys_llseek /* 140 */
144 .long sys_getdents
145 .long sys_select
146 .long sys_flock
147 .long sys_msync
148 .long sys_readv /* 145 */
149 .long sys_writev
150 .long sys_getsid
151 .long sys_fdatasync
152 .long sys_sysctl
153 .long sys_mlock /* 150: sys_mlock */
154 .long sys_munlock
155 .long sys_mlockall
156 .long sys_munlockall
157 .long sys_sched_setparam
158 .long sys_sched_getparam /* 155 */
159 .long sys_sched_setscheduler
160 .long sys_sched_getscheduler
161 .long sys_sched_yield
162 .long sys_sched_get_priority_max
163 .long sys_sched_get_priority_min /* 160 */
164 .long sys_sched_rr_get_interval
165 .long sys_nanosleep
166 .long sys_mremap
167 .long sys_setresuid
168 .long sys_getresuid /* 165 */
169 .long sys_ni_syscall /* sys_vm86 */
170 .long sys_ni_syscall /* Old sys_query_module */
171 .long sys_poll
172 .long sys_nfsservctl
173 .long sys_setresgid /* 170 */
174 .long sys_getresgid
175 .long sys_prctl
176 .long sys_rt_sigreturn_wrapper
177 .long sys_rt_sigaction
178 .long sys_rt_sigprocmask /* 175 */
179 .long sys_rt_sigpending
180 .long sys_rt_sigtimedwait
181 .long sys_rt_sigqueueinfo
182 .long sys_rt_sigsuspend_wrapper
183 .long sys_pread64 /* 180 */
184 .long sys_pwrite64
185 .long sys_chown
186 .long sys_getcwd
187 .long sys_capget
188 .long sys_capset /* 185 */
189 .long sys_ni_syscall /* sigaltstack */
190 .long sys_sendfile
191 .long sys_ni_syscall /* reserved for streams1 */
192 .long sys_ni_syscall /* reserved for streams2 */
193 .long sys_vfork_wrapper /* 190 */
194 .long sys_getrlimit
195 .long sys_mmap2 /* mmap2 */
196 .long sys_truncate64
197 .long sys_ftruncate64
198 .long sys_stat64 /* 195 */
199 .long sys_lstat64
200 .long sys_fstat64
201 .long sys_lchown
202 .long sys_getuid
203 .long sys_getgid /* 200 */
204 .long sys_geteuid
205 .long sys_getegid
206 .long sys_setreuid
207 .long sys_setregid
208 .long sys_getgroups /* 205 */
209 .long sys_setgroups
210 .long sys_fchown
211 .long sys_setresuid
212 .long sys_getresuid
213 .long sys_setresgid /* 210 */
214 .long sys_getresgid
215 .long sys_chown
216 .long sys_setuid
217 .long sys_setgid
218 .long sys_setfsuid /* 215 */
219 .long sys_setfsgid
220 .long sys_pivot_root
221 .long sys_mincore
222 .long sys_madvise
223 .long sys_getdents64 /* 220 */
224 .long sys_fcntl64
225 .long sys_ni_syscall /* reserved for TUX */
226 .long sys_ni_syscall
227 .long sys_gettid
228 .long sys_readahead /* 225 */
229 .long sys_setxattr
230 .long sys_lsetxattr
231 .long sys_fsetxattr
232 .long sys_getxattr
233 .long sys_lgetxattr /* 230 */
234 .long sys_fgetxattr
235 .long sys_listxattr
236 .long sys_llistxattr
237 .long sys_flistxattr
238 .long sys_removexattr /* 235 */
239 .long sys_lremovexattr
240 .long sys_fremovexattr
241 .long sys_tkill
242 .long sys_sendfile64
243 .long sys_futex /* 240 */
244 .long sys_sched_setaffinity
245 .long sys_sched_getaffinity
246 .long sys_ni_syscall /* set_thread_area */
247 .long sys_ni_syscall /* get_thread_area */
248 .long sys_io_setup /* 245 */
249 .long sys_io_destroy
250 .long sys_io_getevents
251 .long sys_io_submit
252 .long sys_io_cancel
253 .long sys_fadvise64 /* 250 */
254 .long sys_ni_syscall
255 .long sys_exit_group
256 .long sys_lookup_dcookie
257 .long sys_epoll_create
258 .long sys_epoll_ctl /* 255 */
259 .long sys_epoll_wait
260 .long sys_remap_file_pages
261 .long sys_set_tid_address
262 .long sys_timer_create
263 .long sys_timer_settime /* 260 */
264 .long sys_timer_gettime
265 .long sys_timer_getoverrun
266 .long sys_timer_delete
267 .long sys_clock_settime
268 .long sys_clock_gettime /* 265 */
269 .long sys_clock_getres
270 .long sys_clock_nanosleep
271 .long sys_statfs64
272 .long sys_fstatfs64
273 .long sys_tgkill /* 270 */
274 .long sys_utimes
275 .long sys_fadvise64_64
276 .long sys_ni_syscall /* sys_vserver */
277 .long sys_mbind
278 .long sys_get_mempolicy
279 .long sys_set_mempolicy
280 .long sys_mq_open
281 .long sys_mq_unlink
282 .long sys_mq_timedsend
283 .long sys_mq_timedreceive /* 280 */
284 .long sys_mq_notify
285 .long sys_mq_getsetattr
286 .long sys_kexec_load
287 .long sys_waitid
288 .long sys_ni_syscall /* 285 */ /* available */
289 .long sys_add_key
290 .long sys_request_key
291 .long sys_keyctl
292 .long sys_ioprio_set
293 .long sys_ioprio_get /* 290 */
294 .long sys_inotify_init
295 .long sys_inotify_add_watch
296 .long sys_inotify_rm_watch
297 .long sys_ni_syscall /* sys_migrate_pages */
298 .long sys_openat /* 295 */
299 .long sys_mkdirat
300 .long sys_mknodat
301 .long sys_fchownat
302 .long sys_ni_syscall
303 .long sys_fstatat64 /* 300 */
304 .long sys_unlinkat
305 .long sys_renameat
306 .long sys_linkat
307 .long sys_symlinkat
308 .long sys_readlinkat /* 305 */
309 .long sys_fchmodat
310 .long sys_faccessat
311 .long sys_ni_syscall /* pselect6 */
312 .long sys_ni_syscall /* sys_ppoll */
313 .long sys_unshare /* 310 */
314 .long sys_set_robust_list
315 .long sys_get_robust_list
316 .long sys_splice
317 .long sys_sync_file_range
318 .long sys_tee /* 315 */
319 .long sys_vmsplice
320 .long sys_move_pages
321 .long sys_getcpu
322 .long sys_epoll_pwait
323 .long sys_utimensat /* 320 */
324 .long sys_signalfd
325 .long sys_timerfd_create
326 .long sys_eventfd
327 .long sys_fallocate
328 .long sys_semtimedop /* 325 */
329 .long sys_timerfd_settime
330 .long sys_timerfd_gettime
331 .long sys_semctl
332 .long sys_semget
333 .long sys_semop /* 330 */
334 .long sys_msgctl
335 .long sys_msgget
336 .long sys_msgrcv
337 .long sys_msgsnd
338 .long sys_shmat /* 335 */
339 .long sys_shmctl
340 .long sys_shmdt
341 .long sys_shmget
342 .long sys_signalfd4 /* new syscall */
343 .long sys_eventfd2 /* 340 */
344 .long sys_epoll_create1
345 .long sys_dup3
346 .long sys_pipe2
347 .long sys_inotify_init1
348 .long sys_socket /* 345 */
349 .long sys_socketpair
350 .long sys_bind
351 .long sys_listen
352 .long sys_accept
353 .long sys_connect /* 350 */
354 .long sys_getsockname
355 .long sys_getpeername
356 .long sys_sendto
357 .long sys_send
358 .long sys_recvfrom /* 355 */
359 .long sys_recv
360 .long sys_setsockopt
361 .long sys_getsockopt
362 .long sys_shutdown
363 .long sys_sendmsg /* 360 */
364 .long sys_recvmsg
365 .long sys_ni_syscall
diff --git a/arch/microblaze/kernel/timer.c b/arch/microblaze/kernel/timer.c
new file mode 100644
index 000000000000..05a497eefd78
--- /dev/null
+++ b/arch/microblaze/kernel/timer.c
@@ -0,0 +1,262 @@
1/*
2 * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
3 * Copyright (C) 2007-2009 PetaLogix
4 * Copyright (C) 2006 Atmark Techno, Inc.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/init.h>
12#include <linux/kernel.h>
13#include <linux/param.h>
14#include <linux/interrupt.h>
15#include <linux/profile.h>
16#include <linux/irq.h>
17#include <linux/delay.h>
18#include <linux/sched.h>
19#include <linux/spinlock.h>
20#include <linux/err.h>
21#include <linux/clk.h>
22#include <linux/clocksource.h>
23#include <linux/clockchips.h>
24#include <linux/io.h>
25#include <asm/cpuinfo.h>
26#include <asm/setup.h>
27#include <asm/prom.h>
28#include <asm/irq.h>
29#include <asm/system.h>
30
31#ifdef CONFIG_SELFMOD_TIMER
32#include <asm/selfmod.h>
33#define TIMER_BASE BARRIER_BASE_ADDR
34#else
35static unsigned int timer_baseaddr;
36#define TIMER_BASE timer_baseaddr
37#endif
38
39#define TCSR0 (0x00)
40#define TLR0 (0x04)
41#define TCR0 (0x08)
42#define TCSR1 (0x10)
43#define TLR1 (0x14)
44#define TCR1 (0x18)
45
46#define TCSR_MDT (1<<0)
47#define TCSR_UDT (1<<1)
48#define TCSR_GENT (1<<2)
49#define TCSR_CAPT (1<<3)
50#define TCSR_ARHT (1<<4)
51#define TCSR_LOAD (1<<5)
52#define TCSR_ENIT (1<<6)
53#define TCSR_ENT (1<<7)
54#define TCSR_TINT (1<<8)
55#define TCSR_PWMA (1<<9)
56#define TCSR_ENALL (1<<10)
57
58static inline void microblaze_timer0_stop(void)
59{
60 out_be32(TIMER_BASE + TCSR0, in_be32(TIMER_BASE + TCSR0) & ~TCSR_ENT);
61}
62
63static inline void microblaze_timer0_start_periodic(unsigned long load_val)
64{
65 if (!load_val)
66 load_val = 1;
67 out_be32(TIMER_BASE + TLR0, load_val); /* loading value to timer reg */
68
69 /* load the initial value */
70 out_be32(TIMER_BASE + TCSR0, TCSR_LOAD);
71
72 /* see timer data sheet for detail
73 * !ENALL - don't enable 'em all
74 * !PWMA - disable pwm
75 * TINT - clear interrupt status
76 * ENT- enable timer itself
77 * EINT - enable interrupt
78 * !LOAD - clear the bit to let go
79 * ARHT - auto reload
80 * !CAPT - no external trigger
81 * !GENT - no external signal
82 * UDT - set the timer as down counter
83 * !MDT0 - generate mode
84 */
85 out_be32(TIMER_BASE + TCSR0,
86 TCSR_TINT|TCSR_ENIT|TCSR_ENT|TCSR_ARHT|TCSR_UDT);
87}
88
89static inline void microblaze_timer0_start_oneshot(unsigned long load_val)
90{
91 if (!load_val)
92 load_val = 1;
93 out_be32(TIMER_BASE + TLR0, load_val); /* loading value to timer reg */
94
95 /* load the initial value */
96 out_be32(TIMER_BASE + TCSR0, TCSR_LOAD);
97
98 out_be32(TIMER_BASE + TCSR0,
99 TCSR_TINT|TCSR_ENIT|TCSR_ENT|TCSR_ARHT|TCSR_UDT);
100}
101
102static int microblaze_timer_set_next_event(unsigned long delta,
103 struct clock_event_device *dev)
104{
105 pr_debug("%s: next event, delta %x\n", __func__, (u32)delta);
106 microblaze_timer0_start_oneshot(delta);
107 return 0;
108}
109
110static void microblaze_timer_set_mode(enum clock_event_mode mode,
111 struct clock_event_device *evt)
112{
113 switch (mode) {
114 case CLOCK_EVT_MODE_PERIODIC:
115 printk(KERN_INFO "%s: periodic\n", __func__);
116 microblaze_timer0_start_periodic(cpuinfo.freq_div_hz);
117 break;
118 case CLOCK_EVT_MODE_ONESHOT:
119 printk(KERN_INFO "%s: oneshot\n", __func__);
120 break;
121 case CLOCK_EVT_MODE_UNUSED:
122 printk(KERN_INFO "%s: unused\n", __func__);
123 break;
124 case CLOCK_EVT_MODE_SHUTDOWN:
125 printk(KERN_INFO "%s: shutdown\n", __func__);
126 microblaze_timer0_stop();
127 break;
128 case CLOCK_EVT_MODE_RESUME:
129 printk(KERN_INFO "%s: resume\n", __func__);
130 break;
131 }
132}
133
134static struct clock_event_device clockevent_microblaze_timer = {
135 .name = "microblaze_clockevent",
136 .features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC,
137 .shift = 24,
138 .rating = 300,
139 .set_next_event = microblaze_timer_set_next_event,
140 .set_mode = microblaze_timer_set_mode,
141};
142
143static inline void timer_ack(void)
144{
145 out_be32(TIMER_BASE + TCSR0, in_be32(TIMER_BASE + TCSR0));
146}
147
148static irqreturn_t timer_interrupt(int irq, void *dev_id)
149{
150 struct clock_event_device *evt = &clockevent_microblaze_timer;
151#ifdef CONFIG_HEART_BEAT
152 heartbeat();
153#endif
154 timer_ack();
155 evt->event_handler(evt);
156 return IRQ_HANDLED;
157}
158
159static struct irqaction timer_irqaction = {
160 .handler = timer_interrupt,
161 .flags = IRQF_DISABLED | IRQF_TIMER,
162 .name = "timer",
163 .dev_id = &clockevent_microblaze_timer,
164};
165
166static __init void microblaze_clockevent_init(void)
167{
168 clockevent_microblaze_timer.mult =
169 div_sc(cpuinfo.cpu_clock_freq, NSEC_PER_SEC,
170 clockevent_microblaze_timer.shift);
171 clockevent_microblaze_timer.max_delta_ns =
172 clockevent_delta2ns((u32)~0, &clockevent_microblaze_timer);
173 clockevent_microblaze_timer.min_delta_ns =
174 clockevent_delta2ns(1, &clockevent_microblaze_timer);
175 clockevent_microblaze_timer.cpumask = cpumask_of(0);
176 clockevents_register_device(&clockevent_microblaze_timer);
177}
178
179static cycle_t microblaze_read(void)
180{
181 /* reading actual value of timer 1 */
182 return (cycle_t) (in_be32(TIMER_BASE + TCR1));
183}
184
185static struct clocksource clocksource_microblaze = {
186 .name = "microblaze_clocksource",
187 .rating = 300,
188 .read = microblaze_read,
189 .mask = CLOCKSOURCE_MASK(32),
190 .shift = 24, /* I can shift it */
191 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
192};
193
194static int __init microblaze_clocksource_init(void)
195{
196 clocksource_microblaze.mult =
197 clocksource_hz2mult(cpuinfo.cpu_clock_freq,
198 clocksource_microblaze.shift);
199 if (clocksource_register(&clocksource_microblaze))
200 panic("failed to register clocksource");
201
202 /* stop timer1 */
203 out_be32(TIMER_BASE + TCSR1, in_be32(TIMER_BASE + TCSR1) & ~TCSR_ENT);
204 /* start timer1 - up counting without interrupt */
205 out_be32(TIMER_BASE + TCSR1, TCSR_TINT|TCSR_ENT|TCSR_ARHT);
206 return 0;
207}
208
209void __init time_init(void)
210{
211 u32 irq, i = 0;
212 u32 timer_num = 1;
213 struct device_node *timer = NULL;
214#ifdef CONFIG_SELFMOD_TIMER
215 unsigned int timer_baseaddr = 0;
216 int arr_func[] = {
217 (int)&microblaze_read,
218 (int)&timer_interrupt,
219 (int)&microblaze_clocksource_init,
220 (int)&microblaze_timer_set_mode,
221 (int)&microblaze_timer_set_next_event,
222 0
223 };
224#endif
225 char *timer_list[] = {
226 "xlnx,xps-timer-1.00.a",
227 "xlnx,opb-timer-1.00.b",
228 "xlnx,opb-timer-1.00.a",
229 NULL
230 };
231
232 for (i = 0; timer_list[i] != NULL; i++) {
233 timer = of_find_compatible_node(NULL, NULL, timer_list[i]);
234 if (timer)
235 break;
236 }
237
238 timer_baseaddr = *(int *) of_get_property(timer, "reg", NULL);
239 timer_baseaddr = (unsigned long) ioremap(timer_baseaddr, PAGE_SIZE);
240 irq = *(int *) of_get_property(timer, "interrupts", NULL);
241 timer_num =
242 *(int *) of_get_property(timer, "xlnx,one-timer-only", NULL);
243 if (timer_num) {
244 printk(KERN_EMERG "Please enable two timers in HW\n");
245 BUG();
246 }
247
248#ifdef CONFIG_SELFMOD_TIMER
249 selfmod_function((int *) arr_func, timer_baseaddr);
250#endif
251 printk(KERN_INFO "%s #0 at 0x%08x, irq=%d\n",
252 timer_list[i], timer_baseaddr, irq);
253
254 cpuinfo.freq_div_hz = cpuinfo.cpu_clock_freq / HZ;
255
256 setup_irq(irq, &timer_irqaction);
257#ifdef CONFIG_HEART_BEAT
258 setup_heartbeat();
259#endif
260 microblaze_clocksource_init();
261 microblaze_clockevent_init();
262}
diff --git a/arch/microblaze/kernel/traps.c b/arch/microblaze/kernel/traps.c
new file mode 100644
index 000000000000..fbdc533c61e3
--- /dev/null
+++ b/arch/microblaze/kernel/traps.c
@@ -0,0 +1,107 @@
1/*
2 * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
3 * Copyright (C) 2007-2009 PetaLogix
4 * Copyright (C) 2006 Atmark Techno, Inc.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/kernel.h>
12#include <linux/kallsyms.h>
13#include <linux/module.h>
14#include <linux/sched.h>
15#include <linux/debug_locks.h>
16
17#include <asm/exceptions.h>
18#include <asm/system.h>
19
20void trap_init(void)
21{
22 __enable_hw_exceptions();
23}
24
25void __bad_xchg(volatile void *ptr, int size)
26{
27 printk(KERN_INFO "xchg: bad data size: pc 0x%p, ptr 0x%p, size %d\n",
28 __builtin_return_address(0), ptr, size);
29 BUG();
30}
31EXPORT_SYMBOL(__bad_xchg);
32
33static int kstack_depth_to_print = 24;
34
35static int __init kstack_setup(char *s)
36{
37 kstack_depth_to_print = strict_strtoul(s, 0, 0);
38
39 return 1;
40}
41__setup("kstack=", kstack_setup);
42
43void show_trace(struct task_struct *task, unsigned long *stack)
44{
45 unsigned long addr;
46
47 if (!stack)
48 stack = (unsigned long *)&stack;
49
50 printk(KERN_NOTICE "Call Trace: ");
51#ifdef CONFIG_KALLSYMS
52 printk(KERN_NOTICE "\n");
53#endif
54 while (!kstack_end(stack)) {
55 addr = *stack++;
56 /*
57 * If the address is either in the text segment of the
58 * kernel, or in the region which contains vmalloc'ed
59 * memory, it *may* be the address of a calling
60 * routine; if so, print it so that someone tracing
61 * down the cause of the crash will be able to figure
62 * out the call path that was taken.
63 */
64 if (kernel_text_address(addr))
65 print_ip_sym(addr);
66 }
67 printk(KERN_NOTICE "\n");
68
69 if (!task)
70 task = current;
71
72 debug_show_held_locks(task);
73}
74
75void show_stack(struct task_struct *task, unsigned long *sp)
76{
77 unsigned long *stack;
78 int i;
79
80 if (sp == NULL) {
81 if (task)
82 sp = (unsigned long *) ((struct thread_info *)
83 (task->stack))->cpu_context.r1;
84 else
85 sp = (unsigned long *)&sp;
86 }
87
88 stack = sp;
89
90 printk(KERN_INFO "\nStack:\n ");
91
92 for (i = 0; i < kstack_depth_to_print; i++) {
93 if (kstack_end(sp))
94 break;
95 if (i && ((i % 8) == 0))
96 printk("\n ");
97 printk("%08lx ", *sp++);
98 }
99 printk("\n");
100 show_trace(task, stack);
101}
102
103void dump_stack(void)
104{
105 show_stack(NULL, NULL);
106}
107EXPORT_SYMBOL(dump_stack);
diff --git a/arch/microblaze/kernel/vmlinux.lds.S b/arch/microblaze/kernel/vmlinux.lds.S
new file mode 100644
index 000000000000..840385e51291
--- /dev/null
+++ b/arch/microblaze/kernel/vmlinux.lds.S
@@ -0,0 +1,163 @@
1/*
2 * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
3 * Copyright (C) 2008-2009 PetaLogix
4 * Copyright (C) 2006 Atmark Techno, Inc.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11OUTPUT_FORMAT("elf32-microblaze", "elf32-microblaze", "elf32-microblaze")
12OUTPUT_ARCH(microblaze)
13ENTRY(_start)
14
15#include <asm-generic/vmlinux.lds.h>
16
17jiffies = jiffies_64 + 4;
18
19SECTIONS {
20 . = CONFIG_KERNEL_BASE_ADDR;
21
22 .text : {
23 _text = . ;
24 _stext = . ;
25 *(.text .text.*)
26 *(.fixup)
27
28 *(.exitcall.exit)
29 SCHED_TEXT
30 LOCK_TEXT
31 KPROBES_TEXT
32 . = ALIGN (4) ;
33 _etext = . ;
34 }
35
36 . = ALIGN (4) ;
37 _fdt_start = . ; /* place for fdt blob */
38 . = . + 0x4000;
39 _fdt_end = . ;
40
41 . = ALIGN(16);
42 RODATA
43 . = ALIGN(16);
44 __ex_table : {
45 __start___ex_table = .;
46 *(__ex_table)
47 __stop___ex_table = .;
48 }
49
50 /*
51 * sdata2 section can go anywhere, but must be word aligned
52 * and SDA2_BASE must point to the middle of it
53 */
54 .sdata2 : {
55 _ssrw = .;
56 . = ALIGN(4096); /* page aligned when MMU used - origin 0x8 */
57 *(.sdata2)
58 . = ALIGN(8);
59 _essrw = .;
60 _ssrw_size = _essrw - _ssrw;
61 _KERNEL_SDA2_BASE_ = _ssrw + (_ssrw_size / 2);
62 }
63
64 _sdata = . ;
65 .data ALIGN (4096) : { /* page aligned when MMU used - origin 0x4 */
66 *(.data)
67 }
68 . = ALIGN(32);
69 .data.cacheline_aligned : { *(.data.cacheline_aligned) }
70 _edata = . ;
71
72 /* Reserve some low RAM for r0 based memory references */
73 . = ALIGN(0x4) ;
74 r0_ram = . ;
75 . = . + 4096; /* a page should be enough */
76
77 /* The initial task */
78 . = ALIGN(8192);
79 .data.init_task : { *(.data.init_task) }
80
81 /* Under the microblaze ABI, .sdata and .sbss must be contiguous */
82 . = ALIGN(8);
83 .sdata : {
84 _ssro = .;
85 *(.sdata)
86 }
87
88 .sbss : {
89 _ssbss = .;
90 *(.sbss)
91 _esbss = .;
92 _essro = .;
93 _ssro_size = _essro - _ssro ;
94 _KERNEL_SDA_BASE_ = _ssro + (_ssro_size / 2) ;
95 }
96
97 __init_begin = .;
98
99 . = ALIGN(4096);
100 .init.text : {
101 _sinittext = . ;
102 *(.init.text)
103 *(.exit.text)
104 *(.exit.data)
105 _einittext = .;
106 }
107
108 .init.data : { *(.init.data) }
109
110 . = ALIGN(4);
111 .init.ivt : {
112 __ivt_start = .;
113 *(.init.ivt)
114 __ivt_end = .;
115 }
116
117 .init.setup : {
118 __setup_start = .;
119 *(.init.setup)
120 __setup_end = .;
121 }
122
123 .initcall.init : {
124 __initcall_start = .;
125 INITCALLS
126 __initcall_end = .;
127 }
128
129 .con_initcall.init : {
130 __con_initcall_start = .;
131 *(.con_initcall.init)
132 __con_initcall_end = .;
133 }
134
135 __init_end_before_initramfs = .;
136
137 .init.ramfs ALIGN(4096) : {
138 __initramfs_start = .;
139 *(.init.ramfs)
140 __initramfs_end = .;
141 . = ALIGN(4);
142 LONG(0);
143/*
144 * FIXME this can break initramfs for MMU.
145 * Pad init.ramfs up to page boundary,
146 * so that __init_end == __bss_start. This will make image.elf
147 * consistent with the image.bin
148 */
149 /* . = ALIGN(4096); */
150 }
151 __init_end = .;
152
153 .bss ALIGN (4096) : { /* page aligned when MMU used */
154 __bss_start = . ;
155 *(.bss*)
156 *(COMMON)
157 . = ALIGN (4) ;
158 __bss_stop = . ;
159 _ebss = . ;
160 }
161 . = ALIGN(4096);
162 _end = .;
163}
diff --git a/arch/microblaze/lib/Makefile b/arch/microblaze/lib/Makefile
new file mode 100644
index 000000000000..d27126bf306a
--- /dev/null
+++ b/arch/microblaze/lib/Makefile
@@ -0,0 +1,13 @@
1#
2# Makefile
3#
4
5lib-y := memset.o checksum.o
6
7ifeq ($(CONFIG_OPT_LIB_ASM),y)
8lib-y += fastcopy.o
9else
10lib-y += memcpy.o memmove.o
11endif
12
13lib-y += uaccess.o
diff --git a/arch/microblaze/lib/checksum.c b/arch/microblaze/lib/checksum.c
new file mode 100644
index 000000000000..809340070a13
--- /dev/null
+++ b/arch/microblaze/lib/checksum.c
@@ -0,0 +1,163 @@
1/*
2 *
3 * INET An implementation of the TCP/IP protocol suite for the LINUX
4 * operating system. INET is implemented using the BSD Socket
5 * interface as the means of communication with the user level.
6 *
7 * IP/TCP/UDP checksumming routines
8 *
9 * Authors: Jorge Cwik, <jorge@laser.satlink.net>
10 * Arnt Gulbrandsen, <agulbra@nvg.unit.no>
11 * Tom May, <ftom@netcom.com>
12 * Andreas Schwab, <schwab@issan.informatik.uni-dortmund.de>
13 * Lots of code moved from tcp.c and ip.c; see those files
14 * for more names.
15 *
16 * 03/02/96 Jes Sorensen, Andreas Schwab, Roman Hodek:
17 * Fixed some nasty bugs, causing some horrible crashes.
18 * A: At some points, the sum (%0) was used as
19 * length-counter instead of the length counter
20 * (%1). Thanks to Roman Hodek for pointing this out.
21 * B: GCC seems to mess up if one uses too many
22 * data-registers to hold input values and one tries to
23 * specify d0 and d1 as scratch registers. Letting gcc
24 * choose these registers itself solves the problem.
25 *
26 * This program is free software; you can redistribute it and/or
27 * modify it under the terms of the GNU General Public License
28 * as published by the Free Software Foundation; either version
29 * 2 of the License, or (at your option) any later version.
30 */
31
32/* Revised by Kenneth Albanowski for m68knommu. Basic problem: unaligned access
33 kills, so most of the assembly has to go. */
34
35#include <net/checksum.h>
36#include <asm/checksum.h>
37#include <linux/module.h>
38
39static inline unsigned short from32to16(unsigned long x)
40{
41 /* add up 16-bit and 16-bit for 16+c bit */
42 x = (x & 0xffff) + (x >> 16);
43 /* add up carry.. */
44 x = (x & 0xffff) + (x >> 16);
45 return x;
46}
47
48static unsigned int do_csum(const unsigned char *buff, int len)
49{
50 int odd, count;
51 unsigned long result = 0;
52
53 if (len <= 0)
54 goto out;
55 odd = 1 & (unsigned long) buff;
56 if (odd) {
57 result = *buff;
58 len--;
59 buff++;
60 }
61 count = len >> 1; /* nr of 16-bit words.. */
62 if (count) {
63 if (2 & (unsigned long) buff) {
64 result += *(unsigned short *) buff;
65 count--;
66 len -= 2;
67 buff += 2;
68 }
69 count >>= 1; /* nr of 32-bit words.. */
70 if (count) {
71 unsigned long carry = 0;
72 do {
73 unsigned long w = *(unsigned long *) buff;
74 count--;
75 buff += 4;
76 result += carry;
77 result += w;
78 carry = (w > result);
79 } while (count);
80 result += carry;
81 result = (result & 0xffff) + (result >> 16);
82 }
83 if (len & 2) {
84 result += *(unsigned short *) buff;
85 buff += 2;
86 }
87 }
88 if (len & 1)
89 result += (*buff << 8);
90 result = from32to16(result);
91 if (odd)
92 result = ((result >> 8) & 0xff) | ((result & 0xff) << 8);
93out:
94 return result;
95}
96
97/*
98 * This is a version of ip_compute_csum() optimized for IP headers,
99 * which always checksum on 4 octet boundaries.
100 */
101__sum16 ip_fast_csum(const void *iph, unsigned int ihl)
102{
103 return (__force __sum16)~do_csum(iph, ihl*4);
104}
105
106/*
107 * computes the checksum of a memory block at buff, length len,
108 * and adds in "sum" (32-bit)
109 *
110 * returns a 32-bit number suitable for feeding into itself
111 * or csum_tcpudp_magic
112 *
113 * this function must be called with even lengths, except
114 * for the last fragment, which may be odd
115 *
116 * it's best to have buff aligned on a 32-bit boundary
117 */
118__wsum csum_partial(const void *buff, int len, __wsum sum)
119{
120 unsigned int result = do_csum(buff, len);
121
122 /* add in old sum, and carry.. */
123 result += sum;
124 if (sum > result)
125 result += 1;
126 return result;
127}
128EXPORT_SYMBOL(csum_partial);
129
130/*
131 * this routine is used for miscellaneous IP-like checksums, mainly
132 * in icmp.c
133 */
134__sum16 ip_compute_csum(const unsigned char *buff, int len)
135{
136 return ~do_csum(buff, len);
137}
138EXPORT_SYMBOL(ip_compute_csum);
139
140/*
141 * copy from fs while checksumming, otherwise like csum_partial
142 */
143__wsum
144csum_partial_copy_from_user(const char __user *src, char *dst, int len,
145 int sum, int *csum_err)
146{
147 if (csum_err)
148 *csum_err = 0;
149 memcpy(dst, src, len);
150 return csum_partial(dst, len, sum);
151}
152EXPORT_SYMBOL(csum_partial_copy_from_user);
153
154/*
155 * copy from ds while checksumming, otherwise like csum_partial
156 */
157__wsum
158csum_partial_copy(const char *src, char *dst, int len, int sum)
159{
160 memcpy(dst, src, len);
161 return csum_partial(dst, len, sum);
162}
163EXPORT_SYMBOL(csum_partial_copy);
diff --git a/arch/microblaze/lib/fastcopy.S b/arch/microblaze/lib/fastcopy.S
new file mode 100644
index 000000000000..02e3ab4eddf3
--- /dev/null
+++ b/arch/microblaze/lib/fastcopy.S
@@ -0,0 +1,662 @@
1/*
2 * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
3 * Copyright (C) 2008-2009 PetaLogix
4 * Copyright (C) 2008 Jim Law - Iris LP All rights reserved.
5 *
6 * This file is subject to the terms and conditions of the GNU General
7 * Public License. See the file COPYING in the main directory of this
8 * archive for more details.
9 *
10 * Written by Jim Law <jlaw@irispower.com>
11 *
12 * intended to replace:
13 * memcpy in memcpy.c and
14 * memmove in memmove.c
15 * ... in arch/microblaze/lib
16 *
17 *
18 * assly_fastcopy.S
19 *
20 * Attempt at quicker memcpy and memmove for MicroBlaze
21 * Input : Operand1 in Reg r5 - destination address
22 * Operand2 in Reg r6 - source address
23 * Operand3 in Reg r7 - number of bytes to transfer
24 * Output: Result in Reg r3 - starting destinaition address
25 *
26 *
27 * Explanation:
28 * Perform (possibly unaligned) copy of a block of memory
29 * between mem locations with size of xfer spec'd in bytes
30 */
31
32#include <linux/linkage.h>
33
34 .globl memcpy
35 .ent memcpy
36
37memcpy:
38fast_memcpy_ascending:
39 /* move d to return register as value of function */
40 addi r3, r5, 0
41
42 addi r4, r0, 4 /* n = 4 */
43 cmpu r4, r4, r7 /* n = c - n (unsigned) */
44 blti r4, a_xfer_end /* if n < 0, less than one word to transfer */
45
46 /* transfer first 0~3 bytes to get aligned dest address */
47 andi r4, r5, 3 /* n = d & 3 */
48 /* if zero, destination already aligned */
49 beqi r4, a_dalign_done
50 /* n = 4 - n (yields 3, 2, 1 transfers for 1, 2, 3 addr offset) */
51 rsubi r4, r4, 4
52 rsub r7, r4, r7 /* c = c - n adjust c */
53
54a_xfer_first_loop:
55 /* if no bytes left to transfer, transfer the bulk */
56 beqi r4, a_dalign_done
57 lbui r11, r6, 0 /* h = *s */
58 sbi r11, r5, 0 /* *d = h */
59 addi r6, r6, 1 /* s++ */
60 addi r5, r5, 1 /* d++ */
61 brid a_xfer_first_loop /* loop */
62 addi r4, r4, -1 /* n-- (IN DELAY SLOT) */
63
64a_dalign_done:
65 addi r4, r0, 32 /* n = 32 */
66 cmpu r4, r4, r7 /* n = c - n (unsigned) */
67 /* if n < 0, less than one block to transfer */
68 blti r4, a_block_done
69
70a_block_xfer:
71 andi r4, r7, 0xffffffe0 /* n = c & ~31 */
72 rsub r7, r4, r7 /* c = c - n */
73
74 andi r9, r6, 3 /* t1 = s & 3 */
75 /* if temp != 0, unaligned transfers needed */
76 bnei r9, a_block_unaligned
77
78a_block_aligned:
79 lwi r9, r6, 0 /* t1 = *(s + 0) */
80 lwi r10, r6, 4 /* t2 = *(s + 4) */
81 lwi r11, r6, 8 /* t3 = *(s + 8) */
82 lwi r12, r6, 12 /* t4 = *(s + 12) */
83 swi r9, r5, 0 /* *(d + 0) = t1 */
84 swi r10, r5, 4 /* *(d + 4) = t2 */
85 swi r11, r5, 8 /* *(d + 8) = t3 */
86 swi r12, r5, 12 /* *(d + 12) = t4 */
87 lwi r9, r6, 16 /* t1 = *(s + 16) */
88 lwi r10, r6, 20 /* t2 = *(s + 20) */
89 lwi r11, r6, 24 /* t3 = *(s + 24) */
90 lwi r12, r6, 28 /* t4 = *(s + 28) */
91 swi r9, r5, 16 /* *(d + 16) = t1 */
92 swi r10, r5, 20 /* *(d + 20) = t2 */
93 swi r11, r5, 24 /* *(d + 24) = t3 */
94 swi r12, r5, 28 /* *(d + 28) = t4 */
95 addi r6, r6, 32 /* s = s + 32 */
96 addi r4, r4, -32 /* n = n - 32 */
97 bneid r4, a_block_aligned /* while (n) loop */
98 addi r5, r5, 32 /* d = d + 32 (IN DELAY SLOT) */
99 bri a_block_done
100
101a_block_unaligned:
102 andi r8, r6, 0xfffffffc /* as = s & ~3 */
103 add r6, r6, r4 /* s = s + n */
104 lwi r11, r8, 0 /* h = *(as + 0) */
105
106 addi r9, r9, -1
107 beqi r9, a_block_u1 /* t1 was 1 => 1 byte offset */
108 addi r9, r9, -1
109 beqi r9, a_block_u2 /* t1 was 2 => 2 byte offset */
110
111a_block_u3:
112 bslli r11, r11, 24 /* h = h << 24 */
113a_bu3_loop:
114 lwi r12, r8, 4 /* v = *(as + 4) */
115 bsrli r9, r12, 8 /* t1 = v >> 8 */
116 or r9, r11, r9 /* t1 = h | t1 */
117 swi r9, r5, 0 /* *(d + 0) = t1 */
118 bslli r11, r12, 24 /* h = v << 24 */
119 lwi r12, r8, 8 /* v = *(as + 8) */
120 bsrli r9, r12, 8 /* t1 = v >> 8 */
121 or r9, r11, r9 /* t1 = h | t1 */
122 swi r9, r5, 4 /* *(d + 4) = t1 */
123 bslli r11, r12, 24 /* h = v << 24 */
124 lwi r12, r8, 12 /* v = *(as + 12) */
125 bsrli r9, r12, 8 /* t1 = v >> 8 */
126 or r9, r11, r9 /* t1 = h | t1 */
127 swi r9, r5, 8 /* *(d + 8) = t1 */
128 bslli r11, r12, 24 /* h = v << 24 */
129 lwi r12, r8, 16 /* v = *(as + 16) */
130 bsrli r9, r12, 8 /* t1 = v >> 8 */
131 or r9, r11, r9 /* t1 = h | t1 */
132 swi r9, r5, 12 /* *(d + 12) = t1 */
133 bslli r11, r12, 24 /* h = v << 24 */
134 lwi r12, r8, 20 /* v = *(as + 20) */
135 bsrli r9, r12, 8 /* t1 = v >> 8 */
136 or r9, r11, r9 /* t1 = h | t1 */
137 swi r9, r5, 16 /* *(d + 16) = t1 */
138 bslli r11, r12, 24 /* h = v << 24 */
139 lwi r12, r8, 24 /* v = *(as + 24) */
140 bsrli r9, r12, 8 /* t1 = v >> 8 */
141 or r9, r11, r9 /* t1 = h | t1 */
142 swi r9, r5, 20 /* *(d + 20) = t1 */
143 bslli r11, r12, 24 /* h = v << 24 */
144 lwi r12, r8, 28 /* v = *(as + 28) */
145 bsrli r9, r12, 8 /* t1 = v >> 8 */
146 or r9, r11, r9 /* t1 = h | t1 */
147 swi r9, r5, 24 /* *(d + 24) = t1 */
148 bslli r11, r12, 24 /* h = v << 24 */
149 lwi r12, r8, 32 /* v = *(as + 32) */
150 bsrli r9, r12, 8 /* t1 = v >> 8 */
151 or r9, r11, r9 /* t1 = h | t1 */
152 swi r9, r5, 28 /* *(d + 28) = t1 */
153 bslli r11, r12, 24 /* h = v << 24 */
154 addi r8, r8, 32 /* as = as + 32 */
155 addi r4, r4, -32 /* n = n - 32 */
156 bneid r4, a_bu3_loop /* while (n) loop */
157 addi r5, r5, 32 /* d = d + 32 (IN DELAY SLOT) */
158 bri a_block_done
159
160a_block_u1:
161 bslli r11, r11, 8 /* h = h << 8 */
162a_bu1_loop:
163 lwi r12, r8, 4 /* v = *(as + 4) */
164 bsrli r9, r12, 24 /* t1 = v >> 24 */
165 or r9, r11, r9 /* t1 = h | t1 */
166 swi r9, r5, 0 /* *(d + 0) = t1 */
167 bslli r11, r12, 8 /* h = v << 8 */
168 lwi r12, r8, 8 /* v = *(as + 8) */
169 bsrli r9, r12, 24 /* t1 = v >> 24 */
170 or r9, r11, r9 /* t1 = h | t1 */
171 swi r9, r5, 4 /* *(d + 4) = t1 */
172 bslli r11, r12, 8 /* h = v << 8 */
173 lwi r12, r8, 12 /* v = *(as + 12) */
174 bsrli r9, r12, 24 /* t1 = v >> 24 */
175 or r9, r11, r9 /* t1 = h | t1 */
176 swi r9, r5, 8 /* *(d + 8) = t1 */
177 bslli r11, r12, 8 /* h = v << 8 */
178 lwi r12, r8, 16 /* v = *(as + 16) */
179 bsrli r9, r12, 24 /* t1 = v >> 24 */
180 or r9, r11, r9 /* t1 = h | t1 */
181 swi r9, r5, 12 /* *(d + 12) = t1 */
182 bslli r11, r12, 8 /* h = v << 8 */
183 lwi r12, r8, 20 /* v = *(as + 20) */
184 bsrli r9, r12, 24 /* t1 = v >> 24 */
185 or r9, r11, r9 /* t1 = h | t1 */
186 swi r9, r5, 16 /* *(d + 16) = t1 */
187 bslli r11, r12, 8 /* h = v << 8 */
188 lwi r12, r8, 24 /* v = *(as + 24) */
189 bsrli r9, r12, 24 /* t1 = v >> 24 */
190 or r9, r11, r9 /* t1 = h | t1 */
191 swi r9, r5, 20 /* *(d + 20) = t1 */
192 bslli r11, r12, 8 /* h = v << 8 */
193 lwi r12, r8, 28 /* v = *(as + 28) */
194 bsrli r9, r12, 24 /* t1 = v >> 24 */
195 or r9, r11, r9 /* t1 = h | t1 */
196 swi r9, r5, 24 /* *(d + 24) = t1 */
197 bslli r11, r12, 8 /* h = v << 8 */
198 lwi r12, r8, 32 /* v = *(as + 32) */
199 bsrli r9, r12, 24 /* t1 = v >> 24 */
200 or r9, r11, r9 /* t1 = h | t1 */
201 swi r9, r5, 28 /* *(d + 28) = t1 */
202 bslli r11, r12, 8 /* h = v << 8 */
203 addi r8, r8, 32 /* as = as + 32 */
204 addi r4, r4, -32 /* n = n - 32 */
205 bneid r4, a_bu1_loop /* while (n) loop */
206 addi r5, r5, 32 /* d = d + 32 (IN DELAY SLOT) */
207 bri a_block_done
208
209a_block_u2:
210 bslli r11, r11, 16 /* h = h << 16 */
211a_bu2_loop:
212 lwi r12, r8, 4 /* v = *(as + 4) */
213 bsrli r9, r12, 16 /* t1 = v >> 16 */
214 or r9, r11, r9 /* t1 = h | t1 */
215 swi r9, r5, 0 /* *(d + 0) = t1 */
216 bslli r11, r12, 16 /* h = v << 16 */
217 lwi r12, r8, 8 /* v = *(as + 8) */
218 bsrli r9, r12, 16 /* t1 = v >> 16 */
219 or r9, r11, r9 /* t1 = h | t1 */
220 swi r9, r5, 4 /* *(d + 4) = t1 */
221 bslli r11, r12, 16 /* h = v << 16 */
222 lwi r12, r8, 12 /* v = *(as + 12) */
223 bsrli r9, r12, 16 /* t1 = v >> 16 */
224 or r9, r11, r9 /* t1 = h | t1 */
225 swi r9, r5, 8 /* *(d + 8) = t1 */
226 bslli r11, r12, 16 /* h = v << 16 */
227 lwi r12, r8, 16 /* v = *(as + 16) */
228 bsrli r9, r12, 16 /* t1 = v >> 16 */
229 or r9, r11, r9 /* t1 = h | t1 */
230 swi r9, r5, 12 /* *(d + 12) = t1 */
231 bslli r11, r12, 16 /* h = v << 16 */
232 lwi r12, r8, 20 /* v = *(as + 20) */
233 bsrli r9, r12, 16 /* t1 = v >> 16 */
234 or r9, r11, r9 /* t1 = h | t1 */
235 swi r9, r5, 16 /* *(d + 16) = t1 */
236 bslli r11, r12, 16 /* h = v << 16 */
237 lwi r12, r8, 24 /* v = *(as + 24) */
238 bsrli r9, r12, 16 /* t1 = v >> 16 */
239 or r9, r11, r9 /* t1 = h | t1 */
240 swi r9, r5, 20 /* *(d + 20) = t1 */
241 bslli r11, r12, 16 /* h = v << 16 */
242 lwi r12, r8, 28 /* v = *(as + 28) */
243 bsrli r9, r12, 16 /* t1 = v >> 16 */
244 or r9, r11, r9 /* t1 = h | t1 */
245 swi r9, r5, 24 /* *(d + 24) = t1 */
246 bslli r11, r12, 16 /* h = v << 16 */
247 lwi r12, r8, 32 /* v = *(as + 32) */
248 bsrli r9, r12, 16 /* t1 = v >> 16 */
249 or r9, r11, r9 /* t1 = h | t1 */
250 swi r9, r5, 28 /* *(d + 28) = t1 */
251 bslli r11, r12, 16 /* h = v << 16 */
252 addi r8, r8, 32 /* as = as + 32 */
253 addi r4, r4, -32 /* n = n - 32 */
254 bneid r4, a_bu2_loop /* while (n) loop */
255 addi r5, r5, 32 /* d = d + 32 (IN DELAY SLOT) */
256
257a_block_done:
258 addi r4, r0, 4 /* n = 4 */
259 cmpu r4, r4, r7 /* n = c - n (unsigned) */
260 blti r4, a_xfer_end /* if n < 0, less than one word to transfer */
261
262a_word_xfer:
263 andi r4, r7, 0xfffffffc /* n = c & ~3 */
264 addi r10, r0, 0 /* offset = 0 */
265
266 andi r9, r6, 3 /* t1 = s & 3 */
267 /* if temp != 0, unaligned transfers needed */
268 bnei r9, a_word_unaligned
269
270a_word_aligned:
271 lw r9, r6, r10 /* t1 = *(s+offset) */
272 sw r9, r5, r10 /* *(d+offset) = t1 */
273 addi r4, r4,-4 /* n-- */
274 bneid r4, a_word_aligned /* loop */
275 addi r10, r10, 4 /* offset++ (IN DELAY SLOT) */
276
277 bri a_word_done
278
279a_word_unaligned:
280 andi r8, r6, 0xfffffffc /* as = s & ~3 */
281 lwi r11, r8, 0 /* h = *(as + 0) */
282 addi r8, r8, 4 /* as = as + 4 */
283
284 addi r9, r9, -1
285 beqi r9, a_word_u1 /* t1 was 1 => 1 byte offset */
286 addi r9, r9, -1
287 beqi r9, a_word_u2 /* t1 was 2 => 2 byte offset */
288
289a_word_u3:
290 bslli r11, r11, 24 /* h = h << 24 */
291a_wu3_loop:
292 lw r12, r8, r10 /* v = *(as + offset) */
293 bsrli r9, r12, 8 /* t1 = v >> 8 */
294 or r9, r11, r9 /* t1 = h | t1 */
295 sw r9, r5, r10 /* *(d + offset) = t1 */
296 bslli r11, r12, 24 /* h = v << 24 */
297 addi r4, r4,-4 /* n = n - 4 */
298 bneid r4, a_wu3_loop /* while (n) loop */
299 addi r10, r10, 4 /* offset = ofset + 4 (IN DELAY SLOT) */
300
301 bri a_word_done
302
303a_word_u1:
304 bslli r11, r11, 8 /* h = h << 8 */
305a_wu1_loop:
306 lw r12, r8, r10 /* v = *(as + offset) */
307 bsrli r9, r12, 24 /* t1 = v >> 24 */
308 or r9, r11, r9 /* t1 = h | t1 */
309 sw r9, r5, r10 /* *(d + offset) = t1 */
310 bslli r11, r12, 8 /* h = v << 8 */
311 addi r4, r4,-4 /* n = n - 4 */
312 bneid r4, a_wu1_loop /* while (n) loop */
313 addi r10, r10, 4 /* offset = ofset + 4 (IN DELAY SLOT) */
314
315 bri a_word_done
316
317a_word_u2:
318 bslli r11, r11, 16 /* h = h << 16 */
319a_wu2_loop:
320 lw r12, r8, r10 /* v = *(as + offset) */
321 bsrli r9, r12, 16 /* t1 = v >> 16 */
322 or r9, r11, r9 /* t1 = h | t1 */
323 sw r9, r5, r10 /* *(d + offset) = t1 */
324 bslli r11, r12, 16 /* h = v << 16 */
325 addi r4, r4,-4 /* n = n - 4 */
326 bneid r4, a_wu2_loop /* while (n) loop */
327 addi r10, r10, 4 /* offset = ofset + 4 (IN DELAY SLOT) */
328
329a_word_done:
330 add r5, r5, r10 /* d = d + offset */
331 add r6, r6, r10 /* s = s + offset */
332 rsub r7, r10, r7 /* c = c - offset */
333
334a_xfer_end:
335a_xfer_end_loop:
336 beqi r7, a_done /* while (c) */
337 lbui r9, r6, 0 /* t1 = *s */
338 addi r6, r6, 1 /* s++ */
339 sbi r9, r5, 0 /* *d = t1 */
340 addi r7, r7, -1 /* c-- */
341 brid a_xfer_end_loop /* loop */
342 addi r5, r5, 1 /* d++ (IN DELAY SLOT) */
343
344a_done:
345 rtsd r15, 8
346 nop
347
348.end memcpy
349/*----------------------------------------------------------------------------*/
350 .globl memmove
351 .ent memmove
352
353memmove:
354 cmpu r4, r5, r6 /* n = s - d */
355 bgei r4,fast_memcpy_ascending
356
357fast_memcpy_descending:
358 /* move d to return register as value of function */
359 addi r3, r5, 0
360
361 add r5, r5, r7 /* d = d + c */
362 add r6, r6, r7 /* s = s + c */
363
364 addi r4, r0, 4 /* n = 4 */
365 cmpu r4, r4, r7 /* n = c - n (unsigned) */
366 blti r4,d_xfer_end /* if n < 0, less than one word to transfer */
367
368 /* transfer first 0~3 bytes to get aligned dest address */
369 andi r4, r5, 3 /* n = d & 3 */
370 /* if zero, destination already aligned */
371 beqi r4,d_dalign_done
372 rsub r7, r4, r7 /* c = c - n adjust c */
373
374d_xfer_first_loop:
375 /* if no bytes left to transfer, transfer the bulk */
376 beqi r4,d_dalign_done
377 addi r6, r6, -1 /* s-- */
378 addi r5, r5, -1 /* d-- */
379 lbui r11, r6, 0 /* h = *s */
380 sbi r11, r5, 0 /* *d = h */
381 brid d_xfer_first_loop /* loop */
382 addi r4, r4, -1 /* n-- (IN DELAY SLOT) */
383
384d_dalign_done:
385 addi r4, r0, 32 /* n = 32 */
386 cmpu r4, r4, r7 /* n = c - n (unsigned) */
387 /* if n < 0, less than one block to transfer */
388 blti r4, d_block_done
389
390d_block_xfer:
391 andi r4, r7, 0xffffffe0 /* n = c & ~31 */
392 rsub r7, r4, r7 /* c = c - n */
393
394 andi r9, r6, 3 /* t1 = s & 3 */
395 /* if temp != 0, unaligned transfers needed */
396 bnei r9, d_block_unaligned
397
398d_block_aligned:
399 addi r6, r6, -32 /* s = s - 32 */
400 addi r5, r5, -32 /* d = d - 32 */
401 lwi r9, r6, 28 /* t1 = *(s + 28) */
402 lwi r10, r6, 24 /* t2 = *(s + 24) */
403 lwi r11, r6, 20 /* t3 = *(s + 20) */
404 lwi r12, r6, 16 /* t4 = *(s + 16) */
405 swi r9, r5, 28 /* *(d + 28) = t1 */
406 swi r10, r5, 24 /* *(d + 24) = t2 */
407 swi r11, r5, 20 /* *(d + 20) = t3 */
408 swi r12, r5, 16 /* *(d + 16) = t4 */
409 lwi r9, r6, 12 /* t1 = *(s + 12) */
410 lwi r10, r6, 8 /* t2 = *(s + 8) */
411 lwi r11, r6, 4 /* t3 = *(s + 4) */
412 lwi r12, r6, 0 /* t4 = *(s + 0) */
413 swi r9, r5, 12 /* *(d + 12) = t1 */
414 swi r10, r5, 8 /* *(d + 8) = t2 */
415 swi r11, r5, 4 /* *(d + 4) = t3 */
416 addi r4, r4, -32 /* n = n - 32 */
417 bneid r4, d_block_aligned /* while (n) loop */
418 swi r12, r5, 0 /* *(d + 0) = t4 (IN DELAY SLOT) */
419 bri d_block_done
420
421d_block_unaligned:
422 andi r8, r6, 0xfffffffc /* as = s & ~3 */
423 rsub r6, r4, r6 /* s = s - n */
424 lwi r11, r8, 0 /* h = *(as + 0) */
425
426 addi r9, r9, -1
427 beqi r9,d_block_u1 /* t1 was 1 => 1 byte offset */
428 addi r9, r9, -1
429 beqi r9,d_block_u2 /* t1 was 2 => 2 byte offset */
430
431d_block_u3:
432 bsrli r11, r11, 8 /* h = h >> 8 */
433d_bu3_loop:
434 addi r8, r8, -32 /* as = as - 32 */
435 addi r5, r5, -32 /* d = d - 32 */
436 lwi r12, r8, 28 /* v = *(as + 28) */
437 bslli r9, r12, 24 /* t1 = v << 24 */
438 or r9, r11, r9 /* t1 = h | t1 */
439 swi r9, r5, 28 /* *(d + 28) = t1 */
440 bsrli r11, r12, 8 /* h = v >> 8 */
441 lwi r12, r8, 24 /* v = *(as + 24) */
442 bslli r9, r12, 24 /* t1 = v << 24 */
443 or r9, r11, r9 /* t1 = h | t1 */
444 swi r9, r5, 24 /* *(d + 24) = t1 */
445 bsrli r11, r12, 8 /* h = v >> 8 */
446 lwi r12, r8, 20 /* v = *(as + 20) */
447 bslli r9, r12, 24 /* t1 = v << 24 */
448 or r9, r11, r9 /* t1 = h | t1 */
449 swi r9, r5, 20 /* *(d + 20) = t1 */
450 bsrli r11, r12, 8 /* h = v >> 8 */
451 lwi r12, r8, 16 /* v = *(as + 16) */
452 bslli r9, r12, 24 /* t1 = v << 24 */
453 or r9, r11, r9 /* t1 = h | t1 */
454 swi r9, r5, 16 /* *(d + 16) = t1 */
455 bsrli r11, r12, 8 /* h = v >> 8 */
456 lwi r12, r8, 12 /* v = *(as + 12) */
457 bslli r9, r12, 24 /* t1 = v << 24 */
458 or r9, r11, r9 /* t1 = h | t1 */
459 swi r9, r5, 12 /* *(d + 112) = t1 */
460 bsrli r11, r12, 8 /* h = v >> 8 */
461 lwi r12, r8, 8 /* v = *(as + 8) */
462 bslli r9, r12, 24 /* t1 = v << 24 */
463 or r9, r11, r9 /* t1 = h | t1 */
464 swi r9, r5, 8 /* *(d + 8) = t1 */
465 bsrli r11, r12, 8 /* h = v >> 8 */
466 lwi r12, r8, 4 /* v = *(as + 4) */
467 bslli r9, r12, 24 /* t1 = v << 24 */
468 or r9, r11, r9 /* t1 = h | t1 */
469 swi r9, r5, 4 /* *(d + 4) = t1 */
470 bsrli r11, r12, 8 /* h = v >> 8 */
471 lwi r12, r8, 0 /* v = *(as + 0) */
472 bslli r9, r12, 24 /* t1 = v << 24 */
473 or r9, r11, r9 /* t1 = h | t1 */
474 swi r9, r5, 0 /* *(d + 0) = t1 */
475 addi r4, r4, -32 /* n = n - 32 */
476 bneid r4, d_bu3_loop /* while (n) loop */
477 bsrli r11, r12, 8 /* h = v >> 8 (IN DELAY SLOT) */
478 bri d_block_done
479
480d_block_u1:
481 bsrli r11, r11, 24 /* h = h >> 24 */
482d_bu1_loop:
483 addi r8, r8, -32 /* as = as - 32 */
484 addi r5, r5, -32 /* d = d - 32 */
485 lwi r12, r8, 28 /* v = *(as + 28) */
486 bslli r9, r12, 8 /* t1 = v << 8 */
487 or r9, r11, r9 /* t1 = h | t1 */
488 swi r9, r5, 28 /* *(d + 28) = t1 */
489 bsrli r11, r12, 24 /* h = v >> 24 */
490 lwi r12, r8, 24 /* v = *(as + 24) */
491 bslli r9, r12, 8 /* t1 = v << 8 */
492 or r9, r11, r9 /* t1 = h | t1 */
493 swi r9, r5, 24 /* *(d + 24) = t1 */
494 bsrli r11, r12, 24 /* h = v >> 24 */
495 lwi r12, r8, 20 /* v = *(as + 20) */
496 bslli r9, r12, 8 /* t1 = v << 8 */
497 or r9, r11, r9 /* t1 = h | t1 */
498 swi r9, r5, 20 /* *(d + 20) = t1 */
499 bsrli r11, r12, 24 /* h = v >> 24 */
500 lwi r12, r8, 16 /* v = *(as + 16) */
501 bslli r9, r12, 8 /* t1 = v << 8 */
502 or r9, r11, r9 /* t1 = h | t1 */
503 swi r9, r5, 16 /* *(d + 16) = t1 */
504 bsrli r11, r12, 24 /* h = v >> 24 */
505 lwi r12, r8, 12 /* v = *(as + 12) */
506 bslli r9, r12, 8 /* t1 = v << 8 */
507 or r9, r11, r9 /* t1 = h | t1 */
508 swi r9, r5, 12 /* *(d + 112) = t1 */
509 bsrli r11, r12, 24 /* h = v >> 24 */
510 lwi r12, r8, 8 /* v = *(as + 8) */
511 bslli r9, r12, 8 /* t1 = v << 8 */
512 or r9, r11, r9 /* t1 = h | t1 */
513 swi r9, r5, 8 /* *(d + 8) = t1 */
514 bsrli r11, r12, 24 /* h = v >> 24 */
515 lwi r12, r8, 4 /* v = *(as + 4) */
516 bslli r9, r12, 8 /* t1 = v << 8 */
517 or r9, r11, r9 /* t1 = h | t1 */
518 swi r9, r5, 4 /* *(d + 4) = t1 */
519 bsrli r11, r12, 24 /* h = v >> 24 */
520 lwi r12, r8, 0 /* v = *(as + 0) */
521 bslli r9, r12, 8 /* t1 = v << 8 */
522 or r9, r11, r9 /* t1 = h | t1 */
523 swi r9, r5, 0 /* *(d + 0) = t1 */
524 addi r4, r4, -32 /* n = n - 32 */
525 bneid r4, d_bu1_loop /* while (n) loop */
526 bsrli r11, r12, 24 /* h = v >> 24 (IN DELAY SLOT) */
527 bri d_block_done
528
529d_block_u2:
530 bsrli r11, r11, 16 /* h = h >> 16 */
531d_bu2_loop:
532 addi r8, r8, -32 /* as = as - 32 */
533 addi r5, r5, -32 /* d = d - 32 */
534 lwi r12, r8, 28 /* v = *(as + 28) */
535 bslli r9, r12, 16 /* t1 = v << 16 */
536 or r9, r11, r9 /* t1 = h | t1 */
537 swi r9, r5, 28 /* *(d + 28) = t1 */
538 bsrli r11, r12, 16 /* h = v >> 16 */
539 lwi r12, r8, 24 /* v = *(as + 24) */
540 bslli r9, r12, 16 /* t1 = v << 16 */
541 or r9, r11, r9 /* t1 = h | t1 */
542 swi r9, r5, 24 /* *(d + 24) = t1 */
543 bsrli r11, r12, 16 /* h = v >> 16 */
544 lwi r12, r8, 20 /* v = *(as + 20) */
545 bslli r9, r12, 16 /* t1 = v << 16 */
546 or r9, r11, r9 /* t1 = h | t1 */
547 swi r9, r5, 20 /* *(d + 20) = t1 */
548 bsrli r11, r12, 16 /* h = v >> 16 */
549 lwi r12, r8, 16 /* v = *(as + 16) */
550 bslli r9, r12, 16 /* t1 = v << 16 */
551 or r9, r11, r9 /* t1 = h | t1 */
552 swi r9, r5, 16 /* *(d + 16) = t1 */
553 bsrli r11, r12, 16 /* h = v >> 16 */
554 lwi r12, r8, 12 /* v = *(as + 12) */
555 bslli r9, r12, 16 /* t1 = v << 16 */
556 or r9, r11, r9 /* t1 = h | t1 */
557 swi r9, r5, 12 /* *(d + 112) = t1 */
558 bsrli r11, r12, 16 /* h = v >> 16 */
559 lwi r12, r8, 8 /* v = *(as + 8) */
560 bslli r9, r12, 16 /* t1 = v << 16 */
561 or r9, r11, r9 /* t1 = h | t1 */
562 swi r9, r5, 8 /* *(d + 8) = t1 */
563 bsrli r11, r12, 16 /* h = v >> 16 */
564 lwi r12, r8, 4 /* v = *(as + 4) */
565 bslli r9, r12, 16 /* t1 = v << 16 */
566 or r9, r11, r9 /* t1 = h | t1 */
567 swi r9, r5, 4 /* *(d + 4) = t1 */
568 bsrli r11, r12, 16 /* h = v >> 16 */
569 lwi r12, r8, 0 /* v = *(as + 0) */
570 bslli r9, r12, 16 /* t1 = v << 16 */
571 or r9, r11, r9 /* t1 = h | t1 */
572 swi r9, r5, 0 /* *(d + 0) = t1 */
573 addi r4, r4, -32 /* n = n - 32 */
574 bneid r4, d_bu2_loop /* while (n) loop */
575 bsrli r11, r12, 16 /* h = v >> 16 (IN DELAY SLOT) */
576
577d_block_done:
578 addi r4, r0, 4 /* n = 4 */
579 cmpu r4, r4, r7 /* n = c - n (unsigned) */
580 blti r4,d_xfer_end /* if n < 0, less than one word to transfer */
581
582d_word_xfer:
583 andi r4, r7, 0xfffffffc /* n = c & ~3 */
584 rsub r5, r4, r5 /* d = d - n */
585 rsub r6, r4, r6 /* s = s - n */
586 rsub r7, r4, r7 /* c = c - n */
587
588 andi r9, r6, 3 /* t1 = s & 3 */
589 /* if temp != 0, unaligned transfers needed */
590 bnei r9, d_word_unaligned
591
592d_word_aligned:
593 addi r4, r4,-4 /* n-- */
594 lw r9, r6, r4 /* t1 = *(s+n) */
595 bneid r4, d_word_aligned /* loop */
596 sw r9, r5, r4 /* *(d+n) = t1 (IN DELAY SLOT) */
597
598 bri d_word_done
599
600d_word_unaligned:
601 andi r8, r6, 0xfffffffc /* as = s & ~3 */
602 lw r11, r8, r4 /* h = *(as + n) */
603
604 addi r9, r9, -1
605 beqi r9,d_word_u1 /* t1 was 1 => 1 byte offset */
606 addi r9, r9, -1
607 beqi r9,d_word_u2 /* t1 was 2 => 2 byte offset */
608
609d_word_u3:
610 bsrli r11, r11, 8 /* h = h >> 8 */
611d_wu3_loop:
612 addi r4, r4,-4 /* n = n - 4 */
613 lw r12, r8, r4 /* v = *(as + n) */
614 bslli r9, r12, 24 /* t1 = v << 24 */
615 or r9, r11, r9 /* t1 = h | t1 */
616 sw r9, r5, r4 /* *(d + n) = t1 */
617 bneid r4, d_wu3_loop /* while (n) loop */
618 bsrli r11, r12, 8 /* h = v >> 8 (IN DELAY SLOT) */
619
620 bri d_word_done
621
622d_word_u1:
623 bsrli r11, r11, 24 /* h = h >> 24 */
624d_wu1_loop:
625 addi r4, r4,-4 /* n = n - 4 */
626 lw r12, r8, r4 /* v = *(as + n) */
627 bslli r9, r12, 8 /* t1 = v << 8 */
628 or r9, r11, r9 /* t1 = h | t1 */
629 sw r9, r5, r4 /* *(d + n) = t1 */
630 bneid r4, d_wu1_loop /* while (n) loop */
631 bsrli r11, r12, 24 /* h = v >> 24 (IN DELAY SLOT) */
632
633 bri d_word_done
634
635d_word_u2:
636 bsrli r11, r11, 16 /* h = h >> 16 */
637d_wu2_loop:
638 addi r4, r4,-4 /* n = n - 4 */
639 lw r12, r8, r4 /* v = *(as + n) */
640 bslli r9, r12, 16 /* t1 = v << 16 */
641 or r9, r11, r9 /* t1 = h | t1 */
642 sw r9, r5, r4 /* *(d + n) = t1 */
643 bneid r4, d_wu2_loop /* while (n) loop */
644 bsrli r11, r12, 16 /* h = v >> 16 (IN DELAY SLOT) */
645
646d_word_done:
647
648d_xfer_end:
649d_xfer_end_loop:
650 beqi r7, a_done /* while (c) */
651 addi r6, r6, -1 /* s-- */
652 lbui r9, r6, 0 /* t1 = *s */
653 addi r5, r5, -1 /* d-- */
654 sbi r9, r5, 0 /* *d = t1 */
655 brid d_xfer_end_loop /* loop */
656 addi r7, r7, -1 /* c-- (IN DELAY SLOT) */
657
658d_done:
659 rtsd r15, 8
660 nop
661
662.end memmove
diff --git a/arch/microblaze/lib/memcpy.c b/arch/microblaze/lib/memcpy.c
new file mode 100644
index 000000000000..5880119c4487
--- /dev/null
+++ b/arch/microblaze/lib/memcpy.c
@@ -0,0 +1,161 @@
1/*
2 * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
3 * Copyright (C) 2008-2009 PetaLogix
4 * Copyright (C) 2007 John Williams
5 *
6 * Reasonably optimised generic C-code for memcpy on Microblaze
7 * This is generic C code to do efficient, alignment-aware memcpy.
8 *
9 * It is based on demo code originally Copyright 2001 by Intel Corp, taken from
10 * http://www.embedded.com/showArticle.jhtml?articleID=19205567
11 *
12 * Attempts were made, unsuccesfully, to contact the original
13 * author of this code (Michael Morrow, Intel). Below is the original
14 * copyright notice.
15 *
16 * This software has been developed by Intel Corporation.
17 * Intel specifically disclaims all warranties, express or
18 * implied, and all liability, including consequential and
19 * other indirect damages, for the use of this program, including
20 * liability for infringement of any proprietary rights,
21 * and including the warranties of merchantability and fitness
22 * for a particular purpose. Intel does not assume any
23 * responsibility for and errors which may appear in this program
24 * not any responsibility to update it.
25 */
26
27#include <linux/types.h>
28#include <linux/stddef.h>
29#include <linux/compiler.h>
30#include <linux/module.h>
31
32#include <linux/string.h>
33#include <asm/system.h>
34
35#ifdef __HAVE_ARCH_MEMCPY
36void *memcpy(void *v_dst, const void *v_src, __kernel_size_t c)
37{
38 const char *src = v_src;
39 char *dst = v_dst;
40#ifndef CONFIG_OPT_LIB_FUNCTION
41 /* Simple, byte oriented memcpy. */
42 while (c--)
43 *dst++ = *src++;
44
45 return v_dst;
46#else
47 /* The following code tries to optimize the copy by using unsigned
48 * alignment. This will work fine if both source and destination are
49 * aligned on the same boundary. However, if they are aligned on
50 * different boundaries shifts will be necessary. This might result in
51 * bad performance on MicroBlaze systems without a barrel shifter.
52 */
53 const uint32_t *i_src;
54 uint32_t *i_dst;
55
56 if (c >= 4) {
57 unsigned value, buf_hold;
58
59 /* Align the dstination to a word boundry. */
60 /* This is done in an endian independant manner. */
61 switch ((unsigned long)dst & 3) {
62 case 1:
63 *dst++ = *src++;
64 --c;
65 case 2:
66 *dst++ = *src++;
67 --c;
68 case 3:
69 *dst++ = *src++;
70 --c;
71 }
72
73 i_dst = (void *)dst;
74
75 /* Choose a copy scheme based on the source */
76 /* alignment relative to dstination. */
77 switch ((unsigned long)src & 3) {
78 case 0x0: /* Both byte offsets are aligned */
79 i_src = (const void *)src;
80
81 for (; c >= 4; c -= 4)
82 *i_dst++ = *i_src++;
83
84 src = (const void *)i_src;
85 break;
86 case 0x1: /* Unaligned - Off by 1 */
87 /* Word align the source */
88 i_src = (const void *) ((unsigned)src & ~3);
89
90 /* Load the holding buffer */
91 buf_hold = *i_src++ << 8;
92
93 for (; c >= 4; c -= 4) {
94 value = *i_src++;
95 *i_dst++ = buf_hold | value >> 24;
96 buf_hold = value << 8;
97 }
98
99 /* Realign the source */
100 src = (const void *)i_src;
101 src -= 3;
102 break;
103 case 0x2: /* Unaligned - Off by 2 */
104 /* Word align the source */
105 i_src = (const void *) ((unsigned)src & ~3);
106
107 /* Load the holding buffer */
108 buf_hold = *i_src++ << 16;
109
110 for (; c >= 4; c -= 4) {
111 value = *i_src++;
112 *i_dst++ = buf_hold | value >> 16;
113 buf_hold = value << 16;
114 }
115
116 /* Realign the source */
117 src = (const void *)i_src;
118 src -= 2;
119 break;
120 case 0x3: /* Unaligned - Off by 3 */
121 /* Word align the source */
122 i_src = (const void *) ((unsigned)src & ~3);
123
124 /* Load the holding buffer */
125 buf_hold = *i_src++ << 24;
126
127 for (; c >= 4; c -= 4) {
128 value = *i_src++;
129 *i_dst++ = buf_hold | value >> 8;
130 buf_hold = value << 24;
131 }
132
133 /* Realign the source */
134 src = (const void *)i_src;
135 src -= 1;
136 break;
137 }
138 dst = (void *)i_dst;
139 }
140
141 /* Finish off any remaining bytes */
142 /* simple fast copy, ... unless a cache boundry is crossed */
143 switch (c) {
144 case 3:
145 *dst++ = *src++;
146 case 2:
147 *dst++ = *src++;
148 case 1:
149 *dst++ = *src++;
150 }
151
152 return v_dst;
153#endif
154}
155EXPORT_SYMBOL(memcpy);
156#endif /* __HAVE_ARCH_MEMCPY */
157
158void *cacheable_memcpy(void *d, const void *s, __kernel_size_t c)
159{
160 return memcpy(d, s, c);
161}
diff --git a/arch/microblaze/lib/memmove.c b/arch/microblaze/lib/memmove.c
new file mode 100644
index 000000000000..d4e9f49a71f7
--- /dev/null
+++ b/arch/microblaze/lib/memmove.c
@@ -0,0 +1,175 @@
1/*
2 * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
3 * Copyright (C) 2008-2009 PetaLogix
4 * Copyright (C) 2007 John Williams
5 *
6 * Reasonably optimised generic C-code for memcpy on Microblaze
7 * This is generic C code to do efficient, alignment-aware memmove.
8 *
9 * It is based on demo code originally Copyright 2001 by Intel Corp, taken from
10 * http://www.embedded.com/showArticle.jhtml?articleID=19205567
11 *
12 * Attempts were made, unsuccesfully, to contact the original
13 * author of this code (Michael Morrow, Intel). Below is the original
14 * copyright notice.
15 *
16 * This software has been developed by Intel Corporation.
17 * Intel specifically disclaims all warranties, express or
18 * implied, and all liability, including consequential and
19 * other indirect damages, for the use of this program, including
20 * liability for infringement of any proprietary rights,
21 * and including the warranties of merchantability and fitness
22 * for a particular purpose. Intel does not assume any
23 * responsibility for and errors which may appear in this program
24 * not any responsibility to update it.
25 */
26
27#include <linux/types.h>
28#include <linux/stddef.h>
29#include <linux/compiler.h>
30#include <linux/module.h>
31#include <linux/string.h>
32
33#ifdef __HAVE_ARCH_MEMMOVE
34void *memmove(void *v_dst, const void *v_src, __kernel_size_t c)
35{
36 const char *src = v_src;
37 char *dst = v_dst;
38
39#ifdef CONFIG_OPT_LIB_FUNCTION
40 const uint32_t *i_src;
41 uint32_t *i_dst;
42#endif
43
44 if (!c)
45 return v_dst;
46
47 /* Use memcpy when source is higher than dest */
48 if (v_dst <= v_src)
49 return memcpy(v_dst, v_src, c);
50
51#ifndef CONFIG_OPT_LIB_FUNCTION
52 /* copy backwards, from end to beginning */
53 src += c;
54 dst += c;
55
56 /* Simple, byte oriented memmove. */
57 while (c--)
58 *--dst = *--src;
59
60 return v_dst;
61#else
62 /* The following code tries to optimize the copy by using unsigned
63 * alignment. This will work fine if both source and destination are
64 * aligned on the same boundary. However, if they are aligned on
65 * different boundaries shifts will be necessary. This might result in
66 * bad performance on MicroBlaze systems without a barrel shifter.
67 */
68 /* FIXME this part needs more test */
69 /* Do a descending copy - this is a bit trickier! */
70 dst += c;
71 src += c;
72
73 if (c >= 4) {
74 unsigned value, buf_hold;
75
76 /* Align the destination to a word boundry. */
77 /* This is done in an endian independant manner. */
78
79 switch ((unsigned long)dst & 3) {
80 case 3:
81 *--dst = *--src;
82 --c;
83 case 2:
84 *--dst = *--src;
85 --c;
86 case 1:
87 *--dst = *--src;
88 --c;
89 }
90
91 i_dst = (void *)dst;
92 /* Choose a copy scheme based on the source */
93 /* alignment relative to dstination. */
94 switch ((unsigned long)src & 3) {
95 case 0x0: /* Both byte offsets are aligned */
96
97 i_src = (const void *)src;
98
99 for (; c >= 4; c -= 4)
100 *--i_dst = *--i_src;
101
102 src = (const void *)i_src;
103 break;
104 case 0x1: /* Unaligned - Off by 1 */
105 /* Word align the source */
106 i_src = (const void *) (((unsigned)src + 4) & ~3);
107
108 /* Load the holding buffer */
109 buf_hold = *--i_src >> 24;
110
111 for (; c >= 4; c -= 4) {
112 value = *--i_src;
113 *--i_dst = buf_hold << 8 | value;
114 buf_hold = value >> 24;
115 }
116
117 /* Realign the source */
118 src = (const void *)i_src;
119 src += 1;
120 break;
121 case 0x2: /* Unaligned - Off by 2 */
122 /* Word align the source */
123 i_src = (const void *) (((unsigned)src + 4) & ~3);
124
125 /* Load the holding buffer */
126 buf_hold = *--i_src >> 16;
127
128 for (; c >= 4; c -= 4) {
129 value = *--i_src;
130 *--i_dst = buf_hold << 16 | value;
131 buf_hold = value >> 16;
132 }
133
134 /* Realign the source */
135 src = (const void *)i_src;
136 src += 2;
137 break;
138 case 0x3: /* Unaligned - Off by 3 */
139 /* Word align the source */
140 i_src = (const void *) (((unsigned)src + 4) & ~3);
141
142 /* Load the holding buffer */
143 buf_hold = *--i_src >> 8;
144
145 for (; c >= 4; c -= 4) {
146 value = *--i_src;
147 *--i_dst = buf_hold << 24 | value;
148 buf_hold = value >> 8;
149 }
150
151 /* Realign the source */
152 src = (const void *)i_src;
153 src += 3;
154 break;
155 }
156 dst = (void *)i_dst;
157 }
158
159 /* simple fast copy, ... unless a cache boundry is crossed */
160 /* Finish off any remaining bytes */
161 switch (c) {
162 case 4:
163 *--dst = *--src;
164 case 3:
165 *--dst = *--src;
166 case 2:
167 *--dst = *--src;
168 case 1:
169 *--dst = *--src;
170 }
171 return v_dst;
172#endif
173}
174EXPORT_SYMBOL(memmove);
175#endif /* __HAVE_ARCH_MEMMOVE */
diff --git a/arch/microblaze/lib/memset.c b/arch/microblaze/lib/memset.c
new file mode 100644
index 000000000000..941dc8f94b03
--- /dev/null
+++ b/arch/microblaze/lib/memset.c
@@ -0,0 +1,82 @@
1/*
2 * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
3 * Copyright (C) 2008-2009 PetaLogix
4 * Copyright (C) 2007 John Williams
5 *
6 * Reasonably optimised generic C-code for memset on Microblaze
7 * This is generic C code to do efficient, alignment-aware memcpy.
8 *
9 * It is based on demo code originally Copyright 2001 by Intel Corp, taken from
10 * http://www.embedded.com/showArticle.jhtml?articleID=19205567
11 *
12 * Attempts were made, unsuccesfully, to contact the original
13 * author of this code (Michael Morrow, Intel). Below is the original
14 * copyright notice.
15 *
16 * This software has been developed by Intel Corporation.
17 * Intel specifically disclaims all warranties, express or
18 * implied, and all liability, including consequential and
19 * other indirect damages, for the use of this program, including
20 * liability for infringement of any proprietary rights,
21 * and including the warranties of merchantability and fitness
22 * for a particular purpose. Intel does not assume any
23 * responsibility for and errors which may appear in this program
24 * not any responsibility to update it.
25 */
26
27#include <linux/types.h>
28#include <linux/stddef.h>
29#include <linux/compiler.h>
30#include <linux/module.h>
31#include <linux/string.h>
32
33#ifdef __HAVE_ARCH_MEMSET
34void *memset(void *v_src, int c, __kernel_size_t n)
35{
36
37 char *src = v_src;
38#ifdef CONFIG_OPT_LIB_FUNCTION
39 uint32_t *i_src;
40 uint32_t w32;
41#endif
42 /* Truncate c to 8 bits */
43 c = (c & 0xFF);
44
45#ifdef CONFIG_OPT_LIB_FUNCTION
46 /* Make a repeating word out of it */
47 w32 = c;
48 w32 |= w32 << 8;
49 w32 |= w32 << 16;
50
51 if (n >= 4) {
52 /* Align the destination to a word boundary */
53 /* This is done in an endian independant manner */
54 switch ((unsigned) src & 3) {
55 case 1:
56 *src++ = c;
57 --n;
58 case 2:
59 *src++ = c;
60 --n;
61 case 3:
62 *src++ = c;
63 --n;
64 }
65
66 i_src = (void *)src;
67
68 /* Do as many full-word copies as we can */
69 for (; n >= 4; n -= 4)
70 *i_src++ = w32;
71
72 src = (void *)i_src;
73 }
74#endif
75 /* Simple, byte oriented memset or the rest of count. */
76 while (n--)
77 *src++ = c;
78
79 return v_src;
80}
81EXPORT_SYMBOL(memset);
82#endif /* __HAVE_ARCH_MEMSET */
diff --git a/arch/microblaze/lib/uaccess.c b/arch/microblaze/lib/uaccess.c
new file mode 100644
index 000000000000..8eb9df5a26c9
--- /dev/null
+++ b/arch/microblaze/lib/uaccess.c
@@ -0,0 +1,41 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#include <linux/string.h>
10#include <asm/uaccess.h>
11
12#include <asm/bug.h>
13
14long strnlen_user(const char __user *src, long count)
15{
16 return strlen(src) + 1;
17}
18
19#define __do_strncpy_from_user(dst, src, count, res) \
20 do { \
21 char *tmp; \
22 strncpy(dst, src, count); \
23 for (tmp = dst; *tmp && count > 0; tmp++, count--) \
24 ; \
25 res = (tmp - dst); \
26 } while (0)
27
28long __strncpy_from_user(char *dst, const char __user *src, long count)
29{
30 long res;
31 __do_strncpy_from_user(dst, src, count, res);
32 return res;
33}
34
35long strncpy_from_user(char *dst, const char __user *src, long count)
36{
37 long res = -EFAULT;
38 if (access_ok(VERIFY_READ, src, 1))
39 __do_strncpy_from_user(dst, src, count, res);
40 return res;
41}
diff --git a/arch/microblaze/mm/Makefile b/arch/microblaze/mm/Makefile
new file mode 100644
index 000000000000..bf9e4479a1fd
--- /dev/null
+++ b/arch/microblaze/mm/Makefile
@@ -0,0 +1,5 @@
1#
2# Makefile
3#
4
5obj-y := init.o
diff --git a/arch/microblaze/mm/init.c b/arch/microblaze/mm/init.c
new file mode 100644
index 000000000000..b0c8213cd6cf
--- /dev/null
+++ b/arch/microblaze/mm/init.c
@@ -0,0 +1,201 @@
1/*
2 * Copyright (C) 2007-2008 Michal Simek <monstr@monstr.eu>
3 * Copyright (C) 2006 Atmark Techno, Inc.
4 *
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 */
9
10#include <linux/bootmem.h>
11#include <linux/init.h>
12#include <linux/kernel.h>
13#include <linux/lmb.h>
14#include <linux/mm.h> /* mem_init */
15#include <linux/initrd.h>
16#include <linux/pagemap.h>
17#include <linux/pfn.h>
18#include <linux/swap.h>
19
20#include <asm/page.h>
21#include <asm/mmu_context.h>
22#include <asm/pgalloc.h>
23#include <asm/sections.h>
24#include <asm/tlb.h>
25
26unsigned int __page_offset;
27/* EXPORT_SYMBOL(__page_offset); */
28
29char *klimit = _end;
30
31/*
32 * Initialize the bootmem system and give it all the memory we
33 * have available.
34 */
35unsigned int memory_start;
36unsigned int memory_end; /* due to mm/nommu.c */
37unsigned int memory_size;
38
39/*
40 * paging_init() sets up the page tables - in fact we've already done this.
41 */
42static void __init paging_init(void)
43{
44 int i;
45 unsigned long zones_size[MAX_NR_ZONES];
46
47 /*
48 * old: we can DMA to/from any address.put all page into ZONE_DMA
49 * We use only ZONE_NORMAL
50 */
51 zones_size[ZONE_NORMAL] = max_mapnr;
52
53 /* every other zones are empty */
54 for (i = 1; i < MAX_NR_ZONES; i++)
55 zones_size[i] = 0;
56
57 free_area_init(zones_size);
58}
59
60void __init setup_memory(void)
61{
62 int i;
63 unsigned long map_size;
64 u32 kernel_align_start, kernel_align_size;
65
66 /* Find main memory where is the kernel */
67 for (i = 0; i < lmb.memory.cnt; i++) {
68 memory_start = (u32) lmb.memory.region[i].base;
69 memory_end = (u32) lmb.memory.region[i].base
70 + (u32) lmb.memory.region[i].size;
71 if ((memory_start <= (u32)_text) &&
72 ((u32)_text <= memory_end)) {
73 memory_size = memory_end - memory_start;
74 PAGE_OFFSET = memory_start;
75 printk(KERN_INFO "%s: Main mem: 0x%x-0x%x, "
76 "size 0x%08x\n", __func__, memory_start,
77 memory_end, memory_size);
78 break;
79 }
80 }
81
82 if (!memory_start || !memory_end) {
83 panic("%s: Missing memory setting 0x%08x-0x%08x\n",
84 __func__, memory_start, memory_end);
85 }
86
87 /* reservation of region where is the kernel */
88 kernel_align_start = PAGE_DOWN((u32)_text);
89 /* ALIGN can be remove because _end in vmlinux.lds.S is align */
90 kernel_align_size = PAGE_UP((u32)klimit) - kernel_align_start;
91 lmb_reserve(kernel_align_start, kernel_align_size);
92 printk(KERN_INFO "%s: kernel addr=0x%08x-0x%08x size=0x%08x\n",
93 __func__, kernel_align_start, kernel_align_start
94 + kernel_align_size, kernel_align_size);
95
96 /*
97 * Kernel:
98 * start: base phys address of kernel - page align
99 * end: base phys address of kernel - page align
100 *
101 * min_low_pfn - the first page (mm/bootmem.c - node_boot_start)
102 * max_low_pfn
103 * max_mapnr - the first unused page (mm/bootmem.c - node_low_pfn)
104 * num_physpages - number of all pages
105 */
106
107 /* memory start is from the kernel end (aligned) to higher addr */
108 min_low_pfn = memory_start >> PAGE_SHIFT; /* minimum for allocation */
109 /* RAM is assumed contiguous */
110 num_physpages = max_mapnr = memory_size >> PAGE_SHIFT;
111 max_pfn = max_low_pfn = memory_end >> PAGE_SHIFT;
112
113 printk(KERN_INFO "%s: max_mapnr: %#lx\n", __func__, max_mapnr);
114 printk(KERN_INFO "%s: min_low_pfn: %#lx\n", __func__, min_low_pfn);
115 printk(KERN_INFO "%s: max_low_pfn: %#lx\n", __func__, max_low_pfn);
116
117 /*
118 * Find an area to use for the bootmem bitmap.
119 * We look for the first area which is at least
120 * 128kB in length (128kB is enough for a bitmap
121 * for 4GB of memory, using 4kB pages), plus 1 page
122 * (in case the address isn't page-aligned).
123 */
124 map_size = init_bootmem_node(NODE_DATA(0), PFN_UP(TOPHYS((u32)_end)),
125 min_low_pfn, max_low_pfn);
126
127 lmb_reserve(PFN_UP(TOPHYS((u32)_end)) << PAGE_SHIFT, map_size);
128
129 /* free bootmem is whole main memory */
130 free_bootmem(memory_start, memory_size);
131
132 /* reserve allocate blocks */
133 for (i = 0; i < lmb.reserved.cnt; i++) {
134 pr_debug("reserved %d - 0x%08x-0x%08x\n", i,
135 (u32) lmb.reserved.region[i].base,
136 (u32) lmb_size_bytes(&lmb.reserved, i));
137 reserve_bootmem(lmb.reserved.region[i].base,
138 lmb_size_bytes(&lmb.reserved, i) - 1, BOOTMEM_DEFAULT);
139 }
140 paging_init();
141}
142
143void free_init_pages(char *what, unsigned long begin, unsigned long end)
144{
145 unsigned long addr;
146
147 for (addr = begin; addr < end; addr += PAGE_SIZE) {
148 ClearPageReserved(virt_to_page(addr));
149 init_page_count(virt_to_page(addr));
150 memset((void *)addr, 0xcc, PAGE_SIZE);
151 free_page(addr);
152 totalram_pages++;
153 }
154 printk(KERN_INFO "Freeing %s: %ldk freed\n", what, (end - begin) >> 10);
155}
156
157#ifdef CONFIG_BLK_DEV_INITRD
158void free_initrd_mem(unsigned long start, unsigned long end)
159{
160 int pages = 0;
161 for (; start < end; start += PAGE_SIZE) {
162 ClearPageReserved(virt_to_page(start));
163 init_page_count(virt_to_page(start));
164 free_page(start);
165 totalram_pages++;
166 pages++;
167 }
168 printk(KERN_NOTICE "Freeing initrd memory: %dk freed\n", pages);
169}
170#endif
171
172void free_initmem(void)
173{
174 free_init_pages("unused kernel memory",
175 (unsigned long)(&__init_begin),
176 (unsigned long)(&__init_end));
177}
178
179/* FIXME from arch/powerpc/mm/mem.c*/
180void show_mem(void)
181{
182 printk(KERN_NOTICE "%s\n", __func__);
183}
184
185void __init mem_init(void)
186{
187 high_memory = (void *)__va(memory_end);
188 /* this will put all memory onto the freelists */
189 totalram_pages += free_all_bootmem();
190
191 printk(KERN_INFO "Memory: %luk/%luk available\n",
192 (unsigned long) nr_free_pages() << (PAGE_SHIFT-10),
193 num_physpages << (PAGE_SHIFT-10));
194}
195
196/* Check against bounds of physical memory */
197int ___range_ok(unsigned long addr, unsigned long size)
198{
199 return ((addr < memory_start) ||
200 ((addr + size) > memory_end));
201}
diff --git a/arch/microblaze/platform/Kconfig.platform b/arch/microblaze/platform/Kconfig.platform
new file mode 100644
index 000000000000..8e9b4752d3ff
--- /dev/null
+++ b/arch/microblaze/platform/Kconfig.platform
@@ -0,0 +1,85 @@
1# For a description of the syntax of this configuration file,
2# see Documentation/kbuild/kconfig-language.txt.
3#
4# Platform selection Kconfig menu for MicroBlaze targets
5#
6
7menu "Platform options"
8choice
9 prompt "Platform"
10 default PLATFORM_MICROBLAZE_AUTO
11 help
12 Choose which hardware board/platform you are targeting.
13
14config PLATFORM_GENERIC
15 bool "Generic"
16 help
17 Choose this option for the Generic platform.
18
19endchoice
20
21config SELFMOD
22 bool "Use self modified code for intc/timer"
23 depends on EXPERIMENTAL && NO_MMU
24 default n
25 help
26 This choice enables self-modified code for interrupt controller
27 and timer.
28
29config SELFMOD_INTC
30 bool "Use self modified code for intc"
31 depends on SELFMOD
32 default y
33 help
34 This choice enables self-modified code for interrupt controller.
35
36config SELFMOD_TIMER
37 bool "Use self modified code for timer"
38 depends on SELFMOD
39 default y
40 help
41 This choice enables self-modified code for timer.
42
43config OPT_LIB_FUNCTION
44 bool "Optimalized lib function"
45 default y
46 help
47 Allows turn on optimalized library function (memcpy and memmove).
48 They are optimized by using word alignment. This will work
49 fine if both source and destination are aligned on the same
50 boundary. However, if they are aligned on different boundaries
51 shifts will be necessary. This might result in bad performance
52 on MicroBlaze systems without a barrel shifter.
53
54config OPT_LIB_ASM
55 bool "Optimalized lib function ASM"
56 depends on OPT_LIB_FUNCTION
57 default n
58 help
59 Allows turn on optimalized library function (memcpy and memmove).
60 Function are written in asm code.
61
62# This is still a bit broken - disabling for now JW 20070504
63config ALLOW_EDIT_AUTO
64 bool "Permit Display/edit of Kconfig.auto platform settings"
65 default n
66 help
67 Allows the editing of auto-generated platform settings from
68 the Kconfig.auto file. Obviously this does not change the
69 underlying hardware, so be very careful if you go editing
70 these settings.
71
72 Also, if you enable this, and edit various Kconfig.auto
73 settings, YOUR CHANGES WILL BE LOST if you then disable it
74 again. You have been warned!
75
76 If unsure, say no.
77
78comment "Automatic platform settings from Kconfig.auto"
79 depends on ALLOW_EDIT_AUTO
80
81if PLATFORM_GENERIC=y
82 source "arch/microblaze/platform/generic/Kconfig.auto"
83endif
84
85endmenu
diff --git a/arch/microblaze/platform/Makefile b/arch/microblaze/platform/Makefile
new file mode 100644
index 000000000000..ea1b75cc5775
--- /dev/null
+++ b/arch/microblaze/platform/Makefile
@@ -0,0 +1,6 @@
1#
2# Makefile for arch/microblaze/platform directory
3#
4#obj-$(CONFIG_PLATFORM_GENERIC) += generic/
5
6obj-y += platform.o
diff --git a/arch/microblaze/platform/generic/Kconfig.auto b/arch/microblaze/platform/generic/Kconfig.auto
new file mode 100644
index 000000000000..fbca22d9c8b9
--- /dev/null
+++ b/arch/microblaze/platform/generic/Kconfig.auto
@@ -0,0 +1,62 @@
1#
2# (C) Copyright 2007 Michal Simek
3#
4# Michal SIMEK <monstr@monstr.eu>
5#
6# This program is free software; you can redistribute it and/or
7# modify it under the terms of the GNU General Public License as
8# published by the Free Software Foundation; either version 2 of
9# the License, or (at your option) any later version.
10#
11# This program is distributed in the hope that it will be useful,
12# but WITHOUT ANY WARRANTY; without even the implied warranty of
13# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14# GNU General Public License for more details.
15#
16# You should have received a copy of the GNU General Public License
17# along with this program; if not, write to the Free Software
18# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19# MA 02111-1307 USA
20#
21
22# Definitions for MICROBLAZE0
23comment "Definitions for MICROBLAZE0"
24 depends on ALLOW_EDIT_AUTO
25
26config KERNEL_BASE_ADDR
27 hex "Physical address where Linux Kernel is"
28 default "0x90000000"
29 help
30 BASE Address for kernel
31
32config XILINX_MICROBLAZE0_FAMILY
33 string "Targetted FPGA family" if ALLOW_EDIT_AUTO
34 default "virtex5"
35
36config XILINX_MICROBLAZE0_USE_MSR_INSTR
37 int "USE_MSR_INSTR range (0:1)" if ALLOW_EDIT_AUTO
38 default 1
39
40config XILINX_MICROBLAZE0_USE_PCMP_INSTR
41 int "USE_PCMP_INSTR range (0:1)" if ALLOW_EDIT_AUTO
42 default 1
43
44config XILINX_MICROBLAZE0_USE_BARREL
45 int "USE_BARREL range (0:1)" if ALLOW_EDIT_AUTO
46 default 1
47
48config XILINX_MICROBLAZE0_USE_DIV
49 int "USE_DIV range (0:1)" if ALLOW_EDIT_AUTO
50 default 1
51
52config XILINX_MICROBLAZE0_USE_HW_MUL
53 int "USE_HW_MUL values (0=NONE, 1=MUL32, 2=MUL64)" if ALLOW_EDIT_AUTO
54 default 2
55
56config XILINX_MICROBLAZE0_USE_FPU
57 int "USE_FPU values (0=NONE, 1=BASIC, 2=EXTENDED)" if ALLOW_EDIT_AUTO
58 default 2
59
60config XILINX_MICROBLAZE0_HW_VER
61 string "Core version number" if ALLOW_EDIT_AUTO
62 default 7.10.d
diff --git a/arch/microblaze/platform/generic/Makefile b/arch/microblaze/platform/generic/Makefile
new file mode 100644
index 000000000000..9a8b1bd3fa6d
--- /dev/null
+++ b/arch/microblaze/platform/generic/Makefile
@@ -0,0 +1,3 @@
1#
2# Empty Makefile to keep make clean happy
3#
diff --git a/arch/microblaze/platform/generic/system.dts b/arch/microblaze/platform/generic/system.dts
new file mode 100644
index 000000000000..29993f62b30a
--- /dev/null
+++ b/arch/microblaze/platform/generic/system.dts
@@ -0,0 +1,332 @@
1/*
2 * Device Tree Generator version: 1.1
3 *
4 * (C) Copyright 2007-2008 Xilinx, Inc.
5 * (C) Copyright 2007-2009 Michal Simek
6 *
7 * Michal SIMEK <monstr@monstr.eu>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 *
24 * CAUTION: This file is automatically generated by libgen.
25 * Version: Xilinx EDK 10.1.03 EDK_K_SP3.6
26 *
27 * XPS project directory: Xilinx-ML505-ll_temac-sgdma-MMU-FDT-edk101
28 */
29
30/dts-v1/;
31/ {
32 #address-cells = <1>;
33 #size-cells = <1>;
34 compatible = "xlnx,microblaze";
35 model = "testing";
36 DDR2_SDRAM: memory@90000000 {
37 device_type = "memory";
38 reg = < 0x90000000 0x10000000 >;
39 } ;
40 chosen {
41 bootargs = "console=ttyUL0,115200 highres=on";
42 linux,stdout-path = "/plb@0/serial@84000000";
43 } ;
44 cpus {
45 #address-cells = <1>;
46 #cpus = <0x1>;
47 #size-cells = <0>;
48 microblaze_0: cpu@0 {
49 clock-frequency = <125000000>;
50 compatible = "xlnx,microblaze-7.10.d";
51 d-cache-baseaddr = <0x90000000>;
52 d-cache-highaddr = <0x9fffffff>;
53 d-cache-line-size = <0x10>;
54 d-cache-size = <0x2000>;
55 device_type = "cpu";
56 i-cache-baseaddr = <0x90000000>;
57 i-cache-highaddr = <0x9fffffff>;
58 i-cache-line-size = <0x10>;
59 i-cache-size = <0x2000>;
60 model = "microblaze,7.10.d";
61 reg = <0>;
62 timebase-frequency = <125000000>;
63 xlnx,addr-tag-bits = <0xf>;
64 xlnx,allow-dcache-wr = <0x1>;
65 xlnx,allow-icache-wr = <0x1>;
66 xlnx,area-optimized = <0x0>;
67 xlnx,cache-byte-size = <0x2000>;
68 xlnx,d-lmb = <0x1>;
69 xlnx,d-opb = <0x0>;
70 xlnx,d-plb = <0x1>;
71 xlnx,data-size = <0x20>;
72 xlnx,dcache-addr-tag = <0xf>;
73 xlnx,dcache-always-used = <0x1>;
74 xlnx,dcache-byte-size = <0x2000>;
75 xlnx,dcache-line-len = <0x4>;
76 xlnx,dcache-use-fsl = <0x1>;
77 xlnx,debug-enabled = <0x1>;
78 xlnx,div-zero-exception = <0x1>;
79 xlnx,dopb-bus-exception = <0x0>;
80 xlnx,dynamic-bus-sizing = <0x1>;
81 xlnx,edge-is-positive = <0x1>;
82 xlnx,family = "virtex5";
83 xlnx,fpu-exception = <0x1>;
84 xlnx,fsl-data-size = <0x20>;
85 xlnx,fsl-exception = <0x0>;
86 xlnx,fsl-links = <0x0>;
87 xlnx,i-lmb = <0x1>;
88 xlnx,i-opb = <0x0>;
89 xlnx,i-plb = <0x1>;
90 xlnx,icache-always-used = <0x1>;
91 xlnx,icache-line-len = <0x4>;
92 xlnx,icache-use-fsl = <0x1>;
93 xlnx,ill-opcode-exception = <0x1>;
94 xlnx,instance = "microblaze_0";
95 xlnx,interconnect = <0x1>;
96 xlnx,interrupt-is-edge = <0x0>;
97 xlnx,iopb-bus-exception = <0x0>;
98 xlnx,mmu-dtlb-size = <0x4>;
99 xlnx,mmu-itlb-size = <0x2>;
100 xlnx,mmu-tlb-access = <0x3>;
101 xlnx,mmu-zones = <0x10>;
102 xlnx,number-of-pc-brk = <0x1>;
103 xlnx,number-of-rd-addr-brk = <0x0>;
104 xlnx,number-of-wr-addr-brk = <0x0>;
105 xlnx,opcode-0x0-illegal = <0x1>;
106 xlnx,pvr = <0x2>;
107 xlnx,pvr-user1 = <0x0>;
108 xlnx,pvr-user2 = <0x0>;
109 xlnx,reset-msr = <0x0>;
110 xlnx,sco = <0x0>;
111 xlnx,unaligned-exceptions = <0x1>;
112 xlnx,use-barrel = <0x1>;
113 xlnx,use-dcache = <0x1>;
114 xlnx,use-div = <0x1>;
115 xlnx,use-ext-brk = <0x1>;
116 xlnx,use-ext-nm-brk = <0x1>;
117 xlnx,use-extended-fsl-instr = <0x0>;
118 xlnx,use-fpu = <0x2>;
119 xlnx,use-hw-mul = <0x2>;
120 xlnx,use-icache = <0x1>;
121 xlnx,use-interrupt = <0x1>;
122 xlnx,use-mmu = <0x3>;
123 xlnx,use-msr-instr = <0x1>;
124 xlnx,use-pcmp-instr = <0x1>;
125 } ;
126 } ;
127 mb_plb: plb@0 {
128 #address-cells = <1>;
129 #size-cells = <1>;
130 compatible = "xlnx,plb-v46-1.03.a", "simple-bus";
131 ranges ;
132 FLASH: flash@a0000000 {
133 bank-width = <2>;
134 compatible = "xlnx,xps-mch-emc-2.00.a", "cfi-flash";
135 reg = < 0xa0000000 0x2000000 >;
136 xlnx,family = "virtex5";
137 xlnx,include-datawidth-matching-0 = <0x1>;
138 xlnx,include-datawidth-matching-1 = <0x0>;
139 xlnx,include-datawidth-matching-2 = <0x0>;
140 xlnx,include-datawidth-matching-3 = <0x0>;
141 xlnx,include-negedge-ioregs = <0x0>;
142 xlnx,include-plb-ipif = <0x1>;
143 xlnx,include-wrbuf = <0x1>;
144 xlnx,max-mem-width = <0x10>;
145 xlnx,mch-native-dwidth = <0x20>;
146 xlnx,mch-plb-clk-period-ps = <0x1f40>;
147 xlnx,mch-splb-awidth = <0x20>;
148 xlnx,mch0-accessbuf-depth = <0x10>;
149 xlnx,mch0-protocol = <0x0>;
150 xlnx,mch0-rddatabuf-depth = <0x10>;
151 xlnx,mch1-accessbuf-depth = <0x10>;
152 xlnx,mch1-protocol = <0x0>;
153 xlnx,mch1-rddatabuf-depth = <0x10>;
154 xlnx,mch2-accessbuf-depth = <0x10>;
155 xlnx,mch2-protocol = <0x0>;
156 xlnx,mch2-rddatabuf-depth = <0x10>;
157 xlnx,mch3-accessbuf-depth = <0x10>;
158 xlnx,mch3-protocol = <0x0>;
159 xlnx,mch3-rddatabuf-depth = <0x10>;
160 xlnx,mem0-width = <0x10>;
161 xlnx,mem1-width = <0x20>;
162 xlnx,mem2-width = <0x20>;
163 xlnx,mem3-width = <0x20>;
164 xlnx,num-banks-mem = <0x1>;
165 xlnx,num-channels = <0x0>;
166 xlnx,priority-mode = <0x0>;
167 xlnx,synch-mem-0 = <0x0>;
168 xlnx,synch-mem-1 = <0x0>;
169 xlnx,synch-mem-2 = <0x0>;
170 xlnx,synch-mem-3 = <0x0>;
171 xlnx,synch-pipedelay-0 = <0x2>;
172 xlnx,synch-pipedelay-1 = <0x2>;
173 xlnx,synch-pipedelay-2 = <0x2>;
174 xlnx,synch-pipedelay-3 = <0x2>;
175 xlnx,tavdv-ps-mem-0 = <0x1adb0>;
176 xlnx,tavdv-ps-mem-1 = <0x3a98>;
177 xlnx,tavdv-ps-mem-2 = <0x3a98>;
178 xlnx,tavdv-ps-mem-3 = <0x3a98>;
179 xlnx,tcedv-ps-mem-0 = <0x1adb0>;
180 xlnx,tcedv-ps-mem-1 = <0x3a98>;
181 xlnx,tcedv-ps-mem-2 = <0x3a98>;
182 xlnx,tcedv-ps-mem-3 = <0x3a98>;
183 xlnx,thzce-ps-mem-0 = <0x88b8>;
184 xlnx,thzce-ps-mem-1 = <0x1b58>;
185 xlnx,thzce-ps-mem-2 = <0x1b58>;
186 xlnx,thzce-ps-mem-3 = <0x1b58>;
187 xlnx,thzoe-ps-mem-0 = <0x1b58>;
188 xlnx,thzoe-ps-mem-1 = <0x1b58>;
189 xlnx,thzoe-ps-mem-2 = <0x1b58>;
190 xlnx,thzoe-ps-mem-3 = <0x1b58>;
191 xlnx,tlzwe-ps-mem-0 = <0x88b8>;
192 xlnx,tlzwe-ps-mem-1 = <0x0>;
193 xlnx,tlzwe-ps-mem-2 = <0x0>;
194 xlnx,tlzwe-ps-mem-3 = <0x0>;
195 xlnx,twc-ps-mem-0 = <0x2af8>;
196 xlnx,twc-ps-mem-1 = <0x3a98>;
197 xlnx,twc-ps-mem-2 = <0x3a98>;
198 xlnx,twc-ps-mem-3 = <0x3a98>;
199 xlnx,twp-ps-mem-0 = <0x11170>;
200 xlnx,twp-ps-mem-1 = <0x2ee0>;
201 xlnx,twp-ps-mem-2 = <0x2ee0>;
202 xlnx,twp-ps-mem-3 = <0x2ee0>;
203 xlnx,xcl0-linesize = <0x4>;
204 xlnx,xcl0-writexfer = <0x1>;
205 xlnx,xcl1-linesize = <0x4>;
206 xlnx,xcl1-writexfer = <0x1>;
207 xlnx,xcl2-linesize = <0x4>;
208 xlnx,xcl2-writexfer = <0x1>;
209 xlnx,xcl3-linesize = <0x4>;
210 xlnx,xcl3-writexfer = <0x1>;
211 } ;
212 Hard_Ethernet_MAC: xps-ll-temac@81c00000 {
213 #address-cells = <1>;
214 #size-cells = <1>;
215 compatible = "xlnx,compound";
216 ethernet@81c00000 {
217 compatible = "xlnx,xps-ll-temac-1.01.b";
218 device_type = "network";
219 interrupt-parent = <&xps_intc_0>;
220 interrupts = < 5 2 >;
221 llink-connected = <&PIM3>;
222 local-mac-address = [ 02 00 00 00 00 00 ];
223 reg = < 0x81c00000 0x40 >;
224 xlnx,bus2core-clk-ratio = <0x1>;
225 xlnx,phy-type = <0x1>;
226 xlnx,phyaddr = <0x1>;
227 xlnx,rxcsum = <0x0>;
228 xlnx,rxfifo = <0x1000>;
229 xlnx,temac-type = <0x0>;
230 xlnx,txcsum = <0x0>;
231 xlnx,txfifo = <0x1000>;
232 } ;
233 } ;
234 IIC_EEPROM: i2c@81600000 {
235 compatible = "xlnx,xps-iic-2.00.a";
236 interrupt-parent = <&xps_intc_0>;
237 interrupts = < 6 2 >;
238 reg = < 0x81600000 0x10000 >;
239 xlnx,clk-freq = <0x7735940>;
240 xlnx,family = "virtex5";
241 xlnx,gpo-width = <0x1>;
242 xlnx,iic-freq = <0x186a0>;
243 xlnx,scl-inertial-delay = <0x0>;
244 xlnx,sda-inertial-delay = <0x0>;
245 xlnx,ten-bit-adr = <0x0>;
246 } ;
247 LEDs_8Bit: gpio@81400000 {
248 compatible = "xlnx,xps-gpio-1.00.a";
249 interrupt-parent = <&xps_intc_0>;
250 interrupts = < 7 2 >;
251 reg = < 0x81400000 0x10000 >;
252 xlnx,all-inputs = <0x0>;
253 xlnx,all-inputs-2 = <0x0>;
254 xlnx,dout-default = <0x0>;
255 xlnx,dout-default-2 = <0x0>;
256 xlnx,family = "virtex5";
257 xlnx,gpio-width = <0x8>;
258 xlnx,interrupt-present = <0x1>;
259 xlnx,is-bidir = <0x1>;
260 xlnx,is-bidir-2 = <0x1>;
261 xlnx,is-dual = <0x0>;
262 xlnx,tri-default = <0xffffffff>;
263 xlnx,tri-default-2 = <0xffffffff>;
264 } ;
265 RS232_Uart_1: serial@84000000 {
266 clock-frequency = <125000000>;
267 compatible = "xlnx,xps-uartlite-1.00.a";
268 current-speed = <115200>;
269 device_type = "serial";
270 interrupt-parent = <&xps_intc_0>;
271 interrupts = < 8 0 >;
272 port-number = <0>;
273 reg = < 0x84000000 0x10000 >;
274 xlnx,baudrate = <0x1c200>;
275 xlnx,data-bits = <0x8>;
276 xlnx,family = "virtex5";
277 xlnx,odd-parity = <0x0>;
278 xlnx,use-parity = <0x0>;
279 } ;
280 SysACE_CompactFlash: sysace@83600000 {
281 compatible = "xlnx,xps-sysace-1.00.a";
282 interrupt-parent = <&xps_intc_0>;
283 interrupts = < 4 2 >;
284 reg = < 0x83600000 0x10000 >;
285 xlnx,family = "virtex5";
286 xlnx,mem-width = <0x10>;
287 } ;
288 debug_module: debug@84400000 {
289 compatible = "xlnx,mdm-1.00.d";
290 reg = < 0x84400000 0x10000 >;
291 xlnx,family = "virtex5";
292 xlnx,interconnect = <0x1>;
293 xlnx,jtag-chain = <0x2>;
294 xlnx,mb-dbg-ports = <0x1>;
295 xlnx,uart-width = <0x8>;
296 xlnx,use-uart = <0x1>;
297 xlnx,write-fsl-ports = <0x0>;
298 } ;
299 mpmc@90000000 {
300 #address-cells = <1>;
301 #size-cells = <1>;
302 compatible = "xlnx,mpmc-4.02.a";
303 PIM3: sdma@84600180 {
304 compatible = "xlnx,ll-dma-1.00.a";
305 interrupt-parent = <&xps_intc_0>;
306 interrupts = < 2 2 1 2 >;
307 reg = < 0x84600180 0x80 >;
308 } ;
309 } ;
310 xps_intc_0: interrupt-controller@81800000 {
311 #interrupt-cells = <0x2>;
312 compatible = "xlnx,xps-intc-1.00.a";
313 interrupt-controller ;
314 reg = < 0x81800000 0x10000 >;
315 xlnx,kind-of-intr = <0x100>;
316 xlnx,num-intr-inputs = <0x9>;
317 } ;
318 xps_timer_1: timer@83c00000 {
319 compatible = "xlnx,xps-timer-1.00.a";
320 interrupt-parent = <&xps_intc_0>;
321 interrupts = < 3 2 >;
322 reg = < 0x83c00000 0x10000 >;
323 xlnx,count-width = <0x20>;
324 xlnx,family = "virtex5";
325 xlnx,gen0-assert = <0x1>;
326 xlnx,gen1-assert = <0x1>;
327 xlnx,one-timer-only = <0x0>;
328 xlnx,trig0-assert = <0x1>;
329 xlnx,trig1-assert = <0x1>;
330 } ;
331 } ;
332} ;
diff --git a/arch/microblaze/platform/platform.c b/arch/microblaze/platform/platform.c
new file mode 100644
index 000000000000..56e0234fa34b
--- /dev/null
+++ b/arch/microblaze/platform/platform.c
@@ -0,0 +1,31 @@
1/*
2 * Copyright 2008 Michal Simek <monstr@monstr.eu>
3 *
4 * based on virtex.c file
5 *
6 * Copyright 2007 Secret Lab Technologies Ltd.
7 *
8 * This file is licensed under the terms of the GNU General Public License
9 * version 2. This program is licensed "as is" without any warranty of any
10 * kind, whether express or implied.
11 */
12
13#include <linux/init.h>
14#include <linux/of_platform.h>
15#include <asm/prom.h>
16
17static struct of_device_id xilinx_of_bus_ids[] __initdata = {
18 { .compatible = "simple-bus", },
19 { .compatible = "xlnx,plb-v46-1.00.a", },
20 { .compatible = "xlnx,opb-v20-1.10.c", },
21 { .compatible = "xlnx,opb-v20-1.10.b", },
22 { .compatible = "xlnx,compound", },
23 {}
24};
25
26static int __init microblaze_device_probe(void)
27{
28 of_platform_bus_probe(NULL, xilinx_of_bus_ids, NULL);
29 return 0;
30}
31device_initcall(microblaze_device_probe);
diff --git a/arch/mips/include/asm/mach-rc32434/gpio.h b/arch/mips/include/asm/mach-rc32434/gpio.h
index 3cb50d17b62d..12ee8d510160 100644
--- a/arch/mips/include/asm/mach-rc32434/gpio.h
+++ b/arch/mips/include/asm/mach-rc32434/gpio.h
@@ -80,6 +80,9 @@ struct rb532_gpio_reg {
80/* Compact Flash GPIO pin */ 80/* Compact Flash GPIO pin */
81#define CF_GPIO_NUM 13 81#define CF_GPIO_NUM 13
82 82
83/* S1 button GPIO (shared with UART0_SIN) */
84#define GPIO_BTN_S1 1
85
83extern void rb532_gpio_set_ilevel(int bit, unsigned gpio); 86extern void rb532_gpio_set_ilevel(int bit, unsigned gpio);
84extern void rb532_gpio_set_istat(int bit, unsigned gpio); 87extern void rb532_gpio_set_istat(int bit, unsigned gpio);
85extern void rb532_gpio_set_func(unsigned gpio); 88extern void rb532_gpio_set_func(unsigned gpio);
diff --git a/arch/mips/rb532/devices.c b/arch/mips/rb532/devices.c
index 4a5f05b662ae..9f40e1ff9b4f 100644
--- a/arch/mips/rb532/devices.c
+++ b/arch/mips/rb532/devices.c
@@ -200,26 +200,9 @@ static struct platform_device rb532_led = {
200 .id = -1, 200 .id = -1,
201}; 201};
202 202
203static struct gpio_keys_button rb532_gpio_btn[] = {
204 {
205 .gpio = 1,
206 .code = BTN_0,
207 .desc = "S1",
208 .active_low = 1,
209 }
210};
211
212static struct gpio_keys_platform_data rb532_gpio_btn_data = {
213 .buttons = rb532_gpio_btn,
214 .nbuttons = ARRAY_SIZE(rb532_gpio_btn),
215};
216
217static struct platform_device rb532_button = { 203static struct platform_device rb532_button = {
218 .name = "gpio-keys", 204 .name = "rb532-button",
219 .id = -1, 205 .id = -1,
220 .dev = {
221 .platform_data = &rb532_gpio_btn_data,
222 }
223}; 206};
224 207
225static struct resource rb532_wdt_res[] = { 208static struct resource rb532_wdt_res[] = {
diff --git a/arch/mn10300/Kconfig b/arch/mn10300/Kconfig
index 41d16822e616..355926730e8d 100644
--- a/arch/mn10300/Kconfig
+++ b/arch/mn10300/Kconfig
@@ -370,5 +370,3 @@ source "security/Kconfig"
370source "crypto/Kconfig" 370source "crypto/Kconfig"
371 371
372source "lib/Kconfig" 372source "lib/Kconfig"
373
374source "arch/mn10300/oprofile/Kconfig"
diff --git a/arch/mn10300/Makefile b/arch/mn10300/Makefile
index 6673a28ec07a..dd0c8ff52a68 100644
--- a/arch/mn10300/Makefile
+++ b/arch/mn10300/Makefile
@@ -94,42 +94,8 @@ ifdef CONFIG_DEBUG_INFO
94KBUILD_AFLAGS += -Wa,--gdwarf2 94KBUILD_AFLAGS += -Wa,--gdwarf2
95endif 95endif
96 96
97###################################################################################################
98# 97#
99# juggle some symlinks in the MN10300 asm include dir 98# include the appropriate processor- and unit-specific headers
100# 99#
101# Update machine proc and unit symlinks if something which affects 100KBUILD_CPPFLAGS += -I$(srctree)/arch/mn10300/proc-$(PROCESSOR)/include
102# them changed. We use .proc / .unit to indicate when they were 101KBUILD_CPPFLAGS += -I$(srctree)/arch/mn10300/unit-$(UNIT)/include
103# updated last, otherwise make uses the target directory mtime.
104#
105###################################################################################################
106
107# processor specific definitions
108include/asm-mn10300/.proc: $(wildcard include/config/proc/*.h) include/config/auto.conf
109 @echo ' SYMLINK include/asm-mn10300/proc -> include/asm-mn10300/proc-$(PROCESSOR)'
110ifneq ($(KBUILD_SRC),)
111 $(Q)mkdir -p include/asm-mn10300
112 $(Q)ln -fsn $(srctree)/include/asm-mn10300/proc-$(PROCESSOR) include/asm-mn10300/proc
113else
114 $(Q)ln -fsn proc-$(PROCESSOR) include/asm-mn10300/proc
115endif
116 @touch $@
117
118CLEAN_FILES += include/asm-mn10300/proc include/asm-mn10300/.proc
119
120prepare: include/asm-mn10300/.proc
121
122# unit specific definitions
123include/asm-mn10300/.unit: $(wildcard include/config/unit/*.h) include/config/auto.conf
124 @echo ' SYMLINK include/asm-mn10300/unit -> include/asm-mn10300/unit-$(UNIT)'
125ifneq ($(KBUILD_SRC),)
126 $(Q)mkdir -p include/asm-mn10300
127 $(Q)ln -fsn $(srctree)/include/asm-mn10300/unit-$(UNIT) include/asm-mn10300/unit
128else
129 $(Q)ln -fsn unit-$(UNIT) include/asm-mn10300/unit
130endif
131 @touch $@
132
133CLEAN_FILES += include/asm-mn10300/unit include/asm-mn10300/.unit
134
135prepare: include/asm-mn10300/.unit
diff --git a/arch/mn10300/include/asm/Kbuild b/arch/mn10300/include/asm/Kbuild
new file mode 100644
index 000000000000..c68e1680da01
--- /dev/null
+++ b/arch/mn10300/include/asm/Kbuild
@@ -0,0 +1 @@
include include/asm-generic/Kbuild.asm
diff --git a/arch/mn10300/include/asm/atomic.h b/arch/mn10300/include/asm/atomic.h
new file mode 100644
index 000000000000..bc064825f9b1
--- /dev/null
+++ b/arch/mn10300/include/asm/atomic.h
@@ -0,0 +1,157 @@
1/* MN10300 Atomic counter operations
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_ATOMIC_H
12#define _ASM_ATOMIC_H
13
14#ifdef CONFIG_SMP
15#error not SMP safe
16#endif
17
18/*
19 * Atomic operations that C can't guarantee us. Useful for
20 * resource counting etc..
21 */
22
23#define ATOMIC_INIT(i) { (i) }
24
25#ifdef __KERNEL__
26
27/**
28 * atomic_read - read atomic variable
29 * @v: pointer of type atomic_t
30 *
31 * Atomically reads the value of @v. Note that the guaranteed
32 * useful range of an atomic_t is only 24 bits.
33 */
34#define atomic_read(v) ((v)->counter)
35
36/**
37 * atomic_set - set atomic variable
38 * @v: pointer of type atomic_t
39 * @i: required value
40 *
41 * Atomically sets the value of @v to @i. Note that the guaranteed
42 * useful range of an atomic_t is only 24 bits.
43 */
44#define atomic_set(v, i) (((v)->counter) = (i))
45
46#include <asm/system.h>
47
48/**
49 * atomic_add_return - add integer to atomic variable
50 * @i: integer value to add
51 * @v: pointer of type atomic_t
52 *
53 * Atomically adds @i to @v and returns the result
54 * Note that the guaranteed useful range of an atomic_t is only 24 bits.
55 */
56static inline int atomic_add_return(int i, atomic_t *v)
57{
58 unsigned long flags;
59 int temp;
60
61 local_irq_save(flags);
62 temp = v->counter;
63 temp += i;
64 v->counter = temp;
65 local_irq_restore(flags);
66
67 return temp;
68}
69
70/**
71 * atomic_sub_return - subtract integer from atomic variable
72 * @i: integer value to subtract
73 * @v: pointer of type atomic_t
74 *
75 * Atomically subtracts @i from @v and returns the result
76 * Note that the guaranteed useful range of an atomic_t is only 24 bits.
77 */
78static inline int atomic_sub_return(int i, atomic_t *v)
79{
80 unsigned long flags;
81 int temp;
82
83 local_irq_save(flags);
84 temp = v->counter;
85 temp -= i;
86 v->counter = temp;
87 local_irq_restore(flags);
88
89 return temp;
90}
91
92static inline int atomic_add_negative(int i, atomic_t *v)
93{
94 return atomic_add_return(i, v) < 0;
95}
96
97static inline void atomic_add(int i, atomic_t *v)
98{
99 atomic_add_return(i, v);
100}
101
102static inline void atomic_sub(int i, atomic_t *v)
103{
104 atomic_sub_return(i, v);
105}
106
107static inline void atomic_inc(atomic_t *v)
108{
109 atomic_add_return(1, v);
110}
111
112static inline void atomic_dec(atomic_t *v)
113{
114 atomic_sub_return(1, v);
115}
116
117#define atomic_dec_return(v) atomic_sub_return(1, (v))
118#define atomic_inc_return(v) atomic_add_return(1, (v))
119
120#define atomic_sub_and_test(i, v) (atomic_sub_return((i), (v)) == 0)
121#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)
122#define atomic_inc_and_test(v) (atomic_add_return(1, (v)) == 0)
123
124#define atomic_add_unless(v, a, u) \
125({ \
126 int c, old; \
127 c = atomic_read(v); \
128 while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \
129 c = old; \
130 c != (u); \
131})
132
133#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
134
135static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr)
136{
137 unsigned long flags;
138
139 mask = ~mask;
140 local_irq_save(flags);
141 *addr &= mask;
142 local_irq_restore(flags);
143}
144
145#define atomic_xchg(ptr, v) (xchg(&(ptr)->counter, (v)))
146#define atomic_cmpxchg(v, old, new) (cmpxchg(&((v)->counter), (old), (new)))
147
148/* Atomic operations are already serializing on MN10300??? */
149#define smp_mb__before_atomic_dec() barrier()
150#define smp_mb__after_atomic_dec() barrier()
151#define smp_mb__before_atomic_inc() barrier()
152#define smp_mb__after_atomic_inc() barrier()
153
154#include <asm-generic/atomic.h>
155
156#endif /* __KERNEL__ */
157#endif /* _ASM_ATOMIC_H */
diff --git a/arch/mn10300/include/asm/auxvec.h b/arch/mn10300/include/asm/auxvec.h
new file mode 100644
index 000000000000..4fdb60b2ae39
--- /dev/null
+++ b/arch/mn10300/include/asm/auxvec.h
@@ -0,0 +1,4 @@
1#ifndef _ASM_AUXVEC_H
2#define _ASM_AUXVEC_H
3
4#endif
diff --git a/arch/mn10300/include/asm/bitops.h b/arch/mn10300/include/asm/bitops.h
new file mode 100644
index 000000000000..0b610f482abb
--- /dev/null
+++ b/arch/mn10300/include/asm/bitops.h
@@ -0,0 +1,240 @@
1/* MN10300 bit operations
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 *
11 * These have to be done with inline assembly: that way the bit-setting
12 * is guaranteed to be atomic. All bit operations return 0 if the bit
13 * was cleared before the operation and != 0 if it was not.
14 *
15 * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
16 */
17#ifndef __ASM_BITOPS_H
18#define __ASM_BITOPS_H
19
20#include <asm/cpu-regs.h>
21
22#define smp_mb__before_clear_bit() barrier()
23#define smp_mb__after_clear_bit() barrier()
24
25/*
26 * set bit
27 */
28#define __set_bit(nr, addr) \
29({ \
30 volatile unsigned char *_a = (unsigned char *)(addr); \
31 const unsigned shift = (nr) & 7; \
32 _a += (nr) >> 3; \
33 \
34 asm volatile("bset %2,(%1) # set_bit reg" \
35 : "=m"(*_a) \
36 : "a"(_a), "d"(1 << shift), "m"(*_a) \
37 : "memory", "cc"); \
38})
39
40#define set_bit(nr, addr) __set_bit((nr), (addr))
41
42/*
43 * clear bit
44 */
45#define ___clear_bit(nr, addr) \
46({ \
47 volatile unsigned char *_a = (unsigned char *)(addr); \
48 const unsigned shift = (nr) & 7; \
49 _a += (nr) >> 3; \
50 \
51 asm volatile("bclr %2,(%1) # clear_bit reg" \
52 : "=m"(*_a) \
53 : "a"(_a), "d"(1 << shift), "m"(*_a) \
54 : "memory", "cc"); \
55})
56
57#define clear_bit(nr, addr) ___clear_bit((nr), (addr))
58
59
60static inline void __clear_bit(int nr, volatile void *addr)
61{
62 unsigned int *a = (unsigned int *) addr;
63 int mask;
64
65 a += nr >> 5;
66 mask = 1 << (nr & 0x1f);
67 *a &= ~mask;
68}
69
70/*
71 * test bit
72 */
73static inline int test_bit(int nr, const volatile void *addr)
74{
75 return 1UL & (((const unsigned int *) addr)[nr >> 5] >> (nr & 31));
76}
77
78/*
79 * change bit
80 */
81static inline void __change_bit(int nr, volatile void *addr)
82{
83 int mask;
84 unsigned int *a = (unsigned int *) addr;
85
86 a += nr >> 5;
87 mask = 1 << (nr & 0x1f);
88 *a ^= mask;
89}
90
91extern void change_bit(int nr, volatile void *addr);
92
93/*
94 * test and set bit
95 */
96#define __test_and_set_bit(nr,addr) \
97({ \
98 volatile unsigned char *_a = (unsigned char *)(addr); \
99 const unsigned shift = (nr) & 7; \
100 unsigned epsw; \
101 _a += (nr) >> 3; \
102 \
103 asm volatile("bset %3,(%2) # test_set_bit reg\n" \
104 "mov epsw,%1" \
105 : "=m"(*_a), "=d"(epsw) \
106 : "a"(_a), "d"(1 << shift), "m"(*_a) \
107 : "memory", "cc"); \
108 \
109 !(epsw & EPSW_FLAG_Z); \
110})
111
112#define test_and_set_bit(nr, addr) __test_and_set_bit((nr), (addr))
113
114/*
115 * test and clear bit
116 */
117#define __test_and_clear_bit(nr, addr) \
118({ \
119 volatile unsigned char *_a = (unsigned char *)(addr); \
120 const unsigned shift = (nr) & 7; \
121 unsigned epsw; \
122 _a += (nr) >> 3; \
123 \
124 asm volatile("bclr %3,(%2) # test_clear_bit reg\n" \
125 "mov epsw,%1" \
126 : "=m"(*_a), "=d"(epsw) \
127 : "a"(_a), "d"(1 << shift), "m"(*_a) \
128 : "memory", "cc"); \
129 \
130 !(epsw & EPSW_FLAG_Z); \
131})
132
133#define test_and_clear_bit(nr, addr) __test_and_clear_bit((nr), (addr))
134
135/*
136 * test and change bit
137 */
138static inline int __test_and_change_bit(int nr, volatile void *addr)
139{
140 int mask, retval;
141 unsigned int *a = (unsigned int *)addr;
142
143 a += nr >> 5;
144 mask = 1 << (nr & 0x1f);
145 retval = (mask & *a) != 0;
146 *a ^= mask;
147
148 return retval;
149}
150
151extern int test_and_change_bit(int nr, volatile void *addr);
152
153#include <asm-generic/bitops/lock.h>
154
155#ifdef __KERNEL__
156
157/**
158 * __ffs - find first bit set
159 * @x: the word to search
160 *
161 * - return 31..0 to indicate bit 31..0 most least significant bit set
162 * - if no bits are set in x, the result is undefined
163 */
164static inline __attribute__((const))
165unsigned long __ffs(unsigned long x)
166{
167 int bit;
168 asm("bsch %2,%0" : "=r"(bit) : "0"(0), "r"(x & -x));
169 return bit;
170}
171
172/*
173 * special slimline version of fls() for calculating ilog2_u32()
174 * - note: no protection against n == 0
175 */
176static inline __attribute__((const))
177int __ilog2_u32(u32 n)
178{
179 int bit;
180 asm("bsch %2,%0" : "=r"(bit) : "0"(0), "r"(n));
181 return bit;
182}
183
184/**
185 * fls - find last bit set
186 * @x: the word to search
187 *
188 * This is defined the same way as ffs:
189 * - return 32..1 to indicate bit 31..0 most significant bit set
190 * - return 0 to indicate no bits set
191 */
192static inline __attribute__((const))
193int fls(int x)
194{
195 return (x != 0) ? __ilog2_u32(x) + 1 : 0;
196}
197
198/**
199 * __fls - find last (most-significant) set bit in a long word
200 * @word: the word to search
201 *
202 * Undefined if no set bit exists, so code should check against 0 first.
203 */
204static inline unsigned long __fls(unsigned long word)
205{
206 return __ilog2_u32(word);
207}
208
209/**
210 * ffs - find first bit set
211 * @x: the word to search
212 *
213 * - return 32..1 to indicate bit 31..0 most least significant bit set
214 * - return 0 to indicate no bits set
215 */
216static inline __attribute__((const))
217int ffs(int x)
218{
219 /* Note: (x & -x) gives us a mask that is the least significant
220 * (rightmost) 1-bit of the value in x.
221 */
222 return fls(x & -x);
223}
224
225#include <asm-generic/bitops/ffz.h>
226#include <asm-generic/bitops/fls64.h>
227#include <asm-generic/bitops/find.h>
228#include <asm-generic/bitops/sched.h>
229#include <asm-generic/bitops/hweight.h>
230
231#define ext2_set_bit_atomic(lock, nr, addr) \
232 test_and_set_bit((nr) ^ 0x18, (addr))
233#define ext2_clear_bit_atomic(lock, nr, addr) \
234 test_and_clear_bit((nr) ^ 0x18, (addr))
235
236#include <asm-generic/bitops/ext2-non-atomic.h>
237#include <asm-generic/bitops/minix-le.h>
238
239#endif /* __KERNEL__ */
240#endif /* __ASM_BITOPS_H */
diff --git a/arch/mn10300/include/asm/bug.h b/arch/mn10300/include/asm/bug.h
new file mode 100644
index 000000000000..aa6a38886391
--- /dev/null
+++ b/arch/mn10300/include/asm/bug.h
@@ -0,0 +1,37 @@
1/* MN10300 Kernel bug reporting
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_BUG_H
12#define _ASM_BUG_H
13
14#ifdef CONFIG_BUG
15
16/*
17 * Tell the user there is some problem.
18 */
19#define BUG() \
20do { \
21 asm volatile( \
22 " syscall 15 \n" \
23 "0: \n" \
24 " .section __bug_table,\"a\" \n" \
25 " .long 0b,%0,%1 \n" \
26 " .previous \n" \
27 : \
28 : "i"(__FILE__), "i"(__LINE__) \
29 ); \
30} while (1)
31
32#define HAVE_ARCH_BUG
33#endif /* CONFIG_BUG */
34
35#include <asm-generic/bug.h>
36
37#endif /* _ASM_BUG_H */
diff --git a/arch/mn10300/include/asm/bugs.h b/arch/mn10300/include/asm/bugs.h
new file mode 100644
index 000000000000..31c8bc592b47
--- /dev/null
+++ b/arch/mn10300/include/asm/bugs.h
@@ -0,0 +1,20 @@
1/* MN10300 Checks for architecture-dependent bugs
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_BUGS_H
12#define _ASM_BUGS_H
13
14#include <asm/processor.h>
15
16static inline void __init check_bugs(void)
17{
18}
19
20#endif /* _ASM_BUGS_H */
diff --git a/arch/mn10300/include/asm/busctl-regs.h b/arch/mn10300/include/asm/busctl-regs.h
new file mode 100644
index 000000000000..1632aef73401
--- /dev/null
+++ b/arch/mn10300/include/asm/busctl-regs.h
@@ -0,0 +1,151 @@
1/* AM33v2 on-board bus controller registers
2 *
3 * Copyright (C) 2002 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_BUSCTL_REGS_H
13#define _ASM_BUSCTL_REGS_H
14
15#include <asm/cpu-regs.h>
16
17#ifdef __KERNEL__
18
19/* bus controller registers */
20#define BCCR __SYSREG(0xc0002000, u32) /* bus controller control reg */
21#define BCCR_B0AD 0x00000003 /* block 0 (80000000-83ffffff) bus allocation */
22#define BCCR_B1AD 0x0000000c /* block 1 (84000000-87ffffff) bus allocation */
23#define BCCR_B2AD 0x00000030 /* block 2 (88000000-8bffffff) bus allocation */
24#define BCCR_B3AD 0x000000c0 /* block 3 (8c000000-8fffffff) bus allocation */
25#define BCCR_B4AD 0x00000300 /* block 4 (90000000-93ffffff) bus allocation */
26#define BCCR_B5AD 0x00000c00 /* block 5 (94000000-97ffffff) bus allocation */
27#define BCCR_B6AD 0x00003000 /* block 6 (98000000-9bffffff) bus allocation */
28#define BCCR_B7AD 0x0000c000 /* block 7 (9c000000-9fffffff) bus allocation */
29#define BCCR_BxAD_EXBUS 0x0 /* - direct to system bus controller */
30#define BCCR_BxAD_OPEXBUS 0x1 /* - direct to memory bus controller */
31#define BCCR_BxAD_OCMBUS 0x2 /* - direct to on chip memory */
32#define BCCR_API 0x00070000 /* bus arbitration priority */
33#define BCCR_API_DMACICD 0x00000000 /* - DMA > CI > CD */
34#define BCCR_API_DMACDCI 0x00010000 /* - DMA > CD > CI */
35#define BCCR_API_CICDDMA 0x00020000 /* - CI > CD > DMA */
36#define BCCR_API_CDCIDMA 0x00030000 /* - CD > CI > DMA */
37#define BCCR_API_ROUNDROBIN 0x00040000 /* - round robin */
38#define BCCR_BEPRI_DMACICD 0x00c00000 /* bus error address priority */
39#define BCCR_BEPRI_DMACDCI 0x00000000 /* - DMA > CI > CD */
40#define BCCR_BEPRI_CICDDMA 0x00400000 /* - DMA > CD > CI */
41#define BCCR_BEPRI_CDCIDMA 0x00800000 /* - CI > CD > DMA */
42#define BCCR_BEPRI 0x00c00000 /* - CD > CI > DMA */
43#define BCCR_TMON 0x03000000 /* timeout value settings */
44#define BCCR_TMON_16IOCLK 0x00000000 /* - 16 IOCLK cycles */
45#define BCCR_TMON_256IOCLK 0x01000000 /* - 256 IOCLK cycles */
46#define BCCR_TMON_4096IOCLK 0x02000000 /* - 4096 IOCLK cycles */
47#define BCCR_TMON_65536IOCLK 0x03000000 /* - 65536 IOCLK cycles */
48#define BCCR_TMOE 0x10000000 /* timeout detection enable */
49
50#define BCBERR __SYSREG(0xc0002010, u32) /* bus error source reg */
51#define BCBERR_BESB 0x0000001f /* erroneous access destination space */
52#define BCBERR_BESB_MON 0x00000001 /* - monitor space */
53#define BCBERR_BESB_IO 0x00000002 /* - IO bus */
54#define BCBERR_BESB_EX 0x00000004 /* - EX bus */
55#define BCBERR_BESB_OPEX 0x00000008 /* - OpEX bus */
56#define BCBERR_BESB_OCM 0x00000010 /* - on chip memory */
57#define BCBERR_BERW 0x00000100 /* type of access */
58#define BCBERR_BERW_WRITE 0x00000000 /* - write */
59#define BCBERR_BERW_READ 0x00000100 /* - read */
60#define BCBERR_BESD 0x00000200 /* error detector */
61#define BCBERR_BESD_BCU 0x00000000 /* - BCU detected error */
62#define BCBERR_BESD_SLAVE_BUS 0x00000200 /* - slave bus detected error */
63#define BCBERR_BEBST 0x00000400 /* type of access */
64#define BCBERR_BEBST_SINGLE 0x00000000 /* - single */
65#define BCBERR_BEBST_BURST 0x00000400 /* - burst */
66#define BCBERR_BEME 0x00000800 /* multiple bus error flag */
67#define BCBERR_BEMR 0x00007000 /* master bus that caused the error */
68#define BCBERR_BEMR_NOERROR 0x00000000 /* - no error */
69#define BCBERR_BEMR_CI 0x00001000 /* - CPU instruction fetch bus caused error */
70#define BCBERR_BEMR_CD 0x00002000 /* - CPU data bus caused error */
71#define BCBERR_BEMR_DMA 0x00004000 /* - DMA bus caused error */
72
73#define BCBEAR __SYSREGC(0xc0002020, u32) /* bus error address reg */
74
75/* system bus controller registers */
76#define SBBASE(X) __SYSREG(0xd8c00100 + (X) * 0x10, u32) /* SBC base addr regs */
77#define SBBASE_BE 0x00000001 /* bank enable */
78#define SBBASE_BAM 0x0000fffe /* bank address mask [31:17] */
79#define SBBASE_BBA 0xfffe0000 /* bank base address [31:17] */
80
81#define SBCNTRL0(X) __SYSREG(0xd8c00200 + (X) * 0x10, u32) /* SBC bank ctrl0 regs */
82#define SBCNTRL0_WEH 0x00000f00 /* write enable hold */
83#define SBCNTRL0_REH 0x0000f000 /* read enable hold */
84#define SBCNTRL0_RWH 0x000f0000 /* SRW signal hold */
85#define SBCNTRL0_CSH 0x00f00000 /* chip select hold */
86#define SBCNTRL0_DAH 0x0f000000 /* data hold */
87#define SBCNTRL0_ADH 0xf0000000 /* address hold */
88
89#define SBCNTRL1(X) __SYSREG(0xd8c00204 + (X) * 0x10, u32) /* SBC bank ctrl1 regs */
90#define SBCNTRL1_WED 0x00000f00 /* write enable delay */
91#define SBCNTRL1_RED 0x0000f000 /* read enable delay */
92#define SBCNTRL1_RWD 0x000f0000 /* SRW signal delay */
93#define SBCNTRL1_ASW 0x00f00000 /* address strobe width */
94#define SBCNTRL1_CSD 0x0f000000 /* chip select delay */
95#define SBCNTRL1_ASD 0xf0000000 /* address strobe delay */
96
97#define SBCNTRL2(X) __SYSREG(0xd8c00208 + (X) * 0x10, u32) /* SBC bank ctrl2 regs */
98#define SBCNTRL2_WC 0x000000ff /* wait count */
99#define SBCNTRL2_BWC 0x00000f00 /* burst wait count */
100#define SBCNTRL2_WM 0x01000000 /* wait mode setting */
101#define SBCNTRL2_WM_FIXEDWAIT 0x00000000 /* - fixed wait access */
102#define SBCNTRL2_WM_HANDSHAKE 0x01000000 /* - handshake access */
103#define SBCNTRL2_BM 0x02000000 /* bus synchronisation mode */
104#define SBCNTRL2_BM_SYNC 0x00000000 /* - synchronous mode */
105#define SBCNTRL2_BM_ASYNC 0x02000000 /* - asynchronous mode */
106#define SBCNTRL2_BW 0x04000000 /* bus width */
107#define SBCNTRL2_BW_32 0x00000000 /* - 32 bits */
108#define SBCNTRL2_BW_16 0x04000000 /* - 16 bits */
109#define SBCNTRL2_RWINV 0x08000000 /* R/W signal invert polarity */
110#define SBCNTRL2_RWINV_NORM 0x00000000 /* - normal (read high) */
111#define SBCNTRL2_RWINV_INV 0x08000000 /* - inverted (read low) */
112#define SBCNTRL2_BT 0x70000000 /* bus type setting */
113#define SBCNTRL2_BT_SRAM 0x00000000 /* - SRAM interface */
114#define SBCNTRL2_BT_ADMUX 0x00000000 /* - addr/data multiplexed interface */
115#define SBCNTRL2_BT_BROM 0x00000000 /* - burst ROM interface */
116#define SBCNTRL2_BTSE 0x80000000 /* burst enable */
117
118/* memory bus controller */
119#define SDBASE(X) __SYSREG(0xda000008 + (X) * 0x4, u32) /* MBC base addr regs */
120#define SDBASE_CE 0x00000001 /* chip enable */
121#define SDBASE_CBAM 0x0000fff0 /* chip base address mask [31:20] */
122#define SDBASE_CBAM_SHIFT 16
123#define SDBASE_CBA 0xfff00000 /* chip base address [31:20] */
124
125#define SDRAMBUS __SYSREG(0xda000000, u32) /* bus mode control reg */
126#define SDRAMBUS_REFEN 0x00000004 /* refresh enable */
127#define SDRAMBUS_TRC 0x00000018 /* refresh command delay time */
128#define SDRAMBUS_BSTPT 0x00000020 /* burst stop command enable */
129#define SDRAMBUS_PONSEQ 0x00000040 /* power on sequence */
130#define SDRAMBUS_SELFREQ 0x00000080 /* self-refresh mode request */
131#define SDRAMBUS_SELFON 0x00000100 /* self-refresh mode on */
132#define SDRAMBUS_SIZE 0x00030000 /* SDRAM size */
133#define SDRAMBUS_SIZE_64Mbit 0x00010000 /* 64Mbit SDRAM (x16) */
134#define SDRAMBUS_SIZE_128Mbit 0x00020000 /* 128Mbit SDRAM (x16) */
135#define SDRAMBUS_SIZE_256Mbit 0x00030000 /* 256Mbit SDRAM (x16) */
136#define SDRAMBUS_TRASWAIT 0x000c0000 /* row address precharge command cycle number */
137#define SDRAMBUS_REFNUM 0x00300000 /* refresh command number */
138#define SDRAMBUS_BSTWAIT 0x00c00000 /* burst stop command cycle */
139#define SDRAMBUS_SETWAIT 0x03000000 /* mode register setting command cycle */
140#define SDRAMBUS_PREWAIT 0x0c000000 /* precharge command cycle */
141#define SDRAMBUS_RASLATE 0x30000000 /* RAS latency */
142#define SDRAMBUS_CASLATE 0xc0000000 /* CAS latency */
143
144#define SDREFCNT __SYSREG(0xda000004, u32) /* refresh period reg */
145#define SDREFCNT_PERI 0x00000fff /* refresh period */
146
147#define SDSHDW __SYSREG(0xda000010, u32) /* test reg */
148
149#endif /* __KERNEL__ */
150
151#endif /* _ASM_BUSCTL_REGS_H */
diff --git a/arch/mn10300/include/asm/byteorder.h b/arch/mn10300/include/asm/byteorder.h
new file mode 100644
index 000000000000..5dd0bdd9feee
--- /dev/null
+++ b/arch/mn10300/include/asm/byteorder.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_BYTEORDER_H
2#define _ASM_BYTEORDER_H
3
4#include <linux/byteorder/little_endian.h>
5
6#endif /* _ASM_BYTEORDER_H */
diff --git a/arch/mn10300/include/asm/cache.h b/arch/mn10300/include/asm/cache.h
new file mode 100644
index 000000000000..e03cfa2e997e
--- /dev/null
+++ b/arch/mn10300/include/asm/cache.h
@@ -0,0 +1,54 @@
1/* MN10300 cache management registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_CACHE_H
13#define _ASM_CACHE_H
14
15#include <asm/cpu-regs.h>
16#include <proc/cache.h>
17
18#ifndef __ASSEMBLY__
19#define L1_CACHE_DISPARITY (L1_CACHE_NENTRIES * L1_CACHE_BYTES)
20#else
21#define L1_CACHE_DISPARITY L1_CACHE_NENTRIES * L1_CACHE_BYTES
22#endif
23
24/* data cache purge registers
25 * - read from the register to unconditionally purge that cache line
26 * - write address & 0xffffff00 to conditionally purge that cache line
27 * - clear LSB to request invalidation as well
28 */
29#define DCACHE_PURGE(WAY, ENTRY) \
30 __SYSREG(0xc8400000 + (WAY) * L1_CACHE_WAYDISP + \
31 (ENTRY) * L1_CACHE_BYTES, u32)
32
33#define DCACHE_PURGE_WAY0(ENTRY) \
34 __SYSREG(0xc8400000 + 0 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32)
35#define DCACHE_PURGE_WAY1(ENTRY) \
36 __SYSREG(0xc8400000 + 1 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32)
37#define DCACHE_PURGE_WAY2(ENTRY) \
38 __SYSREG(0xc8400000 + 2 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32)
39#define DCACHE_PURGE_WAY3(ENTRY) \
40 __SYSREG(0xc8400000 + 3 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32)
41
42/* instruction cache access registers */
43#define ICACHE_DATA(WAY, ENTRY, OFF) \
44 __SYSREG(0xc8000000 + (WAY) * L1_CACHE_WAYDISP + (ENTRY) * 0x10 + (OFF) * 4, u32)
45#define ICACHE_TAG(WAY, ENTRY) \
46 __SYSREG(0xc8100000 + (WAY) * L1_CACHE_WAYDISP + (ENTRY) * 0x10, u32)
47
48/* instruction cache access registers */
49#define DCACHE_DATA(WAY, ENTRY, OFF) \
50 __SYSREG(0xc8200000 + (WAY) * L1_CACHE_WAYDISP + (ENTRY) * 0x10 + (OFF) * 4, u32)
51#define DCACHE_TAG(WAY, ENTRY) \
52 __SYSREG(0xc8300000 + (WAY) * L1_CACHE_WAYDISP + (ENTRY) * 0x10, u32)
53
54#endif /* _ASM_CACHE_H */
diff --git a/arch/mn10300/include/asm/cacheflush.h b/arch/mn10300/include/asm/cacheflush.h
new file mode 100644
index 000000000000..2db746a251f8
--- /dev/null
+++ b/arch/mn10300/include/asm/cacheflush.h
@@ -0,0 +1,116 @@
1/* MN10300 Cache flushing
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_CACHEFLUSH_H
12#define _ASM_CACHEFLUSH_H
13
14#ifndef __ASSEMBLY__
15
16/* Keep includes the same across arches. */
17#include <linux/mm.h>
18
19/*
20 * virtually-indexed cache managment (our cache is physically indexed)
21 */
22#define flush_cache_all() do {} while (0)
23#define flush_cache_mm(mm) do {} while (0)
24#define flush_cache_dup_mm(mm) do {} while (0)
25#define flush_cache_range(mm, start, end) do {} while (0)
26#define flush_cache_page(vma, vmaddr, pfn) do {} while (0)
27#define flush_cache_vmap(start, end) do {} while (0)
28#define flush_cache_vunmap(start, end) do {} while (0)
29#define flush_dcache_page(page) do {} while (0)
30#define flush_dcache_mmap_lock(mapping) do {} while (0)
31#define flush_dcache_mmap_unlock(mapping) do {} while (0)
32
33/*
34 * physically-indexed cache managment
35 */
36#ifndef CONFIG_MN10300_CACHE_DISABLED
37
38extern void flush_icache_range(unsigned long start, unsigned long end);
39extern void flush_icache_page(struct vm_area_struct *vma, struct page *pg);
40
41#else
42
43#define flush_icache_range(start, end) do {} while (0)
44#define flush_icache_page(vma, pg) do {} while (0)
45
46#endif
47
48#define flush_icache_user_range(vma, pg, adr, len) \
49 flush_icache_range(adr, adr + len)
50
51#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
52 do { \
53 memcpy(dst, src, len); \
54 flush_icache_page(vma, page); \
55 } while (0)
56
57#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
58 memcpy(dst, src, len)
59
60/*
61 * primitive routines
62 */
63#ifndef CONFIG_MN10300_CACHE_DISABLED
64extern void mn10300_icache_inv(void);
65extern void mn10300_dcache_inv(void);
66extern void mn10300_dcache_inv_page(unsigned start);
67extern void mn10300_dcache_inv_range(unsigned start, unsigned end);
68extern void mn10300_dcache_inv_range2(unsigned start, unsigned size);
69#ifdef CONFIG_MN10300_CACHE_WBACK
70extern void mn10300_dcache_flush(void);
71extern void mn10300_dcache_flush_page(unsigned start);
72extern void mn10300_dcache_flush_range(unsigned start, unsigned end);
73extern void mn10300_dcache_flush_range2(unsigned start, unsigned size);
74extern void mn10300_dcache_flush_inv(void);
75extern void mn10300_dcache_flush_inv_page(unsigned start);
76extern void mn10300_dcache_flush_inv_range(unsigned start, unsigned end);
77extern void mn10300_dcache_flush_inv_range2(unsigned start, unsigned size);
78#else
79#define mn10300_dcache_flush() do {} while (0)
80#define mn10300_dcache_flush_page(start) do {} while (0)
81#define mn10300_dcache_flush_range(start, end) do {} while (0)
82#define mn10300_dcache_flush_range2(start, size) do {} while (0)
83#define mn10300_dcache_flush_inv() mn10300_dcache_inv()
84#define mn10300_dcache_flush_inv_page(start) \
85 mn10300_dcache_inv_page((start))
86#define mn10300_dcache_flush_inv_range(start, end) \
87 mn10300_dcache_inv_range((start), (end))
88#define mn10300_dcache_flush_inv_range2(start, size) \
89 mn10300_dcache_inv_range2((start), (size))
90#endif /* CONFIG_MN10300_CACHE_WBACK */
91#else
92#define mn10300_icache_inv() do {} while (0)
93#define mn10300_dcache_inv() do {} while (0)
94#define mn10300_dcache_inv_page(start) do {} while (0)
95#define mn10300_dcache_inv_range(start, end) do {} while (0)
96#define mn10300_dcache_inv_range2(start, size) do {} while (0)
97#define mn10300_dcache_flush() do {} while (0)
98#define mn10300_dcache_flush_inv_page(start) do {} while (0)
99#define mn10300_dcache_flush_inv() do {} while (0)
100#define mn10300_dcache_flush_inv_range(start, end) do {} while (0)
101#define mn10300_dcache_flush_inv_range2(start, size) do {} while (0)
102#define mn10300_dcache_flush_page(start) do {} while (0)
103#define mn10300_dcache_flush_range(start, end) do {} while (0)
104#define mn10300_dcache_flush_range2(start, size) do {} while (0)
105#endif /* CONFIG_MN10300_CACHE_DISABLED */
106
107/*
108 * internal debugging function
109 */
110#ifdef CONFIG_DEBUG_PAGEALLOC
111extern void kernel_map_pages(struct page *page, int numpages, int enable);
112#endif
113
114#endif /* __ASSEMBLY__ */
115
116#endif /* _ASM_CACHEFLUSH_H */
diff --git a/arch/mn10300/include/asm/checksum.h b/arch/mn10300/include/asm/checksum.h
new file mode 100644
index 000000000000..9fb2a8d8826a
--- /dev/null
+++ b/arch/mn10300/include/asm/checksum.h
@@ -0,0 +1,86 @@
1/* MN10300 Optimised checksumming code
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_CHECKSUM_H
12#define _ASM_CHECKSUM_H
13
14extern __wsum csum_partial(const void *buff, int len, __wsum sum);
15extern __wsum csum_partial_copy_nocheck(const void *src, void *dst,
16 int len, __wsum sum);
17extern __wsum csum_partial_copy_from_user(const void *src, void *dst,
18 int len, __wsum sum,
19 int *err_ptr);
20extern __sum16 ip_fast_csum(const void *iph, unsigned int ihl);
21extern __wsum csum_partial(const void *buff, int len, __wsum sum);
22extern __sum16 ip_compute_csum(const void *buff, int len);
23
24#define csum_partial_copy_fromuser csum_partial_copy
25extern __wsum csum_partial_copy(const void *src, void *dst, int len,
26 __wsum sum);
27
28static inline __sum16 csum_fold(__wsum sum)
29{
30 asm(
31 " add %1,%0 \n"
32 " addc 0xffff,%0 \n"
33 : "=r" (sum)
34 : "r" (sum << 16), "0" (sum & 0xffff0000)
35 : "cc"
36 );
37 return (~sum) >> 16;
38}
39
40static inline __wsum csum_tcpudp_nofold(unsigned long saddr,
41 unsigned long daddr,
42 unsigned short len,
43 unsigned short proto,
44 __wsum sum)
45{
46 __wsum tmp;
47
48 tmp = (__wsum) ntohs(len) << 16;
49 tmp += (__wsum) proto << 8;
50
51 asm(
52 " add %1,%0 \n"
53 " addc %2,%0 \n"
54 " addc %3,%0 \n"
55 " addc 0,%0 \n"
56 : "=r" (sum)
57 : "r" (daddr), "r"(saddr), "r"(tmp), "0"(sum)
58 : "cc"
59 );
60 return sum;
61}
62
63/*
64 * computes the checksum of the TCP/UDP pseudo-header
65 * returns a 16-bit checksum, already complemented
66 */
67static inline __sum16 csum_tcpudp_magic(unsigned long saddr,
68 unsigned long daddr,
69 unsigned short len,
70 unsigned short proto,
71 __wsum sum)
72{
73 return csum_fold(csum_tcpudp_nofold(saddr, daddr, len, proto, sum));
74}
75
76#undef _HAVE_ARCH_IPV6_CSUM
77
78/*
79 * Copy and checksum to user
80 */
81#define HAVE_CSUM_COPY_USER
82extern __wsum csum_and_copy_to_user(const void *src, void *dst, int len,
83 __wsum sum, int *err_ptr);
84
85
86#endif /* _ASM_CHECKSUM_H */
diff --git a/arch/mn10300/include/asm/cpu-regs.h b/arch/mn10300/include/asm/cpu-regs.h
new file mode 100644
index 000000000000..757e9b5388ea
--- /dev/null
+++ b/arch/mn10300/include/asm/cpu-regs.h
@@ -0,0 +1,290 @@
1/* MN10300 Core system registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_CPU_REGS_H
12#define _ASM_CPU_REGS_H
13
14#ifndef __ASSEMBLY__
15#include <linux/types.h>
16#endif
17
18#ifdef CONFIG_MN10300_CPU_AM33V2
19/* we tell the compiler to pretend to be AM33 so that it doesn't try and use
20 * the FP regs, but tell the assembler that we're actually allowed AM33v2
21 * instructions */
22#ifndef __ASSEMBLY__
23asm(" .am33_2\n");
24#else
25.am33_2
26#endif
27#endif
28
29#ifdef __KERNEL__
30
31#ifndef __ASSEMBLY__
32#define __SYSREG(ADDR, TYPE) (*(volatile TYPE *)(ADDR))
33#define __SYSREGC(ADDR, TYPE) (*(const volatile TYPE *)(ADDR))
34#else
35#define __SYSREG(ADDR, TYPE) ADDR
36#define __SYSREGC(ADDR, TYPE) ADDR
37#endif
38
39/* CPU registers */
40#define EPSW_FLAG_Z 0x00000001 /* zero flag */
41#define EPSW_FLAG_N 0x00000002 /* negative flag */
42#define EPSW_FLAG_C 0x00000004 /* carry flag */
43#define EPSW_FLAG_V 0x00000008 /* overflow flag */
44#define EPSW_IM 0x00000700 /* interrupt mode */
45#define EPSW_IM_0 0x00000000 /* interrupt mode 0 */
46#define EPSW_IM_1 0x00000100 /* interrupt mode 1 */
47#define EPSW_IM_2 0x00000200 /* interrupt mode 2 */
48#define EPSW_IM_3 0x00000300 /* interrupt mode 3 */
49#define EPSW_IM_4 0x00000400 /* interrupt mode 4 */
50#define EPSW_IM_5 0x00000500 /* interrupt mode 5 */
51#define EPSW_IM_6 0x00000600 /* interrupt mode 6 */
52#define EPSW_IM_7 0x00000700 /* interrupt mode 7 */
53#define EPSW_IE 0x00000800 /* interrupt enable */
54#define EPSW_S 0x00003000 /* software auxilliary bits */
55#define EPSW_T 0x00008000 /* trace enable */
56#define EPSW_nSL 0x00010000 /* not supervisor level */
57#define EPSW_NMID 0x00020000 /* nonmaskable interrupt disable */
58#define EPSW_nAR 0x00040000 /* register bank control */
59#define EPSW_ML 0x00080000 /* monitor level */
60#define EPSW_FE 0x00100000 /* FPU enable */
61
62/* FPU registers */
63#define FPCR_EF_I 0x00000001 /* inexact result FPU exception flag */
64#define FPCR_EF_U 0x00000002 /* underflow FPU exception flag */
65#define FPCR_EF_O 0x00000004 /* overflow FPU exception flag */
66#define FPCR_EF_Z 0x00000008 /* zero divide FPU exception flag */
67#define FPCR_EF_V 0x00000010 /* invalid operand FPU exception flag */
68#define FPCR_EE_I 0x00000020 /* inexact result FPU exception enable */
69#define FPCR_EE_U 0x00000040 /* underflow FPU exception enable */
70#define FPCR_EE_O 0x00000080 /* overflow FPU exception enable */
71#define FPCR_EE_Z 0x00000100 /* zero divide FPU exception enable */
72#define FPCR_EE_V 0x00000200 /* invalid operand FPU exception enable */
73#define FPCR_EC_I 0x00000400 /* inexact result FPU exception cause */
74#define FPCR_EC_U 0x00000800 /* underflow FPU exception cause */
75#define FPCR_EC_O 0x00001000 /* overflow FPU exception cause */
76#define FPCR_EC_Z 0x00002000 /* zero divide FPU exception cause */
77#define FPCR_EC_V 0x00004000 /* invalid operand FPU exception cause */
78#define FPCR_RM 0x00030000 /* rounding mode */
79#define FPCR_RM_NEAREST 0x00000000 /* - round to nearest value */
80#define FPCR_FCC_U 0x00040000 /* FPU unordered condition code */
81#define FPCR_FCC_E 0x00080000 /* FPU equal condition code */
82#define FPCR_FCC_G 0x00100000 /* FPU greater than condition code */
83#define FPCR_FCC_L 0x00200000 /* FPU less than condition code */
84#define FPCR_INIT 0x00000000 /* no exceptions, rounding to nearest */
85
86/* CPU control registers */
87#define CPUP __SYSREG(0xc0000020, u16) /* CPU pipeline register */
88#define CPUP_DWBD 0x0020 /* write buffer disable flag */
89#define CPUP_IPFD 0x0040 /* instruction prefetch disable flag */
90#define CPUP_EXM 0x0080 /* exception operation mode */
91#define CPUP_EXM_AM33V1 0x0000 /* - AM33 v1 exception mode */
92#define CPUP_EXM_AM33V2 0x0080 /* - AM33 v2 exception mode */
93
94#define CPUM __SYSREG(0xc0000040, u16) /* CPU mode register */
95#define CPUM_SLEEP 0x0004 /* set to enter sleep state */
96#define CPUM_HALT 0x0008 /* set to enter halt state */
97#define CPUM_STOP 0x0010 /* set to enter stop state */
98
99#define CPUREV __SYSREGC(0xc0000050, u32) /* CPU revision register */
100#define CPUREV_TYPE 0x0000000f /* CPU type */
101#define CPUREV_TYPE_S 0
102#define CPUREV_TYPE_AM33V1 0x00000000 /* - AM33 V1 core, AM33/1.00 arch */
103#define CPUREV_TYPE_AM33V2 0x00000001 /* - AM33 V2 core, AM33/2.00 arch */
104#define CPUREV_TYPE_AM34V1 0x00000002 /* - AM34 V1 core, AM33/2.00 arch */
105#define CPUREV_REVISION 0x000000f0 /* CPU revision */
106#define CPUREV_REVISION_S 4
107#define CPUREV_ICWAY 0x00000f00 /* number of instruction cache ways */
108#define CPUREV_ICWAY_S 8
109#define CPUREV_ICSIZE 0x0000f000 /* instruction cache way size */
110#define CPUREV_ICSIZE_S 12
111#define CPUREV_DCWAY 0x000f0000 /* number of data cache ways */
112#define CPUREV_DCWAY_S 16
113#define CPUREV_DCSIZE 0x00f00000 /* data cache way size */
114#define CPUREV_DCSIZE_S 20
115#define CPUREV_FPUTYPE 0x0f000000 /* FPU core type */
116#define CPUREV_FPUTYPE_NONE 0x00000000 /* - no FPU core implemented */
117#define CPUREV_OCDCTG 0xf0000000 /* on-chip debug function category */
118
119#define DCR __SYSREG(0xc0000030, u16) /* Debug control register */
120
121/* interrupt/exception control registers */
122#define IVAR0 __SYSREG(0xc0000000, u16) /* interrupt vector 0 */
123#define IVAR1 __SYSREG(0xc0000004, u16) /* interrupt vector 1 */
124#define IVAR2 __SYSREG(0xc0000008, u16) /* interrupt vector 2 */
125#define IVAR3 __SYSREG(0xc000000c, u16) /* interrupt vector 3 */
126#define IVAR4 __SYSREG(0xc0000010, u16) /* interrupt vector 4 */
127#define IVAR5 __SYSREG(0xc0000014, u16) /* interrupt vector 5 */
128#define IVAR6 __SYSREG(0xc0000018, u16) /* interrupt vector 6 */
129
130#define TBR __SYSREG(0xc0000024, u32) /* Trap table base */
131#define TBR_TB 0xff000000 /* table base address bits 31-24 */
132#define TBR_INT_CODE 0x00ffffff /* interrupt code */
133
134#define DEAR __SYSREG(0xc0000038, u32) /* Data access exception address */
135
136#define sISR __SYSREG(0xc0000044, u32) /* Supervisor interrupt status */
137#define sISR_IRQICE 0x00000001 /* ICE interrupt */
138#define sISR_ISTEP 0x00000002 /* single step interrupt */
139#define sISR_MISSA 0x00000004 /* memory access address misalignment fault */
140#define sISR_UNIMP 0x00000008 /* unimplemented instruction execution fault */
141#define sISR_PIEXE 0x00000010 /* program interrupt */
142#define sISR_MEMERR 0x00000020 /* illegal memory access fault */
143#define sISR_IBREAK 0x00000040 /* instraction break interrupt */
144#define sISR_DBSRL 0x00000080 /* debug serial interrupt */
145#define sISR_PERIDB 0x00000100 /* peripheral debug interrupt */
146#define sISR_EXUNIMP 0x00000200 /* unimplemented ex-instruction execution fault */
147#define sISR_OBREAK 0x00000400 /* operand break interrupt */
148#define sISR_PRIV 0x00000800 /* privileged instruction execution fault */
149#define sISR_BUSERR 0x00001000 /* bus error fault */
150#define sISR_DBLFT 0x00002000 /* double fault */
151#define sISR_DBG 0x00008000 /* debug reserved interrupt */
152#define sISR_ITMISS 0x00010000 /* instruction TLB miss */
153#define sISR_DTMISS 0x00020000 /* data TLB miss */
154#define sISR_ITEX 0x00040000 /* instruction TLB access exception */
155#define sISR_DTEX 0x00080000 /* data TLB access exception */
156#define sISR_ILGIA 0x00100000 /* illegal instruction access exception */
157#define sISR_ILGDA 0x00200000 /* illegal data access exception */
158#define sISR_IOIA 0x00400000 /* internal I/O space instruction access excep */
159#define sISR_PRIVA 0x00800000 /* privileged space instruction access excep */
160#define sISR_PRIDA 0x01000000 /* privileged space data access excep */
161#define sISR_DISA 0x02000000 /* data space instruction access excep */
162#define sISR_SYSC 0x04000000 /* system call instruction excep */
163#define sISR_FPUD 0x08000000 /* FPU disabled excep */
164#define sISR_FPUUI 0x10000000 /* FPU unimplemented instruction excep */
165#define sISR_FPUOP 0x20000000 /* FPU operation excep */
166#define sISR_NE 0x80000000 /* multiple synchronous exceptions excep */
167
168/* cache control registers */
169#define CHCTR __SYSREG(0xc0000070, u16) /* cache control */
170#define CHCTR_ICEN 0x0001 /* instruction cache enable */
171#define CHCTR_DCEN 0x0002 /* data cache enable */
172#define CHCTR_ICBUSY 0x0004 /* instruction cache busy */
173#define CHCTR_DCBUSY 0x0008 /* data cache busy */
174#define CHCTR_ICINV 0x0010 /* instruction cache invalidate */
175#define CHCTR_DCINV 0x0020 /* data cache invalidate */
176#define CHCTR_DCWTMD 0x0040 /* data cache writing mode */
177#define CHCTR_DCWTMD_WRBACK 0x0000 /* - write back mode */
178#define CHCTR_DCWTMD_WRTHROUGH 0x0040 /* - write through mode */
179#define CHCTR_DCALMD 0x0080 /* data cache allocation mode */
180#define CHCTR_ICWMD 0x0f00 /* instruction cache way mode */
181#define CHCTR_DCWMD 0xf000 /* data cache way mode */
182
183/* MMU control registers */
184#define MMUCTR __SYSREG(0xc0000090, u32) /* MMU control register */
185#define MMUCTR_IRP 0x0000003f /* instruction TLB replace pointer */
186#define MMUCTR_ITE 0x00000040 /* instruction TLB enable */
187#define MMUCTR_IIV 0x00000080 /* instruction TLB invalidate */
188#define MMUCTR_ITL 0x00000700 /* instruction TLB lock pointer */
189#define MMUCTR_ITL_NOLOCK 0x00000000 /* - no lock */
190#define MMUCTR_ITL_LOCK0 0x00000100 /* - entry 0 locked */
191#define MMUCTR_ITL_LOCK0_1 0x00000200 /* - entry 0-1 locked */
192#define MMUCTR_ITL_LOCK0_3 0x00000300 /* - entry 0-3 locked */
193#define MMUCTR_ITL_LOCK0_7 0x00000400 /* - entry 0-7 locked */
194#define MMUCTR_ITL_LOCK0_15 0x00000500 /* - entry 0-15 locked */
195#define MMUCTR_CE 0x00008000 /* cacheable bit enable */
196#define MMUCTR_DRP 0x003f0000 /* data TLB replace pointer */
197#define MMUCTR_DTE 0x00400000 /* data TLB enable */
198#define MMUCTR_DIV 0x00800000 /* data TLB invalidate */
199#define MMUCTR_DTL 0x07000000 /* data TLB lock pointer */
200#define MMUCTR_DTL_NOLOCK 0x00000000 /* - no lock */
201#define MMUCTR_DTL_LOCK0 0x01000000 /* - entry 0 locked */
202#define MMUCTR_DTL_LOCK0_1 0x02000000 /* - entry 0-1 locked */
203#define MMUCTR_DTL_LOCK0_3 0x03000000 /* - entry 0-3 locked */
204#define MMUCTR_DTL_LOCK0_7 0x04000000 /* - entry 0-7 locked */
205#define MMUCTR_DTL_LOCK0_15 0x05000000 /* - entry 0-15 locked */
206
207#define PIDR __SYSREG(0xc0000094, u16) /* PID register */
208#define PIDR_PID 0x00ff /* process identifier */
209
210#define PTBR __SYSREG(0xc0000098, unsigned long) /* Page table base register */
211
212#define IPTEL __SYSREG(0xc00000a0, u32) /* instruction TLB entry */
213#define DPTEL __SYSREG(0xc00000b0, u32) /* data TLB entry */
214#define xPTEL_V 0x00000001 /* TLB entry valid */
215#define xPTEL_UNUSED1 0x00000002 /* unused bit */
216#define xPTEL_UNUSED2 0x00000004 /* unused bit */
217#define xPTEL_C 0x00000008 /* cached if set */
218#define xPTEL_PV 0x00000010 /* page valid */
219#define xPTEL_D 0x00000020 /* dirty */
220#define xPTEL_PR 0x000001c0 /* page protection */
221#define xPTEL_PR_ROK 0x00000000 /* - R/O kernel */
222#define xPTEL_PR_RWK 0x00000100 /* - R/W kernel */
223#define xPTEL_PR_ROK_ROU 0x00000080 /* - R/O kernel and R/O user */
224#define xPTEL_PR_RWK_ROU 0x00000180 /* - R/W kernel and R/O user */
225#define xPTEL_PR_RWK_RWU 0x000001c0 /* - R/W kernel and R/W user */
226#define xPTEL_G 0x00000200 /* global (use PID if 0) */
227#define xPTEL_PS 0x00000c00 /* page size */
228#define xPTEL_PS_4Kb 0x00000000 /* - 4Kb page */
229#define xPTEL_PS_128Kb 0x00000400 /* - 128Kb page */
230#define xPTEL_PS_1Kb 0x00000800 /* - 1Kb page */
231#define xPTEL_PS_4Mb 0x00000c00 /* - 4Mb page */
232#define xPTEL_PPN 0xfffff006 /* physical page number */
233
234#define xPTEL_V_BIT 0 /* bit numbers corresponding to above masks */
235#define xPTEL_UNUSED1_BIT 1
236#define xPTEL_UNUSED2_BIT 2
237#define xPTEL_C_BIT 3
238#define xPTEL_PV_BIT 4
239#define xPTEL_D_BIT 5
240#define xPTEL_G_BIT 9
241
242#define IPTEU __SYSREG(0xc00000a4, u32) /* instruction TLB virtual addr */
243#define DPTEU __SYSREG(0xc00000b4, u32) /* data TLB virtual addr */
244#define xPTEU_VPN 0xfffffc00 /* virtual page number */
245#define xPTEU_PID 0x000000ff /* process identifier to which applicable */
246
247#define IPTEL2 __SYSREG(0xc00000a8, u32) /* instruction TLB entry */
248#define DPTEL2 __SYSREG(0xc00000b8, u32) /* data TLB entry */
249#define xPTEL2_V 0x00000001 /* TLB entry valid */
250#define xPTEL2_C 0x00000002 /* cacheable */
251#define xPTEL2_PV 0x00000004 /* page valid */
252#define xPTEL2_D 0x00000008 /* dirty */
253#define xPTEL2_PR 0x00000070 /* page protection */
254#define xPTEL2_PR_ROK 0x00000000 /* - R/O kernel */
255#define xPTEL2_PR_RWK 0x00000040 /* - R/W kernel */
256#define xPTEL2_PR_ROK_ROU 0x00000020 /* - R/O kernel and R/O user */
257#define xPTEL2_PR_RWK_ROU 0x00000060 /* - R/W kernel and R/O user */
258#define xPTEL2_PR_RWK_RWU 0x00000070 /* - R/W kernel and R/W user */
259#define xPTEL2_G 0x00000080 /* global (use PID if 0) */
260#define xPTEL2_PS 0x00000300 /* page size */
261#define xPTEL2_PS_4Kb 0x00000000 /* - 4Kb page */
262#define xPTEL2_PS_128Kb 0x00000100 /* - 128Kb page */
263#define xPTEL2_PS_1Kb 0x00000200 /* - 1Kb page */
264#define xPTEL2_PS_4Mb 0x00000300 /* - 4Mb page */
265#define xPTEL2_PPN 0xfffffc00 /* physical page number */
266
267#define MMUFCR __SYSREGC(0xc000009c, u32) /* MMU exception cause */
268#define MMUFCR_IFC __SYSREGC(0xc000009c, u16) /* MMU instruction excep cause */
269#define MMUFCR_DFC __SYSREGC(0xc000009e, u16) /* MMU data exception cause */
270#define MMUFCR_xFC_TLBMISS 0x0001 /* TLB miss flag */
271#define MMUFCR_xFC_INITWR 0x0002 /* initial write excep flag */
272#define MMUFCR_xFC_PGINVAL 0x0004 /* page invalid excep flag */
273#define MMUFCR_xFC_PROTVIOL 0x0008 /* protection violation excep flag */
274#define MMUFCR_xFC_ACCESS 0x0010 /* access level flag */
275#define MMUFCR_xFC_ACCESS_USR 0x0000 /* - user mode */
276#define MMUFCR_xFC_ACCESS_SR 0x0010 /* - supervisor mode */
277#define MMUFCR_xFC_TYPE 0x0020 /* access type flag */
278#define MMUFCR_xFC_TYPE_READ 0x0000 /* - read */
279#define MMUFCR_xFC_TYPE_WRITE 0x0020 /* - write */
280#define MMUFCR_xFC_PR 0x01c0 /* page protection flag */
281#define MMUFCR_xFC_PR_ROK 0x0000 /* - R/O kernel */
282#define MMUFCR_xFC_PR_RWK 0x0100 /* - R/W kernel */
283#define MMUFCR_xFC_PR_ROK_ROU 0x0080 /* - R/O kernel and R/O user */
284#define MMUFCR_xFC_PR_RWK_ROU 0x0180 /* - R/W kernel and R/O user */
285#define MMUFCR_xFC_PR_RWK_RWU 0x01c0 /* - R/W kernel and R/W user */
286#define MMUFCR_xFC_ILLADDR 0x0200 /* illegal address excep flag */
287
288#endif /* __KERNEL__ */
289
290#endif /* _ASM_CPU_REGS_H */
diff --git a/arch/mn10300/include/asm/cputime.h b/arch/mn10300/include/asm/cputime.h
new file mode 100644
index 000000000000..6d68ad7e0ea3
--- /dev/null
+++ b/arch/mn10300/include/asm/cputime.h
@@ -0,0 +1 @@
#include <asm-generic/cputime.h>
diff --git a/arch/mn10300/include/asm/current.h b/arch/mn10300/include/asm/current.h
new file mode 100644
index 000000000000..ca6027d83743
--- /dev/null
+++ b/arch/mn10300/include/asm/current.h
@@ -0,0 +1,37 @@
1/* MN10300 Current task structure accessor
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_CURRENT_H
12#define _ASM_CURRENT_H
13
14#include <linux/thread_info.h>
15
16/*
17 * dedicate E2 to keeping the current task pointer
18 */
19#ifdef CONFIG_MN10300_CURRENT_IN_E2
20
21register struct task_struct *const current asm("e2") __attribute__((used));
22
23#define get_current() current
24
25extern struct task_struct *__current;
26
27#else
28static inline __attribute__((const))
29struct task_struct *get_current(void)
30{
31 return current_thread_info()->task;
32}
33
34#define current get_current()
35#endif
36
37#endif /* _ASM_CURRENT_H */
diff --git a/arch/mn10300/include/asm/delay.h b/arch/mn10300/include/asm/delay.h
new file mode 100644
index 000000000000..34517b359399
--- /dev/null
+++ b/arch/mn10300/include/asm/delay.h
@@ -0,0 +1,19 @@
1/* MN10300 Uninterruptible delay routines
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_DELAY_H
12#define _ASM_DELAY_H
13
14extern void __udelay(unsigned long usecs);
15extern void __delay(unsigned long loops);
16
17#define udelay(n) __udelay(n)
18
19#endif /* _ASM_DELAY_H */
diff --git a/arch/mn10300/include/asm/device.h b/arch/mn10300/include/asm/device.h
new file mode 100644
index 000000000000..f0a4c256403b
--- /dev/null
+++ b/arch/mn10300/include/asm/device.h
@@ -0,0 +1 @@
#include <asm-generic/device.h>
diff --git a/arch/mn10300/include/asm/div64.h b/arch/mn10300/include/asm/div64.h
new file mode 100644
index 000000000000..3a8329b3e869
--- /dev/null
+++ b/arch/mn10300/include/asm/div64.h
@@ -0,0 +1,100 @@
1/* MN10300 64-bit division
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_DIV64
12#define _ASM_DIV64
13
14#include <linux/types.h>
15
16extern void ____unhandled_size_in_do_div___(void);
17
18/*
19 * divide n by base, leaving the result in n and returning the remainder
20 * - we can do this quite efficiently on the MN10300 by cascading the divides
21 * through the MDR register
22 */
23#define do_div(n, base) \
24({ \
25 unsigned __rem = 0; \
26 if (sizeof(n) <= 4) { \
27 asm("mov %1,mdr \n" \
28 "divu %2,%0 \n" \
29 "mov mdr,%1 \n" \
30 : "+r"(n), "=d"(__rem) \
31 : "r"(base), "1"(__rem) \
32 : "cc" \
33 ); \
34 } else if (sizeof(n) <= 8) { \
35 union { \
36 unsigned long long l; \
37 u32 w[2]; \
38 } __quot; \
39 __quot.l = n; \
40 asm("mov %0,mdr \n" /* MDR = 0 */ \
41 "divu %3,%1 \n" \
42 /* __quot.MSL = __div.MSL / base, */ \
43 /* MDR = MDR:__div.MSL % base */ \
44 "divu %3,%2 \n" \
45 /* __quot.LSL = MDR:__div.LSL / base, */ \
46 /* MDR = MDR:__div.LSL % base */ \
47 "mov mdr,%0 \n" \
48 : "=d"(__rem), "=r"(__quot.w[1]), "=r"(__quot.w[0]) \
49 : "r"(base), "0"(__rem), "1"(__quot.w[1]), \
50 "2"(__quot.w[0]) \
51 : "cc" \
52 ); \
53 n = __quot.l; \
54 } else { \
55 ____unhandled_size_in_do_div___(); \
56 } \
57 __rem; \
58})
59
60/*
61 * do an unsigned 32-bit multiply and divide with intermediate 64-bit product
62 * so as not to lose accuracy
63 * - we use the MDR register to hold the MSW of the product
64 */
65static inline __attribute__((const))
66unsigned __muldiv64u(unsigned val, unsigned mult, unsigned div)
67{
68 unsigned result;
69
70 asm("mulu %2,%0 \n" /* MDR:val = val*mult */
71 "divu %3,%0 \n" /* val = MDR:val/div;
72 * MDR = MDR:val%div */
73 : "=r"(result)
74 : "0"(val), "ir"(mult), "r"(div)
75 );
76
77 return result;
78}
79
80/*
81 * do a signed 32-bit multiply and divide with intermediate 64-bit product so
82 * as not to lose accuracy
83 * - we use the MDR register to hold the MSW of the product
84 */
85static inline __attribute__((const))
86signed __muldiv64s(signed val, signed mult, signed div)
87{
88 signed result;
89
90 asm("mul %2,%0 \n" /* MDR:val = val*mult */
91 "div %3,%0 \n" /* val = MDR:val/div;
92 * MDR = MDR:val%div */
93 : "=r"(result)
94 : "0"(val), "ir"(mult), "r"(div)
95 );
96
97 return result;
98}
99
100#endif /* _ASM_DIV64 */
diff --git a/arch/mn10300/include/asm/dma-mapping.h b/arch/mn10300/include/asm/dma-mapping.h
new file mode 100644
index 000000000000..ccae8f6c6326
--- /dev/null
+++ b/arch/mn10300/include/asm/dma-mapping.h
@@ -0,0 +1,234 @@
1/* DMA mapping routines for the MN10300 arch
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_DMA_MAPPING_H
12#define _ASM_DMA_MAPPING_H
13
14#include <linux/mm.h>
15#include <linux/scatterlist.h>
16
17#include <asm/cache.h>
18#include <asm/io.h>
19
20extern void *dma_alloc_coherent(struct device *dev, size_t size,
21 dma_addr_t *dma_handle, int flag);
22
23extern void dma_free_coherent(struct device *dev, size_t size,
24 void *vaddr, dma_addr_t dma_handle);
25
26#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent((d), (s), (h), (f))
27#define dma_free_noncoherent(d, s, v, h) dma_free_coherent((d), (s), (v), (h))
28
29/*
30 * Map a single buffer of the indicated size for DMA in streaming mode. The
31 * 32-bit bus address to use is returned.
32 *
33 * Once the device is given the dma address, the device owns this memory until
34 * either pci_unmap_single or pci_dma_sync_single is performed.
35 */
36static inline
37dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
38 enum dma_data_direction direction)
39{
40 BUG_ON(direction == DMA_NONE);
41 mn10300_dcache_flush_inv();
42 return virt_to_bus(ptr);
43}
44
45/*
46 * Unmap a single streaming mode DMA translation. The dma_addr and size must
47 * match what was provided for in a previous pci_map_single call. All other
48 * usages are undefined.
49 *
50 * After this call, reads by the cpu to the buffer are guarenteed to see
51 * whatever the device wrote there.
52 */
53static inline
54void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
55 enum dma_data_direction direction)
56{
57 BUG_ON(direction == DMA_NONE);
58}
59
60/*
61 * Map a set of buffers described by scatterlist in streaming mode for DMA.
62 * This is the scather-gather version of the above pci_map_single interface.
63 * Here the scatter gather list elements are each tagged with the appropriate
64 * dma address and length. They are obtained via sg_dma_{address,length}(SG).
65 *
66 * NOTE: An implementation may be able to use a smaller number of DMA
67 * address/length pairs than there are SG table elements. (for example
68 * via virtual mapping capabilities) The routine returns the number of
69 * addr/length pairs actually used, at most nents.
70 *
71 * Device ownership issues as mentioned above for pci_map_single are the same
72 * here.
73 */
74static inline
75int dma_map_sg(struct device *dev, struct scatterlist *sglist, int nents,
76 enum dma_data_direction direction)
77{
78 struct scatterlist *sg;
79 int i;
80
81 BUG_ON(!valid_dma_direction(direction));
82 WARN_ON(nents == 0 || sglist[0].length == 0);
83
84 for_each_sg(sglist, sg, nents, i) {
85 BUG_ON(!sg_page(sg));
86
87 sg->dma_address = sg_phys(sg);
88 }
89
90 mn10300_dcache_flush_inv();
91 return nents;
92}
93
94/*
95 * Unmap a set of streaming mode DMA translations.
96 * Again, cpu read rules concerning calls here are the same as for
97 * pci_unmap_single() above.
98 */
99static inline
100void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
101 enum dma_data_direction direction)
102{
103 BUG_ON(!valid_dma_direction(direction));
104}
105
106/*
107 * pci_{map,unmap}_single_page maps a kernel page to a dma_addr_t. identical
108 * to pci_map_single, but takes a struct page instead of a virtual address
109 */
110static inline
111dma_addr_t dma_map_page(struct device *dev, struct page *page,
112 unsigned long offset, size_t size,
113 enum dma_data_direction direction)
114{
115 BUG_ON(direction == DMA_NONE);
116 return page_to_bus(page) + offset;
117}
118
119static inline
120void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
121 enum dma_data_direction direction)
122{
123 BUG_ON(direction == DMA_NONE);
124}
125
126/*
127 * Make physical memory consistent for a single streaming mode DMA translation
128 * after a transfer.
129 *
130 * If you perform a pci_map_single() but wish to interrogate the buffer using
131 * the cpu, yet do not wish to teardown the PCI dma mapping, you must call this
132 * function before doing so. At the next point you give the PCI dma address
133 * back to the card, the device again owns the buffer.
134 */
135static inline
136void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
137 size_t size, enum dma_data_direction direction)
138{
139}
140
141static inline
142void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
143 size_t size, enum dma_data_direction direction)
144{
145 mn10300_dcache_flush_inv();
146}
147
148static inline
149void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
150 unsigned long offset, size_t size,
151 enum dma_data_direction direction)
152{
153}
154
155static inline void
156dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
157 unsigned long offset, size_t size,
158 enum dma_data_direction direction)
159{
160 mn10300_dcache_flush_inv();
161}
162
163
164/*
165 * Make physical memory consistent for a set of streaming mode DMA translations
166 * after a transfer.
167 *
168 * The same as pci_dma_sync_single but for a scatter-gather list, same rules
169 * and usage.
170 */
171static inline
172void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
173 int nelems, enum dma_data_direction direction)
174{
175}
176
177static inline
178void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
179 int nelems, enum dma_data_direction direction)
180{
181 mn10300_dcache_flush_inv();
182}
183
184static inline
185int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
186{
187 return 0;
188}
189
190/*
191 * Return whether the given PCI device DMA address mask can be supported
192 * properly. For example, if your device can only drive the low 24-bits during
193 * PCI bus mastering, then you would pass 0x00ffffff as the mask to this
194 * function.
195 */
196static inline
197int dma_supported(struct device *dev, u64 mask)
198{
199 /*
200 * we fall back to GFP_DMA when the mask isn't all 1s, so we can't
201 * guarantee allocations that must be within a tighter range than
202 * GFP_DMA
203 */
204 if (mask < 0x00ffffff)
205 return 0;
206 return 1;
207}
208
209static inline
210int dma_set_mask(struct device *dev, u64 mask)
211{
212 if (!dev->dma_mask || !dma_supported(dev, mask))
213 return -EIO;
214
215 *dev->dma_mask = mask;
216 return 0;
217}
218
219static inline
220int dma_get_cache_alignment(void)
221{
222 return 1 << L1_CACHE_SHIFT;
223}
224
225#define dma_is_consistent(d) (1)
226
227static inline
228void dma_cache_sync(void *vaddr, size_t size,
229 enum dma_data_direction direction)
230{
231 mn10300_dcache_flush_inv();
232}
233
234#endif
diff --git a/arch/mn10300/include/asm/dma.h b/arch/mn10300/include/asm/dma.h
new file mode 100644
index 000000000000..098df2e617ab
--- /dev/null
+++ b/arch/mn10300/include/asm/dma.h
@@ -0,0 +1,118 @@
1/* MN10300 ISA DMA handlers and definitions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_DMA_H
12#define _ASM_DMA_H
13
14#include <asm/system.h>
15#include <linux/spinlock.h>
16#include <asm/io.h>
17#include <linux/delay.h>
18
19#undef MAX_DMA_CHANNELS /* switch off linux/kernel/dma.c */
20#define MAX_DMA_ADDRESS 0xbfffffff
21
22extern spinlock_t dma_spin_lock;
23
24static inline unsigned long claim_dma_lock(void)
25{
26 unsigned long flags;
27 spin_lock_irqsave(&dma_spin_lock, flags);
28 return flags;
29}
30
31static inline void release_dma_lock(unsigned long flags)
32{
33 spin_unlock_irqrestore(&dma_spin_lock, flags);
34}
35
36/* enable/disable a specific DMA channel */
37static inline void enable_dma(unsigned int dmanr)
38{
39}
40
41static inline void disable_dma(unsigned int dmanr)
42{
43}
44
45/* Clear the 'DMA Pointer Flip Flop'.
46 * Write 0 for LSB/MSB, 1 for MSB/LSB access.
47 * Use this once to initialize the FF to a known state.
48 * After that, keep track of it. :-)
49 * --- In order to do that, the DMA routines below should ---
50 * --- only be used while holding the DMA lock ! ---
51 */
52static inline void clear_dma_ff(unsigned int dmanr)
53{
54}
55
56/* set mode (above) for a specific DMA channel */
57static inline void set_dma_mode(unsigned int dmanr, char mode)
58{
59}
60
61/* Set only the page register bits of the transfer address.
62 * This is used for successive transfers when we know the contents of
63 * the lower 16 bits of the DMA current address register, but a 64k boundary
64 * may have been crossed.
65 */
66static inline void set_dma_page(unsigned int dmanr, char pagenr)
67{
68}
69
70
71/* Set transfer address & page bits for specific DMA channel.
72 * Assumes dma flipflop is clear.
73 */
74static inline void set_dma_addr(unsigned int dmanr, unsigned int a)
75{
76}
77
78
79/* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for
80 * a specific DMA channel.
81 * You must ensure the parameters are valid.
82 * NOTE: from a manual: "the number of transfers is one more
83 * than the initial word count"! This is taken into account.
84 * Assumes dma flip-flop is clear.
85 * NOTE 2: "count" represents _bytes_ and must be even for channels 5-7.
86 */
87static inline void set_dma_count(unsigned int dmanr, unsigned int count)
88{
89}
90
91
92/* Get DMA residue count. After a DMA transfer, this
93 * should return zero. Reading this while a DMA transfer is
94 * still in progress will return unpredictable results.
95 * If called before the channel has been used, it may return 1.
96 * Otherwise, it returns the number of _bytes_ left to transfer.
97 *
98 * Assumes DMA flip-flop is clear.
99 */
100static inline int get_dma_residue(unsigned int dmanr)
101{
102 return 0;
103}
104
105
106/* These are in kernel/dma.c: */
107extern int request_dma(unsigned int dmanr, const char *device_id);
108extern void free_dma(unsigned int dmanr);
109
110/* From PCI */
111
112#ifdef CONFIG_PCI
113extern int isa_dma_bridge_buggy;
114#else
115#define isa_dma_bridge_buggy (0)
116#endif
117
118#endif /* _ASM_DMA_H */
diff --git a/arch/mn10300/include/asm/dmactl-regs.h b/arch/mn10300/include/asm/dmactl-regs.h
new file mode 100644
index 000000000000..58a199da0f4a
--- /dev/null
+++ b/arch/mn10300/include/asm/dmactl-regs.h
@@ -0,0 +1,101 @@
1/* MN10300 on-board DMA controller registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_DMACTL_REGS_H
12#define _ASM_DMACTL_REGS_H
13
14#include <asm/cpu-regs.h>
15
16#ifdef __KERNEL__
17
18/* DMA registers */
19#define DMxCTR(N) __SYSREG(0xd2000000 + ((N) * 0x100), u32) /* control reg */
20#define DMxCTR_BG 0x0000001f /* transfer request source */
21#define DMxCTR_BG_SOFT 0x00000000 /* - software source */
22#define DMxCTR_BG_SC0TX 0x00000002 /* - serial port 0 transmission */
23#define DMxCTR_BG_SC0RX 0x00000003 /* - serial port 0 reception */
24#define DMxCTR_BG_SC1TX 0x00000004 /* - serial port 1 transmission */
25#define DMxCTR_BG_SC1RX 0x00000005 /* - serial port 1 reception */
26#define DMxCTR_BG_SC2TX 0x00000006 /* - serial port 2 transmission */
27#define DMxCTR_BG_SC2RX 0x00000007 /* - serial port 2 reception */
28#define DMxCTR_BG_TM0UFLOW 0x00000008 /* - timer 0 underflow */
29#define DMxCTR_BG_TM1UFLOW 0x00000009 /* - timer 1 underflow */
30#define DMxCTR_BG_TM2UFLOW 0x0000000a /* - timer 2 underflow */
31#define DMxCTR_BG_TM3UFLOW 0x0000000b /* - timer 3 underflow */
32#define DMxCTR_BG_TM6ACMPCAP 0x0000000c /* - timer 6A compare/capture */
33#define DMxCTR_BG_AFE 0x0000000d /* - analogue front-end interrupt source */
34#define DMxCTR_BG_ADC 0x0000000e /* - A/D conversion end interrupt source */
35#define DMxCTR_BG_IRDA 0x0000000f /* - IrDA interrupt source */
36#define DMxCTR_BG_RTC 0x00000010 /* - RTC interrupt source */
37#define DMxCTR_BG_XIRQ0 0x00000011 /* - XIRQ0 pin interrupt source */
38#define DMxCTR_BG_XIRQ1 0x00000012 /* - XIRQ1 pin interrupt source */
39#define DMxCTR_BG_XDMR0 0x00000013 /* - external request 0 source (XDMR0 pin) */
40#define DMxCTR_BG_XDMR1 0x00000014 /* - external request 1 source (XDMR1 pin) */
41#define DMxCTR_SAM 0x000000e0 /* DMA transfer src addr mode */
42#define DMxCTR_SAM_INCR 0x00000000 /* - increment */
43#define DMxCTR_SAM_DECR 0x00000020 /* - decrement */
44#define DMxCTR_SAM_FIXED 0x00000040 /* - fixed */
45#define DMxCTR_DAM 0x00000000 /* DMA transfer dest addr mode */
46#define DMxCTR_DAM_INCR 0x00000000 /* - increment */
47#define DMxCTR_DAM_DECR 0x00000100 /* - decrement */
48#define DMxCTR_DAM_FIXED 0x00000200 /* - fixed */
49#define DMxCTR_TM 0x00001800 /* DMA transfer mode */
50#define DMxCTR_TM_BATCH 0x00000000 /* - batch transfer */
51#define DMxCTR_TM_INTERM 0x00001000 /* - intermittent transfer */
52#define DMxCTR_UT 0x00006000 /* DMA transfer unit */
53#define DMxCTR_UT_1 0x00000000 /* - 1 byte */
54#define DMxCTR_UT_2 0x00002000 /* - 2 byte */
55#define DMxCTR_UT_4 0x00004000 /* - 4 byte */
56#define DMxCTR_UT_16 0x00006000 /* - 16 byte */
57#define DMxCTR_TEN 0x00010000 /* DMA channel transfer enable */
58#define DMxCTR_RQM 0x00060000 /* external request input source mode */
59#define DMxCTR_RQM_FALLEDGE 0x00000000 /* - falling edge */
60#define DMxCTR_RQM_RISEEDGE 0x00020000 /* - rising edge */
61#define DMxCTR_RQM_LOLEVEL 0x00040000 /* - low level */
62#define DMxCTR_RQM_HILEVEL 0x00060000 /* - high level */
63#define DMxCTR_RQF 0x01000000 /* DMA transfer request flag */
64#define DMxCTR_XEND 0x80000000 /* DMA transfer end flag */
65
66#define DMxSRC(N) __SYSREG(0xd2000004 + ((N) * 0x100), u32) /* control reg */
67
68#define DMxDST(N) __SYSREG(0xd2000008 + ((N) * 0x100), u32) /* src addr reg */
69
70#define DMxSIZ(N) __SYSREG(0xd200000c + ((N) * 0x100), u32) /* dest addr reg */
71#define DMxSIZ_CT 0x000fffff /* number of bytes to transfer */
72
73#define DMxCYC(N) __SYSREG(0xd2000010 + ((N) * 0x100), u32) /* intermittent
74 * size reg */
75#define DMxCYC_CYC 0x000000ff /* number of interrmittent transfers -1 */
76
77#define DM0IRQ 16 /* DMA channel 0 complete IRQ */
78#define DM1IRQ 17 /* DMA channel 1 complete IRQ */
79#define DM2IRQ 18 /* DMA channel 2 complete IRQ */
80#define DM3IRQ 19 /* DMA channel 3 complete IRQ */
81
82#define DM0ICR GxICR(DM0IRQ) /* DMA channel 0 complete intr ctrl reg */
83#define DM1ICR GxICR(DM0IR1) /* DMA channel 1 complete intr ctrl reg */
84#define DM2ICR GxICR(DM0IR2) /* DMA channel 2 complete intr ctrl reg */
85#define DM3ICR GxICR(DM0IR3) /* DMA channel 3 complete intr ctrl reg */
86
87#ifndef __ASSEMBLY__
88
89struct mn10300_dmactl_regs {
90 u32 ctr;
91 const void *src;
92 void *dst;
93 u32 siz;
94 u32 cyc;
95} __attribute__((aligned(0x100)));
96
97#endif /* __ASSEMBLY__ */
98
99#endif /* __KERNEL__ */
100
101#endif /* _ASM_DMACTL_REGS_H */
diff --git a/arch/mn10300/include/asm/elf.h b/arch/mn10300/include/asm/elf.h
new file mode 100644
index 000000000000..bf09f8bb392e
--- /dev/null
+++ b/arch/mn10300/include/asm/elf.h
@@ -0,0 +1,147 @@
1/* MN10300 ELF constant and register definitions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Written by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_ELF_H
13#define _ASM_ELF_H
14
15#include <linux/utsname.h>
16#include <asm/ptrace.h>
17#include <asm/user.h>
18
19/*
20 * AM33 relocations
21 */
22#define R_MN10300_NONE 0 /* No reloc. */
23#define R_MN10300_32 1 /* Direct 32 bit. */
24#define R_MN10300_16 2 /* Direct 16 bit. */
25#define R_MN10300_8 3 /* Direct 8 bit. */
26#define R_MN10300_PCREL32 4 /* PC-relative 32-bit. */
27#define R_MN10300_PCREL16 5 /* PC-relative 16-bit signed. */
28#define R_MN10300_PCREL8 6 /* PC-relative 8-bit signed. */
29#define R_MN10300_24 9 /* Direct 24 bit. */
30#define R_MN10300_RELATIVE 23 /* Adjust by program base. */
31
32/*
33 * ELF register definitions..
34 */
35typedef unsigned long elf_greg_t;
36
37#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t))
38typedef elf_greg_t elf_gregset_t[ELF_NGREG];
39
40#define ELF_NFPREG 32
41typedef float elf_fpreg_t;
42
43typedef struct {
44 elf_fpreg_t fpregs[ELF_NFPREG];
45 u_int32_t fpcr;
46} elf_fpregset_t;
47
48extern int dump_fpu(struct pt_regs *, elf_fpregset_t *);
49
50/*
51 * This is used to ensure we don't load something for the wrong architecture
52 */
53#define elf_check_arch(x) \
54 (((x)->e_machine == EM_CYGNUS_MN10300) || \
55 ((x)->e_machine == EM_MN10300))
56
57/*
58 * These are used to set parameters in the core dumps.
59 */
60#define ELF_CLASS ELFCLASS32
61#define ELF_DATA ELFDATA2LSB
62#define ELF_ARCH EM_MN10300
63
64/*
65 * ELF process initialiser
66 */
67#define ELF_PLAT_INIT(_r, load_addr) \
68do { \
69 struct pt_regs *_ur = current->thread.uregs; \
70 _ur->a3 = 0; _ur->a2 = 0; _ur->d3 = 0; _ur->d2 = 0; \
71 _ur->mcvf = 0; _ur->mcrl = 0; _ur->mcrh = 0; _ur->mdrq = 0; \
72 _ur->e1 = 0; _ur->e0 = 0; _ur->e7 = 0; _ur->e6 = 0; \
73 _ur->e5 = 0; _ur->e4 = 0; _ur->e3 = 0; _ur->e2 = 0; \
74 _ur->lar = 0; _ur->lir = 0; _ur->mdr = 0; \
75 _ur->a1 = 0; _ur->a0 = 0; _ur->d1 = 0; _ur->d0 = 0; \
76} while (0)
77
78#define USE_ELF_CORE_DUMP
79#define ELF_EXEC_PAGESIZE 4096
80
81/*
82 * This is the location that an ET_DYN program is loaded if exec'ed. Typical
83 * use of this is to invoke "./ld.so someprog" to test out a new version of
84 * the loader. We need to make sure that it is out of the way of the program
85 * that it will "exec", and that there is sufficient room for the brk.
86 * - must clear the VMALLOC area
87 */
88#define ELF_ET_DYN_BASE 0x04000000
89
90/*
91 * regs is struct pt_regs, pr_reg is elf_gregset_t (which is
92 * now struct user_regs, they are different)
93 * - ELF_CORE_COPY_REGS has been guessed, and may be wrong
94 */
95#define ELF_CORE_COPY_REGS(pr_reg, regs) \
96do { \
97 pr_reg[0] = regs->a3; \
98 pr_reg[1] = regs->a2; \
99 pr_reg[2] = regs->d3; \
100 pr_reg[3] = regs->d2; \
101 pr_reg[4] = regs->mcvf; \
102 pr_reg[5] = regs->mcrl; \
103 pr_reg[6] = regs->mcrh; \
104 pr_reg[7] = regs->mdrq; \
105 pr_reg[8] = regs->e1; \
106 pr_reg[9] = regs->e0; \
107 pr_reg[10] = regs->e7; \
108 pr_reg[11] = regs->e6; \
109 pr_reg[12] = regs->e5; \
110 pr_reg[13] = regs->e4; \
111 pr_reg[14] = regs->e3; \
112 pr_reg[15] = regs->e2; \
113 pr_reg[16] = regs->sp; \
114 pr_reg[17] = regs->lar; \
115 pr_reg[18] = regs->lir; \
116 pr_reg[19] = regs->mdr; \
117 pr_reg[20] = regs->a1; \
118 pr_reg[21] = regs->a0; \
119 pr_reg[22] = regs->d1; \
120 pr_reg[23] = regs->d0; \
121 pr_reg[24] = regs->orig_d0; \
122 pr_reg[25] = regs->epsw; \
123 pr_reg[26] = regs->pc; \
124} while (0);
125
126/*
127 * This yields a mask that user programs can use to figure out what
128 * instruction set this CPU supports. This could be done in user space,
129 * but it's not easy, and we've already done it here.
130 */
131#define ELF_HWCAP (0)
132
133/*
134 * This yields a string that ld.so will use to load implementation
135 * specific libraries for optimization. This is more specific in
136 * intent than poking at uname or /proc/cpuinfo.
137 *
138 * For the moment, we have only optimizations for the Intel generations,
139 * but that could change...
140 */
141#define ELF_PLATFORM (NULL)
142
143#ifdef __KERNEL__
144#define SET_PERSONALITY(ex) set_personality(PER_LINUX)
145#endif
146
147#endif /* _ASM_ELF_H */
diff --git a/arch/mn10300/include/asm/emergency-restart.h b/arch/mn10300/include/asm/emergency-restart.h
new file mode 100644
index 000000000000..3711bd9d50bd
--- /dev/null
+++ b/arch/mn10300/include/asm/emergency-restart.h
@@ -0,0 +1 @@
#include <asm-generic/emergency-restart.h>
diff --git a/arch/mn10300/include/asm/errno.h b/arch/mn10300/include/asm/errno.h
new file mode 100644
index 000000000000..4c82b503d92f
--- /dev/null
+++ b/arch/mn10300/include/asm/errno.h
@@ -0,0 +1 @@
#include <asm-generic/errno.h>
diff --git a/arch/mn10300/include/asm/exceptions.h b/arch/mn10300/include/asm/exceptions.h
new file mode 100644
index 000000000000..fa16466ef3f9
--- /dev/null
+++ b/arch/mn10300/include/asm/exceptions.h
@@ -0,0 +1,121 @@
1/* MN10300 Microcontroller core exceptions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_EXCEPTIONS_H
12#define _ASM_EXCEPTIONS_H
13
14#include <linux/linkage.h>
15
16/*
17 * define the breakpoint instruction opcode to use
18 * - note that the JTAG unit steals 0xFF, so we want to avoid that if we can
19 * (can use 0xF7)
20 */
21#define GDBSTUB_BKPT 0xFF
22
23#ifndef __ASSEMBLY__
24
25/*
26 * enumeration of exception codes (as extracted from TBR MSW)
27 */
28enum exception_code {
29 EXCEP_RESET = 0x000000, /* reset */
30
31 /* MMU exceptions */
32 EXCEP_ITLBMISS = 0x000100, /* instruction TLB miss */
33 EXCEP_DTLBMISS = 0x000108, /* data TLB miss */
34 EXCEP_IAERROR = 0x000110, /* instruction address */
35 EXCEP_DAERROR = 0x000118, /* data address */
36
37 /* system exceptions */
38 EXCEP_TRAP = 0x000128, /* program interrupt (PI instruction) */
39 EXCEP_ISTEP = 0x000130, /* single step */
40 EXCEP_IBREAK = 0x000150, /* instruction breakpoint */
41 EXCEP_OBREAK = 0x000158, /* operand breakpoint */
42 EXCEP_PRIVINS = 0x000160, /* privileged instruction execution */
43 EXCEP_UNIMPINS = 0x000168, /* unimplemented instruction execution */
44 EXCEP_UNIMPEXINS = 0x000170, /* unimplemented extended instruction execution */
45 EXCEP_MEMERR = 0x000178, /* illegal memory access */
46 EXCEP_MISALIGN = 0x000180, /* misalignment */
47 EXCEP_BUSERROR = 0x000188, /* bus error */
48 EXCEP_ILLINSACC = 0x000190, /* illegal instruction access */
49 EXCEP_ILLDATACC = 0x000198, /* illegal data access */
50 EXCEP_IOINSACC = 0x0001a0, /* I/O space instruction access */
51 EXCEP_PRIVINSACC = 0x0001a8, /* privileged space instruction access */
52 EXCEP_PRIVDATACC = 0x0001b0, /* privileged space data access */
53 EXCEP_DATINSACC = 0x0001b8, /* data space instruction access */
54 EXCEP_DOUBLE_FAULT = 0x000200, /* double fault */
55
56 /* FPU exceptions */
57 EXCEP_FPU_DISABLED = 0x0001c0, /* FPU disabled */
58 EXCEP_FPU_UNIMPINS = 0x0001c8, /* FPU unimplemented operation */
59 EXCEP_FPU_OPERATION = 0x0001d0, /* FPU operation */
60
61 /* interrupts */
62 EXCEP_WDT = 0x000240, /* watchdog timer overflow */
63 EXCEP_NMI = 0x000248, /* non-maskable interrupt */
64 EXCEP_IRQ_LEVEL0 = 0x000280, /* level 0 maskable interrupt */
65 EXCEP_IRQ_LEVEL1 = 0x000288, /* level 1 maskable interrupt */
66 EXCEP_IRQ_LEVEL2 = 0x000290, /* level 2 maskable interrupt */
67 EXCEP_IRQ_LEVEL3 = 0x000298, /* level 3 maskable interrupt */
68 EXCEP_IRQ_LEVEL4 = 0x0002a0, /* level 4 maskable interrupt */
69 EXCEP_IRQ_LEVEL5 = 0x0002a8, /* level 5 maskable interrupt */
70 EXCEP_IRQ_LEVEL6 = 0x0002b0, /* level 6 maskable interrupt */
71
72 /* system calls */
73 EXCEP_SYSCALL0 = 0x000300, /* system call 0 */
74 EXCEP_SYSCALL1 = 0x000308, /* system call 1 */
75 EXCEP_SYSCALL2 = 0x000310, /* system call 2 */
76 EXCEP_SYSCALL3 = 0x000318, /* system call 3 */
77 EXCEP_SYSCALL4 = 0x000320, /* system call 4 */
78 EXCEP_SYSCALL5 = 0x000328, /* system call 5 */
79 EXCEP_SYSCALL6 = 0x000330, /* system call 6 */
80 EXCEP_SYSCALL7 = 0x000338, /* system call 7 */
81 EXCEP_SYSCALL8 = 0x000340, /* system call 8 */
82 EXCEP_SYSCALL9 = 0x000348, /* system call 9 */
83 EXCEP_SYSCALL10 = 0x000350, /* system call 10 */
84 EXCEP_SYSCALL11 = 0x000358, /* system call 11 */
85 EXCEP_SYSCALL12 = 0x000360, /* system call 12 */
86 EXCEP_SYSCALL13 = 0x000368, /* system call 13 */
87 EXCEP_SYSCALL14 = 0x000370, /* system call 14 */
88 EXCEP_SYSCALL15 = 0x000378, /* system call 15 */
89};
90
91extern void __set_intr_stub(enum exception_code code, void *handler);
92extern void set_intr_stub(enum exception_code code, void *handler);
93extern void set_jtag_stub(enum exception_code code, void *handler);
94
95struct pt_regs;
96
97extern asmlinkage void __common_exception(void);
98extern asmlinkage void itlb_miss(void);
99extern asmlinkage void dtlb_miss(void);
100extern asmlinkage void itlb_aerror(void);
101extern asmlinkage void dtlb_aerror(void);
102extern asmlinkage void raw_bus_error(void);
103extern asmlinkage void double_fault(void);
104extern asmlinkage int system_call(struct pt_regs *);
105extern asmlinkage void fpu_exception(struct pt_regs *, enum exception_code);
106extern asmlinkage void nmi(struct pt_regs *, enum exception_code);
107extern asmlinkage void uninitialised_exception(struct pt_regs *,
108 enum exception_code);
109extern asmlinkage void irq_handler(void);
110extern asmlinkage void profile_handler(void);
111extern asmlinkage void nmi_handler(void);
112extern asmlinkage void misalignment(struct pt_regs *, enum exception_code);
113
114extern void die(const char *, struct pt_regs *, enum exception_code)
115 ATTRIB_NORET;
116
117extern int die_if_no_fixup(const char *, struct pt_regs *, enum exception_code);
118
119#endif /* __ASSEMBLY__ */
120
121#endif /* _ASM_EXCEPTIONS_H */
diff --git a/arch/mn10300/include/asm/fb.h b/arch/mn10300/include/asm/fb.h
new file mode 100644
index 000000000000..697b24a91e1a
--- /dev/null
+++ b/arch/mn10300/include/asm/fb.h
@@ -0,0 +1,23 @@
1/* MN10300 Frame buffer stuff
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_FB_H
12#define _ASM_FB_H
13
14#include <linux/fb.h>
15
16#define fb_pgprotect(...) do {} while (0)
17
18static inline int fb_is_primary_device(struct fb_info *info)
19{
20 return 0;
21}
22
23#endif /* _ASM_FB_H */
diff --git a/arch/mn10300/include/asm/fcntl.h b/arch/mn10300/include/asm/fcntl.h
new file mode 100644
index 000000000000..46ab12db5739
--- /dev/null
+++ b/arch/mn10300/include/asm/fcntl.h
@@ -0,0 +1 @@
#include <asm-generic/fcntl.h>
diff --git a/arch/mn10300/include/asm/fpu.h b/arch/mn10300/include/asm/fpu.h
new file mode 100644
index 000000000000..64a2b83a7a6a
--- /dev/null
+++ b/arch/mn10300/include/asm/fpu.h
@@ -0,0 +1,85 @@
1/* MN10300 FPU definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * Derived from include/asm-i386/i387.h: Copyright (C) 1994 Linus Torvalds
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_FPU_H
13#define _ASM_FPU_H
14
15#include <asm/processor.h>
16#include <asm/sigcontext.h>
17#include <asm/user.h>
18
19#ifdef __KERNEL__
20
21/* the task that owns the FPU state */
22extern struct task_struct *fpu_state_owner;
23
24#define set_using_fpu(tsk) \
25do { \
26 (tsk)->thread.fpu_flags |= THREAD_USING_FPU; \
27} while (0)
28
29#define clear_using_fpu(tsk) \
30do { \
31 (tsk)->thread.fpu_flags &= ~THREAD_USING_FPU; \
32} while (0)
33
34#define is_using_fpu(tsk) ((tsk)->thread.fpu_flags & THREAD_USING_FPU)
35
36#define unlazy_fpu(tsk) \
37do { \
38 preempt_disable(); \
39 if (fpu_state_owner == (tsk)) \
40 fpu_save(&tsk->thread.fpu_state); \
41 preempt_enable(); \
42} while (0)
43
44#define exit_fpu() \
45do { \
46 struct task_struct *__tsk = current; \
47 preempt_disable(); \
48 if (fpu_state_owner == __tsk) \
49 fpu_state_owner = NULL; \
50 preempt_enable(); \
51} while (0)
52
53#define flush_fpu() \
54do { \
55 struct task_struct *__tsk = current; \
56 preempt_disable(); \
57 if (fpu_state_owner == __tsk) { \
58 fpu_state_owner = NULL; \
59 __tsk->thread.uregs->epsw &= ~EPSW_FE; \
60 } \
61 preempt_enable(); \
62 clear_using_fpu(__tsk); \
63} while (0)
64
65extern asmlinkage void fpu_init_state(void);
66extern asmlinkage void fpu_kill_state(struct task_struct *);
67extern asmlinkage void fpu_disabled(struct pt_regs *, enum exception_code);
68extern asmlinkage void fpu_exception(struct pt_regs *, enum exception_code);
69
70#ifdef CONFIG_FPU
71extern asmlinkage void fpu_save(struct fpu_state_struct *);
72extern asmlinkage void fpu_restore(struct fpu_state_struct *);
73#else
74#define fpu_save(a)
75#define fpu_restore(a)
76#endif /* CONFIG_FPU */
77
78/*
79 * signal frame handlers
80 */
81extern int fpu_setup_sigcontext(struct fpucontext *buf);
82extern int fpu_restore_sigcontext(struct fpucontext *buf);
83
84#endif /* __KERNEL__ */
85#endif /* _ASM_FPU_H */
diff --git a/arch/mn10300/include/asm/frame.inc b/arch/mn10300/include/asm/frame.inc
new file mode 100644
index 000000000000..5b1949bdf039
--- /dev/null
+++ b/arch/mn10300/include/asm/frame.inc
@@ -0,0 +1,91 @@
1/* MN10300 Microcontroller core system register definitions -*- asm -*-
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_FRAME_INC
12#define _ASM_FRAME_INC
13
14#ifndef __ASSEMBLY__
15#error not for use in C files
16#endif
17
18#ifndef __ASM_OFFSETS_H__
19#include <asm/asm-offsets.h>
20#endif
21
22#define pi break
23
24#define fp a3
25
26###############################################################################
27#
28# build a stack frame from the registers
29# - the caller has subtracted 4 from SP before coming here
30#
31###############################################################################
32.macro SAVE_ALL
33 add -4,sp # next exception frame ptr save area
34 movm [other],(sp)
35 mov usp,a1
36 mov a1,(sp) # USP in MOVM[other] dummy slot
37 movm [d2,d3,a2,a3,exreg0,exreg1,exother],(sp)
38 mov sp,fp # FRAME pointer in A3
39 add -12,sp # allow for calls to be made
40 mov (__frame),a1
41 mov a1,(REG_NEXT,fp)
42 mov fp,(__frame)
43
44 and ~EPSW_FE,epsw # disable the FPU inside the kernel
45
46 # we may be holding current in E2
47#ifdef CONFIG_MN10300_CURRENT_IN_E2
48 mov (__current),e2
49#endif
50.endm
51
52###############################################################################
53#
54# restore the registers from a stack frame
55#
56###############################################################################
57.macro RESTORE_ALL
58 # peel back the stack to the calling frame
59 # - this permits execve() to discard extra frames due to kernel syscalls
60 mov (__frame),fp
61 mov fp,sp
62 mov (REG_NEXT,fp),d0 # userspace has regs->next == 0
63 mov d0,(__frame)
64
65#ifndef CONFIG_MN10300_USING_JTAG
66 mov (REG_EPSW,fp),d0
67 btst EPSW_T,d0
68 beq 99f
69
70 or EPSW_NMID,epsw
71 movhu (DCR),d1
72 or 0x0001, d1
73 movhu d1,(DCR)
74
7599:
76#endif
77 movm (sp),[d2,d3,a2,a3,exreg0,exreg1,exother]
78
79 # must restore usp even if returning to kernel space,
80 # when CONFIG_PREEMPT is enabled.
81 mov (sp),a1 # USP in MOVM[other] dummy slot
82 mov a1,usp
83
84 movm (sp),[other]
85 add 8,sp
86 rti
87
88.endm
89
90
91#endif /* _ASM_FRAME_INC */
diff --git a/arch/mn10300/include/asm/ftrace.h b/arch/mn10300/include/asm/ftrace.h
new file mode 100644
index 000000000000..40a8c178f10d
--- /dev/null
+++ b/arch/mn10300/include/asm/ftrace.h
@@ -0,0 +1 @@
/* empty */
diff --git a/arch/mn10300/include/asm/futex.h b/arch/mn10300/include/asm/futex.h
new file mode 100644
index 000000000000..0b745828f42b
--- /dev/null
+++ b/arch/mn10300/include/asm/futex.h
@@ -0,0 +1 @@
#include <asm-generic/futex.h>
diff --git a/arch/mn10300/include/asm/gdb-stub.h b/arch/mn10300/include/asm/gdb-stub.h
new file mode 100644
index 000000000000..e5a6368559af
--- /dev/null
+++ b/arch/mn10300/include/asm/gdb-stub.h
@@ -0,0 +1,183 @@
1/* MN10300 Kernel GDB stub definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * - Derived from asm-mips/gdb-stub.h (c) 1995 Andreas Busse
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_GDB_STUB_H
13#define _ASM_GDB_STUB_H
14
15#include <asm/exceptions.h>
16
17/*
18 * register ID numbers in GDB remote protocol
19 */
20
21#define GDB_REGID_PC 9
22#define GDB_REGID_FP 7
23#define GDB_REGID_SP 8
24
25/*
26 * virtual stack layout for the GDB exception handler
27 */
28#define NUMREGS 64
29
30#define GDB_FR_D0 (0 * 4)
31#define GDB_FR_D1 (1 * 4)
32#define GDB_FR_D2 (2 * 4)
33#define GDB_FR_D3 (3 * 4)
34#define GDB_FR_A0 (4 * 4)
35#define GDB_FR_A1 (5 * 4)
36#define GDB_FR_A2 (6 * 4)
37#define GDB_FR_A3 (7 * 4)
38
39#define GDB_FR_SP (8 * 4)
40#define GDB_FR_PC (9 * 4)
41#define GDB_FR_MDR (10 * 4)
42#define GDB_FR_EPSW (11 * 4)
43#define GDB_FR_LIR (12 * 4)
44#define GDB_FR_LAR (13 * 4)
45#define GDB_FR_MDRQ (14 * 4)
46
47#define GDB_FR_E0 (15 * 4)
48#define GDB_FR_E1 (16 * 4)
49#define GDB_FR_E2 (17 * 4)
50#define GDB_FR_E3 (18 * 4)
51#define GDB_FR_E4 (19 * 4)
52#define GDB_FR_E5 (20 * 4)
53#define GDB_FR_E6 (21 * 4)
54#define GDB_FR_E7 (22 * 4)
55
56#define GDB_FR_SSP (23 * 4)
57#define GDB_FR_MSP (24 * 4)
58#define GDB_FR_USP (25 * 4)
59#define GDB_FR_MCRH (26 * 4)
60#define GDB_FR_MCRL (27 * 4)
61#define GDB_FR_MCVF (28 * 4)
62
63#define GDB_FR_FPCR (29 * 4)
64#define GDB_FR_DUMMY0 (30 * 4)
65#define GDB_FR_DUMMY1 (31 * 4)
66
67#define GDB_FR_FS0 (32 * 4)
68
69#define GDB_FR_SIZE (NUMREGS * 4)
70
71#ifndef __ASSEMBLY__
72
73/*
74 * This is the same as above, but for the high-level
75 * part of the GDB stub.
76 */
77
78struct gdb_regs {
79 /* saved main processor registers */
80 u32 d0, d1, d2, d3, a0, a1, a2, a3;
81 u32 sp, pc, mdr, epsw, lir, lar, mdrq;
82 u32 e0, e1, e2, e3, e4, e5, e6, e7;
83 u32 ssp, msp, usp, mcrh, mcrl, mcvf;
84
85 /* saved floating point registers */
86 u32 fpcr, _dummy0, _dummy1;
87 u32 fs0, fs1, fs2, fs3, fs4, fs5, fs6, fs7;
88 u32 fs8, fs9, fs10, fs11, fs12, fs13, fs14, fs15;
89 u32 fs16, fs17, fs18, fs19, fs20, fs21, fs22, fs23;
90 u32 fs24, fs25, fs26, fs27, fs28, fs29, fs30, fs31;
91};
92
93/*
94 * Prototypes
95 */
96extern void show_registers_only(struct pt_regs *regs);
97
98extern asmlinkage void gdbstub_init(void);
99extern asmlinkage void gdbstub_exit(int status);
100extern asmlinkage void gdbstub_io_init(void);
101extern asmlinkage void gdbstub_io_set_baud(unsigned baud);
102extern asmlinkage int gdbstub_io_rx_char(unsigned char *_ch, int nonblock);
103extern asmlinkage void gdbstub_io_tx_char(unsigned char ch);
104extern asmlinkage void gdbstub_io_tx_flush(void);
105
106extern asmlinkage void gdbstub_io_rx_handler(void);
107extern asmlinkage void gdbstub_rx_irq(struct pt_regs *, enum exception_code);
108extern asmlinkage int gdbstub_intercept(struct pt_regs *, enum exception_code);
109extern asmlinkage void gdbstub_exception(struct pt_regs *, enum exception_code);
110extern asmlinkage void __gdbstub_bug_trap(void);
111extern asmlinkage void __gdbstub_pause(void);
112extern asmlinkage void start_kernel(void);
113
114#ifndef CONFIG_MN10300_CACHE_DISABLED
115extern asmlinkage void gdbstub_purge_cache(void);
116#else
117#define gdbstub_purge_cache() do {} while (0)
118#endif
119
120/* Used to prevent crashes in memory access */
121extern asmlinkage int gdbstub_read_byte(const u8 *, u8 *);
122extern asmlinkage int gdbstub_read_word(const u8 *, u8 *);
123extern asmlinkage int gdbstub_read_dword(const u8 *, u8 *);
124extern asmlinkage int gdbstub_write_byte(u32, u8 *);
125extern asmlinkage int gdbstub_write_word(u32, u8 *);
126extern asmlinkage int gdbstub_write_dword(u32, u8 *);
127
128extern asmlinkage void gdbstub_read_byte_guard(void);
129extern asmlinkage void gdbstub_read_byte_cont(void);
130extern asmlinkage void gdbstub_read_word_guard(void);
131extern asmlinkage void gdbstub_read_word_cont(void);
132extern asmlinkage void gdbstub_read_dword_guard(void);
133extern asmlinkage void gdbstub_read_dword_cont(void);
134extern asmlinkage void gdbstub_write_byte_guard(void);
135extern asmlinkage void gdbstub_write_byte_cont(void);
136extern asmlinkage void gdbstub_write_word_guard(void);
137extern asmlinkage void gdbstub_write_word_cont(void);
138extern asmlinkage void gdbstub_write_dword_guard(void);
139extern asmlinkage void gdbstub_write_dword_cont(void);
140
141extern u8 gdbstub_rx_buffer[PAGE_SIZE];
142extern u32 gdbstub_rx_inp;
143extern u32 gdbstub_rx_outp;
144extern u8 gdbstub_rx_overflow;
145extern u8 gdbstub_busy;
146extern u8 gdbstub_rx_unget;
147
148#ifdef CONFIG_GDBSTUB_DEBUGGING
149extern void gdbstub_printk(const char *fmt, ...)
150 __attribute__((format(printf, 1, 2)));
151#else
152static inline __attribute__((format(printf, 1, 2)))
153void gdbstub_printk(const char *fmt, ...)
154{
155}
156#endif
157
158#ifdef CONFIG_GDBSTUB_DEBUG_ENTRY
159#define gdbstub_entry(FMT, ...) gdbstub_printk(FMT, ##__VA_ARGS__)
160#else
161#define gdbstub_entry(FMT, ...) ({ 0; })
162#endif
163
164#ifdef CONFIG_GDBSTUB_DEBUG_PROTOCOL
165#define gdbstub_proto(FMT, ...) gdbstub_printk(FMT, ##__VA_ARGS__)
166#else
167#define gdbstub_proto(FMT, ...) ({ 0; })
168#endif
169
170#ifdef CONFIG_GDBSTUB_DEBUG_IO
171#define gdbstub_io(FMT, ...) gdbstub_printk(FMT, ##__VA_ARGS__)
172#else
173#define gdbstub_io(FMT, ...) ({ 0; })
174#endif
175
176#ifdef CONFIG_GDBSTUB_DEBUG_BREAKPOINT
177#define gdbstub_bkpt(FMT, ...) gdbstub_printk(FMT, ##__VA_ARGS__)
178#else
179#define gdbstub_bkpt(FMT, ...) ({ 0; })
180#endif
181
182#endif /* !__ASSEMBLY__ */
183#endif /* _ASM_GDB_STUB_H */
diff --git a/arch/mn10300/include/asm/hardirq.h b/arch/mn10300/include/asm/hardirq.h
new file mode 100644
index 000000000000..54d950117674
--- /dev/null
+++ b/arch/mn10300/include/asm/hardirq.h
@@ -0,0 +1,48 @@
1/* MN10300 Hardware IRQ statistics and management
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Modified by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_HARDIRQ_H
13#define _ASM_HARDIRQ_H
14
15#include <linux/threads.h>
16#include <linux/irq.h>
17#include <asm/exceptions.h>
18
19/* assembly code in softirq.h is sensitive to the offsets of these fields */
20typedef struct {
21 unsigned int __softirq_pending;
22 unsigned long idle_timestamp;
23 unsigned int __nmi_count; /* arch dependent */
24 unsigned int __irq_count; /* arch dependent */
25} ____cacheline_aligned irq_cpustat_t;
26
27#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
28
29extern void ack_bad_irq(int irq);
30
31/*
32 * manipulate stubs in the MN10300 CPU Trap/Interrupt Vector table
33 * - these should jump to __common_exception in entry.S unless there's a good
34 * reason to do otherwise (see trap_preinit() in traps.c)
35 */
36typedef void (*intr_stub_fnx)(struct pt_regs *regs,
37 enum exception_code intcode);
38
39/*
40 * manipulate pointers in the Exception table (see entry.S)
41 * - these are indexed by decoding the lower 24 bits of the TBR register
42 * - note that the MN103E010 doesn't always trap through the correct vector,
43 * but does always set the TBR correctly
44 */
45extern asmlinkage void set_excp_vector(enum exception_code code,
46 intr_stub_fnx handler);
47
48#endif /* _ASM_HARDIRQ_H */
diff --git a/arch/mn10300/include/asm/highmem.h b/arch/mn10300/include/asm/highmem.h
new file mode 100644
index 000000000000..90f2abb04bfd
--- /dev/null
+++ b/arch/mn10300/include/asm/highmem.h
@@ -0,0 +1,116 @@
1/* MN10300 Virtual kernel memory mappings for high memory
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * - Derived from include/asm-i386/highmem.h
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_HIGHMEM_H
13#define _ASM_HIGHMEM_H
14
15#ifdef __KERNEL__
16
17#include <linux/init.h>
18#include <linux/interrupt.h>
19#include <linux/highmem.h>
20#include <asm/kmap_types.h>
21#include <asm/pgtable.h>
22
23/* undef for production */
24#undef HIGHMEM_DEBUG
25
26/* declarations for highmem.c */
27extern unsigned long highstart_pfn, highend_pfn;
28
29extern pte_t *kmap_pte;
30extern pgprot_t kmap_prot;
31extern pte_t *pkmap_page_table;
32
33extern void __init kmap_init(void);
34
35/*
36 * Right now we initialize only a single pte table. It can be extended
37 * easily, subsequent pte tables have to be allocated in one physical
38 * chunk of RAM.
39 */
40#define PKMAP_BASE 0xfe000000UL
41#define LAST_PKMAP 1024
42#define LAST_PKMAP_MASK (LAST_PKMAP - 1)
43#define PKMAP_NR(virt) ((virt - PKMAP_BASE) >> PAGE_SHIFT)
44#define PKMAP_ADDR(nr) (PKMAP_BASE + ((nr) << PAGE_SHIFT))
45
46extern unsigned long kmap_high(struct page *page);
47extern void kunmap_high(struct page *page);
48
49static inline unsigned long kmap(struct page *page)
50{
51 if (in_interrupt())
52 BUG();
53 if (page < highmem_start_page)
54 return page_address(page);
55 return kmap_high(page);
56}
57
58static inline void kunmap(struct page *page)
59{
60 if (in_interrupt())
61 BUG();
62 if (page < highmem_start_page)
63 return;
64 kunmap_high(page);
65}
66
67/*
68 * The use of kmap_atomic/kunmap_atomic is discouraged - kmap/kunmap
69 * gives a more generic (and caching) interface. But kmap_atomic can
70 * be used in IRQ contexts, so in some (very limited) cases we need
71 * it.
72 */
73static inline unsigned long kmap_atomic(struct page *page, enum km_type type)
74{
75 enum fixed_addresses idx;
76 unsigned long vaddr;
77
78 if (page < highmem_start_page)
79 return page_address(page);
80
81 debug_kmap_atomic(type);
82 idx = type + KM_TYPE_NR * smp_processor_id();
83 vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
84#if HIGHMEM_DEBUG
85 if (!pte_none(*(kmap_pte - idx)))
86 BUG();
87#endif
88 set_pte(kmap_pte - idx, mk_pte(page, kmap_prot));
89 __flush_tlb_one(vaddr);
90
91 return vaddr;
92}
93
94static inline void kunmap_atomic(unsigned long vaddr, enum km_type type)
95{
96#if HIGHMEM_DEBUG
97 enum fixed_addresses idx = type + KM_TYPE_NR * smp_processor_id();
98
99 if (vaddr < FIXADDR_START) /* FIXME */
100 return;
101
102 if (vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx))
103 BUG();
104
105 /*
106 * force other mappings to Oops if they'll try to access
107 * this pte without first remap it
108 */
109 pte_clear(kmap_pte - idx);
110 __flush_tlb_one(vaddr);
111#endif
112}
113
114#endif /* __KERNEL__ */
115
116#endif /* _ASM_HIGHMEM_H */
diff --git a/arch/mn10300/include/asm/hw_irq.h b/arch/mn10300/include/asm/hw_irq.h
new file mode 100644
index 000000000000..70619901098e
--- /dev/null
+++ b/arch/mn10300/include/asm/hw_irq.h
@@ -0,0 +1,14 @@
1/* MN10300 Hardware interrupt definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_HW_IRQ_H
12#define _ASM_HW_IRQ_H
13
14#endif /* _ASM_HW_IRQ_H */
diff --git a/arch/mn10300/include/asm/intctl-regs.h b/arch/mn10300/include/asm/intctl-regs.h
new file mode 100644
index 000000000000..ba544c796c5a
--- /dev/null
+++ b/arch/mn10300/include/asm/intctl-regs.h
@@ -0,0 +1,73 @@
1/* MN10300 On-board interrupt controller registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_INTCTL_REGS_H
12#define _ASM_INTCTL_REGS_H
13
14#include <asm/cpu-regs.h>
15
16#ifdef __KERNEL__
17
18/* interrupt controller registers */
19#define GxICR(X) __SYSREG(0xd4000000 + (X) * 4, u16) /* group irq ctrl regs */
20
21#define IAGR __SYSREG(0xd4000100, u16) /* intr acceptance group reg */
22#define IAGR_GN 0x00fc /* group number register
23 * (documentation _has_ to be wrong)
24 */
25
26#define EXTMD __SYSREG(0xd4000200, u16) /* external pin intr spec reg */
27#define GET_XIRQ_TRIGGER(X) ((EXTMD >> ((X) * 2)) & 3)
28
29#define SET_XIRQ_TRIGGER(X,Y) \
30do { \
31 u16 x = EXTMD; \
32 x &= ~(3 << ((X) * 2)); \
33 x |= ((Y) & 3) << ((X) * 2); \
34 EXTMD = x; \
35} while (0)
36
37#define XIRQ_TRIGGER_LOWLEVEL 0
38#define XIRQ_TRIGGER_HILEVEL 1
39#define XIRQ_TRIGGER_NEGEDGE 2
40#define XIRQ_TRIGGER_POSEDGE 3
41
42/* non-maskable interrupt control */
43#define NMIIRQ 0
44#define NMICR GxICR(NMIIRQ) /* NMI control register */
45#define NMICR_NMIF 0x0001 /* NMI pin interrupt flag */
46#define NMICR_WDIF 0x0002 /* watchdog timer overflow flag */
47#define NMICR_ABUSERR 0x0008 /* async bus error flag */
48
49/* maskable interrupt control */
50#define GxICR_DETECT 0x0001 /* interrupt detect flag */
51#define GxICR_REQUEST 0x0010 /* interrupt request flag */
52#define GxICR_ENABLE 0x0100 /* interrupt enable flag */
53#define GxICR_LEVEL 0x7000 /* interrupt priority level */
54#define GxICR_LEVEL_0 0x0000 /* - level 0 */
55#define GxICR_LEVEL_1 0x1000 /* - level 1 */
56#define GxICR_LEVEL_2 0x2000 /* - level 2 */
57#define GxICR_LEVEL_3 0x3000 /* - level 3 */
58#define GxICR_LEVEL_4 0x4000 /* - level 4 */
59#define GxICR_LEVEL_5 0x5000 /* - level 5 */
60#define GxICR_LEVEL_6 0x6000 /* - level 6 */
61#define GxICR_LEVEL_SHIFT 12
62
63#ifndef __ASSEMBLY__
64extern void set_intr_level(int irq, u16 level);
65extern void set_intr_postackable(int irq);
66#endif
67
68/* external interrupts */
69#define XIRQxICR(X) GxICR((X)) /* external interrupt control regs */
70
71#endif /* __KERNEL__ */
72
73#endif /* _ASM_INTCTL_REGS_H */
diff --git a/arch/mn10300/include/asm/io.h b/arch/mn10300/include/asm/io.h
new file mode 100644
index 000000000000..c1a4119e6497
--- /dev/null
+++ b/arch/mn10300/include/asm/io.h
@@ -0,0 +1,301 @@
1/* MN10300 I/O port emulation and memory-mapped I/O
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_IO_H
12#define _ASM_IO_H
13
14#include <asm/page.h> /* I/O is all done through memory accesses */
15#include <asm/cpu-regs.h>
16#include <asm/cacheflush.h>
17
18#define mmiowb() do {} while (0)
19
20/*****************************************************************************/
21/*
22 * readX/writeX() are used to access memory mapped devices. On some
23 * architectures the memory mapped IO stuff needs to be accessed
24 * differently. On the x86 architecture, we just read/write the
25 * memory location directly.
26 */
27static inline u8 readb(const volatile void __iomem *addr)
28{
29 return *(const volatile u8 *) addr;
30}
31
32static inline u16 readw(const volatile void __iomem *addr)
33{
34 return *(const volatile u16 *) addr;
35}
36
37static inline u32 readl(const volatile void __iomem *addr)
38{
39 return *(const volatile u32 *) addr;
40}
41
42#define __raw_readb readb
43#define __raw_readw readw
44#define __raw_readl readl
45
46#define readb_relaxed readb
47#define readw_relaxed readw
48#define readl_relaxed readl
49
50static inline void writeb(u8 b, volatile void __iomem *addr)
51{
52 *(volatile u8 *) addr = b;
53}
54
55static inline void writew(u16 b, volatile void __iomem *addr)
56{
57 *(volatile u16 *) addr = b;
58}
59
60static inline void writel(u32 b, volatile void __iomem *addr)
61{
62 *(volatile u32 *) addr = b;
63}
64
65#define __raw_writeb writeb
66#define __raw_writew writew
67#define __raw_writel writel
68
69/*****************************************************************************/
70/*
71 * traditional input/output functions
72 */
73static inline u8 inb_local(unsigned long addr)
74{
75 return readb((volatile void __iomem *) addr);
76}
77
78static inline void outb_local(u8 b, unsigned long addr)
79{
80 return writeb(b, (volatile void __iomem *) addr);
81}
82
83static inline u8 inb(unsigned long addr)
84{
85 return readb((volatile void __iomem *) addr);
86}
87
88static inline u16 inw(unsigned long addr)
89{
90 return readw((volatile void __iomem *) addr);
91}
92
93static inline u32 inl(unsigned long addr)
94{
95 return readl((volatile void __iomem *) addr);
96}
97
98static inline void outb(u8 b, unsigned long addr)
99{
100 return writeb(b, (volatile void __iomem *) addr);
101}
102
103static inline void outw(u16 b, unsigned long addr)
104{
105 return writew(b, (volatile void __iomem *) addr);
106}
107
108static inline void outl(u32 b, unsigned long addr)
109{
110 return writel(b, (volatile void __iomem *) addr);
111}
112
113#define inb_p(addr) inb(addr)
114#define inw_p(addr) inw(addr)
115#define inl_p(addr) inl(addr)
116#define outb_p(x, addr) outb((x), (addr))
117#define outw_p(x, addr) outw((x), (addr))
118#define outl_p(x, addr) outl((x), (addr))
119
120static inline void insb(unsigned long addr, void *buffer, int count)
121{
122 if (count) {
123 u8 *buf = buffer;
124 do {
125 u8 x = inb(addr);
126 *buf++ = x;
127 } while (--count);
128 }
129}
130
131static inline void insw(unsigned long addr, void *buffer, int count)
132{
133 if (count) {
134 u16 *buf = buffer;
135 do {
136 u16 x = inw(addr);
137 *buf++ = x;
138 } while (--count);
139 }
140}
141
142static inline void insl(unsigned long addr, void *buffer, int count)
143{
144 if (count) {
145 u32 *buf = buffer;
146 do {
147 u32 x = inl(addr);
148 *buf++ = x;
149 } while (--count);
150 }
151}
152
153static inline void outsb(unsigned long addr, const void *buffer, int count)
154{
155 if (count) {
156 const u8 *buf = buffer;
157 do {
158 outb(*buf++, addr);
159 } while (--count);
160 }
161}
162
163static inline void outsw(unsigned long addr, const void *buffer, int count)
164{
165 if (count) {
166 const u16 *buf = buffer;
167 do {
168 outw(*buf++, addr);
169 } while (--count);
170 }
171}
172
173extern void __outsl(unsigned long addr, const void *buffer, int count);
174static inline void outsl(unsigned long addr, const void *buffer, int count)
175{
176 if ((unsigned long) buffer & 0x3)
177 return __outsl(addr, buffer, count);
178
179 if (count) {
180 const u32 *buf = buffer;
181 do {
182 outl(*buf++, addr);
183 } while (--count);
184 }
185}
186
187#define ioread8(addr) readb(addr)
188#define ioread16(addr) readw(addr)
189#define ioread32(addr) readl(addr)
190
191#define iowrite8(v, addr) writeb((v), (addr))
192#define iowrite16(v, addr) writew((v), (addr))
193#define iowrite32(v, addr) writel((v), (addr))
194
195#define ioread8_rep(p, dst, count) \
196 insb((unsigned long) (p), (dst), (count))
197#define ioread16_rep(p, dst, count) \
198 insw((unsigned long) (p), (dst), (count))
199#define ioread32_rep(p, dst, count) \
200 insl((unsigned long) (p), (dst), (count))
201
202#define iowrite8_rep(p, src, count) \
203 outsb((unsigned long) (p), (src), (count))
204#define iowrite16_rep(p, src, count) \
205 outsw((unsigned long) (p), (src), (count))
206#define iowrite32_rep(p, src, count) \
207 outsl((unsigned long) (p), (src), (count))
208
209
210#define IO_SPACE_LIMIT 0xffffffff
211
212#ifdef __KERNEL__
213
214#include <linux/vmalloc.h>
215#define __io_virt(x) ((void *) (x))
216
217/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
218struct pci_dev;
219extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
220static inline void pci_iounmap(struct pci_dev *dev, void __iomem *p)
221{
222}
223
224/*
225 * Change virtual addresses to physical addresses and vv.
226 * These are pretty trivial
227 */
228static inline unsigned long virt_to_phys(volatile void *address)
229{
230 return __pa(address);
231}
232
233static inline void *phys_to_virt(unsigned long address)
234{
235 return __va(address);
236}
237
238/*
239 * Change "struct page" to physical address.
240 */
241static inline void *__ioremap(unsigned long offset, unsigned long size,
242 unsigned long flags)
243{
244 return (void *) offset;
245}
246
247static inline void *ioremap(unsigned long offset, unsigned long size)
248{
249 return (void *) offset;
250}
251
252/*
253 * This one maps high address device memory and turns off caching for that
254 * area. it's useful if some control registers are in such an area and write
255 * combining or read caching is not desirable:
256 */
257static inline void *ioremap_nocache(unsigned long offset, unsigned long size)
258{
259 return (void *) (offset | 0x20000000);
260}
261
262#define ioremap_wc ioremap_nocache
263
264static inline void iounmap(void *addr)
265{
266}
267
268static inline void __iomem *ioport_map(unsigned long port, unsigned int nr)
269{
270 return (void __iomem *) port;
271}
272
273static inline void ioport_unmap(void __iomem *p)
274{
275}
276
277#define xlate_dev_kmem_ptr(p) ((void *) (p))
278#define xlate_dev_mem_ptr(p) ((void *) (p))
279
280/*
281 * PCI bus iomem addresses must be in the region 0x80000000-0x9fffffff
282 */
283static inline unsigned long virt_to_bus(volatile void *address)
284{
285 return ((unsigned long) address) & ~0x20000000;
286}
287
288static inline void *bus_to_virt(unsigned long address)
289{
290 return (void *) address;
291}
292
293#define page_to_bus page_to_phys
294
295#define memset_io(a, b, c) memset(__io_virt(a), (b), (c))
296#define memcpy_fromio(a, b, c) memcpy((a), __io_virt(b), (c))
297#define memcpy_toio(a, b, c) memcpy(__io_virt(a), (b), (c))
298
299#endif /* __KERNEL__ */
300
301#endif /* _ASM_IO_H */
diff --git a/arch/mn10300/include/asm/ioctl.h b/arch/mn10300/include/asm/ioctl.h
new file mode 100644
index 000000000000..b279fe06dfe5
--- /dev/null
+++ b/arch/mn10300/include/asm/ioctl.h
@@ -0,0 +1 @@
#include <asm-generic/ioctl.h>
diff --git a/arch/mn10300/include/asm/ioctls.h b/arch/mn10300/include/asm/ioctls.h
new file mode 100644
index 000000000000..dcbfb452974f
--- /dev/null
+++ b/arch/mn10300/include/asm/ioctls.h
@@ -0,0 +1,88 @@
1#ifndef _ASM_IOCTLS_H
2#define _ASM_IOCTLS_H
3
4#include <asm/ioctl.h>
5
6/* 0x54 is just a magic number to make these relatively unique ('T') */
7
8#define TCGETS 0x5401
9#define TCSETS 0x5402
10#define TCSETSW 0x5403
11#define TCSETSF 0x5404
12#define TCGETA 0x5405
13#define TCSETA 0x5406
14#define TCSETAW 0x5407
15#define TCSETAF 0x5408
16#define TCSBRK 0x5409
17#define TCXONC 0x540A
18#define TCFLSH 0x540B
19#define TIOCEXCL 0x540C
20#define TIOCNXCL 0x540D
21#define TIOCSCTTY 0x540E
22#define TIOCGPGRP 0x540F
23#define TIOCSPGRP 0x5410
24#define TIOCOUTQ 0x5411
25#define TIOCSTI 0x5412
26#define TIOCGWINSZ 0x5413
27#define TIOCSWINSZ 0x5414
28#define TIOCMGET 0x5415
29#define TIOCMBIS 0x5416
30#define TIOCMBIC 0x5417
31#define TIOCMSET 0x5418
32#define TIOCGSOFTCAR 0x5419
33#define TIOCSSOFTCAR 0x541A
34#define FIONREAD 0x541B
35#define TIOCINQ FIONREAD
36#define TIOCLINUX 0x541C
37#define TIOCCONS 0x541D
38#define TIOCGSERIAL 0x541E
39#define TIOCSSERIAL 0x541F
40#define TIOCPKT 0x5420
41#define FIONBIO 0x5421
42#define TIOCNOTTY 0x5422
43#define TIOCSETD 0x5423
44#define TIOCGETD 0x5424
45#define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */
46/* #define TIOCTTYGSTRUCT 0x5426 - Former debugging-only ioctl */
47#define TIOCSBRK 0x5427 /* BSD compatibility */
48#define TIOCCBRK 0x5428 /* BSD compatibility */
49#define TIOCGSID 0x5429 /* Return the session ID of FD */
50#define TCGETS2 _IOR('T', 0x2A, struct termios2)
51#define TCSETS2 _IOW('T', 0x2B, struct termios2)
52#define TCSETSW2 _IOW('T', 0x2C, struct termios2)
53#define TCSETSF2 _IOW('T', 0x2D, struct termios2)
54#define TIOCGPTN _IOR('T', 0x30, unsigned int) /* Get Pty Number
55 * (of pty-mux device) */
56#define TIOCSPTLCK _IOW('T', 0x31, int) /* Lock/unlock Pty */
57
58#define FIONCLEX 0x5450
59#define FIOCLEX 0x5451
60#define FIOASYNC 0x5452
61#define TIOCSERCONFIG 0x5453
62#define TIOCSERGWILD 0x5454
63#define TIOCSERSWILD 0x5455
64#define TIOCGLCKTRMIOS 0x5456
65#define TIOCSLCKTRMIOS 0x5457
66#define TIOCSERGSTRUCT 0x5458 /* For debugging only */
67#define TIOCSERGETLSR 0x5459 /* Get line status register */
68#define TIOCSERGETMULTI 0x545A /* Get multiport config */
69#define TIOCSERSETMULTI 0x545B /* Set multiport config */
70
71#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */
72#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */
73#define TIOCGHAYESESP 0x545E /* Get Hayes ESP configuration */
74#define TIOCSHAYESESP 0x545F /* Set Hayes ESP configuration */
75#define FIOQSIZE 0x5460
76
77/* Used for packet mode */
78#define TIOCPKT_DATA 0
79#define TIOCPKT_FLUSHREAD 1
80#define TIOCPKT_FLUSHWRITE 2
81#define TIOCPKT_STOP 4
82#define TIOCPKT_START 8
83#define TIOCPKT_NOSTOP 16
84#define TIOCPKT_DOSTOP 32
85
86#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */
87
88#endif /* _ASM_IOCTLS_H */
diff --git a/arch/mn10300/include/asm/ipc.h b/arch/mn10300/include/asm/ipc.h
new file mode 100644
index 000000000000..a46e3d9c2a3f
--- /dev/null
+++ b/arch/mn10300/include/asm/ipc.h
@@ -0,0 +1 @@
#include <asm-generic/ipc.h>
diff --git a/arch/mn10300/include/asm/ipcbuf.h b/arch/mn10300/include/asm/ipcbuf.h
new file mode 100644
index 000000000000..f6f63d448272
--- /dev/null
+++ b/arch/mn10300/include/asm/ipcbuf.h
@@ -0,0 +1,29 @@
1#ifndef _ASM_IPCBUF_H
2#define _ASM_IPCBUF_H
3
4/*
5 * The ipc64_perm structure for MN10300 architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 32-bit mode_t and seq
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct ipc64_perm
15{
16 __kernel_key_t key;
17 __kernel_uid32_t uid;
18 __kernel_gid32_t gid;
19 __kernel_uid32_t cuid;
20 __kernel_gid32_t cgid;
21 __kernel_mode_t mode;
22 unsigned short __pad1;
23 unsigned short seq;
24 unsigned short __pad2;
25 unsigned long __unused1;
26 unsigned long __unused2;
27};
28
29#endif /* _ASM_IPCBUF_H */
diff --git a/arch/mn10300/include/asm/irq.h b/arch/mn10300/include/asm/irq.h
new file mode 100644
index 000000000000..25c045d16d1c
--- /dev/null
+++ b/arch/mn10300/include/asm/irq.h
@@ -0,0 +1,32 @@
1/* MN10300 Hardware interrupt definitions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Modified by David Howells (dhowells@redhat.com)
6 * - Derived from include/asm-i386/irq.h:
7 * - (C) 1992, 1993 Linus Torvalds, (C) 1997 Ingo Molnar
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public Licence
11 * as published by the Free Software Foundation; either version
12 * 2 of the Licence, or (at your option) any later version.
13 */
14#ifndef _ASM_IRQ_H
15#define _ASM_IRQ_H
16
17#include <asm/intctl-regs.h>
18#include <asm/reset-regs.h>
19#include <proc/irq.h>
20
21/* this number is used when no interrupt has been assigned */
22#define NO_IRQ INT_MAX
23
24/* hardware irq numbers */
25#define NR_IRQS GxICR_NUM_IRQS
26
27/* external hardware irq numbers */
28#define NR_XIRQS GxICR_NUM_XIRQS
29
30#define irq_canonicalize(IRQ) (IRQ)
31
32#endif /* _ASM_IRQ_H */
diff --git a/arch/mn10300/include/asm/irq_regs.h b/arch/mn10300/include/asm/irq_regs.h
new file mode 100644
index 000000000000..a848cd232eb4
--- /dev/null
+++ b/arch/mn10300/include/asm/irq_regs.h
@@ -0,0 +1,24 @@
1/* MN10300 IRQ registers pointer definition
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_IRQ_REGS_H
12#define _ASM_IRQ_REGS_H
13
14/*
15 * Per-cpu current frame pointer - the location of the last exception frame on
16 * the stack
17 */
18#define ARCH_HAS_OWN_IRQ_REGS
19
20#ifndef __ASSEMBLY__
21#define get_irq_regs() (__frame)
22#endif
23
24#endif /* _ASM_IRQ_REGS_H */
diff --git a/arch/mn10300/include/asm/kdebug.h b/arch/mn10300/include/asm/kdebug.h
new file mode 100644
index 000000000000..0f47e112190c
--- /dev/null
+++ b/arch/mn10300/include/asm/kdebug.h
@@ -0,0 +1,22 @@
1/* MN10300 In-kernel death knells
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_KDEBUG_H
13#define _ASM_KDEBUG_H
14
15/* Grossly misnamed. */
16enum die_val {
17 DIE_OOPS = 1,
18 DIE_BREAKPOINT,
19 DIE_GPF,
20};
21
22#endif /* _ASM_KDEBUG_H */
diff --git a/arch/mn10300/include/asm/kmap_types.h b/arch/mn10300/include/asm/kmap_types.h
new file mode 100644
index 000000000000..3398f9f35603
--- /dev/null
+++ b/arch/mn10300/include/asm/kmap_types.h
@@ -0,0 +1,31 @@
1/* MN10300 kmap_atomic() slot IDs
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_KMAP_TYPES_H
12#define _ASM_KMAP_TYPES_H
13
14enum km_type {
15 KM_BOUNCE_READ,
16 KM_SKB_SUNRPC_DATA,
17 KM_SKB_DATA_SOFTIRQ,
18 KM_USER0,
19 KM_USER1,
20 KM_BIO_SRC_IRQ,
21 KM_BIO_DST_IRQ,
22 KM_PTE0,
23 KM_PTE1,
24 KM_IRQ0,
25 KM_IRQ1,
26 KM_SOFTIRQ0,
27 KM_SOFTIRQ1,
28 KM_TYPE_NR
29};
30
31#endif /* _ASM_KMAP_TYPES_H */
diff --git a/arch/mn10300/include/asm/kprobes.h b/arch/mn10300/include/asm/kprobes.h
new file mode 100644
index 000000000000..c800b590183a
--- /dev/null
+++ b/arch/mn10300/include/asm/kprobes.h
@@ -0,0 +1,50 @@
1/* MN10300 Kernel Probes support
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by Mark Salter (msalter@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public Licence as published by
8 * the Free Software Foundation; either version 2 of the Licence, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public Licence for more details.
15 *
16 * You should have received a copy of the GNU General Public Licence
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 *
20 */
21#ifndef _ASM_KPROBES_H
22#define _ASM_KPROBES_H
23
24#include <linux/types.h>
25#include <linux/ptrace.h>
26
27struct kprobe;
28
29typedef unsigned char kprobe_opcode_t;
30#define BREAKPOINT_INSTRUCTION 0xff
31#define MAX_INSN_SIZE 8
32#define MAX_STACK_SIZE 128
33
34/* Architecture specific copy of original instruction */
35struct arch_specific_insn {
36 /* copy of original instruction
37 */
38 kprobe_opcode_t insn[MAX_INSN_SIZE];
39};
40
41extern const int kretprobe_blacklist_size;
42
43extern int kprobe_exceptions_notify(struct notifier_block *self,
44 unsigned long val, void *data);
45
46#define flush_insn_slot(p) do {} while (0)
47
48extern void arch_remove_kprobe(struct kprobe *p);
49
50#endif /* _ASM_KPROBES_H */
diff --git a/arch/mn10300/include/asm/linkage.h b/arch/mn10300/include/asm/linkage.h
new file mode 100644
index 000000000000..dda3002a5dfa
--- /dev/null
+++ b/arch/mn10300/include/asm/linkage.h
@@ -0,0 +1,20 @@
1/* MN10300 Linkage and calling-convention overrides
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_LINKAGE_H
12#define _ASM_LINKAGE_H
13
14/* don't override anything */
15#define asmlinkage
16
17#define __ALIGN .align 4,0xcb
18#define __ALIGN_STR ".align 4,0xcb"
19
20#endif
diff --git a/arch/mn10300/include/asm/local.h b/arch/mn10300/include/asm/local.h
new file mode 100644
index 000000000000..c11c530f74d0
--- /dev/null
+++ b/arch/mn10300/include/asm/local.h
@@ -0,0 +1 @@
#include <asm-generic/local.h>
diff --git a/arch/mn10300/include/asm/mc146818rtc.h b/arch/mn10300/include/asm/mc146818rtc.h
new file mode 100644
index 000000000000..df6bc6e0e8c6
--- /dev/null
+++ b/arch/mn10300/include/asm/mc146818rtc.h
@@ -0,0 +1 @@
#include <asm/rtc-regs.h>
diff --git a/arch/mn10300/include/asm/mman.h b/arch/mn10300/include/asm/mman.h
new file mode 100644
index 000000000000..b7986b65addf
--- /dev/null
+++ b/arch/mn10300/include/asm/mman.h
@@ -0,0 +1,28 @@
1/* MN10300 Constants for mmap and co.
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * - Derived from asm-x86/mman.h
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_MMAN_H
13#define _ASM_MMAN_H
14
15#include <asm-generic/mman.h>
16
17#define MAP_GROWSDOWN 0x0100 /* stack-like segment */
18#define MAP_DENYWRITE 0x0800 /* ETXTBSY */
19#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */
20#define MAP_LOCKED 0x2000 /* pages are locked */
21#define MAP_NORESERVE 0x4000 /* don't check for reservations */
22#define MAP_POPULATE 0x8000 /* populate (prefault) pagetables */
23#define MAP_NONBLOCK 0x10000 /* do not block on IO */
24
25#define MCL_CURRENT 1 /* lock all current mappings */
26#define MCL_FUTURE 2 /* lock all future mappings */
27
28#endif /* _ASM_MMAN_H */
diff --git a/arch/mn10300/include/asm/mmu.h b/arch/mn10300/include/asm/mmu.h
new file mode 100644
index 000000000000..2d2d097e7309
--- /dev/null
+++ b/arch/mn10300/include/asm/mmu.h
@@ -0,0 +1,19 @@
1/* MN10300 Memory management context
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * - Derived from include/asm-frv/mmu.h
6 */
7
8#ifndef _ASM_MMU_H
9#define _ASM_MMU_H
10
11/*
12 * MMU context
13 */
14typedef struct {
15 unsigned long tlbpid[NR_CPUS]; /* TLB PID for this process on
16 * each CPU */
17} mm_context_t;
18
19#endif /* _ASM_MMU_H */
diff --git a/arch/mn10300/include/asm/mmu_context.h b/arch/mn10300/include/asm/mmu_context.h
new file mode 100644
index 000000000000..a9e2e34f69b0
--- /dev/null
+++ b/arch/mn10300/include/asm/mmu_context.h
@@ -0,0 +1,138 @@
1/* MN10300 MMU context management
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Modified by David Howells (dhowells@redhat.com)
5 * - Derived from include/asm-m32r/mmu_context.h
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 *
12 *
13 * This implements an algorithm to provide TLB PID mappings to provide
14 * selective access to the TLB for processes, thus reducing the number of TLB
15 * flushes required.
16 *
17 * Note, however, that the M32R algorithm is technically broken as it does not
18 * handle version wrap-around, and could, theoretically, have a problem with a
19 * very long lived program that sleeps long enough for the version number to
20 * wrap all the way around so that its TLB mappings appear valid once again.
21 */
22#ifndef _ASM_MMU_CONTEXT_H
23#define _ASM_MMU_CONTEXT_H
24
25#include <asm/atomic.h>
26#include <asm/pgalloc.h>
27#include <asm/tlbflush.h>
28#include <asm-generic/mm_hooks.h>
29
30#define MMU_CONTEXT_TLBPID_MASK 0x000000ffUL
31#define MMU_CONTEXT_VERSION_MASK 0xffffff00UL
32#define MMU_CONTEXT_FIRST_VERSION 0x00000100UL
33#define MMU_NO_CONTEXT 0x00000000UL
34
35extern unsigned long mmu_context_cache[NR_CPUS];
36#define mm_context(mm) (mm->context.tlbpid[smp_processor_id()])
37
38#define enter_lazy_tlb(mm, tsk) do {} while (0)
39
40#ifdef CONFIG_SMP
41#define cpu_ran_vm(cpu, task) \
42 cpu_set((cpu), (task)->cpu_vm_mask)
43#define cpu_maybe_ran_vm(cpu, task) \
44 cpu_test_and_set((cpu), (task)->cpu_vm_mask)
45#else
46#define cpu_ran_vm(cpu, task) do {} while (0)
47#define cpu_maybe_ran_vm(cpu, task) true
48#endif /* CONFIG_SMP */
49
50/*
51 * allocate an MMU context
52 */
53static inline unsigned long allocate_mmu_context(struct mm_struct *mm)
54{
55 unsigned long *pmc = &mmu_context_cache[smp_processor_id()];
56 unsigned long mc = ++(*pmc);
57
58 if (!(mc & MMU_CONTEXT_TLBPID_MASK)) {
59 /* we exhausted the TLB PIDs of this version on this CPU, so we
60 * flush this CPU's TLB in its entirety and start new cycle */
61 flush_tlb_all();
62
63 /* fix the TLB version if needed (we avoid version #0 so as to
64 * distingush MMU_NO_CONTEXT) */
65 if (!mc)
66 *pmc = mc = MMU_CONTEXT_FIRST_VERSION;
67 }
68 mm_context(mm) = mc;
69 return mc;
70}
71
72/*
73 * get an MMU context if one is needed
74 */
75static inline unsigned long get_mmu_context(struct mm_struct *mm)
76{
77 unsigned long mc = MMU_NO_CONTEXT, cache;
78
79 if (mm) {
80 cache = mmu_context_cache[smp_processor_id()];
81 mc = mm_context(mm);
82
83 /* if we have an old version of the context, replace it */
84 if ((mc ^ cache) & MMU_CONTEXT_VERSION_MASK)
85 mc = allocate_mmu_context(mm);
86 }
87 return mc;
88}
89
90/*
91 * initialise the context related info for a new mm_struct instance
92 */
93static inline int init_new_context(struct task_struct *tsk,
94 struct mm_struct *mm)
95{
96 int num_cpus = NR_CPUS, i;
97
98 for (i = 0; i < num_cpus; i++)
99 mm->context.tlbpid[i] = MMU_NO_CONTEXT;
100 return 0;
101}
102
103/*
104 * destroy context related info for an mm_struct that is about to be put to
105 * rest
106 */
107#define destroy_context(mm) do { } while (0)
108
109/*
110 * after we have set current->mm to a new value, this activates the context for
111 * the new mm so we see the new mappings.
112 */
113static inline void activate_context(struct mm_struct *mm, int cpu)
114{
115 PIDR = get_mmu_context(mm) & MMU_CONTEXT_TLBPID_MASK;
116}
117
118/*
119 * change between virtual memory sets
120 */
121static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
122 struct task_struct *tsk)
123{
124 int cpu = smp_processor_id();
125
126 if (prev != next) {
127 cpu_ran_vm(cpu, next);
128 activate_context(next, cpu);
129 PTBR = (unsigned long) next->pgd;
130 } else if (!cpu_maybe_ran_vm(cpu, next)) {
131 activate_context(next, cpu);
132 }
133}
134
135#define deactivate_mm(tsk, mm) do {} while (0)
136#define activate_mm(prev, next) switch_mm((prev), (next), NULL)
137
138#endif /* _ASM_MMU_CONTEXT_H */
diff --git a/arch/mn10300/include/asm/module.h b/arch/mn10300/include/asm/module.h
new file mode 100644
index 000000000000..5d7057d01494
--- /dev/null
+++ b/arch/mn10300/include/asm/module.h
@@ -0,0 +1,27 @@
1/* MN10300 Arch-specific module definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by Mark Salter (msalter@redhat.com)
5 * Derived from include/asm-i386/module.h
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_MODULE_H
13#define _ASM_MODULE_H
14
15struct mod_arch_specific {
16};
17
18#define Elf_Shdr Elf32_Shdr
19#define Elf_Sym Elf32_Sym
20#define Elf_Ehdr Elf32_Ehdr
21
22/*
23 * Include the MN10300 architecture version.
24 */
25#define MODULE_ARCH_VERMAGIC __stringify(PROCESSOR_MODEL_NAME) " "
26
27#endif /* _ASM_MODULE_H */
diff --git a/arch/mn10300/include/asm/msgbuf.h b/arch/mn10300/include/asm/msgbuf.h
new file mode 100644
index 000000000000..8b602450cc4a
--- /dev/null
+++ b/arch/mn10300/include/asm/msgbuf.h
@@ -0,0 +1,31 @@
1#ifndef _ASM_MSGBUF_H
2#define _ASM_MSGBUF_H
3
4/*
5 * The msqid64_ds structure for MN10300 architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct msqid64_ds {
15 struct ipc64_perm msg_perm;
16 __kernel_time_t msg_stime; /* last msgsnd time */
17 unsigned long __unused1;
18 __kernel_time_t msg_rtime; /* last msgrcv time */
19 unsigned long __unused2;
20 __kernel_time_t msg_ctime; /* last change time */
21 unsigned long __unused3;
22 unsigned long msg_cbytes; /* current number of bytes on queue */
23 unsigned long msg_qnum; /* number of messages in queue */
24 unsigned long msg_qbytes; /* max number of bytes on queue */
25 __kernel_pid_t msg_lspid; /* pid of last msgsnd */
26 __kernel_pid_t msg_lrpid; /* last receive pid */
27 unsigned long __unused4;
28 unsigned long __unused5;
29};
30
31#endif /* _ASM_MSGBUF_H */
diff --git a/arch/mn10300/include/asm/mutex.h b/arch/mn10300/include/asm/mutex.h
new file mode 100644
index 000000000000..84f5490c6fb4
--- /dev/null
+++ b/arch/mn10300/include/asm/mutex.h
@@ -0,0 +1,16 @@
1/* MN10300 Mutex fastpath
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 *
11 *
12 * TODO: implement optimized primitives instead, or leave the generic
13 * implementation in place, or pick the atomic_xchg() based generic
14 * implementation. (see asm-generic/mutex-xchg.h for details)
15 */
16#include <asm-generic/mutex-null.h>
diff --git a/arch/mn10300/include/asm/nmi.h b/arch/mn10300/include/asm/nmi.h
new file mode 100644
index 000000000000..f3671cbbc117
--- /dev/null
+++ b/arch/mn10300/include/asm/nmi.h
@@ -0,0 +1,14 @@
1/* MN10300 NMI handling
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_NMI_H
12#define _ASM_NMI_H
13
14#endif /* _ASM_NMI_H */
diff --git a/arch/mn10300/include/asm/page.h b/arch/mn10300/include/asm/page.h
new file mode 100644
index 000000000000..8288e124165b
--- /dev/null
+++ b/arch/mn10300/include/asm/page.h
@@ -0,0 +1,128 @@
1/* MN10300 Page table definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_PAGE_H
12#define _ASM_PAGE_H
13
14/* PAGE_SHIFT determines the page size */
15#define PAGE_SHIFT 12
16
17#ifndef __ASSEMBLY__
18#define PAGE_SIZE (1UL << PAGE_SHIFT)
19#define PAGE_MASK (~(PAGE_SIZE - 1))
20#else
21#define PAGE_SIZE +(1 << PAGE_SHIFT) /* unary plus marks an
22 * immediate val not an addr */
23#define PAGE_MASK +(~(PAGE_SIZE - 1))
24#endif
25
26#ifdef __KERNEL__
27#ifndef __ASSEMBLY__
28
29#define clear_page(page) memset((void *)(page), 0, PAGE_SIZE)
30#define copy_page(to, from) memcpy((void *)(to), (void *)(from), PAGE_SIZE)
31
32#define clear_user_page(addr, vaddr, page) clear_page(addr)
33#define copy_user_page(vto, vfrom, vaddr, to) copy_page(vto, vfrom)
34
35/*
36 * These are used to make use of C type-checking..
37 */
38typedef struct { unsigned long pte; } pte_t;
39typedef struct { unsigned long pgd; } pgd_t;
40typedef struct { unsigned long pgprot; } pgprot_t;
41typedef struct page *pgtable_t;
42
43#define PTE_MASK PAGE_MASK
44#define HPAGE_SHIFT 22
45
46#ifdef CONFIG_HUGETLB_PAGE
47#define HPAGE_SIZE ((1UL) << HPAGE_SHIFT)
48#define HPAGE_MASK (~(HPAGE_SIZE - 1))
49#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
50#endif
51
52#define pte_val(x) ((x).pte)
53#define pgd_val(x) ((x).pgd)
54#define pgprot_val(x) ((x).pgprot)
55
56#define __pte(x) ((pte_t) { (x) })
57#define __pgd(x) ((pgd_t) { (x) })
58#define __pgprot(x) ((pgprot_t) { (x) })
59
60#include <asm-generic/pgtable-nopmd.h>
61
62#endif /* !__ASSEMBLY__ */
63
64/*
65 * This handles the memory map.. We could make this a config
66 * option, but too many people screw it up, and too few need
67 * it.
68 *
69 * A __PAGE_OFFSET of 0xC0000000 means that the kernel has
70 * a virtual address space of one gigabyte, which limits the
71 * amount of physical memory you can use to about 950MB.
72 */
73
74#ifndef __ASSEMBLY__
75
76/* Pure 2^n version of get_order */
77static inline int get_order(unsigned long size) __attribute__((const));
78static inline int get_order(unsigned long size)
79{
80 int order;
81
82 size = (size - 1) >> (PAGE_SHIFT - 1);
83 order = -1;
84 do {
85 size >>= 1;
86 order++;
87 } while (size);
88 return order;
89}
90
91#endif /* __ASSEMBLY__ */
92
93#include <asm/page_offset.h>
94
95#define __PAGE_OFFSET (PAGE_OFFSET_RAW)
96#define PAGE_OFFSET ((unsigned long) __PAGE_OFFSET)
97
98/*
99 * main RAM and kernel working space are coincident at 0x90000000, but to make
100 * life more interesting, there's also an uncached virtual shadow at 0xb0000000
101 * - these mappings are fixed in the MMU
102 */
103#define __pfn_disp (CONFIG_KERNEL_RAM_BASE_ADDRESS >> PAGE_SHIFT)
104
105#define __pa(x) ((unsigned long)(x))
106#define __va(x) ((void *)(unsigned long)(x))
107#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
108#define pfn_to_page(pfn) (mem_map + ((pfn) - __pfn_disp))
109#define page_to_pfn(page) ((unsigned long)((page) - mem_map) + __pfn_disp)
110
111#define pfn_valid(pfn) \
112({ \
113 unsigned long __pfn = (pfn) - __pfn_disp; \
114 __pfn < max_mapnr; \
115})
116
117#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
118#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
119#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
120
121#define VM_DATA_DEFAULT_FLAGS \
122 (VM_READ | VM_WRITE | \
123 ((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0) | \
124 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
125
126#endif /* __KERNEL__ */
127
128#endif /* _ASM_PAGE_H */
diff --git a/arch/mn10300/include/asm/page_offset.h b/arch/mn10300/include/asm/page_offset.h
new file mode 100644
index 000000000000..8eb5b16ad86b
--- /dev/null
+++ b/arch/mn10300/include/asm/page_offset.h
@@ -0,0 +1,11 @@
1/* MN10300 Kernel base address
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 */
6#ifndef _ASM_PAGE_OFFSET_H
7#define _ASM_PAGE_OFFSET_H
8
9#define PAGE_OFFSET_RAW CONFIG_KERNEL_RAM_BASE_ADDRESS
10
11#endif
diff --git a/arch/mn10300/include/asm/param.h b/arch/mn10300/include/asm/param.h
new file mode 100644
index 000000000000..789b1df41fcb
--- /dev/null
+++ b/arch/mn10300/include/asm/param.h
@@ -0,0 +1,34 @@
1/* MN10300 Kernel parameters
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_PARAM_H
12#define _ASM_PARAM_H
13
14#ifdef __KERNEL__
15#define HZ CONFIG_HZ /* Internal kernel timer frequency */
16#define USER_HZ 100 /* .. some user interfaces are in
17 * "ticks" */
18#define CLOCKS_PER_SEC (USER_HZ) /* like times() */
19#endif
20
21#ifndef HZ
22#define HZ 100
23#endif
24
25#define EXEC_PAGESIZE 4096
26
27#ifndef NOGROUP
28#define NOGROUP (-1)
29#endif
30
31#define MAXHOSTNAMELEN 64 /* max length of hostname */
32#define COMMAND_LINE_SIZE 256
33
34#endif /* _ASM_PARAM_H */
diff --git a/arch/mn10300/include/asm/pci.h b/arch/mn10300/include/asm/pci.h
new file mode 100644
index 000000000000..0517b45313d8
--- /dev/null
+++ b/arch/mn10300/include/asm/pci.h
@@ -0,0 +1,129 @@
1/* MN10300 PCI definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_PCI_H
12#define _ASM_PCI_H
13
14#ifdef __KERNEL__
15#include <linux/mm.h> /* for struct page */
16
17#if 0
18#define __pcbdebug(FMT, ADDR, ...) \
19 printk(KERN_DEBUG "PCIBRIDGE[%08x]: "FMT"\n", \
20 (u32)(ADDR), ##__VA_ARGS__)
21
22#define __pcidebug(FMT, BUS, DEVFN, WHERE,...) \
23do { \
24 printk(KERN_DEBUG "PCI[%02x:%02x.%x + %02x]: "FMT"\n", \
25 (BUS)->number, \
26 PCI_SLOT(DEVFN), \
27 PCI_FUNC(DEVFN), \
28 (u32)(WHERE), ##__VA_ARGS__); \
29} while (0)
30
31#else
32#define __pcbdebug(FMT, ADDR, ...) do {} while (0)
33#define __pcidebug(FMT, BUS, DEVFN, WHERE, ...) do {} while (0)
34#endif
35
36/* Can be used to override the logic in pci_scan_bus for skipping
37 * already-configured bus numbers - to be used for buggy BIOSes or
38 * architectures with incomplete PCI setup by the loader */
39
40#ifdef CONFIG_PCI
41#define pcibios_assign_all_busses() 1
42extern void unit_pci_init(void);
43#else
44#define pcibios_assign_all_busses() 0
45#endif
46
47extern unsigned long pci_mem_start;
48#define PCIBIOS_MIN_IO 0xBE000004
49#define PCIBIOS_MIN_MEM 0xB8000000
50
51void pcibios_set_master(struct pci_dev *dev);
52void pcibios_penalize_isa_irq(int irq);
53
54/* Dynamic DMA mapping stuff.
55 * i386 has everything mapped statically.
56 */
57
58#include <linux/types.h>
59#include <linux/slab.h>
60#include <asm/scatterlist.h>
61#include <linux/string.h>
62#include <linux/mm.h>
63#include <asm/io.h>
64
65struct pci_dev;
66
67/* The PCI address space does equal the physical memory
68 * address space. The networking and block device layers use
69 * this boolean for bounce buffer decisions.
70 */
71#define PCI_DMA_BUS_IS_PHYS (1)
72
73
74/* This is always fine. */
75#define pci_dac_dma_supported(pci_dev, mask) (0)
76
77/* Return the index of the PCI controller for device. */
78static inline int pci_controller_num(struct pci_dev *dev)
79{
80 return 0;
81}
82
83#define HAVE_PCI_MMAP
84extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
85 enum pci_mmap_state mmap_state,
86 int write_combine);
87
88#endif /* __KERNEL__ */
89
90/* implement the pci_ DMA API in terms of the generic device dma_ one */
91#include <asm-generic/pci-dma-compat.h>
92
93/**
94 * pcibios_resource_to_bus - convert resource to PCI bus address
95 * @dev: device which owns this resource
96 * @region: converted bus-centric region (start,end)
97 * @res: resource to convert
98 *
99 * Convert a resource to a PCI device bus address or bus window.
100 */
101extern void pcibios_resource_to_bus(struct pci_dev *dev,
102 struct pci_bus_region *region,
103 struct resource *res);
104
105extern void pcibios_bus_to_resource(struct pci_dev *dev,
106 struct resource *res,
107 struct pci_bus_region *region);
108
109static inline struct resource *
110pcibios_select_root(struct pci_dev *pdev, struct resource *res)
111{
112 struct resource *root = NULL;
113
114 if (res->flags & IORESOURCE_IO)
115 root = &ioport_resource;
116 if (res->flags & IORESOURCE_MEM)
117 root = &iomem_resource;
118
119 return root;
120}
121
122#define pcibios_scan_all_fns(a, b) 0
123
124static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
125{
126 return channel ? 15 : 14;
127}
128
129#endif /* _ASM_PCI_H */
diff --git a/arch/mn10300/include/asm/percpu.h b/arch/mn10300/include/asm/percpu.h
new file mode 100644
index 000000000000..06a959d67234
--- /dev/null
+++ b/arch/mn10300/include/asm/percpu.h
@@ -0,0 +1 @@
#include <asm-generic/percpu.h>
diff --git a/arch/mn10300/include/asm/pgalloc.h b/arch/mn10300/include/asm/pgalloc.h
new file mode 100644
index 000000000000..ec057e1bd4cf
--- /dev/null
+++ b/arch/mn10300/include/asm/pgalloc.h
@@ -0,0 +1,56 @@
1/* MN10300 Page and page table/directory allocation
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_PGALLOC_H
12#define _ASM_PGALLOC_H
13
14#include <asm/processor.h>
15#include <asm/page.h>
16#include <linux/threads.h>
17#include <linux/mm.h> /* for struct page */
18
19struct mm_struct;
20struct page;
21
22/* attach a page table to a PMD entry */
23#define pmd_populate_kernel(mm, pmd, pte) \
24 set_pmd(pmd, __pmd(__pa(pte) | _PAGE_TABLE))
25
26static inline
27void pmd_populate(struct mm_struct *mm, pmd_t *pmd, struct page *pte)
28{
29 set_pmd(pmd, __pmd((page_to_pfn(pte) << PAGE_SHIFT) | _PAGE_TABLE));
30}
31#define pmd_pgtable(pmd) pmd_page(pmd)
32
33/*
34 * Allocate and free page tables.
35 */
36
37extern pgd_t *pgd_alloc(struct mm_struct *);
38extern void pgd_free(struct mm_struct *, pgd_t *);
39
40extern pte_t *pte_alloc_one_kernel(struct mm_struct *, unsigned long);
41extern struct page *pte_alloc_one(struct mm_struct *, unsigned long);
42
43static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
44{
45 free_page((unsigned long) pte);
46}
47
48static inline void pte_free(struct mm_struct *mm, struct page *pte)
49{
50 __free_page(pte);
51}
52
53
54#define __pte_free_tlb(tlb, pte) tlb_remove_page((tlb), (pte))
55
56#endif /* _ASM_PGALLOC_H */
diff --git a/arch/mn10300/include/asm/pgtable.h b/arch/mn10300/include/asm/pgtable.h
new file mode 100644
index 000000000000..6dc30fc827c4
--- /dev/null
+++ b/arch/mn10300/include/asm/pgtable.h
@@ -0,0 +1,492 @@
1/* MN10300 Page table manipulators and constants
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 *
11 *
12 * The Linux memory management assumes a three-level page table setup. On
13 * the i386, we use that, but "fold" the mid level into the top-level page
14 * table, so that we physically have the same two-level page table as the
15 * i386 mmu expects.
16 *
17 * This file contains the functions and defines necessary to modify and use
18 * the i386 page table tree for the purposes of the MN10300 TLB handler
19 * functions.
20 */
21#ifndef _ASM_PGTABLE_H
22#define _ASM_PGTABLE_H
23
24#include <asm/cpu-regs.h>
25
26#ifndef __ASSEMBLY__
27#include <asm/processor.h>
28#include <asm/cache.h>
29#include <linux/threads.h>
30
31#include <asm/bitops.h>
32
33#include <linux/slab.h>
34#include <linux/list.h>
35#include <linux/spinlock.h>
36
37/*
38 * ZERO_PAGE is a global shared page that is always zero: used
39 * for zero-mapped memory areas etc..
40 */
41#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
42extern unsigned long empty_zero_page[1024];
43extern spinlock_t pgd_lock;
44extern struct page *pgd_list;
45
46extern void pmd_ctor(void *, struct kmem_cache *, unsigned long);
47extern void pgtable_cache_init(void);
48extern void paging_init(void);
49
50#endif /* !__ASSEMBLY__ */
51
52/*
53 * The Linux mn10300 paging architecture only implements both the traditional
54 * 2-level page tables
55 */
56#define PGDIR_SHIFT 22
57#define PTRS_PER_PGD 1024
58#define PTRS_PER_PUD 1 /* we don't really have any PUD physically */
59#define PTRS_PER_PMD 1 /* we don't really have any PMD physically */
60#define PTRS_PER_PTE 1024
61
62#define PGD_SIZE PAGE_SIZE
63#define PMD_SIZE (1UL << PMD_SHIFT)
64#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
65#define PGDIR_MASK (~(PGDIR_SIZE - 1))
66
67#define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE)
68#define FIRST_USER_ADDRESS 0
69
70#define USER_PGD_PTRS (PAGE_OFFSET >> PGDIR_SHIFT)
71#define KERNEL_PGD_PTRS (PTRS_PER_PGD - USER_PGD_PTRS)
72
73#define TWOLEVEL_PGDIR_SHIFT 22
74#define BOOT_USER_PGD_PTRS (__PAGE_OFFSET >> TWOLEVEL_PGDIR_SHIFT)
75#define BOOT_KERNEL_PGD_PTRS (1024 - BOOT_USER_PGD_PTRS)
76
77#ifndef __ASSEMBLY__
78extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
79#endif
80
81/*
82 * Unfortunately, due to the way the MMU works on the MN10300, the vmalloc VM
83 * area has to be in the lower half of the virtual address range (the upper
84 * half is not translated through the TLB).
85 *
86 * So in this case, the vmalloc area goes at the bottom of the address map
87 * (leaving a hole at the very bottom to catch addressing errors), and
88 * userspace starts immediately above.
89 *
90 * The vmalloc() routines also leaves a hole of 4kB between each vmalloced
91 * area to catch addressing errors.
92 */
93#define VMALLOC_OFFSET (8 * 1024 * 1024)
94#define VMALLOC_START (0x70000000)
95#define VMALLOC_END (0x7C000000)
96
97#ifndef __ASSEMBLY__
98extern pte_t kernel_vmalloc_ptes[(VMALLOC_END - VMALLOC_START) / PAGE_SIZE];
99#endif
100
101/* IPTEL/DPTEL bit assignments */
102#define _PAGE_BIT_VALID xPTEL_V_BIT
103#define _PAGE_BIT_ACCESSED xPTEL_UNUSED1_BIT /* mustn't be loaded into IPTEL/DPTEL */
104#define _PAGE_BIT_NX xPTEL_UNUSED2_BIT /* mustn't be loaded into IPTEL/DPTEL */
105#define _PAGE_BIT_CACHE xPTEL_C_BIT
106#define _PAGE_BIT_PRESENT xPTEL_PV_BIT
107#define _PAGE_BIT_DIRTY xPTEL_D_BIT
108#define _PAGE_BIT_GLOBAL xPTEL_G_BIT
109
110#define _PAGE_VALID xPTEL_V
111#define _PAGE_ACCESSED xPTEL_UNUSED1
112#define _PAGE_NX xPTEL_UNUSED2 /* no-execute bit */
113#define _PAGE_CACHE xPTEL_C
114#define _PAGE_PRESENT xPTEL_PV
115#define _PAGE_DIRTY xPTEL_D
116#define _PAGE_PROT xPTEL_PR
117#define _PAGE_PROT_RKNU xPTEL_PR_ROK
118#define _PAGE_PROT_WKNU xPTEL_PR_RWK
119#define _PAGE_PROT_RKRU xPTEL_PR_ROK_ROU
120#define _PAGE_PROT_WKRU xPTEL_PR_RWK_ROU
121#define _PAGE_PROT_WKWU xPTEL_PR_RWK_RWU
122#define _PAGE_GLOBAL xPTEL_G
123#define _PAGE_PSE xPTEL_PS_4Mb /* 4MB page */
124
125#define _PAGE_FILE xPTEL_UNUSED1_BIT /* set:pagecache unset:swap */
126
127#define __PAGE_PROT_UWAUX 0x040
128#define __PAGE_PROT_USER 0x080
129#define __PAGE_PROT_WRITE 0x100
130
131#define _PAGE_PRESENTV (_PAGE_PRESENT|_PAGE_VALID)
132#define _PAGE_PROTNONE 0x000 /* If not present */
133
134#ifndef __ASSEMBLY__
135
136#define VMALLOC_VMADDR(x) ((unsigned long)(x))
137
138#define _PAGE_TABLE (_PAGE_PRESENTV | _PAGE_PROT_WKNU | _PAGE_ACCESSED | _PAGE_DIRTY)
139#define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
140
141#define __PAGE_NONE (_PAGE_PRESENTV | _PAGE_PROT_RKNU | _PAGE_ACCESSED | _PAGE_CACHE)
142#define __PAGE_SHARED (_PAGE_PRESENTV | _PAGE_PROT_WKWU | _PAGE_ACCESSED | _PAGE_CACHE)
143#define __PAGE_COPY (_PAGE_PRESENTV | _PAGE_PROT_RKRU | _PAGE_ACCESSED | _PAGE_CACHE)
144#define __PAGE_READONLY (_PAGE_PRESENTV | _PAGE_PROT_RKRU | _PAGE_ACCESSED | _PAGE_CACHE)
145
146#define PAGE_NONE __pgprot(__PAGE_NONE | _PAGE_NX)
147#define PAGE_SHARED_NOEXEC __pgprot(__PAGE_SHARED | _PAGE_NX)
148#define PAGE_COPY_NOEXEC __pgprot(__PAGE_COPY | _PAGE_NX)
149#define PAGE_READONLY_NOEXEC __pgprot(__PAGE_READONLY | _PAGE_NX)
150#define PAGE_SHARED_EXEC __pgprot(__PAGE_SHARED)
151#define PAGE_COPY_EXEC __pgprot(__PAGE_COPY)
152#define PAGE_READONLY_EXEC __pgprot(__PAGE_READONLY)
153#define PAGE_COPY PAGE_COPY_NOEXEC
154#define PAGE_READONLY PAGE_READONLY_NOEXEC
155#define PAGE_SHARED PAGE_SHARED_EXEC
156
157#define __PAGE_KERNEL_BASE (_PAGE_PRESENTV | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_GLOBAL)
158
159#define __PAGE_KERNEL (__PAGE_KERNEL_BASE | _PAGE_PROT_WKNU | _PAGE_CACHE | _PAGE_NX)
160#define __PAGE_KERNEL_NOCACHE (__PAGE_KERNEL_BASE | _PAGE_PROT_WKNU | _PAGE_NX)
161#define __PAGE_KERNEL_EXEC (__PAGE_KERNEL & ~_PAGE_NX)
162#define __PAGE_KERNEL_RO (__PAGE_KERNEL_BASE | _PAGE_PROT_RKNU | _PAGE_CACHE | _PAGE_NX)
163#define __PAGE_KERNEL_LARGE (__PAGE_KERNEL | _PAGE_PSE)
164#define __PAGE_KERNEL_LARGE_EXEC (__PAGE_KERNEL_EXEC | _PAGE_PSE)
165
166#define PAGE_KERNEL __pgprot(__PAGE_KERNEL)
167#define PAGE_KERNEL_RO __pgprot(__PAGE_KERNEL_RO)
168#define PAGE_KERNEL_EXEC __pgprot(__PAGE_KERNEL_EXEC)
169#define PAGE_KERNEL_NOCACHE __pgprot(__PAGE_KERNEL_NOCACHE)
170#define PAGE_KERNEL_LARGE __pgprot(__PAGE_KERNEL_LARGE)
171#define PAGE_KERNEL_LARGE_EXEC __pgprot(__PAGE_KERNEL_LARGE_EXEC)
172
173/*
174 * Whilst the MN10300 can do page protection for execute (given separate data
175 * and insn TLBs), we are not supporting it at the moment. Write permission,
176 * however, always implies read permission (but not execute permission).
177 */
178#define __P000 PAGE_NONE
179#define __P001 PAGE_READONLY_NOEXEC
180#define __P010 PAGE_COPY_NOEXEC
181#define __P011 PAGE_COPY_NOEXEC
182#define __P100 PAGE_READONLY_EXEC
183#define __P101 PAGE_READONLY_EXEC
184#define __P110 PAGE_COPY_EXEC
185#define __P111 PAGE_COPY_EXEC
186
187#define __S000 PAGE_NONE
188#define __S001 PAGE_READONLY_NOEXEC
189#define __S010 PAGE_SHARED_NOEXEC
190#define __S011 PAGE_SHARED_NOEXEC
191#define __S100 PAGE_READONLY_EXEC
192#define __S101 PAGE_READONLY_EXEC
193#define __S110 PAGE_SHARED_EXEC
194#define __S111 PAGE_SHARED_EXEC
195
196/*
197 * Define this to warn about kernel memory accesses that are
198 * done without a 'verify_area(VERIFY_WRITE,..)'
199 */
200#undef TEST_VERIFY_AREA
201
202#define pte_present(x) (pte_val(x) & _PAGE_VALID)
203#define pte_clear(mm, addr, xp) \
204do { \
205 set_pte_at((mm), (addr), (xp), __pte(0)); \
206} while (0)
207
208#define pmd_none(x) (!pmd_val(x))
209#define pmd_present(x) (!pmd_none(x))
210#define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0)
211#define pmd_bad(x) 0
212
213
214#define pages_to_mb(x) ((x) >> (20 - PAGE_SHIFT))
215
216#ifndef __ASSEMBLY__
217
218/*
219 * The following only work if pte_present() is true.
220 * Undefined behaviour if not..
221 */
222static inline int pte_user(pte_t pte) { return pte_val(pte) & __PAGE_PROT_USER; }
223static inline int pte_read(pte_t pte) { return pte_val(pte) & __PAGE_PROT_USER; }
224static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
225static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
226static inline int pte_write(pte_t pte) { return pte_val(pte) & __PAGE_PROT_WRITE; }
227static inline int pte_special(pte_t pte){ return 0; }
228
229/*
230 * The following only works if pte_present() is not true.
231 */
232static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
233
234static inline pte_t pte_rdprotect(pte_t pte)
235{
236 pte_val(pte) &= ~(__PAGE_PROT_USER|__PAGE_PROT_UWAUX); return pte;
237}
238static inline pte_t pte_exprotect(pte_t pte)
239{
240 pte_val(pte) |= _PAGE_NX; return pte;
241}
242
243static inline pte_t pte_wrprotect(pte_t pte)
244{
245 pte_val(pte) &= ~(__PAGE_PROT_WRITE|__PAGE_PROT_UWAUX); return pte;
246}
247
248static inline pte_t pte_mkclean(pte_t pte) { pte_val(pte) &= ~_PAGE_DIRTY; return pte; }
249static inline pte_t pte_mkold(pte_t pte) { pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
250static inline pte_t pte_mkdirty(pte_t pte) { pte_val(pte) |= _PAGE_DIRTY; return pte; }
251static inline pte_t pte_mkyoung(pte_t pte) { pte_val(pte) |= _PAGE_ACCESSED; return pte; }
252static inline pte_t pte_mkexec(pte_t pte) { pte_val(pte) &= ~_PAGE_NX; return pte; }
253
254static inline pte_t pte_mkread(pte_t pte)
255{
256 pte_val(pte) |= __PAGE_PROT_USER;
257 if (pte_write(pte))
258 pte_val(pte) |= __PAGE_PROT_UWAUX;
259 return pte;
260}
261static inline pte_t pte_mkwrite(pte_t pte)
262{
263 pte_val(pte) |= __PAGE_PROT_WRITE;
264 if (pte_val(pte) & __PAGE_PROT_USER)
265 pte_val(pte) |= __PAGE_PROT_UWAUX;
266 return pte;
267}
268
269static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
270
271#define pte_ERROR(e) \
272 printk(KERN_ERR "%s:%d: bad pte %08lx.\n", \
273 __FILE__, __LINE__, pte_val(e))
274#define pgd_ERROR(e) \
275 printk(KERN_ERR "%s:%d: bad pgd %08lx.\n", \
276 __FILE__, __LINE__, pgd_val(e))
277
278/*
279 * The "pgd_xxx()" functions here are trivial for a folded two-level
280 * setup: the pgd is never bad, and a pmd always exists (as it's folded
281 * into the pgd entry)
282 */
283#define pgd_clear(xp) do { } while (0)
284
285/*
286 * Certain architectures need to do special things when PTEs
287 * within a page table are directly modified. Thus, the following
288 * hook is made available.
289 */
290#define set_pte(pteptr, pteval) (*(pteptr) = pteval)
291#define set_pte_at(mm, addr, ptep, pteval) set_pte((ptep), (pteval))
292#define set_pte_atomic(pteptr, pteval) set_pte((pteptr), (pteval))
293
294/*
295 * (pmds are folded into pgds so this doesn't get actually called,
296 * but the define is needed for a generic inline function.)
297 */
298#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval)
299
300#define ptep_get_and_clear(mm, addr, ptep) \
301 __pte(xchg(&(ptep)->pte, 0))
302#define pte_same(a, b) (pte_val(a) == pte_val(b))
303#define pte_page(x) pfn_to_page(pte_pfn(x))
304#define pte_none(x) (!pte_val(x))
305#define pte_pfn(x) ((unsigned long) (pte_val(x) >> PAGE_SHIFT))
306#define __pfn_addr(pfn) ((pfn) << PAGE_SHIFT)
307#define pfn_pte(pfn, prot) __pte(__pfn_addr(pfn) | pgprot_val(prot))
308#define pfn_pmd(pfn, prot) __pmd(__pfn_addr(pfn) | pgprot_val(prot))
309
310/*
311 * All present user pages are user-executable:
312 */
313static inline int pte_exec(pte_t pte)
314{
315 return pte_user(pte);
316}
317
318/*
319 * All present pages are kernel-executable:
320 */
321static inline int pte_exec_kernel(pte_t pte)
322{
323 return 1;
324}
325
326/*
327 * Bits 0 and 1 are taken, split up the 29 bits of offset
328 * into this range:
329 */
330#define PTE_FILE_MAX_BITS 29
331
332#define pte_to_pgoff(pte) (pte_val(pte) >> 2)
333#define pgoff_to_pte(off) __pte((off) << 2 | _PAGE_FILE)
334
335/* Encode and de-code a swap entry */
336#define __swp_type(x) (((x).val >> 2) & 0x3f)
337#define __swp_offset(x) ((x).val >> 8)
338#define __swp_entry(type, offset) \
339 ((swp_entry_t) { ((type) << 2) | ((offset) << 8) })
340#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
341#define __swp_entry_to_pte(x) __pte((x).val)
342
343static inline
344int ptep_test_and_clear_dirty(struct vm_area_struct *vma, unsigned long addr,
345 pte_t *ptep)
346{
347 if (!pte_dirty(*ptep))
348 return 0;
349 return test_and_clear_bit(_PAGE_BIT_DIRTY, &ptep->pte);
350}
351
352static inline
353int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr,
354 pte_t *ptep)
355{
356 if (!pte_young(*ptep))
357 return 0;
358 return test_and_clear_bit(_PAGE_BIT_ACCESSED, &ptep->pte);
359}
360
361static inline
362void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
363{
364 pte_val(*ptep) &= ~(__PAGE_PROT_WRITE|__PAGE_PROT_UWAUX);
365}
366
367static inline void ptep_mkdirty(pte_t *ptep)
368{
369 set_bit(_PAGE_BIT_DIRTY, &ptep->pte);
370}
371
372/*
373 * Macro to mark a page protection value as "uncacheable". On processors which
374 * do not support it, this is a no-op.
375 */
376#define pgprot_noncached(prot) __pgprot(pgprot_val(prot) | _PAGE_CACHE)
377
378
379/*
380 * Conversion functions: convert a page and protection to a page entry,
381 * and a page entry and page directory to the page they refer to.
382 */
383
384#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
385#define mk_pte_huge(entry) \
386 ((entry).pte |= _PAGE_PRESENT | _PAGE_PSE | _PAGE_VALID)
387
388static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
389{
390 pte_val(pte) &= _PAGE_CHG_MASK;
391 pte_val(pte) |= pgprot_val(newprot);
392 return pte;
393}
394
395#define page_pte(page) page_pte_prot((page), __pgprot(0))
396
397#define pmd_page_kernel(pmd) \
398 ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
399
400#define pmd_page(pmd) pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)
401
402#define pmd_large(pmd) \
403 ((pmd_val(pmd) & (_PAGE_PSE | _PAGE_PRESENT)) == \
404 (_PAGE_PSE | _PAGE_PRESENT))
405
406/*
407 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
408 *
409 * this macro returns the index of the entry in the pgd page which would
410 * control the given virtual address
411 */
412#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
413
414/*
415 * pgd_offset() returns a (pgd_t *)
416 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
417 */
418#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
419
420/*
421 * a shortcut which implies the use of the kernel's pgd, instead
422 * of a process's
423 */
424#define pgd_offset_k(address) pgd_offset(&init_mm, address)
425
426/*
427 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
428 *
429 * this macro returns the index of the entry in the pmd page which would
430 * control the given virtual address
431 */
432#define pmd_index(address) \
433 (((address) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
434
435/*
436 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
437 *
438 * this macro returns the index of the entry in the pte page which would
439 * control the given virtual address
440 */
441#define pte_index(address) \
442 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
443
444#define pte_offset_kernel(dir, address) \
445 ((pte_t *) pmd_page_kernel(*(dir)) + pte_index(address))
446
447/*
448 * Make a given kernel text page executable/non-executable.
449 * Returns the previous executability setting of that page (which
450 * is used to restore the previous state). Used by the SMP bootup code.
451 * NOTE: this is an __init function for security reasons.
452 */
453static inline int set_kernel_exec(unsigned long vaddr, int enable)
454{
455 return 0;
456}
457
458#define pte_offset_map(dir, address) \
459 ((pte_t *) page_address(pmd_page(*(dir))) + pte_index(address))
460#define pte_offset_map_nested(dir, address) pte_offset_map(dir, address)
461#define pte_unmap(pte) do {} while (0)
462#define pte_unmap_nested(pte) do {} while (0)
463
464/*
465 * The MN10300 has external MMU info in the form of a TLB: this is adapted from
466 * the kernel page tables containing the necessary information by tlb-mn10300.S
467 */
468extern void update_mmu_cache(struct vm_area_struct *vma,
469 unsigned long address, pte_t pte);
470
471#endif /* !__ASSEMBLY__ */
472
473#define kern_addr_valid(addr) (1)
474
475#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
476 remap_pfn_range((vma), (vaddr), (pfn), (size), (prot))
477
478#define MK_IOSPACE_PFN(space, pfn) (pfn)
479#define GET_IOSPACE(pfn) 0
480#define GET_PFN(pfn) (pfn)
481
482#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
483#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
484#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
485#define __HAVE_ARCH_PTEP_SET_WRPROTECT
486#define __HAVE_ARCH_PTEP_MKDIRTY
487#define __HAVE_ARCH_PTE_SAME
488#include <asm-generic/pgtable.h>
489
490#endif /* !__ASSEMBLY__ */
491
492#endif /* _ASM_PGTABLE_H */
diff --git a/arch/mn10300/include/asm/pio-regs.h b/arch/mn10300/include/asm/pio-regs.h
new file mode 100644
index 000000000000..96bc8182d0ba
--- /dev/null
+++ b/arch/mn10300/include/asm/pio-regs.h
@@ -0,0 +1,233 @@
1/* MN10300 On-board I/O port module registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_PIO_REGS_H
12#define _ASM_PIO_REGS_H
13
14#include <asm/cpu-regs.h>
15#include <asm/intctl-regs.h>
16
17#ifdef __KERNEL__
18
19/* I/O port 0 */
20#define P0MD __SYSREG(0xdb000000, u16) /* mode reg */
21#define P0MD_0 0x0003 /* mask */
22#define P0MD_0_IN 0x0000 /* input mode */
23#define P0MD_0_OUT 0x0001 /* output mode */
24#define P0MD_0_TM0IO 0x0002 /* timer 0 I/O mode */
25#define P0MD_0_EYECLK 0x0003 /* test signal output (clock) */
26#define P0MD_1 0x000c
27#define P0MD_1_IN 0x0000
28#define P0MD_1_OUT 0x0004
29#define P0MD_1_TM1IO 0x0008 /* timer 1 I/O mode */
30#define P0MD_1_EYED 0x000c /* test signal output (data) */
31#define P0MD_2 0x0030
32#define P0MD_2_IN 0x0000
33#define P0MD_2_OUT 0x0010
34#define P0MD_2_TM2IO 0x0020 /* timer 2 I/O mode */
35#define P0MD_3 0x00c0
36#define P0MD_3_IN 0x0000
37#define P0MD_3_OUT 0x0040
38#define P0MD_3_TM3IO 0x0080 /* timer 3 I/O mode */
39#define P0MD_4 0x0300
40#define P0MD_4_IN 0x0000
41#define P0MD_4_OUT 0x0100
42#define P0MD_4_TM4IO 0x0200 /* timer 4 I/O mode */
43#define P0MD_4_XCTS 0x0300 /* XCTS input for serial port 2 */
44#define P0MD_5 0x0c00
45#define P0MD_5_IN 0x0000
46#define P0MD_5_OUT 0x0400
47#define P0MD_5_TM5IO 0x0800 /* timer 5 I/O mode */
48#define P0MD_6 0x3000
49#define P0MD_6_IN 0x0000
50#define P0MD_6_OUT 0x1000
51#define P0MD_6_TM6IOA 0x2000 /* timer 6 I/O mode A */
52#define P0MD_7 0xc000
53#define P0MD_7_IN 0x0000
54#define P0MD_7_OUT 0x4000
55#define P0MD_7_TM6IOB 0x8000 /* timer 6 I/O mode B */
56
57#define P0IN __SYSREG(0xdb000004, u8) /* in reg */
58#define P0OUT __SYSREG(0xdb000008, u8) /* out reg */
59
60#define P0TMIO __SYSREG(0xdb00000c, u8) /* TM pin I/O control reg */
61#define P0TMIO_TM0_IN 0x00
62#define P0TMIO_TM0_OUT 0x01
63#define P0TMIO_TM1_IN 0x00
64#define P0TMIO_TM1_OUT 0x02
65#define P0TMIO_TM2_IN 0x00
66#define P0TMIO_TM2_OUT 0x04
67#define P0TMIO_TM3_IN 0x00
68#define P0TMIO_TM3_OUT 0x08
69#define P0TMIO_TM4_IN 0x00
70#define P0TMIO_TM4_OUT 0x10
71#define P0TMIO_TM5_IN 0x00
72#define P0TMIO_TM5_OUT 0x20
73#define P0TMIO_TM6A_IN 0x00
74#define P0TMIO_TM6A_OUT 0x40
75#define P0TMIO_TM6B_IN 0x00
76#define P0TMIO_TM6B_OUT 0x80
77
78/* I/O port 1 */
79#define P1MD __SYSREG(0xdb000100, u16) /* mode reg */
80#define P1MD_0 0x0003 /* mask */
81#define P1MD_0_IN 0x0000 /* input mode */
82#define P1MD_0_OUT 0x0001 /* output mode */
83#define P1MD_0_TM7IO 0x0002 /* timer 7 I/O mode */
84#define P1MD_0_ADTRG 0x0003 /* A/D converter trigger mode */
85#define P1MD_1 0x000c
86#define P1MD_1_IN 0x0000
87#define P1MD_1_OUT 0x0004
88#define P1MD_1_TM8IO 0x0008 /* timer 8 I/O mode */
89#define P1MD_1_XDMR0 0x000c /* DMA request input 0 mode */
90#define P1MD_2 0x0030
91#define P1MD_2_IN 0x0000
92#define P1MD_2_OUT 0x0010
93#define P1MD_2_TM9IO 0x0020 /* timer 9 I/O mode */
94#define P1MD_2_XDMR1 0x0030 /* DMA request input 1 mode */
95#define P1MD_3 0x00c0
96#define P1MD_3_IN 0x0000
97#define P1MD_3_OUT 0x0040
98#define P1MD_3_TM10IO 0x0080 /* timer 10 I/O mode */
99#define P1MD_3_FRQS0 0x00c0 /* CPU clock multiplier setting input 0 mode */
100#define P1MD_4 0x0300
101#define P1MD_4_IN 0x0000
102#define P1MD_4_OUT 0x0100
103#define P1MD_4_TM11IO 0x0200 /* timer 11 I/O mode */
104#define P1MD_4_FRQS1 0x0300 /* CPU clock multiplier setting input 1 mode */
105
106#define P1IN __SYSREG(0xdb000104, u8) /* in reg */
107#define P1OUT __SYSREG(0xdb000108, u8) /* out reg */
108#define P1TMIO __SYSREG(0xdb00010c, u8) /* TM pin I/O control reg */
109#define P1TMIO_TM11_IN 0x00
110#define P1TMIO_TM11_OUT 0x01
111#define P1TMIO_TM10_IN 0x00
112#define P1TMIO_TM10_OUT 0x02
113#define P1TMIO_TM9_IN 0x00
114#define P1TMIO_TM9_OUT 0x04
115#define P1TMIO_TM8_IN 0x00
116#define P1TMIO_TM8_OUT 0x08
117#define P1TMIO_TM7_IN 0x00
118#define P1TMIO_TM7_OUT 0x10
119
120/* I/O port 2 */
121#define P2MD __SYSREG(0xdb000200, u16) /* mode reg */
122#define P2MD_0 0x0003 /* mask */
123#define P2MD_0_IN 0x0000 /* input mode */
124#define P2MD_0_OUT 0x0001 /* output mode */
125#define P2MD_0_BOOTBW 0x0003 /* boot bus width selector mode */
126#define P2MD_1 0x000c
127#define P2MD_1_IN 0x0000
128#define P2MD_1_OUT 0x0004
129#define P2MD_1_BOOTSEL 0x000c /* boot device selector mode */
130#define P2MD_2 0x0030
131#define P2MD_2_IN 0x0000
132#define P2MD_2_OUT 0x0010
133#define P2MD_3 0x00c0
134#define P2MD_3_IN 0x0000
135#define P2MD_3_OUT 0x0040
136#define P2MD_3_CKIO 0x00c0 /* mode */
137#define P2MD_4 0x0300
138#define P2MD_4_IN 0x0000
139#define P2MD_4_OUT 0x0100
140#define P2MD_4_CMOD 0x0300 /* mode */
141
142#define P2IN __SYSREG(0xdb000204, u8) /* in reg */
143#define P2OUT __SYSREG(0xdb000208, u8) /* out reg */
144#define P2TMIO __SYSREG(0xdb00020c, u8) /* TM pin I/O control reg */
145
146/* I/O port 3 */
147#define P3MD __SYSREG(0xdb000300, u16) /* mode reg */
148#define P3MD_0 0x0003 /* mask */
149#define P3MD_0_IN 0x0000 /* input mode */
150#define P3MD_0_OUT 0x0001 /* output mode */
151#define P3MD_0_AFRXD 0x0002 /* AFR interface mode */
152#define P3MD_1 0x000c
153#define P3MD_1_IN 0x0000
154#define P3MD_1_OUT 0x0004
155#define P3MD_1_AFTXD 0x0008 /* AFR interface mode */
156#define P3MD_2 0x0030
157#define P3MD_2_IN 0x0000
158#define P3MD_2_OUT 0x0010
159#define P3MD_2_AFSCLK 0x0020 /* AFR interface mode */
160#define P3MD_3 0x00c0
161#define P3MD_3_IN 0x0000
162#define P3MD_3_OUT 0x0040
163#define P3MD_3_AFFS 0x0080 /* AFR interface mode */
164#define P3MD_4 0x0300
165#define P3MD_4_IN 0x0000
166#define P3MD_4_OUT 0x0100
167#define P3MD_4_AFEHC 0x0200 /* AFR interface mode */
168
169#define P3IN __SYSREG(0xdb000304, u8) /* in reg */
170#define P3OUT __SYSREG(0xdb000308, u8) /* out reg */
171
172/* I/O port 4 */
173#define P4MD __SYSREG(0xdb000400, u16) /* mode reg */
174#define P4MD_0 0x0003 /* mask */
175#define P4MD_0_IN 0x0000 /* input mode */
176#define P4MD_0_OUT 0x0001 /* output mode */
177#define P4MD_0_SCL0 0x0002 /* I2C/serial mode */
178#define P4MD_1 0x000c
179#define P4MD_1_IN 0x0000
180#define P4MD_1_OUT 0x0004
181#define P4MD_1_SDA0 0x0008
182#define P4MD_2 0x0030
183#define P4MD_2_IN 0x0000
184#define P4MD_2_OUT 0x0010
185#define P4MD_2_SCL1 0x0020
186#define P4MD_3 0x00c0
187#define P4MD_3_IN 0x0000
188#define P4MD_3_OUT 0x0040
189#define P4MD_3_SDA1 0x0080
190#define P4MD_4 0x0300
191#define P4MD_4_IN 0x0000
192#define P4MD_4_OUT 0x0100
193#define P4MD_4_SBO0 0x0200
194#define P4MD_5 0x0c00
195#define P4MD_5_IN 0x0000
196#define P4MD_5_OUT 0x0400
197#define P4MD_5_SBO1 0x0800
198#define P4MD_6 0x3000
199#define P4MD_6_IN 0x0000
200#define P4MD_6_OUT 0x1000
201#define P4MD_6_SBT0 0x2000
202#define P4MD_7 0xc000
203#define P4MD_7_IN 0x0000
204#define P4MD_7_OUT 0x4000
205#define P4MD_7_SBT1 0x8000
206
207#define P4IN __SYSREG(0xdb000404, u8) /* in reg */
208#define P4OUT __SYSREG(0xdb000408, u8) /* out reg */
209
210/* I/O port 5 */
211#define P5MD __SYSREG(0xdb000500, u16) /* mode reg */
212#define P5MD_0 0x0003 /* mask */
213#define P5MD_0_IN 0x0000 /* input mode */
214#define P5MD_0_OUT 0x0001 /* output mode */
215#define P5MD_0_IRTXD 0x0002 /* IrDA mode */
216#define P5MD_0_SOUT 0x0004 /* serial mode */
217#define P5MD_1 0x000c
218#define P5MD_1_IN 0x0000
219#define P5MD_1_OUT 0x0004
220#define P5MD_1_IRRXDS 0x0008 /* IrDA mode */
221#define P5MD_1_SIN 0x000c /* serial mode */
222#define P5MD_2 0x0030
223#define P5MD_2_IN 0x0000
224#define P5MD_2_OUT 0x0010
225#define P5MD_2_IRRXDF 0x0020 /* IrDA mode */
226
227#define P5IN __SYSREG(0xdb000504, u8) /* in reg */
228#define P5OUT __SYSREG(0xdb000508, u8) /* out reg */
229
230
231#endif /* __KERNEL__ */
232
233#endif /* _ASM_PIO_REGS_H */
diff --git a/arch/mn10300/include/asm/poll.h b/arch/mn10300/include/asm/poll.h
new file mode 100644
index 000000000000..c98509d3149e
--- /dev/null
+++ b/arch/mn10300/include/asm/poll.h
@@ -0,0 +1 @@
#include <asm-generic/poll.h>
diff --git a/arch/mn10300/include/asm/posix_types.h b/arch/mn10300/include/asm/posix_types.h
new file mode 100644
index 000000000000..077567c37798
--- /dev/null
+++ b/arch/mn10300/include/asm/posix_types.h
@@ -0,0 +1,132 @@
1/* MN10300 POSIX types
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_POSIX_TYPES_H
12#define _ASM_POSIX_TYPES_H
13
14/*
15 * This file is generally used by user-level software, so you need to
16 * be a little careful about namespace pollution etc. Also, we cannot
17 * assume GCC is being used.
18 */
19
20typedef unsigned long __kernel_ino_t;
21typedef unsigned short __kernel_mode_t;
22typedef unsigned short __kernel_nlink_t;
23typedef long __kernel_off_t;
24typedef int __kernel_pid_t;
25typedef unsigned short __kernel_ipc_pid_t;
26typedef unsigned short __kernel_uid_t;
27typedef unsigned short __kernel_gid_t;
28typedef unsigned long __kernel_size_t;
29typedef long __kernel_ssize_t;
30typedef int __kernel_ptrdiff_t;
31typedef long __kernel_time_t;
32typedef long __kernel_suseconds_t;
33typedef long __kernel_clock_t;
34typedef int __kernel_timer_t;
35typedef int __kernel_clockid_t;
36typedef int __kernel_daddr_t;
37typedef char * __kernel_caddr_t;
38typedef unsigned short __kernel_uid16_t;
39typedef unsigned short __kernel_gid16_t;
40typedef unsigned int __kernel_uid32_t;
41typedef unsigned int __kernel_gid32_t;
42
43typedef unsigned short __kernel_old_uid_t;
44typedef unsigned short __kernel_old_gid_t;
45typedef unsigned short __kernel_old_dev_t;
46
47#ifdef __GNUC__
48typedef long long __kernel_loff_t;
49#endif
50
51typedef struct {
52#if defined(__KERNEL__) || defined(__USE_ALL)
53 int val[2];
54#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */
55 int __val[2];
56#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */
57} __kernel_fsid_t;
58
59#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2)
60
61#undef __FD_SET
62static inline void __FD_SET(unsigned long __fd, __kernel_fd_set *__fdsetp)
63{
64 unsigned long __tmp = __fd / __NFDBITS;
65 unsigned long __rem = __fd % __NFDBITS;
66 __fdsetp->fds_bits[__tmp] |= (1UL<<__rem);
67}
68
69#undef __FD_CLR
70static inline void __FD_CLR(unsigned long __fd, __kernel_fd_set *__fdsetp)
71{
72 unsigned long __tmp = __fd / __NFDBITS;
73 unsigned long __rem = __fd % __NFDBITS;
74 __fdsetp->fds_bits[__tmp] &= ~(1UL<<__rem);
75}
76
77
78#undef __FD_ISSET
79static inline int __FD_ISSET(unsigned long __fd, const __kernel_fd_set *__p)
80{
81 unsigned long __tmp = __fd / __NFDBITS;
82 unsigned long __rem = __fd % __NFDBITS;
83 return (__p->fds_bits[__tmp] & (1UL<<__rem)) != 0;
84}
85
86/*
87 * This will unroll the loop for the normal constant case (8 ints,
88 * for a 256-bit fd_set)
89 */
90#undef __FD_ZERO
91static inline void __FD_ZERO(__kernel_fd_set *__p)
92{
93 unsigned long *__tmp = __p->fds_bits;
94 int __i;
95
96 if (__builtin_constant_p(__FDSET_LONGS)) {
97 switch (__FDSET_LONGS) {
98 case 16:
99 __tmp[ 0] = 0; __tmp[ 1] = 0;
100 __tmp[ 2] = 0; __tmp[ 3] = 0;
101 __tmp[ 4] = 0; __tmp[ 5] = 0;
102 __tmp[ 6] = 0; __tmp[ 7] = 0;
103 __tmp[ 8] = 0; __tmp[ 9] = 0;
104 __tmp[10] = 0; __tmp[11] = 0;
105 __tmp[12] = 0; __tmp[13] = 0;
106 __tmp[14] = 0; __tmp[15] = 0;
107 return;
108
109 case 8:
110 __tmp[ 0] = 0; __tmp[ 1] = 0;
111 __tmp[ 2] = 0; __tmp[ 3] = 0;
112 __tmp[ 4] = 0; __tmp[ 5] = 0;
113 __tmp[ 6] = 0; __tmp[ 7] = 0;
114 return;
115
116 case 4:
117 __tmp[ 0] = 0; __tmp[ 1] = 0;
118 __tmp[ 2] = 0; __tmp[ 3] = 0;
119 return;
120 }
121 }
122 __i = __FDSET_LONGS;
123 while (__i) {
124 __i--;
125 *__tmp = 0;
126 __tmp++;
127 }
128}
129
130#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */
131
132#endif /* _ASM_POSIX_TYPES_H */
diff --git a/arch/mn10300/include/asm/processor.h b/arch/mn10300/include/asm/processor.h
new file mode 100644
index 000000000000..73239271873d
--- /dev/null
+++ b/arch/mn10300/include/asm/processor.h
@@ -0,0 +1,186 @@
1/* MN10300 Processor specifics
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Written by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12
13#ifndef _ASM_PROCESSOR_H
14#define _ASM_PROCESSOR_H
15
16#include <asm/page.h>
17#include <asm/ptrace.h>
18#include <asm/cpu-regs.h>
19#include <linux/threads.h>
20
21/* Forward declaration, a strange C thing */
22struct task_struct;
23struct mm_struct;
24
25/*
26 * Default implementation of macro that returns current
27 * instruction pointer ("program counter").
28 */
29#define current_text_addr() \
30({ \
31 void *__pc; \
32 asm("mov pc,%0" : "=a"(__pc)); \
33 __pc; \
34})
35
36extern void show_registers(struct pt_regs *regs);
37
38/*
39 * CPU type and hardware bug flags. Kept separately for each CPU.
40 * Members of this structure are referenced in head.S, so think twice
41 * before touching them. [mj]
42 */
43
44struct mn10300_cpuinfo {
45 int type;
46 unsigned long loops_per_sec;
47 char hard_math;
48 unsigned long *pgd_quick;
49 unsigned long *pte_quick;
50 unsigned long pgtable_cache_sz;
51};
52
53extern struct mn10300_cpuinfo boot_cpu_data;
54
55#define cpu_data &boot_cpu_data
56#define current_cpu_data boot_cpu_data
57
58extern void identify_cpu(struct mn10300_cpuinfo *);
59extern void print_cpu_info(struct mn10300_cpuinfo *);
60extern void dodgy_tsc(void);
61#define cpu_relax() barrier()
62
63/*
64 * User space process size: 1.75GB (default).
65 */
66#define TASK_SIZE 0x70000000
67
68/*
69 * Where to put the userspace stack by default
70 */
71#define STACK_TOP 0x70000000
72#define STACK_TOP_MAX STACK_TOP
73
74/* This decides where the kernel will search for a free chunk of vm
75 * space during mmap's.
76 */
77#define TASK_UNMAPPED_BASE 0x30000000
78
79typedef struct {
80 unsigned long seg;
81} mm_segment_t;
82
83struct fpu_state_struct {
84 unsigned long fs[32]; /* fpu registers */
85 unsigned long fpcr; /* fpu control register */
86};
87
88struct thread_struct {
89 struct pt_regs *uregs; /* userspace register frame */
90 unsigned long pc; /* kernel PC */
91 unsigned long sp; /* kernel SP */
92 unsigned long a3; /* kernel FP */
93 unsigned long wchan;
94 unsigned long usp;
95 struct pt_regs *__frame;
96 unsigned long fpu_flags;
97#define THREAD_USING_FPU 0x00000001 /* T if this task is using the FPU */
98 struct fpu_state_struct fpu_state;
99};
100
101#define INIT_THREAD \
102{ \
103 .uregs = init_uregs, \
104 .pc = 0, \
105 .sp = 0, \
106 .a3 = 0, \
107 .wchan = 0, \
108 .__frame = NULL, \
109}
110
111#define INIT_MMAP \
112{ &init_mm, 0, 0, NULL, PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, 1, \
113 NULL, NULL }
114
115/*
116 * do necessary setup to start up a newly executed thread
117 * - need to discard the frame stacked by the kernel thread invoking the execve
118 * syscall (see RESTORE_ALL macro)
119 */
120#define start_thread(regs, new_pc, new_sp) do { \
121 set_fs(USER_DS); \
122 __frame = current->thread.uregs; \
123 __frame->epsw = EPSW_nSL | EPSW_IE | EPSW_IM; \
124 __frame->pc = new_pc; \
125 __frame->sp = new_sp; \
126} while (0)
127
128/* Free all resources held by a thread. */
129extern void release_thread(struct task_struct *);
130
131/* Prepare to copy thread state - unlazy all lazy status */
132extern void prepare_to_copy(struct task_struct *tsk);
133
134/*
135 * create a kernel thread without removing it from tasklists
136 */
137extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
138
139/*
140 * Return saved PC of a blocked thread.
141 */
142extern unsigned long thread_saved_pc(struct task_struct *tsk);
143
144unsigned long get_wchan(struct task_struct *p);
145
146#define task_pt_regs(task) \
147({ \
148 struct pt_regs *__regs__; \
149 __regs__ = (struct pt_regs *) (KSTK_TOP(task_stack_page(task)) - 8); \
150 __regs__ - 1; \
151})
152
153#define KSTK_EIP(task) (task_pt_regs(task)->pc)
154#define KSTK_ESP(task) (task_pt_regs(task)->sp)
155
156#define KSTK_TOP(info) \
157({ \
158 (unsigned long)(info) + THREAD_SIZE; \
159})
160
161#define ARCH_HAS_PREFETCH
162#define ARCH_HAS_PREFETCHW
163
164static inline void prefetch(const void *x)
165{
166#ifndef CONFIG_MN10300_CACHE_DISABLED
167#ifdef CONFIG_MN10300_PROC_MN103E010
168 asm volatile ("nop; nop; dcpf (%0)" : : "r"(x));
169#else
170 asm volatile ("dcpf (%0)" : : "r"(x));
171#endif
172#endif
173}
174
175static inline void prefetchw(const void *x)
176{
177#ifndef CONFIG_MN10300_CACHE_DISABLED
178#ifdef CONFIG_MN10300_PROC_MN103E010
179 asm volatile ("nop; nop; dcpf (%0)" : : "r"(x));
180#else
181 asm volatile ("dcpf (%0)" : : "r"(x));
182#endif
183#endif
184}
185
186#endif /* _ASM_PROCESSOR_H */
diff --git a/arch/mn10300/include/asm/ptrace.h b/arch/mn10300/include/asm/ptrace.h
new file mode 100644
index 000000000000..7b06cc623d8b
--- /dev/null
+++ b/arch/mn10300/include/asm/ptrace.h
@@ -0,0 +1,103 @@
1/* MN10300 Exception frame layout and ptrace constants
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_PTRACE_H
12#define _ASM_PTRACE_H
13
14#define PT_A3 0
15#define PT_A2 1
16#define PT_D3 2
17#define PT_D2 3
18#define PT_MCVF 4
19#define PT_MCRL 5
20#define PT_MCRH 6
21#define PT_MDRQ 7
22#define PT_E1 8
23#define PT_E0 9
24#define PT_E7 10
25#define PT_E6 11
26#define PT_E5 12
27#define PT_E4 13
28#define PT_E3 14
29#define PT_E2 15
30#define PT_SP 16
31#define PT_LAR 17
32#define PT_LIR 18
33#define PT_MDR 19
34#define PT_A1 20
35#define PT_A0 21
36#define PT_D1 22
37#define PT_D0 23
38#define PT_ORIG_D0 24
39#define PT_EPSW 25
40#define PT_PC 26
41#define NR_PTREGS 27
42
43#ifndef __ASSEMBLY__
44/*
45 * This defines the way registers are stored in the event of an exception
46 * - the strange order is due to the MOVM instruction
47 */
48struct pt_regs {
49 unsigned long a3; /* syscall arg 3 */
50 unsigned long a2; /* syscall arg 4 */
51 unsigned long d3; /* syscall arg 5 */
52 unsigned long d2; /* syscall arg 6 */
53 unsigned long mcvf;
54 unsigned long mcrl;
55 unsigned long mcrh;
56 unsigned long mdrq;
57 unsigned long e1;
58 unsigned long e0;
59 unsigned long e7;
60 unsigned long e6;
61 unsigned long e5;
62 unsigned long e4;
63 unsigned long e3;
64 unsigned long e2;
65 unsigned long sp;
66 unsigned long lar;
67 unsigned long lir;
68 unsigned long mdr;
69 unsigned long a1;
70 unsigned long a0; /* syscall arg 1 */
71 unsigned long d1; /* syscall arg 2 */
72 unsigned long d0; /* syscall ret */
73 struct pt_regs *next; /* next frame pointer */
74 unsigned long orig_d0; /* syscall number */
75 unsigned long epsw;
76 unsigned long pc;
77};
78#endif
79
80extern struct pt_regs *__frame; /* current frame pointer */
81
82/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
83#define PTRACE_GETREGS 12
84#define PTRACE_SETREGS 13
85#define PTRACE_GETFPREGS 14
86#define PTRACE_SETFPREGS 15
87
88/* options set using PTRACE_SETOPTIONS */
89#define PTRACE_O_TRACESYSGOOD 0x00000001
90
91#if defined(__KERNEL__)
92
93#if !defined(__ASSEMBLY__)
94#define user_mode(regs) (((regs)->epsw & EPSW_nSL) == EPSW_nSL)
95#define instruction_pointer(regs) ((regs)->pc)
96extern void show_regs(struct pt_regs *);
97#endif /* !__ASSEMBLY */
98
99#define profile_pc(regs) ((regs)->pc)
100
101#endif /* __KERNEL__ */
102
103#endif /* _ASM_PTRACE_H */
diff --git a/arch/mn10300/include/asm/reset-regs.h b/arch/mn10300/include/asm/reset-regs.h
new file mode 100644
index 000000000000..174523d50132
--- /dev/null
+++ b/arch/mn10300/include/asm/reset-regs.h
@@ -0,0 +1,64 @@
1/* MN10300 Reset controller and watchdog timer definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_RESET_REGS_H
13#define _ASM_RESET_REGS_H
14
15#include <asm/cpu-regs.h>
16#include <asm/exceptions.h>
17
18#ifdef __KERNEL__
19
20#ifdef CONFIG_MN10300_WD_TIMER
21#define ARCH_HAS_NMI_WATCHDOG /* See include/linux/nmi.h */
22#endif
23
24/*
25 * watchdog timer registers
26 */
27#define WDBC __SYSREGC(0xc0001000, u8) /* watchdog binary counter reg */
28
29#define WDCTR __SYSREG(0xc0001002, u8) /* watchdog timer control reg */
30#define WDCTR_WDCK 0x07 /* clock source selection */
31#define WDCTR_WDCK_256th 0x00 /* - OSCI/256 */
32#define WDCTR_WDCK_1024th 0x01 /* - OSCI/1024 */
33#define WDCTR_WDCK_2048th 0x02 /* - OSCI/2048 */
34#define WDCTR_WDCK_16384th 0x03 /* - OSCI/16384 */
35#define WDCTR_WDCK_65536th 0x04 /* - OSCI/65536 */
36#define WDCTR_WDRST 0x40 /* binary counter reset */
37#define WDCTR_WDCNE 0x80 /* watchdog timer enable */
38
39#define RSTCTR __SYSREG(0xc0001004, u8) /* reset control reg */
40#define RSTCTR_CHIPRST 0x01 /* chip reset */
41#define RSTCTR_DBFRST 0x02 /* double fault reset flag */
42#define RSTCTR_WDTRST 0x04 /* watchdog timer reset flag */
43#define RSTCTR_WDREN 0x08 /* watchdog timer reset enable */
44
45#ifndef __ASSEMBLY__
46
47static inline void mn10300_proc_hard_reset(void)
48{
49 RSTCTR &= ~RSTCTR_CHIPRST;
50 RSTCTR |= RSTCTR_CHIPRST;
51}
52
53extern unsigned int watchdog_alert_counter;
54
55extern void watchdog_go(void);
56extern asmlinkage void watchdog_handler(void);
57extern asmlinkage
58void watchdog_interrupt(struct pt_regs *, enum exception_code);
59
60#endif
61
62#endif /* __KERNEL__ */
63
64#endif /* _ASM_RESET_REGS_H */
diff --git a/arch/mn10300/include/asm/resource.h b/arch/mn10300/include/asm/resource.h
new file mode 100644
index 000000000000..04bc4db8921b
--- /dev/null
+++ b/arch/mn10300/include/asm/resource.h
@@ -0,0 +1 @@
#include <asm-generic/resource.h>
diff --git a/arch/mn10300/include/asm/rtc-regs.h b/arch/mn10300/include/asm/rtc-regs.h
new file mode 100644
index 000000000000..c42deefaec11
--- /dev/null
+++ b/arch/mn10300/include/asm/rtc-regs.h
@@ -0,0 +1,86 @@
1/* MN10300 on-chip Real-Time Clock registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_RTC_REGS_H
12#define _ASM_RTC_REGS_H
13
14#include <asm/intctl-regs.h>
15
16#ifdef __KERNEL__
17
18#define RTSCR __SYSREG(0xd8600000, u8) /* RTC seconds count reg */
19#define RTSAR __SYSREG(0xd8600001, u8) /* RTC seconds alarm reg */
20#define RTMCR __SYSREG(0xd8600002, u8) /* RTC minutes count reg */
21#define RTMAR __SYSREG(0xd8600003, u8) /* RTC minutes alarm reg */
22#define RTHCR __SYSREG(0xd8600004, u8) /* RTC hours count reg */
23#define RTHAR __SYSREG(0xd8600005, u8) /* RTC hours alarm reg */
24#define RTDWCR __SYSREG(0xd8600006, u8) /* RTC day of the week count reg */
25#define RTDMCR __SYSREG(0xd8600007, u8) /* RTC days count reg */
26#define RTMTCR __SYSREG(0xd8600008, u8) /* RTC months count reg */
27#define RTYCR __SYSREG(0xd8600009, u8) /* RTC years count reg */
28
29#define RTCRA __SYSREG(0xd860000a, u8)/* RTC control reg A */
30#define RTCRA_RS 0x0f /* periodic timer interrupt cycle setting */
31#define RTCRA_RS_NONE 0x00 /* - off */
32#define RTCRA_RS_3_90625ms 0x01 /* - 3.90625ms (1/256s) */
33#define RTCRA_RS_7_8125ms 0x02 /* - 7.8125ms (1/128s) */
34#define RTCRA_RS_122_070us 0x03 /* - 122.070us (1/8192s) */
35#define RTCRA_RS_244_141us 0x04 /* - 244.141us (1/4096s) */
36#define RTCRA_RS_488_281us 0x05 /* - 488.281us (1/2048s) */
37#define RTCRA_RS_976_5625us 0x06 /* - 976.5625us (1/1024s) */
38#define RTCRA_RS_1_953125ms 0x07 /* - 1.953125ms (1/512s) */
39#define RTCRA_RS_3_90624ms 0x08 /* - 3.90624ms (1/256s) */
40#define RTCRA_RS_7_8125ms_b 0x09 /* - 7.8125ms (1/128s) */
41#define RTCRA_RS_15_625ms 0x0a /* - 15.625ms (1/64s) */
42#define RTCRA_RS_31_25ms 0x0b /* - 31.25ms (1/32s) */
43#define RTCRA_RS_62_5ms 0x0c /* - 62.5ms (1/16s) */
44#define RTCRA_RS_125ms 0x0d /* - 125ms (1/8s) */
45#define RTCRA_RS_250ms 0x0e /* - 250ms (1/4s) */
46#define RTCRA_RS_500ms 0x0f /* - 500ms (1/2s) */
47#define RTCRA_DVR 0x40 /* divider reset */
48#define RTCRA_UIP 0x80 /* clock update flag */
49
50#define RTCRB __SYSREG(0xd860000b, u8) /* RTC control reg B */
51#define RTCRB_DSE 0x01 /* daylight savings time enable */
52#define RTCRB_TM 0x02 /* time format */
53#define RTCRB_TM_12HR 0x00 /* - 12 hour format */
54#define RTCRB_TM_24HR 0x02 /* - 24 hour format */
55#define RTCRB_DM 0x04 /* numeric value format */
56#define RTCRB_DM_BCD 0x00 /* - BCD */
57#define RTCRB_DM_BINARY 0x04 /* - binary */
58#define RTCRB_UIE 0x10 /* update interrupt disable */
59#define RTCRB_AIE 0x20 /* alarm interrupt disable */
60#define RTCRB_PIE 0x40 /* periodic interrupt disable */
61#define RTCRB_SET 0x80 /* clock update enable */
62
63#define RTSRC __SYSREG(0xd860000c, u8) /* RTC status reg C */
64#define RTSRC_UF 0x10 /* update end interrupt flag */
65#define RTSRC_AF 0x20 /* alarm interrupt flag */
66#define RTSRC_PF 0x40 /* periodic interrupt flag */
67#define RTSRC_IRQF 0x80 /* interrupt flag */
68
69#define RTIRQ 32
70#define RTICR GxICR(RTIRQ)
71
72/*
73 * MC146818 RTC compatibility defs for the MN10300 on-chip RTC
74 */
75#define RTC_PORT(x) 0xd8600000
76#define RTC_ALWAYS_BCD 1 /* RTC operates in binary mode */
77
78#define CMOS_READ(addr) __SYSREG(0xd8600000 + (addr), u8)
79#define CMOS_WRITE(val, addr) \
80 do { __SYSREG(0xd8600000 + (addr), u8) = val; } while (0)
81
82#define RTC_IRQ RTIRQ
83
84#endif /* __KERNEL__ */
85
86#endif /* _ASM_RTC_REGS_H */
diff --git a/arch/mn10300/include/asm/rtc.h b/arch/mn10300/include/asm/rtc.h
new file mode 100644
index 000000000000..c295194cc703
--- /dev/null
+++ b/arch/mn10300/include/asm/rtc.h
@@ -0,0 +1,41 @@
1/* MN10300 Real time clock definitions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_RTC_H
12#define _ASM_RTC_H
13
14#ifdef CONFIG_MN10300_RTC
15
16#include <linux/init.h>
17
18extern void check_rtc_time(void);
19extern void __init calibrate_clock(void);
20extern unsigned long __init get_initial_rtc_time(void);
21
22#else /* !CONFIG_MN10300_RTC */
23
24static inline void check_rtc_time(void)
25{
26}
27
28static inline void calibrate_clock(void)
29{
30}
31
32static inline unsigned long get_initial_rtc_time(void)
33{
34 return 0;
35}
36
37#endif /* !CONFIG_MN10300_RTC */
38
39#include <asm-generic/rtc.h>
40
41#endif /* _ASM_RTC_H */
diff --git a/arch/mn10300/include/asm/scatterlist.h b/arch/mn10300/include/asm/scatterlist.h
new file mode 100644
index 000000000000..67535901b9ff
--- /dev/null
+++ b/arch/mn10300/include/asm/scatterlist.h
@@ -0,0 +1,55 @@
1/* MN10300 Scatterlist definitions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_SCATTERLIST_H
12#define _ASM_SCATTERLIST_H
13
14#include <asm/types.h>
15
16/*
17 * Drivers must set either ->address or (preferred) page and ->offset
18 * to indicate where data must be transferred to/from.
19 *
20 * Using page is recommended since it handles highmem data as well as
21 * low mem. ->address is restricted to data which has a virtual mapping, and
22 * it will go away in the future. Updating to page can be automated very
23 * easily -- something like
24 *
25 * sg->address = some_ptr;
26 *
27 * can be rewritten as
28 *
29 * sg_set_page(virt_to_page(some_ptr));
30 * sg->offset = (unsigned long) some_ptr & ~PAGE_MASK;
31 *
32 * and that's it. There's no excuse for not highmem enabling YOUR driver. /jens
33 */
34struct scatterlist {
35#ifdef CONFIG_DEBUG_SG
36 unsigned long sg_magic;
37#endif
38 unsigned long page_link;
39 unsigned int offset; /* for highmem, page offset */
40 dma_addr_t dma_address;
41 unsigned int length;
42};
43
44#define ISA_DMA_THRESHOLD (0x00ffffff)
45
46/*
47 * These macros should be used after a pci_map_sg call has been done
48 * to get bus addresses of each of the SG entries and their lengths.
49 * You should only work with the number of sg entries pci_map_sg
50 * returns.
51 */
52#define sg_dma_address(sg) ((sg)->dma_address)
53#define sg_dma_len(sg) ((sg)->length)
54
55#endif /* _ASM_SCATTERLIST_H */
diff --git a/arch/mn10300/include/asm/sections.h b/arch/mn10300/include/asm/sections.h
new file mode 100644
index 000000000000..2b8c5160388f
--- /dev/null
+++ b/arch/mn10300/include/asm/sections.h
@@ -0,0 +1 @@
#include <asm-generic/sections.h>
diff --git a/arch/mn10300/include/asm/sembuf.h b/arch/mn10300/include/asm/sembuf.h
new file mode 100644
index 000000000000..301f3f9d8aa9
--- /dev/null
+++ b/arch/mn10300/include/asm/sembuf.h
@@ -0,0 +1,25 @@
1#ifndef _ASM_SEMBUF_H
2#define _ASM_SEMBUF_H
3
4/*
5 * The semid64_ds structure for MN10300 architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct semid64_ds {
15 struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
16 __kernel_time_t sem_otime; /* last semop time */
17 unsigned long __unused1;
18 __kernel_time_t sem_ctime; /* last change time */
19 unsigned long __unused2;
20 unsigned long sem_nsems; /* no. of semaphores in array */
21 unsigned long __unused3;
22 unsigned long __unused4;
23};
24
25#endif /* _ASM_SEMBUF_H */
diff --git a/arch/mn10300/include/asm/serial-regs.h b/arch/mn10300/include/asm/serial-regs.h
new file mode 100644
index 000000000000..6498469e93ac
--- /dev/null
+++ b/arch/mn10300/include/asm/serial-regs.h
@@ -0,0 +1,160 @@
1/* MN10300 on-board serial port module registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_SERIAL_REGS_H
13#define _ASM_SERIAL_REGS_H
14
15#include <asm/cpu-regs.h>
16#include <asm/intctl-regs.h>
17
18#ifdef __KERNEL__
19
20/* serial port 0 */
21#define SC0CTR __SYSREG(0xd4002000, u16) /* control reg */
22#define SC01CTR_CK 0x0007 /* clock source select */
23#define SC0CTR_CK_TM8UFLOW_8 0x0000 /* - 1/8 timer 8 underflow (serial port 0 only) */
24#define SC1CTR_CK_TM9UFLOW_8 0x0000 /* - 1/8 timer 9 underflow (serial port 1 only) */
25#define SC01CTR_CK_IOCLK_8 0x0001 /* - 1/8 IOCLK */
26#define SC01CTR_CK_IOCLK_32 0x0002 /* - 1/32 IOCLK */
27#define SC0CTR_CK_TM2UFLOW_2 0x0003 /* - 1/2 timer 2 underflow (serial port 0 only) */
28#define SC1CTR_CK_TM3UFLOW_2 0x0003 /* - 1/2 timer 3 underflow (serial port 1 only) */
29#define SC0CTR_CK_TM0UFLOW_8 0x0004 /* - 1/8 timer 1 underflow (serial port 0 only) */
30#define SC1CTR_CK_TM1UFLOW_8 0x0004 /* - 1/8 timer 2 underflow (serial port 1 only) */
31#define SC0CTR_CK_TM2UFLOW_8 0x0005 /* - 1/8 timer 2 underflow (serial port 0 only) */
32#define SC1CTR_CK_TM3UFLOW_8 0x0005 /* - 1/8 timer 3 underflow (serial port 1 only) */
33#define SC01CTR_CK_EXTERN_8 0x0006 /* - 1/8 external closk */
34#define SC01CTR_CK_EXTERN 0x0007 /* - external closk */
35#define SC01CTR_STB 0x0008 /* stop bit select */
36#define SC01CTR_STB_1BIT 0x0000 /* - 1 stop bit */
37#define SC01CTR_STB_2BIT 0x0008 /* - 2 stop bits */
38#define SC01CTR_PB 0x0070 /* parity bit select */
39#define SC01CTR_PB_NONE 0x0000 /* - no parity */
40#define SC01CTR_PB_FIXED0 0x0040 /* - fixed at 0 */
41#define SC01CTR_PB_FIXED1 0x0050 /* - fixed at 1 */
42#define SC01CTR_PB_EVEN 0x0060 /* - even parity */
43#define SC01CTR_PB_ODD 0x0070 /* - odd parity */
44#define SC01CTR_CLN 0x0080 /* character length */
45#define SC01CTR_CLN_7BIT 0x0000 /* - 7 bit chars */
46#define SC01CTR_CLN_8BIT 0x0080 /* - 8 bit chars */
47#define SC01CTR_TOE 0x0100 /* T input output enable */
48#define SC01CTR_OD 0x0200 /* bit order select */
49#define SC01CTR_OD_LSBFIRST 0x0000 /* - LSB first */
50#define SC01CTR_OD_MSBFIRST 0x0200 /* - MSB first */
51#define SC01CTR_MD 0x0c00 /* mode select */
52#define SC01CTR_MD_STST_SYNC 0x0000 /* - start-stop synchronous */
53#define SC01CTR_MD_CLOCK_SYNC1 0x0400 /* - clock synchronous 1 */
54#define SC01CTR_MD_I2C 0x0800 /* - I2C mode */
55#define SC01CTR_MD_CLOCK_SYNC2 0x0c00 /* - clock synchronous 2 */
56#define SC01CTR_IIC 0x1000 /* I2C mode select */
57#define SC01CTR_BKE 0x2000 /* break transmit enable */
58#define SC01CTR_RXE 0x4000 /* receive enable */
59#define SC01CTR_TXE 0x8000 /* transmit enable */
60
61#define SC0ICR __SYSREG(0xd4002004, u8) /* interrupt control reg */
62#define SC01ICR_DMD 0x80 /* output data mode */
63#define SC01ICR_TD 0x20 /* transmit DMA trigger cause */
64#define SC01ICR_TI 0x10 /* transmit interrupt cause */
65#define SC01ICR_RES 0x04 /* receive error select */
66#define SC01ICR_RI 0x01 /* receive interrupt cause */
67
68#define SC0TXB __SYSREG(0xd4002008, u8) /* transmit buffer reg */
69#define SC0RXB __SYSREG(0xd4002009, u8) /* receive buffer reg */
70
71#define SC0STR __SYSREG(0xd400200c, u16) /* status reg */
72#define SC01STR_OEF 0x0001 /* overrun error found */
73#define SC01STR_PEF 0x0002 /* parity error found */
74#define SC01STR_FEF 0x0004 /* framing error found */
75#define SC01STR_RBF 0x0010 /* receive buffer status */
76#define SC01STR_TBF 0x0020 /* transmit buffer status */
77#define SC01STR_RXF 0x0040 /* receive status */
78#define SC01STR_TXF 0x0080 /* transmit status */
79#define SC01STR_STF 0x0100 /* I2C start sequence found */
80#define SC01STR_SPF 0x0200 /* I2C stop sequence found */
81
82#define SC0RXIRQ 20 /* timer 0 Receive IRQ */
83#define SC0TXIRQ 21 /* timer 0 Transmit IRQ */
84
85#define SC0RXICR GxICR(SC0RXIRQ) /* serial 0 receive intr ctrl reg */
86#define SC0TXICR GxICR(SC0TXIRQ) /* serial 0 transmit intr ctrl reg */
87
88/* serial port 1 */
89#define SC1CTR __SYSREG(0xd4002010, u16) /* serial port 1 control */
90#define SC1ICR __SYSREG(0xd4002014, u8) /* interrupt control reg */
91#define SC1TXB __SYSREG(0xd4002018, u8) /* transmit buffer reg */
92#define SC1RXB __SYSREG(0xd4002019, u8) /* receive buffer reg */
93#define SC1STR __SYSREG(0xd400201c, u16) /* status reg */
94
95#define SC1RXIRQ 22 /* timer 1 Receive IRQ */
96#define SC1TXIRQ 23 /* timer 1 Transmit IRQ */
97
98#define SC1RXICR GxICR(SC1RXIRQ) /* serial 1 receive intr ctrl reg */
99#define SC1TXICR GxICR(SC1TXIRQ) /* serial 1 transmit intr ctrl reg */
100
101/* serial port 2 */
102#define SC2CTR __SYSREG(0xd4002020, u16) /* control reg */
103#define SC2CTR_CK 0x0003 /* clock source select */
104#define SC2CTR_CK_TM10UFLOW 0x0000 /* - timer 10 underflow */
105#define SC2CTR_CK_TM2UFLOW 0x0001 /* - timer 2 underflow */
106#define SC2CTR_CK_EXTERN 0x0002 /* - external closk */
107#define SC2CTR_CK_TM3UFLOW 0x0003 /* - timer 3 underflow */
108#define SC2CTR_STB 0x0008 /* stop bit select */
109#define SC2CTR_STB_1BIT 0x0000 /* - 1 stop bit */
110#define SC2CTR_STB_2BIT 0x0008 /* - 2 stop bits */
111#define SC2CTR_PB 0x0070 /* parity bit select */
112#define SC2CTR_PB_NONE 0x0000 /* - no parity */
113#define SC2CTR_PB_FIXED0 0x0040 /* - fixed at 0 */
114#define SC2CTR_PB_FIXED1 0x0050 /* - fixed at 1 */
115#define SC2CTR_PB_EVEN 0x0060 /* - even parity */
116#define SC2CTR_PB_ODD 0x0070 /* - odd parity */
117#define SC2CTR_CLN 0x0080 /* character length */
118#define SC2CTR_CLN_7BIT 0x0000 /* - 7 bit chars */
119#define SC2CTR_CLN_8BIT 0x0080 /* - 8 bit chars */
120#define SC2CTR_TWE 0x0100 /* transmit wait enable (enable XCTS control) */
121#define SC2CTR_OD 0x0200 /* bit order select */
122#define SC2CTR_OD_LSBFIRST 0x0000 /* - LSB first */
123#define SC2CTR_OD_MSBFIRST 0x0200 /* - MSB first */
124#define SC2CTR_TWS 0x1000 /* transmit wait select */
125#define SC2CTR_TWS_XCTS_HIGH 0x0000 /* - interrupt TX when XCTS high */
126#define SC2CTR_TWS_XCTS_LOW 0x1000 /* - interrupt TX when XCTS low */
127#define SC2CTR_BKE 0x2000 /* break transmit enable */
128#define SC2CTR_RXE 0x4000 /* receive enable */
129#define SC2CTR_TXE 0x8000 /* transmit enable */
130
131#define SC2ICR __SYSREG(0xd4002024, u8) /* interrupt control reg */
132#define SC2ICR_TD 0x20 /* transmit DMA trigger cause */
133#define SC2ICR_TI 0x10 /* transmit interrupt cause */
134#define SC2ICR_RES 0x04 /* receive error select */
135#define SC2ICR_RI 0x01 /* receive interrupt cause */
136
137#define SC2TXB __SYSREG(0xd4002018, u8) /* transmit buffer reg */
138#define SC2RXB __SYSREG(0xd4002019, u8) /* receive buffer reg */
139#define SC2STR __SYSREG(0xd400201c, u8) /* status reg */
140#define SC2STR_OEF 0x0001 /* overrun error found */
141#define SC2STR_PEF 0x0002 /* parity error found */
142#define SC2STR_FEF 0x0004 /* framing error found */
143#define SC2STR_CTS 0x0008 /* XCTS input pin status (0 means high) */
144#define SC2STR_RBF 0x0010 /* receive buffer status */
145#define SC2STR_TBF 0x0020 /* transmit buffer status */
146#define SC2STR_RXF 0x0040 /* receive status */
147#define SC2STR_TXF 0x0080 /* transmit status */
148
149#define SC2TIM __SYSREG(0xd400202d, u8) /* status reg */
150
151#define SC2RXIRQ 24 /* serial 2 Receive IRQ */
152#define SC2TXIRQ 25 /* serial 2 Transmit IRQ */
153
154#define SC2RXICR GxICR(SC2RXIRQ) /* serial 2 receive intr ctrl reg */
155#define SC2TXICR GxICR(SC2TXIRQ) /* serial 2 transmit intr ctrl reg */
156
157
158#endif /* __KERNEL__ */
159
160#endif /* _ASM_SERIAL_REGS_H */
diff --git a/arch/mn10300/include/asm/serial.h b/arch/mn10300/include/asm/serial.h
new file mode 100644
index 000000000000..a29445cddd6f
--- /dev/null
+++ b/arch/mn10300/include/asm/serial.h
@@ -0,0 +1,36 @@
1/* Standard UART definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12/*
13 * The ASB2305 has an 18.432 MHz clock the UART
14 */
15#define BASE_BAUD (18432000 / 16)
16
17/* Standard COM flags (except for COM4, because of the 8514 problem) */
18#ifdef CONFIG_SERIAL_DETECT_IRQ
19#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ)
20#define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_AUTO_IRQ)
21#else
22#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
23#define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF
24#endif
25
26#ifdef CONFIG_SERIAL_MANY_PORTS
27#define FOURPORT_FLAGS ASYNC_FOURPORT
28#define ACCENT_FLAGS 0
29#define BOCA_FLAGS 0
30#define HUB6_FLAGS 0
31#define RS_TABLE_SIZE 64
32#else
33#define RS_TABLE_SIZE
34#endif
35
36#include <unit/serial.h>
diff --git a/arch/mn10300/include/asm/setup.h b/arch/mn10300/include/asm/setup.h
new file mode 100644
index 000000000000..08356c832283
--- /dev/null
+++ b/arch/mn10300/include/asm/setup.h
@@ -0,0 +1,17 @@
1/* MN10300 Setup declarations
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_SETUP_H
12#define _ASM_SETUP_H
13
14extern void __init unit_setup(void);
15extern void __init unit_init_IRQ(void);
16
17#endif /* _ASM_SETUP_H */
diff --git a/arch/mn10300/include/asm/shmbuf.h b/arch/mn10300/include/asm/shmbuf.h
new file mode 100644
index 000000000000..8f300cc35d6c
--- /dev/null
+++ b/arch/mn10300/include/asm/shmbuf.h
@@ -0,0 +1,42 @@
1#ifndef _ASM_SHMBUF_H
2#define _ASM_SHMBUF_H
3
4/*
5 * The shmid64_ds structure for MN10300 architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct shmid64_ds {
15 struct ipc64_perm shm_perm; /* operation perms */
16 size_t shm_segsz; /* size of segment (bytes) */
17 __kernel_time_t shm_atime; /* last attach time */
18 unsigned long __unused1;
19 __kernel_time_t shm_dtime; /* last detach time */
20 unsigned long __unused2;
21 __kernel_time_t shm_ctime; /* last change time */
22 unsigned long __unused3;
23 __kernel_pid_t shm_cpid; /* pid of creator */
24 __kernel_pid_t shm_lpid; /* pid of last operator */
25 unsigned long shm_nattch; /* no. of current attaches */
26 unsigned long __unused4;
27 unsigned long __unused5;
28};
29
30struct shminfo64 {
31 unsigned long shmmax;
32 unsigned long shmmin;
33 unsigned long shmmni;
34 unsigned long shmseg;
35 unsigned long shmall;
36 unsigned long __unused1;
37 unsigned long __unused2;
38 unsigned long __unused3;
39 unsigned long __unused4;
40};
41
42#endif /* _ASM_SHMBUF_H */
diff --git a/arch/mn10300/include/asm/shmparam.h b/arch/mn10300/include/asm/shmparam.h
new file mode 100644
index 000000000000..ab666ed1a070
--- /dev/null
+++ b/arch/mn10300/include/asm/shmparam.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_SHMPARAM_H
2#define _ASM_SHMPARAM_H
3
4#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
5
6#endif /* _ASM_SHMPARAM_H */
diff --git a/arch/mn10300/include/asm/sigcontext.h b/arch/mn10300/include/asm/sigcontext.h
new file mode 100644
index 000000000000..4de3afff4ad7
--- /dev/null
+++ b/arch/mn10300/include/asm/sigcontext.h
@@ -0,0 +1,52 @@
1/* MN10300 Userspace signal context
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_SIGCONTEXT_H
12#define _ASM_SIGCONTEXT_H
13
14struct fpucontext {
15 /* Regular FPU environment */
16 unsigned long fs[32]; /* fpu registers */
17 unsigned long fpcr; /* fpu control register */
18};
19
20struct sigcontext {
21 unsigned long d0;
22 unsigned long d1;
23 unsigned long d2;
24 unsigned long d3;
25 unsigned long a0;
26 unsigned long a1;
27 unsigned long a2;
28 unsigned long a3;
29 unsigned long e0;
30 unsigned long e1;
31 unsigned long e2;
32 unsigned long e3;
33 unsigned long e4;
34 unsigned long e5;
35 unsigned long e6;
36 unsigned long e7;
37 unsigned long lar;
38 unsigned long lir;
39 unsigned long mdr;
40 unsigned long mcvf;
41 unsigned long mcrl;
42 unsigned long mcrh;
43 unsigned long mdrq;
44 unsigned long sp;
45 unsigned long epsw;
46 unsigned long pc;
47 struct fpucontext *fpucontext;
48 unsigned long oldmask;
49};
50
51
52#endif /* _ASM_SIGCONTEXT_H */
diff --git a/arch/mn10300/include/asm/siginfo.h b/arch/mn10300/include/asm/siginfo.h
new file mode 100644
index 000000000000..0815d29d82e5
--- /dev/null
+++ b/arch/mn10300/include/asm/siginfo.h
@@ -0,0 +1 @@
#include <asm-generic/siginfo.h>
diff --git a/arch/mn10300/include/asm/signal.h b/arch/mn10300/include/asm/signal.h
new file mode 100644
index 000000000000..e98817cec5f7
--- /dev/null
+++ b/arch/mn10300/include/asm/signal.h
@@ -0,0 +1,171 @@
1/* MN10300 Signal definitions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_SIGNAL_H
12#define _ASM_SIGNAL_H
13
14#include <linux/types.h>
15
16/* Avoid too many header ordering problems. */
17struct siginfo;
18
19#ifdef __KERNEL__
20/* Most things should be clean enough to redefine this at will, if care
21 is taken to make libc match. */
22
23#define _NSIG 64
24#define _NSIG_BPW 32
25#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
26
27typedef unsigned long old_sigset_t; /* at least 32 bits */
28
29typedef struct {
30 unsigned long sig[_NSIG_WORDS];
31} sigset_t;
32
33#else
34/* Here we must cater to libcs that poke about in kernel headers. */
35
36#define NSIG 32
37typedef unsigned long sigset_t;
38
39#endif /* __KERNEL__ */
40
41#define SIGHUP 1
42#define SIGINT 2
43#define SIGQUIT 3
44#define SIGILL 4
45#define SIGTRAP 5
46#define SIGABRT 6
47#define SIGIOT 6
48#define SIGBUS 7
49#define SIGFPE 8
50#define SIGKILL 9
51#define SIGUSR1 10
52#define SIGSEGV 11
53#define SIGUSR2 12
54#define SIGPIPE 13
55#define SIGALRM 14
56#define SIGTERM 15
57#define SIGSTKFLT 16
58#define SIGCHLD 17
59#define SIGCONT 18
60#define SIGSTOP 19
61#define SIGTSTP 20
62#define SIGTTIN 21
63#define SIGTTOU 22
64#define SIGURG 23
65#define SIGXCPU 24
66#define SIGXFSZ 25
67#define SIGVTALRM 26
68#define SIGPROF 27
69#define SIGWINCH 28
70#define SIGIO 29
71#define SIGPOLL SIGIO
72/*
73#define SIGLOST 29
74*/
75#define SIGPWR 30
76#define SIGSYS 31
77#define SIGUNUSED 31
78
79/* These should not be considered constants from userland. */
80#define SIGRTMIN 32
81#define SIGRTMAX (_NSIG-1)
82
83/*
84 * SA_FLAGS values:
85 *
86 * SA_ONSTACK indicates that a registered stack_t will be used.
87 * SA_RESTART flag to get restarting signals (which were the default long ago)
88 * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
89 * SA_RESETHAND clears the handler when the signal is delivered.
90 * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
91 * SA_NODEFER prevents the current signal from being masked in the handler.
92 *
93 * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
94 * Unix names RESETHAND and NODEFER respectively.
95 */
96#define SA_NOCLDSTOP 0x00000001U
97#define SA_NOCLDWAIT 0x00000002U
98#define SA_SIGINFO 0x00000004U
99#define SA_ONSTACK 0x08000000U
100#define SA_RESTART 0x10000000U
101#define SA_NODEFER 0x40000000U
102#define SA_RESETHAND 0x80000000U
103
104#define SA_NOMASK SA_NODEFER
105#define SA_ONESHOT SA_RESETHAND
106
107#define SA_RESTORER 0x04000000
108
109/*
110 * sigaltstack controls
111 */
112#define SS_ONSTACK 1
113#define SS_DISABLE 2
114
115#define MINSIGSTKSZ 2048
116#define SIGSTKSZ 8192
117
118#include <asm-generic/signal.h>
119
120#ifdef __KERNEL__
121struct old_sigaction {
122 __sighandler_t sa_handler;
123 old_sigset_t sa_mask;
124 unsigned long sa_flags;
125 __sigrestore_t sa_restorer;
126};
127
128struct sigaction {
129 __sighandler_t sa_handler;
130 unsigned long sa_flags;
131 __sigrestore_t sa_restorer;
132 sigset_t sa_mask; /* mask last for extensibility */
133};
134
135struct k_sigaction {
136 struct sigaction sa;
137};
138#else
139/* Here we must cater to libcs that poke about in kernel headers. */
140
141struct sigaction {
142 union {
143 __sighandler_t _sa_handler;
144 void (*_sa_sigaction)(int, struct siginfo *, void *);
145 } _u;
146 sigset_t sa_mask;
147 unsigned long sa_flags;
148 void (*sa_restorer)(void);
149};
150
151#define sa_handler _u._sa_handler
152#define sa_sigaction _u._sa_sigaction
153
154#endif /* __KERNEL__ */
155
156typedef struct sigaltstack {
157 void __user *ss_sp;
158 int ss_flags;
159 size_t ss_size;
160} stack_t;
161
162#ifdef __KERNEL__
163#include <asm/sigcontext.h>
164
165
166struct pt_regs;
167#define ptrace_signal_deliver(regs, cookie) do { } while (0)
168
169#endif /* __KERNEL__ */
170
171#endif /* _ASM_SIGNAL_H */
diff --git a/arch/mn10300/include/asm/smp.h b/arch/mn10300/include/asm/smp.h
new file mode 100644
index 000000000000..4eb8c61b7dab
--- /dev/null
+++ b/arch/mn10300/include/asm/smp.h
@@ -0,0 +1,18 @@
1/* MN10300 SMP support
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_SMP_H
12#define _ASM_SMP_H
13
14#ifdef CONFIG_SMP
15#error SMP not yet supported for MN10300
16#endif
17
18#endif
diff --git a/arch/mn10300/include/asm/socket.h b/arch/mn10300/include/asm/socket.h
new file mode 100644
index 000000000000..fb5daf438ec9
--- /dev/null
+++ b/arch/mn10300/include/asm/socket.h
@@ -0,0 +1,60 @@
1#ifndef _ASM_SOCKET_H
2#define _ASM_SOCKET_H
3
4#include <asm/sockios.h>
5
6/* For setsockopt(2) */
7#define SOL_SOCKET 1
8
9#define SO_DEBUG 1
10#define SO_REUSEADDR 2
11#define SO_TYPE 3
12#define SO_ERROR 4
13#define SO_DONTROUTE 5
14#define SO_BROADCAST 6
15#define SO_SNDBUF 7
16#define SO_RCVBUF 8
17#define SO_SNDBUFFORCE 32
18#define SO_RCVBUFFORCE 33
19#define SO_KEEPALIVE 9
20#define SO_OOBINLINE 10
21#define SO_NO_CHECK 11
22#define SO_PRIORITY 12
23#define SO_LINGER 13
24#define SO_BSDCOMPAT 14
25/* To add :#define SO_REUSEPORT 15 */
26#define SO_PASSCRED 16
27#define SO_PEERCRED 17
28#define SO_RCVLOWAT 18
29#define SO_SNDLOWAT 19
30#define SO_RCVTIMEO 20
31#define SO_SNDTIMEO 21
32
33/* Security levels - as per NRL IPv6 - don't actually do anything */
34#define SO_SECURITY_AUTHENTICATION 22
35#define SO_SECURITY_ENCRYPTION_TRANSPORT 23
36#define SO_SECURITY_ENCRYPTION_NETWORK 24
37
38#define SO_BINDTODEVICE 25
39
40/* Socket filtering */
41#define SO_ATTACH_FILTER 26
42#define SO_DETACH_FILTER 27
43
44#define SO_PEERNAME 28
45#define SO_TIMESTAMP 29
46#define SCM_TIMESTAMP SO_TIMESTAMP
47
48#define SO_ACCEPTCONN 30
49
50#define SO_PEERSEC 31
51#define SO_PASSSEC 34
52#define SO_TIMESTAMPNS 35
53#define SCM_TIMESTAMPNS SO_TIMESTAMPNS
54
55#define SO_MARK 36
56
57#define SO_TIMESTAMPING 37
58#define SCM_TIMESTAMPING SO_TIMESTAMPING
59
60#endif /* _ASM_SOCKET_H */
diff --git a/arch/mn10300/include/asm/sockios.h b/arch/mn10300/include/asm/sockios.h
new file mode 100644
index 000000000000..b03043a1c564
--- /dev/null
+++ b/arch/mn10300/include/asm/sockios.h
@@ -0,0 +1,13 @@
1#ifndef _ASM_SOCKIOS_H
2#define _ASM_SOCKIOS_H
3
4/* Socket-level I/O control calls. */
5#define FIOSETOWN 0x8901
6#define SIOCSPGRP 0x8902
7#define FIOGETOWN 0x8903
8#define SIOCGPGRP 0x8904
9#define SIOCATMARK 0x8905
10#define SIOCGSTAMP 0x8906 /* Get stamp */
11#define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */
12
13#endif /* _ASM_SOCKIOS_H */
diff --git a/arch/mn10300/include/asm/spinlock.h b/arch/mn10300/include/asm/spinlock.h
new file mode 100644
index 000000000000..4bf9c8b169e0
--- /dev/null
+++ b/arch/mn10300/include/asm/spinlock.h
@@ -0,0 +1,16 @@
1/* MN10300 spinlock support
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_SPINLOCK_H
12#define _ASM_SPINLOCK_H
13
14#error SMP spinlocks not implemented for MN10300
15
16#endif /* _ASM_SPINLOCK_H */
diff --git a/arch/mn10300/include/asm/stat.h b/arch/mn10300/include/asm/stat.h
new file mode 100644
index 000000000000..63ff8371cf2c
--- /dev/null
+++ b/arch/mn10300/include/asm/stat.h
@@ -0,0 +1,78 @@
1#ifndef _ASM_STAT_H
2#define _ASM_STAT_H
3
4struct __old_kernel_stat {
5 unsigned short st_dev;
6 unsigned short st_ino;
7 unsigned short st_mode;
8 unsigned short st_nlink;
9 unsigned short st_uid;
10 unsigned short st_gid;
11 unsigned short st_rdev;
12 unsigned long st_size;
13 unsigned long st_atime;
14 unsigned long st_mtime;
15 unsigned long st_ctime;
16};
17
18struct stat {
19 unsigned long st_dev;
20 unsigned long st_ino;
21 unsigned short st_mode;
22 unsigned short st_nlink;
23 unsigned short st_uid;
24 unsigned short st_gid;
25 unsigned long st_rdev;
26 unsigned long st_size;
27 unsigned long st_blksize;
28 unsigned long st_blocks;
29 unsigned long st_atime;
30 unsigned long st_atime_nsec;
31 unsigned long st_mtime;
32 unsigned long st_mtime_nsec;
33 unsigned long st_ctime;
34 unsigned long st_ctime_nsec;
35 unsigned long __unused4;
36 unsigned long __unused5;
37};
38
39/* This matches struct stat64 in glibc2.1, hence the absolutely
40 * insane amounts of padding around dev_t's.
41 */
42struct stat64 {
43 unsigned long long st_dev;
44 unsigned char __pad0[4];
45
46#define STAT64_HAS_BROKEN_ST_INO 1
47 unsigned long __st_ino;
48
49 unsigned int st_mode;
50 unsigned int st_nlink;
51
52 unsigned long st_uid;
53 unsigned long st_gid;
54
55 unsigned long long st_rdev;
56 unsigned char __pad3[4];
57
58 long long st_size;
59 unsigned long st_blksize;
60
61 unsigned long st_blocks; /* Number 512-byte blocks allocated. */
62 unsigned long __pad4; /* future possible st_blocks high bits */
63
64 unsigned long st_atime;
65 unsigned long st_atime_nsec;
66
67 unsigned long st_mtime;
68 unsigned int st_mtime_nsec;
69
70 unsigned long st_ctime;
71 unsigned long st_ctime_nsec;
72
73 unsigned long long st_ino;
74};
75
76#define STAT_HAVE_NSEC 1
77
78#endif /* _ASM_STAT_H */
diff --git a/arch/mn10300/include/asm/statfs.h b/arch/mn10300/include/asm/statfs.h
new file mode 100644
index 000000000000..0b91fe198c20
--- /dev/null
+++ b/arch/mn10300/include/asm/statfs.h
@@ -0,0 +1 @@
#include <asm-generic/statfs.h>
diff --git a/arch/mn10300/include/asm/string.h b/arch/mn10300/include/asm/string.h
new file mode 100644
index 000000000000..47dbd4346c32
--- /dev/null
+++ b/arch/mn10300/include/asm/string.h
@@ -0,0 +1,32 @@
1/* MN10300 Optimised string functions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Modified by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_STRING_H
13#define _ASM_STRING_H
14
15#define __HAVE_ARCH_MEMSET
16#define __HAVE_ARCH_MEMCPY
17#define __HAVE_ARCH_MEMMOVE
18
19extern void *memset(void *dest, int ch, size_t count);
20extern void *memcpy(void *dest, const void *src, size_t count);
21extern void *memmove(void *dest, const void *src, size_t count);
22
23
24extern void __struct_cpy_bug(void);
25#define struct_cpy(x, y) \
26({ \
27 if (sizeof(*(x)) != sizeof(*(y))) \
28 __struct_cpy_bug; \
29 memcpy(x, y, sizeof(*(x))); \
30})
31
32#endif /* _ASM_STRING_H */
diff --git a/arch/mn10300/include/asm/swab.h b/arch/mn10300/include/asm/swab.h
new file mode 100644
index 000000000000..bd818a820ca8
--- /dev/null
+++ b/arch/mn10300/include/asm/swab.h
@@ -0,0 +1,42 @@
1/* MN10300 Byte-order primitive construction
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_SWAB_H
12#define _ASM_SWAB_H
13
14#include <linux/types.h>
15
16#ifdef __GNUC__
17
18static inline __attribute__((const))
19__u32 __arch_swab32(__u32 x)
20{
21 __u32 ret;
22 asm("swap %1,%0" : "=r" (ret) : "r" (x));
23 return ret;
24}
25#define __arch_swab32 __arch_swab32
26
27static inline __attribute__((const))
28__u16 __arch_swab16(__u16 x)
29{
30 __u16 ret;
31 asm("swaph %1,%0" : "=r" (ret) : "r" (x));
32 return ret;
33}
34#define __arch_swab32 __arch_swab32
35
36#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
37# define __SWAB_64_THRU_32__
38#endif
39
40#endif /* __GNUC__ */
41
42#endif /* _ASM_SWAB_H */
diff --git a/arch/mn10300/include/asm/system.h b/arch/mn10300/include/asm/system.h
new file mode 100644
index 000000000000..8214fb7e7fe4
--- /dev/null
+++ b/arch/mn10300/include/asm/system.h
@@ -0,0 +1,237 @@
1/* MN10300 System definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_SYSTEM_H
12#define _ASM_SYSTEM_H
13
14#include <asm/cpu-regs.h>
15
16#ifdef __KERNEL__
17#ifndef __ASSEMBLY__
18
19#include <linux/kernel.h>
20
21struct task_struct;
22struct thread_struct;
23
24extern asmlinkage
25struct task_struct *__switch_to(struct thread_struct *prev,
26 struct thread_struct *next,
27 struct task_struct *prev_task);
28
29/* context switching is now performed out-of-line in switch_to.S */
30#define switch_to(prev, next, last) \
31do { \
32 current->thread.wchan = (u_long) __builtin_return_address(0); \
33 (last) = __switch_to(&(prev)->thread, &(next)->thread, (prev)); \
34 mb(); \
35 current->thread.wchan = 0; \
36} while (0)
37
38#define arch_align_stack(x) (x)
39
40#define nop() asm volatile ("nop")
41
42#endif /* !__ASSEMBLY__ */
43
44/*
45 * Force strict CPU ordering.
46 * And yes, this is required on UP too when we're talking
47 * to devices.
48 *
49 * For now, "wmb()" doesn't actually do anything, as all
50 * Intel CPU's follow what Intel calls a *Processor Order*,
51 * in which all writes are seen in the program order even
52 * outside the CPU.
53 *
54 * I expect future Intel CPU's to have a weaker ordering,
55 * but I'd also expect them to finally get their act together
56 * and add some real memory barriers if so.
57 *
58 * Some non intel clones support out of order store. wmb() ceases to be a
59 * nop for these.
60 */
61
62#define mb() asm volatile ("": : :"memory")
63#define rmb() mb()
64#define wmb() asm volatile ("": : :"memory")
65
66#ifdef CONFIG_SMP
67#define smp_mb() mb()
68#define smp_rmb() rmb()
69#define smp_wmb() wmb()
70#else
71#define smp_mb() barrier()
72#define smp_rmb() barrier()
73#define smp_wmb() barrier()
74#endif
75
76#define set_mb(var, value) do { var = value; mb(); } while (0)
77#define set_wmb(var, value) do { var = value; wmb(); } while (0)
78
79#define read_barrier_depends() do {} while (0)
80#define smp_read_barrier_depends() do {} while (0)
81
82/*****************************************************************************/
83/*
84 * interrupt control
85 * - "disabled": run in IM1/2
86 * - level 0 - GDB stub
87 * - level 1 - virtual serial DMA (if present)
88 * - level 5 - normal interrupt priority
89 * - level 6 - timer interrupt
90 * - "enabled": run in IM7
91 */
92#ifdef CONFIG_MN10300_TTYSM
93#define MN10300_CLI_LEVEL EPSW_IM_2
94#else
95#define MN10300_CLI_LEVEL EPSW_IM_1
96#endif
97
98#define local_save_flags(x) \
99do { \
100 typecheck(unsigned long, x); \
101 asm volatile( \
102 " mov epsw,%0 \n" \
103 : "=d"(x) \
104 ); \
105} while (0)
106
107#define local_irq_disable() \
108do { \
109 asm volatile( \
110 " and %0,epsw \n" \
111 " or %1,epsw \n" \
112 " nop \n" \
113 " nop \n" \
114 " nop \n" \
115 : \
116 : "i"(~EPSW_IM), "i"(EPSW_IE | MN10300_CLI_LEVEL) \
117 ); \
118} while (0)
119
120#define local_irq_save(x) \
121do { \
122 local_save_flags(x); \
123 local_irq_disable(); \
124} while (0)
125
126/*
127 * we make sure local_irq_enable() doesn't cause priority inversion
128 */
129#ifndef __ASSEMBLY__
130
131extern unsigned long __mn10300_irq_enabled_epsw;
132
133#endif
134
135#define local_irq_enable() \
136do { \
137 unsigned long tmp; \
138 \
139 asm volatile( \
140 " mov epsw,%0 \n" \
141 " and %1,%0 \n" \
142 " or %2,%0 \n" \
143 " mov %0,epsw \n" \
144 : "=&d"(tmp) \
145 : "i"(~EPSW_IM), "r"(__mn10300_irq_enabled_epsw) \
146 ); \
147} while (0)
148
149#define local_irq_restore(x) \
150do { \
151 typecheck(unsigned long, x); \
152 asm volatile( \
153 " mov %0,epsw \n" \
154 " nop \n" \
155 " nop \n" \
156 " nop \n" \
157 : \
158 : "d"(x) \
159 : "memory", "cc" \
160 ); \
161} while (0)
162
163#define irqs_disabled() \
164({ \
165 unsigned long flags; \
166 local_save_flags(flags); \
167 (flags & EPSW_IM) <= MN10300_CLI_LEVEL; \
168})
169
170/* hook to save power by halting the CPU
171 * - called from the idle loop
172 * - must reenable interrupts (which takes three instruction cycles to complete)
173 */
174#define safe_halt() \
175do { \
176 asm volatile(" or %0,epsw \n" \
177 " nop \n" \
178 " nop \n" \
179 " bset %2,(%1) \n" \
180 : \
181 : "i"(EPSW_IE|EPSW_IM), "n"(&CPUM), "i"(CPUM_SLEEP)\
182 : "cc" \
183 ); \
184} while (0)
185
186#define STI or EPSW_IE|EPSW_IM,epsw
187#define CLI and ~EPSW_IM,epsw; or EPSW_IE|MN10300_CLI_LEVEL,epsw; nop; nop; nop
188
189/*****************************************************************************/
190/*
191 * MN10300 doesn't actually have an exchange instruction
192 */
193#ifndef __ASSEMBLY__
194
195struct __xchg_dummy { unsigned long a[100]; };
196#define __xg(x) ((struct __xchg_dummy *)(x))
197
198static inline
199unsigned long __xchg(volatile unsigned long *m, unsigned long val)
200{
201 unsigned long retval;
202 unsigned long flags;
203
204 local_irq_save(flags);
205 retval = *m;
206 *m = val;
207 local_irq_restore(flags);
208 return retval;
209}
210
211#define xchg(ptr, v) \
212 ((__typeof__(*(ptr))) __xchg((unsigned long *)(ptr), \
213 (unsigned long)(v)))
214
215static inline unsigned long __cmpxchg(volatile unsigned long *m,
216 unsigned long old, unsigned long new)
217{
218 unsigned long retval;
219 unsigned long flags;
220
221 local_irq_save(flags);
222 retval = *m;
223 if (retval == old)
224 *m = new;
225 local_irq_restore(flags);
226 return retval;
227}
228
229#define cmpxchg(ptr, o, n) \
230 ((__typeof__(*(ptr))) __cmpxchg((unsigned long *)(ptr), \
231 (unsigned long)(o), \
232 (unsigned long)(n)))
233
234#endif /* !__ASSEMBLY__ */
235
236#endif /* __KERNEL__ */
237#endif /* _ASM_SYSTEM_H */
diff --git a/arch/mn10300/include/asm/termbits.h b/arch/mn10300/include/asm/termbits.h
new file mode 100644
index 000000000000..eb2b0dc1f696
--- /dev/null
+++ b/arch/mn10300/include/asm/termbits.h
@@ -0,0 +1,200 @@
1#ifndef _ASM_TERMBITS_H
2#define _ASM_TERMBITS_H
3
4#include <linux/posix_types.h>
5
6typedef unsigned char cc_t;
7typedef unsigned int speed_t;
8typedef unsigned int tcflag_t;
9
10#define NCCS 19
11struct termios {
12 tcflag_t c_iflag; /* input mode flags */
13 tcflag_t c_oflag; /* output mode flags */
14 tcflag_t c_cflag; /* control mode flags */
15 tcflag_t c_lflag; /* local mode flags */
16 cc_t c_line; /* line discipline */
17 cc_t c_cc[NCCS]; /* control characters */
18};
19
20struct termios2 {
21 tcflag_t c_iflag; /* input mode flags */
22 tcflag_t c_oflag; /* output mode flags */
23 tcflag_t c_cflag; /* control mode flags */
24 tcflag_t c_lflag; /* local mode flags */
25 cc_t c_line; /* line discipline */
26 cc_t c_cc[NCCS]; /* control characters */
27 speed_t c_ispeed; /* input speed */
28 speed_t c_ospeed; /* output speed */
29};
30
31struct ktermios {
32 tcflag_t c_iflag; /* input mode flags */
33 tcflag_t c_oflag; /* output mode flags */
34 tcflag_t c_cflag; /* control mode flags */
35 tcflag_t c_lflag; /* local mode flags */
36 cc_t c_line; /* line discipline */
37 cc_t c_cc[NCCS]; /* control characters */
38 speed_t c_ispeed; /* input speed */
39 speed_t c_ospeed; /* output speed */
40};
41
42/* c_cc characters */
43#define VINTR 0
44#define VQUIT 1
45#define VERASE 2
46#define VKILL 3
47#define VEOF 4
48#define VTIME 5
49#define VMIN 6
50#define VSWTC 7
51#define VSTART 8
52#define VSTOP 9
53#define VSUSP 10
54#define VEOL 11
55#define VREPRINT 12
56#define VDISCARD 13
57#define VWERASE 14
58#define VLNEXT 15
59#define VEOL2 16
60
61
62/* c_iflag bits */
63#define IGNBRK 0000001
64#define BRKINT 0000002
65#define IGNPAR 0000004
66#define PARMRK 0000010
67#define INPCK 0000020
68#define ISTRIP 0000040
69#define INLCR 0000100
70#define IGNCR 0000200
71#define ICRNL 0000400
72#define IUCLC 0001000
73#define IXON 0002000
74#define IXANY 0004000
75#define IXOFF 0010000
76#define IMAXBEL 0020000
77#define IUTF8 0040000
78
79/* c_oflag bits */
80#define OPOST 0000001
81#define OLCUC 0000002
82#define ONLCR 0000004
83#define OCRNL 0000010
84#define ONOCR 0000020
85#define ONLRET 0000040
86#define OFILL 0000100
87#define OFDEL 0000200
88#define NLDLY 0000400
89#define NL0 0000000
90#define NL1 0000400
91#define CRDLY 0003000
92#define CR0 0000000
93#define CR1 0001000
94#define CR2 0002000
95#define CR3 0003000
96#define TABDLY 0014000
97#define TAB0 0000000
98#define TAB1 0004000
99#define TAB2 0010000
100#define TAB3 0014000
101#define XTABS 0014000
102#define BSDLY 0020000
103#define BS0 0000000
104#define BS1 0020000
105#define VTDLY 0040000
106#define VT0 0000000
107#define VT1 0040000
108#define FFDLY 0100000
109#define FF0 0000000
110#define FF1 0100000
111
112/* c_cflag bit meaning */
113#define CBAUD 0010017
114#define B0 0000000 /* hang up */
115#define B50 0000001
116#define B75 0000002
117#define B110 0000003
118#define B134 0000004
119#define B150 0000005
120#define B200 0000006
121#define B300 0000007
122#define B600 0000010
123#define B1200 0000011
124#define B1800 0000012
125#define B2400 0000013
126#define B4800 0000014
127#define B9600 0000015
128#define B19200 0000016
129#define B38400 0000017
130#define EXTA B19200
131#define EXTB B38400
132#define CSIZE 0000060
133#define CS5 0000000
134#define CS6 0000020
135#define CS7 0000040
136#define CS8 0000060
137#define CSTOPB 0000100
138#define CREAD 0000200
139#define PARENB 0000400
140#define PARODD 0001000
141#define HUPCL 0002000
142#define CLOCAL 0004000
143#define CBAUDEX 0010000
144#define BOTHER 0010000
145#define B57600 0010001
146#define B115200 0010002
147#define B230400 0010003
148#define B460800 0010004
149#define B500000 0010005
150#define B576000 0010006
151#define B921600 0010007
152#define B1000000 0010010
153#define B1152000 0010011
154#define B1500000 0010012
155#define B2000000 0010013
156#define B2500000 0010014
157#define B3000000 0010015
158#define B3500000 0010016
159#define B4000000 0010017
160#define CIBAUD 002003600000 /* input baud rate (not used) */
161#define CTVB 004000000000 /* VisioBraille Terminal flow control */
162#define CMSPAR 010000000000 /* mark or space (stick) parity */
163#define CRTSCTS 020000000000 /* flow control */
164
165#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */
166
167/* c_lflag bits */
168#define ISIG 0000001
169#define ICANON 0000002
170#define XCASE 0000004
171#define ECHO 0000010
172#define ECHOE 0000020
173#define ECHOK 0000040
174#define ECHONL 0000100
175#define NOFLSH 0000200
176#define TOSTOP 0000400
177#define ECHOCTL 0001000
178#define ECHOPRT 0002000
179#define ECHOKE 0004000
180#define FLUSHO 0010000
181#define PENDIN 0040000
182#define IEXTEN 0100000
183
184/* tcflow() and TCXONC use these */
185#define TCOOFF 0
186#define TCOON 1
187#define TCIOFF 2
188#define TCION 3
189
190/* tcflush() and TCFLSH use these */
191#define TCIFLUSH 0
192#define TCOFLUSH 1
193#define TCIOFLUSH 2
194
195/* tcsetattr uses these */
196#define TCSANOW 0
197#define TCSADRAIN 1
198#define TCSAFLUSH 2
199
200#endif /* _ASM_TERMBITS_H */
diff --git a/arch/mn10300/include/asm/termios.h b/arch/mn10300/include/asm/termios.h
new file mode 100644
index 000000000000..dd7cf617e118
--- /dev/null
+++ b/arch/mn10300/include/asm/termios.h
@@ -0,0 +1,92 @@
1#ifndef _ASM_TERMIOS_H
2#define _ASM_TERMIOS_H
3
4#include <asm/termbits.h>
5#include <asm/ioctls.h>
6
7struct winsize {
8 unsigned short ws_row;
9 unsigned short ws_col;
10 unsigned short ws_xpixel;
11 unsigned short ws_ypixel;
12};
13
14#define NCC 8
15struct termio {
16 unsigned short c_iflag; /* input mode flags */
17 unsigned short c_oflag; /* output mode flags */
18 unsigned short c_cflag; /* control mode flags */
19 unsigned short c_lflag; /* local mode flags */
20 unsigned char c_line; /* line discipline */
21 unsigned char c_cc[NCC]; /* control characters */
22};
23
24#ifdef __KERNEL__
25/* intr=^C quit=^| erase=del kill=^U
26 eof=^D vtime=\0 vmin=\1 sxtc=\0
27 start=^Q stop=^S susp=^Z eol=\0
28 reprint=^R discard=^U werase=^W lnext=^V
29 eol2=\0
30*/
31#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
32#endif
33
34/* modem lines */
35#define TIOCM_LE 0x001
36#define TIOCM_DTR 0x002
37#define TIOCM_RTS 0x004
38#define TIOCM_ST 0x008
39#define TIOCM_SR 0x010
40#define TIOCM_CTS 0x020
41#define TIOCM_CAR 0x040
42#define TIOCM_RNG 0x080
43#define TIOCM_DSR 0x100
44#define TIOCM_CD TIOCM_CAR
45#define TIOCM_RI TIOCM_RNG
46#define TIOCM_OUT1 0x2000
47#define TIOCM_OUT2 0x4000
48#define TIOCM_LOOP 0x8000
49
50#define TIOCM_MODEM_BITS TIOCM_OUT2 /* IRDA support */
51
52/*
53 * Translate a "termio" structure into a "termios". Ugh.
54 */
55#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \
56 unsigned short __tmp; \
57 get_user(__tmp, &(termio)->x); \
58 *(unsigned short *) &(termios)->x = __tmp; \
59}
60
61#define user_termio_to_kernel_termios(termios, termio) \
62({ \
63 SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \
64 SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \
65 SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \
66 SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \
67 copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
68})
69
70/*
71 * Translate a "termios" structure into a "termio". Ugh.
72 */
73#define kernel_termios_to_user_termio(termio, termios) \
74({ \
75 put_user((termios)->c_iflag, &(termio)->c_iflag); \
76 put_user((termios)->c_oflag, &(termio)->c_oflag); \
77 put_user((termios)->c_cflag, &(termio)->c_cflag); \
78 put_user((termios)->c_lflag, &(termio)->c_lflag); \
79 put_user((termios)->c_line, &(termio)->c_line); \
80 copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
81})
82
83#define user_termios_to_kernel_termios(k, u) \
84 copy_from_user(k, u, sizeof(struct termios2))
85#define kernel_termios_to_user_termios(u, k) \
86 copy_to_user(u, k, sizeof(struct termios2))
87#define user_termios_to_kernel_termios_1(k, u) \
88 copy_from_user(k, u, sizeof(struct termios))
89#define kernel_termios_to_user_termios_1(u, k) \
90 copy_to_user(u, k, sizeof(struct termios))
91
92#endif /* _ASM_TERMIOS_H */
diff --git a/arch/mn10300/include/asm/thread_info.h b/arch/mn10300/include/asm/thread_info.h
new file mode 100644
index 000000000000..78a3881f3c12
--- /dev/null
+++ b/arch/mn10300/include/asm/thread_info.h
@@ -0,0 +1,170 @@
1/* MN10300 Low-level thread information
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_THREAD_INFO_H
13#define _ASM_THREAD_INFO_H
14
15#ifdef __KERNEL__
16
17#include <asm/page.h>
18
19#ifndef __ASSEMBLY__
20#include <asm/processor.h>
21#endif
22
23#define PREEMPT_ACTIVE 0x10000000
24
25#ifdef CONFIG_4KSTACKS
26#define THREAD_SIZE (4096)
27#else
28#define THREAD_SIZE (8192)
29#endif
30
31#define STACK_WARN (THREAD_SIZE / 8)
32
33/*
34 * low level task data that entry.S needs immediate access to
35 * - this struct should fit entirely inside of one cache line
36 * - this struct shares the supervisor stack pages
37 * - if the contents of this structure are changed, the assembly constants
38 * must also be changed
39 */
40#ifndef __ASSEMBLY__
41
42struct thread_info {
43 struct task_struct *task; /* main task structure */
44 struct exec_domain *exec_domain; /* execution domain */
45 unsigned long flags; /* low level flags */
46 __u32 cpu; /* current CPU */
47 __s32 preempt_count; /* 0 => preemptable, <0 => BUG */
48
49 mm_segment_t addr_limit; /* thread address space:
50 0-0xBFFFFFFF for user-thead
51 0-0xFFFFFFFF for kernel-thread
52 */
53 struct restart_block restart_block;
54
55 __u8 supervisor_stack[0];
56};
57
58#else /* !__ASSEMBLY__ */
59
60#ifndef __ASM_OFFSETS_H__
61#include <asm/asm-offsets.h>
62#endif
63
64#endif
65
66/*
67 * macros/functions for gaining access to the thread information structure
68 *
69 * preempt_count needs to be 1 initially, until the scheduler is functional.
70 */
71#ifndef __ASSEMBLY__
72
73#define INIT_THREAD_INFO(tsk) \
74{ \
75 .task = &tsk, \
76 .exec_domain = &default_exec_domain, \
77 .flags = 0, \
78 .cpu = 0, \
79 .preempt_count = 1, \
80 .addr_limit = KERNEL_DS, \
81 .restart_block = { \
82 .fn = do_no_restart_syscall, \
83 }, \
84}
85
86#define init_thread_info (init_thread_union.thread_info)
87#define init_stack (init_thread_union.stack)
88#define init_uregs \
89 ((struct pt_regs *) \
90 ((unsigned long) init_stack + THREAD_SIZE - sizeof(struct pt_regs)))
91
92extern struct thread_info *__current_ti;
93
94/* how to get the thread information struct from C */
95static inline __attribute__((const))
96struct thread_info *current_thread_info(void)
97{
98 struct thread_info *ti;
99 asm("mov sp,%0\n"
100 "and %1,%0\n"
101 : "=d" (ti)
102 : "i" (~(THREAD_SIZE - 1))
103 : "cc");
104 return ti;
105}
106
107/* how to get the current stack pointer from C */
108static inline unsigned long current_stack_pointer(void)
109{
110 unsigned long sp;
111 asm("mov sp,%0; ":"=r" (sp));
112 return sp;
113}
114
115#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR
116
117/* thread information allocation */
118#ifdef CONFIG_DEBUG_STACK_USAGE
119#define alloc_thread_info(tsk) kzalloc(THREAD_SIZE, GFP_KERNEL)
120#else
121#define alloc_thread_info(tsk) kmalloc(THREAD_SIZE, GFP_KERNEL)
122#endif
123
124#define free_thread_info(ti) kfree((ti))
125#define get_thread_info(ti) get_task_struct((ti)->task)
126#define put_thread_info(ti) put_task_struct((ti)->task)
127
128#else /* !__ASSEMBLY__ */
129
130#ifndef __VMLINUX_LDS__
131/* how to get the thread information struct from ASM */
132.macro GET_THREAD_INFO reg
133 mov sp,\reg
134 and -THREAD_SIZE,\reg
135.endm
136#endif
137#endif
138
139/*
140 * thread information flags
141 * - these are process state flags that various assembly files may need to
142 * access
143 * - pending work-to-be-done flags are in LSW
144 * - other flags in MSW
145 */
146#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
147#define TIF_NOTIFY_RESUME 1 /* resumption notification requested */
148#define TIF_SIGPENDING 2 /* signal pending */
149#define TIF_NEED_RESCHED 3 /* rescheduling necessary */
150#define TIF_SINGLESTEP 4 /* restore singlestep on return to user mode */
151#define TIF_RESTORE_SIGMASK 5 /* restore signal mask in do_signal() */
152#define TIF_POLLING_NRFLAG 16 /* true if poll_idle() is polling TIF_NEED_RESCHED */
153#define TIF_MEMDIE 17 /* OOM killer killed process */
154#define TIF_FREEZE 18 /* freezing for suspend */
155
156#define _TIF_SYSCALL_TRACE +(1 << TIF_SYSCALL_TRACE)
157#define _TIF_NOTIFY_RESUME +(1 << TIF_NOTIFY_RESUME)
158#define _TIF_SIGPENDING +(1 << TIF_SIGPENDING)
159#define _TIF_NEED_RESCHED +(1 << TIF_NEED_RESCHED)
160#define _TIF_SINGLESTEP +(1 << TIF_SINGLESTEP)
161#define _TIF_RESTORE_SIGMASK +(1 << TIF_RESTORE_SIGMASK)
162#define _TIF_POLLING_NRFLAG +(1 << TIF_POLLING_NRFLAG)
163#define _TIF_FREEZE +(1 << TIF_FREEZE)
164
165#define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */
166#define _TIF_ALLWORK_MASK 0x0000FFFF /* work to do on any return to u-space */
167
168#endif /* __KERNEL__ */
169
170#endif /* _ASM_THREAD_INFO_H */
diff --git a/arch/mn10300/include/asm/timer-regs.h b/arch/mn10300/include/asm/timer-regs.h
new file mode 100644
index 000000000000..1d883b7f94ab
--- /dev/null
+++ b/arch/mn10300/include/asm/timer-regs.h
@@ -0,0 +1,293 @@
1/* AM33v2 on-board timer module registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_TIMER_REGS_H
13#define _ASM_TIMER_REGS_H
14
15#include <asm/cpu-regs.h>
16#include <asm/intctl-regs.h>
17
18#ifdef __KERNEL__
19
20/* timer prescalar control */
21#define TMPSCNT __SYSREG(0xd4003071, u8) /* timer prescaler control */
22#define TMPSCNT_ENABLE 0x80 /* timer prescaler enable */
23#define TMPSCNT_DISABLE 0x00 /* timer prescaler disable */
24
25/* 8 bit timers */
26#define TM0MD __SYSREG(0xd4003000, u8) /* timer 0 mode register */
27#define TM0MD_SRC 0x07 /* timer source */
28#define TM0MD_SRC_IOCLK 0x00 /* - IOCLK */
29#define TM0MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
30#define TM0MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
31#define TM0MD_SRC_TM2IO 0x03 /* - TM2IO pin input */
32#define TM0MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
33#define TM0MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
34#define TM0MD_SRC_TM0IO 0x07 /* - TM0IO pin input */
35#define TM0MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
36#define TM0MD_COUNT_ENABLE 0x80 /* timer count enable */
37
38#define TM1MD __SYSREG(0xd4003001, u8) /* timer 1 mode register */
39#define TM1MD_SRC 0x07 /* timer source */
40#define TM1MD_SRC_IOCLK 0x00 /* - IOCLK */
41#define TM1MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
42#define TM1MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
43#define TM1MD_SRC_TM0CASCADE 0x03 /* - cascade with timer 0 */
44#define TM1MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
45#define TM1MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
46#define TM1MD_SRC_TM1IO 0x07 /* - TM1IO pin input */
47#define TM1MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
48#define TM1MD_COUNT_ENABLE 0x80 /* timer count enable */
49
50#define TM2MD __SYSREG(0xd4003002, u8) /* timer 2 mode register */
51#define TM2MD_SRC 0x07 /* timer source */
52#define TM2MD_SRC_IOCLK 0x00 /* - IOCLK */
53#define TM2MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
54#define TM2MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
55#define TM2MD_SRC_TM1CASCADE 0x03 /* - cascade with timer 1 */
56#define TM2MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
57#define TM2MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
58#define TM2MD_SRC_TM2IO 0x07 /* - TM2IO pin input */
59#define TM2MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
60#define TM2MD_COUNT_ENABLE 0x80 /* timer count enable */
61
62#define TM3MD __SYSREG(0xd4003003, u8) /* timer 3 mode register */
63#define TM3MD_SRC 0x07 /* timer source */
64#define TM3MD_SRC_IOCLK 0x00 /* - IOCLK */
65#define TM3MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
66#define TM3MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
67#define TM3MD_SRC_TM1CASCADE 0x03 /* - cascade with timer 2 */
68#define TM3MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
69#define TM3MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
70#define TM3MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
71#define TM3MD_SRC_TM3IO 0x07 /* - TM3IO pin input */
72#define TM3MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
73#define TM3MD_COUNT_ENABLE 0x80 /* timer count enable */
74
75#define TM01MD __SYSREG(0xd4003000, u16) /* timer 0:1 mode register */
76
77#define TM0BR __SYSREG(0xd4003010, u8) /* timer 0 base register */
78#define TM1BR __SYSREG(0xd4003011, u8) /* timer 1 base register */
79#define TM2BR __SYSREG(0xd4003012, u8) /* timer 2 base register */
80#define TM3BR __SYSREG(0xd4003013, u8) /* timer 3 base register */
81#define TM01BR __SYSREG(0xd4003010, u16) /* timer 0:1 base register */
82
83#define TM0BC __SYSREGC(0xd4003020, u8) /* timer 0 binary counter */
84#define TM1BC __SYSREGC(0xd4003021, u8) /* timer 1 binary counter */
85#define TM2BC __SYSREGC(0xd4003022, u8) /* timer 2 binary counter */
86#define TM3BC __SYSREGC(0xd4003023, u8) /* timer 3 binary counter */
87#define TM01BC __SYSREGC(0xd4003020, u16) /* timer 0:1 binary counter */
88
89#define TM0IRQ 2 /* timer 0 IRQ */
90#define TM1IRQ 3 /* timer 1 IRQ */
91#define TM2IRQ 4 /* timer 2 IRQ */
92#define TM3IRQ 5 /* timer 3 IRQ */
93
94#define TM0ICR GxICR(TM0IRQ) /* timer 0 uflow intr ctrl reg */
95#define TM1ICR GxICR(TM1IRQ) /* timer 1 uflow intr ctrl reg */
96#define TM2ICR GxICR(TM2IRQ) /* timer 2 uflow intr ctrl reg */
97#define TM3ICR GxICR(TM3IRQ) /* timer 3 uflow intr ctrl reg */
98
99/* 16-bit timers 4,5 & 7-11 */
100#define TM4MD __SYSREG(0xd4003080, u8) /* timer 4 mode register */
101#define TM4MD_SRC 0x07 /* timer source */
102#define TM4MD_SRC_IOCLK 0x00 /* - IOCLK */
103#define TM4MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
104#define TM4MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
105#define TM4MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
106#define TM4MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
107#define TM4MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
108#define TM4MD_SRC_TM4IO 0x07 /* - TM4IO pin input */
109#define TM4MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
110#define TM4MD_COUNT_ENABLE 0x80 /* timer count enable */
111
112#define TM5MD __SYSREG(0xd4003082, u8) /* timer 5 mode register */
113#define TM5MD_SRC 0x07 /* timer source */
114#define TM5MD_SRC_IOCLK 0x00 /* - IOCLK */
115#define TM5MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
116#define TM5MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
117#define TM5MD_SRC_TM4CASCADE 0x03 /* - cascade with timer 4 */
118#define TM5MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
119#define TM5MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
120#define TM5MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
121#define TM5MD_SRC_TM5IO 0x07 /* - TM5IO pin input */
122#define TM5MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
123#define TM5MD_COUNT_ENABLE 0x80 /* timer count enable */
124
125#define TM7MD __SYSREG(0xd4003086, u8) /* timer 7 mode register */
126#define TM7MD_SRC 0x07 /* timer source */
127#define TM7MD_SRC_IOCLK 0x00 /* - IOCLK */
128#define TM7MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
129#define TM7MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
130#define TM7MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
131#define TM7MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
132#define TM7MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
133#define TM7MD_SRC_TM7IO 0x07 /* - TM7IO pin input */
134#define TM7MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
135#define TM7MD_COUNT_ENABLE 0x80 /* timer count enable */
136
137#define TM8MD __SYSREG(0xd4003088, u8) /* timer 8 mode register */
138#define TM8MD_SRC 0x07 /* timer source */
139#define TM8MD_SRC_IOCLK 0x00 /* - IOCLK */
140#define TM8MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
141#define TM8MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
142#define TM8MD_SRC_TM7CASCADE 0x03 /* - cascade with timer 7 */
143#define TM8MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
144#define TM8MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
145#define TM8MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
146#define TM8MD_SRC_TM8IO 0x07 /* - TM8IO pin input */
147#define TM8MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
148#define TM8MD_COUNT_ENABLE 0x80 /* timer count enable */
149
150#define TM9MD __SYSREG(0xd400308a, u8) /* timer 9 mode register */
151#define TM9MD_SRC 0x07 /* timer source */
152#define TM9MD_SRC_IOCLK 0x00 /* - IOCLK */
153#define TM9MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
154#define TM9MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
155#define TM9MD_SRC_TM8CASCADE 0x03 /* - cascade with timer 8 */
156#define TM9MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
157#define TM9MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
158#define TM9MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
159#define TM9MD_SRC_TM9IO 0x07 /* - TM9IO pin input */
160#define TM9MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
161#define TM9MD_COUNT_ENABLE 0x80 /* timer count enable */
162
163#define TM10MD __SYSREG(0xd400308c, u8) /* timer 10 mode register */
164#define TM10MD_SRC 0x07 /* timer source */
165#define TM10MD_SRC_IOCLK 0x00 /* - IOCLK */
166#define TM10MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
167#define TM10MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
168#define TM10MD_SRC_TM9CASCADE 0x03 /* - cascade with timer 9 */
169#define TM10MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
170#define TM10MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
171#define TM10MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
172#define TM10MD_SRC_TM10IO 0x07 /* - TM10IO pin input */
173#define TM10MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
174#define TM10MD_COUNT_ENABLE 0x80 /* timer count enable */
175
176#define TM11MD __SYSREG(0xd400308e, u8) /* timer 11 mode register */
177#define TM11MD_SRC 0x07 /* timer source */
178#define TM11MD_SRC_IOCLK 0x00 /* - IOCLK */
179#define TM11MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
180#define TM11MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
181#define TM11MD_SRC_TM7CASCADE 0x03 /* - cascade with timer 7 */
182#define TM11MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
183#define TM11MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
184#define TM11MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
185#define TM11MD_SRC_TM11IO 0x07 /* - TM11IO pin input */
186#define TM11MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
187#define TM11MD_COUNT_ENABLE 0x80 /* timer count enable */
188
189#define TM4BR __SYSREG(0xd4003090, u16) /* timer 4 base register */
190#define TM5BR __SYSREG(0xd4003092, u16) /* timer 5 base register */
191#define TM7BR __SYSREG(0xd4003096, u16) /* timer 7 base register */
192#define TM8BR __SYSREG(0xd4003098, u16) /* timer 8 base register */
193#define TM9BR __SYSREG(0xd400309a, u16) /* timer 9 base register */
194#define TM10BR __SYSREG(0xd400309c, u16) /* timer 10 base register */
195#define TM11BR __SYSREG(0xd400309e, u16) /* timer 11 base register */
196#define TM45BR __SYSREG(0xd4003090, u32) /* timer 4:5 base register */
197
198#define TM4BC __SYSREG(0xd40030a0, u16) /* timer 4 binary counter */
199#define TM5BC __SYSREG(0xd40030a2, u16) /* timer 5 binary counter */
200#define TM45BC __SYSREG(0xd40030a0, u32) /* timer 4:5 binary counter */
201
202#define TM7BC __SYSREG(0xd40030a6, u16) /* timer 7 binary counter */
203#define TM8BC __SYSREG(0xd40030a8, u16) /* timer 8 binary counter */
204#define TM9BC __SYSREG(0xd40030aa, u16) /* timer 9 binary counter */
205#define TM10BC __SYSREG(0xd40030ac, u16) /* timer 10 binary counter */
206#define TM11BC __SYSREG(0xd40030ae, u16) /* timer 11 binary counter */
207
208#define TM4IRQ 6 /* timer 4 IRQ */
209#define TM5IRQ 7 /* timer 5 IRQ */
210#define TM7IRQ 11 /* timer 7 IRQ */
211#define TM8IRQ 12 /* timer 8 IRQ */
212#define TM9IRQ 13 /* timer 9 IRQ */
213#define TM10IRQ 14 /* timer 10 IRQ */
214#define TM11IRQ 15 /* timer 11 IRQ */
215
216#define TM4ICR GxICR(TM4IRQ) /* timer 4 uflow intr ctrl reg */
217#define TM5ICR GxICR(TM5IRQ) /* timer 5 uflow intr ctrl reg */
218#define TM7ICR GxICR(TM7IRQ) /* timer 7 uflow intr ctrl reg */
219#define TM8ICR GxICR(TM8IRQ) /* timer 8 uflow intr ctrl reg */
220#define TM9ICR GxICR(TM9IRQ) /* timer 9 uflow intr ctrl reg */
221#define TM10ICR GxICR(TM10IRQ) /* timer 10 uflow intr ctrl reg */
222#define TM11ICR GxICR(TM11IRQ) /* timer 11 uflow intr ctrl reg */
223
224/* 16-bit timer 6 */
225#define TM6MD __SYSREG(0xd4003084, u16) /* timer6 mode register */
226#define TM6MD_SRC 0x0007 /* timer source */
227#define TM6MD_SRC_IOCLK 0x0000 /* - IOCLK */
228#define TM6MD_SRC_IOCLK_8 0x0001 /* - 1/8 IOCLK */
229#define TM6MD_SRC_IOCLK_32 0x0002 /* - 1/32 IOCLK */
230#define TM6MD_SRC_TM0UFLOW 0x0004 /* - timer 0 underflow */
231#define TM6MD_SRC_TM1UFLOW 0x0005 /* - timer 1 underflow */
232#define TM6MD_SRC_TM6IOB_BOTH 0x0006 /* - TM6IOB pin input (both edges) */
233#define TM6MD_SRC_TM6IOB_SINGLE 0x0007 /* - TM6IOB pin input (single edge) */
234#define TM6MD_CLR_ENABLE 0x0010 /* clear count enable */
235#define TM6MD_ONESHOT_ENABLE 0x0040 /* oneshot count */
236#define TM6MD_TRIG_ENABLE 0x0080 /* TM6IOB pin trigger enable */
237#define TM6MD_PWM 0x3800 /* PWM output mode */
238#define TM6MD_PWM_DIS 0x0000 /* - disabled */
239#define TM6MD_PWM_10BIT 0x1000 /* - 10 bits mode */
240#define TM6MD_PWM_11BIT 0x1800 /* - 11 bits mode */
241#define TM6MD_PWM_12BIT 0x3000 /* - 12 bits mode */
242#define TM6MD_PWM_14BIT 0x3800 /* - 14 bits mode */
243#define TM6MD_INIT_COUNTER 0x4000 /* initialize TMnBC to zero */
244#define TM6MD_COUNT_ENABLE 0x8000 /* timer count enable */
245
246#define TM6MDA __SYSREG(0xd40030b4, u8) /* timer6 cmp/cap A mode reg */
247#define TM6MDA_OUT 0x07 /* output select */
248#define TM6MDA_OUT_SETA_RESETB 0x00 /* - set at match A, reset at match B */
249#define TM6MDA_OUT_SETA_RESETOV 0x01 /* - set at match A, reset at overflow */
250#define TM6MDA_OUT_SETA 0x02 /* - set at match A */
251#define TM6MDA_OUT_RESETA 0x03 /* - reset at match A */
252#define TM6MDA_OUT_TOGGLE 0x04 /* - toggle on match A */
253#define TM6MDA_MODE 0xc0 /* compare A register mode */
254#define TM6MDA_MODE_CMP_SINGLE 0x00 /* - compare, single buffer mode */
255#define TM6MDA_MODE_CMP_DOUBLE 0x40 /* - compare, double buffer mode */
256#define TM6MDA_MODE_CAP_S_EDGE 0x80 /* - capture, single edge mode */
257#define TM6MDA_MODE_CAP_D_EDGE 0xc0 /* - capture, double edge mode */
258#define TM6MDA_EDGE 0x20 /* compare A edge select */
259#define TM6MDA_EDGE_FALLING 0x00 /* capture on falling edge */
260#define TM6MDA_EDGE_RISING 0x20 /* capture on rising edge */
261#define TM6MDA_CAPTURE_ENABLE 0x10 /* capture enable */
262
263#define TM6MDB __SYSREG(0xd40030b5, u8) /* timer6 cmp/cap B mode reg */
264#define TM6MDB_OUT 0x07 /* output select */
265#define TM6MDB_OUT_SETB_RESETA 0x00 /* - set at match B, reset at match A */
266#define TM6MDB_OUT_SETB_RESETOV 0x01 /* - set at match B */
267#define TM6MDB_OUT_RESETB 0x03 /* - reset at match B */
268#define TM6MDB_OUT_TOGGLE 0x04 /* - toggle on match B */
269#define TM6MDB_MODE 0xc0 /* compare B register mode */
270#define TM6MDB_MODE_CMP_SINGLE 0x00 /* - compare, single buffer mode */
271#define TM6MDB_MODE_CMP_DOUBLE 0x40 /* - compare, double buffer mode */
272#define TM6MDB_MODE_CAP_S_EDGE 0x80 /* - capture, single edge mode */
273#define TM6MDB_MODE_CAP_D_EDGE 0xc0 /* - capture, double edge mode */
274#define TM6MDB_EDGE 0x20 /* compare B edge select */
275#define TM6MDB_EDGE_FALLING 0x00 /* capture on falling edge */
276#define TM6MDB_EDGE_RISING 0x20 /* capture on rising edge */
277#define TM6MDB_CAPTURE_ENABLE 0x10 /* capture enable */
278
279#define TM6CA __SYSREG(0xd40030c4, u16) /* timer6 cmp/capture reg A */
280#define TM6CB __SYSREG(0xd40030d4, u16) /* timer6 cmp/capture reg B */
281#define TM6BC __SYSREG(0xd40030a4, u16) /* timer6 binary counter */
282
283#define TM6IRQ 6 /* timer 6 IRQ */
284#define TM6AIRQ 9 /* timer 6A IRQ */
285#define TM6BIRQ 10 /* timer 6B IRQ */
286
287#define TM6ICR GxICR(TM6IRQ) /* timer 6 uflow intr ctrl reg */
288#define TM6AICR GxICR(TM6AIRQ) /* timer 6A intr control reg */
289#define TM6BICR GxICR(TM6BIRQ) /* timer 6B intr control reg */
290
291#endif /* __KERNEL__ */
292
293#endif /* _ASM_TIMER_REGS_H */
diff --git a/arch/mn10300/include/asm/timex.h b/arch/mn10300/include/asm/timex.h
new file mode 100644
index 000000000000..8d031f9e117d
--- /dev/null
+++ b/arch/mn10300/include/asm/timex.h
@@ -0,0 +1,33 @@
1/* MN10300 Architecture time management specifications
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_TIMEX_H
12#define _ASM_TIMEX_H
13
14#include <asm/hardirq.h>
15#include <unit/timex.h>
16
17#define TICK_SIZE (tick_nsec / 1000)
18
19#define CLOCK_TICK_RATE 1193180 /* Underlying HZ - this should probably be set
20 * to something appropriate, but what? */
21
22extern cycles_t cacheflush_time;
23
24#ifdef __KERNEL__
25
26static inline cycles_t get_cycles(void)
27{
28 return read_timestamp_counter();
29}
30
31#endif /* __KERNEL__ */
32
33#endif /* _ASM_TIMEX_H */
diff --git a/arch/mn10300/include/asm/tlb.h b/arch/mn10300/include/asm/tlb.h
new file mode 100644
index 000000000000..65d232b96613
--- /dev/null
+++ b/arch/mn10300/include/asm/tlb.h
@@ -0,0 +1,34 @@
1/* MN10300 TLB definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_TLB_H
13#define _ASM_TLB_H
14
15#include <asm/tlbflush.h>
16
17extern void check_pgt_cache(void);
18
19/*
20 * we don't need any special per-pte or per-vma handling...
21 */
22#define tlb_start_vma(tlb, vma) do { } while (0)
23#define tlb_end_vma(tlb, vma) do { } while (0)
24#define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)
25
26/*
27 * .. because we flush the whole mm when it fills up
28 */
29#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
30
31/* for now, just use the generic stuff */
32#include <asm-generic/tlb.h>
33
34#endif /* _ASM_TLB_H */
diff --git a/arch/mn10300/include/asm/tlbflush.h b/arch/mn10300/include/asm/tlbflush.h
new file mode 100644
index 000000000000..e0239865abcb
--- /dev/null
+++ b/arch/mn10300/include/asm/tlbflush.h
@@ -0,0 +1,80 @@
1/* MN10300 TLB flushing functions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_TLBFLUSH_H
12#define _ASM_TLBFLUSH_H
13
14#include <asm/processor.h>
15
16#define __flush_tlb() \
17do { \
18 int w; \
19 __asm__ __volatile__ \
20 (" mov %1,%0 \n" \
21 " or %2,%0 \n" \
22 " mov %0,%1 \n" \
23 : "=d"(w) \
24 : "m"(MMUCTR), "i"(MMUCTR_IIV|MMUCTR_DIV) \
25 : "memory" \
26 ); \
27} while (0)
28
29#define __flush_tlb_all() __flush_tlb()
30#define __flush_tlb_one(addr) __flush_tlb()
31
32
33/*
34 * TLB flushing:
35 *
36 * - flush_tlb() flushes the current mm struct TLBs
37 * - flush_tlb_all() flushes all processes TLBs
38 * - flush_tlb_mm(mm) flushes the specified mm context TLB's
39 * - flush_tlb_page(vma, vmaddr) flushes one page
40 * - flush_tlb_range(mm, start, end) flushes a range of pages
41 * - flush_tlb_pgtables(mm, start, end) flushes a range of page tables
42 */
43#define flush_tlb_all() \
44do { \
45 preempt_disable(); \
46 __flush_tlb_all(); \
47 preempt_enable(); \
48} while (0)
49
50#define flush_tlb_mm(mm) \
51do { \
52 preempt_disable(); \
53 __flush_tlb_all(); \
54 preempt_enable(); \
55} while (0)
56
57#define flush_tlb_range(vma, start, end) \
58do { \
59 unsigned long __s __attribute__((unused)) = (start); \
60 unsigned long __e __attribute__((unused)) = (end); \
61 preempt_disable(); \
62 __flush_tlb_all(); \
63 preempt_enable(); \
64} while (0)
65
66
67#define __flush_tlb_global() flush_tlb_all()
68#define flush_tlb() flush_tlb_all()
69#define flush_tlb_kernel_range(start, end) \
70do { \
71 unsigned long __s __attribute__((unused)) = (start); \
72 unsigned long __e __attribute__((unused)) = (end); \
73 flush_tlb_all(); \
74} while (0)
75
76extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr);
77
78#define flush_tlb_pgtables(mm, start, end) do {} while (0)
79
80#endif /* _ASM_TLBFLUSH_H */
diff --git a/arch/mn10300/include/asm/topology.h b/arch/mn10300/include/asm/topology.h
new file mode 100644
index 000000000000..5428f333a02c
--- /dev/null
+++ b/arch/mn10300/include/asm/topology.h
@@ -0,0 +1 @@
#include <asm-generic/topology.h>
diff --git a/arch/mn10300/include/asm/types.h b/arch/mn10300/include/asm/types.h
new file mode 100644
index 000000000000..7b9f01042fd4
--- /dev/null
+++ b/arch/mn10300/include/asm/types.h
@@ -0,0 +1,38 @@
1/* MN10300 Basic type definitions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_TYPES_H
12#define _ASM_TYPES_H
13
14#include <asm-generic/int-ll64.h>
15
16#ifndef __ASSEMBLY__
17
18typedef unsigned short umode_t;
19
20#endif /* __ASSEMBLY__ */
21
22/*
23 * These aren't exported outside the kernel to avoid name space clashes
24 */
25#ifdef __KERNEL__
26
27#define BITS_PER_LONG 32
28
29#ifndef __ASSEMBLY__
30
31/* Dma addresses are 32-bits wide. */
32typedef u32 dma_addr_t;
33
34#endif /* __ASSEMBLY__ */
35
36#endif /* __KERNEL__ */
37
38#endif /* _ASM_TYPES_H */
diff --git a/arch/mn10300/include/asm/uaccess.h b/arch/mn10300/include/asm/uaccess.h
new file mode 100644
index 000000000000..8a3a4dd55763
--- /dev/null
+++ b/arch/mn10300/include/asm/uaccess.h
@@ -0,0 +1,490 @@
1/* MN10300 userspace access functions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_UACCESS_H
12#define _ASM_UACCESS_H
13
14/*
15 * User space memory access functions
16 */
17#include <linux/sched.h>
18#include <asm/page.h>
19#include <asm/pgtable.h>
20#include <asm/errno.h>
21
22#define VERIFY_READ 0
23#define VERIFY_WRITE 1
24
25/*
26 * The fs value determines whether argument validity checking should be
27 * performed or not. If get_fs() == USER_DS, checking is performed, with
28 * get_fs() == KERNEL_DS, checking is bypassed.
29 *
30 * For historical reasons, these macros are grossly misnamed.
31 */
32
33#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) })
34
35#define KERNEL_XDS MAKE_MM_SEG(0xBFFFFFFF)
36#define KERNEL_DS MAKE_MM_SEG(0x9FFFFFFF)
37#define USER_DS MAKE_MM_SEG(TASK_SIZE)
38
39#define get_ds() (KERNEL_DS)
40#define get_fs() (current_thread_info()->addr_limit)
41#define set_fs(x) (current_thread_info()->addr_limit = (x))
42#define __kernel_ds_p() (current_thread_info()->addr_limit.seg == 0x9FFFFFFF)
43
44#define segment_eq(a, b) ((a).seg == (b).seg)
45
46#define __addr_ok(addr) \
47 ((unsigned long)(addr) < (current_thread_info()->addr_limit.seg))
48
49/*
50 * check that a range of addresses falls within the current address limit
51 */
52static inline int ___range_ok(unsigned long addr, unsigned int size)
53{
54 int flag = 1, tmp;
55
56 asm(" add %3,%1 \n" /* set C-flag if addr + size > 4Gb */
57 " bcs 0f \n"
58 " cmp %4,%1 \n" /* jump if addr+size>limit (error) */
59 " bhi 0f \n"
60 " clr %0 \n" /* mark okay */
61 "0: \n"
62 : "=r"(flag), "=&r"(tmp)
63 : "1"(addr), "ir"(size),
64 "r"(current_thread_info()->addr_limit.seg), "0"(flag)
65 : "cc"
66 );
67
68 return flag;
69}
70
71#define __range_ok(addr, size) ___range_ok((unsigned long)(addr), (u32)(size))
72
73#define access_ok(type, addr, size) (__range_ok((addr), (size)) == 0)
74#define __access_ok(addr, size) (__range_ok((addr), (size)) == 0)
75
76static inline int verify_area(int type, const void *addr, unsigned long size)
77{
78 return access_ok(type, addr, size) ? 0 : -EFAULT;
79}
80
81
82/*
83 * The exception table consists of pairs of addresses: the first is the
84 * address of an instruction that is allowed to fault, and the second is
85 * the address at which the program should continue. No registers are
86 * modified, so it is entirely up to the continuation code to figure out
87 * what to do.
88 *
89 * All the routines below use bits of fixup code that are out of line
90 * with the main instruction path. This means when everything is well,
91 * we don't even have to jump over them. Further, they do not intrude
92 * on our cache or tlb entries.
93 */
94
95struct exception_table_entry
96{
97 unsigned long insn, fixup;
98};
99
100/* Returns 0 if exception not found and fixup otherwise. */
101extern int fixup_exception(struct pt_regs *regs);
102
103#define put_user(x, ptr) __put_user_check((x), (ptr), sizeof(*(ptr)))
104#define get_user(x, ptr) __get_user_check((x), (ptr), sizeof(*(ptr)))
105
106/*
107 * The "__xxx" versions do not do address space checking, useful when
108 * doing multiple accesses to the same area (the user has to do the
109 * checks by hand with "access_ok()")
110 */
111#define __put_user(x, ptr) __put_user_nocheck((x), (ptr), sizeof(*(ptr)))
112#define __get_user(x, ptr) __get_user_nocheck((x), (ptr), sizeof(*(ptr)))
113
114/*
115 * The "xxx_ret" versions return constant specified in third argument, if
116 * something bad happens. These macros can be optimized for the
117 * case of just returning from the function xxx_ret is used.
118 */
119
120#define put_user_ret(x, ptr, ret) \
121 ({ if (put_user((x), (ptr))) return (ret); })
122#define get_user_ret(x, ptr, ret) \
123 ({ if (get_user((x), (ptr))) return (ret); })
124#define __put_user_ret(x, ptr, ret) \
125 ({ if (__put_user((x), (ptr))) return (ret); })
126#define __get_user_ret(x, ptr, ret) \
127 ({ if (__get_user((x), (ptr))) return (ret); })
128
129struct __large_struct { unsigned long buf[100]; };
130#define __m(x) (*(struct __large_struct *)(x))
131
132#define __get_user_nocheck(x, ptr, size) \
133({ \
134 __typeof(*(ptr)) __gu_val; \
135 unsigned long __gu_addr; \
136 int __gu_err; \
137 __gu_addr = (unsigned long) (ptr); \
138 switch (size) { \
139 case 1: __get_user_asm("bu"); break; \
140 case 2: __get_user_asm("hu"); break; \
141 case 4: __get_user_asm("" ); break; \
142 default: __get_user_unknown(); break; \
143 } \
144 x = (__typeof__(*(ptr))) __gu_val; \
145 __gu_err; \
146})
147
148#define __get_user_check(x, ptr, size) \
149({ \
150 __typeof__(*(ptr)) __gu_val; \
151 unsigned long __gu_addr; \
152 int __gu_err; \
153 __gu_addr = (unsigned long) (ptr); \
154 if (likely(__access_ok(__gu_addr,size))) { \
155 switch (size) { \
156 case 1: __get_user_asm("bu"); break; \
157 case 2: __get_user_asm("hu"); break; \
158 case 4: __get_user_asm("" ); break; \
159 default: __get_user_unknown(); break; \
160 } \
161 } \
162 else { \
163 __gu_err = -EFAULT; \
164 __gu_val = 0; \
165 } \
166 x = (__typeof__(*(ptr))) __gu_val; \
167 __gu_err; \
168})
169
170#define __get_user_asm(INSN) \
171({ \
172 asm volatile( \
173 "1:\n" \
174 " mov"INSN" %2,%1\n" \
175 " mov 0,%0\n" \
176 "2:\n" \
177 " .section .fixup,\"ax\"\n" \
178 "3:\n\t" \
179 " mov %3,%0\n" \
180 " jmp 2b\n" \
181 " .previous\n" \
182 " .section __ex_table,\"a\"\n" \
183 " .balign 4\n" \
184 " .long 1b, 3b\n" \
185 " .previous" \
186 : "=&r" (__gu_err), "=&r" (__gu_val) \
187 : "m" (__m(__gu_addr)), "i" (-EFAULT)); \
188})
189
190extern int __get_user_unknown(void);
191
192#define __put_user_nocheck(x, ptr, size) \
193({ \
194 union { \
195 __typeof__(*(ptr)) val; \
196 u32 bits[2]; \
197 } __pu_val; \
198 unsigned long __pu_addr; \
199 int __pu_err; \
200 __pu_val.val = (x); \
201 __pu_addr = (unsigned long) (ptr); \
202 switch (size) { \
203 case 1: __put_user_asm("bu"); break; \
204 case 2: __put_user_asm("hu"); break; \
205 case 4: __put_user_asm("" ); break; \
206 case 8: __put_user_asm8(); break; \
207 default: __pu_err = __put_user_unknown(); break; \
208 } \
209 __pu_err; \
210})
211
212#define __put_user_check(x, ptr, size) \
213({ \
214 union { \
215 __typeof__(*(ptr)) val; \
216 u32 bits[2]; \
217 } __pu_val; \
218 unsigned long __pu_addr; \
219 int __pu_err; \
220 __pu_val.val = (x); \
221 __pu_addr = (unsigned long) (ptr); \
222 if (likely(__access_ok(__pu_addr, size))) { \
223 switch (size) { \
224 case 1: __put_user_asm("bu"); break; \
225 case 2: __put_user_asm("hu"); break; \
226 case 4: __put_user_asm("" ); break; \
227 case 8: __put_user_asm8(); break; \
228 default: __pu_err = __put_user_unknown(); break; \
229 } \
230 } \
231 else { \
232 __pu_err = -EFAULT; \
233 } \
234 __pu_err; \
235})
236
237#define __put_user_asm(INSN) \
238({ \
239 asm volatile( \
240 "1:\n" \
241 " mov"INSN" %1,%2\n" \
242 " mov 0,%0\n" \
243 "2:\n" \
244 " .section .fixup,\"ax\"\n" \
245 "3:\n" \
246 " mov %3,%0\n" \
247 " jmp 2b\n" \
248 " .previous\n" \
249 " .section __ex_table,\"a\"\n" \
250 " .balign 4\n" \
251 " .long 1b, 3b\n" \
252 " .previous" \
253 : "=&r" (__pu_err) \
254 : "r" (__pu_val.val), "m" (__m(__pu_addr)), \
255 "i" (-EFAULT) \
256 ); \
257})
258
259#define __put_user_asm8() \
260({ \
261 asm volatile( \
262 "1: mov %1,%3 \n" \
263 "2: mov %2,%4 \n" \
264 " mov 0,%0 \n" \
265 "3: \n" \
266 " .section .fixup,\"ax\" \n" \
267 "4: \n" \
268 " mov %5,%0 \n" \
269 " jmp 3b \n" \
270 " .previous \n" \
271 " .section __ex_table,\"a\"\n" \
272 " .balign 4 \n" \
273 " .long 1b, 4b \n" \
274 " .long 2b, 4b \n" \
275 " .previous \n" \
276 : "=&r" (__pu_err) \
277 : "r" (__pu_val.bits[0]), "r" (__pu_val.bits[1]), \
278 "m" (__m(__pu_addr)), "m" (__m(__pu_addr+4)), \
279 "i" (-EFAULT) \
280 ); \
281})
282
283extern int __put_user_unknown(void);
284
285
286/*
287 * Copy To/From Userspace
288 */
289/* Generic arbitrary sized copy. */
290#define __copy_user(to, from, size) \
291do { \
292 if (size) { \
293 void *__to = to; \
294 const void *__from = from; \
295 int w; \
296 asm volatile( \
297 "0: movbu (%0),%3;\n" \
298 "1: movbu %3,(%1);\n" \
299 " inc %0;\n" \
300 " inc %1;\n" \
301 " add -1,%2;\n" \
302 " bne 0b;\n" \
303 "2:\n" \
304 " .section .fixup,\"ax\"\n" \
305 "3: jmp 2b\n" \
306 " .previous\n" \
307 " .section __ex_table,\"a\"\n" \
308 " .balign 4\n" \
309 " .long 0b,3b\n" \
310 " .long 1b,3b\n" \
311 " .previous\n" \
312 : "=a"(__from), "=a"(__to), "=r"(size), "=&r"(w)\
313 : "0"(__from), "1"(__to), "2"(size) \
314 : "memory"); \
315 } \
316} while (0)
317
318#define __copy_user_zeroing(to, from, size) \
319do { \
320 if (size) { \
321 void *__to = to; \
322 const void *__from = from; \
323 int w; \
324 asm volatile( \
325 "0: movbu (%0),%3;\n" \
326 "1: movbu %3,(%1);\n" \
327 " inc %0;\n" \
328 " inc %1;\n" \
329 " add -1,%2;\n" \
330 " bne 0b;\n" \
331 "2:\n" \
332 " .section .fixup,\"ax\"\n" \
333 "3:\n" \
334 " mov %2,%0\n" \
335 " clr %3\n" \
336 "4: movbu %3,(%1);\n" \
337 " inc %1;\n" \
338 " add -1,%2;\n" \
339 " bne 4b;\n" \
340 " mov %0,%2\n" \
341 " jmp 2b\n" \
342 " .previous\n" \
343 " .section __ex_table,\"a\"\n" \
344 " .balign 4\n" \
345 " .long 0b,3b\n" \
346 " .long 1b,3b\n" \
347 " .previous\n" \
348 : "=a"(__from), "=a"(__to), "=r"(size), "=&r"(w)\
349 : "0"(__from), "1"(__to), "2"(size) \
350 : "memory"); \
351 } \
352} while (0)
353
354/* We let the __ versions of copy_from/to_user inline, because they're often
355 * used in fast paths and have only a small space overhead.
356 */
357static inline
358unsigned long __generic_copy_from_user_nocheck(void *to, const void *from,
359 unsigned long n)
360{
361 __copy_user_zeroing(to, from, n);
362 return n;
363}
364
365static inline
366unsigned long __generic_copy_to_user_nocheck(void *to, const void *from,
367 unsigned long n)
368{
369 __copy_user(to, from, n);
370 return n;
371}
372
373
374#if 0
375#error don't use - these macros don't increment to & from pointers
376/* Optimize just a little bit when we know the size of the move. */
377#define __constant_copy_user(to, from, size) \
378do { \
379 asm volatile( \
380 " mov %0,a0;\n" \
381 "0: movbu (%1),d3;\n" \
382 "1: movbu d3,(%2);\n" \
383 " add -1,a0;\n" \
384 " bne 0b;\n" \
385 "2:;" \
386 ".section .fixup,\"ax\"\n" \
387 "3: jmp 2b\n" \
388 ".previous\n" \
389 ".section __ex_table,\"a\"\n" \
390 " .balign 4\n" \
391 " .long 0b,3b\n" \
392 " .long 1b,3b\n" \
393 ".previous" \
394 : \
395 : "d"(size), "d"(to), "d"(from) \
396 : "d3", "a0"); \
397} while (0)
398
399/* Optimize just a little bit when we know the size of the move. */
400#define __constant_copy_user_zeroing(to, from, size) \
401do { \
402 asm volatile( \
403 " mov %0,a0;\n" \
404 "0: movbu (%1),d3;\n" \
405 "1: movbu d3,(%2);\n" \
406 " add -1,a0;\n" \
407 " bne 0b;\n" \
408 "2:;" \
409 ".section .fixup,\"ax\"\n" \
410 "3: jmp 2b\n" \
411 ".previous\n" \
412 ".section __ex_table,\"a\"\n" \
413 " .balign 4\n" \
414 " .long 0b,3b\n" \
415 " .long 1b,3b\n" \
416 ".previous" \
417 : \
418 : "d"(size), "d"(to), "d"(from) \
419 : "d3", "a0"); \
420} while (0)
421
422static inline
423unsigned long __constant_copy_to_user(void *to, const void *from,
424 unsigned long n)
425{
426 if (access_ok(VERIFY_WRITE, to, n))
427 __constant_copy_user(to, from, n);
428 return n;
429}
430
431static inline
432unsigned long __constant_copy_from_user(void *to, const void *from,
433 unsigned long n)
434{
435 if (access_ok(VERIFY_READ, from, n))
436 __constant_copy_user_zeroing(to, from, n);
437 return n;
438}
439
440static inline
441unsigned long __constant_copy_to_user_nocheck(void *to, const void *from,
442 unsigned long n)
443{
444 __constant_copy_user(to, from, n);
445 return n;
446}
447
448static inline
449unsigned long __constant_copy_from_user_nocheck(void *to, const void *from,
450 unsigned long n)
451{
452 __constant_copy_user_zeroing(to, from, n);
453 return n;
454}
455#endif
456
457extern unsigned long __generic_copy_to_user(void __user *, const void *,
458 unsigned long);
459extern unsigned long __generic_copy_from_user(void *, const void __user *,
460 unsigned long);
461
462#define __copy_to_user_inatomic(to, from, n) \
463 __generic_copy_to_user_nocheck((to), (from), (n))
464#define __copy_from_user_inatomic(to, from, n) \
465 __generic_copy_from_user_nocheck((to), (from), (n))
466
467#define __copy_to_user(to, from, n) \
468({ \
469 might_sleep(); \
470 __copy_to_user_inatomic((to), (from), (n)); \
471})
472
473#define __copy_from_user(to, from, n) \
474({ \
475 might_sleep(); \
476 __copy_from_user_inatomic((to), (from), (n)); \
477})
478
479
480#define copy_to_user(to, from, n) __generic_copy_to_user((to), (from), (n))
481#define copy_from_user(to, from, n) __generic_copy_from_user((to), (from), (n))
482
483extern long strncpy_from_user(char *dst, const char __user *src, long count);
484extern long __strncpy_from_user(char *dst, const char __user *src, long count);
485extern long strnlen_user(const char __user *str, long n);
486#define strlen_user(str) strnlen_user(str, ~0UL >> 1)
487extern unsigned long clear_user(void __user *mem, unsigned long len);
488extern unsigned long __clear_user(void __user *mem, unsigned long len);
489
490#endif /* _ASM_UACCESS_H */
diff --git a/arch/mn10300/include/asm/ucontext.h b/arch/mn10300/include/asm/ucontext.h
new file mode 100644
index 000000000000..fcab5c1d8e18
--- /dev/null
+++ b/arch/mn10300/include/asm/ucontext.h
@@ -0,0 +1,22 @@
1/* MN10300 User context
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_UCONTEXT_H
12#define _ASM_UCONTEXT_H
13
14struct ucontext {
15 unsigned long uc_flags;
16 struct ucontext *uc_link;
17 stack_t uc_stack;
18 struct sigcontext uc_mcontext;
19 sigset_t uc_sigmask; /* mask last for extensibility */
20};
21
22#endif /* _ASM_UCONTEXT_H */
diff --git a/arch/mn10300/include/asm/unaligned.h b/arch/mn10300/include/asm/unaligned.h
new file mode 100644
index 000000000000..0df671318ae4
--- /dev/null
+++ b/arch/mn10300/include/asm/unaligned.h
@@ -0,0 +1,20 @@
1/* MN10300 Unaligned memory access handling
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_MN10300_UNALIGNED_H
12#define _ASM_MN10300_UNALIGNED_H
13
14#include <linux/unaligned/access_ok.h>
15#include <linux/unaligned/generic.h>
16
17#define get_unaligned __get_unaligned_le
18#define put_unaligned __put_unaligned_le
19
20#endif /* _ASM_MN10300_UNALIGNED_H */
diff --git a/arch/mn10300/include/asm/unistd.h b/arch/mn10300/include/asm/unistd.h
new file mode 100644
index 000000000000..fef5b434dadc
--- /dev/null
+++ b/arch/mn10300/include/asm/unistd.h
@@ -0,0 +1,392 @@
1/* MN10300 System call number list
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_UNISTD_H
12#define _ASM_UNISTD_H
13
14#define __NR_restart_syscall 0
15#define __NR_exit 1
16#define __NR_fork 2
17#define __NR_read 3
18#define __NR_write 4
19#define __NR_open 5
20#define __NR_close 6
21#define __NR_waitpid 7
22#define __NR_creat 8
23#define __NR_link 9
24#define __NR_unlink 10
25#define __NR_execve 11
26#define __NR_chdir 12
27#define __NR_time 13
28#define __NR_mknod 14
29#define __NR_chmod 15
30#define __NR_lchown 16
31#define __NR_break 17
32#define __NR_oldstat 18
33#define __NR_lseek 19
34#define __NR_getpid 20
35#define __NR_mount 21
36#define __NR_umount 22
37#define __NR_setuid 23
38#define __NR_getuid 24
39#define __NR_stime 25
40#define __NR_ptrace 26
41#define __NR_alarm 27
42#define __NR_oldfstat 28
43#define __NR_pause 29
44#define __NR_utime 30
45#define __NR_stty 31
46#define __NR_gtty 32
47#define __NR_access 33
48#define __NR_nice 34
49#define __NR_ftime 35
50#define __NR_sync 36
51#define __NR_kill 37
52#define __NR_rename 38
53#define __NR_mkdir 39
54#define __NR_rmdir 40
55#define __NR_dup 41
56#define __NR_pipe 42
57#define __NR_times 43
58#define __NR_prof 44
59#define __NR_brk 45
60#define __NR_setgid 46
61#define __NR_getgid 47
62#define __NR_signal 48
63#define __NR_geteuid 49
64#define __NR_getegid 50
65#define __NR_acct 51
66#define __NR_umount2 52
67#define __NR_lock 53
68#define __NR_ioctl 54
69#define __NR_fcntl 55
70#define __NR_mpx 56
71#define __NR_setpgid 57
72#define __NR_ulimit 58
73#define __NR_oldolduname 59
74#define __NR_umask 60
75#define __NR_chroot 61
76#define __NR_ustat 62
77#define __NR_dup2 63
78#define __NR_getppid 64
79#define __NR_getpgrp 65
80#define __NR_setsid 66
81#define __NR_sigaction 67
82#define __NR_sgetmask 68
83#define __NR_ssetmask 69
84#define __NR_setreuid 70
85#define __NR_setregid 71
86#define __NR_sigsuspend 72
87#define __NR_sigpending 73
88#define __NR_sethostname 74
89#define __NR_setrlimit 75
90#define __NR_getrlimit 76 /* Back compatible 2Gig limited rlimit */
91#define __NR_getrusage 77
92#define __NR_gettimeofday 78
93#define __NR_settimeofday 79
94#define __NR_getgroups 80
95#define __NR_setgroups 81
96#define __NR_select 82
97#define __NR_symlink 83
98#define __NR_oldlstat 84
99#define __NR_readlink 85
100#define __NR_uselib 86
101#define __NR_swapon 87
102#define __NR_reboot 88
103#define __NR_readdir 89
104#define __NR_mmap 90
105#define __NR_munmap 91
106#define __NR_truncate 92
107#define __NR_ftruncate 93
108#define __NR_fchmod 94
109#define __NR_fchown 95
110#define __NR_getpriority 96
111#define __NR_setpriority 97
112#define __NR_profil 98
113#define __NR_statfs 99
114#define __NR_fstatfs 100
115#define __NR_ioperm 101
116#define __NR_socketcall 102
117#define __NR_syslog 103
118#define __NR_setitimer 104
119#define __NR_getitimer 105
120#define __NR_stat 106
121#define __NR_lstat 107
122#define __NR_fstat 108
123#define __NR_olduname 109
124#define __NR_iopl 110
125#define __NR_vhangup 111
126#define __NR_idle 112
127#define __NR_vm86old 113
128#define __NR_wait4 114
129#define __NR_swapoff 115
130#define __NR_sysinfo 116
131#define __NR_ipc 117
132#define __NR_fsync 118
133#define __NR_sigreturn 119
134#define __NR_clone 120
135#define __NR_setdomainname 121
136#define __NR_uname 122
137#define __NR_modify_ldt 123
138#define __NR_adjtimex 124
139#define __NR_mprotect 125
140#define __NR_sigprocmask 126
141#define __NR_create_module 127
142#define __NR_init_module 128
143#define __NR_delete_module 129
144#define __NR_get_kernel_syms 130
145#define __NR_quotactl 131
146#define __NR_getpgid 132
147#define __NR_fchdir 133
148#define __NR_bdflush 134
149#define __NR_sysfs 135
150#define __NR_personality 136
151#define __NR_afs_syscall 137 /* Syscall for Andrew File System */
152#define __NR_setfsuid 138
153#define __NR_setfsgid 139
154#define __NR__llseek 140
155#define __NR_getdents 141
156#define __NR__newselect 142
157#define __NR_flock 143
158#define __NR_msync 144
159#define __NR_readv 145
160#define __NR_writev 146
161#define __NR_getsid 147
162#define __NR_fdatasync 148
163#define __NR__sysctl 149
164#define __NR_mlock 150
165#define __NR_munlock 151
166#define __NR_mlockall 152
167#define __NR_munlockall 153
168#define __NR_sched_setparam 154
169#define __NR_sched_getparam 155
170#define __NR_sched_setscheduler 156
171#define __NR_sched_getscheduler 157
172#define __NR_sched_yield 158
173#define __NR_sched_get_priority_max 159
174#define __NR_sched_get_priority_min 160
175#define __NR_sched_rr_get_interval 161
176#define __NR_nanosleep 162
177#define __NR_mremap 163
178#define __NR_setresuid 164
179#define __NR_getresuid 165
180#define __NR_vm86 166
181#define __NR_query_module 167
182#define __NR_poll 168
183#define __NR_nfsservctl 169
184#define __NR_setresgid 170
185#define __NR_getresgid 171
186#define __NR_prctl 172
187#define __NR_rt_sigreturn 173
188#define __NR_rt_sigaction 174
189#define __NR_rt_sigprocmask 175
190#define __NR_rt_sigpending 176
191#define __NR_rt_sigtimedwait 177
192#define __NR_rt_sigqueueinfo 178
193#define __NR_rt_sigsuspend 179
194#define __NR_pread64 180
195#define __NR_pwrite64 181
196#define __NR_chown 182
197#define __NR_getcwd 183
198#define __NR_capget 184
199#define __NR_capset 185
200#define __NR_sigaltstack 186
201#define __NR_sendfile 187
202#define __NR_getpmsg 188 /* some people actually want streams */
203#define __NR_putpmsg 189 /* some people actually want streams */
204#define __NR_vfork 190
205#define __NR_ugetrlimit 191 /* SuS compliant getrlimit */
206#define __NR_mmap2 192
207#define __NR_truncate64 193
208#define __NR_ftruncate64 194
209#define __NR_stat64 195
210#define __NR_lstat64 196
211#define __NR_fstat64 197
212#define __NR_lchown32 198
213#define __NR_getuid32 199
214#define __NR_getgid32 200
215#define __NR_geteuid32 201
216#define __NR_getegid32 202
217#define __NR_setreuid32 203
218#define __NR_setregid32 204
219#define __NR_getgroups32 205
220#define __NR_setgroups32 206
221#define __NR_fchown32 207
222#define __NR_setresuid32 208
223#define __NR_getresuid32 209
224#define __NR_setresgid32 210
225#define __NR_getresgid32 211
226#define __NR_chown32 212
227#define __NR_setuid32 213
228#define __NR_setgid32 214
229#define __NR_setfsuid32 215
230#define __NR_setfsgid32 216
231#define __NR_pivot_root 217
232#define __NR_mincore 218
233#define __NR_madvise 219
234#define __NR_madvise1 219 /* delete when C lib stub is removed */
235#define __NR_getdents64 220
236#define __NR_fcntl64 221
237/* 223 is unused */
238#define __NR_gettid 224
239#define __NR_readahead 225
240#define __NR_setxattr 226
241#define __NR_lsetxattr 227
242#define __NR_fsetxattr 228
243#define __NR_getxattr 229
244#define __NR_lgetxattr 230
245#define __NR_fgetxattr 231
246#define __NR_listxattr 232
247#define __NR_llistxattr 233
248#define __NR_flistxattr 234
249#define __NR_removexattr 235
250#define __NR_lremovexattr 236
251#define __NR_fremovexattr 237
252#define __NR_tkill 238
253#define __NR_sendfile64 239
254#define __NR_futex 240
255#define __NR_sched_setaffinity 241
256#define __NR_sched_getaffinity 242
257#define __NR_set_thread_area 243
258#define __NR_get_thread_area 244
259#define __NR_io_setup 245
260#define __NR_io_destroy 246
261#define __NR_io_getevents 247
262#define __NR_io_submit 248
263#define __NR_io_cancel 249
264#define __NR_fadvise64 250
265
266#define __NR_exit_group 252
267#define __NR_lookup_dcookie 253
268#define __NR_epoll_create 254
269#define __NR_epoll_ctl 255
270#define __NR_epoll_wait 256
271#define __NR_remap_file_pages 257
272#define __NR_set_tid_address 258
273#define __NR_timer_create 259
274#define __NR_timer_settime (__NR_timer_create+1)
275#define __NR_timer_gettime (__NR_timer_create+2)
276#define __NR_timer_getoverrun (__NR_timer_create+3)
277#define __NR_timer_delete (__NR_timer_create+4)
278#define __NR_clock_settime (__NR_timer_create+5)
279#define __NR_clock_gettime (__NR_timer_create+6)
280#define __NR_clock_getres (__NR_timer_create+7)
281#define __NR_clock_nanosleep (__NR_timer_create+8)
282#define __NR_statfs64 268
283#define __NR_fstatfs64 269
284#define __NR_tgkill 270
285#define __NR_utimes 271
286#define __NR_fadvise64_64 272
287#define __NR_vserver 273
288#define __NR_mbind 274
289#define __NR_get_mempolicy 275
290#define __NR_set_mempolicy 276
291#define __NR_mq_open 277
292#define __NR_mq_unlink (__NR_mq_open+1)
293#define __NR_mq_timedsend (__NR_mq_open+2)
294#define __NR_mq_timedreceive (__NR_mq_open+3)
295#define __NR_mq_notify (__NR_mq_open+4)
296#define __NR_mq_getsetattr (__NR_mq_open+5)
297#define __NR_kexec_load 283
298#define __NR_waitid 284
299#define __NR_add_key 286
300#define __NR_request_key 287
301#define __NR_keyctl 288
302#define __NR_cacheflush 289
303#define __NR_ioprio_set 290
304#define __NR_ioprio_get 291
305#define __NR_inotify_init 292
306#define __NR_inotify_add_watch 293
307#define __NR_inotify_rm_watch 294
308#define __NR_migrate_pages 295
309#define __NR_openat 296
310#define __NR_mkdirat 297
311#define __NR_mknodat 298
312#define __NR_fchownat 299
313#define __NR_futimesat 300
314#define __NR_fstatat64 301
315#define __NR_unlinkat 302
316#define __NR_renameat 303
317#define __NR_linkat 304
318#define __NR_symlinkat 305
319#define __NR_readlinkat 306
320#define __NR_fchmodat 307
321#define __NR_faccessat 308
322#define __NR_pselect6 309
323#define __NR_ppoll 310
324#define __NR_unshare 311
325#define __NR_set_robust_list 312
326#define __NR_get_robust_list 313
327#define __NR_splice 314
328#define __NR_sync_file_range 315
329#define __NR_tee 316
330#define __NR_vmsplice 317
331#define __NR_move_pages 318
332#define __NR_getcpu 319
333#define __NR_epoll_pwait 320
334#define __NR_utimensat 321
335#define __NR_signalfd 322
336#define __NR_timerfd_create 323
337#define __NR_eventfd 324
338#define __NR_fallocate 325
339#define __NR_timerfd_settime 326
340#define __NR_timerfd_gettime 327
341#define __NR_signalfd4 328
342#define __NR_eventfd2 329
343#define __NR_epoll_create1 330
344#define __NR_dup3 331
345#define __NR_pipe2 332
346#define __NR_inotify_init1 333
347#define __NR_preadv 334
348#define __NR_pwritev 335
349
350#ifdef __KERNEL__
351
352#define NR_syscalls 326
353
354/*
355 * specify the deprecated syscalls we want to support on this arch
356 */
357#define __ARCH_WANT_IPC_PARSE_VERSION
358#define __ARCH_WANT_OLD_READDIR
359#define __ARCH_WANT_OLD_STAT
360#define __ARCH_WANT_STAT64
361#define __ARCH_WANT_SYS_ALARM
362#define __ARCH_WANT_SYS_GETHOSTNAME
363#define __ARCH_WANT_SYS_PAUSE
364#define __ARCH_WANT_SYS_SGETMASK
365#define __ARCH_WANT_SYS_SIGNAL
366#define __ARCH_WANT_SYS_TIME
367#define __ARCH_WANT_SYS_UTIME
368#define __ARCH_WANT_SYS_WAITPID
369#define __ARCH_WANT_SYS_SOCKETCALL
370#define __ARCH_WANT_SYS_FADVISE64
371#define __ARCH_WANT_SYS_GETPGRP
372#define __ARCH_WANT_SYS_LLSEEK
373#define __ARCH_WANT_SYS_NICE
374#define __ARCH_WANT_SYS_OLD_GETRLIMIT
375#define __ARCH_WANT_SYS_OLDUMOUNT
376#define __ARCH_WANT_SYS_SIGPENDING
377#define __ARCH_WANT_SYS_SIGPROCMASK
378#define __ARCH_WANT_SYS_RT_SIGACTION
379#define __ARCH_WANT_SYS_RT_SIGSUSPEND
380
381/*
382 * "Conditional" syscalls
383 *
384 * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
385 * but it doesn't work on all toolchains, so we just do it by hand
386 */
387#ifndef cond_syscall
388#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall");
389#endif
390
391#endif /* __KERNEL__ */
392#endif /* _ASM_UNISTD_H */
diff --git a/arch/mn10300/include/asm/user.h b/arch/mn10300/include/asm/user.h
new file mode 100644
index 000000000000..e1193908b78c
--- /dev/null
+++ b/arch/mn10300/include/asm/user.h
@@ -0,0 +1,53 @@
1/* MN10300 User process data
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_USER_H
12#define _ASM_USER_H
13
14#include <asm/page.h>
15#include <linux/ptrace.h>
16
17#ifndef __ASSEMBLY__
18/*
19 * When the kernel dumps core, it starts by dumping the user struct - this will
20 * be used by gdb to figure out where the data and stack segments are within
21 * the file, and what virtual addresses to use.
22 */
23struct user {
24 /* We start with the registers, to mimic the way that "memory" is
25 * returned from the ptrace(3,...) function.
26 */
27 struct pt_regs regs; /* Where the registers are actually stored */
28
29 /* The rest of this junk is to help gdb figure out what goes where */
30 unsigned long int u_tsize; /* Text segment size (pages). */
31 unsigned long int u_dsize; /* Data segment size (pages). */
32 unsigned long int u_ssize; /* Stack segment size (pages). */
33 unsigned long start_code; /* Starting virtual address of text. */
34 unsigned long start_stack; /* Starting virtual address of stack area.
35 This is actually the bottom of the stack,
36 the top of the stack is always found in the
37 esp register. */
38 long int signal; /* Signal that caused the core dump. */
39 int reserved; /* No longer used */
40 struct user_pt_regs *u_ar0; /* Used by gdb to help find the values for */
41
42 /* the registers */
43 unsigned long magic; /* To uniquely identify a core file */
44 char u_comm[32]; /* User command that was responsible */
45};
46#endif
47
48#define NBPG PAGE_SIZE
49#define UPAGES 1
50#define HOST_TEXT_START_ADDR +(u.start_code)
51#define HOST_STACK_END_ADDR +(u.start_stack + u.u_ssize * NBPG)
52
53#endif /* _ASM_USER_H */
diff --git a/arch/mn10300/include/asm/vga.h b/arch/mn10300/include/asm/vga.h
new file mode 100644
index 000000000000..0163e50a3459
--- /dev/null
+++ b/arch/mn10300/include/asm/vga.h
@@ -0,0 +1,17 @@
1/* MN10300 VGA register definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_VGA_H
13#define _ASM_VGA_H
14
15
16
17#endif /* _ASM_VGA_H */
diff --git a/arch/mn10300/include/asm/xor.h b/arch/mn10300/include/asm/xor.h
new file mode 100644
index 000000000000..c82eb12a5b18
--- /dev/null
+++ b/arch/mn10300/include/asm/xor.h
@@ -0,0 +1 @@
#include <asm-generic/xor.h>
diff --git a/arch/mn10300/kernel/entry.S b/arch/mn10300/kernel/entry.S
index ceeaaaa359e2..3dc3e462f92a 100644
--- a/arch/mn10300/kernel/entry.S
+++ b/arch/mn10300/kernel/entry.S
@@ -20,7 +20,7 @@
20#include <asm/intctl-regs.h> 20#include <asm/intctl-regs.h>
21#include <asm/busctl-regs.h> 21#include <asm/busctl-regs.h>
22#include <asm/timer-regs.h> 22#include <asm/timer-regs.h>
23#include <asm/unit/leds.h> 23#include <unit/leds.h>
24#include <asm/page.h> 24#include <asm/page.h>
25#include <asm/pgtable.h> 25#include <asm/pgtable.h>
26#include <asm/errno.h> 26#include <asm/errno.h>
@@ -723,6 +723,8 @@ ENTRY(sys_call_table)
723 .long sys_dup3 723 .long sys_dup3
724 .long sys_pipe2 724 .long sys_pipe2
725 .long sys_inotify_init1 725 .long sys_inotify_init1
726 .long sys_preadv
727 .long sys_pwritev /* 335 */
726 728
727 729
728nr_syscalls=(.-sys_call_table)/4 730nr_syscalls=(.-sys_call_table)/4
diff --git a/arch/mn10300/kernel/gdb-io-serial-low.S b/arch/mn10300/kernel/gdb-io-serial-low.S
index c68dcd052201..4998b24f5d3a 100644
--- a/arch/mn10300/kernel/gdb-io-serial-low.S
+++ b/arch/mn10300/kernel/gdb-io-serial-low.S
@@ -18,7 +18,7 @@
18#include <asm/thread_info.h> 18#include <asm/thread_info.h>
19#include <asm/frame.inc> 19#include <asm/frame.inc>
20#include <asm/intctl-regs.h> 20#include <asm/intctl-regs.h>
21#include <asm/unit/serial.h> 21#include <unit/serial.h>
22 22
23 .text 23 .text
24 24
diff --git a/arch/mn10300/kernel/gdb-io-serial.c b/arch/mn10300/kernel/gdb-io-serial.c
index 11584c51acd9..ae663dc717e9 100644
--- a/arch/mn10300/kernel/gdb-io-serial.c
+++ b/arch/mn10300/kernel/gdb-io-serial.c
@@ -22,7 +22,7 @@
22#include <asm/gdb-stub.h> 22#include <asm/gdb-stub.h>
23#include <asm/exceptions.h> 23#include <asm/exceptions.h>
24#include <asm/serial-regs.h> 24#include <asm/serial-regs.h>
25#include <asm/unit/serial.h> 25#include <unit/serial.h>
26 26
27/* 27/*
28 * initialise the GDB stub 28 * initialise the GDB stub
diff --git a/arch/mn10300/kernel/gdb-io-ttysm-low.S b/arch/mn10300/kernel/gdb-io-ttysm-low.S
index 677c7876307c..060b7cca735d 100644
--- a/arch/mn10300/kernel/gdb-io-ttysm-low.S
+++ b/arch/mn10300/kernel/gdb-io-ttysm-low.S
@@ -18,7 +18,7 @@
18#include <asm/cpu-regs.h> 18#include <asm/cpu-regs.h>
19#include <asm/frame.inc> 19#include <asm/frame.inc>
20#include <asm/intctl-regs.h> 20#include <asm/intctl-regs.h>
21#include <asm/unit/serial.h> 21#include <unit/serial.h>
22#include "mn10300-serial.h" 22#include "mn10300-serial.h"
23 23
24 .text 24 .text
diff --git a/arch/mn10300/kernel/gdb-io-ttysm.c b/arch/mn10300/kernel/gdb-io-ttysm.c
index e94c25e8ca05..a560bbc3137d 100644
--- a/arch/mn10300/kernel/gdb-io-ttysm.c
+++ b/arch/mn10300/kernel/gdb-io-ttysm.c
@@ -20,7 +20,7 @@
20#include <asm/system.h> 20#include <asm/system.h>
21#include <asm/gdb-stub.h> 21#include <asm/gdb-stub.h>
22#include <asm/exceptions.h> 22#include <asm/exceptions.h>
23#include <asm/unit/clock.h> 23#include <unit/clock.h>
24#include "mn10300-serial.h" 24#include "mn10300-serial.h"
25 25
26#if defined(CONFIG_GDBSTUB_ON_TTYSM0) 26#if defined(CONFIG_GDBSTUB_ON_TTYSM0)
diff --git a/arch/mn10300/kernel/gdb-stub.c b/arch/mn10300/kernel/gdb-stub.c
index 0ea7482c1522..41b11706c8ed 100644
--- a/arch/mn10300/kernel/gdb-stub.c
+++ b/arch/mn10300/kernel/gdb-stub.c
@@ -136,8 +136,8 @@
136#include <asm/cacheflush.h> 136#include <asm/cacheflush.h>
137#include <asm/serial-regs.h> 137#include <asm/serial-regs.h>
138#include <asm/busctl-regs.h> 138#include <asm/busctl-regs.h>
139#include <asm/unit/leds.h> 139#include <unit/leds.h>
140#include <asm/unit/serial.h> 140#include <unit/serial.h>
141 141
142/* define to use F7F7 rather than FF which is subverted by JTAG debugger */ 142/* define to use F7F7 rather than FF which is subverted by JTAG debugger */
143#undef GDBSTUB_USE_F7F7_AS_BREAKPOINT 143#undef GDBSTUB_USE_F7F7_AS_BREAKPOINT
diff --git a/arch/mn10300/kernel/head.S b/arch/mn10300/kernel/head.S
index 606bd8c6758d..8a8309fbe3c4 100644
--- a/arch/mn10300/kernel/head.S
+++ b/arch/mn10300/kernel/head.S
@@ -17,7 +17,7 @@
17#include <asm/pgtable.h> 17#include <asm/pgtable.h>
18#include <asm/frame.inc> 18#include <asm/frame.inc>
19#include <asm/param.h> 19#include <asm/param.h>
20#include <asm/unit/serial.h> 20#include <unit/serial.h>
21 21
22 .section .text.head,"ax" 22 .section .text.head,"ax"
23 23
diff --git a/arch/mn10300/kernel/irq.c b/arch/mn10300/kernel/irq.c
index 50fdb5c16e0c..4c3c58ef5cda 100644
--- a/arch/mn10300/kernel/irq.c
+++ b/arch/mn10300/kernel/irq.c
@@ -140,7 +140,7 @@ void __init init_IRQ(void)
140 int irq; 140 int irq;
141 141
142 for (irq = 0; irq < NR_IRQS; irq++) 142 for (irq = 0; irq < NR_IRQS; irq++)
143 if (irq_desc[irq].chip == &no_irq_type) 143 if (irq_desc[irq].chip == &no_irq_chip)
144 /* due to the PIC latching interrupt requests, even 144 /* due to the PIC latching interrupt requests, even
145 * when the IRQ is disabled, IRQ_PENDING is superfluous 145 * when the IRQ is disabled, IRQ_PENDING is superfluous
146 * and we can use handle_level_irq() for edge-triggered 146 * and we can use handle_level_irq() for edge-triggered
diff --git a/arch/mn10300/kernel/mn10300-serial-low.S b/arch/mn10300/kernel/mn10300-serial-low.S
index ef3f4c1df2a4..224485388228 100644
--- a/arch/mn10300/kernel/mn10300-serial-low.S
+++ b/arch/mn10300/kernel/mn10300-serial-low.S
@@ -18,8 +18,8 @@
18#include <asm/cpu-regs.h> 18#include <asm/cpu-regs.h>
19#include <asm/frame.inc> 19#include <asm/frame.inc>
20#include <asm/timer-regs.h> 20#include <asm/timer-regs.h>
21#include <asm/proc/cache.h> 21#include <proc/cache.h>
22#include <asm/unit/timex.h> 22#include <unit/timex.h>
23#include "mn10300-serial.h" 23#include "mn10300-serial.h"
24 24
25#define SCxCTR 0x00 25#define SCxCTR 0x00
diff --git a/arch/mn10300/kernel/mn10300-serial.c b/arch/mn10300/kernel/mn10300-serial.c
index 59b9c4bf9583..2fd59664d00a 100644
--- a/arch/mn10300/kernel/mn10300-serial.c
+++ b/arch/mn10300/kernel/mn10300-serial.c
@@ -41,7 +41,7 @@ static const char serial_revdate[] = "2007-11-06";
41#include <asm/irq.h> 41#include <asm/irq.h>
42#include <asm/bitops.h> 42#include <asm/bitops.h>
43#include <asm/serial-regs.h> 43#include <asm/serial-regs.h>
44#include <asm/unit/timex.h> 44#include <unit/timex.h>
45#include "mn10300-serial.h" 45#include "mn10300-serial.h"
46 46
47static inline __attribute__((format(printf, 1, 2))) 47static inline __attribute__((format(printf, 1, 2)))
diff --git a/arch/mn10300/kernel/mn10300-watchdog.c b/arch/mn10300/kernel/mn10300-watchdog.c
index 2e370d88a87a..f362d9d138f1 100644
--- a/arch/mn10300/kernel/mn10300-watchdog.c
+++ b/arch/mn10300/kernel/mn10300-watchdog.c
@@ -25,7 +25,7 @@
25#include <asm/div64.h> 25#include <asm/div64.h>
26#include <asm/smp.h> 26#include <asm/smp.h>
27#include <asm/gdb-stub.h> 27#include <asm/gdb-stub.h>
28#include <asm/proc/clock.h> 28#include <proc/clock.h>
29 29
30static DEFINE_SPINLOCK(watchdog_print_lock); 30static DEFINE_SPINLOCK(watchdog_print_lock);
31static unsigned int watchdog; 31static unsigned int watchdog;
diff --git a/arch/mn10300/kernel/setup.c b/arch/mn10300/kernel/setup.c
index e1d88ab51008..79890edfd67a 100644
--- a/arch/mn10300/kernel/setup.c
+++ b/arch/mn10300/kernel/setup.c
@@ -30,7 +30,7 @@
30#include <asm/setup.h> 30#include <asm/setup.h>
31#include <asm/io.h> 31#include <asm/io.h>
32#include <asm/smp.h> 32#include <asm/smp.h>
33#include <asm/proc/proc.h> 33#include <proc/proc.h>
34#include <asm/busctl-regs.h> 34#include <asm/busctl-regs.h>
35#include <asm/fpu.h> 35#include <asm/fpu.h>
36#include <asm/sections.h> 36#include <asm/sections.h>
@@ -136,10 +136,6 @@ void __init setup_arch(char **cmdline_p)
136 data_resource.start = virt_to_bus(&_etext); 136 data_resource.start = virt_to_bus(&_etext);
137 data_resource.end = virt_to_bus(&_edata)-1; 137 data_resource.end = virt_to_bus(&_edata)-1;
138 138
139#define PFN_UP(x) (((x) + PAGE_SIZE-1) >> PAGE_SHIFT)
140#define PFN_DOWN(x) ((x) >> PAGE_SHIFT)
141#define PFN_PHYS(x) ((x) << PAGE_SHIFT)
142
143 start_pfn = (CONFIG_KERNEL_RAM_BASE_ADDRESS >> PAGE_SHIFT); 139 start_pfn = (CONFIG_KERNEL_RAM_BASE_ADDRESS >> PAGE_SHIFT);
144 kstart_pfn = PFN_UP(__pa(&_text)); 140 kstart_pfn = PFN_UP(__pa(&_text));
145 free_pfn = PFN_UP(__pa(&_end)); 141 free_pfn = PFN_UP(__pa(&_end));
diff --git a/arch/mn10300/kernel/traps.c b/arch/mn10300/kernel/traps.c
index fcb9a03d46a8..681ad8c9e4fb 100644
--- a/arch/mn10300/kernel/traps.c
+++ b/arch/mn10300/kernel/traps.c
@@ -37,7 +37,7 @@
37#include <asm/cacheflush.h> 37#include <asm/cacheflush.h>
38#include <asm/cpu-regs.h> 38#include <asm/cpu-regs.h>
39#include <asm/busctl-regs.h> 39#include <asm/busctl-regs.h>
40#include <asm/unit/leds.h> 40#include <unit/leds.h>
41#include <asm/fpu.h> 41#include <asm/fpu.h>
42#include <asm/gdb-stub.h> 42#include <asm/gdb-stub.h>
43#include <asm/sections.h> 43#include <asm/sections.h>
diff --git a/arch/mn10300/oprofile/Kconfig b/arch/mn10300/oprofile/Kconfig
deleted file mode 100644
index 19d37730b664..000000000000
--- a/arch/mn10300/oprofile/Kconfig
+++ /dev/null
@@ -1,23 +0,0 @@
1
2menu "Profiling support"
3 depends on EXPERIMENTAL
4
5config PROFILING
6 bool "Profiling support (EXPERIMENTAL)"
7 help
8 Say Y here to enable the extended profiling support mechanisms used
9 by profilers such as OProfile.
10
11
12config OPROFILE
13 tristate "OProfile system profiling (EXPERIMENTAL)"
14 depends on PROFILING
15 help
16 OProfile is a profiling system capable of profiling the
17 whole system, include the kernel, kernel modules, libraries,
18 and applications.
19
20 If unsure, say N.
21
22endmenu
23
diff --git a/arch/mn10300/proc-mn103e010/include/proc/cache.h b/arch/mn10300/proc-mn103e010/include/proc/cache.h
new file mode 100644
index 000000000000..bdc1f9a59b4c
--- /dev/null
+++ b/arch/mn10300/proc-mn103e010/include/proc/cache.h
@@ -0,0 +1,33 @@
1/* MN103E010 Cache specification
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_PROC_CACHE_H
12#define _ASM_PROC_CACHE_H
13
14/* L1 cache */
15
16#define L1_CACHE_NWAYS 4 /* number of ways in caches */
17#define L1_CACHE_NENTRIES 256 /* number of entries in each way */
18#define L1_CACHE_BYTES 16 /* bytes per entry */
19#define L1_CACHE_SHIFT 4 /* shift for bytes per entry */
20#define L1_CACHE_WAYDISP 0x1000 /* displacement of one way from the next */
21
22#define L1_CACHE_TAG_VALID 0x00000001 /* cache tag valid bit */
23#define L1_CACHE_TAG_DIRTY 0x00000008 /* data cache tag dirty bit */
24#define L1_CACHE_TAG_ENTRY 0x00000ff0 /* cache tag entry address mask */
25#define L1_CACHE_TAG_ADDRESS 0xfffff000 /* cache tag line address mask */
26
27/*
28 * specification of the interval between interrupt checking intervals whilst
29 * managing the cache with the interrupts disabled
30 */
31#define MN10300_DCACHE_INV_RANGE_INTR_LOG2_INTERVAL 4
32
33#endif /* _ASM_PROC_CACHE_H */
diff --git a/arch/mn10300/proc-mn103e010/include/proc/clock.h b/arch/mn10300/proc-mn103e010/include/proc/clock.h
new file mode 100644
index 000000000000..aa23e147d620
--- /dev/null
+++ b/arch/mn10300/proc-mn103e010/include/proc/clock.h
@@ -0,0 +1,18 @@
1/* MN103E010-specific clocks
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_PROC_CLOCK_H
12#define _ASM_PROC_CLOCK_H
13
14#include <unit/clock.h>
15
16#define MN10300_WDCLK MN10300_IOCLK
17
18#endif /* _ASM_PROC_CLOCK_H */
diff --git a/arch/mn10300/proc-mn103e010/include/proc/irq.h b/arch/mn10300/proc-mn103e010/include/proc/irq.h
new file mode 100644
index 000000000000..aa6ee8f98b1b
--- /dev/null
+++ b/arch/mn10300/proc-mn103e010/include/proc/irq.h
@@ -0,0 +1,34 @@
1/* MN103E010 On-board interrupt controller numbers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_PROC_IRQ_H
13#define _ASM_PROC_IRQ_H
14
15#ifdef __KERNEL__
16
17#define GxICR_NUM_IRQS 42
18
19#define GxICR_NUM_XIRQS 8
20
21#define XIRQ0 34
22#define XIRQ1 35
23#define XIRQ2 36
24#define XIRQ3 37
25#define XIRQ4 38
26#define XIRQ5 39
27#define XIRQ6 40
28#define XIRQ7 41
29
30#define XIRQ2IRQ(num) (XIRQ0 + num)
31
32#endif /* __KERNEL__ */
33
34#endif /* _ASM_PROC_IRQ_H */
diff --git a/arch/mn10300/proc-mn103e010/include/proc/proc.h b/arch/mn10300/proc-mn103e010/include/proc/proc.h
new file mode 100644
index 000000000000..22a2b93f70b7
--- /dev/null
+++ b/arch/mn10300/proc-mn103e010/include/proc/proc.h
@@ -0,0 +1,18 @@
1/* MN103E010 Processor description
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_PROC_PROC_H
13#define _ASM_PROC_PROC_H
14
15#define PROCESSOR_VENDOR_NAME "Matsushita"
16#define PROCESSOR_MODEL_NAME "mn103e010"
17
18#endif /* _ASM_PROC_PROC_H */
diff --git a/arch/mn10300/unit-asb2303/include/unit/clock.h b/arch/mn10300/unit-asb2303/include/unit/clock.h
new file mode 100644
index 000000000000..8b450e920af1
--- /dev/null
+++ b/arch/mn10300/unit-asb2303/include/unit/clock.h
@@ -0,0 +1,45 @@
1/* ASB2303-specific clocks
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_UNIT_CLOCK_H
13#define _ASM_UNIT_CLOCK_H
14
15#ifndef __ASSEMBLY__
16
17#ifdef CONFIG_MN10300_RTC
18
19extern unsigned long mn10300_ioclk; /* IOCLK (crystal speed) in HZ */
20extern unsigned long mn10300_iobclk;
21extern unsigned long mn10300_tsc_per_HZ;
22
23#define MN10300_IOCLK ((unsigned long)mn10300_ioclk)
24/* If this processors has a another clock, uncomment the below. */
25/* #define MN10300_IOBCLK ((unsigned long)mn10300_iobclk) */
26
27#else /* !CONFIG_MN10300_RTC */
28
29#define MN10300_IOCLK 33333333UL
30/* #define MN10300_IOBCLK 66666666UL */
31
32#endif /* !CONFIG_MN10300_RTC */
33
34#define MN10300_JCCLK MN10300_IOCLK
35#define MN10300_TSCCLK MN10300_IOCLK
36
37#ifdef CONFIG_MN10300_RTC
38#define MN10300_TSC_PER_HZ ((unsigned long)mn10300_tsc_per_HZ)
39#else /* !CONFIG_MN10300_RTC */
40#define MN10300_TSC_PER_HZ (MN10300_TSCCLK/HZ)
41#endif /* !CONFIG_MN10300_RTC */
42
43#endif /* !__ASSEMBLY__ */
44
45#endif /* _ASM_UNIT_CLOCK_H */
diff --git a/arch/mn10300/unit-asb2303/include/unit/leds.h b/arch/mn10300/unit-asb2303/include/unit/leds.h
new file mode 100644
index 000000000000..3a7543ea7b5c
--- /dev/null
+++ b/arch/mn10300/unit-asb2303/include/unit/leds.h
@@ -0,0 +1,43 @@
1/* ASB2303-specific LEDs
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_UNIT_LEDS_H
13#define _ASM_UNIT_LEDS_H
14
15#include <asm/pio-regs.h>
16#include <asm/cpu-regs.h>
17#include <asm/exceptions.h>
18
19#define ASB2303_GPIO0DEF __SYSREG(0xDB000000, u32)
20#define ASB2303_7SEGLEDS __SYSREG(0xDB000008, u32)
21
22/*
23 * use the 7-segment LEDs to indicate states
24 */
25
26/* flip the 7-segment LEDs between "G" and "-" */
27#define mn10300_set_gdbleds(ONOFF) \
28do { \
29 ASB2303_7SEGLEDS = (ONOFF) ? 0x85 : 0x7f; \
30} while (0)
31
32/* indicate double-fault by displaying "d" on the LEDs */
33#define mn10300_set_dbfleds \
34 mov 0x43,d0 ; \
35 movbu d0,(ASB2303_7SEGLEDS)
36
37#ifndef __ASSEMBLY__
38extern void peripheral_leds_display_exception(enum exception_code code);
39extern void peripheral_leds_led_chase(void);
40extern void debug_to_serial(const char *p, int n);
41#endif /* __ASSEMBLY__ */
42
43#endif /* _ASM_UNIT_LEDS_H */
diff --git a/arch/mn10300/unit-asb2303/include/unit/serial.h b/arch/mn10300/unit-asb2303/include/unit/serial.h
new file mode 100644
index 000000000000..047566cd2e36
--- /dev/null
+++ b/arch/mn10300/unit-asb2303/include/unit/serial.h
@@ -0,0 +1,136 @@
1/* ASB2303-specific 8250 serial ports
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_UNIT_SERIAL_H
13#define _ASM_UNIT_SERIAL_H
14
15#include <asm/cpu-regs.h>
16#include <proc/irq.h>
17#include <linux/serial_reg.h>
18
19#define SERIAL_PORT0_BASE_ADDRESS 0xA6FB0000
20#define SERIAL_PORT1_BASE_ADDRESS 0xA6FC0000
21
22#define SERIAL_IRQ XIRQ0 /* Dual serial (PC16552) (Hi) */
23
24/*
25 * dispose of the /dev/ttyS0 and /dev/ttyS1 serial ports
26 */
27#ifndef CONFIG_GDBSTUB_ON_TTYSx
28
29#define SERIAL_PORT_DFNS \
30 { \
31 .baud_base = BASE_BAUD, \
32 .irq = SERIAL_IRQ, \
33 .flags = STD_COM_FLAGS, \
34 .iomem_base = (u8 *) SERIAL_PORT0_BASE_ADDRESS, \
35 .iomem_reg_shift = 2, \
36 .io_type = SERIAL_IO_MEM, \
37 }, \
38 { \
39 .baud_base = BASE_BAUD, \
40 .irq = SERIAL_IRQ, \
41 .flags = STD_COM_FLAGS, \
42 .iomem_base = (u8 *) SERIAL_PORT1_BASE_ADDRESS, \
43 .iomem_reg_shift = 2, \
44 .io_type = SERIAL_IO_MEM, \
45 },
46
47#ifndef __ASSEMBLY__
48
49static inline void __debug_to_serial(const char *p, int n)
50{
51}
52
53#endif /* !__ASSEMBLY__ */
54
55#else /* CONFIG_GDBSTUB_ON_TTYSx */
56
57#define SERIAL_PORT_DFNS /* both stolen by gdb-stub because they share an IRQ */
58
59#if defined(CONFIG_GDBSTUB_ON_TTYS0)
60#define GDBPORT_SERIAL_RX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_RX * 4, u8)
61#define GDBPORT_SERIAL_TX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_TX * 4, u8)
62#define GDBPORT_SERIAL_DLL __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLL * 4, u8)
63#define GDBPORT_SERIAL_DLM __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLM * 4, u8)
64#define GDBPORT_SERIAL_IER __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IER * 4, u8)
65#define GDBPORT_SERIAL_IIR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IIR * 4, u8)
66#define GDBPORT_SERIAL_FCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_FCR * 4, u8)
67#define GDBPORT_SERIAL_LCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LCR * 4, u8)
68#define GDBPORT_SERIAL_MCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MCR * 4, u8)
69#define GDBPORT_SERIAL_LSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LSR * 4, u8)
70#define GDBPORT_SERIAL_MSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MSR * 4, u8)
71#define GDBPORT_SERIAL_SCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_SCR * 4, u8)
72#define GDBPORT_SERIAL_IRQ SERIAL_IRQ
73
74#elif defined(CONFIG_GDBSTUB_ON_TTYS1)
75#define GDBPORT_SERIAL_RX __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_RX * 4, u8)
76#define GDBPORT_SERIAL_TX __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_TX * 4, u8)
77#define GDBPORT_SERIAL_DLL __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_DLL * 4, u8)
78#define GDBPORT_SERIAL_DLM __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_DLM * 4, u8)
79#define GDBPORT_SERIAL_IER __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_IER * 4, u8)
80#define GDBPORT_SERIAL_IIR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_IIR * 4, u8)
81#define GDBPORT_SERIAL_FCR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_FCR * 4, u8)
82#define GDBPORT_SERIAL_LCR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_LCR * 4, u8)
83#define GDBPORT_SERIAL_MCR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_MCR * 4, u8)
84#define GDBPORT_SERIAL_LSR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_LSR * 4, u8)
85#define GDBPORT_SERIAL_MSR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_MSR * 4, u8)
86#define GDBPORT_SERIAL_SCR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_SCR * 4, u8)
87#define GDBPORT_SERIAL_IRQ SERIAL_IRQ
88#endif
89
90#ifndef __ASSEMBLY__
91
92#define LSR_WAIT_FOR(STATE) \
93do { \
94 while (!(GDBPORT_SERIAL_LSR & UART_LSR_##STATE)) {} \
95} while (0)
96#define FLOWCTL_WAIT_FOR(LINE) \
97do { \
98 while (!(GDBPORT_SERIAL_MSR & UART_MSR_##LINE)) {} \
99} while (0)
100#define FLOWCTL_CLEAR(LINE) \
101do { \
102 GDBPORT_SERIAL_MCR &= ~UART_MCR_##LINE; \
103} while (0)
104#define FLOWCTL_SET(LINE) \
105do { \
106 GDBPORT_SERIAL_MCR |= UART_MCR_##LINE; \
107} while (0)
108#define FLOWCTL_QUERY(LINE) ({ GDBPORT_SERIAL_MSR & UART_MSR_##LINE; })
109
110static inline void __debug_to_serial(const char *p, int n)
111{
112 char ch;
113
114 FLOWCTL_SET(DTR);
115
116 for (; n > 0; n--) {
117 LSR_WAIT_FOR(THRE);
118 FLOWCTL_WAIT_FOR(CTS);
119
120 ch = *p++;
121 if (ch == 0x0a) {
122 GDBPORT_SERIAL_TX = 0x0d;
123 LSR_WAIT_FOR(THRE);
124 FLOWCTL_WAIT_FOR(CTS);
125 }
126 GDBPORT_SERIAL_TX = ch;
127 }
128
129 FLOWCTL_CLEAR(DTR);
130}
131
132#endif /* !__ASSEMBLY__ */
133
134#endif /* CONFIG_GDBSTUB_ON_TTYSx */
135
136#endif /* _ASM_UNIT_SERIAL_H */
diff --git a/arch/mn10300/unit-asb2303/include/unit/smc91111.h b/arch/mn10300/unit-asb2303/include/unit/smc91111.h
new file mode 100644
index 000000000000..dd456e9c513f
--- /dev/null
+++ b/arch/mn10300/unit-asb2303/include/unit/smc91111.h
@@ -0,0 +1,50 @@
1/* Support for the SMC91C111 NIC on an ASB2303
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_UNIT_SMC91111_H
12#define _ASM_UNIT_SMC91111_H
13
14#include <asm/intctl-regs.h>
15
16#define SMC91111_BASE 0xAA000300UL
17#define SMC91111_BASE_END 0xAA000400UL
18#define SMC91111_IRQ XIRQ3
19
20#define SMC_CAN_USE_8BIT 0
21#define SMC_CAN_USE_16BIT 1
22#define SMC_CAN_USE_32BIT 0
23#define SMC_NOWAIT 1
24#define SMC_IRQ_FLAGS (0)
25
26#if SMC_CAN_USE_8BIT
27#define SMC_inb(a, r) inb((unsigned long) ((a) + (r)))
28#define SMC_outb(v, a, r) outb(v, (unsigned long) ((a) + (r)))
29#endif
30
31#if SMC_CAN_USE_16BIT
32#define SMC_inw(a, r) inw((unsigned long) ((a) + (r)))
33#define SMC_outw(v, a, r) outw(v, (unsigned long) ((a) + (r)))
34#define SMC_insw(a, r, p, l) insw((unsigned long) ((a) + (r)), (p), (l))
35#define SMC_outsw(a, r, p, l) outsw((unsigned long) ((a) + (r)), (p), (l))
36#endif
37
38#if SMC_CAN_USE_32BIT
39#define SMC_inl(a, r) inl((unsigned long) ((a) + (r)))
40#define SMC_outl(v, a, r) outl(v, (unsigned long) ((a) + (r)))
41#define SMC_insl(a, r, p, l) insl((unsigned long) ((a) + (r)), (p), (l))
42#define SMC_outsl(a, r, p, l) outsl((unsigned long) ((a) + (r)), (p), (l))
43#endif
44
45#define RPC_LSA_DEFAULT RPC_LED_100_10
46#define RPC_LSB_DEFAULT RPC_LED_TX_RX
47
48#define set_irq_type(irq, type)
49
50#endif /* _ASM_UNIT_SMC91111_H */
diff --git a/arch/mn10300/unit-asb2303/include/unit/timex.h b/arch/mn10300/unit-asb2303/include/unit/timex.h
new file mode 100644
index 000000000000..f206b63c95b4
--- /dev/null
+++ b/arch/mn10300/unit-asb2303/include/unit/timex.h
@@ -0,0 +1,135 @@
1/* ASB2303-specific timer specifcations
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_UNIT_TIMEX_H
12#define _ASM_UNIT_TIMEX_H
13
14#ifndef __ASSEMBLY__
15#include <linux/irq.h>
16#endif /* __ASSEMBLY__ */
17
18#include <asm/timer-regs.h>
19#include <unit/clock.h>
20
21/*
22 * jiffies counter specifications
23 */
24
25#define TMJCBR_MAX 0xffff
26#define TMJCBC TM01BC
27
28#define TMJCMD TM01MD
29#define TMJCBR TM01BR
30#define TMJCIRQ TM1IRQ
31#define TMJCICR TM1ICR
32#define TMJCICR_LEVEL GxICR_LEVEL_5
33
34#ifndef __ASSEMBLY__
35
36static inline void startup_jiffies_counter(void)
37{
38 unsigned rate;
39 u16 md, t16;
40
41 /* use as little prescaling as possible to avoid losing accuracy */
42 md = TM0MD_SRC_IOCLK;
43 rate = MN10300_JCCLK / HZ;
44
45 if (rate > TMJCBR_MAX) {
46 md = TM0MD_SRC_IOCLK_8;
47 rate = MN10300_JCCLK / 8 / HZ;
48
49 if (rate > TMJCBR_MAX) {
50 md = TM0MD_SRC_IOCLK_32;
51 rate = MN10300_JCCLK / 32 / HZ;
52
53 if (rate > TMJCBR_MAX)
54 BUG();
55 }
56 }
57
58 TMJCBR = rate - 1;
59 t16 = TMJCBR;
60
61 TMJCMD =
62 md |
63 TM1MD_SRC_TM0CASCADE << 8 |
64 TM0MD_INIT_COUNTER |
65 TM1MD_INIT_COUNTER << 8;
66
67 TMJCMD =
68 md |
69 TM1MD_SRC_TM0CASCADE << 8 |
70 TM0MD_COUNT_ENABLE |
71 TM1MD_COUNT_ENABLE << 8;
72
73 t16 = TMJCMD;
74
75 TMJCICR |= GxICR_ENABLE | GxICR_DETECT | GxICR_REQUEST;
76 t16 = TMJCICR;
77}
78
79static inline void shutdown_jiffies_counter(void)
80{
81}
82
83#endif /* !__ASSEMBLY__ */
84
85
86/*
87 * timestamp counter specifications
88 */
89
90#define TMTSCBR_MAX 0xffffffff
91#define TMTSCBC TM45BC
92
93#ifndef __ASSEMBLY__
94
95static inline void startup_timestamp_counter(void)
96{
97 /* set up timer 4 & 5 cascaded as a 32-bit counter to count real time
98 * - count down from 4Gig-1 to 0 and wrap at IOCLK rate
99 */
100 TM45BR = TMTSCBR_MAX;
101
102 TM4MD = TM4MD_SRC_IOCLK;
103 TM4MD |= TM4MD_INIT_COUNTER;
104 TM4MD &= ~TM4MD_INIT_COUNTER;
105 TM4ICR = 0;
106
107 TM5MD = TM5MD_SRC_TM4CASCADE;
108 TM5MD |= TM5MD_INIT_COUNTER;
109 TM5MD &= ~TM5MD_INIT_COUNTER;
110 TM5ICR = 0;
111
112 TM5MD |= TM5MD_COUNT_ENABLE;
113 TM4MD |= TM4MD_COUNT_ENABLE;
114}
115
116static inline void shutdown_timestamp_counter(void)
117{
118 TM4MD = 0;
119 TM5MD = 0;
120}
121
122/*
123 * we use a cascaded pair of 16-bit down-counting timers to count I/O
124 * clock cycles for the purposes of time keeping
125 */
126typedef unsigned long cycles_t;
127
128static inline cycles_t read_timestamp_counter(void)
129{
130 return (cycles_t)TMTSCBC;
131}
132
133#endif /* !__ASSEMBLY__ */
134
135#endif /* _ASM_UNIT_TIMEX_H */
diff --git a/arch/mn10300/unit-asb2303/leds.c b/arch/mn10300/unit-asb2303/leds.c
index cd4bc78ccfc8..c03839357a14 100644
--- a/arch/mn10300/unit-asb2303/leds.c
+++ b/arch/mn10300/unit-asb2303/leds.c
@@ -16,7 +16,7 @@
16#include <asm/processor.h> 16#include <asm/processor.h>
17#include <asm/intctl-regs.h> 17#include <asm/intctl-regs.h>
18#include <asm/rtc-regs.h> 18#include <asm/rtc-regs.h>
19#include <asm/unit/leds.h> 19#include <unit/leds.h>
20 20
21#if 0 21#if 0
22static const u8 asb2303_led_hex_tbl[16] = { 22static const u8 asb2303_led_hex_tbl[16] = {
diff --git a/arch/mn10300/unit-asb2303/smc91111.c b/arch/mn10300/unit-asb2303/smc91111.c
index 30875dd65631..43c246439413 100644
--- a/arch/mn10300/unit-asb2303/smc91111.c
+++ b/arch/mn10300/unit-asb2303/smc91111.c
@@ -18,7 +18,7 @@
18#include <asm/timex.h> 18#include <asm/timex.h>
19#include <asm/processor.h> 19#include <asm/processor.h>
20#include <asm/intctl-regs.h> 20#include <asm/intctl-regs.h>
21#include <asm/unit/smc91111.h> 21#include <unit/smc91111.h>
22 22
23static struct resource smc91c111_resources[] = { 23static struct resource smc91c111_resources[] = {
24 [0] = { 24 [0] = {
diff --git a/arch/mn10300/unit-asb2305/include/unit/clock.h b/arch/mn10300/unit-asb2305/include/unit/clock.h
new file mode 100644
index 000000000000..7d514841ffda
--- /dev/null
+++ b/arch/mn10300/unit-asb2305/include/unit/clock.h
@@ -0,0 +1,45 @@
1/* ASB2305-specific clocks
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_UNIT_CLOCK_H
13#define _ASM_UNIT_CLOCK_H
14
15#ifndef __ASSEMBLY__
16
17#ifdef CONFIG_MN10300_RTC
18
19extern unsigned long mn10300_ioclk; /* IOCLK (crystal speed) in HZ */
20extern unsigned long mn10300_iobclk;
21extern unsigned long mn10300_tsc_per_HZ;
22
23#define MN10300_IOCLK ((unsigned long)mn10300_ioclk)
24/* If this processors has a another clock, uncomment the below. */
25/* #define MN10300_IOBCLK ((unsigned long)mn10300_iobclk) */
26
27#else /* !CONFIG_MN10300_RTC */
28
29#define MN10300_IOCLK 33333333UL
30/* #define MN10300_IOBCLK 66666666UL */
31
32#endif /* !CONFIG_MN10300_RTC */
33
34#define MN10300_JCCLK MN10300_IOCLK
35#define MN10300_TSCCLK MN10300_IOCLK
36
37#ifdef CONFIG_MN10300_RTC
38#define MN10300_TSC_PER_HZ ((unsigned long)mn10300_tsc_per_HZ)
39#else /* !CONFIG_MN10300_RTC */
40#define MN10300_TSC_PER_HZ (MN10300_TSCCLK/HZ)
41#endif /* !CONFIG_MN10300_RTC */
42
43#endif /* !__ASSEMBLY__ */
44
45#endif /* _ASM_UNIT_CLOCK_H */
diff --git a/arch/mn10300/unit-asb2305/include/unit/leds.h b/arch/mn10300/unit-asb2305/include/unit/leds.h
new file mode 100644
index 000000000000..bc471f617fd1
--- /dev/null
+++ b/arch/mn10300/unit-asb2305/include/unit/leds.h
@@ -0,0 +1,51 @@
1/* ASB2305-specific LEDs
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_UNIT_LEDS_H
13#define _ASM_UNIT_LEDS_H
14
15#include <asm/pio-regs.h>
16#include <asm/cpu-regs.h>
17#include <asm/exceptions.h>
18
19#define ASB2305_7SEGLEDS __SYSREG(0xA6F90000, u32)
20
21/* perform a hard reset by driving PIO06 low */
22#define mn10300_unit_hard_reset() \
23do { \
24 P0OUT &= 0xbf; \
25 P0MD = (P0MD & P0MD_6) | P0MD_6_OUT; \
26} while (0)
27
28/*
29 * use the 7-segment LEDs to indicate states
30 */
31/* indicate double-fault by displaying "db-f" on the LEDs */
32#define mn10300_set_dbfleds \
33 mov 0x43077f1d,d0 ; \
34 mov d0,(ASB2305_7SEGLEDS)
35
36/* flip the 7-segment LEDs between "Gdb-" and "----" */
37#define mn10300_set_gdbleds(ONOFF) \
38do { \
39 ASB2305_7SEGLEDS = (ONOFF) ? 0x8543077f : 0x7f7f7f7f; \
40} while (0)
41
42#ifndef __ASSEMBLY__
43extern void peripheral_leds_display_exception(enum exception_code);
44extern void peripheral_leds_led_chase(void);
45extern void peripheral_leds7x4_display_dec(unsigned int, unsigned int);
46extern void peripheral_leds7x4_display_hex(unsigned int, unsigned int);
47extern void peripheral_leds7x4_display_minssecs(unsigned int, unsigned int);
48extern void peripheral_leds7x4_display_rtc(void);
49#endif /* __ASSEMBLY__ */
50
51#endif /* _ASM_UNIT_LEDS_H */
diff --git a/arch/mn10300/unit-asb2305/include/unit/serial.h b/arch/mn10300/unit-asb2305/include/unit/serial.h
new file mode 100644
index 000000000000..3bfc90938787
--- /dev/null
+++ b/arch/mn10300/unit-asb2305/include/unit/serial.h
@@ -0,0 +1,120 @@
1/* ASB2305-specific 8250 serial ports
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_UNIT_SERIAL_H
12#define _ASM_UNIT_SERIAL_H
13
14#include <asm/cpu/cpu-regs.h>
15#include <proc/irq.h>
16#include <linux/serial_reg.h>
17
18#define SERIAL_PORT0_BASE_ADDRESS 0xA6FB0000
19#define ASB2305_DEBUG_MCR __SYSREG(0xA6FB0000 + UART_MCR * 2, u8)
20
21#define SERIAL_IRQ XIRQ0 /* Dual serial (PC16552) (Hi) */
22
23/*
24 * dispose of the /dev/ttyS0 serial port
25 */
26#ifndef CONFIG_GDBSTUB_ON_TTYSx
27
28#define SERIAL_PORT_DFNS \
29 { \
30 .baud_base = BASE_BAUD, \
31 .irq = SERIAL_IRQ, \
32 .flags = STD_COM_FLAGS, \
33 .iomem_base = (u8 *) SERIAL_PORT0_BASE_ADDRESS, \
34 .iomem_reg_shift = 2, \
35 .io_type = SERIAL_IO_MEM, \
36 },
37
38#ifndef __ASSEMBLY__
39
40static inline void __debug_to_serial(const char *p, int n)
41{
42}
43
44#endif /* !__ASSEMBLY__ */
45
46#else /* CONFIG_GDBSTUB_ON_TTYSx */
47
48#define SERIAL_PORT_DFNS /* stolen by gdb-stub */
49
50#if defined(CONFIG_GDBSTUB_ON_TTYS0)
51#define GDBPORT_SERIAL_RX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_RX * 4, u8)
52#define GDBPORT_SERIAL_TX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_TX * 4, u8)
53#define GDBPORT_SERIAL_DLL __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLL * 4, u8)
54#define GDBPORT_SERIAL_DLM __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLM * 4, u8)
55#define GDBPORT_SERIAL_IER __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IER * 4, u8)
56#define GDBPORT_SERIAL_IIR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IIR * 4, u8)
57#define GDBPORT_SERIAL_FCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_FCR * 4, u8)
58#define GDBPORT_SERIAL_LCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LCR * 4, u8)
59#define GDBPORT_SERIAL_MCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MCR * 4, u8)
60#define GDBPORT_SERIAL_LSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LSR * 4, u8)
61#define GDBPORT_SERIAL_MSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MSR * 4, u8)
62#define GDBPORT_SERIAL_SCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_SCR * 4, u8)
63#define GDBPORT_SERIAL_IRQ SERIAL_IRQ
64
65#elif defined(CONFIG_GDBSTUB_ON_TTYS1)
66#error The ASB2305 doesnt have a /dev/ttyS1
67#endif
68
69#ifndef __ASSEMBLY__
70
71#define TTYS0_TX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_TX * 4, u8)
72#define TTYS0_MCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MCR * 4, u8)
73#define TTYS0_LSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LSR * 4, u8)
74#define TTYS0_MSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MSR * 4, u8)
75
76#define LSR_WAIT_FOR(STATE) \
77do { \
78 while (!(TTYS0_LSR & UART_LSR_##STATE)) {} \
79} while (0)
80#define FLOWCTL_WAIT_FOR(LINE) \
81do { \
82 while (!(TTYS0_MSR & UART_MSR_##LINE)) {} \
83} while (0)
84#define FLOWCTL_CLEAR(LINE) \
85do { \
86 TTYS0_MCR &= ~UART_MCR_##LINE; \
87} while (0)
88#define FLOWCTL_SET(LINE) \
89do { \
90 TTYS0_MCR |= UART_MCR_##LINE; \
91} while (0)
92#define FLOWCTL_QUERY(LINE) ({ TTYS0_MSR & UART_MSR_##LINE; })
93
94static inline void __debug_to_serial(const char *p, int n)
95{
96 char ch;
97
98 FLOWCTL_SET(DTR);
99
100 for (; n > 0; n--) {
101 LSR_WAIT_FOR(THRE);
102 FLOWCTL_WAIT_FOR(CTS);
103
104 ch = *p++;
105 if (ch == 0x0a) {
106 TTYS0_TX = 0x0d;
107 LSR_WAIT_FOR(THRE);
108 FLOWCTL_WAIT_FOR(CTS);
109 }
110 TTYS0_TX = ch;
111 }
112
113 FLOWCTL_CLEAR(DTR);
114}
115
116#endif /* !__ASSEMBLY__ */
117
118#endif /* CONFIG_GDBSTUB_ON_TTYSx */
119
120#endif /* _ASM_UNIT_SERIAL_H */
diff --git a/arch/mn10300/unit-asb2305/include/unit/timex.h b/arch/mn10300/unit-asb2305/include/unit/timex.h
new file mode 100644
index 000000000000..a71c49aa85eb
--- /dev/null
+++ b/arch/mn10300/unit-asb2305/include/unit/timex.h
@@ -0,0 +1,135 @@
1/* ASB2305 timer specifcations
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_UNIT_TIMEX_H
12#define _ASM_UNIT_TIMEX_H
13
14#ifndef __ASSEMBLY__
15#include <linux/irq.h>
16#endif /* __ASSEMBLY__ */
17
18#include <asm/cpu/timer-regs.h>
19#include <unit/clock.h>
20
21/*
22 * jiffies counter specifications
23 */
24
25#define TMJCBR_MAX 0xffff
26#define TMJCBC TM01BC
27
28#define TMJCMD TM01MD
29#define TMJCBR TM01BR
30#define TMJCIRQ TM1IRQ
31#define TMJCICR TM1ICR
32#define TMJCICR_LEVEL GxICR_LEVEL_5
33
34#ifndef __ASSEMBLY__
35
36static inline void startup_jiffies_counter(void)
37{
38 unsigned rate;
39 u16 md, t16;
40
41 /* use as little prescaling as possible to avoid losing accuracy */
42 md = TM0MD_SRC_IOCLK;
43 rate = MN10300_JCCLK / HZ;
44
45 if (rate > TMJCBR_MAX) {
46 md = TM0MD_SRC_IOCLK_8;
47 rate = MN10300_JCCLK / 8 / HZ;
48
49 if (rate > TMJCBR_MAX) {
50 md = TM0MD_SRC_IOCLK_32;
51 rate = MN10300_JCCLK / 32 / HZ;
52
53 if (rate > TMJCBR_MAX)
54 BUG();
55 }
56 }
57
58 TMJCBR = rate - 1;
59 t16 = TMJCBR;
60
61 TMJCMD =
62 md |
63 TM1MD_SRC_TM0CASCADE << 8 |
64 TM0MD_INIT_COUNTER |
65 TM1MD_INIT_COUNTER << 8;
66
67 TMJCMD =
68 md |
69 TM1MD_SRC_TM0CASCADE << 8 |
70 TM0MD_COUNT_ENABLE |
71 TM1MD_COUNT_ENABLE << 8;
72
73 t16 = TMJCMD;
74
75 TMJCICR |= GxICR_ENABLE | GxICR_DETECT | GxICR_REQUEST;
76 t16 = TMJCICR;
77}
78
79static inline void shutdown_jiffies_counter(void)
80{
81}
82
83#endif /* !__ASSEMBLY__ */
84
85
86/*
87 * timestamp counter specifications
88 */
89
90#define TMTSCBR_MAX 0xffffffff
91#define TMTSCBC TM45BC
92
93#ifndef __ASSEMBLY__
94
95static inline void startup_timestamp_counter(void)
96{
97 /* set up timer 4 & 5 cascaded as a 32-bit counter to count real time
98 * - count down from 4Gig-1 to 0 and wrap at IOCLK rate
99 */
100 TM45BR = TMTSCBR_MAX;
101
102 TM4MD = TM4MD_SRC_IOCLK;
103 TM4MD |= TM4MD_INIT_COUNTER;
104 TM4MD &= ~TM4MD_INIT_COUNTER;
105 TM4ICR = 0;
106
107 TM5MD = TM5MD_SRC_TM4CASCADE;
108 TM5MD |= TM5MD_INIT_COUNTER;
109 TM5MD &= ~TM5MD_INIT_COUNTER;
110 TM5ICR = 0;
111
112 TM5MD |= TM5MD_COUNT_ENABLE;
113 TM4MD |= TM4MD_COUNT_ENABLE;
114}
115
116static inline void shutdown_timestamp_counter(void)
117{
118 TM4MD = 0;
119 TM5MD = 0;
120}
121
122/*
123 * we use a cascaded pair of 16-bit down-counting timers to count I/O
124 * clock cycles for the purposes of time keeping
125 */
126typedef unsigned long cycles_t;
127
128static inline cycles_t read_timestamp_counter(void)
129{
130 return (cycles_t) TMTSCBC;
131}
132
133#endif /* !__ASSEMBLY__ */
134
135#endif /* _ASM_UNIT_TIMEX_H */
diff --git a/arch/mn10300/unit-asb2305/leds.c b/arch/mn10300/unit-asb2305/leds.c
index e99dcc9cee1a..d345ff9042d5 100644
--- a/arch/mn10300/unit-asb2305/leds.c
+++ b/arch/mn10300/unit-asb2305/leds.c
@@ -15,7 +15,7 @@
15#include <asm/processor.h> 15#include <asm/processor.h>
16#include <asm/cpu/intctl-regs.h> 16#include <asm/cpu/intctl-regs.h>
17#include <asm/cpu/rtc-regs.h> 17#include <asm/cpu/rtc-regs.h>
18#include <asm/unit/leds.h> 18#include <unit/leds.h>
19 19
20static const u8 asb2305_led_hex_tbl[16] = { 20static const u8 asb2305_led_hex_tbl[16] = {
21 0x80, 0xf2, 0x48, 0x60, 0x32, 0x24, 0x04, 0xf0, 21 0x80, 0xf2, 0x48, 0x60, 0x32, 0x24, 0x04, 0xf0,
diff --git a/arch/mn10300/unit-asb2305/unit-init.c b/arch/mn10300/unit-asb2305/unit-init.c
index 72812a9439ac..1c452cc3f6e9 100644
--- a/arch/mn10300/unit-asb2305/unit-init.c
+++ b/arch/mn10300/unit-asb2305/unit-init.c
@@ -18,7 +18,7 @@
18#include <asm/cpu/intctl-regs.h> 18#include <asm/cpu/intctl-regs.h>
19#include <asm/cpu/rtc-regs.h> 19#include <asm/cpu/rtc-regs.h>
20#include <asm/cpu/serial-regs.h> 20#include <asm/cpu/serial-regs.h>
21#include <asm/unit/serial.h> 21#include <unit/serial.h>
22 22
23/* 23/*
24 * initialise some of the unit hardware before gdbstub is set up 24 * initialise some of the unit hardware before gdbstub is set up
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 5b50e1ac6179..4c7804551362 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -462,7 +462,7 @@ config PPC_64K_PAGES
462 462
463config PPC_256K_PAGES 463config PPC_256K_PAGES
464 bool "256k page size" if 44x 464 bool "256k page size" if 44x
465 depends on !STDBINUTILS && (!SHMEM || BROKEN) 465 depends on !STDBINUTILS
466 help 466 help
467 Make the page size 256k. 467 Make the page size 256k.
468 468
diff --git a/arch/powerpc/boot/dts/tqm8540.dts b/arch/powerpc/boot/dts/tqm8540.dts
index 231bae756637..b6f1fc6eb960 100644
--- a/arch/powerpc/boot/dts/tqm8540.dts
+++ b/arch/powerpc/boot/dts/tqm8540.dts
@@ -84,9 +84,9 @@
84 interrupt-parent = <&mpic>; 84 interrupt-parent = <&mpic>;
85 dfsrr; 85 dfsrr;
86 86
87 dtt@50 { 87 dtt@48 {
88 compatible = "national,lm75"; 88 compatible = "national,lm75";
89 reg = <0x50>; 89 reg = <0x48>;
90 }; 90 };
91 91
92 rtc@68 { 92 rtc@68 {
diff --git a/arch/powerpc/boot/dts/tqm8541.dts b/arch/powerpc/boot/dts/tqm8541.dts
index 4356a1f08295..fa6a3d54a8a5 100644
--- a/arch/powerpc/boot/dts/tqm8541.dts
+++ b/arch/powerpc/boot/dts/tqm8541.dts
@@ -83,9 +83,9 @@
83 interrupt-parent = <&mpic>; 83 interrupt-parent = <&mpic>;
84 dfsrr; 84 dfsrr;
85 85
86 dtt@50 { 86 dtt@48 {
87 compatible = "national,lm75"; 87 compatible = "national,lm75";
88 reg = <0x50>; 88 reg = <0x48>;
89 }; 89 };
90 90
91 rtc@68 { 91 rtc@68 {
diff --git a/arch/powerpc/boot/dts/tqm8548-bigflash.dts b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
index 19aa72301c83..00f7ed7a2455 100644
--- a/arch/powerpc/boot/dts/tqm8548-bigflash.dts
+++ b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
@@ -85,9 +85,9 @@
85 interrupt-parent = <&mpic>; 85 interrupt-parent = <&mpic>;
86 dfsrr; 86 dfsrr;
87 87
88 dtt@50 { 88 dtt@48 {
89 compatible = "national,lm75"; 89 compatible = "national,lm75";
90 reg = <0x50>; 90 reg = <0x48>;
91 }; 91 };
92 92
93 rtc@68 { 93 rtc@68 {
@@ -247,7 +247,7 @@
247 interrupts = <31 2 32 2 33 2>; 247 interrupts = <31 2 32 2 33 2>;
248 interrupt-parent = <&mpic>; 248 interrupt-parent = <&mpic>;
249 tbi-handle = <&tbi2>; 249 tbi-handle = <&tbi2>;
250 phy-handle = <&phy3>; 250 phy-handle = <&phy4>;
251 251
252 mdio@520 { 252 mdio@520 {
253 #address-cells = <1>; 253 #address-cells = <1>;
@@ -275,7 +275,7 @@
275 interrupts = <37 2 38 2 39 2>; 275 interrupts = <37 2 38 2 39 2>;
276 interrupt-parent = <&mpic>; 276 interrupt-parent = <&mpic>;
277 tbi-handle = <&tbi3>; 277 tbi-handle = <&tbi3>;
278 phy-handle = <&phy4>; 278 phy-handle = <&phy5>;
279 279
280 mdio@520 { 280 mdio@520 {
281 #address-cells = <1>; 281 #address-cells = <1>;
diff --git a/arch/powerpc/boot/dts/tqm8548.dts b/arch/powerpc/boot/dts/tqm8548.dts
index 49145a04fc6c..673e4a778ac8 100644
--- a/arch/powerpc/boot/dts/tqm8548.dts
+++ b/arch/powerpc/boot/dts/tqm8548.dts
@@ -85,9 +85,9 @@
85 interrupt-parent = <&mpic>; 85 interrupt-parent = <&mpic>;
86 dfsrr; 86 dfsrr;
87 87
88 dtt@50 { 88 dtt@48 {
89 compatible = "national,lm75"; 89 compatible = "national,lm75";
90 reg = <0x50>; 90 reg = <0x48>;
91 }; 91 };
92 92
93 rtc@68 { 93 rtc@68 {
@@ -247,7 +247,7 @@
247 interrupts = <31 2 32 2 33 2>; 247 interrupts = <31 2 32 2 33 2>;
248 interrupt-parent = <&mpic>; 248 interrupt-parent = <&mpic>;
249 tbi-handle = <&tbi2>; 249 tbi-handle = <&tbi2>;
250 phy-handle = <&phy3>; 250 phy-handle = <&phy4>;
251 251
252 mdio@520 { 252 mdio@520 {
253 #address-cells = <1>; 253 #address-cells = <1>;
@@ -275,7 +275,7 @@
275 interrupts = <37 2 38 2 39 2>; 275 interrupts = <37 2 38 2 39 2>;
276 interrupt-parent = <&mpic>; 276 interrupt-parent = <&mpic>;
277 tbi-handle = <&tbi3>; 277 tbi-handle = <&tbi3>;
278 phy-handle = <&phy4>; 278 phy-handle = <&phy5>;
279 279
280 mdio@520 { 280 mdio@520 {
281 #address-cells = <1>; 281 #address-cells = <1>;
diff --git a/arch/powerpc/boot/dts/tqm8555.dts b/arch/powerpc/boot/dts/tqm8555.dts
index 06d366ebbda3..6a99f1eef7ad 100644
--- a/arch/powerpc/boot/dts/tqm8555.dts
+++ b/arch/powerpc/boot/dts/tqm8555.dts
@@ -83,9 +83,9 @@
83 interrupt-parent = <&mpic>; 83 interrupt-parent = <&mpic>;
84 dfsrr; 84 dfsrr;
85 85
86 dtt@50 { 86 dtt@48 {
87 compatible = "national,lm75"; 87 compatible = "national,lm75";
88 reg = <0x50>; 88 reg = <0x48>;
89 }; 89 };
90 90
91 rtc@68 { 91 rtc@68 {
diff --git a/arch/powerpc/boot/dts/tqm8560.dts b/arch/powerpc/boot/dts/tqm8560.dts
index feff915e0492..b6c2d71defd3 100644
--- a/arch/powerpc/boot/dts/tqm8560.dts
+++ b/arch/powerpc/boot/dts/tqm8560.dts
@@ -85,9 +85,9 @@
85 interrupt-parent = <&mpic>; 85 interrupt-parent = <&mpic>;
86 dfsrr; 86 dfsrr;
87 87
88 dtt@50 { 88 dtt@48 {
89 compatible = "national,lm75"; 89 compatible = "national,lm75";
90 reg = <0x50>; 90 reg = <0x48>;
91 }; 91 };
92 92
93 rtc@68 { 93 rtc@68 {
diff --git a/arch/powerpc/configs/85xx/tqm8548_defconfig b/arch/powerpc/configs/85xx/tqm8548_defconfig
index 0bc45975911a..43030fea2eee 100644
--- a/arch/powerpc/configs/85xx/tqm8548_defconfig
+++ b/arch/powerpc/configs/85xx/tqm8548_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.29-rc2 3# Linux kernel version: 2.6.29-rc7
4# Mon Jan 26 15:36:20 2009 4# Mon Mar 16 09:03:28 2009
5# 5#
6# CONFIG_PPC64 is not set 6# CONFIG_PPC64 is not set
7 7
@@ -22,6 +22,7 @@ CONFIG_FSL_EMB_PERFMON=y
22# CONFIG_PHYS_64BIT is not set 22# CONFIG_PHYS_64BIT is not set
23CONFIG_SPE=y 23CONFIG_SPE=y
24CONFIG_PPC_MMU_NOHASH=y 24CONFIG_PPC_MMU_NOHASH=y
25CONFIG_PPC_BOOK3E_MMU=y
25# CONFIG_PPC_MM_SLICES is not set 26# CONFIG_PPC_MM_SLICES is not set
26# CONFIG_SMP is not set 27# CONFIG_SMP is not set
27CONFIG_PPC32=y 28CONFIG_PPC32=y
@@ -75,6 +76,15 @@ CONFIG_SYSVIPC_SYSCTL=y
75# CONFIG_BSD_PROCESS_ACCT is not set 76# CONFIG_BSD_PROCESS_ACCT is not set
76# CONFIG_TASKSTATS is not set 77# CONFIG_TASKSTATS is not set
77# CONFIG_AUDIT is not set 78# CONFIG_AUDIT is not set
79
80#
81# RCU Subsystem
82#
83CONFIG_CLASSIC_RCU=y
84# CONFIG_TREE_RCU is not set
85# CONFIG_PREEMPT_RCU is not set
86# CONFIG_TREE_RCU_TRACE is not set
87# CONFIG_PREEMPT_RCU_TRACE is not set
78# CONFIG_IKCONFIG is not set 88# CONFIG_IKCONFIG is not set
79CONFIG_LOG_BUF_SHIFT=14 89CONFIG_LOG_BUF_SHIFT=14
80CONFIG_GROUP_SCHED=y 90CONFIG_GROUP_SCHED=y
@@ -152,11 +162,6 @@ CONFIG_DEFAULT_AS=y
152# CONFIG_DEFAULT_CFQ is not set 162# CONFIG_DEFAULT_CFQ is not set
153# CONFIG_DEFAULT_NOOP is not set 163# CONFIG_DEFAULT_NOOP is not set
154CONFIG_DEFAULT_IOSCHED="anticipatory" 164CONFIG_DEFAULT_IOSCHED="anticipatory"
155CONFIG_CLASSIC_RCU=y
156# CONFIG_TREE_RCU is not set
157# CONFIG_PREEMPT_RCU is not set
158# CONFIG_TREE_RCU_TRACE is not set
159# CONFIG_PREEMPT_RCU_TRACE is not set
160# CONFIG_FREEZER is not set 165# CONFIG_FREEZER is not set
161 166
162# 167#
@@ -202,7 +207,7 @@ CONFIG_MPIC=y
202# 207#
203# Kernel options 208# Kernel options
204# 209#
205# CONFIG_HIGHMEM is not set 210CONFIG_HIGHMEM=y
206CONFIG_TICK_ONESHOT=y 211CONFIG_TICK_ONESHOT=y
207CONFIG_NO_HZ=y 212CONFIG_NO_HZ=y
208CONFIG_HIGH_RES_TIMERS=y 213CONFIG_HIGH_RES_TIMERS=y
@@ -244,6 +249,7 @@ CONFIG_UNEVICTABLE_LRU=y
244CONFIG_PPC_4K_PAGES=y 249CONFIG_PPC_4K_PAGES=y
245# CONFIG_PPC_16K_PAGES is not set 250# CONFIG_PPC_16K_PAGES is not set
246# CONFIG_PPC_64K_PAGES is not set 251# CONFIG_PPC_64K_PAGES is not set
252# CONFIG_PPC_256K_PAGES is not set
247CONFIG_FORCE_MAX_ZONEORDER=11 253CONFIG_FORCE_MAX_ZONEORDER=11
248CONFIG_PROC_DEVICETREE=y 254CONFIG_PROC_DEVICETREE=y
249# CONFIG_CMDLINE_BOOL is not set 255# CONFIG_CMDLINE_BOOL is not set
@@ -259,6 +265,7 @@ CONFIG_ZONE_DMA=y
259CONFIG_PPC_INDIRECT_PCI=y 265CONFIG_PPC_INDIRECT_PCI=y
260CONFIG_FSL_SOC=y 266CONFIG_FSL_SOC=y
261CONFIG_FSL_PCI=y 267CONFIG_FSL_PCI=y
268CONFIG_FSL_LBC=y
262CONFIG_PPC_PCI_CHOICE=y 269CONFIG_PPC_PCI_CHOICE=y
263CONFIG_PCI=y 270CONFIG_PCI=y
264CONFIG_PCI_DOMAINS=y 271CONFIG_PCI_DOMAINS=y
@@ -284,10 +291,11 @@ CONFIG_ARCH_SUPPORTS_MSI=y
284# Default settings for advanced configuration options are used 291# Default settings for advanced configuration options are used
285# 292#
286CONFIG_LOWMEM_SIZE=0x30000000 293CONFIG_LOWMEM_SIZE=0x30000000
294CONFIG_LOWMEM_CAM_NUM=3
287CONFIG_PAGE_OFFSET=0xc0000000 295CONFIG_PAGE_OFFSET=0xc0000000
288CONFIG_KERNEL_START=0xc0000000 296CONFIG_KERNEL_START=0xc0000000
289CONFIG_PHYSICAL_START=0x00000000 297CONFIG_PHYSICAL_START=0x00000000
290CONFIG_PHYSICAL_ALIGN=0x10000000 298CONFIG_PHYSICAL_ALIGN=0x04000000
291CONFIG_TASK_SIZE=0xc0000000 299CONFIG_TASK_SIZE=0xc0000000
292CONFIG_NET=y 300CONFIG_NET=y
293 301
@@ -363,12 +371,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
363# CONFIG_BT is not set 371# CONFIG_BT is not set
364# CONFIG_AF_RXRPC is not set 372# CONFIG_AF_RXRPC is not set
365# CONFIG_PHONET is not set 373# CONFIG_PHONET is not set
366CONFIG_WIRELESS=y 374# CONFIG_WIRELESS is not set
367# CONFIG_CFG80211 is not set
368CONFIG_WIRELESS_OLD_REGULATORY=y
369# CONFIG_WIRELESS_EXT is not set
370# CONFIG_LIB80211 is not set
371# CONFIG_MAC80211 is not set
372# CONFIG_WIMAX is not set 375# CONFIG_WIMAX is not set
373# CONFIG_RFKILL is not set 376# CONFIG_RFKILL is not set
374# CONFIG_NET_9P is not set 377# CONFIG_NET_9P is not set
@@ -471,27 +474,18 @@ CONFIG_MTD_NAND_IDS=y
471# CONFIG_MTD_NAND_NANDSIM is not set 474# CONFIG_MTD_NAND_NANDSIM is not set
472# CONFIG_MTD_NAND_PLATFORM is not set 475# CONFIG_MTD_NAND_PLATFORM is not set
473# CONFIG_MTD_NAND_FSL_ELBC is not set 476# CONFIG_MTD_NAND_FSL_ELBC is not set
474# CONFIG_MTD_NAND_FSL_UPM is not set 477CONFIG_MTD_NAND_FSL_UPM=y
475# CONFIG_MTD_ONENAND is not set 478# CONFIG_MTD_ONENAND is not set
476 479
477# 480#
478# LPDDR flash memory drivers 481# LPDDR flash memory drivers
479# 482#
480# CONFIG_MTD_LPDDR is not set 483# CONFIG_MTD_LPDDR is not set
481# CONFIG_MTD_QINFO_PROBE is not set
482 484
483# 485#
484# UBI - Unsorted block images 486# UBI - Unsorted block images
485# 487#
486CONFIG_MTD_UBI=m 488# CONFIG_MTD_UBI is not set
487CONFIG_MTD_UBI_WL_THRESHOLD=4096
488CONFIG_MTD_UBI_BEB_RESERVE=1
489# CONFIG_MTD_UBI_GLUEBI is not set
490
491#
492# UBI debugging options
493#
494# CONFIG_MTD_UBI_DEBUG is not set
495CONFIG_OF_DEVICE=y 489CONFIG_OF_DEVICE=y
496CONFIG_OF_I2C=y 490CONFIG_OF_I2C=y
497# CONFIG_PARPORT is not set 491# CONFIG_PARPORT is not set
@@ -515,69 +509,21 @@ CONFIG_BLK_DEV_RAM_SIZE=32768
515# CONFIG_BLK_DEV_HD is not set 509# CONFIG_BLK_DEV_HD is not set
516CONFIG_MISC_DEVICES=y 510CONFIG_MISC_DEVICES=y
517# CONFIG_PHANTOM is not set 511# CONFIG_PHANTOM is not set
518# CONFIG_EEPROM_93CX6 is not set
519# CONFIG_SGI_IOC4 is not set 512# CONFIG_SGI_IOC4 is not set
520# CONFIG_TIFM_CORE is not set 513# CONFIG_TIFM_CORE is not set
521# CONFIG_ICS932S401 is not set 514# CONFIG_ICS932S401 is not set
522# CONFIG_ENCLOSURE_SERVICES is not set 515# CONFIG_ENCLOSURE_SERVICES is not set
523# CONFIG_HP_ILO is not set 516# CONFIG_HP_ILO is not set
524# CONFIG_C2PORT is not set 517# CONFIG_C2PORT is not set
518
519#
520# EEPROM support
521#
522# CONFIG_EEPROM_AT24 is not set
523# CONFIG_EEPROM_LEGACY is not set
524# CONFIG_EEPROM_93CX6 is not set
525CONFIG_HAVE_IDE=y 525CONFIG_HAVE_IDE=y
526CONFIG_IDE=y 526# CONFIG_IDE is not set
527
528#
529# Please see Documentation/ide/ide.txt for help/info on IDE drives
530#
531CONFIG_IDE_TIMINGS=y
532# CONFIG_BLK_DEV_IDE_SATA is not set
533CONFIG_IDE_GD=y
534CONFIG_IDE_GD_ATA=y
535# CONFIG_IDE_GD_ATAPI is not set
536# CONFIG_BLK_DEV_IDECD is not set
537# CONFIG_BLK_DEV_IDETAPE is not set
538# CONFIG_IDE_TASK_IOCTL is not set
539CONFIG_IDE_PROC_FS=y
540
541#
542# IDE chipset support/bugfixes
543#
544# CONFIG_BLK_DEV_PLATFORM is not set
545CONFIG_BLK_DEV_IDEDMA_SFF=y
546
547#
548# PCI IDE chipsets support
549#
550CONFIG_BLK_DEV_IDEPCI=y
551CONFIG_IDEPCI_PCIBUS_ORDER=y
552# CONFIG_BLK_DEV_OFFBOARD is not set
553CONFIG_BLK_DEV_GENERIC=y
554# CONFIG_BLK_DEV_OPTI621 is not set
555CONFIG_BLK_DEV_IDEDMA_PCI=y
556# CONFIG_BLK_DEV_AEC62XX is not set
557# CONFIG_BLK_DEV_ALI15X3 is not set
558# CONFIG_BLK_DEV_AMD74XX is not set
559# CONFIG_BLK_DEV_CMD64X is not set
560# CONFIG_BLK_DEV_TRIFLEX is not set
561# CONFIG_BLK_DEV_CS5520 is not set
562# CONFIG_BLK_DEV_CS5530 is not set
563# CONFIG_BLK_DEV_HPT366 is not set
564# CONFIG_BLK_DEV_JMICRON is not set
565# CONFIG_BLK_DEV_SC1200 is not set
566# CONFIG_BLK_DEV_PIIX is not set
567# CONFIG_BLK_DEV_IT8172 is not set
568# CONFIG_BLK_DEV_IT8213 is not set
569# CONFIG_BLK_DEV_IT821X is not set
570# CONFIG_BLK_DEV_NS87415 is not set
571# CONFIG_BLK_DEV_PDC202XX_OLD is not set
572# CONFIG_BLK_DEV_PDC202XX_NEW is not set
573# CONFIG_BLK_DEV_SVWKS is not set
574# CONFIG_BLK_DEV_SIIMAGE is not set
575# CONFIG_BLK_DEV_SL82C105 is not set
576# CONFIG_BLK_DEV_SLC90E66 is not set
577# CONFIG_BLK_DEV_TRM290 is not set
578CONFIG_BLK_DEV_VIA82CXXX=y
579# CONFIG_BLK_DEV_TC86C001 is not set
580CONFIG_BLK_DEV_IDEDMA=y
581 527
582# 528#
583# SCSI device support 529# SCSI device support
@@ -650,7 +596,7 @@ CONFIG_MII=y
650CONFIG_NETDEV_1000=y 596CONFIG_NETDEV_1000=y
651# CONFIG_ACENIC is not set 597# CONFIG_ACENIC is not set
652# CONFIG_DL2K is not set 598# CONFIG_DL2K is not set
653CONFIG_E1000=y 599# CONFIG_E1000 is not set
654# CONFIG_E1000E is not set 600# CONFIG_E1000E is not set
655# CONFIG_IP1000 is not set 601# CONFIG_IP1000 is not set
656# CONFIG_IGB is not set 602# CONFIG_IGB is not set
@@ -668,6 +614,7 @@ CONFIG_GIANFAR=y
668# CONFIG_QLA3XXX is not set 614# CONFIG_QLA3XXX is not set
669# CONFIG_ATL1 is not set 615# CONFIG_ATL1 is not set
670# CONFIG_ATL1E is not set 616# CONFIG_ATL1E is not set
617# CONFIG_ATL1C is not set
671# CONFIG_JME is not set 618# CONFIG_JME is not set
672CONFIG_NETDEV_10000=y 619CONFIG_NETDEV_10000=y
673# CONFIG_CHELSIO_T1 is not set 620# CONFIG_CHELSIO_T1 is not set
@@ -835,8 +782,6 @@ CONFIG_I2C_MPC=y
835# Miscellaneous I2C Chip support 782# Miscellaneous I2C Chip support
836# 783#
837# CONFIG_DS1682 is not set 784# CONFIG_DS1682 is not set
838# CONFIG_EEPROM_AT24 is not set
839# CONFIG_EEPROM_LEGACY is not set
840# CONFIG_SENSORS_PCF8574 is not set 785# CONFIG_SENSORS_PCF8574 is not set
841# CONFIG_PCF8575 is not set 786# CONFIG_PCF8575 is not set
842# CONFIG_SENSORS_PCA9539 is not set 787# CONFIG_SENSORS_PCA9539 is not set
@@ -975,26 +920,7 @@ CONFIG_HID=y
975# Special HID drivers 920# Special HID drivers
976# 921#
977CONFIG_HID_COMPAT=y 922CONFIG_HID_COMPAT=y
978CONFIG_USB_SUPPORT=y 923# CONFIG_USB_SUPPORT is not set
979CONFIG_USB_ARCH_HAS_HCD=y
980CONFIG_USB_ARCH_HAS_OHCI=y
981CONFIG_USB_ARCH_HAS_EHCI=y
982# CONFIG_USB is not set
983# CONFIG_USB_OTG_WHITELIST is not set
984# CONFIG_USB_OTG_BLACKLIST_HUB is not set
985
986#
987# Enable Host or Gadget support to see Inventra options
988#
989
990#
991# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
992#
993# CONFIG_USB_GADGET is not set
994
995#
996# OTG and related infrastructure
997#
998# CONFIG_UWB is not set 924# CONFIG_UWB is not set
999# CONFIG_MMC is not set 925# CONFIG_MMC is not set
1000# CONFIG_MEMSTICK is not set 926# CONFIG_MEMSTICK is not set
@@ -1064,16 +990,9 @@ CONFIG_RTC_DRV_DS1307=y
1064# 990#
1065# File systems 991# File systems
1066# 992#
1067CONFIG_EXT2_FS=y 993# CONFIG_EXT2_FS is not set
1068# CONFIG_EXT2_FS_XATTR is not set 994# CONFIG_EXT3_FS is not set
1069# CONFIG_EXT2_FS_XIP is not set
1070CONFIG_EXT3_FS=y
1071CONFIG_EXT3_FS_XATTR=y
1072# CONFIG_EXT3_FS_POSIX_ACL is not set
1073# CONFIG_EXT3_FS_SECURITY is not set
1074# CONFIG_EXT4_FS is not set 995# CONFIG_EXT4_FS is not set
1075CONFIG_JBD=y
1076CONFIG_FS_MBCACHE=y
1077# CONFIG_REISERFS_FS is not set 996# CONFIG_REISERFS_FS is not set
1078# CONFIG_JFS_FS is not set 997# CONFIG_JFS_FS is not set
1079# CONFIG_FS_POSIX_ACL is not set 998# CONFIG_FS_POSIX_ACL is not set
@@ -1122,8 +1041,17 @@ CONFIG_MISC_FILESYSTEMS=y
1122# CONFIG_BEFS_FS is not set 1041# CONFIG_BEFS_FS is not set
1123# CONFIG_BFS_FS is not set 1042# CONFIG_BFS_FS is not set
1124# CONFIG_EFS_FS is not set 1043# CONFIG_EFS_FS is not set
1125# CONFIG_JFFS2_FS is not set 1044CONFIG_JFFS2_FS=y
1126# CONFIG_UBIFS_FS is not set 1045CONFIG_JFFS2_FS_DEBUG=0
1046CONFIG_JFFS2_FS_WRITEBUFFER=y
1047# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
1048# CONFIG_JFFS2_SUMMARY is not set
1049# CONFIG_JFFS2_FS_XATTR is not set
1050# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
1051CONFIG_JFFS2_ZLIB=y
1052# CONFIG_JFFS2_LZO is not set
1053CONFIG_JFFS2_RTIME=y
1054# CONFIG_JFFS2_RUBIN is not set
1127# CONFIG_CRAMFS is not set 1055# CONFIG_CRAMFS is not set
1128# CONFIG_SQUASHFS is not set 1056# CONFIG_SQUASHFS is not set
1129# CONFIG_VXFS_FS is not set 1057# CONFIG_VXFS_FS is not set
@@ -1184,6 +1112,8 @@ CONFIG_GENERIC_FIND_LAST_BIT=y
1184CONFIG_CRC32=y 1112CONFIG_CRC32=y
1185# CONFIG_CRC7 is not set 1113# CONFIG_CRC7 is not set
1186# CONFIG_LIBCRC32C is not set 1114# CONFIG_LIBCRC32C is not set
1115CONFIG_ZLIB_INFLATE=y
1116CONFIG_ZLIB_DEFLATE=y
1187CONFIG_PLIST=y 1117CONFIG_PLIST=y
1188CONFIG_HAS_IOMEM=y 1118CONFIG_HAS_IOMEM=y
1189CONFIG_HAS_IOPORT=y 1119CONFIG_HAS_IOPORT=y
@@ -1219,6 +1149,7 @@ CONFIG_DEBUG_MUTEXES=y
1219# CONFIG_DEBUG_SPINLOCK_SLEEP is not set 1149# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1220# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set 1150# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1221# CONFIG_DEBUG_KOBJECT is not set 1151# CONFIG_DEBUG_KOBJECT is not set
1152# CONFIG_DEBUG_HIGHMEM is not set
1222# CONFIG_DEBUG_BUGVERBOSE is not set 1153# CONFIG_DEBUG_BUGVERBOSE is not set
1223# CONFIG_DEBUG_INFO is not set 1154# CONFIG_DEBUG_INFO is not set
1224# CONFIG_DEBUG_VM is not set 1155# CONFIG_DEBUG_VM is not set
@@ -1236,6 +1167,7 @@ CONFIG_DEBUG_MUTEXES=y
1236# CONFIG_LATENCYTOP is not set 1167# CONFIG_LATENCYTOP is not set
1237CONFIG_SYSCTL_SYSCALL_CHECK=y 1168CONFIG_SYSCTL_SYSCALL_CHECK=y
1238CONFIG_HAVE_FUNCTION_TRACER=y 1169CONFIG_HAVE_FUNCTION_TRACER=y
1170CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
1239CONFIG_HAVE_DYNAMIC_FTRACE=y 1171CONFIG_HAVE_DYNAMIC_FTRACE=y
1240CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y 1172CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
1241 1173
diff --git a/arch/powerpc/include/asm/futex.h b/arch/powerpc/include/asm/futex.h
index 6d406c5c5de4..9696cc36d2dc 100644
--- a/arch/powerpc/include/asm/futex.h
+++ b/arch/powerpc/include/asm/futex.h
@@ -27,7 +27,7 @@
27 PPC_LONG "1b,4b,2b,4b\n" \ 27 PPC_LONG "1b,4b,2b,4b\n" \
28 ".previous" \ 28 ".previous" \
29 : "=&r" (oldval), "=&r" (ret) \ 29 : "=&r" (oldval), "=&r" (ret) \
30 : "b" (uaddr), "i" (-EFAULT), "1" (oparg) \ 30 : "b" (uaddr), "i" (-EFAULT), "r" (oparg) \
31 : "cr0", "memory") 31 : "cr0", "memory")
32 32
33static inline int futex_atomic_op_inuser (int encoded_op, int __user *uaddr) 33static inline int futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
@@ -47,19 +47,19 @@ static inline int futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
47 47
48 switch (op) { 48 switch (op) {
49 case FUTEX_OP_SET: 49 case FUTEX_OP_SET:
50 __futex_atomic_op("", ret, oldval, uaddr, oparg); 50 __futex_atomic_op("mr %1,%4\n", ret, oldval, uaddr, oparg);
51 break; 51 break;
52 case FUTEX_OP_ADD: 52 case FUTEX_OP_ADD:
53 __futex_atomic_op("add %1,%0,%1\n", ret, oldval, uaddr, oparg); 53 __futex_atomic_op("add %1,%0,%4\n", ret, oldval, uaddr, oparg);
54 break; 54 break;
55 case FUTEX_OP_OR: 55 case FUTEX_OP_OR:
56 __futex_atomic_op("or %1,%0,%1\n", ret, oldval, uaddr, oparg); 56 __futex_atomic_op("or %1,%0,%4\n", ret, oldval, uaddr, oparg);
57 break; 57 break;
58 case FUTEX_OP_ANDN: 58 case FUTEX_OP_ANDN:
59 __futex_atomic_op("andc %1,%0,%1\n", ret, oldval, uaddr, oparg); 59 __futex_atomic_op("andc %1,%0,%4\n", ret, oldval, uaddr, oparg);
60 break; 60 break;
61 case FUTEX_OP_XOR: 61 case FUTEX_OP_XOR:
62 __futex_atomic_op("xor %1,%0,%1\n", ret, oldval, uaddr, oparg); 62 __futex_atomic_op("xor %1,%0,%4\n", ret, oldval, uaddr, oparg);
63 break; 63 break;
64 default: 64 default:
65 ret = -ENOSYS; 65 ret = -ENOSYS;
diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h
index cbf154387091..86d2366ab6a1 100644
--- a/arch/powerpc/include/asm/mmu.h
+++ b/arch/powerpc/include/asm/mmu.h
@@ -52,6 +52,12 @@
52 */ 52 */
53#define MMU_FTR_NEED_DTLB_SW_LRU ASM_CONST(0x00200000) 53#define MMU_FTR_NEED_DTLB_SW_LRU ASM_CONST(0x00200000)
54 54
55/* This indicates that the processor uses the wrong opcode for tlbilx
56 * instructions. During the ISA 2.06 development the opcode for tlbilx
57 * changed and some early implementations used to old opcode
58 */
59#define MMU_FTR_TLBILX_EARLY_OPCODE ASM_CONST(0x00400000)
60
55#ifndef __ASSEMBLY__ 61#ifndef __ASSEMBLY__
56#include <asm/cputable.h> 62#include <asm/cputable.h>
57 63
diff --git a/arch/powerpc/include/asm/parport.h b/arch/powerpc/include/asm/parport.h
index 414c50e2e881..94942d60ddfd 100644
--- a/arch/powerpc/include/asm/parport.h
+++ b/arch/powerpc/include/asm/parport.h
@@ -29,7 +29,7 @@ static int __devinit parport_pc_find_nonpci_ports (int autoirq, int autodma)
29 prop = of_get_property(np, "interrupts", NULL); 29 prop = of_get_property(np, "interrupts", NULL);
30 if (!prop) 30 if (!prop)
31 continue; 31 continue;
32 if (parport_pc_probe_port(io1, io2, prop[0], autodma, NULL) != NULL) 32 if (parport_pc_probe_port(io1, io2, prop[0], autodma, NULL, 0) != NULL)
33 count++; 33 count++;
34 } 34 }
35 return count; 35 return count;
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h
index f4a4db8d5555..ef4da37f3c10 100644
--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -43,7 +43,8 @@
43 43
44#define PPC_INST_STSWI 0x7c0005aa 44#define PPC_INST_STSWI 0x7c0005aa
45#define PPC_INST_STSWX 0x7c00052a 45#define PPC_INST_STSWX 0x7c00052a
46#define PPC_INST_TLBILX 0x7c000626 46#define PPC_INST_TLBILX 0x7c000024
47#define PPC_INST_TLBILX_EARLY 0x7c000626
47#define PPC_INST_WAIT 0x7c00007c 48#define PPC_INST_WAIT 0x7c00007c
48 49
49/* macros to insert fields into opcodes */ 50/* macros to insert fields into opcodes */
@@ -63,10 +64,18 @@
63#define PPC_RFDI stringify_in_c(.long PPC_INST_RFDI) 64#define PPC_RFDI stringify_in_c(.long PPC_INST_RFDI)
64#define PPC_RFMCI stringify_in_c(.long PPC_INST_RFMCI) 65#define PPC_RFMCI stringify_in_c(.long PPC_INST_RFMCI)
65#define PPC_TLBILX(t, a, b) stringify_in_c(.long PPC_INST_TLBILX | \ 66#define PPC_TLBILX(t, a, b) stringify_in_c(.long PPC_INST_TLBILX | \
66 __PPC_T_TLB(t) | __PPC_RA(a) | __PPC_RB(b)) 67 __PPC_T_TLB(t) | \
68 __PPC_RA(a) | __PPC_RB(b))
67#define PPC_TLBILX_ALL(a, b) PPC_TLBILX(0, a, b) 69#define PPC_TLBILX_ALL(a, b) PPC_TLBILX(0, a, b)
68#define PPC_TLBILX_PID(a, b) PPC_TLBILX(1, a, b) 70#define PPC_TLBILX_PID(a, b) PPC_TLBILX(1, a, b)
69#define PPC_TLBILX_VA(a, b) PPC_TLBILX(3, a, b) 71#define PPC_TLBILX_VA(a, b) PPC_TLBILX(3, a, b)
72
73#define PPC_TLBILX_EARLY(t, a, b) stringify_in_c(.long PPC_INST_TLBILX_EARLY | \
74 __PPC_T_TLB(t) | \
75 __PPC_RA(a) | __PPC_RB(b))
76#define PPC_TLBILX_ALL_EARLY(a, b) PPC_TLBILX_EARLY(0, a, b)
77#define PPC_TLBILX_PID_EARLY(a, b) PPC_TLBILX_EARLY(1, a, b)
78#define PPC_TLBILX_VA_EARLY(a, b) PPC_TLBILX_EARLY(3, a, b)
70#define PPC_WAIT(w) stringify_in_c(.long PPC_INST_WAIT | \ 79#define PPC_WAIT(w) stringify_in_c(.long PPC_INST_WAIT | \
71 __PPC_WC(w)) 80 __PPC_WC(w))
72 81
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index cd1b687544f3..57db50f40289 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -1766,7 +1766,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1766 .cpu_features = CPU_FTRS_E500MC, 1766 .cpu_features = CPU_FTRS_E500MC,
1767 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1767 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1768 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 1768 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
1769 MMU_FTR_USE_TLBILX, 1769 MMU_FTR_USE_TLBILX | MMU_FTR_TLBILX_EARLY_OPCODE,
1770 .icache_bsize = 64, 1770 .icache_bsize = 64,
1771 .dcache_bsize = 64, 1771 .dcache_bsize = 64,
1772 .num_pmcs = 4, 1772 .num_pmcs = 4,
diff --git a/arch/powerpc/mm/tlb_nohash.c b/arch/powerpc/mm/tlb_nohash.c
index 7af72970faed..ad2eb4d34dd4 100644
--- a/arch/powerpc/mm/tlb_nohash.c
+++ b/arch/powerpc/mm/tlb_nohash.c
@@ -125,7 +125,6 @@ static void do_flush_tlb_page_ipi(void *param)
125 125
126void flush_tlb_mm(struct mm_struct *mm) 126void flush_tlb_mm(struct mm_struct *mm)
127{ 127{
128 cpumask_t cpu_mask;
129 unsigned int pid; 128 unsigned int pid;
130 129
131 preempt_disable(); 130 preempt_disable();
diff --git a/arch/powerpc/mm/tlb_nohash_low.S b/arch/powerpc/mm/tlb_nohash_low.S
index 788b87c36f77..45fed3698349 100644
--- a/arch/powerpc/mm/tlb_nohash_low.S
+++ b/arch/powerpc/mm/tlb_nohash_low.S
@@ -138,7 +138,11 @@ BEGIN_MMU_FTR_SECTION
138 andi. r3,r3,MMUCSR0_TLBFI@l 138 andi. r3,r3,MMUCSR0_TLBFI@l
139 bne 1b 139 bne 1b
140MMU_FTR_SECTION_ELSE 140MMU_FTR_SECTION_ELSE
141 PPC_TLBILX_ALL(0,0) 141 BEGIN_MMU_FTR_SECTION_NESTED(96)
142 PPC_TLBILX_ALL(0,r3)
143 MMU_FTR_SECTION_ELSE_NESTED(96)
144 PPC_TLBILX_ALL_EARLY(0,r3)
145 ALT_MMU_FTR_SECTION_END_NESTED_IFCLR(MMU_FTR_TLBILX_EARLY_OPCODE, 96)
142ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_USE_TLBILX) 146ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_USE_TLBILX)
143 msync 147 msync
144 isync 148 isync
@@ -151,7 +155,11 @@ BEGIN_MMU_FTR_SECTION
151 wrteei 0 155 wrteei 0
152 mfspr r4,SPRN_MAS6 /* save MAS6 */ 156 mfspr r4,SPRN_MAS6 /* save MAS6 */
153 mtspr SPRN_MAS6,r3 157 mtspr SPRN_MAS6,r3
158 BEGIN_MMU_FTR_SECTION_NESTED(96)
154 PPC_TLBILX_PID(0,0) 159 PPC_TLBILX_PID(0,0)
160 MMU_FTR_SECTION_ELSE_NESTED(96)
161 PPC_TLBILX_PID_EARLY(0,0)
162 ALT_MMU_FTR_SECTION_END_NESTED_IFCLR(MMU_FTR_TLBILX_EARLY_OPCODE, 96)
155 mtspr SPRN_MAS6,r4 /* restore MAS6 */ 163 mtspr SPRN_MAS6,r4 /* restore MAS6 */
156 wrtee r10 164 wrtee r10
157MMU_FTR_SECTION_ELSE 165MMU_FTR_SECTION_ELSE
@@ -185,7 +193,11 @@ BEGIN_MMU_FTR_SECTION
185 mtspr SPRN_MAS1,r4 193 mtspr SPRN_MAS1,r4
186 tlbwe 194 tlbwe
187MMU_FTR_SECTION_ELSE 195MMU_FTR_SECTION_ELSE
196 BEGIN_MMU_FTR_SECTION_NESTED(96)
188 PPC_TLBILX_VA(0,r3) 197 PPC_TLBILX_VA(0,r3)
198 MMU_FTR_SECTION_ELSE_NESTED(96)
199 PPC_TLBILX_VA_EARLY(0,r3)
200 ALT_MMU_FTR_SECTION_END_NESTED_IFCLR(MMU_FTR_TLBILX_EARLY_OPCODE, 96)
189ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_USE_TLBILX) 201ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_USE_TLBILX)
190 msync 202 msync
191 isync 203 isync
diff --git a/arch/powerpc/platforms/pseries/dtl.c b/arch/powerpc/platforms/pseries/dtl.c
index fafcaa0e81ef..ab69925d579b 100644
--- a/arch/powerpc/platforms/pseries/dtl.c
+++ b/arch/powerpc/platforms/pseries/dtl.c
@@ -25,6 +25,7 @@
25#include <asm/smp.h> 25#include <asm/smp.h>
26#include <asm/system.h> 26#include <asm/system.h>
27#include <asm/uaccess.h> 27#include <asm/uaccess.h>
28#include <asm/firmware.h>
28 29
29#include "plpar_wrappers.h" 30#include "plpar_wrappers.h"
30 31
diff --git a/arch/powerpc/platforms/pseries/eeh_driver.c b/arch/powerpc/platforms/pseries/eeh_driver.c
index 380420f8c400..9a2a6e32f00f 100644
--- a/arch/powerpc/platforms/pseries/eeh_driver.c
+++ b/arch/powerpc/platforms/pseries/eeh_driver.c
@@ -182,6 +182,8 @@ static void eeh_report_reset(struct pci_dev *dev, void *userdata)
182 if (!driver) 182 if (!driver)
183 return; 183 return;
184 184
185 dev->error_state = pci_channel_io_normal;
186
185 eeh_enable_irq(dev); 187 eeh_enable_irq(dev);
186 188
187 if (!driver->err_handler || 189 if (!driver->err_handler ||
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index dcb667c4375a..2eca5fe0e75b 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -82,6 +82,7 @@ config S390
82 select USE_GENERIC_SMP_HELPERS if SMP 82 select USE_GENERIC_SMP_HELPERS if SMP
83 select HAVE_SYSCALL_WRAPPERS 83 select HAVE_SYSCALL_WRAPPERS
84 select HAVE_FUNCTION_TRACER 84 select HAVE_FUNCTION_TRACER
85 select HAVE_DEFAULT_NO_SPIN_MUTEXES
85 select HAVE_OPROFILE 86 select HAVE_OPROFILE
86 select HAVE_KPROBES 87 select HAVE_KPROBES
87 select HAVE_KRETPROBES 88 select HAVE_KRETPROBES
diff --git a/arch/s390/appldata/appldata_base.c b/arch/s390/appldata/appldata_base.c
index 27b70d8a359c..aeb3cff95f63 100644
--- a/arch/s390/appldata/appldata_base.c
+++ b/arch/s390/appldata/appldata_base.c
@@ -176,7 +176,7 @@ static void __appldata_mod_vtimer_wrap(void *p) {
176 struct vtimer_list *timer; 176 struct vtimer_list *timer;
177 u64 expires; 177 u64 expires;
178 } *args = p; 178 } *args = p;
179 mod_virt_timer(args->timer, args->expires); 179 mod_virt_timer_periodic(args->timer, args->expires);
180} 180}
181 181
182#define APPLDATA_ADD_TIMER 0 182#define APPLDATA_ADD_TIMER 0
diff --git a/arch/s390/include/asm/cpuid.h b/arch/s390/include/asm/cpuid.h
new file mode 100644
index 000000000000..07836a2e5222
--- /dev/null
+++ b/arch/s390/include/asm/cpuid.h
@@ -0,0 +1,25 @@
1/*
2 * Copyright IBM Corp. 2000,2009
3 * Author(s): Hartmut Penner <hp@de.ibm.com>,
4 * Martin Schwidefsky <schwidefsky@de.ibm.com>
5 * Christian Ehrhardt <ehrhardt@de.ibm.com>
6 */
7
8#ifndef _ASM_S390_CPUID_H_
9#define _ASM_S390_CPUID_H_
10
11/*
12 * CPU type and hardware bug flags. Kept separately for each CPU.
13 * Members of this structure are referenced in head.S, so think twice
14 * before touching them. [mj]
15 */
16
17typedef struct
18{
19 unsigned int version : 8;
20 unsigned int ident : 24;
21 unsigned int machine : 16;
22 unsigned int unused : 16;
23} __attribute__ ((packed)) cpuid_t;
24
25#endif /* _ASM_S390_CPUID_H_ */
diff --git a/arch/s390/include/asm/kvm_host.h b/arch/s390/include/asm/kvm_host.h
index c6e674f5fca9..54ea39f96ecd 100644
--- a/arch/s390/include/asm/kvm_host.h
+++ b/arch/s390/include/asm/kvm_host.h
@@ -15,6 +15,7 @@
15#define ASM_KVM_HOST_H 15#define ASM_KVM_HOST_H
16#include <linux/kvm_host.h> 16#include <linux/kvm_host.h>
17#include <asm/debug.h> 17#include <asm/debug.h>
18#include <asm/cpuid.h>
18 19
19#define KVM_MAX_VCPUS 64 20#define KVM_MAX_VCPUS 64
20#define KVM_MEMORY_SLOTS 32 21#define KVM_MEMORY_SLOTS 32
diff --git a/arch/s390/include/asm/lowcore.h b/arch/s390/include/asm/lowcore.h
index b349f1c7fdfa..3aeca492b147 100644
--- a/arch/s390/include/asm/lowcore.h
+++ b/arch/s390/include/asm/lowcore.h
@@ -66,6 +66,7 @@
66#define __LC_USER_EXEC_ASCE 0x02ac 66#define __LC_USER_EXEC_ASCE 0x02ac
67#define __LC_CPUID 0x02b0 67#define __LC_CPUID 0x02b0
68#define __LC_INT_CLOCK 0x02c8 68#define __LC_INT_CLOCK 0x02c8
69#define __LC_MACHINE_FLAGS 0x02d8
69#define __LC_IRB 0x0300 70#define __LC_IRB 0x0300
70#define __LC_PFAULT_INTPARM 0x0080 71#define __LC_PFAULT_INTPARM 0x0080
71#define __LC_CPU_TIMER_SAVE_AREA 0x00d8 72#define __LC_CPU_TIMER_SAVE_AREA 0x00d8
@@ -110,6 +111,7 @@
110#define __LC_CPUID 0x0320 111#define __LC_CPUID 0x0320
111#define __LC_INT_CLOCK 0x0340 112#define __LC_INT_CLOCK 0x0340
112#define __LC_VDSO_PER_CPU 0x0350 113#define __LC_VDSO_PER_CPU 0x0350
114#define __LC_MACHINE_FLAGS 0x0358
113#define __LC_IRB 0x0380 115#define __LC_IRB 0x0380
114#define __LC_PASTE 0x03c0 116#define __LC_PASTE 0x03c0
115#define __LC_PFAULT_INTPARM 0x11b8 117#define __LC_PFAULT_INTPARM 0x11b8
@@ -127,9 +129,9 @@
127 129
128#ifndef __ASSEMBLY__ 130#ifndef __ASSEMBLY__
129 131
130#include <asm/processor.h> 132#include <asm/cpuid.h>
133#include <asm/ptrace.h>
131#include <linux/types.h> 134#include <linux/types.h>
132#include <asm/sigp.h>
133 135
134void restart_int_handler(void); 136void restart_int_handler(void);
135void ext_int_handler(void); 137void ext_int_handler(void);
@@ -277,7 +279,8 @@ struct _lowcore
277 __u32 ext_call_fast; /* 0x02c4 */ 279 __u32 ext_call_fast; /* 0x02c4 */
278 __u64 int_clock; /* 0x02c8 */ 280 __u64 int_clock; /* 0x02c8 */
279 __u64 clock_comparator; /* 0x02d0 */ 281 __u64 clock_comparator; /* 0x02d0 */
280 __u8 pad_0x02d8[0x0300-0x02d8]; /* 0x02d8 */ 282 __u32 machine_flags; /* 0x02d8 */
283 __u8 pad_0x02dc[0x0300-0x02dc]; /* 0x02dc */
281 284
282 /* Interrupt response block */ 285 /* Interrupt response block */
283 __u8 irb[64]; /* 0x0300 */ 286 __u8 irb[64]; /* 0x0300 */
@@ -381,7 +384,8 @@ struct _lowcore
381 __u64 int_clock; /* 0x0340 */ 384 __u64 int_clock; /* 0x0340 */
382 __u64 clock_comparator; /* 0x0348 */ 385 __u64 clock_comparator; /* 0x0348 */
383 __u64 vdso_per_cpu_data; /* 0x0350 */ 386 __u64 vdso_per_cpu_data; /* 0x0350 */
384 __u8 pad_0x0358[0x0380-0x0358]; /* 0x0358 */ 387 __u64 machine_flags; /* 0x0358 */
388 __u8 pad_0x0360[0x0380-0x0360]; /* 0x0360 */
385 389
386 /* Interrupt response block. */ 390 /* Interrupt response block. */
387 __u8 irb[64]; /* 0x0380 */ 391 __u8 irb[64]; /* 0x0380 */
diff --git a/arch/s390/include/asm/processor.h b/arch/s390/include/asm/processor.h
index 61862b3ac794..c139fa7b8e89 100644
--- a/arch/s390/include/asm/processor.h
+++ b/arch/s390/include/asm/processor.h
@@ -14,7 +14,10 @@
14#define __ASM_S390_PROCESSOR_H 14#define __ASM_S390_PROCESSOR_H
15 15
16#include <linux/linkage.h> 16#include <linux/linkage.h>
17#include <asm/cpuid.h>
18#include <asm/page.h>
17#include <asm/ptrace.h> 19#include <asm/ptrace.h>
20#include <asm/setup.h>
18 21
19#ifdef __KERNEL__ 22#ifdef __KERNEL__
20/* 23/*
@@ -23,20 +26,6 @@
23 */ 26 */
24#define current_text_addr() ({ void *pc; asm("basr %0,0" : "=a" (pc)); pc; }) 27#define current_text_addr() ({ void *pc; asm("basr %0,0" : "=a" (pc)); pc; })
25 28
26/*
27 * CPU type and hardware bug flags. Kept separately for each CPU.
28 * Members of this structure are referenced in head.S, so think twice
29 * before touching them. [mj]
30 */
31
32typedef struct
33{
34 unsigned int version : 8;
35 unsigned int ident : 24;
36 unsigned int machine : 16;
37 unsigned int unused : 16;
38} __attribute__ ((packed)) cpuid_t;
39
40static inline void get_cpu_id(cpuid_t *ptr) 29static inline void get_cpu_id(cpuid_t *ptr)
41{ 30{
42 asm volatile("stidp 0(%1)" : "=m" (*ptr) : "a" (ptr)); 31 asm volatile("stidp 0(%1)" : "=m" (*ptr) : "a" (ptr));
diff --git a/arch/s390/include/asm/ptrace.h b/arch/s390/include/asm/ptrace.h
index f1b051630c50..539263fc9ab9 100644
--- a/arch/s390/include/asm/ptrace.h
+++ b/arch/s390/include/asm/ptrace.h
@@ -313,8 +313,6 @@ typedef struct
313 313
314 314
315#ifdef __KERNEL__ 315#ifdef __KERNEL__
316#include <asm/setup.h>
317#include <asm/page.h>
318 316
319/* 317/*
320 * The pt_regs struct defines the way the registers are stored on 318 * The pt_regs struct defines the way the registers are stored on
diff --git a/arch/s390/include/asm/setup.h b/arch/s390/include/asm/setup.h
index e8bd6ac22c99..38b0fc221ed7 100644
--- a/arch/s390/include/asm/setup.h
+++ b/arch/s390/include/asm/setup.h
@@ -14,6 +14,7 @@
14 14
15#ifdef __KERNEL__ 15#ifdef __KERNEL__
16 16
17#include <asm/lowcore.h>
17#include <asm/types.h> 18#include <asm/types.h>
18 19
19#define PARMAREA 0x10400 20#define PARMAREA 0x10400
@@ -63,7 +64,6 @@ extern unsigned int s390_noexec;
63/* 64/*
64 * Machine features detected in head.S 65 * Machine features detected in head.S
65 */ 66 */
66extern unsigned long machine_flags;
67 67
68#define MACHINE_FLAG_VM (1UL << 0) 68#define MACHINE_FLAG_VM (1UL << 0)
69#define MACHINE_FLAG_IEEE (1UL << 1) 69#define MACHINE_FLAG_IEEE (1UL << 1)
@@ -77,28 +77,28 @@ extern unsigned long machine_flags;
77#define MACHINE_FLAG_HPAGE (1UL << 10) 77#define MACHINE_FLAG_HPAGE (1UL << 10)
78#define MACHINE_FLAG_PFMF (1UL << 11) 78#define MACHINE_FLAG_PFMF (1UL << 11)
79 79
80#define MACHINE_IS_VM (machine_flags & MACHINE_FLAG_VM) 80#define MACHINE_IS_VM (S390_lowcore.machine_flags & MACHINE_FLAG_VM)
81#define MACHINE_IS_KVM (machine_flags & MACHINE_FLAG_KVM) 81#define MACHINE_IS_KVM (S390_lowcore.machine_flags & MACHINE_FLAG_KVM)
82#define MACHINE_HAS_DIAG9C (machine_flags & MACHINE_FLAG_DIAG9C) 82#define MACHINE_HAS_DIAG9C (S390_lowcore.machine_flags & MACHINE_FLAG_DIAG9C)
83 83
84#ifndef __s390x__ 84#ifndef __s390x__
85#define MACHINE_HAS_IEEE (machine_flags & MACHINE_FLAG_IEEE) 85#define MACHINE_HAS_IEEE (S390_lowcore.machine_flags & MACHINE_FLAG_IEEE)
86#define MACHINE_HAS_CSP (machine_flags & MACHINE_FLAG_CSP) 86#define MACHINE_HAS_CSP (S390_lowcore.machine_flags & MACHINE_FLAG_CSP)
87#define MACHINE_HAS_IDTE (0) 87#define MACHINE_HAS_IDTE (0)
88#define MACHINE_HAS_DIAG44 (1) 88#define MACHINE_HAS_DIAG44 (1)
89#define MACHINE_HAS_MVPG (machine_flags & MACHINE_FLAG_MVPG) 89#define MACHINE_HAS_MVPG (S390_lowcore.machine_flags & MACHINE_FLAG_MVPG)
90#define MACHINE_HAS_MVCOS (0) 90#define MACHINE_HAS_MVCOS (0)
91#define MACHINE_HAS_HPAGE (0) 91#define MACHINE_HAS_HPAGE (0)
92#define MACHINE_HAS_PFMF (0) 92#define MACHINE_HAS_PFMF (0)
93#else /* __s390x__ */ 93#else /* __s390x__ */
94#define MACHINE_HAS_IEEE (1) 94#define MACHINE_HAS_IEEE (1)
95#define MACHINE_HAS_CSP (1) 95#define MACHINE_HAS_CSP (1)
96#define MACHINE_HAS_IDTE (machine_flags & MACHINE_FLAG_IDTE) 96#define MACHINE_HAS_IDTE (S390_lowcore.machine_flags & MACHINE_FLAG_IDTE)
97#define MACHINE_HAS_DIAG44 (machine_flags & MACHINE_FLAG_DIAG44) 97#define MACHINE_HAS_DIAG44 (S390_lowcore.machine_flags & MACHINE_FLAG_DIAG44)
98#define MACHINE_HAS_MVPG (1) 98#define MACHINE_HAS_MVPG (1)
99#define MACHINE_HAS_MVCOS (machine_flags & MACHINE_FLAG_MVCOS) 99#define MACHINE_HAS_MVCOS (S390_lowcore.machine_flags & MACHINE_FLAG_MVCOS)
100#define MACHINE_HAS_HPAGE (machine_flags & MACHINE_FLAG_HPAGE) 100#define MACHINE_HAS_HPAGE (S390_lowcore.machine_flags & MACHINE_FLAG_HPAGE)
101#define MACHINE_HAS_PFMF (machine_flags & MACHINE_FLAG_PFMF) 101#define MACHINE_HAS_PFMF (S390_lowcore.machine_flags & MACHINE_FLAG_PFMF)
102#endif /* __s390x__ */ 102#endif /* __s390x__ */
103 103
104#define ZFCPDUMP_HSA_SIZE (32UL<<20) 104#define ZFCPDUMP_HSA_SIZE (32UL<<20)
diff --git a/arch/s390/include/asm/thread_info.h b/arch/s390/include/asm/thread_info.h
index c544aa524535..461f2abd2e6f 100644
--- a/arch/s390/include/asm/thread_info.h
+++ b/arch/s390/include/asm/thread_info.h
@@ -31,8 +31,9 @@
31#define ASYNC_SIZE (PAGE_SIZE << ASYNC_ORDER) 31#define ASYNC_SIZE (PAGE_SIZE << ASYNC_ORDER)
32 32
33#ifndef __ASSEMBLY__ 33#ifndef __ASSEMBLY__
34#include <asm/processor.h>
35#include <asm/lowcore.h> 34#include <asm/lowcore.h>
35#include <asm/page.h>
36#include <asm/processor.h>
36 37
37/* 38/*
38 * low level task data that entry.S needs immediate access to 39 * low level task data that entry.S needs immediate access to
diff --git a/arch/s390/include/asm/timer.h b/arch/s390/include/asm/timer.h
index e4bcab739c19..814243cafdfe 100644
--- a/arch/s390/include/asm/timer.h
+++ b/arch/s390/include/asm/timer.h
@@ -41,6 +41,7 @@ extern void init_virt_timer(struct vtimer_list *timer);
41extern void add_virt_timer(void *new); 41extern void add_virt_timer(void *new);
42extern void add_virt_timer_periodic(void *new); 42extern void add_virt_timer_periodic(void *new);
43extern int mod_virt_timer(struct vtimer_list *timer, __u64 expires); 43extern int mod_virt_timer(struct vtimer_list *timer, __u64 expires);
44extern int mod_virt_timer_periodic(struct vtimer_list *timer, __u64 expires);
44extern int del_virt_timer(struct vtimer_list *timer); 45extern int del_virt_timer(struct vtimer_list *timer);
45 46
46extern void init_cpu_vtimer(void); 47extern void init_cpu_vtimer(void);
diff --git a/arch/s390/include/asm/timex.h b/arch/s390/include/asm/timex.h
index d744c3d62de5..cc21e3e20fd7 100644
--- a/arch/s390/include/asm/timex.h
+++ b/arch/s390/include/asm/timex.h
@@ -11,6 +11,9 @@
11#ifndef _ASM_S390_TIMEX_H 11#ifndef _ASM_S390_TIMEX_H
12#define _ASM_S390_TIMEX_H 12#define _ASM_S390_TIMEX_H
13 13
14/* The value of the TOD clock for 1.1.1970. */
15#define TOD_UNIX_EPOCH 0x7d91048bca000000ULL
16
14/* Inline functions for clock register access. */ 17/* Inline functions for clock register access. */
15static inline int set_clock(__u64 time) 18static inline int set_clock(__u64 time)
16{ 19{
@@ -85,4 +88,6 @@ int get_sync_clock(unsigned long long *clock);
85void init_cpu_timer(void); 88void init_cpu_timer(void);
86unsigned long long monotonic_clock(void); 89unsigned long long monotonic_clock(void);
87 90
91extern u64 sched_clock_base_cc;
92
88#endif 93#endif
diff --git a/arch/s390/include/asm/unistd.h b/arch/s390/include/asm/unistd.h
index c8ad350d1444..f0f19e6ace6c 100644
--- a/arch/s390/include/asm/unistd.h
+++ b/arch/s390/include/asm/unistd.h
@@ -265,7 +265,9 @@
265#define __NR_pipe2 325 265#define __NR_pipe2 325
266#define __NR_dup3 326 266#define __NR_dup3 326
267#define __NR_epoll_create1 327 267#define __NR_epoll_create1 327
268#define NR_syscalls 328 268#define __NR_preadv 328
269#define __NR_pwritev 329
270#define NR_syscalls 330
269 271
270/* 272/*
271 * There are some system calls that are not present on 64 bit, some 273 * There are some system calls that are not present on 64 bit, some
diff --git a/arch/s390/kernel/asm-offsets.c b/arch/s390/kernel/asm-offsets.c
index 67a60016babb..fa9905ce7d0b 100644
--- a/arch/s390/kernel/asm-offsets.c
+++ b/arch/s390/kernel/asm-offsets.c
@@ -27,6 +27,8 @@ int main(void)
27 DEFINE(__TI_flags, offsetof(struct thread_info, flags)); 27 DEFINE(__TI_flags, offsetof(struct thread_info, flags));
28 DEFINE(__TI_cpu, offsetof(struct thread_info, cpu)); 28 DEFINE(__TI_cpu, offsetof(struct thread_info, cpu));
29 DEFINE(__TI_precount, offsetof(struct thread_info, preempt_count)); 29 DEFINE(__TI_precount, offsetof(struct thread_info, preempt_count));
30 DEFINE(__TI_user_timer, offsetof(struct thread_info, user_timer));
31 DEFINE(__TI_system_timer, offsetof(struct thread_info, system_timer));
30 BLANK(); 32 BLANK();
31 DEFINE(__PT_ARGS, offsetof(struct pt_regs, args)); 33 DEFINE(__PT_ARGS, offsetof(struct pt_regs, args));
32 DEFINE(__PT_PSW, offsetof(struct pt_regs, psw)); 34 DEFINE(__PT_PSW, offsetof(struct pt_regs, psw));
diff --git a/arch/s390/kernel/compat_wrapper.S b/arch/s390/kernel/compat_wrapper.S
index 87cf5a79a351..fb38af6316bb 100644
--- a/arch/s390/kernel/compat_wrapper.S
+++ b/arch/s390/kernel/compat_wrapper.S
@@ -1805,3 +1805,21 @@ compat_sys_keyctl_wrapper:
1805 llgfr %r5,%r5 # u32 1805 llgfr %r5,%r5 # u32
1806 llgfr %r6,%r6 # u32 1806 llgfr %r6,%r6 # u32
1807 jg compat_sys_keyctl # branch to system call 1807 jg compat_sys_keyctl # branch to system call
1808
1809 .globl compat_sys_preadv_wrapper
1810compat_sys_preadv_wrapper:
1811 llgfr %r2,%r2 # unsigned long
1812 llgtr %r3,%r3 # compat_iovec *
1813 llgfr %r4,%r4 # unsigned long
1814 llgfr %r5,%r5 # u32
1815 llgfr %r6,%r6 # u32
1816 jg compat_sys_preadv # branch to system call
1817
1818 .globl compat_sys_pwritev_wrapper
1819compat_sys_pwritev_wrapper:
1820 llgfr %r2,%r2 # unsigned long
1821 llgtr %r3,%r3 # compat_iovec *
1822 llgfr %r4,%r4 # unsigned long
1823 llgfr %r5,%r5 # u32
1824 llgfr %r6,%r6 # u32
1825 jg compat_sys_pwritev # branch to system call
diff --git a/arch/s390/kernel/early.c b/arch/s390/kernel/early.c
index 4d221c81c849..cf09948faad6 100644
--- a/arch/s390/kernel/early.c
+++ b/arch/s390/kernel/early.c
@@ -34,8 +34,25 @@
34 34
35char kernel_nss_name[NSS_NAME_SIZE + 1]; 35char kernel_nss_name[NSS_NAME_SIZE + 1];
36 36
37static unsigned long machine_flags;
38
37static void __init setup_boot_command_line(void); 39static void __init setup_boot_command_line(void);
38 40
41/*
42 * Get the TOD clock running.
43 */
44static void __init reset_tod_clock(void)
45{
46 u64 time;
47
48 if (store_clock(&time) == 0)
49 return;
50 /* TOD clock not running. Set the clock to Unix Epoch. */
51 if (set_clock(TOD_UNIX_EPOCH) != 0 || store_clock(&time) != 0)
52 disabled_wait(0);
53
54 sched_clock_base_cc = TOD_UNIX_EPOCH;
55}
39 56
40#ifdef CONFIG_SHARED_KERNEL 57#ifdef CONFIG_SHARED_KERNEL
41int __init savesys_ipl_nss(char *cmd, const int cmdlen); 58int __init savesys_ipl_nss(char *cmd, const int cmdlen);
@@ -370,6 +387,7 @@ static void __init setup_boot_command_line(void)
370 */ 387 */
371void __init startup_init(void) 388void __init startup_init(void)
372{ 389{
390 reset_tod_clock();
373 ipl_save_parameters(); 391 ipl_save_parameters();
374 rescue_initrd(); 392 rescue_initrd();
375 clear_bss_section(); 393 clear_bss_section();
@@ -391,5 +409,6 @@ void __init startup_init(void)
391 setup_hpage(); 409 setup_hpage();
392 sclp_facilities_detect(); 410 sclp_facilities_detect();
393 detect_memory_layout(memory_chunk); 411 detect_memory_layout(memory_chunk);
412 S390_lowcore.machine_flags = machine_flags;
394 lockdep_on(); 413 lockdep_on();
395} 414}
diff --git a/arch/s390/kernel/entry.S b/arch/s390/kernel/entry.S
index 1268aa2991bf..f3e275934213 100644
--- a/arch/s390/kernel/entry.S
+++ b/arch/s390/kernel/entry.S
@@ -837,16 +837,29 @@ mcck_return:
837 __CPUINIT 837 __CPUINIT
838 .globl restart_int_handler 838 .globl restart_int_handler
839restart_int_handler: 839restart_int_handler:
840 basr %r1,0
841restart_base:
842 spt restart_vtime-restart_base(%r1)
843 stck __LC_LAST_UPDATE_CLOCK
844 mvc __LC_LAST_UPDATE_TIMER(8),restart_vtime-restart_base(%r1)
845 mvc __LC_EXIT_TIMER(8),restart_vtime-restart_base(%r1)
840 l %r15,__LC_SAVE_AREA+60 # load ksp 846 l %r15,__LC_SAVE_AREA+60 # load ksp
841 lctl %c0,%c15,__LC_CREGS_SAVE_AREA # get new ctl regs 847 lctl %c0,%c15,__LC_CREGS_SAVE_AREA # get new ctl regs
842 lam %a0,%a15,__LC_AREGS_SAVE_AREA 848 lam %a0,%a15,__LC_AREGS_SAVE_AREA
843 lm %r6,%r15,__SF_GPRS(%r15) # load registers from clone 849 lm %r6,%r15,__SF_GPRS(%r15) # load registers from clone
850 l %r1,__LC_THREAD_INFO
851 mvc __LC_USER_TIMER(8),__TI_user_timer(%r1)
852 mvc __LC_SYSTEM_TIMER(8),__TI_system_timer(%r1)
853 xc __LC_STEAL_TIMER(8),__LC_STEAL_TIMER
844 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on 854 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on
845 basr %r14,0 855 basr %r14,0
846 l %r14,restart_addr-.(%r14) 856 l %r14,restart_addr-.(%r14)
847 br %r14 # branch to start_secondary 857 br %r14 # branch to start_secondary
848restart_addr: 858restart_addr:
849 .long start_secondary 859 .long start_secondary
860 .align 8
861restart_vtime:
862 .long 0x7fffffff,0xffffffff
850 .previous 863 .previous
851#else 864#else
852/* 865/*
diff --git a/arch/s390/kernel/entry64.S b/arch/s390/kernel/entry64.S
index c6fbde13971a..84a105838e03 100644
--- a/arch/s390/kernel/entry64.S
+++ b/arch/s390/kernel/entry64.S
@@ -831,14 +831,27 @@ mcck_return:
831 __CPUINIT 831 __CPUINIT
832 .globl restart_int_handler 832 .globl restart_int_handler
833restart_int_handler: 833restart_int_handler:
834 basr %r1,0
835restart_base:
836 spt restart_vtime-restart_base(%r1)
837 stck __LC_LAST_UPDATE_CLOCK
838 mvc __LC_LAST_UPDATE_TIMER(8),restart_vtime-restart_base(%r1)
839 mvc __LC_EXIT_TIMER(8),restart_vtime-restart_base(%r1)
834 lg %r15,__LC_SAVE_AREA+120 # load ksp 840 lg %r15,__LC_SAVE_AREA+120 # load ksp
835 lghi %r10,__LC_CREGS_SAVE_AREA 841 lghi %r10,__LC_CREGS_SAVE_AREA
836 lctlg %c0,%c15,0(%r10) # get new ctl regs 842 lctlg %c0,%c15,0(%r10) # get new ctl regs
837 lghi %r10,__LC_AREGS_SAVE_AREA 843 lghi %r10,__LC_AREGS_SAVE_AREA
838 lam %a0,%a15,0(%r10) 844 lam %a0,%a15,0(%r10)
839 lmg %r6,%r15,__SF_GPRS(%r15) # load registers from clone 845 lmg %r6,%r15,__SF_GPRS(%r15) # load registers from clone
846 lg %r1,__LC_THREAD_INFO
847 mvc __LC_USER_TIMER(8),__TI_user_timer(%r1)
848 mvc __LC_SYSTEM_TIMER(8),__TI_system_timer(%r1)
849 xc __LC_STEAL_TIMER(8),__LC_STEAL_TIMER
840 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on 850 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on
841 jg start_secondary 851 jg start_secondary
852 .align 8
853restart_vtime:
854 .long 0x7fffffff,0xffffffff
842 .previous 855 .previous
843#else 856#else
844/* 857/*
diff --git a/arch/s390/kernel/head.S b/arch/s390/kernel/head.S
index 1046c2c9f8d1..bba14494ee00 100644
--- a/arch/s390/kernel/head.S
+++ b/arch/s390/kernel/head.S
@@ -471,7 +471,12 @@ startup:basr %r13,0 # get base
471.LPG0: 471.LPG0:
472 xc 0x200(256),0x200 # partially clear lowcore 472 xc 0x200(256),0x200 # partially clear lowcore
473 xc 0x300(256),0x300 473 xc 0x300(256),0x300
474 474 l %r1,5f-.LPG0(%r13)
475 stck 0(%r1)
476 spt 6f-.LPG0(%r13)
477 mvc __LC_LAST_UPDATE_CLOCK(8),0(%r1)
478 mvc __LC_LAST_UPDATE_TIMER(8),6f-.LPG0(%r13)
479 mvc __LC_EXIT_TIMER(8),5f-.LPG0(%r13)
475#ifndef CONFIG_MARCH_G5 480#ifndef CONFIG_MARCH_G5
476 # check processor version against MARCH_{G5,Z900,Z990,Z9_109,Z10} 481 # check processor version against MARCH_{G5,Z900,Z990,Z9_109,Z10}
477 stidp __LC_CPUID # store cpuid 482 stidp __LC_CPUID # store cpuid
@@ -496,9 +501,13 @@ startup:basr %r13,0 # get base
496 brct %r0,0b 501 brct %r0,0b
497#endif 502#endif
498 503
499 l %r13,0f-.LPG0(%r13) 504 l %r13,4f-.LPG0(%r13)
500 b 0(%r13) 505 b 0(%r13)
5010: .long startup_continue 506 .align 4
5074: .long startup_continue
5085: .long sched_clock_base_cc
509 .align 8
5106: .long 0x7fffffff,0xffffffff
502 511
503# 512#
504# params at 10400 (setup.h) 513# params at 10400 (setup.h)
diff --git a/arch/s390/kernel/nmi.c b/arch/s390/kernel/nmi.c
index 4bfdc421d7e9..28cf196ba775 100644
--- a/arch/s390/kernel/nmi.c
+++ b/arch/s390/kernel/nmi.c
@@ -10,6 +10,7 @@
10 10
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/errno.h> 12#include <linux/errno.h>
13#include <linux/hardirq.h>
13#include <linux/time.h> 14#include <linux/time.h>
14#include <linux/module.h> 15#include <linux/module.h>
15#include <asm/lowcore.h> 16#include <asm/lowcore.h>
@@ -253,7 +254,7 @@ void notrace s390_do_machine_check(struct pt_regs *regs)
253 struct mci *mci; 254 struct mci *mci;
254 int umode; 255 int umode;
255 256
256 lockdep_off(); 257 nmi_enter();
257 s390_idle_check(); 258 s390_idle_check();
258 259
259 mci = (struct mci *) &S390_lowcore.mcck_interruption_code; 260 mci = (struct mci *) &S390_lowcore.mcck_interruption_code;
@@ -363,7 +364,7 @@ void notrace s390_do_machine_check(struct pt_regs *regs)
363 mcck->warning = 1; 364 mcck->warning = 1;
364 set_thread_flag(TIF_MCCK_PENDING); 365 set_thread_flag(TIF_MCCK_PENDING);
365 } 366 }
366 lockdep_on(); 367 nmi_exit();
367} 368}
368 369
369static int __init machine_check_init(void) 370static int __init machine_check_init(void)
diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c
index 06201b93cbbf..7402b6a39ead 100644
--- a/arch/s390/kernel/setup.c
+++ b/arch/s390/kernel/setup.c
@@ -82,9 +82,6 @@ EXPORT_SYMBOL(console_devno);
82unsigned int console_irq = -1; 82unsigned int console_irq = -1;
83EXPORT_SYMBOL(console_irq); 83EXPORT_SYMBOL(console_irq);
84 84
85unsigned long machine_flags;
86EXPORT_SYMBOL(machine_flags);
87
88unsigned long elf_hwcap = 0; 85unsigned long elf_hwcap = 0;
89char elf_platform[ELF_PLATFORM_SIZE]; 86char elf_platform[ELF_PLATFORM_SIZE];
90 87
@@ -426,6 +423,7 @@ setup_lowcore(void)
426 __alloc_bootmem(PAGE_SIZE, PAGE_SIZE, 0) + PAGE_SIZE; 423 __alloc_bootmem(PAGE_SIZE, PAGE_SIZE, 0) + PAGE_SIZE;
427 lc->current_task = (unsigned long) init_thread_union.thread_info.task; 424 lc->current_task = (unsigned long) init_thread_union.thread_info.task;
428 lc->thread_info = (unsigned long) &init_thread_union; 425 lc->thread_info = (unsigned long) &init_thread_union;
426 lc->machine_flags = S390_lowcore.machine_flags;
429#ifndef CONFIG_64BIT 427#ifndef CONFIG_64BIT
430 if (MACHINE_HAS_IEEE) { 428 if (MACHINE_HAS_IEEE) {
431 lc->extended_save_area_addr = (__u32) 429 lc->extended_save_area_addr = (__u32)
@@ -436,6 +434,14 @@ setup_lowcore(void)
436#else 434#else
437 lc->vdso_per_cpu_data = (unsigned long) &lc->paste[0]; 435 lc->vdso_per_cpu_data = (unsigned long) &lc->paste[0];
438#endif 436#endif
437 lc->sync_enter_timer = S390_lowcore.sync_enter_timer;
438 lc->async_enter_timer = S390_lowcore.async_enter_timer;
439 lc->exit_timer = S390_lowcore.exit_timer;
440 lc->user_timer = S390_lowcore.user_timer;
441 lc->system_timer = S390_lowcore.system_timer;
442 lc->steal_timer = S390_lowcore.steal_timer;
443 lc->last_update_timer = S390_lowcore.last_update_timer;
444 lc->last_update_clock = S390_lowcore.last_update_clock;
439 set_prefix((u32)(unsigned long) lc); 445 set_prefix((u32)(unsigned long) lc);
440 lowcore_ptr[0] = lc; 446 lowcore_ptr[0] = lc;
441} 447}
diff --git a/arch/s390/kernel/smp.c b/arch/s390/kernel/smp.c
index 006ed5016eb4..a985a3ba4401 100644
--- a/arch/s390/kernel/smp.c
+++ b/arch/s390/kernel/smp.c
@@ -571,6 +571,7 @@ int __cpuinit __cpu_up(unsigned int cpu)
571 cpu_lowcore->current_task = (unsigned long) idle; 571 cpu_lowcore->current_task = (unsigned long) idle;
572 cpu_lowcore->cpu_nr = cpu; 572 cpu_lowcore->cpu_nr = cpu;
573 cpu_lowcore->kernel_asce = S390_lowcore.kernel_asce; 573 cpu_lowcore->kernel_asce = S390_lowcore.kernel_asce;
574 cpu_lowcore->machine_flags = S390_lowcore.machine_flags;
574 eieio(); 575 eieio();
575 576
576 while (signal_processor(cpu, sigp_restart) == sigp_busy) 577 while (signal_processor(cpu, sigp_restart) == sigp_busy)
@@ -590,7 +591,8 @@ static int __init setup_possible_cpus(char *s)
590 int pcpus, cpu; 591 int pcpus, cpu;
591 592
592 pcpus = simple_strtoul(s, NULL, 0); 593 pcpus = simple_strtoul(s, NULL, 0);
593 for (cpu = 0; cpu < pcpus && cpu < nr_cpu_ids; cpu++) 594 init_cpu_possible(cpumask_of(0));
595 for (cpu = 1; cpu < pcpus && cpu < nr_cpu_ids; cpu++)
594 set_cpu_possible(cpu, true); 596 set_cpu_possible(cpu, true);
595 return 0; 597 return 0;
596} 598}
diff --git a/arch/s390/kernel/syscalls.S b/arch/s390/kernel/syscalls.S
index fe5b25a988ab..2c7739fe70b1 100644
--- a/arch/s390/kernel/syscalls.S
+++ b/arch/s390/kernel/syscalls.S
@@ -336,3 +336,5 @@ SYSCALL(sys_inotify_init1,sys_inotify_init1,sys_inotify_init1_wrapper)
336SYSCALL(sys_pipe2,sys_pipe2,sys_pipe2_wrapper) /* 325 */ 336SYSCALL(sys_pipe2,sys_pipe2,sys_pipe2_wrapper) /* 325 */
337SYSCALL(sys_dup3,sys_dup3,sys_dup3_wrapper) 337SYSCALL(sys_dup3,sys_dup3,sys_dup3_wrapper)
338SYSCALL(sys_epoll_create1,sys_epoll_create1,sys_epoll_create1_wrapper) 338SYSCALL(sys_epoll_create1,sys_epoll_create1,sys_epoll_create1_wrapper)
339SYSCALL(sys_preadv,sys_preadv,compat_sys_preadv_wrapper)
340SYSCALL(sys_pwritev,sys_pwritev,compat_sys_pwritev_wrapper)
diff --git a/arch/s390/kernel/time.c b/arch/s390/kernel/time.c
index f72d41068dc2..6ded50dfa75a 100644
--- a/arch/s390/kernel/time.c
+++ b/arch/s390/kernel/time.c
@@ -52,9 +52,6 @@
52#define USECS_PER_JIFFY ((unsigned long) 1000000/HZ) 52#define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
53#define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12) 53#define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
54 54
55/* The value of the TOD clock for 1.1.1970. */
56#define TOD_UNIX_EPOCH 0x7d91048bca000000ULL
57
58/* 55/*
59 * Create a small time difference between the timer interrupts 56 * Create a small time difference between the timer interrupts
60 * on the different cpus to avoid lock contention. 57 * on the different cpus to avoid lock contention.
@@ -63,9 +60,10 @@
63 60
64#define TICK_SIZE tick 61#define TICK_SIZE tick
65 62
63u64 sched_clock_base_cc = -1; /* Force to data section. */
64
66static ext_int_info_t ext_int_info_cc; 65static ext_int_info_t ext_int_info_cc;
67static ext_int_info_t ext_int_etr_cc; 66static ext_int_info_t ext_int_etr_cc;
68static u64 sched_clock_base_cc;
69 67
70static DEFINE_PER_CPU(struct clock_event_device, comparators); 68static DEFINE_PER_CPU(struct clock_event_device, comparators);
71 69
@@ -195,22 +193,12 @@ static void timing_alert_interrupt(__u16 code)
195static void etr_reset(void); 193static void etr_reset(void);
196static void stp_reset(void); 194static void stp_reset(void);
197 195
198/* 196unsigned long read_persistent_clock(void)
199 * Get the TOD clock running.
200 */
201static u64 __init reset_tod_clock(void)
202{ 197{
203 u64 time; 198 struct timespec ts;
204
205 etr_reset();
206 stp_reset();
207 if (store_clock(&time) == 0)
208 return time;
209 /* TOD clock not running. Set the clock to Unix Epoch. */
210 if (set_clock(TOD_UNIX_EPOCH) != 0 || store_clock(&time) != 0)
211 panic("TOD clock not operational.");
212 199
213 return TOD_UNIX_EPOCH; 200 tod_to_timeval(get_clock() - TOD_UNIX_EPOCH, &ts);
201 return ts.tv_sec;
214} 202}
215 203
216static cycle_t read_tod_clock(void) 204static cycle_t read_tod_clock(void)
@@ -265,12 +253,13 @@ void update_vsyscall_tz(void)
265 */ 253 */
266void __init time_init(void) 254void __init time_init(void)
267{ 255{
268 sched_clock_base_cc = reset_tod_clock(); 256 struct timespec ts;
257 unsigned long flags;
258 cycle_t now;
269 259
270 /* set xtime */ 260 /* Reset time synchronization interfaces. */
271 tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, &xtime); 261 etr_reset();
272 set_normalized_timespec(&wall_to_monotonic, 262 stp_reset();
273 -xtime.tv_sec, -xtime.tv_nsec);
274 263
275 /* request the clock comparator external interrupt */ 264 /* request the clock comparator external interrupt */
276 if (register_early_external_interrupt(0x1004, 265 if (register_early_external_interrupt(0x1004,
@@ -278,17 +267,38 @@ void __init time_init(void)
278 &ext_int_info_cc) != 0) 267 &ext_int_info_cc) != 0)
279 panic("Couldn't request external interrupt 0x1004"); 268 panic("Couldn't request external interrupt 0x1004");
280 269
281 if (clocksource_register(&clocksource_tod) != 0)
282 panic("Could not register TOD clock source");
283
284 /* request the timing alert external interrupt */ 270 /* request the timing alert external interrupt */
285 if (register_early_external_interrupt(0x1406, 271 if (register_early_external_interrupt(0x1406,
286 timing_alert_interrupt, 272 timing_alert_interrupt,
287 &ext_int_etr_cc) != 0) 273 &ext_int_etr_cc) != 0)
288 panic("Couldn't request external interrupt 0x1406"); 274 panic("Couldn't request external interrupt 0x1406");
289 275
276 if (clocksource_register(&clocksource_tod) != 0)
277 panic("Could not register TOD clock source");
278
279 /*
280 * The TOD clock is an accurate clock. The xtime should be
281 * initialized in a way that the difference between TOD and
282 * xtime is reasonably small. Too bad that timekeeping_init
283 * sets xtime.tv_nsec to zero. In addition the clock source
284 * change from the jiffies clock source to the TOD clock
285 * source add another error of up to 1/HZ second. The same
286 * function sets wall_to_monotonic to a value that is too
287 * small for /proc/uptime to be accurate.
288 * Reset xtime and wall_to_monotonic to sane values.
289 */
290 write_seqlock_irqsave(&xtime_lock, flags);
291 now = get_clock();
292 tod_to_timeval(now - TOD_UNIX_EPOCH, &xtime);
293 clocksource_tod.cycle_last = now;
294 clocksource_tod.raw_time = xtime;
295 tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, &ts);
296 set_normalized_timespec(&wall_to_monotonic, -ts.tv_sec, -ts.tv_nsec);
297 write_sequnlock_irqrestore(&xtime_lock, flags);
298
290 /* Enable TOD clock interrupts on the boot cpu. */ 299 /* Enable TOD clock interrupts on the boot cpu. */
291 init_cpu_timer(); 300 init_cpu_timer();
301
292 /* Enable cpu timer interrupts on the boot cpu. */ 302 /* Enable cpu timer interrupts on the boot cpu. */
293 vtime_init(); 303 vtime_init();
294} 304}
@@ -1423,6 +1433,7 @@ static void *stp_page;
1423static void stp_work_fn(struct work_struct *work); 1433static void stp_work_fn(struct work_struct *work);
1424static DEFINE_MUTEX(stp_work_mutex); 1434static DEFINE_MUTEX(stp_work_mutex);
1425static DECLARE_WORK(stp_work, stp_work_fn); 1435static DECLARE_WORK(stp_work, stp_work_fn);
1436static struct timer_list stp_timer;
1426 1437
1427static int __init early_parse_stp(char *p) 1438static int __init early_parse_stp(char *p)
1428{ 1439{
@@ -1454,10 +1465,16 @@ static void __init stp_reset(void)
1454 } 1465 }
1455} 1466}
1456 1467
1468static void stp_timeout(unsigned long dummy)
1469{
1470 queue_work(time_sync_wq, &stp_work);
1471}
1472
1457static int __init stp_init(void) 1473static int __init stp_init(void)
1458{ 1474{
1459 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags)) 1475 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
1460 return 0; 1476 return 0;
1477 setup_timer(&stp_timer, stp_timeout, 0UL);
1461 time_init_wq(); 1478 time_init_wq();
1462 if (!stp_online) 1479 if (!stp_online)
1463 return 0; 1480 return 0;
@@ -1565,6 +1582,7 @@ static void stp_work_fn(struct work_struct *work)
1565 1582
1566 if (!stp_online) { 1583 if (!stp_online) {
1567 chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000); 1584 chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
1585 del_timer_sync(&stp_timer);
1568 goto out_unlock; 1586 goto out_unlock;
1569 } 1587 }
1570 1588
@@ -1586,6 +1604,13 @@ static void stp_work_fn(struct work_struct *work)
1586 stop_machine(stp_sync_clock, &stp_sync, &cpu_online_map); 1604 stop_machine(stp_sync_clock, &stp_sync, &cpu_online_map);
1587 put_online_cpus(); 1605 put_online_cpus();
1588 1606
1607 if (!check_sync_clock())
1608 /*
1609 * There is a usable clock but the synchonization failed.
1610 * Retry after a second.
1611 */
1612 mod_timer(&stp_timer, jiffies + HZ);
1613
1589out_unlock: 1614out_unlock:
1590 mutex_unlock(&stp_work_mutex); 1615 mutex_unlock(&stp_work_mutex);
1591} 1616}
diff --git a/arch/s390/kernel/vtime.c b/arch/s390/kernel/vtime.c
index ecf0304e61c1..38ea92ff04f9 100644
--- a/arch/s390/kernel/vtime.c
+++ b/arch/s390/kernel/vtime.c
@@ -134,6 +134,8 @@ void vtime_start_cpu(void)
134 /* Account time spent with enabled wait psw loaded as idle time. */ 134 /* Account time spent with enabled wait psw loaded as idle time. */
135 idle_time = S390_lowcore.int_clock - idle->idle_enter; 135 idle_time = S390_lowcore.int_clock - idle->idle_enter;
136 account_idle_time(idle_time); 136 account_idle_time(idle_time);
137 S390_lowcore.steal_timer +=
138 idle->idle_enter - S390_lowcore.last_update_clock;
137 S390_lowcore.last_update_clock = S390_lowcore.int_clock; 139 S390_lowcore.last_update_clock = S390_lowcore.int_clock;
138 140
139 /* Account system time spent going idle. */ 141 /* Account system time spent going idle. */
@@ -425,17 +427,7 @@ void add_virt_timer_periodic(void *new)
425} 427}
426EXPORT_SYMBOL(add_virt_timer_periodic); 428EXPORT_SYMBOL(add_virt_timer_periodic);
427 429
428/* 430int __mod_vtimer(struct vtimer_list *timer, __u64 expires, int periodic)
429 * If we change a pending timer the function must be called on the CPU
430 * where the timer is running on, e.g. by smp_call_function_single()
431 *
432 * The original mod_timer adds the timer if it is not pending. For
433 * compatibility we do the same. The timer will be added on the current
434 * CPU as a oneshot timer.
435 *
436 * returns whether it has modified a pending timer (1) or not (0)
437 */
438int mod_virt_timer(struct vtimer_list *timer, __u64 expires)
439{ 431{
440 struct vtimer_queue *vq; 432 struct vtimer_queue *vq;
441 unsigned long flags; 433 unsigned long flags;
@@ -444,39 +436,35 @@ int mod_virt_timer(struct vtimer_list *timer, __u64 expires)
444 BUG_ON(!timer->function); 436 BUG_ON(!timer->function);
445 BUG_ON(!expires || expires > VTIMER_MAX_SLICE); 437 BUG_ON(!expires || expires > VTIMER_MAX_SLICE);
446 438
447 /*
448 * This is a common optimization triggered by the
449 * networking code - if the timer is re-modified
450 * to be the same thing then just return:
451 */
452 if (timer->expires == expires && vtimer_pending(timer)) 439 if (timer->expires == expires && vtimer_pending(timer))
453 return 1; 440 return 1;
454 441
455 cpu = get_cpu(); 442 cpu = get_cpu();
456 vq = &per_cpu(virt_cpu_timer, cpu); 443 vq = &per_cpu(virt_cpu_timer, cpu);
457 444
458 /* check if we run on the right CPU */
459 BUG_ON(timer->cpu != cpu);
460
461 /* disable interrupts before test if timer is pending */ 445 /* disable interrupts before test if timer is pending */
462 spin_lock_irqsave(&vq->lock, flags); 446 spin_lock_irqsave(&vq->lock, flags);
463 447
464 /* if timer isn't pending add it on the current CPU */ 448 /* if timer isn't pending add it on the current CPU */
465 if (!vtimer_pending(timer)) { 449 if (!vtimer_pending(timer)) {
466 spin_unlock_irqrestore(&vq->lock, flags); 450 spin_unlock_irqrestore(&vq->lock, flags);
467 /* we do not activate an interval timer with mod_virt_timer */ 451
468 timer->interval = 0; 452 if (periodic)
453 timer->interval = expires;
454 else
455 timer->interval = 0;
469 timer->expires = expires; 456 timer->expires = expires;
470 timer->cpu = cpu; 457 timer->cpu = cpu;
471 internal_add_vtimer(timer); 458 internal_add_vtimer(timer);
472 return 0; 459 return 0;
473 } 460 }
474 461
462 /* check if we run on the right CPU */
463 BUG_ON(timer->cpu != cpu);
464
475 list_del_init(&timer->entry); 465 list_del_init(&timer->entry);
476 timer->expires = expires; 466 timer->expires = expires;
477 467 if (periodic)
478 /* also change the interval if we have an interval timer */
479 if (timer->interval)
480 timer->interval = expires; 468 timer->interval = expires;
481 469
482 /* the timer can't expire anymore so we can release the lock */ 470 /* the timer can't expire anymore so we can release the lock */
@@ -484,9 +472,32 @@ int mod_virt_timer(struct vtimer_list *timer, __u64 expires)
484 internal_add_vtimer(timer); 472 internal_add_vtimer(timer);
485 return 1; 473 return 1;
486} 474}
475
476/*
477 * If we change a pending timer the function must be called on the CPU
478 * where the timer is running on.
479 *
480 * returns whether it has modified a pending timer (1) or not (0)
481 */
482int mod_virt_timer(struct vtimer_list *timer, __u64 expires)
483{
484 return __mod_vtimer(timer, expires, 0);
485}
487EXPORT_SYMBOL(mod_virt_timer); 486EXPORT_SYMBOL(mod_virt_timer);
488 487
489/* 488/*
489 * If we change a pending timer the function must be called on the CPU
490 * where the timer is running on.
491 *
492 * returns whether it has modified a pending timer (1) or not (0)
493 */
494int mod_virt_timer_periodic(struct vtimer_list *timer, __u64 expires)
495{
496 return __mod_vtimer(timer, expires, 1);
497}
498EXPORT_SYMBOL(mod_virt_timer_periodic);
499
500/*
490 * delete a virtual timer 501 * delete a virtual timer
491 * 502 *
492 * returns whether the deleted timer was pending (1) or not (0) 503 * returns whether the deleted timer was pending (1) or not (0)
@@ -516,16 +527,8 @@ EXPORT_SYMBOL(del_virt_timer);
516 */ 527 */
517void init_cpu_vtimer(void) 528void init_cpu_vtimer(void)
518{ 529{
519 struct thread_info *ti = current_thread_info();
520 struct vtimer_queue *vq; 530 struct vtimer_queue *vq;
521 531
522 S390_lowcore.user_timer = ti->user_timer;
523 S390_lowcore.system_timer = ti->system_timer;
524
525 /* kick the virtual timer */
526 asm volatile ("STCK %0" : "=m" (S390_lowcore.last_update_clock));
527 asm volatile ("STPT %0" : "=m" (S390_lowcore.last_update_timer));
528
529 /* initialize per cpu vtimer structure */ 532 /* initialize per cpu vtimer structure */
530 vq = &__get_cpu_var(virt_cpu_timer); 533 vq = &__get_cpu_var(virt_cpu_timer);
531 INIT_LIST_HEAD(&vq->list); 534 INIT_LIST_HEAD(&vq->list);
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 5e4babecf934..e7390dd0283d 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -14,6 +14,7 @@ config SUPERH
14 select HAVE_GENERIC_DMA_COHERENT 14 select HAVE_GENERIC_DMA_COHERENT
15 select HAVE_IOREMAP_PROT if MMU 15 select HAVE_IOREMAP_PROT if MMU
16 select HAVE_ARCH_TRACEHOOK 16 select HAVE_ARCH_TRACEHOOK
17 select HAVE_DMA_API_DEBUG
17 help 18 help
18 The SuperH is a RISC processor targeted for use in embedded systems 19 The SuperH is a RISC processor targeted for use in embedded systems
19 and consumer electronics; it was also used in the Sega Dreamcast 20 and consumer electronics; it was also used in the Sega Dreamcast
@@ -21,7 +22,7 @@ config SUPERH
21 <http://www.linux-sh.org/>. 22 <http://www.linux-sh.org/>.
22 23
23config SUPERH32 24config SUPERH32
24 def_bool !SUPERH64 25 def_bool ARCH = "sh"
25 select HAVE_KPROBES 26 select HAVE_KPROBES
26 select HAVE_KRETPROBES 27 select HAVE_KRETPROBES
27 select HAVE_FUNCTION_TRACER 28 select HAVE_FUNCTION_TRACER
@@ -31,7 +32,7 @@ config SUPERH32
31 select ARCH_HIBERNATION_POSSIBLE if MMU 32 select ARCH_HIBERNATION_POSSIBLE if MMU
32 33
33config SUPERH64 34config SUPERH64
34 def_bool y if CPU_SH5 35 def_bool ARCH = "sh64"
35 36
36config ARCH_DEFCONFIG 37config ARCH_DEFCONFIG
37 string 38 string
@@ -187,6 +188,8 @@ config ARCH_SHMOBILE
187 bool 188 bool
188 select ARCH_SUSPEND_POSSIBLE 189 select ARCH_SUSPEND_POSSIBLE
189 190
191if SUPERH32
192
190choice 193choice
191 prompt "Processor sub-type selection" 194 prompt "Processor sub-type selection"
192 195
@@ -408,6 +411,15 @@ config CPU_SUBTYPE_SH7366
408 select SYS_SUPPORTS_NUMA 411 select SYS_SUPPORTS_NUMA
409 select SYS_SUPPORTS_CMT 412 select SYS_SUPPORTS_CMT
410 413
414endchoice
415
416endif
417
418if SUPERH64
419
420choice
421 prompt "Processor sub-type selection"
422
411# SH-5 Processor Support 423# SH-5 Processor Support
412 424
413config CPU_SUBTYPE_SH5_101 425config CPU_SUBTYPE_SH5_101
@@ -420,6 +432,8 @@ config CPU_SUBTYPE_SH5_103
420 432
421endchoice 433endchoice
422 434
435endif
436
423source "arch/sh/mm/Kconfig" 437source "arch/sh/mm/Kconfig"
424 438
425source "arch/sh/Kconfig.cpu" 439source "arch/sh/Kconfig.cpu"
diff --git a/arch/sh/boards/board-ap325rxa.c b/arch/sh/boards/board-ap325rxa.c
index 912458f666eb..39e46919df14 100644
--- a/arch/sh/boards/board-ap325rxa.c
+++ b/arch/sh/boards/board-ap325rxa.c
@@ -349,6 +349,7 @@ static int ov7725_power(struct device *dev, int mode)
349static struct ov772x_camera_info ov7725_info = { 349static struct ov772x_camera_info ov7725_info = {
350 .buswidth = SOCAM_DATAWIDTH_8, 350 .buswidth = SOCAM_DATAWIDTH_8,
351 .flags = OV772X_FLAG_VFLIP | OV772X_FLAG_HFLIP, 351 .flags = OV772X_FLAG_VFLIP | OV772X_FLAG_HFLIP,
352 .edgectrl = OV772X_AUTO_EDGECTRL(0xf, 0),
352 .link = { 353 .link = {
353 .power = ov7725_power, 354 .power = ov7725_power,
354 }, 355 },
diff --git a/arch/sh/boards/board-urquell.c b/arch/sh/boards/board-urquell.c
index 8367d1d789c3..beb88c4da2c1 100644
--- a/arch/sh/boards/board-urquell.c
+++ b/arch/sh/boards/board-urquell.c
@@ -2,6 +2,8 @@
2 * Renesas Technology Corp. SH7786 Urquell Support. 2 * Renesas Technology Corp. SH7786 Urquell Support.
3 * 3 *
4 * Copyright (C) 2008 Kuninori Morimoto <morimoto.kuninori@renesas.com> 4 * Copyright (C) 2008 Kuninori Morimoto <morimoto.kuninori@renesas.com>
5 *
6 * Based on board-sh7785lcr.c
5 * Copyright (C) 2008 Yoshihiro Shimoda 7 * Copyright (C) 2008 Yoshihiro Shimoda
6 * 8 *
7 * This file is subject to the terms and conditions of the GNU General Public 9 * This file is subject to the terms and conditions of the GNU General Public
@@ -21,6 +23,32 @@
21#include <asm/heartbeat.h> 23#include <asm/heartbeat.h>
22#include <asm/sizes.h> 24#include <asm/sizes.h>
23 25
26/*
27 * bit 1234 5678
28 *----------------------------
29 * SW1 0101 0010 -> Pck 33MHz version
30 * (1101 0010) Pck 66MHz version
31 * SW2 0x1x xxxx -> little endian
32 * 29bit mode
33 * SW47 0001 1000 -> CS0 : on-board flash
34 * CS1 : SRAM, registers, LAN, PCMCIA
35 * 38400 bps for SCIF1
36 *
37 * Address
38 * 0x00000000 - 0x04000000 (CS0) Nor Flash
39 * 0x04000000 - 0x04200000 (CS1) SRAM
40 * 0x05000000 - 0x05800000 (CS1) on board register
41 * 0x05800000 - 0x06000000 (CS1) LAN91C111
42 * 0x06000000 - 0x06400000 (CS1) PCMCIA
43 * 0x08000000 - 0x10000000 (CS2-CS3) DDR3
44 * 0x10000000 - 0x14000000 (CS4) PCIe
45 * 0x14000000 - 0x14800000 (CS5) Core0 LRAM/URAM
46 * 0x14800000 - 0x15000000 (CS5) Core1 LRAM/URAM
47 * 0x18000000 - 0x1C000000 (CS6) ATA/NAND-Flash
48 * 0x1C000000 - (CS7) SH7786 Control register
49 */
50
51/* HeartBeat */
24static struct resource heartbeat_resources[] = { 52static struct resource heartbeat_resources[] = {
25 [0] = { 53 [0] = {
26 .start = BOARDREG(SLEDR), 54 .start = BOARDREG(SLEDR),
@@ -43,6 +71,7 @@ static struct platform_device heartbeat_device = {
43 .resource = heartbeat_resources, 71 .resource = heartbeat_resources,
44}; 72};
45 73
74/* LAN91C111 */
46static struct smc91x_platdata smc91x_info = { 75static struct smc91x_platdata smc91x_info = {
47 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, 76 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
48}; 77};
@@ -69,6 +98,7 @@ static struct platform_device smc91x_eth_device = {
69 }, 98 },
70}; 99};
71 100
101/* Nor Flash */
72static struct mtd_partition nor_flash_partitions[] = { 102static struct mtd_partition nor_flash_partitions[] = {
73 { 103 {
74 .name = "loader", 104 .name = "loader",
diff --git a/arch/sh/drivers/pci/ops-sh7785lcr.c b/arch/sh/drivers/pci/ops-sh7785lcr.c
index e8b7446a7c2b..fb0869f0bef8 100644
--- a/arch/sh/drivers/pci/ops-sh7785lcr.c
+++ b/arch/sh/drivers/pci/ops-sh7785lcr.c
@@ -48,8 +48,13 @@ EXPORT_SYMBOL(board_pci_channels);
48 48
49static struct sh4_pci_address_map sh7785_pci_map = { 49static struct sh4_pci_address_map sh7785_pci_map = {
50 .window0 = { 50 .window0 = {
51#if defined(CONFIG_32BIT)
52 .base = SH7780_32BIT_DDR_BASE_ADDR,
53 .size = 0x40000000,
54#else
51 .base = SH7780_CS0_BASE_ADDR, 55 .base = SH7780_CS0_BASE_ADDR,
52 .size = 0x20000000, 56 .size = 0x20000000,
57#endif
53 }, 58 },
54 59
55 .flags = SH4_PCIC_NO_RESET, 60 .flags = SH4_PCIC_NO_RESET,
diff --git a/arch/sh/drivers/pci/pci-sh7780.h b/arch/sh/drivers/pci/pci-sh7780.h
index 97b2c98f05c4..93adc7119b79 100644
--- a/arch/sh/drivers/pci/pci-sh7780.h
+++ b/arch/sh/drivers/pci/pci-sh7780.h
@@ -104,6 +104,8 @@
104#define SH7780_CS5_BASE_ADDR (SH7780_CS4_BASE_ADDR + SH7780_MEM_REGION_SIZE) 104#define SH7780_CS5_BASE_ADDR (SH7780_CS4_BASE_ADDR + SH7780_MEM_REGION_SIZE)
105#define SH7780_CS6_BASE_ADDR (SH7780_CS5_BASE_ADDR + SH7780_MEM_REGION_SIZE) 105#define SH7780_CS6_BASE_ADDR (SH7780_CS5_BASE_ADDR + SH7780_MEM_REGION_SIZE)
106 106
107#define SH7780_32BIT_DDR_BASE_ADDR 0x40000000
108
107struct sh4_pci_address_map; 109struct sh4_pci_address_map;
108 110
109/* arch/sh/drivers/pci/pci-sh7780.c */ 111/* arch/sh/drivers/pci/pci-sh7780.c */
diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c
index e36c7b870861..0d6ac7a1db49 100644
--- a/arch/sh/drivers/pci/pci.c
+++ b/arch/sh/drivers/pci/pci.c
@@ -19,6 +19,7 @@
19#include <linux/kernel.h> 19#include <linux/kernel.h>
20#include <linux/pci.h> 20#include <linux/pci.h>
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/dma-debug.h>
22#include <asm/io.h> 23#include <asm/io.h>
23 24
24static int __init pcibios_init(void) 25static int __init pcibios_init(void)
@@ -43,6 +44,8 @@ static int __init pcibios_init(void)
43 44
44 pci_fixup_irqs(pci_common_swizzle, pcibios_map_platform_irq); 45 pci_fixup_irqs(pci_common_swizzle, pcibios_map_platform_irq);
45 46
47 dma_debug_add_bus(&pci_bus_type);
48
46 return 0; 49 return 0;
47} 50}
48subsys_initcall(pcibios_init); 51subsys_initcall(pcibios_init);
diff --git a/arch/sh/include/asm/dma-mapping.h b/arch/sh/include/asm/dma-mapping.h
index 627315ecdb52..ea9d4f41c9d2 100644
--- a/arch/sh/include/asm/dma-mapping.h
+++ b/arch/sh/include/asm/dma-mapping.h
@@ -3,6 +3,7 @@
3 3
4#include <linux/mm.h> 4#include <linux/mm.h>
5#include <linux/scatterlist.h> 5#include <linux/scatterlist.h>
6#include <linux/dma-debug.h>
6#include <asm/cacheflush.h> 7#include <asm/cacheflush.h>
7#include <asm/io.h> 8#include <asm/io.h>
8#include <asm-generic/dma-coherent.h> 9#include <asm-generic/dma-coherent.h>
@@ -38,16 +39,26 @@ static inline dma_addr_t dma_map_single(struct device *dev,
38 void *ptr, size_t size, 39 void *ptr, size_t size,
39 enum dma_data_direction dir) 40 enum dma_data_direction dir)
40{ 41{
42 dma_addr_t addr = virt_to_phys(ptr);
43
41#if defined(CONFIG_PCI) && !defined(CONFIG_SH_PCIDMA_NONCOHERENT) 44#if defined(CONFIG_PCI) && !defined(CONFIG_SH_PCIDMA_NONCOHERENT)
42 if (dev->bus == &pci_bus_type) 45 if (dev->bus == &pci_bus_type)
43 return virt_to_phys(ptr); 46 return addr;
44#endif 47#endif
45 dma_cache_sync(dev, ptr, size, dir); 48 dma_cache_sync(dev, ptr, size, dir);
46 49
47 return virt_to_phys(ptr); 50 debug_dma_map_page(dev, virt_to_page(ptr),
51 (unsigned long)ptr & ~PAGE_MASK, size,
52 dir, addr, true);
53
54 return addr;
48} 55}
49 56
50#define dma_unmap_single(dev, addr, size, dir) do { } while (0) 57static inline void dma_unmap_single(struct device *dev, dma_addr_t addr,
58 size_t size, enum dma_data_direction dir)
59{
60 debug_dma_unmap_page(dev, addr, size, dir, true);
61}
51 62
52static inline int dma_map_sg(struct device *dev, struct scatterlist *sg, 63static inline int dma_map_sg(struct device *dev, struct scatterlist *sg,
53 int nents, enum dma_data_direction dir) 64 int nents, enum dma_data_direction dir)
@@ -59,12 +70,19 @@ static inline int dma_map_sg(struct device *dev, struct scatterlist *sg,
59 dma_cache_sync(dev, sg_virt(&sg[i]), sg[i].length, dir); 70 dma_cache_sync(dev, sg_virt(&sg[i]), sg[i].length, dir);
60#endif 71#endif
61 sg[i].dma_address = sg_phys(&sg[i]); 72 sg[i].dma_address = sg_phys(&sg[i]);
73 sg[i].dma_length = sg[i].length;
62 } 74 }
63 75
76 debug_dma_map_sg(dev, sg, nents, i, dir);
77
64 return nents; 78 return nents;
65} 79}
66 80
67#define dma_unmap_sg(dev, sg, nents, dir) do { } while (0) 81static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
82 int nents, enum dma_data_direction dir)
83{
84 debug_dma_unmap_sg(dev, sg, nents, dir);
85}
68 86
69static inline dma_addr_t dma_map_page(struct device *dev, struct page *page, 87static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
70 unsigned long offset, size_t size, 88 unsigned long offset, size_t size,
@@ -111,6 +129,7 @@ static inline void dma_sync_sg(struct device *dev, struct scatterlist *sg,
111 dma_cache_sync(dev, sg_virt(&sg[i]), sg[i].length, dir); 129 dma_cache_sync(dev, sg_virt(&sg[i]), sg[i].length, dir);
112#endif 130#endif
113 sg[i].dma_address = sg_phys(&sg[i]); 131 sg[i].dma_address = sg_phys(&sg[i]);
132 sg[i].dma_length = sg[i].length;
114 } 133 }
115} 134}
116 135
@@ -119,6 +138,7 @@ static inline void dma_sync_single_for_cpu(struct device *dev,
119 enum dma_data_direction dir) 138 enum dma_data_direction dir)
120{ 139{
121 dma_sync_single(dev, dma_handle, size, dir); 140 dma_sync_single(dev, dma_handle, size, dir);
141 debug_dma_sync_single_for_cpu(dev, dma_handle, size, dir);
122} 142}
123 143
124static inline void dma_sync_single_for_device(struct device *dev, 144static inline void dma_sync_single_for_device(struct device *dev,
@@ -127,6 +147,7 @@ static inline void dma_sync_single_for_device(struct device *dev,
127 enum dma_data_direction dir) 147 enum dma_data_direction dir)
128{ 148{
129 dma_sync_single(dev, dma_handle, size, dir); 149 dma_sync_single(dev, dma_handle, size, dir);
150 debug_dma_sync_single_for_device(dev, dma_handle, size, dir);
130} 151}
131 152
132static inline void dma_sync_single_range_for_cpu(struct device *dev, 153static inline void dma_sync_single_range_for_cpu(struct device *dev,
@@ -136,6 +157,8 @@ static inline void dma_sync_single_range_for_cpu(struct device *dev,
136 enum dma_data_direction direction) 157 enum dma_data_direction direction)
137{ 158{
138 dma_sync_single_for_cpu(dev, dma_handle+offset, size, direction); 159 dma_sync_single_for_cpu(dev, dma_handle+offset, size, direction);
160 debug_dma_sync_single_range_for_cpu(dev, dma_handle,
161 offset, size, direction);
139} 162}
140 163
141static inline void dma_sync_single_range_for_device(struct device *dev, 164static inline void dma_sync_single_range_for_device(struct device *dev,
@@ -145,6 +168,8 @@ static inline void dma_sync_single_range_for_device(struct device *dev,
145 enum dma_data_direction direction) 168 enum dma_data_direction direction)
146{ 169{
147 dma_sync_single_for_device(dev, dma_handle+offset, size, direction); 170 dma_sync_single_for_device(dev, dma_handle+offset, size, direction);
171 debug_dma_sync_single_range_for_device(dev, dma_handle,
172 offset, size, direction);
148} 173}
149 174
150 175
@@ -153,6 +178,7 @@ static inline void dma_sync_sg_for_cpu(struct device *dev,
153 enum dma_data_direction dir) 178 enum dma_data_direction dir)
154{ 179{
155 dma_sync_sg(dev, sg, nelems, dir); 180 dma_sync_sg(dev, sg, nelems, dir);
181 debug_dma_sync_sg_for_cpu(dev, sg, nelems, dir);
156} 182}
157 183
158static inline void dma_sync_sg_for_device(struct device *dev, 184static inline void dma_sync_sg_for_device(struct device *dev,
@@ -160,9 +186,9 @@ static inline void dma_sync_sg_for_device(struct device *dev,
160 enum dma_data_direction dir) 186 enum dma_data_direction dir)
161{ 187{
162 dma_sync_sg(dev, sg, nelems, dir); 188 dma_sync_sg(dev, sg, nelems, dir);
189 debug_dma_sync_sg_for_device(dev, sg, nelems, dir);
163} 190}
164 191
165
166static inline int dma_get_cache_alignment(void) 192static inline int dma_get_cache_alignment(void)
167{ 193{
168 /* 194 /*
diff --git a/arch/sh/include/asm/scatterlist.h b/arch/sh/include/asm/scatterlist.h
index 2084d0373693..c693d268a413 100644
--- a/arch/sh/include/asm/scatterlist.h
+++ b/arch/sh/include/asm/scatterlist.h
@@ -5,12 +5,13 @@
5 5
6struct scatterlist { 6struct scatterlist {
7#ifdef CONFIG_DEBUG_SG 7#ifdef CONFIG_DEBUG_SG
8 unsigned long sg_magic; 8 unsigned long sg_magic;
9#endif 9#endif
10 unsigned long page_link; 10 unsigned long page_link;
11 unsigned int offset;/* for highmem, page offset */ 11 unsigned int offset; /* for highmem, page offset */
12 dma_addr_t dma_address; 12 unsigned int length;
13 unsigned int length; 13 dma_addr_t dma_address;
14 unsigned int dma_length;
14}; 15};
15 16
16#define ISA_DMA_THRESHOLD PHYS_ADDR_MASK 17#define ISA_DMA_THRESHOLD PHYS_ADDR_MASK
diff --git a/arch/sh/include/asm/topology.h b/arch/sh/include/asm/topology.h
index a3f239545897..8489a0905a87 100644
--- a/arch/sh/include/asm/topology.h
+++ b/arch/sh/include/asm/topology.h
@@ -37,8 +37,11 @@
37#define pcibus_to_node(bus) ((void)(bus), -1) 37#define pcibus_to_node(bus) ((void)(bus), -1)
38#define pcibus_to_cpumask(bus) (pcibus_to_node(bus) == -1 ? \ 38#define pcibus_to_cpumask(bus) (pcibus_to_node(bus) == -1 ? \
39 CPU_MASK_ALL : \ 39 CPU_MASK_ALL : \
40 node_to_cpumask(pcibus_to_node(bus)) \ 40 node_to_cpumask(pcibus_to_node(bus)))
41 ) 41#define cpumask_of_pcibus(bus) (pcibus_to_node(bus) == -1 ? \
42 CPU_MASK_ALL_PTR : \
43 cpumask_of_node(pcibus_to_node(bus)))
44
42#endif 45#endif
43 46
44#include <asm-generic/topology.h> 47#include <asm-generic/topology.h>
diff --git a/arch/sh/include/asm/unistd_32.h b/arch/sh/include/asm/unistd_32.h
index d52c000cf924..2efb819e2db3 100644
--- a/arch/sh/include/asm/unistd_32.h
+++ b/arch/sh/include/asm/unistd_32.h
@@ -341,8 +341,10 @@
341#define __NR_dup3 330 341#define __NR_dup3 330
342#define __NR_pipe2 331 342#define __NR_pipe2 331
343#define __NR_inotify_init1 332 343#define __NR_inotify_init1 332
344#define __NR_preadv 333
345#define __NR_pwritev 334
344 346
345#define NR_syscalls 333 347#define NR_syscalls 335
346 348
347#ifdef __KERNEL__ 349#ifdef __KERNEL__
348 350
diff --git a/arch/sh/include/asm/unistd_64.h b/arch/sh/include/asm/unistd_64.h
index 7c54e91753c1..6eb9d2934c0f 100644
--- a/arch/sh/include/asm/unistd_64.h
+++ b/arch/sh/include/asm/unistd_64.h
@@ -381,10 +381,12 @@
381#define __NR_dup3 358 381#define __NR_dup3 358
382#define __NR_pipe2 359 382#define __NR_pipe2 359
383#define __NR_inotify_init1 360 383#define __NR_inotify_init1 360
384#define __NR_preadv 361
385#define __NR_pwritev 362
384 386
385#ifdef __KERNEL__ 387#ifdef __KERNEL__
386 388
387#define NR_syscalls 361 389#define NR_syscalls 363
388 390
389#define __ARCH_WANT_IPC_PARSE_VERSION 391#define __ARCH_WANT_IPC_PARSE_VERSION
390#define __ARCH_WANT_OLD_READDIR 392#define __ARCH_WANT_OLD_READDIR
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
index 5a47e1cf442e..90e8cfff55fd 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
@@ -143,14 +143,14 @@ static void __init sh7786_usb_setup(void)
143 * Set the PHY and PLL enable bit 143 * Set the PHY and PLL enable bit
144 */ 144 */
145 __raw_writel(PHY_ENB | PLL_ENB, USBPCTL1); 145 __raw_writel(PHY_ENB | PLL_ENB, USBPCTL1);
146 while (i-- && 146 while (i--) {
147 ((__raw_readl(USBST) & ACT_PLL_STATUS) != ACT_PLL_STATUS)) 147 if (ACT_PLL_STATUS == (__raw_readl(USBST) & ACT_PLL_STATUS)) {
148 /* Set the PHY RST bit */
149 __raw_writel(PHY_ENB | PLL_ENB | PHY_RST, USBPCTL1);
150 printk(KERN_INFO "sh7786 usb setup done\n");
151 break;
152 }
148 cpu_relax(); 153 cpu_relax();
149
150 if (i) {
151 /* Set the PHY RST bit */
152 __raw_writel(PHY_ENB | PLL_ENB | PHY_RST, USBPCTL1);
153 printk(KERN_INFO "sh7786 usb setup done\n");
154 } 154 }
155} 155}
156 156
diff --git a/arch/sh/kernel/syscalls_32.S b/arch/sh/kernel/syscalls_32.S
index e67c1733e1b9..05202edd8e21 100644
--- a/arch/sh/kernel/syscalls_32.S
+++ b/arch/sh/kernel/syscalls_32.S
@@ -349,3 +349,5 @@ ENTRY(sys_call_table)
349 .long sys_dup3 /* 330 */ 349 .long sys_dup3 /* 330 */
350 .long sys_pipe2 350 .long sys_pipe2
351 .long sys_inotify_init1 351 .long sys_inotify_init1
352 .long sys_preadv
353 .long sys_writev
diff --git a/arch/sh/kernel/syscalls_64.S b/arch/sh/kernel/syscalls_64.S
index 557cb91f5caf..a083609f9284 100644
--- a/arch/sh/kernel/syscalls_64.S
+++ b/arch/sh/kernel/syscalls_64.S
@@ -387,3 +387,5 @@ sys_call_table:
387 .long sys_dup3 387 .long sys_dup3
388 .long sys_pipe2 388 .long sys_pipe2
389 .long sys_inotify_init1 /* 360 */ 389 .long sys_inotify_init1 /* 360 */
390 .long sys_preadv
391 .long sys_pwritev
diff --git a/arch/sh/mm/consistent.c b/arch/sh/mm/consistent.c
index edcd5fbf9651..e098ec158ddb 100644
--- a/arch/sh/mm/consistent.c
+++ b/arch/sh/mm/consistent.c
@@ -10,11 +10,22 @@
10 * for more details. 10 * for more details.
11 */ 11 */
12#include <linux/mm.h> 12#include <linux/mm.h>
13#include <linux/init.h>
13#include <linux/platform_device.h> 14#include <linux/platform_device.h>
14#include <linux/dma-mapping.h> 15#include <linux/dma-mapping.h>
16#include <linux/dma-debug.h>
17#include <linux/io.h>
15#include <asm/cacheflush.h> 18#include <asm/cacheflush.h>
16#include <asm/addrspace.h> 19#include <asm/addrspace.h>
17#include <asm/io.h> 20
21#define PREALLOC_DMA_DEBUG_ENTRIES 4096
22
23static int __init dma_init(void)
24{
25 dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
26 return 0;
27}
28fs_initcall(dma_init);
18 29
19void *dma_alloc_coherent(struct device *dev, size_t size, 30void *dma_alloc_coherent(struct device *dev, size_t size,
20 dma_addr_t *dma_handle, gfp_t gfp) 31 dma_addr_t *dma_handle, gfp_t gfp)
@@ -45,6 +56,9 @@ void *dma_alloc_coherent(struct device *dev, size_t size,
45 split_page(pfn_to_page(virt_to_phys(ret) >> PAGE_SHIFT), order); 56 split_page(pfn_to_page(virt_to_phys(ret) >> PAGE_SHIFT), order);
46 57
47 *dma_handle = virt_to_phys(ret); 58 *dma_handle = virt_to_phys(ret);
59
60 debug_dma_alloc_coherent(dev, size, *dma_handle, ret_nocache);
61
48 return ret_nocache; 62 return ret_nocache;
49} 63}
50EXPORT_SYMBOL(dma_alloc_coherent); 64EXPORT_SYMBOL(dma_alloc_coherent);
@@ -56,12 +70,15 @@ void dma_free_coherent(struct device *dev, size_t size,
56 unsigned long pfn = dma_handle >> PAGE_SHIFT; 70 unsigned long pfn = dma_handle >> PAGE_SHIFT;
57 int k; 71 int k;
58 72
59 if (!dma_release_from_coherent(dev, order, vaddr)) { 73 WARN_ON(irqs_disabled()); /* for portability */
60 WARN_ON(irqs_disabled()); /* for portability */ 74
61 for (k = 0; k < (1 << order); k++) 75 if (dma_release_from_coherent(dev, order, vaddr))
62 __free_pages(pfn_to_page(pfn + k), 0); 76 return;
63 iounmap(vaddr); 77
64 } 78 debug_dma_free_coherent(dev, size, vaddr, dma_handle);
79 for (k = 0; k < (1 << order); k++)
80 __free_pages(pfn_to_page(pfn + k), 0);
81 iounmap(vaddr);
65} 82}
66EXPORT_SYMBOL(dma_free_coherent); 83EXPORT_SYMBOL(dma_free_coherent);
67 84
diff --git a/arch/sparc/include/asm/atomic_32.h b/arch/sparc/include/asm/atomic_32.h
index ce465975a6a5..bb91b1248cd1 100644
--- a/arch/sparc/include/asm/atomic_32.h
+++ b/arch/sparc/include/asm/atomic_32.h
@@ -15,6 +15,8 @@
15 15
16#ifdef __KERNEL__ 16#ifdef __KERNEL__
17 17
18#include <asm/system.h>
19
18#define ATOMIC_INIT(i) { (i) } 20#define ATOMIC_INIT(i) { (i) }
19 21
20extern int __atomic_add_return(int, atomic_t *); 22extern int __atomic_add_return(int, atomic_t *);
diff --git a/arch/sparc/include/asm/parport.h b/arch/sparc/include/asm/parport.h
index dff3f0253aa8..ff9ead640c4a 100644
--- a/arch/sparc/include/asm/parport.h
+++ b/arch/sparc/include/asm/parport.h
@@ -117,7 +117,7 @@ static int __devinit ecpp_probe(struct of_device *op, const struct of_device_id
117 if (!strcmp(parent->name, "dma")) { 117 if (!strcmp(parent->name, "dma")) {
118 p = parport_pc_probe_port(base, base + 0x400, 118 p = parport_pc_probe_port(base, base + 0x400,
119 op->irqs[0], PARPORT_DMA_NOFIFO, 119 op->irqs[0], PARPORT_DMA_NOFIFO,
120 op->dev.parent->parent); 120 op->dev.parent->parent, 0);
121 if (!p) 121 if (!p)
122 return -ENOMEM; 122 return -ENOMEM;
123 dev_set_drvdata(&op->dev, p); 123 dev_set_drvdata(&op->dev, p);
@@ -168,7 +168,8 @@ static int __devinit ecpp_probe(struct of_device *op, const struct of_device_id
168 p = parport_pc_probe_port(base, base + 0x400, 168 p = parport_pc_probe_port(base, base + 0x400,
169 op->irqs[0], 169 op->irqs[0],
170 slot, 170 slot,
171 op->dev.parent); 171 op->dev.parent,
172 0);
172 err = -ENOMEM; 173 err = -ENOMEM;
173 if (!p) 174 if (!p)
174 goto out_disable_irq; 175 goto out_disable_irq;
diff --git a/arch/sparc/include/asm/unistd.h b/arch/sparc/include/asm/unistd.h
index 031f038b19f7..b8eb71ef3163 100644
--- a/arch/sparc/include/asm/unistd.h
+++ b/arch/sparc/include/asm/unistd.h
@@ -392,8 +392,10 @@
392#define __NR_pipe2 321 392#define __NR_pipe2 321
393#define __NR_inotify_init1 322 393#define __NR_inotify_init1 322
394#define __NR_accept4 323 394#define __NR_accept4 323
395#define __NR_preadv 324
396#define __NR_pwritev 325
395 397
396#define NR_SYSCALLS 324 398#define NR_SYSCALLS 326
397 399
398#ifdef __32bit_syscall_numbers__ 400#ifdef __32bit_syscall_numbers__
399/* Sparc 32-bit only has the "setresuid32", "getresuid32" variants, 401/* Sparc 32-bit only has the "setresuid32", "getresuid32" variants,
diff --git a/arch/sparc/kernel/ldc.c b/arch/sparc/kernel/ldc.c
index 6ce5d2598a09..adf5f273868a 100644
--- a/arch/sparc/kernel/ldc.c
+++ b/arch/sparc/kernel/ldc.c
@@ -1183,8 +1183,7 @@ out_free_txq:
1183 free_queue(lp->tx_num_entries, lp->tx_base); 1183 free_queue(lp->tx_num_entries, lp->tx_base);
1184 1184
1185out_free_mssbuf: 1185out_free_mssbuf:
1186 if (mssbuf) 1186 kfree(mssbuf);
1187 kfree(mssbuf);
1188 1187
1189out_free_iommu: 1188out_free_iommu:
1190 ldc_iommu_release(lp); 1189 ldc_iommu_release(lp);
@@ -1217,8 +1216,7 @@ void ldc_free(struct ldc_channel *lp)
1217 1216
1218 hlist_del(&lp->list); 1217 hlist_del(&lp->list);
1219 1218
1220 if (lp->mssbuf) 1219 kfree(lp->mssbuf);
1221 kfree(lp->mssbuf);
1222 1220
1223 ldc_iommu_release(lp); 1221 ldc_iommu_release(lp);
1224 1222
diff --git a/arch/sparc/kernel/of_device_64.c b/arch/sparc/kernel/of_device_64.c
index b4a12c9aa5f8..27381f1baffc 100644
--- a/arch/sparc/kernel/of_device_64.c
+++ b/arch/sparc/kernel/of_device_64.c
@@ -99,8 +99,7 @@ static inline u64 of_read_addr(const u32 *cell, int size)
99 return r; 99 return r;
100} 100}
101 101
102static void __init get_cells(struct device_node *dp, 102static void get_cells(struct device_node *dp, int *addrc, int *sizec)
103 int *addrc, int *sizec)
104{ 103{
105 if (addrc) 104 if (addrc)
106 *addrc = of_n_addr_cells(dp); 105 *addrc = of_n_addr_cells(dp);
diff --git a/arch/sparc/kernel/pci_fire.c b/arch/sparc/kernel/pci_fire.c
index 9462b68f4894..d53f45bc7dda 100644
--- a/arch/sparc/kernel/pci_fire.c
+++ b/arch/sparc/kernel/pci_fire.c
@@ -409,8 +409,8 @@ static void pci_fire_hw_init(struct pci_pbm_info *pbm)
409 upa_writeq(~(u64)0, pbm->pbm_regs + FIRE_PEC_IENAB); 409 upa_writeq(~(u64)0, pbm->pbm_regs + FIRE_PEC_IENAB);
410} 410}
411 411
412static int __init pci_fire_pbm_init(struct pci_pbm_info *pbm, 412static int __devinit pci_fire_pbm_init(struct pci_pbm_info *pbm,
413 struct of_device *op, u32 portid) 413 struct of_device *op, u32 portid)
414{ 414{
415 const struct linux_prom64_registers *regs; 415 const struct linux_prom64_registers *regs;
416 struct device_node *dp = op->node; 416 struct device_node *dp = op->node;
diff --git a/arch/sparc/kernel/pci_psycho.c b/arch/sparc/kernel/pci_psycho.c
index 3b34344082ef..142b9d6984a8 100644
--- a/arch/sparc/kernel/pci_psycho.c
+++ b/arch/sparc/kernel/pci_psycho.c
@@ -365,8 +365,8 @@ static void pbm_config_busmastering(struct pci_pbm_info *pbm)
365 pci_config_write8(addr, 64); 365 pci_config_write8(addr, 64);
366} 366}
367 367
368static void __init psycho_scan_bus(struct pci_pbm_info *pbm, 368static void __devinit psycho_scan_bus(struct pci_pbm_info *pbm,
369 struct device *parent) 369 struct device *parent)
370{ 370{
371 pbm_config_busmastering(pbm); 371 pbm_config_busmastering(pbm);
372 pbm->is_66mhz_capable = 0; 372 pbm->is_66mhz_capable = 0;
@@ -482,8 +482,8 @@ static void psycho_pbm_strbuf_init(struct pci_pbm_info *pbm,
482#define PSYCHO_MEMSPACE_B 0x180000000UL 482#define PSYCHO_MEMSPACE_B 0x180000000UL
483#define PSYCHO_MEMSPACE_SIZE 0x07fffffffUL 483#define PSYCHO_MEMSPACE_SIZE 0x07fffffffUL
484 484
485static void __init psycho_pbm_init(struct pci_pbm_info *pbm, 485static void __devinit psycho_pbm_init(struct pci_pbm_info *pbm,
486 struct of_device *op, int is_pbm_a) 486 struct of_device *op, int is_pbm_a)
487{ 487{
488 psycho_pbm_init_common(pbm, op, "PSYCHO", PBM_CHIP_TYPE_PSYCHO); 488 psycho_pbm_init_common(pbm, op, "PSYCHO", PBM_CHIP_TYPE_PSYCHO);
489 psycho_pbm_strbuf_init(pbm, is_pbm_a); 489 psycho_pbm_strbuf_init(pbm, is_pbm_a);
diff --git a/arch/sparc/kernel/pci_sabre.c b/arch/sparc/kernel/pci_sabre.c
index 713257b6963c..ba6fbeba3e2c 100644
--- a/arch/sparc/kernel/pci_sabre.c
+++ b/arch/sparc/kernel/pci_sabre.c
@@ -402,8 +402,8 @@ static void apb_init(struct pci_bus *sabre_bus)
402 } 402 }
403} 403}
404 404
405static void __init sabre_scan_bus(struct pci_pbm_info *pbm, 405static void __devinit sabre_scan_bus(struct pci_pbm_info *pbm,
406 struct device *parent) 406 struct device *parent)
407{ 407{
408 static int once; 408 static int once;
409 409
@@ -442,8 +442,8 @@ static void __init sabre_scan_bus(struct pci_pbm_info *pbm,
442 sabre_register_error_handlers(pbm); 442 sabre_register_error_handlers(pbm);
443} 443}
444 444
445static void __init sabre_pbm_init(struct pci_pbm_info *pbm, 445static void __devinit sabre_pbm_init(struct pci_pbm_info *pbm,
446 struct of_device *op) 446 struct of_device *op)
447{ 447{
448 psycho_pbm_init_common(pbm, op, "SABRE", PBM_CHIP_TYPE_SABRE); 448 psycho_pbm_init_common(pbm, op, "SABRE", PBM_CHIP_TYPE_SABRE);
449 pbm->pci_afsr = pbm->controller_regs + SABRE_PIOAFSR; 449 pbm->pci_afsr = pbm->controller_regs + SABRE_PIOAFSR;
diff --git a/arch/sparc/kernel/pci_sun4v.c b/arch/sparc/kernel/pci_sun4v.c
index 0ef0ab3d4763..5db5ebed35da 100644
--- a/arch/sparc/kernel/pci_sun4v.c
+++ b/arch/sparc/kernel/pci_sun4v.c
@@ -545,8 +545,8 @@ static const struct dma_ops sun4v_dma_ops = {
545 .sync_sg_for_cpu = dma_4v_sync_sg_for_cpu, 545 .sync_sg_for_cpu = dma_4v_sync_sg_for_cpu,
546}; 546};
547 547
548static void __init pci_sun4v_scan_bus(struct pci_pbm_info *pbm, 548static void __devinit pci_sun4v_scan_bus(struct pci_pbm_info *pbm,
549 struct device *parent) 549 struct device *parent)
550{ 550{
551 struct property *prop; 551 struct property *prop;
552 struct device_node *dp; 552 struct device_node *dp;
@@ -559,8 +559,8 @@ static void __init pci_sun4v_scan_bus(struct pci_pbm_info *pbm,
559 /* XXX register error interrupt handlers XXX */ 559 /* XXX register error interrupt handlers XXX */
560} 560}
561 561
562static unsigned long __init probe_existing_entries(struct pci_pbm_info *pbm, 562static unsigned long __devinit probe_existing_entries(struct pci_pbm_info *pbm,
563 struct iommu *iommu) 563 struct iommu *iommu)
564{ 564{
565 struct iommu_arena *arena = &iommu->arena; 565 struct iommu_arena *arena = &iommu->arena;
566 unsigned long i, cnt = 0; 566 unsigned long i, cnt = 0;
@@ -587,7 +587,7 @@ static unsigned long __init probe_existing_entries(struct pci_pbm_info *pbm,
587 return cnt; 587 return cnt;
588} 588}
589 589
590static int __init pci_sun4v_iommu_init(struct pci_pbm_info *pbm) 590static int __devinit pci_sun4v_iommu_init(struct pci_pbm_info *pbm)
591{ 591{
592 static const u32 vdma_default[] = { 0x80000000, 0x80000000 }; 592 static const u32 vdma_default[] = { 0x80000000, 0x80000000 };
593 struct iommu *iommu = pbm->iommu; 593 struct iommu *iommu = pbm->iommu;
@@ -889,8 +889,8 @@ static void pci_sun4v_msi_init(struct pci_pbm_info *pbm)
889} 889}
890#endif /* !(CONFIG_PCI_MSI) */ 890#endif /* !(CONFIG_PCI_MSI) */
891 891
892static int __init pci_sun4v_pbm_init(struct pci_pbm_info *pbm, 892static int __devinit pci_sun4v_pbm_init(struct pci_pbm_info *pbm,
893 struct of_device *op, u32 devhandle) 893 struct of_device *op, u32 devhandle)
894{ 894{
895 struct device_node *dp = op->node; 895 struct device_node *dp = op->node;
896 int err; 896 int err;
diff --git a/arch/sparc/kernel/power.c b/arch/sparc/kernel/power.c
index ae88f06a7ec4..e2a045c235a1 100644
--- a/arch/sparc/kernel/power.c
+++ b/arch/sparc/kernel/power.c
@@ -23,7 +23,7 @@ static irqreturn_t power_handler(int irq, void *dev_id)
23 return IRQ_HANDLED; 23 return IRQ_HANDLED;
24} 24}
25 25
26static int __init has_button_interrupt(unsigned int irq, struct device_node *dp) 26static int __devinit has_button_interrupt(unsigned int irq, struct device_node *dp)
27{ 27{
28 if (irq == 0xffffffff) 28 if (irq == 0xffffffff)
29 return 0; 29 return 0;
diff --git a/arch/sparc/kernel/smp_64.c b/arch/sparc/kernel/smp_64.c
index 708e12a26b05..f7642e5a94db 100644
--- a/arch/sparc/kernel/smp_64.c
+++ b/arch/sparc/kernel/smp_64.c
@@ -118,9 +118,9 @@ void __cpuinit smp_callin(void)
118 while (!cpu_isset(cpuid, smp_commenced_mask)) 118 while (!cpu_isset(cpuid, smp_commenced_mask))
119 rmb(); 119 rmb();
120 120
121 ipi_call_lock(); 121 ipi_call_lock_irq();
122 cpu_set(cpuid, cpu_online_map); 122 cpu_set(cpuid, cpu_online_map);
123 ipi_call_unlock(); 123 ipi_call_unlock_irq();
124 124
125 /* idle thread is expected to have preempt disabled */ 125 /* idle thread is expected to have preempt disabled */
126 preempt_disable(); 126 preempt_disable();
diff --git a/arch/sparc/kernel/systbls_32.S b/arch/sparc/kernel/systbls_32.S
index dccc95df0c7f..00ec3b15f38c 100644
--- a/arch/sparc/kernel/systbls_32.S
+++ b/arch/sparc/kernel/systbls_32.S
@@ -81,4 +81,4 @@ sys_call_table:
81/*305*/ .long sys_set_mempolicy, sys_kexec_load, sys_move_pages, sys_getcpu, sys_epoll_pwait 81/*305*/ .long sys_set_mempolicy, sys_kexec_load, sys_move_pages, sys_getcpu, sys_epoll_pwait
82/*310*/ .long sys_utimensat, sys_signalfd, sys_timerfd_create, sys_eventfd, sys_fallocate 82/*310*/ .long sys_utimensat, sys_signalfd, sys_timerfd_create, sys_eventfd, sys_fallocate
83/*315*/ .long sys_timerfd_settime, sys_timerfd_gettime, sys_signalfd4, sys_eventfd2, sys_epoll_create1 83/*315*/ .long sys_timerfd_settime, sys_timerfd_gettime, sys_signalfd4, sys_eventfd2, sys_epoll_create1
84/*320*/ .long sys_dup3, sys_pipe2, sys_inotify_init1, sys_accept4 84/*320*/ .long sys_dup3, sys_pipe2, sys_inotify_init1, sys_accept4, sys_preadv, sys_pwritev
diff --git a/arch/sparc/kernel/systbls_64.S b/arch/sparc/kernel/systbls_64.S
index a8000b1cda74..82b5bf85b9d2 100644
--- a/arch/sparc/kernel/systbls_64.S
+++ b/arch/sparc/kernel/systbls_64.S
@@ -82,7 +82,7 @@ sys_call_table32:
82 .word compat_sys_set_mempolicy, compat_sys_kexec_load, compat_sys_move_pages, sys_getcpu, compat_sys_epoll_pwait 82 .word compat_sys_set_mempolicy, compat_sys_kexec_load, compat_sys_move_pages, sys_getcpu, compat_sys_epoll_pwait
83/*310*/ .word compat_sys_utimensat, compat_sys_signalfd, sys_timerfd_create, sys_eventfd, compat_sys_fallocate 83/*310*/ .word compat_sys_utimensat, compat_sys_signalfd, sys_timerfd_create, sys_eventfd, compat_sys_fallocate
84 .word compat_sys_timerfd_settime, compat_sys_timerfd_gettime, compat_sys_signalfd4, sys_eventfd2, sys_epoll_create1 84 .word compat_sys_timerfd_settime, compat_sys_timerfd_gettime, compat_sys_signalfd4, sys_eventfd2, sys_epoll_create1
85/*320*/ .word sys_dup3, sys_pipe2, sys_inotify_init1, sys_accept4 85/*320*/ .word sys_dup3, sys_pipe2, sys_inotify_init1, sys_accept4, compat_sys_preadv, compat_sys_pwritev
86 86
87#endif /* CONFIG_COMPAT */ 87#endif /* CONFIG_COMPAT */
88 88
@@ -156,4 +156,4 @@ sys_call_table:
156 .word sys_set_mempolicy, sys_kexec_load, sys_move_pages, sys_getcpu, sys_epoll_pwait 156 .word sys_set_mempolicy, sys_kexec_load, sys_move_pages, sys_getcpu, sys_epoll_pwait
157/*310*/ .word sys_utimensat, sys_signalfd, sys_timerfd_create, sys_eventfd, sys_fallocate 157/*310*/ .word sys_utimensat, sys_signalfd, sys_timerfd_create, sys_eventfd, sys_fallocate
158 .word sys_timerfd_settime, sys_timerfd_gettime, sys_signalfd4, sys_eventfd2, sys_epoll_create1 158 .word sys_timerfd_settime, sys_timerfd_gettime, sys_signalfd4, sys_eventfd2, sys_epoll_create1
159/*320*/ .word sys_dup3, sys_pipe2, sys_inotify_init1, sys_accept4 159/*320*/ .word sys_dup3, sys_pipe2, sys_inotify_init1, sys_accept4, sys_preadv, sys_pwritev
diff --git a/arch/sparc/mm/init_64.c b/arch/sparc/mm/init_64.c
index 2c8dfeb7ab04..f26a352c08a0 100644
--- a/arch/sparc/mm/init_64.c
+++ b/arch/sparc/mm/init_64.c
@@ -70,8 +70,8 @@ extern struct tsb swapper_4m_tsb[KERNEL_TSB4M_NENTRIES];
70 70
71#define MAX_BANKS 32 71#define MAX_BANKS 32
72 72
73static struct linux_prom64_registers pavail[MAX_BANKS] __initdata; 73static struct linux_prom64_registers pavail[MAX_BANKS] __devinitdata;
74static int pavail_ents __initdata; 74static int pavail_ents __devinitdata;
75 75
76static int cmp_p64(const void *a, const void *b) 76static int cmp_p64(const void *a, const void *b)
77{ 77{
@@ -968,7 +968,7 @@ int of_node_to_nid(struct device_node *dp)
968 return nid; 968 return nid;
969} 969}
970 970
971static void add_node_ranges(void) 971static void __init add_node_ranges(void)
972{ 972{
973 int i; 973 int i;
974 974
@@ -1841,7 +1841,7 @@ void __init paging_init(void)
1841 printk("Booting Linux...\n"); 1841 printk("Booting Linux...\n");
1842} 1842}
1843 1843
1844int __init page_in_phys_avail(unsigned long paddr) 1844int __devinit page_in_phys_avail(unsigned long paddr)
1845{ 1845{
1846 int i; 1846 int i;
1847 1847
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index bc25b9f5e4cd..c9086e6307a5 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -353,6 +353,7 @@ config X86_UV
353 bool "SGI Ultraviolet" 353 bool "SGI Ultraviolet"
354 depends on X86_64 354 depends on X86_64
355 depends on X86_EXTENDED_PLATFORM 355 depends on X86_EXTENDED_PLATFORM
356 depends on NUMA
356 select X86_X2APIC 357 select X86_X2APIC
357 ---help--- 358 ---help---
358 This option is needed in order to support SGI Ultraviolet systems. 359 This option is needed in order to support SGI Ultraviolet systems.
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 0beba0d1468d..bb83b1c397aa 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -154,6 +154,7 @@
154 * CPUID levels like 0x6, 0xA etc 154 * CPUID levels like 0x6, 0xA etc
155 */ 155 */
156#define X86_FEATURE_IDA (7*32+ 0) /* Intel Dynamic Acceleration */ 156#define X86_FEATURE_IDA (7*32+ 0) /* Intel Dynamic Acceleration */
157#define X86_FEATURE_ARAT (7*32+ 1) /* Always Running APIC Timer */
157 158
158/* Virtualization flags: Linux defined */ 159/* Virtualization flags: Linux defined */
159#define X86_FEATURE_TPR_SHADOW (8*32+ 0) /* Intel TPR Shadow */ 160#define X86_FEATURE_TPR_SHADOW (8*32+ 0) /* Intel TPR Shadow */
diff --git a/arch/x86/include/asm/fixmap.h b/arch/x86/include/asm/fixmap.h
index 81937a5dc77c..2d81af3974a0 100644
--- a/arch/x86/include/asm/fixmap.h
+++ b/arch/x86/include/asm/fixmap.h
@@ -151,11 +151,11 @@ extern pte_t *pkmap_page_table;
151 151
152void __native_set_fixmap(enum fixed_addresses idx, pte_t pte); 152void __native_set_fixmap(enum fixed_addresses idx, pte_t pte);
153void native_set_fixmap(enum fixed_addresses idx, 153void native_set_fixmap(enum fixed_addresses idx,
154 unsigned long phys, pgprot_t flags); 154 phys_addr_t phys, pgprot_t flags);
155 155
156#ifndef CONFIG_PARAVIRT 156#ifndef CONFIG_PARAVIRT
157static inline void __set_fixmap(enum fixed_addresses idx, 157static inline void __set_fixmap(enum fixed_addresses idx,
158 unsigned long phys, pgprot_t flags) 158 phys_addr_t phys, pgprot_t flags)
159{ 159{
160 native_set_fixmap(idx, phys, flags); 160 native_set_fixmap(idx, phys, flags);
161} 161}
diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h
index e5383e3d2f8c..73739322b6d0 100644
--- a/arch/x86/include/asm/io.h
+++ b/arch/x86/include/asm/io.h
@@ -193,8 +193,10 @@ extern void __iomem *ioremap_wc(resource_size_t offset, unsigned long size);
193 */ 193 */
194extern void early_ioremap_init(void); 194extern void early_ioremap_init(void);
195extern void early_ioremap_reset(void); 195extern void early_ioremap_reset(void);
196extern void __iomem *early_ioremap(unsigned long offset, unsigned long size); 196extern void __iomem *early_ioremap(resource_size_t phys_addr,
197extern void __iomem *early_memremap(unsigned long offset, unsigned long size); 197 unsigned long size);
198extern void __iomem *early_memremap(resource_size_t phys_addr,
199 unsigned long size);
198extern void early_iounmap(void __iomem *addr, unsigned long size); 200extern void early_iounmap(void __iomem *addr, unsigned long size);
199 201
200#define IO_SPACE_LIMIT 0xffff 202#define IO_SPACE_LIMIT 0xffff
diff --git a/arch/x86/include/asm/lguest_hcall.h b/arch/x86/include/asm/lguest_hcall.h
index 0f4ee7148afe..faae1996487b 100644
--- a/arch/x86/include/asm/lguest_hcall.h
+++ b/arch/x86/include/asm/lguest_hcall.h
@@ -5,7 +5,6 @@
5#define LHCALL_FLUSH_ASYNC 0 5#define LHCALL_FLUSH_ASYNC 0
6#define LHCALL_LGUEST_INIT 1 6#define LHCALL_LGUEST_INIT 1
7#define LHCALL_SHUTDOWN 2 7#define LHCALL_SHUTDOWN 2
8#define LHCALL_LOAD_GDT 3
9#define LHCALL_NEW_PGTABLE 4 8#define LHCALL_NEW_PGTABLE 4
10#define LHCALL_FLUSH_TLB 5 9#define LHCALL_FLUSH_TLB 5
11#define LHCALL_LOAD_IDT_ENTRY 6 10#define LHCALL_LOAD_IDT_ENTRY 6
@@ -17,6 +16,7 @@
17#define LHCALL_SET_PMD 15 16#define LHCALL_SET_PMD 15
18#define LHCALL_LOAD_TLS 16 17#define LHCALL_LOAD_TLS 16
19#define LHCALL_NOTIFY 17 18#define LHCALL_NOTIFY 17
19#define LHCALL_LOAD_GDT_ENTRY 18
20 20
21#define LGUEST_TRAP_ENTRY 0x1F 21#define LGUEST_TRAP_ENTRY 0x1F
22 22
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index 7727aa8b7dda..378e3691c08c 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -347,7 +347,7 @@ struct pv_mmu_ops {
347 /* Sometimes the physical address is a pfn, and sometimes its 347 /* Sometimes the physical address is a pfn, and sometimes its
348 an mfn. We can tell which is which from the index. */ 348 an mfn. We can tell which is which from the index. */
349 void (*set_fixmap)(unsigned /* enum fixed_addresses */ idx, 349 void (*set_fixmap)(unsigned /* enum fixed_addresses */ idx,
350 unsigned long phys, pgprot_t flags); 350 phys_addr_t phys, pgprot_t flags);
351}; 351};
352 352
353struct raw_spinlock; 353struct raw_spinlock;
@@ -1432,7 +1432,7 @@ static inline void arch_leave_lazy_mmu_mode(void)
1432void arch_flush_lazy_mmu_mode(void); 1432void arch_flush_lazy_mmu_mode(void);
1433 1433
1434static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx, 1434static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
1435 unsigned long phys, pgprot_t flags) 1435 phys_addr_t phys, pgprot_t flags)
1436{ 1436{
1437 pv_mmu_ops.set_fixmap(idx, phys, flags); 1437 pv_mmu_ops.set_fixmap(idx, phys, flags);
1438} 1438}
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 34c52370f2fe..fcf4d92e7e04 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -352,6 +352,11 @@ struct i387_soft_struct {
352 u32 entry_eip; 352 u32 entry_eip;
353}; 353};
354 354
355struct ymmh_struct {
356 /* 16 * 16 bytes for each YMMH-reg = 256 bytes */
357 u32 ymmh_space[64];
358};
359
355struct xsave_hdr_struct { 360struct xsave_hdr_struct {
356 u64 xstate_bv; 361 u64 xstate_bv;
357 u64 reserved1[2]; 362 u64 reserved1[2];
@@ -361,6 +366,7 @@ struct xsave_hdr_struct {
361struct xsave_struct { 366struct xsave_struct {
362 struct i387_fxsave_struct i387; 367 struct i387_fxsave_struct i387;
363 struct xsave_hdr_struct xsave_hdr; 368 struct xsave_hdr_struct xsave_hdr;
369 struct ymmh_struct ymmh;
364 /* new processor state extensions will go here */ 370 /* new processor state extensions will go here */
365} __attribute__ ((packed, aligned (64))); 371} __attribute__ ((packed, aligned (64)));
366 372
diff --git a/arch/x86/include/asm/required-features.h b/arch/x86/include/asm/required-features.h
index d5cd6c586881..a4737dddfd58 100644
--- a/arch/x86/include/asm/required-features.h
+++ b/arch/x86/include/asm/required-features.h
@@ -50,7 +50,7 @@
50#ifdef CONFIG_X86_64 50#ifdef CONFIG_X86_64
51#define NEED_PSE 0 51#define NEED_PSE 0
52#define NEED_MSR (1<<(X86_FEATURE_MSR & 31)) 52#define NEED_MSR (1<<(X86_FEATURE_MSR & 31))
53#define NEED_PGE (1<<(X86_FEATURE_PGE & 31)) 53#define NEED_PGE 0
54#define NEED_FXSR (1<<(X86_FEATURE_FXSR & 31)) 54#define NEED_FXSR (1<<(X86_FEATURE_FXSR & 31))
55#define NEED_XMM (1<<(X86_FEATURE_XMM & 31)) 55#define NEED_XMM (1<<(X86_FEATURE_XMM & 31))
56#define NEED_XMM2 (1<<(X86_FEATURE_XMM2 & 31)) 56#define NEED_XMM2 (1<<(X86_FEATURE_XMM2 & 31))
diff --git a/arch/x86/include/asm/sigcontext.h b/arch/x86/include/asm/sigcontext.h
index ec666491aaa4..72e5a4491661 100644
--- a/arch/x86/include/asm/sigcontext.h
+++ b/arch/x86/include/asm/sigcontext.h
@@ -269,6 +269,11 @@ struct _xsave_hdr {
269 __u64 reserved2[5]; 269 __u64 reserved2[5];
270}; 270};
271 271
272struct _ymmh_state {
273 /* 16 * 16 bytes for each YMMH-reg */
274 __u32 ymmh_space[64];
275};
276
272/* 277/*
273 * Extended state pointed by the fpstate pointer in the sigcontext. 278 * Extended state pointed by the fpstate pointer in the sigcontext.
274 * In addition to the fpstate, information encoded in the xstate_hdr 279 * In addition to the fpstate, information encoded in the xstate_hdr
@@ -278,6 +283,7 @@ struct _xsave_hdr {
278struct _xstate { 283struct _xstate {
279 struct _fpstate fpstate; 284 struct _fpstate fpstate;
280 struct _xsave_hdr xstate_hdr; 285 struct _xsave_hdr xstate_hdr;
286 struct _ymmh_state ymmh;
281 /* new processor state extensions go here */ 287 /* new processor state extensions go here */
282}; 288};
283 289
diff --git a/arch/x86/include/asm/uv/uv_mmrs.h b/arch/x86/include/asm/uv/uv_mmrs.h
index db68ac8a5ac2..2cae46c7c8a2 100644
--- a/arch/x86/include/asm/uv/uv_mmrs.h
+++ b/arch/x86/include/asm/uv/uv_mmrs.h
@@ -17,6 +17,11 @@
17/* ========================================================================= */ 17/* ========================================================================= */
18/* UVH_BAU_DATA_CONFIG */ 18/* UVH_BAU_DATA_CONFIG */
19/* ========================================================================= */ 19/* ========================================================================= */
20#define UVH_LB_BAU_MISC_CONTROL 0x320170UL
21#define UV_ENABLE_INTD_SOFT_ACK_MODE_SHIFT 15
22#define UV_INTD_SOFT_ACK_TIMEOUT_PERIOD_SHIFT 16
23#define UV_INTD_SOFT_ACK_TIMEOUT_PERIOD 0x000000000bUL
24/* 1011 timebase 7 (168millisec) * 3 ticks -> 500ms */
20#define UVH_BAU_DATA_CONFIG 0x61680UL 25#define UVH_BAU_DATA_CONFIG 0x61680UL
21#define UVH_BAU_DATA_CONFIG_32 0x0438 26#define UVH_BAU_DATA_CONFIG_32 0x0438
22 27
diff --git a/arch/x86/include/asm/xen/page.h b/arch/x86/include/asm/xen/page.h
index 1a918dde46b5..018a0a400799 100644
--- a/arch/x86/include/asm/xen/page.h
+++ b/arch/x86/include/asm/xen/page.h
@@ -124,7 +124,8 @@ static inline unsigned long mfn_to_local_pfn(unsigned long mfn)
124 124
125/* VIRT <-> MACHINE conversion */ 125/* VIRT <-> MACHINE conversion */
126#define virt_to_machine(v) (phys_to_machine(XPADDR(__pa(v)))) 126#define virt_to_machine(v) (phys_to_machine(XPADDR(__pa(v))))
127#define virt_to_mfn(v) (pfn_to_mfn(PFN_DOWN(__pa(v)))) 127#define virt_to_pfn(v) (PFN_DOWN(__pa(v)))
128#define virt_to_mfn(v) (pfn_to_mfn(virt_to_pfn(v)))
128#define mfn_to_virt(m) (__va(mfn_to_pfn(m) << PAGE_SHIFT)) 129#define mfn_to_virt(m) (__va(mfn_to_pfn(m) << PAGE_SHIFT))
129 130
130static inline unsigned long pte_mfn(pte_t pte) 131static inline unsigned long pte_mfn(pte_t pte)
diff --git a/arch/x86/include/asm/xsave.h b/arch/x86/include/asm/xsave.h
index 08e9a1ac07a9..727acc152344 100644
--- a/arch/x86/include/asm/xsave.h
+++ b/arch/x86/include/asm/xsave.h
@@ -7,6 +7,7 @@
7 7
8#define XSTATE_FP 0x1 8#define XSTATE_FP 0x1
9#define XSTATE_SSE 0x2 9#define XSTATE_SSE 0x2
10#define XSTATE_YMM 0x4
10 11
11#define XSTATE_FPSSE (XSTATE_FP | XSTATE_SSE) 12#define XSTATE_FPSSE (XSTATE_FP | XSTATE_SSE)
12 13
@@ -15,7 +16,7 @@
15/* 16/*
16 * These are the features that the OS can handle currently. 17 * These are the features that the OS can handle currently.
17 */ 18 */
18#define XCNTXT_MASK (XSTATE_FP | XSTATE_SSE) 19#define XCNTXT_MASK (XSTATE_FP | XSTATE_SSE | XSTATE_YMM)
19 20
20#ifdef CONFIG_X86_64 21#ifdef CONFIG_X86_64
21#define REX_PREFIX "0x48, " 22#define REX_PREFIX "0x48, "
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 098ec84b8c00..f2870920f246 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -431,6 +431,12 @@ static void __cpuinit setup_APIC_timer(void)
431{ 431{
432 struct clock_event_device *levt = &__get_cpu_var(lapic_events); 432 struct clock_event_device *levt = &__get_cpu_var(lapic_events);
433 433
434 if (cpu_has(&current_cpu_data, X86_FEATURE_ARAT)) {
435 lapic_clockevent.features &= ~CLOCK_EVT_FEAT_C3STOP;
436 /* Make LAPIC timer preferrable over percpu HPET */
437 lapic_clockevent.rating = 150;
438 }
439
434 memcpy(levt, &lapic_clockevent, sizeof(*levt)); 440 memcpy(levt, &lapic_clockevent, sizeof(*levt));
435 levt->cpumask = cpumask_of(smp_processor_id()); 441 levt->cpumask = cpumask_of(smp_processor_id());
436 442
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c
index 49d2f5c739b7..d6712334ce4b 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -563,7 +563,8 @@ void __init uv_system_init(void)
563 unsigned long gnode_upper, lowmem_redir_base, lowmem_redir_size; 563 unsigned long gnode_upper, lowmem_redir_base, lowmem_redir_size;
564 int bytes, nid, cpu, lcpu, pnode, blade, i, j, m_val, n_val; 564 int bytes, nid, cpu, lcpu, pnode, blade, i, j, m_val, n_val;
565 int max_pnode = 0; 565 int max_pnode = 0;
566 unsigned long mmr_base, present; 566 unsigned long mmr_base, present, paddr;
567 unsigned short pnode_mask;
567 568
568 map_low_mmrs(); 569 map_low_mmrs();
569 570
@@ -606,6 +607,7 @@ void __init uv_system_init(void)
606 } 607 }
607 } 608 }
608 609
610 pnode_mask = (1 << n_val) - 1;
609 node_id.v = uv_read_local_mmr(UVH_NODE_ID); 611 node_id.v = uv_read_local_mmr(UVH_NODE_ID);
610 gnode_upper = (((unsigned long)node_id.s.node_id) & 612 gnode_upper = (((unsigned long)node_id.s.node_id) &
611 ~((1 << n_val) - 1)) << m_val; 613 ~((1 << n_val) - 1)) << m_val;
@@ -629,7 +631,7 @@ void __init uv_system_init(void)
629 uv_cpu_hub_info(cpu)->numa_blade_id = blade; 631 uv_cpu_hub_info(cpu)->numa_blade_id = blade;
630 uv_cpu_hub_info(cpu)->blade_processor_id = lcpu; 632 uv_cpu_hub_info(cpu)->blade_processor_id = lcpu;
631 uv_cpu_hub_info(cpu)->pnode = pnode; 633 uv_cpu_hub_info(cpu)->pnode = pnode;
632 uv_cpu_hub_info(cpu)->pnode_mask = (1 << n_val) - 1; 634 uv_cpu_hub_info(cpu)->pnode_mask = pnode_mask;
633 uv_cpu_hub_info(cpu)->gpa_mask = (1 << (m_val + n_val)) - 1; 635 uv_cpu_hub_info(cpu)->gpa_mask = (1 << (m_val + n_val)) - 1;
634 uv_cpu_hub_info(cpu)->gnode_upper = gnode_upper; 636 uv_cpu_hub_info(cpu)->gnode_upper = gnode_upper;
635 uv_cpu_hub_info(cpu)->global_mmr_base = mmr_base; 637 uv_cpu_hub_info(cpu)->global_mmr_base = mmr_base;
@@ -645,6 +647,16 @@ void __init uv_system_init(void)
645 lcpu, blade); 647 lcpu, blade);
646 } 648 }
647 649
650 /* Add blade/pnode info for nodes without cpus */
651 for_each_online_node(nid) {
652 if (uv_node_to_blade[nid] >= 0)
653 continue;
654 paddr = node_start_pfn(nid) << PAGE_SHIFT;
655 pnode = (paddr >> m_val) & pnode_mask;
656 blade = boot_pnode_to_blade(pnode);
657 uv_node_to_blade[nid] = blade;
658 }
659
648 map_gru_high(max_pnode); 660 map_gru_high(max_pnode);
649 map_mmr_high(max_pnode); 661 map_mmr_high(max_pnode);
650 map_config_high(max_pnode); 662 map_config_high(max_pnode);
diff --git a/arch/x86/kernel/bios_uv.c b/arch/x86/kernel/bios_uv.c
index f63882728d91..63a88e1f987d 100644
--- a/arch/x86/kernel/bios_uv.c
+++ b/arch/x86/kernel/bios_uv.c
@@ -182,7 +182,8 @@ void uv_bios_init(void)
182 memcpy(&uv_systab, tab, sizeof(struct uv_systab)); 182 memcpy(&uv_systab, tab, sizeof(struct uv_systab));
183 iounmap(tab); 183 iounmap(tab);
184 184
185 printk(KERN_INFO "EFI UV System Table Revision %d\n", tab->revision); 185 printk(KERN_INFO "EFI UV System Table Revision %d\n",
186 uv_systab.revision);
186} 187}
187#else /* !CONFIG_EFI */ 188#else /* !CONFIG_EFI */
188 189
diff --git a/arch/x86/kernel/cpu/addon_cpuid_features.c b/arch/x86/kernel/cpu/addon_cpuid_features.c
index 8220ae69849d..c965e5212714 100644
--- a/arch/x86/kernel/cpu/addon_cpuid_features.c
+++ b/arch/x86/kernel/cpu/addon_cpuid_features.c
@@ -31,6 +31,7 @@ void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c)
31 31
32 static const struct cpuid_bit __cpuinitconst cpuid_bits[] = { 32 static const struct cpuid_bit __cpuinitconst cpuid_bits[] = {
33 { X86_FEATURE_IDA, CR_EAX, 1, 0x00000006 }, 33 { X86_FEATURE_IDA, CR_EAX, 1, 0x00000006 },
34 { X86_FEATURE_ARAT, CR_EAX, 2, 0x00000006 },
34 { 0, 0, 0, 0 } 35 { 0, 0, 0, 0 }
35 }; 36 };
36 37
diff --git a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
index 19f6b9d27e83..ecdb682ab516 100644
--- a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
+++ b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
@@ -68,6 +68,7 @@ struct acpi_cpufreq_data {
68 unsigned int max_freq; 68 unsigned int max_freq;
69 unsigned int resume; 69 unsigned int resume;
70 unsigned int cpu_feature; 70 unsigned int cpu_feature;
71 u64 saved_aperf, saved_mperf;
71}; 72};
72 73
73static DEFINE_PER_CPU(struct acpi_cpufreq_data *, drv_data); 74static DEFINE_PER_CPU(struct acpi_cpufreq_data *, drv_data);
@@ -152,7 +153,8 @@ struct drv_cmd {
152 u32 val; 153 u32 val;
153}; 154};
154 155
155static long do_drv_read(void *_cmd) 156/* Called via smp_call_function_single(), on the target CPU */
157static void do_drv_read(void *_cmd)
156{ 158{
157 struct drv_cmd *cmd = _cmd; 159 struct drv_cmd *cmd = _cmd;
158 u32 h; 160 u32 h;
@@ -169,10 +171,10 @@ static long do_drv_read(void *_cmd)
169 default: 171 default:
170 break; 172 break;
171 } 173 }
172 return 0;
173} 174}
174 175
175static long do_drv_write(void *_cmd) 176/* Called via smp_call_function_many(), on the target CPUs */
177static void do_drv_write(void *_cmd)
176{ 178{
177 struct drv_cmd *cmd = _cmd; 179 struct drv_cmd *cmd = _cmd;
178 u32 lo, hi; 180 u32 lo, hi;
@@ -191,23 +193,24 @@ static long do_drv_write(void *_cmd)
191 default: 193 default:
192 break; 194 break;
193 } 195 }
194 return 0;
195} 196}
196 197
197static void drv_read(struct drv_cmd *cmd) 198static void drv_read(struct drv_cmd *cmd)
198{ 199{
199 cmd->val = 0; 200 cmd->val = 0;
200 201
201 work_on_cpu(cpumask_any(cmd->mask), do_drv_read, cmd); 202 smp_call_function_single(cpumask_any(cmd->mask), do_drv_read, cmd, 1);
202} 203}
203 204
204static void drv_write(struct drv_cmd *cmd) 205static void drv_write(struct drv_cmd *cmd)
205{ 206{
206 unsigned int i; 207 int this_cpu;
207 208
208 for_each_cpu(i, cmd->mask) { 209 this_cpu = get_cpu();
209 work_on_cpu(i, do_drv_write, cmd); 210 if (cpumask_test_cpu(this_cpu, cmd->mask))
210 } 211 do_drv_write(cmd);
212 smp_call_function_many(cmd->mask, do_drv_write, cmd, 1);
213 put_cpu();
211} 214}
212 215
213static u32 get_cur_val(const struct cpumask *mask) 216static u32 get_cur_val(const struct cpumask *mask)
@@ -241,28 +244,23 @@ static u32 get_cur_val(const struct cpumask *mask)
241 return cmd.val; 244 return cmd.val;
242} 245}
243 246
244struct perf_cur { 247struct perf_pair {
245 union { 248 union {
246 struct { 249 struct {
247 u32 lo; 250 u32 lo;
248 u32 hi; 251 u32 hi;
249 } split; 252 } split;
250 u64 whole; 253 u64 whole;
251 } aperf_cur, mperf_cur; 254 } aperf, mperf;
252}; 255};
253 256
254 257/* Called via smp_call_function_single(), on the target CPU */
255static long read_measured_perf_ctrs(void *_cur) 258static void read_measured_perf_ctrs(void *_cur)
256{ 259{
257 struct perf_cur *cur = _cur; 260 struct perf_pair *cur = _cur;
258 261
259 rdmsr(MSR_IA32_APERF, cur->aperf_cur.split.lo, cur->aperf_cur.split.hi); 262 rdmsr(MSR_IA32_APERF, cur->aperf.split.lo, cur->aperf.split.hi);
260 rdmsr(MSR_IA32_MPERF, cur->mperf_cur.split.lo, cur->mperf_cur.split.hi); 263 rdmsr(MSR_IA32_MPERF, cur->mperf.split.lo, cur->mperf.split.hi);
261
262 wrmsr(MSR_IA32_APERF, 0, 0);
263 wrmsr(MSR_IA32_MPERF, 0, 0);
264
265 return 0;
266} 264}
267 265
268/* 266/*
@@ -281,52 +279,57 @@ static long read_measured_perf_ctrs(void *_cur)
281static unsigned int get_measured_perf(struct cpufreq_policy *policy, 279static unsigned int get_measured_perf(struct cpufreq_policy *policy,
282 unsigned int cpu) 280 unsigned int cpu)
283{ 281{
284 struct perf_cur cur; 282 struct perf_pair readin, cur;
285 unsigned int perf_percent; 283 unsigned int perf_percent;
286 unsigned int retval; 284 unsigned int retval;
287 285
288 if (!work_on_cpu(cpu, read_measured_perf_ctrs, &cur)) 286 if (smp_call_function_single(cpu, read_measured_perf_ctrs, &readin, 1))
289 return 0; 287 return 0;
290 288
289 cur.aperf.whole = readin.aperf.whole -
290 per_cpu(drv_data, cpu)->saved_aperf;
291 cur.mperf.whole = readin.mperf.whole -
292 per_cpu(drv_data, cpu)->saved_mperf;
293 per_cpu(drv_data, cpu)->saved_aperf = readin.aperf.whole;
294 per_cpu(drv_data, cpu)->saved_mperf = readin.mperf.whole;
295
291#ifdef __i386__ 296#ifdef __i386__
292 /* 297 /*
293 * We dont want to do 64 bit divide with 32 bit kernel 298 * We dont want to do 64 bit divide with 32 bit kernel
294 * Get an approximate value. Return failure in case we cannot get 299 * Get an approximate value. Return failure in case we cannot get
295 * an approximate value. 300 * an approximate value.
296 */ 301 */
297 if (unlikely(cur.aperf_cur.split.hi || cur.mperf_cur.split.hi)) { 302 if (unlikely(cur.aperf.split.hi || cur.mperf.split.hi)) {
298 int shift_count; 303 int shift_count;
299 u32 h; 304 u32 h;
300 305
301 h = max_t(u32, cur.aperf_cur.split.hi, cur.mperf_cur.split.hi); 306 h = max_t(u32, cur.aperf.split.hi, cur.mperf.split.hi);
302 shift_count = fls(h); 307 shift_count = fls(h);
303 308
304 cur.aperf_cur.whole >>= shift_count; 309 cur.aperf.whole >>= shift_count;
305 cur.mperf_cur.whole >>= shift_count; 310 cur.mperf.whole >>= shift_count;
306 } 311 }
307 312
308 if (((unsigned long)(-1) / 100) < cur.aperf_cur.split.lo) { 313 if (((unsigned long)(-1) / 100) < cur.aperf.split.lo) {
309 int shift_count = 7; 314 int shift_count = 7;
310 cur.aperf_cur.split.lo >>= shift_count; 315 cur.aperf.split.lo >>= shift_count;
311 cur.mperf_cur.split.lo >>= shift_count; 316 cur.mperf.split.lo >>= shift_count;
312 } 317 }
313 318
314 if (cur.aperf_cur.split.lo && cur.mperf_cur.split.lo) 319 if (cur.aperf.split.lo && cur.mperf.split.lo)
315 perf_percent = (cur.aperf_cur.split.lo * 100) / 320 perf_percent = (cur.aperf.split.lo * 100) / cur.mperf.split.lo;
316 cur.mperf_cur.split.lo;
317 else 321 else
318 perf_percent = 0; 322 perf_percent = 0;
319 323
320#else 324#else
321 if (unlikely(((unsigned long)(-1) / 100) < cur.aperf_cur.whole)) { 325 if (unlikely(((unsigned long)(-1) / 100) < cur.aperf.whole)) {
322 int shift_count = 7; 326 int shift_count = 7;
323 cur.aperf_cur.whole >>= shift_count; 327 cur.aperf.whole >>= shift_count;
324 cur.mperf_cur.whole >>= shift_count; 328 cur.mperf.whole >>= shift_count;
325 } 329 }
326 330
327 if (cur.aperf_cur.whole && cur.mperf_cur.whole) 331 if (cur.aperf.whole && cur.mperf.whole)
328 perf_percent = (cur.aperf_cur.whole * 100) / 332 perf_percent = (cur.aperf.whole * 100) / cur.mperf.whole;
329 cur.mperf_cur.whole;
330 else 333 else
331 perf_percent = 0; 334 perf_percent = 0;
332 335
diff --git a/arch/x86/kernel/cpu/cpufreq/longhaul.c b/arch/x86/kernel/cpu/cpufreq/longhaul.c
index 0bd48e65a0ca..ce2ed3e4aad9 100644
--- a/arch/x86/kernel/cpu/cpufreq/longhaul.c
+++ b/arch/x86/kernel/cpu/cpufreq/longhaul.c
@@ -33,7 +33,6 @@
33#include <linux/timex.h> 33#include <linux/timex.h>
34#include <linux/io.h> 34#include <linux/io.h>
35#include <linux/acpi.h> 35#include <linux/acpi.h>
36#include <linux/kernel.h>
37 36
38#include <asm/msr.h> 37#include <asm/msr.h>
39#include <acpi/processor.h> 38#include <acpi/processor.h>
diff --git a/arch/x86/kernel/ftrace.c b/arch/x86/kernel/ftrace.c
index 70a10ca100f6..18dfa30795c9 100644
--- a/arch/x86/kernel/ftrace.c
+++ b/arch/x86/kernel/ftrace.c
@@ -18,6 +18,8 @@
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/list.h> 19#include <linux/list.h>
20 20
21#include <trace/syscall.h>
22
21#include <asm/cacheflush.h> 23#include <asm/cacheflush.h>
22#include <asm/ftrace.h> 24#include <asm/ftrace.h>
23#include <asm/nops.h> 25#include <asm/nops.h>
diff --git a/arch/x86/kernel/microcode_core.c b/arch/x86/kernel/microcode_core.c
index 4d420de9ac61..98c470c069d1 100644
--- a/arch/x86/kernel/microcode_core.c
+++ b/arch/x86/kernel/microcode_core.c
@@ -108,40 +108,29 @@ struct ucode_cpu_info ucode_cpu_info[NR_CPUS];
108EXPORT_SYMBOL_GPL(ucode_cpu_info); 108EXPORT_SYMBOL_GPL(ucode_cpu_info);
109 109
110#ifdef CONFIG_MICROCODE_OLD_INTERFACE 110#ifdef CONFIG_MICROCODE_OLD_INTERFACE
111struct update_for_cpu {
112 const void __user *buf;
113 size_t size;
114};
115
116static long update_for_cpu(void *_ufc)
117{
118 struct update_for_cpu *ufc = _ufc;
119 int error;
120
121 error = microcode_ops->request_microcode_user(smp_processor_id(),
122 ufc->buf, ufc->size);
123 if (error < 0)
124 return error;
125 if (!error)
126 microcode_ops->apply_microcode(smp_processor_id());
127 return error;
128}
129
130static int do_microcode_update(const void __user *buf, size_t size) 111static int do_microcode_update(const void __user *buf, size_t size)
131{ 112{
113 cpumask_t old;
132 int error = 0; 114 int error = 0;
133 int cpu; 115 int cpu;
134 struct update_for_cpu ufc = { .buf = buf, .size = size }; 116
117 old = current->cpus_allowed;
135 118
136 for_each_online_cpu(cpu) { 119 for_each_online_cpu(cpu) {
137 struct ucode_cpu_info *uci = ucode_cpu_info + cpu; 120 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
138 121
139 if (!uci->valid) 122 if (!uci->valid)
140 continue; 123 continue;
141 error = work_on_cpu(cpu, update_for_cpu, &ufc); 124
125 set_cpus_allowed_ptr(current, &cpumask_of_cpu(cpu));
126 error = microcode_ops->request_microcode_user(cpu, buf, size);
142 if (error < 0) 127 if (error < 0)
143 break; 128 goto out;
129 if (!error)
130 microcode_ops->apply_microcode(cpu);
144 } 131 }
132out:
133 set_cpus_allowed_ptr(current, &old);
145 return error; 134 return error;
146} 135}
147 136
diff --git a/arch/x86/kernel/mpparse.c b/arch/x86/kernel/mpparse.c
index dce99dca6cf8..70fd7e414c15 100644
--- a/arch/x86/kernel/mpparse.c
+++ b/arch/x86/kernel/mpparse.c
@@ -679,7 +679,7 @@ void __init get_smp_config(void)
679 __get_smp_config(0); 679 __get_smp_config(0);
680} 680}
681 681
682static void smp_reserve_bootmem(struct mpf_intel *mpf) 682static void __init smp_reserve_bootmem(struct mpf_intel *mpf)
683{ 683{
684 unsigned long size = get_mpc_size(mpf->physptr); 684 unsigned long size = get_mpc_size(mpf->physptr);
685#ifdef CONFIG_X86_32 685#ifdef CONFIG_X86_32
@@ -838,7 +838,7 @@ static int __init get_MP_intsrc_index(struct mpc_intsrc *m)
838 838
839static struct mpc_intsrc __initdata *m_spare[SPARE_SLOT_NUM]; 839static struct mpc_intsrc __initdata *m_spare[SPARE_SLOT_NUM];
840 840
841static void check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) 841static void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare)
842{ 842{
843 int i; 843 int i;
844 844
@@ -866,7 +866,8 @@ static void check_irq_src(struct mpc_intsrc *m, int *nr_m_spare)
866 } 866 }
867} 867}
868#else /* CONFIG_X86_IO_APIC */ 868#else /* CONFIG_X86_IO_APIC */
869static inline void check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) {} 869static
870inline void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) {}
870#endif /* CONFIG_X86_IO_APIC */ 871#endif /* CONFIG_X86_IO_APIC */
871 872
872static int check_slot(unsigned long mpc_new_phys, unsigned long mpc_new_length, 873static int check_slot(unsigned long mpc_new_phys, unsigned long mpc_new_length,
diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c
index fe9345c967de..23b7c8f017e2 100644
--- a/arch/x86/kernel/ptrace.c
+++ b/arch/x86/kernel/ptrace.c
@@ -21,7 +21,6 @@
21#include <linux/audit.h> 21#include <linux/audit.h>
22#include <linux/seccomp.h> 22#include <linux/seccomp.h>
23#include <linux/signal.h> 23#include <linux/signal.h>
24#include <linux/ftrace.h>
25 24
26#include <asm/uaccess.h> 25#include <asm/uaccess.h>
27#include <asm/pgtable.h> 26#include <asm/pgtable.h>
@@ -35,6 +34,8 @@
35#include <asm/proto.h> 34#include <asm/proto.h>
36#include <asm/ds.h> 35#include <asm/ds.h>
37 36
37#include <trace/syscall.h>
38
38#include "tls.h" 39#include "tls.h"
39 40
40enum x86_regset { 41enum x86_regset {
diff --git a/arch/x86/kernel/tlb_uv.c b/arch/x86/kernel/tlb_uv.c
index deb5ebb32c3b..ed0c33761e6d 100644
--- a/arch/x86/kernel/tlb_uv.c
+++ b/arch/x86/kernel/tlb_uv.c
@@ -25,6 +25,8 @@ static int uv_bau_retry_limit __read_mostly;
25 25
26/* position of pnode (which is nasid>>1): */ 26/* position of pnode (which is nasid>>1): */
27static int uv_nshift __read_mostly; 27static int uv_nshift __read_mostly;
28/* base pnode in this partition */
29static int uv_partition_base_pnode __read_mostly;
28 30
29static unsigned long uv_mmask __read_mostly; 31static unsigned long uv_mmask __read_mostly;
30 32
@@ -32,6 +34,34 @@ static DEFINE_PER_CPU(struct ptc_stats, ptcstats);
32static DEFINE_PER_CPU(struct bau_control, bau_control); 34static DEFINE_PER_CPU(struct bau_control, bau_control);
33 35
34/* 36/*
37 * Determine the first node on a blade.
38 */
39static int __init blade_to_first_node(int blade)
40{
41 int node, b;
42
43 for_each_online_node(node) {
44 b = uv_node_to_blade_id(node);
45 if (blade == b)
46 return node;
47 }
48 return -1; /* shouldn't happen */
49}
50
51/*
52 * Determine the apicid of the first cpu on a blade.
53 */
54static int __init blade_to_first_apicid(int blade)
55{
56 int cpu;
57
58 for_each_present_cpu(cpu)
59 if (blade == uv_cpu_to_blade_id(cpu))
60 return per_cpu(x86_cpu_to_apicid, cpu);
61 return -1;
62}
63
64/*
35 * Free a software acknowledge hardware resource by clearing its Pending 65 * Free a software acknowledge hardware resource by clearing its Pending
36 * bit. This will return a reply to the sender. 66 * bit. This will return a reply to the sender.
37 * If the message has timed out, a reply has already been sent by the 67 * If the message has timed out, a reply has already been sent by the
@@ -67,7 +97,7 @@ static void uv_bau_process_message(struct bau_payload_queue_entry *msg,
67 msp = __get_cpu_var(bau_control).msg_statuses + msg_slot; 97 msp = __get_cpu_var(bau_control).msg_statuses + msg_slot;
68 cpu = uv_blade_processor_id(); 98 cpu = uv_blade_processor_id();
69 msg->number_of_cpus = 99 msg->number_of_cpus =
70 uv_blade_nr_online_cpus(uv_node_to_blade_id(numa_node_id())); 100 uv_blade_nr_online_cpus(uv_node_to_blade_id(numa_node_id()));
71 this_cpu_mask = 1UL << cpu; 101 this_cpu_mask = 1UL << cpu;
72 if (msp->seen_by.bits & this_cpu_mask) 102 if (msp->seen_by.bits & this_cpu_mask)
73 return; 103 return;
@@ -215,14 +245,14 @@ static int uv_wait_completion(struct bau_desc *bau_desc,
215 * Returns @flush_mask if some remote flushing remains to be done. The 245 * Returns @flush_mask if some remote flushing remains to be done. The
216 * mask will have some bits still set. 246 * mask will have some bits still set.
217 */ 247 */
218const struct cpumask *uv_flush_send_and_wait(int cpu, int this_blade, 248const struct cpumask *uv_flush_send_and_wait(int cpu, int this_pnode,
219 struct bau_desc *bau_desc, 249 struct bau_desc *bau_desc,
220 struct cpumask *flush_mask) 250 struct cpumask *flush_mask)
221{ 251{
222 int completion_status = 0; 252 int completion_status = 0;
223 int right_shift; 253 int right_shift;
224 int tries = 0; 254 int tries = 0;
225 int blade; 255 int pnode;
226 int bit; 256 int bit;
227 unsigned long mmr_offset; 257 unsigned long mmr_offset;
228 unsigned long index; 258 unsigned long index;
@@ -265,8 +295,8 @@ const struct cpumask *uv_flush_send_and_wait(int cpu, int this_blade,
265 * use the IPI method of shootdown on them. 295 * use the IPI method of shootdown on them.
266 */ 296 */
267 for_each_cpu(bit, flush_mask) { 297 for_each_cpu(bit, flush_mask) {
268 blade = uv_cpu_to_blade_id(bit); 298 pnode = uv_cpu_to_pnode(bit);
269 if (blade == this_blade) 299 if (pnode == this_pnode)
270 continue; 300 continue;
271 cpumask_clear_cpu(bit, flush_mask); 301 cpumask_clear_cpu(bit, flush_mask);
272 } 302 }
@@ -309,16 +339,16 @@ const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
309 struct cpumask *flush_mask = __get_cpu_var(uv_flush_tlb_mask); 339 struct cpumask *flush_mask = __get_cpu_var(uv_flush_tlb_mask);
310 int i; 340 int i;
311 int bit; 341 int bit;
312 int blade; 342 int pnode;
313 int uv_cpu; 343 int uv_cpu;
314 int this_blade; 344 int this_pnode;
315 int locals = 0; 345 int locals = 0;
316 struct bau_desc *bau_desc; 346 struct bau_desc *bau_desc;
317 347
318 cpumask_andnot(flush_mask, cpumask, cpumask_of(cpu)); 348 cpumask_andnot(flush_mask, cpumask, cpumask_of(cpu));
319 349
320 uv_cpu = uv_blade_processor_id(); 350 uv_cpu = uv_blade_processor_id();
321 this_blade = uv_numa_blade_id(); 351 this_pnode = uv_hub_info->pnode;
322 bau_desc = __get_cpu_var(bau_control).descriptor_base; 352 bau_desc = __get_cpu_var(bau_control).descriptor_base;
323 bau_desc += UV_ITEMS_PER_DESCRIPTOR * uv_cpu; 353 bau_desc += UV_ITEMS_PER_DESCRIPTOR * uv_cpu;
324 354
@@ -326,13 +356,14 @@ const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
326 356
327 i = 0; 357 i = 0;
328 for_each_cpu(bit, flush_mask) { 358 for_each_cpu(bit, flush_mask) {
329 blade = uv_cpu_to_blade_id(bit); 359 pnode = uv_cpu_to_pnode(bit);
330 BUG_ON(blade > (UV_DISTRIBUTION_SIZE - 1)); 360 BUG_ON(pnode > (UV_DISTRIBUTION_SIZE - 1));
331 if (blade == this_blade) { 361 if (pnode == this_pnode) {
332 locals++; 362 locals++;
333 continue; 363 continue;
334 } 364 }
335 bau_node_set(blade, &bau_desc->distribution); 365 bau_node_set(pnode - uv_partition_base_pnode,
366 &bau_desc->distribution);
336 i++; 367 i++;
337 } 368 }
338 if (i == 0) { 369 if (i == 0) {
@@ -350,7 +381,7 @@ const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
350 bau_desc->payload.address = va; 381 bau_desc->payload.address = va;
351 bau_desc->payload.sending_cpu = cpu; 382 bau_desc->payload.sending_cpu = cpu;
352 383
353 return uv_flush_send_and_wait(uv_cpu, this_blade, bau_desc, flush_mask); 384 return uv_flush_send_and_wait(uv_cpu, this_pnode, bau_desc, flush_mask);
354} 385}
355 386
356/* 387/*
@@ -418,24 +449,58 @@ void uv_bau_message_interrupt(struct pt_regs *regs)
418 set_irq_regs(old_regs); 449 set_irq_regs(old_regs);
419} 450}
420 451
452/*
453 * uv_enable_timeouts
454 *
455 * Each target blade (i.e. blades that have cpu's) needs to have
456 * shootdown message timeouts enabled. The timeout does not cause
457 * an interrupt, but causes an error message to be returned to
458 * the sender.
459 */
421static void uv_enable_timeouts(void) 460static void uv_enable_timeouts(void)
422{ 461{
423 int i;
424 int blade; 462 int blade;
425 int last_blade; 463 int nblades;
426 int pnode; 464 int pnode;
427 int cur_cpu = 0; 465 unsigned long mmr_image;
428 unsigned long apicid;
429 466
430 last_blade = -1; 467 nblades = uv_num_possible_blades();
431 for_each_online_node(i) { 468
432 blade = uv_node_to_blade_id(i); 469 for (blade = 0; blade < nblades; blade++) {
433 if (blade == last_blade) 470 if (!uv_blade_nr_possible_cpus(blade))
434 continue; 471 continue;
435 last_blade = blade; 472
436 apicid = per_cpu(x86_cpu_to_apicid, cur_cpu);
437 pnode = uv_blade_to_pnode(blade); 473 pnode = uv_blade_to_pnode(blade);
438 cur_cpu += uv_blade_nr_possible_cpus(i); 474 mmr_image =
475 uv_read_global_mmr64(pnode, UVH_LB_BAU_MISC_CONTROL);
476 /*
477 * Set the timeout period and then lock it in, in three
478 * steps; captures and locks in the period.
479 *
480 * To program the period, the SOFT_ACK_MODE must be off.
481 */
482 mmr_image &= ~((unsigned long)1 <<
483 UV_ENABLE_INTD_SOFT_ACK_MODE_SHIFT);
484 uv_write_global_mmr64
485 (pnode, UVH_LB_BAU_MISC_CONTROL, mmr_image);
486 /*
487 * Set the 4-bit period.
488 */
489 mmr_image &= ~((unsigned long)0xf <<
490 UV_INTD_SOFT_ACK_TIMEOUT_PERIOD_SHIFT);
491 mmr_image |= (UV_INTD_SOFT_ACK_TIMEOUT_PERIOD <<
492 UV_INTD_SOFT_ACK_TIMEOUT_PERIOD_SHIFT);
493 uv_write_global_mmr64
494 (pnode, UVH_LB_BAU_MISC_CONTROL, mmr_image);
495 /*
496 * Subsequent reversals of the timebase bit (3) cause an
497 * immediate timeout of one or all INTD resources as
498 * indicated in bits 2:0 (7 causes all of them to timeout).
499 */
500 mmr_image |= ((unsigned long)1 <<
501 UV_ENABLE_INTD_SOFT_ACK_MODE_SHIFT);
502 uv_write_global_mmr64
503 (pnode, UVH_LB_BAU_MISC_CONTROL, mmr_image);
439 } 504 }
440} 505}
441 506
@@ -482,8 +547,7 @@ static int uv_ptc_seq_show(struct seq_file *file, void *data)
482 stat->requestee, stat->onetlb, stat->alltlb, 547 stat->requestee, stat->onetlb, stat->alltlb,
483 stat->s_retry, stat->d_retry, stat->ptc_i); 548 stat->s_retry, stat->d_retry, stat->ptc_i);
484 seq_printf(file, "%lx %ld %ld %ld %ld %ld %ld\n", 549 seq_printf(file, "%lx %ld %ld %ld %ld %ld %ld\n",
485 uv_read_global_mmr64(uv_blade_to_pnode 550 uv_read_global_mmr64(uv_cpu_to_pnode(cpu),
486 (uv_cpu_to_blade_id(cpu)),
487 UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE), 551 UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE),
488 stat->sflush, stat->dflush, 552 stat->sflush, stat->dflush,
489 stat->retriesok, stat->nomsg, 553 stat->retriesok, stat->nomsg,
@@ -617,16 +681,18 @@ static struct bau_control * __init uv_table_bases_init(int blade, int node)
617 * finish the initialization of the per-blade control structures 681 * finish the initialization of the per-blade control structures
618 */ 682 */
619static void __init 683static void __init
620uv_table_bases_finish(int blade, int node, int cur_cpu, 684uv_table_bases_finish(int blade,
621 struct bau_control *bau_tablesp, 685 struct bau_control *bau_tablesp,
622 struct bau_desc *adp) 686 struct bau_desc *adp)
623{ 687{
624 struct bau_control *bcp; 688 struct bau_control *bcp;
625 int i; 689 int cpu;
626 690
627 for (i = cur_cpu; i < cur_cpu + uv_blade_nr_possible_cpus(blade); i++) { 691 for_each_present_cpu(cpu) {
628 bcp = (struct bau_control *)&per_cpu(bau_control, i); 692 if (blade != uv_cpu_to_blade_id(cpu))
693 continue;
629 694
695 bcp = (struct bau_control *)&per_cpu(bau_control, cpu);
630 bcp->bau_msg_head = bau_tablesp->va_queue_first; 696 bcp->bau_msg_head = bau_tablesp->va_queue_first;
631 bcp->va_queue_first = bau_tablesp->va_queue_first; 697 bcp->va_queue_first = bau_tablesp->va_queue_first;
632 bcp->va_queue_last = bau_tablesp->va_queue_last; 698 bcp->va_queue_last = bau_tablesp->va_queue_last;
@@ -649,11 +715,10 @@ uv_activation_descriptor_init(int node, int pnode)
649 struct bau_desc *adp; 715 struct bau_desc *adp;
650 struct bau_desc *ad2; 716 struct bau_desc *ad2;
651 717
652 adp = (struct bau_desc *) 718 adp = (struct bau_desc *)kmalloc_node(16384, GFP_KERNEL, node);
653 kmalloc_node(16384, GFP_KERNEL, node);
654 BUG_ON(!adp); 719 BUG_ON(!adp);
655 720
656 pa = __pa((unsigned long)adp); 721 pa = uv_gpa(adp); /* need the real nasid*/
657 n = pa >> uv_nshift; 722 n = pa >> uv_nshift;
658 m = pa & uv_mmask; 723 m = pa & uv_mmask;
659 724
@@ -667,8 +732,12 @@ uv_activation_descriptor_init(int node, int pnode)
667 for (i = 0, ad2 = adp; i < UV_ACTIVATION_DESCRIPTOR_SIZE; i++, ad2++) { 732 for (i = 0, ad2 = adp; i < UV_ACTIVATION_DESCRIPTOR_SIZE; i++, ad2++) {
668 memset(ad2, 0, sizeof(struct bau_desc)); 733 memset(ad2, 0, sizeof(struct bau_desc));
669 ad2->header.sw_ack_flag = 1; 734 ad2->header.sw_ack_flag = 1;
670 ad2->header.base_dest_nodeid = 735 /*
671 uv_blade_to_pnode(uv_cpu_to_blade_id(0)); 736 * base_dest_nodeid is the first node in the partition, so
737 * the bit map will indicate partition-relative node numbers.
738 * note that base_dest_nodeid is actually a nasid.
739 */
740 ad2->header.base_dest_nodeid = uv_partition_base_pnode << 1;
672 ad2->header.command = UV_NET_ENDPOINT_INTD; 741 ad2->header.command = UV_NET_ENDPOINT_INTD;
673 ad2->header.int_both = 1; 742 ad2->header.int_both = 1;
674 /* 743 /*
@@ -686,6 +755,8 @@ static struct bau_payload_queue_entry * __init
686uv_payload_queue_init(int node, int pnode, struct bau_control *bau_tablesp) 755uv_payload_queue_init(int node, int pnode, struct bau_control *bau_tablesp)
687{ 756{
688 struct bau_payload_queue_entry *pqp; 757 struct bau_payload_queue_entry *pqp;
758 unsigned long pa;
759 int pn;
689 char *cp; 760 char *cp;
690 761
691 pqp = (struct bau_payload_queue_entry *) kmalloc_node( 762 pqp = (struct bau_payload_queue_entry *) kmalloc_node(
@@ -696,10 +767,14 @@ uv_payload_queue_init(int node, int pnode, struct bau_control *bau_tablesp)
696 cp = (char *)pqp + 31; 767 cp = (char *)pqp + 31;
697 pqp = (struct bau_payload_queue_entry *)(((unsigned long)cp >> 5) << 5); 768 pqp = (struct bau_payload_queue_entry *)(((unsigned long)cp >> 5) << 5);
698 bau_tablesp->va_queue_first = pqp; 769 bau_tablesp->va_queue_first = pqp;
770 /*
771 * need the pnode of where the memory was really allocated
772 */
773 pa = uv_gpa(pqp);
774 pn = pa >> uv_nshift;
699 uv_write_global_mmr64(pnode, 775 uv_write_global_mmr64(pnode,
700 UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST, 776 UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST,
701 ((unsigned long)pnode << 777 ((unsigned long)pn << UV_PAYLOADQ_PNODE_SHIFT) |
702 UV_PAYLOADQ_PNODE_SHIFT) |
703 uv_physnodeaddr(pqp)); 778 uv_physnodeaddr(pqp));
704 uv_write_global_mmr64(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_TAIL, 779 uv_write_global_mmr64(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_TAIL,
705 uv_physnodeaddr(pqp)); 780 uv_physnodeaddr(pqp));
@@ -715,8 +790,9 @@ uv_payload_queue_init(int node, int pnode, struct bau_control *bau_tablesp)
715/* 790/*
716 * Initialization of each UV blade's structures 791 * Initialization of each UV blade's structures
717 */ 792 */
718static int __init uv_init_blade(int blade, int node, int cur_cpu) 793static int __init uv_init_blade(int blade)
719{ 794{
795 int node;
720 int pnode; 796 int pnode;
721 unsigned long pa; 797 unsigned long pa;
722 unsigned long apicid; 798 unsigned long apicid;
@@ -724,16 +800,17 @@ static int __init uv_init_blade(int blade, int node, int cur_cpu)
724 struct bau_payload_queue_entry *pqp; 800 struct bau_payload_queue_entry *pqp;
725 struct bau_control *bau_tablesp; 801 struct bau_control *bau_tablesp;
726 802
803 node = blade_to_first_node(blade);
727 bau_tablesp = uv_table_bases_init(blade, node); 804 bau_tablesp = uv_table_bases_init(blade, node);
728 pnode = uv_blade_to_pnode(blade); 805 pnode = uv_blade_to_pnode(blade);
729 adp = uv_activation_descriptor_init(node, pnode); 806 adp = uv_activation_descriptor_init(node, pnode);
730 pqp = uv_payload_queue_init(node, pnode, bau_tablesp); 807 pqp = uv_payload_queue_init(node, pnode, bau_tablesp);
731 uv_table_bases_finish(blade, node, cur_cpu, bau_tablesp, adp); 808 uv_table_bases_finish(blade, bau_tablesp, adp);
732 /* 809 /*
733 * the below initialization can't be in firmware because the 810 * the below initialization can't be in firmware because the
734 * messaging IRQ will be determined by the OS 811 * messaging IRQ will be determined by the OS
735 */ 812 */
736 apicid = per_cpu(x86_cpu_to_apicid, cur_cpu); 813 apicid = blade_to_first_apicid(blade);
737 pa = uv_read_global_mmr64(pnode, UVH_BAU_DATA_CONFIG); 814 pa = uv_read_global_mmr64(pnode, UVH_BAU_DATA_CONFIG);
738 if ((pa & 0xff) != UV_BAU_MESSAGE) { 815 if ((pa & 0xff) != UV_BAU_MESSAGE) {
739 uv_write_global_mmr64(pnode, UVH_BAU_DATA_CONFIG, 816 uv_write_global_mmr64(pnode, UVH_BAU_DATA_CONFIG,
@@ -748,9 +825,7 @@ static int __init uv_init_blade(int blade, int node, int cur_cpu)
748static int __init uv_bau_init(void) 825static int __init uv_bau_init(void)
749{ 826{
750 int blade; 827 int blade;
751 int node;
752 int nblades; 828 int nblades;
753 int last_blade;
754 int cur_cpu; 829 int cur_cpu;
755 830
756 if (!is_uv_system()) 831 if (!is_uv_system())
@@ -763,29 +838,21 @@ static int __init uv_bau_init(void)
763 uv_bau_retry_limit = 1; 838 uv_bau_retry_limit = 1;
764 uv_nshift = uv_hub_info->n_val; 839 uv_nshift = uv_hub_info->n_val;
765 uv_mmask = (1UL << uv_hub_info->n_val) - 1; 840 uv_mmask = (1UL << uv_hub_info->n_val) - 1;
766 nblades = 0; 841 nblades = uv_num_possible_blades();
767 last_blade = -1; 842
768 cur_cpu = 0;
769 for_each_online_node(node) {
770 blade = uv_node_to_blade_id(node);
771 if (blade == last_blade)
772 continue;
773 last_blade = blade;
774 nblades++;
775 }
776 uv_bau_table_bases = (struct bau_control **) 843 uv_bau_table_bases = (struct bau_control **)
777 kmalloc(nblades * sizeof(struct bau_control *), GFP_KERNEL); 844 kmalloc(nblades * sizeof(struct bau_control *), GFP_KERNEL);
778 BUG_ON(!uv_bau_table_bases); 845 BUG_ON(!uv_bau_table_bases);
779 846
780 last_blade = -1; 847 uv_partition_base_pnode = 0x7fffffff;
781 for_each_online_node(node) { 848 for (blade = 0; blade < nblades; blade++)
782 blade = uv_node_to_blade_id(node); 849 if (uv_blade_nr_possible_cpus(blade) &&
783 if (blade == last_blade) 850 (uv_blade_to_pnode(blade) < uv_partition_base_pnode))
784 continue; 851 uv_partition_base_pnode = uv_blade_to_pnode(blade);
785 last_blade = blade; 852 for (blade = 0; blade < nblades; blade++)
786 uv_init_blade(blade, node, cur_cpu); 853 if (uv_blade_nr_possible_cpus(blade))
787 cur_cpu += uv_blade_nr_possible_cpus(blade); 854 uv_init_blade(blade);
788 } 855
789 alloc_intr_gate(UV_BAU_MESSAGE, uv_bau_message_intr1); 856 alloc_intr_gate(UV_BAU_MESSAGE, uv_bau_message_intr1);
790 uv_enable_timeouts(); 857 uv_enable_timeouts();
791 858
diff --git a/arch/x86/kernel/uv_sysfs.c b/arch/x86/kernel/uv_sysfs.c
index 67f9b9dbf800..36afb98675a4 100644
--- a/arch/x86/kernel/uv_sysfs.c
+++ b/arch/x86/kernel/uv_sysfs.c
@@ -21,6 +21,7 @@
21 21
22#include <linux/sysdev.h> 22#include <linux/sysdev.h>
23#include <asm/uv/bios.h> 23#include <asm/uv/bios.h>
24#include <asm/uv/uv.h>
24 25
25struct kobject *sgi_uv_kobj; 26struct kobject *sgi_uv_kobj;
26 27
@@ -47,6 +48,9 @@ static int __init sgi_uv_sysfs_init(void)
47{ 48{
48 unsigned long ret; 49 unsigned long ret;
49 50
51 if (!is_uv_system())
52 return -ENODEV;
53
50 if (!sgi_uv_kobj) 54 if (!sgi_uv_kobj)
51 sgi_uv_kobj = kobject_create_and_add("sgi_uv", firmware_kobj); 55 sgi_uv_kobj = kobject_create_and_add("sgi_uv", firmware_kobj);
52 if (!sgi_uv_kobj) { 56 if (!sgi_uv_kobj) {
diff --git a/arch/x86/kernel/xsave.c b/arch/x86/kernel/xsave.c
index 2b54fe002e94..0a5b04aa98f1 100644
--- a/arch/x86/kernel/xsave.c
+++ b/arch/x86/kernel/xsave.c
@@ -324,7 +324,7 @@ void __ref xsave_cntxt_init(void)
324 } 324 }
325 325
326 /* 326 /*
327 * for now OS knows only about FP/SSE 327 * Support only the state known to OS.
328 */ 328 */
329 pcntxt_mask = pcntxt_mask & XCNTXT_MASK; 329 pcntxt_mask = pcntxt_mask & XCNTXT_MASK;
330 xsave_init(); 330 xsave_init();
diff --git a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c
index e94a11e42f98..a2085368a3dc 100644
--- a/arch/x86/lguest/boot.c
+++ b/arch/x86/lguest/boot.c
@@ -273,15 +273,15 @@ static void lguest_load_idt(const struct desc_ptr *desc)
273 * controls the entire thing and the Guest asks it to make changes using the 273 * controls the entire thing and the Guest asks it to make changes using the
274 * LOAD_GDT hypercall. 274 * LOAD_GDT hypercall.
275 * 275 *
276 * This is the opposite of the IDT code where we have a LOAD_IDT_ENTRY 276 * This is the exactly like the IDT code.
277 * hypercall and use that repeatedly to load a new IDT. I don't think it
278 * really matters, but wouldn't it be nice if they were the same? Wouldn't
279 * it be even better if you were the one to send the patch to fix it?
280 */ 277 */
281static void lguest_load_gdt(const struct desc_ptr *desc) 278static void lguest_load_gdt(const struct desc_ptr *desc)
282{ 279{
283 BUG_ON((desc->size + 1) / 8 != GDT_ENTRIES); 280 unsigned int i;
284 kvm_hypercall2(LHCALL_LOAD_GDT, __pa(desc->address), GDT_ENTRIES); 281 struct desc_struct *gdt = (void *)desc->address;
282
283 for (i = 0; i < (desc->size+1)/8; i++)
284 kvm_hypercall3(LHCALL_LOAD_GDT_ENTRY, i, gdt[i].a, gdt[i].b);
285} 285}
286 286
287/* For a single GDT entry which changes, we do the lazy thing: alter our GDT, 287/* For a single GDT entry which changes, we do the lazy thing: alter our GDT,
@@ -291,7 +291,9 @@ static void lguest_write_gdt_entry(struct desc_struct *dt, int entrynum,
291 const void *desc, int type) 291 const void *desc, int type)
292{ 292{
293 native_write_gdt_entry(dt, entrynum, desc, type); 293 native_write_gdt_entry(dt, entrynum, desc, type);
294 kvm_hypercall2(LHCALL_LOAD_GDT, __pa(dt), GDT_ENTRIES); 294 /* Tell Host about this new entry. */
295 kvm_hypercall3(LHCALL_LOAD_GDT_ENTRY, entrynum,
296 dt[entrynum].a, dt[entrynum].b);
295} 297}
296 298
297/* OK, I lied. There are three "thread local storage" GDT entries which change 299/* OK, I lied. There are three "thread local storage" GDT entries which change
diff --git a/arch/x86/mm/ioremap.c b/arch/x86/mm/ioremap.c
index d4c4b2c4dbbe..8a450930834f 100644
--- a/arch/x86/mm/ioremap.c
+++ b/arch/x86/mm/ioremap.c
@@ -549,7 +549,7 @@ void __init early_ioremap_reset(void)
549} 549}
550 550
551static void __init __early_set_fixmap(enum fixed_addresses idx, 551static void __init __early_set_fixmap(enum fixed_addresses idx,
552 unsigned long phys, pgprot_t flags) 552 phys_addr_t phys, pgprot_t flags)
553{ 553{
554 unsigned long addr = __fix_to_virt(idx); 554 unsigned long addr = __fix_to_virt(idx);
555 pte_t *pte; 555 pte_t *pte;
@@ -568,7 +568,7 @@ static void __init __early_set_fixmap(enum fixed_addresses idx,
568} 568}
569 569
570static inline void __init early_set_fixmap(enum fixed_addresses idx, 570static inline void __init early_set_fixmap(enum fixed_addresses idx,
571 unsigned long phys, pgprot_t prot) 571 phys_addr_t phys, pgprot_t prot)
572{ 572{
573 if (after_paging_init) 573 if (after_paging_init)
574 __set_fixmap(idx, phys, prot); 574 __set_fixmap(idx, phys, prot);
@@ -609,9 +609,10 @@ static int __init check_early_ioremap_leak(void)
609late_initcall(check_early_ioremap_leak); 609late_initcall(check_early_ioremap_leak);
610 610
611static void __init __iomem * 611static void __init __iomem *
612__early_ioremap(unsigned long phys_addr, unsigned long size, pgprot_t prot) 612__early_ioremap(resource_size_t phys_addr, unsigned long size, pgprot_t prot)
613{ 613{
614 unsigned long offset, last_addr; 614 unsigned long offset;
615 resource_size_t last_addr;
615 unsigned int nrpages; 616 unsigned int nrpages;
616 enum fixed_addresses idx0, idx; 617 enum fixed_addresses idx0, idx;
617 int i, slot; 618 int i, slot;
@@ -627,15 +628,15 @@ __early_ioremap(unsigned long phys_addr, unsigned long size, pgprot_t prot)
627 } 628 }
628 629
629 if (slot < 0) { 630 if (slot < 0) {
630 printk(KERN_INFO "early_iomap(%08lx, %08lx) not found slot\n", 631 printk(KERN_INFO "early_iomap(%08llx, %08lx) not found slot\n",
631 phys_addr, size); 632 (u64)phys_addr, size);
632 WARN_ON(1); 633 WARN_ON(1);
633 return NULL; 634 return NULL;
634 } 635 }
635 636
636 if (early_ioremap_debug) { 637 if (early_ioremap_debug) {
637 printk(KERN_INFO "early_ioremap(%08lx, %08lx) [%d] => ", 638 printk(KERN_INFO "early_ioremap(%08llx, %08lx) [%d] => ",
638 phys_addr, size, slot); 639 (u64)phys_addr, size, slot);
639 dump_stack(); 640 dump_stack();
640 } 641 }
641 642
@@ -682,13 +683,15 @@ __early_ioremap(unsigned long phys_addr, unsigned long size, pgprot_t prot)
682} 683}
683 684
684/* Remap an IO device */ 685/* Remap an IO device */
685void __init __iomem *early_ioremap(unsigned long phys_addr, unsigned long size) 686void __init __iomem *
687early_ioremap(resource_size_t phys_addr, unsigned long size)
686{ 688{
687 return __early_ioremap(phys_addr, size, PAGE_KERNEL_IO); 689 return __early_ioremap(phys_addr, size, PAGE_KERNEL_IO);
688} 690}
689 691
690/* Remap memory */ 692/* Remap memory */
691void __init __iomem *early_memremap(unsigned long phys_addr, unsigned long size) 693void __init __iomem *
694early_memremap(resource_size_t phys_addr, unsigned long size)
692{ 695{
693 return __early_ioremap(phys_addr, size, PAGE_KERNEL); 696 return __early_ioremap(phys_addr, size, PAGE_KERNEL);
694} 697}
diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c
index 41c805718158..e6718bb28065 100644
--- a/arch/x86/mm/pat.c
+++ b/arch/x86/mm/pat.c
@@ -31,7 +31,7 @@
31#ifdef CONFIG_X86_PAT 31#ifdef CONFIG_X86_PAT
32int __read_mostly pat_enabled = 1; 32int __read_mostly pat_enabled = 1;
33 33
34void __cpuinit pat_disable(const char *reason) 34static inline void pat_disable(const char *reason)
35{ 35{
36 pat_enabled = 0; 36 pat_enabled = 0;
37 printk(KERN_INFO "%s\n", reason); 37 printk(KERN_INFO "%s\n", reason);
diff --git a/arch/x86/mm/pgtable.c b/arch/x86/mm/pgtable.c
index 5b7c7c8464fe..7aa03a5389f5 100644
--- a/arch/x86/mm/pgtable.c
+++ b/arch/x86/mm/pgtable.c
@@ -345,7 +345,8 @@ void __native_set_fixmap(enum fixed_addresses idx, pte_t pte)
345 fixmaps_set++; 345 fixmaps_set++;
346} 346}
347 347
348void native_set_fixmap(enum fixed_addresses idx, unsigned long phys, pgprot_t flags) 348void native_set_fixmap(enum fixed_addresses idx, phys_addr_t phys,
349 pgprot_t flags)
349{ 350{
350 __native_set_fixmap(idx, pfn_pte(phys >> PAGE_SHIFT, flags)); 351 __native_set_fixmap(idx, pfn_pte(phys >> PAGE_SHIFT, flags));
351} 352}
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index 82cd39a6cbd3..f09e8c36ee80 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -42,6 +42,7 @@
42#include <asm/xen/hypervisor.h> 42#include <asm/xen/hypervisor.h>
43#include <asm/fixmap.h> 43#include <asm/fixmap.h>
44#include <asm/processor.h> 44#include <asm/processor.h>
45#include <asm/proto.h>
45#include <asm/msr-index.h> 46#include <asm/msr-index.h>
46#include <asm/setup.h> 47#include <asm/setup.h>
47#include <asm/desc.h> 48#include <asm/desc.h>
@@ -168,21 +169,23 @@ static void __init xen_banner(void)
168 xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : ""); 169 xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : "");
169} 170}
170 171
172static __read_mostly unsigned int cpuid_leaf1_edx_mask = ~0;
173static __read_mostly unsigned int cpuid_leaf1_ecx_mask = ~0;
174
171static void xen_cpuid(unsigned int *ax, unsigned int *bx, 175static void xen_cpuid(unsigned int *ax, unsigned int *bx,
172 unsigned int *cx, unsigned int *dx) 176 unsigned int *cx, unsigned int *dx)
173{ 177{
178 unsigned maskecx = ~0;
174 unsigned maskedx = ~0; 179 unsigned maskedx = ~0;
175 180
176 /* 181 /*
177 * Mask out inconvenient features, to try and disable as many 182 * Mask out inconvenient features, to try and disable as many
178 * unsupported kernel subsystems as possible. 183 * unsupported kernel subsystems as possible.
179 */ 184 */
180 if (*ax == 1) 185 if (*ax == 1) {
181 maskedx = ~((1 << X86_FEATURE_APIC) | /* disable APIC */ 186 maskecx = cpuid_leaf1_ecx_mask;
182 (1 << X86_FEATURE_ACPI) | /* disable ACPI */ 187 maskedx = cpuid_leaf1_edx_mask;
183 (1 << X86_FEATURE_MCE) | /* disable MCE */ 188 }
184 (1 << X86_FEATURE_MCA) | /* disable MCA */
185 (1 << X86_FEATURE_ACC)); /* thermal monitoring */
186 189
187 asm(XEN_EMULATE_PREFIX "cpuid" 190 asm(XEN_EMULATE_PREFIX "cpuid"
188 : "=a" (*ax), 191 : "=a" (*ax),
@@ -190,9 +193,43 @@ static void xen_cpuid(unsigned int *ax, unsigned int *bx,
190 "=c" (*cx), 193 "=c" (*cx),
191 "=d" (*dx) 194 "=d" (*dx)
192 : "0" (*ax), "2" (*cx)); 195 : "0" (*ax), "2" (*cx));
196
197 *cx &= maskecx;
193 *dx &= maskedx; 198 *dx &= maskedx;
194} 199}
195 200
201static __init void xen_init_cpuid_mask(void)
202{
203 unsigned int ax, bx, cx, dx;
204
205 cpuid_leaf1_edx_mask =
206 ~((1 << X86_FEATURE_MCE) | /* disable MCE */
207 (1 << X86_FEATURE_MCA) | /* disable MCA */
208 (1 << X86_FEATURE_ACC)); /* thermal monitoring */
209
210 if (!xen_initial_domain())
211 cpuid_leaf1_edx_mask &=
212 ~((1 << X86_FEATURE_APIC) | /* disable local APIC */
213 (1 << X86_FEATURE_ACPI)); /* disable ACPI */
214
215 ax = 1;
216 xen_cpuid(&ax, &bx, &cx, &dx);
217
218 /* cpuid claims we support xsave; try enabling it to see what happens */
219 if (cx & (1 << (X86_FEATURE_XSAVE % 32))) {
220 unsigned long cr4;
221
222 set_in_cr4(X86_CR4_OSXSAVE);
223
224 cr4 = read_cr4();
225
226 if ((cr4 & X86_CR4_OSXSAVE) == 0)
227 cpuid_leaf1_ecx_mask &= ~(1 << (X86_FEATURE_XSAVE % 32));
228
229 clear_in_cr4(X86_CR4_OSXSAVE);
230 }
231}
232
196static void xen_set_debugreg(int reg, unsigned long val) 233static void xen_set_debugreg(int reg, unsigned long val)
197{ 234{
198 HYPERVISOR_set_debugreg(reg, val); 235 HYPERVISOR_set_debugreg(reg, val);
@@ -284,12 +321,11 @@ static void xen_set_ldt(const void *addr, unsigned entries)
284 321
285static void xen_load_gdt(const struct desc_ptr *dtr) 322static void xen_load_gdt(const struct desc_ptr *dtr)
286{ 323{
287 unsigned long *frames;
288 unsigned long va = dtr->address; 324 unsigned long va = dtr->address;
289 unsigned int size = dtr->size + 1; 325 unsigned int size = dtr->size + 1;
290 unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE; 326 unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE;
327 unsigned long frames[pages];
291 int f; 328 int f;
292 struct multicall_space mcs;
293 329
294 /* A GDT can be up to 64k in size, which corresponds to 8192 330 /* A GDT can be up to 64k in size, which corresponds to 8192
295 8-byte entries, or 16 4k pages.. */ 331 8-byte entries, or 16 4k pages.. */
@@ -297,19 +333,26 @@ static void xen_load_gdt(const struct desc_ptr *dtr)
297 BUG_ON(size > 65536); 333 BUG_ON(size > 65536);
298 BUG_ON(va & ~PAGE_MASK); 334 BUG_ON(va & ~PAGE_MASK);
299 335
300 mcs = xen_mc_entry(sizeof(*frames) * pages);
301 frames = mcs.args;
302
303 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { 336 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) {
304 frames[f] = arbitrary_virt_to_mfn((void *)va); 337 int level;
338 pte_t *ptep = lookup_address(va, &level);
339 unsigned long pfn, mfn;
340 void *virt;
341
342 BUG_ON(ptep == NULL);
343
344 pfn = pte_pfn(*ptep);
345 mfn = pfn_to_mfn(pfn);
346 virt = __va(PFN_PHYS(pfn));
347
348 frames[f] = mfn;
305 349
306 make_lowmem_page_readonly((void *)va); 350 make_lowmem_page_readonly((void *)va);
307 make_lowmem_page_readonly(mfn_to_virt(frames[f])); 351 make_lowmem_page_readonly(virt);
308 } 352 }
309 353
310 MULTI_set_gdt(mcs.mc, frames, size / sizeof(struct desc_struct)); 354 if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct)))
311 355 BUG();
312 xen_mc_issue(PARAVIRT_LAZY_CPU);
313} 356}
314 357
315static void load_TLS_descriptor(struct thread_struct *t, 358static void load_TLS_descriptor(struct thread_struct *t,
@@ -385,7 +428,7 @@ static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum,
385static int cvt_gate_to_trap(int vector, const gate_desc *val, 428static int cvt_gate_to_trap(int vector, const gate_desc *val,
386 struct trap_info *info) 429 struct trap_info *info)
387{ 430{
388 if (val->type != 0xf && val->type != 0xe) 431 if (val->type != GATE_TRAP && val->type != GATE_INTERRUPT)
389 return 0; 432 return 0;
390 433
391 info->vector = vector; 434 info->vector = vector;
@@ -393,8 +436,8 @@ static int cvt_gate_to_trap(int vector, const gate_desc *val,
393 info->cs = gate_segment(*val); 436 info->cs = gate_segment(*val);
394 info->flags = val->dpl; 437 info->flags = val->dpl;
395 /* interrupt gates clear IF */ 438 /* interrupt gates clear IF */
396 if (val->type == 0xe) 439 if (val->type == GATE_INTERRUPT)
397 info->flags |= 4; 440 info->flags |= 1 << 2;
398 441
399 return 1; 442 return 1;
400} 443}
@@ -872,7 +915,6 @@ static const struct machine_ops __initdata xen_machine_ops = {
872 .emergency_restart = xen_emergency_restart, 915 .emergency_restart = xen_emergency_restart,
873}; 916};
874 917
875
876/* First C function to be called on Xen boot */ 918/* First C function to be called on Xen boot */
877asmlinkage void __init xen_start_kernel(void) 919asmlinkage void __init xen_start_kernel(void)
878{ 920{
@@ -897,6 +939,8 @@ asmlinkage void __init xen_start_kernel(void)
897 939
898 xen_init_irq_ops(); 940 xen_init_irq_ops();
899 941
942 xen_init_cpuid_mask();
943
900#ifdef CONFIG_X86_LOCAL_APIC 944#ifdef CONFIG_X86_LOCAL_APIC
901 /* 945 /*
902 * set up the basic apic ops. 946 * set up the basic apic ops.
@@ -938,6 +982,11 @@ asmlinkage void __init xen_start_kernel(void)
938 if (!xen_initial_domain()) 982 if (!xen_initial_domain())
939 __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD); 983 __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD);
940 984
985#ifdef CONFIG_X86_64
986 /* Work out if we support NX */
987 check_efer();
988#endif
989
941 /* Don't do the full vcpu_info placement stuff until we have a 990 /* Don't do the full vcpu_info placement stuff until we have a
942 possible map and a non-dummy shared_info. */ 991 possible map and a non-dummy shared_info. */
943 per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0]; 992 per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0];
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c
index db3802fb7b84..9842b1212407 100644
--- a/arch/x86/xen/mmu.c
+++ b/arch/x86/xen/mmu.c
@@ -184,7 +184,7 @@ static inline unsigned p2m_index(unsigned long pfn)
184} 184}
185 185
186/* Build the parallel p2m_top_mfn structures */ 186/* Build the parallel p2m_top_mfn structures */
187void xen_setup_mfn_list_list(void) 187static void __init xen_build_mfn_list_list(void)
188{ 188{
189 unsigned pfn, idx; 189 unsigned pfn, idx;
190 190
@@ -198,7 +198,10 @@ void xen_setup_mfn_list_list(void)
198 unsigned topidx = idx * P2M_ENTRIES_PER_PAGE; 198 unsigned topidx = idx * P2M_ENTRIES_PER_PAGE;
199 p2m_top_mfn_list[idx] = virt_to_mfn(&p2m_top_mfn[topidx]); 199 p2m_top_mfn_list[idx] = virt_to_mfn(&p2m_top_mfn[topidx]);
200 } 200 }
201}
201 202
203void xen_setup_mfn_list_list(void)
204{
202 BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info); 205 BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info);
203 206
204 HYPERVISOR_shared_info->arch.pfn_to_mfn_frame_list_list = 207 HYPERVISOR_shared_info->arch.pfn_to_mfn_frame_list_list =
@@ -218,6 +221,8 @@ void __init xen_build_dynamic_phys_to_machine(void)
218 221
219 p2m_top[topidx] = &mfn_list[pfn]; 222 p2m_top[topidx] = &mfn_list[pfn];
220 } 223 }
224
225 xen_build_mfn_list_list();
221} 226}
222 227
223unsigned long get_phys_to_machine(unsigned long pfn) 228unsigned long get_phys_to_machine(unsigned long pfn)
@@ -233,47 +238,74 @@ unsigned long get_phys_to_machine(unsigned long pfn)
233} 238}
234EXPORT_SYMBOL_GPL(get_phys_to_machine); 239EXPORT_SYMBOL_GPL(get_phys_to_machine);
235 240
236static void alloc_p2m(unsigned long **pp, unsigned long *mfnp) 241/* install a new p2m_top page */
242bool install_p2mtop_page(unsigned long pfn, unsigned long *p)
237{ 243{
238 unsigned long *p; 244 unsigned topidx = p2m_top_index(pfn);
245 unsigned long **pfnp, *mfnp;
239 unsigned i; 246 unsigned i;
240 247
241 p = (void *)__get_free_page(GFP_KERNEL | __GFP_NOFAIL); 248 pfnp = &p2m_top[topidx];
242 BUG_ON(p == NULL); 249 mfnp = &p2m_top_mfn[topidx];
243 250
244 for (i = 0; i < P2M_ENTRIES_PER_PAGE; i++) 251 for (i = 0; i < P2M_ENTRIES_PER_PAGE; i++)
245 p[i] = INVALID_P2M_ENTRY; 252 p[i] = INVALID_P2M_ENTRY;
246 253
247 if (cmpxchg(pp, p2m_missing, p) != p2m_missing) 254 if (cmpxchg(pfnp, p2m_missing, p) == p2m_missing) {
248 free_page((unsigned long)p);
249 else
250 *mfnp = virt_to_mfn(p); 255 *mfnp = virt_to_mfn(p);
256 return true;
257 }
258
259 return false;
251} 260}
252 261
253void set_phys_to_machine(unsigned long pfn, unsigned long mfn) 262static void alloc_p2m(unsigned long pfn)
254{ 263{
255 unsigned topidx, idx; 264 unsigned long *p;
256 265
257 if (unlikely(xen_feature(XENFEAT_auto_translated_physmap))) { 266 p = (void *)__get_free_page(GFP_KERNEL | __GFP_NOFAIL);
258 BUG_ON(pfn != mfn && mfn != INVALID_P2M_ENTRY); 267 BUG_ON(p == NULL);
259 return; 268
260 } 269 if (!install_p2mtop_page(pfn, p))
270 free_page((unsigned long)p);
271}
272
273/* Try to install p2m mapping; fail if intermediate bits missing */
274bool __set_phys_to_machine(unsigned long pfn, unsigned long mfn)
275{
276 unsigned topidx, idx;
261 277
262 if (unlikely(pfn >= MAX_DOMAIN_PAGES)) { 278 if (unlikely(pfn >= MAX_DOMAIN_PAGES)) {
263 BUG_ON(mfn != INVALID_P2M_ENTRY); 279 BUG_ON(mfn != INVALID_P2M_ENTRY);
264 return; 280 return true;
265 } 281 }
266 282
267 topidx = p2m_top_index(pfn); 283 topidx = p2m_top_index(pfn);
268 if (p2m_top[topidx] == p2m_missing) { 284 if (p2m_top[topidx] == p2m_missing) {
269 /* no need to allocate a page to store an invalid entry */
270 if (mfn == INVALID_P2M_ENTRY) 285 if (mfn == INVALID_P2M_ENTRY)
271 return; 286 return true;
272 alloc_p2m(&p2m_top[topidx], &p2m_top_mfn[topidx]); 287 return false;
273 } 288 }
274 289
275 idx = p2m_index(pfn); 290 idx = p2m_index(pfn);
276 p2m_top[topidx][idx] = mfn; 291 p2m_top[topidx][idx] = mfn;
292
293 return true;
294}
295
296void set_phys_to_machine(unsigned long pfn, unsigned long mfn)
297{
298 if (unlikely(xen_feature(XENFEAT_auto_translated_physmap))) {
299 BUG_ON(pfn != mfn && mfn != INVALID_P2M_ENTRY);
300 return;
301 }
302
303 if (unlikely(!__set_phys_to_machine(pfn, mfn))) {
304 alloc_p2m(pfn);
305
306 if (!__set_phys_to_machine(pfn, mfn))
307 BUG();
308 }
277} 309}
278 310
279unsigned long arbitrary_virt_to_mfn(void *vaddr) 311unsigned long arbitrary_virt_to_mfn(void *vaddr)
@@ -987,7 +1019,7 @@ static __init int xen_mark_pinned(struct mm_struct *mm, struct page *page,
987 return 0; 1019 return 0;
988} 1020}
989 1021
990void __init xen_mark_init_mm_pinned(void) 1022static void __init xen_mark_init_mm_pinned(void)
991{ 1023{
992 xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP); 1024 xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP);
993} 1025}
@@ -1270,8 +1302,8 @@ static void xen_flush_tlb_others(const struct cpumask *cpus,
1270 } *args; 1302 } *args;
1271 struct multicall_space mcs; 1303 struct multicall_space mcs;
1272 1304
1273 BUG_ON(cpumask_empty(cpus)); 1305 if (cpumask_empty(cpus))
1274 BUG_ON(!mm); 1306 return; /* nothing to do */
1275 1307
1276 mcs = xen_mc_entry(sizeof(*args)); 1308 mcs = xen_mc_entry(sizeof(*args));
1277 args = mcs.args; 1309 args = mcs.args;
@@ -1438,6 +1470,15 @@ static __init void xen_set_pte_init(pte_t *ptep, pte_t pte)
1438} 1470}
1439#endif 1471#endif
1440 1472
1473static void pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
1474{
1475 struct mmuext_op op;
1476 op.cmd = cmd;
1477 op.arg1.mfn = pfn_to_mfn(pfn);
1478 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
1479 BUG();
1480}
1481
1441/* Early in boot, while setting up the initial pagetable, assume 1482/* Early in boot, while setting up the initial pagetable, assume
1442 everything is pinned. */ 1483 everything is pinned. */
1443static __init void xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn) 1484static __init void xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn)
@@ -1446,22 +1487,29 @@ static __init void xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn)
1446 BUG_ON(mem_map); /* should only be used early */ 1487 BUG_ON(mem_map); /* should only be used early */
1447#endif 1488#endif
1448 make_lowmem_page_readonly(__va(PFN_PHYS(pfn))); 1489 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1490 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1491}
1492
1493/* Used for pmd and pud */
1494static __init void xen_alloc_pmd_init(struct mm_struct *mm, unsigned long pfn)
1495{
1496#ifdef CONFIG_FLATMEM
1497 BUG_ON(mem_map); /* should only be used early */
1498#endif
1499 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1449} 1500}
1450 1501
1451/* Early release_pte assumes that all pts are pinned, since there's 1502/* Early release_pte assumes that all pts are pinned, since there's
1452 only init_mm and anything attached to that is pinned. */ 1503 only init_mm and anything attached to that is pinned. */
1453static void xen_release_pte_init(unsigned long pfn) 1504static __init void xen_release_pte_init(unsigned long pfn)
1454{ 1505{
1506 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
1455 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn))); 1507 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1456} 1508}
1457 1509
1458static void pin_pagetable_pfn(unsigned cmd, unsigned long pfn) 1510static __init void xen_release_pmd_init(unsigned long pfn)
1459{ 1511{
1460 struct mmuext_op op; 1512 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1461 op.cmd = cmd;
1462 op.arg1.mfn = pfn_to_mfn(pfn);
1463 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
1464 BUG();
1465} 1513}
1466 1514
1467/* This needs to make sure the new pte page is pinned iff its being 1515/* This needs to make sure the new pte page is pinned iff its being
@@ -1750,7 +1798,7 @@ __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd,
1750} 1798}
1751#endif /* CONFIG_X86_64 */ 1799#endif /* CONFIG_X86_64 */
1752 1800
1753static void xen_set_fixmap(unsigned idx, unsigned long phys, pgprot_t prot) 1801static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot)
1754{ 1802{
1755 pte_t pte; 1803 pte_t pte;
1756 1804
@@ -1773,6 +1821,9 @@ static void xen_set_fixmap(unsigned idx, unsigned long phys, pgprot_t prot)
1773#ifdef CONFIG_X86_LOCAL_APIC 1821#ifdef CONFIG_X86_LOCAL_APIC
1774 case FIX_APIC_BASE: /* maps dummy local APIC */ 1822 case FIX_APIC_BASE: /* maps dummy local APIC */
1775#endif 1823#endif
1824 case FIX_TEXT_POKE0:
1825 case FIX_TEXT_POKE1:
1826 /* All local page mappings */
1776 pte = pfn_pte(phys, prot); 1827 pte = pfn_pte(phys, prot);
1777 break; 1828 break;
1778 1829
@@ -1819,7 +1870,6 @@ __init void xen_post_allocator_init(void)
1819 xen_mark_init_mm_pinned(); 1870 xen_mark_init_mm_pinned();
1820} 1871}
1821 1872
1822
1823const struct pv_mmu_ops xen_mmu_ops __initdata = { 1873const struct pv_mmu_ops xen_mmu_ops __initdata = {
1824 .pagetable_setup_start = xen_pagetable_setup_start, 1874 .pagetable_setup_start = xen_pagetable_setup_start,
1825 .pagetable_setup_done = xen_pagetable_setup_done, 1875 .pagetable_setup_done = xen_pagetable_setup_done,
@@ -1843,9 +1893,9 @@ const struct pv_mmu_ops xen_mmu_ops __initdata = {
1843 1893
1844 .alloc_pte = xen_alloc_pte_init, 1894 .alloc_pte = xen_alloc_pte_init,
1845 .release_pte = xen_release_pte_init, 1895 .release_pte = xen_release_pte_init,
1846 .alloc_pmd = xen_alloc_pte_init, 1896 .alloc_pmd = xen_alloc_pmd_init,
1847 .alloc_pmd_clone = paravirt_nop, 1897 .alloc_pmd_clone = paravirt_nop,
1848 .release_pmd = xen_release_pte_init, 1898 .release_pmd = xen_release_pmd_init,
1849 1899
1850#ifdef CONFIG_HIGHPTE 1900#ifdef CONFIG_HIGHPTE
1851 .kmap_atomic_pte = xen_kmap_atomic_pte, 1901 .kmap_atomic_pte = xen_kmap_atomic_pte,
@@ -1883,8 +1933,8 @@ const struct pv_mmu_ops xen_mmu_ops __initdata = {
1883 .make_pud = PV_CALLEE_SAVE(xen_make_pud), 1933 .make_pud = PV_CALLEE_SAVE(xen_make_pud),
1884 .set_pgd = xen_set_pgd_hyper, 1934 .set_pgd = xen_set_pgd_hyper,
1885 1935
1886 .alloc_pud = xen_alloc_pte_init, 1936 .alloc_pud = xen_alloc_pmd_init,
1887 .release_pud = xen_release_pte_init, 1937 .release_pud = xen_release_pmd_init,
1888#endif /* PAGETABLE_LEVELS == 4 */ 1938#endif /* PAGETABLE_LEVELS == 4 */
1889 1939
1890 .activate_mm = xen_activate_mm, 1940 .activate_mm = xen_activate_mm,
diff --git a/arch/x86/xen/mmu.h b/arch/x86/xen/mmu.h
index 24d1b44a337d..da7302624897 100644
--- a/arch/x86/xen/mmu.h
+++ b/arch/x86/xen/mmu.h
@@ -11,6 +11,9 @@ enum pt_level {
11}; 11};
12 12
13 13
14bool __set_phys_to_machine(unsigned long pfn, unsigned long mfn);
15bool install_p2mtop_page(unsigned long pfn, unsigned long *p);
16
14void set_pte_mfn(unsigned long vaddr, unsigned long pfn, pgprot_t flags); 17void set_pte_mfn(unsigned long vaddr, unsigned long pfn, pgprot_t flags);
15 18
16 19
diff --git a/arch/x86/xen/smp.c b/arch/x86/xen/smp.c
index 585a6e330837..429834ec1687 100644
--- a/arch/x86/xen/smp.c
+++ b/arch/x86/xen/smp.c
@@ -317,7 +317,7 @@ static int __cpuinit xen_cpu_up(unsigned int cpu)
317 BUG_ON(rc); 317 BUG_ON(rc);
318 318
319 while(per_cpu(cpu_state, cpu) != CPU_ONLINE) { 319 while(per_cpu(cpu_state, cpu) != CPU_ONLINE) {
320 HYPERVISOR_sched_op(SCHEDOP_yield, 0); 320 HYPERVISOR_sched_op(SCHEDOP_yield, NULL);
321 barrier(); 321 barrier();
322 } 322 }
323 323
@@ -422,7 +422,7 @@ static void xen_smp_send_call_function_ipi(const struct cpumask *mask)
422 /* Make sure other vcpus get a chance to run if they need to. */ 422 /* Make sure other vcpus get a chance to run if they need to. */
423 for_each_cpu(cpu, mask) { 423 for_each_cpu(cpu, mask) {
424 if (xen_vcpu_stolen(cpu)) { 424 if (xen_vcpu_stolen(cpu)) {
425 HYPERVISOR_sched_op(SCHEDOP_yield, 0); 425 HYPERVISOR_sched_op(SCHEDOP_yield, NULL);
426 break; 426 break;
427 } 427 }
428 } 428 }
diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h
index 2f5ef2632ea2..20139464943c 100644
--- a/arch/x86/xen/xen-ops.h
+++ b/arch/x86/xen/xen-ops.h
@@ -57,8 +57,6 @@ irqreturn_t xen_debug_interrupt(int irq, void *dev_id);
57 57
58bool xen_vcpu_stolen(int vcpu); 58bool xen_vcpu_stolen(int vcpu);
59 59
60void xen_mark_init_mm_pinned(void);
61
62void xen_setup_vcpu_info_placement(void); 60void xen_setup_vcpu_info_placement(void);
63 61
64#ifdef CONFIG_SMP 62#ifdef CONFIG_SMP