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authorStephen Warren <swarren@nvidia.com>2012-11-07 18:32:41 -0500
committerStephen Warren <swarren@nvidia.com>2012-12-24 11:36:35 -0500
commit49356ae94c8238eb3945244f4e5a0a263eafba24 (patch)
treecac5332bbe41903451091d43fa3fca82b7faf5a7 /arch
parent23c197b77f9553c30f9c8a5ab41279a35f135f37 (diff)
ARM: at91: convert timer suspend/resume to clock_event_device
Move at91's timer suspend/resume functions from struct sys_timer at91sam926x_timer into struct clock_event_device pit_clkevt. This will allow the sys_timer suspend/resume fields to be removed, and eventually lead to a complete removal of struct sys_timer. Cc: Andrew Victor <linux@maxim.org.za> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-at91/at91sam926x_time.c47
1 files changed, 26 insertions, 21 deletions
diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c
index 358412f1f5f8..f7191e11df27 100644
--- a/arch/arm/mach-at91/at91sam926x_time.c
+++ b/arch/arm/mach-at91/at91sam926x_time.c
@@ -104,12 +104,38 @@ pit_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
104 } 104 }
105} 105}
106 106
107static void at91sam926x_pit_suspend(struct clock_event_device *cedev)
108{
109 /* Disable timer */
110 pit_write(AT91_PIT_MR, 0);
111}
112
113static void at91sam926x_pit_reset(void)
114{
115 /* Disable timer and irqs */
116 pit_write(AT91_PIT_MR, 0);
117
118 /* Clear any pending interrupts, wait for PIT to stop counting */
119 while (PIT_CPIV(pit_read(AT91_PIT_PIVR)) != 0)
120 cpu_relax();
121
122 /* Start PIT but don't enable IRQ */
123 pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN);
124}
125
126static void at91sam926x_pit_resume(struct clock_event_device *cedev)
127{
128 at91sam926x_pit_reset();
129}
130
107static struct clock_event_device pit_clkevt = { 131static struct clock_event_device pit_clkevt = {
108 .name = "pit", 132 .name = "pit",
109 .features = CLOCK_EVT_FEAT_PERIODIC, 133 .features = CLOCK_EVT_FEAT_PERIODIC,
110 .shift = 32, 134 .shift = 32,
111 .rating = 100, 135 .rating = 100,
112 .set_mode = pit_clkevt_mode, 136 .set_mode = pit_clkevt_mode,
137 .suspend = at91sam926x_pit_suspend,
138 .resume = at91sam926x_pit_resume,
113}; 139};
114 140
115 141
@@ -150,19 +176,6 @@ static struct irqaction at91sam926x_pit_irq = {
150 .irq = NR_IRQS_LEGACY + AT91_ID_SYS, 176 .irq = NR_IRQS_LEGACY + AT91_ID_SYS,
151}; 177};
152 178
153static void at91sam926x_pit_reset(void)
154{
155 /* Disable timer and irqs */
156 pit_write(AT91_PIT_MR, 0);
157
158 /* Clear any pending interrupts, wait for PIT to stop counting */
159 while (PIT_CPIV(pit_read(AT91_PIT_PIVR)) != 0)
160 cpu_relax();
161
162 /* Start PIT but don't enable IRQ */
163 pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN);
164}
165
166#ifdef CONFIG_OF 179#ifdef CONFIG_OF
167static struct of_device_id pit_timer_ids[] = { 180static struct of_device_id pit_timer_ids[] = {
168 { .compatible = "atmel,at91sam9260-pit" }, 181 { .compatible = "atmel,at91sam9260-pit" },
@@ -250,12 +263,6 @@ static void __init at91sam926x_pit_init(void)
250 clockevents_register_device(&pit_clkevt); 263 clockevents_register_device(&pit_clkevt);
251} 264}
252 265
253static void at91sam926x_pit_suspend(void)
254{
255 /* Disable timer */
256 pit_write(AT91_PIT_MR, 0);
257}
258
259void __init at91sam926x_ioremap_pit(u32 addr) 266void __init at91sam926x_ioremap_pit(u32 addr)
260{ 267{
261#if defined(CONFIG_OF) 268#if defined(CONFIG_OF)
@@ -275,6 +282,4 @@ void __init at91sam926x_ioremap_pit(u32 addr)
275 282
276struct sys_timer at91sam926x_timer = { 283struct sys_timer at91sam926x_timer = {
277 .init = at91sam926x_pit_init, 284 .init = at91sam926x_pit_init,
278 .suspend = at91sam926x_pit_suspend,
279 .resume = at91sam926x_pit_reset,
280}; 285};