diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-04-07 14:14:49 -0400 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-04-07 14:14:49 -0400 |
| commit | 42933bac11e811f02200c944d8562a15f8ec4ff0 (patch) | |
| tree | fcdd9afe56eb0e746565ddd1f92f22d36678b843 /arch | |
| parent | 2b9accbee563f535046ff2cd382d0acaa92e130c (diff) | |
| parent | 25985edcedea6396277003854657b5f3cb31a628 (diff) | |
Merge branch 'for-linus2' of git://git.profusion.mobi/users/lucas/linux-2.6
* 'for-linus2' of git://git.profusion.mobi/users/lucas/linux-2.6:
Fix common misspellings
Diffstat (limited to 'arch')
403 files changed, 523 insertions, 523 deletions
diff --git a/arch/alpha/include/asm/elf.h b/arch/alpha/include/asm/elf.h index 9baae8afe8a3..da5449e22175 100644 --- a/arch/alpha/include/asm/elf.h +++ b/arch/alpha/include/asm/elf.h | |||
| @@ -101,7 +101,7 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG]; | |||
| 101 | 101 | ||
| 102 | #define ELF_PLAT_INIT(_r, load_addr) _r->r0 = 0 | 102 | #define ELF_PLAT_INIT(_r, load_addr) _r->r0 = 0 |
| 103 | 103 | ||
| 104 | /* The registers are layed out in pt_regs for PAL and syscall | 104 | /* The registers are laid out in pt_regs for PAL and syscall |
| 105 | convenience. Re-order them for the linear elf_gregset_t. */ | 105 | convenience. Re-order them for the linear elf_gregset_t. */ |
| 106 | 106 | ||
| 107 | struct pt_regs; | 107 | struct pt_regs; |
diff --git a/arch/alpha/kernel/core_lca.c b/arch/alpha/kernel/core_lca.c index 4843f6ec9f3a..cb2801cfd3df 100644 --- a/arch/alpha/kernel/core_lca.c +++ b/arch/alpha/kernel/core_lca.c | |||
| @@ -133,7 +133,7 @@ conf_read(unsigned long addr) | |||
| 133 | 133 | ||
| 134 | local_irq_save(flags); | 134 | local_irq_save(flags); |
| 135 | 135 | ||
| 136 | /* Reset status register to avoid loosing errors. */ | 136 | /* Reset status register to avoid losing errors. */ |
| 137 | stat0 = *(vulp)LCA_IOC_STAT0; | 137 | stat0 = *(vulp)LCA_IOC_STAT0; |
| 138 | *(vulp)LCA_IOC_STAT0 = stat0; | 138 | *(vulp)LCA_IOC_STAT0 = stat0; |
| 139 | mb(); | 139 | mb(); |
| @@ -170,7 +170,7 @@ conf_write(unsigned long addr, unsigned int value) | |||
| 170 | 170 | ||
| 171 | local_irq_save(flags); /* avoid getting hit by machine check */ | 171 | local_irq_save(flags); /* avoid getting hit by machine check */ |
| 172 | 172 | ||
| 173 | /* Reset status register to avoid loosing errors. */ | 173 | /* Reset status register to avoid losing errors. */ |
| 174 | stat0 = *(vulp)LCA_IOC_STAT0; | 174 | stat0 = *(vulp)LCA_IOC_STAT0; |
| 175 | *(vulp)LCA_IOC_STAT0 = stat0; | 175 | *(vulp)LCA_IOC_STAT0 = stat0; |
| 176 | mb(); | 176 | mb(); |
diff --git a/arch/alpha/kernel/err_marvel.c b/arch/alpha/kernel/err_marvel.c index 648ae88aeb8a..ae54ad91e18f 100644 --- a/arch/alpha/kernel/err_marvel.c +++ b/arch/alpha/kernel/err_marvel.c | |||
| @@ -1027,7 +1027,7 @@ marvel_process_logout_frame(struct ev7_lf_subpackets *lf_subpackets, int print) | |||
| 1027 | * normal operation, dismiss them. | 1027 | * normal operation, dismiss them. |
| 1028 | * | 1028 | * |
| 1029 | * Dismiss if: | 1029 | * Dismiss if: |
| 1030 | * C_STAT = 0x14 (Error Reponse) | 1030 | * C_STAT = 0x14 (Error Response) |
| 1031 | * C_STS<3> = 0 (C_ADDR valid) | 1031 | * C_STS<3> = 0 (C_ADDR valid) |
| 1032 | * C_ADDR<42> = 1 (I/O) | 1032 | * C_ADDR<42> = 1 (I/O) |
| 1033 | * C_ADDR<31:22> = 111110xxb (PCI Config space) | 1033 | * C_ADDR<31:22> = 111110xxb (PCI Config space) |
diff --git a/arch/alpha/lib/ev67-strrchr.S b/arch/alpha/lib/ev67-strrchr.S index 3fd8bf414c7b..dd0d8c6b9f59 100644 --- a/arch/alpha/lib/ev67-strrchr.S +++ b/arch/alpha/lib/ev67-strrchr.S | |||
| @@ -82,7 +82,7 @@ $loop: | |||
| 82 | $eos: | 82 | $eos: |
| 83 | negq t1, t4 # E : isolate first null byte match | 83 | negq t1, t4 # E : isolate first null byte match |
| 84 | and t1, t4, t4 # E : | 84 | and t1, t4, t4 # E : |
| 85 | subq t4, 1, t5 # E : build a mask of the bytes upto... | 85 | subq t4, 1, t5 # E : build a mask of the bytes up to... |
| 86 | or t4, t5, t4 # E : ... and including the null | 86 | or t4, t5, t4 # E : ... and including the null |
| 87 | 87 | ||
| 88 | and t3, t4, t3 # E : mask out char matches after null | 88 | and t3, t4, t3 # E : mask out char matches after null |
diff --git a/arch/alpha/lib/fls.c b/arch/alpha/lib/fls.c index 32afaa3fa686..ddd048c0d825 100644 --- a/arch/alpha/lib/fls.c +++ b/arch/alpha/lib/fls.c | |||
| @@ -6,7 +6,7 @@ | |||
| 6 | #include <linux/bitops.h> | 6 | #include <linux/bitops.h> |
| 7 | 7 | ||
| 8 | /* This is fls(x)-1, except zero is held to zero. This allows most | 8 | /* This is fls(x)-1, except zero is held to zero. This allows most |
| 9 | efficent input into extbl, plus it allows easy handling of fls(0)=0. */ | 9 | efficient input into extbl, plus it allows easy handling of fls(0)=0. */ |
| 10 | 10 | ||
| 11 | const unsigned char __flsm1_tab[256] = | 11 | const unsigned char __flsm1_tab[256] = |
| 12 | { | 12 | { |
diff --git a/arch/alpha/lib/strrchr.S b/arch/alpha/lib/strrchr.S index 82cfd0ac907b..1970dc07cfd1 100644 --- a/arch/alpha/lib/strrchr.S +++ b/arch/alpha/lib/strrchr.S | |||
| @@ -54,7 +54,7 @@ $loop: | |||
| 54 | $eos: | 54 | $eos: |
| 55 | negq t1, t4 # e0 : isolate first null byte match | 55 | negq t1, t4 # e0 : isolate first null byte match |
| 56 | and t1, t4, t4 # e1 : | 56 | and t1, t4, t4 # e1 : |
| 57 | subq t4, 1, t5 # e0 : build a mask of the bytes upto... | 57 | subq t4, 1, t5 # e0 : build a mask of the bytes up to... |
| 58 | or t4, t5, t4 # e1 : ... and including the null | 58 | or t4, t5, t4 # e1 : ... and including the null |
| 59 | 59 | ||
| 60 | and t3, t4, t3 # e0 : mask out char matches after null | 60 | and t3, t4, t3 # e0 : mask out char matches after null |
diff --git a/arch/alpha/oprofile/op_model_ev67.c b/arch/alpha/oprofile/op_model_ev67.c index 70302086283c..5b9d178e0228 100644 --- a/arch/alpha/oprofile/op_model_ev67.c +++ b/arch/alpha/oprofile/op_model_ev67.c | |||
| @@ -192,7 +192,7 @@ ev67_handle_interrupt(unsigned long which, struct pt_regs *regs, | |||
| 192 | case TRAP_INVALID1: | 192 | case TRAP_INVALID1: |
| 193 | case TRAP_INVALID2: | 193 | case TRAP_INVALID2: |
| 194 | case TRAP_INVALID3: | 194 | case TRAP_INVALID3: |
| 195 | /* Pipeline redirection ocurred. PMPC points | 195 | /* Pipeline redirection occurred. PMPC points |
| 196 | to PALcode. Recognize ITB miss by PALcode | 196 | to PALcode. Recognize ITB miss by PALcode |
| 197 | offset address, and get actual PC from | 197 | offset address, and get actual PC from |
| 198 | EXC_ADDR. */ | 198 | EXC_ADDR. */ |
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 5b9f78b570e8..fdc9d4dbf85b 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
| @@ -694,7 +694,7 @@ config ARCH_S3C2410 | |||
| 694 | the Samsung SMDK2410 development board (and derivatives). | 694 | the Samsung SMDK2410 development board (and derivatives). |
| 695 | 695 | ||
| 696 | Note, the S3C2416 and the S3C2450 are so close that they even share | 696 | Note, the S3C2416 and the S3C2450 are so close that they even share |
| 697 | the same SoC ID code. This means that there is no seperate machine | 697 | the same SoC ID code. This means that there is no separate machine |
| 698 | directory (no arch/arm/mach-s3c2450) as the S3C2416 was first. | 698 | directory (no arch/arm/mach-s3c2450) as the S3C2416 was first. |
| 699 | 699 | ||
| 700 | config ARCH_S3C64XX | 700 | config ARCH_S3C64XX |
diff --git a/arch/arm/Kconfig-nommu b/arch/arm/Kconfig-nommu index 901e6dff8437..2cef8e13f9f8 100644 --- a/arch/arm/Kconfig-nommu +++ b/arch/arm/Kconfig-nommu | |||
| @@ -34,7 +34,7 @@ config PROCESSOR_ID | |||
| 34 | used instead of the auto-probing which utilizes the register. | 34 | used instead of the auto-probing which utilizes the register. |
| 35 | 35 | ||
| 36 | config REMAP_VECTORS_TO_RAM | 36 | config REMAP_VECTORS_TO_RAM |
| 37 | bool 'Install vectors to the begining of RAM' if DRAM_BASE | 37 | bool 'Install vectors to the beginning of RAM' if DRAM_BASE |
| 38 | depends on DRAM_BASE | 38 | depends on DRAM_BASE |
| 39 | help | 39 | help |
| 40 | The kernel needs to change the hardware exception vectors. | 40 | The kernel needs to change the hardware exception vectors. |
diff --git a/arch/arm/common/pl330.c b/arch/arm/common/pl330.c index 8f0f86db3602..97912fa48782 100644 --- a/arch/arm/common/pl330.c +++ b/arch/arm/common/pl330.c | |||
| @@ -1045,7 +1045,7 @@ static inline int _loop(unsigned dry_run, u8 buf[], | |||
| 1045 | unsigned lcnt0, lcnt1, ljmp0, ljmp1; | 1045 | unsigned lcnt0, lcnt1, ljmp0, ljmp1; |
| 1046 | struct _arg_LPEND lpend; | 1046 | struct _arg_LPEND lpend; |
| 1047 | 1047 | ||
| 1048 | /* Max iterations possibile in DMALP is 256 */ | 1048 | /* Max iterations possible in DMALP is 256 */ |
| 1049 | if (*bursts >= 256*256) { | 1049 | if (*bursts >= 256*256) { |
| 1050 | lcnt1 = 256; | 1050 | lcnt1 = 256; |
| 1051 | lcnt0 = 256; | 1051 | lcnt0 = 256; |
| @@ -1446,7 +1446,7 @@ int pl330_update(const struct pl330_info *pi) | |||
| 1446 | } | 1446 | } |
| 1447 | 1447 | ||
| 1448 | for (ev = 0; ev < pi->pcfg.num_events; ev++) { | 1448 | for (ev = 0; ev < pi->pcfg.num_events; ev++) { |
| 1449 | if (val & (1 << ev)) { /* Event occured */ | 1449 | if (val & (1 << ev)) { /* Event occurred */ |
| 1450 | struct pl330_thread *thrd; | 1450 | struct pl330_thread *thrd; |
| 1451 | u32 inten = readl(regs + INTEN); | 1451 | u32 inten = readl(regs + INTEN); |
| 1452 | int active; | 1452 | int active; |
diff --git a/arch/arm/include/asm/fpstate.h b/arch/arm/include/asm/fpstate.h index ee5e03efc1bb..3ad4c10d0d84 100644 --- a/arch/arm/include/asm/fpstate.h +++ b/arch/arm/include/asm/fpstate.h | |||
| @@ -18,7 +18,7 @@ | |||
| 18 | * VFP storage area has: | 18 | * VFP storage area has: |
| 19 | * - FPEXC, FPSCR, FPINST and FPINST2. | 19 | * - FPEXC, FPSCR, FPINST and FPINST2. |
| 20 | * - 16 or 32 double precision data registers | 20 | * - 16 or 32 double precision data registers |
| 21 | * - an implementation-dependant word of state for FLDMX/FSTMX (pre-ARMv6) | 21 | * - an implementation-dependent word of state for FLDMX/FSTMX (pre-ARMv6) |
| 22 | * | 22 | * |
| 23 | * FPEXC will always be non-zero once the VFP has been used in this process. | 23 | * FPEXC will always be non-zero once the VFP has been used in this process. |
| 24 | */ | 24 | */ |
diff --git a/arch/arm/include/asm/glue-cache.h b/arch/arm/include/asm/glue-cache.h index c7afbc552c7f..7e30874377e6 100644 --- a/arch/arm/include/asm/glue-cache.h +++ b/arch/arm/include/asm/glue-cache.h | |||
| @@ -126,7 +126,7 @@ | |||
| 126 | #endif | 126 | #endif |
| 127 | 127 | ||
| 128 | #if !defined(_CACHE) && !defined(MULTI_CACHE) | 128 | #if !defined(_CACHE) && !defined(MULTI_CACHE) |
| 129 | #error Unknown cache maintainence model | 129 | #error Unknown cache maintenance model |
| 130 | #endif | 130 | #endif |
| 131 | 131 | ||
| 132 | #ifndef MULTI_CACHE | 132 | #ifndef MULTI_CACHE |
diff --git a/arch/arm/include/asm/glue.h b/arch/arm/include/asm/glue.h index 0ec35d1698aa..fbf71d75ec83 100644 --- a/arch/arm/include/asm/glue.h +++ b/arch/arm/include/asm/glue.h | |||
| @@ -10,8 +10,8 @@ | |||
| 10 | * | 10 | * |
| 11 | * This file provides the glue to stick the processor-specific bits | 11 | * This file provides the glue to stick the processor-specific bits |
| 12 | * into the kernel in an efficient manner. The idea is to use branches | 12 | * into the kernel in an efficient manner. The idea is to use branches |
| 13 | * when we're only targetting one class of TLB, or indirect calls | 13 | * when we're only targeting one class of TLB, or indirect calls |
| 14 | * when we're targetting multiple classes of TLBs. | 14 | * when we're targeting multiple classes of TLBs. |
| 15 | */ | 15 | */ |
| 16 | #ifdef __KERNEL__ | 16 | #ifdef __KERNEL__ |
| 17 | 17 | ||
diff --git a/arch/arm/include/asm/hardware/pl080.h b/arch/arm/include/asm/hardware/pl080.h index f35b86e68dd5..e4a04e4e5627 100644 --- a/arch/arm/include/asm/hardware/pl080.h +++ b/arch/arm/include/asm/hardware/pl080.h | |||
| @@ -16,7 +16,7 @@ | |||
| 16 | * make it not entierly compatible with the PL080 specification from | 16 | * make it not entierly compatible with the PL080 specification from |
| 17 | * ARM. When in doubt, check the Samsung documentation first. | 17 | * ARM. When in doubt, check the Samsung documentation first. |
| 18 | * | 18 | * |
| 19 | * The Samsung defines are PL080S, and add an extra controll register, | 19 | * The Samsung defines are PL080S, and add an extra control register, |
| 20 | * the ability to move more than 2^11 counts of data and some extra | 20 | * the ability to move more than 2^11 counts of data and some extra |
| 21 | * OneNAND features. | 21 | * OneNAND features. |
| 22 | */ | 22 | */ |
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 9a87823642d0..885be097769d 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h | |||
| @@ -249,7 +249,7 @@ do { \ | |||
| 249 | * cache totally. This means that the cache becomes inconsistent, and, | 249 | * cache totally. This means that the cache becomes inconsistent, and, |
| 250 | * since we use normal loads/stores as well, this is really bad. | 250 | * since we use normal loads/stores as well, this is really bad. |
| 251 | * Typically, this causes oopsen in filp_close, but could have other, | 251 | * Typically, this causes oopsen in filp_close, but could have other, |
| 252 | * more disasterous effects. There are two work-arounds: | 252 | * more disastrous effects. There are two work-arounds: |
| 253 | * 1. Disable interrupts and emulate the atomic swap | 253 | * 1. Disable interrupts and emulate the atomic swap |
| 254 | * 2. Clean the cache, perform atomic swap, flush the cache | 254 | * 2. Clean the cache, perform atomic swap, flush the cache |
| 255 | * | 255 | * |
diff --git a/arch/arm/include/asm/ucontext.h b/arch/arm/include/asm/ucontext.h index 47f023aa8495..14749aec94bf 100644 --- a/arch/arm/include/asm/ucontext.h +++ b/arch/arm/include/asm/ucontext.h | |||
| @@ -47,7 +47,7 @@ struct crunch_sigframe { | |||
| 47 | #endif | 47 | #endif |
| 48 | 48 | ||
| 49 | #ifdef CONFIG_IWMMXT | 49 | #ifdef CONFIG_IWMMXT |
| 50 | /* iwmmxt_area is 0x98 bytes long, preceeded by 8 bytes of signature */ | 50 | /* iwmmxt_area is 0x98 bytes long, preceded by 8 bytes of signature */ |
| 51 | #define IWMMXT_MAGIC 0x12ef842a | 51 | #define IWMMXT_MAGIC 0x12ef842a |
| 52 | #define IWMMXT_STORAGE_SIZE (IWMMXT_SIZE + 8) | 52 | #define IWMMXT_STORAGE_SIZE (IWMMXT_SIZE + 8) |
| 53 | 53 | ||
diff --git a/arch/arm/kernel/swp_emulate.c b/arch/arm/kernel/swp_emulate.c index 7a5760922914..40ee7e5045e4 100644 --- a/arch/arm/kernel/swp_emulate.c +++ b/arch/arm/kernel/swp_emulate.c | |||
| @@ -158,7 +158,7 @@ static int emulate_swpX(unsigned int address, unsigned int *data, | |||
| 158 | 158 | ||
| 159 | if (res == 0) { | 159 | if (res == 0) { |
| 160 | /* | 160 | /* |
| 161 | * Barrier also required between aquiring a lock for a | 161 | * Barrier also required between acquiring a lock for a |
| 162 | * protected resource and accessing the resource. Inserted for | 162 | * protected resource and accessing the resource. Inserted for |
| 163 | * same reason as above. | 163 | * same reason as above. |
| 164 | */ | 164 | */ |
diff --git a/arch/arm/mach-at91/board-carmeva.c b/arch/arm/mach-at91/board-carmeva.c index 2e74a19874d1..295e1e77fa60 100644 --- a/arch/arm/mach-at91/board-carmeva.c +++ b/arch/arm/mach-at91/board-carmeva.c | |||
| @@ -76,7 +76,7 @@ static struct at91_udc_data __initdata carmeva_udc_data = { | |||
| 76 | .pullup_pin = AT91_PIN_PD9, | 76 | .pullup_pin = AT91_PIN_PD9, |
| 77 | }; | 77 | }; |
| 78 | 78 | ||
| 79 | /* FIXME: user dependant */ | 79 | /* FIXME: user dependent */ |
| 80 | // static struct at91_cf_data __initdata carmeva_cf_data = { | 80 | // static struct at91_cf_data __initdata carmeva_cf_data = { |
| 81 | // .det_pin = AT91_PIN_PB0, | 81 | // .det_pin = AT91_PIN_PB0, |
| 82 | // .rst_pin = AT91_PIN_PC5, | 82 | // .rst_pin = AT91_PIN_PC5, |
diff --git a/arch/arm/mach-at91/include/mach/at91_mci.h b/arch/arm/mach-at91/include/mach/at91_mci.h index 27ac6f550fe3..02182c16a022 100644 --- a/arch/arm/mach-at91/include/mach/at91_mci.h +++ b/arch/arm/mach-at91/include/mach/at91_mci.h | |||
| @@ -102,7 +102,7 @@ | |||
| 102 | #define AT91_MCI_RDIRE (1 << 17) /* Response Direction Error */ | 102 | #define AT91_MCI_RDIRE (1 << 17) /* Response Direction Error */ |
| 103 | #define AT91_MCI_RCRCE (1 << 18) /* Response CRC Error */ | 103 | #define AT91_MCI_RCRCE (1 << 18) /* Response CRC Error */ |
| 104 | #define AT91_MCI_RENDE (1 << 19) /* Response End Bit Error */ | 104 | #define AT91_MCI_RENDE (1 << 19) /* Response End Bit Error */ |
| 105 | #define AT91_MCI_RTOE (1 << 20) /* Reponse Time-out Error */ | 105 | #define AT91_MCI_RTOE (1 << 20) /* Response Time-out Error */ |
| 106 | #define AT91_MCI_DCRCE (1 << 21) /* Data CRC Error */ | 106 | #define AT91_MCI_DCRCE (1 << 21) /* Data CRC Error */ |
| 107 | #define AT91_MCI_DTOE (1 << 22) /* Data Time-out Error */ | 107 | #define AT91_MCI_DTOE (1 << 22) /* Data Time-out Error */ |
| 108 | #define AT91_MCI_OVRE (1 << 30) /* Overrun */ | 108 | #define AT91_MCI_OVRE (1 << 30) /* Overrun */ |
diff --git a/arch/arm/mach-at91/include/mach/gpio.h b/arch/arm/mach-at91/include/mach/gpio.h index ddeb64536756..056dc6674b6b 100644 --- a/arch/arm/mach-at91/include/mach/gpio.h +++ b/arch/arm/mach-at91/include/mach/gpio.h | |||
| @@ -208,7 +208,7 @@ extern void at91_gpio_resume(void); | |||
| 208 | 208 | ||
| 209 | /*-------------------------------------------------------------------------*/ | 209 | /*-------------------------------------------------------------------------*/ |
| 210 | 210 | ||
| 211 | /* wrappers for "new style" GPIO calls. the old AT91-specfic ones should | 211 | /* wrappers for "new style" GPIO calls. the old AT91-specific ones should |
| 212 | * eventually be removed (along with this errno.h inclusion), and the | 212 | * eventually be removed (along with this errno.h inclusion), and the |
| 213 | * gpio request/free calls should probably be implemented. | 213 | * gpio request/free calls should probably be implemented. |
| 214 | */ | 214 | */ |
diff --git a/arch/arm/mach-bcmring/csp/dmac/dmacHw_extra.c b/arch/arm/mach-bcmring/csp/dmac/dmacHw_extra.c index 77f84b40dda9..a1f328357aa4 100644 --- a/arch/arm/mach-bcmring/csp/dmac/dmacHw_extra.c +++ b/arch/arm/mach-bcmring/csp/dmac/dmacHw_extra.c | |||
| @@ -551,7 +551,7 @@ int dmacHw_calculateDescriptorCount(dmacHw_CONFIG_t *pConfig, /* [ IN ] Config | |||
| 551 | 551 | ||
| 552 | /****************************************************************************/ | 552 | /****************************************************************************/ |
| 553 | /** | 553 | /** |
| 554 | * @brief Check the existance of pending descriptor | 554 | * @brief Check the existence of pending descriptor |
| 555 | * | 555 | * |
| 556 | * This function confirmes if there is any pending descriptor in the chain | 556 | * This function confirmes if there is any pending descriptor in the chain |
| 557 | * to program the channel | 557 | * to program the channel |
| @@ -775,7 +775,7 @@ int dmacHw_setVariableDataDescriptor(dmacHw_HANDLE_t handle, /* [ IN ] DMA Cha | |||
| 775 | /** | 775 | /** |
| 776 | * @brief Read data DMAed to memory | 776 | * @brief Read data DMAed to memory |
| 777 | * | 777 | * |
| 778 | * This function will read data that has been DMAed to memory while transfering from: | 778 | * This function will read data that has been DMAed to memory while transferring from: |
| 779 | * - Memory to memory | 779 | * - Memory to memory |
| 780 | * - Peripheral to memory | 780 | * - Peripheral to memory |
| 781 | * | 781 | * |
| @@ -941,7 +941,7 @@ int dmacHw_setControlDescriptor(dmacHw_CONFIG_t *pConfig, /* [ IN ] Configurat | |||
| 941 | /** | 941 | /** |
| 942 | * @brief Sets channel specific user data | 942 | * @brief Sets channel specific user data |
| 943 | * | 943 | * |
| 944 | * This function associates user data to a specif DMA channel | 944 | * This function associates user data to a specific DMA channel |
| 945 | * | 945 | * |
| 946 | */ | 946 | */ |
| 947 | /****************************************************************************/ | 947 | /****************************************************************************/ |
diff --git a/arch/arm/mach-bcmring/dma.c b/arch/arm/mach-bcmring/dma.c index 8d1baf3f4683..d87ad30dda35 100644 --- a/arch/arm/mach-bcmring/dma.c +++ b/arch/arm/mach-bcmring/dma.c | |||
| @@ -629,7 +629,7 @@ EXPORT_SYMBOL(dma_get_device_descriptor_ring); | |||
| 629 | * Configures a DMA channel. | 629 | * Configures a DMA channel. |
| 630 | * | 630 | * |
| 631 | * @return | 631 | * @return |
| 632 | * >= 0 - Initialization was successfull. | 632 | * >= 0 - Initialization was successful. |
| 633 | * | 633 | * |
| 634 | * -EBUSY - Device is currently being used. | 634 | * -EBUSY - Device is currently being used. |
| 635 | * -ENODEV - Device handed in is invalid. | 635 | * -ENODEV - Device handed in is invalid. |
| @@ -673,7 +673,7 @@ static int ConfigChannel(DMA_Handle_t handle) | |||
| 673 | /** | 673 | /** |
| 674 | * Initializes all of the data structures associated with the DMA. | 674 | * Initializes all of the data structures associated with the DMA. |
| 675 | * @return | 675 | * @return |
| 676 | * >= 0 - Initialization was successfull. | 676 | * >= 0 - Initialization was successful. |
| 677 | * | 677 | * |
| 678 | * -EBUSY - Device is currently being used. | 678 | * -EBUSY - Device is currently being used. |
| 679 | * -ENODEV - Device handed in is invalid. | 679 | * -ENODEV - Device handed in is invalid. |
diff --git a/arch/arm/mach-bcmring/include/csp/dmacHw.h b/arch/arm/mach-bcmring/include/csp/dmacHw.h index 6c8da2b9fc1f..e6a1dc484ca7 100644 --- a/arch/arm/mach-bcmring/include/csp/dmacHw.h +++ b/arch/arm/mach-bcmring/include/csp/dmacHw.h | |||
| @@ -362,7 +362,7 @@ int dmacHw_setControlDescriptor(dmacHw_CONFIG_t *pConfig, /* [ IN ] Configurati | |||
| 362 | /** | 362 | /** |
| 363 | * @brief Read data DMA transferred to memory | 363 | * @brief Read data DMA transferred to memory |
| 364 | * | 364 | * |
| 365 | * This function will read data that has been DMAed to memory while transfering from: | 365 | * This function will read data that has been DMAed to memory while transferring from: |
| 366 | * - Memory to memory | 366 | * - Memory to memory |
| 367 | * - Peripheral to memory | 367 | * - Peripheral to memory |
| 368 | * | 368 | * |
| @@ -446,7 +446,7 @@ void dmacHw_stopTransfer(dmacHw_HANDLE_t handle /* [ IN ] DMA Channel handle * | |||
| 446 | 446 | ||
| 447 | /****************************************************************************/ | 447 | /****************************************************************************/ |
| 448 | /** | 448 | /** |
| 449 | * @brief Check the existance of pending descriptor | 449 | * @brief Check the existence of pending descriptor |
| 450 | * | 450 | * |
| 451 | * This function confirmes if there is any pending descriptor in the chain | 451 | * This function confirmes if there is any pending descriptor in the chain |
| 452 | * to program the channel | 452 | * to program the channel |
| @@ -542,7 +542,7 @@ dmacHw_HANDLE_t dmacHw_getInterruptSource(void); | |||
| 542 | /** | 542 | /** |
| 543 | * @brief Sets channel specific user data | 543 | * @brief Sets channel specific user data |
| 544 | * | 544 | * |
| 545 | * This function associates user data to a specif DMA channel | 545 | * This function associates user data to a specific DMA channel |
| 546 | * | 546 | * |
| 547 | */ | 547 | */ |
| 548 | /****************************************************************************/ | 548 | /****************************************************************************/ |
diff --git a/arch/arm/mach-bcmring/include/mach/csp/chipcHw_def.h b/arch/arm/mach-bcmring/include/mach/csp/chipcHw_def.h index 70eaea866cfe..161973385faf 100644 --- a/arch/arm/mach-bcmring/include/mach/csp/chipcHw_def.h +++ b/arch/arm/mach-bcmring/include/mach/csp/chipcHw_def.h | |||
| @@ -180,7 +180,7 @@ typedef enum { | |||
| 180 | 180 | ||
| 181 | #define chipcHw_XTAL_FREQ_Hz 25000000 /* Reference clock frequency in Hz */ | 181 | #define chipcHw_XTAL_FREQ_Hz 25000000 /* Reference clock frequency in Hz */ |
| 182 | 182 | ||
| 183 | /* Programable pin defines */ | 183 | /* Programmable pin defines */ |
| 184 | #define chipcHw_PIN_GPIO(n) ((((n) >= 0) && ((n) < (chipcHw_GPIO_COUNT))) ? (n) : 0xFFFFFFFF) | 184 | #define chipcHw_PIN_GPIO(n) ((((n) >= 0) && ((n) < (chipcHw_GPIO_COUNT))) ? (n) : 0xFFFFFFFF) |
| 185 | /* GPIO pin 0 - 60 */ | 185 | /* GPIO pin 0 - 60 */ |
| 186 | #define chipcHw_PIN_UARTTXD (chipcHw_GPIO_COUNT + 0) /* UART Transmit */ | 186 | #define chipcHw_PIN_UARTTXD (chipcHw_GPIO_COUNT + 0) /* UART Transmit */ |
diff --git a/arch/arm/mach-bcmring/include/mach/csp/chipcHw_inline.h b/arch/arm/mach-bcmring/include/mach/csp/chipcHw_inline.h index c78833acb37a..03238c299001 100644 --- a/arch/arm/mach-bcmring/include/mach/csp/chipcHw_inline.h +++ b/arch/arm/mach-bcmring/include/mach/csp/chipcHw_inline.h | |||
| @@ -832,7 +832,7 @@ static inline void chipcHw_setUsbDevice(void) | |||
| 832 | 832 | ||
| 833 | /****************************************************************************/ | 833 | /****************************************************************************/ |
| 834 | /** | 834 | /** |
| 835 | * @brief Lower layer funtion to enable/disable a clock of a certain device | 835 | * @brief Lower layer function to enable/disable a clock of a certain device |
| 836 | * | 836 | * |
| 837 | * This function enables/disables a core clock | 837 | * This function enables/disables a core clock |
| 838 | * | 838 | * |
diff --git a/arch/arm/mach-bcmring/include/mach/csp/intcHw_reg.h b/arch/arm/mach-bcmring/include/mach/csp/intcHw_reg.h index e01fc4607c91..0aeb6a6fe7f8 100644 --- a/arch/arm/mach-bcmring/include/mach/csp/intcHw_reg.h +++ b/arch/arm/mach-bcmring/include/mach/csp/intcHw_reg.h | |||
| @@ -109,9 +109,9 @@ | |||
| 109 | #define INTCHW_INTC0_DMA0C0 (1<<INTCHW_INTC0_DMA0C0_BITNUM) | 109 | #define INTCHW_INTC0_DMA0C0 (1<<INTCHW_INTC0_DMA0C0_BITNUM) |
| 110 | 110 | ||
| 111 | /* INTC1 - interrupt controller 1 */ | 111 | /* INTC1 - interrupt controller 1 */ |
| 112 | #define INTCHW_INTC1_DDRVPMP_BITNUM 27 /* DDR and VPM PLL clock phase relationship interupt (Not for A0) */ | 112 | #define INTCHW_INTC1_DDRVPMP_BITNUM 27 /* DDR and VPM PLL clock phase relationship interrupt (Not for A0) */ |
| 113 | #define INTCHW_INTC1_DDRVPMT_BITNUM 26 /* DDR and VPM HW phase align timeout interrupt (Not for A0) */ | 113 | #define INTCHW_INTC1_DDRVPMT_BITNUM 26 /* DDR and VPM HW phase align timeout interrupt (Not for A0) */ |
| 114 | #define INTCHW_INTC1_DDRP_BITNUM 26 /* DDR and PLL clock phase relationship interupt (For A0 only)) */ | 114 | #define INTCHW_INTC1_DDRP_BITNUM 26 /* DDR and PLL clock phase relationship interrupt (For A0 only)) */ |
| 115 | #define INTCHW_INTC1_RTC2_BITNUM 25 /* Real time clock tamper interrupt */ | 115 | #define INTCHW_INTC1_RTC2_BITNUM 25 /* Real time clock tamper interrupt */ |
| 116 | #define INTCHW_INTC1_VDEC_BITNUM 24 /* Hantro Video Decoder interrupt */ | 116 | #define INTCHW_INTC1_VDEC_BITNUM 24 /* Hantro Video Decoder interrupt */ |
| 117 | /* Bits 13-23 are non-secure versions of the corresponding secure bits in SINTC bits 0-10. */ | 117 | /* Bits 13-23 are non-secure versions of the corresponding secure bits in SINTC bits 0-10. */ |
diff --git a/arch/arm/mach-bcmring/include/mach/reg_umi.h b/arch/arm/mach-bcmring/include/mach/reg_umi.h index 06a355481ea6..0992842caa77 100644 --- a/arch/arm/mach-bcmring/include/mach/reg_umi.h +++ b/arch/arm/mach-bcmring/include/mach/reg_umi.h | |||
| @@ -88,7 +88,7 @@ | |||
| 88 | /* REG_UMI_FLASH0/1/2_TCR, REG_UMI_SRAM0/1_TCR bits */ | 88 | /* REG_UMI_FLASH0/1/2_TCR, REG_UMI_SRAM0/1_TCR bits */ |
| 89 | /* Enable wait pin during burst write or read */ | 89 | /* Enable wait pin during burst write or read */ |
| 90 | #define REG_UMI_TCR_WAITEN 0x80000000 | 90 | #define REG_UMI_TCR_WAITEN 0x80000000 |
| 91 | /* Enable mem ctrlr to work iwth ext mem of lower freq than AHB clk */ | 91 | /* Enable mem ctrlr to work with ext mem of lower freq than AHB clk */ |
| 92 | #define REG_UMI_TCR_LOWFREQ 0x40000000 | 92 | #define REG_UMI_TCR_LOWFREQ 0x40000000 |
| 93 | /* 1=synch write, 0=async write */ | 93 | /* 1=synch write, 0=async write */ |
| 94 | #define REG_UMI_TCR_MEMTYPE_SYNCWRITE 0x20000000 | 94 | #define REG_UMI_TCR_MEMTYPE_SYNCWRITE 0x20000000 |
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c index 6c389ff1020e..3e7be2de96de 100644 --- a/arch/arm/mach-davinci/board-neuros-osd2.c +++ b/arch/arm/mach-davinci/board-neuros-osd2.c | |||
| @@ -11,7 +11,7 @@ | |||
| 11 | * DM644X-EVM board. It has: | 11 | * DM644X-EVM board. It has: |
| 12 | * DM6446M02 module with 256MB NAND, 256MB RAM, TLV320AIC32 AIC, | 12 | * DM6446M02 module with 256MB NAND, 256MB RAM, TLV320AIC32 AIC, |
| 13 | * USB, Ethernet, SD/MMC, UART, THS8200, TVP7000 for video. | 13 | * USB, Ethernet, SD/MMC, UART, THS8200, TVP7000 for video. |
| 14 | * Additionaly realtime clock, IR remote control receiver, | 14 | * Additionally realtime clock, IR remote control receiver, |
| 15 | * IR Blaster based on MSP430 (firmware although is different | 15 | * IR Blaster based on MSP430 (firmware although is different |
| 16 | * from used in DM644X-EVM), internal ATA-6 3.5” HDD drive | 16 | * from used in DM644X-EVM), internal ATA-6 3.5” HDD drive |
| 17 | * with PATA interface, two muxed red-green leds. | 17 | * with PATA interface, two muxed red-green leds. |
diff --git a/arch/arm/mach-davinci/cpufreq.c b/arch/arm/mach-davinci/cpufreq.c index 4a68c2b1ec11..0a95be1512bb 100644 --- a/arch/arm/mach-davinci/cpufreq.c +++ b/arch/arm/mach-davinci/cpufreq.c | |||
| @@ -167,7 +167,7 @@ static int davinci_cpu_init(struct cpufreq_policy *policy) | |||
| 167 | /* | 167 | /* |
| 168 | * Time measurement across the target() function yields ~1500-1800us | 168 | * Time measurement across the target() function yields ~1500-1800us |
| 169 | * time taken with no drivers on notification list. | 169 | * time taken with no drivers on notification list. |
| 170 | * Setting the latency to 2000 us to accomodate addition of drivers | 170 | * Setting the latency to 2000 us to accommodate addition of drivers |
| 171 | * to pre/post change notification list. | 171 | * to pre/post change notification list. |
| 172 | */ | 172 | */ |
| 173 | policy->cpuinfo.transition_latency = 2000 * 1000; | 173 | policy->cpuinfo.transition_latency = 2000 * 1000; |
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index 68fe4c289d77..b95b9196deed 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c | |||
| @@ -1123,7 +1123,7 @@ void __init da850_init(void) | |||
| 1123 | * This helps keeping the peripherals on this domain insulated | 1123 | * This helps keeping the peripherals on this domain insulated |
| 1124 | * from CPU frequency changes caused by DVFS. The firmware sets | 1124 | * from CPU frequency changes caused by DVFS. The firmware sets |
| 1125 | * both PLL0 and PLL1 to the same frequency so, there should not | 1125 | * both PLL0 and PLL1 to the same frequency so, there should not |
| 1126 | * be any noticible change even in non-DVFS use cases. | 1126 | * be any noticeable change even in non-DVFS use cases. |
| 1127 | */ | 1127 | */ |
| 1128 | da850_set_async3_src(1); | 1128 | da850_set_async3_src(1); |
| 1129 | 1129 | ||
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index 76364d1345df..f68012239641 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c | |||
| @@ -314,7 +314,7 @@ static struct clk timer2_clk = { | |||
| 314 | .name = "timer2", | 314 | .name = "timer2", |
| 315 | .parent = &pll1_aux_clk, | 315 | .parent = &pll1_aux_clk, |
| 316 | .lpsc = DAVINCI_LPSC_TIMER2, | 316 | .lpsc = DAVINCI_LPSC_TIMER2, |
| 317 | .usecount = 1, /* REVISIT: why cant' this be disabled? */ | 317 | .usecount = 1, /* REVISIT: why can't' this be disabled? */ |
| 318 | }; | 318 | }; |
| 319 | 319 | ||
| 320 | static struct clk timer3_clk = { | 320 | static struct clk timer3_clk = { |
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c index 9a2376b3137c..5f8a65424184 100644 --- a/arch/arm/mach-davinci/dm644x.c +++ b/arch/arm/mach-davinci/dm644x.c | |||
| @@ -274,7 +274,7 @@ static struct clk timer2_clk = { | |||
| 274 | .name = "timer2", | 274 | .name = "timer2", |
| 275 | .parent = &pll1_aux_clk, | 275 | .parent = &pll1_aux_clk, |
| 276 | .lpsc = DAVINCI_LPSC_TIMER2, | 276 | .lpsc = DAVINCI_LPSC_TIMER2, |
| 277 | .usecount = 1, /* REVISIT: why cant' this be disabled? */ | 277 | .usecount = 1, /* REVISIT: why can't' this be disabled? */ |
| 278 | }; | 278 | }; |
| 279 | 279 | ||
| 280 | static struct clk_lookup dm644x_clks[] = { | 280 | static struct clk_lookup dm644x_clks[] = { |
diff --git a/arch/arm/mach-davinci/include/mach/cputype.h b/arch/arm/mach-davinci/include/mach/cputype.h index cea6b8972043..957fb87e832e 100644 --- a/arch/arm/mach-davinci/include/mach/cputype.h +++ b/arch/arm/mach-davinci/include/mach/cputype.h | |||
| @@ -4,7 +4,7 @@ | |||
| 4 | * Author: Kevin Hilman, Deep Root Systems, LLC | 4 | * Author: Kevin Hilman, Deep Root Systems, LLC |
| 5 | * | 5 | * |
| 6 | * Defines the cpu_is_*() macros for runtime detection of DaVinci | 6 | * Defines the cpu_is_*() macros for runtime detection of DaVinci |
| 7 | * device type. In addtion, if support for a given device is not | 7 | * device type. In addition, if support for a given device is not |
| 8 | * compiled in to the kernel, the macros return 0 so that | 8 | * compiled in to the kernel, the macros return 0 so that |
| 9 | * resulting code can be optimized out. | 9 | * resulting code can be optimized out. |
| 10 | * | 10 | * |
diff --git a/arch/arm/mach-ep93xx/gpio.c b/arch/arm/mach-ep93xx/gpio.c index 180b8a9d0d21..a5a9ff70b198 100644 --- a/arch/arm/mach-ep93xx/gpio.c +++ b/arch/arm/mach-ep93xx/gpio.c | |||
| @@ -101,7 +101,7 @@ static void ep93xx_gpio_ab_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
| 101 | static void ep93xx_gpio_f_irq_handler(unsigned int irq, struct irq_desc *desc) | 101 | static void ep93xx_gpio_f_irq_handler(unsigned int irq, struct irq_desc *desc) |
| 102 | { | 102 | { |
| 103 | /* | 103 | /* |
| 104 | * map discontiguous hw irq range to continous sw irq range: | 104 | * map discontiguous hw irq range to continuous sw irq range: |
| 105 | * | 105 | * |
| 106 | * IRQ_EP93XX_GPIO{0..7}MUX -> gpio_to_irq(EP93XX_GPIO_LINE_F({0..7}) | 106 | * IRQ_EP93XX_GPIO{0..7}MUX -> gpio_to_irq(EP93XX_GPIO_LINE_F({0..7}) |
| 107 | */ | 107 | */ |
diff --git a/arch/arm/mach-exynos4/include/mach/gpio.h b/arch/arm/mach-exynos4/include/mach/gpio.h index 939728b38d48..be9266b10fdb 100644 --- a/arch/arm/mach-exynos4/include/mach/gpio.h +++ b/arch/arm/mach-exynos4/include/mach/gpio.h | |||
| @@ -18,7 +18,7 @@ | |||
| 18 | #define gpio_cansleep __gpio_cansleep | 18 | #define gpio_cansleep __gpio_cansleep |
| 19 | #define gpio_to_irq __gpio_to_irq | 19 | #define gpio_to_irq __gpio_to_irq |
| 20 | 20 | ||
| 21 | /* Practically, GPIO banks upto GPZ are the configurable gpio banks */ | 21 | /* Practically, GPIO banks up to GPZ are the configurable gpio banks */ |
| 22 | 22 | ||
| 23 | /* GPIO bank sizes */ | 23 | /* GPIO bank sizes */ |
| 24 | #define EXYNOS4_GPIO_A0_NR (8) | 24 | #define EXYNOS4_GPIO_A0_NR (8) |
diff --git a/arch/arm/mach-exynos4/mct.c b/arch/arm/mach-exynos4/mct.c index af82a8fbb68b..14ac10b7ec02 100644 --- a/arch/arm/mach-exynos4/mct.c +++ b/arch/arm/mach-exynos4/mct.c | |||
| @@ -276,7 +276,7 @@ static void exynos4_mct_tick_start(unsigned long cycles, | |||
| 276 | /* update interrupt count buffer */ | 276 | /* update interrupt count buffer */ |
| 277 | exynos4_mct_write(tmp, mevt->base + MCT_L_ICNTB_OFFSET); | 277 | exynos4_mct_write(tmp, mevt->base + MCT_L_ICNTB_OFFSET); |
| 278 | 278 | ||
| 279 | /* enable MCT tick interupt */ | 279 | /* enable MCT tick interrupt */ |
| 280 | exynos4_mct_write(0x1, mevt->base + MCT_L_INT_ENB_OFFSET); | 280 | exynos4_mct_write(0x1, mevt->base + MCT_L_INT_ENB_OFFSET); |
| 281 | 281 | ||
| 282 | tmp = __raw_readl(mevt->base + MCT_L_TCON_OFFSET); | 282 | tmp = __raw_readl(mevt->base + MCT_L_TCON_OFFSET); |
diff --git a/arch/arm/mach-exynos4/setup-sdhci-gpio.c b/arch/arm/mach-exynos4/setup-sdhci-gpio.c index 1b3d3a2de95c..e8d08bf8965a 100644 --- a/arch/arm/mach-exynos4/setup-sdhci-gpio.c +++ b/arch/arm/mach-exynos4/setup-sdhci-gpio.c | |||
| @@ -38,14 +38,14 @@ void exynos4_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) | |||
| 38 | switch (width) { | 38 | switch (width) { |
| 39 | case 8: | 39 | case 8: |
| 40 | for (gpio = EXYNOS4_GPK1(3); gpio <= EXYNOS4_GPK1(6); gpio++) { | 40 | for (gpio = EXYNOS4_GPK1(3); gpio <= EXYNOS4_GPK1(6); gpio++) { |
| 41 | /* Data pin GPK1[3:6] to special-funtion 3 */ | 41 | /* Data pin GPK1[3:6] to special-function 3 */ |
| 42 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); | 42 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); |
| 43 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP); | 43 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP); |
| 44 | s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); | 44 | s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); |
| 45 | } | 45 | } |
| 46 | case 4: | 46 | case 4: |
| 47 | for (gpio = EXYNOS4_GPK0(3); gpio <= EXYNOS4_GPK0(6); gpio++) { | 47 | for (gpio = EXYNOS4_GPK0(3); gpio <= EXYNOS4_GPK0(6); gpio++) { |
| 48 | /* Data pin GPK0[3:6] to special-funtion 2 */ | 48 | /* Data pin GPK0[3:6] to special-function 2 */ |
| 49 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | 49 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); |
| 50 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP); | 50 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP); |
| 51 | s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); | 51 | s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); |
diff --git a/arch/arm/mach-exynos4/setup-sdhci.c b/arch/arm/mach-exynos4/setup-sdhci.c index 85f9433d4836..1e83f8cf236d 100644 --- a/arch/arm/mach-exynos4/setup-sdhci.c +++ b/arch/arm/mach-exynos4/setup-sdhci.c | |||
| @@ -35,7 +35,7 @@ void exynos4_setup_sdhci_cfg_card(struct platform_device *dev, void __iomem *r, | |||
| 35 | { | 35 | { |
| 36 | u32 ctrl2, ctrl3; | 36 | u32 ctrl2, ctrl3; |
| 37 | 37 | ||
| 38 | /* don't need to alter anything acording to card-type */ | 38 | /* don't need to alter anything according to card-type */ |
| 39 | 39 | ||
| 40 | ctrl2 = readl(r + S3C_SDHCI_CONTROL2); | 40 | ctrl2 = readl(r + S3C_SDHCI_CONTROL2); |
| 41 | 41 | ||
diff --git a/arch/arm/mach-iop13xx/pci.c b/arch/arm/mach-iop13xx/pci.c index 773ea0c95b9f..ba3dae352a2d 100644 --- a/arch/arm/mach-iop13xx/pci.c +++ b/arch/arm/mach-iop13xx/pci.c | |||
| @@ -225,7 +225,7 @@ static u32 iop13xx_atue_cfg_address(struct pci_bus *bus, int devfn, int where) | |||
| 225 | /* This routine checks the status of the last configuration cycle. If an error | 225 | /* This routine checks the status of the last configuration cycle. If an error |
| 226 | * was detected it returns >0, else it returns a 0. The errors being checked | 226 | * was detected it returns >0, else it returns a 0. The errors being checked |
| 227 | * are parity, master abort, target abort (master and target). These types of | 227 | * are parity, master abort, target abort (master and target). These types of |
| 228 | * errors occure during a config cycle where there is no device, like during | 228 | * errors occur during a config cycle where there is no device, like during |
| 229 | * the discovery stage. | 229 | * the discovery stage. |
| 230 | */ | 230 | */ |
| 231 | static int iop13xx_atux_pci_status(int clear) | 231 | static int iop13xx_atux_pci_status(int clear) |
| @@ -332,7 +332,7 @@ static struct pci_ops iop13xx_atux_ops = { | |||
| 332 | /* This routine checks the status of the last configuration cycle. If an error | 332 | /* This routine checks the status of the last configuration cycle. If an error |
| 333 | * was detected it returns >0, else it returns a 0. The errors being checked | 333 | * was detected it returns >0, else it returns a 0. The errors being checked |
| 334 | * are parity, master abort, target abort (master and target). These types of | 334 | * are parity, master abort, target abort (master and target). These types of |
| 335 | * errors occure during a config cycle where there is no device, like during | 335 | * errors occur during a config cycle where there is no device, like during |
| 336 | * the discovery stage. | 336 | * the discovery stage. |
| 337 | */ | 337 | */ |
| 338 | static int iop13xx_atue_pci_status(int clear) | 338 | static int iop13xx_atue_pci_status(int clear) |
diff --git a/arch/arm/mach-kirkwood/tsx1x-common.c b/arch/arm/mach-kirkwood/tsx1x-common.c index f781164e623f..24294b2bc469 100644 --- a/arch/arm/mach-kirkwood/tsx1x-common.c +++ b/arch/arm/mach-kirkwood/tsx1x-common.c | |||
| @@ -15,7 +15,7 @@ | |||
| 15 | 15 | ||
| 16 | /**************************************************************************** | 16 | /**************************************************************************** |
| 17 | * 16 MiB NOR flash. The struct mtd_partition is not in the same order as the | 17 | * 16 MiB NOR flash. The struct mtd_partition is not in the same order as the |
| 18 | * partitions on the device because we want to keep compatability with | 18 | * partitions on the device because we want to keep compatibility with |
| 19 | * the QNAP firmware. | 19 | * the QNAP firmware. |
| 20 | * Layout as used by QNAP: | 20 | * Layout as used by QNAP: |
| 21 | * 0x00000000-0x00080000 : "U-Boot" | 21 | * 0x00000000-0x00080000 : "U-Boot" |
diff --git a/arch/arm/mach-lpc32xx/pm.c b/arch/arm/mach-lpc32xx/pm.c index e76d41bb7056..b9c80597b7bf 100644 --- a/arch/arm/mach-lpc32xx/pm.c +++ b/arch/arm/mach-lpc32xx/pm.c | |||
| @@ -41,7 +41,7 @@ | |||
| 41 | * DRAM clocking and refresh are slightly different for systems with DDR | 41 | * DRAM clocking and refresh are slightly different for systems with DDR |
| 42 | * DRAM or regular SDRAM devices. If SDRAM is used in the system, the | 42 | * DRAM or regular SDRAM devices. If SDRAM is used in the system, the |
| 43 | * SDRAM will still be accessible in direct-run mode. In DDR based systems, | 43 | * SDRAM will still be accessible in direct-run mode. In DDR based systems, |
| 44 | * a transistion to direct-run mode will stop all DDR accesses (no clocks). | 44 | * a transition to direct-run mode will stop all DDR accesses (no clocks). |
| 45 | * Because of this, the code to switch power modes and the code to enter | 45 | * Because of this, the code to switch power modes and the code to enter |
| 46 | * and exit DRAM self-refresh modes must not be executed in DRAM. A small | 46 | * and exit DRAM self-refresh modes must not be executed in DRAM. A small |
| 47 | * section of IRAM is used instead for this. | 47 | * section of IRAM is used instead for this. |
diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c index aeb9ae23e6ce..99833b9485cf 100644 --- a/arch/arm/mach-mmp/time.c +++ b/arch/arm/mach-mmp/time.c | |||
| @@ -9,7 +9,7 @@ | |||
| 9 | * 2008-04-11: Jason Chagas <Jason.chagas@marvell.com> | 9 | * 2008-04-11: Jason Chagas <Jason.chagas@marvell.com> |
| 10 | * 2008-10-08: Bin Yang <bin.yang@marvell.com> | 10 | * 2008-10-08: Bin Yang <bin.yang@marvell.com> |
| 11 | * | 11 | * |
| 12 | * The timers module actually includes three timers, each timer with upto | 12 | * The timers module actually includes three timers, each timer with up to |
| 13 | * three match comparators. Timer #0 is used here in free-running mode as | 13 | * three match comparators. Timer #0 is used here in free-running mode as |
| 14 | * the clock source, and match comparator #1 used as clock event device. | 14 | * the clock source, and match comparator #1 used as clock event device. |
| 15 | * | 15 | * |
diff --git a/arch/arm/mach-msm/acpuclock-arm11.c b/arch/arm/mach-msm/acpuclock-arm11.c index 7ffbd987eb5d..805d4ee53f7e 100644 --- a/arch/arm/mach-msm/acpuclock-arm11.c +++ b/arch/arm/mach-msm/acpuclock-arm11.c | |||
| @@ -343,7 +343,7 @@ int acpuclk_set_rate(unsigned long rate, int for_power_collapse) | |||
| 343 | } | 343 | } |
| 344 | } | 344 | } |
| 345 | 345 | ||
| 346 | /* Set wait states for CPU inbetween frequency changes */ | 346 | /* Set wait states for CPU between frequency changes */ |
| 347 | reg_clkctl = readl(A11S_CLK_CNTL_ADDR); | 347 | reg_clkctl = readl(A11S_CLK_CNTL_ADDR); |
| 348 | reg_clkctl |= (100 << 16); /* set WT_ST_CNT */ | 348 | reg_clkctl |= (100 << 16); /* set WT_ST_CNT */ |
| 349 | writel(reg_clkctl, A11S_CLK_CNTL_ADDR); | 349 | writel(reg_clkctl, A11S_CLK_CNTL_ADDR); |
diff --git a/arch/arm/mach-msm/scm.c b/arch/arm/mach-msm/scm.c index cfa808dd4897..232f97a04504 100644 --- a/arch/arm/mach-msm/scm.c +++ b/arch/arm/mach-msm/scm.c | |||
| @@ -46,7 +46,7 @@ static DEFINE_MUTEX(scm_lock); | |||
| 46 | * @id: command to be executed | 46 | * @id: command to be executed |
| 47 | * @buf: buffer returned from scm_get_command_buffer() | 47 | * @buf: buffer returned from scm_get_command_buffer() |
| 48 | * | 48 | * |
| 49 | * An SCM command is layed out in memory as follows: | 49 | * An SCM command is laid out in memory as follows: |
| 50 | * | 50 | * |
| 51 | * ------------------- <--- struct scm_command | 51 | * ------------------- <--- struct scm_command |
| 52 | * | command header | | 52 | * | command header | |
diff --git a/arch/arm/mach-omap1/ams-delta-fiq-handler.S b/arch/arm/mach-omap1/ams-delta-fiq-handler.S index 927d5a181760..c1c5fb6a5b4c 100644 --- a/arch/arm/mach-omap1/ams-delta-fiq-handler.S +++ b/arch/arm/mach-omap1/ams-delta-fiq-handler.S | |||
| @@ -79,7 +79,7 @@ | |||
| 79 | 79 | ||
| 80 | 80 | ||
| 81 | /* | 81 | /* |
| 82 | * Register useage | 82 | * Register usage |
| 83 | * r8 - temporary | 83 | * r8 - temporary |
| 84 | * r9 - the driver buffer | 84 | * r9 - the driver buffer |
| 85 | * r10 - temporary | 85 | * r10 - temporary |
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c index d41fe2d0616a..0ad781db4e66 100644 --- a/arch/arm/mach-omap1/board-sx1.c +++ b/arch/arm/mach-omap1/board-sx1.c | |||
| @@ -399,7 +399,7 @@ static void __init omap_sx1_init(void) | |||
| 399 | sx1_mmc_init(); | 399 | sx1_mmc_init(); |
| 400 | 400 | ||
| 401 | /* turn on USB power */ | 401 | /* turn on USB power */ |
| 402 | /* sx1_setusbpower(1); cant do it here because i2c is not ready */ | 402 | /* sx1_setusbpower(1); can't do it here because i2c is not ready */ |
| 403 | gpio_request(1, "A_IRDA_OFF"); | 403 | gpio_request(1, "A_IRDA_OFF"); |
| 404 | gpio_request(11, "A_SWITCH"); | 404 | gpio_request(11, "A_SWITCH"); |
| 405 | gpio_request(15, "A_USB_ON"); | 405 | gpio_request(15, "A_USB_ON"); |
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c index b0f4c231595f..36f26c3fa25e 100644 --- a/arch/arm/mach-omap1/devices.c +++ b/arch/arm/mach-omap1/devices.c | |||
| @@ -281,7 +281,7 @@ static inline void omap_init_audio(void) {} | |||
| 281 | * Claiming GPIOs, and setting their direction and initial values, is the | 281 | * Claiming GPIOs, and setting their direction and initial values, is the |
| 282 | * responsibility of the device drivers. So is responding to probe(). | 282 | * responsibility of the device drivers. So is responding to probe(). |
| 283 | * | 283 | * |
| 284 | * Board-specific knowlege like creating devices or pin setup is to be | 284 | * Board-specific knowledge like creating devices or pin setup is to be |
| 285 | * kept out of drivers as much as possible. In particular, pin setup | 285 | * kept out of drivers as much as possible. In particular, pin setup |
| 286 | * may be handled by the boot loader, and drivers should expect it will | 286 | * may be handled by the boot loader, and drivers should expect it will |
| 287 | * normally have been done by the time they're probed. | 287 | * normally have been done by the time they're probed. |
diff --git a/arch/arm/mach-omap1/include/mach/ams-delta-fiq.h b/arch/arm/mach-omap1/include/mach/ams-delta-fiq.h index 7a2df29400ca..23eed0035ed8 100644 --- a/arch/arm/mach-omap1/include/mach/ams-delta-fiq.h +++ b/arch/arm/mach-omap1/include/mach/ams-delta-fiq.h | |||
| @@ -31,7 +31,7 @@ | |||
| 31 | #endif | 31 | #endif |
| 32 | 32 | ||
| 33 | /* | 33 | /* |
| 34 | * These are the offsets from the begining of the fiq_buffer. They are put here | 34 | * These are the offsets from the beginning of the fiq_buffer. They are put here |
| 35 | * since the buffer and header need to be accessed by drivers servicing devices | 35 | * since the buffer and header need to be accessed by drivers servicing devices |
| 36 | * which generate GPIO interrupts - e.g. keyboard, modem, hook switch. | 36 | * which generate GPIO interrupts - e.g. keyboard, modem, hook switch. |
| 37 | */ | 37 | */ |
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c index 5f8a2fd06337..34cf982b9679 100644 --- a/arch/arm/mach-omap2/board-igep0020.c +++ b/arch/arm/mach-omap2/board-igep0020.c | |||
| @@ -696,7 +696,7 @@ static void __init igep2_init(void) | |||
| 696 | igep2_init_smsc911x(); | 696 | igep2_init_smsc911x(); |
| 697 | 697 | ||
| 698 | /* | 698 | /* |
| 699 | * WLAN-BT combo module from MuRata wich has a Marvell WLAN | 699 | * WLAN-BT combo module from MuRata which has a Marvell WLAN |
| 700 | * (88W8686) + CSR Bluetooth chipset. Uses SDIO interface. | 700 | * (88W8686) + CSR Bluetooth chipset. Uses SDIO interface. |
| 701 | */ | 701 | */ |
| 702 | igep2_wlan_bt_init(); | 702 | igep2_wlan_bt_init(); |
diff --git a/arch/arm/mach-omap2/board-igep0030.c b/arch/arm/mach-omap2/board-igep0030.c index b10db0e6ee62..2cf86c3cb1a3 100644 --- a/arch/arm/mach-omap2/board-igep0030.c +++ b/arch/arm/mach-omap2/board-igep0030.c | |||
| @@ -440,7 +440,7 @@ static void __init igep3_init(void) | |||
| 440 | igep3_leds_init(); | 440 | igep3_leds_init(); |
| 441 | 441 | ||
| 442 | /* | 442 | /* |
| 443 | * WLAN-BT combo module from MuRata wich has a Marvell WLAN | 443 | * WLAN-BT combo module from MuRata which has a Marvell WLAN |
| 444 | * (88W8686) + CSR Bluetooth chipset. Uses SDIO interface. | 444 | * (88W8686) + CSR Bluetooth chipset. Uses SDIO interface. |
| 445 | */ | 445 | */ |
| 446 | igep3_wifi_bt_init(); | 446 | igep3_wifi_bt_init(); |
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index ab878545bd9b..6cb6c03293df 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c | |||
| @@ -258,7 +258,7 @@ static void _resolve_clkdm_deps(struct clockdomain *clkdm, | |||
| 258 | * clkdm_init - set up the clockdomain layer | 258 | * clkdm_init - set up the clockdomain layer |
| 259 | * @clkdms: optional pointer to an array of clockdomains to register | 259 | * @clkdms: optional pointer to an array of clockdomains to register |
| 260 | * @init_autodeps: optional pointer to an array of autodeps to register | 260 | * @init_autodeps: optional pointer to an array of autodeps to register |
| 261 | * @custom_funcs: func pointers for arch specfic implementations | 261 | * @custom_funcs: func pointers for arch specific implementations |
| 262 | * | 262 | * |
| 263 | * Set up internal state. If a pointer to an array of clockdomains | 263 | * Set up internal state. If a pointer to an array of clockdomains |
| 264 | * @clkdms was supplied, loop through the list of clockdomains, | 264 | * @clkdms was supplied, loop through the list of clockdomains, |
diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h index 85b3dce65640..5823584d9cd7 100644 --- a/arch/arm/mach-omap2/clockdomain.h +++ b/arch/arm/mach-omap2/clockdomain.h | |||
| @@ -125,7 +125,7 @@ struct clockdomain { | |||
| 125 | }; | 125 | }; |
| 126 | 126 | ||
| 127 | /** | 127 | /** |
| 128 | * struct clkdm_ops - Arch specfic function implementations | 128 | * struct clkdm_ops - Arch specific function implementations |
| 129 | * @clkdm_add_wkdep: Add a wakeup dependency between clk domains | 129 | * @clkdm_add_wkdep: Add a wakeup dependency between clk domains |
| 130 | * @clkdm_del_wkdep: Delete a wakeup dependency between clk domains | 130 | * @clkdm_del_wkdep: Delete a wakeup dependency between clk domains |
| 131 | * @clkdm_read_wkdep: Read wakeup dependency state between clk domains | 131 | * @clkdm_read_wkdep: Read wakeup dependency state between clk domains |
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c index a44c52303405..1c240eff3918 100644 --- a/arch/arm/mach-omap2/cpuidle34xx.c +++ b/arch/arm/mach-omap2/cpuidle34xx.c | |||
| @@ -297,8 +297,8 @@ DEFINE_PER_CPU(struct cpuidle_device, omap3_idle_dev); | |||
| 297 | 297 | ||
| 298 | /** | 298 | /** |
| 299 | * omap3_cpuidle_update_states() - Update the cpuidle states | 299 | * omap3_cpuidle_update_states() - Update the cpuidle states |
| 300 | * @mpu_deepest_state: Enable states upto and including this for mpu domain | 300 | * @mpu_deepest_state: Enable states up to and including this for mpu domain |
| 301 | * @core_deepest_state: Enable states upto and including this for core domain | 301 | * @core_deepest_state: Enable states up to and including this for core domain |
| 302 | * | 302 | * |
| 303 | * This goes through the list of states available and enables and disables the | 303 | * This goes through the list of states available and enables and disables the |
| 304 | * validity of C states based on deepest state that can be achieved for the | 304 | * validity of C states based on deepest state that can be achieved for the |
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 84d1b735fe80..7b8558564591 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c | |||
| @@ -253,7 +253,7 @@ int __init omap4_keyboard_init(struct omap4_keypad_platform_data | |||
| 253 | ARRAY_SIZE(omap_keyboard_latency), 0); | 253 | ARRAY_SIZE(omap_keyboard_latency), 0); |
| 254 | 254 | ||
| 255 | if (IS_ERR(od)) { | 255 | if (IS_ERR(od)) { |
| 256 | WARN(1, "Cant build omap_device for %s:%s.\n", | 256 | WARN(1, "Can't build omap_device for %s:%s.\n", |
| 257 | name, oh->name); | 257 | name, oh->name); |
| 258 | return PTR_ERR(od); | 258 | return PTR_ERR(od); |
| 259 | } | 259 | } |
| @@ -373,7 +373,7 @@ static int omap_mcspi_init(struct omap_hwmod *oh, void *unused) | |||
| 373 | od = omap_device_build(name, spi_num, oh, pdata, | 373 | od = omap_device_build(name, spi_num, oh, pdata, |
| 374 | sizeof(*pdata), omap_mcspi_latency, | 374 | sizeof(*pdata), omap_mcspi_latency, |
| 375 | ARRAY_SIZE(omap_mcspi_latency), 0); | 375 | ARRAY_SIZE(omap_mcspi_latency), 0); |
| 376 | WARN(IS_ERR(od), "Cant build omap_device for %s:%s\n", | 376 | WARN(IS_ERR(od), "Can't build omap_device for %s:%s\n", |
| 377 | name, oh->name); | 377 | name, oh->name); |
| 378 | kfree(pdata); | 378 | kfree(pdata); |
| 379 | return 0; | 379 | return 0; |
| @@ -725,7 +725,7 @@ static int __init omap_init_wdt(void) | |||
| 725 | od = omap_device_build(dev_name, id, oh, NULL, 0, | 725 | od = omap_device_build(dev_name, id, oh, NULL, 0, |
| 726 | omap_wdt_latency, | 726 | omap_wdt_latency, |
| 727 | ARRAY_SIZE(omap_wdt_latency), 0); | 727 | ARRAY_SIZE(omap_wdt_latency), 0); |
| 728 | WARN(IS_ERR(od), "Cant build omap_device for %s:%s.\n", | 728 | WARN(IS_ERR(od), "Can't build omap_device for %s:%s.\n", |
| 729 | dev_name, oh->name); | 729 | dev_name, oh->name); |
| 730 | return 0; | 730 | return 0; |
| 731 | } | 731 | } |
diff --git a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c index 34922b2d2e3f..c9ff0e79703d 100644 --- a/arch/arm/mach-omap2/dma.c +++ b/arch/arm/mach-omap2/dma.c | |||
| @@ -262,7 +262,7 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused) | |||
| 262 | omap2_dma_latency, ARRAY_SIZE(omap2_dma_latency), 0); | 262 | omap2_dma_latency, ARRAY_SIZE(omap2_dma_latency), 0); |
| 263 | kfree(p); | 263 | kfree(p); |
| 264 | if (IS_ERR(od)) { | 264 | if (IS_ERR(od)) { |
| 265 | pr_err("%s: Cant build omap_device for %s:%s.\n", | 265 | pr_err("%s: Can't build omap_device for %s:%s.\n", |
| 266 | __func__, name, oh->name); | 266 | __func__, name, oh->name); |
| 267 | return PTR_ERR(od); | 267 | return PTR_ERR(od); |
| 268 | } | 268 | } |
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c index 413de18c1d2b..9529842ae054 100644 --- a/arch/arm/mach-omap2/gpio.c +++ b/arch/arm/mach-omap2/gpio.c | |||
| @@ -82,7 +82,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused) | |||
| 82 | kfree(pdata); | 82 | kfree(pdata); |
| 83 | 83 | ||
| 84 | if (IS_ERR(od)) { | 84 | if (IS_ERR(od)) { |
| 85 | WARN(1, "Cant build omap_device for %s:%s.\n", | 85 | WARN(1, "Can't build omap_device for %s:%s.\n", |
| 86 | name, oh->name); | 86 | name, oh->name); |
| 87 | return PTR_ERR(od); | 87 | return PTR_ERR(od); |
| 88 | } | 88 | } |
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c index 137e1a5f3d85..b2f30bed5a20 100644 --- a/arch/arm/mach-omap2/hsmmc.c +++ b/arch/arm/mach-omap2/hsmmc.c | |||
| @@ -465,7 +465,7 @@ void __init omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr) | |||
| 465 | od = omap_device_build(name, ctrl_nr - 1, oh, mmc_data, | 465 | od = omap_device_build(name, ctrl_nr - 1, oh, mmc_data, |
| 466 | sizeof(struct omap_mmc_platform_data), ohl, ohl_cnt, false); | 466 | sizeof(struct omap_mmc_platform_data), ohl, ohl_cnt, false); |
| 467 | if (IS_ERR(od)) { | 467 | if (IS_ERR(od)) { |
| 468 | WARN(1, "Cant build omap_device for %s:%s.\n", name, oh->name); | 468 | WARN(1, "Can't build omap_device for %s:%s.\n", name, oh->name); |
| 469 | kfree(mmc_data->slots[0].name); | 469 | kfree(mmc_data->slots[0].name); |
| 470 | goto done; | 470 | goto done; |
| 471 | } | 471 | } |
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index 565b9064a328..4a6ef6ab8458 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c | |||
| @@ -149,7 +149,7 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused) | |||
| 149 | ARRAY_SIZE(omap2_mcbsp_latency), false); | 149 | ARRAY_SIZE(omap2_mcbsp_latency), false); |
| 150 | kfree(pdata); | 150 | kfree(pdata); |
| 151 | if (IS_ERR(od)) { | 151 | if (IS_ERR(od)) { |
| 152 | pr_err("%s: Cant build omap_device for %s:%s.\n", __func__, | 152 | pr_err("%s: Can't build omap_device for %s:%s.\n", __func__, |
| 153 | name, oh->name); | 153 | name, oh->name); |
| 154 | return PTR_ERR(od); | 154 | return PTR_ERR(od); |
| 155 | } | 155 | } |
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c index bb043cbb3886..a4ab1e364313 100644 --- a/arch/arm/mach-omap2/mux.c +++ b/arch/arm/mach-omap2/mux.c | |||
| @@ -518,7 +518,7 @@ static int omap_mux_dbg_board_show(struct seq_file *s, void *unused) | |||
| 518 | seq_printf(s, "/* %s */\n", m->muxnames[mode]); | 518 | seq_printf(s, "/* %s */\n", m->muxnames[mode]); |
| 519 | 519 | ||
| 520 | /* | 520 | /* |
| 521 | * XXX: Might be revisited to support differences accross | 521 | * XXX: Might be revisited to support differences across |
| 522 | * same OMAP generation. | 522 | * same OMAP generation. |
| 523 | */ | 523 | */ |
| 524 | seq_printf(s, "OMAP%d_MUX(%s, ", omap_gen, m0_def); | 524 | seq_printf(s, "OMAP%d_MUX(%s, ", omap_gen, m0_def); |
diff --git a/arch/arm/mach-omap2/mux2430.h b/arch/arm/mach-omap2/mux2430.h index adbea0d03e08..9fd93149ebd9 100644 --- a/arch/arm/mach-omap2/mux2430.h +++ b/arch/arm/mach-omap2/mux2430.h | |||
| @@ -22,7 +22,7 @@ | |||
| 22 | * absolute addresses. The name in the macro is the mode-0 name of | 22 | * absolute addresses. The name in the macro is the mode-0 name of |
| 23 | * the pin. NOTE: These registers are 8-bits wide. | 23 | * the pin. NOTE: These registers are 8-bits wide. |
| 24 | * | 24 | * |
| 25 | * Note that these defines use SDMMC instead of MMC for compability | 25 | * Note that these defines use SDMMC instead of MMC for compatibility |
| 26 | * with signal names used in 3630. | 26 | * with signal names used in 3630. |
| 27 | */ | 27 | */ |
| 28 | #define OMAP2430_CONTROL_PADCONF_GPMC_CLK_OFFSET 0x000 | 28 | #define OMAP2430_CONTROL_PADCONF_GPMC_CLK_OFFSET 0x000 |
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index a860fb5024c2..e6e3810db77f 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c | |||
| @@ -1559,7 +1559,7 @@ static struct omap_hwmod omap2430_i2c1_hwmod = { | |||
| 1559 | * I2CHS IP's do not follow the usual pattern. | 1559 | * I2CHS IP's do not follow the usual pattern. |
| 1560 | * prcm_reg_id alone cannot be used to program | 1560 | * prcm_reg_id alone cannot be used to program |
| 1561 | * the iclk and fclk. Needs to be handled using | 1561 | * the iclk and fclk. Needs to be handled using |
| 1562 | * additonal flags when clk handling is moved | 1562 | * additional flags when clk handling is moved |
| 1563 | * to hwmod framework. | 1563 | * to hwmod framework. |
| 1564 | */ | 1564 | */ |
| 1565 | .module_offs = CORE_MOD, | 1565 | .module_offs = CORE_MOD, |
diff --git a/arch/arm/mach-omap2/omap_phy_internal.c b/arch/arm/mach-omap2/omap_phy_internal.c index e2e605fe9138..05f6abc96b0d 100644 --- a/arch/arm/mach-omap2/omap_phy_internal.c +++ b/arch/arm/mach-omap2/omap_phy_internal.c | |||
| @@ -112,12 +112,12 @@ int omap4430_phy_power(struct device *dev, int ID, int on) | |||
| 112 | else | 112 | else |
| 113 | /* | 113 | /* |
| 114 | * Enable VBUS Valid, AValid and IDDIG | 114 | * Enable VBUS Valid, AValid and IDDIG |
| 115 | * high impedence | 115 | * high impedance |
| 116 | */ | 116 | */ |
| 117 | __raw_writel(IDDIG | AVALID | VBUSVALID, | 117 | __raw_writel(IDDIG | AVALID | VBUSVALID, |
| 118 | ctrl_base + USBOTGHS_CONTROL); | 118 | ctrl_base + USBOTGHS_CONTROL); |
| 119 | } else { | 119 | } else { |
| 120 | /* Enable session END and IDIG to high impedence. */ | 120 | /* Enable session END and IDIG to high impedance. */ |
| 121 | __raw_writel(SESSEND | IDDIG, ctrl_base + | 121 | __raw_writel(SESSEND | IDDIG, ctrl_base + |
| 122 | USBOTGHS_CONTROL); | 122 | USBOTGHS_CONTROL); |
| 123 | } | 123 | } |
diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c index 0a8e74e3e811..07d6140baa9d 100644 --- a/arch/arm/mach-omap2/omap_twl.c +++ b/arch/arm/mach-omap2/omap_twl.c | |||
| @@ -308,7 +308,7 @@ int __init omap3_twl_init(void) | |||
| 308 | * Strategy Software Scaling Mode (ENABLE_VMODE=0), for setting the voltages, | 308 | * Strategy Software Scaling Mode (ENABLE_VMODE=0), for setting the voltages, |
| 309 | * in those scenarios this bit is to be cleared (enable = false). | 309 | * in those scenarios this bit is to be cleared (enable = false). |
| 310 | * | 310 | * |
| 311 | * Returns 0 on sucess, error is returned if I2C read/write fails. | 311 | * Returns 0 on success, error is returned if I2C read/write fails. |
| 312 | */ | 312 | */ |
| 313 | int __init omap3_twl_set_sr_bit(bool enable) | 313 | int __init omap3_twl_set_sr_bit(bool enable) |
| 314 | { | 314 | { |
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c index 49c6513e90d8..9af08473bf10 100644 --- a/arch/arm/mach-omap2/powerdomain.c +++ b/arch/arm/mach-omap2/powerdomain.c | |||
| @@ -196,7 +196,7 @@ static int _pwrdm_post_transition_cb(struct powerdomain *pwrdm, void *unused) | |||
| 196 | /** | 196 | /** |
| 197 | * pwrdm_init - set up the powerdomain layer | 197 | * pwrdm_init - set up the powerdomain layer |
| 198 | * @pwrdm_list: array of struct powerdomain pointers to register | 198 | * @pwrdm_list: array of struct powerdomain pointers to register |
| 199 | * @custom_funcs: func pointers for arch specfic implementations | 199 | * @custom_funcs: func pointers for arch specific implementations |
| 200 | * | 200 | * |
| 201 | * Loop through the array of powerdomains @pwrdm_list, registering all | 201 | * Loop through the array of powerdomains @pwrdm_list, registering all |
| 202 | * that are available on the current CPU. If pwrdm_list is supplied | 202 | * that are available on the current CPU. If pwrdm_list is supplied |
diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach-omap2/powerdomain.h index 027f40bd235d..d23d979b9c34 100644 --- a/arch/arm/mach-omap2/powerdomain.h +++ b/arch/arm/mach-omap2/powerdomain.h | |||
| @@ -121,7 +121,7 @@ struct powerdomain { | |||
| 121 | }; | 121 | }; |
| 122 | 122 | ||
| 123 | /** | 123 | /** |
| 124 | * struct pwrdm_ops - Arch specfic function implementations | 124 | * struct pwrdm_ops - Arch specific function implementations |
| 125 | * @pwrdm_set_next_pwrst: Set the target power state for a pd | 125 | * @pwrdm_set_next_pwrst: Set the target power state for a pd |
| 126 | * @pwrdm_read_next_pwrst: Read the target power state set for a pd | 126 | * @pwrdm_read_next_pwrst: Read the target power state set for a pd |
| 127 | * @pwrdm_read_pwrst: Read the current power state of a pd | 127 | * @pwrdm_read_pwrst: Read the current power state of a pd |
diff --git a/arch/arm/mach-omap2/powerdomains3xxx_data.c b/arch/arm/mach-omap2/powerdomains3xxx_data.c index 9c9c113788b9..469a920a74dc 100644 --- a/arch/arm/mach-omap2/powerdomains3xxx_data.c +++ b/arch/arm/mach-omap2/powerdomains3xxx_data.c | |||
| @@ -72,7 +72,7 @@ static struct powerdomain mpu_3xxx_pwrdm = { | |||
| 72 | 72 | ||
| 73 | /* | 73 | /* |
| 74 | * The USBTLL Save-and-Restore mechanism is broken on | 74 | * The USBTLL Save-and-Restore mechanism is broken on |
| 75 | * 3430s upto ES3.0 and 3630ES1.0. Hence this feature | 75 | * 3430s up to ES3.0 and 3630ES1.0. Hence this feature |
| 76 | * needs to be disabled on these chips. | 76 | * needs to be disabled on these chips. |
| 77 | * Refer: 3430 errata ID i459 and 3630 errata ID i579 | 77 | * Refer: 3430 errata ID i459 and 3630 errata ID i579 |
| 78 | * | 78 | * |
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c index 8f674c9442bf..13e24f913dd4 100644 --- a/arch/arm/mach-omap2/smartreflex.c +++ b/arch/arm/mach-omap2/smartreflex.c | |||
| @@ -247,7 +247,7 @@ static void sr_stop_vddautocomp(struct omap_sr *sr) | |||
| 247 | * driver register and sr device intializtion API's. Only one call | 247 | * driver register and sr device intializtion API's. Only one call |
| 248 | * will ultimately succeed. | 248 | * will ultimately succeed. |
| 249 | * | 249 | * |
| 250 | * Currenly this function registers interrrupt handler for a particular SR | 250 | * Currently this function registers interrrupt handler for a particular SR |
| 251 | * if smartreflex class driver is already registered and has | 251 | * if smartreflex class driver is already registered and has |
| 252 | * requested for interrupts and the SR interrupt line in present. | 252 | * requested for interrupts and the SR interrupt line in present. |
| 253 | */ | 253 | */ |
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c index c6facf7becf8..6fb520999b6e 100644 --- a/arch/arm/mach-omap2/voltage.c +++ b/arch/arm/mach-omap2/voltage.c | |||
| @@ -851,7 +851,7 @@ int omap_voltage_scale_vdd(struct voltagedomain *voltdm, | |||
| 851 | * @voltdm: pointer to the VDD whose voltage is to be reset. | 851 | * @voltdm: pointer to the VDD whose voltage is to be reset. |
| 852 | * | 852 | * |
| 853 | * This API finds out the correct voltage the voltage domain is supposed | 853 | * This API finds out the correct voltage the voltage domain is supposed |
| 854 | * to be at and resets the voltage to that level. Should be used expecially | 854 | * to be at and resets the voltage to that level. Should be used especially |
| 855 | * while disabling any voltage compensation modules. | 855 | * while disabling any voltage compensation modules. |
| 856 | */ | 856 | */ |
| 857 | void omap_voltage_reset(struct voltagedomain *voltdm) | 857 | void omap_voltage_reset(struct voltagedomain *voltdm) |
| @@ -912,7 +912,7 @@ void omap_voltage_get_volttable(struct voltagedomain *voltdm, | |||
| 912 | * This API searches only through the non-compensated voltages int the | 912 | * This API searches only through the non-compensated voltages int the |
| 913 | * voltage table. | 913 | * voltage table. |
| 914 | * Returns pointer to the voltage table entry corresponding to volt on | 914 | * Returns pointer to the voltage table entry corresponding to volt on |
| 915 | * sucess. Returns -ENODATA if no voltage table exisits for the passed voltage | 915 | * success. Returns -ENODATA if no voltage table exisits for the passed voltage |
| 916 | * domain or if there is no matching entry. | 916 | * domain or if there is no matching entry. |
| 917 | */ | 917 | */ |
| 918 | struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, | 918 | struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, |
diff --git a/arch/arm/mach-orion5x/addr-map.c b/arch/arm/mach-orion5x/addr-map.c index 1a5d6a0e2602..5ceafdccc456 100644 --- a/arch/arm/mach-orion5x/addr-map.c +++ b/arch/arm/mach-orion5x/addr-map.c | |||
| @@ -19,7 +19,7 @@ | |||
| 19 | #include "common.h" | 19 | #include "common.h" |
| 20 | 20 | ||
| 21 | /* | 21 | /* |
| 22 | * The Orion has fully programable address map. There's a separate address | 22 | * The Orion has fully programmable address map. There's a separate address |
| 23 | * map for each of the device _master_ interfaces, e.g. CPU, PCI, PCIe, USB, | 23 | * map for each of the device _master_ interfaces, e.g. CPU, PCI, PCIe, USB, |
| 24 | * Gigabit Ethernet, DMA/XOR engines, etc. Each interface has its own | 24 | * Gigabit Ethernet, DMA/XOR engines, etc. Each interface has its own |
| 25 | * address decode windows that allow it to access any of the Orion resources. | 25 | * address decode windows that allow it to access any of the Orion resources. |
diff --git a/arch/arm/mach-orion5x/net2big-setup.c b/arch/arm/mach-orion5x/net2big-setup.c index 429ecafe9fdd..a5930f83958b 100644 --- a/arch/arm/mach-orion5x/net2big-setup.c +++ b/arch/arm/mach-orion5x/net2big-setup.c | |||
| @@ -190,7 +190,7 @@ err_free_1: | |||
| 190 | * The power front LEDs (blue and red) and SATA red LEDs are controlled via a | 190 | * The power front LEDs (blue and red) and SATA red LEDs are controlled via a |
| 191 | * single GPIO line and are compatible with the leds-gpio driver. | 191 | * single GPIO line and are compatible with the leds-gpio driver. |
| 192 | * | 192 | * |
| 193 | * The SATA blue LEDs have some hardware blink capabilities which are detailled | 193 | * The SATA blue LEDs have some hardware blink capabilities which are detailed |
| 194 | * in the following array: | 194 | * in the following array: |
| 195 | * | 195 | * |
| 196 | * SATAx blue LED | SATAx activity | LED state | 196 | * SATAx blue LED | SATAx activity | LED state |
diff --git a/arch/arm/mach-orion5x/ts209-setup.c b/arch/arm/mach-orion5x/ts209-setup.c index f0f43e13ac87..e6d64494d3de 100644 --- a/arch/arm/mach-orion5x/ts209-setup.c +++ b/arch/arm/mach-orion5x/ts209-setup.c | |||
| @@ -36,7 +36,7 @@ | |||
| 36 | 36 | ||
| 37 | /**************************************************************************** | 37 | /**************************************************************************** |
| 38 | * 8MiB NOR flash. The struct mtd_partition is not in the same order as the | 38 | * 8MiB NOR flash. The struct mtd_partition is not in the same order as the |
| 39 | * partitions on the device because we want to keep compatability with | 39 | * partitions on the device because we want to keep compatibility with |
| 40 | * existing QNAP firmware. | 40 | * existing QNAP firmware. |
| 41 | * | 41 | * |
| 42 | * Layout as used by QNAP: | 42 | * Layout as used by QNAP: |
diff --git a/arch/arm/mach-orion5x/ts409-setup.c b/arch/arm/mach-orion5x/ts409-setup.c index 92f393f08fa4..9eac8192d923 100644 --- a/arch/arm/mach-orion5x/ts409-setup.c +++ b/arch/arm/mach-orion5x/ts409-setup.c | |||
| @@ -56,7 +56,7 @@ | |||
| 56 | 56 | ||
| 57 | /**************************************************************************** | 57 | /**************************************************************************** |
| 58 | * 8MiB NOR flash. The struct mtd_partition is not in the same order as the | 58 | * 8MiB NOR flash. The struct mtd_partition is not in the same order as the |
| 59 | * partitions on the device because we want to keep compatability with | 59 | * partitions on the device because we want to keep compatibility with |
| 60 | * existing QNAP firmware. | 60 | * existing QNAP firmware. |
| 61 | * | 61 | * |
| 62 | * Layout as used by QNAP: | 62 | * Layout as used by QNAP: |
diff --git a/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h b/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h index e4fb4668c26e..207ecb49a61b 100644 --- a/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h +++ b/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h | |||
| @@ -38,7 +38,7 @@ | |||
| 38 | #define PCMD(x) __REG(0x40F50110 + ((x) << 2)) | 38 | #define PCMD(x) __REG(0x40F50110 + ((x) << 2)) |
| 39 | 39 | ||
| 40 | /* | 40 | /* |
| 41 | * Slave Power Managment Unit | 41 | * Slave Power Management Unit |
| 42 | */ | 42 | */ |
| 43 | #define ASCR __REG(0x40f40000) /* Application Subsystem Power Status/Configuration */ | 43 | #define ASCR __REG(0x40f40000) /* Application Subsystem Power Status/Configuration */ |
| 44 | #define ARSR __REG(0x40f40004) /* Application Subsystem Reset Status */ | 44 | #define ARSR __REG(0x40f40004) /* Application Subsystem Reset Status */ |
diff --git a/arch/arm/mach-pxa/include/mach/zeus.h b/arch/arm/mach-pxa/include/mach/zeus.h index faa408ab7ad7..0641f31a56b7 100644 --- a/arch/arm/mach-pxa/include/mach/zeus.h +++ b/arch/arm/mach-pxa/include/mach/zeus.h | |||
| @@ -64,7 +64,7 @@ | |||
| 64 | 64 | ||
| 65 | /* | 65 | /* |
| 66 | * CPLD registers: | 66 | * CPLD registers: |
| 67 | * Only 4 registers, but spreaded over a 32MB address space. | 67 | * Only 4 registers, but spread over a 32MB address space. |
| 68 | * Be gentle, and remap that over 32kB... | 68 | * Be gentle, and remap that over 32kB... |
| 69 | */ | 69 | */ |
| 70 | 70 | ||
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c index dd13bb63259b..23925db8ff74 100644 --- a/arch/arm/mach-pxa/mioa701.c +++ b/arch/arm/mach-pxa/mioa701.c | |||
| @@ -458,7 +458,7 @@ static struct platform_device strataflash = { | |||
| 458 | /* | 458 | /* |
| 459 | * Suspend/Resume bootstrap management | 459 | * Suspend/Resume bootstrap management |
| 460 | * | 460 | * |
| 461 | * MIO A701 reboot sequence is highly ROM dependant. From the one dissassembled, | 461 | * MIO A701 reboot sequence is highly ROM dependent. From the one dissassembled, |
| 462 | * this sequence is as follows : | 462 | * this sequence is as follows : |
| 463 | * - disables interrupts | 463 | * - disables interrupts |
| 464 | * - initialize SDRAM (self refresh RAM into active RAM) | 464 | * - initialize SDRAM (self refresh RAM into active RAM) |
diff --git a/arch/arm/mach-s3c2410/include/mach/dma.h b/arch/arm/mach-s3c2410/include/mach/dma.h index cf68136cc668..b2b2a5bb275e 100644 --- a/arch/arm/mach-s3c2410/include/mach/dma.h +++ b/arch/arm/mach-s3c2410/include/mach/dma.h | |||
| @@ -19,7 +19,7 @@ | |||
| 19 | #define MAX_DMA_TRANSFER_SIZE 0x100000 /* Data Unit is half word */ | 19 | #define MAX_DMA_TRANSFER_SIZE 0x100000 /* Data Unit is half word */ |
| 20 | 20 | ||
| 21 | /* We use `virtual` dma channels to hide the fact we have only a limited | 21 | /* We use `virtual` dma channels to hide the fact we have only a limited |
| 22 | * number of DMA channels, and not of all of them (dependant on the device) | 22 | * number of DMA channels, and not of all of them (dependent on the device) |
| 23 | * can be attached to any DMA source. We therefore let the DMA core handle | 23 | * can be attached to any DMA source. We therefore let the DMA core handle |
| 24 | * the allocation of hardware channels to clients. | 24 | * the allocation of hardware channels to clients. |
| 25 | */ | 25 | */ |
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-mem.h b/arch/arm/mach-s3c2410/include/mach/regs-mem.h index 7f7c52947963..988a6863e54b 100644 --- a/arch/arm/mach-s3c2410/include/mach/regs-mem.h +++ b/arch/arm/mach-s3c2410/include/mach/regs-mem.h | |||
| @@ -101,7 +101,7 @@ | |||
| 101 | #define S3C2410_BANKCON_PMC16 (0x03) | 101 | #define S3C2410_BANKCON_PMC16 (0x03) |
| 102 | 102 | ||
| 103 | /* bank configurations for banks 0..7, note banks | 103 | /* bank configurations for banks 0..7, note banks |
| 104 | * 6 and 7 have differnt configurations depending on | 104 | * 6 and 7 have different configurations depending on |
| 105 | * the memory type bits */ | 105 | * the memory type bits */ |
| 106 | 106 | ||
| 107 | #define S3C2410_BANKCON_Tacp2 (0x0 << 2) | 107 | #define S3C2410_BANKCON_Tacp2 (0x0 << 2) |
diff --git a/arch/arm/mach-s3c2410/mach-n30.c b/arch/arm/mach-s3c2410/mach-n30.c index 66f44440d5d3..079dcaa602d3 100644 --- a/arch/arm/mach-s3c2410/mach-n30.c +++ b/arch/arm/mach-s3c2410/mach-n30.c | |||
| @@ -252,7 +252,7 @@ static struct s3c24xx_led_platdata n30_blue_led_pdata = { | |||
| 252 | .def_trigger = "", | 252 | .def_trigger = "", |
| 253 | }; | 253 | }; |
| 254 | 254 | ||
| 255 | /* This is the blue LED on the device. Originaly used to indicate GPS activity | 255 | /* This is the blue LED on the device. Originally used to indicate GPS activity |
| 256 | * by flashing. */ | 256 | * by flashing. */ |
| 257 | static struct s3c24xx_led_platdata n35_blue_led_pdata = { | 257 | static struct s3c24xx_led_platdata n35_blue_led_pdata = { |
| 258 | .name = "blue_led", | 258 | .name = "blue_led", |
diff --git a/arch/arm/mach-s3c2440/mach-mini2440.c b/arch/arm/mach-s3c2440/mach-mini2440.c index dfedc9c9e005..dd3120df09fe 100644 --- a/arch/arm/mach-s3c2440/mach-mini2440.c +++ b/arch/arm/mach-s3c2440/mach-mini2440.c | |||
| @@ -155,7 +155,7 @@ static struct s3c2410fb_display mini2440_lcd_cfg[] __initdata = { | |||
| 155 | * the same timings, however, anything smaller than 1024x768 | 155 | * the same timings, however, anything smaller than 1024x768 |
| 156 | * will only be displayed in the top left corner of a 1024x768 | 156 | * will only be displayed in the top left corner of a 1024x768 |
| 157 | * XGA output unless you add optional dip switches to the shield. | 157 | * XGA output unless you add optional dip switches to the shield. |
| 158 | * Therefore timings for other resolutions have been ommited here. | 158 | * Therefore timings for other resolutions have been omitted here. |
| 159 | */ | 159 | */ |
| 160 | [2] = { | 160 | [2] = { |
| 161 | _LCD_DECLARE( | 161 | _LCD_DECLARE( |
diff --git a/arch/arm/mach-s3c64xx/dma.c b/arch/arm/mach-s3c64xx/dma.c index c35585cf8c4f..b197171e7d03 100644 --- a/arch/arm/mach-s3c64xx/dma.c +++ b/arch/arm/mach-s3c64xx/dma.c | |||
| @@ -315,7 +315,7 @@ int s3c2410_dma_ctrl(unsigned int channel, enum s3c2410_chan_op op) | |||
| 315 | case S3C2410_DMAOP_FLUSH: | 315 | case S3C2410_DMAOP_FLUSH: |
| 316 | return s3c64xx_dma_flush(chan); | 316 | return s3c64xx_dma_flush(chan); |
| 317 | 317 | ||
| 318 | /* belive PAUSE/RESUME are no-ops */ | 318 | /* believe PAUSE/RESUME are no-ops */ |
| 319 | case S3C2410_DMAOP_PAUSE: | 319 | case S3C2410_DMAOP_PAUSE: |
| 320 | case S3C2410_DMAOP_RESUME: | 320 | case S3C2410_DMAOP_RESUME: |
| 321 | case S3C2410_DMAOP_STARTED: | 321 | case S3C2410_DMAOP_STARTED: |
diff --git a/arch/arm/mach-s5pc100/include/mach/regs-fb.h b/arch/arm/mach-s5pc100/include/mach/regs-fb.h index 4be4cc9abf75..07aa4d6054fe 100644 --- a/arch/arm/mach-s5pc100/include/mach/regs-fb.h +++ b/arch/arm/mach-s5pc100/include/mach/regs-fb.h | |||
| @@ -29,7 +29,7 @@ | |||
| 29 | #define WPALCON_H (0x19c) | 29 | #define WPALCON_H (0x19c) |
| 30 | #define WPALCON_L (0x1a0) | 30 | #define WPALCON_L (0x1a0) |
| 31 | 31 | ||
| 32 | /* Pallete contro for WPAL0 and WPAL1 is the same as in S3C64xx, but | 32 | /* Palette control for WPAL0 and WPAL1 is the same as in S3C64xx, but |
| 33 | * different for WPAL2-4 | 33 | * different for WPAL2-4 |
| 34 | */ | 34 | */ |
| 35 | /* In WPALCON_L (aka WPALCON) */ | 35 | /* In WPALCON_L (aka WPALCON) */ |
diff --git a/arch/arm/mach-s5pc100/setup-sdhci.c b/arch/arm/mach-s5pc100/setup-sdhci.c index f16946e456e9..be25879bb2ee 100644 --- a/arch/arm/mach-s5pc100/setup-sdhci.c +++ b/arch/arm/mach-s5pc100/setup-sdhci.c | |||
| @@ -40,7 +40,7 @@ void s5pc100_setup_sdhci0_cfg_card(struct platform_device *dev, | |||
| 40 | { | 40 | { |
| 41 | u32 ctrl2, ctrl3; | 41 | u32 ctrl2, ctrl3; |
| 42 | 42 | ||
| 43 | /* don't need to alter anything acording to card-type */ | 43 | /* don't need to alter anything according to card-type */ |
| 44 | 44 | ||
| 45 | writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4); | 45 | writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4); |
| 46 | 46 | ||
diff --git a/arch/arm/mach-s5pv210/include/mach/gpio.h b/arch/arm/mach-s5pv210/include/mach/gpio.h index 1f4b595534c2..a5a1e331f8ed 100644 --- a/arch/arm/mach-s5pv210/include/mach/gpio.h +++ b/arch/arm/mach-s5pv210/include/mach/gpio.h | |||
| @@ -18,7 +18,7 @@ | |||
| 18 | #define gpio_cansleep __gpio_cansleep | 18 | #define gpio_cansleep __gpio_cansleep |
| 19 | #define gpio_to_irq __gpio_to_irq | 19 | #define gpio_to_irq __gpio_to_irq |
| 20 | 20 | ||
| 21 | /* Practically, GPIO banks upto MP03 are the configurable gpio banks */ | 21 | /* Practically, GPIO banks up to MP03 are the configurable gpio banks */ |
| 22 | 22 | ||
| 23 | /* GPIO bank sizes */ | 23 | /* GPIO bank sizes */ |
| 24 | #define S5PV210_GPIO_A0_NR (8) | 24 | #define S5PV210_GPIO_A0_NR (8) |
diff --git a/arch/arm/mach-s5pv210/setup-sdhci-gpio.c b/arch/arm/mach-s5pv210/setup-sdhci-gpio.c index 746777d56df9..3e3ac05bb7b1 100644 --- a/arch/arm/mach-s5pv210/setup-sdhci-gpio.c +++ b/arch/arm/mach-s5pv210/setup-sdhci-gpio.c | |||
| @@ -32,10 +32,10 @@ void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) | |||
| 32 | 32 | ||
| 33 | switch (width) { | 33 | switch (width) { |
| 34 | case 8: | 34 | case 8: |
| 35 | /* GPG1[3:6] special-funtion 3 */ | 35 | /* GPG1[3:6] special-function 3 */ |
| 36 | s3c_gpio_cfgrange_nopull(S5PV210_GPG1(3), 4, S3C_GPIO_SFN(3)); | 36 | s3c_gpio_cfgrange_nopull(S5PV210_GPG1(3), 4, S3C_GPIO_SFN(3)); |
| 37 | case 4: | 37 | case 4: |
| 38 | /* GPG0[3:6] special-funtion 2 */ | 38 | /* GPG0[3:6] special-function 2 */ |
| 39 | s3c_gpio_cfgrange_nopull(S5PV210_GPG0(3), 4, S3C_GPIO_SFN(2)); | 39 | s3c_gpio_cfgrange_nopull(S5PV210_GPG0(3), 4, S3C_GPIO_SFN(2)); |
| 40 | default: | 40 | default: |
| 41 | break; | 41 | break; |
diff --git a/arch/arm/mach-s5pv210/setup-sdhci.c b/arch/arm/mach-s5pv210/setup-sdhci.c index c32e202731c1..a83b6c909f6b 100644 --- a/arch/arm/mach-s5pv210/setup-sdhci.c +++ b/arch/arm/mach-s5pv210/setup-sdhci.c | |||
| @@ -38,7 +38,7 @@ void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev, | |||
| 38 | { | 38 | { |
| 39 | u32 ctrl2, ctrl3; | 39 | u32 ctrl2, ctrl3; |
| 40 | 40 | ||
| 41 | /* don't need to alter anything acording to card-type */ | 41 | /* don't need to alter anything according to card-type */ |
| 42 | 42 | ||
| 43 | writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4); | 43 | writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4); |
| 44 | 44 | ||
diff --git a/arch/arm/mach-sa1100/Makefile b/arch/arm/mach-sa1100/Makefile index e697691eed28..41252d22e659 100644 --- a/arch/arm/mach-sa1100/Makefile +++ b/arch/arm/mach-sa1100/Makefile | |||
| @@ -50,7 +50,7 @@ led-$(CONFIG_SA1100_SIMPAD) += leds-simpad.o | |||
| 50 | # LEDs support | 50 | # LEDs support |
| 51 | obj-$(CONFIG_LEDS) += $(led-y) | 51 | obj-$(CONFIG_LEDS) += $(led-y) |
| 52 | 52 | ||
| 53 | # Miscelaneous functions | 53 | # Miscellaneous functions |
| 54 | obj-$(CONFIG_PM) += pm.o sleep.o | 54 | obj-$(CONFIG_PM) += pm.o sleep.o |
| 55 | obj-$(CONFIG_SA1100_SSP) += ssp.o | 55 | obj-$(CONFIG_SA1100_SSP) += ssp.o |
| 56 | 56 | ||
diff --git a/arch/arm/mach-sa1100/cpu-sa1100.c b/arch/arm/mach-sa1100/cpu-sa1100.c index 07d4e8ba3719..aaa8acf76b7b 100644 --- a/arch/arm/mach-sa1100/cpu-sa1100.c +++ b/arch/arm/mach-sa1100/cpu-sa1100.c | |||
| @@ -68,7 +68,7 @@ | |||
| 68 | * clock change in ROM and jump to that code from the kernel. The main | 68 | * clock change in ROM and jump to that code from the kernel. The main |
| 69 | * disadvantage is that the ROM has to be modified, which is not | 69 | * disadvantage is that the ROM has to be modified, which is not |
| 70 | * possible on all SA-1100 platforms. Another disadvantage is that | 70 | * possible on all SA-1100 platforms. Another disadvantage is that |
| 71 | * jumping to ROM makes clock switching unecessary complicated. | 71 | * jumping to ROM makes clock switching unnecessary complicated. |
| 72 | * | 72 | * |
| 73 | * The idea behind this driver is that the memory configuration can be | 73 | * The idea behind this driver is that the memory configuration can be |
| 74 | * changed while running from DRAM (even with interrupts turned on!) | 74 | * changed while running from DRAM (even with interrupts turned on!) |
diff --git a/arch/arm/mach-sa1100/include/mach/SA-1100.h b/arch/arm/mach-sa1100/include/mach/SA-1100.h index 4f7ea012e1e5..bae8296f5dbf 100644 --- a/arch/arm/mach-sa1100/include/mach/SA-1100.h +++ b/arch/arm/mach-sa1100/include/mach/SA-1100.h | |||
| @@ -1794,7 +1794,7 @@ | |||
| 1794 | (DDAR_DevRd + DDAR_Brst4 + DDAR_16BitDev + \ | 1794 | (DDAR_DevRd + DDAR_Brst4 + DDAR_16BitDev + \ |
| 1795 | DDAR_Ser4SSPRc + DDAR_DevAdd (__PREG(Ser4SSDR))) | 1795 | DDAR_Ser4SSPRc + DDAR_DevAdd (__PREG(Ser4SSDR))) |
| 1796 | 1796 | ||
| 1797 | #define DCSR_RUN 0x00000001 /* DMA RUNing */ | 1797 | #define DCSR_RUN 0x00000001 /* DMA running */ |
| 1798 | #define DCSR_IE 0x00000002 /* DMA Interrupt Enable */ | 1798 | #define DCSR_IE 0x00000002 /* DMA Interrupt Enable */ |
| 1799 | #define DCSR_ERROR 0x00000004 /* DMA ERROR */ | 1799 | #define DCSR_ERROR 0x00000004 /* DMA ERROR */ |
| 1800 | #define DCSR_DONEA 0x00000008 /* DONE DMA transfer buffer A */ | 1800 | #define DCSR_DONEA 0x00000008 /* DONE DMA transfer buffer A */ |
diff --git a/arch/arm/mach-sa1100/jornada720_ssp.c b/arch/arm/mach-sa1100/jornada720_ssp.c index 9d490c66891c..f50b00bd18a0 100644 --- a/arch/arm/mach-sa1100/jornada720_ssp.c +++ b/arch/arm/mach-sa1100/jornada720_ssp.c | |||
| @@ -29,7 +29,7 @@ static unsigned long jornada_ssp_flags; | |||
| 29 | /** | 29 | /** |
| 30 | * jornada_ssp_reverse - reverses input byte | 30 | * jornada_ssp_reverse - reverses input byte |
| 31 | * | 31 | * |
| 32 | * we need to reverse all data we recieve from the mcu due to its physical location | 32 | * we need to reverse all data we receive from the mcu due to its physical location |
| 33 | * returns : 01110111 -> 11101110 | 33 | * returns : 01110111 -> 11101110 |
| 34 | */ | 34 | */ |
| 35 | u8 inline jornada_ssp_reverse(u8 byte) | 35 | u8 inline jornada_ssp_reverse(u8 byte) |
| @@ -179,7 +179,7 @@ static int __devinit jornada_ssp_probe(struct platform_device *dev) | |||
| 179 | 179 | ||
| 180 | static int jornada_ssp_remove(struct platform_device *dev) | 180 | static int jornada_ssp_remove(struct platform_device *dev) |
| 181 | { | 181 | { |
| 182 | /* Note that this doesnt actually remove the driver, since theres nothing to remove | 182 | /* Note that this doesn't actually remove the driver, since theres nothing to remove |
| 183 | * It just makes sure everything is turned off */ | 183 | * It just makes sure everything is turned off */ |
| 184 | GPSR = GPIO_GPIO25; | 184 | GPSR = GPIO_GPIO25; |
| 185 | ssp_exit(); | 185 | ssp_exit(); |
diff --git a/arch/arm/mach-tegra/dma.c b/arch/arm/mach-tegra/dma.c index e945ae28ee77..f4ef5eb317bd 100644 --- a/arch/arm/mach-tegra/dma.c +++ b/arch/arm/mach-tegra/dma.c | |||
| @@ -223,7 +223,7 @@ int tegra_dma_dequeue_req(struct tegra_dma_channel *ch, | |||
| 223 | * - Change the source selector to invalid to stop the DMA from | 223 | * - Change the source selector to invalid to stop the DMA from |
| 224 | * FIFO to memory. | 224 | * FIFO to memory. |
| 225 | * - Read the status register to know the number of pending | 225 | * - Read the status register to know the number of pending |
| 226 | * bytes to be transfered. | 226 | * bytes to be transferred. |
| 227 | * - Finally stop or program the DMA to the next buffer in the | 227 | * - Finally stop or program the DMA to the next buffer in the |
| 228 | * list. | 228 | * list. |
| 229 | */ | 229 | */ |
| @@ -244,7 +244,7 @@ int tegra_dma_dequeue_req(struct tegra_dma_channel *ch, | |||
| 244 | if (status & STA_BUSY) | 244 | if (status & STA_BUSY) |
| 245 | req->bytes_transferred -= to_transfer; | 245 | req->bytes_transferred -= to_transfer; |
| 246 | 246 | ||
| 247 | /* In continous transfer mode, DMA only tracks the count of the | 247 | /* In continuous transfer mode, DMA only tracks the count of the |
| 248 | * half DMA buffer. So, if the DMA already finished half the DMA | 248 | * half DMA buffer. So, if the DMA already finished half the DMA |
| 249 | * then add the half buffer to the completed count. | 249 | * then add the half buffer to the completed count. |
| 250 | * | 250 | * |
diff --git a/arch/arm/mach-tegra/include/mach/dma.h b/arch/arm/mach-tegra/include/mach/dma.h index 39011bd9a925..d0132e8031a1 100644 --- a/arch/arm/mach-tegra/include/mach/dma.h +++ b/arch/arm/mach-tegra/include/mach/dma.h | |||
| @@ -92,11 +92,11 @@ struct tegra_dma_req { | |||
| 92 | /* This is a called from the DMA ISR context when the DMA is still in | 92 | /* This is a called from the DMA ISR context when the DMA is still in |
| 93 | * progress and is actively filling same buffer. | 93 | * progress and is actively filling same buffer. |
| 94 | * | 94 | * |
| 95 | * In case of continous mode receive, this threshold is 1/2 the buffer | 95 | * In case of continuous mode receive, this threshold is 1/2 the buffer |
| 96 | * size. In other cases, this will not even be called as there is no | 96 | * size. In other cases, this will not even be called as there is no |
| 97 | * hardware support for it. | 97 | * hardware support for it. |
| 98 | * | 98 | * |
| 99 | * In the case of continous mode receive, if there is next req already | 99 | * In the case of continuous mode receive, if there is next req already |
| 100 | * queued, DMA programs the HW to use that req when this req is | 100 | * queued, DMA programs the HW to use that req when this req is |
| 101 | * completed. If there is no "next req" queued, then DMA ISR doesn't do | 101 | * completed. If there is no "next req" queued, then DMA ISR doesn't do |
| 102 | * anything before calling this callback. | 102 | * anything before calling this callback. |
diff --git a/arch/arm/mach-u300/clock.c b/arch/arm/mach-u300/clock.c index fabcc49abe80..5535dd0a78c9 100644 --- a/arch/arm/mach-u300/clock.c +++ b/arch/arm/mach-u300/clock.c | |||
| @@ -263,7 +263,7 @@ static void disable_i2s0_vcxo(void) | |||
| 263 | val = readw(U300_SYSCON_VBASE + U300_SYSCON_CCR); | 263 | val = readw(U300_SYSCON_VBASE + U300_SYSCON_CCR); |
| 264 | val &= ~U300_SYSCON_CCR_I2S0_USE_VCXO; | 264 | val &= ~U300_SYSCON_CCR_I2S0_USE_VCXO; |
| 265 | writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR); | 265 | writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR); |
| 266 | /* Deactivate VCXO if noone else is using VCXO */ | 266 | /* Deactivate VCXO if no one else is using VCXO */ |
| 267 | if (!(val & U300_SYSCON_CCR_I2S1_USE_VCXO)) | 267 | if (!(val & U300_SYSCON_CCR_I2S1_USE_VCXO)) |
| 268 | val &= ~U300_SYSCON_CCR_TURN_VCXO_ON; | 268 | val &= ~U300_SYSCON_CCR_TURN_VCXO_ON; |
| 269 | writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR); | 269 | writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR); |
| @@ -283,7 +283,7 @@ static void disable_i2s1_vcxo(void) | |||
| 283 | val = readw(U300_SYSCON_VBASE + U300_SYSCON_CCR); | 283 | val = readw(U300_SYSCON_VBASE + U300_SYSCON_CCR); |
| 284 | val &= ~U300_SYSCON_CCR_I2S1_USE_VCXO; | 284 | val &= ~U300_SYSCON_CCR_I2S1_USE_VCXO; |
| 285 | writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR); | 285 | writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR); |
| 286 | /* Deactivate VCXO if noone else is using VCXO */ | 286 | /* Deactivate VCXO if no one else is using VCXO */ |
| 287 | if (!(val & U300_SYSCON_CCR_I2S0_USE_VCXO)) | 287 | if (!(val & U300_SYSCON_CCR_I2S0_USE_VCXO)) |
| 288 | val &= ~U300_SYSCON_CCR_TURN_VCXO_ON; | 288 | val &= ~U300_SYSCON_CCR_TURN_VCXO_ON; |
| 289 | writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR); | 289 | writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR); |
| @@ -649,7 +649,7 @@ static unsigned long clk_round_rate_cpuclk(struct clk *clk, unsigned long rate) | |||
| 649 | */ | 649 | */ |
| 650 | long clk_round_rate(struct clk *clk, unsigned long rate) | 650 | long clk_round_rate(struct clk *clk, unsigned long rate) |
| 651 | { | 651 | { |
| 652 | /* TODO: get apropriate switches for EMIFCLK, AHBCLK and MCLK */ | 652 | /* TODO: get appropriate switches for EMIFCLK, AHBCLK and MCLK */ |
| 653 | /* Else default to fixed value */ | 653 | /* Else default to fixed value */ |
| 654 | 654 | ||
| 655 | if (clk->round_rate) { | 655 | if (clk->round_rate) { |
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c index dc8746d7826e..af913741e6ec 100644 --- a/arch/arm/mach-ux500/board-mop500.c +++ b/arch/arm/mach-ux500/board-mop500.c | |||
| @@ -52,7 +52,7 @@ static struct ab8500_gpio_platform_data ab8500_gpio_pdata = { | |||
| 52 | * on value present in GpioSel1 to GpioSel6 and AlternatFunction | 52 | * on value present in GpioSel1 to GpioSel6 and AlternatFunction |
| 53 | * register. This is the array of 7 configuration settings. | 53 | * register. This is the array of 7 configuration settings. |
| 54 | * One has to compile time decide these settings. Below is the | 54 | * One has to compile time decide these settings. Below is the |
| 55 | * explaination of these setting | 55 | * explanation of these setting |
| 56 | * GpioSel1 = 0x00 => Pins GPIO1 to GPIO8 are not used as GPIO | 56 | * GpioSel1 = 0x00 => Pins GPIO1 to GPIO8 are not used as GPIO |
| 57 | * GpioSel2 = 0x1E => Pins GPIO10 to GPIO13 are configured as GPIO | 57 | * GpioSel2 = 0x1E => Pins GPIO10 to GPIO13 are configured as GPIO |
| 58 | * GpioSel3 = 0x80 => Pin GPIO24 is configured as GPIO | 58 | * GpioSel3 = 0x80 => Pin GPIO24 is configured as GPIO |
diff --git a/arch/arm/mach-ux500/include/mach/db8500-regs.h b/arch/arm/mach-ux500/include/mach/db8500-regs.h index 0fefb34c11e4..16647b255378 100644 --- a/arch/arm/mach-ux500/include/mach/db8500-regs.h +++ b/arch/arm/mach-ux500/include/mach/db8500-regs.h | |||
| @@ -58,7 +58,7 @@ | |||
| 58 | #define U8500_GPIO2_BASE (U8500_PER2_BASE + 0xE000) | 58 | #define U8500_GPIO2_BASE (U8500_PER2_BASE + 0xE000) |
| 59 | #define U8500_GPIO3_BASE (U8500_PER5_BASE + 0x1E000) | 59 | #define U8500_GPIO3_BASE (U8500_PER5_BASE + 0x1E000) |
| 60 | 60 | ||
| 61 | /* per7 base addressess */ | 61 | /* per7 base addresses */ |
| 62 | #define U8500_CR_BASE_ED (U8500_PER7_BASE_ED + 0x8000) | 62 | #define U8500_CR_BASE_ED (U8500_PER7_BASE_ED + 0x8000) |
| 63 | #define U8500_MTU0_BASE_ED (U8500_PER7_BASE_ED + 0xa000) | 63 | #define U8500_MTU0_BASE_ED (U8500_PER7_BASE_ED + 0xa000) |
| 64 | #define U8500_MTU1_BASE_ED (U8500_PER7_BASE_ED + 0xb000) | 64 | #define U8500_MTU1_BASE_ED (U8500_PER7_BASE_ED + 0xb000) |
| @@ -68,7 +68,7 @@ | |||
| 68 | #define U8500_UART0_BASE (U8500_PER1_BASE + 0x0000) | 68 | #define U8500_UART0_BASE (U8500_PER1_BASE + 0x0000) |
| 69 | #define U8500_UART1_BASE (U8500_PER1_BASE + 0x1000) | 69 | #define U8500_UART1_BASE (U8500_PER1_BASE + 0x1000) |
| 70 | 70 | ||
| 71 | /* per6 base addressess */ | 71 | /* per6 base addresses */ |
| 72 | #define U8500_RNG_BASE (U8500_PER6_BASE + 0x0000) | 72 | #define U8500_RNG_BASE (U8500_PER6_BASE + 0x0000) |
| 73 | #define U8500_PKA_BASE (U8500_PER6_BASE + 0x1000) | 73 | #define U8500_PKA_BASE (U8500_PER6_BASE + 0x1000) |
| 74 | #define U8500_PKAM_BASE (U8500_PER6_BASE + 0x2000) | 74 | #define U8500_PKAM_BASE (U8500_PER6_BASE + 0x2000) |
| @@ -79,11 +79,11 @@ | |||
| 79 | #define U8500_CRYPTO1_BASE (U8500_PER6_BASE + 0xb000) | 79 | #define U8500_CRYPTO1_BASE (U8500_PER6_BASE + 0xb000) |
| 80 | #define U8500_CLKRST6_BASE (U8500_PER6_BASE + 0xf000) | 80 | #define U8500_CLKRST6_BASE (U8500_PER6_BASE + 0xf000) |
| 81 | 81 | ||
| 82 | /* per5 base addressess */ | 82 | /* per5 base addresses */ |
| 83 | #define U8500_USBOTG_BASE (U8500_PER5_BASE + 0x00000) | 83 | #define U8500_USBOTG_BASE (U8500_PER5_BASE + 0x00000) |
| 84 | #define U8500_CLKRST5_BASE (U8500_PER5_BASE + 0x1f000) | 84 | #define U8500_CLKRST5_BASE (U8500_PER5_BASE + 0x1f000) |
| 85 | 85 | ||
| 86 | /* per4 base addressess */ | 86 | /* per4 base addresses */ |
| 87 | #define U8500_BACKUPRAM0_BASE (U8500_PER4_BASE + 0x00000) | 87 | #define U8500_BACKUPRAM0_BASE (U8500_PER4_BASE + 0x00000) |
| 88 | #define U8500_BACKUPRAM1_BASE (U8500_PER4_BASE + 0x01000) | 88 | #define U8500_BACKUPRAM1_BASE (U8500_PER4_BASE + 0x01000) |
| 89 | #define U8500_RTT0_BASE (U8500_PER4_BASE + 0x02000) | 89 | #define U8500_RTT0_BASE (U8500_PER4_BASE + 0x02000) |
| @@ -106,7 +106,7 @@ | |||
| 106 | #define U8500_SDI5_BASE (U8500_PER3_BASE + 0x8000) | 106 | #define U8500_SDI5_BASE (U8500_PER3_BASE + 0x8000) |
| 107 | #define U8500_CLKRST3_BASE (U8500_PER3_BASE + 0xf000) | 107 | #define U8500_CLKRST3_BASE (U8500_PER3_BASE + 0xf000) |
| 108 | 108 | ||
| 109 | /* per2 base addressess */ | 109 | /* per2 base addresses */ |
| 110 | #define U8500_I2C3_BASE (U8500_PER2_BASE + 0x0000) | 110 | #define U8500_I2C3_BASE (U8500_PER2_BASE + 0x0000) |
| 111 | #define U8500_SPI2_BASE (U8500_PER2_BASE + 0x1000) | 111 | #define U8500_SPI2_BASE (U8500_PER2_BASE + 0x1000) |
| 112 | #define U8500_SPI1_BASE (U8500_PER2_BASE + 0x2000) | 112 | #define U8500_SPI1_BASE (U8500_PER2_BASE + 0x2000) |
diff --git a/arch/arm/mm/cache-v4wb.S b/arch/arm/mm/cache-v4wb.S index d3644db467b7..f40c69656d8d 100644 --- a/arch/arm/mm/cache-v4wb.S +++ b/arch/arm/mm/cache-v4wb.S | |||
| @@ -32,7 +32,7 @@ | |||
| 32 | /* | 32 | /* |
| 33 | * This is the size at which it becomes more efficient to | 33 | * This is the size at which it becomes more efficient to |
| 34 | * clean the whole cache, rather than using the individual | 34 | * clean the whole cache, rather than using the individual |
| 35 | * cache line maintainence instructions. | 35 | * cache line maintenance instructions. |
| 36 | * | 36 | * |
| 37 | * Size Clean (ticks) Dirty (ticks) | 37 | * Size Clean (ticks) Dirty (ticks) |
| 38 | * 4096 21 20 21 53 55 54 | 38 | * 4096 21 20 21 53 55 54 |
diff --git a/arch/arm/mm/cache-v4wt.S b/arch/arm/mm/cache-v4wt.S index 49c2b66cf3dd..a7b276dbda11 100644 --- a/arch/arm/mm/cache-v4wt.S +++ b/arch/arm/mm/cache-v4wt.S | |||
| @@ -34,7 +34,7 @@ | |||
| 34 | /* | 34 | /* |
| 35 | * This is the size at which it becomes more efficient to | 35 | * This is the size at which it becomes more efficient to |
| 36 | * clean the whole cache, rather than using the individual | 36 | * clean the whole cache, rather than using the individual |
| 37 | * cache line maintainence instructions. | 37 | * cache line maintenance instructions. |
| 38 | * | 38 | * |
| 39 | * *** This needs benchmarking | 39 | * *** This needs benchmarking |
| 40 | */ | 40 | */ |
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S index 6136e68ce953..dc18d81ef8ce 100644 --- a/arch/arm/mm/cache-v7.S +++ b/arch/arm/mm/cache-v7.S | |||
| @@ -96,7 +96,7 @@ ENDPROC(v7_flush_dcache_all) | |||
| 96 | * Flush the entire cache system. | 96 | * Flush the entire cache system. |
| 97 | * The data cache flush is now achieved using atomic clean / invalidates | 97 | * The data cache flush is now achieved using atomic clean / invalidates |
| 98 | * working outwards from L1 cache. This is done using Set/Way based cache | 98 | * working outwards from L1 cache. This is done using Set/Way based cache |
| 99 | * maintainance instructions. | 99 | * maintenance instructions. |
| 100 | * The instruction cache can still be invalidated back to the point of | 100 | * The instruction cache can still be invalidated back to the point of |
| 101 | * unification in a single instruction. | 101 | * unification in a single instruction. |
| 102 | * | 102 | * |
diff --git a/arch/arm/mm/proc-arm1020.S b/arch/arm/mm/proc-arm1020.S index 226e3d8351c2..6c4e7fd6c8af 100644 --- a/arch/arm/mm/proc-arm1020.S +++ b/arch/arm/mm/proc-arm1020.S | |||
| @@ -64,7 +64,7 @@ | |||
| 64 | /* | 64 | /* |
| 65 | * This is the size at which it becomes more efficient to | 65 | * This is the size at which it becomes more efficient to |
| 66 | * clean the whole cache, rather than using the individual | 66 | * clean the whole cache, rather than using the individual |
| 67 | * cache line maintainence instructions. | 67 | * cache line maintenance instructions. |
| 68 | */ | 68 | */ |
| 69 | #define CACHE_DLIMIT 32768 | 69 | #define CACHE_DLIMIT 32768 |
| 70 | 70 | ||
diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S index 86d9c2cf0bce..4ce947c19623 100644 --- a/arch/arm/mm/proc-arm1020e.S +++ b/arch/arm/mm/proc-arm1020e.S | |||
| @@ -64,7 +64,7 @@ | |||
| 64 | /* | 64 | /* |
| 65 | * This is the size at which it becomes more efficient to | 65 | * This is the size at which it becomes more efficient to |
| 66 | * clean the whole cache, rather than using the individual | 66 | * clean the whole cache, rather than using the individual |
| 67 | * cache line maintainence instructions. | 67 | * cache line maintenance instructions. |
| 68 | */ | 68 | */ |
| 69 | #define CACHE_DLIMIT 32768 | 69 | #define CACHE_DLIMIT 32768 |
| 70 | 70 | ||
diff --git a/arch/arm/mm/proc-arm1022.S b/arch/arm/mm/proc-arm1022.S index 83d3dd34f846..c8884c5413a2 100644 --- a/arch/arm/mm/proc-arm1022.S +++ b/arch/arm/mm/proc-arm1022.S | |||
| @@ -53,7 +53,7 @@ | |||
| 53 | /* | 53 | /* |
| 54 | * This is the size at which it becomes more efficient to | 54 | * This is the size at which it becomes more efficient to |
| 55 | * clean the whole cache, rather than using the individual | 55 | * clean the whole cache, rather than using the individual |
| 56 | * cache line maintainence instructions. | 56 | * cache line maintenance instructions. |
| 57 | */ | 57 | */ |
| 58 | #define CACHE_DLIMIT 32768 | 58 | #define CACHE_DLIMIT 32768 |
| 59 | 59 | ||
diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S index 686043ee7281..413684660aad 100644 --- a/arch/arm/mm/proc-arm1026.S +++ b/arch/arm/mm/proc-arm1026.S | |||
| @@ -53,7 +53,7 @@ | |||
| 53 | /* | 53 | /* |
| 54 | * This is the size at which it becomes more efficient to | 54 | * This is the size at which it becomes more efficient to |
| 55 | * clean the whole cache, rather than using the individual | 55 | * clean the whole cache, rather than using the individual |
| 56 | * cache line maintainence instructions. | 56 | * cache line maintenance instructions. |
| 57 | */ | 57 | */ |
| 58 | #define CACHE_DLIMIT 32768 | 58 | #define CACHE_DLIMIT 32768 |
| 59 | 59 | ||
diff --git a/arch/arm/mm/proc-arm720.S b/arch/arm/mm/proc-arm720.S index 665266da143c..7a06e5964f59 100644 --- a/arch/arm/mm/proc-arm720.S +++ b/arch/arm/mm/proc-arm720.S | |||
| @@ -63,7 +63,7 @@ ENTRY(cpu_arm720_proc_fin) | |||
| 63 | /* | 63 | /* |
| 64 | * Function: arm720_proc_do_idle(void) | 64 | * Function: arm720_proc_do_idle(void) |
| 65 | * Params : r0 = unused | 65 | * Params : r0 = unused |
| 66 | * Purpose : put the processer in proper idle mode | 66 | * Purpose : put the processor in proper idle mode |
| 67 | */ | 67 | */ |
| 68 | ENTRY(cpu_arm720_do_idle) | 68 | ENTRY(cpu_arm720_do_idle) |
| 69 | mov pc, lr | 69 | mov pc, lr |
diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S index 219980ec8b6e..b46eb21f05c7 100644 --- a/arch/arm/mm/proc-arm920.S +++ b/arch/arm/mm/proc-arm920.S | |||
| @@ -53,7 +53,7 @@ | |||
| 53 | /* | 53 | /* |
| 54 | * This is the size at which it becomes more efficient to | 54 | * This is the size at which it becomes more efficient to |
| 55 | * clean the whole cache, rather than using the individual | 55 | * clean the whole cache, rather than using the individual |
| 56 | * cache line maintainence instructions. | 56 | * cache line maintenance instructions. |
| 57 | */ | 57 | */ |
| 58 | #define CACHE_DLIMIT 65536 | 58 | #define CACHE_DLIMIT 65536 |
| 59 | 59 | ||
diff --git a/arch/arm/mm/proc-arm922.S b/arch/arm/mm/proc-arm922.S index 36154b1e792a..95ba1fc56e4d 100644 --- a/arch/arm/mm/proc-arm922.S +++ b/arch/arm/mm/proc-arm922.S | |||
| @@ -54,7 +54,7 @@ | |||
| 54 | /* | 54 | /* |
| 55 | * This is the size at which it becomes more efficient to | 55 | * This is the size at which it becomes more efficient to |
| 56 | * clean the whole cache, rather than using the individual | 56 | * clean the whole cache, rather than using the individual |
| 57 | * cache line maintainence instructions. (I think this should | 57 | * cache line maintenance instructions. (I think this should |
| 58 | * be 32768). | 58 | * be 32768). |
| 59 | */ | 59 | */ |
| 60 | #define CACHE_DLIMIT 8192 | 60 | #define CACHE_DLIMIT 8192 |
diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S index 89c5e0009c4c..541e4774eea1 100644 --- a/arch/arm/mm/proc-arm925.S +++ b/arch/arm/mm/proc-arm925.S | |||
| @@ -77,7 +77,7 @@ | |||
| 77 | /* | 77 | /* |
| 78 | * This is the size at which it becomes more efficient to | 78 | * This is the size at which it becomes more efficient to |
| 79 | * clean the whole cache, rather than using the individual | 79 | * clean the whole cache, rather than using the individual |
| 80 | * cache line maintainence instructions. | 80 | * cache line maintenance instructions. |
| 81 | */ | 81 | */ |
| 82 | #define CACHE_DLIMIT 8192 | 82 | #define CACHE_DLIMIT 8192 |
| 83 | 83 | ||
diff --git a/arch/arm/mm/proc-macros.S b/arch/arm/mm/proc-macros.S index e32fa499194c..34261f9486b9 100644 --- a/arch/arm/mm/proc-macros.S +++ b/arch/arm/mm/proc-macros.S | |||
| @@ -85,7 +85,7 @@ | |||
| 85 | 85 | ||
| 86 | /* | 86 | /* |
| 87 | * Sanity check the PTE configuration for the code below - which makes | 87 | * Sanity check the PTE configuration for the code below - which makes |
| 88 | * certain assumptions about how these bits are layed out. | 88 | * certain assumptions about how these bits are laid out. |
| 89 | */ | 89 | */ |
| 90 | #ifdef CONFIG_MMU | 90 | #ifdef CONFIG_MMU |
| 91 | #if L_PTE_SHARED != PTE_EXT_SHARED | 91 | #if L_PTE_SHARED != PTE_EXT_SHARED |
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S index 832b6bdc192c..bfa0c9f611c5 100644 --- a/arch/arm/mm/proc-v6.S +++ b/arch/arm/mm/proc-v6.S | |||
| @@ -132,7 +132,7 @@ ENTRY(cpu_v6_do_suspend) | |||
| 132 | mrc p15, 0, r6, c3, c0, 0 @ Domain ID | 132 | mrc p15, 0, r6, c3, c0, 0 @ Domain ID |
| 133 | mrc p15, 0, r7, c2, c0, 0 @ Translation table base 0 | 133 | mrc p15, 0, r7, c2, c0, 0 @ Translation table base 0 |
| 134 | mrc p15, 0, r8, c2, c0, 1 @ Translation table base 1 | 134 | mrc p15, 0, r8, c2, c0, 1 @ Translation table base 1 |
| 135 | mrc p15, 0, r9, c1, c0, 1 @ auxillary control register | 135 | mrc p15, 0, r9, c1, c0, 1 @ auxiliary control register |
| 136 | mrc p15, 0, r10, c1, c0, 2 @ co-processor access control | 136 | mrc p15, 0, r10, c1, c0, 2 @ co-processor access control |
| 137 | mrc p15, 0, r11, c1, c0, 0 @ control register | 137 | mrc p15, 0, r11, c1, c0, 0 @ control register |
| 138 | stmia r0, {r4 - r11} | 138 | stmia r0, {r4 - r11} |
| @@ -151,7 +151,7 @@ ENTRY(cpu_v6_do_resume) | |||
| 151 | mcr p15, 0, r6, c3, c0, 0 @ Domain ID | 151 | mcr p15, 0, r6, c3, c0, 0 @ Domain ID |
| 152 | mcr p15, 0, r7, c2, c0, 0 @ Translation table base 0 | 152 | mcr p15, 0, r7, c2, c0, 0 @ Translation table base 0 |
| 153 | mcr p15, 0, r8, c2, c0, 1 @ Translation table base 1 | 153 | mcr p15, 0, r8, c2, c0, 1 @ Translation table base 1 |
| 154 | mcr p15, 0, r9, c1, c0, 1 @ auxillary control register | 154 | mcr p15, 0, r9, c1, c0, 1 @ auxiliary control register |
| 155 | mcr p15, 0, r10, c1, c0, 2 @ co-processor access control | 155 | mcr p15, 0, r10, c1, c0, 2 @ co-processor access control |
| 156 | mcr p15, 0, ip, c2, c0, 2 @ TTB control register | 156 | mcr p15, 0, ip, c2, c0, 2 @ TTB control register |
| 157 | mcr p15, 0, ip, c7, c5, 4 @ ISB | 157 | mcr p15, 0, ip, c7, c5, 4 @ ISB |
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 262fa88a7439..c35618e42f6f 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S | |||
| @@ -237,7 +237,7 @@ ENTRY(cpu_v7_do_resume) | |||
| 237 | mcr p15, 0, r7, c2, c0, 0 @ TTB 0 | 237 | mcr p15, 0, r7, c2, c0, 0 @ TTB 0 |
| 238 | mcr p15, 0, r8, c2, c0, 1 @ TTB 1 | 238 | mcr p15, 0, r8, c2, c0, 1 @ TTB 1 |
| 239 | mcr p15, 0, ip, c2, c0, 2 @ TTB control register | 239 | mcr p15, 0, ip, c2, c0, 2 @ TTB control register |
| 240 | mcr p15, 0, r10, c1, c0, 1 @ Auxillary control register | 240 | mcr p15, 0, r10, c1, c0, 1 @ Auxiliary control register |
| 241 | mcr p15, 0, r11, c1, c0, 2 @ Co-processor access control | 241 | mcr p15, 0, r11, c1, c0, 2 @ Co-processor access control |
| 242 | ldr r4, =PRRR @ PRRR | 242 | ldr r4, =PRRR @ PRRR |
| 243 | ldr r5, =NMRR @ NMRR | 243 | ldr r5, =NMRR @ NMRR |
diff --git a/arch/arm/plat-mxc/cpufreq.c b/arch/arm/plat-mxc/cpufreq.c index ce81481becf1..4268a2bdf145 100644 --- a/arch/arm/plat-mxc/cpufreq.c +++ b/arch/arm/plat-mxc/cpufreq.c | |||
| @@ -13,7 +13,7 @@ | |||
| 13 | 13 | ||
| 14 | /* | 14 | /* |
| 15 | * A driver for the Freescale Semiconductor i.MXC CPUfreq module. | 15 | * A driver for the Freescale Semiconductor i.MXC CPUfreq module. |
| 16 | * The CPUFREQ driver is for controling CPU frequency. It allows you to change | 16 | * The CPUFREQ driver is for controlling CPU frequency. It allows you to change |
| 17 | * the CPU clock speed on the fly. | 17 | * the CPU clock speed on the fly. |
| 18 | */ | 18 | */ |
| 19 | 19 | ||
diff --git a/arch/arm/plat-mxc/include/mach/entry-macro.S b/arch/arm/plat-mxc/include/mach/entry-macro.S index bd9bb9799141..2e49e71b1b98 100644 --- a/arch/arm/plat-mxc/include/mach/entry-macro.S +++ b/arch/arm/plat-mxc/include/mach/entry-macro.S | |||
| @@ -33,9 +33,9 @@ | |||
| 33 | .macro arch_ret_to_user, tmp1, tmp2 | 33 | .macro arch_ret_to_user, tmp1, tmp2 |
| 34 | .endm | 34 | .endm |
| 35 | 35 | ||
| 36 | @ this macro checks which interrupt occured | 36 | @ this macro checks which interrupt occurred |
| 37 | @ and returns its number in irqnr | 37 | @ and returns its number in irqnr |
| 38 | @ and returns if an interrupt occured in irqstat | 38 | @ and returns if an interrupt occurred in irqstat |
| 39 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 39 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
| 40 | #ifndef CONFIG_MXC_TZIC | 40 | #ifndef CONFIG_MXC_TZIC |
| 41 | @ Load offset & priority of the highest priority | 41 | @ Load offset & priority of the highest priority |
diff --git a/arch/arm/plat-mxc/include/mach/mxc_nand.h b/arch/arm/plat-mxc/include/mach/mxc_nand.h index 04c0d060d814..6bb96ef1600b 100644 --- a/arch/arm/plat-mxc/include/mach/mxc_nand.h +++ b/arch/arm/plat-mxc/include/mach/mxc_nand.h | |||
| @@ -24,7 +24,7 @@ | |||
| 24 | 24 | ||
| 25 | struct mxc_nand_platform_data { | 25 | struct mxc_nand_platform_data { |
| 26 | unsigned int width; /* data bus width in bytes */ | 26 | unsigned int width; /* data bus width in bytes */ |
| 27 | unsigned int hw_ecc:1; /* 0 if supress hardware ECC */ | 27 | unsigned int hw_ecc:1; /* 0 if suppress hardware ECC */ |
| 28 | unsigned int flash_bbt:1; /* set to 1 to use a flash based bbt */ | 28 | unsigned int flash_bbt:1; /* set to 1 to use a flash based bbt */ |
| 29 | struct mtd_partition *parts; /* partition table */ | 29 | struct mtd_partition *parts; /* partition table */ |
| 30 | int nr_parts; /* size of parts */ | 30 | int nr_parts; /* size of parts */ |
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c index 7d9f815cedec..ea28f98d5d6a 100644 --- a/arch/arm/plat-omap/devices.c +++ b/arch/arm/plat-omap/devices.c | |||
| @@ -280,7 +280,7 @@ EXPORT_SYMBOL(omap_dsp_get_mempool_base); | |||
| 280 | * Claiming GPIOs, and setting their direction and initial values, is the | 280 | * Claiming GPIOs, and setting their direction and initial values, is the |
| 281 | * responsibility of the device drivers. So is responding to probe(). | 281 | * responsibility of the device drivers. So is responding to probe(). |
| 282 | * | 282 | * |
| 283 | * Board-specific knowlege like creating devices or pin setup is to be | 283 | * Board-specific knowledge like creating devices or pin setup is to be |
| 284 | * kept out of drivers as much as possible. In particular, pin setup | 284 | * kept out of drivers as much as possible. In particular, pin setup |
| 285 | * may be handled by the boot loader, and drivers should expect it will | 285 | * may be handled by the boot loader, and drivers should expect it will |
| 286 | * normally have been done by the time they're probed. | 286 | * normally have been done by the time they're probed. |
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index 2ec3b5d9f214..c22217c2ee5f 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c | |||
| @@ -1019,7 +1019,7 @@ EXPORT_SYMBOL(omap_set_dma_callback); | |||
| 1019 | * If the channel is running the caller must disable interrupts prior calling | 1019 | * If the channel is running the caller must disable interrupts prior calling |
| 1020 | * this function and process the returned value before re-enabling interrupt to | 1020 | * this function and process the returned value before re-enabling interrupt to |
| 1021 | * prevent races with the interrupt handler. Note that in continuous mode there | 1021 | * prevent races with the interrupt handler. Note that in continuous mode there |
| 1022 | * is a chance for CSSA_L register overflow inbetween the two reads resulting | 1022 | * is a chance for CSSA_L register overflow between the two reads resulting |
| 1023 | * in incorrect return value. | 1023 | * in incorrect return value. |
| 1024 | */ | 1024 | */ |
| 1025 | dma_addr_t omap_get_dma_src_pos(int lch) | 1025 | dma_addr_t omap_get_dma_src_pos(int lch) |
| @@ -1046,7 +1046,7 @@ EXPORT_SYMBOL(omap_get_dma_src_pos); | |||
| 1046 | * If the channel is running the caller must disable interrupts prior calling | 1046 | * If the channel is running the caller must disable interrupts prior calling |
| 1047 | * this function and process the returned value before re-enabling interrupt to | 1047 | * this function and process the returned value before re-enabling interrupt to |
| 1048 | * prevent races with the interrupt handler. Note that in continuous mode there | 1048 | * prevent races with the interrupt handler. Note that in continuous mode there |
| 1049 | * is a chance for CDSA_L register overflow inbetween the two reads resulting | 1049 | * is a chance for CDSA_L register overflow between the two reads resulting |
| 1050 | * in incorrect return value. | 1050 | * in incorrect return value. |
| 1051 | */ | 1051 | */ |
| 1052 | dma_addr_t omap_get_dma_dst_pos(int lch) | 1052 | dma_addr_t omap_get_dma_dst_pos(int lch) |
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h index d6f9fa0f62af..cac2e8ac6968 100644 --- a/arch/arm/plat-omap/include/plat/gpio.h +++ b/arch/arm/plat-omap/include/plat/gpio.h | |||
| @@ -93,7 +93,7 @@ extern void omap_gpio_restore_context(void); | |||
| 93 | /* Wrappers for "new style" GPIO calls, using the new infrastructure | 93 | /* Wrappers for "new style" GPIO calls, using the new infrastructure |
| 94 | * which lets us plug in FPGA, I2C, and other implementations. | 94 | * which lets us plug in FPGA, I2C, and other implementations. |
| 95 | * * | 95 | * * |
| 96 | * The original OMAP-specfic calls should eventually be removed. | 96 | * The original OMAP-specific calls should eventually be removed. |
| 97 | */ | 97 | */ |
| 98 | 98 | ||
| 99 | #include <linux/errno.h> | 99 | #include <linux/errno.h> |
diff --git a/arch/arm/plat-omap/include/plat/gpmc.h b/arch/arm/plat-omap/include/plat/gpmc.h index 12b316165037..1527929b445a 100644 --- a/arch/arm/plat-omap/include/plat/gpmc.h +++ b/arch/arm/plat-omap/include/plat/gpmc.h | |||
| @@ -90,7 +90,7 @@ enum omap_ecc { | |||
| 90 | /* 1-bit ecc: stored at end of spare area */ | 90 | /* 1-bit ecc: stored at end of spare area */ |
| 91 | OMAP_ECC_HAMMING_CODE_DEFAULT = 0, /* Default, s/w method */ | 91 | OMAP_ECC_HAMMING_CODE_DEFAULT = 0, /* Default, s/w method */ |
| 92 | OMAP_ECC_HAMMING_CODE_HW, /* gpmc to detect the error */ | 92 | OMAP_ECC_HAMMING_CODE_HW, /* gpmc to detect the error */ |
| 93 | /* 1-bit ecc: stored at begining of spare area as romcode */ | 93 | /* 1-bit ecc: stored at beginning of spare area as romcode */ |
| 94 | OMAP_ECC_HAMMING_CODE_HW_ROMCODE, /* gpmc method & romcode layout */ | 94 | OMAP_ECC_HAMMING_CODE_HW_ROMCODE, /* gpmc method & romcode layout */ |
| 95 | }; | 95 | }; |
| 96 | 96 | ||
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index d598d9fd65ac..5587acf0eb2c 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c | |||
| @@ -1103,7 +1103,7 @@ int omap_mcbsp_pollread(unsigned int id, u16 *buf) | |||
| 1103 | /* resend */ | 1103 | /* resend */ |
| 1104 | return -1; | 1104 | return -1; |
| 1105 | } else { | 1105 | } else { |
| 1106 | /* wait for recieve confirmation */ | 1106 | /* wait for receive confirmation */ |
| 1107 | int attemps = 0; | 1107 | int attemps = 0; |
| 1108 | while (!(MCBSP_READ(mcbsp, SPCR1) & RRDY)) { | 1108 | while (!(MCBSP_READ(mcbsp, SPCR1) & RRDY)) { |
| 1109 | if (attemps++ > 1000) { | 1109 | if (attemps++ > 1000) { |
diff --git a/arch/arm/plat-pxa/include/plat/mfp.h b/arch/arm/plat-pxa/include/plat/mfp.h index 75f656471240..89e68e07b0a8 100644 --- a/arch/arm/plat-pxa/include/plat/mfp.h +++ b/arch/arm/plat-pxa/include/plat/mfp.h | |||
| @@ -434,7 +434,7 @@ typedef unsigned long mfp_cfg_t; | |||
| 434 | * | 434 | * |
| 435 | * mfp_init_addr() - accepts a table of "mfp_addr_map" structure, which | 435 | * mfp_init_addr() - accepts a table of "mfp_addr_map" structure, which |
| 436 | * represents a range of MFP pins from "start" to "end", with the offset | 436 | * represents a range of MFP pins from "start" to "end", with the offset |
| 437 | * begining at "offset", to define a single pin, let "end" = -1. | 437 | * beginning at "offset", to define a single pin, let "end" = -1. |
| 438 | * | 438 | * |
| 439 | * use | 439 | * use |
| 440 | * | 440 | * |
diff --git a/arch/arm/plat-s3c24xx/Makefile b/arch/arm/plat-s3c24xx/Makefile index c2064c308719..0291bd6e236e 100644 --- a/arch/arm/plat-s3c24xx/Makefile +++ b/arch/arm/plat-s3c24xx/Makefile | |||
| @@ -23,7 +23,7 @@ obj-$(CONFIG_S3C24XX_DCLK) += clock-dclk.o | |||
| 23 | obj-$(CONFIG_CPU_FREQ_S3C24XX) += cpu-freq.o | 23 | obj-$(CONFIG_CPU_FREQ_S3C24XX) += cpu-freq.o |
| 24 | obj-$(CONFIG_CPU_FREQ_S3C24XX_DEBUGFS) += cpu-freq-debugfs.o | 24 | obj-$(CONFIG_CPU_FREQ_S3C24XX_DEBUGFS) += cpu-freq-debugfs.o |
| 25 | 25 | ||
| 26 | # Architecture dependant builds | 26 | # Architecture dependent builds |
| 27 | 27 | ||
| 28 | obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o | 28 | obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o |
| 29 | obj-$(CONFIG_PM) += pm.o | 29 | obj-$(CONFIG_PM) += pm.o |
diff --git a/arch/arm/plat-s3c24xx/cpu-freq.c b/arch/arm/plat-s3c24xx/cpu-freq.c index eea75ff81d15..b3d3d0278997 100644 --- a/arch/arm/plat-s3c24xx/cpu-freq.c +++ b/arch/arm/plat-s3c24xx/cpu-freq.c | |||
| @@ -455,7 +455,7 @@ static int s3c_cpufreq_resume(struct cpufreq_policy *policy) | |||
| 455 | 455 | ||
| 456 | /* whilst we will be called later on, we try and re-set the | 456 | /* whilst we will be called later on, we try and re-set the |
| 457 | * cpu frequencies as soon as possible so that we do not end | 457 | * cpu frequencies as soon as possible so that we do not end |
| 458 | * up resuming devices and then immediatley having to re-set | 458 | * up resuming devices and then immediately having to re-set |
| 459 | * a number of settings once these devices have restarted. | 459 | * a number of settings once these devices have restarted. |
| 460 | * | 460 | * |
| 461 | * as a note, it is expected devices are not used until they | 461 | * as a note, it is expected devices are not used until they |
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c index 6ad274e7593d..27ea852e3370 100644 --- a/arch/arm/plat-s3c24xx/dma.c +++ b/arch/arm/plat-s3c24xx/dma.c | |||
| @@ -557,7 +557,7 @@ s3c2410_dma_lastxfer(struct s3c2410_dma_chan *chan) | |||
| 557 | break; | 557 | break; |
| 558 | 558 | ||
| 559 | case S3C2410_DMALOAD_1LOADED_1RUNNING: | 559 | case S3C2410_DMALOAD_1LOADED_1RUNNING: |
| 560 | /* I belive in this case we do not have anything to do | 560 | /* I believe in this case we do not have anything to do |
| 561 | * until the next buffer comes along, and we turn off the | 561 | * until the next buffer comes along, and we turn off the |
| 562 | * reload */ | 562 | * reload */ |
| 563 | return; | 563 | return; |
diff --git a/arch/arm/plat-s5p/irq-gpioint.c b/arch/arm/plat-s5p/irq-gpioint.c index 46dd078147d8..cd6d67c8382a 100644 --- a/arch/arm/plat-s5p/irq-gpioint.c +++ b/arch/arm/plat-s5p/irq-gpioint.c | |||
| @@ -208,7 +208,7 @@ static __init int s5p_gpioint_add(struct s3c_gpio_chip *chip) | |||
| 208 | } | 208 | } |
| 209 | 209 | ||
| 210 | /* | 210 | /* |
| 211 | * chained GPIO irq has been sucessfully registered, allocate new gpio | 211 | * chained GPIO irq has been successfully registered, allocate new gpio |
| 212 | * int group and assign irq nubmers | 212 | * int group and assign irq nubmers |
| 213 | */ | 213 | */ |
| 214 | 214 | ||
diff --git a/arch/arm/plat-samsung/include/plat/clock.h b/arch/arm/plat-samsung/include/plat/clock.h index 9a82b8874918..983c578b8276 100644 --- a/arch/arm/plat-samsung/include/plat/clock.h +++ b/arch/arm/plat-samsung/include/plat/clock.h | |||
| @@ -21,7 +21,7 @@ struct clk; | |||
| 21 | * @set_parent: set the clock's parent, see clk_set_parent(). | 21 | * @set_parent: set the clock's parent, see clk_set_parent(). |
| 22 | * | 22 | * |
| 23 | * Group the common clock implementations together so that we | 23 | * Group the common clock implementations together so that we |
| 24 | * don't have to keep setting the same fiels again. We leave | 24 | * don't have to keep setting the same fields again. We leave |
| 25 | * enable in struct clk. | 25 | * enable in struct clk. |
| 26 | * | 26 | * |
| 27 | * Adding an extra layer of indirection into the process should | 27 | * Adding an extra layer of indirection into the process should |
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h b/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h index 5603db0b79bc..3ad8386599c3 100644 --- a/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h +++ b/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h | |||
| @@ -114,7 +114,7 @@ extern unsigned s3c_gpio_getcfg_s3c24xx_a(struct s3c_gpio_chip *chip, | |||
| 114 | * of control per GPIO, generally in the form of: | 114 | * of control per GPIO, generally in the form of: |
| 115 | * 0000 = Input | 115 | * 0000 = Input |
| 116 | * 0001 = Output | 116 | * 0001 = Output |
| 117 | * others = Special functions (dependant on bank) | 117 | * others = Special functions (dependent on bank) |
| 118 | * | 118 | * |
| 119 | * Note, since the code to deal with the case where there are two control | 119 | * Note, since the code to deal with the case where there are two control |
| 120 | * registers instead of one, we do not have a separate set of functions for | 120 | * registers instead of one, we do not have a separate set of functions for |
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h index 5e04fa6eda74..1762dcb4cb9e 100644 --- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h +++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h | |||
| @@ -125,7 +125,7 @@ extern int s3c_gpio_cfgpin_range(unsigned int start, unsigned int nr, | |||
| 125 | * | 125 | * |
| 126 | * These values control the state of the weak pull-{up,down} resistors | 126 | * These values control the state of the weak pull-{up,down} resistors |
| 127 | * available on most pins on the S3C series. Not all chips support both | 127 | * available on most pins on the S3C series. Not all chips support both |
| 128 | * up or down settings, and it may be dependant on the chip that is being | 128 | * up or down settings, and it may be dependent on the chip that is being |
| 129 | * used to whether the particular mode is available. | 129 | * used to whether the particular mode is available. |
| 130 | */ | 130 | */ |
| 131 | #define S3C_GPIO_PULL_NONE ((__force s3c_gpio_pull_t)0x00) | 131 | #define S3C_GPIO_PULL_NONE ((__force s3c_gpio_pull_t)0x00) |
| @@ -138,7 +138,7 @@ extern int s3c_gpio_cfgpin_range(unsigned int start, unsigned int nr, | |||
| 138 | * @pull: The configuration for the pull resistor. | 138 | * @pull: The configuration for the pull resistor. |
| 139 | * | 139 | * |
| 140 | * This function sets the state of the pull-{up,down} resistor for the | 140 | * This function sets the state of the pull-{up,down} resistor for the |
| 141 | * specified pin. It will return 0 if successfull, or a negative error | 141 | * specified pin. It will return 0 if successful, or a negative error |
| 142 | * code if the pin cannot support the requested pull setting. | 142 | * code if the pin cannot support the requested pull setting. |
| 143 | * | 143 | * |
| 144 | * @pull is one of S3C_GPIO_PULL_NONE, S3C_GPIO_PULL_DOWN or S3C_GPIO_PULL_UP. | 144 | * @pull is one of S3C_GPIO_PULL_NONE, S3C_GPIO_PULL_DOWN or S3C_GPIO_PULL_UP. |
| @@ -202,7 +202,7 @@ extern s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin); | |||
| 202 | * @drvstr: The new value of the driver strength | 202 | * @drvstr: The new value of the driver strength |
| 203 | * | 203 | * |
| 204 | * This function sets the driver strength value for the specified pin. | 204 | * This function sets the driver strength value for the specified pin. |
| 205 | * It will return 0 if successfull, or a negative error code if the pin | 205 | * It will return 0 if successful, or a negative error code if the pin |
| 206 | * cannot support the requested setting. | 206 | * cannot support the requested setting. |
| 207 | */ | 207 | */ |
| 208 | extern int s5p_gpio_set_drvstr(unsigned int pin, s5p_gpio_drvstr_t drvstr); | 208 | extern int s5p_gpio_set_drvstr(unsigned int pin, s5p_gpio_drvstr_t drvstr); |
diff --git a/arch/arm/plat-samsung/include/plat/gpio-core.h b/arch/arm/plat-samsung/include/plat/gpio-core.h index dac35d0a711d..8cad4cf19c3c 100644 --- a/arch/arm/plat-samsung/include/plat/gpio-core.h +++ b/arch/arm/plat-samsung/include/plat/gpio-core.h | |||
| @@ -108,7 +108,7 @@ extern void s3c_gpiolib_add(struct s3c_gpio_chip *chip); | |||
| 108 | * of control per GPIO, generally in the form of: | 108 | * of control per GPIO, generally in the form of: |
| 109 | * 0000 = Input | 109 | * 0000 = Input |
| 110 | * 0001 = Output | 110 | * 0001 = Output |
| 111 | * others = Special functions (dependant on bank) | 111 | * others = Special functions (dependent on bank) |
| 112 | * | 112 | * |
| 113 | * Note, since the code to deal with the case where there are two control | 113 | * Note, since the code to deal with the case where there are two control |
| 114 | * registers instead of one, we do not have a separate set of function | 114 | * registers instead of one, we do not have a separate set of function |
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h index b0bdf16549d5..058e09654fe8 100644 --- a/arch/arm/plat-samsung/include/plat/sdhci.h +++ b/arch/arm/plat-samsung/include/plat/sdhci.h | |||
| @@ -57,7 +57,7 @@ enum clk_types { | |||
| 57 | * @cfg_gpio: Configure the GPIO for a specific card bit-width | 57 | * @cfg_gpio: Configure the GPIO for a specific card bit-width |
| 58 | * @cfg_card: Configure the interface for a specific card and speed. This | 58 | * @cfg_card: Configure the interface for a specific card and speed. This |
| 59 | * is necessary the controllers and/or GPIO blocks require the | 59 | * is necessary the controllers and/or GPIO blocks require the |
| 60 | * changing of driver-strength and other controls dependant on | 60 | * changing of driver-strength and other controls dependent on |
| 61 | * the card and speed of operation. | 61 | * the card and speed of operation. |
| 62 | * | 62 | * |
| 63 | * Initialisation data specific to either the machine or the platform | 63 | * Initialisation data specific to either the machine or the platform |
| @@ -108,7 +108,7 @@ extern struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata; | |||
| 108 | extern struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata; | 108 | extern struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata; |
| 109 | extern struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata; | 109 | extern struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata; |
| 110 | 110 | ||
| 111 | /* Helper function availablity */ | 111 | /* Helper function availability */ |
| 112 | 112 | ||
| 113 | extern void s3c2416_setup_sdhci0_cfg_gpio(struct platform_device *, int w); | 113 | extern void s3c2416_setup_sdhci0_cfg_gpio(struct platform_device *, int w); |
| 114 | extern void s3c2416_setup_sdhci1_cfg_gpio(struct platform_device *, int w); | 114 | extern void s3c2416_setup_sdhci1_cfg_gpio(struct platform_device *, int w); |
diff --git a/arch/arm/plat-samsung/s3c-pl330.c b/arch/arm/plat-samsung/s3c-pl330.c index b4ff8d74ac40..f85638c6f5ae 100644 --- a/arch/arm/plat-samsung/s3c-pl330.c +++ b/arch/arm/plat-samsung/s3c-pl330.c | |||
| @@ -68,7 +68,7 @@ struct s3c_pl330_xfer { | |||
| 68 | * @req: Two requests to communicate with the PL330 engine. | 68 | * @req: Two requests to communicate with the PL330 engine. |
| 69 | * @callback_fn: Callback function to the client. | 69 | * @callback_fn: Callback function to the client. |
| 70 | * @rqcfg: Channel configuration for the xfers. | 70 | * @rqcfg: Channel configuration for the xfers. |
| 71 | * @xfer_head: Pointer to the xfer to be next excecuted. | 71 | * @xfer_head: Pointer to the xfer to be next executed. |
| 72 | * @dmac: Pointer to the DMAC that manages this channel, NULL if the | 72 | * @dmac: Pointer to the DMAC that manages this channel, NULL if the |
| 73 | * channel is available to be acquired. | 73 | * channel is available to be acquired. |
| 74 | * @client: Client of this channel. NULL if the | 74 | * @client: Client of this channel. NULL if the |
diff --git a/arch/arm/plat-spear/include/plat/clock.h b/arch/arm/plat-spear/include/plat/clock.h index 2ae6606930a6..fcc0d0ad4a1f 100644 --- a/arch/arm/plat-spear/include/plat/clock.h +++ b/arch/arm/plat-spear/include/plat/clock.h | |||
| @@ -89,7 +89,7 @@ struct rate_config { | |||
| 89 | * @sibling: node for list of clocks having same parents | 89 | * @sibling: node for list of clocks having same parents |
| 90 | * @private_data: clock specific private data | 90 | * @private_data: clock specific private data |
| 91 | * @node: list to maintain clocks linearly | 91 | * @node: list to maintain clocks linearly |
| 92 | * @cl: clocklook up assoicated with this clock | 92 | * @cl: clocklook up associated with this clock |
| 93 | * @dent: object for debugfs | 93 | * @dent: object for debugfs |
| 94 | */ | 94 | */ |
| 95 | struct clk { | 95 | struct clk { |
diff --git a/arch/blackfin/Kconfig.debug b/arch/blackfin/Kconfig.debug index acb83799a215..2641731f24cd 100644 --- a/arch/blackfin/Kconfig.debug +++ b/arch/blackfin/Kconfig.debug | |||
| @@ -59,7 +59,7 @@ config EXACT_HWERR | |||
| 59 | be reported multiple cycles after the error happens. This delay | 59 | be reported multiple cycles after the error happens. This delay |
| 60 | can cause the wrong application, or even the kernel to receive a | 60 | can cause the wrong application, or even the kernel to receive a |
| 61 | signal to be killed. If you are getting HW errors in your system, | 61 | signal to be killed. If you are getting HW errors in your system, |
| 62 | try turning this on to ensure they are at least comming from the | 62 | try turning this on to ensure they are at least coming from the |
| 63 | proper thread. | 63 | proper thread. |
| 64 | 64 | ||
| 65 | On production systems, it is safe (and a small optimization) to say N. | 65 | On production systems, it is safe (and a small optimization) to say N. |
diff --git a/arch/blackfin/include/asm/traps.h b/arch/blackfin/include/asm/traps.h index 9fe0da612c09..70c4e511cae6 100644 --- a/arch/blackfin/include/asm/traps.h +++ b/arch/blackfin/include/asm/traps.h | |||
| @@ -57,7 +57,7 @@ | |||
| 57 | #define HWC_x3(level) \ | 57 | #define HWC_x3(level) \ |
| 58 | "External Memory Addressing Error\n" | 58 | "External Memory Addressing Error\n" |
| 59 | #define EXC_0x04(level) \ | 59 | #define EXC_0x04(level) \ |
| 60 | "Unimplmented exception occured\n" \ | 60 | "Unimplmented exception occurred\n" \ |
| 61 | level " - Maybe you forgot to install a custom exception handler?\n" | 61 | level " - Maybe you forgot to install a custom exception handler?\n" |
| 62 | #define HWC_x12(level) \ | 62 | #define HWC_x12(level) \ |
| 63 | "Performance Monitor Overflow\n" | 63 | "Performance Monitor Overflow\n" |
diff --git a/arch/blackfin/kernel/kgdb.c b/arch/blackfin/kernel/kgdb.c index b8cfe34989e4..9b80b152435e 100644 --- a/arch/blackfin/kernel/kgdb.c +++ b/arch/blackfin/kernel/kgdb.c | |||
| @@ -181,7 +181,7 @@ static int bfin_set_hw_break(unsigned long addr, int len, enum kgdb_bptype type) | |||
| 181 | return -ENOSPC; | 181 | return -ENOSPC; |
| 182 | } | 182 | } |
| 183 | 183 | ||
| 184 | /* Becasue hardware data watchpoint impelemented in current | 184 | /* Because hardware data watchpoint impelemented in current |
| 185 | * Blackfin can not trigger an exception event as the hardware | 185 | * Blackfin can not trigger an exception event as the hardware |
| 186 | * instrction watchpoint does, we ignaore all data watch point here. | 186 | * instrction watchpoint does, we ignaore all data watch point here. |
| 187 | * They can be turned on easily after future blackfin design | 187 | * They can be turned on easily after future blackfin design |
diff --git a/arch/blackfin/kernel/traps.c b/arch/blackfin/kernel/traps.c index 59c1df75e4de..655f25d139a7 100644 --- a/arch/blackfin/kernel/traps.c +++ b/arch/blackfin/kernel/traps.c | |||
| @@ -98,7 +98,7 @@ asmlinkage notrace void trap_c(struct pt_regs *fp) | |||
| 98 | /* send the appropriate signal to the user program */ | 98 | /* send the appropriate signal to the user program */ |
| 99 | switch (trapnr) { | 99 | switch (trapnr) { |
| 100 | 100 | ||
| 101 | /* This table works in conjuction with the one in ./mach-common/entry.S | 101 | /* This table works in conjunction with the one in ./mach-common/entry.S |
| 102 | * Some exceptions are handled there (in assembly, in exception space) | 102 | * Some exceptions are handled there (in assembly, in exception space) |
| 103 | * Some are handled here, (in C, in interrupt space) | 103 | * Some are handled here, (in C, in interrupt space) |
| 104 | * Some, like CPLB, are handled in both, where the normal path is | 104 | * Some, like CPLB, are handled in both, where the normal path is |
diff --git a/arch/blackfin/lib/ins.S b/arch/blackfin/lib/ins.S index 3edbd8db6598..79caccea85ca 100644 --- a/arch/blackfin/lib/ins.S +++ b/arch/blackfin/lib/ins.S | |||
| @@ -67,7 +67,7 @@ | |||
| 67 | * - DMA version, which do not suffer from this issue. DMA versions have | 67 | * - DMA version, which do not suffer from this issue. DMA versions have |
| 68 | * different name (prefixed by dma_ ), and are located in | 68 | * different name (prefixed by dma_ ), and are located in |
| 69 | * ../kernel/bfin_dma_5xx.c | 69 | * ../kernel/bfin_dma_5xx.c |
| 70 | * Using the dma related functions are recommended for transfering large | 70 | * Using the dma related functions are recommended for transferring large |
| 71 | * buffers in/out of FIFOs. | 71 | * buffers in/out of FIFOs. |
| 72 | */ | 72 | */ |
| 73 | 73 | ||
diff --git a/arch/blackfin/lib/memmove.S b/arch/blackfin/lib/memmove.S index 80c240acac60..4eca566237a4 100644 --- a/arch/blackfin/lib/memmove.S +++ b/arch/blackfin/lib/memmove.S | |||
| @@ -60,7 +60,7 @@ ENTRY(_memmove) | |||
| 60 | [P0++] = R1; | 60 | [P0++] = R1; |
| 61 | 61 | ||
| 62 | CC = P2 == 0; /* any remaining bytes? */ | 62 | CC = P2 == 0; /* any remaining bytes? */ |
| 63 | P3 = I0; /* Ammend P3 to updated ptr. */ | 63 | P3 = I0; /* Amend P3 to updated ptr. */ |
| 64 | IF !CC JUMP .Lbytes; | 64 | IF !CC JUMP .Lbytes; |
| 65 | P3 = I1; | 65 | P3 = I1; |
| 66 | RTS; | 66 | RTS; |
diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c index 2c69785a7bbe..3fa335405b31 100644 --- a/arch/blackfin/mach-bf537/boards/stamp.c +++ b/arch/blackfin/mach-bf537/boards/stamp.c | |||
| @@ -2530,7 +2530,7 @@ static struct resource bfin_pata_resources[] = { | |||
| 2530 | static struct pata_platform_info bfin_pata_platform_data = { | 2530 | static struct pata_platform_info bfin_pata_platform_data = { |
| 2531 | .ioport_shift = 0, | 2531 | .ioport_shift = 0, |
| 2532 | }; | 2532 | }; |
| 2533 | /* CompactFlash Storage Card Memory Mapped Adressing | 2533 | /* CompactFlash Storage Card Memory Mapped Addressing |
| 2534 | * /REG = A11 = 1 | 2534 | * /REG = A11 = 1 |
| 2535 | */ | 2535 | */ |
| 2536 | static struct resource bfin_pata_resources[] = { | 2536 | static struct resource bfin_pata_resources[] = { |
diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S index 46ab45704c89..f96933f48a7f 100644 --- a/arch/blackfin/mach-common/entry.S +++ b/arch/blackfin/mach-common/entry.S | |||
| @@ -268,7 +268,7 @@ ENTRY(_handle_bad_cplb) | |||
| 268 | /* To get here, we just tried and failed to change a CPLB | 268 | /* To get here, we just tried and failed to change a CPLB |
| 269 | * so, handle things in trap_c (C code), by lowering to | 269 | * so, handle things in trap_c (C code), by lowering to |
| 270 | * IRQ5, just like we normally do. Since this is not a | 270 | * IRQ5, just like we normally do. Since this is not a |
| 271 | * "normal" return path, we have a do alot of stuff to | 271 | * "normal" return path, we have a do a lot of stuff to |
| 272 | * the stack to get ready so, we can fall through - we | 272 | * the stack to get ready so, we can fall through - we |
| 273 | * need to make a CPLB exception look like a normal exception | 273 | * need to make a CPLB exception look like a normal exception |
| 274 | */ | 274 | */ |
| @@ -817,7 +817,7 @@ _new_old_task: | |||
| 817 | rets = [sp++]; | 817 | rets = [sp++]; |
| 818 | 818 | ||
| 819 | /* | 819 | /* |
| 820 | * When we come out of resume, r0 carries "old" task, becuase we are | 820 | * When we come out of resume, r0 carries "old" task, because we are |
| 821 | * in "new" task. | 821 | * in "new" task. |
| 822 | */ | 822 | */ |
| 823 | rts; | 823 | rts; |
diff --git a/arch/blackfin/mach-common/head.S b/arch/blackfin/mach-common/head.S index 581e2b0a71ac..76de5724c1e3 100644 --- a/arch/blackfin/mach-common/head.S +++ b/arch/blackfin/mach-common/head.S | |||
| @@ -174,7 +174,7 @@ ENTRY(__start) | |||
| 174 | sp.l = lo(KERNEL_CLOCK_STACK); | 174 | sp.l = lo(KERNEL_CLOCK_STACK); |
| 175 | sp.h = hi(KERNEL_CLOCK_STACK); | 175 | sp.h = hi(KERNEL_CLOCK_STACK); |
| 176 | call _init_clocks; | 176 | call _init_clocks; |
| 177 | sp = usp; /* usp hasnt been touched, so restore from there */ | 177 | sp = usp; /* usp hasn't been touched, so restore from there */ |
| 178 | #endif | 178 | #endif |
| 179 | 179 | ||
| 180 | /* This section keeps the processor in supervisor mode | 180 | /* This section keeps the processor in supervisor mode |
diff --git a/arch/cris/arch-v10/README.mm b/arch/cris/arch-v10/README.mm index 517d1f027fe8..67731d75cb51 100644 --- a/arch/cris/arch-v10/README.mm +++ b/arch/cris/arch-v10/README.mm | |||
| @@ -38,7 +38,7 @@ space. We also use it to keep the user-mode virtual mapping in the same | |||
| 38 | map during kernel-mode, so that the kernel easily can access the corresponding | 38 | map during kernel-mode, so that the kernel easily can access the corresponding |
| 39 | user-mode process' data. | 39 | user-mode process' data. |
| 40 | 40 | ||
| 41 | As a comparision, the Linux/i386 2.0 puts the kernel and physical RAM at | 41 | As a comparison, the Linux/i386 2.0 puts the kernel and physical RAM at |
| 42 | address 0, overlapping with the user-mode virtual space, so that descriptor | 42 | address 0, overlapping with the user-mode virtual space, so that descriptor |
| 43 | registers are needed for each memory access to specify which MMU space to | 43 | registers are needed for each memory access to specify which MMU space to |
| 44 | map through. That changed in 2.2, putting the kernel/physical RAM at | 44 | map through. That changed in 2.2, putting the kernel/physical RAM at |
diff --git a/arch/cris/arch-v10/drivers/sync_serial.c b/arch/cris/arch-v10/drivers/sync_serial.c index 399dc1ec8e6f..850265373611 100644 --- a/arch/cris/arch-v10/drivers/sync_serial.c +++ b/arch/cris/arch-v10/drivers/sync_serial.c | |||
| @@ -31,7 +31,7 @@ | |||
| 31 | #include <asm/sync_serial.h> | 31 | #include <asm/sync_serial.h> |
| 32 | #include <arch/io_interface_mux.h> | 32 | #include <arch/io_interface_mux.h> |
| 33 | 33 | ||
| 34 | /* The receiver is a bit tricky beacuse of the continuous stream of data.*/ | 34 | /* The receiver is a bit tricky because of the continuous stream of data.*/ |
| 35 | /* */ | 35 | /* */ |
| 36 | /* Three DMA descriptors are linked together. Each DMA descriptor is */ | 36 | /* Three DMA descriptors are linked together. Each DMA descriptor is */ |
| 37 | /* responsible for port->bufchunk of a common buffer. */ | 37 | /* responsible for port->bufchunk of a common buffer. */ |
diff --git a/arch/cris/arch-v32/drivers/axisflashmap.c b/arch/cris/arch-v32/drivers/axisflashmap.c index 3d751250271b..7b155f8203b8 100644 --- a/arch/cris/arch-v32/drivers/axisflashmap.c +++ b/arch/cris/arch-v32/drivers/axisflashmap.c | |||
| @@ -215,7 +215,7 @@ static struct mtd_partition main_partition = { | |||
| 215 | }; | 215 | }; |
| 216 | #endif | 216 | #endif |
| 217 | 217 | ||
| 218 | /* Auxilliary partition if we find another flash */ | 218 | /* Auxiliary partition if we find another flash */ |
| 219 | static struct mtd_partition aux_partition = { | 219 | static struct mtd_partition aux_partition = { |
| 220 | .name = "aux", | 220 | .name = "aux", |
| 221 | .size = 0, | 221 | .size = 0, |
diff --git a/arch/cris/arch-v32/drivers/mach-a3/nandflash.c b/arch/cris/arch-v32/drivers/mach-a3/nandflash.c index 25d6f2b3a721..f58f2c1c5295 100644 --- a/arch/cris/arch-v32/drivers/mach-a3/nandflash.c +++ b/arch/cris/arch-v32/drivers/mach-a3/nandflash.c | |||
| @@ -165,7 +165,7 @@ struct mtd_info *__init crisv32_nand_flash_probe(void) | |||
| 165 | /* Enable the following for a flash based bad block table */ | 165 | /* Enable the following for a flash based bad block table */ |
| 166 | /* this->options = NAND_USE_FLASH_BBT; */ | 166 | /* this->options = NAND_USE_FLASH_BBT; */ |
| 167 | 167 | ||
| 168 | /* Scan to find existance of the device */ | 168 | /* Scan to find existence of the device */ |
| 169 | if (nand_scan(crisv32_mtd, 1)) { | 169 | if (nand_scan(crisv32_mtd, 1)) { |
| 170 | err = -ENXIO; | 170 | err = -ENXIO; |
| 171 | goto out_mtd; | 171 | goto out_mtd; |
diff --git a/arch/cris/arch-v32/drivers/mach-fs/nandflash.c b/arch/cris/arch-v32/drivers/mach-fs/nandflash.c index c5a0f54763cc..d5b0cc9f976b 100644 --- a/arch/cris/arch-v32/drivers/mach-fs/nandflash.c +++ b/arch/cris/arch-v32/drivers/mach-fs/nandflash.c | |||
| @@ -156,7 +156,7 @@ struct mtd_info *__init crisv32_nand_flash_probe(void) | |||
| 156 | /* Enable the following for a flash based bad block table */ | 156 | /* Enable the following for a flash based bad block table */ |
| 157 | /* this->options = NAND_USE_FLASH_BBT; */ | 157 | /* this->options = NAND_USE_FLASH_BBT; */ |
| 158 | 158 | ||
| 159 | /* Scan to find existance of the device */ | 159 | /* Scan to find existence of the device */ |
| 160 | if (nand_scan(crisv32_mtd, 1)) { | 160 | if (nand_scan(crisv32_mtd, 1)) { |
| 161 | err = -ENXIO; | 161 | err = -ENXIO; |
| 162 | goto out_ior; | 162 | goto out_ior; |
diff --git a/arch/cris/arch-v32/drivers/sync_serial.c b/arch/cris/arch-v32/drivers/sync_serial.c index c8637a9195ea..a6a180bc566f 100644 --- a/arch/cris/arch-v32/drivers/sync_serial.c +++ b/arch/cris/arch-v32/drivers/sync_serial.c | |||
| @@ -33,7 +33,7 @@ | |||
| 33 | #include <asm/sync_serial.h> | 33 | #include <asm/sync_serial.h> |
| 34 | 34 | ||
| 35 | 35 | ||
| 36 | /* The receiver is a bit tricky beacuse of the continuous stream of data.*/ | 36 | /* The receiver is a bit tricky because of the continuous stream of data.*/ |
| 37 | /* */ | 37 | /* */ |
| 38 | /* Three DMA descriptors are linked together. Each DMA descriptor is */ | 38 | /* Three DMA descriptors are linked together. Each DMA descriptor is */ |
| 39 | /* responsible for port->bufchunk of a common buffer. */ | 39 | /* responsible for port->bufchunk of a common buffer. */ |
diff --git a/arch/cris/arch-v32/kernel/entry.S b/arch/cris/arch-v32/kernel/entry.S index 0ecb50b8f0d9..3abf12c23e5f 100644 --- a/arch/cris/arch-v32/kernel/entry.S +++ b/arch/cris/arch-v32/kernel/entry.S | |||
| @@ -182,7 +182,7 @@ _syscall_traced: | |||
| 182 | move.d $r0, [$sp] | 182 | move.d $r0, [$sp] |
| 183 | 183 | ||
| 184 | ;; The registers carrying parameters (R10-R13) are intact. The optional | 184 | ;; The registers carrying parameters (R10-R13) are intact. The optional |
| 185 | ;; fifth and sixth parameters is in MOF and SRP respectivly. Put them | 185 | ;; fifth and sixth parameters is in MOF and SRP respectively. Put them |
| 186 | ;; back on the stack. | 186 | ;; back on the stack. |
| 187 | subq 4, $sp | 187 | subq 4, $sp |
| 188 | move $srp, [$sp] | 188 | move $srp, [$sp] |
diff --git a/arch/cris/arch-v32/kernel/irq.c b/arch/cris/arch-v32/kernel/irq.c index 8023176e19b2..68a1a5901ca5 100644 --- a/arch/cris/arch-v32/kernel/irq.c +++ b/arch/cris/arch-v32/kernel/irq.c | |||
| @@ -374,7 +374,7 @@ crisv32_do_multiple(struct pt_regs* regs) | |||
| 374 | irq_enter(); | 374 | irq_enter(); |
| 375 | 375 | ||
| 376 | for (i = 0; i < NBR_REGS; i++) { | 376 | for (i = 0; i < NBR_REGS; i++) { |
| 377 | /* Get which IRQs that happend. */ | 377 | /* Get which IRQs that happened. */ |
| 378 | masked[i] = REG_RD_INT_VECT(intr_vect, irq_regs[cpu], | 378 | masked[i] = REG_RD_INT_VECT(intr_vect, irq_regs[cpu], |
| 379 | r_masked_vect, i); | 379 | r_masked_vect, i); |
| 380 | 380 | ||
diff --git a/arch/cris/arch-v32/kernel/kgdb.c b/arch/cris/arch-v32/kernel/kgdb.c index 6b653323d796..c0343c3ea7f8 100644 --- a/arch/cris/arch-v32/kernel/kgdb.c +++ b/arch/cris/arch-v32/kernel/kgdb.c | |||
| @@ -925,7 +925,7 @@ stub_is_stopped(int sigval) | |||
| 925 | 925 | ||
| 926 | if (reg.eda >= bp_d_regs[bp * 2] && | 926 | if (reg.eda >= bp_d_regs[bp * 2] && |
| 927 | reg.eda <= bp_d_regs[bp * 2 + 1]) { | 927 | reg.eda <= bp_d_regs[bp * 2 + 1]) { |
| 928 | /* EDA withing range for this BP; it must be the one | 928 | /* EDA within range for this BP; it must be the one |
| 929 | we're looking for. */ | 929 | we're looking for. */ |
| 930 | stopped_data_address = reg.eda; | 930 | stopped_data_address = reg.eda; |
| 931 | break; | 931 | break; |
diff --git a/arch/cris/arch-v32/kernel/process.c b/arch/cris/arch-v32/kernel/process.c index 562f84718906..0570e8ce603d 100644 --- a/arch/cris/arch-v32/kernel/process.c +++ b/arch/cris/arch-v32/kernel/process.c | |||
| @@ -149,7 +149,7 @@ copy_thread(unsigned long clone_flags, unsigned long usp, | |||
| 149 | childregs->r10 = 0; /* Child returns 0 after a fork/clone. */ | 149 | childregs->r10 = 0; /* Child returns 0 after a fork/clone. */ |
| 150 | 150 | ||
| 151 | /* Set a new TLS ? | 151 | /* Set a new TLS ? |
| 152 | * The TLS is in $mof beacuse it is the 5th argument to sys_clone. | 152 | * The TLS is in $mof because it is the 5th argument to sys_clone. |
| 153 | */ | 153 | */ |
| 154 | if (p->mm && (clone_flags & CLONE_SETTLS)) { | 154 | if (p->mm && (clone_flags & CLONE_SETTLS)) { |
| 155 | task_thread_info(p)->tls = regs->mof; | 155 | task_thread_info(p)->tls = regs->mof; |
diff --git a/arch/cris/arch-v32/kernel/signal.c b/arch/cris/arch-v32/kernel/signal.c index b3a05ae56214..ce4ab1a5552c 100644 --- a/arch/cris/arch-v32/kernel/signal.c +++ b/arch/cris/arch-v32/kernel/signal.c | |||
| @@ -610,7 +610,7 @@ ugdb_trap_user(struct thread_info *ti, int sig) | |||
| 610 | user_regs(ti)->spc = 0; | 610 | user_regs(ti)->spc = 0; |
| 611 | } | 611 | } |
| 612 | /* FIXME: Filter out false h/w breakpoint hits (i.e. EDA | 612 | /* FIXME: Filter out false h/w breakpoint hits (i.e. EDA |
| 613 | not withing any configured h/w breakpoint range). Synchronize with | 613 | not within any configured h/w breakpoint range). Synchronize with |
| 614 | what already exists for kernel debugging. */ | 614 | what already exists for kernel debugging. */ |
| 615 | if (((user_regs(ti)->exs & 0xff00) >> 8) == BREAK_8_INTR_VECT) { | 615 | if (((user_regs(ti)->exs & 0xff00) >> 8) == BREAK_8_INTR_VECT) { |
| 616 | /* Break 8: subtract 2 from ERP unless in a delay slot. */ | 616 | /* Break 8: subtract 2 from ERP unless in a delay slot. */ |
diff --git a/arch/cris/arch-v32/mach-a3/arbiter.c b/arch/cris/arch-v32/mach-a3/arbiter.c index 8b924db71c9a..15f5c9de2639 100644 --- a/arch/cris/arch-v32/mach-a3/arbiter.c +++ b/arch/cris/arch-v32/mach-a3/arbiter.c | |||
| @@ -568,7 +568,7 @@ crisv32_foo_arbiter_irq(int irq, void *dev_id) | |||
| 568 | REG_WR(marb_foo_bp, watch->instance, rw_ack, ack); | 568 | REG_WR(marb_foo_bp, watch->instance, rw_ack, ack); |
| 569 | REG_WR(marb_foo, regi_marb_foo, rw_ack_intr, ack_intr); | 569 | REG_WR(marb_foo, regi_marb_foo, rw_ack_intr, ack_intr); |
| 570 | 570 | ||
| 571 | printk(KERN_DEBUG "IRQ occured at %X\n", (unsigned)get_irq_regs()); | 571 | printk(KERN_DEBUG "IRQ occurred at %X\n", (unsigned)get_irq_regs()); |
| 572 | 572 | ||
| 573 | if (watch->cb) | 573 | if (watch->cb) |
| 574 | watch->cb(); | 574 | watch->cb(); |
| @@ -624,7 +624,7 @@ crisv32_bar_arbiter_irq(int irq, void *dev_id) | |||
| 624 | REG_WR(marb_bar_bp, watch->instance, rw_ack, ack); | 624 | REG_WR(marb_bar_bp, watch->instance, rw_ack, ack); |
| 625 | REG_WR(marb_bar, regi_marb_bar, rw_ack_intr, ack_intr); | 625 | REG_WR(marb_bar, regi_marb_bar, rw_ack_intr, ack_intr); |
| 626 | 626 | ||
| 627 | printk(KERN_DEBUG "IRQ occured at %X\n", (unsigned)get_irq_regs()->erp); | 627 | printk(KERN_DEBUG "IRQ occurred at %X\n", (unsigned)get_irq_regs()->erp); |
| 628 | 628 | ||
| 629 | if (watch->cb) | 629 | if (watch->cb) |
| 630 | watch->cb(); | 630 | watch->cb(); |
diff --git a/arch/cris/arch-v32/mach-fs/arbiter.c b/arch/cris/arch-v32/mach-fs/arbiter.c index 82ef293c4c81..3f8ebb5c1477 100644 --- a/arch/cris/arch-v32/mach-fs/arbiter.c +++ b/arch/cris/arch-v32/mach-fs/arbiter.c | |||
| @@ -395,7 +395,7 @@ static irqreturn_t crisv32_arbiter_irq(int irq, void *dev_id) | |||
| 395 | REG_WR(marb_bp, watch->instance, rw_ack, ack); | 395 | REG_WR(marb_bp, watch->instance, rw_ack, ack); |
| 396 | REG_WR(marb, regi_marb, rw_ack_intr, ack_intr); | 396 | REG_WR(marb, regi_marb, rw_ack_intr, ack_intr); |
| 397 | 397 | ||
| 398 | printk(KERN_INFO "IRQ occured at %lX\n", get_irq_regs()->erp); | 398 | printk(KERN_INFO "IRQ occurred at %lX\n", get_irq_regs()->erp); |
| 399 | 399 | ||
| 400 | if (watch->cb) | 400 | if (watch->cb) |
| 401 | watch->cb(); | 401 | watch->cb(); |
diff --git a/arch/cris/boot/rescue/head_v10.S b/arch/cris/boot/rescue/head_v10.S index 2fafe247a25b..af55df0994b3 100644 --- a/arch/cris/boot/rescue/head_v10.S +++ b/arch/cris/boot/rescue/head_v10.S | |||
| @@ -7,7 +7,7 @@ | |||
| 7 | * for each partition that this code should check. | 7 | * for each partition that this code should check. |
| 8 | * | 8 | * |
| 9 | * If any of the checksums fail, we assume the flash is so | 9 | * If any of the checksums fail, we assume the flash is so |
| 10 | * corrupt that we cant use it to boot into the ftp flash | 10 | * corrupt that we can't use it to boot into the ftp flash |
| 11 | * loader, and instead we initialize the serial port to | 11 | * loader, and instead we initialize the serial port to |
| 12 | * receive a flash-loader and new flash image. we dont include | 12 | * receive a flash-loader and new flash image. we dont include |
| 13 | * any flash code here, but just accept a certain amount of | 13 | * any flash code here, but just accept a certain amount of |
diff --git a/arch/cris/include/arch-v32/arch/hwregs/Makefile b/arch/cris/include/arch-v32/arch/hwregs/Makefile index f9a05d2aa061..b8b3f8d666e4 100644 --- a/arch/cris/include/arch-v32/arch/hwregs/Makefile +++ b/arch/cris/include/arch-v32/arch/hwregs/Makefile | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | # Makefile to generate or copy the latest register definitions | 1 | # Makefile to generate or copy the latest register definitions |
| 2 | # and related datastructures and helpermacros. | 2 | # and related datastructures and helpermacros. |
| 3 | # The offical place for these files is at: | 3 | # The official place for these files is at: |
| 4 | RELEASE ?= r1_alfa5 | 4 | RELEASE ?= r1_alfa5 |
| 5 | OFFICIAL_INCDIR = /n/asic/projects/guinness/releases/$(RELEASE)/design/top/sw/include/ | 5 | OFFICIAL_INCDIR = /n/asic/projects/guinness/releases/$(RELEASE)/design/top/sw/include/ |
| 6 | 6 | ||
diff --git a/arch/cris/include/arch-v32/arch/hwregs/iop/Makefile b/arch/cris/include/arch-v32/arch/hwregs/iop/Makefile index a90056a095e3..0747a22e3c07 100644 --- a/arch/cris/include/arch-v32/arch/hwregs/iop/Makefile +++ b/arch/cris/include/arch-v32/arch/hwregs/iop/Makefile | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | # $Id: Makefile,v 1.3 2004/01/07 20:34:55 johana Exp $ | 1 | # $Id: Makefile,v 1.3 2004/01/07 20:34:55 johana Exp $ |
| 2 | # Makefile to generate or copy the latest register definitions | 2 | # Makefile to generate or copy the latest register definitions |
| 3 | # and related datastructures and helpermacros. | 3 | # and related datastructures and helpermacros. |
| 4 | # The offical place for these files is probably at: | 4 | # The official place for these files is probably at: |
| 5 | RELEASE ?= r1_alfa5 | 5 | RELEASE ?= r1_alfa5 |
| 6 | IOPOFFICIAL_INCDIR = /n/asic/projects/guinness/releases/$(RELEASE)/design/top/sw/include/ | 6 | IOPOFFICIAL_INCDIR = /n/asic/projects/guinness/releases/$(RELEASE)/design/top/sw/include/ |
| 7 | 7 | ||
diff --git a/arch/cris/include/asm/pgtable.h b/arch/cris/include/asm/pgtable.h index 9eaae217b21b..7df430138355 100644 --- a/arch/cris/include/asm/pgtable.h +++ b/arch/cris/include/asm/pgtable.h | |||
| @@ -97,7 +97,7 @@ extern unsigned long empty_zero_page; | |||
| 97 | #define pte_clear(mm,addr,xp) do { pte_val(*(xp)) = 0; } while (0) | 97 | #define pte_clear(mm,addr,xp) do { pte_val(*(xp)) = 0; } while (0) |
| 98 | 98 | ||
| 99 | #define pmd_none(x) (!pmd_val(x)) | 99 | #define pmd_none(x) (!pmd_val(x)) |
| 100 | /* by removing the _PAGE_KERNEL bit from the comparision, the same pmd_bad | 100 | /* by removing the _PAGE_KERNEL bit from the comparison, the same pmd_bad |
| 101 | * works for both _PAGE_TABLE and _KERNPG_TABLE pmd entries. | 101 | * works for both _PAGE_TABLE and _KERNPG_TABLE pmd entries. |
| 102 | */ | 102 | */ |
| 103 | #define pmd_bad(x) ((pmd_val(x) & (~PAGE_MASK & ~_PAGE_KERNEL)) != _PAGE_TABLE) | 103 | #define pmd_bad(x) ((pmd_val(x) & (~PAGE_MASK & ~_PAGE_KERNEL)) != _PAGE_TABLE) |
diff --git a/arch/cris/kernel/traps.c b/arch/cris/kernel/traps.c index 541efbf09371..8da53f34c7a7 100644 --- a/arch/cris/kernel/traps.c +++ b/arch/cris/kernel/traps.c | |||
| @@ -183,7 +183,7 @@ __initcall(oops_nmi_register); | |||
| 183 | 183 | ||
| 184 | /* | 184 | /* |
| 185 | * This gets called from entry.S when the watchdog has bitten. Show something | 185 | * This gets called from entry.S when the watchdog has bitten. Show something |
| 186 | * similiar to an Oops dump, and if the kernel is configured to be a nice | 186 | * similar to an Oops dump, and if the kernel is configured to be a nice |
| 187 | * doggy, then halt instead of reboot. | 187 | * doggy, then halt instead of reboot. |
| 188 | */ | 188 | */ |
| 189 | void | 189 | void |
diff --git a/arch/frv/include/asm/pci.h b/arch/frv/include/asm/pci.h index 0d5997909850..ef03baf5d89d 100644 --- a/arch/frv/include/asm/pci.h +++ b/arch/frv/include/asm/pci.h | |||
| @@ -54,7 +54,7 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev, | |||
| 54 | #endif | 54 | #endif |
| 55 | 55 | ||
| 56 | /* | 56 | /* |
| 57 | * These are pretty much arbitary with the CoMEM implementation. | 57 | * These are pretty much arbitrary with the CoMEM implementation. |
| 58 | * We have the whole address space to ourselves. | 58 | * We have the whole address space to ourselves. |
| 59 | */ | 59 | */ |
| 60 | #define PCIBIOS_MIN_IO 0x100 | 60 | #define PCIBIOS_MIN_IO 0x100 |
diff --git a/arch/frv/include/asm/spr-regs.h b/arch/frv/include/asm/spr-regs.h index 01e6af5e99b8..d3883021f236 100644 --- a/arch/frv/include/asm/spr-regs.h +++ b/arch/frv/include/asm/spr-regs.h | |||
| @@ -274,7 +274,7 @@ | |||
| 274 | #define MSR0_RD 0xc0000000 /* rounding mode */ | 274 | #define MSR0_RD 0xc0000000 /* rounding mode */ |
| 275 | #define MSR0_RD_NEAREST 0x00000000 /* - nearest */ | 275 | #define MSR0_RD_NEAREST 0x00000000 /* - nearest */ |
| 276 | #define MSR0_RD_ZERO 0x40000000 /* - zero */ | 276 | #define MSR0_RD_ZERO 0x40000000 /* - zero */ |
| 277 | #define MSR0_RD_POS_INF 0x80000000 /* - postive infinity */ | 277 | #define MSR0_RD_POS_INF 0x80000000 /* - positive infinity */ |
| 278 | #define MSR0_RD_NEG_INF 0xc0000000 /* - negative infinity */ | 278 | #define MSR0_RD_NEG_INF 0xc0000000 /* - negative infinity */ |
| 279 | 279 | ||
| 280 | /* | 280 | /* |
diff --git a/arch/frv/include/asm/virtconvert.h b/arch/frv/include/asm/virtconvert.h index 59788fa2a813..b26d70ab9111 100644 --- a/arch/frv/include/asm/virtconvert.h +++ b/arch/frv/include/asm/virtconvert.h | |||
| @@ -1,4 +1,4 @@ | |||
| 1 | /* virtconvert.h: virtual/physical/page address convertion | 1 | /* virtconvert.h: virtual/physical/page address conversion |
| 2 | * | 2 | * |
| 3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | 3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. |
| 4 | * Written by David Howells (dhowells@redhat.com) | 4 | * Written by David Howells (dhowells@redhat.com) |
diff --git a/arch/frv/kernel/entry-table.S b/arch/frv/kernel/entry-table.S index bf35f33e48c9..06c5ae191e59 100644 --- a/arch/frv/kernel/entry-table.S +++ b/arch/frv/kernel/entry-table.S | |||
| @@ -86,7 +86,7 @@ __break_usertrap_fixup_table: | |||
| 86 | .globl __break_kerneltrap_fixup_table | 86 | .globl __break_kerneltrap_fixup_table |
| 87 | __break_kerneltrap_fixup_table: | 87 | __break_kerneltrap_fixup_table: |
| 88 | 88 | ||
| 89 | # handler declaration for a sofware or program interrupt | 89 | # handler declaration for a software or program interrupt |
| 90 | .macro VECTOR_SOFTPROG tbr_tt, vec | 90 | .macro VECTOR_SOFTPROG tbr_tt, vec |
| 91 | .section .trap.user | 91 | .section .trap.user |
| 92 | .org \tbr_tt | 92 | .org \tbr_tt |
| @@ -145,7 +145,7 @@ __break_kerneltrap_fixup_table: | |||
| 145 | .long \vec | 145 | .long \vec |
| 146 | .endm | 146 | .endm |
| 147 | 147 | ||
| 148 | # handler declaration for an MMU only sofware or program interrupt | 148 | # handler declaration for an MMU only software or program interrupt |
| 149 | .macro VECTOR_SP_MMU tbr_tt, vec | 149 | .macro VECTOR_SP_MMU tbr_tt, vec |
| 150 | #ifdef CONFIG_MMU | 150 | #ifdef CONFIG_MMU |
| 151 | VECTOR_SOFTPROG \tbr_tt, \vec | 151 | VECTOR_SOFTPROG \tbr_tt, \vec |
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig index c4ea0925cdbd..e5cc56ae6ce3 100644 --- a/arch/ia64/Kconfig +++ b/arch/ia64/Kconfig | |||
| @@ -414,11 +414,11 @@ config PERMIT_BSP_REMOVE | |||
| 414 | support. | 414 | support. |
| 415 | 415 | ||
| 416 | config FORCE_CPEI_RETARGET | 416 | config FORCE_CPEI_RETARGET |
| 417 | bool "Force assumption that CPEI can be re-targetted" | 417 | bool "Force assumption that CPEI can be re-targeted" |
| 418 | depends on PERMIT_BSP_REMOVE | 418 | depends on PERMIT_BSP_REMOVE |
| 419 | default n | 419 | default n |
| 420 | ---help--- | 420 | ---help--- |
| 421 | Say Y if you need to force the assumption that CPEI can be re-targetted to | 421 | Say Y if you need to force the assumption that CPEI can be re-targeted to |
| 422 | any cpu in the system. This hint is available via ACPI 3.0 specifications. | 422 | any cpu in the system. This hint is available via ACPI 3.0 specifications. |
| 423 | Tiger4 systems are capable of re-directing CPEI to any CPU other than BSP. | 423 | Tiger4 systems are capable of re-directing CPEI to any CPU other than BSP. |
| 424 | This option it useful to enable this feature on older BIOS's as well. | 424 | This option it useful to enable this feature on older BIOS's as well. |
diff --git a/arch/ia64/include/asm/pal.h b/arch/ia64/include/asm/pal.h index 6a292505b396..2e69284df8e7 100644 --- a/arch/ia64/include/asm/pal.h +++ b/arch/ia64/include/asm/pal.h | |||
| @@ -1669,7 +1669,7 @@ typedef union pal_vp_info_u { | |||
| 1669 | } pal_vp_info_u_t; | 1669 | } pal_vp_info_u_t; |
| 1670 | 1670 | ||
| 1671 | /* | 1671 | /* |
| 1672 | * Returns infomation about virtual processor features | 1672 | * Returns information about virtual processor features |
| 1673 | */ | 1673 | */ |
| 1674 | static inline s64 | 1674 | static inline s64 |
| 1675 | ia64_pal_vp_info (u64 feature_set, u64 vp_buffer, u64 *vp_info, u64 *vmm_id) | 1675 | ia64_pal_vp_info (u64 feature_set, u64 vp_buffer, u64 *vp_info, u64 *vmm_id) |
diff --git a/arch/ia64/include/asm/perfmon_default_smpl.h b/arch/ia64/include/asm/perfmon_default_smpl.h index 74724b24c2b7..a2d560c67230 100644 --- a/arch/ia64/include/asm/perfmon_default_smpl.h +++ b/arch/ia64/include/asm/perfmon_default_smpl.h | |||
| @@ -67,8 +67,8 @@ typedef struct { | |||
| 67 | unsigned long ip; /* where did the overflow interrupt happened */ | 67 | unsigned long ip; /* where did the overflow interrupt happened */ |
| 68 | unsigned long tstamp; /* ar.itc when entering perfmon intr. handler */ | 68 | unsigned long tstamp; /* ar.itc when entering perfmon intr. handler */ |
| 69 | 69 | ||
| 70 | unsigned short cpu; /* cpu on which the overflow occured */ | 70 | unsigned short cpu; /* cpu on which the overflow occurred */ |
| 71 | unsigned short set; /* event set active when overflow ocurred */ | 71 | unsigned short set; /* event set active when overflow occurred */ |
| 72 | int tgid; /* thread group id (for NPTL, this is getpid()) */ | 72 | int tgid; /* thread group id (for NPTL, this is getpid()) */ |
| 73 | } pfm_default_smpl_entry_t; | 73 | } pfm_default_smpl_entry_t; |
| 74 | 74 | ||
diff --git a/arch/ia64/include/asm/sn/bte.h b/arch/ia64/include/asm/sn/bte.h index 96798d2da7c2..cc6c4dbf53af 100644 --- a/arch/ia64/include/asm/sn/bte.h +++ b/arch/ia64/include/asm/sn/bte.h | |||
| @@ -216,7 +216,7 @@ extern void bte_error_handler(unsigned long); | |||
| 216 | bte_copy(0, dest, len, ((mode) | BTE_ZERO_FILL), notification) | 216 | bte_copy(0, dest, len, ((mode) | BTE_ZERO_FILL), notification) |
| 217 | 217 | ||
| 218 | /* | 218 | /* |
| 219 | * The following is the prefered way of calling bte_unaligned_copy | 219 | * The following is the preferred way of calling bte_unaligned_copy |
| 220 | * If the copy is fully cache line aligned, then bte_copy is | 220 | * If the copy is fully cache line aligned, then bte_copy is |
| 221 | * used instead. Since bte_copy is inlined, this saves a call | 221 | * used instead. Since bte_copy is inlined, this saves a call |
| 222 | * stack. NOTE: bte_copy is called synchronously and does block | 222 | * stack. NOTE: bte_copy is called synchronously and does block |
diff --git a/arch/ia64/include/asm/sn/shub_mmr.h b/arch/ia64/include/asm/sn/shub_mmr.h index 7de1d1d4b71a..a84d870f4294 100644 --- a/arch/ia64/include/asm/sn/shub_mmr.h +++ b/arch/ia64/include/asm/sn/shub_mmr.h | |||
| @@ -459,7 +459,7 @@ | |||
| 459 | /* ==================================================================== */ | 459 | /* ==================================================================== */ |
| 460 | /* Some MMRs are functionally identical (or close enough) on both SHUB1 */ | 460 | /* Some MMRs are functionally identical (or close enough) on both SHUB1 */ |
| 461 | /* and SHUB2 that it makes sense to define a geberic name for the MMR. */ | 461 | /* and SHUB2 that it makes sense to define a geberic name for the MMR. */ |
| 462 | /* It is acceptible to use (for example) SH_IPI_INT to reference the */ | 462 | /* It is acceptable to use (for example) SH_IPI_INT to reference the */ |
| 463 | /* the IPI MMR. The value of SH_IPI_INT is determined at runtime based */ | 463 | /* the IPI MMR. The value of SH_IPI_INT is determined at runtime based */ |
| 464 | /* on the type of the SHUB. Do not use these #defines in performance */ | 464 | /* on the type of the SHUB. Do not use these #defines in performance */ |
| 465 | /* critical code or loops - there is a small performance penalty. */ | 465 | /* critical code or loops - there is a small performance penalty. */ |
diff --git a/arch/ia64/include/asm/sn/shubio.h b/arch/ia64/include/asm/sn/shubio.h index 6052422a22b3..ecb8a49476b6 100644 --- a/arch/ia64/include/asm/sn/shubio.h +++ b/arch/ia64/include/asm/sn/shubio.h | |||
| @@ -1383,7 +1383,7 @@ typedef union ii_ibcr_u { | |||
| 1383 | * response is capture in IXSM and IXSS, and IXSS[VALID] is set. The * | 1383 | * response is capture in IXSM and IXSS, and IXSS[VALID] is set. The * |
| 1384 | * errant header is thereby captured, and no further spurious read * | 1384 | * errant header is thereby captured, and no further spurious read * |
| 1385 | * respones are captured until IXSS[VALID] is cleared by setting the * | 1385 | * respones are captured until IXSS[VALID] is cleared by setting the * |
| 1386 | * appropriate bit in IECLR.Everytime a spurious read response is * | 1386 | * appropriate bit in IECLR. Every time a spurious read response is * |
| 1387 | * detected, the SPUR_RD bit of the PRB corresponding to the incoming * | 1387 | * detected, the SPUR_RD bit of the PRB corresponding to the incoming * |
| 1388 | * message's SIDN field is set. This always happens, regarless of * | 1388 | * message's SIDN field is set. This always happens, regarless of * |
| 1389 | * whether a header is captured. The programmer should check * | 1389 | * whether a header is captured. The programmer should check * |
| @@ -2738,7 +2738,7 @@ typedef union ii_ippr_u { | |||
| 2738 | /************************************************************************ | 2738 | /************************************************************************ |
| 2739 | * * | 2739 | * * |
| 2740 | * The following defines which were not formed into structures are * | 2740 | * The following defines which were not formed into structures are * |
| 2741 | * probably indentical to another register, and the name of the * | 2741 | * probably identical to another register, and the name of the * |
| 2742 | * register is provided against each of these registers. This * | 2742 | * register is provided against each of these registers. This * |
| 2743 | * information needs to be checked carefully * | 2743 | * information needs to be checked carefully * |
| 2744 | * * | 2744 | * * |
diff --git a/arch/ia64/kernel/cyclone.c b/arch/ia64/kernel/cyclone.c index d52f1f78eff2..1b811c61bdc6 100644 --- a/arch/ia64/kernel/cyclone.c +++ b/arch/ia64/kernel/cyclone.c | |||
| @@ -31,7 +31,7 @@ static struct clocksource clocksource_cyclone = { | |||
| 31 | .rating = 300, | 31 | .rating = 300, |
| 32 | .read = read_cyclone, | 32 | .read = read_cyclone, |
| 33 | .mask = (1LL << 40) - 1, | 33 | .mask = (1LL << 40) - 1, |
| 34 | .mult = 0, /*to be caluclated*/ | 34 | .mult = 0, /*to be calculated*/ |
| 35 | .shift = 16, | 35 | .shift = 16, |
| 36 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 36 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
| 37 | }; | 37 | }; |
diff --git a/arch/ia64/kernel/perfmon_default_smpl.c b/arch/ia64/kernel/perfmon_default_smpl.c index 5f637bbfcccd..30c644ea44c9 100644 --- a/arch/ia64/kernel/perfmon_default_smpl.c +++ b/arch/ia64/kernel/perfmon_default_smpl.c | |||
| @@ -150,7 +150,7 @@ default_handler(struct task_struct *task, void *buf, pfm_ovfl_arg_t *arg, struct | |||
| 150 | * current = task running at the time of the overflow. | 150 | * current = task running at the time of the overflow. |
| 151 | * | 151 | * |
| 152 | * per-task mode: | 152 | * per-task mode: |
| 153 | * - this is ususally the task being monitored. | 153 | * - this is usually the task being monitored. |
| 154 | * Under certain conditions, it might be a different task | 154 | * Under certain conditions, it might be a different task |
| 155 | * | 155 | * |
| 156 | * system-wide: | 156 | * system-wide: |
diff --git a/arch/ia64/kernel/smpboot.c b/arch/ia64/kernel/smpboot.c index 44f11ee411c0..14ec641003da 100644 --- a/arch/ia64/kernel/smpboot.c +++ b/arch/ia64/kernel/smpboot.c | |||
| @@ -703,7 +703,7 @@ int migrate_platform_irqs(unsigned int cpu) | |||
| 703 | data->chip->irq_disable(data); | 703 | data->chip->irq_disable(data); |
| 704 | data->chip->irq_set_affinity(data, mask, false); | 704 | data->chip->irq_set_affinity(data, mask, false); |
| 705 | data->chip->irq_enable(data); | 705 | data->chip->irq_enable(data); |
| 706 | printk ("Re-targetting CPEI to cpu %d\n", new_cpei_cpu); | 706 | printk ("Re-targeting CPEI to cpu %d\n", new_cpei_cpu); |
| 707 | } | 707 | } |
| 708 | } | 708 | } |
| 709 | if (!data) { | 709 | if (!data) { |
diff --git a/arch/ia64/kernel/topology.c b/arch/ia64/kernel/topology.c index 0baa1bbb65fe..0e0e0cc9e392 100644 --- a/arch/ia64/kernel/topology.c +++ b/arch/ia64/kernel/topology.c | |||
| @@ -43,7 +43,7 @@ int __ref arch_register_cpu(int num) | |||
| 43 | { | 43 | { |
| 44 | #ifdef CONFIG_ACPI | 44 | #ifdef CONFIG_ACPI |
| 45 | /* | 45 | /* |
| 46 | * If CPEI can be re-targetted or if this is not | 46 | * If CPEI can be re-targeted or if this is not |
| 47 | * CPEI target, then it is hotpluggable | 47 | * CPEI target, then it is hotpluggable |
| 48 | */ | 48 | */ |
| 49 | if (can_cpei_retarget() || !is_cpu_cpei_target(num)) | 49 | if (can_cpei_retarget() || !is_cpu_cpei_target(num)) |
diff --git a/arch/ia64/kvm/process.c b/arch/ia64/kvm/process.c index bb862fb224f2..b0398740b48d 100644 --- a/arch/ia64/kvm/process.c +++ b/arch/ia64/kvm/process.c | |||
| @@ -987,7 +987,7 @@ static void vmm_sanity_check(struct kvm_vcpu *vcpu) | |||
| 987 | 987 | ||
| 988 | static void kvm_do_resume_op(struct kvm_vcpu *vcpu) | 988 | static void kvm_do_resume_op(struct kvm_vcpu *vcpu) |
| 989 | { | 989 | { |
| 990 | vmm_sanity_check(vcpu); /*Guarantee vcpu runing on healthy vmm!*/ | 990 | vmm_sanity_check(vcpu); /*Guarantee vcpu running on healthy vmm!*/ |
| 991 | 991 | ||
| 992 | if (test_and_clear_bit(KVM_REQ_RESUME, &vcpu->requests)) { | 992 | if (test_and_clear_bit(KVM_REQ_RESUME, &vcpu->requests)) { |
| 993 | vcpu_do_resume(vcpu); | 993 | vcpu_do_resume(vcpu); |
diff --git a/arch/ia64/lib/do_csum.S b/arch/ia64/lib/do_csum.S index 6bec2fc9f5b2..1a431a5cf86f 100644 --- a/arch/ia64/lib/do_csum.S +++ b/arch/ia64/lib/do_csum.S | |||
| @@ -201,7 +201,7 @@ GLOBAL_ENTRY(do_csum) | |||
| 201 | ;; | 201 | ;; |
| 202 | (p6) adds result1[0]=1,result1[0] | 202 | (p6) adds result1[0]=1,result1[0] |
| 203 | (p9) br.cond.sptk .do_csum_exit // if (count == 1) exit | 203 | (p9) br.cond.sptk .do_csum_exit // if (count == 1) exit |
| 204 | // Fall through to caluculate the checksum, feeding result1[0] as | 204 | // Fall through to calculate the checksum, feeding result1[0] as |
| 205 | // the initial value in result1[0]. | 205 | // the initial value in result1[0]. |
| 206 | // | 206 | // |
| 207 | // Calculate the checksum loading two 8-byte words per loop. | 207 | // Calculate the checksum loading two 8-byte words per loop. |
diff --git a/arch/ia64/sn/kernel/irq.c b/arch/ia64/sn/kernel/irq.c index 139c018dbbf9..81a1f4e6bcd8 100644 --- a/arch/ia64/sn/kernel/irq.c +++ b/arch/ia64/sn/kernel/irq.c | |||
| @@ -227,7 +227,7 @@ void sn_set_err_irq_affinity(unsigned int irq) | |||
| 227 | { | 227 | { |
| 228 | /* | 228 | /* |
| 229 | * On systems which support CPU disabling (SHub2), all error interrupts | 229 | * On systems which support CPU disabling (SHub2), all error interrupts |
| 230 | * are targetted at the boot CPU. | 230 | * are targeted at the boot CPU. |
| 231 | */ | 231 | */ |
| 232 | if (is_shub2() && sn_prom_feature_available(PRF_CPU_DISABLE_SUPPORT)) | 232 | if (is_shub2() && sn_prom_feature_available(PRF_CPU_DISABLE_SUPPORT)) |
| 233 | set_irq_affinity_info(irq, cpu_physical_id(0), 0); | 233 | set_irq_affinity_info(irq, cpu_physical_id(0), 0); |
| @@ -435,7 +435,7 @@ static void sn_check_intr(int irq, struct sn_irq_info *sn_irq_info) | |||
| 435 | /* | 435 | /* |
| 436 | * Bridge types attached to TIO (anything but PIC) do not need this WAR | 436 | * Bridge types attached to TIO (anything but PIC) do not need this WAR |
| 437 | * since they do not target Shub II interrupt registers. If that | 437 | * since they do not target Shub II interrupt registers. If that |
| 438 | * ever changes, this check needs to accomodate. | 438 | * ever changes, this check needs to accommodate. |
| 439 | */ | 439 | */ |
| 440 | if (sn_irq_info->irq_bridge_type != PCIIO_ASIC_TYPE_PIC) | 440 | if (sn_irq_info->irq_bridge_type != PCIIO_ASIC_TYPE_PIC) |
| 441 | return; | 441 | return; |
diff --git a/arch/ia64/sn/pci/pcibr/pcibr_dma.c b/arch/ia64/sn/pci/pcibr/pcibr_dma.c index c659ad5613a0..33def666a664 100644 --- a/arch/ia64/sn/pci/pcibr/pcibr_dma.c +++ b/arch/ia64/sn/pci/pcibr/pcibr_dma.c | |||
| @@ -227,7 +227,7 @@ pcibr_dma_unmap(struct pci_dev *hwdev, dma_addr_t dma_handle, int direction) | |||
| 227 | * after doing the read. For PIC this routine then forces a fake interrupt | 227 | * after doing the read. For PIC this routine then forces a fake interrupt |
| 228 | * on another line, which is logically associated with the slot that the PIO | 228 | * on another line, which is logically associated with the slot that the PIO |
| 229 | * is addressed to. It then spins while watching the memory location that | 229 | * is addressed to. It then spins while watching the memory location that |
| 230 | * the interrupt is targetted to. When the interrupt response arrives, we | 230 | * the interrupt is targeted to. When the interrupt response arrives, we |
| 231 | * are sure that the DMA has landed in memory and it is safe for the driver | 231 | * are sure that the DMA has landed in memory and it is safe for the driver |
| 232 | * to proceed. For TIOCP use the Device(x) Write Request Buffer Flush | 232 | * to proceed. For TIOCP use the Device(x) Write Request Buffer Flush |
| 233 | * Bridge register since it ensures the data has entered the coherence domain, | 233 | * Bridge register since it ensures the data has entered the coherence domain, |
diff --git a/arch/m32r/include/asm/m32104ut/m32104ut_pld.h b/arch/m32r/include/asm/m32104ut/m32104ut_pld.h index 2dc89d68b6d9..1feae9709f24 100644 --- a/arch/m32r/include/asm/m32104ut/m32104ut_pld.h +++ b/arch/m32r/include/asm/m32104ut/m32104ut_pld.h | |||
| @@ -4,7 +4,7 @@ | |||
| 4 | /* | 4 | /* |
| 5 | * include/asm-m32r/m32104ut/m32104ut_pld.h | 5 | * include/asm-m32r/m32104ut/m32104ut_pld.h |
| 6 | * | 6 | * |
| 7 | * Definitions for Programable Logic Device(PLD) on M32104UT board. | 7 | * Definitions for Programmable Logic Device(PLD) on M32104UT board. |
| 8 | * Based on m32700ut_pld.h | 8 | * Based on m32700ut_pld.h |
| 9 | * | 9 | * |
| 10 | * Copyright (c) 2002 Takeo Takahashi | 10 | * Copyright (c) 2002 Takeo Takahashi |
diff --git a/arch/m32r/include/asm/m32700ut/m32700ut_pld.h b/arch/m32r/include/asm/m32700ut/m32700ut_pld.h index 57623beb44cb..35294670b187 100644 --- a/arch/m32r/include/asm/m32700ut/m32700ut_pld.h +++ b/arch/m32r/include/asm/m32700ut/m32700ut_pld.h | |||
| @@ -4,7 +4,7 @@ | |||
| 4 | /* | 4 | /* |
| 5 | * include/asm-m32r/m32700ut/m32700ut_pld.h | 5 | * include/asm-m32r/m32700ut/m32700ut_pld.h |
| 6 | * | 6 | * |
| 7 | * Definitions for Programable Logic Device(PLD) on M32700UT board. | 7 | * Definitions for Programmable Logic Device(PLD) on M32700UT board. |
| 8 | * | 8 | * |
| 9 | * Copyright (c) 2002 Takeo Takahashi | 9 | * Copyright (c) 2002 Takeo Takahashi |
| 10 | * | 10 | * |
diff --git a/arch/m32r/include/asm/opsput/opsput_pld.h b/arch/m32r/include/asm/opsput/opsput_pld.h index 3f11ea1aac2d..6901401fe9eb 100644 --- a/arch/m32r/include/asm/opsput/opsput_pld.h +++ b/arch/m32r/include/asm/opsput/opsput_pld.h | |||
| @@ -4,7 +4,7 @@ | |||
| 4 | /* | 4 | /* |
| 5 | * include/asm-m32r/opsput/opsput_pld.h | 5 | * include/asm-m32r/opsput/opsput_pld.h |
| 6 | * | 6 | * |
| 7 | * Definitions for Programable Logic Device(PLD) on OPSPUT board. | 7 | * Definitions for Programmable Logic Device(PLD) on OPSPUT board. |
| 8 | * | 8 | * |
| 9 | * Copyright (c) 2002 Takeo Takahashi | 9 | * Copyright (c) 2002 Takeo Takahashi |
| 10 | * | 10 | * |
diff --git a/arch/m32r/include/asm/pgtable-2level.h b/arch/m32r/include/asm/pgtable-2level.h index bca3475f9595..9cdaf7350ef6 100644 --- a/arch/m32r/include/asm/pgtable-2level.h +++ b/arch/m32r/include/asm/pgtable-2level.h | |||
| @@ -44,7 +44,7 @@ static inline int pgd_present(pgd_t pgd) { return 1; } | |||
| 44 | #define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) | 44 | #define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) |
| 45 | 45 | ||
| 46 | /* | 46 | /* |
| 47 | * (pmds are folded into pgds so this doesnt get actually called, | 47 | * (pmds are folded into pgds so this doesn't get actually called, |
| 48 | * but the define is needed for a generic inline function.) | 48 | * but the define is needed for a generic inline function.) |
| 49 | */ | 49 | */ |
| 50 | #define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval) | 50 | #define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval) |
diff --git a/arch/m32r/mm/fault.c b/arch/m32r/mm/fault.c index b8ec002aef8e..2c9aeb453847 100644 --- a/arch/m32r/mm/fault.c +++ b/arch/m32r/mm/fault.c | |||
| @@ -120,7 +120,7 @@ asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long error_code, | |||
| 120 | 120 | ||
| 121 | /* When running in the kernel we expect faults to occur only to | 121 | /* When running in the kernel we expect faults to occur only to |
| 122 | * addresses in user space. All other faults represent errors in the | 122 | * addresses in user space. All other faults represent errors in the |
| 123 | * kernel and should generate an OOPS. Unfortunatly, in the case of an | 123 | * kernel and should generate an OOPS. Unfortunately, in the case of an |
| 124 | * erroneous fault occurring in a code path which already holds mmap_sem | 124 | * erroneous fault occurring in a code path which already holds mmap_sem |
| 125 | * we will deadlock attempting to validate the fault against the | 125 | * we will deadlock attempting to validate the fault against the |
| 126 | * address space. Luckily the kernel only validly references user | 126 | * address space. Luckily the kernel only validly references user |
| @@ -128,7 +128,7 @@ asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long error_code, | |||
| 128 | * exceptions table. | 128 | * exceptions table. |
| 129 | * | 129 | * |
| 130 | * As the vast majority of faults will be valid we will only perform | 130 | * As the vast majority of faults will be valid we will only perform |
| 131 | * the source reference check when there is a possibilty of a deadlock. | 131 | * the source reference check when there is a possibility of a deadlock. |
| 132 | * Attempt to lock the address space, if we cannot we then validate the | 132 | * Attempt to lock the address space, if we cannot we then validate the |
| 133 | * source. If this is invalid we can skip the address space check, | 133 | * source. If this is invalid we can skip the address space check, |
| 134 | * thus avoiding the deadlock. | 134 | * thus avoiding the deadlock. |
diff --git a/arch/m68k/atari/atakeyb.c b/arch/m68k/atari/atakeyb.c index 5890897d28bf..b995513d527f 100644 --- a/arch/m68k/atari/atakeyb.c +++ b/arch/m68k/atari/atakeyb.c | |||
| @@ -130,7 +130,7 @@ KEYBOARD_STATE kb_state; | |||
| 130 | * it's really hard to decide whether they're mouse or keyboard bytes. Since | 130 | * it's really hard to decide whether they're mouse or keyboard bytes. Since |
| 131 | * overruns usually occur when moving the Atari mouse rapidly, they're seen as | 131 | * overruns usually occur when moving the Atari mouse rapidly, they're seen as |
| 132 | * mouse bytes here. If this is wrong, only a make code of the keyboard gets | 132 | * mouse bytes here. If this is wrong, only a make code of the keyboard gets |
| 133 | * lost, which isn't too bad. Loosing a break code would be disastrous, | 133 | * lost, which isn't too bad. Losing a break code would be disastrous, |
| 134 | * because then the keyboard repeat strikes... | 134 | * because then the keyboard repeat strikes... |
| 135 | */ | 135 | */ |
| 136 | 136 | ||
diff --git a/arch/m68k/fpsp040/bindec.S b/arch/m68k/fpsp040/bindec.S index 72f1159cb804..f2e795231046 100644 --- a/arch/m68k/fpsp040/bindec.S +++ b/arch/m68k/fpsp040/bindec.S | |||
| @@ -609,7 +609,7 @@ do_fint: | |||
| 609 | | A6. This test occurs only on the first pass. If the | 609 | | A6. This test occurs only on the first pass. If the |
| 610 | | result is exactly 10^LEN, decrement ILOG and divide | 610 | | result is exactly 10^LEN, decrement ILOG and divide |
| 611 | | the mantissa by 10. The calculation of 10^LEN cannot | 611 | | the mantissa by 10. The calculation of 10^LEN cannot |
| 612 | | be inexact, since all powers of ten upto 10^27 are exact | 612 | | be inexact, since all powers of ten up to 10^27 are exact |
| 613 | | in extended precision, so the use of a previous power-of-ten | 613 | | in extended precision, so the use of a previous power-of-ten |
| 614 | | table will introduce no error. | 614 | | table will introduce no error. |
| 615 | | | 615 | | |
diff --git a/arch/m68k/ifpsp060/src/fpsp.S b/arch/m68k/ifpsp060/src/fpsp.S index 26e85e2b7a5e..78cb60f5bb4d 100644 --- a/arch/m68k/ifpsp060/src/fpsp.S +++ b/arch/m68k/ifpsp060/src/fpsp.S | |||
| @@ -11813,7 +11813,7 @@ fmul_unfl_ena: | |||
| 11813 | bne.b fmul_unfl_ena_sd # no, sgl or dbl | 11813 | bne.b fmul_unfl_ena_sd # no, sgl or dbl |
| 11814 | 11814 | ||
| 11815 | # if the rnd mode is anything but RZ, then we have to re-do the above | 11815 | # if the rnd mode is anything but RZ, then we have to re-do the above |
| 11816 | # multiplication becuase we used RZ for all. | 11816 | # multiplication because we used RZ for all. |
| 11817 | fmov.l L_SCR3(%a6),%fpcr # set FPCR | 11817 | fmov.l L_SCR3(%a6),%fpcr # set FPCR |
| 11818 | 11818 | ||
| 11819 | fmul_unfl_ena_cont: | 11819 | fmul_unfl_ena_cont: |
| @@ -18095,7 +18095,7 @@ fscc_mem_op: | |||
| 18095 | 18095 | ||
| 18096 | rts | 18096 | rts |
| 18097 | 18097 | ||
| 18098 | # addresing mode is post-increment. write the result byte. if the write | 18098 | # addressing mode is post-increment. write the result byte. if the write |
| 18099 | # fails then don't update the address register. if write passes then | 18099 | # fails then don't update the address register. if write passes then |
| 18100 | # call inc_areg() to update the address register. | 18100 | # call inc_areg() to update the address register. |
| 18101 | fscc_mem_inc: | 18101 | fscc_mem_inc: |
| @@ -20876,7 +20876,7 @@ dst_get_dupper: | |||
| 20876 | swap %d0 # d0 now in upper word | 20876 | swap %d0 # d0 now in upper word |
| 20877 | lsl.l &0x4,%d0 # d0 in proper place for dbl prec exp | 20877 | lsl.l &0x4,%d0 # d0 in proper place for dbl prec exp |
| 20878 | tst.b FTEMP_EX(%a0) # test sign | 20878 | tst.b FTEMP_EX(%a0) # test sign |
| 20879 | bpl.b dst_get_dman # if postive, go process mantissa | 20879 | bpl.b dst_get_dman # if positive, go process mantissa |
| 20880 | bset &0x1f,%d0 # if negative, set sign | 20880 | bset &0x1f,%d0 # if negative, set sign |
| 20881 | dst_get_dman: | 20881 | dst_get_dman: |
| 20882 | mov.l FTEMP_HI(%a0),%d1 # get ms mantissa | 20882 | mov.l FTEMP_HI(%a0),%d1 # get ms mantissa |
| @@ -22943,7 +22943,7 @@ tbl_ovfl_result: | |||
| 22943 | # FP_SRC(a6) = packed operand now as a binary FP number # | 22943 | # FP_SRC(a6) = packed operand now as a binary FP number # |
| 22944 | # # | 22944 | # # |
| 22945 | # ALGORITHM *********************************************************** # | 22945 | # ALGORITHM *********************************************************** # |
| 22946 | # Get the correct <ea> whihc is the value on the exception stack # | 22946 | # Get the correct <ea> which is the value on the exception stack # |
| 22947 | # frame w/ maybe a correction factor if the <ea> is -(an) or (an)+. # | 22947 | # frame w/ maybe a correction factor if the <ea> is -(an) or (an)+. # |
| 22948 | # Then, fetch the operand from memory. If the fetch fails, exit # | 22948 | # Then, fetch the operand from memory. If the fetch fails, exit # |
| 22949 | # through facc_in_x(). # | 22949 | # through facc_in_x(). # |
| @@ -24096,7 +24096,7 @@ do_fint12: | |||
| 24096 | # A6. This test occurs only on the first pass. If the | 24096 | # A6. This test occurs only on the first pass. If the |
| 24097 | # result is exactly 10^LEN, decrement ILOG and divide | 24097 | # result is exactly 10^LEN, decrement ILOG and divide |
| 24098 | # the mantissa by 10. The calculation of 10^LEN cannot | 24098 | # the mantissa by 10. The calculation of 10^LEN cannot |
| 24099 | # be inexact, since all powers of ten upto 10^27 are exact | 24099 | # be inexact, since all powers of ten up to 10^27 are exact |
| 24100 | # in extended precision, so the use of a previous power-of-ten | 24100 | # in extended precision, so the use of a previous power-of-ten |
| 24101 | # table will introduce no error. | 24101 | # table will introduce no error. |
| 24102 | # | 24102 | # |
diff --git a/arch/m68k/ifpsp060/src/pfpsp.S b/arch/m68k/ifpsp060/src/pfpsp.S index e71ba0ab013c..4aedef973cf6 100644 --- a/arch/m68k/ifpsp060/src/pfpsp.S +++ b/arch/m68k/ifpsp060/src/pfpsp.S | |||
| @@ -7777,7 +7777,7 @@ dst_get_dupper: | |||
| 7777 | swap %d0 # d0 now in upper word | 7777 | swap %d0 # d0 now in upper word |
| 7778 | lsl.l &0x4,%d0 # d0 in proper place for dbl prec exp | 7778 | lsl.l &0x4,%d0 # d0 in proper place for dbl prec exp |
| 7779 | tst.b FTEMP_EX(%a0) # test sign | 7779 | tst.b FTEMP_EX(%a0) # test sign |
| 7780 | bpl.b dst_get_dman # if postive, go process mantissa | 7780 | bpl.b dst_get_dman # if positive, go process mantissa |
| 7781 | bset &0x1f,%d0 # if negative, set sign | 7781 | bset &0x1f,%d0 # if negative, set sign |
| 7782 | dst_get_dman: | 7782 | dst_get_dman: |
| 7783 | mov.l FTEMP_HI(%a0),%d1 # get ms mantissa | 7783 | mov.l FTEMP_HI(%a0),%d1 # get ms mantissa |
| @@ -8244,7 +8244,7 @@ fmul_unfl_ena: | |||
| 8244 | bne.b fmul_unfl_ena_sd # no, sgl or dbl | 8244 | bne.b fmul_unfl_ena_sd # no, sgl or dbl |
| 8245 | 8245 | ||
| 8246 | # if the rnd mode is anything but RZ, then we have to re-do the above | 8246 | # if the rnd mode is anything but RZ, then we have to re-do the above |
| 8247 | # multiplication becuase we used RZ for all. | 8247 | # multiplication because we used RZ for all. |
| 8248 | fmov.l L_SCR3(%a6),%fpcr # set FPCR | 8248 | fmov.l L_SCR3(%a6),%fpcr # set FPCR |
| 8249 | 8249 | ||
| 8250 | fmul_unfl_ena_cont: | 8250 | fmul_unfl_ena_cont: |
| @@ -12903,7 +12903,7 @@ store_fpreg_7: | |||
| 12903 | # FP_SRC(a6) = packed operand now as a binary FP number # | 12903 | # FP_SRC(a6) = packed operand now as a binary FP number # |
| 12904 | # # | 12904 | # # |
| 12905 | # ALGORITHM *********************************************************** # | 12905 | # ALGORITHM *********************************************************** # |
| 12906 | # Get the correct <ea> whihc is the value on the exception stack # | 12906 | # Get the correct <ea> which is the value on the exception stack # |
| 12907 | # frame w/ maybe a correction factor if the <ea> is -(an) or (an)+. # | 12907 | # frame w/ maybe a correction factor if the <ea> is -(an) or (an)+. # |
| 12908 | # Then, fetch the operand from memory. If the fetch fails, exit # | 12908 | # Then, fetch the operand from memory. If the fetch fails, exit # |
| 12909 | # through facc_in_x(). # | 12909 | # through facc_in_x(). # |
| @@ -14056,7 +14056,7 @@ do_fint12: | |||
| 14056 | # A6. This test occurs only on the first pass. If the | 14056 | # A6. This test occurs only on the first pass. If the |
| 14057 | # result is exactly 10^LEN, decrement ILOG and divide | 14057 | # result is exactly 10^LEN, decrement ILOG and divide |
| 14058 | # the mantissa by 10. The calculation of 10^LEN cannot | 14058 | # the mantissa by 10. The calculation of 10^LEN cannot |
| 14059 | # be inexact, since all powers of ten upto 10^27 are exact | 14059 | # be inexact, since all powers of ten up to 10^27 are exact |
| 14060 | # in extended precision, so the use of a previous power-of-ten | 14060 | # in extended precision, so the use of a previous power-of-ten |
| 14061 | # table will introduce no error. | 14061 | # table will introduce no error. |
| 14062 | # | 14062 | # |
diff --git a/arch/m68k/include/asm/atariints.h b/arch/m68k/include/asm/atariints.h index f597892e43a0..656bbbf5a6ff 100644 --- a/arch/m68k/include/asm/atariints.h +++ b/arch/m68k/include/asm/atariints.h | |||
| @@ -146,7 +146,7 @@ static inline void clear_mfp_bit( unsigned irq, int type ) | |||
| 146 | 146 | ||
| 147 | /* | 147 | /* |
| 148 | * {en,dis}able_irq have the usual semantics of temporary blocking the | 148 | * {en,dis}able_irq have the usual semantics of temporary blocking the |
| 149 | * interrupt, but not loosing requests that happen between disabling and | 149 | * interrupt, but not losing requests that happen between disabling and |
| 150 | * enabling. This is done with the MFP mask registers. | 150 | * enabling. This is done with the MFP mask registers. |
| 151 | */ | 151 | */ |
| 152 | 152 | ||
diff --git a/arch/m68k/include/asm/bootstd.h b/arch/m68k/include/asm/bootstd.h index bdc1a4ac4fe9..e518f5a575b7 100644 --- a/arch/m68k/include/asm/bootstd.h +++ b/arch/m68k/include/asm/bootstd.h | |||
| @@ -31,7 +31,7 @@ | |||
| 31 | #define __BN_flash_write_range 20 | 31 | #define __BN_flash_write_range 20 |
| 32 | 32 | ||
| 33 | /* Calling conventions compatible to (uC)linux/68k | 33 | /* Calling conventions compatible to (uC)linux/68k |
| 34 | * We use simmilar macros to call into the bootloader as for uClinux | 34 | * We use similar macros to call into the bootloader as for uClinux |
| 35 | */ | 35 | */ |
| 36 | 36 | ||
| 37 | #define __bsc_return(type, res) \ | 37 | #define __bsc_return(type, res) \ |
diff --git a/arch/m68k/include/asm/commproc.h b/arch/m68k/include/asm/commproc.h index edf5eb6c08d2..a73998528d26 100644 --- a/arch/m68k/include/asm/commproc.h +++ b/arch/m68k/include/asm/commproc.h | |||
| @@ -88,7 +88,7 @@ typedef struct cpm_buf_desc { | |||
| 88 | 88 | ||
| 89 | 89 | ||
| 90 | /* rx bd status/control bits */ | 90 | /* rx bd status/control bits */ |
| 91 | #define BD_SC_EMPTY ((ushort)0x8000) /* Recieve is empty */ | 91 | #define BD_SC_EMPTY ((ushort)0x8000) /* Receive is empty */ |
| 92 | #define BD_SC_WRAP ((ushort)0x2000) /* Last buffer descriptor in table */ | 92 | #define BD_SC_WRAP ((ushort)0x2000) /* Last buffer descriptor in table */ |
| 93 | #define BD_SC_INTRPT ((ushort)0x1000) /* Interrupt on change */ | 93 | #define BD_SC_INTRPT ((ushort)0x1000) /* Interrupt on change */ |
| 94 | #define BD_SC_LAST ((ushort)0x0800) /* Last buffer in frame OR control char */ | 94 | #define BD_SC_LAST ((ushort)0x0800) /* Last buffer in frame OR control char */ |
| @@ -96,7 +96,7 @@ typedef struct cpm_buf_desc { | |||
| 96 | #define BD_SC_FIRST ((ushort)0x0400) /* 1st buffer in an HDLC frame */ | 96 | #define BD_SC_FIRST ((ushort)0x0400) /* 1st buffer in an HDLC frame */ |
| 97 | #define BD_SC_ADDR ((ushort)0x0400) /* 1st byte is a multidrop address */ | 97 | #define BD_SC_ADDR ((ushort)0x0400) /* 1st byte is a multidrop address */ |
| 98 | 98 | ||
| 99 | #define BD_SC_CM ((ushort)0x0200) /* Continous mode */ | 99 | #define BD_SC_CM ((ushort)0x0200) /* Continuous mode */ |
| 100 | #define BD_SC_ID ((ushort)0x0100) /* Received too many idles */ | 100 | #define BD_SC_ID ((ushort)0x0100) /* Received too many idles */ |
| 101 | 101 | ||
| 102 | #define BD_SC_AM ((ushort)0x0080) /* Multidrop address match */ | 102 | #define BD_SC_AM ((ushort)0x0080) /* Multidrop address match */ |
diff --git a/arch/m68k/include/asm/delay_no.h b/arch/m68k/include/asm/delay_no.h index 55cbd6294ab6..c3a0edc90f21 100644 --- a/arch/m68k/include/asm/delay_no.h +++ b/arch/m68k/include/asm/delay_no.h | |||
| @@ -16,7 +16,7 @@ static inline void __delay(unsigned long loops) | |||
| 16 | * long word alignment which is the faster version. | 16 | * long word alignment which is the faster version. |
| 17 | * The 0x4a8e is of course a 'tstl %fp' instruction. This is better | 17 | * The 0x4a8e is of course a 'tstl %fp' instruction. This is better |
| 18 | * than using a NOP (0x4e71) instruction because it executes in one | 18 | * than using a NOP (0x4e71) instruction because it executes in one |
| 19 | * cycle not three and doesn't allow for an arbitary delay waiting | 19 | * cycle not three and doesn't allow for an arbitrary delay waiting |
| 20 | * for bus cycles to finish. Also fp/a6 isn't likely to cause a | 20 | * for bus cycles to finish. Also fp/a6 isn't likely to cause a |
| 21 | * stall waiting for the register to become valid if such is added | 21 | * stall waiting for the register to become valid if such is added |
| 22 | * to the coldfire at some stage. | 22 | * to the coldfire at some stage. |
diff --git a/arch/m68k/include/asm/gpio.h b/arch/m68k/include/asm/gpio.h index c64c7b74cf86..b2046839f4b2 100644 --- a/arch/m68k/include/asm/gpio.h +++ b/arch/m68k/include/asm/gpio.h | |||
| @@ -31,7 +31,7 @@ | |||
| 31 | * GPIOs in a single control area, others have some GPIOs implemented in | 31 | * GPIOs in a single control area, others have some GPIOs implemented in |
| 32 | * different modules. | 32 | * different modules. |
| 33 | * | 33 | * |
| 34 | * This implementation attempts accomodate the differences while presenting | 34 | * This implementation attempts accommodate the differences while presenting |
| 35 | * a generic interface that will optimize to as few instructions as possible. | 35 | * a generic interface that will optimize to as few instructions as possible. |
| 36 | */ | 36 | */ |
| 37 | #if defined(CONFIG_M5206) || defined(CONFIG_M5206e) || \ | 37 | #if defined(CONFIG_M5206) || defined(CONFIG_M5206e) || \ |
diff --git a/arch/m68k/include/asm/m520xsim.h b/arch/m68k/include/asm/m520xsim.h index 55d5a4c5fe0b..b6bf2c518bac 100644 --- a/arch/m68k/include/asm/m520xsim.h +++ b/arch/m68k/include/asm/m520xsim.h | |||
| @@ -157,7 +157,7 @@ | |||
| 157 | #define MCFFEC_SIZE 0x800 /* Register set size */ | 157 | #define MCFFEC_SIZE 0x800 /* Register set size */ |
| 158 | 158 | ||
| 159 | /* | 159 | /* |
| 160 | * Reset Controll Unit. | 160 | * Reset Control Unit. |
| 161 | */ | 161 | */ |
| 162 | #define MCF_RCR 0xFC0A0000 | 162 | #define MCF_RCR 0xFC0A0000 |
| 163 | #define MCF_RSR 0xFC0A0001 | 163 | #define MCF_RSR 0xFC0A0001 |
diff --git a/arch/m68k/include/asm/m523xsim.h b/arch/m68k/include/asm/m523xsim.h index 8996df62ede4..6235921eca4e 100644 --- a/arch/m68k/include/asm/m523xsim.h +++ b/arch/m68k/include/asm/m523xsim.h | |||
| @@ -48,7 +48,7 @@ | |||
| 48 | #define MCFSIM_DMR1 (MCF_IPSBAR + 0x54) /* Address mask 1 */ | 48 | #define MCFSIM_DMR1 (MCF_IPSBAR + 0x54) /* Address mask 1 */ |
| 49 | 49 | ||
| 50 | /* | 50 | /* |
| 51 | * Reset Controll Unit (relative to IPSBAR). | 51 | * Reset Control Unit (relative to IPSBAR). |
| 52 | */ | 52 | */ |
| 53 | #define MCF_RCR 0x110000 | 53 | #define MCF_RCR 0x110000 |
| 54 | #define MCF_RSR 0x110001 | 54 | #define MCF_RSR 0x110001 |
diff --git a/arch/m68k/include/asm/m527xsim.h b/arch/m68k/include/asm/m527xsim.h index 74855a66c050..758810ef91ec 100644 --- a/arch/m68k/include/asm/m527xsim.h +++ b/arch/m68k/include/asm/m527xsim.h | |||
| @@ -283,7 +283,7 @@ | |||
| 283 | #endif | 283 | #endif |
| 284 | 284 | ||
| 285 | /* | 285 | /* |
| 286 | * Reset Controll Unit (relative to IPSBAR). | 286 | * Reset Control Unit (relative to IPSBAR). |
| 287 | */ | 287 | */ |
| 288 | #define MCF_RCR 0x110000 | 288 | #define MCF_RCR 0x110000 |
| 289 | #define MCF_RSR 0x110001 | 289 | #define MCF_RSR 0x110001 |
diff --git a/arch/m68k/include/asm/m5307sim.h b/arch/m68k/include/asm/m5307sim.h index 4c94c01f36c4..8f8609fcc9b8 100644 --- a/arch/m68k/include/asm/m5307sim.h +++ b/arch/m68k/include/asm/m5307sim.h | |||
| @@ -29,7 +29,7 @@ | |||
| 29 | #define MCFSIM_SWSR 0x03 /* SW Watchdog service (r/w) */ | 29 | #define MCFSIM_SWSR 0x03 /* SW Watchdog service (r/w) */ |
| 30 | #define MCFSIM_PAR 0x04 /* Pin Assignment reg (r/w) */ | 30 | #define MCFSIM_PAR 0x04 /* Pin Assignment reg (r/w) */ |
| 31 | #define MCFSIM_IRQPAR 0x06 /* Interrupt Assignment reg (r/w) */ | 31 | #define MCFSIM_IRQPAR 0x06 /* Interrupt Assignment reg (r/w) */ |
| 32 | #define MCFSIM_PLLCR 0x08 /* PLL Controll Reg*/ | 32 | #define MCFSIM_PLLCR 0x08 /* PLL Control Reg*/ |
| 33 | #define MCFSIM_MPARK 0x0C /* BUS Master Control Reg*/ | 33 | #define MCFSIM_MPARK 0x0C /* BUS Master Control Reg*/ |
| 34 | #define MCFSIM_IPR 0x40 /* Interrupt Pend reg (r/w) */ | 34 | #define MCFSIM_IPR 0x40 /* Interrupt Pend reg (r/w) */ |
| 35 | #define MCFSIM_IMR 0x44 /* Interrupt Mask reg (r/w) */ | 35 | #define MCFSIM_IMR 0x44 /* Interrupt Mask reg (r/w) */ |
diff --git a/arch/m68k/include/asm/m5407sim.h b/arch/m68k/include/asm/m5407sim.h index 762c58c89050..51e00b00b8a6 100644 --- a/arch/m68k/include/asm/m5407sim.h +++ b/arch/m68k/include/asm/m5407sim.h | |||
| @@ -29,7 +29,7 @@ | |||
| 29 | #define MCFSIM_SWSR 0x03 /* SW Watchdog service (r/w) */ | 29 | #define MCFSIM_SWSR 0x03 /* SW Watchdog service (r/w) */ |
| 30 | #define MCFSIM_PAR 0x04 /* Pin Assignment reg (r/w) */ | 30 | #define MCFSIM_PAR 0x04 /* Pin Assignment reg (r/w) */ |
| 31 | #define MCFSIM_IRQPAR 0x06 /* Interrupt Assignment reg (r/w) */ | 31 | #define MCFSIM_IRQPAR 0x06 /* Interrupt Assignment reg (r/w) */ |
| 32 | #define MCFSIM_PLLCR 0x08 /* PLL Controll Reg*/ | 32 | #define MCFSIM_PLLCR 0x08 /* PLL Control Reg*/ |
| 33 | #define MCFSIM_MPARK 0x0C /* BUS Master Control Reg*/ | 33 | #define MCFSIM_MPARK 0x0C /* BUS Master Control Reg*/ |
| 34 | #define MCFSIM_IPR 0x40 /* Interrupt Pend reg (r/w) */ | 34 | #define MCFSIM_IPR 0x40 /* Interrupt Pend reg (r/w) */ |
| 35 | #define MCFSIM_IMR 0x44 /* Interrupt Mask reg (r/w) */ | 35 | #define MCFSIM_IMR 0x44 /* Interrupt Mask reg (r/w) */ |
diff --git a/arch/m68k/include/asm/m68360_quicc.h b/arch/m68k/include/asm/m68360_quicc.h index 6d40f4d18e10..59414cc108d3 100644 --- a/arch/m68k/include/asm/m68360_quicc.h +++ b/arch/m68k/include/asm/m68360_quicc.h | |||
| @@ -32,7 +32,7 @@ struct user_data { | |||
| 32 | /* BASE + 0x000: user data memory */ | 32 | /* BASE + 0x000: user data memory */ |
| 33 | volatile unsigned char udata_bd_ucode[0x400]; /*user data bd's Ucode*/ | 33 | volatile unsigned char udata_bd_ucode[0x400]; /*user data bd's Ucode*/ |
| 34 | volatile unsigned char udata_bd[0x200]; /*user data Ucode */ | 34 | volatile unsigned char udata_bd[0x200]; /*user data Ucode */ |
| 35 | volatile unsigned char ucode_ext[0x100]; /*Ucode Extention ram */ | 35 | volatile unsigned char ucode_ext[0x100]; /*Ucode Extension ram */ |
| 36 | volatile unsigned char RESERVED1[0x500]; /* Reserved area */ | 36 | volatile unsigned char RESERVED1[0x500]; /* Reserved area */ |
| 37 | }; | 37 | }; |
| 38 | #else | 38 | #else |
diff --git a/arch/m68k/include/asm/mac_oss.h b/arch/m68k/include/asm/mac_oss.h index 7221f7251934..3cf2b6ed685a 100644 --- a/arch/m68k/include/asm/mac_oss.h +++ b/arch/m68k/include/asm/mac_oss.h | |||
| @@ -61,7 +61,7 @@ | |||
| 61 | /* | 61 | /* |
| 62 | * OSS Interrupt levels for various sub-systems | 62 | * OSS Interrupt levels for various sub-systems |
| 63 | * | 63 | * |
| 64 | * This mapping is layed out with two things in mind: first, we try to keep | 64 | * This mapping is laid out with two things in mind: first, we try to keep |
| 65 | * things on their own levels to avoid having to do double-dispatches. Second, | 65 | * things on their own levels to avoid having to do double-dispatches. Second, |
| 66 | * the levels match as closely as possible the alternate IRQ mapping mode (aka | 66 | * the levels match as closely as possible the alternate IRQ mapping mode (aka |
| 67 | * "A/UX mode") available on some VIA machines. | 67 | * "A/UX mode") available on some VIA machines. |
diff --git a/arch/m68k/include/asm/mac_via.h b/arch/m68k/include/asm/mac_via.h index 39afb438b656..a59665e1d41b 100644 --- a/arch/m68k/include/asm/mac_via.h +++ b/arch/m68k/include/asm/mac_via.h | |||
| @@ -204,7 +204,7 @@ | |||
| 204 | #define vT2CL 0x1000 /* [VIA only] Timer two counter low. */ | 204 | #define vT2CL 0x1000 /* [VIA only] Timer two counter low. */ |
| 205 | #define vT2CH 0x1200 /* [VIA only] Timer two counter high. */ | 205 | #define vT2CH 0x1200 /* [VIA only] Timer two counter high. */ |
| 206 | #define vSR 0x1400 /* [VIA only] Shift register. */ | 206 | #define vSR 0x1400 /* [VIA only] Shift register. */ |
| 207 | #define vACR 0x1600 /* [VIA only] Auxilary control register. */ | 207 | #define vACR 0x1600 /* [VIA only] Auxiliary control register. */ |
| 208 | #define vPCR 0x1800 /* [VIA only] Peripheral control register. */ | 208 | #define vPCR 0x1800 /* [VIA only] Peripheral control register. */ |
| 209 | /* CHRP sez never ever to *write* this. | 209 | /* CHRP sez never ever to *write* this. |
| 210 | * Mac family says never to *change* this. | 210 | * Mac family says never to *change* this. |
diff --git a/arch/m68k/include/asm/macintosh.h b/arch/m68k/include/asm/macintosh.h index 50db3591ca15..c2a1c5eac1a6 100644 --- a/arch/m68k/include/asm/macintosh.h +++ b/arch/m68k/include/asm/macintosh.h | |||
| @@ -14,7 +14,7 @@ extern void mac_init_IRQ(void); | |||
| 14 | extern int mac_irq_pending(unsigned int); | 14 | extern int mac_irq_pending(unsigned int); |
| 15 | 15 | ||
| 16 | /* | 16 | /* |
| 17 | * Floppy driver magic hook - probably shouldnt be here | 17 | * Floppy driver magic hook - probably shouldn't be here |
| 18 | */ | 18 | */ |
| 19 | 19 | ||
| 20 | extern void via1_set_head(int); | 20 | extern void via1_set_head(int); |
diff --git a/arch/m68k/include/asm/mcftimer.h b/arch/m68k/include/asm/mcftimer.h index 92b276fe8240..351c27237874 100644 --- a/arch/m68k/include/asm/mcftimer.h +++ b/arch/m68k/include/asm/mcftimer.h | |||
| @@ -27,7 +27,7 @@ | |||
| 27 | 27 | ||
| 28 | /* | 28 | /* |
| 29 | * Bit definitions for the Timer Mode Register (TMR). | 29 | * Bit definitions for the Timer Mode Register (TMR). |
| 30 | * Register bit flags are common accross ColdFires. | 30 | * Register bit flags are common across ColdFires. |
| 31 | */ | 31 | */ |
| 32 | #define MCFTIMER_TMR_PREMASK 0xff00 /* Prescalar mask */ | 32 | #define MCFTIMER_TMR_PREMASK 0xff00 /* Prescalar mask */ |
| 33 | #define MCFTIMER_TMR_DISCE 0x0000 /* Disable capture */ | 33 | #define MCFTIMER_TMR_DISCE 0x0000 /* Disable capture */ |
diff --git a/arch/m68k/kernel/head.S b/arch/m68k/kernel/head.S index ef54128baa0b..27622b3273c1 100644 --- a/arch/m68k/kernel/head.S +++ b/arch/m68k/kernel/head.S | |||
| @@ -134,7 +134,7 @@ | |||
| 134 | * Thanks to a small helping routine enabling the mmu got quite simple | 134 | * Thanks to a small helping routine enabling the mmu got quite simple |
| 135 | * and there is only one way left. mmu_engage makes a complete a new mapping | 135 | * and there is only one way left. mmu_engage makes a complete a new mapping |
| 136 | * that only includes the absolute necessary to be able to jump to the final | 136 | * that only includes the absolute necessary to be able to jump to the final |
| 137 | * postion and to restore the original mapping. | 137 | * position and to restore the original mapping. |
| 138 | * As this code doesn't need a transparent translation register anymore this | 138 | * As this code doesn't need a transparent translation register anymore this |
| 139 | * means all registers are free to be used by machines that needs them for | 139 | * means all registers are free to be used by machines that needs them for |
| 140 | * other purposes. | 140 | * other purposes. |
| @@ -969,7 +969,7 @@ L(mmu_init_amiga): | |||
| 969 | is_not_040_or_060(1f) | 969 | is_not_040_or_060(1f) |
| 970 | 970 | ||
| 971 | /* | 971 | /* |
| 972 | * 040: Map the 16Meg range physical 0x0 upto logical 0x8000.0000 | 972 | * 040: Map the 16Meg range physical 0x0 up to logical 0x8000.0000 |
| 973 | */ | 973 | */ |
| 974 | mmu_map #0x80000000,#0,#0x01000000,#_PAGE_NOCACHE_S | 974 | mmu_map #0x80000000,#0,#0x01000000,#_PAGE_NOCACHE_S |
| 975 | /* | 975 | /* |
| @@ -982,7 +982,7 @@ L(mmu_init_amiga): | |||
| 982 | 982 | ||
| 983 | 1: | 983 | 1: |
| 984 | /* | 984 | /* |
| 985 | * 030: Map the 32Meg range physical 0x0 upto logical 0x8000.0000 | 985 | * 030: Map the 32Meg range physical 0x0 up to logical 0x8000.0000 |
| 986 | */ | 986 | */ |
| 987 | mmu_map #0x80000000,#0,#0x02000000,#_PAGE_NOCACHE030 | 987 | mmu_map #0x80000000,#0,#0x02000000,#_PAGE_NOCACHE030 |
| 988 | mmu_map_tt #1,#0x40000000,#0x20000000,#_PAGE_NOCACHE030 | 988 | mmu_map_tt #1,#0x40000000,#0x20000000,#_PAGE_NOCACHE030 |
| @@ -1074,7 +1074,7 @@ L(notq40): | |||
| 1074 | is_040(1f) | 1074 | is_040(1f) |
| 1075 | 1075 | ||
| 1076 | /* | 1076 | /* |
| 1077 | * 030: Map the 32Meg range physical 0x0 upto logical 0xf000.0000 | 1077 | * 030: Map the 32Meg range physical 0x0 up to logical 0xf000.0000 |
| 1078 | */ | 1078 | */ |
| 1079 | mmu_map #0xf0000000,#0,#0x02000000,#_PAGE_NOCACHE030 | 1079 | mmu_map #0xf0000000,#0,#0x02000000,#_PAGE_NOCACHE030 |
| 1080 | 1080 | ||
| @@ -1082,7 +1082,7 @@ L(notq40): | |||
| 1082 | 1082 | ||
| 1083 | 1: | 1083 | 1: |
| 1084 | /* | 1084 | /* |
| 1085 | * 040: Map the 16Meg range physical 0x0 upto logical 0xf000.0000 | 1085 | * 040: Map the 16Meg range physical 0x0 up to logical 0xf000.0000 |
| 1086 | */ | 1086 | */ |
| 1087 | mmu_map #0xf0000000,#0,#0x01000000,#_PAGE_NOCACHE_S | 1087 | mmu_map #0xf0000000,#0,#0x01000000,#_PAGE_NOCACHE_S |
| 1088 | 1088 | ||
| @@ -3078,7 +3078,7 @@ func_start serial_putc,%d0/%d1/%a0/%a1 | |||
| 3078 | /* | 3078 | /* |
| 3079 | * If the loader gave us a board type then we can use that to | 3079 | * If the loader gave us a board type then we can use that to |
| 3080 | * select an appropriate output routine; otherwise we just use | 3080 | * select an appropriate output routine; otherwise we just use |
| 3081 | * the Bug code. If we haev to use the Bug that means the Bug | 3081 | * the Bug code. If we have to use the Bug that means the Bug |
| 3082 | * workspace has to be valid, which means the Bug has to use | 3082 | * workspace has to be valid, which means the Bug has to use |
| 3083 | * the SRAM, which is non-standard. | 3083 | * the SRAM, which is non-standard. |
| 3084 | */ | 3084 | */ |
diff --git a/arch/m68k/kernel/vmlinux.lds_no.S b/arch/m68k/kernel/vmlinux.lds_no.S index 47e15ebfd893..f4d715cdca0e 100644 --- a/arch/m68k/kernel/vmlinux.lds_no.S +++ b/arch/m68k/kernel/vmlinux.lds_no.S | |||
| @@ -3,7 +3,7 @@ | |||
| 3 | * | 3 | * |
| 4 | * (C) Copyright 2002-2006, Greg Ungerer <gerg@snapgear.com> | 4 | * (C) Copyright 2002-2006, Greg Ungerer <gerg@snapgear.com> |
| 5 | * | 5 | * |
| 6 | * This linker script is equiped to build either ROM loaded or RAM | 6 | * This linker script is equipped to build either ROM loaded or RAM |
| 7 | * run kernels. | 7 | * run kernels. |
| 8 | */ | 8 | */ |
| 9 | 9 | ||
diff --git a/arch/m68k/platform/523x/config.c b/arch/m68k/platform/523x/config.c index 418a76feb1e3..71f4436ec809 100644 --- a/arch/m68k/platform/523x/config.c +++ b/arch/m68k/platform/523x/config.c | |||
| @@ -3,7 +3,7 @@ | |||
| 3 | /* | 3 | /* |
| 4 | * linux/arch/m68knommu/platform/523x/config.c | 4 | * linux/arch/m68knommu/platform/523x/config.c |
| 5 | * | 5 | * |
| 6 | * Sub-architcture dependant initialization code for the Freescale | 6 | * Sub-architcture dependent initialization code for the Freescale |
| 7 | * 523x CPUs. | 7 | * 523x CPUs. |
| 8 | * | 8 | * |
| 9 | * Copyright (C) 1999-2005, Greg Ungerer (gerg@snapgear.com) | 9 | * Copyright (C) 1999-2005, Greg Ungerer (gerg@snapgear.com) |
diff --git a/arch/m68k/platform/5272/intc.c b/arch/m68k/platform/5272/intc.c index 43e6e96f087f..7e715dfe2819 100644 --- a/arch/m68k/platform/5272/intc.c +++ b/arch/m68k/platform/5272/intc.c | |||
| @@ -33,7 +33,7 @@ | |||
| 33 | * | 33 | * |
| 34 | * Note that the external interrupts are edge triggered (unlike the | 34 | * Note that the external interrupts are edge triggered (unlike the |
| 35 | * internal interrupt sources which are level triggered). Which means | 35 | * internal interrupt sources which are level triggered). Which means |
| 36 | * they also need acknowledgeing via acknowledge bits. | 36 | * they also need acknowledging via acknowledge bits. |
| 37 | */ | 37 | */ |
| 38 | struct irqmap { | 38 | struct irqmap { |
| 39 | unsigned char icr; | 39 | unsigned char icr; |
diff --git a/arch/m68k/platform/527x/config.c b/arch/m68k/platform/527x/config.c index fa359593b613..3ebc769cefda 100644 --- a/arch/m68k/platform/527x/config.c +++ b/arch/m68k/platform/527x/config.c | |||
| @@ -3,7 +3,7 @@ | |||
| 3 | /* | 3 | /* |
| 4 | * linux/arch/m68knommu/platform/527x/config.c | 4 | * linux/arch/m68knommu/platform/527x/config.c |
| 5 | * | 5 | * |
| 6 | * Sub-architcture dependant initialization code for the Freescale | 6 | * Sub-architcture dependent initialization code for the Freescale |
| 7 | * 5270/5271 CPUs. | 7 | * 5270/5271 CPUs. |
| 8 | * | 8 | * |
| 9 | * Copyright (C) 1999-2004, Greg Ungerer (gerg@snapgear.com) | 9 | * Copyright (C) 1999-2004, Greg Ungerer (gerg@snapgear.com) |
diff --git a/arch/m68k/platform/528x/config.c b/arch/m68k/platform/528x/config.c index ac39fc661219..7abe77a2f3e3 100644 --- a/arch/m68k/platform/528x/config.c +++ b/arch/m68k/platform/528x/config.c | |||
| @@ -3,7 +3,7 @@ | |||
| 3 | /* | 3 | /* |
| 4 | * linux/arch/m68knommu/platform/528x/config.c | 4 | * linux/arch/m68knommu/platform/528x/config.c |
| 5 | * | 5 | * |
| 6 | * Sub-architcture dependant initialization code for the Freescale | 6 | * Sub-architcture dependent initialization code for the Freescale |
| 7 | * 5280, 5281 and 5282 CPUs. | 7 | * 5280, 5281 and 5282 CPUs. |
| 8 | * | 8 | * |
| 9 | * Copyright (C) 1999-2003, Greg Ungerer (gerg@snapgear.com) | 9 | * Copyright (C) 1999-2003, Greg Ungerer (gerg@snapgear.com) |
diff --git a/arch/m68k/platform/coldfire/cache.c b/arch/m68k/platform/coldfire/cache.c index 235d3c4f4f0f..71beeaf0c5c4 100644 --- a/arch/m68k/platform/coldfire/cache.c +++ b/arch/m68k/platform/coldfire/cache.c | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | /***************************************************************************/ | 1 | /***************************************************************************/ |
| 2 | 2 | ||
| 3 | /* | 3 | /* |
| 4 | * cache.c -- general ColdFire Cache maintainence code | 4 | * cache.c -- general ColdFire Cache maintenance code |
| 5 | * | 5 | * |
| 6 | * Copyright (C) 2010, Greg Ungerer (gerg@snapgear.com) | 6 | * Copyright (C) 2010, Greg Ungerer (gerg@snapgear.com) |
| 7 | */ | 7 | */ |
diff --git a/arch/m68k/platform/coldfire/entry.S b/arch/m68k/platform/coldfire/entry.S index 5837cf080b6d..eab63f09965b 100644 --- a/arch/m68k/platform/coldfire/entry.S +++ b/arch/m68k/platform/coldfire/entry.S | |||
| @@ -163,7 +163,7 @@ Lsignal_return: | |||
| 163 | 163 | ||
| 164 | /* | 164 | /* |
| 165 | * This is the generic interrupt handler (for all hardware interrupt | 165 | * This is the generic interrupt handler (for all hardware interrupt |
| 166 | * sources). Calls upto high level code to do all the work. | 166 | * sources). Calls up to high level code to do all the work. |
| 167 | */ | 167 | */ |
| 168 | ENTRY(inthandler) | 168 | ENTRY(inthandler) |
| 169 | SAVE_ALL | 169 | SAVE_ALL |
diff --git a/arch/m68k/platform/coldfire/head.S b/arch/m68k/platform/coldfire/head.S index 129bff4956b5..6ae91a499184 100644 --- a/arch/m68k/platform/coldfire/head.S +++ b/arch/m68k/platform/coldfire/head.S | |||
| @@ -20,7 +20,7 @@ | |||
| 20 | 20 | ||
| 21 | /* | 21 | /* |
| 22 | * If we don't have a fixed memory size, then lets build in code | 22 | * If we don't have a fixed memory size, then lets build in code |
| 23 | * to auto detect the DRAM size. Obviously this is the prefered | 23 | * to auto detect the DRAM size. Obviously this is the preferred |
| 24 | * method, and should work for most boards. It won't work for those | 24 | * method, and should work for most boards. It won't work for those |
| 25 | * that do not have their RAM starting at address 0, and it only | 25 | * that do not have their RAM starting at address 0, and it only |
| 26 | * works on SDRAM (not boards fitted with SRAM). | 26 | * works on SDRAM (not boards fitted with SRAM). |
diff --git a/arch/m68k/platform/coldfire/intc.c b/arch/m68k/platform/coldfire/intc.c index c28a6ed6cb23..0bbb414856eb 100644 --- a/arch/m68k/platform/coldfire/intc.c +++ b/arch/m68k/platform/coldfire/intc.c | |||
| @@ -37,7 +37,7 @@ unsigned char mcf_irq2imr[NR_IRQS]; | |||
| 37 | /* | 37 | /* |
| 38 | * In the early version 2 core ColdFire parts the IMR register was 16 bits | 38 | * In the early version 2 core ColdFire parts the IMR register was 16 bits |
| 39 | * in size. Version 3 (and later version 2) core parts have a 32 bit | 39 | * in size. Version 3 (and later version 2) core parts have a 32 bit |
| 40 | * sized IMR register. Provide some size independant methods to access the | 40 | * sized IMR register. Provide some size independent methods to access the |
| 41 | * IMR register. | 41 | * IMR register. |
| 42 | */ | 42 | */ |
| 43 | #ifdef MCFSIM_IMR_IS_16BITS | 43 | #ifdef MCFSIM_IMR_IS_16BITS |
diff --git a/arch/m68k/platform/coldfire/sltimers.c b/arch/m68k/platform/coldfire/sltimers.c index 0a1b937c3e18..6a85daf9a7fd 100644 --- a/arch/m68k/platform/coldfire/sltimers.c +++ b/arch/m68k/platform/coldfire/sltimers.c | |||
| @@ -106,7 +106,7 @@ static cycle_t mcfslt_read_clk(struct clocksource *cs) | |||
| 106 | cycles = mcfslt_cnt; | 106 | cycles = mcfslt_cnt; |
| 107 | local_irq_restore(flags); | 107 | local_irq_restore(flags); |
| 108 | 108 | ||
| 109 | /* substract because slice timers count down */ | 109 | /* subtract because slice timers count down */ |
| 110 | return cycles - scnt; | 110 | return cycles - scnt; |
| 111 | } | 111 | } |
| 112 | 112 | ||
diff --git a/arch/m68k/q40/README b/arch/m68k/q40/README index f877b7249790..b26d5f55e91d 100644 --- a/arch/m68k/q40/README +++ b/arch/m68k/q40/README | |||
| @@ -89,7 +89,7 @@ The main interrupt register IIRQ_REG will indicate whether an IRQ was internal | |||
| 89 | or from some ISA devices, EIRQ_REG can distinguish up to 8 ISA IRQs. | 89 | or from some ISA devices, EIRQ_REG can distinguish up to 8 ISA IRQs. |
| 90 | 90 | ||
| 91 | The Q40 custom chip is programmable to provide 2 periodic timers: | 91 | The Q40 custom chip is programmable to provide 2 periodic timers: |
| 92 | - 50 or 200 Hz - level 2, !!THIS CANT BE DISABLED!! | 92 | - 50 or 200 Hz - level 2, !!THIS CAN'T BE DISABLED!! |
| 93 | - 10 or 20 KHz - level 4, used for dma-sound | 93 | - 10 or 20 KHz - level 4, used for dma-sound |
| 94 | 94 | ||
| 95 | Linux uses the 200 Hz interrupt for timer and beep by default. | 95 | Linux uses the 200 Hz interrupt for timer and beep by default. |
diff --git a/arch/microblaze/Makefile b/arch/microblaze/Makefile index 6f432e6df9af..b23c40eb7a52 100644 --- a/arch/microblaze/Makefile +++ b/arch/microblaze/Makefile | |||
| @@ -18,7 +18,7 @@ export CPU_VER CPU_MAJOR CPU_MINOR CPU_REV | |||
| 18 | # rather than bools y/n | 18 | # rather than bools y/n |
| 19 | 19 | ||
| 20 | # Work out HW multipler support. This is tricky. | 20 | # Work out HW multipler support. This is tricky. |
| 21 | # 1. Spartan2 has no HW multiplers. | 21 | # 1. Spartan2 has no HW multipliers. |
| 22 | # 2. MicroBlaze v3.x always uses them, except in Spartan 2 | 22 | # 2. MicroBlaze v3.x always uses them, except in Spartan 2 |
| 23 | # 3. All other FPGa/CPU ver combos, we can trust the CONFIG_ settings | 23 | # 3. All other FPGa/CPU ver combos, we can trust the CONFIG_ settings |
| 24 | ifeq (,$(findstring spartan2,$(CONFIG_XILINX_MICROBLAZE0_FAMILY))) | 24 | ifeq (,$(findstring spartan2,$(CONFIG_XILINX_MICROBLAZE0_FAMILY))) |
diff --git a/arch/microblaze/include/asm/io.h b/arch/microblaze/include/asm/io.h index eae32220f447..8cdac14b55b0 100644 --- a/arch/microblaze/include/asm/io.h +++ b/arch/microblaze/include/asm/io.h | |||
| @@ -70,7 +70,7 @@ static inline void __raw_writeq(unsigned long v, volatile void __iomem *addr) | |||
| 70 | 70 | ||
| 71 | /* | 71 | /* |
| 72 | * read (readb, readw, readl, readq) and write (writeb, writew, | 72 | * read (readb, readw, readl, readq) and write (writeb, writew, |
| 73 | * writel, writeq) accessors are for PCI and thus littel endian. | 73 | * writel, writeq) accessors are for PCI and thus little endian. |
| 74 | * Linux 2.4 for Microblaze had this wrong. | 74 | * Linux 2.4 for Microblaze had this wrong. |
| 75 | */ | 75 | */ |
| 76 | static inline unsigned char readb(const volatile void __iomem *addr) | 76 | static inline unsigned char readb(const volatile void __iomem *addr) |
diff --git a/arch/microblaze/include/asm/pci-bridge.h b/arch/microblaze/include/asm/pci-bridge.h index 10717669e0c2..746df91e5796 100644 --- a/arch/microblaze/include/asm/pci-bridge.h +++ b/arch/microblaze/include/asm/pci-bridge.h | |||
| @@ -76,7 +76,7 @@ struct pci_controller { | |||
| 76 | * Used for variants of PCI indirect handling and possible quirks: | 76 | * Used for variants of PCI indirect handling and possible quirks: |
| 77 | * SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1 | 77 | * SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1 |
| 78 | * EXT_REG - provides access to PCI-e extended registers | 78 | * EXT_REG - provides access to PCI-e extended registers |
| 79 | * SURPRESS_PRIMARY_BUS - we surpress the setting of PCI_PRIMARY_BUS | 79 | * SURPRESS_PRIMARY_BUS - we suppress the setting of PCI_PRIMARY_BUS |
| 80 | * on Freescale PCI-e controllers since they used the PCI_PRIMARY_BUS | 80 | * on Freescale PCI-e controllers since they used the PCI_PRIMARY_BUS |
| 81 | * to determine which bus number to match on when generating type0 | 81 | * to determine which bus number to match on when generating type0 |
| 82 | * config cycles | 82 | * config cycles |
diff --git a/arch/microblaze/include/asm/pci.h b/arch/microblaze/include/asm/pci.h index 2232ff942ba9..ba65cf472544 100644 --- a/arch/microblaze/include/asm/pci.h +++ b/arch/microblaze/include/asm/pci.h | |||
| @@ -158,7 +158,7 @@ extern void pci_resource_to_user(const struct pci_dev *dev, int bar, | |||
| 158 | extern void pcibios_setup_bus_devices(struct pci_bus *bus); | 158 | extern void pcibios_setup_bus_devices(struct pci_bus *bus); |
| 159 | extern void pcibios_setup_bus_self(struct pci_bus *bus); | 159 | extern void pcibios_setup_bus_self(struct pci_bus *bus); |
| 160 | 160 | ||
| 161 | /* This part of code was originaly in xilinx-pci.h */ | 161 | /* This part of code was originally in xilinx-pci.h */ |
| 162 | #ifdef CONFIG_PCI_XILINX | 162 | #ifdef CONFIG_PCI_XILINX |
| 163 | extern void __init xilinx_pci_init(void); | 163 | extern void __init xilinx_pci_init(void); |
| 164 | #else | 164 | #else |
diff --git a/arch/microblaze/kernel/cpu/cache.c b/arch/microblaze/kernel/cpu/cache.c index cf0afd90a2c0..4b7d8a3f4aef 100644 --- a/arch/microblaze/kernel/cpu/cache.c +++ b/arch/microblaze/kernel/cpu/cache.c | |||
| @@ -129,7 +129,7 @@ do { \ | |||
| 129 | * to use for simple wdc or wic. | 129 | * to use for simple wdc or wic. |
| 130 | * | 130 | * |
| 131 | * start address is cache aligned | 131 | * start address is cache aligned |
| 132 | * end address is not aligned, if end is aligned then I have to substract | 132 | * end address is not aligned, if end is aligned then I have to subtract |
| 133 | * cacheline length because I can't flush/invalidate the next cacheline. | 133 | * cacheline length because I can't flush/invalidate the next cacheline. |
| 134 | * If is not, I align it because I will flush/invalidate whole line. | 134 | * If is not, I align it because I will flush/invalidate whole line. |
| 135 | */ | 135 | */ |
diff --git a/arch/microblaze/lib/memcpy.c b/arch/microblaze/lib/memcpy.c index cc495d7d99cc..52746e718dfa 100644 --- a/arch/microblaze/lib/memcpy.c +++ b/arch/microblaze/lib/memcpy.c | |||
| @@ -63,8 +63,8 @@ void *memcpy(void *v_dst, const void *v_src, __kernel_size_t c) | |||
| 63 | if (likely(c >= 4)) { | 63 | if (likely(c >= 4)) { |
| 64 | unsigned value, buf_hold; | 64 | unsigned value, buf_hold; |
| 65 | 65 | ||
| 66 | /* Align the dstination to a word boundry. */ | 66 | /* Align the destination to a word boundary. */ |
| 67 | /* This is done in an endian independant manner. */ | 67 | /* This is done in an endian independent manner. */ |
| 68 | switch ((unsigned long)dst & 3) { | 68 | switch ((unsigned long)dst & 3) { |
| 69 | case 1: | 69 | case 1: |
| 70 | *dst++ = *src++; | 70 | *dst++ = *src++; |
| @@ -80,7 +80,7 @@ void *memcpy(void *v_dst, const void *v_src, __kernel_size_t c) | |||
| 80 | i_dst = (void *)dst; | 80 | i_dst = (void *)dst; |
| 81 | 81 | ||
| 82 | /* Choose a copy scheme based on the source */ | 82 | /* Choose a copy scheme based on the source */ |
| 83 | /* alignment relative to dstination. */ | 83 | /* alignment relative to destination. */ |
| 84 | switch ((unsigned long)src & 3) { | 84 | switch ((unsigned long)src & 3) { |
| 85 | case 0x0: /* Both byte offsets are aligned */ | 85 | case 0x0: /* Both byte offsets are aligned */ |
| 86 | i_src = (const void *)src; | 86 | i_src = (const void *)src; |
| @@ -173,7 +173,7 @@ void *memcpy(void *v_dst, const void *v_src, __kernel_size_t c) | |||
| 173 | } | 173 | } |
| 174 | 174 | ||
| 175 | /* Finish off any remaining bytes */ | 175 | /* Finish off any remaining bytes */ |
| 176 | /* simple fast copy, ... unless a cache boundry is crossed */ | 176 | /* simple fast copy, ... unless a cache boundary is crossed */ |
| 177 | switch (c) { | 177 | switch (c) { |
| 178 | case 3: | 178 | case 3: |
| 179 | *dst++ = *src++; | 179 | *dst++ = *src++; |
diff --git a/arch/microblaze/lib/memmove.c b/arch/microblaze/lib/memmove.c index 810fd68775e3..2146c3752a80 100644 --- a/arch/microblaze/lib/memmove.c +++ b/arch/microblaze/lib/memmove.c | |||
| @@ -83,8 +83,8 @@ void *memmove(void *v_dst, const void *v_src, __kernel_size_t c) | |||
| 83 | if (c >= 4) { | 83 | if (c >= 4) { |
| 84 | unsigned value, buf_hold; | 84 | unsigned value, buf_hold; |
| 85 | 85 | ||
| 86 | /* Align the destination to a word boundry. */ | 86 | /* Align the destination to a word boundary. */ |
| 87 | /* This is done in an endian independant manner. */ | 87 | /* This is done in an endian independent manner. */ |
| 88 | 88 | ||
| 89 | switch ((unsigned long)dst & 3) { | 89 | switch ((unsigned long)dst & 3) { |
| 90 | case 3: | 90 | case 3: |
| @@ -193,7 +193,7 @@ void *memmove(void *v_dst, const void *v_src, __kernel_size_t c) | |||
| 193 | dst = (void *)i_dst; | 193 | dst = (void *)i_dst; |
| 194 | } | 194 | } |
| 195 | 195 | ||
| 196 | /* simple fast copy, ... unless a cache boundry is crossed */ | 196 | /* simple fast copy, ... unless a cache boundary is crossed */ |
| 197 | /* Finish off any remaining bytes */ | 197 | /* Finish off any remaining bytes */ |
| 198 | switch (c) { | 198 | switch (c) { |
| 199 | case 4: | 199 | case 4: |
diff --git a/arch/microblaze/lib/memset.c b/arch/microblaze/lib/memset.c index 834565d1607e..ddf67939576d 100644 --- a/arch/microblaze/lib/memset.c +++ b/arch/microblaze/lib/memset.c | |||
| @@ -64,7 +64,7 @@ void *memset(void *v_src, int c, __kernel_size_t n) | |||
| 64 | 64 | ||
| 65 | if (likely(n >= 4)) { | 65 | if (likely(n >= 4)) { |
| 66 | /* Align the destination to a word boundary */ | 66 | /* Align the destination to a word boundary */ |
| 67 | /* This is done in an endian independant manner */ | 67 | /* This is done in an endian independent manner */ |
| 68 | switch ((unsigned) src & 3) { | 68 | switch ((unsigned) src & 3) { |
| 69 | case 1: | 69 | case 1: |
| 70 | *src++ = c; | 70 | *src++ = c; |
diff --git a/arch/microblaze/pci/indirect_pci.c b/arch/microblaze/pci/indirect_pci.c index 25f18f017f21..4196eb6bd764 100644 --- a/arch/microblaze/pci/indirect_pci.c +++ b/arch/microblaze/pci/indirect_pci.c | |||
| @@ -108,7 +108,7 @@ indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset, | |||
| 108 | out_le32(hose->cfg_addr, (0x80000000 | (bus_no << 16) | | 108 | out_le32(hose->cfg_addr, (0x80000000 | (bus_no << 16) | |
| 109 | (devfn << 8) | reg | cfg_type)); | 109 | (devfn << 8) | reg | cfg_type)); |
| 110 | 110 | ||
| 111 | /* surpress setting of PCI_PRIMARY_BUS */ | 111 | /* suppress setting of PCI_PRIMARY_BUS */ |
| 112 | if (hose->indirect_type & INDIRECT_TYPE_SURPRESS_PRIMARY_BUS) | 112 | if (hose->indirect_type & INDIRECT_TYPE_SURPRESS_PRIMARY_BUS) |
| 113 | if ((offset == PCI_PRIMARY_BUS) && | 113 | if ((offset == PCI_PRIMARY_BUS) && |
| 114 | (bus->number == hose->first_busno)) | 114 | (bus->number == hose->first_busno)) |
diff --git a/arch/microblaze/platform/generic/Kconfig.auto b/arch/microblaze/platform/generic/Kconfig.auto index 5d86fc19029d..25a6f019e94d 100644 --- a/arch/microblaze/platform/generic/Kconfig.auto +++ b/arch/microblaze/platform/generic/Kconfig.auto | |||
| @@ -29,7 +29,7 @@ config KERNEL_BASE_ADDR | |||
| 29 | BASE Address for kernel | 29 | BASE Address for kernel |
| 30 | 30 | ||
| 31 | config XILINX_MICROBLAZE0_FAMILY | 31 | config XILINX_MICROBLAZE0_FAMILY |
| 32 | string "Targetted FPGA family" | 32 | string "Targeted FPGA family" |
| 33 | default "virtex5" | 33 | default "virtex5" |
| 34 | 34 | ||
| 35 | config XILINX_MICROBLAZE0_USE_MSR_INSTR | 35 | config XILINX_MICROBLAZE0_USE_MSR_INSTR |
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 83aa5fb8e8f1..8e256cc5dcd9 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig | |||
| @@ -1135,7 +1135,7 @@ config CPU_LOONGSON2E | |||
| 1135 | The Loongson 2E processor implements the MIPS III instruction set | 1135 | The Loongson 2E processor implements the MIPS III instruction set |
| 1136 | with many extensions. | 1136 | with many extensions. |
| 1137 | 1137 | ||
| 1138 | It has an internal FPGA northbridge, which is compatiable to | 1138 | It has an internal FPGA northbridge, which is compatible to |
| 1139 | bonito64. | 1139 | bonito64. |
| 1140 | 1140 | ||
| 1141 | config CPU_LOONGSON2F | 1141 | config CPU_LOONGSON2F |
diff --git a/arch/mips/Makefile b/arch/mips/Makefile index ac1d5b611a27..53e3514ba10e 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile | |||
| @@ -101,7 +101,7 @@ cflags-y += -ffreestanding | |||
| 101 | # carefully avoid to add it redundantly because gcc 3.3/3.4 complains | 101 | # carefully avoid to add it redundantly because gcc 3.3/3.4 complains |
| 102 | # when fed the toolchain default! | 102 | # when fed the toolchain default! |
| 103 | # | 103 | # |
| 104 | # Certain gcc versions upto gcc 4.1.1 (probably 4.2-subversion as of | 104 | # Certain gcc versions up to gcc 4.1.1 (probably 4.2-subversion as of |
| 105 | # 2006-10-10 don't properly change the predefined symbols if -EB / -EL | 105 | # 2006-10-10 don't properly change the predefined symbols if -EB / -EL |
| 106 | # are used, so we kludge that here. A bug has been filed at | 106 | # are used, so we kludge that here. A bug has been filed at |
| 107 | # http://gcc.gnu.org/bugzilla/show_bug.cgi?id=29413. | 107 | # http://gcc.gnu.org/bugzilla/show_bug.cgi?id=29413. |
| @@ -314,5 +314,5 @@ define archhelp | |||
| 314 | echo ' vmlinuz.bin - Raw binary zboot image' | 314 | echo ' vmlinuz.bin - Raw binary zboot image' |
| 315 | echo ' vmlinuz.srec - SREC zboot image' | 315 | echo ' vmlinuz.srec - SREC zboot image' |
| 316 | echo | 316 | echo |
| 317 | echo ' These will be default as apropriate for a configured platform.' | 317 | echo ' These will be default as appropriate for a configured platform.' |
| 318 | endef | 318 | endef |
diff --git a/arch/mips/alchemy/common/clocks.c b/arch/mips/alchemy/common/clocks.c index af0fe41055af..f38298a8b98c 100644 --- a/arch/mips/alchemy/common/clocks.c +++ b/arch/mips/alchemy/common/clocks.c | |||
| @@ -75,7 +75,7 @@ void set_au1x00_uart_baud_base(unsigned long new_baud_base) | |||
| 75 | * counter, if it exists. If we don't have an accurate processor | 75 | * counter, if it exists. If we don't have an accurate processor |
| 76 | * speed, all of the peripherals that derive their clocks based on | 76 | * speed, all of the peripherals that derive their clocks based on |
| 77 | * this advertised speed will introduce error and sometimes not work | 77 | * this advertised speed will introduce error and sometimes not work |
| 78 | * properly. This function is futher convoluted to still allow configurations | 78 | * properly. This function is further convoluted to still allow configurations |
| 79 | * to do that in case they have really, really old silicon with a | 79 | * to do that in case they have really, really old silicon with a |
| 80 | * write-only PLL register. -- Dan | 80 | * write-only PLL register. -- Dan |
| 81 | */ | 81 | */ |
diff --git a/arch/mips/cavium-octeon/executive/octeon-model.c b/arch/mips/cavium-octeon/executive/octeon-model.c index 9afc3794ed1b..c8d35684504e 100644 --- a/arch/mips/cavium-octeon/executive/octeon-model.c +++ b/arch/mips/cavium-octeon/executive/octeon-model.c | |||
| @@ -75,7 +75,7 @@ const char *octeon_model_get_string_buffer(uint32_t chip_id, char *buffer) | |||
| 75 | 75 | ||
| 76 | num_cores = cvmx_octeon_num_cores(); | 76 | num_cores = cvmx_octeon_num_cores(); |
| 77 | 77 | ||
| 78 | /* Make sure the non existant devices look disabled */ | 78 | /* Make sure the non existent devices look disabled */ |
| 79 | switch ((chip_id >> 8) & 0xff) { | 79 | switch ((chip_id >> 8) & 0xff) { |
| 80 | case 6: /* CN50XX */ | 80 | case 6: /* CN50XX */ |
| 81 | case 2: /* CN30XX */ | 81 | case 2: /* CN30XX */ |
diff --git a/arch/mips/cavium-octeon/octeon-platform.c b/arch/mips/cavium-octeon/octeon-platform.c index cecaf62aef32..cd61d7281d91 100644 --- a/arch/mips/cavium-octeon/octeon-platform.c +++ b/arch/mips/cavium-octeon/octeon-platform.c | |||
| @@ -75,7 +75,7 @@ static int __init octeon_cf_device_init(void) | |||
| 75 | * zero. | 75 | * zero. |
| 76 | */ | 76 | */ |
| 77 | 77 | ||
| 78 | /* Asume that CS1 immediately follows. */ | 78 | /* Assume that CS1 immediately follows. */ |
| 79 | mio_boot_reg_cfg.u64 = | 79 | mio_boot_reg_cfg.u64 = |
| 80 | cvmx_read_csr(CVMX_MIO_BOOT_REG_CFGX(i + 1)); | 80 | cvmx_read_csr(CVMX_MIO_BOOT_REG_CFGX(i + 1)); |
| 81 | region_base = mio_boot_reg_cfg.s.base << 16; | 81 | region_base = mio_boot_reg_cfg.s.base << 16; |
diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c index 8b139bf4a1b5..0707fae3f0ee 100644 --- a/arch/mips/cavium-octeon/setup.c +++ b/arch/mips/cavium-octeon/setup.c | |||
| @@ -662,7 +662,7 @@ void __init plat_mem_setup(void) | |||
| 662 | * some memory vectors. When SPARSEMEM is in use, it doesn't | 662 | * some memory vectors. When SPARSEMEM is in use, it doesn't |
| 663 | * verify that the size is big enough for the final | 663 | * verify that the size is big enough for the final |
| 664 | * vectors. Making the smallest chuck 4MB seems to be enough | 664 | * vectors. Making the smallest chuck 4MB seems to be enough |
| 665 | * to consistantly work. | 665 | * to consistently work. |
| 666 | */ | 666 | */ |
| 667 | mem_alloc_size = 4 << 20; | 667 | mem_alloc_size = 4 << 20; |
| 668 | if (mem_alloc_size > MAX_MEMORY) | 668 | if (mem_alloc_size > MAX_MEMORY) |
diff --git a/arch/mips/fw/arc/promlib.c b/arch/mips/fw/arc/promlib.c index c508c00dbb64..b7f9dd3c93c6 100644 --- a/arch/mips/fw/arc/promlib.c +++ b/arch/mips/fw/arc/promlib.c | |||
| @@ -4,7 +4,7 @@ | |||
| 4 | * for more details. | 4 | * for more details. |
| 5 | * | 5 | * |
| 6 | * Copyright (C) 1996 David S. Miller (dm@sgi.com) | 6 | * Copyright (C) 1996 David S. Miller (dm@sgi.com) |
| 7 | * Compability with board caches, Ulf Carlsson | 7 | * Compatibility with board caches, Ulf Carlsson |
| 8 | */ | 8 | */ |
| 9 | #include <linux/kernel.h> | 9 | #include <linux/kernel.h> |
| 10 | #include <asm/sgialib.h> | 10 | #include <asm/sgialib.h> |
diff --git a/arch/mips/include/asm/dec/prom.h b/arch/mips/include/asm/dec/prom.h index b9c8203688d5..c0ead6313845 100644 --- a/arch/mips/include/asm/dec/prom.h +++ b/arch/mips/include/asm/dec/prom.h | |||
| @@ -108,7 +108,7 @@ extern int (*__pmax_close)(int); | |||
| 108 | 108 | ||
| 109 | /* | 109 | /* |
| 110 | * On MIPS64 we have to call PROM functions via a helper | 110 | * On MIPS64 we have to call PROM functions via a helper |
| 111 | * dispatcher to accomodate ABI incompatibilities. | 111 | * dispatcher to accommodate ABI incompatibilities. |
| 112 | */ | 112 | */ |
| 113 | #define __DEC_PROM_O32(fun, arg) fun arg __asm__(#fun); \ | 113 | #define __DEC_PROM_O32(fun, arg) fun arg __asm__(#fun); \ |
| 114 | __asm__(#fun " = call_o32") | 114 | __asm__(#fun " = call_o32") |
diff --git a/arch/mips/include/asm/floppy.h b/arch/mips/include/asm/floppy.h index 992d232adc83..c5c7c0e6064c 100644 --- a/arch/mips/include/asm/floppy.h +++ b/arch/mips/include/asm/floppy.h | |||
| @@ -24,7 +24,7 @@ static inline void fd_cacheflush(char * addr, long size) | |||
| 24 | * And on Mips's the CMOS info fails also ... | 24 | * And on Mips's the CMOS info fails also ... |
| 25 | * | 25 | * |
| 26 | * FIXME: This information should come from the ARC configuration tree | 26 | * FIXME: This information should come from the ARC configuration tree |
| 27 | * or whereever a particular machine has stored this ... | 27 | * or wherever a particular machine has stored this ... |
| 28 | */ | 28 | */ |
| 29 | #define FLOPPY0_TYPE fd_drive_type(0) | 29 | #define FLOPPY0_TYPE fd_drive_type(0) |
| 30 | #define FLOPPY1_TYPE fd_drive_type(1) | 30 | #define FLOPPY1_TYPE fd_drive_type(1) |
diff --git a/arch/mips/include/asm/hw_irq.h b/arch/mips/include/asm/hw_irq.h index aca05a43a97b..77adda297ad9 100644 --- a/arch/mips/include/asm/hw_irq.h +++ b/arch/mips/include/asm/hw_irq.h | |||
| @@ -13,7 +13,7 @@ | |||
| 13 | extern atomic_t irq_err_count; | 13 | extern atomic_t irq_err_count; |
| 14 | 14 | ||
| 15 | /* | 15 | /* |
| 16 | * interrupt-retrigger: NOP for now. This may not be apropriate for all | 16 | * interrupt-retrigger: NOP for now. This may not be appropriate for all |
| 17 | * machines, we'll see ... | 17 | * machines, we'll see ... |
| 18 | */ | 18 | */ |
| 19 | 19 | ||
diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h index 5b017f23e243..b04e4de5dd2e 100644 --- a/arch/mips/include/asm/io.h +++ b/arch/mips/include/asm/io.h | |||
| @@ -242,7 +242,7 @@ static inline void __iomem * __ioremap_mode(phys_t offset, unsigned long size, | |||
| 242 | * This version of ioremap ensures that the memory is marked uncachable | 242 | * This version of ioremap ensures that the memory is marked uncachable |
| 243 | * on the CPU as well as honouring existing caching rules from things like | 243 | * on the CPU as well as honouring existing caching rules from things like |
| 244 | * the PCI bus. Note that there are other caches and buffers on many | 244 | * the PCI bus. Note that there are other caches and buffers on many |
| 245 | * busses. In paticular driver authors should read up on PCI writes | 245 | * busses. In particular driver authors should read up on PCI writes |
| 246 | * | 246 | * |
| 247 | * It's useful if some control registers are in such an area and | 247 | * It's useful if some control registers are in such an area and |
| 248 | * write combining or read caching is not desirable: | 248 | * write combining or read caching is not desirable: |
diff --git a/arch/mips/include/asm/irqflags.h b/arch/mips/include/asm/irqflags.h index 9ef3b0d17896..309cbcd6909c 100644 --- a/arch/mips/include/asm/irqflags.h +++ b/arch/mips/include/asm/irqflags.h | |||
| @@ -174,7 +174,7 @@ __asm__( | |||
| 174 | "mtc0 \\flags, $2, 1 \n" | 174 | "mtc0 \\flags, $2, 1 \n" |
| 175 | #elif defined(CONFIG_CPU_MIPSR2) && defined(CONFIG_IRQ_CPU) | 175 | #elif defined(CONFIG_CPU_MIPSR2) && defined(CONFIG_IRQ_CPU) |
| 176 | /* | 176 | /* |
| 177 | * Slow, but doesn't suffer from a relativly unlikely race | 177 | * Slow, but doesn't suffer from a relatively unlikely race |
| 178 | * condition we're having since days 1. | 178 | * condition we're having since days 1. |
| 179 | */ | 179 | */ |
| 180 | " beqz \\flags, 1f \n" | 180 | " beqz \\flags, 1f \n" |
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm963xx_tag.h b/arch/mips/include/asm/mach-bcm63xx/bcm963xx_tag.h index 5325084d5c48..32978d32561a 100644 --- a/arch/mips/include/asm/mach-bcm63xx/bcm963xx_tag.h +++ b/arch/mips/include/asm/mach-bcm63xx/bcm963xx_tag.h | |||
| @@ -4,7 +4,7 @@ | |||
| 4 | #define TAGVER_LEN 4 /* Length of Tag Version */ | 4 | #define TAGVER_LEN 4 /* Length of Tag Version */ |
| 5 | #define TAGLAYOUT_LEN 4 /* Length of FlashLayoutVer */ | 5 | #define TAGLAYOUT_LEN 4 /* Length of FlashLayoutVer */ |
| 6 | #define SIG1_LEN 20 /* Company Signature 1 Length */ | 6 | #define SIG1_LEN 20 /* Company Signature 1 Length */ |
| 7 | #define SIG2_LEN 14 /* Company Signature 2 Lenght */ | 7 | #define SIG2_LEN 14 /* Company Signature 2 Length */ |
| 8 | #define BOARDID_LEN 16 /* Length of BoardId */ | 8 | #define BOARDID_LEN 16 /* Length of BoardId */ |
| 9 | #define ENDIANFLAG_LEN 2 /* Endian Flag Length */ | 9 | #define ENDIANFLAG_LEN 2 /* Endian Flag Length */ |
| 10 | #define CHIPID_LEN 6 /* Chip Id Length */ | 10 | #define CHIPID_LEN 6 /* Chip Id Length */ |
diff --git a/arch/mips/include/asm/mach-ip32/mc146818rtc.h b/arch/mips/include/asm/mach-ip32/mc146818rtc.h index c28ba8d84076..6b6bab43d5c1 100644 --- a/arch/mips/include/asm/mach-ip32/mc146818rtc.h +++ b/arch/mips/include/asm/mach-ip32/mc146818rtc.h | |||
| @@ -26,7 +26,7 @@ static inline void CMOS_WRITE(unsigned char data, unsigned long addr) | |||
| 26 | } | 26 | } |
| 27 | 27 | ||
| 28 | /* | 28 | /* |
| 29 | * FIXME: Do it right. For now just assume that noone lives in 20th century | 29 | * FIXME: Do it right. For now just assume that no one lives in 20th century |
| 30 | * and no O2 user in 22th century ;-) | 30 | * and no O2 user in 22th century ;-) |
| 31 | */ | 31 | */ |
| 32 | #define mc146818_decode_year(year) ((year) + 2000) | 32 | #define mc146818_decode_year(year) ((year) + 2000) |
diff --git a/arch/mips/include/asm/mach-loongson/cs5536/cs5536.h b/arch/mips/include/asm/mach-loongson/cs5536/cs5536.h index 021f77ca59ec..2a8e2bb5d539 100644 --- a/arch/mips/include/asm/mach-loongson/cs5536/cs5536.h +++ b/arch/mips/include/asm/mach-loongson/cs5536/cs5536.h | |||
| @@ -1,5 +1,5 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * The header file of cs5536 sourth bridge. | 2 | * The header file of cs5536 south bridge. |
| 3 | * | 3 | * |
| 4 | * Copyright (C) 2007 Lemote, Inc. | 4 | * Copyright (C) 2007 Lemote, Inc. |
| 5 | * Author : jlliu <liujl@lemote.com> | 5 | * Author : jlliu <liujl@lemote.com> |
diff --git a/arch/mips/include/asm/mach-pb1x00/pb1000.h b/arch/mips/include/asm/mach-pb1x00/pb1000.h index 6d1ff9060e44..65059255dc1e 100644 --- a/arch/mips/include/asm/mach-pb1x00/pb1000.h +++ b/arch/mips/include/asm/mach-pb1x00/pb1000.h | |||
| @@ -1,5 +1,5 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Alchemy Semi Pb1000 Referrence Board | 2 | * Alchemy Semi Pb1000 Reference Board |
| 3 | * | 3 | * |
| 4 | * Copyright 2001, 2008 MontaVista Software Inc. | 4 | * Copyright 2001, 2008 MontaVista Software Inc. |
| 5 | * Author: MontaVista Software, Inc. <source@mvista.com> | 5 | * Author: MontaVista Software, Inc. <source@mvista.com> |
diff --git a/arch/mips/include/asm/mach-pb1x00/pb1200.h b/arch/mips/include/asm/mach-pb1x00/pb1200.h index 962eb55dc880..fce4332ebb7f 100644 --- a/arch/mips/include/asm/mach-pb1x00/pb1200.h +++ b/arch/mips/include/asm/mach-pb1x00/pb1200.h | |||
| @@ -1,5 +1,5 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * AMD Alchemy Pb1200 Referrence Board | 2 | * AMD Alchemy Pb1200 Reference Board |
| 3 | * Board Registers defines. | 3 | * Board Registers defines. |
| 4 | * | 4 | * |
| 5 | * ######################################################################## | 5 | * ######################################################################## |
diff --git a/arch/mips/include/asm/mach-pb1x00/pb1550.h b/arch/mips/include/asm/mach-pb1x00/pb1550.h index fc4d766641ce..f835c88e9593 100644 --- a/arch/mips/include/asm/mach-pb1x00/pb1550.h +++ b/arch/mips/include/asm/mach-pb1x00/pb1550.h | |||
| @@ -1,5 +1,5 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * AMD Alchemy Semi PB1550 Referrence Board | 2 | * AMD Alchemy Semi PB1550 Reference Board |
| 3 | * Board Registers defines. | 3 | * Board Registers defines. |
| 4 | * | 4 | * |
| 5 | * Copyright 2004 Embedded Edge LLC. | 5 | * Copyright 2004 Embedded Edge LLC. |
diff --git a/arch/mips/include/asm/mach-powertv/dma-coherence.h b/arch/mips/include/asm/mach-powertv/dma-coherence.h index f76029c2406e..a8e72cf12142 100644 --- a/arch/mips/include/asm/mach-powertv/dma-coherence.h +++ b/arch/mips/include/asm/mach-powertv/dma-coherence.h | |||
| @@ -48,7 +48,7 @@ static inline unsigned long virt_to_phys_from_pte(void *addr) | |||
| 48 | /* check for a valid page */ | 48 | /* check for a valid page */ |
| 49 | if (pte_present(pte)) { | 49 | if (pte_present(pte)) { |
| 50 | /* get the physical address the page is | 50 | /* get the physical address the page is |
| 51 | * refering to */ | 51 | * referring to */ |
| 52 | phys_addr = (unsigned long) | 52 | phys_addr = (unsigned long) |
| 53 | page_to_phys(pte_page(pte)); | 53 | page_to_phys(pte_page(pte)); |
| 54 | /* add the offset within the page */ | 54 | /* add the offset within the page */ |
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h index 4d9870975382..6a6f8a8f542d 100644 --- a/arch/mips/include/asm/mipsregs.h +++ b/arch/mips/include/asm/mipsregs.h | |||
| @@ -922,7 +922,7 @@ do { \ | |||
| 922 | #define write_c0_config7(val) __write_32bit_c0_register($16, 7, val) | 922 | #define write_c0_config7(val) __write_32bit_c0_register($16, 7, val) |
| 923 | 923 | ||
| 924 | /* | 924 | /* |
| 925 | * The WatchLo register. There may be upto 8 of them. | 925 | * The WatchLo register. There may be up to 8 of them. |
| 926 | */ | 926 | */ |
| 927 | #define read_c0_watchlo0() __read_ulong_c0_register($18, 0) | 927 | #define read_c0_watchlo0() __read_ulong_c0_register($18, 0) |
| 928 | #define read_c0_watchlo1() __read_ulong_c0_register($18, 1) | 928 | #define read_c0_watchlo1() __read_ulong_c0_register($18, 1) |
| @@ -942,7 +942,7 @@ do { \ | |||
| 942 | #define write_c0_watchlo7(val) __write_ulong_c0_register($18, 7, val) | 942 | #define write_c0_watchlo7(val) __write_ulong_c0_register($18, 7, val) |
| 943 | 943 | ||
| 944 | /* | 944 | /* |
| 945 | * The WatchHi register. There may be upto 8 of them. | 945 | * The WatchHi register. There may be up to 8 of them. |
| 946 | */ | 946 | */ |
| 947 | #define read_c0_watchhi0() __read_32bit_c0_register($19, 0) | 947 | #define read_c0_watchhi0() __read_32bit_c0_register($19, 0) |
| 948 | #define read_c0_watchhi1() __read_32bit_c0_register($19, 1) | 948 | #define read_c0_watchhi1() __read_32bit_c0_register($19, 1) |
diff --git a/arch/mips/include/asm/octeon/cvmx-bootinfo.h b/arch/mips/include/asm/octeon/cvmx-bootinfo.h index f3c23a43f845..4e4c3a8282d6 100644 --- a/arch/mips/include/asm/octeon/cvmx-bootinfo.h +++ b/arch/mips/include/asm/octeon/cvmx-bootinfo.h | |||
| @@ -200,7 +200,7 @@ enum cvmx_chip_types_enum { | |||
| 200 | CVMX_CHIP_TYPE_MAX, | 200 | CVMX_CHIP_TYPE_MAX, |
| 201 | }; | 201 | }; |
| 202 | 202 | ||
| 203 | /* Compatability alias for NAC38 name change, planned to be removed | 203 | /* Compatibility alias for NAC38 name change, planned to be removed |
| 204 | * from SDK 1.7 */ | 204 | * from SDK 1.7 */ |
| 205 | #define CVMX_BOARD_TYPE_NAO38 CVMX_BOARD_TYPE_NAC38 | 205 | #define CVMX_BOARD_TYPE_NAO38 CVMX_BOARD_TYPE_NAC38 |
| 206 | 206 | ||
diff --git a/arch/mips/include/asm/octeon/cvmx-bootmem.h b/arch/mips/include/asm/octeon/cvmx-bootmem.h index 8e708bdb43f7..877845b84b14 100644 --- a/arch/mips/include/asm/octeon/cvmx-bootmem.h +++ b/arch/mips/include/asm/octeon/cvmx-bootmem.h | |||
| @@ -67,7 +67,7 @@ struct cvmx_bootmem_block_header { | |||
| 67 | 67 | ||
| 68 | /* | 68 | /* |
| 69 | * Structure for named memory blocks. Number of descriptors available | 69 | * Structure for named memory blocks. Number of descriptors available |
| 70 | * can be changed without affecting compatiblity, but name length | 70 | * can be changed without affecting compatibility, but name length |
| 71 | * changes require a bump in the bootmem descriptor version Note: This | 71 | * changes require a bump in the bootmem descriptor version Note: This |
| 72 | * structure must be naturally 64 bit aligned, as a single memory | 72 | * structure must be naturally 64 bit aligned, as a single memory |
| 73 | * image will be used by both 32 and 64 bit programs. | 73 | * image will be used by both 32 and 64 bit programs. |
diff --git a/arch/mips/include/asm/octeon/cvmx-l2c.h b/arch/mips/include/asm/octeon/cvmx-l2c.h index 0b32c5b118e2..2c8ff9e33ec3 100644 --- a/arch/mips/include/asm/octeon/cvmx-l2c.h +++ b/arch/mips/include/asm/octeon/cvmx-l2c.h | |||
| @@ -157,7 +157,7 @@ enum cvmx_l2c_tad_event { | |||
| 157 | 157 | ||
| 158 | /** | 158 | /** |
| 159 | * Configure one of the four L2 Cache performance counters to capture event | 159 | * Configure one of the four L2 Cache performance counters to capture event |
| 160 | * occurences. | 160 | * occurrences. |
| 161 | * | 161 | * |
| 162 | * @counter: The counter to configure. Range 0..3. | 162 | * @counter: The counter to configure. Range 0..3. |
| 163 | * @event: The type of L2 Cache event occurrence to count. | 163 | * @event: The type of L2 Cache event occurrence to count. |
diff --git a/arch/mips/include/asm/octeon/cvmx.h b/arch/mips/include/asm/octeon/cvmx.h index 9d9381e2e3d8..7e1286706d46 100644 --- a/arch/mips/include/asm/octeon/cvmx.h +++ b/arch/mips/include/asm/octeon/cvmx.h | |||
| @@ -151,7 +151,7 @@ enum cvmx_mips_space { | |||
| 151 | #endif | 151 | #endif |
| 152 | 152 | ||
| 153 | /** | 153 | /** |
| 154 | * Convert a memory pointer (void*) into a hardware compatable | 154 | * Convert a memory pointer (void*) into a hardware compatible |
| 155 | * memory address (uint64_t). Octeon hardware widgets don't | 155 | * memory address (uint64_t). Octeon hardware widgets don't |
| 156 | * understand logical addresses. | 156 | * understand logical addresses. |
| 157 | * | 157 | * |
diff --git a/arch/mips/include/asm/paccess.h b/arch/mips/include/asm/paccess.h index c2394f8b0fe1..9ce5a1e7e14c 100644 --- a/arch/mips/include/asm/paccess.h +++ b/arch/mips/include/asm/paccess.h | |||
| @@ -7,7 +7,7 @@ | |||
| 7 | * Copyright (C) 1999, 2000 Silicon Graphics, Inc. | 7 | * Copyright (C) 1999, 2000 Silicon Graphics, Inc. |
| 8 | * | 8 | * |
| 9 | * Protected memory access. Used for everything that might take revenge | 9 | * Protected memory access. Used for everything that might take revenge |
| 10 | * by sending a DBE error like accessing possibly non-existant memory or | 10 | * by sending a DBE error like accessing possibly non-existent memory or |
| 11 | * devices. | 11 | * devices. |
| 12 | */ | 12 | */ |
| 13 | #ifndef _ASM_PACCESS_H | 13 | #ifndef _ASM_PACCESS_H |
diff --git a/arch/mips/include/asm/pci/bridge.h b/arch/mips/include/asm/pci/bridge.h index f1f508e4f971..be44fb0266da 100644 --- a/arch/mips/include/asm/pci/bridge.h +++ b/arch/mips/include/asm/pci/bridge.h | |||
| @@ -262,7 +262,7 @@ typedef volatile struct bridge_s { | |||
| 262 | } bridge_t; | 262 | } bridge_t; |
| 263 | 263 | ||
| 264 | /* | 264 | /* |
| 265 | * Field formats for Error Command Word and Auxillary Error Command Word | 265 | * Field formats for Error Command Word and Auxiliary Error Command Word |
| 266 | * of bridge. | 266 | * of bridge. |
| 267 | */ | 267 | */ |
| 268 | typedef struct bridge_err_cmdword_s { | 268 | typedef struct bridge_err_cmdword_s { |
diff --git a/arch/mips/include/asm/pmc-sierra/msp71xx/msp_regops.h b/arch/mips/include/asm/pmc-sierra/msp71xx/msp_regops.h index 60a5a38dd5b2..7d41474e5488 100644 --- a/arch/mips/include/asm/pmc-sierra/msp71xx/msp_regops.h +++ b/arch/mips/include/asm/pmc-sierra/msp71xx/msp_regops.h | |||
| @@ -205,7 +205,7 @@ static inline u32 blocking_read_reg32(volatile u32 *const addr) | |||
| 205 | * custom_read_reg32(address, tmp); <-- Reads the address and put the value | 205 | * custom_read_reg32(address, tmp); <-- Reads the address and put the value |
| 206 | * in the 'tmp' variable given | 206 | * in the 'tmp' variable given |
| 207 | * | 207 | * |
| 208 | * From here on out, you are (basicly) atomic, so don't do anything too | 208 | * From here on out, you are (basically) atomic, so don't do anything too |
| 209 | * fancy! | 209 | * fancy! |
| 210 | * Also, this code may loop if the end of this block fails to write | 210 | * Also, this code may loop if the end of this block fails to write |
| 211 | * everything back safely due do the other CPU, so do NOT do anything | 211 | * everything back safely due do the other CPU, so do NOT do anything |
diff --git a/arch/mips/include/asm/processor.h b/arch/mips/include/asm/processor.h index ead6928fa6b8..c104f1039a69 100644 --- a/arch/mips/include/asm/processor.h +++ b/arch/mips/include/asm/processor.h | |||
| @@ -337,7 +337,7 @@ unsigned long get_wchan(struct task_struct *p); | |||
| 337 | /* | 337 | /* |
| 338 | * Return_address is a replacement for __builtin_return_address(count) | 338 | * Return_address is a replacement for __builtin_return_address(count) |
| 339 | * which on certain architectures cannot reasonably be implemented in GCC | 339 | * which on certain architectures cannot reasonably be implemented in GCC |
| 340 | * (MIPS, Alpha) or is unuseable with -fomit-frame-pointer (i386). | 340 | * (MIPS, Alpha) or is unusable with -fomit-frame-pointer (i386). |
| 341 | * Note that __builtin_return_address(x>=1) is forbidden because GCC | 341 | * Note that __builtin_return_address(x>=1) is forbidden because GCC |
| 342 | * aborts compilation on some CPUs. It's simply not possible to unwind | 342 | * aborts compilation on some CPUs. It's simply not possible to unwind |
| 343 | * some CPU's stackframes. | 343 | * some CPU's stackframes. |
diff --git a/arch/mips/include/asm/sgi/ioc.h b/arch/mips/include/asm/sgi/ioc.h index 57a971904cfe..380347b648e2 100644 --- a/arch/mips/include/asm/sgi/ioc.h +++ b/arch/mips/include/asm/sgi/ioc.h | |||
| @@ -17,7 +17,7 @@ | |||
| 17 | #include <asm/sgi/pi1.h> | 17 | #include <asm/sgi/pi1.h> |
| 18 | 18 | ||
| 19 | /* | 19 | /* |
| 20 | * All registers are 8-bit wide alligned on 32-bit boundary. Bad things | 20 | * All registers are 8-bit wide aligned on 32-bit boundary. Bad things |
| 21 | * happen if you try word access them. You have been warned. | 21 | * happen if you try word access them. You have been warned. |
| 22 | */ | 22 | */ |
| 23 | 23 | ||
diff --git a/arch/mips/include/asm/sibyte/sb1250_mac.h b/arch/mips/include/asm/sibyte/sb1250_mac.h index 591b9061fd8e..77f787284235 100644 --- a/arch/mips/include/asm/sibyte/sb1250_mac.h +++ b/arch/mips/include/asm/sibyte/sb1250_mac.h | |||
| @@ -520,7 +520,7 @@ | |||
| 520 | #define G_MAC_RX_EOP_COUNTER(x) _SB_GETVALUE(x, S_MAC_RX_EOP_COUNTER, M_MAC_RX_EOP_COUNTER) | 520 | #define G_MAC_RX_EOP_COUNTER(x) _SB_GETVALUE(x, S_MAC_RX_EOP_COUNTER, M_MAC_RX_EOP_COUNTER) |
| 521 | 521 | ||
| 522 | /* | 522 | /* |
| 523 | * MAC Recieve Address Filter Exact Match Registers (Table 9-21) | 523 | * MAC Receive Address Filter Exact Match Registers (Table 9-21) |
| 524 | * Registers: MAC_ADDR0_0 through MAC_ADDR7_0 | 524 | * Registers: MAC_ADDR0_0 through MAC_ADDR7_0 |
| 525 | * Registers: MAC_ADDR0_1 through MAC_ADDR7_1 | 525 | * Registers: MAC_ADDR0_1 through MAC_ADDR7_1 |
| 526 | * Registers: MAC_ADDR0_2 through MAC_ADDR7_2 | 526 | * Registers: MAC_ADDR0_2 through MAC_ADDR7_2 |
| @@ -538,7 +538,7 @@ | |||
| 538 | /* No bitfields */ | 538 | /* No bitfields */ |
| 539 | 539 | ||
| 540 | /* | 540 | /* |
| 541 | * MAC Recieve Address Filter Hash Match Registers (Table 9-22) | 541 | * MAC Receive Address Filter Hash Match Registers (Table 9-22) |
| 542 | * Registers: MAC_HASH0_0 through MAC_HASH7_0 | 542 | * Registers: MAC_HASH0_0 through MAC_HASH7_0 |
| 543 | * Registers: MAC_HASH0_1 through MAC_HASH7_1 | 543 | * Registers: MAC_HASH0_1 through MAC_HASH7_1 |
| 544 | * Registers: MAC_HASH0_2 through MAC_HASH7_2 | 544 | * Registers: MAC_HASH0_2 through MAC_HASH7_2 |
diff --git a/arch/mips/include/asm/siginfo.h b/arch/mips/include/asm/siginfo.h index 1ca64b4d33d9..20ebeb875ee6 100644 --- a/arch/mips/include/asm/siginfo.h +++ b/arch/mips/include/asm/siginfo.h | |||
| @@ -101,7 +101,7 @@ typedef struct siginfo { | |||
| 101 | 101 | ||
| 102 | /* | 102 | /* |
| 103 | * si_code values | 103 | * si_code values |
| 104 | * Again these have been choosen to be IRIX compatible. | 104 | * Again these have been chosen to be IRIX compatible. |
| 105 | */ | 105 | */ |
| 106 | #undef SI_ASYNCIO | 106 | #undef SI_ASYNCIO |
| 107 | #undef SI_TIMER | 107 | #undef SI_TIMER |
diff --git a/arch/mips/include/asm/sn/klconfig.h b/arch/mips/include/asm/sn/klconfig.h index 09e590daca17..fe02900b930d 100644 --- a/arch/mips/include/asm/sn/klconfig.h +++ b/arch/mips/include/asm/sn/klconfig.h | |||
| @@ -78,7 +78,7 @@ typedef s32 klconf_off_t; | |||
| 78 | */ | 78 | */ |
| 79 | #define MAX_SLOTS_PER_NODE (1 + 2 + 6 + 2) | 79 | #define MAX_SLOTS_PER_NODE (1 + 2 + 6 + 2) |
| 80 | 80 | ||
| 81 | /* XXX if each node is guranteed to have some memory */ | 81 | /* XXX if each node is guaranteed to have some memory */ |
| 82 | 82 | ||
| 83 | #define MAX_PCI_DEVS 8 | 83 | #define MAX_PCI_DEVS 8 |
| 84 | 84 | ||
| @@ -539,7 +539,7 @@ typedef struct klinfo_s { /* Generic info */ | |||
| 539 | #define KLSTRUCT_IOC3_TTY 24 | 539 | #define KLSTRUCT_IOC3_TTY 24 |
| 540 | 540 | ||
| 541 | /* Early Access IO proms are compatible | 541 | /* Early Access IO proms are compatible |
| 542 | only with KLSTRUCT values upto 24. */ | 542 | only with KLSTRUCT values up to 24. */ |
| 543 | 543 | ||
| 544 | #define KLSTRUCT_FIBERCHANNEL 25 | 544 | #define KLSTRUCT_FIBERCHANNEL 25 |
| 545 | #define KLSTRUCT_MOD_SERIAL_NUM 26 | 545 | #define KLSTRUCT_MOD_SERIAL_NUM 26 |
diff --git a/arch/mips/include/asm/sn/sn0/hubio.h b/arch/mips/include/asm/sn/sn0/hubio.h index 31c76c021bb6..46286d8302a7 100644 --- a/arch/mips/include/asm/sn/sn0/hubio.h +++ b/arch/mips/include/asm/sn/sn0/hubio.h | |||
| @@ -622,7 +622,7 @@ typedef union h1_icrbb_u { | |||
| 622 | */ | 622 | */ |
| 623 | #define IIO_ICRB_PROC0 0 /* Source of request is Proc 0 */ | 623 | #define IIO_ICRB_PROC0 0 /* Source of request is Proc 0 */ |
| 624 | #define IIO_ICRB_PROC1 1 /* Source of request is Proc 1 */ | 624 | #define IIO_ICRB_PROC1 1 /* Source of request is Proc 1 */ |
| 625 | #define IIO_ICRB_GB_REQ 2 /* Source is Guranteed BW request */ | 625 | #define IIO_ICRB_GB_REQ 2 /* Source is Guaranteed BW request */ |
| 626 | #define IIO_ICRB_IO_REQ 3 /* Source is Normal IO request */ | 626 | #define IIO_ICRB_IO_REQ 3 /* Source is Normal IO request */ |
| 627 | 627 | ||
| 628 | /* | 628 | /* |
diff --git a/arch/mips/include/asm/stackframe.h b/arch/mips/include/asm/stackframe.h index 58730c5ce4bf..b4ba2449444b 100644 --- a/arch/mips/include/asm/stackframe.h +++ b/arch/mips/include/asm/stackframe.h | |||
| @@ -346,7 +346,7 @@ | |||
| 346 | * we can't dispatch it directly without trashing | 346 | * we can't dispatch it directly without trashing |
| 347 | * some registers, so we'll try to detect this unlikely | 347 | * some registers, so we'll try to detect this unlikely |
| 348 | * case and program a software interrupt in the VPE, | 348 | * case and program a software interrupt in the VPE, |
| 349 | * as would be done for a cross-VPE IPI. To accomodate | 349 | * as would be done for a cross-VPE IPI. To accommodate |
| 350 | * the handling of that case, we're doing a DVPE instead | 350 | * the handling of that case, we're doing a DVPE instead |
| 351 | * of just a DMT here to protect against other threads. | 351 | * of just a DMT here to protect against other threads. |
| 352 | * This is a lot of cruft to cover a tiny window. | 352 | * This is a lot of cruft to cover a tiny window. |
diff --git a/arch/mips/include/asm/war.h b/arch/mips/include/asm/war.h index 22361d5e3bf0..fa133c1bc1f9 100644 --- a/arch/mips/include/asm/war.h +++ b/arch/mips/include/asm/war.h | |||
| @@ -227,7 +227,7 @@ | |||
| 227 | #endif | 227 | #endif |
| 228 | 228 | ||
| 229 | /* | 229 | /* |
| 230 | * On the R10000 upto version 2.6 (not sure about 2.7) there is a bug that | 230 | * On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that |
| 231 | * may cause ll / sc and lld / scd sequences to execute non-atomically. | 231 | * may cause ll / sc and lld / scd sequences to execute non-atomically. |
| 232 | */ | 232 | */ |
| 233 | #ifndef R10000_LLSC_WAR | 233 | #ifndef R10000_LLSC_WAR |
diff --git a/arch/mips/jz4740/board-qi_lb60.c b/arch/mips/jz4740/board-qi_lb60.c index bc18daaa8f84..c3b04be3fb2b 100644 --- a/arch/mips/jz4740/board-qi_lb60.c +++ b/arch/mips/jz4740/board-qi_lb60.c | |||
| @@ -65,7 +65,7 @@ static struct nand_ecclayout qi_lb60_ecclayout_1gb = { | |||
| 65 | }; | 65 | }; |
| 66 | 66 | ||
| 67 | /* Early prototypes of the QI LB60 had only 1GB of NAND. | 67 | /* Early prototypes of the QI LB60 had only 1GB of NAND. |
| 68 | * In order to support these devices aswell the partition and ecc layout is | 68 | * In order to support these devices as well the partition and ecc layout is |
| 69 | * initialized depending on the NAND size */ | 69 | * initialized depending on the NAND size */ |
| 70 | static struct mtd_partition qi_lb60_partitions_1gb[] = { | 70 | static struct mtd_partition qi_lb60_partitions_1gb[] = { |
| 71 | { | 71 | { |
| @@ -439,7 +439,7 @@ static struct platform_device *jz_platform_devices[] __initdata = { | |||
| 439 | static void __init board_gpio_setup(void) | 439 | static void __init board_gpio_setup(void) |
| 440 | { | 440 | { |
| 441 | /* We only need to enable/disable pullup here for pins used in generic | 441 | /* We only need to enable/disable pullup here for pins used in generic |
| 442 | * drivers. Everything else is done by the drivers themselfs. */ | 442 | * drivers. Everything else is done by the drivers themselves. */ |
| 443 | jz_gpio_disable_pullup(QI_LB60_GPIO_SD_VCC_EN_N); | 443 | jz_gpio_disable_pullup(QI_LB60_GPIO_SD_VCC_EN_N); |
| 444 | jz_gpio_disable_pullup(QI_LB60_GPIO_SD_CD); | 444 | jz_gpio_disable_pullup(QI_LB60_GPIO_SD_CD); |
| 445 | } | 445 | } |
diff --git a/arch/mips/kernel/cpu-bugs64.c b/arch/mips/kernel/cpu-bugs64.c index b8bb8ba60869..f305ca14351b 100644 --- a/arch/mips/kernel/cpu-bugs64.c +++ b/arch/mips/kernel/cpu-bugs64.c | |||
| @@ -73,7 +73,7 @@ static inline void mult_sh_align_mod(long *v1, long *v2, long *w, | |||
| 73 | : "0" (5), "1" (8), "2" (5)); | 73 | : "0" (5), "1" (8), "2" (5)); |
| 74 | align_mod(align, mod); | 74 | align_mod(align, mod); |
| 75 | /* | 75 | /* |
| 76 | * The trailing nop is needed to fullfill the two-instruction | 76 | * The trailing nop is needed to fulfill the two-instruction |
| 77 | * requirement between reading hi/lo and staring a mult/div. | 77 | * requirement between reading hi/lo and staring a mult/div. |
| 78 | * Leaving it out may cause gas insert a nop itself breaking | 78 | * Leaving it out may cause gas insert a nop itself breaking |
| 79 | * the desired alignment of the next chunk. | 79 | * the desired alignment of the next chunk. |
diff --git a/arch/mips/kernel/perf_event_mipsxx.c b/arch/mips/kernel/perf_event_mipsxx.c index d9a7db78ed62..75266ff4cc33 100644 --- a/arch/mips/kernel/perf_event_mipsxx.c +++ b/arch/mips/kernel/perf_event_mipsxx.c | |||
| @@ -721,7 +721,7 @@ static void mipsxx_pmu_start(void) | |||
| 721 | 721 | ||
| 722 | /* | 722 | /* |
| 723 | * MIPS performance counters can be per-TC. The control registers can | 723 | * MIPS performance counters can be per-TC. The control registers can |
| 724 | * not be directly accessed accross CPUs. Hence if we want to do global | 724 | * not be directly accessed across CPUs. Hence if we want to do global |
| 725 | * control, we need cross CPU calls. on_each_cpu() can help us, but we | 725 | * control, we need cross CPU calls. on_each_cpu() can help us, but we |
| 726 | * can not make sure this function is called with interrupts enabled. So | 726 | * can not make sure this function is called with interrupts enabled. So |
| 727 | * here we pause local counters and then grab a rwlock and leave the | 727 | * here we pause local counters and then grab a rwlock and leave the |
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c index ae167df73ddd..d2112d3cf115 100644 --- a/arch/mips/kernel/process.c +++ b/arch/mips/kernel/process.c | |||
| @@ -410,7 +410,7 @@ unsigned long unwind_stack(struct task_struct *task, unsigned long *sp, | |||
| 410 | if (!kallsyms_lookup_size_offset(pc, &size, &ofs)) | 410 | if (!kallsyms_lookup_size_offset(pc, &size, &ofs)) |
| 411 | return 0; | 411 | return 0; |
| 412 | /* | 412 | /* |
| 413 | * Return ra if an exception occured at the first instruction | 413 | * Return ra if an exception occurred at the first instruction |
| 414 | */ | 414 | */ |
| 415 | if (unlikely(ofs == 0)) { | 415 | if (unlikely(ofs == 0)) { |
| 416 | pc = *ra; | 416 | pc = *ra; |
diff --git a/arch/mips/kernel/smp-mt.c b/arch/mips/kernel/smp-mt.c index c0e81418ba21..1ec56e635d04 100644 --- a/arch/mips/kernel/smp-mt.c +++ b/arch/mips/kernel/smp-mt.c | |||
| @@ -120,7 +120,7 @@ static void vsmp_send_ipi_single(int cpu, unsigned int action) | |||
| 120 | 120 | ||
| 121 | local_irq_save(flags); | 121 | local_irq_save(flags); |
| 122 | 122 | ||
| 123 | vpflags = dvpe(); /* cant access the other CPU's registers whilst MVPE enabled */ | 123 | vpflags = dvpe(); /* can't access the other CPU's registers whilst MVPE enabled */ |
| 124 | 124 | ||
| 125 | switch (action) { | 125 | switch (action) { |
| 126 | case SMP_CALL_FUNCTION: | 126 | case SMP_CALL_FUNCTION: |
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c index fb7497405510..1083ad4e1017 100644 --- a/arch/mips/kernel/time.c +++ b/arch/mips/kernel/time.c | |||
| @@ -102,7 +102,7 @@ static __init int cpu_has_mfc0_count_bug(void) | |||
| 102 | case CPU_R4400SC: | 102 | case CPU_R4400SC: |
| 103 | case CPU_R4400MC: | 103 | case CPU_R4400MC: |
| 104 | /* | 104 | /* |
| 105 | * The published errata for the R4400 upto 3.0 say the CPU | 105 | * The published errata for the R4400 up to 3.0 say the CPU |
| 106 | * has the mfc0 from count bug. | 106 | * has the mfc0 from count bug. |
| 107 | */ | 107 | */ |
| 108 | if ((current_cpu_data.processor_id & 0xff) <= 0x30) | 108 | if ((current_cpu_data.processor_id & 0xff) <= 0x30) |
diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c index ab52b7cf3b6b..dbb6b408f001 100644 --- a/arch/mips/kernel/vpe.c +++ b/arch/mips/kernel/vpe.c | |||
| @@ -19,7 +19,7 @@ | |||
| 19 | * VPE support module | 19 | * VPE support module |
| 20 | * | 20 | * |
| 21 | * Provides support for loading a MIPS SP program on VPE1. | 21 | * Provides support for loading a MIPS SP program on VPE1. |
| 22 | * The SP enviroment is rather simple, no tlb's. It needs to be relocatable | 22 | * The SP environment is rather simple, no tlb's. It needs to be relocatable |
| 23 | * (or partially linked). You should initialise your stack in the startup | 23 | * (or partially linked). You should initialise your stack in the startup |
| 24 | * code. This loader looks for the symbol __start and sets up | 24 | * code. This loader looks for the symbol __start and sets up |
| 25 | * execution to resume from there. The MIPS SDE kit contains suitable examples. | 25 | * execution to resume from there. The MIPS SDE kit contains suitable examples. |
diff --git a/arch/mips/lib/strnlen_user.S b/arch/mips/lib/strnlen_user.S index c768e3000616..64457162f7e0 100644 --- a/arch/mips/lib/strnlen_user.S +++ b/arch/mips/lib/strnlen_user.S | |||
| @@ -17,7 +17,7 @@ | |||
| 17 | .previous | 17 | .previous |
| 18 | 18 | ||
| 19 | /* | 19 | /* |
| 20 | * Return the size of a string including the ending NUL character upto a | 20 | * Return the size of a string including the ending NUL character up to a |
| 21 | * maximum of a1 or 0 in case of error. | 21 | * maximum of a1 or 0 in case of error. |
| 22 | * | 22 | * |
| 23 | * Note: for performance reasons we deliberately accept that a user may | 23 | * Note: for performance reasons we deliberately accept that a user may |
diff --git a/arch/mips/math-emu/dp_fsp.c b/arch/mips/math-emu/dp_fsp.c index 1dfbd92ba9d0..daed6834dc15 100644 --- a/arch/mips/math-emu/dp_fsp.c +++ b/arch/mips/math-emu/dp_fsp.c | |||
| @@ -62,7 +62,7 @@ ieee754dp ieee754dp_fsp(ieee754sp x) | |||
| 62 | break; | 62 | break; |
| 63 | } | 63 | } |
| 64 | 64 | ||
| 65 | /* CANT possibly overflow,underflow, or need rounding | 65 | /* CAN'T possibly overflow,underflow, or need rounding |
| 66 | */ | 66 | */ |
| 67 | 67 | ||
| 68 | /* drop the hidden bit */ | 68 | /* drop the hidden bit */ |
diff --git a/arch/mips/math-emu/dp_mul.c b/arch/mips/math-emu/dp_mul.c index aa566e785f5a..09175f461920 100644 --- a/arch/mips/math-emu/dp_mul.c +++ b/arch/mips/math-emu/dp_mul.c | |||
| @@ -104,7 +104,7 @@ ieee754dp ieee754dp_mul(ieee754dp x, ieee754dp y) | |||
| 104 | case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_NORM): | 104 | case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_NORM): |
| 105 | break; | 105 | break; |
| 106 | } | 106 | } |
| 107 | /* rm = xm * ym, re = xe+ye basicly */ | 107 | /* rm = xm * ym, re = xe+ye basically */ |
| 108 | assert(xm & DP_HIDDEN_BIT); | 108 | assert(xm & DP_HIDDEN_BIT); |
| 109 | assert(ym & DP_HIDDEN_BIT); | 109 | assert(ym & DP_HIDDEN_BIT); |
| 110 | { | 110 | { |
diff --git a/arch/mips/math-emu/dsemul.c b/arch/mips/math-emu/dsemul.c index 36d975ae08f8..3c4a8c5ba7f2 100644 --- a/arch/mips/math-emu/dsemul.c +++ b/arch/mips/math-emu/dsemul.c | |||
| @@ -32,7 +32,7 @@ | |||
| 32 | * not change cp0_epc due to the instruction | 32 | * not change cp0_epc due to the instruction |
| 33 | * | 33 | * |
| 34 | * According to the spec: | 34 | * According to the spec: |
| 35 | * 1) it shouldnt be a branch :-) | 35 | * 1) it shouldn't be a branch :-) |
| 36 | * 2) it can be a COP instruction :-( | 36 | * 2) it can be a COP instruction :-( |
| 37 | * 3) if we are tring to run a protected memory space we must take | 37 | * 3) if we are tring to run a protected memory space we must take |
| 38 | * special care on memory access instructions :-( | 38 | * special care on memory access instructions :-( |
diff --git a/arch/mips/math-emu/sp_mul.c b/arch/mips/math-emu/sp_mul.c index c06bb4022be5..2722a2570ea4 100644 --- a/arch/mips/math-emu/sp_mul.c +++ b/arch/mips/math-emu/sp_mul.c | |||
| @@ -104,7 +104,7 @@ ieee754sp ieee754sp_mul(ieee754sp x, ieee754sp y) | |||
| 104 | case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_NORM): | 104 | case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_NORM): |
| 105 | break; | 105 | break; |
| 106 | } | 106 | } |
| 107 | /* rm = xm * ym, re = xe+ye basicly */ | 107 | /* rm = xm * ym, re = xe+ye basically */ |
| 108 | assert(xm & SP_HIDDEN_BIT); | 108 | assert(xm & SP_HIDDEN_BIT); |
| 109 | assert(ym & SP_HIDDEN_BIT); | 109 | assert(ym & SP_HIDDEN_BIT); |
| 110 | 110 | ||
diff --git a/arch/mips/mm/cex-sb1.S b/arch/mips/mm/cex-sb1.S index 2d08268bb705..89c412bc4b64 100644 --- a/arch/mips/mm/cex-sb1.S +++ b/arch/mips/mm/cex-sb1.S | |||
| @@ -79,7 +79,7 @@ LEAF(except_vec2_sb1) | |||
| 79 | recovered_dcache: | 79 | recovered_dcache: |
| 80 | /* | 80 | /* |
| 81 | * Unlock CacheErr-D (which in turn unlocks CacheErr-DPA). | 81 | * Unlock CacheErr-D (which in turn unlocks CacheErr-DPA). |
| 82 | * Ought to log the occurence of this recovered dcache error. | 82 | * Ought to log the occurrence of this recovered dcache error. |
| 83 | */ | 83 | */ |
| 84 | b recovered | 84 | b recovered |
| 85 | mtc0 $0,C0_CERR_D | 85 | mtc0 $0,C0_CERR_D |
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index 04f9e17db9d0..5ef294fbb6e7 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c | |||
| @@ -352,7 +352,7 @@ static void __cpuinit __maybe_unused build_tlb_probe_entry(u32 **p) | |||
| 352 | 352 | ||
| 353 | /* | 353 | /* |
| 354 | * Write random or indexed TLB entry, and care about the hazards from | 354 | * Write random or indexed TLB entry, and care about the hazards from |
| 355 | * the preceeding mtc0 and for the following eret. | 355 | * the preceding mtc0 and for the following eret. |
| 356 | */ | 356 | */ |
| 357 | enum tlb_write_entry { tlb_random, tlb_indexed }; | 357 | enum tlb_write_entry { tlb_random, tlb_indexed }; |
| 358 | 358 | ||
diff --git a/arch/mips/mti-malta/malta-smtc.c b/arch/mips/mti-malta/malta-smtc.c index e67891521ac1..49a38b09a488 100644 --- a/arch/mips/mti-malta/malta-smtc.c +++ b/arch/mips/mti-malta/malta-smtc.c | |||
| @@ -130,7 +130,7 @@ int plat_set_irq_affinity(struct irq_data *d, const struct cpumask *affinity, | |||
| 130 | * cleared in the affinity mask, there will never be any | 130 | * cleared in the affinity mask, there will never be any |
| 131 | * interrupt forwarding. But as soon as a program or operator | 131 | * interrupt forwarding. But as soon as a program or operator |
| 132 | * sets affinity for one of the related IRQs, we need to make | 132 | * sets affinity for one of the related IRQs, we need to make |
| 133 | * sure that we don't ever try to forward across the VPE boundry, | 133 | * sure that we don't ever try to forward across the VPE boundary, |
| 134 | * at least not until we engineer a system where the interrupt | 134 | * at least not until we engineer a system where the interrupt |
| 135 | * _ack() or _end() function can somehow know that it corresponds | 135 | * _ack() or _end() function can somehow know that it corresponds |
| 136 | * to an interrupt taken on another VPE, and perform the appropriate | 136 | * to an interrupt taken on another VPE, and perform the appropriate |
diff --git a/arch/mips/pci/ops-pmcmsp.c b/arch/mips/pci/ops-pmcmsp.c index 68798f869c0f..8fbfbf2b931c 100644 --- a/arch/mips/pci/ops-pmcmsp.c +++ b/arch/mips/pci/ops-pmcmsp.c | |||
| @@ -344,7 +344,7 @@ static irqreturn_t bpci_interrupt(int irq, void *dev_id) | |||
| 344 | * PCI_ACCESS_WRITE and PCI_ACCESS_READ. | 344 | * PCI_ACCESS_WRITE and PCI_ACCESS_READ. |
| 345 | * | 345 | * |
| 346 | * bus - pointer to the bus number of the device to | 346 | * bus - pointer to the bus number of the device to |
| 347 | * be targetted for the configuration cycle. | 347 | * be targeted for the configuration cycle. |
| 348 | * The only element of the pci_bus structure | 348 | * The only element of the pci_bus structure |
| 349 | * used is bus->number. This argument determines | 349 | * used is bus->number. This argument determines |
| 350 | * if the configuration access will be Type 0 or | 350 | * if the configuration access will be Type 0 or |
| @@ -354,7 +354,7 @@ static irqreturn_t bpci_interrupt(int irq, void *dev_id) | |||
| 354 | * | 354 | * |
| 355 | * devfn - this is an 8-bit field. The lower three bits | 355 | * devfn - this is an 8-bit field. The lower three bits |
| 356 | * specify the function number of the device to | 356 | * specify the function number of the device to |
| 357 | * be targetted for the configuration cycle, with | 357 | * be targeted for the configuration cycle, with |
| 358 | * all three-bit combinations being legal. The | 358 | * all three-bit combinations being legal. The |
| 359 | * upper five bits specify the device number, | 359 | * upper five bits specify the device number, |
| 360 | * with legal values being 10 to 31. | 360 | * with legal values being 10 to 31. |
diff --git a/arch/mips/pci/pci-bcm1480.c b/arch/mips/pci/pci-bcm1480.c index 6f5e24c6ae67..af8c31996965 100644 --- a/arch/mips/pci/pci-bcm1480.c +++ b/arch/mips/pci/pci-bcm1480.c | |||
| @@ -210,7 +210,7 @@ static int __init bcm1480_pcibios_init(void) | |||
| 210 | PCIBIOS_MIN_IO = 0x00008000UL; | 210 | PCIBIOS_MIN_IO = 0x00008000UL; |
| 211 | PCIBIOS_MIN_MEM = 0x01000000UL; | 211 | PCIBIOS_MIN_MEM = 0x01000000UL; |
| 212 | 212 | ||
| 213 | /* Set I/O resource limits. - unlimited for now to accomodate HT */ | 213 | /* Set I/O resource limits. - unlimited for now to accommodate HT */ |
| 214 | ioport_resource.end = 0xffffffffUL; | 214 | ioport_resource.end = 0xffffffffUL; |
| 215 | iomem_resource.end = 0xffffffffUL; | 215 | iomem_resource.end = 0xffffffffUL; |
| 216 | 216 | ||
diff --git a/arch/mips/pci/pci-octeon.c b/arch/mips/pci/pci-octeon.c index 2d74fc9ae3ba..ed1c54284b8f 100644 --- a/arch/mips/pci/pci-octeon.c +++ b/arch/mips/pci/pci-octeon.c | |||
| @@ -441,7 +441,7 @@ static void octeon_pci_initialize(void) | |||
| 441 | 441 | ||
| 442 | /* | 442 | /* |
| 443 | * TDOMC must be set to one in PCI mode. TDOMC should be set to 4 | 443 | * TDOMC must be set to one in PCI mode. TDOMC should be set to 4 |
| 444 | * in PCI-X mode to allow four oustanding splits. Otherwise, | 444 | * in PCI-X mode to allow four outstanding splits. Otherwise, |
| 445 | * should not change from its reset value. Don't write PCI_CFG19 | 445 | * should not change from its reset value. Don't write PCI_CFG19 |
| 446 | * in PCI mode (0x82000001 reset value), write it to 0x82000004 | 446 | * in PCI mode (0x82000001 reset value), write it to 0x82000004 |
| 447 | * after PCI-X mode is known. MRBCI,MDWE,MDRE -> must be zero. | 447 | * after PCI-X mode is known. MRBCI,MDWE,MDRE -> must be zero. |
| @@ -515,7 +515,7 @@ static void octeon_pci_initialize(void) | |||
| 515 | #endif /* USE_OCTEON_INTERNAL_ARBITER */ | 515 | #endif /* USE_OCTEON_INTERNAL_ARBITER */ |
| 516 | 516 | ||
| 517 | /* | 517 | /* |
| 518 | * Preferrably written to 1 to set MLTD. [RDSATI,TRTAE, | 518 | * Preferably written to 1 to set MLTD. [RDSATI,TRTAE, |
| 519 | * TWTAE,TMAE,DPPMR -> must be zero. TILT -> must not be set to | 519 | * TWTAE,TMAE,DPPMR -> must be zero. TILT -> must not be set to |
| 520 | * 1..7. | 520 | * 1..7. |
| 521 | */ | 521 | */ |
diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c index 38bc28005b4a..33bba7bff258 100644 --- a/arch/mips/pci/pci.c +++ b/arch/mips/pci/pci.c | |||
| @@ -125,7 +125,7 @@ void __devinit register_pci_controller(struct pci_controller *hose) | |||
| 125 | hose_tail = &hose->next; | 125 | hose_tail = &hose->next; |
| 126 | 126 | ||
| 127 | /* | 127 | /* |
| 128 | * Do not panic here but later - this might hapen before console init. | 128 | * Do not panic here but later - this might happen before console init. |
| 129 | */ | 129 | */ |
| 130 | if (!hose->io_map_base) { | 130 | if (!hose->io_map_base) { |
| 131 | printk(KERN_WARNING | 131 | printk(KERN_WARNING |
diff --git a/arch/mips/pmc-sierra/msp71xx/msp_setup.c b/arch/mips/pmc-sierra/msp71xx/msp_setup.c index fb37a10e0309..2413ea67877e 100644 --- a/arch/mips/pmc-sierra/msp71xx/msp_setup.c +++ b/arch/mips/pmc-sierra/msp71xx/msp_setup.c | |||
| @@ -239,7 +239,7 @@ void __init prom_init(void) | |||
| 239 | #ifdef CONFIG_PMCTWILED | 239 | #ifdef CONFIG_PMCTWILED |
| 240 | /* | 240 | /* |
| 241 | * Setup LED states before the subsys_initcall loads other | 241 | * Setup LED states before the subsys_initcall loads other |
| 242 | * dependant drivers/modules. | 242 | * dependent drivers/modules. |
| 243 | */ | 243 | */ |
| 244 | pmctwiled_setup(); | 244 | pmctwiled_setup(); |
| 245 | #endif | 245 | #endif |
diff --git a/arch/mips/pnx833x/common/platform.c b/arch/mips/pnx833x/common/platform.c index ce45df17fd09..87167dcc79fa 100644 --- a/arch/mips/pnx833x/common/platform.c +++ b/arch/mips/pnx833x/common/platform.c | |||
| @@ -165,7 +165,7 @@ static struct i2c_pnx0105_dev pnx833x_i2c_dev[] = { | |||
| 165 | { | 165 | { |
| 166 | .base = PNX833X_I2C0_PORTS_START, | 166 | .base = PNX833X_I2C0_PORTS_START, |
| 167 | .irq = -1, /* should be PNX833X_PIC_I2C0_INT but polling is faster */ | 167 | .irq = -1, /* should be PNX833X_PIC_I2C0_INT but polling is faster */ |
| 168 | .clock = 6, /* 0 == 400 kHz, 4 == 100 kHz(Maximum HDMI), 6 = 50kHz(Prefered HDCP) */ | 168 | .clock = 6, /* 0 == 400 kHz, 4 == 100 kHz(Maximum HDMI), 6 = 50kHz(Preferred HDCP) */ |
| 169 | .bus_addr = 0, /* no slave support */ | 169 | .bus_addr = 0, /* no slave support */ |
| 170 | }, | 170 | }, |
| 171 | { | 171 | { |
diff --git a/arch/mips/sgi-ip27/Kconfig b/arch/mips/sgi-ip27/Kconfig index 5e960ae9735a..bc5e9769bb73 100644 --- a/arch/mips/sgi-ip27/Kconfig +++ b/arch/mips/sgi-ip27/Kconfig | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | #config SGI_SN0_XXL | 1 | #config SGI_SN0_XXL |
| 2 | # bool "IP27 XXL" | 2 | # bool "IP27 XXL" |
| 3 | # depends on SGI_IP27 | 3 | # depends on SGI_IP27 |
| 4 | # This options adds support for userspace processes upto 16TB size. | 4 | # This options adds support for userspace processes up to 16TB size. |
| 5 | # Normally the limit is just .5TB. | 5 | # Normally the limit is just .5TB. |
| 6 | 6 | ||
| 7 | choice | 7 | choice |
diff --git a/arch/mips/sgi-ip27/TODO b/arch/mips/sgi-ip27/TODO index 19f1512c8f2e..160857ff1483 100644 --- a/arch/mips/sgi-ip27/TODO +++ b/arch/mips/sgi-ip27/TODO | |||
| @@ -13,7 +13,7 @@ being invoked on all nodes in ip27-memory.c. | |||
| 13 | 9. start_thread must turn off UX64 ... and define tlb_refill_debug. | 13 | 9. start_thread must turn off UX64 ... and define tlb_refill_debug. |
| 14 | 10. Need a bad pmd table, bad pte table. __bad_pmd_table/__bad_pagetable | 14 | 10. Need a bad pmd table, bad pte table. __bad_pmd_table/__bad_pagetable |
| 15 | does not agree with pgd_bad/pmd_bad. | 15 | does not agree with pgd_bad/pmd_bad. |
| 16 | 11. All intrs (ip27_do_irq handlers) are targetted at cpu A on the node. | 16 | 11. All intrs (ip27_do_irq handlers) are targeted at cpu A on the node. |
| 17 | This might need to change later. Only the timer intr is set up to be | 17 | This might need to change later. Only the timer intr is set up to be |
| 18 | received on both Cpu A and B. (ip27_do_irq()/bridge_startup()) | 18 | received on both Cpu A and B. (ip27_do_irq()/bridge_startup()) |
| 19 | 13. Cache flushing (specially the SMP version) has to be investigated. | 19 | 13. Cache flushing (specially the SMP version) has to be investigated. |
diff --git a/arch/mips/sgi-ip27/ip27-init.c b/arch/mips/sgi-ip27/ip27-init.c index 51d3a4f2d7e1..923c080f77bd 100644 --- a/arch/mips/sgi-ip27/ip27-init.c +++ b/arch/mips/sgi-ip27/ip27-init.c | |||
| @@ -93,7 +93,7 @@ static void __cpuinit per_hub_init(cnodeid_t cnode) | |||
| 93 | 93 | ||
| 94 | /* | 94 | /* |
| 95 | * Some interrupts are reserved by hardware or by software convention. | 95 | * Some interrupts are reserved by hardware or by software convention. |
| 96 | * Mark these as reserved right away so they won't be used accidently | 96 | * Mark these as reserved right away so they won't be used accidentally |
| 97 | * later. | 97 | * later. |
| 98 | */ | 98 | */ |
| 99 | for (i = 0; i <= BASE_PCI_IRQ; i++) { | 99 | for (i = 0; i <= BASE_PCI_IRQ; i++) { |
diff --git a/arch/mips/sgi-ip27/ip27-irq.c b/arch/mips/sgi-ip27/ip27-irq.c index 11488719dd97..0a04603d577c 100644 --- a/arch/mips/sgi-ip27/ip27-irq.c +++ b/arch/mips/sgi-ip27/ip27-irq.c | |||
| @@ -41,7 +41,7 @@ | |||
| 41 | * Linux has a controller-independent x86 interrupt architecture. | 41 | * Linux has a controller-independent x86 interrupt architecture. |
| 42 | * every controller has a 'controller-template', that is used | 42 | * every controller has a 'controller-template', that is used |
| 43 | * by the main code to do the right thing. Each driver-visible | 43 | * by the main code to do the right thing. Each driver-visible |
| 44 | * interrupt source is transparently wired to the apropriate | 44 | * interrupt source is transparently wired to the appropriate |
| 45 | * controller. Thus drivers need not be aware of the | 45 | * controller. Thus drivers need not be aware of the |
| 46 | * interrupt-controller. | 46 | * interrupt-controller. |
| 47 | * | 47 | * |
diff --git a/arch/mn10300/include/asm/cpu-regs.h b/arch/mn10300/include/asm/cpu-regs.h index 90ed4a365c97..c54effae2202 100644 --- a/arch/mn10300/include/asm/cpu-regs.h +++ b/arch/mn10300/include/asm/cpu-regs.h | |||
| @@ -49,7 +49,7 @@ asm(" .am33_2\n"); | |||
| 49 | #define EPSW_IM_6 0x00000600 /* interrupt mode 6 */ | 49 | #define EPSW_IM_6 0x00000600 /* interrupt mode 6 */ |
| 50 | #define EPSW_IM_7 0x00000700 /* interrupt mode 7 */ | 50 | #define EPSW_IM_7 0x00000700 /* interrupt mode 7 */ |
| 51 | #define EPSW_IE 0x00000800 /* interrupt enable */ | 51 | #define EPSW_IE 0x00000800 /* interrupt enable */ |
| 52 | #define EPSW_S 0x00003000 /* software auxilliary bits */ | 52 | #define EPSW_S 0x00003000 /* software auxiliary bits */ |
| 53 | #define EPSW_T 0x00008000 /* trace enable */ | 53 | #define EPSW_T 0x00008000 /* trace enable */ |
| 54 | #define EPSW_nSL 0x00010000 /* not supervisor level */ | 54 | #define EPSW_nSL 0x00010000 /* not supervisor level */ |
| 55 | #define EPSW_NMID 0x00020000 /* nonmaskable interrupt disable */ | 55 | #define EPSW_NMID 0x00020000 /* nonmaskable interrupt disable */ |
diff --git a/arch/parisc/include/asm/eisa_eeprom.h b/arch/parisc/include/asm/eisa_eeprom.h index 9c9da980402a..8ce8b85ca588 100644 --- a/arch/parisc/include/asm/eisa_eeprom.h +++ b/arch/parisc/include/asm/eisa_eeprom.h | |||
| @@ -27,7 +27,7 @@ struct eeprom_header | |||
| 27 | u_int8_t ver_maj; | 27 | u_int8_t ver_maj; |
| 28 | u_int8_t ver_min; | 28 | u_int8_t ver_min; |
| 29 | u_int8_t num_slots; /* number of EISA slots in system */ | 29 | u_int8_t num_slots; /* number of EISA slots in system */ |
| 30 | u_int16_t csum; /* checksum, I don't know how to calulate this */ | 30 | u_int16_t csum; /* checksum, I don't know how to calculate this */ |
| 31 | u_int8_t pad[10]; | 31 | u_int8_t pad[10]; |
| 32 | } __attribute__ ((packed)); | 32 | } __attribute__ ((packed)); |
| 33 | 33 | ||
diff --git a/arch/parisc/kernel/entry.S b/arch/parisc/kernel/entry.S index e5477092a5d4..ead8d2a1034c 100644 --- a/arch/parisc/kernel/entry.S +++ b/arch/parisc/kernel/entry.S | |||
| @@ -187,8 +187,8 @@ | |||
| 187 | 187 | ||
| 188 | /* Register definitions for tlb miss handler macros */ | 188 | /* Register definitions for tlb miss handler macros */ |
| 189 | 189 | ||
| 190 | va = r8 /* virtual address for which the trap occured */ | 190 | va = r8 /* virtual address for which the trap occurred */ |
| 191 | spc = r24 /* space for which the trap occured */ | 191 | spc = r24 /* space for which the trap occurred */ |
| 192 | 192 | ||
| 193 | #ifndef CONFIG_64BIT | 193 | #ifndef CONFIG_64BIT |
| 194 | 194 | ||
| @@ -882,7 +882,7 @@ ENTRY(syscall_exit_rfi) | |||
| 882 | * (we don't store them in the sigcontext), so set them | 882 | * (we don't store them in the sigcontext), so set them |
| 883 | * to "proper" values now (otherwise we'll wind up restoring | 883 | * to "proper" values now (otherwise we'll wind up restoring |
| 884 | * whatever was last stored in the task structure, which might | 884 | * whatever was last stored in the task structure, which might |
| 885 | * be inconsistent if an interrupt occured while on the gateway | 885 | * be inconsistent if an interrupt occurred while on the gateway |
| 886 | * page). Note that we may be "trashing" values the user put in | 886 | * page). Note that we may be "trashing" values the user put in |
| 887 | * them, but we don't support the user changing them. | 887 | * them, but we don't support the user changing them. |
| 888 | */ | 888 | */ |
| @@ -1156,11 +1156,11 @@ ENDPROC(intr_save) | |||
| 1156 | */ | 1156 | */ |
| 1157 | 1157 | ||
| 1158 | t0 = r1 /* temporary register 0 */ | 1158 | t0 = r1 /* temporary register 0 */ |
| 1159 | va = r8 /* virtual address for which the trap occured */ | 1159 | va = r8 /* virtual address for which the trap occurred */ |
| 1160 | t1 = r9 /* temporary register 1 */ | 1160 | t1 = r9 /* temporary register 1 */ |
| 1161 | pte = r16 /* pte/phys page # */ | 1161 | pte = r16 /* pte/phys page # */ |
| 1162 | prot = r17 /* prot bits */ | 1162 | prot = r17 /* prot bits */ |
| 1163 | spc = r24 /* space for which the trap occured */ | 1163 | spc = r24 /* space for which the trap occurred */ |
| 1164 | ptp = r25 /* page directory/page table pointer */ | 1164 | ptp = r25 /* page directory/page table pointer */ |
| 1165 | 1165 | ||
| 1166 | #ifdef CONFIG_64BIT | 1166 | #ifdef CONFIG_64BIT |
diff --git a/arch/parisc/kernel/head.S b/arch/parisc/kernel/head.S index 4dbdf0ed6fa0..145c5e4caaa0 100644 --- a/arch/parisc/kernel/head.S +++ b/arch/parisc/kernel/head.S | |||
| @@ -131,7 +131,7 @@ $pgt_fill_loop: | |||
| 131 | ldo THREAD_SZ_ALGN(%r6),%sp | 131 | ldo THREAD_SZ_ALGN(%r6),%sp |
| 132 | 132 | ||
| 133 | #ifdef CONFIG_SMP | 133 | #ifdef CONFIG_SMP |
| 134 | /* Set the smp rendevous address into page zero. | 134 | /* Set the smp rendezvous address into page zero. |
| 135 | ** It would be safer to do this in init_smp_config() but | 135 | ** It would be safer to do this in init_smp_config() but |
| 136 | ** it's just way easier to deal with here because | 136 | ** it's just way easier to deal with here because |
| 137 | ** of 64-bit function ptrs and the address is local to this file. | 137 | ** of 64-bit function ptrs and the address is local to this file. |
diff --git a/arch/parisc/kernel/inventory.c b/arch/parisc/kernel/inventory.c index d228d8237879..08324aac3544 100644 --- a/arch/parisc/kernel/inventory.c +++ b/arch/parisc/kernel/inventory.c | |||
| @@ -93,7 +93,7 @@ void __init setup_pdc(void) | |||
| 93 | case 0x6: /* 705, 710 */ | 93 | case 0x6: /* 705, 710 */ |
| 94 | case 0x7: /* 715, 725 */ | 94 | case 0x7: /* 715, 725 */ |
| 95 | case 0x8: /* 745, 747, 742 */ | 95 | case 0x8: /* 745, 747, 742 */ |
| 96 | case 0xA: /* 712 and similiar */ | 96 | case 0xA: /* 712 and similar */ |
| 97 | case 0xC: /* 715/64, at least */ | 97 | case 0xC: /* 715/64, at least */ |
| 98 | 98 | ||
| 99 | pdc_type = PDC_TYPE_SNAKE; | 99 | pdc_type = PDC_TYPE_SNAKE; |
diff --git a/arch/parisc/kernel/signal.c b/arch/parisc/kernel/signal.c index 609a331878e7..12c1ed33dc18 100644 --- a/arch/parisc/kernel/signal.c +++ b/arch/parisc/kernel/signal.c | |||
| @@ -291,7 +291,7 @@ setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, | |||
| 291 | DBG(1,"setup_rt_frame: frame->uc = 0x%p\n", &frame->uc); | 291 | DBG(1,"setup_rt_frame: frame->uc = 0x%p\n", &frame->uc); |
| 292 | DBG(1,"setup_rt_frame: frame->uc.uc_mcontext = 0x%p\n", &frame->uc.uc_mcontext); | 292 | DBG(1,"setup_rt_frame: frame->uc.uc_mcontext = 0x%p\n", &frame->uc.uc_mcontext); |
| 293 | err |= setup_sigcontext(&frame->uc.uc_mcontext, regs, in_syscall); | 293 | err |= setup_sigcontext(&frame->uc.uc_mcontext, regs, in_syscall); |
| 294 | /* FIXME: Should probably be converted aswell for the compat case */ | 294 | /* FIXME: Should probably be converted as well for the compat case */ |
| 295 | err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set)); | 295 | err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set)); |
| 296 | } | 296 | } |
| 297 | 297 | ||
diff --git a/arch/parisc/kernel/syscall.S b/arch/parisc/kernel/syscall.S index 68e75ce838d6..82a52b2fb13f 100644 --- a/arch/parisc/kernel/syscall.S +++ b/arch/parisc/kernel/syscall.S | |||
| @@ -605,7 +605,7 @@ cas_action: | |||
| 605 | copy %r0, %r21 | 605 | copy %r0, %r21 |
| 606 | 606 | ||
| 607 | 3: | 607 | 3: |
| 608 | /* Error occured on load or store */ | 608 | /* Error occurred on load or store */ |
| 609 | /* Free lock */ | 609 | /* Free lock */ |
| 610 | stw %r20, 0(%sr2,%r20) | 610 | stw %r20, 0(%sr2,%r20) |
| 611 | #if ENABLE_LWS_DEBUG | 611 | #if ENABLE_LWS_DEBUG |
diff --git a/arch/parisc/kernel/syscall_table.S b/arch/parisc/kernel/syscall_table.S index 74867dfdabe5..4be85ee10b85 100644 --- a/arch/parisc/kernel/syscall_table.S +++ b/arch/parisc/kernel/syscall_table.S | |||
| @@ -34,7 +34,7 @@ | |||
| 34 | /* Use ENTRY_SAME for 32-bit syscalls which are the same on wide and | 34 | /* Use ENTRY_SAME for 32-bit syscalls which are the same on wide and |
| 35 | * narrow palinux. Use ENTRY_DIFF for those where a 32-bit specific | 35 | * narrow palinux. Use ENTRY_DIFF for those where a 32-bit specific |
| 36 | * implementation is required on wide palinux. Use ENTRY_COMP where | 36 | * implementation is required on wide palinux. Use ENTRY_COMP where |
| 37 | * the compatability layer has a useful 32-bit implementation. | 37 | * the compatibility layer has a useful 32-bit implementation. |
| 38 | */ | 38 | */ |
| 39 | #define ENTRY_SAME(_name_) .dword sys_##_name_ | 39 | #define ENTRY_SAME(_name_) .dword sys_##_name_ |
| 40 | #define ENTRY_DIFF(_name_) .dword sys32_##_name_ | 40 | #define ENTRY_DIFF(_name_) .dword sys32_##_name_ |
diff --git a/arch/parisc/math-emu/dfadd.c b/arch/parisc/math-emu/dfadd.c index e147d7d3b0f4..d37e2d2cb6fe 100644 --- a/arch/parisc/math-emu/dfadd.c +++ b/arch/parisc/math-emu/dfadd.c | |||
| @@ -303,7 +303,7 @@ dbl_fadd( | |||
| 303 | if(Dbl_iszero_hidden(resultp1)) | 303 | if(Dbl_iszero_hidden(resultp1)) |
| 304 | { | 304 | { |
| 305 | /* Handle normalization */ | 305 | /* Handle normalization */ |
| 306 | /* A straight foward algorithm would now shift the result | 306 | /* A straight forward algorithm would now shift the result |
| 307 | * and extension left until the hidden bit becomes one. Not | 307 | * and extension left until the hidden bit becomes one. Not |
| 308 | * all of the extension bits need participate in the shift. | 308 | * all of the extension bits need participate in the shift. |
| 309 | * Only the two most significant bits (round and guard) are | 309 | * Only the two most significant bits (round and guard) are |
diff --git a/arch/parisc/math-emu/dfsub.c b/arch/parisc/math-emu/dfsub.c index 87ebc60d465b..2e8b5a79bff7 100644 --- a/arch/parisc/math-emu/dfsub.c +++ b/arch/parisc/math-emu/dfsub.c | |||
| @@ -306,7 +306,7 @@ dbl_fsub( | |||
| 306 | if(Dbl_iszero_hidden(resultp1)) | 306 | if(Dbl_iszero_hidden(resultp1)) |
| 307 | { | 307 | { |
| 308 | /* Handle normalization */ | 308 | /* Handle normalization */ |
| 309 | /* A straight foward algorithm would now shift the result | 309 | /* A straight forward algorithm would now shift the result |
| 310 | * and extension left until the hidden bit becomes one. Not | 310 | * and extension left until the hidden bit becomes one. Not |
| 311 | * all of the extension bits need participate in the shift. | 311 | * all of the extension bits need participate in the shift. |
| 312 | * Only the two most significant bits (round and guard) are | 312 | * Only the two most significant bits (round and guard) are |
diff --git a/arch/parisc/math-emu/fmpyfadd.c b/arch/parisc/math-emu/fmpyfadd.c index 5dd7f93a89be..b067c45c872d 100644 --- a/arch/parisc/math-emu/fmpyfadd.c +++ b/arch/parisc/math-emu/fmpyfadd.c | |||
| @@ -531,7 +531,7 @@ dbl_fmpyfadd( | |||
| 531 | sign_save = Dbl_signextendedsign(resultp1); | 531 | sign_save = Dbl_signextendedsign(resultp1); |
| 532 | if (Dbl_iszero_hidden(resultp1)) { | 532 | if (Dbl_iszero_hidden(resultp1)) { |
| 533 | /* Handle normalization */ | 533 | /* Handle normalization */ |
| 534 | /* A straight foward algorithm would now shift the | 534 | /* A straightforward algorithm would now shift the |
| 535 | * result and extension left until the hidden bit | 535 | * result and extension left until the hidden bit |
| 536 | * becomes one. Not all of the extension bits need | 536 | * becomes one. Not all of the extension bits need |
| 537 | * participate in the shift. Only the two most | 537 | * participate in the shift. Only the two most |
| @@ -1191,7 +1191,7 @@ unsigned int *status; | |||
| 1191 | sign_save = Dbl_signextendedsign(resultp1); | 1191 | sign_save = Dbl_signextendedsign(resultp1); |
| 1192 | if (Dbl_iszero_hidden(resultp1)) { | 1192 | if (Dbl_iszero_hidden(resultp1)) { |
| 1193 | /* Handle normalization */ | 1193 | /* Handle normalization */ |
| 1194 | /* A straight foward algorithm would now shift the | 1194 | /* A straightforward algorithm would now shift the |
| 1195 | * result and extension left until the hidden bit | 1195 | * result and extension left until the hidden bit |
| 1196 | * becomes one. Not all of the extension bits need | 1196 | * becomes one. Not all of the extension bits need |
| 1197 | * participate in the shift. Only the two most | 1197 | * participate in the shift. Only the two most |
| @@ -1841,7 +1841,7 @@ unsigned int *status; | |||
| 1841 | sign_save = Sgl_signextendedsign(resultp1); | 1841 | sign_save = Sgl_signextendedsign(resultp1); |
| 1842 | if (Sgl_iszero_hidden(resultp1)) { | 1842 | if (Sgl_iszero_hidden(resultp1)) { |
| 1843 | /* Handle normalization */ | 1843 | /* Handle normalization */ |
| 1844 | /* A straight foward algorithm would now shift the | 1844 | /* A straightforward algorithm would now shift the |
| 1845 | * result and extension left until the hidden bit | 1845 | * result and extension left until the hidden bit |
| 1846 | * becomes one. Not all of the extension bits need | 1846 | * becomes one. Not all of the extension bits need |
| 1847 | * participate in the shift. Only the two most | 1847 | * participate in the shift. Only the two most |
| @@ -2483,7 +2483,7 @@ unsigned int *status; | |||
| 2483 | sign_save = Sgl_signextendedsign(resultp1); | 2483 | sign_save = Sgl_signextendedsign(resultp1); |
| 2484 | if (Sgl_iszero_hidden(resultp1)) { | 2484 | if (Sgl_iszero_hidden(resultp1)) { |
| 2485 | /* Handle normalization */ | 2485 | /* Handle normalization */ |
| 2486 | /* A straight foward algorithm would now shift the | 2486 | /* A straightforward algorithm would now shift the |
| 2487 | * result and extension left until the hidden bit | 2487 | * result and extension left until the hidden bit |
| 2488 | * becomes one. Not all of the extension bits need | 2488 | * becomes one. Not all of the extension bits need |
| 2489 | * participate in the shift. Only the two most | 2489 | * participate in the shift. Only the two most |
diff --git a/arch/parisc/math-emu/sfadd.c b/arch/parisc/math-emu/sfadd.c index 008d721b5d22..f802cd6c7869 100644 --- a/arch/parisc/math-emu/sfadd.c +++ b/arch/parisc/math-emu/sfadd.c | |||
| @@ -298,7 +298,7 @@ sgl_fadd( | |||
| 298 | if(Sgl_iszero_hidden(result)) | 298 | if(Sgl_iszero_hidden(result)) |
| 299 | { | 299 | { |
| 300 | /* Handle normalization */ | 300 | /* Handle normalization */ |
| 301 | /* A straight foward algorithm would now shift the result | 301 | /* A straightforward algorithm would now shift the result |
| 302 | * and extension left until the hidden bit becomes one. Not | 302 | * and extension left until the hidden bit becomes one. Not |
| 303 | * all of the extension bits need participate in the shift. | 303 | * all of the extension bits need participate in the shift. |
| 304 | * Only the two most significant bits (round and guard) are | 304 | * Only the two most significant bits (round and guard) are |
diff --git a/arch/parisc/math-emu/sfsub.c b/arch/parisc/math-emu/sfsub.c index 24eef61c8e3b..5f90d0f31a52 100644 --- a/arch/parisc/math-emu/sfsub.c +++ b/arch/parisc/math-emu/sfsub.c | |||
| @@ -301,7 +301,7 @@ sgl_fsub( | |||
| 301 | if(Sgl_iszero_hidden(result)) | 301 | if(Sgl_iszero_hidden(result)) |
| 302 | { | 302 | { |
| 303 | /* Handle normalization */ | 303 | /* Handle normalization */ |
| 304 | /* A straight foward algorithm would now shift the result | 304 | /* A straightforward algorithm would now shift the result |
| 305 | * and extension left until the hidden bit becomes one. Not | 305 | * and extension left until the hidden bit becomes one. Not |
| 306 | * all of the extension bits need participate in the shift. | 306 | * all of the extension bits need participate in the shift. |
| 307 | * Only the two most significant bits (round and guard) are | 307 | * Only the two most significant bits (round and guard) are |
diff --git a/arch/powerpc/include/asm/bitops.h b/arch/powerpc/include/asm/bitops.h index 2e561876fc89..f18c6d9b9510 100644 --- a/arch/powerpc/include/asm/bitops.h +++ b/arch/powerpc/include/asm/bitops.h | |||
| @@ -209,8 +209,8 @@ static __inline__ unsigned long ffz(unsigned long x) | |||
| 209 | return BITS_PER_LONG; | 209 | return BITS_PER_LONG; |
| 210 | 210 | ||
| 211 | /* | 211 | /* |
| 212 | * Calculate the bit position of the least signficant '1' bit in x | 212 | * Calculate the bit position of the least significant '1' bit in x |
| 213 | * (since x has been changed this will actually be the least signficant | 213 | * (since x has been changed this will actually be the least significant |
| 214 | * '0' bit in * the original x). Note: (x & -x) gives us a mask that | 214 | * '0' bit in * the original x). Note: (x & -x) gives us a mask that |
| 215 | * is the least significant * (RIGHT-most) 1-bit of the value in x. | 215 | * is the least significant * (RIGHT-most) 1-bit of the value in x. |
| 216 | */ | 216 | */ |
diff --git a/arch/powerpc/include/asm/compat.h b/arch/powerpc/include/asm/compat.h index 2296112e247b..91010e8f8479 100644 --- a/arch/powerpc/include/asm/compat.h +++ b/arch/powerpc/include/asm/compat.h | |||
| @@ -140,7 +140,7 @@ static inline void __user *arch_compat_alloc_user_space(long len) | |||
| 140 | unsigned long usp = regs->gpr[1]; | 140 | unsigned long usp = regs->gpr[1]; |
| 141 | 141 | ||
| 142 | /* | 142 | /* |
| 143 | * We cant access below the stack pointer in the 32bit ABI and | 143 | * We can't access below the stack pointer in the 32bit ABI and |
| 144 | * can access 288 bytes in the 64bit ABI | 144 | * can access 288 bytes in the 64bit ABI |
| 145 | */ | 145 | */ |
| 146 | if (!is_32bit_task()) | 146 | if (!is_32bit_task()) |
diff --git a/arch/powerpc/include/asm/cpm.h b/arch/powerpc/include/asm/cpm.h index e50323fe941f..4398a6cdcf53 100644 --- a/arch/powerpc/include/asm/cpm.h +++ b/arch/powerpc/include/asm/cpm.h | |||
| @@ -98,7 +98,7 @@ typedef struct cpm_buf_desc { | |||
| 98 | #define BD_SC_INTRPT (0x1000) /* Interrupt on change */ | 98 | #define BD_SC_INTRPT (0x1000) /* Interrupt on change */ |
| 99 | #define BD_SC_LAST (0x0800) /* Last buffer in frame */ | 99 | #define BD_SC_LAST (0x0800) /* Last buffer in frame */ |
| 100 | #define BD_SC_TC (0x0400) /* Transmit CRC */ | 100 | #define BD_SC_TC (0x0400) /* Transmit CRC */ |
| 101 | #define BD_SC_CM (0x0200) /* Continous mode */ | 101 | #define BD_SC_CM (0x0200) /* Continuous mode */ |
| 102 | #define BD_SC_ID (0x0100) /* Rec'd too many idles */ | 102 | #define BD_SC_ID (0x0100) /* Rec'd too many idles */ |
| 103 | #define BD_SC_P (0x0100) /* xmt preamble */ | 103 | #define BD_SC_P (0x0100) /* xmt preamble */ |
| 104 | #define BD_SC_BR (0x0020) /* Break received */ | 104 | #define BD_SC_BR (0x0020) /* Break received */ |
diff --git a/arch/powerpc/include/asm/cpm1.h b/arch/powerpc/include/asm/cpm1.h index bd07650dca56..8ee4211ca0c6 100644 --- a/arch/powerpc/include/asm/cpm1.h +++ b/arch/powerpc/include/asm/cpm1.h | |||
| @@ -4,7 +4,7 @@ | |||
| 4 | * | 4 | * |
| 5 | * This file contains structures and information for the communication | 5 | * This file contains structures and information for the communication |
| 6 | * processor channels. Some CPM control and status is available | 6 | * processor channels. Some CPM control and status is available |
| 7 | * throught the MPC8xx internal memory map. See immap.h for details. | 7 | * through the MPC8xx internal memory map. See immap.h for details. |
| 8 | * This file only contains what I need for the moment, not the total | 8 | * This file only contains what I need for the moment, not the total |
| 9 | * CPM capabilities. I (or someone else) will add definitions as they | 9 | * CPM capabilities. I (or someone else) will add definitions as they |
| 10 | * are needed. -- Dan | 10 | * are needed. -- Dan |
diff --git a/arch/powerpc/include/asm/hvcall.h b/arch/powerpc/include/asm/hvcall.h index ec089acfa56b..8edec710cc6d 100644 --- a/arch/powerpc/include/asm/hvcall.h +++ b/arch/powerpc/include/asm/hvcall.h | |||
| @@ -122,7 +122,7 @@ | |||
| 122 | #define H_DABRX_KERNEL (1UL<<(63-62)) | 122 | #define H_DABRX_KERNEL (1UL<<(63-62)) |
| 123 | #define H_DABRX_USER (1UL<<(63-63)) | 123 | #define H_DABRX_USER (1UL<<(63-63)) |
| 124 | 124 | ||
| 125 | /* Each control block has to be on a 4K bondary */ | 125 | /* Each control block has to be on a 4K boundary */ |
| 126 | #define H_CB_ALIGNMENT 4096 | 126 | #define H_CB_ALIGNMENT 4096 |
| 127 | 127 | ||
| 128 | /* pSeries hypervisor opcodes */ | 128 | /* pSeries hypervisor opcodes */ |
diff --git a/arch/powerpc/include/asm/kprobes.h b/arch/powerpc/include/asm/kprobes.h index d0e7701fa1f6..be0171afdc0f 100644 --- a/arch/powerpc/include/asm/kprobes.h +++ b/arch/powerpc/include/asm/kprobes.h | |||
| @@ -50,7 +50,7 @@ typedef unsigned int kprobe_opcode_t; | |||
| 50 | * Handle cases where: | 50 | * Handle cases where: |
| 51 | * - User passes a <.symbol> or <module:.symbol> | 51 | * - User passes a <.symbol> or <module:.symbol> |
| 52 | * - User passes a <symbol> or <module:symbol> | 52 | * - User passes a <symbol> or <module:symbol> |
| 53 | * - User passes a non-existant symbol, kallsyms_lookup_name | 53 | * - User passes a non-existent symbol, kallsyms_lookup_name |
| 54 | * returns 0. Don't deref the NULL pointer in that case | 54 | * returns 0. Don't deref the NULL pointer in that case |
| 55 | */ | 55 | */ |
| 56 | #define kprobe_lookup_name(name, addr) \ | 56 | #define kprobe_lookup_name(name, addr) \ |
diff --git a/arch/powerpc/include/asm/lppaca.h b/arch/powerpc/include/asm/lppaca.h index 26b8c807f8f1..a077adc0b35e 100644 --- a/arch/powerpc/include/asm/lppaca.h +++ b/arch/powerpc/include/asm/lppaca.h | |||
| @@ -105,7 +105,7 @@ struct lppaca { | |||
| 105 | // processing of external interrupts. Note that PLIC will store the | 105 | // processing of external interrupts. Note that PLIC will store the |
| 106 | // XIRR directly into the xXirrValue field so that another XIRR will | 106 | // XIRR directly into the xXirrValue field so that another XIRR will |
| 107 | // not be presented until this one clears. The layout of the low | 107 | // not be presented until this one clears. The layout of the low |
| 108 | // 4-bytes of this Dword is upto SLIC - PLIC just checks whether the | 108 | // 4-bytes of this Dword is up to SLIC - PLIC just checks whether the |
| 109 | // entire Dword is zero or not. A non-zero value in the low order | 109 | // entire Dword is zero or not. A non-zero value in the low order |
| 110 | // 2-bytes will result in SLIC being granted the highest thread | 110 | // 2-bytes will result in SLIC being granted the highest thread |
| 111 | // priority upon return. A 0 will return to SLIC as medium priority. | 111 | // priority upon return. A 0 will return to SLIC as medium priority. |
diff --git a/arch/powerpc/include/asm/page_64.h b/arch/powerpc/include/asm/page_64.h index 932f88dcf6fa..812b2cd80aed 100644 --- a/arch/powerpc/include/asm/page_64.h +++ b/arch/powerpc/include/asm/page_64.h | |||
| @@ -169,7 +169,7 @@ do { \ | |||
| 169 | /* | 169 | /* |
| 170 | * This is the default if a program doesn't have a PT_GNU_STACK | 170 | * This is the default if a program doesn't have a PT_GNU_STACK |
| 171 | * program header entry. The PPC64 ELF ABI has a non executable stack | 171 | * program header entry. The PPC64 ELF ABI has a non executable stack |
| 172 | * stack by default, so in the absense of a PT_GNU_STACK program header | 172 | * stack by default, so in the absence of a PT_GNU_STACK program header |
| 173 | * we turn execute permission off. | 173 | * we turn execute permission off. |
| 174 | */ | 174 | */ |
| 175 | #define VM_STACK_DEFAULT_FLAGS32 (VM_READ | VM_WRITE | VM_EXEC | \ | 175 | #define VM_STACK_DEFAULT_FLAGS32 (VM_READ | VM_WRITE | VM_EXEC | \ |
diff --git a/arch/powerpc/include/asm/pasemi_dma.h b/arch/powerpc/include/asm/pasemi_dma.h index 19fd7933e2d9..eafa5a5f56de 100644 --- a/arch/powerpc/include/asm/pasemi_dma.h +++ b/arch/powerpc/include/asm/pasemi_dma.h | |||
| @@ -522,7 +522,7 @@ extern void *pasemi_dma_alloc_buf(struct pasemi_dmachan *chan, int size, | |||
| 522 | extern void pasemi_dma_free_buf(struct pasemi_dmachan *chan, int size, | 522 | extern void pasemi_dma_free_buf(struct pasemi_dmachan *chan, int size, |
| 523 | dma_addr_t *handle); | 523 | dma_addr_t *handle); |
| 524 | 524 | ||
| 525 | /* Routines to allocate flags (events) for channel syncronization */ | 525 | /* Routines to allocate flags (events) for channel synchronization */ |
| 526 | extern int pasemi_dma_alloc_flag(void); | 526 | extern int pasemi_dma_alloc_flag(void); |
| 527 | extern void pasemi_dma_free_flag(int flag); | 527 | extern void pasemi_dma_free_flag(int flag); |
| 528 | extern void pasemi_dma_set_flag(int flag); | 528 | extern void pasemi_dma_set_flag(int flag); |
diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h index 5e156e034fe2..b90dbf8e5cd9 100644 --- a/arch/powerpc/include/asm/pci-bridge.h +++ b/arch/powerpc/include/asm/pci-bridge.h | |||
| @@ -106,7 +106,7 @@ struct pci_controller { | |||
| 106 | * Used for variants of PCI indirect handling and possible quirks: | 106 | * Used for variants of PCI indirect handling and possible quirks: |
| 107 | * SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1 | 107 | * SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1 |
| 108 | * EXT_REG - provides access to PCI-e extended registers | 108 | * EXT_REG - provides access to PCI-e extended registers |
| 109 | * SURPRESS_PRIMARY_BUS - we surpress the setting of PCI_PRIMARY_BUS | 109 | * SURPRESS_PRIMARY_BUS - we suppress the setting of PCI_PRIMARY_BUS |
| 110 | * on Freescale PCI-e controllers since they used the PCI_PRIMARY_BUS | 110 | * on Freescale PCI-e controllers since they used the PCI_PRIMARY_BUS |
| 111 | * to determine which bus number to match on when generating type0 | 111 | * to determine which bus number to match on when generating type0 |
| 112 | * config cycles | 112 | * config cycles |
diff --git a/arch/powerpc/include/asm/pmac_feature.h b/arch/powerpc/include/asm/pmac_feature.h index 00eedc5a4e61..10902c9375d0 100644 --- a/arch/powerpc/include/asm/pmac_feature.h +++ b/arch/powerpc/include/asm/pmac_feature.h | |||
| @@ -53,8 +53,8 @@ | |||
| 53 | 53 | ||
| 54 | /* Here is the infamous serie of OHare based machines | 54 | /* Here is the infamous serie of OHare based machines |
| 55 | */ | 55 | */ |
| 56 | #define PMAC_TYPE_COMET 0x20 /* Beleived to be PowerBook 2400 */ | 56 | #define PMAC_TYPE_COMET 0x20 /* Believed to be PowerBook 2400 */ |
| 57 | #define PMAC_TYPE_HOOPER 0x21 /* Beleived to be PowerBook 3400 */ | 57 | #define PMAC_TYPE_HOOPER 0x21 /* Believed to be PowerBook 3400 */ |
| 58 | #define PMAC_TYPE_KANGA 0x22 /* PowerBook 3500 (first G3) */ | 58 | #define PMAC_TYPE_KANGA 0x22 /* PowerBook 3500 (first G3) */ |
| 59 | #define PMAC_TYPE_ALCHEMY 0x23 /* Alchemy motherboard base */ | 59 | #define PMAC_TYPE_ALCHEMY 0x23 /* Alchemy motherboard base */ |
| 60 | #define PMAC_TYPE_GAZELLE 0x24 /* Spartacus, some 5xxx/6xxx */ | 60 | #define PMAC_TYPE_GAZELLE 0x24 /* Spartacus, some 5xxx/6xxx */ |
diff --git a/arch/powerpc/include/asm/pte-common.h b/arch/powerpc/include/asm/pte-common.h index 76bb195e4f24..811f04ac3660 100644 --- a/arch/powerpc/include/asm/pte-common.h +++ b/arch/powerpc/include/asm/pte-common.h | |||
| @@ -86,7 +86,7 @@ extern unsigned long bad_call_to_PMD_PAGE_SIZE(void); | |||
| 86 | #define PTE_RPN_MASK (~((1UL<<PTE_RPN_SHIFT)-1)) | 86 | #define PTE_RPN_MASK (~((1UL<<PTE_RPN_SHIFT)-1)) |
| 87 | #endif | 87 | #endif |
| 88 | 88 | ||
| 89 | /* _PAGE_CHG_MASK masks of bits that are to be preserved accross | 89 | /* _PAGE_CHG_MASK masks of bits that are to be preserved across |
| 90 | * pgprot changes | 90 | * pgprot changes |
| 91 | */ | 91 | */ |
| 92 | #define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \ | 92 | #define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \ |
| @@ -174,7 +174,7 @@ extern unsigned long bad_call_to_PMD_PAGE_SIZE(void); | |||
| 174 | /* | 174 | /* |
| 175 | * Don't just check for any non zero bits in __PAGE_USER, since for book3e | 175 | * Don't just check for any non zero bits in __PAGE_USER, since for book3e |
| 176 | * and PTE_64BIT, PAGE_KERNEL_X contains _PAGE_BAP_SR which is also in | 176 | * and PTE_64BIT, PAGE_KERNEL_X contains _PAGE_BAP_SR which is also in |
| 177 | * _PAGE_USER. Need to explictly match _PAGE_BAP_UR bit in that case too. | 177 | * _PAGE_USER. Need to explicitly match _PAGE_BAP_UR bit in that case too. |
| 178 | */ | 178 | */ |
| 179 | #define pte_user(val) ((val & _PAGE_USER) == _PAGE_USER) | 179 | #define pte_user(val) ((val & _PAGE_USER) == _PAGE_USER) |
| 180 | 180 | ||
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h index 3b1a9b707362..b316794aa2b5 100644 --- a/arch/powerpc/include/asm/reg_booke.h +++ b/arch/powerpc/include/asm/reg_booke.h | |||
| @@ -2,7 +2,7 @@ | |||
| 2 | * Contains register definitions common to the Book E PowerPC | 2 | * Contains register definitions common to the Book E PowerPC |
| 3 | * specification. Notice that while the IBM-40x series of CPUs | 3 | * specification. Notice that while the IBM-40x series of CPUs |
| 4 | * are not true Book E PowerPCs, they borrowed a number of features | 4 | * are not true Book E PowerPCs, they borrowed a number of features |
| 5 | * before Book E was finalized, and are included here as well. Unfortunatly, | 5 | * before Book E was finalized, and are included here as well. Unfortunately, |
| 6 | * they sometimes used different locations than true Book E CPUs did. | 6 | * they sometimes used different locations than true Book E CPUs did. |
| 7 | * | 7 | * |
| 8 | * This program is free software; you can redistribute it and/or | 8 | * This program is free software; you can redistribute it and/or |
diff --git a/arch/powerpc/include/asm/spu_priv1.h b/arch/powerpc/include/asm/spu_priv1.h index 25020a34ce7f..d8f5c60f61c1 100644 --- a/arch/powerpc/include/asm/spu_priv1.h +++ b/arch/powerpc/include/asm/spu_priv1.h | |||
| @@ -223,7 +223,7 @@ spu_disable_spu (struct spu_context *ctx) | |||
| 223 | } | 223 | } |
| 224 | 224 | ||
| 225 | /* | 225 | /* |
| 226 | * The declarations folowing are put here for convenience | 226 | * The declarations following are put here for convenience |
| 227 | * and only intended to be used by the platform setup code. | 227 | * and only intended to be used by the platform setup code. |
| 228 | */ | 228 | */ |
| 229 | 229 | ||
diff --git a/arch/powerpc/include/asm/uninorth.h b/arch/powerpc/include/asm/uninorth.h index f737732c3861..ae9c899c8a6d 100644 --- a/arch/powerpc/include/asm/uninorth.h +++ b/arch/powerpc/include/asm/uninorth.h | |||
| @@ -60,7 +60,7 @@ | |||
| 60 | * | 60 | * |
| 61 | * Obviously, the GART is not cache coherent and so any change to it | 61 | * Obviously, the GART is not cache coherent and so any change to it |
| 62 | * must be flushed to memory (or maybe just make the GART space non | 62 | * must be flushed to memory (or maybe just make the GART space non |
| 63 | * cachable). AGP memory itself doens't seem to be cache coherent neither. | 63 | * cachable). AGP memory itself does't seem to be cache coherent neither. |
| 64 | * | 64 | * |
| 65 | * In order to invalidate the GART (which is probably necessary to inval | 65 | * In order to invalidate the GART (which is probably necessary to inval |
| 66 | * the bridge internal TLBs), the following sequence has to be written, | 66 | * the bridge internal TLBs), the following sequence has to be written, |
diff --git a/arch/powerpc/include/asm/vdso_datapage.h b/arch/powerpc/include/asm/vdso_datapage.h index 25e39220e89c..b73a8199f161 100644 --- a/arch/powerpc/include/asm/vdso_datapage.h +++ b/arch/powerpc/include/asm/vdso_datapage.h | |||
| @@ -57,7 +57,7 @@ struct vdso_data { | |||
| 57 | } version; | 57 | } version; |
| 58 | 58 | ||
| 59 | /* Note about the platform flags: it now only contains the lpar | 59 | /* Note about the platform flags: it now only contains the lpar |
| 60 | * bit. The actual platform number is dead and burried | 60 | * bit. The actual platform number is dead and buried |
| 61 | */ | 61 | */ |
| 62 | __u32 platform; /* Platform flags 0x18 */ | 62 | __u32 platform; /* Platform flags 0x18 */ |
| 63 | __u32 processor; /* Processor type 0x1C */ | 63 | __u32 processor; /* Processor type 0x1C */ |
diff --git a/arch/powerpc/kernel/btext.c b/arch/powerpc/kernel/btext.c index 625942ae5585..60b3e377b1e4 100644 --- a/arch/powerpc/kernel/btext.c +++ b/arch/powerpc/kernel/btext.c | |||
| @@ -99,7 +99,7 @@ void __init btext_prepare_BAT(void) | |||
| 99 | 99 | ||
| 100 | /* This function can be used to enable the early boot text when doing | 100 | /* This function can be used to enable the early boot text when doing |
| 101 | * OF booting or within bootx init. It must be followed by a btext_unmap() | 101 | * OF booting or within bootx init. It must be followed by a btext_unmap() |
| 102 | * call before the logical address becomes unuseable | 102 | * call before the logical address becomes unusable |
| 103 | */ | 103 | */ |
| 104 | void __init btext_setup_display(int width, int height, int depth, int pitch, | 104 | void __init btext_setup_display(int width, int height, int depth, int pitch, |
| 105 | unsigned long address) | 105 | unsigned long address) |
diff --git a/arch/powerpc/kernel/exceptions-64e.S b/arch/powerpc/kernel/exceptions-64e.S index 5c43063d2506..9651acc3504a 100644 --- a/arch/powerpc/kernel/exceptions-64e.S +++ b/arch/powerpc/kernel/exceptions-64e.S | |||
| @@ -379,7 +379,7 @@ interrupt_end_book3e: | |||
| 379 | mfspr r13,SPRN_SPRG_PACA /* get our PACA */ | 379 | mfspr r13,SPRN_SPRG_PACA /* get our PACA */ |
| 380 | b system_call_common | 380 | b system_call_common |
| 381 | 381 | ||
| 382 | /* Auxillary Processor Unavailable Interrupt */ | 382 | /* Auxiliary Processor Unavailable Interrupt */ |
| 383 | START_EXCEPTION(ap_unavailable); | 383 | START_EXCEPTION(ap_unavailable); |
| 384 | NORMAL_EXCEPTION_PROLOG(0xf20, PROLOG_ADDITION_NONE) | 384 | NORMAL_EXCEPTION_PROLOG(0xf20, PROLOG_ADDITION_NONE) |
| 385 | EXCEPTION_COMMON(0xf20, PACA_EXGEN, INTS_KEEP) | 385 | EXCEPTION_COMMON(0xf20, PACA_EXGEN, INTS_KEEP) |
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S index c532cb2c927a..aeb739e18769 100644 --- a/arch/powerpc/kernel/exceptions-64s.S +++ b/arch/powerpc/kernel/exceptions-64s.S | |||
| @@ -5,7 +5,7 @@ | |||
| 5 | * handling and other fixed offset specific things. | 5 | * handling and other fixed offset specific things. |
| 6 | * | 6 | * |
| 7 | * This file is meant to be #included from head_64.S due to | 7 | * This file is meant to be #included from head_64.S due to |
| 8 | * position dependant assembly. | 8 | * position dependent assembly. |
| 9 | * | 9 | * |
| 10 | * Most of this originates from head_64.S and thus has the same | 10 | * Most of this originates from head_64.S and thus has the same |
| 11 | * copyright history. | 11 | * copyright history. |
diff --git a/arch/powerpc/kernel/head_40x.S b/arch/powerpc/kernel/head_40x.S index 9dd21a8c4d52..a91626d87fc9 100644 --- a/arch/powerpc/kernel/head_40x.S +++ b/arch/powerpc/kernel/head_40x.S | |||
| @@ -766,7 +766,7 @@ DataAccess: | |||
| 766 | * miss get to this point to load the TLB. | 766 | * miss get to this point to load the TLB. |
| 767 | * r10 - TLB_TAG value | 767 | * r10 - TLB_TAG value |
| 768 | * r11 - Linux PTE | 768 | * r11 - Linux PTE |
| 769 | * r12, r9 - avilable to use | 769 | * r12, r9 - available to use |
| 770 | * PID - loaded with proper value when we get here | 770 | * PID - loaded with proper value when we get here |
| 771 | * Upon exit, we reload everything and RFI. | 771 | * Upon exit, we reload everything and RFI. |
| 772 | * Actually, it will fit now, but oh well.....a common place | 772 | * Actually, it will fit now, but oh well.....a common place |
diff --git a/arch/powerpc/kernel/head_44x.S b/arch/powerpc/kernel/head_44x.S index cbb3436b592d..5e12b741ba5f 100644 --- a/arch/powerpc/kernel/head_44x.S +++ b/arch/powerpc/kernel/head_44x.S | |||
| @@ -178,7 +178,7 @@ interrupt_base: | |||
| 178 | NORMAL_EXCEPTION_PROLOG | 178 | NORMAL_EXCEPTION_PROLOG |
| 179 | EXC_XFER_EE_LITE(0x0c00, DoSyscall) | 179 | EXC_XFER_EE_LITE(0x0c00, DoSyscall) |
| 180 | 180 | ||
| 181 | /* Auxillary Processor Unavailable Interrupt */ | 181 | /* Auxiliary Processor Unavailable Interrupt */ |
| 182 | EXCEPTION(0x2020, AuxillaryProcessorUnavailable, unknown_exception, EXC_XFER_EE) | 182 | EXCEPTION(0x2020, AuxillaryProcessorUnavailable, unknown_exception, EXC_XFER_EE) |
| 183 | 183 | ||
| 184 | /* Decrementer Interrupt */ | 184 | /* Decrementer Interrupt */ |
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S index 271140b38b6f..3a319f9c9d3e 100644 --- a/arch/powerpc/kernel/head_64.S +++ b/arch/powerpc/kernel/head_64.S | |||
| @@ -40,7 +40,7 @@ | |||
| 40 | #include <asm/kvm_book3s_asm.h> | 40 | #include <asm/kvm_book3s_asm.h> |
| 41 | #include <asm/ptrace.h> | 41 | #include <asm/ptrace.h> |
| 42 | 42 | ||
| 43 | /* The physical memory is layed out such that the secondary processor | 43 | /* The physical memory is laid out such that the secondary processor |
| 44 | * spin code sits at 0x0000...0x00ff. On server, the vectors follow | 44 | * spin code sits at 0x0000...0x00ff. On server, the vectors follow |
| 45 | * using the layout described in exceptions-64s.S | 45 | * using the layout described in exceptions-64s.S |
| 46 | */ | 46 | */ |
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S index 3e02710d9562..5ecf54cfa7d4 100644 --- a/arch/powerpc/kernel/head_fsl_booke.S +++ b/arch/powerpc/kernel/head_fsl_booke.S | |||
| @@ -326,7 +326,7 @@ interrupt_base: | |||
| 326 | NORMAL_EXCEPTION_PROLOG | 326 | NORMAL_EXCEPTION_PROLOG |
| 327 | EXC_XFER_EE_LITE(0x0c00, DoSyscall) | 327 | EXC_XFER_EE_LITE(0x0c00, DoSyscall) |
| 328 | 328 | ||
| 329 | /* Auxillary Processor Unavailable Interrupt */ | 329 | /* Auxiliary Processor Unavailable Interrupt */ |
| 330 | EXCEPTION(0x2900, AuxillaryProcessorUnavailable, unknown_exception, EXC_XFER_EE) | 330 | EXCEPTION(0x2900, AuxillaryProcessorUnavailable, unknown_exception, EXC_XFER_EE) |
| 331 | 331 | ||
| 332 | /* Decrementer Interrupt */ | 332 | /* Decrementer Interrupt */ |
diff --git a/arch/powerpc/kernel/l2cr_6xx.S b/arch/powerpc/kernel/l2cr_6xx.S index 2a2f3c3f6d80..97ec8557f974 100644 --- a/arch/powerpc/kernel/l2cr_6xx.S +++ b/arch/powerpc/kernel/l2cr_6xx.S | |||
| @@ -151,7 +151,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) | |||
| 151 | /**** Might be a good idea to set L2DO here - to prevent instructions | 151 | /**** Might be a good idea to set L2DO here - to prevent instructions |
| 152 | from getting into the cache. But since we invalidate | 152 | from getting into the cache. But since we invalidate |
| 153 | the next time we enable the cache it doesn't really matter. | 153 | the next time we enable the cache it doesn't really matter. |
| 154 | Don't do this unless you accomodate all processor variations. | 154 | Don't do this unless you accommodate all processor variations. |
| 155 | The bit moved on the 7450..... | 155 | The bit moved on the 7450..... |
| 156 | ****/ | 156 | ****/ |
| 157 | 157 | ||
diff --git a/arch/powerpc/kernel/lparcfg.c b/arch/powerpc/kernel/lparcfg.c index 16468362ad57..301db65f05a1 100644 --- a/arch/powerpc/kernel/lparcfg.c +++ b/arch/powerpc/kernel/lparcfg.c | |||
| @@ -262,7 +262,7 @@ static void parse_ppp_data(struct seq_file *m) | |||
| 262 | seq_printf(m, "system_active_processors=%d\n", | 262 | seq_printf(m, "system_active_processors=%d\n", |
| 263 | ppp_data.active_system_procs); | 263 | ppp_data.active_system_procs); |
| 264 | 264 | ||
| 265 | /* pool related entries are apropriate for shared configs */ | 265 | /* pool related entries are appropriate for shared configs */ |
| 266 | if (lppaca_of(0).shared_proc) { | 266 | if (lppaca_of(0).shared_proc) { |
| 267 | unsigned long pool_idle_time, pool_procs; | 267 | unsigned long pool_idle_time, pool_procs; |
| 268 | 268 | ||
diff --git a/arch/powerpc/kernel/perf_event.c b/arch/powerpc/kernel/perf_event.c index 97e0ae414940..c4063b7f49a0 100644 --- a/arch/powerpc/kernel/perf_event.c +++ b/arch/powerpc/kernel/perf_event.c | |||
| @@ -759,7 +759,7 @@ static int power_pmu_add(struct perf_event *event, int ef_flags) | |||
| 759 | 759 | ||
| 760 | /* | 760 | /* |
| 761 | * If group events scheduling transaction was started, | 761 | * If group events scheduling transaction was started, |
| 762 | * skip the schedulability test here, it will be peformed | 762 | * skip the schedulability test here, it will be performed |
| 763 | * at commit time(->commit_txn) as a whole | 763 | * at commit time(->commit_txn) as a whole |
| 764 | */ | 764 | */ |
| 765 | if (cpuhw->group_flag & PERF_EVENT_TXN) | 765 | if (cpuhw->group_flag & PERF_EVENT_TXN) |
diff --git a/arch/powerpc/kernel/ppc_save_regs.S b/arch/powerpc/kernel/ppc_save_regs.S index e83ba3f078e4..1b1787d52896 100644 --- a/arch/powerpc/kernel/ppc_save_regs.S +++ b/arch/powerpc/kernel/ppc_save_regs.S | |||
| @@ -15,7 +15,7 @@ | |||
| 15 | 15 | ||
| 16 | /* | 16 | /* |
| 17 | * Grab the register values as they are now. | 17 | * Grab the register values as they are now. |
| 18 | * This won't do a particularily good job because we really | 18 | * This won't do a particularly good job because we really |
| 19 | * want our caller's caller's registers, and our caller has | 19 | * want our caller's caller's registers, and our caller has |
| 20 | * already executed its prologue. | 20 | * already executed its prologue. |
| 21 | * ToDo: We could reach back into the caller's save area to do | 21 | * ToDo: We could reach back into the caller's save area to do |
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c index 05b7139d6a27..e74fa12afc82 100644 --- a/arch/powerpc/kernel/prom.c +++ b/arch/powerpc/kernel/prom.c | |||
| @@ -683,7 +683,7 @@ void __init early_init_devtree(void *params) | |||
| 683 | #endif | 683 | #endif |
| 684 | 684 | ||
| 685 | #ifdef CONFIG_PHYP_DUMP | 685 | #ifdef CONFIG_PHYP_DUMP |
| 686 | /* scan tree to see if dump occured during last boot */ | 686 | /* scan tree to see if dump occurred during last boot */ |
| 687 | of_scan_flat_dt(early_init_dt_scan_phyp_dump, NULL); | 687 | of_scan_flat_dt(early_init_dt_scan_phyp_dump, NULL); |
| 688 | #endif | 688 | #endif |
| 689 | 689 | ||
| @@ -739,7 +739,7 @@ void __init early_init_devtree(void *params) | |||
| 739 | 739 | ||
| 740 | DBG("Scanning CPUs ...\n"); | 740 | DBG("Scanning CPUs ...\n"); |
| 741 | 741 | ||
| 742 | /* Retreive CPU related informations from the flat tree | 742 | /* Retrieve CPU related informations from the flat tree |
| 743 | * (altivec support, boot CPU ID, ...) | 743 | * (altivec support, boot CPU ID, ...) |
| 744 | */ | 744 | */ |
| 745 | of_scan_flat_dt(early_init_dt_scan_cpus, NULL); | 745 | of_scan_flat_dt(early_init_dt_scan_cpus, NULL); |
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c index 895b082f1e48..55613e33e263 100644 --- a/arch/powerpc/kernel/ptrace.c +++ b/arch/powerpc/kernel/ptrace.c | |||
| @@ -463,7 +463,7 @@ static int vr_set(struct task_struct *target, const struct user_regset *regset, | |||
| 463 | #ifdef CONFIG_VSX | 463 | #ifdef CONFIG_VSX |
| 464 | /* | 464 | /* |
| 465 | * Currently to set and and get all the vsx state, you need to call | 465 | * Currently to set and and get all the vsx state, you need to call |
| 466 | * the fp and VMX calls aswell. This only get/sets the lower 32 | 466 | * the fp and VMX calls as well. This only get/sets the lower 32 |
| 467 | * 128bit VSX registers. | 467 | * 128bit VSX registers. |
| 468 | */ | 468 | */ |
| 469 | 469 | ||
diff --git a/arch/powerpc/kernel/rtasd.c b/arch/powerpc/kernel/rtasd.c index 7980ec0e1e1a..67f6c3b51357 100644 --- a/arch/powerpc/kernel/rtasd.c +++ b/arch/powerpc/kernel/rtasd.c | |||
| @@ -465,7 +465,7 @@ static void start_event_scan(void) | |||
| 465 | pr_debug("rtasd: will sleep for %d milliseconds\n", | 465 | pr_debug("rtasd: will sleep for %d milliseconds\n", |
| 466 | (30000 / rtas_event_scan_rate)); | 466 | (30000 / rtas_event_scan_rate)); |
| 467 | 467 | ||
| 468 | /* Retreive errors from nvram if any */ | 468 | /* Retrieve errors from nvram if any */ |
| 469 | retreive_nvram_error_log(); | 469 | retreive_nvram_error_log(); |
| 470 | 470 | ||
| 471 | schedule_delayed_work_on(cpumask_first(cpu_online_mask), | 471 | schedule_delayed_work_on(cpumask_first(cpu_online_mask), |
diff --git a/arch/powerpc/kernel/swsusp_32.S b/arch/powerpc/kernel/swsusp_32.S index b0754e237438..ba4dee3d233f 100644 --- a/arch/powerpc/kernel/swsusp_32.S +++ b/arch/powerpc/kernel/swsusp_32.S | |||
| @@ -143,7 +143,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) | |||
| 143 | 143 | ||
| 144 | /* Disable MSR:DR to make sure we don't take a TLB or | 144 | /* Disable MSR:DR to make sure we don't take a TLB or |
| 145 | * hash miss during the copy, as our hash table will | 145 | * hash miss during the copy, as our hash table will |
| 146 | * for a while be unuseable. For .text, we assume we are | 146 | * for a while be unusable. For .text, we assume we are |
| 147 | * covered by a BAT. This works only for non-G5 at this | 147 | * covered by a BAT. This works only for non-G5 at this |
| 148 | * point. G5 will need a better approach, possibly using | 148 | * point. G5 will need a better approach, possibly using |
| 149 | * a small temporary hash table filled with large mappings, | 149 | * a small temporary hash table filled with large mappings, |
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c index bd74fac169be..5ddb801bc154 100644 --- a/arch/powerpc/kernel/traps.c +++ b/arch/powerpc/kernel/traps.c | |||
| @@ -959,7 +959,7 @@ void __kprobes program_check_exception(struct pt_regs *regs) | |||
| 959 | * ESR_DST (!?) or 0. In the process of chasing this with the | 959 | * ESR_DST (!?) or 0. In the process of chasing this with the |
| 960 | * hardware people - not sure if it can happen on any illegal | 960 | * hardware people - not sure if it can happen on any illegal |
| 961 | * instruction or only on FP instructions, whether there is a | 961 | * instruction or only on FP instructions, whether there is a |
| 962 | * pattern to occurences etc. -dgibson 31/Mar/2003 */ | 962 | * pattern to occurrences etc. -dgibson 31/Mar/2003 */ |
| 963 | switch (do_mathemu(regs)) { | 963 | switch (do_mathemu(regs)) { |
| 964 | case 0: | 964 | case 0: |
| 965 | emulate_single_step(regs); | 965 | emulate_single_step(regs); |
diff --git a/arch/powerpc/kernel/udbg_16550.c b/arch/powerpc/kernel/udbg_16550.c index b4b167b33643..baa33a7517bc 100644 --- a/arch/powerpc/kernel/udbg_16550.c +++ b/arch/powerpc/kernel/udbg_16550.c | |||
| @@ -1,5 +1,5 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * udbg for NS16550 compatable serial ports | 2 | * udbg for NS16550 compatible serial ports |
| 3 | * | 3 | * |
| 4 | * Copyright (C) 2001-2005 PPC 64 Team, IBM Corp | 4 | * Copyright (C) 2001-2005 PPC 64 Team, IBM Corp |
| 5 | * | 5 | * |
diff --git a/arch/powerpc/kernel/vdso32/sigtramp.S b/arch/powerpc/kernel/vdso32/sigtramp.S index 68d49dd71dcc..cf0c9c9c24f9 100644 --- a/arch/powerpc/kernel/vdso32/sigtramp.S +++ b/arch/powerpc/kernel/vdso32/sigtramp.S | |||
| @@ -19,7 +19,7 @@ | |||
| 19 | 19 | ||
| 20 | /* The nop here is a hack. The dwarf2 unwind routines subtract 1 from | 20 | /* The nop here is a hack. The dwarf2 unwind routines subtract 1 from |
| 21 | the return address to get an address in the middle of the presumed | 21 | the return address to get an address in the middle of the presumed |
| 22 | call instruction. Since we don't have a call here, we artifically | 22 | call instruction. Since we don't have a call here, we artificially |
| 23 | extend the range covered by the unwind info by adding a nop before | 23 | extend the range covered by the unwind info by adding a nop before |
| 24 | the real start. */ | 24 | the real start. */ |
| 25 | nop | 25 | nop |
diff --git a/arch/powerpc/kernel/vdso64/sigtramp.S b/arch/powerpc/kernel/vdso64/sigtramp.S index 59eb59bb4082..45ea281e9a21 100644 --- a/arch/powerpc/kernel/vdso64/sigtramp.S +++ b/arch/powerpc/kernel/vdso64/sigtramp.S | |||
| @@ -20,7 +20,7 @@ | |||
| 20 | 20 | ||
| 21 | /* The nop here is a hack. The dwarf2 unwind routines subtract 1 from | 21 | /* The nop here is a hack. The dwarf2 unwind routines subtract 1 from |
| 22 | the return address to get an address in the middle of the presumed | 22 | the return address to get an address in the middle of the presumed |
| 23 | call instruction. Since we don't have a call here, we artifically | 23 | call instruction. Since we don't have a call here, we artificially |
| 24 | extend the range covered by the unwind info by padding before the | 24 | extend the range covered by the unwind info by padding before the |
| 25 | real start. */ | 25 | real start. */ |
| 26 | nop | 26 | nop |
diff --git a/arch/powerpc/mm/hash_low_64.S b/arch/powerpc/mm/hash_low_64.S index 3079f6b44cf5..5b7dd4ea02b5 100644 --- a/arch/powerpc/mm/hash_low_64.S +++ b/arch/powerpc/mm/hash_low_64.S | |||
| @@ -192,8 +192,8 @@ htab_insert_pte: | |||
| 192 | rldicr r3,r0,3,63-3 /* r3 = (hash & mask) << 3 */ | 192 | rldicr r3,r0,3,63-3 /* r3 = (hash & mask) << 3 */ |
| 193 | 193 | ||
| 194 | /* Call ppc_md.hpte_insert */ | 194 | /* Call ppc_md.hpte_insert */ |
| 195 | ld r6,STK_PARM(r4)(r1) /* Retreive new pp bits */ | 195 | ld r6,STK_PARM(r4)(r1) /* Retrieve new pp bits */ |
| 196 | mr r4,r29 /* Retreive va */ | 196 | mr r4,r29 /* Retrieve va */ |
| 197 | li r7,0 /* !bolted, !secondary */ | 197 | li r7,0 /* !bolted, !secondary */ |
| 198 | li r8,MMU_PAGE_4K /* page size */ | 198 | li r8,MMU_PAGE_4K /* page size */ |
| 199 | ld r9,STK_PARM(r9)(r1) /* segment size */ | 199 | ld r9,STK_PARM(r9)(r1) /* segment size */ |
| @@ -215,8 +215,8 @@ _GLOBAL(htab_call_hpte_insert1) | |||
| 215 | rldicr r3,r0,3,63-3 /* r0 = (~hash & mask) << 3 */ | 215 | rldicr r3,r0,3,63-3 /* r0 = (~hash & mask) << 3 */ |
| 216 | 216 | ||
| 217 | /* Call ppc_md.hpte_insert */ | 217 | /* Call ppc_md.hpte_insert */ |
| 218 | ld r6,STK_PARM(r4)(r1) /* Retreive new pp bits */ | 218 | ld r6,STK_PARM(r4)(r1) /* Retrieve new pp bits */ |
| 219 | mr r4,r29 /* Retreive va */ | 219 | mr r4,r29 /* Retrieve va */ |
| 220 | li r7,HPTE_V_SECONDARY /* !bolted, secondary */ | 220 | li r7,HPTE_V_SECONDARY /* !bolted, secondary */ |
| 221 | li r8,MMU_PAGE_4K /* page size */ | 221 | li r8,MMU_PAGE_4K /* page size */ |
| 222 | ld r9,STK_PARM(r9)(r1) /* segment size */ | 222 | ld r9,STK_PARM(r9)(r1) /* segment size */ |
| @@ -495,8 +495,8 @@ htab_special_pfn: | |||
| 495 | rldicr r3,r0,3,63-3 /* r0 = (hash & mask) << 3 */ | 495 | rldicr r3,r0,3,63-3 /* r0 = (hash & mask) << 3 */ |
| 496 | 496 | ||
| 497 | /* Call ppc_md.hpte_insert */ | 497 | /* Call ppc_md.hpte_insert */ |
| 498 | ld r6,STK_PARM(r4)(r1) /* Retreive new pp bits */ | 498 | ld r6,STK_PARM(r4)(r1) /* Retrieve new pp bits */ |
| 499 | mr r4,r29 /* Retreive va */ | 499 | mr r4,r29 /* Retrieve va */ |
| 500 | li r7,0 /* !bolted, !secondary */ | 500 | li r7,0 /* !bolted, !secondary */ |
| 501 | li r8,MMU_PAGE_4K /* page size */ | 501 | li r8,MMU_PAGE_4K /* page size */ |
| 502 | ld r9,STK_PARM(r9)(r1) /* segment size */ | 502 | ld r9,STK_PARM(r9)(r1) /* segment size */ |
| @@ -522,8 +522,8 @@ _GLOBAL(htab_call_hpte_insert1) | |||
| 522 | rldicr r3,r0,3,63-3 /* r0 = (~hash & mask) << 3 */ | 522 | rldicr r3,r0,3,63-3 /* r0 = (~hash & mask) << 3 */ |
| 523 | 523 | ||
| 524 | /* Call ppc_md.hpte_insert */ | 524 | /* Call ppc_md.hpte_insert */ |
| 525 | ld r6,STK_PARM(r4)(r1) /* Retreive new pp bits */ | 525 | ld r6,STK_PARM(r4)(r1) /* Retrieve new pp bits */ |
| 526 | mr r4,r29 /* Retreive va */ | 526 | mr r4,r29 /* Retrieve va */ |
| 527 | li r7,HPTE_V_SECONDARY /* !bolted, secondary */ | 527 | li r7,HPTE_V_SECONDARY /* !bolted, secondary */ |
| 528 | li r8,MMU_PAGE_4K /* page size */ | 528 | li r8,MMU_PAGE_4K /* page size */ |
| 529 | ld r9,STK_PARM(r9)(r1) /* segment size */ | 529 | ld r9,STK_PARM(r9)(r1) /* segment size */ |
| @@ -813,8 +813,8 @@ ht64_insert_pte: | |||
| 813 | rldicr r3,r0,3,63-3 /* r0 = (hash & mask) << 3 */ | 813 | rldicr r3,r0,3,63-3 /* r0 = (hash & mask) << 3 */ |
| 814 | 814 | ||
| 815 | /* Call ppc_md.hpte_insert */ | 815 | /* Call ppc_md.hpte_insert */ |
| 816 | ld r6,STK_PARM(r4)(r1) /* Retreive new pp bits */ | 816 | ld r6,STK_PARM(r4)(r1) /* Retrieve new pp bits */ |
| 817 | mr r4,r29 /* Retreive va */ | 817 | mr r4,r29 /* Retrieve va */ |
| 818 | li r7,0 /* !bolted, !secondary */ | 818 | li r7,0 /* !bolted, !secondary */ |
| 819 | li r8,MMU_PAGE_64K | 819 | li r8,MMU_PAGE_64K |
| 820 | ld r9,STK_PARM(r9)(r1) /* segment size */ | 820 | ld r9,STK_PARM(r9)(r1) /* segment size */ |
| @@ -836,8 +836,8 @@ _GLOBAL(ht64_call_hpte_insert1) | |||
| 836 | rldicr r3,r0,3,63-3 /* r0 = (~hash & mask) << 3 */ | 836 | rldicr r3,r0,3,63-3 /* r0 = (~hash & mask) << 3 */ |
| 837 | 837 | ||
| 838 | /* Call ppc_md.hpte_insert */ | 838 | /* Call ppc_md.hpte_insert */ |
| 839 | ld r6,STK_PARM(r4)(r1) /* Retreive new pp bits */ | 839 | ld r6,STK_PARM(r4)(r1) /* Retrieve new pp bits */ |
| 840 | mr r4,r29 /* Retreive va */ | 840 | mr r4,r29 /* Retrieve va */ |
| 841 | li r7,HPTE_V_SECONDARY /* !bolted, secondary */ | 841 | li r7,HPTE_V_SECONDARY /* !bolted, secondary */ |
| 842 | li r8,MMU_PAGE_64K | 842 | li r8,MMU_PAGE_64K |
| 843 | ld r9,STK_PARM(r9)(r1) /* segment size */ | 843 | ld r9,STK_PARM(r9)(r1) /* segment size */ |
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c index a5991facddce..58a022d0f463 100644 --- a/arch/powerpc/mm/hash_utils_64.c +++ b/arch/powerpc/mm/hash_utils_64.c | |||
| @@ -753,7 +753,7 @@ void __cpuinit early_init_mmu_secondary(void) | |||
| 753 | mtspr(SPRN_SDR1, _SDR1); | 753 | mtspr(SPRN_SDR1, _SDR1); |
| 754 | 754 | ||
| 755 | /* Initialize STAB/SLB. We use a virtual address as it works | 755 | /* Initialize STAB/SLB. We use a virtual address as it works |
| 756 | * in real mode on pSeries and we want a virutal address on | 756 | * in real mode on pSeries and we want a virtual address on |
| 757 | * iSeries anyway | 757 | * iSeries anyway |
| 758 | */ | 758 | */ |
| 759 | if (cpu_has_feature(CPU_FTR_SLB)) | 759 | if (cpu_has_feature(CPU_FTR_SLB)) |
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c index a66499650909..57e545b84bf1 100644 --- a/arch/powerpc/mm/mem.c +++ b/arch/powerpc/mm/mem.c | |||
| @@ -424,7 +424,7 @@ void clear_user_page(void *page, unsigned long vaddr, struct page *pg) | |||
| 424 | clear_page(page); | 424 | clear_page(page); |
| 425 | 425 | ||
| 426 | /* | 426 | /* |
| 427 | * We shouldnt have to do this, but some versions of glibc | 427 | * We shouldn't have to do this, but some versions of glibc |
| 428 | * require it (ld.so assumes zero filled pages are icache clean) | 428 | * require it (ld.so assumes zero filled pages are icache clean) |
| 429 | * - Anton | 429 | * - Anton |
| 430 | */ | 430 | */ |
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c index 0dc95c0aa3be..5ec1dad2a19d 100644 --- a/arch/powerpc/mm/numa.c +++ b/arch/powerpc/mm/numa.c | |||
| @@ -440,11 +440,11 @@ static void read_drconf_cell(struct of_drconf_cell *drmem, const u32 **cellp) | |||
| 440 | } | 440 | } |
| 441 | 441 | ||
| 442 | /* | 442 | /* |
| 443 | * Retreive and validate the ibm,dynamic-memory property of the device tree. | 443 | * Retrieve and validate the ibm,dynamic-memory property of the device tree. |
| 444 | * | 444 | * |
| 445 | * The layout of the ibm,dynamic-memory property is a number N of memblock | 445 | * The layout of the ibm,dynamic-memory property is a number N of memblock |
| 446 | * list entries followed by N memblock list entries. Each memblock list entry | 446 | * list entries followed by N memblock list entries. Each memblock list entry |
| 447 | * contains information as layed out in the of_drconf_cell struct above. | 447 | * contains information as laid out in the of_drconf_cell struct above. |
| 448 | */ | 448 | */ |
| 449 | static int of_get_drconf_memory(struct device_node *memory, const u32 **dm) | 449 | static int of_get_drconf_memory(struct device_node *memory, const u32 **dm) |
| 450 | { | 450 | { |
| @@ -468,7 +468,7 @@ static int of_get_drconf_memory(struct device_node *memory, const u32 **dm) | |||
| 468 | } | 468 | } |
| 469 | 469 | ||
| 470 | /* | 470 | /* |
| 471 | * Retreive and validate the ibm,lmb-size property for drconf memory | 471 | * Retrieve and validate the ibm,lmb-size property for drconf memory |
| 472 | * from the device tree. | 472 | * from the device tree. |
| 473 | */ | 473 | */ |
| 474 | static u64 of_get_lmb_size(struct device_node *memory) | 474 | static u64 of_get_lmb_size(struct device_node *memory) |
| @@ -490,7 +490,7 @@ struct assoc_arrays { | |||
| 490 | }; | 490 | }; |
| 491 | 491 | ||
| 492 | /* | 492 | /* |
| 493 | * Retreive and validate the list of associativity arrays for drconf | 493 | * Retrieve and validate the list of associativity arrays for drconf |
| 494 | * memory from the ibm,associativity-lookup-arrays property of the | 494 | * memory from the ibm,associativity-lookup-arrays property of the |
| 495 | * device tree.. | 495 | * device tree.. |
| 496 | * | 496 | * |
| @@ -604,7 +604,7 @@ static int __cpuinit cpu_numa_callback(struct notifier_block *nfb, | |||
| 604 | * Returns the size the region should have to enforce the memory limit. | 604 | * Returns the size the region should have to enforce the memory limit. |
| 605 | * This will either be the original value of size, a truncated value, | 605 | * This will either be the original value of size, a truncated value, |
| 606 | * or zero. If the returned value of size is 0 the region should be | 606 | * or zero. If the returned value of size is 0 the region should be |
| 607 | * discarded as it lies wholy above the memory limit. | 607 | * discarded as it lies wholly above the memory limit. |
| 608 | */ | 608 | */ |
| 609 | static unsigned long __init numa_enforce_memory_limit(unsigned long start, | 609 | static unsigned long __init numa_enforce_memory_limit(unsigned long start, |
| 610 | unsigned long size) | 610 | unsigned long size) |
diff --git a/arch/powerpc/mm/tlb_low_64e.S b/arch/powerpc/mm/tlb_low_64e.S index 222815112e45..af0892209417 100644 --- a/arch/powerpc/mm/tlb_low_64e.S +++ b/arch/powerpc/mm/tlb_low_64e.S | |||
| @@ -192,7 +192,7 @@ normal_tlb_miss: | |||
| 192 | or r10,r15,r14 | 192 | or r10,r15,r14 |
| 193 | 193 | ||
| 194 | BEGIN_MMU_FTR_SECTION | 194 | BEGIN_MMU_FTR_SECTION |
| 195 | /* Set the TLB reservation and seach for existing entry. Then load | 195 | /* Set the TLB reservation and search for existing entry. Then load |
| 196 | * the entry. | 196 | * the entry. |
| 197 | */ | 197 | */ |
| 198 | PPC_TLBSRX_DOT(0,r16) | 198 | PPC_TLBSRX_DOT(0,r16) |
| @@ -425,7 +425,7 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_USE_TLBRSRV) | |||
| 425 | 425 | ||
| 426 | virt_page_table_tlb_miss_fault: | 426 | virt_page_table_tlb_miss_fault: |
| 427 | /* If we fault here, things are a little bit tricky. We need to call | 427 | /* If we fault here, things are a little bit tricky. We need to call |
| 428 | * either data or instruction store fault, and we need to retreive | 428 | * either data or instruction store fault, and we need to retrieve |
| 429 | * the original fault address and ESR (for data). | 429 | * the original fault address and ESR (for data). |
| 430 | * | 430 | * |
| 431 | * The thing is, we know that in normal circumstances, this is | 431 | * The thing is, we know that in normal circumstances, this is |
diff --git a/arch/powerpc/oprofile/op_model_cell.c b/arch/powerpc/oprofile/op_model_cell.c index c4d2b7167568..cb515cff745c 100644 --- a/arch/powerpc/oprofile/op_model_cell.c +++ b/arch/powerpc/oprofile/op_model_cell.c | |||
| @@ -67,7 +67,7 @@ | |||
| 67 | 67 | ||
| 68 | #define MAX_SPU_COUNT 0xFFFFFF /* maximum 24 bit LFSR value */ | 68 | #define MAX_SPU_COUNT 0xFFFFFF /* maximum 24 bit LFSR value */ |
| 69 | 69 | ||
| 70 | /* Minumum HW interval timer setting to send value to trace buffer is 10 cycle. | 70 | /* Minimum HW interval timer setting to send value to trace buffer is 10 cycle. |
| 71 | * To configure counter to send value every N cycles set counter to | 71 | * To configure counter to send value every N cycles set counter to |
| 72 | * 2^32 - 1 - N. | 72 | * 2^32 - 1 - N. |
| 73 | */ | 73 | */ |
| @@ -1470,7 +1470,7 @@ static int cell_global_start(struct op_counter_config *ctr) | |||
| 1470 | * trace buffer at the maximum rate possible. The trace buffer is configured | 1470 | * trace buffer at the maximum rate possible. The trace buffer is configured |
| 1471 | * to store the PCs, wrapping when it is full. The performance counter is | 1471 | * to store the PCs, wrapping when it is full. The performance counter is |
| 1472 | * initialized to the max hardware count minus the number of events, N, between | 1472 | * initialized to the max hardware count minus the number of events, N, between |
| 1473 | * samples. Once the N events have occured, a HW counter overflow occurs | 1473 | * samples. Once the N events have occurred, a HW counter overflow occurs |
| 1474 | * causing the generation of a HW counter interrupt which also stops the | 1474 | * causing the generation of a HW counter interrupt which also stops the |
| 1475 | * writing of the SPU PC values to the trace buffer. Hence the last PC | 1475 | * writing of the SPU PC values to the trace buffer. Hence the last PC |
| 1476 | * written to the trace buffer is the SPU PC that we want. Unfortunately, | 1476 | * written to the trace buffer is the SPU PC that we want. Unfortunately, |
| @@ -1656,7 +1656,7 @@ static void cell_handle_interrupt_ppu(struct pt_regs *regs, | |||
| 1656 | * The counters were frozen by the interrupt. | 1656 | * The counters were frozen by the interrupt. |
| 1657 | * Reenable the interrupt and restart the counters. | 1657 | * Reenable the interrupt and restart the counters. |
| 1658 | * If there was a race between the interrupt handler and | 1658 | * If there was a race between the interrupt handler and |
| 1659 | * the virtual counter routine. The virutal counter | 1659 | * the virtual counter routine. The virtual counter |
| 1660 | * routine may have cleared the interrupts. Hence must | 1660 | * routine may have cleared the interrupts. Hence must |
| 1661 | * use the virt_cntr_inter_mask to re-enable the interrupts. | 1661 | * use the virt_cntr_inter_mask to re-enable the interrupts. |
| 1662 | */ | 1662 | */ |
diff --git a/arch/powerpc/oprofile/op_model_power4.c b/arch/powerpc/oprofile/op_model_power4.c index 80774092db77..8ee51a252cf1 100644 --- a/arch/powerpc/oprofile/op_model_power4.c +++ b/arch/powerpc/oprofile/op_model_power4.c | |||
| @@ -207,7 +207,7 @@ static unsigned long get_pc(struct pt_regs *regs) | |||
| 207 | unsigned long mmcra; | 207 | unsigned long mmcra; |
| 208 | unsigned long slot; | 208 | unsigned long slot; |
| 209 | 209 | ||
| 210 | /* Cant do much about it */ | 210 | /* Can't do much about it */ |
| 211 | if (!cur_cpu_spec->oprofile_mmcra_sihv) | 211 | if (!cur_cpu_spec->oprofile_mmcra_sihv) |
| 212 | return pc; | 212 | return pc; |
| 213 | 213 | ||
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c b/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c index 6385d883cb8d..9940ce8a2d4e 100644 --- a/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c +++ b/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c | |||
| @@ -57,7 +57,7 @@ struct mpc52xx_lpbfifo { | |||
| 57 | static struct mpc52xx_lpbfifo lpbfifo; | 57 | static struct mpc52xx_lpbfifo lpbfifo; |
| 58 | 58 | ||
| 59 | /** | 59 | /** |
| 60 | * mpc52xx_lpbfifo_kick - Trigger the next block of data to be transfered | 60 | * mpc52xx_lpbfifo_kick - Trigger the next block of data to be transferred |
| 61 | */ | 61 | */ |
| 62 | static void mpc52xx_lpbfifo_kick(struct mpc52xx_lpbfifo_request *req) | 62 | static void mpc52xx_lpbfifo_kick(struct mpc52xx_lpbfifo_request *req) |
| 63 | { | 63 | { |
| @@ -179,7 +179,7 @@ static void mpc52xx_lpbfifo_kick(struct mpc52xx_lpbfifo_request *req) | |||
| 179 | * | 179 | * |
| 180 | * On transmit, the dma completion irq triggers before the fifo completion | 180 | * On transmit, the dma completion irq triggers before the fifo completion |
| 181 | * triggers. Handle the dma completion here instead of the LPB FIFO Bestcomm | 181 | * triggers. Handle the dma completion here instead of the LPB FIFO Bestcomm |
| 182 | * task completion irq becuase everyting is not really done until the LPB FIFO | 182 | * task completion irq because everything is not really done until the LPB FIFO |
| 183 | * completion irq triggers. | 183 | * completion irq triggers. |
| 184 | * | 184 | * |
| 185 | * In other words: | 185 | * In other words: |
| @@ -195,7 +195,7 @@ static void mpc52xx_lpbfifo_kick(struct mpc52xx_lpbfifo_request *req) | |||
| 195 | * Exit conditions: | 195 | * Exit conditions: |
| 196 | * 1) Transfer aborted | 196 | * 1) Transfer aborted |
| 197 | * 2) FIFO complete without DMA; more data to do | 197 | * 2) FIFO complete without DMA; more data to do |
| 198 | * 3) FIFO complete without DMA; all data transfered | 198 | * 3) FIFO complete without DMA; all data transferred |
| 199 | * 4) FIFO complete using DMA | 199 | * 4) FIFO complete using DMA |
| 200 | * | 200 | * |
| 201 | * Condition 1 can occur regardless of whether or not DMA is used. | 201 | * Condition 1 can occur regardless of whether or not DMA is used. |
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pic.c b/arch/powerpc/platforms/52xx/mpc52xx_pic.c index 3ddea96273ca..1dd15400f6f0 100644 --- a/arch/powerpc/platforms/52xx/mpc52xx_pic.c +++ b/arch/powerpc/platforms/52xx/mpc52xx_pic.c | |||
| @@ -512,7 +512,7 @@ void __init mpc52xx_init_irq(void) | |||
| 512 | /** | 512 | /** |
| 513 | * mpc52xx_get_irq - Get pending interrupt number hook function | 513 | * mpc52xx_get_irq - Get pending interrupt number hook function |
| 514 | * | 514 | * |
| 515 | * Called by the interupt handler to determine what IRQ handler needs to be | 515 | * Called by the interrupt handler to determine what IRQ handler needs to be |
| 516 | * executed. | 516 | * executed. |
| 517 | * | 517 | * |
| 518 | * Status of pending interrupts is determined by reading the encoded status | 518 | * Status of pending interrupts is determined by reading the encoded status |
diff --git a/arch/powerpc/platforms/cell/spufs/lscsa_alloc.c b/arch/powerpc/platforms/cell/spufs/lscsa_alloc.c index 3b894f585280..147069938cfe 100644 --- a/arch/powerpc/platforms/cell/spufs/lscsa_alloc.c +++ b/arch/powerpc/platforms/cell/spufs/lscsa_alloc.c | |||
| @@ -90,7 +90,7 @@ int spu_alloc_lscsa(struct spu_state *csa) | |||
| 90 | */ | 90 | */ |
| 91 | for (i = 0; i < SPU_LSCSA_NUM_BIG_PAGES; i++) { | 91 | for (i = 0; i < SPU_LSCSA_NUM_BIG_PAGES; i++) { |
| 92 | /* XXX This is likely to fail, we should use a special pool | 92 | /* XXX This is likely to fail, we should use a special pool |
| 93 | * similiar to what hugetlbfs does. | 93 | * similar to what hugetlbfs does. |
| 94 | */ | 94 | */ |
| 95 | csa->lscsa_pages[i] = alloc_pages(GFP_KERNEL, | 95 | csa->lscsa_pages[i] = alloc_pages(GFP_KERNEL, |
| 96 | SPU_64K_PAGE_ORDER); | 96 | SPU_64K_PAGE_ORDER); |
diff --git a/arch/powerpc/platforms/cell/spufs/sched.c b/arch/powerpc/platforms/cell/spufs/sched.c index 0b0466284932..65203857b0ce 100644 --- a/arch/powerpc/platforms/cell/spufs/sched.c +++ b/arch/powerpc/platforms/cell/spufs/sched.c | |||
| @@ -846,7 +846,7 @@ static struct spu_context *grab_runnable_context(int prio, int node) | |||
| 846 | struct list_head *rq = &spu_prio->runq[best]; | 846 | struct list_head *rq = &spu_prio->runq[best]; |
| 847 | 847 | ||
| 848 | list_for_each_entry(ctx, rq, rq) { | 848 | list_for_each_entry(ctx, rq, rq) { |
| 849 | /* XXX(hch): check for affinity here aswell */ | 849 | /* XXX(hch): check for affinity here as well */ |
| 850 | if (__node_allowed(ctx, node)) { | 850 | if (__node_allowed(ctx, node)) { |
| 851 | __spu_del_from_rq(ctx); | 851 | __spu_del_from_rq(ctx); |
| 852 | goto found; | 852 | goto found; |
diff --git a/arch/powerpc/platforms/cell/spufs/spu_restore.c b/arch/powerpc/platforms/cell/spufs/spu_restore.c index 21a9c952d88b..72c905f1ee7a 100644 --- a/arch/powerpc/platforms/cell/spufs/spu_restore.c +++ b/arch/powerpc/platforms/cell/spufs/spu_restore.c | |||
| @@ -284,7 +284,7 @@ static inline void restore_complete(void) | |||
| 284 | exit_instrs[3] = BR_INSTR; | 284 | exit_instrs[3] = BR_INSTR; |
| 285 | break; | 285 | break; |
| 286 | default: | 286 | default: |
| 287 | /* SPU_Status[R]=1. No additonal instructions. */ | 287 | /* SPU_Status[R]=1. No additional instructions. */ |
| 288 | break; | 288 | break; |
| 289 | } | 289 | } |
| 290 | spu_sync(); | 290 | spu_sync(); |
diff --git a/arch/powerpc/platforms/iseries/mf.c b/arch/powerpc/platforms/iseries/mf.c index b5e026bdca21..62dabe3c2bfa 100644 --- a/arch/powerpc/platforms/iseries/mf.c +++ b/arch/powerpc/platforms/iseries/mf.c | |||
| @@ -51,7 +51,7 @@ | |||
| 51 | static int mf_initialized; | 51 | static int mf_initialized; |
| 52 | 52 | ||
| 53 | /* | 53 | /* |
| 54 | * This is the structure layout for the Machine Facilites LPAR event | 54 | * This is the structure layout for the Machine Facilities LPAR event |
| 55 | * flows. | 55 | * flows. |
| 56 | */ | 56 | */ |
| 57 | struct vsp_cmd_data { | 57 | struct vsp_cmd_data { |
diff --git a/arch/powerpc/platforms/iseries/viopath.c b/arch/powerpc/platforms/iseries/viopath.c index b5f05d943a90..2376069cdc14 100644 --- a/arch/powerpc/platforms/iseries/viopath.c +++ b/arch/powerpc/platforms/iseries/viopath.c | |||
| @@ -396,7 +396,7 @@ static void vio_handleEvent(struct HvLpEvent *event) | |||
| 396 | viopathStatus[remoteLp].mTargetInst)) { | 396 | viopathStatus[remoteLp].mTargetInst)) { |
| 397 | printk(VIOPATH_KERN_WARN | 397 | printk(VIOPATH_KERN_WARN |
| 398 | "message from invalid partition. " | 398 | "message from invalid partition. " |
| 399 | "int msg rcvd, source inst (%d) doesnt match (%d)\n", | 399 | "int msg rcvd, source inst (%d) doesn't match (%d)\n", |
| 400 | viopathStatus[remoteLp].mTargetInst, | 400 | viopathStatus[remoteLp].mTargetInst, |
| 401 | event->xSourceInstanceId); | 401 | event->xSourceInstanceId); |
| 402 | return; | 402 | return; |
| @@ -407,7 +407,7 @@ static void vio_handleEvent(struct HvLpEvent *event) | |||
| 407 | viopathStatus[remoteLp].mSourceInst)) { | 407 | viopathStatus[remoteLp].mSourceInst)) { |
| 408 | printk(VIOPATH_KERN_WARN | 408 | printk(VIOPATH_KERN_WARN |
| 409 | "message from invalid partition. " | 409 | "message from invalid partition. " |
| 410 | "int msg rcvd, target inst (%d) doesnt match (%d)\n", | 410 | "int msg rcvd, target inst (%d) doesn't match (%d)\n", |
| 411 | viopathStatus[remoteLp].mSourceInst, | 411 | viopathStatus[remoteLp].mSourceInst, |
| 412 | event->xTargetInstanceId); | 412 | event->xTargetInstanceId); |
| 413 | return; | 413 | return; |
| @@ -418,7 +418,7 @@ static void vio_handleEvent(struct HvLpEvent *event) | |||
| 418 | viopathStatus[remoteLp].mSourceInst) { | 418 | viopathStatus[remoteLp].mSourceInst) { |
| 419 | printk(VIOPATH_KERN_WARN | 419 | printk(VIOPATH_KERN_WARN |
| 420 | "message from invalid partition. " | 420 | "message from invalid partition. " |
| 421 | "ack msg rcvd, source inst (%d) doesnt match (%d)\n", | 421 | "ack msg rcvd, source inst (%d) doesn't match (%d)\n", |
| 422 | viopathStatus[remoteLp].mSourceInst, | 422 | viopathStatus[remoteLp].mSourceInst, |
| 423 | event->xSourceInstanceId); | 423 | event->xSourceInstanceId); |
| 424 | return; | 424 | return; |
| @@ -428,7 +428,7 @@ static void vio_handleEvent(struct HvLpEvent *event) | |||
| 428 | viopathStatus[remoteLp].mTargetInst) { | 428 | viopathStatus[remoteLp].mTargetInst) { |
| 429 | printk(VIOPATH_KERN_WARN | 429 | printk(VIOPATH_KERN_WARN |
| 430 | "message from invalid partition. " | 430 | "message from invalid partition. " |
| 431 | "viopath: ack msg rcvd, target inst (%d) doesnt match (%d)\n", | 431 | "viopath: ack msg rcvd, target inst (%d) doesn't match (%d)\n", |
| 432 | viopathStatus[remoteLp].mTargetInst, | 432 | viopathStatus[remoteLp].mTargetInst, |
| 433 | event->xTargetInstanceId); | 433 | event->xTargetInstanceId); |
| 434 | return; | 434 | return; |
diff --git a/arch/powerpc/platforms/pasemi/dma_lib.c b/arch/powerpc/platforms/pasemi/dma_lib.c index 09695ae50f91..321a9b3a2d00 100644 --- a/arch/powerpc/platforms/pasemi/dma_lib.c +++ b/arch/powerpc/platforms/pasemi/dma_lib.c | |||
| @@ -379,9 +379,9 @@ void pasemi_dma_free_buf(struct pasemi_dmachan *chan, int size, | |||
| 379 | } | 379 | } |
| 380 | EXPORT_SYMBOL(pasemi_dma_free_buf); | 380 | EXPORT_SYMBOL(pasemi_dma_free_buf); |
| 381 | 381 | ||
| 382 | /* pasemi_dma_alloc_flag - Allocate a flag (event) for channel syncronization | 382 | /* pasemi_dma_alloc_flag - Allocate a flag (event) for channel synchronization |
| 383 | * | 383 | * |
| 384 | * Allocates a flag for use with channel syncronization (event descriptors). | 384 | * Allocates a flag for use with channel synchronization (event descriptors). |
| 385 | * Returns allocated flag (0-63), < 0 on error. | 385 | * Returns allocated flag (0-63), < 0 on error. |
| 386 | */ | 386 | */ |
| 387 | int pasemi_dma_alloc_flag(void) | 387 | int pasemi_dma_alloc_flag(void) |
diff --git a/arch/powerpc/platforms/powermac/Makefile b/arch/powerpc/platforms/powermac/Makefile index 50f169392551..ea47df66fee5 100644 --- a/arch/powerpc/platforms/powermac/Makefile +++ b/arch/powerpc/platforms/powermac/Makefile | |||
| @@ -11,7 +11,7 @@ obj-y += pic.o setup.o time.o feature.o pci.o \ | |||
| 11 | obj-$(CONFIG_PMAC_BACKLIGHT) += backlight.o | 11 | obj-$(CONFIG_PMAC_BACKLIGHT) += backlight.o |
| 12 | obj-$(CONFIG_CPU_FREQ_PMAC) += cpufreq_32.o | 12 | obj-$(CONFIG_CPU_FREQ_PMAC) += cpufreq_32.o |
| 13 | obj-$(CONFIG_CPU_FREQ_PMAC64) += cpufreq_64.o | 13 | obj-$(CONFIG_CPU_FREQ_PMAC64) += cpufreq_64.o |
| 14 | # CONFIG_NVRAM is an arch. independant tristate symbol, for pmac32 we really | 14 | # CONFIG_NVRAM is an arch. independent tristate symbol, for pmac32 we really |
| 15 | # need this to be a bool. Cheat here and pretend CONFIG_NVRAM=m is really | 15 | # need this to be a bool. Cheat here and pretend CONFIG_NVRAM=m is really |
| 16 | # CONFIG_NVRAM=y | 16 | # CONFIG_NVRAM=y |
| 17 | obj-$(CONFIG_NVRAM:m=y) += nvram.o | 17 | obj-$(CONFIG_NVRAM:m=y) += nvram.o |
diff --git a/arch/powerpc/platforms/powermac/low_i2c.c b/arch/powerpc/platforms/powermac/low_i2c.c index 480567e5fa9a..e9c8a607268e 100644 --- a/arch/powerpc/platforms/powermac/low_i2c.c +++ b/arch/powerpc/platforms/powermac/low_i2c.c | |||
| @@ -904,7 +904,7 @@ static void __init smu_i2c_probe(void) | |||
| 904 | printk(KERN_INFO "SMU i2c %s\n", controller->full_name); | 904 | printk(KERN_INFO "SMU i2c %s\n", controller->full_name); |
| 905 | 905 | ||
| 906 | /* Look for childs, note that they might not be of the right | 906 | /* Look for childs, note that they might not be of the right |
| 907 | * type as older device trees mix i2c busses and other thigns | 907 | * type as older device trees mix i2c busses and other things |
| 908 | * at the same level | 908 | * at the same level |
| 909 | */ | 909 | */ |
| 910 | for (busnode = NULL; | 910 | for (busnode = NULL; |
diff --git a/arch/powerpc/platforms/powermac/pci.c b/arch/powerpc/platforms/powermac/pci.c index ab6898942700..f33e08d573ce 100644 --- a/arch/powerpc/platforms/powermac/pci.c +++ b/arch/powerpc/platforms/powermac/pci.c | |||
| @@ -299,7 +299,7 @@ static void __init setup_chaos(struct pci_controller *hose, | |||
| 299 | * This function deals with some "special cases" devices. | 299 | * This function deals with some "special cases" devices. |
| 300 | * | 300 | * |
| 301 | * 0 -> No special case | 301 | * 0 -> No special case |
| 302 | * 1 -> Skip the device but act as if the access was successfull | 302 | * 1 -> Skip the device but act as if the access was successful |
| 303 | * (return 0xff's on reads, eventually, cache config space | 303 | * (return 0xff's on reads, eventually, cache config space |
| 304 | * accesses in a later version) | 304 | * accesses in a later version) |
| 305 | * -1 -> Hide the device (unsuccessful access) | 305 | * -1 -> Hide the device (unsuccessful access) |
diff --git a/arch/powerpc/platforms/pseries/dlpar.c b/arch/powerpc/platforms/pseries/dlpar.c index b74a9230edc9..57ceb92b2288 100644 --- a/arch/powerpc/platforms/pseries/dlpar.c +++ b/arch/powerpc/platforms/pseries/dlpar.c | |||
| @@ -74,7 +74,7 @@ static struct device_node *dlpar_parse_cc_node(struct cc_workarea *ccwa) | |||
| 74 | return NULL; | 74 | return NULL; |
| 75 | 75 | ||
| 76 | /* The configure connector reported name does not contain a | 76 | /* The configure connector reported name does not contain a |
| 77 | * preceeding '/', so we allocate a buffer large enough to | 77 | * preceding '/', so we allocate a buffer large enough to |
| 78 | * prepend this to the full_name. | 78 | * prepend this to the full_name. |
| 79 | */ | 79 | */ |
| 80 | name = (char *)ccwa + ccwa->name_offset; | 80 | name = (char *)ccwa + ccwa->name_offset; |
diff --git a/arch/powerpc/platforms/pseries/eeh.c b/arch/powerpc/platforms/pseries/eeh.c index 3cc4d102b1f1..89649173d3a3 100644 --- a/arch/powerpc/platforms/pseries/eeh.c +++ b/arch/powerpc/platforms/pseries/eeh.c | |||
| @@ -65,7 +65,7 @@ | |||
| 65 | * with EEH. | 65 | * with EEH. |
| 66 | * | 66 | * |
| 67 | * Ideally, a PCI device driver, when suspecting that an isolation | 67 | * Ideally, a PCI device driver, when suspecting that an isolation |
| 68 | * event has occured (e.g. by reading 0xff's), will then ask EEH | 68 | * event has occurred (e.g. by reading 0xff's), will then ask EEH |
| 69 | * whether this is the case, and then take appropriate steps to | 69 | * whether this is the case, and then take appropriate steps to |
| 70 | * reset the PCI slot, the PCI device, and then resume operations. | 70 | * reset the PCI slot, the PCI device, and then resume operations. |
| 71 | * However, until that day, the checking is done here, with the | 71 | * However, until that day, the checking is done here, with the |
diff --git a/arch/powerpc/platforms/pseries/hotplug-cpu.c b/arch/powerpc/platforms/pseries/hotplug-cpu.c index fd50ccd4bac1..ef8c45489e20 100644 --- a/arch/powerpc/platforms/pseries/hotplug-cpu.c +++ b/arch/powerpc/platforms/pseries/hotplug-cpu.c | |||
| @@ -216,7 +216,7 @@ static void pseries_cpu_die(unsigned int cpu) | |||
| 216 | cpu, pcpu, cpu_status); | 216 | cpu, pcpu, cpu_status); |
| 217 | } | 217 | } |
| 218 | 218 | ||
| 219 | /* Isolation and deallocation are definatly done by | 219 | /* Isolation and deallocation are definitely done by |
| 220 | * drslot_chrp_cpu. If they were not they would be | 220 | * drslot_chrp_cpu. If they were not they would be |
| 221 | * done here. Change isolate state to Isolate and | 221 | * done here. Change isolate state to Isolate and |
| 222 | * change allocation-state to Unusable. | 222 | * change allocation-state to Unusable. |
diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c index 154c464cdca5..6d5412a18b26 100644 --- a/arch/powerpc/platforms/pseries/iommu.c +++ b/arch/powerpc/platforms/pseries/iommu.c | |||
| @@ -272,7 +272,7 @@ static unsigned long tce_get_pSeriesLP(struct iommu_table *tbl, long tcenum) | |||
| 272 | return tce_ret; | 272 | return tce_ret; |
| 273 | } | 273 | } |
| 274 | 274 | ||
| 275 | /* this is compatable with cells for the device tree property */ | 275 | /* this is compatible with cells for the device tree property */ |
| 276 | struct dynamic_dma_window_prop { | 276 | struct dynamic_dma_window_prop { |
| 277 | __be32 liobn; /* tce table number */ | 277 | __be32 liobn; /* tce table number */ |
| 278 | __be64 dma_base; /* address hi,lo */ | 278 | __be64 dma_base; /* address hi,lo */ |
| @@ -976,7 +976,7 @@ static void pci_dma_dev_setup_pSeriesLP(struct pci_dev *dev) | |||
| 976 | pr_debug("pci_dma_dev_setup_pSeriesLP: %s\n", pci_name(dev)); | 976 | pr_debug("pci_dma_dev_setup_pSeriesLP: %s\n", pci_name(dev)); |
| 977 | 977 | ||
| 978 | /* dev setup for LPAR is a little tricky, since the device tree might | 978 | /* dev setup for LPAR is a little tricky, since the device tree might |
| 979 | * contain the dma-window properties per-device and not neccesarily | 979 | * contain the dma-window properties per-device and not necessarily |
| 980 | * for the bus. So we need to search upwards in the tree until we | 980 | * for the bus. So we need to search upwards in the tree until we |
| 981 | * either hit a dma-window property, OR find a parent with a table | 981 | * either hit a dma-window property, OR find a parent with a table |
| 982 | * already allocated. | 982 | * already allocated. |
| @@ -1033,7 +1033,7 @@ static int dma_set_mask_pSeriesLP(struct device *dev, u64 dma_mask) | |||
| 1033 | 1033 | ||
| 1034 | /* | 1034 | /* |
| 1035 | * the device tree might contain the dma-window properties | 1035 | * the device tree might contain the dma-window properties |
| 1036 | * per-device and not neccesarily for the bus. So we need to | 1036 | * per-device and not necessarily for the bus. So we need to |
| 1037 | * search upwards in the tree until we either hit a dma-window | 1037 | * search upwards in the tree until we either hit a dma-window |
| 1038 | * property, OR find a parent with a table already allocated. | 1038 | * property, OR find a parent with a table already allocated. |
| 1039 | */ | 1039 | */ |
diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c index ec8fe22047b7..d6901334d66e 100644 --- a/arch/powerpc/platforms/pseries/xics.c +++ b/arch/powerpc/platforms/pseries/xics.c | |||
| @@ -897,7 +897,7 @@ void xics_migrate_irqs_away(void) | |||
| 897 | int status; | 897 | int status; |
| 898 | unsigned long flags; | 898 | unsigned long flags; |
| 899 | 899 | ||
| 900 | /* We cant set affinity on ISA interrupts */ | 900 | /* We can't set affinity on ISA interrupts */ |
| 901 | if (virq < NUM_ISA_INTERRUPTS) | 901 | if (virq < NUM_ISA_INTERRUPTS) |
| 902 | continue; | 902 | continue; |
| 903 | if (irq_map[virq].host != xics_host) | 903 | if (irq_map[virq].host != xics_host) |
diff --git a/arch/powerpc/sysdev/axonram.c b/arch/powerpc/sysdev/axonram.c index 27402c7d309d..1636dd896707 100644 --- a/arch/powerpc/sysdev/axonram.c +++ b/arch/powerpc/sysdev/axonram.c | |||
| @@ -95,7 +95,7 @@ axon_ram_irq_handler(int irq, void *dev) | |||
| 95 | 95 | ||
| 96 | BUG_ON(!bank); | 96 | BUG_ON(!bank); |
| 97 | 97 | ||
| 98 | dev_err(&device->dev, "Correctable memory error occured\n"); | 98 | dev_err(&device->dev, "Correctable memory error occurred\n"); |
| 99 | bank->ecc_counter++; | 99 | bank->ecc_counter++; |
| 100 | return IRQ_HANDLED; | 100 | return IRQ_HANDLED; |
| 101 | } | 101 | } |
diff --git a/arch/powerpc/sysdev/bestcomm/bestcomm.h b/arch/powerpc/sysdev/bestcomm/bestcomm.h index 23a95f80dfdb..a0e2e6b19b57 100644 --- a/arch/powerpc/sysdev/bestcomm/bestcomm.h +++ b/arch/powerpc/sysdev/bestcomm/bestcomm.h | |||
| @@ -20,7 +20,7 @@ | |||
| 20 | * struct bcom_bd - Structure describing a generic BestComm buffer descriptor | 20 | * struct bcom_bd - Structure describing a generic BestComm buffer descriptor |
| 21 | * @status: The current status of this buffer. Exact meaning depends on the | 21 | * @status: The current status of this buffer. Exact meaning depends on the |
| 22 | * task type | 22 | * task type |
| 23 | * @data: An array of u32 extra data. Size of array is task dependant. | 23 | * @data: An array of u32 extra data. Size of array is task dependent. |
| 24 | * | 24 | * |
| 25 | * Note: Don't dereference a bcom_bd pointer as an array. The size of the | 25 | * Note: Don't dereference a bcom_bd pointer as an array. The size of the |
| 26 | * bcom_bd is variable. Use bcom_get_bd() instead. | 26 | * bcom_bd is variable. Use bcom_get_bd() instead. |
diff --git a/arch/powerpc/sysdev/bestcomm/bestcomm_priv.h b/arch/powerpc/sysdev/bestcomm/bestcomm_priv.h index eb0d1c883c31..3b52f3ffbdf8 100644 --- a/arch/powerpc/sysdev/bestcomm/bestcomm_priv.h +++ b/arch/powerpc/sysdev/bestcomm/bestcomm_priv.h | |||
| @@ -97,7 +97,7 @@ struct bcom_task_header { | |||
| 97 | u8 reserved[8]; | 97 | u8 reserved[8]; |
| 98 | }; | 98 | }; |
| 99 | 99 | ||
| 100 | /* Descriptors stucture & co */ | 100 | /* Descriptors structure & co */ |
| 101 | #define BCOM_DESC_NOP 0x000001f8 | 101 | #define BCOM_DESC_NOP 0x000001f8 |
| 102 | #define BCOM_LCD_MASK 0x80000000 | 102 | #define BCOM_LCD_MASK 0x80000000 |
| 103 | #define BCOM_DRD_EXTENDED 0x40000000 | 103 | #define BCOM_DRD_EXTENDED 0x40000000 |
diff --git a/arch/powerpc/sysdev/cpm1.c b/arch/powerpc/sysdev/cpm1.c index 8b5aba263323..e0bc944eb23f 100644 --- a/arch/powerpc/sysdev/cpm1.c +++ b/arch/powerpc/sysdev/cpm1.c | |||
| @@ -223,7 +223,7 @@ void __init cpm_reset(void) | |||
| 223 | 223 | ||
| 224 | /* Set SDMA Bus Request priority 5. | 224 | /* Set SDMA Bus Request priority 5. |
| 225 | * On 860T, this also enables FEC priority 6. I am not sure | 225 | * On 860T, this also enables FEC priority 6. I am not sure |
| 226 | * this is what we realy want for some applications, but the | 226 | * this is what we really want for some applications, but the |
| 227 | * manual recommends it. | 227 | * manual recommends it. |
| 228 | * Bit 25, FAM can also be set to use FEC aggressive mode (860T). | 228 | * Bit 25, FAM can also be set to use FEC aggressive mode (860T). |
| 229 | */ | 229 | */ |
diff --git a/arch/powerpc/sysdev/indirect_pci.c b/arch/powerpc/sysdev/indirect_pci.c index 7ed809676642..82fdad885d20 100644 --- a/arch/powerpc/sysdev/indirect_pci.c +++ b/arch/powerpc/sysdev/indirect_pci.c | |||
| @@ -117,7 +117,7 @@ indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset, | |||
| 117 | out_le32(hose->cfg_addr, (0x80000000 | (bus_no << 16) | | 117 | out_le32(hose->cfg_addr, (0x80000000 | (bus_no << 16) | |
| 118 | (devfn << 8) | reg | cfg_type)); | 118 | (devfn << 8) | reg | cfg_type)); |
| 119 | 119 | ||
| 120 | /* surpress setting of PCI_PRIMARY_BUS */ | 120 | /* suppress setting of PCI_PRIMARY_BUS */ |
| 121 | if (hose->indirect_type & PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS) | 121 | if (hose->indirect_type & PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS) |
| 122 | if ((offset == PCI_PRIMARY_BUS) && | 122 | if ((offset == PCI_PRIMARY_BUS) && |
| 123 | (bus->number == hose->first_busno)) | 123 | (bus->number == hose->first_busno)) |
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.h b/arch/powerpc/sysdev/ppc4xx_pci.h index 56d9e5deccbf..c39a134e8684 100644 --- a/arch/powerpc/sysdev/ppc4xx_pci.h +++ b/arch/powerpc/sysdev/ppc4xx_pci.h | |||
| @@ -324,7 +324,7 @@ | |||
| 324 | #define PESDR0_460EX_IHS2 0x036D | 324 | #define PESDR0_460EX_IHS2 0x036D |
| 325 | 325 | ||
| 326 | /* | 326 | /* |
| 327 | * 460SX addtional DCRs | 327 | * 460SX additional DCRs |
| 328 | */ | 328 | */ |
| 329 | #define PESDRn_460SX_RCEI 0x02 | 329 | #define PESDRn_460SX_RCEI 0x02 |
| 330 | 330 | ||
diff --git a/arch/s390/include/asm/atomic.h b/arch/s390/include/asm/atomic.h index 5c5ba10384c2..d9db13810d15 100644 --- a/arch/s390/include/asm/atomic.h +++ b/arch/s390/include/asm/atomic.h | |||
| @@ -9,7 +9,7 @@ | |||
| 9 | * | 9 | * |
| 10 | * Atomic operations that C can't guarantee us. | 10 | * Atomic operations that C can't guarantee us. |
| 11 | * Useful for resource counting etc. | 11 | * Useful for resource counting etc. |
| 12 | * s390 uses 'Compare And Swap' for atomicity in SMP enviroment. | 12 | * s390 uses 'Compare And Swap' for atomicity in SMP environment. |
| 13 | * | 13 | * |
| 14 | */ | 14 | */ |
| 15 | 15 | ||
diff --git a/arch/s390/include/asm/cio.h b/arch/s390/include/asm/cio.h index e34347d567a6..fc50a3342da3 100644 --- a/arch/s390/include/asm/cio.h +++ b/arch/s390/include/asm/cio.h | |||
| @@ -183,7 +183,7 @@ struct esw3 { | |||
| 183 | * The irb that is handed to the device driver when an interrupt occurs. For | 183 | * The irb that is handed to the device driver when an interrupt occurs. For |
| 184 | * solicited interrupts, the common I/O layer already performs checks whether | 184 | * solicited interrupts, the common I/O layer already performs checks whether |
| 185 | * a field is valid; a field not being valid is always passed as %0. | 185 | * a field is valid; a field not being valid is always passed as %0. |
| 186 | * If a unit check occured, @ecw may contain sense data; this is retrieved | 186 | * If a unit check occurred, @ecw may contain sense data; this is retrieved |
| 187 | * by the common I/O layer itself if the device doesn't support concurrent | 187 | * by the common I/O layer itself if the device doesn't support concurrent |
| 188 | * sense (so that the device driver never needs to perform basic sene itself). | 188 | * sense (so that the device driver never needs to perform basic sene itself). |
| 189 | * For unsolicited interrupts, the irb is passed as-is (expect for sense data, | 189 | * For unsolicited interrupts, the irb is passed as-is (expect for sense data, |
diff --git a/arch/s390/kernel/reipl64.S b/arch/s390/kernel/reipl64.S index 5e73dee63baa..9eabbc90795d 100644 --- a/arch/s390/kernel/reipl64.S +++ b/arch/s390/kernel/reipl64.S | |||
| @@ -78,7 +78,7 @@ do_reipl_asm: basr %r13,0 | |||
| 78 | * in the ESA psw. | 78 | * in the ESA psw. |
| 79 | * Bit 31 of the addresses has to be 0 for the | 79 | * Bit 31 of the addresses has to be 0 for the |
| 80 | * 31bit lpswe instruction a fact they appear to have | 80 | * 31bit lpswe instruction a fact they appear to have |
| 81 | * ommited from the pop. | 81 | * omitted from the pop. |
| 82 | */ | 82 | */ |
| 83 | .Lnewpsw: .quad 0x0000000080000000 | 83 | .Lnewpsw: .quad 0x0000000080000000 |
| 84 | .quad .Lpg1 | 84 | .quad .Lpg1 |
diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c index ed183c2c6168..f5434d1ecb31 100644 --- a/arch/s390/kernel/setup.c +++ b/arch/s390/kernel/setup.c | |||
| @@ -708,7 +708,7 @@ static void __init setup_hwcaps(void) | |||
| 708 | * and 1ULL<<0 as bit 63. Bits 0-31 contain the same information | 708 | * and 1ULL<<0 as bit 63. Bits 0-31 contain the same information |
| 709 | * as stored by stfl, bits 32-xxx contain additional facilities. | 709 | * as stored by stfl, bits 32-xxx contain additional facilities. |
| 710 | * How many facility words are stored depends on the number of | 710 | * How many facility words are stored depends on the number of |
| 711 | * doublewords passed to the instruction. The additional facilites | 711 | * doublewords passed to the instruction. The additional facilities |
| 712 | * are: | 712 | * are: |
| 713 | * Bit 42: decimal floating point facility is installed | 713 | * Bit 42: decimal floating point facility is installed |
| 714 | * Bit 44: perform floating point operation facility is installed | 714 | * Bit 44: perform floating point operation facility is installed |
diff --git a/arch/s390/kernel/time.c b/arch/s390/kernel/time.c index 9e7b039458da..87be655557aa 100644 --- a/arch/s390/kernel/time.c +++ b/arch/s390/kernel/time.c | |||
| @@ -724,7 +724,7 @@ static void clock_sync_cpu(struct clock_sync_data *sync) | |||
| 724 | } | 724 | } |
| 725 | 725 | ||
| 726 | /* | 726 | /* |
| 727 | * Sync the TOD clock using the port refered to by aibp. This port | 727 | * Sync the TOD clock using the port referred to by aibp. This port |
| 728 | * has to be enabled and the other port has to be disabled. The | 728 | * has to be enabled and the other port has to be disabled. The |
| 729 | * last eacr update has to be more than 1.6 seconds in the past. | 729 | * last eacr update has to be more than 1.6 seconds in the past. |
| 730 | */ | 730 | */ |
| @@ -1012,7 +1012,7 @@ static void etr_work_fn(struct work_struct *work) | |||
| 1012 | eacr = etr_handle_update(&aib, eacr); | 1012 | eacr = etr_handle_update(&aib, eacr); |
| 1013 | 1013 | ||
| 1014 | /* | 1014 | /* |
| 1015 | * Select ports to enable. The prefered synchronization mode is PPS. | 1015 | * Select ports to enable. The preferred synchronization mode is PPS. |
| 1016 | * If a port can be enabled depends on a number of things: | 1016 | * If a port can be enabled depends on a number of things: |
| 1017 | * 1) The port needs to be online and uptodate. A port is not | 1017 | * 1) The port needs to be online and uptodate. A port is not |
| 1018 | * disabled just because it is not uptodate, but it is only | 1018 | * disabled just because it is not uptodate, but it is only |
| @@ -1091,7 +1091,7 @@ static void etr_work_fn(struct work_struct *work) | |||
| 1091 | /* | 1091 | /* |
| 1092 | * Update eacr and try to synchronize the clock. If the update | 1092 | * Update eacr and try to synchronize the clock. If the update |
| 1093 | * of eacr caused a stepping port switch (or if we have to | 1093 | * of eacr caused a stepping port switch (or if we have to |
| 1094 | * assume that a stepping port switch has occured) or the | 1094 | * assume that a stepping port switch has occurred) or the |
| 1095 | * clock syncing failed, reset the sync check control bit | 1095 | * clock syncing failed, reset the sync check control bit |
| 1096 | * and set up a timer to try again after 0.5 seconds | 1096 | * and set up a timer to try again after 0.5 seconds |
| 1097 | */ | 1097 | */ |
diff --git a/arch/s390/kernel/vtime.c b/arch/s390/kernel/vtime.c index 1ccdf4d8aa85..5e8ead4b4aba 100644 --- a/arch/s390/kernel/vtime.c +++ b/arch/s390/kernel/vtime.c | |||
| @@ -44,7 +44,7 @@ static inline void set_vtimer(__u64 expires) | |||
| 44 | __u64 timer; | 44 | __u64 timer; |
| 45 | 45 | ||
| 46 | asm volatile (" STPT %0\n" /* Store current cpu timer value */ | 46 | asm volatile (" STPT %0\n" /* Store current cpu timer value */ |
| 47 | " SPT %1" /* Set new value immediatly afterwards */ | 47 | " SPT %1" /* Set new value immediately afterwards */ |
| 48 | : "=m" (timer) : "m" (expires) ); | 48 | : "=m" (timer) : "m" (expires) ); |
| 49 | S390_lowcore.system_timer += S390_lowcore.last_update_timer - timer; | 49 | S390_lowcore.system_timer += S390_lowcore.last_update_timer - timer; |
| 50 | S390_lowcore.last_update_timer = expires; | 50 | S390_lowcore.last_update_timer = expires; |
diff --git a/arch/s390/kvm/kvm-s390.c b/arch/s390/kvm/kvm-s390.c index bade533ba288..30ca85cce314 100644 --- a/arch/s390/kvm/kvm-s390.c +++ b/arch/s390/kvm/kvm-s390.c | |||
| @@ -721,7 +721,7 @@ static int __init kvm_s390_init(void) | |||
| 721 | 721 | ||
| 722 | /* | 722 | /* |
| 723 | * guests can ask for up to 255+1 double words, we need a full page | 723 | * guests can ask for up to 255+1 double words, we need a full page |
| 724 | * to hold the maximum amount of facilites. On the other hand, we | 724 | * to hold the maximum amount of facilities. On the other hand, we |
| 725 | * only set facilities that are known to work in KVM. | 725 | * only set facilities that are known to work in KVM. |
| 726 | */ | 726 | */ |
| 727 | facilities = (unsigned long long *) get_zeroed_page(GFP_KERNEL|GFP_DMA); | 727 | facilities = (unsigned long long *) get_zeroed_page(GFP_KERNEL|GFP_DMA); |
diff --git a/arch/s390/kvm/priv.c b/arch/s390/kvm/priv.c index 9194a4b52b22..73c47bd95db3 100644 --- a/arch/s390/kvm/priv.c +++ b/arch/s390/kvm/priv.c | |||
| @@ -311,7 +311,7 @@ int kvm_s390_handle_b2(struct kvm_vcpu *vcpu) | |||
| 311 | 311 | ||
| 312 | /* | 312 | /* |
| 313 | * a lot of B2 instructions are priviledged. We first check for | 313 | * a lot of B2 instructions are priviledged. We first check for |
| 314 | * the priviledges ones, that we can handle in the kernel. If the | 314 | * the privileged ones, that we can handle in the kernel. If the |
| 315 | * kernel can handle this instruction, we check for the problem | 315 | * kernel can handle this instruction, we check for the problem |
| 316 | * state bit and (a) handle the instruction or (b) send a code 2 | 316 | * state bit and (a) handle the instruction or (b) send a code 2 |
| 317 | * program check. | 317 | * program check. |
diff --git a/arch/s390/mm/fault.c b/arch/s390/mm/fault.c index 2c57806c0858..9217e332b118 100644 --- a/arch/s390/mm/fault.c +++ b/arch/s390/mm/fault.c | |||
| @@ -392,7 +392,7 @@ void __kprobes do_protection_exception(struct pt_regs *regs, long pgm_int_code, | |||
| 392 | { | 392 | { |
| 393 | int fault; | 393 | int fault; |
| 394 | 394 | ||
| 395 | /* Protection exception is supressing, decrement psw address. */ | 395 | /* Protection exception is suppressing, decrement psw address. */ |
| 396 | regs->psw.addr -= (pgm_int_code >> 16); | 396 | regs->psw.addr -= (pgm_int_code >> 16); |
| 397 | /* | 397 | /* |
| 398 | * Check for low-address protection. This needs to be treated | 398 | * Check for low-address protection. This needs to be treated |
diff --git a/arch/score/Makefile b/arch/score/Makefile index d77dc639d8e3..974aefe86123 100644 --- a/arch/score/Makefile +++ b/arch/score/Makefile | |||
| @@ -40,5 +40,5 @@ archclean: | |||
| 40 | define archhelp | 40 | define archhelp |
| 41 | echo ' vmlinux.bin - Raw binary boot image' | 41 | echo ' vmlinux.bin - Raw binary boot image' |
| 42 | echo | 42 | echo |
| 43 | echo ' These will be default as apropriate for a configured platform.' | 43 | echo ' These will be default as appropriate for a configured platform.' |
| 44 | endef | 44 | endef |
diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug index 12fec72fec5f..1553d56cf4e0 100644 --- a/arch/sh/Kconfig.debug +++ b/arch/sh/Kconfig.debug | |||
| @@ -82,7 +82,7 @@ config SH_NO_BSS_INIT | |||
| 82 | help | 82 | help |
| 83 | If running in painfully slow environments, such as an RTL | 83 | If running in painfully slow environments, such as an RTL |
| 84 | simulation or from remote memory via SHdebug, where the memory | 84 | simulation or from remote memory via SHdebug, where the memory |
| 85 | can already be gauranteed to ber zeroed on boot, say Y. | 85 | can already be guaranteed to ber zeroed on boot, say Y. |
| 86 | 86 | ||
| 87 | For all other cases, say N. If this option seems perplexing, or | 87 | For all other cases, say N. If this option seems perplexing, or |
| 88 | you aren't sure, say N. | 88 | you aren't sure, say N. |
diff --git a/arch/sh/boards/mach-dreamcast/irq.c b/arch/sh/boards/mach-dreamcast/irq.c index 78cf2ab89d7a..f63d323f411f 100644 --- a/arch/sh/boards/mach-dreamcast/irq.c +++ b/arch/sh/boards/mach-dreamcast/irq.c | |||
| @@ -51,7 +51,7 @@ | |||
| 51 | */ | 51 | */ |
| 52 | #define LEVEL(event) (((event) - HW_EVENT_IRQ_BASE) / 32) | 52 | #define LEVEL(event) (((event) - HW_EVENT_IRQ_BASE) / 32) |
| 53 | 53 | ||
| 54 | /* Return the hardware event's bit positon within the EMR/ESR */ | 54 | /* Return the hardware event's bit position within the EMR/ESR */ |
| 55 | #define EVENT_BIT(event) (((event) - HW_EVENT_IRQ_BASE) & 31) | 55 | #define EVENT_BIT(event) (((event) - HW_EVENT_IRQ_BASE) & 31) |
| 56 | 56 | ||
| 57 | /* | 57 | /* |
diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c index fd4ff25f23b2..30ae2e4283f0 100644 --- a/arch/sh/boards/mach-ecovec24/setup.c +++ b/arch/sh/boards/mach-ecovec24/setup.c | |||
| @@ -936,7 +936,7 @@ static void __init sh_eth_init(struct sh_eth_plat_data *pd) | |||
| 936 | return; | 936 | return; |
| 937 | } | 937 | } |
| 938 | 938 | ||
| 939 | /* read MAC address frome EEPROM */ | 939 | /* read MAC address from EEPROM */ |
| 940 | for (i = 0; i < sizeof(pd->mac_addr); i++) { | 940 | for (i = 0; i < sizeof(pd->mac_addr); i++) { |
| 941 | pd->mac_addr[i] = mac_read(a, 0x10 + i); | 941 | pd->mac_addr[i] = mac_read(a, 0x10 + i); |
| 942 | msleep(10); | 942 | msleep(10); |
diff --git a/arch/sh/drivers/pci/pci-sh7751.h b/arch/sh/drivers/pci/pci-sh7751.h index 4983a4d20355..5ede38c330d3 100644 --- a/arch/sh/drivers/pci/pci-sh7751.h +++ b/arch/sh/drivers/pci/pci-sh7751.h | |||
| @@ -61,7 +61,7 @@ | |||
| 61 | #define SH7751_PCICONF3_BIST7 0x80000000 /* Bist Supported */ | 61 | #define SH7751_PCICONF3_BIST7 0x80000000 /* Bist Supported */ |
| 62 | #define SH7751_PCICONF3_BIST6 0x40000000 /* Bist Executing */ | 62 | #define SH7751_PCICONF3_BIST6 0x40000000 /* Bist Executing */ |
| 63 | #define SH7751_PCICONF3_BIST3_0 0x0F000000 /* Bist Passed */ | 63 | #define SH7751_PCICONF3_BIST3_0 0x0F000000 /* Bist Passed */ |
| 64 | #define SH7751_PCICONF3_HD7 0x00800000 /* Single Funtion device */ | 64 | #define SH7751_PCICONF3_HD7 0x00800000 /* Single Function device */ |
| 65 | #define SH7751_PCICONF3_HD6_0 0x007F0000 /* Configuration Layout */ | 65 | #define SH7751_PCICONF3_HD6_0 0x007F0000 /* Configuration Layout */ |
| 66 | #define SH7751_PCICONF3_LAT 0x0000FF00 /* Latency Timer */ | 66 | #define SH7751_PCICONF3_LAT 0x0000FF00 /* Latency Timer */ |
| 67 | #define SH7751_PCICONF3_CLS 0x000000FF /* Cache Line Size */ | 67 | #define SH7751_PCICONF3_CLS 0x000000FF /* Cache Line Size */ |
diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c index a09c77dd09db..194231cb5a70 100644 --- a/arch/sh/drivers/pci/pci.c +++ b/arch/sh/drivers/pci/pci.c | |||
| @@ -84,7 +84,7 @@ int __devinit register_pci_controller(struct pci_channel *hose) | |||
| 84 | hose_tail = &hose->next; | 84 | hose_tail = &hose->next; |
| 85 | 85 | ||
| 86 | /* | 86 | /* |
| 87 | * Do not panic here but later - this might hapen before console init. | 87 | * Do not panic here but later - this might happen before console init. |
| 88 | */ | 88 | */ |
| 89 | if (!hose->io_map_base) { | 89 | if (!hose->io_map_base) { |
| 90 | printk(KERN_WARNING | 90 | printk(KERN_WARNING |
diff --git a/arch/sh/include/asm/page.h b/arch/sh/include/asm/page.h index c4e0b3d472b9..822d6084195b 100644 --- a/arch/sh/include/asm/page.h +++ b/arch/sh/include/asm/page.h | |||
| @@ -186,7 +186,7 @@ typedef struct page *pgtable_t; | |||
| 186 | /* | 186 | /* |
| 187 | * While BYTES_PER_WORD == 4 on the current sh64 ABI, GCC will still | 187 | * While BYTES_PER_WORD == 4 on the current sh64 ABI, GCC will still |
| 188 | * happily generate {ld/st}.q pairs, requiring us to have 8-byte | 188 | * happily generate {ld/st}.q pairs, requiring us to have 8-byte |
| 189 | * alignment to avoid traps. The kmalloc alignment is gauranteed by | 189 | * alignment to avoid traps. The kmalloc alignment is guaranteed by |
| 190 | * virtue of L1_CACHE_BYTES, requiring this to only be special cased | 190 | * virtue of L1_CACHE_BYTES, requiring this to only be special cased |
| 191 | * for slab caches. | 191 | * for slab caches. |
| 192 | */ | 192 | */ |
diff --git a/arch/sh/include/asm/pgtable_32.h b/arch/sh/include/asm/pgtable_32.h index b799fe71114c..0bce3d81569e 100644 --- a/arch/sh/include/asm/pgtable_32.h +++ b/arch/sh/include/asm/pgtable_32.h | |||
| @@ -167,7 +167,7 @@ static inline unsigned long copy_ptea_attributes(unsigned long x) | |||
| 167 | #endif | 167 | #endif |
| 168 | 168 | ||
| 169 | /* | 169 | /* |
| 170 | * Mask of bits that are to be preserved accross pgprot changes. | 170 | * Mask of bits that are to be preserved across pgprot changes. |
| 171 | */ | 171 | */ |
| 172 | #define _PAGE_CHG_MASK \ | 172 | #define _PAGE_CHG_MASK \ |
| 173 | (PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | \ | 173 | (PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | \ |
diff --git a/arch/sh/include/asm/unaligned-sh4a.h b/arch/sh/include/asm/unaligned-sh4a.h index c48a9c3420da..95adc500cabc 100644 --- a/arch/sh/include/asm/unaligned-sh4a.h +++ b/arch/sh/include/asm/unaligned-sh4a.h | |||
| @@ -9,7 +9,7 @@ | |||
| 9 | * struct. | 9 | * struct. |
| 10 | * | 10 | * |
| 11 | * The same note as with the movli.l/movco.l pair applies here, as long | 11 | * The same note as with the movli.l/movco.l pair applies here, as long |
| 12 | * as the load is gauranteed to be inlined, nothing else will hook in to | 12 | * as the load is guaranteed to be inlined, nothing else will hook in to |
| 13 | * r0 and we get the return value for free. | 13 | * r0 and we get the return value for free. |
| 14 | * | 14 | * |
| 15 | * NOTE: Due to the fact we require r0 encoding, care should be taken to | 15 | * NOTE: Due to the fact we require r0 encoding, care should be taken to |
diff --git a/arch/sh/include/mach-common/mach/highlander.h b/arch/sh/include/mach-common/mach/highlander.h index 5d9d4d5154be..6ce944e33e59 100644 --- a/arch/sh/include/mach-common/mach/highlander.h +++ b/arch/sh/include/mach-common/mach/highlander.h | |||
| @@ -24,7 +24,7 @@ | |||
| 24 | #define PA_OBLED (PA_BCR+0x001c) /* On Board LED control */ | 24 | #define PA_OBLED (PA_BCR+0x001c) /* On Board LED control */ |
| 25 | #define PA_OBSW (PA_BCR+0x001e) /* On Board Switch control */ | 25 | #define PA_OBSW (PA_BCR+0x001e) /* On Board Switch control */ |
| 26 | #define PA_AUDIOSEL (PA_BCR+0x0020) /* Sound Interface Select control */ | 26 | #define PA_AUDIOSEL (PA_BCR+0x0020) /* Sound Interface Select control */ |
| 27 | #define PA_EXTPLR (PA_BCR+0x001e) /* Extention Pin Polarity control */ | 27 | #define PA_EXTPLR (PA_BCR+0x001e) /* Extension Pin Polarity control */ |
| 28 | #define PA_TPCTL (PA_BCR+0x0100) /* Touch Panel Access control */ | 28 | #define PA_TPCTL (PA_BCR+0x0100) /* Touch Panel Access control */ |
| 29 | #define PA_TPDCKCTL (PA_BCR+0x0102) /* Touch Panel Access data control */ | 29 | #define PA_TPDCKCTL (PA_BCR+0x0102) /* Touch Panel Access data control */ |
| 30 | #define PA_TPCTLCLR (PA_BCR+0x0104) /* Touch Panel Access control */ | 30 | #define PA_TPCTLCLR (PA_BCR+0x0104) /* Touch Panel Access control */ |
| @@ -89,7 +89,7 @@ | |||
| 89 | #define PA_OBLED (PA_BCR+0x0018) /* On Board LED control */ | 89 | #define PA_OBLED (PA_BCR+0x0018) /* On Board LED control */ |
| 90 | #define PA_OBSW (PA_BCR+0x001a) /* On Board Switch control */ | 90 | #define PA_OBSW (PA_BCR+0x001a) /* On Board Switch control */ |
| 91 | #define PA_AUDIOSEL (PA_BCR+0x001c) /* Sound Interface Select control */ | 91 | #define PA_AUDIOSEL (PA_BCR+0x001c) /* Sound Interface Select control */ |
| 92 | #define PA_EXTPLR (PA_BCR+0x001e) /* Extention Pin Polarity control */ | 92 | #define PA_EXTPLR (PA_BCR+0x001e) /* Extension Pin Polarity control */ |
| 93 | #define PA_TPCTL (PA_BCR+0x0100) /* Touch Panel Access control */ | 93 | #define PA_TPCTL (PA_BCR+0x0100) /* Touch Panel Access control */ |
| 94 | #define PA_TPDCKCTL (PA_BCR+0x0102) /* Touch Panel Access data control */ | 94 | #define PA_TPDCKCTL (PA_BCR+0x0102) /* Touch Panel Access data control */ |
| 95 | #define PA_TPCTLCLR (PA_BCR+0x0104) /* Touch Panel Access control */ | 95 | #define PA_TPCTLCLR (PA_BCR+0x0104) /* Touch Panel Access control */ |
diff --git a/arch/sh/include/mach-common/mach/r2d.h b/arch/sh/include/mach-common/mach/r2d.h index 0a800157b826..e04f75eaa153 100644 --- a/arch/sh/include/mach-common/mach/r2d.h +++ b/arch/sh/include/mach-common/mach/r2d.h | |||
| @@ -18,18 +18,18 @@ | |||
| 18 | #define PA_DISPCTL 0xa4000008 /* Display Timing control */ | 18 | #define PA_DISPCTL 0xa4000008 /* Display Timing control */ |
| 19 | #define PA_SDMPOW 0xa400000a /* SD Power control */ | 19 | #define PA_SDMPOW 0xa400000a /* SD Power control */ |
| 20 | #define PA_RTCCE 0xa400000c /* RTC(9701) Enable control */ | 20 | #define PA_RTCCE 0xa400000c /* RTC(9701) Enable control */ |
| 21 | #define PA_PCICD 0xa400000e /* PCI Extention detect control */ | 21 | #define PA_PCICD 0xa400000e /* PCI Extension detect control */ |
| 22 | #define PA_VOYAGERRTS 0xa4000020 /* VOYAGER Reset control */ | 22 | #define PA_VOYAGERRTS 0xa4000020 /* VOYAGER Reset control */ |
| 23 | 23 | ||
| 24 | #define PA_R2D1_AXRST 0xa4000022 /* AX_LAN Reset control */ | 24 | #define PA_R2D1_AXRST 0xa4000022 /* AX_LAN Reset control */ |
| 25 | #define PA_R2D1_CFRST 0xa4000024 /* CF Reset control */ | 25 | #define PA_R2D1_CFRST 0xa4000024 /* CF Reset control */ |
| 26 | #define PA_R2D1_ADMRTS 0xa4000026 /* SD Reset control */ | 26 | #define PA_R2D1_ADMRTS 0xa4000026 /* SD Reset control */ |
| 27 | #define PA_R2D1_EXTRST 0xa4000028 /* Extention Reset control */ | 27 | #define PA_R2D1_EXTRST 0xa4000028 /* Extension Reset control */ |
| 28 | #define PA_R2D1_CFCDINTCLR 0xa400002a /* CF Insert Interrupt clear */ | 28 | #define PA_R2D1_CFCDINTCLR 0xa400002a /* CF Insert Interrupt clear */ |
| 29 | 29 | ||
| 30 | #define PA_R2DPLUS_CFRST 0xa4000022 /* CF Reset control */ | 30 | #define PA_R2DPLUS_CFRST 0xa4000022 /* CF Reset control */ |
| 31 | #define PA_R2DPLUS_ADMRTS 0xa4000024 /* SD Reset control */ | 31 | #define PA_R2DPLUS_ADMRTS 0xa4000024 /* SD Reset control */ |
| 32 | #define PA_R2DPLUS_EXTRST 0xa4000026 /* Extention Reset control */ | 32 | #define PA_R2DPLUS_EXTRST 0xa4000026 /* Extension Reset control */ |
| 33 | #define PA_R2DPLUS_CFCDINTCLR 0xa4000028 /* CF Insert Interrupt clear */ | 33 | #define PA_R2DPLUS_CFCDINTCLR 0xa4000028 /* CF Insert Interrupt clear */ |
| 34 | #define PA_R2DPLUS_KEYCTLCLR 0xa400002a /* Key Interrupt clear */ | 34 | #define PA_R2DPLUS_KEYCTLCLR 0xa400002a /* Key Interrupt clear */ |
| 35 | 35 | ||
diff --git a/arch/sh/kernel/cpu/clock-cpg.c b/arch/sh/kernel/cpu/clock-cpg.c index dd0e0f211359..8f63a264a842 100644 --- a/arch/sh/kernel/cpu/clock-cpg.c +++ b/arch/sh/kernel/cpu/clock-cpg.c | |||
| @@ -67,7 +67,7 @@ int __init __deprecated cpg_clk_init(void) | |||
| 67 | } | 67 | } |
| 68 | 68 | ||
| 69 | /* | 69 | /* |
| 70 | * Placeholder for compatability, until the lazy CPUs do this | 70 | * Placeholder for compatibility, until the lazy CPUs do this |
| 71 | * on their own. | 71 | * on their own. |
| 72 | */ | 72 | */ |
| 73 | int __init __weak arch_clk_init(void) | 73 | int __init __weak arch_clk_init(void) |
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c index 1656b8c91faf..beba32beb6d9 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c | |||
| @@ -648,7 +648,7 @@ static void __init sh7786_usb_setup(void) | |||
| 648 | * The following settings are necessary | 648 | * The following settings are necessary |
| 649 | * for using the USB modules. | 649 | * for using the USB modules. |
| 650 | * | 650 | * |
| 651 | * see "USB Inital Settings" for detail | 651 | * see "USB Initial Settings" for detail |
| 652 | */ | 652 | */ |
| 653 | __raw_writel(USBINITVAL1, USBINITREG1); | 653 | __raw_writel(USBINITVAL1, USBINITREG1); |
| 654 | __raw_writel(USBINITVAL2, USBINITREG2); | 654 | __raw_writel(USBINITVAL2, USBINITREG2); |
diff --git a/arch/sh/kernel/irq.c b/arch/sh/kernel/irq.c index 64ea0b165399..91971103b62b 100644 --- a/arch/sh/kernel/irq.c +++ b/arch/sh/kernel/irq.c | |||
| @@ -183,7 +183,7 @@ asmlinkage void do_softirq(void) | |||
| 183 | ); | 183 | ); |
| 184 | 184 | ||
| 185 | /* | 185 | /* |
| 186 | * Shouldnt happen, we returned above if in_interrupt(): | 186 | * Shouldn't happen, we returned above if in_interrupt(): |
| 187 | */ | 187 | */ |
| 188 | WARN_ON_ONCE(softirq_count()); | 188 | WARN_ON_ONCE(softirq_count()); |
| 189 | } | 189 | } |
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c index 4f267160c515..58bff45d1156 100644 --- a/arch/sh/kernel/setup.c +++ b/arch/sh/kernel/setup.c | |||
| @@ -150,7 +150,7 @@ void __init check_for_initrd(void) | |||
| 150 | } | 150 | } |
| 151 | 151 | ||
| 152 | /* | 152 | /* |
| 153 | * If we got this far inspite of the boot loader's best efforts | 153 | * If we got this far in spite of the boot loader's best efforts |
| 154 | * to the contrary, assume we actually have a valid initrd and | 154 | * to the contrary, assume we actually have a valid initrd and |
| 155 | * fix up the root dev. | 155 | * fix up the root dev. |
| 156 | */ | 156 | */ |
diff --git a/arch/sh/lib64/copy_user_memcpy.S b/arch/sh/lib64/copy_user_memcpy.S index 2a62816d2ddd..49aeabeba2c2 100644 --- a/arch/sh/lib64/copy_user_memcpy.S +++ b/arch/sh/lib64/copy_user_memcpy.S | |||
| @@ -27,7 +27,7 @@ | |||
| 27 | ! 2.: When there are two or three bytes in the last word of an 11-or-more | 27 | ! 2.: When there are two or three bytes in the last word of an 11-or-more |
| 28 | ! bytes memory chunk to b copied, the rest of the word can be read | 28 | ! bytes memory chunk to b copied, the rest of the word can be read |
| 29 | ! without side effects. | 29 | ! without side effects. |
| 30 | ! This could be easily changed by increasing the minumum size of | 30 | ! This could be easily changed by increasing the minimum size of |
| 31 | ! a fast memcpy and the amount subtracted from r7 before L_2l_loop be 2, | 31 | ! a fast memcpy and the amount subtracted from r7 before L_2l_loop be 2, |
| 32 | ! however, this would cost a few extra cyles on average. | 32 | ! however, this would cost a few extra cyles on average. |
| 33 | ! For SHmedia, the assumption is that any quadword can be read in its | 33 | ! For SHmedia, the assumption is that any quadword can be read in its |
diff --git a/arch/sh/lib64/memcpy.S b/arch/sh/lib64/memcpy.S index dd300c372ce1..5d682e0ee24f 100644 --- a/arch/sh/lib64/memcpy.S +++ b/arch/sh/lib64/memcpy.S | |||
| @@ -29,7 +29,7 @@ | |||
| 29 | ! 2.: When there are two or three bytes in the last word of an 11-or-more | 29 | ! 2.: When there are two or three bytes in the last word of an 11-or-more |
| 30 | ! bytes memory chunk to b copied, the rest of the word can be read | 30 | ! bytes memory chunk to b copied, the rest of the word can be read |
| 31 | ! without side effects. | 31 | ! without side effects. |
| 32 | ! This could be easily changed by increasing the minumum size of | 32 | ! This could be easily changed by increasing the minimum size of |
| 33 | ! a fast memcpy and the amount subtracted from r7 before L_2l_loop be 2, | 33 | ! a fast memcpy and the amount subtracted from r7 before L_2l_loop be 2, |
| 34 | ! however, this would cost a few extra cyles on average. | 34 | ! however, this would cost a few extra cyles on average. |
| 35 | ! For SHmedia, the assumption is that any quadword can be read in its | 35 | ! For SHmedia, the assumption is that any quadword can be read in its |
diff --git a/arch/sparc/include/asm/hypervisor.h b/arch/sparc/include/asm/hypervisor.h index bafe5a631b6d..75686409be24 100644 --- a/arch/sparc/include/asm/hypervisor.h +++ b/arch/sparc/include/asm/hypervisor.h | |||
| @@ -654,7 +654,7 @@ extern unsigned long sun4v_mmu_tsb_ctx0(unsigned long num_descriptions, | |||
| 654 | * ARG3: mmu context | 654 | * ARG3: mmu context |
| 655 | * ARG4: flags (HV_MMU_{IMMU,DMMU}) | 655 | * ARG4: flags (HV_MMU_{IMMU,DMMU}) |
| 656 | * RET0: status | 656 | * RET0: status |
| 657 | * ERRORS: EINVAL Invalid virutal address, context, or | 657 | * ERRORS: EINVAL Invalid virtual address, context, or |
| 658 | * flags value | 658 | * flags value |
| 659 | * ENOTSUPPORTED ARG0 or ARG1 is non-zero | 659 | * ENOTSUPPORTED ARG0 or ARG1 is non-zero |
| 660 | * | 660 | * |
| @@ -721,7 +721,7 @@ extern void sun4v_mmu_demap_all(void); | |||
| 721 | * ARG2: TTE | 721 | * ARG2: TTE |
| 722 | * ARG3: flags (HV_MMU_{IMMU,DMMU}) | 722 | * ARG3: flags (HV_MMU_{IMMU,DMMU}) |
| 723 | * RET0: status | 723 | * RET0: status |
| 724 | * ERRORS: EINVAL Invalid virutal address or flags value | 724 | * ERRORS: EINVAL Invalid virtual address or flags value |
| 725 | * EBADPGSZ Invalid page size value | 725 | * EBADPGSZ Invalid page size value |
| 726 | * ENORADDR Invalid real address in TTE | 726 | * ENORADDR Invalid real address in TTE |
| 727 | * ETOOMANY Too many mappings (max of 8 reached) | 727 | * ETOOMANY Too many mappings (max of 8 reached) |
| @@ -800,7 +800,7 @@ extern unsigned long sun4v_mmu_map_perm_addr(unsigned long vaddr, | |||
| 800 | * ARG1: reserved, must be zero | 800 | * ARG1: reserved, must be zero |
| 801 | * ARG2: flags (HV_MMU_{IMMU,DMMU}) | 801 | * ARG2: flags (HV_MMU_{IMMU,DMMU}) |
| 802 | * RET0: status | 802 | * RET0: status |
| 803 | * ERRORS: EINVAL Invalid virutal address or flags value | 803 | * ERRORS: EINVAL Invalid virtual address or flags value |
| 804 | * ENOMAP Specified mapping was not found | 804 | * ENOMAP Specified mapping was not found |
| 805 | * | 805 | * |
| 806 | * Demaps any permanent page mapping (established via | 806 | * Demaps any permanent page mapping (established via |
| @@ -1205,7 +1205,7 @@ struct hv_trap_trace_control { | |||
| 1205 | * structure contents. Attempts to do so will result in undefined | 1205 | * structure contents. Attempts to do so will result in undefined |
| 1206 | * behavior for the guest. | 1206 | * behavior for the guest. |
| 1207 | * | 1207 | * |
| 1208 | * Each trap trace buffer entry is layed out as follows: | 1208 | * Each trap trace buffer entry is laid out as follows: |
| 1209 | */ | 1209 | */ |
| 1210 | #ifndef __ASSEMBLY__ | 1210 | #ifndef __ASSEMBLY__ |
| 1211 | struct hv_trap_trace_entry { | 1211 | struct hv_trap_trace_entry { |
| @@ -1300,7 +1300,7 @@ struct hv_trap_trace_entry { | |||
| 1300 | * state in RET1. Future systems may define various flags for the | 1300 | * state in RET1. Future systems may define various flags for the |
| 1301 | * enable argument (ARG0), for the moment a guest should pass | 1301 | * enable argument (ARG0), for the moment a guest should pass |
| 1302 | * "(uint64_t) -1" to enable, and "(uint64_t) 0" to disable all | 1302 | * "(uint64_t) -1" to enable, and "(uint64_t) 0" to disable all |
| 1303 | * tracing - which will ensure future compatability. | 1303 | * tracing - which will ensure future compatibility. |
| 1304 | */ | 1304 | */ |
| 1305 | #define HV_FAST_TTRACE_ENABLE 0x92 | 1305 | #define HV_FAST_TTRACE_ENABLE 0x92 |
| 1306 | 1306 | ||
| @@ -1880,7 +1880,7 @@ extern unsigned long sun4v_vintr_set_target(unsigned long dev_handle, | |||
| 1880 | * pci_device, at pci_config_offset from the beginning of the device's | 1880 | * pci_device, at pci_config_offset from the beginning of the device's |
| 1881 | * configuration space. If there was no error, RET1 is set to zero and | 1881 | * configuration space. If there was no error, RET1 is set to zero and |
| 1882 | * RET2 is set to the data read. Insignificant bits in RET2 are not | 1882 | * RET2 is set to the data read. Insignificant bits in RET2 are not |
| 1883 | * guarenteed to have any specific value and therefore must be ignored. | 1883 | * guaranteed to have any specific value and therefore must be ignored. |
| 1884 | * | 1884 | * |
| 1885 | * The data returned in RET2 is size based byte swapped. | 1885 | * The data returned in RET2 is size based byte swapped. |
| 1886 | * | 1886 | * |
| @@ -1941,9 +1941,9 @@ extern unsigned long sun4v_vintr_set_target(unsigned long dev_handle, | |||
| 1941 | * and return the actual data read in RET2. The data returned is size based | 1941 | * and return the actual data read in RET2. The data returned is size based |
| 1942 | * byte swapped. | 1942 | * byte swapped. |
| 1943 | * | 1943 | * |
| 1944 | * Non-significant bits in RET2 are not guarenteed to have any specific value | 1944 | * Non-significant bits in RET2 are not guaranteed to have any specific value |
| 1945 | * and therefore must be ignored. If RET1 is returned as non-zero, the data | 1945 | * and therefore must be ignored. If RET1 is returned as non-zero, the data |
| 1946 | * value is not guarenteed to have any specific value and should be ignored. | 1946 | * value is not guaranteed to have any specific value and should be ignored. |
| 1947 | * | 1947 | * |
| 1948 | * The caller must have permission to read from the given devhandle, real | 1948 | * The caller must have permission to read from the given devhandle, real |
| 1949 | * address, which must be an IO address. The argument real address must be a | 1949 | * address, which must be an IO address. The argument real address must be a |
| @@ -2456,9 +2456,9 @@ extern unsigned long sun4v_vintr_set_target(unsigned long dev_handle, | |||
| 2456 | * | 2456 | * |
| 2457 | * As receive queue configuration causes a reset of the queue's head and | 2457 | * As receive queue configuration causes a reset of the queue's head and |
| 2458 | * tail pointers there is no way for a gues to determine how many entries | 2458 | * tail pointers there is no way for a gues to determine how many entries |
| 2459 | * have been received between a preceeding ldc_get_rx_state() API call | 2459 | * have been received between a preceding ldc_get_rx_state() API call |
| 2460 | * and the completion of the configuration operation. It should be noted | 2460 | * and the completion of the configuration operation. It should be noted |
| 2461 | * that datagram delivery is not guarenteed via domain channels anyway, | 2461 | * that datagram delivery is not guaranteed via domain channels anyway, |
| 2462 | * and therefore any higher protocol should be resilient to datagram | 2462 | * and therefore any higher protocol should be resilient to datagram |
| 2463 | * loss if necessary. However, to overcome this specific race potential | 2463 | * loss if necessary. However, to overcome this specific race potential |
| 2464 | * it is recommended, for example, that a higher level protocol be employed | 2464 | * it is recommended, for example, that a higher level protocol be employed |
diff --git a/arch/sparc/include/asm/ns87303.h b/arch/sparc/include/asm/ns87303.h index 686defe6aaa0..af755483e17d 100644 --- a/arch/sparc/include/asm/ns87303.h +++ b/arch/sparc/include/asm/ns87303.h | |||
| @@ -37,7 +37,7 @@ | |||
| 37 | /* Power and Test Register (PTR) bits */ | 37 | /* Power and Test Register (PTR) bits */ |
| 38 | #define PTR_LPTB_IRQ7 0x08 | 38 | #define PTR_LPTB_IRQ7 0x08 |
| 39 | #define PTR_LEVEL_IRQ 0x80 /* When not ECP/EPP: Use level IRQ */ | 39 | #define PTR_LEVEL_IRQ 0x80 /* When not ECP/EPP: Use level IRQ */ |
| 40 | #define PTR_LPT_REG_DIR 0x80 /* When ECP/EPP: LPT CTR controlls direction */ | 40 | #define PTR_LPT_REG_DIR 0x80 /* When ECP/EPP: LPT CTR controls direction */ |
| 41 | /* of the parallel port */ | 41 | /* of the parallel port */ |
| 42 | 42 | ||
| 43 | /* Function Control Register (FCR) bits */ | 43 | /* Function Control Register (FCR) bits */ |
diff --git a/arch/sparc/include/asm/pcr.h b/arch/sparc/include/asm/pcr.h index 843e4faf6a50..288d7beba051 100644 --- a/arch/sparc/include/asm/pcr.h +++ b/arch/sparc/include/asm/pcr.h | |||
| @@ -31,7 +31,7 @@ extern unsigned int picl_shift; | |||
| 31 | 31 | ||
| 32 | /* In order to commonize as much of the implementation as | 32 | /* In order to commonize as much of the implementation as |
| 33 | * possible, we use PICH as our counter. Mostly this is | 33 | * possible, we use PICH as our counter. Mostly this is |
| 34 | * to accomodate Niagara-1 which can only count insn cycles | 34 | * to accommodate Niagara-1 which can only count insn cycles |
| 35 | * in PICH. | 35 | * in PICH. |
| 36 | */ | 36 | */ |
| 37 | static inline u64 picl_value(unsigned int nmi_hz) | 37 | static inline u64 picl_value(unsigned int nmi_hz) |
diff --git a/arch/sparc/include/asm/ptrace.h b/arch/sparc/include/asm/ptrace.h index 30b0b797dc0c..c7ad3fe2b252 100644 --- a/arch/sparc/include/asm/ptrace.h +++ b/arch/sparc/include/asm/ptrace.h | |||
| @@ -33,7 +33,7 @@ struct pt_regs { | |||
| 33 | * things like "in a system call" etc. for an arbitray | 33 | * things like "in a system call" etc. for an arbitray |
| 34 | * process. | 34 | * process. |
| 35 | * | 35 | * |
| 36 | * The PT_REGS_MAGIC is choosen such that it can be | 36 | * The PT_REGS_MAGIC is chosen such that it can be |
| 37 | * loaded completely using just a sethi instruction. | 37 | * loaded completely using just a sethi instruction. |
| 38 | */ | 38 | */ |
| 39 | unsigned int magic; | 39 | unsigned int magic; |
diff --git a/arch/sparc/kernel/entry.S b/arch/sparc/kernel/entry.S index 906ee3e24cc9..6da784a5612b 100644 --- a/arch/sparc/kernel/entry.S +++ b/arch/sparc/kernel/entry.S | |||
| @@ -801,7 +801,7 @@ vac_linesize_patch_32: subcc %l7, 32, %l7 | |||
| 801 | .globl vac_hwflush_patch1_on, vac_hwflush_patch2_on | 801 | .globl vac_hwflush_patch1_on, vac_hwflush_patch2_on |
| 802 | 802 | ||
| 803 | /* | 803 | /* |
| 804 | * Ugly, but we cant use hardware flushing on the sun4 and we'd require | 804 | * Ugly, but we can't use hardware flushing on the sun4 and we'd require |
| 805 | * two instructions (Anton) | 805 | * two instructions (Anton) |
| 806 | */ | 806 | */ |
| 807 | vac_hwflush_patch1_on: addcc %l7, -PAGE_SIZE, %l7 | 807 | vac_hwflush_patch1_on: addcc %l7, -PAGE_SIZE, %l7 |
| @@ -851,7 +851,7 @@ sun4c_fault: | |||
| 851 | sethi %hi(~((1 << SUN4C_REAL_PGDIR_SHIFT) - 1)), %l4 | 851 | sethi %hi(~((1 << SUN4C_REAL_PGDIR_SHIFT) - 1)), %l4 |
| 852 | 852 | ||
| 853 | /* If the kernel references a bum kernel pointer, or a pte which | 853 | /* If the kernel references a bum kernel pointer, or a pte which |
| 854 | * points to a non existant page in ram, we will run this code | 854 | * points to a non existent page in ram, we will run this code |
| 855 | * _forever_ and lock up the machine!!!!! So we must check for | 855 | * _forever_ and lock up the machine!!!!! So we must check for |
| 856 | * this condition, the AC_SYNC_ERR bits are what we must examine. | 856 | * this condition, the AC_SYNC_ERR bits are what we must examine. |
| 857 | * Also a parity error would make this happen as well. So we just | 857 | * Also a parity error would make this happen as well. So we just |
diff --git a/arch/sparc/kernel/head_64.S b/arch/sparc/kernel/head_64.S index f8f21050448b..aa594c792d19 100644 --- a/arch/sparc/kernel/head_64.S +++ b/arch/sparc/kernel/head_64.S | |||
| @@ -85,7 +85,7 @@ sparc_ramdisk_image64: | |||
| 85 | sparc64_boot: | 85 | sparc64_boot: |
| 86 | mov %o4, %l7 | 86 | mov %o4, %l7 |
| 87 | 87 | ||
| 88 | /* We need to remap the kernel. Use position independant | 88 | /* We need to remap the kernel. Use position independent |
| 89 | * code to remap us to KERNBASE. | 89 | * code to remap us to KERNBASE. |
| 90 | * | 90 | * |
| 91 | * SILO can invoke us with 32-bit address masking enabled, | 91 | * SILO can invoke us with 32-bit address masking enabled, |
diff --git a/arch/sparc/kernel/init_task.c b/arch/sparc/kernel/init_task.c index 5fe3d65581f7..35f141a9f506 100644 --- a/arch/sparc/kernel/init_task.c +++ b/arch/sparc/kernel/init_task.c | |||
| @@ -15,7 +15,7 @@ EXPORT_SYMBOL(init_task); | |||
| 15 | 15 | ||
| 16 | /* .text section in head.S is aligned at 8k boundary and this gets linked | 16 | /* .text section in head.S is aligned at 8k boundary and this gets linked |
| 17 | * right after that so that the init_thread_union is aligned properly as well. | 17 | * right after that so that the init_thread_union is aligned properly as well. |
| 18 | * If this is not aligned on a 8k boundry, then you should change code | 18 | * If this is not aligned on a 8k boundary, then you should change code |
| 19 | * in etrap.S which assumes it. | 19 | * in etrap.S which assumes it. |
| 20 | */ | 20 | */ |
| 21 | union thread_union init_thread_union __init_task_data = | 21 | union thread_union init_thread_union __init_task_data = |
diff --git a/arch/sparc/kernel/of_device_64.c b/arch/sparc/kernel/of_device_64.c index 63cd4e5d47c2..5c149689bb20 100644 --- a/arch/sparc/kernel/of_device_64.c +++ b/arch/sparc/kernel/of_device_64.c | |||
| @@ -459,7 +459,7 @@ apply_interrupt_map(struct device_node *dp, struct device_node *pp, | |||
| 459 | * | 459 | * |
| 460 | * Handle this by deciding that, if we didn't get a | 460 | * Handle this by deciding that, if we didn't get a |
| 461 | * match in the parent's 'interrupt-map', and the | 461 | * match in the parent's 'interrupt-map', and the |
| 462 | * parent is an IRQ translater, then use the parent as | 462 | * parent is an IRQ translator, then use the parent as |
| 463 | * our IRQ controller. | 463 | * our IRQ controller. |
| 464 | */ | 464 | */ |
| 465 | if (pp->irq_trans) | 465 | if (pp->irq_trans) |
diff --git a/arch/sparc/kernel/perf_event.c b/arch/sparc/kernel/perf_event.c index 760578687e7c..ee8426ede7c7 100644 --- a/arch/sparc/kernel/perf_event.c +++ b/arch/sparc/kernel/perf_event.c | |||
| @@ -1027,7 +1027,7 @@ static int sparc_pmu_add(struct perf_event *event, int ef_flags) | |||
| 1027 | 1027 | ||
| 1028 | /* | 1028 | /* |
| 1029 | * If group events scheduling transaction was started, | 1029 | * If group events scheduling transaction was started, |
| 1030 | * skip the schedulability test here, it will be peformed | 1030 | * skip the schedulability test here, it will be performed |
| 1031 | * at commit time(->commit_txn) as a whole | 1031 | * at commit time(->commit_txn) as a whole |
| 1032 | */ | 1032 | */ |
| 1033 | if (cpuc->group_flag & PERF_EVENT_TXN) | 1033 | if (cpuc->group_flag & PERF_EVENT_TXN) |
diff --git a/arch/sparc/math-emu/Makefile b/arch/sparc/math-emu/Makefile index b9085ecbb27b..825dbee94d84 100644 --- a/arch/sparc/math-emu/Makefile +++ b/arch/sparc/math-emu/Makefile | |||
| @@ -2,7 +2,7 @@ | |||
| 2 | # Makefile for the FPU instruction emulation. | 2 | # Makefile for the FPU instruction emulation. |
| 3 | # | 3 | # |
| 4 | 4 | ||
| 5 | # supress all warnings - as math.c produces a lot! | 5 | # suppress all warnings - as math.c produces a lot! |
| 6 | ccflags-y := -w | 6 | ccflags-y := -w |
| 7 | 7 | ||
| 8 | obj-y := math_$(BITS).o | 8 | obj-y := math_$(BITS).o |
diff --git a/arch/tile/Kconfig b/arch/tile/Kconfig index 6e2cdd5ae96b..e32b0c23c4c8 100644 --- a/arch/tile/Kconfig +++ b/arch/tile/Kconfig | |||
| @@ -51,7 +51,7 @@ config GENERIC_TIME | |||
| 51 | config GENERIC_CLOCKEVENTS | 51 | config GENERIC_CLOCKEVENTS |
| 52 | def_bool y | 52 | def_bool y |
| 53 | 53 | ||
| 54 | # FIXME: tilegx can implement a more efficent rwsem. | 54 | # FIXME: tilegx can implement a more efficient rwsem. |
| 55 | config RWSEM_GENERIC_SPINLOCK | 55 | config RWSEM_GENERIC_SPINLOCK |
| 56 | def_bool y | 56 | def_bool y |
| 57 | 57 | ||
diff --git a/arch/tile/include/hv/drv_xgbe_intf.h b/arch/tile/include/hv/drv_xgbe_intf.h index 146e47d5334b..f13188ac281a 100644 --- a/arch/tile/include/hv/drv_xgbe_intf.h +++ b/arch/tile/include/hv/drv_xgbe_intf.h | |||
| @@ -319,7 +319,7 @@ typedef union | |||
| 319 | * is an error code, or zero if no error. The val0 member is the | 319 | * is an error code, or zero if no error. The val0 member is the |
| 320 | * updated value of seqno; it has been incremented by 1 for each | 320 | * updated value of seqno; it has been incremented by 1 for each |
| 321 | * packet sent. That increment may be less than nentries if an | 321 | * packet sent. That increment may be less than nentries if an |
| 322 | * error occured, or if some of the entries in the vector contain | 322 | * error occurred, or if some of the entries in the vector contain |
| 323 | * handles equal to NETIO_PKT_HANDLE_NONE. The val1 member is the | 323 | * handles equal to NETIO_PKT_HANDLE_NONE. The val1 member is the |
| 324 | * updated value of nentries; it has been decremented by 1 for each | 324 | * updated value of nentries; it has been decremented by 1 for each |
| 325 | * vector entry processed. Again, that decrement may be less than | 325 | * vector entry processed. Again, that decrement may be less than |
diff --git a/arch/tile/include/hv/hypervisor.h b/arch/tile/include/hv/hypervisor.h index 1b8bf03d62a0..ee41bca4c8c4 100644 --- a/arch/tile/include/hv/hypervisor.h +++ b/arch/tile/include/hv/hypervisor.h | |||
| @@ -1340,7 +1340,7 @@ typedef struct | |||
| 1340 | * this operation. If any permanent delivery errors were encountered, | 1340 | * this operation. If any permanent delivery errors were encountered, |
| 1341 | * the routine returns HV_ERECIP. In the event of permanent delivery | 1341 | * the routine returns HV_ERECIP. In the event of permanent delivery |
| 1342 | * errors, it may be the case that delivery was not attempted to all | 1342 | * errors, it may be the case that delivery was not attempted to all |
| 1343 | * recipients; if any messages were succesfully delivered, however, | 1343 | * recipients; if any messages were successfully delivered, however, |
| 1344 | * recipients' state values will be updated appropriately. | 1344 | * recipients' state values will be updated appropriately. |
| 1345 | * | 1345 | * |
| 1346 | * It is explicitly legal to specify a recipient structure whose state | 1346 | * It is explicitly legal to specify a recipient structure whose state |
| @@ -1359,7 +1359,7 @@ typedef struct | |||
| 1359 | * never call hv_receive_message, or could register a different state | 1359 | * never call hv_receive_message, or could register a different state |
| 1360 | * buffer, losing the message. | 1360 | * buffer, losing the message. |
| 1361 | * | 1361 | * |
| 1362 | * Specifiying the same recipient more than once in the recipient list | 1362 | * Specifying the same recipient more than once in the recipient list |
| 1363 | * is an error, which will not result in an error return but which may | 1363 | * is an error, which will not result in an error return but which may |
| 1364 | * or may not result in more than one message being delivered to the | 1364 | * or may not result in more than one message being delivered to the |
| 1365 | * recipient tile. | 1365 | * recipient tile. |
diff --git a/arch/tile/kernel/pci.c b/arch/tile/kernel/pci.c index a1ee25be9ad9..ea38f0c9ec7c 100644 --- a/arch/tile/kernel/pci.c +++ b/arch/tile/kernel/pci.c | |||
| @@ -36,7 +36,7 @@ | |||
| 36 | * Initialization flow and process | 36 | * Initialization flow and process |
| 37 | * ------------------------------- | 37 | * ------------------------------- |
| 38 | * | 38 | * |
| 39 | * This files containes the routines to search for PCI buses, | 39 | * This files contains the routines to search for PCI buses, |
| 40 | * enumerate the buses, and configure any attached devices. | 40 | * enumerate the buses, and configure any attached devices. |
| 41 | * | 41 | * |
| 42 | * There are two entry points here: | 42 | * There are two entry points here: |
| @@ -519,7 +519,7 @@ static int __devinit tile_cfg_read(struct pci_bus *bus, | |||
| 519 | 519 | ||
| 520 | 520 | ||
| 521 | /* | 521 | /* |
| 522 | * See tile_cfg_read() for relevent comments. | 522 | * See tile_cfg_read() for relevant comments. |
| 523 | * Note that "val" is the value to write, not a pointer to that value. | 523 | * Note that "val" is the value to write, not a pointer to that value. |
| 524 | */ | 524 | */ |
| 525 | static int __devinit tile_cfg_write(struct pci_bus *bus, | 525 | static int __devinit tile_cfg_write(struct pci_bus *bus, |
diff --git a/arch/tile/mm/fault.c b/arch/tile/mm/fault.c index 758f597f488c..51f8663bf074 100644 --- a/arch/tile/mm/fault.c +++ b/arch/tile/mm/fault.c | |||
| @@ -290,7 +290,7 @@ static int handle_page_fault(struct pt_regs *regs, | |||
| 290 | /* | 290 | /* |
| 291 | * Early on, we need to check for migrating PTE entries; | 291 | * Early on, we need to check for migrating PTE entries; |
| 292 | * see homecache.c. If we find a migrating PTE, we wait until | 292 | * see homecache.c. If we find a migrating PTE, we wait until |
| 293 | * the backing page claims to be done migrating, then we procede. | 293 | * the backing page claims to be done migrating, then we proceed. |
| 294 | * For kernel PTEs, we rewrite the PTE and return and retry. | 294 | * For kernel PTEs, we rewrite the PTE and return and retry. |
| 295 | * Otherwise, we treat the fault like a normal "no PTE" fault, | 295 | * Otherwise, we treat the fault like a normal "no PTE" fault, |
| 296 | * rather than trying to patch up the existing PTE. | 296 | * rather than trying to patch up the existing PTE. |
diff --git a/arch/tile/mm/hugetlbpage.c b/arch/tile/mm/hugetlbpage.c index 201a582c4137..42cfcba4e1ef 100644 --- a/arch/tile/mm/hugetlbpage.c +++ b/arch/tile/mm/hugetlbpage.c | |||
| @@ -219,7 +219,7 @@ try_again: | |||
| 219 | if (mm->free_area_cache < len) | 219 | if (mm->free_area_cache < len) |
| 220 | goto fail; | 220 | goto fail; |
| 221 | 221 | ||
| 222 | /* either no address requested or cant fit in requested address hole */ | 222 | /* either no address requested or can't fit in requested address hole */ |
| 223 | addr = (mm->free_area_cache - len) & huge_page_mask(h); | 223 | addr = (mm->free_area_cache - len) & huge_page_mask(h); |
| 224 | do { | 224 | do { |
| 225 | /* | 225 | /* |
diff --git a/arch/um/Kconfig.net b/arch/um/Kconfig.net index 9e9a4aaa703d..3160b1a5adb7 100644 --- a/arch/um/Kconfig.net +++ b/arch/um/Kconfig.net | |||
| @@ -186,7 +186,7 @@ config UML_NET_SLIRP | |||
| 186 | other transports, SLiRP works without the need of root level | 186 | other transports, SLiRP works without the need of root level |
| 187 | privleges, setuid binaries, or SLIP devices on the host. This | 187 | privleges, setuid binaries, or SLIP devices on the host. This |
| 188 | also means not every type of connection is possible, but most | 188 | also means not every type of connection is possible, but most |
| 189 | situations can be accomodated with carefully crafted slirp | 189 | situations can be accommodated with carefully crafted slirp |
| 190 | commands that can be passed along as part of the network device's | 190 | commands that can be passed along as part of the network device's |
| 191 | setup string. The effect of this transport on the UML is similar | 191 | setup string. The effect of this transport on the UML is similar |
| 192 | that of a host behind a firewall that masquerades all network | 192 | that of a host behind a firewall that masquerades all network |
diff --git a/arch/unicore32/include/mach/regs-umal.h b/arch/unicore32/include/mach/regs-umal.h index 885bb62fee71..aa22df74e11d 100644 --- a/arch/unicore32/include/mach/regs-umal.h +++ b/arch/unicore32/include/mach/regs-umal.h | |||
| @@ -52,7 +52,7 @@ | |||
| 52 | */ | 52 | */ |
| 53 | #define UMAL_MIISTATUS (PKUNITY_UMAL_BASE + 0x0030) | 53 | #define UMAL_MIISTATUS (PKUNITY_UMAL_BASE + 0x0030) |
| 54 | /* | 54 | /* |
| 55 | * MII Managment Indicator UMAL_MIIIDCT | 55 | * MII Management Indicator UMAL_MIIIDCT |
| 56 | */ | 56 | */ |
| 57 | #define UMAL_MIIIDCT (PKUNITY_UMAL_BASE + 0x0034) | 57 | #define UMAL_MIIIDCT (PKUNITY_UMAL_BASE + 0x0034) |
| 58 | /* | 58 | /* |
| @@ -91,7 +91,7 @@ | |||
| 91 | #define UMAL_FIFORAM6 (PKUNITY_UMAL_BASE + 0x0078) | 91 | #define UMAL_FIFORAM6 (PKUNITY_UMAL_BASE + 0x0078) |
| 92 | #define UMAL_FIFORAM7 (PKUNITY_UMAL_BASE + 0x007c) | 92 | #define UMAL_FIFORAM7 (PKUNITY_UMAL_BASE + 0x007c) |
| 93 | 93 | ||
| 94 | /* MAHBE MODUEL OF UMAL */ | 94 | /* MAHBE MODULE OF UMAL */ |
| 95 | /* UMAL's MAHBE module interfaces to the host system through 32-bit AHB Master | 95 | /* UMAL's MAHBE module interfaces to the host system through 32-bit AHB Master |
| 96 | * and Slave ports.Registers within the M-AHBE provide Control and Status | 96 | * and Slave ports.Registers within the M-AHBE provide Control and Status |
| 97 | * information concerning these transfers. | 97 | * information concerning these transfers. |
diff --git a/arch/unicore32/kernel/head.S b/arch/unicore32/kernel/head.S index 92255f3ab6a7..8caf322e110d 100644 --- a/arch/unicore32/kernel/head.S +++ b/arch/unicore32/kernel/head.S | |||
| @@ -164,7 +164,7 @@ ENTRY(stext) | |||
| 164 | ENDPROC(stext) | 164 | ENDPROC(stext) |
| 165 | 165 | ||
| 166 | /* | 166 | /* |
| 167 | * Enable the MMU. This completely changes the stucture of the visible | 167 | * Enable the MMU. This completely changes the structure of the visible |
| 168 | * memory space. You will not be able to trace execution through this. | 168 | * memory space. You will not be able to trace execution through this. |
| 169 | * | 169 | * |
| 170 | * r0 = cp#0 control register | 170 | * r0 = cp#0 control register |
diff --git a/arch/xtensa/include/asm/dma.h b/arch/xtensa/include/asm/dma.h index 137ca3945b07..bb099a373b5a 100644 --- a/arch/xtensa/include/asm/dma.h +++ b/arch/xtensa/include/asm/dma.h | |||
| @@ -37,7 +37,7 @@ | |||
| 37 | * the size of the statically mapped kernel segment | 37 | * the size of the statically mapped kernel segment |
| 38 | * (XCHAL_KSEG_{CACHED,BYPASS}_SIZE), ie. 128 MB. | 38 | * (XCHAL_KSEG_{CACHED,BYPASS}_SIZE), ie. 128 MB. |
| 39 | * | 39 | * |
| 40 | * NOTE: When the entire KSEG area is DMA capable, we substract | 40 | * NOTE: When the entire KSEG area is DMA capable, we subtract |
| 41 | * one from the max address so that the virt_to_phys() macro | 41 | * one from the max address so that the virt_to_phys() macro |
| 42 | * works correctly on the address (otherwise the address | 42 | * works correctly on the address (otherwise the address |
| 43 | * enters another area, and virt_to_phys() may not return | 43 | * enters another area, and virt_to_phys() may not return |
diff --git a/arch/xtensa/kernel/entry.S b/arch/xtensa/kernel/entry.S index 5fd01f6aaf37..6223f3346b5c 100644 --- a/arch/xtensa/kernel/entry.S +++ b/arch/xtensa/kernel/entry.S | |||
| @@ -1026,7 +1026,7 @@ ENTRY(fast_syscall_unrecoverable) | |||
| 1026 | * TRY adds an entry to the __ex_table fixup table for the immediately | 1026 | * TRY adds an entry to the __ex_table fixup table for the immediately |
| 1027 | * following instruction. | 1027 | * following instruction. |
| 1028 | * | 1028 | * |
| 1029 | * CATCH catches any exception that occurred at one of the preceeding TRY | 1029 | * CATCH catches any exception that occurred at one of the preceding TRY |
| 1030 | * statements and continues from there | 1030 | * statements and continues from there |
| 1031 | * | 1031 | * |
| 1032 | * Usage TRY l32i a0, a1, 0 | 1032 | * Usage TRY l32i a0, a1, 0 |