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authorJames Bottomley <jejb@titanic.(none)>2005-12-15 18:35:24 -0500
committerJames Bottomley <jejb@titanic.(none)>2005-12-15 18:35:24 -0500
commit2a1e1379bae53f647c463a677cc2ec71b591c348 (patch)
treea152beb5e8679e94430c5b47bf798dd8a2d4fd5d /arch
parent787926b1b2d21d42ca462dc736b77f1a4a30c503 (diff)
parent7b6666530e2736f190a2629c8abe34275054449f (diff)
Merge by hand (conflicts in scsi_lib.c)
This merge is pretty extensive. The conflict is over the new req->retries parameter, so I had to change the prototype to scsi_setup_blk_pc_cmnd() and the usage in sd, sr and st. Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/alpha/kernel/machvec_impl.h2
-rw-r--r--arch/arm/kernel/module.c2
-rw-r--r--arch/arm/mach-pxa/pm.c9
-rw-r--r--arch/i386/mm/ioremap.c2
-rw-r--r--arch/i386/pci/mmconfig.c2
-rw-r--r--arch/ia64/kernel/process.c2
-rw-r--r--arch/ia64/sn/pci/pcibr/pcibr_reg.c48
-rw-r--r--arch/ia64/sn/pci/tioca_provider.c12
-rw-r--r--arch/powerpc/kernel/syscalls.c2
-rw-r--r--arch/sparc/kernel/ebus.c24
-rw-r--r--arch/sparc/kernel/led.c2
-rw-r--r--arch/sparc/kernel/pcic.c2
-rw-r--r--arch/sparc/kernel/time.c4
-rw-r--r--arch/sparc/mm/sun4c.c2
-rw-r--r--arch/x86_64/mm/ioremap.c2
-rw-r--r--arch/x86_64/pci/mmconfig.c14
16 files changed, 68 insertions, 63 deletions
diff --git a/arch/alpha/kernel/machvec_impl.h b/arch/alpha/kernel/machvec_impl.h
index 4959b7a3e1e6..11f996f24fde 100644
--- a/arch/alpha/kernel/machvec_impl.h
+++ b/arch/alpha/kernel/machvec_impl.h
@@ -41,7 +41,7 @@
41#define CAT1(x,y) x##y 41#define CAT1(x,y) x##y
42#define CAT(x,y) CAT1(x,y) 42#define CAT(x,y) CAT1(x,y)
43 43
44#define DO_DEFAULT_RTC rtc_port: 0x70 44#define DO_DEFAULT_RTC .rtc_port = 0x70
45 45
46#define DO_EV4_MMU \ 46#define DO_EV4_MMU \
47 .max_asn = EV4_MAX_ASN, \ 47 .max_asn = EV4_MAX_ASN, \
diff --git a/arch/arm/kernel/module.c b/arch/arm/kernel/module.c
index 6055e1427ba3..055bf5d28894 100644
--- a/arch/arm/kernel/module.c
+++ b/arch/arm/kernel/module.c
@@ -101,6 +101,8 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex,
101 break; 101 break;
102 102
103 case R_ARM_PC24: 103 case R_ARM_PC24:
104 case R_ARM_CALL:
105 case R_ARM_JUMP24:
104 offset = (*(u32 *)loc & 0x00ffffff) << 2; 106 offset = (*(u32 *)loc & 0x00ffffff) << 2;
105 if (offset & 0x02000000) 107 if (offset & 0x02000000)
106 offset -= 0x04000000; 108 offset -= 0x04000000;
diff --git a/arch/arm/mach-pxa/pm.c b/arch/arm/mach-pxa/pm.c
index f74b9af112dc..852ea72d8c80 100644
--- a/arch/arm/mach-pxa/pm.c
+++ b/arch/arm/mach-pxa/pm.c
@@ -155,19 +155,20 @@ int pxa_pm_enter(suspend_state_t state)
155 PSPR = 0; 155 PSPR = 0;
156 156
157 /* restore registers */ 157 /* restore registers */
158 RESTORE_GPLEVEL(0); RESTORE_GPLEVEL(1); RESTORE_GPLEVEL(2);
159 RESTORE(GPDR0); RESTORE(GPDR1); RESTORE(GPDR2);
158 RESTORE(GAFR0_L); RESTORE(GAFR0_U); 160 RESTORE(GAFR0_L); RESTORE(GAFR0_U);
159 RESTORE(GAFR1_L); RESTORE(GAFR1_U); 161 RESTORE(GAFR1_L); RESTORE(GAFR1_U);
160 RESTORE(GAFR2_L); RESTORE(GAFR2_U); 162 RESTORE(GAFR2_L); RESTORE(GAFR2_U);
161 RESTORE_GPLEVEL(0); RESTORE_GPLEVEL(1); RESTORE_GPLEVEL(2);
162 RESTORE(GPDR0); RESTORE(GPDR1); RESTORE(GPDR2);
163 RESTORE(GRER0); RESTORE(GRER1); RESTORE(GRER2); 163 RESTORE(GRER0); RESTORE(GRER1); RESTORE(GRER2);
164 RESTORE(GFER0); RESTORE(GFER1); RESTORE(GFER2); 164 RESTORE(GFER0); RESTORE(GFER1); RESTORE(GFER2);
165 RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2); 165 RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2);
166 166
167#ifdef CONFIG_PXA27x 167#ifdef CONFIG_PXA27x
168 RESTORE(MDREFR); 168 RESTORE(MDREFR);
169 RESTORE(GAFR3_L); RESTORE(GAFR3_U); RESTORE_GPLEVEL(3); 169 RESTORE_GPLEVEL(3); RESTORE(GPDR3);
170 RESTORE(GPDR3); RESTORE(GRER3); RESTORE(GFER3); RESTORE(PGSR3); 170 RESTORE(GAFR3_L); RESTORE(GAFR3_U);
171 RESTORE(GRER3); RESTORE(GFER3); RESTORE(PGSR3);
171 RESTORE(PWER); RESTORE(PCFR); RESTORE(PRER); 172 RESTORE(PWER); RESTORE(PCFR); RESTORE(PRER);
172 RESTORE(PFER); RESTORE(PKWR); 173 RESTORE(PFER); RESTORE(PKWR);
173#endif 174#endif
diff --git a/arch/i386/mm/ioremap.c b/arch/i386/mm/ioremap.c
index 8498b5ac3955..247fde76aaed 100644
--- a/arch/i386/mm/ioremap.c
+++ b/arch/i386/mm/ioremap.c
@@ -245,7 +245,7 @@ void iounmap(volatile void __iomem *addr)
245 addr < phys_to_virt(ISA_END_ADDRESS)) 245 addr < phys_to_virt(ISA_END_ADDRESS))
246 return; 246 return;
247 247
248 addr = (volatile void *)(PAGE_MASK & (unsigned long __force)addr); 248 addr = (volatile void __iomem *)(PAGE_MASK & (unsigned long __force)addr);
249 249
250 /* Use the vm area unlocked, assuming the caller 250 /* Use the vm area unlocked, assuming the caller
251 ensures there isn't another iounmap for the same address 251 ensures there isn't another iounmap for the same address
diff --git a/arch/i386/pci/mmconfig.c b/arch/i386/pci/mmconfig.c
index 08a084901212..70a9cc132cf7 100644
--- a/arch/i386/pci/mmconfig.c
+++ b/arch/i386/pci/mmconfig.c
@@ -155,7 +155,7 @@ static __init void unreachable_devices(void)
155 addr = get_base_addr(0, 0, PCI_DEVFN(i, 0)); 155 addr = get_base_addr(0, 0, PCI_DEVFN(i, 0));
156 if (addr != 0) 156 if (addr != 0)
157 pci_exp_set_dev_base(addr, 0, PCI_DEVFN(i, 0)); 157 pci_exp_set_dev_base(addr, 0, PCI_DEVFN(i, 0));
158 if (addr == 0 || readl((u32 *)addr) != val1) 158 if (addr == 0 || readl((u32 __iomem *)addr) != val1)
159 set_bit(i, fallback_slots); 159 set_bit(i, fallback_slots);
160 spin_unlock_irqrestore(&pci_config_lock, flags); 160 spin_unlock_irqrestore(&pci_config_lock, flags);
161 } 161 }
diff --git a/arch/ia64/kernel/process.c b/arch/ia64/kernel/process.c
index a4da715a360c..e9904c74d2ba 100644
--- a/arch/ia64/kernel/process.c
+++ b/arch/ia64/kernel/process.c
@@ -721,11 +721,13 @@ flush_thread (void)
721 /* drop floating-point and debug-register state if it exists: */ 721 /* drop floating-point and debug-register state if it exists: */
722 current->thread.flags &= ~(IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID); 722 current->thread.flags &= ~(IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID);
723 ia64_drop_fpu(current); 723 ia64_drop_fpu(current);
724#ifdef CONFIG_IA32_SUPPORT
724 if (IS_IA32_PROCESS(ia64_task_regs(current))) { 725 if (IS_IA32_PROCESS(ia64_task_regs(current))) {
725 ia32_drop_partial_page_list(current); 726 ia32_drop_partial_page_list(current);
726 current->thread.task_size = IA32_PAGE_OFFSET; 727 current->thread.task_size = IA32_PAGE_OFFSET;
727 set_fs(USER_DS); 728 set_fs(USER_DS);
728 } 729 }
730#endif
729} 731}
730 732
731/* 733/*
diff --git a/arch/ia64/sn/pci/pcibr/pcibr_reg.c b/arch/ia64/sn/pci/pcibr/pcibr_reg.c
index 5d534091262c..79fdb91d7259 100644
--- a/arch/ia64/sn/pci/pcibr/pcibr_reg.c
+++ b/arch/ia64/sn/pci/pcibr/pcibr_reg.c
@@ -25,7 +25,7 @@ union br_ptr {
25 */ 25 */
26void pcireg_control_bit_clr(struct pcibus_info *pcibus_info, uint64_t bits) 26void pcireg_control_bit_clr(struct pcibus_info *pcibus_info, uint64_t bits)
27{ 27{
28 union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base; 28 union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
29 29
30 if (pcibus_info) { 30 if (pcibus_info) {
31 switch (pcibus_info->pbi_bridge_type) { 31 switch (pcibus_info->pbi_bridge_type) {
@@ -38,14 +38,14 @@ void pcireg_control_bit_clr(struct pcibus_info *pcibus_info, uint64_t bits)
38 default: 38 default:
39 panic 39 panic
40 ("pcireg_control_bit_clr: unknown bridgetype bridge 0x%p", 40 ("pcireg_control_bit_clr: unknown bridgetype bridge 0x%p",
41 (void *)ptr); 41 ptr);
42 } 42 }
43 } 43 }
44} 44}
45 45
46void pcireg_control_bit_set(struct pcibus_info *pcibus_info, uint64_t bits) 46void pcireg_control_bit_set(struct pcibus_info *pcibus_info, uint64_t bits)
47{ 47{
48 union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base; 48 union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
49 49
50 if (pcibus_info) { 50 if (pcibus_info) {
51 switch (pcibus_info->pbi_bridge_type) { 51 switch (pcibus_info->pbi_bridge_type) {
@@ -58,7 +58,7 @@ void pcireg_control_bit_set(struct pcibus_info *pcibus_info, uint64_t bits)
58 default: 58 default:
59 panic 59 panic
60 ("pcireg_control_bit_set: unknown bridgetype bridge 0x%p", 60 ("pcireg_control_bit_set: unknown bridgetype bridge 0x%p",
61 (void *)ptr); 61 ptr);
62 } 62 }
63 } 63 }
64} 64}
@@ -68,7 +68,7 @@ void pcireg_control_bit_set(struct pcibus_info *pcibus_info, uint64_t bits)
68 */ 68 */
69uint64_t pcireg_tflush_get(struct pcibus_info *pcibus_info) 69uint64_t pcireg_tflush_get(struct pcibus_info *pcibus_info)
70{ 70{
71 union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base; 71 union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
72 uint64_t ret = 0; 72 uint64_t ret = 0;
73 73
74 if (pcibus_info) { 74 if (pcibus_info) {
@@ -82,7 +82,7 @@ uint64_t pcireg_tflush_get(struct pcibus_info *pcibus_info)
82 default: 82 default:
83 panic 83 panic
84 ("pcireg_tflush_get: unknown bridgetype bridge 0x%p", 84 ("pcireg_tflush_get: unknown bridgetype bridge 0x%p",
85 (void *)ptr); 85 ptr);
86 } 86 }
87 } 87 }
88 88
@@ -98,7 +98,7 @@ uint64_t pcireg_tflush_get(struct pcibus_info *pcibus_info)
98 */ 98 */
99uint64_t pcireg_intr_status_get(struct pcibus_info * pcibus_info) 99uint64_t pcireg_intr_status_get(struct pcibus_info * pcibus_info)
100{ 100{
101 union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base; 101 union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
102 uint64_t ret = 0; 102 uint64_t ret = 0;
103 103
104 if (pcibus_info) { 104 if (pcibus_info) {
@@ -112,7 +112,7 @@ uint64_t pcireg_intr_status_get(struct pcibus_info * pcibus_info)
112 default: 112 default:
113 panic 113 panic
114 ("pcireg_intr_status_get: unknown bridgetype bridge 0x%p", 114 ("pcireg_intr_status_get: unknown bridgetype bridge 0x%p",
115 (void *)ptr); 115 ptr);
116 } 116 }
117 } 117 }
118 return ret; 118 return ret;
@@ -123,7 +123,7 @@ uint64_t pcireg_intr_status_get(struct pcibus_info * pcibus_info)
123 */ 123 */
124void pcireg_intr_enable_bit_clr(struct pcibus_info *pcibus_info, uint64_t bits) 124void pcireg_intr_enable_bit_clr(struct pcibus_info *pcibus_info, uint64_t bits)
125{ 125{
126 union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base; 126 union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
127 127
128 if (pcibus_info) { 128 if (pcibus_info) {
129 switch (pcibus_info->pbi_bridge_type) { 129 switch (pcibus_info->pbi_bridge_type) {
@@ -136,14 +136,14 @@ void pcireg_intr_enable_bit_clr(struct pcibus_info *pcibus_info, uint64_t bits)
136 default: 136 default:
137 panic 137 panic
138 ("pcireg_intr_enable_bit_clr: unknown bridgetype bridge 0x%p", 138 ("pcireg_intr_enable_bit_clr: unknown bridgetype bridge 0x%p",
139 (void *)ptr); 139 ptr);
140 } 140 }
141 } 141 }
142} 142}
143 143
144void pcireg_intr_enable_bit_set(struct pcibus_info *pcibus_info, uint64_t bits) 144void pcireg_intr_enable_bit_set(struct pcibus_info *pcibus_info, uint64_t bits)
145{ 145{
146 union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base; 146 union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
147 147
148 if (pcibus_info) { 148 if (pcibus_info) {
149 switch (pcibus_info->pbi_bridge_type) { 149 switch (pcibus_info->pbi_bridge_type) {
@@ -156,7 +156,7 @@ void pcireg_intr_enable_bit_set(struct pcibus_info *pcibus_info, uint64_t bits)
156 default: 156 default:
157 panic 157 panic
158 ("pcireg_intr_enable_bit_set: unknown bridgetype bridge 0x%p", 158 ("pcireg_intr_enable_bit_set: unknown bridgetype bridge 0x%p",
159 (void *)ptr); 159 ptr);
160 } 160 }
161 } 161 }
162} 162}
@@ -167,7 +167,7 @@ void pcireg_intr_enable_bit_set(struct pcibus_info *pcibus_info, uint64_t bits)
167void pcireg_intr_addr_addr_set(struct pcibus_info *pcibus_info, int int_n, 167void pcireg_intr_addr_addr_set(struct pcibus_info *pcibus_info, int int_n,
168 uint64_t addr) 168 uint64_t addr)
169{ 169{
170 union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base; 170 union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
171 171
172 if (pcibus_info) { 172 if (pcibus_info) {
173 switch (pcibus_info->pbi_bridge_type) { 173 switch (pcibus_info->pbi_bridge_type) {
@@ -186,7 +186,7 @@ void pcireg_intr_addr_addr_set(struct pcibus_info *pcibus_info, int int_n,
186 default: 186 default:
187 panic 187 panic
188 ("pcireg_intr_addr_addr_get: unknown bridgetype bridge 0x%p", 188 ("pcireg_intr_addr_addr_get: unknown bridgetype bridge 0x%p",
189 (void *)ptr); 189 ptr);
190 } 190 }
191 } 191 }
192} 192}
@@ -196,7 +196,7 @@ void pcireg_intr_addr_addr_set(struct pcibus_info *pcibus_info, int int_n,
196 */ 196 */
197void pcireg_force_intr_set(struct pcibus_info *pcibus_info, int int_n) 197void pcireg_force_intr_set(struct pcibus_info *pcibus_info, int int_n)
198{ 198{
199 union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base; 199 union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
200 200
201 if (pcibus_info) { 201 if (pcibus_info) {
202 switch (pcibus_info->pbi_bridge_type) { 202 switch (pcibus_info->pbi_bridge_type) {
@@ -209,7 +209,7 @@ void pcireg_force_intr_set(struct pcibus_info *pcibus_info, int int_n)
209 default: 209 default:
210 panic 210 panic
211 ("pcireg_force_intr_set: unknown bridgetype bridge 0x%p", 211 ("pcireg_force_intr_set: unknown bridgetype bridge 0x%p",
212 (void *)ptr); 212 ptr);
213 } 213 }
214 } 214 }
215} 215}
@@ -219,7 +219,7 @@ void pcireg_force_intr_set(struct pcibus_info *pcibus_info, int int_n)
219 */ 219 */
220uint64_t pcireg_wrb_flush_get(struct pcibus_info *pcibus_info, int device) 220uint64_t pcireg_wrb_flush_get(struct pcibus_info *pcibus_info, int device)
221{ 221{
222 union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base; 222 union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
223 uint64_t ret = 0; 223 uint64_t ret = 0;
224 224
225 if (pcibus_info) { 225 if (pcibus_info) {
@@ -233,7 +233,7 @@ uint64_t pcireg_wrb_flush_get(struct pcibus_info *pcibus_info, int device)
233 __sn_readq_relaxed(&ptr->pic.p_wr_req_buf[device]); 233 __sn_readq_relaxed(&ptr->pic.p_wr_req_buf[device]);
234 break; 234 break;
235 default: 235 default:
236 panic("pcireg_wrb_flush_get: unknown bridgetype bridge 0x%p", (void *)ptr); 236 panic("pcireg_wrb_flush_get: unknown bridgetype bridge 0x%p", ptr);
237 } 237 }
238 238
239 } 239 }
@@ -244,7 +244,7 @@ uint64_t pcireg_wrb_flush_get(struct pcibus_info *pcibus_info, int device)
244void pcireg_int_ate_set(struct pcibus_info *pcibus_info, int ate_index, 244void pcireg_int_ate_set(struct pcibus_info *pcibus_info, int ate_index,
245 uint64_t val) 245 uint64_t val)
246{ 246{
247 union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base; 247 union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
248 248
249 if (pcibus_info) { 249 if (pcibus_info) {
250 switch (pcibus_info->pbi_bridge_type) { 250 switch (pcibus_info->pbi_bridge_type) {
@@ -257,15 +257,15 @@ void pcireg_int_ate_set(struct pcibus_info *pcibus_info, int ate_index,
257 default: 257 default:
258 panic 258 panic
259 ("pcireg_int_ate_set: unknown bridgetype bridge 0x%p", 259 ("pcireg_int_ate_set: unknown bridgetype bridge 0x%p",
260 (void *)ptr); 260 ptr);
261 } 261 }
262 } 262 }
263} 263}
264 264
265uint64_t *pcireg_int_ate_addr(struct pcibus_info *pcibus_info, int ate_index) 265uint64_t __iomem *pcireg_int_ate_addr(struct pcibus_info *pcibus_info, int ate_index)
266{ 266{
267 union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base; 267 union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
268 uint64_t *ret = (uint64_t *) 0; 268 uint64_t __iomem *ret = NULL;
269 269
270 if (pcibus_info) { 270 if (pcibus_info) {
271 switch (pcibus_info->pbi_bridge_type) { 271 switch (pcibus_info->pbi_bridge_type) {
@@ -278,7 +278,7 @@ uint64_t *pcireg_int_ate_addr(struct pcibus_info *pcibus_info, int ate_index)
278 default: 278 default:
279 panic 279 panic
280 ("pcireg_int_ate_addr: unknown bridgetype bridge 0x%p", 280 ("pcireg_int_ate_addr: unknown bridgetype bridge 0x%p",
281 (void *)ptr); 281 ptr);
282 } 282 }
283 } 283 }
284 return ret; 284 return ret;
diff --git a/arch/ia64/sn/pci/tioca_provider.c b/arch/ia64/sn/pci/tioca_provider.c
index 46b646a6d345..27aa1842dacc 100644
--- a/arch/ia64/sn/pci/tioca_provider.c
+++ b/arch/ia64/sn/pci/tioca_provider.c
@@ -38,10 +38,10 @@ tioca_gart_init(struct tioca_kernel *tioca_kern)
38 uint64_t offset; 38 uint64_t offset;
39 struct page *tmp; 39 struct page *tmp;
40 struct tioca_common *tioca_common; 40 struct tioca_common *tioca_common;
41 struct tioca *ca_base; 41 struct tioca __iomem *ca_base;
42 42
43 tioca_common = tioca_kern->ca_common; 43 tioca_common = tioca_kern->ca_common;
44 ca_base = (struct tioca *)tioca_common->ca_common.bs_base; 44 ca_base = (struct tioca __iomem *)tioca_common->ca_common.bs_base;
45 45
46 if (list_empty(tioca_kern->ca_devices)) 46 if (list_empty(tioca_kern->ca_devices))
47 return 0; 47 return 0;
@@ -215,7 +215,7 @@ tioca_fastwrite_enable(struct tioca_kernel *tioca_kern)
215{ 215{
216 int cap_ptr; 216 int cap_ptr;
217 uint32_t reg; 217 uint32_t reg;
218 struct tioca *tioca_base; 218 struct tioca __iomem *tioca_base;
219 struct pci_dev *pdev; 219 struct pci_dev *pdev;
220 struct tioca_common *common; 220 struct tioca_common *common;
221 221
@@ -257,7 +257,7 @@ tioca_fastwrite_enable(struct tioca_kernel *tioca_kern)
257 * Set ca's fw to match 257 * Set ca's fw to match
258 */ 258 */
259 259
260 tioca_base = (struct tioca *)common->ca_common.bs_base; 260 tioca_base = (struct tioca __iomem*)common->ca_common.bs_base;
261 __sn_setq_relaxed(&tioca_base->ca_control1, CA_AGP_FW_ENABLE); 261 __sn_setq_relaxed(&tioca_base->ca_control1, CA_AGP_FW_ENABLE);
262} 262}
263 263
@@ -322,7 +322,7 @@ static uint64_t
322tioca_dma_d48(struct pci_dev *pdev, uint64_t paddr) 322tioca_dma_d48(struct pci_dev *pdev, uint64_t paddr)
323{ 323{
324 struct tioca_common *tioca_common; 324 struct tioca_common *tioca_common;
325 struct tioca *ca_base; 325 struct tioca __iomem *ca_base;
326 uint64_t ct_addr; 326 uint64_t ct_addr;
327 dma_addr_t bus_addr; 327 dma_addr_t bus_addr;
328 uint32_t node_upper; 328 uint32_t node_upper;
@@ -330,7 +330,7 @@ tioca_dma_d48(struct pci_dev *pdev, uint64_t paddr)
330 struct pcidev_info *pcidev_info = SN_PCIDEV_INFO(pdev); 330 struct pcidev_info *pcidev_info = SN_PCIDEV_INFO(pdev);
331 331
332 tioca_common = (struct tioca_common *)pcidev_info->pdi_pcibus_info; 332 tioca_common = (struct tioca_common *)pcidev_info->pdi_pcibus_info;
333 ca_base = (struct tioca *)tioca_common->ca_common.bs_base; 333 ca_base = (struct tioca __iomem *)tioca_common->ca_common.bs_base;
334 334
335 ct_addr = PHYS_TO_TIODMA(paddr); 335 ct_addr = PHYS_TO_TIODMA(paddr);
336 if (!ct_addr) 336 if (!ct_addr)
diff --git a/arch/powerpc/kernel/syscalls.c b/arch/powerpc/kernel/syscalls.c
index f72ced11212d..91b93d917b64 100644
--- a/arch/powerpc/kernel/syscalls.c
+++ b/arch/powerpc/kernel/syscalls.c
@@ -247,7 +247,7 @@ long ppc64_personality(unsigned long personality)
247#define OVERRIDE_MACHINE 0 247#define OVERRIDE_MACHINE 0
248#endif 248#endif
249 249
250static inline int override_machine(char *mach) 250static inline int override_machine(char __user *mach)
251{ 251{
252 if (OVERRIDE_MACHINE) { 252 if (OVERRIDE_MACHINE) {
253 /* change ppc64 to ppc */ 253 /* change ppc64 to ppc */
diff --git a/arch/sparc/kernel/ebus.c b/arch/sparc/kernel/ebus.c
index 1754192c69d0..5c3529ceb5d6 100644
--- a/arch/sparc/kernel/ebus.c
+++ b/arch/sparc/kernel/ebus.c
@@ -22,7 +22,7 @@
22#include <asm/oplib.h> 22#include <asm/oplib.h>
23#include <asm/bpp.h> 23#include <asm/bpp.h>
24 24
25struct linux_ebus *ebus_chain = 0; 25struct linux_ebus *ebus_chain = NULL;
26 26
27/* We are together with pcic.c under CONFIG_PCI. */ 27/* We are together with pcic.c under CONFIG_PCI. */
28extern unsigned int pcic_pin_to_irq(unsigned int, char *name); 28extern unsigned int pcic_pin_to_irq(unsigned int, char *name);
@@ -46,7 +46,7 @@ static struct ebus_device_irq je1_1[] = {
46 { "SUNW,CS4231", 0 }, 46 { "SUNW,CS4231", 0 },
47 { "parallel", 0 }, 47 { "parallel", 0 },
48 { "se", 2 }, 48 { "se", 2 },
49 { 0, 0 } 49 { NULL, 0 }
50}; 50};
51 51
52/* 52/*
@@ -55,7 +55,7 @@ static struct ebus_device_irq je1_1[] = {
55 */ 55 */
56static struct ebus_system_entry ebus_blacklist[] = { 56static struct ebus_system_entry ebus_blacklist[] = {
57 { "SUNW,JavaEngine1", je1_1 }, 57 { "SUNW,JavaEngine1", je1_1 },
58 { 0, 0 } 58 { NULL, NULL }
59}; 59};
60 60
61static struct ebus_device_irq *ebus_blackp = NULL; 61static struct ebus_device_irq *ebus_blackp = NULL;
@@ -233,7 +233,7 @@ void __init fill_ebus_device(int node, struct linux_ebus_device *dev)
233 ebus_alloc(sizeof(struct linux_ebus_child)); 233 ebus_alloc(sizeof(struct linux_ebus_child));
234 234
235 child = dev->children; 235 child = dev->children;
236 child->next = 0; 236 child->next = NULL;
237 child->parent = dev; 237 child->parent = dev;
238 child->bus = dev->bus; 238 child->bus = dev->bus;
239 fill_ebus_child(node, &regs[0], child); 239 fill_ebus_child(node, &regs[0], child);
@@ -243,7 +243,7 @@ void __init fill_ebus_device(int node, struct linux_ebus_device *dev)
243 ebus_alloc(sizeof(struct linux_ebus_child)); 243 ebus_alloc(sizeof(struct linux_ebus_child));
244 244
245 child = child->next; 245 child = child->next;
246 child->next = 0; 246 child->next = NULL;
247 child->parent = dev; 247 child->parent = dev;
248 child->bus = dev->bus; 248 child->bus = dev->bus;
249 fill_ebus_child(node, &regs[0], child); 249 fill_ebus_child(node, &regs[0], child);
@@ -275,7 +275,7 @@ void __init ebus_init(void)
275 } 275 }
276 } 276 }
277 277
278 pdev = pci_get_device(PCI_VENDOR_ID_SUN, PCI_DEVICE_ID_SUN_EBUS, 0); 278 pdev = pci_get_device(PCI_VENDOR_ID_SUN, PCI_DEVICE_ID_SUN_EBUS, NULL);
279 if (!pdev) { 279 if (!pdev) {
280 return; 280 return;
281 } 281 }
@@ -284,7 +284,7 @@ void __init ebus_init(void)
284 284
285 ebus_chain = ebus = (struct linux_ebus *) 285 ebus_chain = ebus = (struct linux_ebus *)
286 ebus_alloc(sizeof(struct linux_ebus)); 286 ebus_alloc(sizeof(struct linux_ebus));
287 ebus->next = 0; 287 ebus->next = NULL;
288 288
289 while (ebusnd) { 289 while (ebusnd) {
290 290
@@ -325,8 +325,8 @@ void __init ebus_init(void)
325 ebus_alloc(sizeof(struct linux_ebus_device)); 325 ebus_alloc(sizeof(struct linux_ebus_device));
326 326
327 dev = ebus->devices; 327 dev = ebus->devices;
328 dev->next = 0; 328 dev->next = NULL;
329 dev->children = 0; 329 dev->children = NULL;
330 dev->bus = ebus; 330 dev->bus = ebus;
331 fill_ebus_device(nd, dev); 331 fill_ebus_device(nd, dev);
332 332
@@ -335,8 +335,8 @@ void __init ebus_init(void)
335 ebus_alloc(sizeof(struct linux_ebus_device)); 335 ebus_alloc(sizeof(struct linux_ebus_device));
336 336
337 dev = dev->next; 337 dev = dev->next;
338 dev->next = 0; 338 dev->next = NULL;
339 dev->children = 0; 339 dev->children = NULL;
340 dev->bus = ebus; 340 dev->bus = ebus;
341 fill_ebus_device(nd, dev); 341 fill_ebus_device(nd, dev);
342 } 342 }
@@ -353,7 +353,7 @@ void __init ebus_init(void)
353 ebus->next = (struct linux_ebus *) 353 ebus->next = (struct linux_ebus *)
354 ebus_alloc(sizeof(struct linux_ebus)); 354 ebus_alloc(sizeof(struct linux_ebus));
355 ebus = ebus->next; 355 ebus = ebus->next;
356 ebus->next = 0; 356 ebus->next = NULL;
357 ++num_ebus; 357 ++num_ebus;
358 } 358 }
359 if (pdev) 359 if (pdev)
diff --git a/arch/sparc/kernel/led.c b/arch/sparc/kernel/led.c
index 2a3afca453c9..313d1620ae8e 100644
--- a/arch/sparc/kernel/led.c
+++ b/arch/sparc/kernel/led.c
@@ -55,7 +55,7 @@ static int led_read_proc(char *buf, char **start, off_t offset, int count,
55 return len; 55 return len;
56} 56}
57 57
58static int led_write_proc(struct file *file, const char *buffer, 58static int led_write_proc(struct file *file, const char __user *buffer,
59 unsigned long count, void *data) 59 unsigned long count, void *data)
60{ 60{
61 char *buf = NULL; 61 char *buf = NULL;
diff --git a/arch/sparc/kernel/pcic.c b/arch/sparc/kernel/pcic.c
index cccfc12802ed..42002b742deb 100644
--- a/arch/sparc/kernel/pcic.c
+++ b/arch/sparc/kernel/pcic.c
@@ -161,7 +161,7 @@ static struct pcic_sn2list pcic_known_sysnames[] = {
161static int pcic0_up; 161static int pcic0_up;
162static struct linux_pcic pcic0; 162static struct linux_pcic pcic0;
163 163
164void * __iomem pcic_regs; 164void __iomem *pcic_regs;
165volatile int pcic_speculative; 165volatile int pcic_speculative;
166volatile int pcic_trapped; 166volatile int pcic_trapped;
167 167
diff --git a/arch/sparc/kernel/time.c b/arch/sparc/kernel/time.c
index 24814d58f9e1..7dadcdb4ca42 100644
--- a/arch/sparc/kernel/time.c
+++ b/arch/sparc/kernel/time.c
@@ -49,7 +49,7 @@ DEFINE_SPINLOCK(rtc_lock);
49enum sparc_clock_type sp_clock_typ; 49enum sparc_clock_type sp_clock_typ;
50DEFINE_SPINLOCK(mostek_lock); 50DEFINE_SPINLOCK(mostek_lock);
51void __iomem *mstk48t02_regs = NULL; 51void __iomem *mstk48t02_regs = NULL;
52static struct mostek48t08 *mstk48t08_regs = NULL; 52static struct mostek48t08 __iomem *mstk48t08_regs = NULL;
53static int set_rtc_mmss(unsigned long); 53static int set_rtc_mmss(unsigned long);
54static int sbus_do_settimeofday(struct timespec *tv); 54static int sbus_do_settimeofday(struct timespec *tv);
55 55
@@ -342,7 +342,7 @@ static __inline__ void clock_probe(void)
342 /* XXX r/o attribute is somewhere in r.flags */ 342 /* XXX r/o attribute is somewhere in r.flags */
343 r.flags = clk_reg[0].which_io; 343 r.flags = clk_reg[0].which_io;
344 r.start = clk_reg[0].phys_addr; 344 r.start = clk_reg[0].phys_addr;
345 mstk48t08_regs = (struct mostek48t08 *) sbus_ioremap(&r, 0, 345 mstk48t08_regs = sbus_ioremap(&r, 0,
346 sizeof(struct mostek48t08), "mk48t08"); 346 sizeof(struct mostek48t08), "mk48t08");
347 347
348 mstk48t02_regs = &mstk48t08_regs->regs; 348 mstk48t02_regs = &mstk48t08_regs->regs;
diff --git a/arch/sparc/mm/sun4c.c b/arch/sparc/mm/sun4c.c
index 1d560390e282..731f19603cad 100644
--- a/arch/sparc/mm/sun4c.c
+++ b/arch/sparc/mm/sun4c.c
@@ -497,7 +497,7 @@ static void __init sun4c_probe_mmu(void)
497 patch_kernel_fault_handler(); 497 patch_kernel_fault_handler();
498} 498}
499 499
500volatile unsigned long *sun4c_memerr_reg = NULL; 500volatile unsigned long __iomem *sun4c_memerr_reg = NULL;
501 501
502void __init sun4c_probe_memerr_reg(void) 502void __init sun4c_probe_memerr_reg(void)
503{ 503{
diff --git a/arch/x86_64/mm/ioremap.c b/arch/x86_64/mm/ioremap.c
index 0d260e4492f7..ae207064201e 100644
--- a/arch/x86_64/mm/ioremap.c
+++ b/arch/x86_64/mm/ioremap.c
@@ -263,7 +263,7 @@ void iounmap(volatile void __iomem *addr)
263 addr < phys_to_virt(ISA_END_ADDRESS)) 263 addr < phys_to_virt(ISA_END_ADDRESS))
264 return; 264 return;
265 265
266 addr = (volatile void *)(PAGE_MASK & (unsigned long __force)addr); 266 addr = (volatile void __iomem *)(PAGE_MASK & (unsigned long __force)addr);
267 /* Use the vm area unlocked, assuming the caller 267 /* Use the vm area unlocked, assuming the caller
268 ensures there isn't another iounmap for the same address 268 ensures there isn't another iounmap for the same address
269 in parallel. Reuse of the virtual address is prevented by 269 in parallel. Reuse of the virtual address is prevented by
diff --git a/arch/x86_64/pci/mmconfig.c b/arch/x86_64/pci/mmconfig.c
index 9c4f907e301c..f16c0d57c552 100644
--- a/arch/x86_64/pci/mmconfig.c
+++ b/arch/x86_64/pci/mmconfig.c
@@ -18,11 +18,11 @@ static DECLARE_BITMAP(fallback_slots, 32);
18/* Static virtual mapping of the MMCONFIG aperture */ 18/* Static virtual mapping of the MMCONFIG aperture */
19struct mmcfg_virt { 19struct mmcfg_virt {
20 struct acpi_table_mcfg_config *cfg; 20 struct acpi_table_mcfg_config *cfg;
21 char *virt; 21 char __iomem *virt;
22}; 22};
23static struct mmcfg_virt *pci_mmcfg_virt; 23static struct mmcfg_virt *pci_mmcfg_virt;
24 24
25static char *get_virt(unsigned int seg, unsigned bus) 25static char __iomem *get_virt(unsigned int seg, unsigned bus)
26{ 26{
27 int cfg_num = -1; 27 int cfg_num = -1;
28 struct acpi_table_mcfg_config *cfg; 28 struct acpi_table_mcfg_config *cfg;
@@ -43,9 +43,9 @@ static char *get_virt(unsigned int seg, unsigned bus)
43 } 43 }
44} 44}
45 45
46static char *pci_dev_base(unsigned int seg, unsigned int bus, unsigned int devfn) 46static char __iomem *pci_dev_base(unsigned int seg, unsigned int bus, unsigned int devfn)
47{ 47{
48 char *addr; 48 char __iomem *addr;
49 if (seg == 0 && bus == 0 && test_bit(PCI_SLOT(devfn), &fallback_slots)) 49 if (seg == 0 && bus == 0 && test_bit(PCI_SLOT(devfn), &fallback_slots))
50 return NULL; 50 return NULL;
51 addr = get_virt(seg, bus); 51 addr = get_virt(seg, bus);
@@ -57,7 +57,7 @@ static char *pci_dev_base(unsigned int seg, unsigned int bus, unsigned int devfn
57static int pci_mmcfg_read(unsigned int seg, unsigned int bus, 57static int pci_mmcfg_read(unsigned int seg, unsigned int bus,
58 unsigned int devfn, int reg, int len, u32 *value) 58 unsigned int devfn, int reg, int len, u32 *value)
59{ 59{
60 char *addr; 60 char __iomem *addr;
61 61
62 /* Why do we have this when nobody checks it. How about a BUG()!? -AK */ 62 /* Why do we have this when nobody checks it. How about a BUG()!? -AK */
63 if (unlikely(!value || (bus > 255) || (devfn > 255) || (reg > 4095))) 63 if (unlikely(!value || (bus > 255) || (devfn > 255) || (reg > 4095)))
@@ -85,7 +85,7 @@ static int pci_mmcfg_read(unsigned int seg, unsigned int bus,
85static int pci_mmcfg_write(unsigned int seg, unsigned int bus, 85static int pci_mmcfg_write(unsigned int seg, unsigned int bus,
86 unsigned int devfn, int reg, int len, u32 value) 86 unsigned int devfn, int reg, int len, u32 value)
87{ 87{
88 char *addr; 88 char __iomem *addr;
89 89
90 /* Why do we have this when nobody checks it. How about a BUG()!? -AK */ 90 /* Why do we have this when nobody checks it. How about a BUG()!? -AK */
91 if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095))) 91 if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095)))
@@ -127,7 +127,7 @@ static __init void unreachable_devices(void)
127 int i; 127 int i;
128 for (i = 0; i < 32; i++) { 128 for (i = 0; i < 32; i++) {
129 u32 val1; 129 u32 val1;
130 char *addr; 130 char __iomem *addr;
131 131
132 pci_conf1_read(0, 0, PCI_DEVFN(i,0), 0, 4, &val1); 132 pci_conf1_read(0, 0, PCI_DEVFN(i,0), 0, 4, &val1);
133 if (val1 == 0xffffffff) 133 if (val1 == 0xffffffff)