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authorLinus Torvalds <torvalds@linux-foundation.org>2011-06-27 11:58:23 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2011-06-27 11:58:23 -0400
commitedcda265225b90c8700b21758fffcba61d19e046 (patch)
tree5bc62e95df24004c46b9893b636296091c2f824a /arch
parent9c317b3bed40fed07e2ed536afca3b58952ac432 (diff)
parent111b20d01346b9635b3223c7af4e40e43bee8dc6 (diff)
Merge branch 'fixes' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'fixes' of master.kernel.org:/home/rmk/linux-2.6-arm: ARM: pm: ensure ARMv7 CPUs save and restore the TLS register ARM: pm: proc-v7: fix missing struct processor pointers for suspend code ARM: 6969/1: plat-iop: fix build error ARM: 6961/1: zImage: Add build-time check for correctly-sized proc_type entries ARM: SMP: wait for CPU to be marked active ARM: 6963/1: Thumb-2: Relax relocation requirements for non-function symbols ARM: 6962/1: mach-h720x: fix build error ARM: 6959/1: SMP build fix for entry-macro-multi.S
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/compressed/head.S14
-rw-r--r--arch/arm/include/asm/assembler.h4
-rw-r--r--arch/arm/include/asm/entry-macro-multi.S2
-rw-r--r--arch/arm/kernel/module.c13
-rw-r--r--arch/arm/kernel/smp.c6
-rw-r--r--arch/arm/mach-h720x/Kconfig2
-rw-r--r--arch/arm/mm/proc-v7.S16
-rw-r--r--arch/arm/plat-iop/cp6.c1
8 files changed, 48 insertions, 10 deletions
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 942fad97e447..940b20178107 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -597,6 +597,8 @@ __common_mmu_cache_on:
597 sub pc, lr, r0, lsr #32 @ properly flush pipeline 597 sub pc, lr, r0, lsr #32 @ properly flush pipeline
598#endif 598#endif
599 599
600#define PROC_ENTRY_SIZE (4*5)
601
600/* 602/*
601 * Here follow the relocatable cache support functions for the 603 * Here follow the relocatable cache support functions for the
602 * various processors. This is a generic hook for locating an 604 * various processors. This is a generic hook for locating an
@@ -624,7 +626,7 @@ call_cache_fn: adr r12, proc_types
624 ARM( addeq pc, r12, r3 ) @ call cache function 626 ARM( addeq pc, r12, r3 ) @ call cache function
625 THUMB( addeq r12, r3 ) 627 THUMB( addeq r12, r3 )
626 THUMB( moveq pc, r12 ) @ call cache function 628 THUMB( moveq pc, r12 ) @ call cache function
627 add r12, r12, #4*5 629 add r12, r12, #PROC_ENTRY_SIZE
628 b 1b 630 b 1b
629 631
630/* 632/*
@@ -794,6 +796,16 @@ proc_types:
794 796
795 .size proc_types, . - proc_types 797 .size proc_types, . - proc_types
796 798
799 /*
800 * If you get a "non-constant expression in ".if" statement"
801 * error from the assembler on this line, check that you have
802 * not accidentally written a "b" instruction where you should
803 * have written W(b).
804 */
805 .if (. - proc_types) % PROC_ENTRY_SIZE != 0
806 .error "The size of one or more proc_types entries is wrong."
807 .endif
808
797/* 809/*
798 * Turn off the Cache and MMU. ARMv3 does not support 810 * Turn off the Cache and MMU. ARMv3 does not support
799 * reading the control register, but ARMv4 does. 811 * reading the control register, but ARMv4 does.
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
index bc2d2d75f706..65c3f2474f5e 100644
--- a/arch/arm/include/asm/assembler.h
+++ b/arch/arm/include/asm/assembler.h
@@ -13,6 +13,9 @@
13 * Do not include any C declarations in this file - it is included by 13 * Do not include any C declarations in this file - it is included by
14 * assembler source. 14 * assembler source.
15 */ 15 */
16#ifndef __ASM_ASSEMBLER_H__
17#define __ASM_ASSEMBLER_H__
18
16#ifndef __ASSEMBLY__ 19#ifndef __ASSEMBLY__
17#error "Only include this from assembly code" 20#error "Only include this from assembly code"
18#endif 21#endif
@@ -290,3 +293,4 @@
290 .macro ldrusr, reg, ptr, inc, cond=al, rept=1, abort=9001f 293 .macro ldrusr, reg, ptr, inc, cond=al, rept=1, abort=9001f
291 usracc ldr, \reg, \ptr, \inc, \cond, \rept, \abort 294 usracc ldr, \reg, \ptr, \inc, \cond, \rept, \abort
292 .endm 295 .endm
296#endif /* __ASM_ASSEMBLER_H__ */
diff --git a/arch/arm/include/asm/entry-macro-multi.S b/arch/arm/include/asm/entry-macro-multi.S
index ec0bbf79c71f..2da8547de6d6 100644
--- a/arch/arm/include/asm/entry-macro-multi.S
+++ b/arch/arm/include/asm/entry-macro-multi.S
@@ -1,3 +1,5 @@
1#include <asm/assembler.h>
2
1/* 3/*
2 * Interrupt handling. Preserves r7, r8, r9 4 * Interrupt handling. Preserves r7, r8, r9
3 */ 5 */
diff --git a/arch/arm/kernel/module.c b/arch/arm/kernel/module.c
index fee7c36349eb..016d6a0830a3 100644
--- a/arch/arm/kernel/module.c
+++ b/arch/arm/kernel/module.c
@@ -193,8 +193,17 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex,
193 offset -= 0x02000000; 193 offset -= 0x02000000;
194 offset += sym->st_value - loc; 194 offset += sym->st_value - loc;
195 195
196 /* only Thumb addresses allowed (no interworking) */ 196 /*
197 if (!(offset & 1) || 197 * For function symbols, only Thumb addresses are
198 * allowed (no interworking).
199 *
200 * For non-function symbols, the destination
201 * has no specific ARM/Thumb disposition, so
202 * the branch is resolved under the assumption
203 * that interworking is not required.
204 */
205 if ((ELF32_ST_TYPE(sym->st_info) == STT_FUNC &&
206 !(offset & 1)) ||
198 offset <= (s32)0xff000000 || 207 offset <= (s32)0xff000000 ||
199 offset >= (s32)0x01000000) { 208 offset >= (s32)0x01000000) {
200 pr_err("%s: section %u reloc %u sym '%s': relocation %u out of range (%#lx -> %#x)\n", 209 pr_err("%s: section %u reloc %u sym '%s': relocation %u out of range (%#lx -> %#x)\n",
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 344e52b16c8c..e7f92a4321f3 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -318,9 +318,13 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
318 smp_store_cpu_info(cpu); 318 smp_store_cpu_info(cpu);
319 319
320 /* 320 /*
321 * OK, now it's safe to let the boot CPU continue 321 * OK, now it's safe to let the boot CPU continue. Wait for
322 * the CPU migration code to notice that the CPU is online
323 * before we continue.
322 */ 324 */
323 set_cpu_online(cpu, true); 325 set_cpu_online(cpu, true);
326 while (!cpu_active(cpu))
327 cpu_relax();
324 328
325 /* 329 /*
326 * OK, it's off to the idle thread for us 330 * OK, it's off to the idle thread for us
diff --git a/arch/arm/mach-h720x/Kconfig b/arch/arm/mach-h720x/Kconfig
index 9b6982efbd22..abf356c02343 100644
--- a/arch/arm/mach-h720x/Kconfig
+++ b/arch/arm/mach-h720x/Kconfig
@@ -6,12 +6,14 @@ config ARCH_H7201
6 bool "gms30c7201" 6 bool "gms30c7201"
7 depends on ARCH_H720X 7 depends on ARCH_H720X
8 select CPU_H7201 8 select CPU_H7201
9 select ZONE_DMA
9 help 10 help
10 Say Y here if you are using the Hynix GMS30C7201 Reference Board 11 Say Y here if you are using the Hynix GMS30C7201 Reference Board
11 12
12config ARCH_H7202 13config ARCH_H7202
13 bool "hms30c7202" 14 bool "hms30c7202"
14 select CPU_H7202 15 select CPU_H7202
16 select ZONE_DMA
15 depends on ARCH_H720X 17 depends on ARCH_H720X
16 help 18 help
17 Say Y here if you are using the Hynix HMS30C7202 Reference Board 19 Say Y here if you are using the Hynix HMS30C7202 Reference Board
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 3c3867850a30..089c0b5e454f 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -210,19 +210,21 @@ cpu_v7_name:
210 210
211/* Suspend/resume support: derived from arch/arm/mach-s5pv210/sleep.S */ 211/* Suspend/resume support: derived from arch/arm/mach-s5pv210/sleep.S */
212.globl cpu_v7_suspend_size 212.globl cpu_v7_suspend_size
213.equ cpu_v7_suspend_size, 4 * 8 213.equ cpu_v7_suspend_size, 4 * 9
214#ifdef CONFIG_PM_SLEEP 214#ifdef CONFIG_PM_SLEEP
215ENTRY(cpu_v7_do_suspend) 215ENTRY(cpu_v7_do_suspend)
216 stmfd sp!, {r4 - r11, lr} 216 stmfd sp!, {r4 - r11, lr}
217 mrc p15, 0, r4, c13, c0, 0 @ FCSE/PID 217 mrc p15, 0, r4, c13, c0, 0 @ FCSE/PID
218 mrc p15, 0, r5, c13, c0, 1 @ Context ID 218 mrc p15, 0, r5, c13, c0, 1 @ Context ID
219 mrc p15, 0, r6, c13, c0, 3 @ User r/o thread ID
220 stmia r0!, {r4 - r6}
219 mrc p15, 0, r6, c3, c0, 0 @ Domain ID 221 mrc p15, 0, r6, c3, c0, 0 @ Domain ID
220 mrc p15, 0, r7, c2, c0, 0 @ TTB 0 222 mrc p15, 0, r7, c2, c0, 0 @ TTB 0
221 mrc p15, 0, r8, c2, c0, 1 @ TTB 1 223 mrc p15, 0, r8, c2, c0, 1 @ TTB 1
222 mrc p15, 0, r9, c1, c0, 0 @ Control register 224 mrc p15, 0, r9, c1, c0, 0 @ Control register
223 mrc p15, 0, r10, c1, c0, 1 @ Auxiliary control register 225 mrc p15, 0, r10, c1, c0, 1 @ Auxiliary control register
224 mrc p15, 0, r11, c1, c0, 2 @ Co-processor access control 226 mrc p15, 0, r11, c1, c0, 2 @ Co-processor access control
225 stmia r0, {r4 - r11} 227 stmia r0, {r6 - r11}
226 ldmfd sp!, {r4 - r11, pc} 228 ldmfd sp!, {r4 - r11, pc}
227ENDPROC(cpu_v7_do_suspend) 229ENDPROC(cpu_v7_do_suspend)
228 230
@@ -230,9 +232,11 @@ ENTRY(cpu_v7_do_resume)
230 mov ip, #0 232 mov ip, #0
231 mcr p15, 0, ip, c8, c7, 0 @ invalidate TLBs 233 mcr p15, 0, ip, c8, c7, 0 @ invalidate TLBs
232 mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache 234 mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache
233 ldmia r0, {r4 - r11} 235 ldmia r0!, {r4 - r6}
234 mcr p15, 0, r4, c13, c0, 0 @ FCSE/PID 236 mcr p15, 0, r4, c13, c0, 0 @ FCSE/PID
235 mcr p15, 0, r5, c13, c0, 1 @ Context ID 237 mcr p15, 0, r5, c13, c0, 1 @ Context ID
238 mcr p15, 0, r6, c13, c0, 3 @ User r/o thread ID
239 ldmia r0, {r6 - r11}
236 mcr p15, 0, r6, c3, c0, 0 @ Domain ID 240 mcr p15, 0, r6, c3, c0, 0 @ Domain ID
237 mcr p15, 0, r7, c2, c0, 0 @ TTB 0 241 mcr p15, 0, r7, c2, c0, 0 @ TTB 0
238 mcr p15, 0, r8, c2, c0, 1 @ TTB 1 242 mcr p15, 0, r8, c2, c0, 1 @ TTB 1
@@ -418,9 +422,9 @@ ENTRY(v7_processor_functions)
418 .word cpu_v7_dcache_clean_area 422 .word cpu_v7_dcache_clean_area
419 .word cpu_v7_switch_mm 423 .word cpu_v7_switch_mm
420 .word cpu_v7_set_pte_ext 424 .word cpu_v7_set_pte_ext
421 .word 0 425 .word cpu_v7_suspend_size
422 .word 0 426 .word cpu_v7_do_suspend
423 .word 0 427 .word cpu_v7_do_resume
424 .size v7_processor_functions, . - v7_processor_functions 428 .size v7_processor_functions, . - v7_processor_functions
425 429
426 .section ".rodata" 430 .section ".rodata"
diff --git a/arch/arm/plat-iop/cp6.c b/arch/arm/plat-iop/cp6.c
index 9612a87e2a88..bab73e2c79db 100644
--- a/arch/arm/plat-iop/cp6.c
+++ b/arch/arm/plat-iop/cp6.c
@@ -18,6 +18,7 @@
18 */ 18 */
19#include <linux/init.h> 19#include <linux/init.h>
20#include <asm/traps.h> 20#include <asm/traps.h>
21#include <asm/ptrace.h>
21 22
22static int cp6_trap(struct pt_regs *regs, unsigned int instr) 23static int cp6_trap(struct pt_regs *regs, unsigned int instr)
23{ 24{