[MIPS] Remove support for NEC DDB5074.

As warned several times before. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
author: Ralf Baechle <ralf@linux-mips.org> 2006-06-17 23:58:57 -0400
committer: Ralf Baechle <ralf@linux-mips.org> 2006-06-19 12:39:24 -0400
commit: eaff3888742155bd397e45a1c3323c0173042e5b (patch)
tree: bf8ee6203072e01ce0d50db5898137c7552da6e5 /arch
parent: 2925aba4223f4532e85f0c6f64584b3e0b2849c3 (diff)
58 files changed, 1 insertions, 1144 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index ae33e0a4c18d..c3c8e7a15af3 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -469,24 +469,6 @@ config PNX8550_JBS
        select PNX8550
        select SYS_SUPPORTS_LITTLE_ENDIAN
-config DDB5074
-        bool "NEC DDB Vrc-5074 (EXPERIMENTAL)"
-        depends on EXPERIMENTAL
-        select DDB5XXX_COMMON
-        select DMA_NONCOHERENT
-        select HAVE_STD_PC_SERIAL_PORT
-        select HW_HAS_PCI
-        select IRQ_CPU
-        select I8259
-        select ISA
-        select SYS_HAS_CPU_R5000
-        select SYS_SUPPORTS_32BIT_KERNEL
-        select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
-        select SYS_SUPPORTS_LITTLE_ENDIAN
-        help
-          This enables support for the VR5000-based NEC DDB Vrc-5074
-          evaluation board.
 config DDB5476
        bool "NEC DDB Vrc-5476"
        select DDB5XXX_COMMON
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 24a901cf5a45..8d1026cd0738 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -404,12 +404,6 @@ load-$(CONFIG_MOMENCO_JAGUAR_ATX)	+= 0xffffffff80100000
 core-$(CONFIG_DDB5XXX_COMMON)   += arch/mips/ddb5xxx/common/
 #
-# NEC DDB Vrc-5074
-#
-core-$(CONFIG_DDB5074)          += arch/mips/ddb5xxx/ddb5074/
-load-$(CONFIG_DDB5074)          += 0xffffffff80080000
-#
 # NEC DDB Vrc-5476
 #
 core-$(CONFIG_DDB5476)          += arch/mips/ddb5xxx/ddb5476/
diff --git a/arch/mips/configs/atlas_defconfig b/arch/mips/configs/atlas_defconfig
index 4b080bcb258f..7b6de36e5b74 100644
--- a/arch/mips/configs/atlas_defconfig
+++ b/arch/mips/configs/atlas_defconfig
@@ -41,7 +41,6 @@ CONFIG_MIPS_ATLAS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/bigsur_defconfig b/arch/mips/configs/bigsur_defconfig
index d85cda58d650..633cafe20418 100644
--- a/arch/mips/configs/bigsur_defconfig
+++ b/arch/mips/configs/bigsur_defconfig
@@ -41,7 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/capcella_defconfig b/arch/mips/configs/capcella_defconfig
index ca0af1683a00..bd150ec8559f 100644
--- a/arch/mips/configs/capcella_defconfig
+++ b/arch/mips/configs/capcella_defconfig
@@ -41,7 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 CONFIG_MACH_VR41XX=y
diff --git a/arch/mips/configs/cobalt_defconfig b/arch/mips/configs/cobalt_defconfig
index 7d269e609282..ad83025420ec 100644
--- a/arch/mips/configs/cobalt_defconfig
+++ b/arch/mips/configs/cobalt_defconfig
@@ -41,7 +41,6 @@ CONFIG_MIPS_COBALT=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/db1000_defconfig b/arch/mips/configs/db1000_defconfig
index 579b665e3339..ba3c7b9464bf 100644
--- a/arch/mips/configs/db1000_defconfig
+++ b/arch/mips/configs/db1000_defconfig
@@ -41,7 +41,6 @@ CONFIG_MIPS_DB1000=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/db1100_defconfig b/arch/mips/configs/db1100_defconfig
index e5eb53867422..321a4d00ce94 100644
--- a/arch/mips/configs/db1100_defconfig
+++ b/arch/mips/configs/db1100_defconfig
@@ -41,7 +41,6 @@ CONFIG_MIPS_DB1100=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/db1200_defconfig b/arch/mips/configs/db1200_defconfig
index a43fb2329fd5..97471008f3ae 100644
--- a/arch/mips/configs/db1200_defconfig
+++ b/arch/mips/configs/db1200_defconfig
@@ -41,7 +41,6 @@ CONFIG_MIPS_DB1200=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/db1500_defconfig b/arch/mips/configs/db1500_defconfig
index ad632d87c4ef..fbcc1738ff90 100644
--- a/arch/mips/configs/db1500_defconfig
+++ b/arch/mips/configs/db1500_defconfig
@@ -41,7 +41,6 @@ CONFIG_MIPS_DB1500=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/db1550_defconfig b/arch/mips/configs/db1550_defconfig
index 8130e23dc255..d014cdd3e705 100644
--- a/arch/mips/configs/db1550_defconfig
+++ b/arch/mips/configs/db1550_defconfig
@@ -41,7 +41,6 @@ CONFIG_MIPS_DB1550=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/ddb5476_defconfig b/arch/mips/configs/ddb5476_defconfig
index 8d88ac1bbfeb..90cabf5419ad 100644
--- a/arch/mips/configs/ddb5476_defconfig
+++ b/arch/mips/configs/ddb5476_defconfig
@@ -41,7 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 CONFIG_DDB5476=y
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/ddb5477_defconfig b/arch/mips/configs/ddb5477_defconfig
index 8c911b671415..fc30ace3d737 100644
--- a/arch/mips/configs/ddb5477_defconfig
+++ b/arch/mips/configs/ddb5477_defconfig
@@ -41,7 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 CONFIG_DDB5477=y
 # CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/decstation_defconfig b/arch/mips/configs/decstation_defconfig
index d838496e114f..0775d7364cab 100644
--- a/arch/mips/configs/decstation_defconfig
+++ b/arch/mips/configs/decstation_defconfig
@@ -41,7 +41,6 @@ CONFIG_MACH_DECSTATION=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/e55_defconfig b/arch/mips/configs/e55_defconfig
index 0760f4318910..8f9de1c3bf1e 100644
--- a/arch/mips/configs/e55_defconfig
+++ b/arch/mips/configs/e55_defconfig
@@ -41,7 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 CONFIG_MACH_VR41XX=y
diff --git a/arch/mips/configs/ev64120_defconfig b/arch/mips/configs/ev64120_defconfig
index 7067f608b22c..b97c90fa5491 100644
--- a/arch/mips/configs/ev64120_defconfig
+++ b/arch/mips/configs/ev64120_defconfig
@@ -41,7 +41,6 @@ CONFIG_MIPS_EV64120=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/ev96100_defconfig b/arch/mips/configs/ev96100_defconfig
index 00b56ed0e638..708b0d6896d8 100644
--- a/arch/mips/configs/ev96100_defconfig
+++ b/arch/mips/configs/ev96100_defconfig
@@ -41,7 +41,6 @@ CONFIG_MIPS_EV96100=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/ip22_defconfig b/arch/mips/configs/ip22_defconfig
index 607e2985ffe3..f7b0beb5752f 100644
--- a/arch/mips/configs/ip22_defconfig
+++ b/arch/mips/configs/ip22_defconfig
@@ -41,7 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/ip27_defconfig b/arch/mips/configs/ip27_defconfig
index 87d27cd3d2cf..b4ae9cd15ba3 100644
--- a/arch/mips/configs/ip27_defconfig
+++ b/arch/mips/configs/ip27_defconfig
@@ -41,7 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/ip32_defconfig b/arch/mips/configs/ip32_defconfig
index 8f11d3565b2d..a95c2e847f68 100644
--- a/arch/mips/configs/ip32_defconfig
+++ b/arch/mips/configs/ip32_defconfig
@@ -41,7 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/it8172_defconfig b/arch/mips/configs/it8172_defconfig
index 757adf23853d..87c5cde49e59 100644
--- a/arch/mips/configs/it8172_defconfig
+++ b/arch/mips/configs/it8172_defconfig
@@ -41,7 +41,6 @@ CONFIG_MIPS_ITE8172=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/ivr_defconfig b/arch/mips/configs/ivr_defconfig
index 021761a8a237..1346b683b287 100644
--- a/arch/mips/configs/ivr_defconfig
+++ b/arch/mips/configs/ivr_defconfig
@@ -41,7 +41,6 @@ CONFIG_MIPS_IVR=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/jaguar-atx_defconfig b/arch/mips/configs/jaguar-atx_defconfig
index 08f6c30b0abc..d2d1a7776362 100644
--- a/arch/mips/configs/jaguar-atx_defconfig
+++ b/arch/mips/configs/jaguar-atx_defconfig
@@ -41,7 +41,6 @@ CONFIG_MOMENCO_JAGUAR_ATX=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/jmr3927_defconfig b/arch/mips/configs/jmr3927_defconfig
index 38b1e026e10d..ba23db03ba95 100644
--- a/arch/mips/configs/jmr3927_defconfig
+++ b/arch/mips/configs/jmr3927_defconfig
@@ -41,7 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/lasat200_defconfig b/arch/mips/configs/lasat200_defconfig
index 4d25990a0a05..7500332c9b5c 100644
--- a/arch/mips/configs/lasat200_defconfig
+++ b/arch/mips/configs/lasat200_defconfig
@@ -41,7 +41,6 @@ CONFIG_LASAT=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/malta_defconfig b/arch/mips/configs/malta_defconfig
index 977f52be51dc..1aac4901c57e 100644
--- a/arch/mips/configs/malta_defconfig
+++ b/arch/mips/configs/malta_defconfig
@@ -41,7 +41,6 @@ CONFIG_MIPS_MALTA=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/mipssim_defconfig b/arch/mips/configs/mipssim_defconfig
index 00560e0143f1..011120c5033e 100644
--- a/arch/mips/configs/mipssim_defconfig
+++ b/arch/mips/configs/mipssim_defconfig
@@ -41,7 +41,6 @@ CONFIG_MIPS_SIM=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/mpc30x_defconfig b/arch/mips/configs/mpc30x_defconfig
index 286a018375b2..ca0baa29483c 100644
--- a/arch/mips/configs/mpc30x_defconfig
+++ b/arch/mips/configs/mpc30x_defconfig
@@ -41,7 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 CONFIG_MACH_VR41XX=y
diff --git a/arch/mips/configs/ocelot_3_defconfig b/arch/mips/configs/ocelot_3_defconfig
index 1ce4310fd92a..a8d26596ca8e 100644
--- a/arch/mips/configs/ocelot_3_defconfig
+++ b/arch/mips/configs/ocelot_3_defconfig
@@ -41,7 +41,6 @@ CONFIG_MOMENCO_OCELOT_3=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/ocelot_c_defconfig b/arch/mips/configs/ocelot_c_defconfig
index 8a6aa5012f89..a1d6d7ff93fb 100644
--- a/arch/mips/configs/ocelot_c_defconfig
+++ b/arch/mips/configs/ocelot_c_defconfig
@@ -41,7 +41,6 @@ CONFIG_MOMENCO_OCELOT_C=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/ocelot_defconfig b/arch/mips/configs/ocelot_defconfig
index f9ee35eeb762..4b72b0a2fb4b 100644
--- a/arch/mips/configs/ocelot_defconfig
+++ b/arch/mips/configs/ocelot_defconfig
@@ -41,7 +41,6 @@ CONFIG_MOMENCO_OCELOT=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/ocelot_g_defconfig b/arch/mips/configs/ocelot_g_defconfig
index b48bdee2411f..232f13a41938 100644
--- a/arch/mips/configs/ocelot_g_defconfig
+++ b/arch/mips/configs/ocelot_g_defconfig
@@ -41,7 +41,6 @@ CONFIG_MOMENCO_OCELOT_G=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/pb1100_defconfig b/arch/mips/configs/pb1100_defconfig
index 01aac40634b4..55da4eb76f7b 100644
--- a/arch/mips/configs/pb1100_defconfig
+++ b/arch/mips/configs/pb1100_defconfig
@@ -41,7 +41,6 @@ CONFIG_MIPS_PB1100=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/pb1500_defconfig b/arch/mips/configs/pb1500_defconfig
index 398c3c265b9f..348581d91b52 100644
--- a/arch/mips/configs/pb1500_defconfig
+++ b/arch/mips/configs/pb1500_defconfig
@@ -41,7 +41,6 @@ CONFIG_MIPS_PB1500=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/pb1550_defconfig b/arch/mips/configs/pb1550_defconfig
index ea282a53bb66..897f76c0c8ab 100644
--- a/arch/mips/configs/pb1550_defconfig
+++ b/arch/mips/configs/pb1550_defconfig
@@ -41,7 +41,6 @@ CONFIG_MIPS_PB1550=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/pnx8550-jbs_defconfig b/arch/mips/configs/pnx8550-jbs_defconfig
index 4c57e564db0b..6289dfa73f2f 100644
--- a/arch/mips/configs/pnx8550-jbs_defconfig
+++ b/arch/mips/configs/pnx8550-jbs_defconfig
@@ -41,7 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 CONFIG_PNX8550_JBS=y
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/pnx8550-v2pci_defconfig b/arch/mips/configs/pnx8550-v2pci_defconfig
index 3c8f35162fec..d8448fdb2514 100644
--- a/arch/mips/configs/pnx8550-v2pci_defconfig
+++ b/arch/mips/configs/pnx8550-v2pci_defconfig
@@ -41,7 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 CONFIG_PNX8550_V2PCI=y
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/qemu_defconfig b/arch/mips/configs/qemu_defconfig
index 4bcc01dea041..99c43c9f1595 100644
--- a/arch/mips/configs/qemu_defconfig
+++ b/arch/mips/configs/qemu_defconfig
@@ -41,7 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/rbhma4500_defconfig b/arch/mips/configs/rbhma4500_defconfig
index 3d441932e43a..c55e8e6ff207 100644
--- a/arch/mips/configs/rbhma4500_defconfig
+++ b/arch/mips/configs/rbhma4500_defconfig
@@ -41,7 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/rm200_defconfig b/arch/mips/configs/rm200_defconfig
index edfb9679a25a..6013c6533ca5 100644
--- a/arch/mips/configs/rm200_defconfig
+++ b/arch/mips/configs/rm200_defconfig
@@ -41,7 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/sb1250-swarm_defconfig b/arch/mips/configs/sb1250-swarm_defconfig
index e388a3dae0a9..6b8441e18843 100644
--- a/arch/mips/configs/sb1250-swarm_defconfig
+++ b/arch/mips/configs/sb1250-swarm_defconfig
@@ -41,7 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/sead_defconfig b/arch/mips/configs/sead_defconfig
index 6b8a6a416a25..94d04f7a5e6b 100644
--- a/arch/mips/configs/sead_defconfig
+++ b/arch/mips/configs/sead_defconfig
@@ -41,7 +41,6 @@ CONFIG_MIPS_SEAD=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/tb0226_defconfig b/arch/mips/configs/tb0226_defconfig
index dba0bdcdcf29..f84864d8ec33 100644
--- a/arch/mips/configs/tb0226_defconfig
+++ b/arch/mips/configs/tb0226_defconfig
@@ -41,7 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 CONFIG_MACH_VR41XX=y
diff --git a/arch/mips/configs/tb0229_defconfig b/arch/mips/configs/tb0229_defconfig
index 5a924c1a5803..aeb1e85f9ce7 100644
--- a/arch/mips/configs/tb0229_defconfig
+++ b/arch/mips/configs/tb0229_defconfig
@@ -41,7 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 CONFIG_MACH_VR41XX=y
diff --git a/arch/mips/configs/tb0287_defconfig b/arch/mips/configs/tb0287_defconfig
index 9f215ea350dc..5f1ee08d9851 100644
--- a/arch/mips/configs/tb0287_defconfig
+++ b/arch/mips/configs/tb0287_defconfig
@@ -41,7 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 CONFIG_MACH_VR41XX=y
diff --git a/arch/mips/configs/workpad_defconfig b/arch/mips/configs/workpad_defconfig
index ac7765eb8da7..ebc25edbf73d 100644
--- a/arch/mips/configs/workpad_defconfig
+++ b/arch/mips/configs/workpad_defconfig
@@ -41,7 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 CONFIG_MACH_VR41XX=y
diff --git a/arch/mips/configs/wrppmc_defconfig b/arch/mips/configs/wrppmc_defconfig
index 1997b7c11ab4..03c880792163 100644
--- a/arch/mips/configs/wrppmc_defconfig
+++ b/arch/mips/configs/wrppmc_defconfig
@@ -42,7 +42,6 @@ CONFIG_WR_PPMC=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/yosemite_defconfig b/arch/mips/configs/yosemite_defconfig
index b52d709de962..1c728f216fbd 100644
--- a/arch/mips/configs/yosemite_defconfig
+++ b/arch/mips/configs/yosemite_defconfig
@@ -41,7 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/ddb5xxx/common/prom.c b/arch/mips/ddb5xxx/common/prom.c
index b8d1f7489f3b..18eecbcdfca8 100644
--- a/arch/mips/ddb5xxx/common/prom.c
+++ b/arch/mips/ddb5xxx/common/prom.c
@@ -56,10 +56,7 @@ void __init prom_init(void)
        mips_machgroup = MACH_GROUP_NEC_DDB;
-#if defined(CONFIG_DDB5074)
+#if defined(CONFIG_DDB5476)
-        mips_machtype = MACH_NEC_DDB5074;
-        add_memory_region(0, DDB_SDRAM_SIZE, BOOT_MEM_RAM);
-#elif defined(CONFIG_DDB5476)
        mips_machtype = MACH_NEC_DDB5476;
        add_memory_region(0, DDB_SDRAM_SIZE, BOOT_MEM_RAM);
 #elif defined(CONFIG_DDB5477)
diff --git a/arch/mips/ddb5xxx/ddb5074/Makefile b/arch/mips/ddb5xxx/ddb5074/Makefile
deleted file mode 100644
index 304c02107b46..000000000000
--- a/arch/mips/ddb5xxx/ddb5074/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# Makefile for the NEC DDB Vrc-5074 specific kernel interface routines
-# under Linux.
-#
-obj-y                   += setup.o irq.o nile4_pic.o
-EXTRA_AFLAGS := $(CFLAGS)
diff --git a/arch/mips/ddb5xxx/ddb5074/irq.c b/arch/mips/ddb5xxx/ddb5074/irq.c
deleted file mode 100644
index 60c087b7738c..000000000000
--- a/arch/mips/ddb5xxx/ddb5074/irq.c
+++ /dev/null
@@ -1,169 +0,0 @@
-/*
- *  arch/mips/ddb5074/irq.c -- NEC DDB Vrc-5074 interrupt routines
- *
- *  Copyright (C) 2000 Geert Uytterhoeven <geert@sonycom.com>
- *                     Sony Software Development Center Europe (SDCE), Brussels
- */
-#include <linux/init.h>
-#include <linux/irq.h>
-#include <linux/signal.h>
-#include <linux/sched.h>
-#include <linux/types.h>
-#include <linux/interrupt.h>
-#include <linux/ioport.h>
-#include <asm/i8259.h>
-#include <asm/io.h>
-#include <asm/irq_cpu.h>
-#include <asm/ptrace.h>
-#include <asm/nile4.h>
-#include <asm/ddb5xxx/ddb5xxx.h>
-#include <asm/ddb5xxx/ddb5074.h>
-static struct irqaction irq_cascade = { no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL };
-#define M1543_PNP_CONFIG        0x03f0  /* PnP Config Port */
-#define M1543_PNP_INDEX         0x03f0  /* PnP Index Port */
-#define M1543_PNP_DATA          0x03f1  /* PnP Data Port */
-#define M1543_PNP_ALT_CONFIG    0x0370  /* Alternative PnP Config Port */
-#define M1543_PNP_ALT_INDEX     0x0370  /* Alternative PnP Index Port */
-#define M1543_PNP_ALT_DATA      0x0371  /* Alternative PnP Data Port */
-#define M1543_INT1_MASTER_CTRL  0x0020  /* INT_1 (master) Control Register */
-#define M1543_INT1_MASTER_MASK  0x0021  /* INT_1 (master) Mask Register */
-#define M1543_INT1_SLAVE_CTRL   0x00a0  /* INT_1 (slave) Control Register */
-#define M1543_INT1_SLAVE_MASK   0x00a1  /* INT_1 (slave) Mask Register */
-#define M1543_INT1_MASTER_ELCR  0x04d0  /* INT_1 (master) Edge/Level Control */
-#define M1543_INT1_SLAVE_ELCR   0x04d1  /* INT_1 (slave) Edge/Level Control */
-static void m1543_irq_setup(void)
-{
-        /*
-         *  The ALI M1543 has 13 interrupt inputs, IRQ1..IRQ13.  Not all
-         *  the possible IO sources in the M1543 are in use by us.  We will
-         *  use the following mapping:
-         *
-         *      IRQ1  - keyboard (default set by M1543)
-         *      IRQ3  - reserved for UART B (default set by M1543) (note that
-         *              the schematics for the DDB Vrc-5074 board seem to
-         *              indicate that IRQ3 is connected to the DS1386
-         *              watchdog timer interrupt output so we might have
-         *              a conflict)
-         *      IRQ4  - reserved for UART A (default set by M1543)
-         *      IRQ5  - parallel (default set by M1543)
-         *      IRQ8  - DS1386 time of day (RTC) interrupt
-         *      IRQ12 - mouse
-         */
-        /*
-         *  Assing mouse interrupt to IRQ12
-         */
-        /* Enter configuration mode */
-        outb(0x51, M1543_PNP_CONFIG);
-        outb(0x23, M1543_PNP_CONFIG);
-        /* Select logical device 7 (Keyboard) */
-        outb(0x07, M1543_PNP_INDEX);
-        outb(0x07, M1543_PNP_DATA);
-        /* Select IRQ12 */
-        outb(0x72, M1543_PNP_INDEX);
-        outb(0x0c, M1543_PNP_DATA);
-        outb(0x30, M1543_PNP_INDEX);
-        printk("device 7, 0x30: %02x\n",inb(M1543_PNP_DATA));
-        outb(0x70, M1543_PNP_INDEX);
-        printk("device 7, 0x70: %02x\n",inb(M1543_PNP_DATA));
-        /* Leave configration mode */
-        outb(0xbb, M1543_PNP_CONFIG);
-}
-static void ddb_local0_irqdispatch(struct pt_regs *regs)
-{
-        u32 mask;
-        int nile4_irq;
-        mask = nile4_get_irq_stat(0);
-        /* Handle the timer interrupt first */
-#if 0
-        if (mask & (1 << NILE4_INT_GPT)) {
-                do_IRQ(nile4_to_irq(NILE4_INT_GPT), regs);
-                mask &= ~(1 << NILE4_INT_GPT);
-        }
-#endif
-        for (nile4_irq = 0; mask; nile4_irq++, mask >>= 1)
-                if (mask & 1) {
-                        if (nile4_irq == NILE4_INT_INTE) {
-                                int i8259_irq;
-                                nile4_clear_irq(NILE4_INT_INTE);
-                                i8259_irq = nile4_i8259_iack();
-                                do_IRQ(i8259_irq, regs);
-                        } else
-                                do_IRQ(nile4_to_irq(nile4_irq), regs);
-                }
-}
-static void ddb_local1_irqdispatch(void)
-{
-        printk("ddb_local1_irqdispatch called\n");
-}
-static void ddb_buserror_irq(void)
-{
-        printk("ddb_buserror_irq called\n");
-}
-static void ddb_8254timer_irq(void)
-{
-        printk("ddb_8254timer_irq called\n");
-}
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
-{
-        unsigned int pending = read_c0_cause() & read_c0_status();
-        if (pending & CAUSEF_IP2)
-                ddb_local0_irqdispatch(regs);
-        else if (pending & CAUSEF_IP3)
-                ddb_local1_irqdispatch();
-        else if (pending & CAUSEF_IP6)
-                ddb_buserror_irq();
-        else if (pending & (CAUSEF_IP4 | CAUSEF_IP5))
-                ddb_8254timer_irq();
-}
-void __init arch_init_irq(void)
-{
-        /* setup cascade interrupts */
-        setup_irq(NILE4_IRQ_BASE  + NILE4_INT_INTE, &irq_cascade);
-        setup_irq(CPU_IRQ_BASE + CPU_NILE4_CASCADE, &irq_cascade);
-        nile4_irq_setup(NILE4_IRQ_BASE);
-        m1543_irq_setup();
-        init_i8259_irqs();
-        printk("CPU_IRQ_BASE: %d\n",CPU_IRQ_BASE);
-        mips_cpu_irq_init(CPU_IRQ_BASE);
-        printk("enabling 8259 cascade\n");
-        ddb5074_led_hex(0);
-        /* Enable the interrupt cascade */
-        nile4_enable_irq(NILE4_IRQ_BASE+IRQ_I8259_CASCADE);
-}
diff --git a/arch/mips/ddb5xxx/ddb5074/nile4_pic.c b/arch/mips/ddb5xxx/ddb5074/nile4_pic.c
deleted file mode 100644
index 8743ffce8653..000000000000
--- a/arch/mips/ddb5xxx/ddb5074/nile4_pic.c
+++ /dev/null
@@ -1,286 +0,0 @@
-/*
- *  arch/mips/ddb5476/nile4.c --
- *      low-level PIC code for NEC Vrc-5476 (Nile 4)
- *
- *  Copyright (C) 2000 Geert Uytterhoeven <geert@sonycom.com>
- *                     Sony Software Development Center Europe (SDCE), Brussels
- *
- *  Copyright 2001 MontaVista Software Inc.
- *  Author: jsun@mvista.com or jsun@junsun.net
- *
- */
-#include <linux/config.h>
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/interrupt.h>
-#include <linux/ioport.h>
-#include <asm/addrspace.h>
-#include <asm/ddb5xxx/ddb5xxx.h>
-static int irq_base;
-/*
- *  Interrupt Programming
- */
-void nile4_map_irq(int nile4_irq, int cpu_irq)
-{
-        u32 offset, t;
-        offset = DDB_INTCTRL;
-        if (nile4_irq >= 8) {
-                offset += 4;
-                nile4_irq -= 8;
-        }
-        t = ddb_in32(offset);
-        t &= ~(7 << (nile4_irq * 4));
-        t |= cpu_irq << (nile4_irq * 4);
-        ddb_out32(offset, t);
-}
-void nile4_map_irq_all(int cpu_irq)
-{
-        u32 all, t;
-        all = cpu_irq;
-        all |= all << 4;
-        all |= all << 8;
-        all |= all << 16;
-        t = ddb_in32(DDB_INTCTRL);
-        t &= 0x88888888;
-        t |= all;
-        ddb_out32(DDB_INTCTRL, t);
-        t = ddb_in32(DDB_INTCTRL + 4);
-        t &= 0x88888888;
-        t |= all;
-        ddb_out32(DDB_INTCTRL + 4, t);
-}
-void nile4_enable_irq(unsigned int nile4_irq)
-{
-        u32 offset, t;
-        nile4_irq-=irq_base;
-        ddb5074_led_hex(8);
-        offset = DDB_INTCTRL;
-        if (nile4_irq >= 8) {
-                offset += 4;
-                nile4_irq -= 8;
-        }
-        ddb5074_led_hex(9);
-        t = ddb_in32(offset);
-        ddb5074_led_hex(0xa);
-        t |= 8 << (nile4_irq * 4);
-        ddb_out32(offset, t);
-        ddb5074_led_hex(0xb);
-}
-void nile4_disable_irq(unsigned int nile4_irq)
-{
-        u32 offset, t;
-        nile4_irq-=irq_base;
-        offset = DDB_INTCTRL;
-        if (nile4_irq >= 8) {
-                offset += 4;
-                nile4_irq -= 8;
-        }
-        t = ddb_in32(offset);
-        t &= ~(8 << (nile4_irq * 4));
-        ddb_out32(offset, t);
-}
-void nile4_disable_irq_all(void)
-{
-        ddb_out32(DDB_INTCTRL, 0);
-        ddb_out32(DDB_INTCTRL + 4, 0);
-}
-u16 nile4_get_irq_stat(int cpu_irq)
-{
-        return ddb_in16(DDB_INTSTAT0 + cpu_irq * 2);
-}
-void nile4_enable_irq_output(int cpu_irq)
-{
-        u32 t;
-        t = ddb_in32(DDB_INTSTAT1 + 4);
-        t |= 1 << (16 + cpu_irq);
-        ddb_out32(DDB_INTSTAT1, t);
-}
-void nile4_disable_irq_output(int cpu_irq)
-{
-        u32 t;
-        t = ddb_in32(DDB_INTSTAT1 + 4);
-        t &= ~(1 << (16 + cpu_irq));
-        ddb_out32(DDB_INTSTAT1, t);
-}
-void nile4_set_pci_irq_polarity(int pci_irq, int high)
-{
-        u32 t;
-        t = ddb_in32(DDB_INTPPES);
-        if (high)
-                t &= ~(1 << (pci_irq * 2));
-        else
-                t |= 1 << (pci_irq * 2);
-        ddb_out32(DDB_INTPPES, t);
-}
-void nile4_set_pci_irq_level_or_edge(int pci_irq, int level)
-{
-        u32 t;
-        t = ddb_in32(DDB_INTPPES);
-        if (level)
-                t |= 2 << (pci_irq * 2);
-        else
-                t &= ~(2 << (pci_irq * 2));
-        ddb_out32(DDB_INTPPES, t);
-}
-void nile4_clear_irq(int nile4_irq)
-{
-        nile4_irq-=irq_base;
-        ddb_out32(DDB_INTCLR, 1 << nile4_irq);
-}
-void nile4_clear_irq_mask(u32 mask)
-{
-        ddb_out32(DDB_INTCLR, mask);
-}
-u8 nile4_i8259_iack(void)
-{
-        u8 irq;
-        u32 reg;
-        /* Set window 0 for interrupt acknowledge */
-        reg = ddb_in32(DDB_PCIINIT0);
-        ddb_set_pmr(DDB_PCIINIT0, DDB_PCICMD_IACK, 0, DDB_PCI_ACCESS_32);
-        irq = *(volatile u8 *) KSEG1ADDR(DDB_PCI_IACK_BASE);
-        /* restore window 0 for PCI I/O space */
-        // ddb_set_pmr(DDB_PCIINIT0, DDB_PCICMD_IO, 0, DDB_PCI_ACCESS_32);
-        ddb_out32(DDB_PCIINIT0, reg);
-        /* i8269.c set the base vector to be 0x0 */
-        return irq ;
-}
-static unsigned int nile4_irq_startup(unsigned int irq) {
-        nile4_enable_irq(irq);
-        return 0;
-}
-static void nile4_ack_irq(unsigned int irq) {
-    ddb5074_led_hex(4);
-        nile4_clear_irq(irq);
-    ddb5074_led_hex(2);
-        nile4_disable_irq(irq);
-    ddb5074_led_hex(0);
-}
-static void nile4_irq_end(unsigned int irq) {
-        ddb5074_led_hex(3);
-        if(!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
-        ddb5074_led_hex(5);
-                nile4_enable_irq(irq);
-        ddb5074_led_hex(7);
-        }
-        ddb5074_led_hex(1);
-}
-#define nile4_irq_shutdown nile4_disable_irq
-static hw_irq_controller nile4_irq_controller = {
-        .typename = "nile4",
-        .startup = nile4_irq_startup,
-        .shutdown = nile4_irq_shutdown,
-        .enable = nile4_enable_irq,
-        .disable = nile4_disable_irq,
-        .ack = nile4_ack_irq,
-        .end = nile4_irq_end,
-};
-void nile4_irq_setup(u32 base) {
-        int i;
-        irq_base=base;
-        /* Map all interrupts to CPU int #0 */
-        nile4_map_irq_all(0);
-        /* PCI INTA#-E# must be level triggered */
-        nile4_set_pci_irq_level_or_edge(0, 1);
-        nile4_set_pci_irq_level_or_edge(1, 1);
-        nile4_set_pci_irq_level_or_edge(2, 1);
-        nile4_set_pci_irq_level_or_edge(3, 1);
-        nile4_set_pci_irq_level_or_edge(4, 1);
-        /* PCI INTA#-D# must be active low, INTE# must be active high */
-        nile4_set_pci_irq_polarity(0, 0);
-        nile4_set_pci_irq_polarity(1, 0);
-        nile4_set_pci_irq_polarity(2, 0);
-        nile4_set_pci_irq_polarity(3, 0);
-        nile4_set_pci_irq_polarity(4, 1);
-        for (i = 0; i < 16; i++) {
-                nile4_clear_irq(i);
-                nile4_disable_irq(i);
-        }
-        /* Enable CPU int #0 */
-        nile4_enable_irq_output(0);
-        for (i= base; i< base + NUM_NILE4_INTERRUPTS; i++) {
-                irq_desc[i].status = IRQ_DISABLED;
-                irq_desc[i].action = NULL;
-                irq_desc[i].depth = 1;
-                irq_desc[i].handler = &nile4_irq_controller;
-        }
-}
-#if defined(CONFIG_RUNTIME_DEBUG)
-void nile4_dump_irq_status(void)
-{
-        printk(KERN_DEBUG "
-               CPUSTAT = %p:%p\n", (void *) ddb_in32(DDB_CPUSTAT + 4),
-               (void *) ddb_in32(DDB_CPUSTAT));
-        printk(KERN_DEBUG "
-               INTCTRL = %p:%p\n", (void *) ddb_in32(DDB_INTCTRL + 4),
-               (void *) ddb_in32(DDB_INTCTRL));
-        printk(KERN_DEBUG
-               "INTSTAT0 = %p:%p\n",
-               (void *) ddb_in32(DDB_INTSTAT0 + 4),
-               (void *) ddb_in32(DDB_INTSTAT0));
-        printk(KERN_DEBUG
-               "INTSTAT1 = %p:%p\n",
-               (void *) ddb_in32(DDB_INTSTAT1 + 4),
-               (void *) ddb_in32(DDB_INTSTAT1));
-        printk(KERN_DEBUG
-               "INTCLR = %p:%p\n", (void *) ddb_in32(DDB_INTCLR + 4),
-               (void *) ddb_in32(DDB_INTCLR));
-        printk(KERN_DEBUG
-               "INTPPES = %p:%p\n", (void *) ddb_in32(DDB_INTPPES + 4),
-               (void *) ddb_in32(DDB_INTPPES));
-}
-#endif
diff --git a/arch/mips/ddb5xxx/ddb5074/setup.c b/arch/mips/ddb5xxx/ddb5074/setup.c
deleted file mode 100644
index 4882ad1052e7..000000000000
--- a/arch/mips/ddb5xxx/ddb5074/setup.c
+++ /dev/null
@@ -1,234 +0,0 @@
-/*
- *  arch/mips/ddb5074/setup.c -- NEC DDB Vrc-5074 setup routines
- *
- *  Copyright (C) 2000 Geert Uytterhoeven <geert@sonycom.com>
- *                     Sony Software Development Center Europe (SDCE), Brussels
- */
-#include <linux/init.h>
-#include <linux/kbd_ll.h>
-#include <linux/kernel.h>
-#include <linux/kdev_t.h>
-#include <linux/types.h>
-#include <linux/sched.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-#include <linux/ioport.h>
-#include <linux/irq.h>
-#include <linux/pm.h>
-#include <asm/addrspace.h>
-#include <asm/bcache.h>
-#include <asm/irq.h>
-#include <asm/reboot.h>
-#include <asm/gdb-stub.h>
-#include <asm/time.h>
-#include <asm/nile4.h>
-#include <asm/ddb5xxx/ddb5074.h>
-#include <asm/ddb5xxx/ddb5xxx.h>
-static void (*back_to_prom) (void) = (void (*)(void)) 0xbfc00000;
-static void ddb_machine_restart(char *command)
-{
-        u32 t;
-        /* PCI cold reset */
-        t = nile4_in32(NILE4_PCICTRL + 4);
-        t |= 0x40000000;
-        nile4_out32(NILE4_PCICTRL + 4, t);
-        /* CPU cold reset */
-        t = nile4_in32(NILE4_CPUSTAT);
-        t |= 1;
-        nile4_out32(NILE4_CPUSTAT, t);
-        /* Call the PROM */
-        back_to_prom();
-}
-static void ddb_machine_halt(void)
-{
-        printk("DDB Vrc-5074 halted.\n");
-        do {
-        } while (1);
-}
-static void ddb_machine_power_off(void)
-{
-        printk("DDB Vrc-5074 halted. Please turn off the power.\n");
-        do {
-        } while (1);
-}
-extern void rtc_ds1386_init(unsigned long base);
-extern void (*board_timer_setup) (struct irqaction * irq);
-static void __init ddb_timer_init(struct irqaction *irq)
-{
-        /* set the clock to 1 Hz */
-        nile4_out32(NILE4_T2CTRL, 1000000);
-        /* enable the General-Purpose Timer */
-        nile4_out32(NILE4_T2CTRL + 4, 0x00000001);
-        /* reset timer */
-        nile4_out32(NILE4_T2CNTR, 0);
-        /* enable interrupt */
-        setup_irq(nile4_to_irq(NILE4_INT_GPT), irq);
-        nile4_enable_irq(nile4_to_irq(NILE4_INT_GPT));
-        change_c0_status(ST0_IM,
-                          IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4);
-}
-static void __init ddb_time_init(void)
-{
-        /* we have ds1396 RTC chip */
-        rtc_ds1386_init(KSEG1ADDR(DDB_PCI_MEM_BASE));
-}
-void __init plat_mem_setup(void)
-{
-        set_io_port_base(NILE4_PCI_IO_BASE);
-        isa_slot_offset = NILE4_PCI_MEM_BASE;
-        board_timer_setup = ddb_timer_init;
-        board_time_init = ddb_time_init;
-        _machine_restart = ddb_machine_restart;
-        _machine_halt = ddb_machine_halt;
-        pm_power_off = ddb_machine_power_off;
-        ddb_out32(DDB_BAR0, 0);
-        ddb_set_pmr(DDB_PCIINIT0, DDB_PCICMD_IO, 0, 0x10);
-        ddb_set_pmr(DDB_PCIINIT1, DDB_PCICMD_MEM, DDB_PCI_MEM_BASE , 0x10);
-        /* Reboot on panic */
-        panic_timeout = 180;
-}
-#define USE_NILE4_SERIAL        0
-#if USE_NILE4_SERIAL
-#define ns16550_in(reg)         nile4_in8((reg)*8)
-#define ns16550_out(reg, val)   nile4_out8((reg)*8, (val))
-#else
-#define NS16550_BASE            (NILE4_PCI_IO_BASE+0x03f8)
-static inline u8 ns16550_in(u32 reg)
-{
-        return *(volatile u8 *) (NS16550_BASE + reg);
-}
-static inline void ns16550_out(u32 reg, u8 val)
-{
-        *(volatile u8 *) (NS16550_BASE + reg) = val;
-}
-#endif
-#define NS16550_RBR             0
-#define NS16550_THR             0
-#define NS16550_DLL             0
-#define NS16550_IER             1
-#define NS16550_DLM             1
-#define NS16550_FCR             2
-#define NS16550_IIR             2
-#define NS16550_LCR             3
-#define NS16550_MCR             4
-#define NS16550_LSR             5
-#define NS16550_MSR             6
-#define NS16550_SCR             7
-#define NS16550_LSR_DR          0x01    /* Data ready */
-#define NS16550_LSR_OE          0x02    /* Overrun */
-#define NS16550_LSR_PE          0x04    /* Parity error */
-#define NS16550_LSR_FE          0x08    /* Framing error */
-#define NS16550_LSR_BI          0x10    /* Break */
-#define NS16550_LSR_THRE        0x20    /* Xmit holding register empty */
-#define NS16550_LSR_TEMT        0x40    /* Xmitter empty */
-#define NS16550_LSR_ERR         0x80    /* Error */
-void _serinit(void)
-{
-#if USE_NILE4_SERIAL
-        ns16550_out(NS16550_LCR, 0x80);
-        ns16550_out(NS16550_DLM, 0x00);
-        ns16550_out(NS16550_DLL, 0x36); /* 9600 baud */
-        ns16550_out(NS16550_LCR, 0x00);
-        ns16550_out(NS16550_LCR, 0x03);
-        ns16550_out(NS16550_FCR, 0x47);
-#else
-        /* done by PMON */
-#endif
-}
-void _putc(char c)
-{
-        while (!(ns16550_in(NS16550_LSR) & NS16550_LSR_THRE));
-        ns16550_out(NS16550_THR, c);
-        if (c == '\n') {
-                while (!(ns16550_in(NS16550_LSR) & NS16550_LSR_THRE));
-                ns16550_out(NS16550_THR, '\r');
-        }
-}
-void _puts(const char *s)
-{
-        char c;
-        while ((c = *s++))
-                _putc(c);
-}
-char _getc(void)
-{
-        while (!(ns16550_in(NS16550_LSR) & NS16550_LSR_DR));
-        return ns16550_in(NS16550_RBR);
-}
-int _testc(void)
-{
-        return (ns16550_in(NS16550_LSR) & NS16550_LSR_DR) != 0;
-}
-/*
- *  Hexadecimal 7-segment LED
- */
-void ddb5074_led_hex(int hex)
-{
-        outb(hex, 0x80);
-}
-/*
- *  LEDs D2 and D3, connected to the GPIO pins of the PMU in the ALi M1543
- */
-struct pci_dev *pci_pmu = NULL;
-void ddb5074_led_d2(int on)
-{
-        u8 t;
-        if (pci_pmu) {
-                pci_read_config_byte(pci_pmu, 0x7e, &t);
-                if (on)
-                        t &= 0x7f;
-                else
-                        t |= 0x80;
-                pci_write_config_byte(pci_pmu, 0x7e, t);
-        }
-}
-void ddb5074_led_d3(int on)
-{
-        u8 t;
-        if (pci_pmu) {
-                pci_read_config_byte(pci_pmu, 0x7e, &t);
-                if (on)
-                        t &= 0xbf;
-                else
-                        t |= 0x40;
-                pci_write_config_byte(pci_pmu, 0x7e, t);
-        }
-}
diff --git a/arch/mips/defconfig b/arch/mips/defconfig
index 607e2985ffe3..f7b0beb5752f 100644
--- a/arch/mips/defconfig
+++ b/arch/mips/defconfig
@@ -41,7 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
index bb6b6226a57a..d028197d8326 100644
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -22,7 +22,6 @@ obj-$(CONFIG_NEC_CMBVR4133)	+= fixup-vr4133.o
 #
 # These are still pretty much in the old state, watch, go blind.
 #
-obj-$(CONFIG_DDB5074)           += fixup-ddb5074.o pci-ddb5074.o ops-ddb5074.o
 obj-$(CONFIG_DDB5476)           += ops-ddb5476.o pci-ddb5476.o
 obj-$(CONFIG_DDB5477)           += fixup-ddb5477.o pci-ddb5477.o ops-ddb5477.o
 obj-$(CONFIG_LASAT)             += pci-lasat.o
diff --git a/arch/mips/pci/fixup-ddb5074.c b/arch/mips/pci/fixup-ddb5074.c
deleted file mode 100644
index 5a4a7c239c42..000000000000
--- a/arch/mips/pci/fixup-ddb5074.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * It's nice to have the LEDs on the GPIO pins available for debugging
- */
-static void ddb5074_fixup(struct pci_dev *dev)
-{
-        extern struct pci_dev *pci_pmu;
-        u8 t8;
-        pci_pmu = dev;  /* for LEDs D2 and D3 */
-        /* Program the lines for LEDs D2 and D3 to output */
-        pci_read_config_byte(dev, 0x7d, &t8);
-        t8 |= 0xc0;
-        pci_write_config_byte(dev, 0x7d, t8);
-        /* Turn LEDs D2 and D3 off */
-        pci_read_config_byte(dev, 0x7e, &t8);
-        t8 |= 0xc0;
-        pci_write_config_byte(dev, 0x7e, t8);
-}
-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101,
-          ddb5074_fixup);
diff --git a/arch/mips/pci/ops-ddb5074.c b/arch/mips/pci/ops-ddb5074.c
deleted file mode 100644
index 89f97bef4fc4..000000000000
--- a/arch/mips/pci/ops-ddb5074.c
+++ /dev/null
@@ -1,271 +0,0 @@
-/*
- * Copyright 2001 MontaVista Software Inc.
- * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
- *
- * arch/mips/ddb5xxx/ddb5476/pci_ops.c
- *     Define the pci_ops for DB5477.
- *
- * Much of the code is derived from the original DDB5074 port by
- * Geert Uytterhoeven <geert@sonycom.com>
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- *
- */
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <asm/addrspace.h>
-#include <asm/debug.h>
-#include <asm/ddb5xxx/ddb5xxx.h>
-/*
- * config_swap structure records what set of pdar/pmr are used
- * to access pci config space.  It also provides a place hold the
- * original values for future restoring.
- */
-struct pci_config_swap {
-        u32 pdar;
-        u32 pmr;
-        u32 config_base;
-        u32 config_size;
-        u32 pdar_backup;
-        u32 pmr_backup;
-};
-/*
- * On DDB5476, we have one set of swap registers
- */
-struct pci_config_swap ext_pci_swap = {
-        DDB_PCIW0,
-        DDB_PCIINIT0,
-        DDB_PCI_CONFIG_BASE,
-        DDB_PCI_CONFIG_SIZE
-};
-static int pci_config_workaround = 1;
-/*
- * access config space
- */
-static inline u32 ddb_access_config_base(struct pci_config_swap *swap, u32 bus, /* 0 means top level bus */
-                                         u32 slot_num)
-{
-        u32 pci_addr = 0;
-        u32 pciinit_offset = 0;
-        u32 virt_addr = swap->config_base;
-        u32 option;
-        if (pci_config_workaround) {
-                if (slot_num == 5)
-                        slot_num = 14;
-        } else {
-                if (slot_num == 5)
-                        return DDB_BASE + DDB_PCI_BASE;
-        }
-        /* minimum pdar (window) size is 2MB */
-        db_assert(swap->config_size >= (2 << 20));
-        db_assert(slot_num < (1 << 5));
-        db_assert(bus < (1 << 8));
-        /* backup registers */
-        swap->pdar_backup = ddb_in32(swap->pdar);
-        swap->pmr_backup = ddb_in32(swap->pmr);
-        /* set the pdar (pci window) register */
-        ddb_set_pdar(swap->pdar, swap->config_base, swap->config_size, 32,      /* 32 bit wide */
-                     0,         /* not on local memory bus */
-                     0);        /* not visible from PCI bus (N/A) */
-        /*
-         * calcuate the absolute pci config addr;
-         * according to the spec, we start scanning from adr:11 (0x800)
-         */
-        if (bus == 0) {
-                /* type 0 config */
-                pci_addr = 0x00040000 << slot_num;
-        } else {
-                /* type 1 config */
-                pci_addr = 0x00040000 << slot_num;
-                panic
-                    ("ddb_access_config_base: we don't support type 1 config Yet");
-        }
-        /*
-         * if pci_addr is less than pci config window size,  we set
-         * pciinit_offset to 0 and adjust the virt_address.
-         * Otherwise we will try to adjust pciinit_offset.
-         */
-        if (pci_addr < swap->config_size) {
-                virt_addr = KSEG1ADDR(swap->config_base + pci_addr);
-                pciinit_offset = 0;
-        } else {
-                db_assert((pci_addr & (swap->config_size - 1)) == 0);
-                virt_addr = KSEG1ADDR(swap->config_base);
-                pciinit_offset = pci_addr;
-        }
-        /* set the pmr register */
-        option = DDB_PCI_ACCESS_32;
-        if (bus != 0)
-                option |= DDB_PCI_CFGTYPE1;
-        ddb_set_pmr(swap->pmr, DDB_PCICMD_CFG, pciinit_offset, option);
-        return virt_addr;
-}
-static inline void ddb_close_config_base(struct pci_config_swap *swap)
-{
-        ddb_out32(swap->pdar, swap->pdar_backup);
-        ddb_out32(swap->pmr, swap->pmr_backup);
-}
-static int read_config_dword(struct pci_config_swap *swap,
-                             struct pci_dev *dev, u32 where, u32 * val)
-{
-        u32 bus, slot_num, func_num;
-        u32 base;
-        db_assert((where & 3) == 0);
-        db_assert(where < (1 << 8));
-        /* check if the bus is top-level */
-        if (dev->bus->parent != NULL) {
-                bus = dev->bus->number;
-                db_assert(bus != 0);
-        } else {
-                bus = 0;
-        }
-        slot_num = PCI_SLOT(dev->devfn);
-        func_num = PCI_FUNC(dev->devfn);
-        base = ddb_access_config_base(swap, bus, slot_num);
-        *val = *(volatile u32 *) (base + (func_num << 8) + where);
-        ddb_close_config_base(swap);
-        return PCIBIOS_SUCCESSFUL;
-}
-static int read_config_word(struct pci_config_swap *swap,
-                            struct pci_dev *dev, u32 where, u16 * val)
-{
-        int status;
-        u32 result;
-        db_assert((where & 1) == 0);
-        status = read_config_dword(swap, dev, where & ~3, &result);
-        if (where & 2)
-                result >>= 16;
-        *val = result & 0xffff;
-        return status;
-}
-static int read_config_byte(struct pci_config_swap *swap,
-                            struct pci_dev *dev, u32 where, u8 * val)
-{
-        int status;
-        u32 result;
-        status = read_config_dword(swap, dev, where & ~3, &result);
-        if (where & 1)
-                result >>= 8;
-        if (where & 2)
-                result >>= 16;
-        *val = result & 0xff;
-        return status;
-}
-static int write_config_dword(struct pci_config_swap *swap,
-                              struct pci_dev *dev, u32 where, u32 val)
-{
-        u32 bus, slot_num, func_num;
-        u32 base;
-        db_assert((where & 3) == 0);
-        db_assert(where < (1 << 8));
-        /* check if the bus is top-level */
-        if (dev->bus->parent != NULL) {
-                bus = dev->bus->number;
-                db_assert(bus != 0);
-        } else {
-                bus = 0;
-        }
-        slot_num = PCI_SLOT(dev->devfn);
-        func_num = PCI_FUNC(dev->devfn);
-        base = ddb_access_config_base(swap, bus, slot_num);
-        *(volatile u32 *) (base + (func_num << 8) + where) = val;
-        ddb_close_config_base(swap);
-        return PCIBIOS_SUCCESSFUL;
-}
-static int write_config_word(struct pci_config_swap *swap,
-                             struct pci_dev *dev, u32 where, u16 val)
-{
-        int status, shift = 0;
-        u32 result;
-        db_assert((where & 1) == 0);
-        status = read_config_dword(swap, dev, where & ~3, &result);
-        if (status != PCIBIOS_SUCCESSFUL)
-                return status;
-        if (where & 2)
-                shift += 16;
-        result &= ~(0xffff << shift);
-        result |= val << shift;
-        return write_config_dword(swap, dev, where & ~3, result);
-}
-static int write_config_byte(struct pci_config_swap *swap,
-                             struct pci_dev *dev, u32 where, u8 val)
-{
-        int status, shift = 0;
-        u32 result;
-        status = read_config_dword(swap, dev, where & ~3, &result);
-        if (status != PCIBIOS_SUCCESSFUL)
-                return status;
-        if (where & 2)
-                shift += 16;
-        if (where & 1)
-                shift += 8;
-        result &= ~(0xff << shift);
-        result |= val << shift;
-        return write_config_dword(swap, dev, where & ~3, result);
-}
-#define MAKE_PCI_OPS(prefix, rw, unitname, unittype, pciswap) \
-static int prefix##_##rw##_config_##unitname(struct pci_dev *dev, int where, unittype val) \
-{ \
-     return rw##_config_##unitname(pciswap, \
-                                   dev, \
-                                   where, \
-                                   val); \
-}
-MAKE_PCI_OPS(extpci, read, byte, u8 *, &ext_pci_swap)
-    MAKE_PCI_OPS(extpci, read, word, u16 *, &ext_pci_swap)
-    MAKE_PCI_OPS(extpci, read, dword, u32 *, &ext_pci_swap)
-    MAKE_PCI_OPS(extpci, write, byte, u8, &ext_pci_swap)
-    MAKE_PCI_OPS(extpci, write, word, u16, &ext_pci_swap)
-    MAKE_PCI_OPS(extpci, write, dword, u32, &ext_pci_swap)
-struct pci_ops ddb5476_ext_pci_ops = {
-        extpci_read_config_byte,
-        extpci_read_config_word,
-        extpci_read_config_dword,
-        extpci_write_config_byte,
-        extpci_write_config_word,
-        extpci_write_config_dword
-};
diff --git a/arch/mips/pci/pci-ddb5074.c b/arch/mips/pci/pci-ddb5074.c
deleted file mode 100644
index b74158d9b4b1..000000000000
--- a/arch/mips/pci/pci-ddb5074.c
+++ /dev/null
@@ -1,79 +0,0 @@
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <asm/debug.h>
-#include <asm/ddb5xxx/ddb5xxx.h>
-static struct resource extpci_io_resource = {
-        .start  = 0x1000,               /* leave some room for ISA bus */
-        .end    = DDB_PCI_IO_SIZE - 1,
-        .name   = "pci IO space",
-        .flags  = IORESOURCE_IO
-};
-static struct resource extpci_mem_resource = {
-        .start  = DDB_PCI_MEM_BASE + 0x00100000,        /* leave 1 MB for RTC */
-        .end    = DDB_PCI_MEM_BASE + DDB_PCI_MEM_SIZE - 1,
-        .name   = "pci memory space",
-        .flags  = IORESOURCE_MEM
-};
-extern struct pci_ops ddb5476_ext_pci_ops;
-struct pci_controller ddb5476_controller = {
-        .pci_ops        = &ddb5476_ext_pci_ops,
-        .io_resource    = &extpci_io_resource,
-        .mem_resource   = &extpci_mem_resource,
-};
-#define     PCI_EXT_INTA        8
-#define     PCI_EXT_INTB        9
-#define     PCI_EXT_INTC        10
-#define     PCI_EXT_INTD        11
-#define     PCI_EXT_INTE        12
-#define     MAX_SLOT_NUM        14
-static unsigned char irq_map[MAX_SLOT_NUM] = {
-  [ 0] = nile4_to_irq(PCI_EXT_INTE),
-  [ 1] = nile4_to_irq(PCI_EXT_INTA),
-  [ 2] = nile4_to_irq(PCI_EXT_INTA),
-  [ 3] = nile4_to_irq(PCI_EXT_INTB),
-  [ 4] = nile4_to_irq(PCI_EXT_INTC),
-  [ 5] = nile4_to_irq(NILE4_INT_UART),
-  [10] = nile4_to_irq(PCI_EXT_INTE),
-  [13] = nile4_to_irq(PCI_EXT_INTE),
-};
-int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
-{
-        return irq_map[slot];
-}
-/* Do platform specific device initialization at pci_enable_device() time */
-int pcibios_plat_dev_init(struct pci_dev *dev)
-{
-        return 0;
-}
-void __init ddb_pci_reset_bus(void)
-{
-        u32 temp;
-        /*
-         * I am not sure about the "official" procedure, the following
-         * steps work as far as I know:
-         * We first set PCI cold reset bit (bit 31) in PCICTRL-H.
-         * Then we clear the PCI warm reset bit (bit 30) to 0 in PCICTRL-H.
-         * The same is true for both PCI channels.
-         */
-        temp = ddb_in32(DDB_PCICTRL + 4);
-        temp |= 0x80000000;
-        ddb_out32(DDB_PCICTRL + 4, temp);
-        temp &= ~0xc0000000;
-        ddb_out32(DDB_PCICTRL + 4, temp);
-}
author	Ralf Baechle <ralf@linux-mips.org>	2006-06-17 23:58:57 -0400
committer	Ralf Baechle <ralf@linux-mips.org>	2006-06-19 12:39:24 -0400
commit	eaff3888742155bd397e45a1c3323c0173042e5b (patch)
tree	bf8ee6203072e01ce0d50db5898137c7552da6e5 /arch
parent	2925aba4223f4532e85f0c6f64584b3e0b2849c3 (diff)