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authorUwe Kleine-König <u.kleine-koenig@pengutronix.de>2010-10-26 03:42:54 -0400
committerUwe Kleine-König <u.kleine-koenig@pengutronix.de>2010-11-17 02:58:11 -0500
commitac401427c05a6a371950a1cdfaec75f72bffb9b5 (patch)
tree8761eb3c58392d80a549015ef4318aa702729fa7 /arch
parenta99631489bbd1b4647b82d0822b6a3942e2dd731 (diff)
ARM: imx/debug-macro: rework using the new io mapping macro
This gets rid of the last user of IMX_NEEDS_DEPRECATED_SYMBOLS. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/plat-mxc/include/mach/debug-macro.S23
-rw-r--r--arch/arm/plat-mxc/include/mach/mx25.h4
-rw-r--r--arch/arm/plat-mxc/include/mach/mx2x.h5
-rw-r--r--arch/arm/plat-mxc/include/mach/mx3x.h5
-rw-r--r--arch/arm/plat-mxc/include/mach/mx51.h5
5 files changed, 7 insertions, 35 deletions
diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/plat-mxc/include/mach/debug-macro.S
index d56213fb901b..3b3a37c25c56 100644
--- a/arch/arm/plat-mxc/include/mach/debug-macro.S
+++ b/arch/arm/plat-mxc/include/mach/debug-macro.S
@@ -10,58 +10,49 @@
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11 * 11 *
12 */ 12 */
13#define IMX_NEEDS_DEPRECATED_SYMBOLS 13#include <mach/hardware.h>
14 14
15#ifdef CONFIG_ARCH_MX1 15#ifdef CONFIG_ARCH_MX1
16#include <mach/mx1.h> 16#define UART_PADDR MX1_UART1_BASE_ADDR
17#define UART_PADDR UART1_BASE_ADDR
18#define UART_VADDR IO_ADDRESS(UART1_BASE_ADDR)
19#endif 17#endif
20 18
21#ifdef CONFIG_ARCH_MX25 19#ifdef CONFIG_ARCH_MX25
22#ifdef UART_PADDR 20#ifdef UART_PADDR
23#error "CONFIG_DEBUG_LL is incompatible with multiple archs" 21#error "CONFIG_DEBUG_LL is incompatible with multiple archs"
24#endif 22#endif
25#include <mach/mx25.h>
26#define UART_PADDR MX25_UART1_BASE_ADDR 23#define UART_PADDR MX25_UART1_BASE_ADDR
27#define UART_VADDR MX25_AIPS1_IO_ADDRESS(MX25_UART1_BASE_ADDR)
28#endif 24#endif
29 25
30#ifdef CONFIG_ARCH_MX2 26#ifdef CONFIG_ARCH_MX2
31#ifdef UART_PADDR 27#ifdef UART_PADDR
32#error "CONFIG_DEBUG_LL is incompatible with multiple archs" 28#error "CONFIG_DEBUG_LL is incompatible with multiple archs"
33#endif 29#endif
34#include <mach/mx2x.h> 30#define UART_PADDR MX2x_UART1_BASE_ADDR
35#define UART_PADDR UART1_BASE_ADDR
36#define UART_VADDR AIPI_IO_ADDRESS(UART1_BASE_ADDR)
37#endif 31#endif
38 32
39#ifdef CONFIG_ARCH_MX3 33#ifdef CONFIG_ARCH_MX3
40#ifdef UART_PADDR 34#ifdef UART_PADDR
41#error "CONFIG_DEBUG_LL is incompatible with multiple archs" 35#error "CONFIG_DEBUG_LL is incompatible with multiple archs"
42#endif 36#endif
43#include <mach/mx3x.h> 37#define UART_PADDR MX3x_UART1_BASE_ADDR
44#define UART_PADDR UART1_BASE_ADDR
45#define UART_VADDR AIPS1_IO_ADDRESS(UART1_BASE_ADDR)
46#endif 38#endif
47 39
48#ifdef CONFIG_ARCH_MX5 40#ifdef CONFIG_ARCH_MX5
49#ifdef UART_PADDR 41#ifdef UART_PADDR
50#error "CONFIG_DEBUG_LL is incompatible with multiple archs" 42#error "CONFIG_DEBUG_LL is incompatible with multiple archs"
51#endif 43#endif
52#include <mach/mx51.h>
53#define UART_PADDR MX51_UART1_BASE_ADDR 44#define UART_PADDR MX51_UART1_BASE_ADDR
54#define UART_VADDR MX51_AIPS1_IO_ADDRESS(MX51_UART1_BASE_ADDR)
55#endif 45#endif
56 46
57#ifdef CONFIG_ARCH_MXC91231 47#ifdef CONFIG_ARCH_MXC91231
58#ifdef UART_PADDR 48#ifdef UART_PADDR
59#error "CONFIG_DEBUG_LL is incompatible with multiple archs" 49#error "CONFIG_DEBUG_LL is incompatible with multiple archs"
60#endif 50#endif
61#include <mach/mxc91231.h>
62#define UART_PADDR MXC91231_UART2_BASE_ADDR 51#define UART_PADDR MXC91231_UART2_BASE_ADDR
63#define UART_VADDR MXC91231_IO_ADDRESS(MXC91231_UART2_BASE_ADDR)
64#endif 52#endif
53
54#define UART_VADDR IMX_IO_ADDRESS(UART_PADDR)
55
65 .macro addruart, rp, rv 56 .macro addruart, rp, rv
66 ldr \rp, =UART_PADDR @ physical 57 ldr \rp, =UART_PADDR @ physical
67 ldr \rv, =UART_VADDR @ virtual 58 ldr \rv, =UART_VADDR @ virtual
diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h
index aac6a9c2b306..a2404b0d9808 100644
--- a/arch/arm/plat-mxc/include/mach/mx25.h
+++ b/arch/arm/plat-mxc/include/mach/mx25.h
@@ -2,7 +2,6 @@
2#define __MACH_MX25_H__ 2#define __MACH_MX25_H__
3 3
4#define MX25_AIPS1_BASE_ADDR 0x43f00000 4#define MX25_AIPS1_BASE_ADDR 0x43f00000
5#define MX25_AIPS1_BASE_ADDR_VIRT 0xf5300000
6#define MX25_AIPS1_SIZE SZ_1M 5#define MX25_AIPS1_SIZE SZ_1M
7#define MX25_AIPS2_BASE_ADDR 0x53f00000 6#define MX25_AIPS2_BASE_ADDR 0x53f00000
8#define MX25_AIPS2_SIZE SZ_1M 7#define MX25_AIPS2_SIZE SZ_1M
@@ -25,9 +24,6 @@
25#define MX25_GPIO2_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xd0000) 24#define MX25_GPIO2_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xd0000)
26#define MX25_WDOG_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xdc000) 25#define MX25_WDOG_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xdc000)
27 26
28#define MX25_AIPS1_IO_ADDRESS(x) \
29 (((x) - MX25_AIPS1_BASE_ADDR) + MX25_AIPS1_BASE_ADDR_VIRT)
30
31#define MX25_UART1_BASE_ADDR 0x43f90000 27#define MX25_UART1_BASE_ADDR 0x43f90000
32#define MX25_UART2_BASE_ADDR 0x43f94000 28#define MX25_UART2_BASE_ADDR 0x43f94000
33#define MX25_AUDMUX_BASE_ADDR 0x43fb0000 29#define MX25_AUDMUX_BASE_ADDR 0x43fb0000
diff --git a/arch/arm/plat-mxc/include/mach/mx2x.h b/arch/arm/plat-mxc/include/mach/mx2x.h
index 46eeeb21533d..a05694816cbc 100644
--- a/arch/arm/plat-mxc/include/mach/mx2x.h
+++ b/arch/arm/plat-mxc/include/mach/mx2x.h
@@ -27,7 +27,6 @@
27 27
28/* Register offsets */ 28/* Register offsets */
29#define MX2x_AIPI_BASE_ADDR 0x10000000 29#define MX2x_AIPI_BASE_ADDR 0x10000000
30#define MX2x_AIPI_BASE_ADDR_VIRT 0xf4400000
31#define MX2x_AIPI_SIZE SZ_1M 30#define MX2x_AIPI_SIZE SZ_1M
32#define MX2x_DMA_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x01000) 31#define MX2x_DMA_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x01000)
33#define MX2x_WDOG_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x02000) 32#define MX2x_WDOG_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x02000)
@@ -68,9 +67,6 @@
68#define MX2x_SAHB1_SIZE SZ_1M 67#define MX2x_SAHB1_SIZE SZ_1M
69#define MX2x_CSI_BASE_ADDR (MX2x_SAHB1_BASE_ADDR + 0x0000) 68#define MX2x_CSI_BASE_ADDR (MX2x_SAHB1_BASE_ADDR + 0x0000)
70 69
71#define AIPI_IO_ADDRESS(x) \
72 (((x) - AIPI_BASE_ADDR) + AIPI_BASE_ADDR_VIRT)
73
74/* fixed interrupt numbers */ 70/* fixed interrupt numbers */
75#define MX2x_INT_CSPI3 6 71#define MX2x_INT_CSPI3 6
76#define MX2x_INT_GPIO 8 72#define MX2x_INT_GPIO 8
@@ -148,7 +144,6 @@
148#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS 144#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
149/* these should go away */ 145/* these should go away */
150#define AIPI_BASE_ADDR MX2x_AIPI_BASE_ADDR 146#define AIPI_BASE_ADDR MX2x_AIPI_BASE_ADDR
151#define AIPI_BASE_ADDR_VIRT MX2x_AIPI_BASE_ADDR_VIRT
152#define AIPI_SIZE MX2x_AIPI_SIZE 147#define AIPI_SIZE MX2x_AIPI_SIZE
153#define DMA_BASE_ADDR MX2x_DMA_BASE_ADDR 148#define DMA_BASE_ADDR MX2x_DMA_BASE_ADDR
154#define WDOG_BASE_ADDR MX2x_WDOG_BASE_ADDR 149#define WDOG_BASE_ADDR MX2x_WDOG_BASE_ADDR
diff --git a/arch/arm/plat-mxc/include/mach/mx3x.h b/arch/arm/plat-mxc/include/mach/mx3x.h
index da22cd481829..3d6cc455cee7 100644
--- a/arch/arm/plat-mxc/include/mach/mx3x.h
+++ b/arch/arm/plat-mxc/include/mach/mx3x.h
@@ -44,7 +44,6 @@
44 * AIPS 1 44 * AIPS 1
45 */ 45 */
46#define MX3x_AIPS1_BASE_ADDR 0x43f00000 46#define MX3x_AIPS1_BASE_ADDR 0x43f00000
47#define MX3x_AIPS1_BASE_ADDR_VIRT 0xf5300000
48#define MX3x_AIPS1_SIZE SZ_1M 47#define MX3x_AIPS1_SIZE SZ_1M
49#define MX3x_MAX_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x04000) 48#define MX3x_MAX_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x04000)
50#define MX3x_EVTMON_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x08000) 49#define MX3x_EVTMON_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x08000)
@@ -141,9 +140,6 @@
141 140
142#define MX3x_PCMCIA_MEM_BASE_ADDR 0xbc000000 141#define MX3x_PCMCIA_MEM_BASE_ADDR 0xbc000000
143 142
144#define AIPS1_IO_ADDRESS(x) \
145 (((x) - AIPS1_BASE_ADDR) + AIPS1_BASE_ADDR_VIRT)
146
147/* 143/*
148 * Interrupt numbers 144 * Interrupt numbers
149 */ 145 */
@@ -230,7 +226,6 @@ static inline int mx35_revision(void)
230#define L2CC_BASE_ADDR MX3x_L2CC_BASE_ADDR 226#define L2CC_BASE_ADDR MX3x_L2CC_BASE_ADDR
231#define L2CC_SIZE MX3x_L2CC_SIZE 227#define L2CC_SIZE MX3x_L2CC_SIZE
232#define AIPS1_BASE_ADDR MX3x_AIPS1_BASE_ADDR 228#define AIPS1_BASE_ADDR MX3x_AIPS1_BASE_ADDR
233#define AIPS1_BASE_ADDR_VIRT MX3x_AIPS1_BASE_ADDR_VIRT
234#define AIPS1_SIZE MX3x_AIPS1_SIZE 229#define AIPS1_SIZE MX3x_AIPS1_SIZE
235#define MAX_BASE_ADDR MX3x_MAX_BASE_ADDR 230#define MAX_BASE_ADDR MX3x_MAX_BASE_ADDR
236#define EVTMON_BASE_ADDR MX3x_EVTMON_BASE_ADDR 231#define EVTMON_BASE_ADDR MX3x_EVTMON_BASE_ADDR
diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h
index 1b8715f28477..636347c3fa88 100644
--- a/arch/arm/plat-mxc/include/mach/mx51.h
+++ b/arch/arm/plat-mxc/include/mach/mx51.h
@@ -53,7 +53,6 @@
53 * AIPS 1 53 * AIPS 1
54 */ 54 */
55#define MX51_AIPS1_BASE_ADDR 0x73f00000 55#define MX51_AIPS1_BASE_ADDR 0x73f00000
56#define MX51_AIPS1_BASE_ADDR_VIRT 0xf5700000
57#define MX51_AIPS1_SIZE SZ_1M 56#define MX51_AIPS1_SIZE SZ_1M
58 57
59#define MX51_OTG_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x80000) 58#define MX51_OTG_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x80000)
@@ -137,10 +136,6 @@
137#define MX51_IO_P2V(x) IMX_IO_P2V(x) 136#define MX51_IO_P2V(x) IMX_IO_P2V(x)
138#define MX51_IO_ADDRESS(x) IOMEM(MX51_IO_P2V(x)) 137#define MX51_IO_ADDRESS(x) IOMEM(MX51_IO_P2V(x))
139 138
140/* This is currently used in <mach/debug-macro.S>, but should go away */
141#define MX51_AIPS1_IO_ADDRESS(x) \
142 (((x) - MX51_AIPS1_BASE_ADDR) + MX51_AIPS1_BASE_ADDR_VIRT)
143
144/* 139/*
145 * defines for SPBA modules 140 * defines for SPBA modules
146 */ 141 */