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authorTseng-Hui (Frank) Lin <thlin@linux.vnet.ibm.com>2011-03-02 02:20:50 -0500
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2011-03-04 02:19:05 -0500
commit6edc642ebee87dfceb97050d51c5ab1fe539a597 (patch)
treee6aa0ebef64be507d4bb563fdbb1b80d6a1e7af1 /arch
parenta5cf4b08b6a4568570c4a2a712497ec49009661c (diff)
powerpc: Cleanup definition of the PID register
Move SPRN_PID declearations in various locations into one place. Signed-off-by: Tseng-Hui (Frank) Lin <thlin@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/include/asm/reg.h10
-rw-r--r--arch/powerpc/include/asm/reg_booke.h3
2 files changed, 10 insertions, 3 deletions
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 125fc1ad665d..bd0d36e1c945 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -170,6 +170,16 @@
170#define SPEFSCR_FRMC 0x00000003 /* Embedded FP rounding mode control */ 170#define SPEFSCR_FRMC 0x00000003 /* Embedded FP rounding mode control */
171 171
172/* Special Purpose Registers (SPRNs)*/ 172/* Special Purpose Registers (SPRNs)*/
173
174#ifdef CONFIG_40x
175#define SPRN_PID 0x3B1 /* Process ID */
176#else
177#define SPRN_PID 0x030 /* Process ID */
178#ifdef CONFIG_BOOKE
179#define SPRN_PID0 SPRN_PID/* Process ID Register 0 */
180#endif
181#endif
182
173#define SPRN_CTR 0x009 /* Count Register */ 183#define SPRN_CTR 0x009 /* Count Register */
174#define SPRN_DSCR 0x11 184#define SPRN_DSCR 0x11
175#define SPRN_CTRLF 0x088 185#define SPRN_CTRLF 0x088
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index e68c69bf741a..86ad8128963a 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -150,8 +150,6 @@
150 * or IBM 40x. 150 * or IBM 40x.
151 */ 151 */
152#ifdef CONFIG_BOOKE 152#ifdef CONFIG_BOOKE
153#define SPRN_PID 0x030 /* Process ID */
154#define SPRN_PID0 SPRN_PID/* Process ID Register 0 */
155#define SPRN_CSRR0 0x03A /* Critical Save and Restore Register 0 */ 153#define SPRN_CSRR0 0x03A /* Critical Save and Restore Register 0 */
156#define SPRN_CSRR1 0x03B /* Critical Save and Restore Register 1 */ 154#define SPRN_CSRR1 0x03B /* Critical Save and Restore Register 1 */
157#define SPRN_DEAR 0x03D /* Data Error Address Register */ 155#define SPRN_DEAR 0x03D /* Data Error Address Register */
@@ -168,7 +166,6 @@
168#define SPRN_TCR 0x154 /* Timer Control Register */ 166#define SPRN_TCR 0x154 /* Timer Control Register */
169#endif /* Book E */ 167#endif /* Book E */
170#ifdef CONFIG_40x 168#ifdef CONFIG_40x
171#define SPRN_PID 0x3B1 /* Process ID */
172#define SPRN_DBCR1 0x3BD /* Debug Control Register 1 */ 169#define SPRN_DBCR1 0x3BD /* Debug Control Register 1 */
173#define SPRN_ESR 0x3D4 /* Exception Syndrome Register */ 170#define SPRN_ESR 0x3D4 /* Exception Syndrome Register */
174#define SPRN_DEAR 0x3D5 /* Data Error Address Register */ 171#define SPRN_DEAR 0x3D5 /* Data Error Address Register */