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authorPaul Mundt <lethal@linux-sh.org>2010-11-03 23:32:24 -0400
committerPaul Mundt <lethal@linux-sh.org>2010-11-03 23:32:24 -0400
commite2fcf74f3d3dabe8591732cd37869a0cc88ed7a5 (patch)
treeccc1efdfffdf6b9ca427f46bb135faaa44e00dd4 /arch
parente96ce8ebfd7427c7ce335028f6619fb549f366b2 (diff)
sh: nommu: use 32-bit phys mode.
The nommu code has regressed somewhat in that 29BIT gets set for the SH-2/2A configs regardless of the fact that they are really 32BIT sans MMU or PMB. This does a bit of tidying to get nommu properly selecting 32BIT as it was before. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/sh/Kconfig1
-rw-r--r--arch/sh/include/asm/addrspace.h8
-rw-r--r--arch/sh/mm/Kconfig2
-rw-r--r--arch/sh/mm/consistent.c15
-rw-r--r--arch/sh/mm/uncached.c2
5 files changed, 14 insertions, 14 deletions
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 5c075f562eba..7f217b3a50a8 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -193,6 +193,7 @@ config CPU_SH2
193config CPU_SH2A 193config CPU_SH2A
194 bool 194 bool
195 select CPU_SH2 195 select CPU_SH2
196 select UNCACHED_MAPPING
196 197
197config CPU_SH3 198config CPU_SH3
198 bool 199 bool
diff --git a/arch/sh/include/asm/addrspace.h b/arch/sh/include/asm/addrspace.h
index 446b3831c214..3d1ae2bfaa6f 100644
--- a/arch/sh/include/asm/addrspace.h
+++ b/arch/sh/include/asm/addrspace.h
@@ -44,10 +44,10 @@
44/* 44/*
45 * These will never work in 32-bit, don't even bother. 45 * These will never work in 32-bit, don't even bother.
46 */ 46 */
47#define P1SEGADDR(a) __futile_remapping_attempt 47#define P1SEGADDR(a) ({ (void)(a); BUG(); NULL; })
48#define P2SEGADDR(a) __futile_remapping_attempt 48#define P2SEGADDR(a) ({ (void)(a); BUG(); NULL; })
49#define P3SEGADDR(a) __futile_remapping_attempt 49#define P3SEGADDR(a) ({ (void)(a); BUG(); NULL; })
50#define P4SEGADDR(a) __futile_remapping_attempt 50#define P4SEGADDR(a) ({ (void)(a); BUG(); NULL; })
51#endif 51#endif
52#endif /* P1SEG */ 52#endif /* P1SEG */
53 53
diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig
index 09370392aff1..c3e61b366493 100644
--- a/arch/sh/mm/Kconfig
+++ b/arch/sh/mm/Kconfig
@@ -79,7 +79,7 @@ config 29BIT
79 79
80config 32BIT 80config 32BIT
81 bool 81 bool
82 default y if CPU_SH5 82 default y if CPU_SH5 || !MMU
83 83
84config PMB 84config PMB
85 bool "Support 32-bit physical addressing through PMB" 85 bool "Support 32-bit physical addressing through PMB"
diff --git a/arch/sh/mm/consistent.c b/arch/sh/mm/consistent.c
index 038793286990..40733a952402 100644
--- a/arch/sh/mm/consistent.c
+++ b/arch/sh/mm/consistent.c
@@ -79,21 +79,20 @@ void dma_generic_free_coherent(struct device *dev, size_t size,
79void dma_cache_sync(struct device *dev, void *vaddr, size_t size, 79void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
80 enum dma_data_direction direction) 80 enum dma_data_direction direction)
81{ 81{
82#if defined(CONFIG_CPU_SH5) || defined(CONFIG_PMB) 82 void *addr;
83 void *p1addr = vaddr; 83
84#else 84 addr = __in_29bit_mode() ?
85 void *p1addr = (void*) P1SEGADDR((unsigned long)vaddr); 85 (void *)P1SEGADDR((unsigned long)vaddr) : vaddr;
86#endif
87 86
88 switch (direction) { 87 switch (direction) {
89 case DMA_FROM_DEVICE: /* invalidate only */ 88 case DMA_FROM_DEVICE: /* invalidate only */
90 __flush_invalidate_region(p1addr, size); 89 __flush_invalidate_region(addr, size);
91 break; 90 break;
92 case DMA_TO_DEVICE: /* writeback only */ 91 case DMA_TO_DEVICE: /* writeback only */
93 __flush_wback_region(p1addr, size); 92 __flush_wback_region(addr, size);
94 break; 93 break;
95 case DMA_BIDIRECTIONAL: /* writeback and invalidate */ 94 case DMA_BIDIRECTIONAL: /* writeback and invalidate */
96 __flush_purge_region(p1addr, size); 95 __flush_purge_region(addr, size);
97 break; 96 break;
98 default: 97 default:
99 BUG(); 98 BUG();
diff --git a/arch/sh/mm/uncached.c b/arch/sh/mm/uncached.c
index 8a4eca551fc0..a7767da815e9 100644
--- a/arch/sh/mm/uncached.c
+++ b/arch/sh/mm/uncached.c
@@ -28,7 +28,7 @@ EXPORT_SYMBOL(virt_addr_uncached);
28 28
29void __init uncached_init(void) 29void __init uncached_init(void)
30{ 30{
31#ifdef CONFIG_29BIT 31#if defined(CONFIG_29BIT) || !defined(CONFIG_MMU)
32 uncached_start = P2SEG; 32 uncached_start = P2SEG;
33#else 33#else
34 uncached_start = memory_end; 34 uncached_start = memory_end;