diff options
author | Downing, Thomas <Thomas.Downing@ipc.com> | 2005-07-27 14:44:09 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2005-07-27 19:25:55 -0400 |
commit | c41b72d5bd590e6ff781d6bdfc71595f3996bacf (patch) | |
tree | 1c558e5c955a1efa7a5989762609b8651c5ad621 /arch | |
parent | 3a1ce8aa2d9611a779c308fbf332ae86217b0df6 (diff) |
[PATCH] ppc32: fix compilation error with CONFIG_PQ2FADS
The 2.6.12.3 kernel compilation fails for ARCH=ppc when CONFIG_PQ2FADS=y.
This patch has been tested on Freescale PQ2FADS-ZU and -VR boards.
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/ppc/syslib/m82xx_pci.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/ppc/syslib/m82xx_pci.c b/arch/ppc/syslib/m82xx_pci.c index 5e7a7edcea74..9db58c587b46 100644 --- a/arch/ppc/syslib/m82xx_pci.c +++ b/arch/ppc/syslib/m82xx_pci.c | |||
@@ -238,9 +238,9 @@ pq2ads_setup_pci(struct pci_controller *hose) | |||
238 | * Setting required to enable IRQ1-IRQ7 (SIUMCR [DPPC]), | 238 | * Setting required to enable IRQ1-IRQ7 (SIUMCR [DPPC]), |
239 | * and local bus for PCI (SIUMCR [LBPC]). | 239 | * and local bus for PCI (SIUMCR [LBPC]). |
240 | */ | 240 | */ |
241 | immap->im_siu_conf.siu_82xx.sc_siumcr = (immap->im_siu_conf.sc_siumcr & | 241 | immap->im_siu_conf.siu_82xx.sc_siumcr = (immap->im_siu_conf.siu_82xx.sc_siumcr & |
242 | ~(SIUMCR_L2PC11 | SIUMCR_LBPC11 | SIUMCR_CS10PC11 | SIUMCR_APPC11) | | 242 | ~(SIUMCR_L2CPC11 | SIUMCR_LBPC11 | SIUMCR_CS10PC11 | SIUMCR_APPC11) | |
243 | SIUMCR_BBD | SIUMCR_LBPC01 | SIUMCR_DPPC11 | SIUMCR_APPC10; | 243 | SIUMCR_BBD | SIUMCR_LBPC01 | SIUMCR_DPPC11 | SIUMCR_APPC10); |
244 | #endif | 244 | #endif |
245 | /* Enable PCI */ | 245 | /* Enable PCI */ |
246 | immap->im_pci.pci_gcr = cpu_to_le32(PCIGCR_PCI_BUS_EN); | 246 | immap->im_pci.pci_gcr = cpu_to_le32(PCIGCR_PCI_BUS_EN); |