diff options
author | Jacob Pan <jacob.jun.pan@intel.com> | 2009-11-09 14:27:04 -0500 |
---|---|---|
committer | H. Peter Anvin <hpa@zytor.com> | 2010-02-19 19:25:17 -0500 |
commit | b81bb373a7e832a43921356aa1291044d7f52fb1 (patch) | |
tree | 8008f5c30cae5bf5d8480b590cee63db01034333 /arch | |
parent | ef3548668c02cc8c3922f4423f32b53e662811c6 (diff) |
x86, pic: Make use of legacy_pic abstraction
This patch replaces legacy PIC-related global variable and functions
with the new legacy_pic abstraction.
Signed-off-by: Jacob Pan <jacob.jun.pan@intel.com>
LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80D04@orsmsx508.amr.corp.intel.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/x86/include/asm/hw_irq.h | 7 | ||||
-rw-r--r-- | arch/x86/include/asm/i8259.h | 8 | ||||
-rw-r--r-- | arch/x86/kernel/apic/apic.c | 8 | ||||
-rw-r--r-- | arch/x86/kernel/apic/io_apic.c | 57 | ||||
-rw-r--r-- | arch/x86/kernel/apic/nmi.c | 2 | ||||
-rw-r--r-- | arch/x86/kernel/i8259.c | 21 | ||||
-rw-r--r-- | arch/x86/kernel/irqinit.c | 2 | ||||
-rw-r--r-- | arch/x86/kernel/smpboot.c | 5 | ||||
-rw-r--r-- | arch/x86/kernel/visws_quirks.c | 14 |
9 files changed, 59 insertions, 65 deletions
diff --git a/arch/x86/include/asm/hw_irq.h b/arch/x86/include/asm/hw_irq.h index eeac829a0f44..a929c9ede33d 100644 --- a/arch/x86/include/asm/hw_irq.h +++ b/arch/x86/include/asm/hw_irq.h | |||
@@ -53,13 +53,6 @@ extern void threshold_interrupt(void); | |||
53 | extern void call_function_interrupt(void); | 53 | extern void call_function_interrupt(void); |
54 | extern void call_function_single_interrupt(void); | 54 | extern void call_function_single_interrupt(void); |
55 | 55 | ||
56 | /* PIC specific functions */ | ||
57 | extern void disable_8259A_irq(unsigned int irq); | ||
58 | extern void enable_8259A_irq(unsigned int irq); | ||
59 | extern int i8259A_irq_pending(unsigned int irq); | ||
60 | extern void make_8259A_irq(unsigned int irq); | ||
61 | extern void init_8259A(int aeoi); | ||
62 | |||
63 | /* IOAPIC */ | 56 | /* IOAPIC */ |
64 | #define IO_APIC_IRQ(x) (((x) >= NR_IRQS_LEGACY) || ((1<<(x)) & io_apic_irqs)) | 57 | #define IO_APIC_IRQ(x) (((x) >= NR_IRQS_LEGACY) || ((1<<(x)) & io_apic_irqs)) |
65 | extern unsigned long io_apic_irqs; | 58 | extern unsigned long io_apic_irqs; |
diff --git a/arch/x86/include/asm/i8259.h b/arch/x86/include/asm/i8259.h index e8a3e05c2882..2832babd91fc 100644 --- a/arch/x86/include/asm/i8259.h +++ b/arch/x86/include/asm/i8259.h | |||
@@ -26,11 +26,6 @@ extern unsigned int cached_irq_mask; | |||
26 | 26 | ||
27 | extern spinlock_t i8259A_lock; | 27 | extern spinlock_t i8259A_lock; |
28 | 28 | ||
29 | extern void init_8259A(int auto_eoi); | ||
30 | extern void enable_8259A_irq(unsigned int irq); | ||
31 | extern void disable_8259A_irq(unsigned int irq); | ||
32 | extern unsigned int startup_8259A_irq(unsigned int irq); | ||
33 | |||
34 | /* the PIC may need a careful delay on some platforms, hence specific calls */ | 29 | /* the PIC may need a careful delay on some platforms, hence specific calls */ |
35 | static inline unsigned char inb_pic(unsigned int port) | 30 | static inline unsigned char inb_pic(unsigned int port) |
36 | { | 31 | { |
@@ -70,7 +65,4 @@ struct legacy_pic { | |||
70 | extern struct legacy_pic *legacy_pic; | 65 | extern struct legacy_pic *legacy_pic; |
71 | extern struct legacy_pic null_legacy_pic; | 66 | extern struct legacy_pic null_legacy_pic; |
72 | 67 | ||
73 | extern void mask_8259A(void); | ||
74 | extern void unmask_8259A(void); | ||
75 | |||
76 | #endif /* _ASM_X86_I8259_H */ | 68 | #endif /* _ASM_X86_I8259_H */ |
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c index dfca210f6a10..94f22b12858d 100644 --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c | |||
@@ -1390,7 +1390,7 @@ void __init enable_IR_x2apic(void) | |||
1390 | } | 1390 | } |
1391 | 1391 | ||
1392 | local_irq_save(flags); | 1392 | local_irq_save(flags); |
1393 | mask_8259A(); | 1393 | legacy_pic->mask_all(); |
1394 | mask_IO_APIC_setup(ioapic_entries); | 1394 | mask_IO_APIC_setup(ioapic_entries); |
1395 | 1395 | ||
1396 | if (dmar_table_init_ret) | 1396 | if (dmar_table_init_ret) |
@@ -1422,7 +1422,7 @@ void __init enable_IR_x2apic(void) | |||
1422 | nox2apic: | 1422 | nox2apic: |
1423 | if (!ret) /* IR enabling failed */ | 1423 | if (!ret) /* IR enabling failed */ |
1424 | restore_IO_APIC_setup(ioapic_entries); | 1424 | restore_IO_APIC_setup(ioapic_entries); |
1425 | unmask_8259A(); | 1425 | legacy_pic->restore_mask(); |
1426 | local_irq_restore(flags); | 1426 | local_irq_restore(flags); |
1427 | 1427 | ||
1428 | out: | 1428 | out: |
@@ -2018,7 +2018,7 @@ static int lapic_resume(struct sys_device *dev) | |||
2018 | } | 2018 | } |
2019 | 2019 | ||
2020 | mask_IO_APIC_setup(ioapic_entries); | 2020 | mask_IO_APIC_setup(ioapic_entries); |
2021 | mask_8259A(); | 2021 | legacy_pic->mask_all(); |
2022 | } | 2022 | } |
2023 | 2023 | ||
2024 | if (x2apic_mode) | 2024 | if (x2apic_mode) |
@@ -2062,7 +2062,7 @@ static int lapic_resume(struct sys_device *dev) | |||
2062 | 2062 | ||
2063 | if (intr_remapping_enabled) { | 2063 | if (intr_remapping_enabled) { |
2064 | reenable_intr_remapping(x2apic_mode); | 2064 | reenable_intr_remapping(x2apic_mode); |
2065 | unmask_8259A(); | 2065 | legacy_pic->restore_mask(); |
2066 | restore_IO_APIC_setup(ioapic_entries); | 2066 | restore_IO_APIC_setup(ioapic_entries); |
2067 | free_ioapic_entries(ioapic_entries); | 2067 | free_ioapic_entries(ioapic_entries); |
2068 | } | 2068 | } |
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c index 75265ab83b17..1704cd82db5f 100644 --- a/arch/x86/kernel/apic/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c | |||
@@ -94,8 +94,6 @@ struct mpc_intsrc mp_irqs[MAX_IRQ_SOURCES]; | |||
94 | /* # of MP IRQ source entries */ | 94 | /* # of MP IRQ source entries */ |
95 | int mp_irq_entries; | 95 | int mp_irq_entries; |
96 | 96 | ||
97 | /* Number of legacy interrupts */ | ||
98 | static int nr_legacy_irqs __read_mostly = NR_IRQS_LEGACY; | ||
99 | /* GSI interrupts */ | 97 | /* GSI interrupts */ |
100 | static int nr_irqs_gsi = NR_IRQS_LEGACY; | 98 | static int nr_irqs_gsi = NR_IRQS_LEGACY; |
101 | 99 | ||
@@ -147,7 +145,6 @@ static struct irq_cfg irq_cfgx[NR_IRQS]; | |||
147 | 145 | ||
148 | void __init io_apic_disable_legacy(void) | 146 | void __init io_apic_disable_legacy(void) |
149 | { | 147 | { |
150 | nr_legacy_irqs = 0; | ||
151 | nr_irqs_gsi = 0; | 148 | nr_irqs_gsi = 0; |
152 | } | 149 | } |
153 | 150 | ||
@@ -164,13 +161,13 @@ int __init arch_early_irq_init(void) | |||
164 | node= cpu_to_node(boot_cpu_id); | 161 | node= cpu_to_node(boot_cpu_id); |
165 | 162 | ||
166 | for (i = 0; i < count; i++) { | 163 | for (i = 0; i < count; i++) { |
167 | if (i < nr_legacy_irqs) | 164 | if (i < legacy_pic->nr_legacy_irqs) |
168 | cfg[i].vector = IRQ0_VECTOR + i; | 165 | cfg[i].vector = IRQ0_VECTOR + i; |
169 | desc = irq_to_desc(i); | 166 | desc = irq_to_desc(i); |
170 | desc->chip_data = &cfg[i]; | 167 | desc->chip_data = &cfg[i]; |
171 | zalloc_cpumask_var_node(&cfg[i].domain, GFP_NOWAIT, node); | 168 | zalloc_cpumask_var_node(&cfg[i].domain, GFP_NOWAIT, node); |
172 | zalloc_cpumask_var_node(&cfg[i].old_domain, GFP_NOWAIT, node); | 169 | zalloc_cpumask_var_node(&cfg[i].old_domain, GFP_NOWAIT, node); |
173 | if (i < nr_legacy_irqs) | 170 | if (i < legacy_pic->nr_legacy_irqs) |
174 | cpumask_setall(cfg[i].domain); | 171 | cpumask_setall(cfg[i].domain); |
175 | } | 172 | } |
176 | 173 | ||
@@ -850,7 +847,7 @@ static int __init find_isa_irq_apic(int irq, int type) | |||
850 | */ | 847 | */ |
851 | static int EISA_ELCR(unsigned int irq) | 848 | static int EISA_ELCR(unsigned int irq) |
852 | { | 849 | { |
853 | if (irq < nr_legacy_irqs) { | 850 | if (irq < legacy_pic->nr_legacy_irqs) { |
854 | unsigned int port = 0x4d0 + (irq >> 3); | 851 | unsigned int port = 0x4d0 + (irq >> 3); |
855 | return (inb(port) >> (irq & 7)) & 1; | 852 | return (inb(port) >> (irq & 7)) & 1; |
856 | } | 853 | } |
@@ -1446,8 +1443,8 @@ static void setup_IO_APIC_irq(int apic_id, int pin, unsigned int irq, struct irq | |||
1446 | } | 1443 | } |
1447 | 1444 | ||
1448 | ioapic_register_intr(irq, desc, trigger); | 1445 | ioapic_register_intr(irq, desc, trigger); |
1449 | if (irq < nr_legacy_irqs) | 1446 | if (irq < legacy_pic->nr_legacy_irqs) |
1450 | disable_8259A_irq(irq); | 1447 | legacy_pic->chip->mask(irq); |
1451 | 1448 | ||
1452 | ioapic_write_entry(apic_id, pin, entry); | 1449 | ioapic_write_entry(apic_id, pin, entry); |
1453 | } | 1450 | } |
@@ -1810,7 +1807,7 @@ __apicdebuginit(void) print_PIC(void) | |||
1810 | unsigned int v; | 1807 | unsigned int v; |
1811 | unsigned long flags; | 1808 | unsigned long flags; |
1812 | 1809 | ||
1813 | if (!nr_legacy_irqs) | 1810 | if (!legacy_pic->nr_legacy_irqs) |
1814 | return; | 1811 | return; |
1815 | 1812 | ||
1816 | printk(KERN_DEBUG "\nprinting PIC contents\n"); | 1813 | printk(KERN_DEBUG "\nprinting PIC contents\n"); |
@@ -1894,7 +1891,7 @@ void __init enable_IO_APIC(void) | |||
1894 | nr_ioapic_registers[apic] = reg_01.bits.entries+1; | 1891 | nr_ioapic_registers[apic] = reg_01.bits.entries+1; |
1895 | } | 1892 | } |
1896 | 1893 | ||
1897 | if (!nr_legacy_irqs) | 1894 | if (!legacy_pic->nr_legacy_irqs) |
1898 | return; | 1895 | return; |
1899 | 1896 | ||
1900 | for(apic = 0; apic < nr_ioapics; apic++) { | 1897 | for(apic = 0; apic < nr_ioapics; apic++) { |
@@ -1951,7 +1948,7 @@ void disable_IO_APIC(void) | |||
1951 | */ | 1948 | */ |
1952 | clear_IO_APIC(); | 1949 | clear_IO_APIC(); |
1953 | 1950 | ||
1954 | if (!nr_legacy_irqs) | 1951 | if (!legacy_pic->nr_legacy_irqs) |
1955 | return; | 1952 | return; |
1956 | 1953 | ||
1957 | /* | 1954 | /* |
@@ -2184,9 +2181,9 @@ static unsigned int startup_ioapic_irq(unsigned int irq) | |||
2184 | struct irq_cfg *cfg; | 2181 | struct irq_cfg *cfg; |
2185 | 2182 | ||
2186 | spin_lock_irqsave(&ioapic_lock, flags); | 2183 | spin_lock_irqsave(&ioapic_lock, flags); |
2187 | if (irq < nr_legacy_irqs) { | 2184 | if (irq < legacy_pic->nr_legacy_irqs) { |
2188 | disable_8259A_irq(irq); | 2185 | legacy_pic->chip->mask(irq); |
2189 | if (i8259A_irq_pending(irq)) | 2186 | if (legacy_pic->irq_pending(irq)) |
2190 | was_pending = 1; | 2187 | was_pending = 1; |
2191 | } | 2188 | } |
2192 | cfg = irq_cfg(irq); | 2189 | cfg = irq_cfg(irq); |
@@ -2719,8 +2716,8 @@ static inline void init_IO_APIC_traps(void) | |||
2719 | * so default to an old-fashioned 8259 | 2716 | * so default to an old-fashioned 8259 |
2720 | * interrupt if we can.. | 2717 | * interrupt if we can.. |
2721 | */ | 2718 | */ |
2722 | if (irq < nr_legacy_irqs) | 2719 | if (irq < legacy_pic->nr_legacy_irqs) |
2723 | make_8259A_irq(irq); | 2720 | legacy_pic->make_irq(irq); |
2724 | else | 2721 | else |
2725 | /* Strange. Oh, well.. */ | 2722 | /* Strange. Oh, well.. */ |
2726 | desc->chip = &no_irq_chip; | 2723 | desc->chip = &no_irq_chip; |
@@ -2877,7 +2874,7 @@ static inline void __init check_timer(void) | |||
2877 | /* | 2874 | /* |
2878 | * get/set the timer IRQ vector: | 2875 | * get/set the timer IRQ vector: |
2879 | */ | 2876 | */ |
2880 | disable_8259A_irq(0); | 2877 | legacy_pic->chip->mask(0); |
2881 | assign_irq_vector(0, cfg, apic->target_cpus()); | 2878 | assign_irq_vector(0, cfg, apic->target_cpus()); |
2882 | 2879 | ||
2883 | /* | 2880 | /* |
@@ -2890,7 +2887,7 @@ static inline void __init check_timer(void) | |||
2890 | * automatically. | 2887 | * automatically. |
2891 | */ | 2888 | */ |
2892 | apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT); | 2889 | apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT); |
2893 | init_8259A(1); | 2890 | legacy_pic->init(1); |
2894 | #ifdef CONFIG_X86_32 | 2891 | #ifdef CONFIG_X86_32 |
2895 | { | 2892 | { |
2896 | unsigned int ver; | 2893 | unsigned int ver; |
@@ -2949,7 +2946,7 @@ static inline void __init check_timer(void) | |||
2949 | if (timer_irq_works()) { | 2946 | if (timer_irq_works()) { |
2950 | if (nmi_watchdog == NMI_IO_APIC) { | 2947 | if (nmi_watchdog == NMI_IO_APIC) { |
2951 | setup_nmi(); | 2948 | setup_nmi(); |
2952 | enable_8259A_irq(0); | 2949 | legacy_pic->chip->unmask(0); |
2953 | } | 2950 | } |
2954 | if (disable_timer_pin_1 > 0) | 2951 | if (disable_timer_pin_1 > 0) |
2955 | clear_IO_APIC_pin(0, pin1); | 2952 | clear_IO_APIC_pin(0, pin1); |
@@ -2972,14 +2969,14 @@ static inline void __init check_timer(void) | |||
2972 | */ | 2969 | */ |
2973 | replace_pin_at_irq_node(cfg, node, apic1, pin1, apic2, pin2); | 2970 | replace_pin_at_irq_node(cfg, node, apic1, pin1, apic2, pin2); |
2974 | setup_timer_IRQ0_pin(apic2, pin2, cfg->vector); | 2971 | setup_timer_IRQ0_pin(apic2, pin2, cfg->vector); |
2975 | enable_8259A_irq(0); | 2972 | legacy_pic->chip->unmask(0); |
2976 | if (timer_irq_works()) { | 2973 | if (timer_irq_works()) { |
2977 | apic_printk(APIC_QUIET, KERN_INFO "....... works.\n"); | 2974 | apic_printk(APIC_QUIET, KERN_INFO "....... works.\n"); |
2978 | timer_through_8259 = 1; | 2975 | timer_through_8259 = 1; |
2979 | if (nmi_watchdog == NMI_IO_APIC) { | 2976 | if (nmi_watchdog == NMI_IO_APIC) { |
2980 | disable_8259A_irq(0); | 2977 | legacy_pic->chip->mask(0); |
2981 | setup_nmi(); | 2978 | setup_nmi(); |
2982 | enable_8259A_irq(0); | 2979 | legacy_pic->chip->unmask(0); |
2983 | } | 2980 | } |
2984 | goto out; | 2981 | goto out; |
2985 | } | 2982 | } |
@@ -2987,7 +2984,7 @@ static inline void __init check_timer(void) | |||
2987 | * Cleanup, just in case ... | 2984 | * Cleanup, just in case ... |
2988 | */ | 2985 | */ |
2989 | local_irq_disable(); | 2986 | local_irq_disable(); |
2990 | disable_8259A_irq(0); | 2987 | legacy_pic->chip->mask(0); |
2991 | clear_IO_APIC_pin(apic2, pin2); | 2988 | clear_IO_APIC_pin(apic2, pin2); |
2992 | apic_printk(APIC_QUIET, KERN_INFO "....... failed.\n"); | 2989 | apic_printk(APIC_QUIET, KERN_INFO "....... failed.\n"); |
2993 | } | 2990 | } |
@@ -3006,22 +3003,22 @@ static inline void __init check_timer(void) | |||
3006 | 3003 | ||
3007 | lapic_register_intr(0, desc); | 3004 | lapic_register_intr(0, desc); |
3008 | apic_write(APIC_LVT0, APIC_DM_FIXED | cfg->vector); /* Fixed mode */ | 3005 | apic_write(APIC_LVT0, APIC_DM_FIXED | cfg->vector); /* Fixed mode */ |
3009 | enable_8259A_irq(0); | 3006 | legacy_pic->chip->unmask(0); |
3010 | 3007 | ||
3011 | if (timer_irq_works()) { | 3008 | if (timer_irq_works()) { |
3012 | apic_printk(APIC_QUIET, KERN_INFO "..... works.\n"); | 3009 | apic_printk(APIC_QUIET, KERN_INFO "..... works.\n"); |
3013 | goto out; | 3010 | goto out; |
3014 | } | 3011 | } |
3015 | local_irq_disable(); | 3012 | local_irq_disable(); |
3016 | disable_8259A_irq(0); | 3013 | legacy_pic->chip->mask(0); |
3017 | apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_FIXED | cfg->vector); | 3014 | apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_FIXED | cfg->vector); |
3018 | apic_printk(APIC_QUIET, KERN_INFO "..... failed.\n"); | 3015 | apic_printk(APIC_QUIET, KERN_INFO "..... failed.\n"); |
3019 | 3016 | ||
3020 | apic_printk(APIC_QUIET, KERN_INFO | 3017 | apic_printk(APIC_QUIET, KERN_INFO |
3021 | "...trying to set up timer as ExtINT IRQ...\n"); | 3018 | "...trying to set up timer as ExtINT IRQ...\n"); |
3022 | 3019 | ||
3023 | init_8259A(0); | 3020 | legacy_pic->init(0); |
3024 | make_8259A_irq(0); | 3021 | legacy_pic->make_irq(0); |
3025 | apic_write(APIC_LVT0, APIC_DM_EXTINT); | 3022 | apic_write(APIC_LVT0, APIC_DM_EXTINT); |
3026 | 3023 | ||
3027 | unlock_ExtINT_logic(); | 3024 | unlock_ExtINT_logic(); |
@@ -3063,7 +3060,7 @@ void __init setup_IO_APIC(void) | |||
3063 | /* | 3060 | /* |
3064 | * calling enable_IO_APIC() is moved to setup_local_APIC for BP | 3061 | * calling enable_IO_APIC() is moved to setup_local_APIC for BP |
3065 | */ | 3062 | */ |
3066 | io_apic_irqs = nr_legacy_irqs ? ~PIC_IRQS : ~0UL; | 3063 | io_apic_irqs = legacy_pic->nr_legacy_irqs ? ~PIC_IRQS : ~0UL; |
3067 | 3064 | ||
3068 | apic_printk(APIC_VERBOSE, "ENABLING IO-APIC IRQs\n"); | 3065 | apic_printk(APIC_VERBOSE, "ENABLING IO-APIC IRQs\n"); |
3069 | /* | 3066 | /* |
@@ -3074,7 +3071,7 @@ void __init setup_IO_APIC(void) | |||
3074 | sync_Arb_IDs(); | 3071 | sync_Arb_IDs(); |
3075 | setup_IO_APIC_irqs(); | 3072 | setup_IO_APIC_irqs(); |
3076 | init_IO_APIC_traps(); | 3073 | init_IO_APIC_traps(); |
3077 | if (nr_legacy_irqs) | 3074 | if (legacy_pic->nr_legacy_irqs) |
3078 | check_timer(); | 3075 | check_timer(); |
3079 | } | 3076 | } |
3080 | 3077 | ||
@@ -3875,7 +3872,7 @@ static int __io_apic_set_pci_routing(struct device *dev, int irq, | |||
3875 | /* | 3872 | /* |
3876 | * IRQs < 16 are already in the irq_2_pin[] map | 3873 | * IRQs < 16 are already in the irq_2_pin[] map |
3877 | */ | 3874 | */ |
3878 | if (irq >= nr_legacy_irqs) { | 3875 | if (irq >= legacy_pic->nr_legacy_irqs) { |
3879 | cfg = desc->chip_data; | 3876 | cfg = desc->chip_data; |
3880 | if (add_pin_to_irq_node_nopanic(cfg, node, ioapic, pin)) { | 3877 | if (add_pin_to_irq_node_nopanic(cfg, node, ioapic, pin)) { |
3881 | printk(KERN_INFO "can not add pin %d for irq %d\n", | 3878 | printk(KERN_INFO "can not add pin %d for irq %d\n", |
diff --git a/arch/x86/kernel/apic/nmi.c b/arch/x86/kernel/apic/nmi.c index 0159a69396cb..3817739acee9 100644 --- a/arch/x86/kernel/apic/nmi.c +++ b/arch/x86/kernel/apic/nmi.c | |||
@@ -177,7 +177,7 @@ int __init check_nmi_watchdog(void) | |||
177 | error: | 177 | error: |
178 | if (nmi_watchdog == NMI_IO_APIC) { | 178 | if (nmi_watchdog == NMI_IO_APIC) { |
179 | if (!timer_through_8259) | 179 | if (!timer_through_8259) |
180 | disable_8259A_irq(0); | 180 | legacy_pic->chip->mask(0); |
181 | on_each_cpu(__acpi_nmi_disable, NULL, 1); | 181 | on_each_cpu(__acpi_nmi_disable, NULL, 1); |
182 | } | 182 | } |
183 | 183 | ||
diff --git a/arch/x86/kernel/i8259.c b/arch/x86/kernel/i8259.c index b80987ca33ea..1c790e75f7a0 100644 --- a/arch/x86/kernel/i8259.c +++ b/arch/x86/kernel/i8259.c | |||
@@ -34,6 +34,12 @@ | |||
34 | static int i8259A_auto_eoi; | 34 | static int i8259A_auto_eoi; |
35 | DEFINE_SPINLOCK(i8259A_lock); | 35 | DEFINE_SPINLOCK(i8259A_lock); |
36 | static void mask_and_ack_8259A(unsigned int); | 36 | static void mask_and_ack_8259A(unsigned int); |
37 | static void mask_8259A(void); | ||
38 | static void unmask_8259A(void); | ||
39 | static void disable_8259A_irq(unsigned int irq); | ||
40 | static void enable_8259A_irq(unsigned int irq); | ||
41 | static void init_8259A(int auto_eoi); | ||
42 | static int i8259A_irq_pending(unsigned int irq); | ||
37 | 43 | ||
38 | struct irq_chip i8259A_chip = { | 44 | struct irq_chip i8259A_chip = { |
39 | .name = "XT-PIC", | 45 | .name = "XT-PIC", |
@@ -63,7 +69,7 @@ unsigned int cached_irq_mask = 0xffff; | |||
63 | */ | 69 | */ |
64 | unsigned long io_apic_irqs; | 70 | unsigned long io_apic_irqs; |
65 | 71 | ||
66 | void disable_8259A_irq(unsigned int irq) | 72 | static void disable_8259A_irq(unsigned int irq) |
67 | { | 73 | { |
68 | unsigned int mask = 1 << irq; | 74 | unsigned int mask = 1 << irq; |
69 | unsigned long flags; | 75 | unsigned long flags; |
@@ -77,7 +83,7 @@ void disable_8259A_irq(unsigned int irq) | |||
77 | spin_unlock_irqrestore(&i8259A_lock, flags); | 83 | spin_unlock_irqrestore(&i8259A_lock, flags); |
78 | } | 84 | } |
79 | 85 | ||
80 | void enable_8259A_irq(unsigned int irq) | 86 | static void enable_8259A_irq(unsigned int irq) |
81 | { | 87 | { |
82 | unsigned int mask = ~(1 << irq); | 88 | unsigned int mask = ~(1 << irq); |
83 | unsigned long flags; | 89 | unsigned long flags; |
@@ -91,7 +97,7 @@ void enable_8259A_irq(unsigned int irq) | |||
91 | spin_unlock_irqrestore(&i8259A_lock, flags); | 97 | spin_unlock_irqrestore(&i8259A_lock, flags); |
92 | } | 98 | } |
93 | 99 | ||
94 | int i8259A_irq_pending(unsigned int irq) | 100 | static int i8259A_irq_pending(unsigned int irq) |
95 | { | 101 | { |
96 | unsigned int mask = 1<<irq; | 102 | unsigned int mask = 1<<irq; |
97 | unsigned long flags; | 103 | unsigned long flags; |
@@ -107,7 +113,7 @@ int i8259A_irq_pending(unsigned int irq) | |||
107 | return ret; | 113 | return ret; |
108 | } | 114 | } |
109 | 115 | ||
110 | void make_8259A_irq(unsigned int irq) | 116 | static void make_8259A_irq(unsigned int irq) |
111 | { | 117 | { |
112 | disable_irq_nosync(irq); | 118 | disable_irq_nosync(irq); |
113 | io_apic_irqs &= ~(1<<irq); | 119 | io_apic_irqs &= ~(1<<irq); |
@@ -281,7 +287,7 @@ static int __init i8259A_init_sysfs(void) | |||
281 | 287 | ||
282 | device_initcall(i8259A_init_sysfs); | 288 | device_initcall(i8259A_init_sysfs); |
283 | 289 | ||
284 | void mask_8259A(void) | 290 | static void mask_8259A(void) |
285 | { | 291 | { |
286 | unsigned long flags; | 292 | unsigned long flags; |
287 | 293 | ||
@@ -293,7 +299,7 @@ void mask_8259A(void) | |||
293 | spin_unlock_irqrestore(&i8259A_lock, flags); | 299 | spin_unlock_irqrestore(&i8259A_lock, flags); |
294 | } | 300 | } |
295 | 301 | ||
296 | void unmask_8259A(void) | 302 | static void unmask_8259A(void) |
297 | { | 303 | { |
298 | unsigned long flags; | 304 | unsigned long flags; |
299 | 305 | ||
@@ -305,7 +311,7 @@ void unmask_8259A(void) | |||
305 | spin_unlock_irqrestore(&i8259A_lock, flags); | 311 | spin_unlock_irqrestore(&i8259A_lock, flags); |
306 | } | 312 | } |
307 | 313 | ||
308 | void init_8259A(int auto_eoi) | 314 | static void init_8259A(int auto_eoi) |
309 | { | 315 | { |
310 | unsigned long flags; | 316 | unsigned long flags; |
311 | 317 | ||
@@ -358,6 +364,7 @@ void init_8259A(int auto_eoi) | |||
358 | 364 | ||
359 | spin_unlock_irqrestore(&i8259A_lock, flags); | 365 | spin_unlock_irqrestore(&i8259A_lock, flags); |
360 | } | 366 | } |
367 | |||
361 | /* | 368 | /* |
362 | * make i8259 a driver so that we can select pic functions at run time. the goal | 369 | * make i8259 a driver so that we can select pic functions at run time. the goal |
363 | * is to make x86 binary compatible among pc compatible and non-pc compatible | 370 | * is to make x86 binary compatible among pc compatible and non-pc compatible |
diff --git a/arch/x86/kernel/irqinit.c b/arch/x86/kernel/irqinit.c index d5932226614f..89b9510e8030 100644 --- a/arch/x86/kernel/irqinit.c +++ b/arch/x86/kernel/irqinit.c | |||
@@ -123,7 +123,7 @@ void __init init_ISA_irqs(void) | |||
123 | #if defined(CONFIG_X86_64) || defined(CONFIG_X86_LOCAL_APIC) | 123 | #if defined(CONFIG_X86_64) || defined(CONFIG_X86_LOCAL_APIC) |
124 | init_bsp_APIC(); | 124 | init_bsp_APIC(); |
125 | #endif | 125 | #endif |
126 | init_8259A(0); | 126 | legacy_pic->init(0); |
127 | 127 | ||
128 | /* | 128 | /* |
129 | * 16 old-style INTA-cycle interrupts: | 129 | * 16 old-style INTA-cycle interrupts: |
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c index 3e6150d421e4..f7a52f4a21a5 100644 --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c | |||
@@ -68,6 +68,7 @@ | |||
68 | #include <linux/mc146818rtc.h> | 68 | #include <linux/mc146818rtc.h> |
69 | 69 | ||
70 | #include <asm/smpboot_hooks.h> | 70 | #include <asm/smpboot_hooks.h> |
71 | #include <asm/i8259.h> | ||
71 | 72 | ||
72 | #ifdef CONFIG_X86_32 | 73 | #ifdef CONFIG_X86_32 |
73 | u8 apicid_2_node[MAX_APICID]; | 74 | u8 apicid_2_node[MAX_APICID]; |
@@ -287,9 +288,9 @@ notrace static void __cpuinit start_secondary(void *unused) | |||
287 | check_tsc_sync_target(); | 288 | check_tsc_sync_target(); |
288 | 289 | ||
289 | if (nmi_watchdog == NMI_IO_APIC) { | 290 | if (nmi_watchdog == NMI_IO_APIC) { |
290 | disable_8259A_irq(0); | 291 | legacy_pic->chip->mask(0); |
291 | enable_NMI_through_LVT0(); | 292 | enable_NMI_through_LVT0(); |
292 | enable_8259A_irq(0); | 293 | legacy_pic->chip->unmask(0); |
293 | } | 294 | } |
294 | 295 | ||
295 | #ifdef CONFIG_X86_32 | 296 | #ifdef CONFIG_X86_32 |
diff --git a/arch/x86/kernel/visws_quirks.c b/arch/x86/kernel/visws_quirks.c index b48ef6c0d716..f067e9556a47 100644 --- a/arch/x86/kernel/visws_quirks.c +++ b/arch/x86/kernel/visws_quirks.c | |||
@@ -505,7 +505,7 @@ static struct irq_chip cobalt_irq_type = { | |||
505 | */ | 505 | */ |
506 | static unsigned int startup_piix4_master_irq(unsigned int irq) | 506 | static unsigned int startup_piix4_master_irq(unsigned int irq) |
507 | { | 507 | { |
508 | init_8259A(0); | 508 | legacy_pic->init(0); |
509 | 509 | ||
510 | return startup_cobalt_irq(irq); | 510 | return startup_cobalt_irq(irq); |
511 | } | 511 | } |
@@ -529,9 +529,6 @@ static struct irq_chip piix4_master_irq_type = { | |||
529 | 529 | ||
530 | static struct irq_chip piix4_virtual_irq_type = { | 530 | static struct irq_chip piix4_virtual_irq_type = { |
531 | .name = "PIIX4-virtual", | 531 | .name = "PIIX4-virtual", |
532 | .shutdown = disable_8259A_irq, | ||
533 | .enable = enable_8259A_irq, | ||
534 | .disable = disable_8259A_irq, | ||
535 | }; | 532 | }; |
536 | 533 | ||
537 | 534 | ||
@@ -606,7 +603,7 @@ static irqreturn_t piix4_master_intr(int irq, void *dev_id) | |||
606 | handle_IRQ_event(realirq, desc->action); | 603 | handle_IRQ_event(realirq, desc->action); |
607 | 604 | ||
608 | if (!(desc->status & IRQ_DISABLED)) | 605 | if (!(desc->status & IRQ_DISABLED)) |
609 | enable_8259A_irq(realirq); | 606 | legacy_pic->chip->unmask(realirq); |
610 | 607 | ||
611 | return IRQ_HANDLED; | 608 | return IRQ_HANDLED; |
612 | 609 | ||
@@ -625,6 +622,12 @@ static struct irqaction cascade_action = { | |||
625 | .name = "cascade", | 622 | .name = "cascade", |
626 | }; | 623 | }; |
627 | 624 | ||
625 | static inline void set_piix4_virtual_irq_type(void) | ||
626 | { | ||
627 | piix4_virtual_irq_type.shutdown = i8259A_chip.mask; | ||
628 | piix4_virtual_irq_type.enable = i8259A_chip.unmask; | ||
629 | piix4_virtual_irq_type.disable = i8259A_chip.mask; | ||
630 | } | ||
628 | 631 | ||
629 | void init_VISWS_APIC_irqs(void) | 632 | void init_VISWS_APIC_irqs(void) |
630 | { | 633 | { |
@@ -650,6 +653,7 @@ void init_VISWS_APIC_irqs(void) | |||
650 | desc->chip = &piix4_master_irq_type; | 653 | desc->chip = &piix4_master_irq_type; |
651 | } | 654 | } |
652 | else if (i < CO_IRQ_APIC0) { | 655 | else if (i < CO_IRQ_APIC0) { |
656 | set_piix4_virtual_irq_type(); | ||
653 | desc->chip = &piix4_virtual_irq_type; | 657 | desc->chip = &piix4_virtual_irq_type; |
654 | } | 658 | } |
655 | else if (IS_CO_APIC(i)) { | 659 | else if (IS_CO_APIC(i)) { |