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authorAndy Fleming <afleming@freescale.com>2006-02-10 18:01:06 -0500
committerKumar Gala <galak@kernel.crashing.org>2006-02-22 00:48:59 -0500
commit8080d5497146d5d27d9e8e78229d1adc7fe280cf (patch)
tree8ce379ab20f59951507b328fe86beddd5855ce80 /arch
parent774fee58c465ea1c7e9775e347ec307bcf2deeb3 (diff)
powerpc: Add PCI support for 8540 ADS to powerpc tree
Add PCI support for setting PCI from flat device tree on 85xx specifically for MPC8540 ADS. Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/platforms/85xx/Makefile3
-rw-r--r--arch/powerpc/platforms/85xx/mpc8540_ads.h24
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx.h1
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx_ads.c67
-rw-r--r--arch/powerpc/platforms/85xx/pci.c96
5 files changed, 166 insertions, 25 deletions
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
index 70e1190809f8..ffc4139cb214 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -1,4 +1,5 @@
1# 1#
2# Makefile for the PowerPC 85xx linux kernel. 2# Makefile for the PowerPC 85xx linux kernel.
3# 3#
4obj-$(CONFIG_PPC_85xx) += misc.o mpc85xx_ads.o 4obj-$(CONFIG_PPC_85xx) += misc.o pci.o
5obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o
diff --git a/arch/powerpc/platforms/85xx/mpc8540_ads.h b/arch/powerpc/platforms/85xx/mpc8540_ads.h
index b3ec88caad11..f770cadb2080 100644
--- a/arch/powerpc/platforms/85xx/mpc8540_ads.h
+++ b/arch/powerpc/platforms/85xx/mpc8540_ads.h
@@ -30,30 +30,6 @@
30#define PIRQC MPC85xx_IRQ_EXT3 30#define PIRQC MPC85xx_IRQ_EXT3
31#define PIRQD MPC85xx_IRQ_EXT4 31#define PIRQD MPC85xx_IRQ_EXT4
32 32
33#define MPC85XX_PCI1_LOWER_IO 0x00000000
34#define MPC85XX_PCI1_UPPER_IO 0x00ffffff
35
36#define MPC85XX_PCI1_LOWER_MEM 0x80000000
37#define MPC85XX_PCI1_UPPER_MEM 0x9fffffff
38
39#define MPC85XX_PCI1_IO_BASE 0xe2000000
40#define MPC85XX_PCI1_MEM_OFFSET 0x00000000
41
42#define MPC85XX_PCI1_IO_SIZE 0x01000000
43
44/* PCI config */
45#define PCI1_CFG_ADDR_OFFSET (0x8000)
46#define PCI1_CFG_DATA_OFFSET (0x8004)
47
48#define PCI2_CFG_ADDR_OFFSET (0x9000)
49#define PCI2_CFG_DATA_OFFSET (0x9004)
50
51/* Additional register for PCI-X configuration */
52#define PCIX_NEXT_CAP 0x60
53#define PCIX_CAP_ID 0x61
54#define PCIX_COMMAND 0x62
55#define PCIX_STATUS 0x64
56
57/* Offset of CPM register space */ 33/* Offset of CPM register space */
58#define CPM_MAP_ADDR (CCSRBAR + MPC85xx_CPM_OFFSET) 34#define CPM_MAP_ADDR (CCSRBAR + MPC85xx_CPM_OFFSET)
59 35
diff --git a/arch/powerpc/platforms/85xx/mpc85xx.h b/arch/powerpc/platforms/85xx/mpc85xx.h
index be75abb2a283..b44db6268f3d 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx.h
+++ b/arch/powerpc/platforms/85xx/mpc85xx.h
@@ -15,3 +15,4 @@
15 */ 15 */
16 16
17extern void mpc85xx_restart(char *); 17extern void mpc85xx_restart(char *);
18extern int add_bridge(struct device_node *dev);
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
index ba6798d47654..b7821dbae00d 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
@@ -67,6 +67,62 @@ static u_char mpc85xx_ads_openpic_initsenses[] __initdata = {
67 0x0, /* External 11: */ 67 0x0, /* External 11: */
68}; 68};
69 69
70#ifdef CONFIG_PCI
71/*
72 * interrupt routing
73 */
74
75int
76mpc85xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
77{
78 static char pci_irq_table[][4] =
79 /*
80 * This is little evil, but works around the fact
81 * that revA boards have IDSEL starting at 18
82 * and others boards (older) start at 12
83 *
84 * PCI IDSEL/INTPIN->INTLINE
85 * A B C D
86 */
87 {
88 {PIRQA, PIRQB, PIRQC, PIRQD}, /* IDSEL 2 */
89 {PIRQD, PIRQA, PIRQB, PIRQC},
90 {PIRQC, PIRQD, PIRQA, PIRQB},
91 {PIRQB, PIRQC, PIRQD, PIRQA}, /* IDSEL 5 */
92 {0, 0, 0, 0}, /* -- */
93 {0, 0, 0, 0}, /* -- */
94 {0, 0, 0, 0}, /* -- */
95 {0, 0, 0, 0}, /* -- */
96 {0, 0, 0, 0}, /* -- */
97 {0, 0, 0, 0}, /* -- */
98 {PIRQA, PIRQB, PIRQC, PIRQD}, /* IDSEL 12 */
99 {PIRQD, PIRQA, PIRQB, PIRQC},
100 {PIRQC, PIRQD, PIRQA, PIRQB},
101 {PIRQB, PIRQC, PIRQD, PIRQA}, /* IDSEL 15 */
102 {0, 0, 0, 0}, /* -- */
103 {0, 0, 0, 0}, /* -- */
104 {PIRQA, PIRQB, PIRQC, PIRQD}, /* IDSEL 18 */
105 {PIRQD, PIRQA, PIRQB, PIRQC},
106 {PIRQC, PIRQD, PIRQA, PIRQB},
107 {PIRQB, PIRQC, PIRQD, PIRQA}, /* IDSEL 21 */
108 };
109
110 const long min_idsel = 2, max_idsel = 21, irqs_per_slot = 4;
111 return PCI_IRQ_TABLE_LOOKUP;
112}
113
114int
115mpc85xx_exclude_device(u_char bus, u_char devfn)
116{
117 if (bus == 0 && PCI_SLOT(devfn) == 0)
118 return PCIBIOS_DEVICE_NOT_FOUND;
119 else
120 return PCIBIOS_SUCCESSFUL;
121}
122
123#endif /* CONFIG_PCI */
124
125
70void __init mpc85xx_ads_pic_init(void) 126void __init mpc85xx_ads_pic_init(void)
71{ 127{
72 struct mpic *mpic1; 128 struct mpic *mpic1;
@@ -110,6 +166,7 @@ void __init mpc85xx_ads_pic_init(void)
110static void __init mpc85xx_ads_setup_arch(void) 166static void __init mpc85xx_ads_setup_arch(void)
111{ 167{
112 struct device_node *cpu; 168 struct device_node *cpu;
169 struct device_node *np;
113 170
114 if (ppc_md.progress) 171 if (ppc_md.progress)
115 ppc_md.progress("mpc85xx_ads_setup_arch()", 0); 172 ppc_md.progress("mpc85xx_ads_setup_arch()", 0);
@@ -125,6 +182,16 @@ static void __init mpc85xx_ads_setup_arch(void)
125 loops_per_jiffy = 50000000 / HZ; 182 loops_per_jiffy = 50000000 / HZ;
126 of_node_put(cpu); 183 of_node_put(cpu);
127 } 184 }
185
186#ifdef CONFIG_PCI
187 for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
188 add_bridge(np);
189
190 ppc_md.pci_swizzle = common_swizzle;
191 ppc_md.pci_map_irq = mpc85xx_map_irq;
192 ppc_md.pci_exclude_device = mpc85xx_exclude_device;
193#endif
194
128#ifdef CONFIG_ROOT_NFS 195#ifdef CONFIG_ROOT_NFS
129 ROOT_DEV = Root_NFS; 196 ROOT_DEV = Root_NFS;
130#else 197#else
diff --git a/arch/powerpc/platforms/85xx/pci.c b/arch/powerpc/platforms/85xx/pci.c
new file mode 100644
index 000000000000..bad290110ed1
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/pci.c
@@ -0,0 +1,96 @@
1/*
2 * FSL SoC setup code
3 *
4 * Maintained by Kumar Gala (see MAINTAINERS for contact information)
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12#include <linux/config.h>
13#include <linux/stddef.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/errno.h>
17#include <linux/pci.h>
18#include <linux/delay.h>
19#include <linux/irq.h>
20#include <linux/module.h>
21
22#include <asm/system.h>
23#include <asm/atomic.h>
24#include <asm/io.h>
25#include <asm/pci-bridge.h>
26#include <asm/prom.h>
27#include <sysdev/fsl_soc.h>
28
29#undef DEBUG
30
31#ifdef DEBUG
32#define DBG(x...) printk(x)
33#else
34#define DBG(x...)
35#endif
36
37int mpc85xx_pci2_busno = 0;
38
39#ifdef CONFIG_PCI
40int __init add_bridge(struct device_node *dev)
41{
42 int len;
43 struct pci_controller *hose;
44 struct resource rsrc;
45 int *bus_range;
46 int primary = 1, has_address = 0;
47 phys_addr_t immr = get_immrbase();
48
49 DBG("Adding PCI host bridge %s\n", dev->full_name);
50
51 /* Fetch host bridge registers address */
52 has_address = (of_address_to_resource(dev, 0, &rsrc) == 0);
53
54 /* Get bus range if any */
55 bus_range = (int *) get_property(dev, "bus-range", &len);
56 if (bus_range == NULL || len < 2 * sizeof(int)) {
57 printk(KERN_WARNING "Can't get bus-range for %s, assume"
58 " bus 0\n", dev->full_name);
59 }
60
61 hose = pcibios_alloc_controller();
62 if (!hose)
63 return -ENOMEM;
64 hose->arch_data = dev;
65 hose->set_cfg_type = 1;
66
67 hose->first_busno = bus_range ? bus_range[0] : 0;
68 hose->last_busno = bus_range ? bus_range[1] : 0xff;
69
70 /* PCI 1 */
71 if ((rsrc.start & 0xfffff) == 0x8000) {
72 setup_indirect_pci(hose, immr + 0x8000, immr + 0x8004);
73 }
74 /* PCI 2 */
75 if ((rsrc.start & 0xfffff) == 0x9000) {
76 setup_indirect_pci(hose, immr + 0x9000, immr + 0x9004);
77 primary = 0;
78 hose->bus_offset = hose->first_busno;
79 mpc85xx_pci2_busno = hose->first_busno;
80 }
81
82 printk(KERN_INFO "Found MPC85xx PCI host bridge at 0x%08lx. "
83 "Firmware bus number: %d->%d\n",
84 rsrc.start, hose->first_busno, hose->last_busno);
85
86 DBG(" ->Hose at 0x%p, cfg_addr=0x%p,cfg_data=0x%p\n",
87 hose, hose->cfg_addr, hose->cfg_data);
88
89 /* Interpret the "ranges" property */
90 /* This also maps the I/O region and sets isa_io/mem_base */
91 pci_process_bridge_OF_ranges(hose, dev, primary);
92
93 return 0;
94}
95
96#endif